Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: UNKNOWN
- Kernel Warnings: 0
- Kernel Errors: 0
- Warnings: 0
1 12:11:07.159950 lava-dispatcher, installed at version: 2022.11
2 12:11:07.160163 start: 0 validate
3 12:11:07.160311 Start time: 2023-01-04 12:11:07.160303+00:00 (UTC)
4 12:11:07.160446 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:11:07.160583 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221230.0%2Famd64%2Finitrd.cpio.gz exists
6 12:11:07.455141 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:11:07.455332 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.161-cip23-65-gca8c192cb189%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:11:07.748679 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:11:07.749397 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221230.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:11:08.043228 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:11:08.043945 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.161-cip23-65-gca8c192cb189%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:11:08.348253 validate duration: 1.19
14 12:11:08.348616 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:11:08.348731 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:11:08.348827 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:11:08.348934 Not decompressing ramdisk as can be used compressed.
18 12:11:08.349019 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221230.0/amd64/initrd.cpio.gz
19 12:11:08.349086 saving as /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/ramdisk/initrd.cpio.gz
20 12:11:08.349150 total size: 5432111 (5MB)
21 12:11:08.351863 progress 0% (0MB)
22 12:11:08.354706 progress 5% (0MB)
23 12:11:08.357001 progress 10% (0MB)
24 12:11:08.359215 progress 15% (0MB)
25 12:11:08.361613 progress 20% (1MB)
26 12:11:08.363877 progress 25% (1MB)
27 12:11:08.365996 progress 30% (1MB)
28 12:11:08.368446 progress 35% (1MB)
29 12:11:08.370830 progress 40% (2MB)
30 12:11:08.373244 progress 45% (2MB)
31 12:11:08.375199 progress 50% (2MB)
32 12:11:08.377730 progress 55% (2MB)
33 12:11:08.380018 progress 60% (3MB)
34 12:11:08.382507 progress 65% (3MB)
35 12:11:08.384778 progress 70% (3MB)
36 12:11:08.387048 progress 75% (3MB)
37 12:11:08.389212 progress 80% (4MB)
38 12:11:08.391667 progress 85% (4MB)
39 12:11:08.394104 progress 90% (4MB)
40 12:11:08.396487 progress 95% (4MB)
41 12:11:08.398445 progress 100% (5MB)
42 12:11:08.398737 5MB downloaded in 0.05s (104.48MB/s)
43 12:11:08.398910 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:11:08.399200 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:11:08.399301 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:11:08.399407 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:11:08.399525 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.161-cip23-65-gca8c192cb189/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:11:08.399603 saving as /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/kernel/bzImage
50 12:11:08.399674 total size: 11461792 (10MB)
51 12:11:08.399743 No compression specified
52 12:11:11.908478 progress 0% (0MB)
53 12:11:11.915196 progress 5% (0MB)
54 12:11:11.923320 progress 10% (1MB)
55 12:11:11.933474 progress 15% (1MB)
56 12:11:11.943383 progress 20% (2MB)
57 12:11:11.953786 progress 25% (2MB)
58 12:11:11.962417 progress 30% (3MB)
59 12:11:11.973153 progress 35% (3MB)
60 12:11:11.982180 progress 40% (4MB)
61 12:11:11.992312 progress 45% (4MB)
62 12:11:12.001986 progress 50% (5MB)
63 12:11:12.012315 progress 55% (6MB)
64 12:11:12.021168 progress 60% (6MB)
65 12:11:12.031153 progress 65% (7MB)
66 12:11:12.040844 progress 70% (7MB)
67 12:11:12.050733 progress 75% (8MB)
68 12:11:12.057953 progress 80% (8MB)
69 12:11:12.067733 progress 85% (9MB)
70 12:11:12.077547 progress 90% (9MB)
71 12:11:12.087332 progress 95% (10MB)
72 12:11:12.096547 progress 100% (10MB)
73 12:11:12.096886 10MB downloaded in 3.70s (2.96MB/s)
74 12:11:12.097053 end: 1.2.1 http-download (duration 00:00:04) [common]
76 12:11:12.097315 end: 1.2 download-retry (duration 00:00:04) [common]
77 12:11:12.097415 start: 1.3 download-retry (timeout 00:09:56) [common]
78 12:11:12.097512 start: 1.3.1 http-download (timeout 00:09:56) [common]
79 12:11:12.097631 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221230.0/amd64/full.rootfs.tar.xz
80 12:11:12.097706 saving as /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/nfsrootfs/full.rootfs.tar
81 12:11:12.097774 total size: 133354200 (127MB)
82 12:11:12.097843 Using unxz to decompress xz
83 12:11:12.107456 progress 0% (0MB)
84 12:11:13.001574 progress 5% (6MB)
85 12:11:13.658415 progress 10% (12MB)
86 12:11:14.695157 progress 15% (19MB)
87 12:11:15.901557 progress 20% (25MB)
88 12:11:17.073114 progress 25% (31MB)
89 12:11:18.163346 progress 30% (38MB)
90 12:11:18.805409 progress 35% (44MB)
91 12:11:19.368772 progress 40% (50MB)
92 12:11:20.065705 progress 45% (57MB)
93 12:11:20.881228 progress 50% (63MB)
94 12:11:21.911373 progress 55% (69MB)
95 12:11:23.451888 progress 60% (76MB)
96 12:11:24.863982 progress 65% (82MB)
97 12:11:26.440664 progress 70% (89MB)
98 12:11:27.541318 progress 75% (95MB)
99 12:11:28.275266 progress 80% (101MB)
100 12:11:28.767878 progress 85% (108MB)
101 12:11:29.208936 progress 90% (114MB)
102 12:11:29.650923 progress 95% (120MB)
103 12:11:30.092807 progress 100% (127MB)
104 12:11:30.099359 127MB downloaded in 18.00s (7.06MB/s)
105 12:11:30.099640 end: 1.3.1 http-download (duration 00:00:18) [common]
107 12:11:30.099938 end: 1.3 download-retry (duration 00:00:18) [common]
108 12:11:30.100045 start: 1.4 download-retry (timeout 00:09:38) [common]
109 12:11:30.100148 start: 1.4.1 http-download (timeout 00:09:38) [common]
110 12:11:30.100279 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.161-cip23-65-gca8c192cb189/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:11:30.100362 saving as /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/modules/modules.tar
112 12:11:30.100433 total size: 113744 (0MB)
113 12:11:30.100506 Using unxz to decompress xz
114 12:11:30.466218 progress 28% (0MB)
115 12:11:30.469044 progress 57% (0MB)
116 12:11:30.497439 progress 86% (0MB)
117 12:11:30.498921 progress 100% (0MB)
118 12:11:30.514796 0MB downloaded in 0.41s (0.26MB/s)
119 12:11:30.515595 end: 1.4.1 http-download (duration 00:00:00) [common]
121 12:11:30.516542 end: 1.4 download-retry (duration 00:00:00) [common]
122 12:11:30.516903 start: 1.5 prepare-tftp-overlay (timeout 00:09:38) [common]
123 12:11:30.517269 start: 1.5.1 extract-nfsrootfs (timeout 00:09:38) [common]
124 12:11:31.917489 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8570536/extract-nfsrootfs-pk3chsnf
125 12:11:31.917707 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
126 12:11:31.917827 start: 1.5.2 lava-overlay (timeout 00:09:36) [common]
127 12:11:31.917986 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7
128 12:11:31.918101 makedir: /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin
129 12:11:31.918196 makedir: /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/tests
130 12:11:31.918287 makedir: /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/results
131 12:11:31.918394 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-add-keys
132 12:11:31.918537 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-add-sources
133 12:11:31.918665 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-background-process-start
134 12:11:31.918792 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-background-process-stop
135 12:11:31.918917 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-common-functions
136 12:11:31.919040 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-echo-ipv4
137 12:11:31.919164 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-install-packages
138 12:11:31.919287 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-installed-packages
139 12:11:31.919413 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-os-build
140 12:11:31.919536 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-probe-channel
141 12:11:31.919657 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-probe-ip
142 12:11:31.919778 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-target-ip
143 12:11:31.919899 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-target-mac
144 12:11:31.920019 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-target-storage
145 12:11:31.920142 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-test-case
146 12:11:31.920267 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-test-event
147 12:11:31.920388 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-test-feedback
148 12:11:31.920509 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-test-raise
149 12:11:31.920631 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-test-reference
150 12:11:31.920767 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-test-runner
151 12:11:31.920891 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-test-set
152 12:11:31.921013 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-test-shell
153 12:11:31.921137 Updating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-install-packages (oe)
154 12:11:31.921263 Updating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/bin/lava-installed-packages (oe)
155 12:11:31.921371 Creating /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/environment
156 12:11:31.921467 LAVA metadata
157 12:11:31.921542 - LAVA_JOB_ID=8570536
158 12:11:31.921614 - LAVA_DISPATCHER_IP=192.168.201.1
159 12:11:31.921723 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:36) [common]
160 12:11:31.921797 skipped lava-vland-overlay
161 12:11:31.921884 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
162 12:11:31.922021 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:36) [common]
163 12:11:31.922093 skipped lava-multinode-overlay
164 12:11:31.922176 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
165 12:11:31.922269 start: 1.5.2.3 test-definition (timeout 00:09:36) [common]
166 12:11:31.922349 Loading test definitions
167 12:11:31.922450 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:36) [common]
168 12:11:31.922530 Using /lava-8570536 at stage 0
169 12:11:31.922811 uuid=8570536_1.5.2.3.1 testdef=None
170 12:11:31.922912 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
171 12:11:31.923009 start: 1.5.2.3.2 test-overlay (timeout 00:09:36) [common]
172 12:11:31.923532 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
174 12:11:31.923792 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:36) [common]
175 12:11:31.924417 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
177 12:11:31.924684 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:36) [common]
178 12:11:31.925282 runner path: /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/0/tests/0_dmesg test_uuid 8570536_1.5.2.3.1
179 12:11:31.925445 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
181 12:11:31.925704 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:36) [common]
182 12:11:31.925788 Using /lava-8570536 at stage 1
183 12:11:31.926192 uuid=8570536_1.5.2.3.5 testdef=None
184 12:11:31.926296 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
185 12:11:31.926395 start: 1.5.2.3.6 test-overlay (timeout 00:09:36) [common]
186 12:11:31.926902 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
188 12:11:31.927157 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:36) [common]
189 12:11:31.927795 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
191 12:11:31.928070 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:36) [common]
192 12:11:31.928725 runner path: /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/1/tests/1_bootrr test_uuid 8570536_1.5.2.3.5
193 12:11:31.928922 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
195 12:11:31.929164 Creating lava-test-runner.conf files
196 12:11:31.929237 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/0 for stage 0
197 12:11:31.929329 - 0_dmesg
198 12:11:31.929412 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8570536/lava-overlay-hnhis3u7/lava-8570536/1 for stage 1
199 12:11:31.929504 - 1_bootrr
200 12:11:31.929606 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
201 12:11:31.929706 start: 1.5.2.4 compress-overlay (timeout 00:09:36) [common]
202 12:11:31.935857 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
203 12:11:31.935976 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
204 12:11:31.936078 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
205 12:11:31.936175 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
206 12:11:31.936272 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
207 12:11:32.048493 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
208 12:11:32.048867 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
209 12:11:32.048992 extracting modules file /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8570536/extract-nfsrootfs-pk3chsnf
210 12:11:32.054531 extracting modules file /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8570536/extract-overlay-ramdisk-cuvp9mko/ramdisk
211 12:11:32.059697 end: 1.5.4 extract-modules (duration 00:00:00) [common]
212 12:11:32.059818 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
213 12:11:32.059913 [common] Applying overlay to NFS
214 12:11:32.059994 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8570536/compress-overlay-8kzfje4l/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8570536/extract-nfsrootfs-pk3chsnf
215 12:11:32.064279 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
216 12:11:32.064404 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
217 12:11:32.064507 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
218 12:11:32.064610 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
219 12:11:32.064700 Building ramdisk /var/lib/lava/dispatcher/tmp/8570536/extract-overlay-ramdisk-cuvp9mko/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8570536/extract-overlay-ramdisk-cuvp9mko/ramdisk
220 12:11:32.102772 >> 25325 blocks
221 12:11:32.626618 rename /var/lib/lava/dispatcher/tmp/8570536/extract-overlay-ramdisk-cuvp9mko/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/ramdisk/ramdisk.cpio.gz
222 12:11:32.627062 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
223 12:11:32.627199 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
224 12:11:32.627320 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
225 12:11:32.627431 No mkimage arch provided, not using FIT.
226 12:11:32.627535 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
227 12:11:32.627631 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
228 12:11:32.627744 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
229 12:11:32.627854 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
230 12:11:32.627947 No LXC device requested
231 12:11:32.628043 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
232 12:11:32.628144 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
233 12:11:32.628242 end: 1.7 deploy-device-env (duration 00:00:00) [common]
234 12:11:32.628324 Checking files for TFTP limit of 4294967296 bytes.
235 12:11:32.628747 end: 1 tftp-deploy (duration 00:00:24) [common]
236 12:11:32.628873 start: 2 depthcharge-action (timeout 00:05:00) [common]
237 12:11:32.628985 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
238 12:11:32.629127 substitutions:
239 12:11:32.629206 - {DTB}: None
240 12:11:32.629280 - {INITRD}: 8570536/tftp-deploy-rr1ovlbr/ramdisk/ramdisk.cpio.gz
241 12:11:32.629351 - {KERNEL}: 8570536/tftp-deploy-rr1ovlbr/kernel/bzImage
242 12:11:32.629421 - {LAVA_MAC}: None
243 12:11:32.629504 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8570536/extract-nfsrootfs-pk3chsnf
244 12:11:32.629576 - {NFS_SERVER_IP}: 192.168.201.1
245 12:11:32.629644 - {PRESEED_CONFIG}: None
246 12:11:32.629711 - {PRESEED_LOCAL}: None
247 12:11:32.629777 - {RAMDISK}: 8570536/tftp-deploy-rr1ovlbr/ramdisk/ramdisk.cpio.gz
248 12:11:32.629843 - {ROOT_PART}: None
249 12:11:32.629914 - {ROOT}: None
250 12:11:32.629980 - {SERVER_IP}: 192.168.201.1
251 12:11:32.630045 - {TEE}: None
252 12:11:32.630109 Parsed boot commands:
253 12:11:32.630172 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
254 12:11:32.630346 Parsed boot commands: tftpboot 192.168.201.1 8570536/tftp-deploy-rr1ovlbr/kernel/bzImage 8570536/tftp-deploy-rr1ovlbr/kernel/cmdline 8570536/tftp-deploy-rr1ovlbr/ramdisk/ramdisk.cpio.gz
255 12:11:32.630454 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
256 12:11:32.630564 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
257 12:11:32.630677 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
258 12:11:32.630782 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
259 12:11:32.630868 Not connected, no need to disconnect.
260 12:11:32.630957 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
261 12:11:32.631054 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
262 12:11:32.631134 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
263 12:11:32.634053 Setting prompt string to ['lava-test: # ']
264 12:11:32.634366 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
265 12:11:32.634487 end: 2.2.1 reset-connection (duration 00:00:00) [common]
266 12:11:32.634598 start: 2.2.2 reset-device (timeout 00:05:00) [common]
267 12:11:32.634707 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
268 12:11:32.634913 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
269 12:11:32.655481 >> Command sent successfully.
270 12:11:32.657596 Returned 0 in 0 seconds
271 12:11:32.758335 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
273 12:11:32.759676 end: 2.2.2 reset-device (duration 00:00:00) [common]
274 12:11:32.760141 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
275 12:11:32.760532 Setting prompt string to 'Starting depthcharge on Voema...'
276 12:11:32.760838 Changing prompt to 'Starting depthcharge on Voema...'
277 12:11:32.761159 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
278 12:11:32.762297 [Enter `^Ec?' for help]
279 12:11:40.516642
280 12:11:40.516819
281 12:11:40.526313 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
282 12:11:40.529999 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
283 12:11:40.536298 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
284 12:11:40.539490 CPU: AES supported, TXT NOT supported, VT supported
285 12:11:40.546598 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
286 12:11:40.549696 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
287 12:11:40.556763 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
288 12:11:40.560037 VBOOT: Loading verstage.
289 12:11:40.563488 FMAP: Found "FLASH" version 1.1 at 0x1804000.
290 12:11:40.569971 FMAP: base = 0x0 size = 0x2000000 #areas = 32
291 12:11:40.572976 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
292 12:11:40.583206 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
293 12:11:40.589991 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
294 12:11:40.590090
295 12:11:40.590167
296 12:11:40.603915 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
297 12:11:40.617076 Probing TPM: . done!
298 12:11:40.620276 TPM ready after 0 ms
299 12:11:40.623733 Connected to device vid:did:rid of 1ae0:0028:00
300 12:11:40.634744 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
301 12:11:40.641563 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
302 12:11:40.645201 Initialized TPM device CR50 revision 0
303 12:11:40.701206 tlcl_send_startup: Startup return code is 0
304 12:11:40.701324 TPM: setup succeeded
305 12:11:40.716665 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
306 12:11:40.730963 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 12:11:40.743791 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
308 12:11:40.753478 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
309 12:11:40.757149 Chrome EC: UHEPI supported
310 12:11:40.760376 Phase 1
311 12:11:40.763735 FMAP: area GBB found @ 1805000 (458752 bytes)
312 12:11:40.770391 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
313 12:11:40.773683
314 12:11:40.780332 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
315 12:11:40.787176 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
316 12:11:40.793646 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
317 12:11:40.797145 Recovery requested (1009000e)
318 12:11:40.800131 TPM: Extending digest for VBOOT: boot mode into PCR 0
319 12:11:40.811765 tlcl_extend: response is 0
320 12:11:40.818550 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
321 12:11:40.827946 tlcl_extend: response is 0
322 12:11:40.834721 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
323 12:11:40.841366 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
324 12:11:40.847912 BS: verstage times (exec / console): total (unknown) / 142 ms
325 12:11:40.848011
326 12:11:40.848088
327 12:11:40.860881 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
328 12:11:40.867406 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
329 12:11:40.870992 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
330 12:11:40.874223 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
331 12:11:40.880832 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
332 12:11:40.884451 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
333 12:11:40.887517 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
334 12:11:40.890818 TCO_STS: 0000 0000
335 12:11:40.894258 GEN_PMCON: d0015038 00002200
336 12:11:40.897585 GBLRST_CAUSE: 00000000 00000000
337 12:11:40.897683 HPR_CAUSE0: 00000000
338 12:11:40.900842
339 12:11:40.900940 prev_sleep_state 5
340 12:11:40.904352 Boot Count incremented to 11834
341 12:11:40.910627 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
342 12:11:40.917695 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 12:11:40.923968 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 12:11:40.927205
345 12:11:40.934241 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 12:11:40.936958 Chrome EC: UHEPI supported
347 12:11:40.943930 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 12:11:40.954728 Probing TPM: done!
349 12:11:40.961274 Connected to device vid:did:rid of 1ae0:0028:00
350 12:11:40.971617 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
351 12:11:40.975262 Initialized TPM device CR50 revision 0
352 12:11:40.989832 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 12:11:40.996087 MRC: Hash idx 0x100b comparison successful.
354 12:11:40.999588 MRC cache found, size faa8
355 12:11:40.999685 bootmode is set to: 2
356 12:11:41.002853 SPD index = 2
357 12:11:41.009884 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 12:11:41.012645 SPD: module type is LPDDR4X
359 12:11:41.016623 SPD: module part number is MT53D1G64D4NW-046
360 12:11:41.023264 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
361 12:11:41.026115 SPD: device width 16 bits, bus width 16 bits
362 12:11:41.032575 SPD: module size is 2048 MB (per channel)
363 12:11:41.462128 CBMEM:
364 12:11:41.465021 IMD: root @ 0x76fff000 254 entries.
365 12:11:41.468434 IMD: root @ 0x76ffec00 62 entries.
366 12:11:41.472040 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 12:11:41.478700 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 12:11:41.481555 External stage cache:
369 12:11:41.484899 IMD: root @ 0x7b3ff000 254 entries.
370 12:11:41.488350 IMD: root @ 0x7b3fec00 62 entries.
371 12:11:41.503150 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 12:11:41.509690 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 12:11:41.516602 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 12:11:41.529871 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 12:11:41.534022 cse_lite: Skip switching to RW in the recovery path
376 12:11:41.536563
377 12:11:41.536660 8 DIMMs found
378 12:11:41.536742 SMM Memory Map
379 12:11:41.540086 SMRAM : 0x7b000000 0x800000
380 12:11:41.543236
381 12:11:41.546374 Subregion 0: 0x7b000000 0x200000
382 12:11:41.549920 Subregion 1: 0x7b200000 0x200000
383 12:11:41.553112 Subregion 2: 0x7b400000 0x400000
384 12:11:41.553210 top_of_ram = 0x77000000
385 12:11:41.559855 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
386 12:11:41.566336 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
387 12:11:41.570046 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
388 12:11:41.576458 MTRR Range: Start=ff000000 End=0 (Size 1000000)
389 12:11:41.583156 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
390 12:11:41.589600 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
391 12:11:41.599964 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
392 12:11:41.603001 Processing 211 relocs. Offset value of 0x74c0b000
393 12:11:41.606126
394 12:11:41.613000 BS: romstage times (exec / console): total (unknown) / 277 ms
395 12:11:41.618841
396 12:11:41.618938
397 12:11:41.629234 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
398 12:11:41.632442 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
399 12:11:41.639110 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
400 12:11:41.649145 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
401 12:11:41.655809 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
402 12:11:41.662268 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
403 12:11:41.705273 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
404 12:11:41.712042 Processing 5008 relocs. Offset value of 0x75d98000
405 12:11:41.715470 BS: postcar times (exec / console): total (unknown) / 59 ms
406 12:11:41.718964
407 12:11:41.719062
408 12:11:41.728387 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
409 12:11:41.728487 Normal boot
410 12:11:41.731798 FW_CONFIG value is 0x804c02
411 12:11:41.735187 PCI: 00:07.0 disabled by fw_config
412 12:11:41.738536 PCI: 00:07.1 disabled by fw_config
413 12:11:41.742109 PCI: 00:0d.2 disabled by fw_config
414 12:11:41.745370 PCI: 00:1c.7 disabled by fw_config
415 12:11:41.748632
416 12:11:41.751850 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
417 12:11:41.758480 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
418 12:11:41.762096 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
419 12:11:41.765275 GENERIC: 0.0 disabled by fw_config
420 12:11:41.768457
421 12:11:41.772160 GENERIC: 1.0 disabled by fw_config
422 12:11:41.774931 fw_config match found: DB_USB=USB3_ACTIVE
423 12:11:41.778248 fw_config match found: DB_USB=USB3_ACTIVE
424 12:11:41.781768 fw_config match found: DB_USB=USB3_ACTIVE
425 12:11:41.788495 fw_config match found: DB_USB=USB3_ACTIVE
426 12:11:41.791556 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
427 12:11:41.798100 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
428 12:11:41.808310 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
429 12:11:41.814948 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
430 12:11:41.818049 microcode: sig=0x806c1 pf=0x80 revision=0x86
431 12:11:41.824927 microcode: Update skipped, already up-to-date
432 12:11:41.831190 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
433 12:11:41.859256 Detected 4 core, 8 thread CPU.
434 12:11:41.862731 Setting up SMI for CPU
435 12:11:41.865842 IED base = 0x7b400000
436 12:11:41.865951 IED size = 0x00400000
437 12:11:41.868868 Will perform SMM setup.
438 12:11:41.875688 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
439 12:11:41.882217 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
440 12:11:41.888723 Processing 16 relocs. Offset value of 0x00030000
441 12:11:41.892505 Attempting to start 7 APs
442 12:11:41.895688 Waiting for 10ms after sending INIT.
443 12:11:41.910964 Waiting for 1st SIPI to complete...AP: slot 6 apic_id 1.
444 12:11:41.914245 AP: slot 7 apic_id 4.
445 12:11:41.917252 AP: slot 2 apic_id 5.
446 12:11:41.917350 AP: slot 3 apic_id 7.
447 12:11:41.920683 AP: slot 4 apic_id 6.
448 12:11:41.920780 done.
449 12:11:41.924276 AP: slot 5 apic_id 2.
450 12:11:41.924373 AP: slot 1 apic_id 3.
451 12:11:41.930661 Waiting for 2nd SIPI to complete...done.
452 12:11:41.937411 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
453 12:11:41.944069 Processing 13 relocs. Offset value of 0x00038000
454 12:11:41.944167 Unable to locate Global NVS
455 12:11:41.947339
456 12:11:41.954005 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
457 12:11:41.957283 Installing permanent SMM handler to 0x7b000000
458 12:11:41.967214 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
459 12:11:41.970445 Processing 794 relocs. Offset value of 0x7b010000
460 12:11:41.980547 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
461 12:11:41.984244 Processing 13 relocs. Offset value of 0x7b008000
462 12:11:41.990498 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
463 12:11:41.997236 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
464 12:11:42.000777 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
465 12:11:42.006999 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
466 12:11:42.013923 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
467 12:11:42.020356 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
468 12:11:42.027098 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
469 12:11:42.027196 Unable to locate Global NVS
470 12:11:42.036760 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
471 12:11:42.040260 Clearing SMI status registers
472 12:11:42.040357 SMI_STS: PM1
473 12:11:42.043513 PM1_STS: PWRBTN
474 12:11:42.050403 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
475 12:11:42.053777 In relocation handler: CPU 0
476 12:11:42.057297 New SMBASE=0x7b000000 IEDBASE=0x7b400000
477 12:11:42.063200 Writing SMRR. base = 0x7b000006, mask=0xff800c00
478 12:11:42.063297 Relocation complete.
479 12:11:42.073275 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
480 12:11:42.073373 In relocation handler: CPU 6
481 12:11:42.079589 New SMBASE=0x7affe800 IEDBASE=0x7b400000
482 12:11:42.079687 Relocation complete.
483 12:11:42.089858 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
484 12:11:42.089966 In relocation handler: CPU 1
485 12:11:42.096611 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
486 12:11:42.096709 Relocation complete.
487 12:11:42.103057 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
488 12:11:42.106707
489 12:11:42.106804 In relocation handler: CPU 5
490 12:11:42.112853 New SMBASE=0x7affec00 IEDBASE=0x7b400000
491 12:11:42.116310 Writing SMRR. base = 0x7b000006, mask=0xff800c00
492 12:11:42.119457 Relocation complete.
493 12:11:42.126345 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
494 12:11:42.129615 In relocation handler: CPU 7
495 12:11:42.132963 New SMBASE=0x7affe400 IEDBASE=0x7b400000
496 12:11:42.139721 Writing SMRR. base = 0x7b000006, mask=0xff800c00
497 12:11:42.139819 Relocation complete.
498 12:11:42.146070 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
499 12:11:42.149644 In relocation handler: CPU 2
500 12:11:42.152639 New SMBASE=0x7afff800 IEDBASE=0x7b400000
501 12:11:42.156272
502 12:11:42.156369 Relocation complete.
503 12:11:42.162777 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
504 12:11:42.166322 In relocation handler: CPU 3
505 12:11:42.169329 New SMBASE=0x7afff400 IEDBASE=0x7b400000
506 12:11:42.172589 Relocation complete.
507 12:11:42.179716 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
508 12:11:42.182724 In relocation handler: CPU 4
509 12:11:42.185902 New SMBASE=0x7afff000 IEDBASE=0x7b400000
510 12:11:42.192608 Writing SMRR. base = 0x7b000006, mask=0xff800c00
511 12:11:42.195723 Relocation complete.
512 12:11:42.195821 Initializing CPU #0
513 12:11:42.199345 CPU: vendor Intel device 806c1
514 12:11:42.202692 CPU: family 06, model 8c, stepping 01
515 12:11:42.205634 Clearing out pending MCEs
516 12:11:42.209679 Setting up local APIC...
517 12:11:42.212602 apic_id: 0x00 done.
518 12:11:42.215760 Turbo is available but hidden
519 12:11:42.215857 Turbo is available and visible
520 12:11:42.222340 microcode: Update skipped, already up-to-date
521 12:11:42.225920 CPU #0 initialized
522 12:11:42.226017 Initializing CPU #1
523 12:11:42.229390 Initializing CPU #5
524 12:11:42.232701 CPU: vendor Intel device 806c1
525 12:11:42.235990 CPU: family 06, model 8c, stepping 01
526 12:11:42.239421 CPU: vendor Intel device 806c1
527 12:11:42.242794 CPU: family 06, model 8c, stepping 01
528 12:11:42.245869 Clearing out pending MCEs
529 12:11:42.245977 Initializing CPU #2
530 12:11:42.249027 Initializing CPU #7
531 12:11:42.252851 Setting up local APIC...
532 12:11:42.255609 CPU: vendor Intel device 806c1
533 12:11:42.258709 CPU: family 06, model 8c, stepping 01
534 12:11:42.262760 Clearing out pending MCEs
535 12:11:42.262857 Initializing CPU #4
536 12:11:42.265803 Initializing CPU #3
537 12:11:42.268895 CPU: vendor Intel device 806c1
538 12:11:42.272485 CPU: family 06, model 8c, stepping 01
539 12:11:42.275406 CPU: vendor Intel device 806c1
540 12:11:42.278772 CPU: family 06, model 8c, stepping 01
541 12:11:42.282943 Clearing out pending MCEs
542 12:11:42.286548 Clearing out pending MCEs
543 12:11:42.286645 Setting up local APIC...
544 12:11:42.289836 apic_id: 0x03 done.
545 12:11:42.289942 Setting up local APIC...
546 12:11:42.293070
547 12:11:42.296521 microcode: Update skipped, already up-to-date
548 12:11:42.299744 apic_id: 0x02 done.
549 12:11:42.299848 CPU #1 initialized
550 12:11:42.303250 microcode: Update skipped, already up-to-date
551 12:11:42.306148
552 12:11:42.306245 Setting up local APIC...
553 12:11:42.309798 CPU #5 initialized
554 12:11:42.312846 CPU: vendor Intel device 806c1
555 12:11:42.315968 CPU: family 06, model 8c, stepping 01
556 12:11:42.319517 Clearing out pending MCEs
557 12:11:42.322954 Clearing out pending MCEs
558 12:11:42.323049 Setting up local APIC...
559 12:11:42.326098 apic_id: 0x07 done.
560 12:11:42.329600 apic_id: 0x06 done.
561 12:11:42.332678 microcode: Update skipped, already up-to-date
562 12:11:42.335989 microcode: Update skipped, already up-to-date
563 12:11:42.339677 Setting up local APIC...
564 12:11:42.342889 CPU #4 initialized
565 12:11:42.342984 apic_id: 0x04 done.
566 12:11:42.345871 apic_id: 0x05 done.
567 12:11:42.349129 microcode: Update skipped, already up-to-date
568 12:11:42.355920 microcode: Update skipped, already up-to-date
569 12:11:42.356016 CPU #7 initialized
570 12:11:42.359561 CPU #2 initialized
571 12:11:42.362677 Initializing CPU #6
572 12:11:42.362775 CPU #3 initialized
573 12:11:42.366391 CPU: vendor Intel device 806c1
574 12:11:42.369588 CPU: family 06, model 8c, stepping 01
575 12:11:42.372652 Clearing out pending MCEs
576 12:11:42.375797 Setting up local APIC...
577 12:11:42.379451 apic_id: 0x01 done.
578 12:11:42.382373 microcode: Update skipped, already up-to-date
579 12:11:42.385956 CPU #6 initialized
580 12:11:42.389176 bsp_do_flight_plan done after 454 msecs.
581 12:11:42.392311 CPU: frequency set to 4400 MHz
582 12:11:42.392407 Enabling SMIs.
583 12:11:42.399112 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
584 12:11:42.415842 SATAXPCIE1 indicates PCIe NVMe is present
585 12:11:42.418862 Probing TPM: done!
586 12:11:42.422201 Connected to device vid:did:rid of 1ae0:0028:00
587 12:11:42.432885 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
588 12:11:42.436584 Initialized TPM device CR50 revision 0
589 12:11:42.439824 Enabling S0i3.4
590 12:11:42.446311 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
591 12:11:42.449627 Found a VBT of 8704 bytes after decompression
592 12:11:42.456159 cse_lite: CSE RO boot. HybridStorageMode disabled
593 12:11:42.462879 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
594 12:11:42.537805 FSPS returned 0
595 12:11:42.541329 Executing Phase 1 of FspMultiPhaseSiInit
596 12:11:42.551357 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
597 12:11:42.554725 port C0 DISC req: usage 1 usb3 1 usb2 5
598 12:11:42.557977 Raw Buffer output 0 00000511
599 12:11:42.560962 Raw Buffer output 1 00000000
600 12:11:42.565185 pmc_send_ipc_cmd succeeded
601 12:11:42.568311 port C1 DISC req: usage 1 usb3 2 usb2 3
602 12:11:42.571510
603 12:11:42.571606 Raw Buffer output 0 00000321
604 12:11:42.574694 Raw Buffer output 1 00000000
605 12:11:42.579097 pmc_send_ipc_cmd succeeded
606 12:11:42.583871 Detected 4 core, 8 thread CPU.
607 12:11:42.587775 Detected 4 core, 8 thread CPU.
608 12:11:42.788336 Display FSP Version Info HOB
609 12:11:42.791038 Reference Code - CPU = a.0.4c.31
610 12:11:42.794131 uCode Version = 0.0.0.86
611 12:11:42.797823 TXT ACM version = ff.ff.ff.ffff
612 12:11:42.800830 Reference Code - ME = a.0.4c.31
613 12:11:42.804488 MEBx version = 0.0.0.0
614 12:11:42.807737 ME Firmware Version = Consumer SKU
615 12:11:42.810906 Reference Code - PCH = a.0.4c.31
616 12:11:42.814197 PCH-CRID Status = Disabled
617 12:11:42.817847 PCH-CRID Original Value = ff.ff.ff.ffff
618 12:11:42.821440 PCH-CRID New Value = ff.ff.ff.ffff
619 12:11:42.824096 OPROM - RST - RAID = ff.ff.ff.ffff
620 12:11:42.827710 PCH Hsio Version = 4.0.0.0
621 12:11:42.831093 Reference Code - SA - System Agent = a.0.4c.31
622 12:11:42.834150 Reference Code - MRC = 2.0.0.1
623 12:11:42.837647 SA - PCIe Version = a.0.4c.31
624 12:11:42.840956 SA-CRID Status = Disabled
625 12:11:42.844210 SA-CRID Original Value = 0.0.0.1
626 12:11:42.847360 SA-CRID New Value = 0.0.0.1
627 12:11:42.851078 OPROM - VBIOS = ff.ff.ff.ffff
628 12:11:42.854511 IO Manageability Engine FW Version = 11.1.4.0
629 12:11:42.857319 PHY Build Version = 0.0.0.e0
630 12:11:42.860714 Thunderbolt(TM) FW Version = 0.0.0.0
631 12:11:42.868503 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
632 12:11:42.868602 ITSS IRQ Polarities Before:
633 12:11:42.871842 IPC0: 0xffffffff
634 12:11:42.871939 IPC1: 0xffffffff
635 12:11:42.875139 IPC2: 0xffffffff
636 12:11:42.878645 IPC3: 0xffffffff
637 12:11:42.878741 ITSS IRQ Polarities After:
638 12:11:42.881514 IPC0: 0xffffffff
639 12:11:42.881610 IPC1: 0xffffffff
640 12:11:42.885006 IPC2: 0xffffffff
641 12:11:42.885122 IPC3: 0xffffffff
642 12:11:42.888235
643 12:11:42.891478 Found PCIe Root Port #9 at PCI: 00:1d.0.
644 12:11:42.901609 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
645 12:11:42.915291 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
646 12:11:42.928006 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
647 12:11:42.934766 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
648 12:11:42.934865 Enumerating buses...
649 12:11:42.941164 Show all devs... Before device enumeration.
650 12:11:42.941262 Root Device: enabled 1
651 12:11:42.944508 DOMAIN: 0000: enabled 1
652 12:11:42.947769 CPU_CLUSTER: 0: enabled 1
653 12:11:42.947867 PCI: 00:00.0: enabled 1
654 12:11:42.951190
655 12:11:42.951288 PCI: 00:02.0: enabled 1
656 12:11:42.954708 PCI: 00:04.0: enabled 1
657 12:11:42.957972 PCI: 00:05.0: enabled 1
658 12:11:42.958069 PCI: 00:06.0: enabled 0
659 12:11:42.960995 PCI: 00:07.0: enabled 0
660 12:11:42.964931 PCI: 00:07.1: enabled 0
661 12:11:42.967887 PCI: 00:07.2: enabled 0
662 12:11:42.967985 PCI: 00:07.3: enabled 0
663 12:11:42.971200 PCI: 00:08.0: enabled 1
664 12:11:42.974587 PCI: 00:09.0: enabled 0
665 12:11:42.977697 PCI: 00:0a.0: enabled 0
666 12:11:42.977794 PCI: 00:0d.0: enabled 1
667 12:11:42.981084 PCI: 00:0d.1: enabled 0
668 12:11:42.984625 PCI: 00:0d.2: enabled 0
669 12:11:42.987804 PCI: 00:0d.3: enabled 0
670 12:11:42.987901 PCI: 00:0e.0: enabled 0
671 12:11:42.991096 PCI: 00:10.2: enabled 1
672 12:11:42.994693 PCI: 00:10.6: enabled 0
673 12:11:42.994793 PCI: 00:10.7: enabled 0
674 12:11:42.997708 PCI: 00:12.0: enabled 0
675 12:11:43.001075 PCI: 00:12.6: enabled 0
676 12:11:43.004787 PCI: 00:13.0: enabled 0
677 12:11:43.004884 PCI: 00:14.0: enabled 1
678 12:11:43.007829 PCI: 00:14.1: enabled 0
679 12:11:43.011188 PCI: 00:14.2: enabled 1
680 12:11:43.014344 PCI: 00:14.3: enabled 1
681 12:11:43.014440 PCI: 00:15.0: enabled 1
682 12:11:43.017600 PCI: 00:15.1: enabled 1
683 12:11:43.021237 PCI: 00:15.2: enabled 1
684 12:11:43.024341 PCI: 00:15.3: enabled 1
685 12:11:43.024438 PCI: 00:16.0: enabled 1
686 12:11:43.027683 PCI: 00:16.1: enabled 0
687 12:11:43.031188 PCI: 00:16.2: enabled 0
688 12:11:43.031287 PCI: 00:16.3: enabled 0
689 12:11:43.034200
690 12:11:43.034290 PCI: 00:16.4: enabled 0
691 12:11:43.037680 PCI: 00:16.5: enabled 0
692 12:11:43.040978 PCI: 00:17.0: enabled 1
693 12:11:43.041071 PCI: 00:19.0: enabled 0
694 12:11:43.043942 PCI: 00:19.1: enabled 1
695 12:11:43.047587 PCI: 00:19.2: enabled 0
696 12:11:43.050802 PCI: 00:1c.0: enabled 1
697 12:11:43.050898 PCI: 00:1c.1: enabled 0
698 12:11:43.054114 PCI: 00:1c.2: enabled 0
699 12:11:43.057399 PCI: 00:1c.3: enabled 0
700 12:11:43.061131 PCI: 00:1c.4: enabled 0
701 12:11:43.061218 PCI: 00:1c.5: enabled 0
702 12:11:43.063963 PCI: 00:1c.6: enabled 1
703 12:11:43.067289 PCI: 00:1c.7: enabled 0
704 12:11:43.071357 PCI: 00:1d.0: enabled 1
705 12:11:43.071446 PCI: 00:1d.1: enabled 0
706 12:11:43.074145 PCI: 00:1d.2: enabled 1
707 12:11:43.077889 PCI: 00:1d.3: enabled 0
708 12:11:43.077987 PCI: 00:1e.0: enabled 1
709 12:11:43.081053 PCI: 00:1e.1: enabled 0
710 12:11:43.084175 PCI: 00:1e.2: enabled 1
711 12:11:43.087462 PCI: 00:1e.3: enabled 1
712 12:11:43.087555 PCI: 00:1f.0: enabled 1
713 12:11:43.090900 PCI: 00:1f.1: enabled 0
714 12:11:43.093988 PCI: 00:1f.2: enabled 1
715 12:11:43.097159 PCI: 00:1f.3: enabled 1
716 12:11:43.097254 PCI: 00:1f.4: enabled 0
717 12:11:43.100939 PCI: 00:1f.5: enabled 1
718 12:11:43.103821 PCI: 00:1f.6: enabled 0
719 12:11:43.107156 PCI: 00:1f.7: enabled 0
720 12:11:43.107240 APIC: 00: enabled 1
721 12:11:43.110487 GENERIC: 0.0: enabled 1
722 12:11:43.114292 GENERIC: 0.0: enabled 1
723 12:11:43.114380 GENERIC: 1.0: enabled 1
724 12:11:43.117654 GENERIC: 0.0: enabled 1
725 12:11:43.120858 GENERIC: 1.0: enabled 1
726 12:11:43.124062 USB0 port 0: enabled 1
727 12:11:43.124158 GENERIC: 0.0: enabled 1
728 12:11:43.127562 USB0 port 0: enabled 1
729 12:11:43.130765 GENERIC: 0.0: enabled 1
730 12:11:43.130850 I2C: 00:1a: enabled 1
731 12:11:43.133650 I2C: 00:31: enabled 1
732 12:11:43.137205 I2C: 00:32: enabled 1
733 12:11:43.137290 I2C: 00:10: enabled 1
734 12:11:43.140400 I2C: 00:15: enabled 1
735 12:11:43.143766 GENERIC: 0.0: enabled 0
736 12:11:43.147236 GENERIC: 1.0: enabled 0
737 12:11:43.147325 GENERIC: 0.0: enabled 1
738 12:11:43.150400 SPI: 00: enabled 1
739 12:11:43.150484 SPI: 00: enabled 1
740 12:11:43.153702
741 12:11:43.153787 PNP: 0c09.0: enabled 1
742 12:11:43.157240 GENERIC: 0.0: enabled 1
743 12:11:43.160560 USB3 port 0: enabled 1
744 12:11:43.160644 USB3 port 1: enabled 1
745 12:11:43.163839 USB3 port 2: enabled 0
746 12:11:43.166920 USB3 port 3: enabled 0
747 12:11:43.167005 USB2 port 0: enabled 0
748 12:11:43.170301 USB2 port 1: enabled 1
749 12:11:43.173577 USB2 port 2: enabled 1
750 12:11:43.176881 USB2 port 3: enabled 0
751 12:11:43.176973 USB2 port 4: enabled 1
752 12:11:43.180411 USB2 port 5: enabled 0
753 12:11:43.183739 USB2 port 6: enabled 0
754 12:11:43.183821 USB2 port 7: enabled 0
755 12:11:43.186888 USB2 port 8: enabled 0
756 12:11:43.190352 USB2 port 9: enabled 0
757 12:11:43.193507 USB3 port 0: enabled 0
758 12:11:43.193594 USB3 port 1: enabled 1
759 12:11:43.197016 USB3 port 2: enabled 0
760 12:11:43.200334 USB3 port 3: enabled 0
761 12:11:43.200420 GENERIC: 0.0: enabled 1
762 12:11:43.203789 GENERIC: 1.0: enabled 1
763 12:11:43.206904 APIC: 03: enabled 1
764 12:11:43.206999 APIC: 05: enabled 1
765 12:11:43.210549 APIC: 07: enabled 1
766 12:11:43.213876 APIC: 06: enabled 1
767 12:11:43.213979 APIC: 02: enabled 1
768 12:11:43.216989 APIC: 01: enabled 1
769 12:11:43.217084 APIC: 04: enabled 1
770 12:11:43.220101 Compare with tree...
771 12:11:43.223507 Root Device: enabled 1
772 12:11:43.226653 DOMAIN: 0000: enabled 1
773 12:11:43.226748 PCI: 00:00.0: enabled 1
774 12:11:43.230216 PCI: 00:02.0: enabled 1
775 12:11:43.233377 PCI: 00:04.0: enabled 1
776 12:11:43.236894 GENERIC: 0.0: enabled 1
777 12:11:43.240380 PCI: 00:05.0: enabled 1
778 12:11:43.240477 PCI: 00:06.0: enabled 0
779 12:11:43.243619 PCI: 00:07.0: enabled 0
780 12:11:43.246785 GENERIC: 0.0: enabled 1
781 12:11:43.250425 PCI: 00:07.1: enabled 0
782 12:11:43.253753 GENERIC: 1.0: enabled 1
783 12:11:43.253849 PCI: 00:07.2: enabled 0
784 12:11:43.256747 GENERIC: 0.0: enabled 1
785 12:11:43.259966 PCI: 00:07.3: enabled 0
786 12:11:43.263547 GENERIC: 1.0: enabled 1
787 12:11:43.266676 PCI: 00:08.0: enabled 1
788 12:11:43.266772 PCI: 00:09.0: enabled 0
789 12:11:43.270089 PCI: 00:0a.0: enabled 0
790 12:11:43.273450 PCI: 00:0d.0: enabled 1
791 12:11:43.276588 USB0 port 0: enabled 1
792 12:11:43.280340 USB3 port 0: enabled 1
793 12:11:43.280437 USB3 port 1: enabled 1
794 12:11:43.283587 USB3 port 2: enabled 0
795 12:11:43.286625 USB3 port 3: enabled 0
796 12:11:43.290079 PCI: 00:0d.1: enabled 0
797 12:11:43.293567 PCI: 00:0d.2: enabled 0
798 12:11:43.293665 GENERIC: 0.0: enabled 1
799 12:11:43.296753
800 12:11:43.296850 PCI: 00:0d.3: enabled 0
801 12:11:43.299866 PCI: 00:0e.0: enabled 0
802 12:11:43.303460 PCI: 00:10.2: enabled 1
803 12:11:43.306505 PCI: 00:10.6: enabled 0
804 12:11:43.306601 PCI: 00:10.7: enabled 0
805 12:11:43.309781 PCI: 00:12.0: enabled 0
806 12:11:43.313012 PCI: 00:12.6: enabled 0
807 12:11:43.316411 PCI: 00:13.0: enabled 0
808 12:11:43.319587 PCI: 00:14.0: enabled 1
809 12:11:43.319685 USB0 port 0: enabled 1
810 12:11:43.323162 USB2 port 0: enabled 0
811 12:11:43.326199 USB2 port 1: enabled 1
812 12:11:43.329590 USB2 port 2: enabled 1
813 12:11:43.333300 USB2 port 3: enabled 0
814 12:11:43.336578 USB2 port 4: enabled 1
815 12:11:43.336675 USB2 port 5: enabled 0
816 12:11:43.339923 USB2 port 6: enabled 0
817 12:11:43.343545 USB2 port 7: enabled 0
818 12:11:43.346643 USB2 port 8: enabled 0
819 12:11:43.350033 USB2 port 9: enabled 0
820 12:11:43.350131 USB3 port 0: enabled 0
821 12:11:43.353362
822 12:11:43.353458 USB3 port 1: enabled 1
823 12:11:43.356163 USB3 port 2: enabled 0
824 12:11:43.359417 USB3 port 3: enabled 0
825 12:11:43.363443 PCI: 00:14.1: enabled 0
826 12:11:43.366352 PCI: 00:14.2: enabled 1
827 12:11:43.366448 PCI: 00:14.3: enabled 1
828 12:11:43.369993 GENERIC: 0.0: enabled 1
829 12:11:43.372774 PCI: 00:15.0: enabled 1
830 12:11:43.376613 I2C: 00:1a: enabled 1
831 12:11:43.376711 I2C: 00:31: enabled 1
832 12:11:43.379685
833 12:11:43.379783 I2C: 00:32: enabled 1
834 12:11:43.382851 PCI: 00:15.1: enabled 1
835 12:11:43.386469 I2C: 00:10: enabled 1
836 12:11:43.389607 PCI: 00:15.2: enabled 1
837 12:11:43.389704 PCI: 00:15.3: enabled 1
838 12:11:43.393576 PCI: 00:16.0: enabled 1
839 12:11:43.396377 PCI: 00:16.1: enabled 0
840 12:11:43.399691 PCI: 00:16.2: enabled 0
841 12:11:43.402900 PCI: 00:16.3: enabled 0
842 12:11:43.402997 PCI: 00:16.4: enabled 0
843 12:11:43.406296 PCI: 00:16.5: enabled 0
844 12:11:43.409570 PCI: 00:17.0: enabled 1
845 12:11:43.412649 PCI: 00:19.0: enabled 0
846 12:11:43.416419 PCI: 00:19.1: enabled 1
847 12:11:43.416516 I2C: 00:15: enabled 1
848 12:11:43.419386 PCI: 00:19.2: enabled 0
849 12:11:43.422729 PCI: 00:1d.0: enabled 1
850 12:11:43.426175 GENERIC: 0.0: enabled 1
851 12:11:43.429571 PCI: 00:1e.0: enabled 1
852 12:11:43.429669 PCI: 00:1e.1: enabled 0
853 12:11:43.432530 PCI: 00:1e.2: enabled 1
854 12:11:43.436301 SPI: 00: enabled 1
855 12:11:43.439725 PCI: 00:1e.3: enabled 1
856 12:11:43.439821 SPI: 00: enabled 1
857 12:11:43.442831 PCI: 00:1f.0: enabled 1
858 12:11:43.446229 PNP: 0c09.0: enabled 1
859 12:11:43.449353 PCI: 00:1f.1: enabled 0
860 12:11:43.449450 PCI: 00:1f.2: enabled 1
861 12:11:43.452509 GENERIC: 0.0: enabled 1
862 12:11:43.456213 GENERIC: 0.0: enabled 1
863 12:11:43.459343 GENERIC: 1.0: enabled 1
864 12:11:43.462679 PCI: 00:1f.3: enabled 1
865 12:11:43.466008 PCI: 00:1f.4: enabled 0
866 12:11:43.466106 PCI: 00:1f.5: enabled 1
867 12:11:43.469165 PCI: 00:1f.6: enabled 0
868 12:11:43.472488 PCI: 00:1f.7: enabled 0
869 12:11:43.475895 CPU_CLUSTER: 0: enabled 1
870 12:11:43.475992 APIC: 00: enabled 1
871 12:11:43.479370 APIC: 03: enabled 1
872 12:11:43.482725 APIC: 05: enabled 1
873 12:11:43.482823 APIC: 07: enabled 1
874 12:11:43.486335 APIC: 06: enabled 1
875 12:11:43.537541 APIC: 02: enabled 1
876 12:11:43.537665 APIC: 01: enabled 1
877 12:11:43.537747 APIC: 04: enabled 1
878 12:11:43.538023 Root Device scanning...
879 12:11:43.538126 scan_static_bus for Root Device
880 12:11:43.538202 DOMAIN: 0000 enabled
881 12:11:43.538271 CPU_CLUSTER: 0 enabled
882 12:11:43.538339 DOMAIN: 0000 scanning...
883 12:11:43.538405 PCI: pci_scan_bus for bus 00
884 12:11:43.538470 PCI: 00:00.0 [8086/0000] ops
885 12:11:43.538725 PCI: 00:00.0 [8086/9a12] enabled
886 12:11:43.538798 PCI: 00:02.0 [8086/0000] bus ops
887 12:11:43.538863 PCI: 00:02.0 [8086/9a40] enabled
888 12:11:43.538927 PCI: 00:04.0 [8086/0000] bus ops
889 12:11:43.539185 PCI: 00:04.0 [8086/9a03] enabled
890 12:11:43.539468 PCI: 00:05.0 [8086/9a19] enabled
891 12:11:43.539544 PCI: 00:07.0 [0000/0000] hidden
892 12:11:43.587933 PCI: 00:08.0 [8086/9a11] enabled
893 12:11:43.588032 PCI: 00:0a.0 [8086/9a0d] disabled
894 12:11:43.588306 PCI: 00:0d.0 [8086/0000] bus ops
895 12:11:43.588389 PCI: 00:0d.0 [8086/9a13] enabled
896 12:11:43.588460 PCI: 00:14.0 [8086/0000] bus ops
897 12:11:43.588529 PCI: 00:14.0 [8086/a0ed] enabled
898 12:11:43.588794 PCI: 00:14.2 [8086/a0ef] enabled
899 12:11:43.588872 PCI: 00:14.3 [8086/0000] bus ops
900 12:11:43.588943 PCI: 00:14.3 [8086/a0f0] enabled
901 12:11:43.589012 PCI: 00:15.0 [8086/0000] bus ops
902 12:11:43.589077 PCI: 00:15.0 [8086/a0e8] enabled
903 12:11:43.589140 PCI: 00:15.1 [8086/0000] bus ops
904 12:11:43.589391 PCI: 00:15.1 [8086/a0e9] enabled
905 12:11:43.589492 PCI: 00:15.2 [8086/0000] bus ops
906 12:11:43.589572 PCI: 00:15.2 [8086/a0ea] enabled
907 12:11:43.637892 PCI: 00:15.3 [8086/0000] bus ops
908 12:11:43.638001 PCI: 00:15.3 [8086/a0eb] enabled
909 12:11:43.638479 PCI: 00:16.0 [8086/0000] ops
910 12:11:43.638580 PCI: 00:16.0 [8086/a0e0] enabled
911 12:11:43.638856 PCI: Static device PCI: 00:17.0 not found, disabling it.
912 12:11:43.638937 PCI: 00:19.0 [8086/0000] bus ops
913 12:11:43.639009 PCI: 00:19.0 [8086/a0c5] disabled
914 12:11:43.639077 PCI: 00:19.1 [8086/0000] bus ops
915 12:11:43.639144 PCI: 00:19.1 [8086/a0c6] enabled
916 12:11:43.639209 PCI: 00:1d.0 [8086/0000] bus ops
917 12:11:43.639273 PCI: 00:1d.0 [8086/a0b0] enabled
918 12:11:43.639526 PCI: 00:1e.0 [8086/0000] ops
919 12:11:43.639601 PCI: 00:1e.0 [8086/a0a8] enabled
920 12:11:43.639907 PCI: 00:1e.2 [8086/0000] bus ops
921 12:11:43.639986 PCI: 00:1e.2 [8086/a0aa] enabled
922 12:11:43.652070 PCI: 00:1e.3 [8086/0000] bus ops
923 12:11:43.652171 PCI: 00:1e.3 [8086/a0ab] enabled
924 12:11:43.652443 PCI: 00:1f.0 [8086/0000] bus ops
925 12:11:43.652525 PCI: 00:1f.0 [8086/a087] enabled
926 12:11:43.657822 RTC Init
927 12:11:43.657926 Set power on after power failure.
928 12:11:43.658004 Disabling Deep S3
929 12:11:43.661309 Disabling Deep S3
930 12:11:43.661406 Disabling Deep S4
931 12:11:43.664504 Disabling Deep S4
932 12:11:43.664601 Disabling Deep S5
933 12:11:43.667860 Disabling Deep S5
934 12:11:43.671065 PCI: 00:1f.2 [0000/0000] hidden
935 12:11:43.674359 PCI: 00:1f.3 [8086/0000] bus ops
936 12:11:43.677704 PCI: 00:1f.3 [8086/a0c8] enabled
937 12:11:43.680954 PCI: 00:1f.5 [8086/0000] bus ops
938 12:11:43.684639 PCI: 00:1f.5 [8086/a0a4] enabled
939 12:11:43.688166 PCI: Leftover static devices:
940 12:11:43.688264 PCI: 00:10.2
941 12:11:43.691067 PCI: 00:10.6
942 12:11:43.691165 PCI: 00:10.7
943 12:11:43.694416 PCI: 00:06.0
944 12:11:43.694514 PCI: 00:07.1
945 12:11:43.694590 PCI: 00:07.2
946 12:11:43.697596 PCI: 00:07.3
947 12:11:43.697693 PCI: 00:09.0
948 12:11:43.701486 PCI: 00:0d.1
949 12:11:43.701583 PCI: 00:0d.2
950 12:11:43.701660 PCI: 00:0d.3
951 12:11:43.704573 PCI: 00:0e.0
952 12:11:43.704670 PCI: 00:12.0
953 12:11:43.707743 PCI: 00:12.6
954 12:11:43.707840 PCI: 00:13.0
955 12:11:43.707916 PCI: 00:14.1
956 12:11:43.710944 PCI: 00:16.1
957 12:11:43.711042 PCI: 00:16.2
958 12:11:43.714601 PCI: 00:16.3
959 12:11:43.714698 PCI: 00:16.4
960 12:11:43.717803 PCI: 00:16.5
961 12:11:43.717906 PCI: 00:17.0
962 12:11:43.717982 PCI: 00:19.2
963 12:11:43.720984 PCI: 00:1e.1
964 12:11:43.721081 PCI: 00:1f.1
965 12:11:43.724314 PCI: 00:1f.4
966 12:11:43.724412 PCI: 00:1f.6
967 12:11:43.724488 PCI: 00:1f.7
968 12:11:43.727541 PCI: Check your devicetree.cb.
969 12:11:43.730867 PCI: 00:02.0 scanning...
970 12:11:43.734058 scan_generic_bus for PCI: 00:02.0
971 12:11:43.737303 scan_generic_bus for PCI: 00:02.0 done
972 12:11:43.743989 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
973 12:11:43.747168 PCI: 00:04.0 scanning...
974 12:11:43.751041 scan_generic_bus for PCI: 00:04.0
975 12:11:43.751138 GENERIC: 0.0 enabled
976 12:11:43.757293 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
977 12:11:43.763966 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
978 12:11:43.764064 PCI: 00:0d.0 scanning...
979 12:11:43.767430 scan_static_bus for PCI: 00:0d.0
980 12:11:43.770655 USB0 port 0 enabled
981 12:11:43.773745 USB0 port 0 scanning...
982 12:11:43.777326 scan_static_bus for USB0 port 0
983 12:11:43.777424 USB3 port 0 enabled
984 12:11:43.780405
985 12:11:43.780504 USB3 port 1 enabled
986 12:11:43.783849 USB3 port 2 disabled
987 12:11:43.783946 USB3 port 3 disabled
988 12:11:43.787482 USB3 port 0 scanning...
989 12:11:43.790452 scan_static_bus for USB3 port 0
990 12:11:43.794111 scan_static_bus for USB3 port 0 done
991 12:11:43.800168 scan_bus: bus USB3 port 0 finished in 6 msecs
992 12:11:43.800266 USB3 port 1 scanning...
993 12:11:43.803719 scan_static_bus for USB3 port 1
994 12:11:43.810253 scan_static_bus for USB3 port 1 done
995 12:11:43.813663 scan_bus: bus USB3 port 1 finished in 6 msecs
996 12:11:43.817159 scan_static_bus for USB0 port 0 done
997 12:11:43.820510 scan_bus: bus USB0 port 0 finished in 43 msecs
998 12:11:43.823923
999 12:11:43.826721 scan_static_bus for PCI: 00:0d.0 done
1000 12:11:43.830658 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
1001 12:11:43.833716 PCI: 00:14.0 scanning...
1002 12:11:43.837096 scan_static_bus for PCI: 00:14.0
1003 12:11:43.840113 USB0 port 0 enabled
1004 12:11:43.840210 USB0 port 0 scanning...
1005 12:11:43.843642 scan_static_bus for USB0 port 0
1006 12:11:43.846965 USB2 port 0 disabled
1007 12:11:43.850227 USB2 port 1 enabled
1008 12:11:43.850324 USB2 port 2 enabled
1009 12:11:43.853774 USB2 port 3 disabled
1010 12:11:43.853871 USB2 port 4 enabled
1011 12:11:43.856637 USB2 port 5 disabled
1012 12:11:43.860272 USB2 port 6 disabled
1013 12:11:43.860370 USB2 port 7 disabled
1014 12:11:43.863547 USB2 port 8 disabled
1015 12:11:43.866793 USB2 port 9 disabled
1016 12:11:43.866890 USB3 port 0 disabled
1017 12:11:43.870133 USB3 port 1 enabled
1018 12:11:43.873378 USB3 port 2 disabled
1019 12:11:43.873475 USB3 port 3 disabled
1020 12:11:43.877030 USB2 port 1 scanning...
1021 12:11:43.879864 scan_static_bus for USB2 port 1
1022 12:11:43.883239 scan_static_bus for USB2 port 1 done
1023 12:11:43.890047 scan_bus: bus USB2 port 1 finished in 6 msecs
1024 12:11:43.890145 USB2 port 2 scanning...
1025 12:11:43.893370 scan_static_bus for USB2 port 2
1026 12:11:43.896726 scan_static_bus for USB2 port 2 done
1027 12:11:43.903400 scan_bus: bus USB2 port 2 finished in 6 msecs
1028 12:11:43.906779 USB2 port 4 scanning...
1029 12:11:43.909585 scan_static_bus for USB2 port 4
1030 12:11:43.912900 scan_static_bus for USB2 port 4 done
1031 12:11:43.916310 scan_bus: bus USB2 port 4 finished in 6 msecs
1032 12:11:43.919647 USB3 port 1 scanning...
1033 12:11:43.923233 scan_static_bus for USB3 port 1
1034 12:11:43.926610 scan_static_bus for USB3 port 1 done
1035 12:11:43.929660 scan_bus: bus USB3 port 1 finished in 6 msecs
1036 12:11:43.936453 scan_static_bus for USB0 port 0 done
1037 12:11:43.939465 scan_bus: bus USB0 port 0 finished in 93 msecs
1038 12:11:43.942761 scan_static_bus for PCI: 00:14.0 done
1039 12:11:43.949540 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1040 12:11:43.949638 PCI: 00:14.3 scanning...
1041 12:11:43.952992 scan_static_bus for PCI: 00:14.3
1042 12:11:43.956411 GENERIC: 0.0 enabled
1043 12:11:43.959724 scan_static_bus for PCI: 00:14.3 done
1044 12:11:43.966375 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1045 12:11:43.966471 PCI: 00:15.0 scanning...
1046 12:11:43.969613 scan_static_bus for PCI: 00:15.0
1047 12:11:43.972664 I2C: 00:1a enabled
1048 12:11:43.976141 I2C: 00:31 enabled
1049 12:11:43.976238 I2C: 00:32 enabled
1050 12:11:43.979166 scan_static_bus for PCI: 00:15.0 done
1051 12:11:43.985774 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1052 12:11:43.989475 PCI: 00:15.1 scanning...
1053 12:11:43.992760 scan_static_bus for PCI: 00:15.1
1054 12:11:43.992858 I2C: 00:10 enabled
1055 12:11:43.995916 scan_static_bus for PCI: 00:15.1 done
1056 12:11:44.002318 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1057 12:11:44.005505 PCI: 00:15.2 scanning...
1058 12:11:44.009212 scan_static_bus for PCI: 00:15.2
1059 12:11:44.012388 scan_static_bus for PCI: 00:15.2 done
1060 12:11:44.015637 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1061 12:11:44.019081 PCI: 00:15.3 scanning...
1062 12:11:44.022328 scan_static_bus for PCI: 00:15.3
1063 12:11:44.025534 scan_static_bus for PCI: 00:15.3 done
1064 12:11:44.032433 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1065 12:11:44.032552 PCI: 00:19.1 scanning...
1066 12:11:44.035789 scan_static_bus for PCI: 00:19.1
1067 12:11:44.039298 I2C: 00:15 enabled
1068 12:11:44.042316 scan_static_bus for PCI: 00:19.1 done
1069 12:11:44.048885 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1070 12:11:44.048985 PCI: 00:1d.0 scanning...
1071 12:11:44.055529 do_pci_scan_bridge for PCI: 00:1d.0
1072 12:11:44.055630 PCI: pci_scan_bus for bus 01
1073 12:11:44.058944 PCI: 01:00.0 [15b7/5009] enabled
1074 12:11:44.062063 GENERIC: 0.0 enabled
1075 12:11:44.065893 Enabling Common Clock Configuration
1076 12:11:44.069299 L1 Sub-State supported from root port 29
1077 12:11:44.071971
1078 12:11:44.072053 L1 Sub-State Support = 0x5
1079 12:11:44.075251 CommonModeRestoreTime = 0x28
1080 12:11:44.082325 Power On Value = 0x16, Power On Scale = 0x0
1081 12:11:44.082413 ASPM: Enabled L1
1082 12:11:44.085851 PCIe: Max_Payload_Size adjusted to 128
1083 12:11:44.092213 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1084 12:11:44.092307 PCI: 00:1e.2 scanning...
1085 12:11:44.095683 scan_generic_bus for PCI: 00:1e.2
1086 12:11:44.098921
1087 12:11:44.099013 SPI: 00 enabled
1088 12:11:44.105367 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1089 12:11:44.108635 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1090 12:11:44.112319 PCI: 00:1e.3 scanning...
1091 12:11:44.115884 scan_generic_bus for PCI: 00:1e.3
1092 12:11:44.115971 SPI: 00 enabled
1093 12:11:44.122678 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1094 12:11:44.129132 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1095 12:11:44.129223 PCI: 00:1f.0 scanning...
1096 12:11:44.132673
1097 12:11:44.136199 scan_static_bus for PCI: 00:1f.0
1098 12:11:44.136303 PNP: 0c09.0 enabled
1099 12:11:44.139393 PNP: 0c09.0 scanning...
1100 12:11:44.142862 scan_static_bus for PNP: 0c09.0
1101 12:11:44.145851 scan_static_bus for PNP: 0c09.0 done
1102 12:11:44.149114 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1103 12:11:44.152420
1104 12:11:44.156039 scan_static_bus for PCI: 00:1f.0 done
1105 12:11:44.159441 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1106 12:11:44.162167 PCI: 00:1f.2 scanning...
1107 12:11:44.166088 scan_static_bus for PCI: 00:1f.2
1108 12:11:44.169204 GENERIC: 0.0 enabled
1109 12:11:44.169471 GENERIC: 0.0 scanning...
1110 12:11:44.172328 scan_static_bus for GENERIC: 0.0
1111 12:11:44.175910 GENERIC: 0.0 enabled
1112 12:11:44.179471 GENERIC: 1.0 enabled
1113 12:11:44.182345 scan_static_bus for GENERIC: 0.0 done
1114 12:11:44.185980 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1115 12:11:44.189385 scan_static_bus for PCI: 00:1f.2 done
1116 12:11:44.192479
1117 12:11:44.195928 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1118 12:11:44.198892 PCI: 00:1f.3 scanning...
1119 12:11:44.202586 scan_static_bus for PCI: 00:1f.3
1120 12:11:44.206201 scan_static_bus for PCI: 00:1f.3 done
1121 12:11:44.209214 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1122 12:11:44.212054 PCI: 00:1f.5 scanning...
1123 12:11:44.215671 scan_generic_bus for PCI: 00:1f.5
1124 12:11:44.218982 scan_generic_bus for PCI: 00:1f.5 done
1125 12:11:44.225362 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1126 12:11:44.229224 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1127 12:11:44.232593 scan_static_bus for Root Device done
1128 12:11:44.239240 scan_bus: bus Root Device finished in 736 msecs
1129 12:11:44.239787 done
1130 12:11:44.245735 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1131 12:11:44.248556 Chrome EC: UHEPI supported
1132 12:11:44.255057 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1133 12:11:44.262467 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1134 12:11:44.265357 SPI flash protection: WPSW=0 SRP0=1
1135 12:11:44.269149 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1136 12:11:44.275851 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1137 12:11:44.278793 found VGA at PCI: 00:02.0
1138 12:11:44.282162 Setting up VGA for PCI: 00:02.0
1139 12:11:44.285803 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1140 12:11:44.291768 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1141 12:11:44.295105 Allocating resources...
1142 12:11:44.295612 Reading resources...
1143 12:11:44.301714 Root Device read_resources bus 0 link: 0
1144 12:11:44.304938 DOMAIN: 0000 read_resources bus 0 link: 0
1145 12:11:44.308302 PCI: 00:04.0 read_resources bus 1 link: 0
1146 12:11:44.315140 PCI: 00:04.0 read_resources bus 1 link: 0 done
1147 12:11:44.318708 PCI: 00:0d.0 read_resources bus 0 link: 0
1148 12:11:44.324888 USB0 port 0 read_resources bus 0 link: 0
1149 12:11:44.328357 USB0 port 0 read_resources bus 0 link: 0 done
1150 12:11:44.334933 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1151 12:11:44.338690 PCI: 00:14.0 read_resources bus 0 link: 0
1152 12:11:44.341731 USB0 port 0 read_resources bus 0 link: 0
1153 12:11:44.349420 USB0 port 0 read_resources bus 0 link: 0 done
1154 12:11:44.352833 PCI: 00:14.0 read_resources bus 0 link: 0 done
1155 12:11:44.359472 PCI: 00:14.3 read_resources bus 0 link: 0
1156 12:11:44.362657 PCI: 00:14.3 read_resources bus 0 link: 0 done
1157 12:11:44.369868 PCI: 00:15.0 read_resources bus 0 link: 0
1158 12:11:44.373615 PCI: 00:15.0 read_resources bus 0 link: 0 done
1159 12:11:44.379283 PCI: 00:15.1 read_resources bus 0 link: 0
1160 12:11:44.382791 PCI: 00:15.1 read_resources bus 0 link: 0 done
1161 12:11:44.389547 PCI: 00:19.1 read_resources bus 0 link: 0
1162 12:11:44.392790 PCI: 00:19.1 read_resources bus 0 link: 0 done
1163 12:11:44.399514 PCI: 00:1d.0 read_resources bus 1 link: 0
1164 12:11:44.403054 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1165 12:11:44.410001 PCI: 00:1e.2 read_resources bus 2 link: 0
1166 12:11:44.413184 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1167 12:11:44.419678 PCI: 00:1e.3 read_resources bus 3 link: 0
1168 12:11:44.422740 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1169 12:11:44.430074 PCI: 00:1f.0 read_resources bus 0 link: 0
1170 12:11:44.433023 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1171 12:11:44.436327 PCI: 00:1f.2 read_resources bus 0 link: 0
1172 12:11:44.439637
1173 12:11:44.443082 GENERIC: 0.0 read_resources bus 0 link: 0
1174 12:11:44.446032 GENERIC: 0.0 read_resources bus 0 link: 0 done
1175 12:11:44.452955 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1176 12:11:44.459415 DOMAIN: 0000 read_resources bus 0 link: 0 done
1177 12:11:44.462848 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1178 12:11:44.469562 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1179 12:11:44.472766 Root Device read_resources bus 0 link: 0 done
1180 12:11:44.476108 Done reading resources.
1181 12:11:44.479616 Show resources in subtree (Root Device)...After reading.
1182 12:11:44.486374 Root Device child on link 0 DOMAIN: 0000
1183 12:11:44.489499 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1184 12:11:44.499012 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1185 12:11:44.509272 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1186 12:11:44.510064 PCI: 00:00.0
1187 12:11:44.518823 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1188 12:11:44.529032 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1189 12:11:44.538855 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1190 12:11:44.548827 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1191 12:11:44.558695 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1192 12:11:44.565789 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1193 12:11:44.575442 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1194 12:11:44.585206 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1195 12:11:44.595270 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1196 12:11:44.604947 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1197 12:11:44.615012 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1198 12:11:44.621479 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1199 12:11:44.631833 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1200 12:11:44.642073 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1201 12:11:44.651724 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1202 12:11:44.661756 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1203 12:11:44.671291 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1204 12:11:44.678609 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1205 12:11:44.688445 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1206 12:11:44.697883 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1207 12:11:44.701029 PCI: 00:02.0
1208 12:11:44.711007 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1209 12:11:44.721438 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1210 12:11:44.727806 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1211 12:11:44.734524 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1212 12:11:44.744800 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1213 12:11:44.745358 GENERIC: 0.0
1214 12:11:44.747458 PCI: 00:05.0
1215 12:11:44.758022 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1216 12:11:44.760733 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1217 12:11:44.764728 GENERIC: 0.0
1218 12:11:44.765306 PCI: 00:08.0
1219 12:11:44.774437 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 12:11:44.777756 PCI: 00:0a.0
1221 12:11:44.781445 PCI: 00:0d.0 child on link 0 USB0 port 0
1222 12:11:44.790723 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1223 12:11:44.794426 USB0 port 0 child on link 0 USB3 port 0
1224 12:11:44.797496 USB3 port 0
1225 12:11:44.801086 USB3 port 1
1226 12:11:44.801531 USB3 port 2
1227 12:11:44.804490 USB3 port 3
1228 12:11:44.807509 PCI: 00:14.0 child on link 0 USB0 port 0
1229 12:11:44.818067 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1230 12:11:44.820654 USB0 port 0 child on link 0 USB2 port 0
1231 12:11:44.824070 USB2 port 0
1232 12:11:44.824520 USB2 port 1
1233 12:11:44.827381 USB2 port 2
1234 12:11:44.827928 USB2 port 3
1235 12:11:44.830877 USB2 port 4
1236 12:11:44.831430 USB2 port 5
1237 12:11:44.833871 USB2 port 6
1238 12:11:44.837675 USB2 port 7
1239 12:11:44.838272 USB2 port 8
1240 12:11:44.840663 USB2 port 9
1241 12:11:44.841110 USB3 port 0
1242 12:11:44.844031 USB3 port 1
1243 12:11:44.844587 USB3 port 2
1244 12:11:44.847017 USB3 port 3
1245 12:11:44.847462 PCI: 00:14.2
1246 12:11:44.856992 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1247 12:11:44.867097 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1248 12:11:44.874123 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1249 12:11:44.883605 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 12:11:44.884153 GENERIC: 0.0
1251 12:11:44.887307 PCI: 00:15.0 child on link 0 I2C: 00:1a
1252 12:11:44.896993 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1253 12:11:44.900438 I2C: 00:1a
1254 12:11:44.900884 I2C: 00:31
1255 12:11:44.903710 I2C: 00:32
1256 12:11:44.907266 PCI: 00:15.1 child on link 0 I2C: 00:10
1257 12:11:44.916987 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 12:11:44.920464 I2C: 00:10
1259 12:11:44.921017 PCI: 00:15.2
1260 12:11:44.930593 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 12:11:44.933504 PCI: 00:15.3
1262 12:11:44.943259 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 12:11:44.943849 PCI: 00:16.0
1264 12:11:44.953327 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1265 12:11:44.957323 PCI: 00:19.0
1266 12:11:44.960355 PCI: 00:19.1 child on link 0 I2C: 00:15
1267 12:11:44.970165 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1268 12:11:44.970746 I2C: 00:15
1269 12:11:44.976578 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1270 12:11:44.983116 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1271 12:11:44.992768 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1272 12:11:45.002942 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1273 12:11:45.006553 GENERIC: 0.0
1274 12:11:45.007089 PCI: 01:00.0
1275 12:11:45.016340 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1276 12:11:45.026199 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1277 12:11:45.029858 PCI: 00:1e.0
1278 12:11:45.039504 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1279 12:11:45.042991 PCI: 00:1e.2 child on link 0 SPI: 00
1280 12:11:45.052634 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1281 12:11:45.056543 SPI: 00
1282 12:11:45.059819 PCI: 00:1e.3 child on link 0 SPI: 00
1283 12:11:45.069985 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1284 12:11:45.070537 SPI: 00
1285 12:11:45.072818 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1286 12:11:45.082976 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1287 12:11:45.086124 PNP: 0c09.0
1288 12:11:45.092783 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1289 12:11:45.099614 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1290 12:11:45.105632 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1291 12:11:45.116496 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1292 12:11:45.122714 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1293 12:11:45.123258 GENERIC: 0.0
1294 12:11:45.126003 GENERIC: 1.0
1295 12:11:45.126447 PCI: 00:1f.3
1296 12:11:45.135809 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1297 12:11:45.145767 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1298 12:11:45.149108 PCI: 00:1f.5
1299 12:11:45.158939 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1300 12:11:45.162100 CPU_CLUSTER: 0 child on link 0 APIC: 00
1301 12:11:45.162544 APIC: 00
1302 12:11:45.165525 APIC: 03
1303 12:11:45.165988 APIC: 05
1304 12:11:45.166336 APIC: 07
1305 12:11:45.168720 APIC: 06
1306 12:11:45.169159 APIC: 02
1307 12:11:45.172540 APIC: 01
1308 12:11:45.173086 APIC: 04
1309 12:11:45.178836 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1310 12:11:45.185542 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1311 12:11:45.191942 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1312 12:11:45.198838 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1313 12:11:45.202134 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1314 12:11:45.205223 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1315 12:11:45.212005 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1316 12:11:45.221982 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1317 12:11:45.228677 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1318 12:11:45.235557 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1319 12:11:45.242385 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1320 12:11:45.248580 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1321 12:11:45.255235 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1322 12:11:45.264791 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1323 12:11:45.268383 DOMAIN: 0000: Resource ranges:
1324 12:11:45.271695 * Base: 1000, Size: 800, Tag: 100
1325 12:11:45.275083 * Base: 1900, Size: e700, Tag: 100
1326 12:11:45.278383 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1327 12:11:45.281957
1328 12:11:45.285329 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1329 12:11:45.288323
1330 12:11:45.294947 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1331 12:11:45.301403 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1332 12:11:45.308497 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1333 12:11:45.318249 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1334 12:11:45.324927 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1335 12:11:45.331392 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1336 12:11:45.337866 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1337 12:11:45.341218
1338 12:11:45.348325 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1339 12:11:45.355014 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1340 12:11:45.360820 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1341 12:11:45.370957 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1342 12:11:45.378003 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1343 12:11:45.384445 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1344 12:11:45.394316 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1345 12:11:45.401020 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1346 12:11:45.407942 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1347 12:11:45.417724 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1348 12:11:45.424075 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1349 12:11:45.430562 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1350 12:11:45.440936 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1351 12:11:45.447254 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1352 12:11:45.453753 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1353 12:11:45.463827 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1354 12:11:45.467487 DOMAIN: 0000: Resource ranges:
1355 12:11:45.470498 * Base: 7fc00000, Size: 40400000, Tag: 200
1356 12:11:45.473777 * Base: d0000000, Size: 28000000, Tag: 200
1357 12:11:45.480173 * Base: fa000000, Size: 1000000, Tag: 200
1358 12:11:45.483711 * Base: fb001000, Size: 2fff000, Tag: 200
1359 12:11:45.487367 * Base: fe010000, Size: 2e000, Tag: 200
1360 12:11:45.490399 * Base: fe03f000, Size: d41000, Tag: 200
1361 12:11:45.496785 * Base: fed88000, Size: 8000, Tag: 200
1362 12:11:45.500777 * Base: fed93000, Size: d000, Tag: 200
1363 12:11:45.503857 * Base: feda2000, Size: 1e000, Tag: 200
1364 12:11:45.506869 * Base: fede0000, Size: 1220000, Tag: 200
1365 12:11:45.513435 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1366 12:11:45.520648 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1367 12:11:45.527007 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1368 12:11:45.534276 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1369 12:11:45.540086 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1370 12:11:45.546973 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1371 12:11:45.553460 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1372 12:11:45.560108 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1373 12:11:45.567210 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1374 12:11:45.573549 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1375 12:11:45.580371 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1376 12:11:45.586823 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1377 12:11:45.593348 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1378 12:11:45.599908 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1379 12:11:45.606676 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1380 12:11:45.613403 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1381 12:11:45.620076 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1382 12:11:45.626400 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1383 12:11:45.633472 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1384 12:11:45.639969 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1385 12:11:45.646529 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1386 12:11:45.652845 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1387 12:11:45.659201 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1388 12:11:45.666460 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1389 12:11:45.676178 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1390 12:11:45.679437 PCI: 00:1d.0: Resource ranges:
1391 12:11:45.682828 * Base: 7fc00000, Size: 100000, Tag: 200
1392 12:11:45.689627 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1393 12:11:45.695769 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1394 12:11:45.702465 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1395 12:11:45.712798 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1396 12:11:45.715802 Root Device assign_resources, bus 0 link: 0
1397 12:11:45.719347 DOMAIN: 0000 assign_resources, bus 0 link: 0
1398 12:11:45.728924 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1399 12:11:45.735737 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1400 12:11:45.745640 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1401 12:11:45.752244 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1402 12:11:45.758819 PCI: 00:04.0 assign_resources, bus 1 link: 0
1403 12:11:45.762512 PCI: 00:04.0 assign_resources, bus 1 link: 0
1404 12:11:45.769095 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1405 12:11:45.772123
1406 12:11:45.778557 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1407 12:11:45.785317 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1408 12:11:45.788366
1409 12:11:45.792037 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1410 12:11:45.795303 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1411 12:11:45.805415 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1412 12:11:45.808602 PCI: 00:14.0 assign_resources, bus 0 link: 0
1413 12:11:45.814980 PCI: 00:14.0 assign_resources, bus 0 link: 0
1414 12:11:45.822012 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1415 12:11:45.828286 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1416 12:11:45.838684 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1417 12:11:45.841713 PCI: 00:14.3 assign_resources, bus 0 link: 0
1418 12:11:45.848150 PCI: 00:14.3 assign_resources, bus 0 link: 0
1419 12:11:45.855368 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1420 12:11:45.861765 PCI: 00:15.0 assign_resources, bus 0 link: 0
1421 12:11:45.865097 PCI: 00:15.0 assign_resources, bus 0 link: 0
1422 12:11:45.871740 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1423 12:11:45.878130 PCI: 00:15.1 assign_resources, bus 0 link: 0
1424 12:11:45.881633 PCI: 00:15.1 assign_resources, bus 0 link: 0
1425 12:11:45.891433 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1426 12:11:45.897763 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1427 12:11:45.907844 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1428 12:11:45.914275 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1429 12:11:45.921594 PCI: 00:19.1 assign_resources, bus 0 link: 0
1430 12:11:45.924607 PCI: 00:19.1 assign_resources, bus 0 link: 0
1431 12:11:45.934218 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1432 12:11:45.944089 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1433 12:11:45.950666 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1434 12:11:45.958058 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1435 12:11:45.963888 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1436 12:11:45.970898 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1437 12:11:45.977882 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1438 12:11:45.984279 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1439 12:11:45.990858 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1440 12:11:45.994018 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1441 12:11:46.003766 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1442 12:11:46.006890 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1443 12:11:46.010387 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1444 12:11:46.017388 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1445 12:11:46.020667 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1446 12:11:46.027003 LPC: Trying to open IO window from 800 size 1ff
1447 12:11:46.034049 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1448 12:11:46.043843 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1449 12:11:46.050746 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1450 12:11:46.057364 DOMAIN: 0000 assign_resources, bus 0 link: 0
1451 12:11:46.060164 Root Device assign_resources, bus 0 link: 0
1452 12:11:46.063476 Done setting resources.
1453 12:11:46.070771 Show resources in subtree (Root Device)...After assigning values.
1454 12:11:46.073327 Root Device child on link 0 DOMAIN: 0000
1455 12:11:46.077253 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1456 12:11:46.087444 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1457 12:11:46.096714 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1458 12:11:46.100051 PCI: 00:00.0
1459 12:11:46.110291 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1460 12:11:46.117476 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1461 12:11:46.126878 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1462 12:11:46.137122 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1463 12:11:46.146871 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1464 12:11:46.156589 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1465 12:11:46.163145 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1466 12:11:46.166460
1467 12:11:46.173060 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1468 12:11:46.182801 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1469 12:11:46.193187 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1470 12:11:46.202688 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1471 12:11:46.212674 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1472 12:11:46.219631 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1473 12:11:46.229325 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1474 12:11:46.239519 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1475 12:11:46.249645 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1476 12:11:46.259462 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1477 12:11:46.269490 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1478 12:11:46.275524 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1479 12:11:46.285850 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1480 12:11:46.289184 PCI: 00:02.0
1481 12:11:46.299031 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1482 12:11:46.309355 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1483 12:11:46.318655 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1484 12:11:46.322350 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1485 12:11:46.335783 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1486 12:11:46.336331 GENERIC: 0.0
1487 12:11:46.339353 PCI: 00:05.0
1488 12:11:46.348776 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1489 12:11:46.351804 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1490 12:11:46.355308 GENERIC: 0.0
1491 12:11:46.355885 PCI: 00:08.0
1492 12:11:46.365506 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1493 12:11:46.369054 PCI: 00:0a.0
1494 12:11:46.372170 PCI: 00:0d.0 child on link 0 USB0 port 0
1495 12:11:46.381930 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1496 12:11:46.388434 USB0 port 0 child on link 0 USB3 port 0
1497 12:11:46.389054 USB3 port 0
1498 12:11:46.391957 USB3 port 1
1499 12:11:46.392548 USB3 port 2
1500 12:11:46.395090 USB3 port 3
1501 12:11:46.398490 PCI: 00:14.0 child on link 0 USB0 port 0
1502 12:11:46.408584 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1503 12:11:46.414853 USB0 port 0 child on link 0 USB2 port 0
1504 12:11:46.415297 USB2 port 0
1505 12:11:46.418315 USB2 port 1
1506 12:11:46.418858 USB2 port 2
1507 12:11:46.422037 USB2 port 3
1508 12:11:46.422580 USB2 port 4
1509 12:11:46.425282 USB2 port 5
1510 12:11:46.425821 USB2 port 6
1511 12:11:46.428517 USB2 port 7
1512 12:11:46.428955 USB2 port 8
1513 12:11:46.432200 USB2 port 9
1514 12:11:46.432740 USB3 port 0
1515 12:11:46.435598 USB3 port 1
1516 12:11:46.436141 USB3 port 2
1517 12:11:46.438268 USB3 port 3
1518 12:11:46.438811 PCI: 00:14.2
1519 12:11:46.442141
1520 12:11:46.452023 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1521 12:11:46.461650 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1522 12:11:46.464860 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1523 12:11:46.474729 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1524 12:11:46.478639 GENERIC: 0.0
1525 12:11:46.481365 PCI: 00:15.0 child on link 0 I2C: 00:1a
1526 12:11:46.491794 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1527 12:11:46.495127 I2C: 00:1a
1528 12:11:46.495707 I2C: 00:31
1529 12:11:46.498204 I2C: 00:32
1530 12:11:46.501255 PCI: 00:15.1 child on link 0 I2C: 00:10
1531 12:11:46.511869 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1532 12:11:46.512528 I2C: 00:10
1533 12:11:46.514660 PCI: 00:15.2
1534 12:11:46.524710 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1535 12:11:46.528153 PCI: 00:15.3
1536 12:11:46.538254 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1537 12:11:46.538813 PCI: 00:16.0
1538 12:11:46.548055 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1539 12:11:46.550941 PCI: 00:19.0
1540 12:11:46.554801 PCI: 00:19.1 child on link 0 I2C: 00:15
1541 12:11:46.564436 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1542 12:11:46.567783 I2C: 00:15
1543 12:11:46.571223 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1544 12:11:46.580957 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1545 12:11:46.590833 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1546 12:11:46.600998 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1547 12:11:46.604218
1548 12:11:46.604666 GENERIC: 0.0
1549 12:11:46.607540 PCI: 01:00.0
1550 12:11:46.617148 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1551 12:11:46.628218 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1552 12:11:46.628764 PCI: 00:1e.0
1553 12:11:46.640961 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1554 12:11:46.644460 PCI: 00:1e.2 child on link 0 SPI: 00
1555 12:11:46.654016 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1556 12:11:46.654569 SPI: 00
1557 12:11:46.660974 PCI: 00:1e.3 child on link 0 SPI: 00
1558 12:11:46.670324 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1559 12:11:46.670779 SPI: 00
1560 12:11:46.674189 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1561 12:11:46.683467 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1562 12:11:46.687390 PNP: 0c09.0
1563 12:11:46.693697 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1564 12:11:46.700556 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1565 12:11:46.706845 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1566 12:11:46.716665 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1567 12:11:46.723569 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1568 12:11:46.724046 GENERIC: 0.0
1569 12:11:46.727222 GENERIC: 1.0
1570 12:11:46.727761 PCI: 00:1f.3
1571 12:11:46.737004 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1572 12:11:46.747071 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1573 12:11:46.750440 PCI: 00:1f.5
1574 12:11:46.760110 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1575 12:11:46.763187 CPU_CLUSTER: 0 child on link 0 APIC: 00
1576 12:11:46.766958 APIC: 00
1577 12:11:46.767449 APIC: 03
1578 12:11:46.767809 APIC: 05
1579 12:11:46.770123 APIC: 07
1580 12:11:46.770562 APIC: 06
1581 12:11:46.773211 APIC: 02
1582 12:11:46.773714 APIC: 01
1583 12:11:46.774101 APIC: 04
1584 12:11:46.776494 Done allocating resources.
1585 12:11:46.783091 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1586 12:11:46.789820 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1587 12:11:46.792928 Configure GPIOs for I2S audio on UP4.
1588 12:11:46.799866 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1589 12:11:46.803136 Enabling resources...
1590 12:11:46.806360 PCI: 00:00.0 subsystem <- 8086/9a12
1591 12:11:46.809614 PCI: 00:00.0 cmd <- 06
1592 12:11:46.813435 PCI: 00:02.0 subsystem <- 8086/9a40
1593 12:11:46.816501 PCI: 00:02.0 cmd <- 03
1594 12:11:46.819690 PCI: 00:04.0 subsystem <- 8086/9a03
1595 12:11:46.820143 PCI: 00:04.0 cmd <- 02
1596 12:11:46.827168 PCI: 00:05.0 subsystem <- 8086/9a19
1597 12:11:46.827694 PCI: 00:05.0 cmd <- 02
1598 12:11:46.830014 PCI: 00:08.0 subsystem <- 8086/9a11
1599 12:11:46.833102 PCI: 00:08.0 cmd <- 06
1600 12:11:46.836490 PCI: 00:0d.0 subsystem <- 8086/9a13
1601 12:11:46.839810 PCI: 00:0d.0 cmd <- 02
1602 12:11:46.843112 PCI: 00:14.0 subsystem <- 8086/a0ed
1603 12:11:46.846447 PCI: 00:14.0 cmd <- 02
1604 12:11:46.849591 PCI: 00:14.2 subsystem <- 8086/a0ef
1605 12:11:46.853357 PCI: 00:14.2 cmd <- 02
1606 12:11:46.856227 PCI: 00:14.3 subsystem <- 8086/a0f0
1607 12:11:46.859717 PCI: 00:14.3 cmd <- 02
1608 12:11:46.862940 PCI: 00:15.0 subsystem <- 8086/a0e8
1609 12:11:46.865876 PCI: 00:15.0 cmd <- 02
1610 12:11:46.869140 PCI: 00:15.1 subsystem <- 8086/a0e9
1611 12:11:46.869614 PCI: 00:15.1 cmd <- 02
1612 12:11:46.875958 PCI: 00:15.2 subsystem <- 8086/a0ea
1613 12:11:46.876395 PCI: 00:15.2 cmd <- 02
1614 12:11:46.879505 PCI: 00:15.3 subsystem <- 8086/a0eb
1615 12:11:46.882885 PCI: 00:15.3 cmd <- 02
1616 12:11:46.886140 PCI: 00:16.0 subsystem <- 8086/a0e0
1617 12:11:46.889504 PCI: 00:16.0 cmd <- 02
1618 12:11:46.892994 PCI: 00:19.1 subsystem <- 8086/a0c6
1619 12:11:46.895724 PCI: 00:19.1 cmd <- 02
1620 12:11:46.899440 PCI: 00:1d.0 bridge ctrl <- 0013
1621 12:11:46.902298 PCI: 00:1d.0 subsystem <- 8086/a0b0
1622 12:11:46.905555 PCI: 00:1d.0 cmd <- 06
1623 12:11:46.908981 PCI: 00:1e.0 subsystem <- 8086/a0a8
1624 12:11:46.912945 PCI: 00:1e.0 cmd <- 06
1625 12:11:46.915718 PCI: 00:1e.2 subsystem <- 8086/a0aa
1626 12:11:46.918924 PCI: 00:1e.2 cmd <- 06
1627 12:11:46.922028 PCI: 00:1e.3 subsystem <- 8086/a0ab
1628 12:11:46.922466 PCI: 00:1e.3 cmd <- 02
1629 12:11:46.929326 PCI: 00:1f.0 subsystem <- 8086/a087
1630 12:11:46.929854 PCI: 00:1f.0 cmd <- 407
1631 12:11:46.932654 PCI: 00:1f.3 subsystem <- 8086/a0c8
1632 12:11:46.935974 PCI: 00:1f.3 cmd <- 02
1633 12:11:46.939062 PCI: 00:1f.5 subsystem <- 8086/a0a4
1634 12:11:46.942426 PCI: 00:1f.5 cmd <- 406
1635 12:11:46.947035 PCI: 01:00.0 cmd <- 02
1636 12:11:46.951494 done.
1637 12:11:46.955074 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1638 12:11:46.957624 Initializing devices...
1639 12:11:46.960936 Root Device init
1640 12:11:46.964187 Chrome EC: Set SMI mask to 0x0000000000000000
1641 12:11:46.971607 Chrome EC: clear events_b mask to 0x0000000000000000
1642 12:11:46.978541 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1643 12:11:46.985280 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1644 12:11:46.991462 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1645 12:11:46.994883 Chrome EC: Set WAKE mask to 0x0000000000000000
1646 12:11:47.003052 fw_config match found: DB_USB=USB3_ACTIVE
1647 12:11:47.006550 Configure Right Type-C port orientation for retimer
1648 12:11:47.009472 Root Device init finished in 46 msecs
1649 12:11:47.013993 PCI: 00:00.0 init
1650 12:11:47.017389 CPU TDP = 9 Watts
1651 12:11:47.017943 CPU PL1 = 9 Watts
1652 12:11:47.020111 CPU PL2 = 40 Watts
1653 12:11:47.023571 CPU PL4 = 83 Watts
1654 12:11:47.027045 PCI: 00:00.0 init finished in 8 msecs
1655 12:11:47.027479 PCI: 00:02.0 init
1656 12:11:47.030182 GMA: Found VBT in CBFS
1657 12:11:47.033226 GMA: Found valid VBT in CBFS
1658 12:11:47.040476 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1659 12:11:47.046698 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1660 12:11:47.050843 PCI: 00:02.0 init finished in 18 msecs
1661 12:11:47.053129 PCI: 00:05.0 init
1662 12:11:47.056667 PCI: 00:05.0 init finished in 0 msecs
1663 12:11:47.060333 PCI: 00:08.0 init
1664 12:11:47.063348 PCI: 00:08.0 init finished in 0 msecs
1665 12:11:47.066390 PCI: 00:14.0 init
1666 12:11:47.070164 PCI: 00:14.0 init finished in 0 msecs
1667 12:11:47.073163 PCI: 00:14.2 init
1668 12:11:47.076737 PCI: 00:14.2 init finished in 0 msecs
1669 12:11:47.079729 PCI: 00:15.0 init
1670 12:11:47.082985 I2C bus 0 version 0x3230302a
1671 12:11:47.086564 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1672 12:11:47.089753 PCI: 00:15.0 init finished in 6 msecs
1673 12:11:47.090228 PCI: 00:15.1 init
1674 12:11:47.092918 I2C bus 1 version 0x3230302a
1675 12:11:47.096230 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1676 12:11:47.103078 PCI: 00:15.1 init finished in 6 msecs
1677 12:11:47.103632 PCI: 00:15.2 init
1678 12:11:47.105986 I2C bus 2 version 0x3230302a
1679 12:11:47.109715 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1680 12:11:47.113258 PCI: 00:15.2 init finished in 6 msecs
1681 12:11:47.116508 PCI: 00:15.3 init
1682 12:11:47.119492 I2C bus 3 version 0x3230302a
1683 12:11:47.122684 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1684 12:11:47.126015 PCI: 00:15.3 init finished in 6 msecs
1685 12:11:47.129780 PCI: 00:16.0 init
1686 12:11:47.132804 PCI: 00:16.0 init finished in 0 msecs
1687 12:11:47.136532 PCI: 00:19.1 init
1688 12:11:47.139869 I2C bus 5 version 0x3230302a
1689 12:11:47.142929 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1690 12:11:47.146380 PCI: 00:19.1 init finished in 6 msecs
1691 12:11:47.149969 PCI: 00:1d.0 init
1692 12:11:47.150520 Initializing PCH PCIe bridge.
1693 12:11:47.155811 PCI: 00:1d.0 init finished in 3 msecs
1694 12:11:47.159565 PCI: 00:1f.0 init
1695 12:11:47.162871 IOAPIC: Initializing IOAPIC at 0xfec00000
1696 12:11:47.166011 IOAPIC: Bootstrap Processor Local APIC = 0x00
1697 12:11:47.169259 IOAPIC: ID = 0x02
1698 12:11:47.172485 IOAPIC: Dumping registers
1699 12:11:47.172941 reg 0x0000: 0x02000000
1700 12:11:47.176566 reg 0x0001: 0x00770020
1701 12:11:47.179601 reg 0x0002: 0x00000000
1702 12:11:47.182410 PCI: 00:1f.0 init finished in 21 msecs
1703 12:11:47.185750 PCI: 00:1f.2 init
1704 12:11:47.189421 Disabling ACPI via APMC.
1705 12:11:47.189865 APMC done.
1706 12:11:47.192497 PCI: 00:1f.2 init finished in 5 msecs
1707 12:11:47.205400 PCI: 01:00.0 init
1708 12:11:47.208701 PCI: 01:00.0 init finished in 0 msecs
1709 12:11:47.211879 PNP: 0c09.0 init
1710 12:11:47.215225 Google Chrome EC uptime: 8.258 seconds
1711 12:11:47.222001 Google Chrome AP resets since EC boot: 1
1712 12:11:47.225037 Google Chrome most recent AP reset causes:
1713 12:11:47.228715 0.451: 32775 shutdown: entering G3
1714 12:11:47.235192 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1715 12:11:47.238230 PNP: 0c09.0 init finished in 22 msecs
1716 12:11:47.244217 Devices initialized
1717 12:11:47.247421 Show all devs... After init.
1718 12:11:47.250545 Root Device: enabled 1
1719 12:11:47.251077 DOMAIN: 0000: enabled 1
1720 12:11:47.254161 CPU_CLUSTER: 0: enabled 1
1721 12:11:47.257630 PCI: 00:00.0: enabled 1
1722 12:11:47.260772 PCI: 00:02.0: enabled 1
1723 12:11:47.261219 PCI: 00:04.0: enabled 1
1724 12:11:47.264117 PCI: 00:05.0: enabled 1
1725 12:11:47.267436 PCI: 00:06.0: enabled 0
1726 12:11:47.270408 PCI: 00:07.0: enabled 0
1727 12:11:47.270855 PCI: 00:07.1: enabled 0
1728 12:11:47.273970 PCI: 00:07.2: enabled 0
1729 12:11:47.277551 PCI: 00:07.3: enabled 0
1730 12:11:47.281184 PCI: 00:08.0: enabled 1
1731 12:11:47.281727 PCI: 00:09.0: enabled 0
1732 12:11:47.283818 PCI: 00:0a.0: enabled 0
1733 12:11:47.286973 PCI: 00:0d.0: enabled 1
1734 12:11:47.287425 PCI: 00:0d.1: enabled 0
1735 12:11:47.290422
1736 12:11:47.290898 PCI: 00:0d.2: enabled 0
1737 12:11:47.293871 PCI: 00:0d.3: enabled 0
1738 12:11:47.296907 PCI: 00:0e.0: enabled 0
1739 12:11:47.297355 PCI: 00:10.2: enabled 1
1740 12:11:47.300527 PCI: 00:10.6: enabled 0
1741 12:11:47.303609 PCI: 00:10.7: enabled 0
1742 12:11:47.306874 PCI: 00:12.0: enabled 0
1743 12:11:47.307326 PCI: 00:12.6: enabled 0
1744 12:11:47.310399 PCI: 00:13.0: enabled 0
1745 12:11:47.313469 PCI: 00:14.0: enabled 1
1746 12:11:47.317261 PCI: 00:14.1: enabled 0
1747 12:11:47.317778 PCI: 00:14.2: enabled 1
1748 12:11:47.320299 PCI: 00:14.3: enabled 1
1749 12:11:47.323552 PCI: 00:15.0: enabled 1
1750 12:11:47.326657 PCI: 00:15.1: enabled 1
1751 12:11:47.327106 PCI: 00:15.2: enabled 1
1752 12:11:47.330378 PCI: 00:15.3: enabled 1
1753 12:11:47.333235 PCI: 00:16.0: enabled 1
1754 12:11:47.336738 PCI: 00:16.1: enabled 0
1755 12:11:47.337182 PCI: 00:16.2: enabled 0
1756 12:11:47.339988 PCI: 00:16.3: enabled 0
1757 12:11:47.343452 PCI: 00:16.4: enabled 0
1758 12:11:47.343966 PCI: 00:16.5: enabled 0
1759 12:11:47.346831 PCI: 00:17.0: enabled 0
1760 12:11:47.349756 PCI: 00:19.0: enabled 0
1761 12:11:47.353529 PCI: 00:19.1: enabled 1
1762 12:11:47.354092 PCI: 00:19.2: enabled 0
1763 12:11:47.356653 PCI: 00:1c.0: enabled 1
1764 12:11:47.359888 PCI: 00:1c.1: enabled 0
1765 12:11:47.363780 PCI: 00:1c.2: enabled 0
1766 12:11:47.364320 PCI: 00:1c.3: enabled 0
1767 12:11:47.366525 PCI: 00:1c.4: enabled 0
1768 12:11:47.369878 PCI: 00:1c.5: enabled 0
1769 12:11:47.373456 PCI: 00:1c.6: enabled 1
1770 12:11:47.374028 PCI: 00:1c.7: enabled 0
1771 12:11:47.376547 PCI: 00:1d.0: enabled 1
1772 12:11:47.379887 PCI: 00:1d.1: enabled 0
1773 12:11:47.380333 PCI: 00:1d.2: enabled 1
1774 12:11:47.383136
1775 12:11:47.383581 PCI: 00:1d.3: enabled 0
1776 12:11:47.386848 PCI: 00:1e.0: enabled 1
1777 12:11:47.389834 PCI: 00:1e.1: enabled 0
1778 12:11:47.390324 PCI: 00:1e.2: enabled 1
1779 12:11:47.392989 PCI: 00:1e.3: enabled 1
1780 12:11:47.396425 PCI: 00:1f.0: enabled 1
1781 12:11:47.399669 PCI: 00:1f.1: enabled 0
1782 12:11:47.400116 PCI: 00:1f.2: enabled 1
1783 12:11:47.403206 PCI: 00:1f.3: enabled 1
1784 12:11:47.406059 PCI: 00:1f.4: enabled 0
1785 12:11:47.409398 PCI: 00:1f.5: enabled 1
1786 12:11:47.409840 PCI: 00:1f.6: enabled 0
1787 12:11:47.412991 PCI: 00:1f.7: enabled 0
1788 12:11:47.416282 APIC: 00: enabled 1
1789 12:11:47.416842 GENERIC: 0.0: enabled 1
1790 12:11:47.419641 GENERIC: 0.0: enabled 1
1791 12:11:47.423000 GENERIC: 1.0: enabled 1
1792 12:11:47.426120 GENERIC: 0.0: enabled 1
1793 12:11:47.426569 GENERIC: 1.0: enabled 1
1794 12:11:47.429403 USB0 port 0: enabled 1
1795 12:11:47.433053 GENERIC: 0.0: enabled 1
1796 12:11:47.436053 USB0 port 0: enabled 1
1797 12:11:47.436499 GENERIC: 0.0: enabled 1
1798 12:11:47.439235 I2C: 00:1a: enabled 1
1799 12:11:47.442998 I2C: 00:31: enabled 1
1800 12:11:47.443546 I2C: 00:32: enabled 1
1801 12:11:47.446252 I2C: 00:10: enabled 1
1802 12:11:47.449718 I2C: 00:15: enabled 1
1803 12:11:47.450207 GENERIC: 0.0: enabled 0
1804 12:11:47.453057 GENERIC: 1.0: enabled 0
1805 12:11:47.456112 GENERIC: 0.0: enabled 1
1806 12:11:47.456651 SPI: 00: enabled 1
1807 12:11:47.460080 SPI: 00: enabled 1
1808 12:11:47.463263 PNP: 0c09.0: enabled 1
1809 12:11:47.463803 GENERIC: 0.0: enabled 1
1810 12:11:47.466294 USB3 port 0: enabled 1
1811 12:11:47.468921 USB3 port 1: enabled 1
1812 12:11:47.472261 USB3 port 2: enabled 0
1813 12:11:47.472707 USB3 port 3: enabled 0
1814 12:11:47.476474 USB2 port 0: enabled 0
1815 12:11:47.479182 USB2 port 1: enabled 1
1816 12:11:47.479726 USB2 port 2: enabled 1
1817 12:11:47.482542 USB2 port 3: enabled 0
1818 12:11:47.485481 USB2 port 4: enabled 1
1819 12:11:47.488897 USB2 port 5: enabled 0
1820 12:11:47.489344 USB2 port 6: enabled 0
1821 12:11:47.492423 USB2 port 7: enabled 0
1822 12:11:47.495769 USB2 port 8: enabled 0
1823 12:11:47.496214 USB2 port 9: enabled 0
1824 12:11:47.498696 USB3 port 0: enabled 0
1825 12:11:47.502151 USB3 port 1: enabled 1
1826 12:11:47.505482 USB3 port 2: enabled 0
1827 12:11:47.505949 USB3 port 3: enabled 0
1828 12:11:47.508827 GENERIC: 0.0: enabled 1
1829 12:11:47.512432 GENERIC: 1.0: enabled 1
1830 12:11:47.512880 APIC: 03: enabled 1
1831 12:11:47.515700 APIC: 05: enabled 1
1832 12:11:47.518958 APIC: 07: enabled 1
1833 12:11:47.519424 APIC: 06: enabled 1
1834 12:11:47.522403 APIC: 02: enabled 1
1835 12:11:47.522850 APIC: 01: enabled 1
1836 12:11:47.525728 APIC: 04: enabled 1
1837 12:11:47.528776 PCI: 01:00.0: enabled 1
1838 12:11:47.532070 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1839 12:11:47.535478
1840 12:11:47.538822 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1841 12:11:47.542066 ELOG: NV offset 0xf30000 size 0x1000
1842 12:11:47.549280 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1843 12:11:47.555574 ELOG: Event(17) added with size 13 at 2023-01-04 12:11:47 UTC
1844 12:11:47.562474 ELOG: Event(92) added with size 9 at 2023-01-04 12:11:47 UTC
1845 12:11:47.569029 ELOG: Event(93) added with size 9 at 2023-01-04 12:11:47 UTC
1846 12:11:47.575510 ELOG: Event(9E) added with size 10 at 2023-01-04 12:11:47 UTC
1847 12:11:47.582288 ELOG: Event(9F) added with size 14 at 2023-01-04 12:11:47 UTC
1848 12:11:47.588710 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1849 12:11:47.591983 ELOG: Event(A1) added with size 10 at 2023-01-04 12:11:47 UTC
1850 12:11:47.595567
1851 12:11:47.602013 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1852 12:11:47.608455 ELOG: Event(A0) added with size 9 at 2023-01-04 12:11:47 UTC
1853 12:11:47.611699 elog_add_boot_reason: Logged dev mode boot
1854 12:11:47.618315 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1855 12:11:47.618779 Finalize devices...
1856 12:11:47.621643 Devices finalized
1857 12:11:47.628793 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1858 12:11:47.631778 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1859 12:11:47.638738 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1860 12:11:47.641961 ME: HFSTS1 : 0x80030055
1861 12:11:47.648370 ME: HFSTS2 : 0x30280116
1862 12:11:47.651779 ME: HFSTS3 : 0x00000050
1863 12:11:47.655263 ME: HFSTS4 : 0x00004000
1864 12:11:47.661669 ME: HFSTS5 : 0x00000000
1865 12:11:47.665084 ME: HFSTS6 : 0x40400006
1866 12:11:47.668050 ME: Manufacturing Mode : YES
1867 12:11:47.671827 ME: SPI Protection Mode Enabled : NO
1868 12:11:47.675160 ME: FW Partition Table : OK
1869 12:11:47.678160
1870 12:11:47.681874 ME: Bringup Loader Failure : NO
1871 12:11:47.685036 ME: Firmware Init Complete : NO
1872 12:11:47.688428 ME: Boot Options Present : NO
1873 12:11:47.691742 ME: Update In Progress : NO
1874 12:11:47.694607 ME: D0i3 Support : YES
1875 12:11:47.697727 ME: Low Power State Enabled : NO
1876 12:11:47.701285 ME: CPU Replaced : YES
1877 12:11:47.708040 ME: CPU Replacement Valid : YES
1878 12:11:47.711545 ME: Current Working State : 5
1879 12:11:47.714612 ME: Current Operation State : 1
1880 12:11:47.717869 ME: Current Operation Mode : 3
1881 12:11:47.721272 ME: Error Code : 0
1882 12:11:47.724960 ME: Enhanced Debug Mode : NO
1883 12:11:47.728043 ME: CPU Debug Disabled : YES
1884 12:11:47.731355 ME: TXT Support : NO
1885 12:11:47.738262 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1886 12:11:47.744342 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1887 12:11:47.747584 CBFS: 'fallback/slic' not found.
1888 12:11:47.754761 ACPI: Writing ACPI tables at 76b01000.
1889 12:11:47.755312 ACPI: * FACS
1890 12:11:47.757789 ACPI: * DSDT
1891 12:11:47.761163 Ramoops buffer: 0x100000@0x76a00000.
1892 12:11:47.764449 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1893 12:11:47.771147 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1894 12:11:47.774228 Google Chrome EC: version:
1895 12:11:47.777882 ro: voema_v2.0.10114-a447f03e46
1896 12:11:47.780469 rw: voema_v2.0.10114-a447f03e46
1897 12:11:47.780914 running image: 2
1898 12:11:47.787554 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1899 12:11:47.791604 ACPI: * FADT
1900 12:11:47.792049 SCI is IRQ9
1901 12:11:47.795383 ACPI: added table 1/32, length now 40
1902 12:11:47.798461
1903 12:11:47.798904 ACPI: * SSDT
1904 12:11:47.802381 Found 1 CPU(s) with 8 core(s) each.
1905 12:11:47.808306 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1906 12:11:47.811903 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1907 12:11:47.815311 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1908 12:11:47.818548 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1909 12:11:47.825393 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1910 12:11:47.831938 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1911 12:11:47.835146 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1912 12:11:47.841681 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1913 12:11:47.848389 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1914 12:11:47.852194 \_SB.PCI0.RP09: Added StorageD3Enable property
1915 12:11:47.854759 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1916 12:11:47.858192
1917 12:11:47.861653 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1918 12:11:47.868071 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1919 12:11:47.871518 PS2K: Passing 80 keymaps to kernel
1920 12:11:47.878337 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1921 12:11:47.884691 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1922 12:11:47.891536 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1923 12:11:47.898027 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1924 12:11:47.904804 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1925 12:11:47.911343 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1926 12:11:47.918090 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1927 12:11:47.924657 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1928 12:11:47.928092 ACPI: added table 2/32, length now 44
1929 12:11:47.928764 ACPI: * MCFG
1930 12:11:47.931177
1931 12:11:47.934594 ACPI: added table 3/32, length now 48
1932 12:11:47.935109 ACPI: * TPM2
1933 12:11:47.938063 TPM2 log created at 0x769f0000
1934 12:11:47.941453 ACPI: added table 4/32, length now 52
1935 12:11:47.945172 ACPI: * MADT
1936 12:11:47.945720 SCI is IRQ9
1937 12:11:47.948006 ACPI: added table 5/32, length now 56
1938 12:11:47.951004 current = 76b09850
1939 12:11:47.951518 ACPI: * DMAR
1940 12:11:47.954339 ACPI: added table 6/32, length now 60
1941 12:11:47.958238
1942 12:11:47.961685 ACPI: added table 7/32, length now 64
1943 12:11:47.962275 ACPI: * HPET
1944 12:11:47.964255 ACPI: added table 8/32, length now 68
1945 12:11:47.967925 ACPI: done.
1946 12:11:47.968444 ACPI tables: 35216 bytes.
1947 12:11:47.971114 smbios_write_tables: 769ef000
1948 12:11:47.974508 EC returned error result code 3
1949 12:11:47.977948 Couldn't obtain OEM name from CBI
1950 12:11:47.982330 Create SMBIOS type 16
1951 12:11:47.985843 Create SMBIOS type 17
1952 12:11:47.989272 GENERIC: 0.0 (WIFI Device)
1953 12:11:47.989947 SMBIOS tables: 1734 bytes.
1954 12:11:47.995776 Writing table forward entry at 0x00000500
1955 12:11:48.002600 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1956 12:11:48.005647 Writing coreboot table at 0x76b25000
1957 12:11:48.012602 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1958 12:11:48.015786 1. 0000000000001000-000000000009ffff: RAM
1959 12:11:48.019198 2. 00000000000a0000-00000000000fffff: RESERVED
1960 12:11:48.025880 3. 0000000000100000-00000000769eefff: RAM
1961 12:11:48.028703 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1962 12:11:48.035700 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1963 12:11:48.042358 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1964 12:11:48.045434 7. 0000000077000000-000000007fbfffff: RESERVED
1965 12:11:48.048866 8. 00000000c0000000-00000000cfffffff: RESERVED
1966 12:11:48.055524 9. 00000000f8000000-00000000f9ffffff: RESERVED
1967 12:11:48.059057 10. 00000000fb000000-00000000fb000fff: RESERVED
1968 12:11:48.065446 11. 00000000fe000000-00000000fe00ffff: RESERVED
1969 12:11:48.068565 12. 00000000fed80000-00000000fed87fff: RESERVED
1970 12:11:48.075541 13. 00000000fed90000-00000000fed92fff: RESERVED
1971 12:11:48.078676 14. 00000000feda0000-00000000feda1fff: RESERVED
1972 12:11:48.085433 15. 00000000fedc0000-00000000feddffff: RESERVED
1973 12:11:48.088531 16. 0000000100000000-00000004803fffff: RAM
1974 12:11:48.091739 Passing 4 GPIOs to payload:
1975 12:11:48.094930 NAME | PORT | POLARITY | VALUE
1976 12:11:48.101795 lid | undefined | high | high
1977 12:11:48.108571 power | undefined | high | low
1978 12:11:48.111634 oprom | undefined | high | low
1979 12:11:48.118572 EC in RW | 0x000000e5 | high | high
1980 12:11:48.125321 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1981 12:11:48.125869 coreboot table: 1576 bytes.
1982 12:11:48.131822 IMD ROOT 0. 0x76fff000 0x00001000
1983 12:11:48.134855 IMD SMALL 1. 0x76ffe000 0x00001000
1984 12:11:48.137992 FSP MEMORY 2. 0x76c4e000 0x003b0000
1985 12:11:48.141418 VPD 3. 0x76c4d000 0x00000367
1986 12:11:48.145135 RO MCACHE 4. 0x76c4c000 0x00000fdc
1987 12:11:48.148369 CONSOLE 5. 0x76c2c000 0x00020000
1988 12:11:48.151793 FMAP 6. 0x76c2b000 0x00000578
1989 12:11:48.154640 TIME STAMP 7. 0x76c2a000 0x00000910
1990 12:11:48.158085
1991 12:11:48.161297 VBOOT WORK 8. 0x76c16000 0x00014000
1992 12:11:48.164758 ROMSTG STCK 9. 0x76c15000 0x00001000
1993 12:11:48.168116 AFTER CAR 10. 0x76c0a000 0x0000b000
1994 12:11:48.171140 RAMSTAGE 11. 0x76b97000 0x00073000
1995 12:11:48.174582 REFCODE 12. 0x76b42000 0x00055000
1996 12:11:48.178255 SMM BACKUP 13. 0x76b32000 0x00010000
1997 12:11:48.181223 4f444749 14. 0x76b30000 0x00002000
1998 12:11:48.185000 EXT VBT15. 0x76b2d000 0x0000219f
1999 12:11:48.188199 COREBOOT 16. 0x76b25000 0x00008000
2000 12:11:48.191059
2001 12:11:48.194330 ACPI 17. 0x76b01000 0x00024000
2002 12:11:48.197843 ACPI GNVS 18. 0x76b00000 0x00001000
2003 12:11:48.200997 RAMOOPS 19. 0x76a00000 0x00100000
2004 12:11:48.204524 TPM2 TCGLOG20. 0x769f0000 0x00010000
2005 12:11:48.207828 SMBIOS 21. 0x769ef000 0x00000800
2006 12:11:48.210878 IMD small region:
2007 12:11:48.214038 IMD ROOT 0. 0x76ffec00 0x00000400
2008 12:11:48.217553 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2009 12:11:48.220758 POWER STATE 2. 0x76ffeb80 0x00000044
2010 12:11:48.224175 ROMSTAGE 3. 0x76ffeb60 0x00000004
2011 12:11:48.230630 MEM INFO 4. 0x76ffe980 0x000001e0
2012 12:11:48.234070 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
2013 12:11:48.237192 MTRR: Physical address space:
2014 12:11:48.243695 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2015 12:11:48.250396 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2016 12:11:48.257227 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2017 12:11:48.264017 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2018 12:11:48.270335 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2019 12:11:48.277249 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2020 12:11:48.283881 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
2021 12:11:48.287137 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 12:11:48.290305 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 12:11:48.293648 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 12:11:48.299712 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 12:11:48.303614 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 12:11:48.306676 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 12:11:48.309894 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 12:11:48.316885 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 12:11:48.319736 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 12:11:48.322741 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 12:11:48.326095 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 12:11:48.331739 call enable_fixed_mtrr()
2033 12:11:48.334732 CPU physical address size: 39 bits
2034 12:11:48.341736 MTRR: default type WB/UC MTRR counts: 6/7.
2035 12:11:48.344745 MTRR: WB selected as default type.
2036 12:11:48.351287 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2037 12:11:48.355076 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2038 12:11:48.361181 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2039 12:11:48.368000 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2040 12:11:48.374513 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2041 12:11:48.381563 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2042 12:11:48.385630
2043 12:11:48.386209 MTRR check
2044 12:11:48.388603 Fixed MTRRs : Enabled
2045 12:11:48.389162 Variable MTRRs: Enabled
2046 12:11:48.389522
2047 12:11:48.395282 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:11:48.398517 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 12:11:48.401853 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 12:11:48.405275 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 12:11:48.411789 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 12:11:48.414835 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 12:11:48.418219 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 12:11:48.421590 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 12:11:48.428642 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 12:11:48.431856 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 12:11:48.435228 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 12:11:48.438413 MTRR: Fixed MSR 0x250 0x0606060606060606
2059 12:11:48.441216 MTRR: Fixed MSR 0x250 0x0606060606060606
2060 12:11:48.448617 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2061 12:11:48.451610 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 12:11:48.455172
2063 12:11:48.458340 MTRR: Fixed MSR 0x259 0x0000000000000000
2064 12:11:48.461595 MTRR: Fixed MSR 0x268 0x0606060606060606
2065 12:11:48.464966 MTRR: Fixed MSR 0x269 0x0606060606060606
2066 12:11:48.468335 MTRR: Fixed MSR 0x26a 0x0606060606060606
2067 12:11:48.474937 MTRR: Fixed MSR 0x26b 0x0606060606060606
2068 12:11:48.478295 MTRR: Fixed MSR 0x26c 0x0606060606060606
2069 12:11:48.481683 MTRR: Fixed MSR 0x26d 0x0606060606060606
2070 12:11:48.485018 MTRR: Fixed MSR 0x26e 0x0606060606060606
2071 12:11:48.491464 MTRR: Fixed MSR 0x26f 0x0606060606060606
2072 12:11:48.494777 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 12:11:48.498286 call enable_fixed_mtrr()
2074 12:11:48.501248 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 12:11:48.507731 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 12:11:48.511106 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 12:11:48.514540 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 12:11:48.517952 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 12:11:48.524667 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 12:11:48.527776 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 12:11:48.531254 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 12:11:48.534791 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 12:11:48.539725 CPU physical address size: 39 bits
2084 12:11:48.546435 call enable_fixed_mtrr()
2085 12:11:48.549495 MTRR: Fixed MSR 0x250 0x0606060606060606
2086 12:11:48.552679 MTRR: Fixed MSR 0x250 0x0606060606060606
2087 12:11:48.559592 MTRR: Fixed MSR 0x258 0x0606060606060606
2088 12:11:48.563058 MTRR: Fixed MSR 0x259 0x0000000000000000
2089 12:11:48.566199 MTRR: Fixed MSR 0x268 0x0606060606060606
2091 12:16:32.761132 end: 2.2.3 depthcharge-start (duration 00:05:00) [common]
2093 12:16:32.762307 depthcharge-retry failed: 1 of 1 attempts. 'depthcharge-start timed out after 300 seconds'
2095 12:16:32.763216 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2098 12:16:32.764836 end: 2 depthcharge-action (duration 00:05:00) [common]
2100 12:16:32.765424 Cleaning after the job
2101 12:16:32.765521 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/ramdisk
2102 12:16:32.766047 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/kernel
2103 12:16:32.766854 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/nfsrootfs
2104 12:16:32.801019 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8570536/tftp-deploy-rr1ovlbr/modules
2105 12:16:32.801380 start: 5.1 power-off (timeout 00:00:30) [common]
2106 12:16:32.801560 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2107 12:16:32.822619 >> Command sent successfully.
2108 12:16:32.824681 Returned 0 in 0 seconds
2109 12:16:32.926202 end: 5.1 power-off (duration 00:00:00) [common]
2111 12:16:32.927793 start: 5.2 read-feedback (timeout 00:10:00) [common]
2112 12:16:32.929273 Listened to connection for namespace 'common' for up to 1s
2113 12:16:33.934000 Finalising connection for namespace 'common'
2114 12:16:33.934714 Disconnecting from shell: Finalise
2115 12:16:33.935177 MTRR: Fixed M
2116 12:16:34.036884 end: 5.2 read-feedback (duration 00:00:01) [common]
2117 12:16:34.037514 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8570536
2118 12:16:34.139218 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8570536
2119 12:16:34.139430 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.