Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Warnings: 0
- Kernel Errors: 0
1 06:16:26.506075 lava-dispatcher, installed at version: 2023.05.1
2 06:16:26.506291 start: 0 validate
3 06:16:26.506427 Start time: 2023-07-04 06:16:26.506419+00:00 (UTC)
4 06:16:26.506555 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:16:26.506684 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 06:16:26.777630 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:16:26.778645 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.184-cip36-10-ga711f789c23e1%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:16:27.051421 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:16:27.052240 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.184-cip36-10-ga711f789c23e1%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
10 06:16:30.963871 validate duration: 4.46
12 06:16:30.964145 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:16:30.964241 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:16:30.964325 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:16:30.964482 Not decompressing ramdisk as can be used compressed.
16 06:16:30.964567 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 06:16:30.964630 saving as /var/lib/lava/dispatcher/tmp/11005216/tftp-deploy-2lmen4ez/ramdisk/rootfs.cpio.gz
18 06:16:30.964690 total size: 8418130 (8MB)
19 06:16:32.587173 progress 0% (0MB)
20 06:16:32.592906 progress 5% (0MB)
21 06:16:32.595208 progress 10% (0MB)
22 06:16:32.597586 progress 15% (1MB)
23 06:16:32.599865 progress 20% (1MB)
24 06:16:32.602115 progress 25% (2MB)
25 06:16:32.604444 progress 30% (2MB)
26 06:16:32.606545 progress 35% (2MB)
27 06:16:32.608763 progress 40% (3MB)
28 06:16:32.611068 progress 45% (3MB)
29 06:16:32.613485 progress 50% (4MB)
30 06:16:32.615728 progress 55% (4MB)
31 06:16:32.617979 progress 60% (4MB)
32 06:16:32.620035 progress 65% (5MB)
33 06:16:32.622319 progress 70% (5MB)
34 06:16:32.624526 progress 75% (6MB)
35 06:16:32.626808 progress 80% (6MB)
36 06:16:32.629025 progress 85% (6MB)
37 06:16:32.631235 progress 90% (7MB)
38 06:16:32.633398 progress 95% (7MB)
39 06:16:32.635418 progress 100% (8MB)
40 06:16:32.635643 8MB downloaded in 1.67s (4.80MB/s)
41 06:16:32.635794 end: 1.1.1 http-download (duration 00:00:02) [common]
43 06:16:32.636026 end: 1.1 download-retry (duration 00:00:02) [common]
44 06:16:32.636112 start: 1.2 download-retry (timeout 00:09:58) [common]
45 06:16:32.636194 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 06:16:32.636335 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.184-cip36-10-ga711f789c23e1/x86_64/x86_64_defconfig+x86-chromebook+kselftest/gcc-10/kernel/bzImage
47 06:16:32.636405 saving as /var/lib/lava/dispatcher/tmp/11005216/tftp-deploy-2lmen4ez/kernel/bzImage
48 06:16:32.636465 total size: 16398560 (15MB)
49 06:16:32.636523 No compression specified
50 06:16:32.637668 progress 0% (0MB)
51 06:16:32.641908 progress 5% (0MB)
52 06:16:32.646071 progress 10% (1MB)
53 06:16:32.650331 progress 15% (2MB)
54 06:16:32.654537 progress 20% (3MB)
55 06:16:32.658955 progress 25% (3MB)
56 06:16:32.663133 progress 30% (4MB)
57 06:16:32.667313 progress 35% (5MB)
58 06:16:32.671475 progress 40% (6MB)
59 06:16:32.675640 progress 45% (7MB)
60 06:16:32.679836 progress 50% (7MB)
61 06:16:32.684000 progress 55% (8MB)
62 06:16:32.688160 progress 60% (9MB)
63 06:16:32.692326 progress 65% (10MB)
64 06:16:32.696492 progress 70% (10MB)
65 06:16:32.700697 progress 75% (11MB)
66 06:16:32.704906 progress 80% (12MB)
67 06:16:32.709085 progress 85% (13MB)
68 06:16:32.713492 progress 90% (14MB)
69 06:16:32.717748 progress 95% (14MB)
70 06:16:32.721901 progress 100% (15MB)
71 06:16:32.722105 15MB downloaded in 0.09s (182.62MB/s)
72 06:16:32.722249 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:16:32.722475 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:16:32.722559 start: 1.3 download-retry (timeout 00:09:58) [common]
76 06:16:32.722649 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 06:16:32.722789 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.184-cip36-10-ga711f789c23e1/x86_64/x86_64_defconfig+x86-chromebook+kselftest/gcc-10/modules.tar.xz
78 06:16:32.722857 saving as /var/lib/lava/dispatcher/tmp/11005216/tftp-deploy-2lmen4ez/modules/modules.tar
79 06:16:32.722917 total size: 3413260 (3MB)
80 06:16:32.722975 Using unxz to decompress xz
81 06:16:32.726992 progress 0% (0MB)
82 06:16:32.732812 progress 5% (0MB)
83 06:16:32.745650 progress 10% (0MB)
84 06:16:32.755708 progress 15% (0MB)
85 06:16:32.766270 progress 20% (0MB)
86 06:16:32.777909 progress 25% (0MB)
87 06:16:32.787801 progress 30% (1MB)
88 06:16:32.797035 progress 35% (1MB)
89 06:16:32.807417 progress 40% (1MB)
90 06:16:32.817307 progress 45% (1MB)
91 06:16:32.829326 progress 50% (1MB)
92 06:16:32.839206 progress 55% (1MB)
93 06:16:32.848985 progress 60% (1MB)
94 06:16:32.858958 progress 65% (2MB)
95 06:16:32.868932 progress 70% (2MB)
96 06:16:32.879612 progress 75% (2MB)
97 06:16:32.889221 progress 80% (2MB)
98 06:16:32.902040 progress 85% (2MB)
99 06:16:32.910869 progress 90% (2MB)
100 06:16:32.918933 progress 95% (3MB)
101 06:16:32.931609 progress 100% (3MB)
102 06:16:32.938628 3MB downloaded in 0.22s (15.09MB/s)
103 06:16:32.938917 end: 1.3.1 http-download (duration 00:00:00) [common]
105 06:16:32.939181 end: 1.3 download-retry (duration 00:00:00) [common]
106 06:16:32.939276 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
107 06:16:32.939369 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
108 06:16:32.939464 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
109 06:16:32.939549 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
110 06:16:32.939783 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi
111 06:16:32.939920 makedir: /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin
112 06:16:32.940027 makedir: /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/tests
113 06:16:32.940129 makedir: /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/results
114 06:16:32.940245 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-add-keys
115 06:16:32.940394 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-add-sources
116 06:16:32.940524 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-background-process-start
117 06:16:32.940656 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-background-process-stop
118 06:16:32.940785 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-common-functions
119 06:16:32.940911 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-echo-ipv4
120 06:16:32.941038 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-install-packages
121 06:16:32.941172 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-installed-packages
122 06:16:32.941297 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-os-build
123 06:16:32.941428 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-probe-channel
124 06:16:32.941655 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-probe-ip
125 06:16:32.941788 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-target-ip
126 06:16:32.941916 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-target-mac
127 06:16:32.942043 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-target-storage
128 06:16:32.942175 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-test-case
129 06:16:32.942301 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-test-event
130 06:16:32.942426 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-test-feedback
131 06:16:32.942552 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-test-raise
132 06:16:32.942679 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-test-reference
133 06:16:32.942808 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-test-runner
134 06:16:32.942934 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-test-set
135 06:16:32.943061 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-test-shell
136 06:16:32.943192 Updating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-install-packages (oe)
137 06:16:32.943346 Updating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/bin/lava-installed-packages (oe)
138 06:16:32.943469 Creating /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/environment
139 06:16:32.943570 LAVA metadata
140 06:16:32.943646 - LAVA_JOB_ID=11005216
141 06:16:32.943712 - LAVA_DISPATCHER_IP=192.168.201.1
142 06:16:32.943812 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
143 06:16:32.943881 skipped lava-vland-overlay
144 06:16:32.943955 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
145 06:16:32.944040 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
146 06:16:32.944102 skipped lava-multinode-overlay
147 06:16:32.944176 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
148 06:16:32.944255 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
149 06:16:32.944330 Loading test definitions
150 06:16:32.944423 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
151 06:16:32.944496 Using /lava-11005216 at stage 0
152 06:16:32.944822 uuid=11005216_1.4.2.3.1 testdef=None
153 06:16:32.944910 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
154 06:16:32.944994 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
155 06:16:32.945567 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
157 06:16:32.945793 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
158 06:16:32.946433 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
160 06:16:32.946661 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
161 06:16:32.947290 runner path: /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/0/tests/0_dmesg test_uuid 11005216_1.4.2.3.1
162 06:16:32.947448 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
164 06:16:32.947694 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
165 06:16:32.947766 Using /lava-11005216 at stage 1
166 06:16:32.948067 uuid=11005216_1.4.2.3.5 testdef=None
167 06:16:32.948155 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
168 06:16:32.948239 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
169 06:16:32.948719 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
171 06:16:32.948936 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
172 06:16:32.949630 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
174 06:16:32.949855 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
175 06:16:32.950485 runner path: /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/1/tests/1_bootrr test_uuid 11005216_1.4.2.3.5
176 06:16:32.950636 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
178 06:16:32.950840 Creating lava-test-runner.conf files
179 06:16:32.950903 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/0 for stage 0
180 06:16:32.950992 - 0_dmesg
181 06:16:32.951073 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11005216/lava-overlay-8p5y7czi/lava-11005216/1 for stage 1
182 06:16:32.951163 - 1_bootrr
183 06:16:32.951257 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
184 06:16:32.951343 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
185 06:16:32.959994 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
186 06:16:32.960110 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
187 06:16:32.960198 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
188 06:16:32.960284 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
189 06:16:32.960371 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
190 06:16:33.212439 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
191 06:16:33.212805 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
192 06:16:33.212926 extracting modules file /var/lib/lava/dispatcher/tmp/11005216/tftp-deploy-2lmen4ez/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11005216/extract-overlay-ramdisk-s5zdu5zs/ramdisk
193 06:16:33.296842 end: 1.4.4 extract-modules (duration 00:00:00) [common]
194 06:16:33.297012 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
195 06:16:33.297134 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11005216/compress-overlay-a1lh9hpq/overlay-1.4.2.4.tar.gz to ramdisk
196 06:16:33.297226 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11005216/compress-overlay-a1lh9hpq/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11005216/extract-overlay-ramdisk-s5zdu5zs/ramdisk
197 06:16:33.305817 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
198 06:16:33.305931 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
199 06:16:33.306026 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
200 06:16:33.306150 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
201 06:16:33.306244 Building ramdisk /var/lib/lava/dispatcher/tmp/11005216/extract-overlay-ramdisk-s5zdu5zs/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11005216/extract-overlay-ramdisk-s5zdu5zs/ramdisk
202 06:16:33.546913 >> 92728 blocks
203 06:16:34.975055 rename /var/lib/lava/dispatcher/tmp/11005216/extract-overlay-ramdisk-s5zdu5zs/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11005216/tftp-deploy-2lmen4ez/ramdisk/ramdisk.cpio.gz
204 06:16:34.975491 end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
205 06:16:34.975619 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
206 06:16:34.975722 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
207 06:16:34.975816 No mkimage arch provided, not using FIT.
208 06:16:34.975902 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
209 06:16:34.975987 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
210 06:16:34.976090 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
211 06:16:34.976176 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
212 06:16:34.976257 No LXC device requested
213 06:16:34.976339 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
214 06:16:34.976428 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
215 06:16:34.976509 end: 1.6 deploy-device-env (duration 00:00:00) [common]
216 06:16:34.976580 Checking files for TFTP limit of 4294967296 bytes.
217 06:16:34.977004 end: 1 tftp-deploy (duration 00:00:04) [common]
218 06:16:34.977144 start: 2 depthcharge-action (timeout 00:05:00) [common]
219 06:16:34.977233 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
220 06:16:34.977352 substitutions:
221 06:16:34.977419 - {DTB}: None
222 06:16:34.977483 - {INITRD}: 11005216/tftp-deploy-2lmen4ez/ramdisk/ramdisk.cpio.gz
223 06:16:34.977542 - {KERNEL}: 11005216/tftp-deploy-2lmen4ez/kernel/bzImage
224 06:16:34.977599 - {LAVA_MAC}: None
225 06:16:34.977655 - {PRESEED_CONFIG}: None
226 06:16:34.977710 - {PRESEED_LOCAL}: None
227 06:16:34.977765 - {RAMDISK}: 11005216/tftp-deploy-2lmen4ez/ramdisk/ramdisk.cpio.gz
228 06:16:34.977819 - {ROOT_PART}: None
229 06:16:34.977873 - {ROOT}: None
230 06:16:34.977927 - {SERVER_IP}: 192.168.201.1
231 06:16:34.977979 - {TEE}: None
232 06:16:34.978032 Parsed boot commands:
233 06:16:34.978085 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
234 06:16:34.978255 Parsed boot commands: tftpboot 192.168.201.1 11005216/tftp-deploy-2lmen4ez/kernel/bzImage 11005216/tftp-deploy-2lmen4ez/kernel/cmdline 11005216/tftp-deploy-2lmen4ez/ramdisk/ramdisk.cpio.gz
235 06:16:34.978342 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
236 06:16:34.978427 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
237 06:16:34.978515 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
238 06:16:34.978597 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
239 06:16:34.978667 Not connected, no need to disconnect.
240 06:16:34.978740 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
241 06:16:34.978822 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
242 06:16:34.978888 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cbv514-1h-34uz-brya-cbg-5'
243 06:16:34.982600 Setting prompt string to ['lava-test: # ']
244 06:16:34.982940 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
245 06:16:34.983048 end: 2.2.1 reset-connection (duration 00:00:00) [common]
246 06:16:34.983142 start: 2.2.2 reset-device (timeout 00:05:00) [common]
247 06:16:34.983227 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
248 06:16:34.983419 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=reboot'
249 06:16:40.115739 >> Command sent successfully.
250 06:16:40.118137 Returned 0 in 5 seconds
251 06:16:40.218515 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
253 06:16:40.218843 end: 2.2.2 reset-device (duration 00:00:05) [common]
254 06:16:40.218939 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
255 06:16:40.219026 Setting prompt string to 'Starting depthcharge on Volmar...'
256 06:16:40.219094 Changing prompt to 'Starting depthcharge on Volmar...'
257 06:16:40.219161 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
258 06:16:40.219415 [Enter `^Ec?' for help]
259 06:16:41.596459
260 06:16:41.596622
261 06:16:41.604349 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
262 06:16:41.608033 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
263 06:16:41.611782 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
264 06:16:41.619373 CPU: AES supported, TXT NOT supported, VT supported
265 06:16:41.626735 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
266 06:16:41.626840 Cache size = 10 MiB
267 06:16:41.634234 MCH: device id 4609 (rev 04) is Alderlake-P
268 06:16:41.638269 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
269 06:16:41.641716 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
270 06:16:41.645240 VBOOT: Loading verstage.
271 06:16:41.648935 FMAP: Found "FLASH" version 1.1 at 0x1804000.
272 06:16:41.656139 FMAP: base = 0x0 size = 0x2000000 #areas = 37
273 06:16:41.659162 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
274 06:16:41.665558 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
275 06:16:41.675329 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
276 06:16:41.675477
277 06:16:41.675575
278 06:16:41.685591 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
279 06:16:41.689578 Probing TPM I2C: I2C bus 1 version 0x3230302a
280 06:16:41.693140 DW I2C bus 1 at 0xfe022000 (400 KHz)
281 06:16:41.696392 I2C TX abort detected (00000001)
282 06:16:41.699712 cr50_i2c_read: Address write failed
283 06:16:41.713490 .done! DID_VID 0x00281ae0
284 06:16:41.716523 TPM ready after 0 ms
285 06:16:41.719686 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
286 06:16:41.733157 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
287 06:16:41.740192 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
288 06:16:41.792601 tlcl_send_startup: Startup return code is 0
289 06:16:41.792824 TPM: setup succeeded
290 06:16:41.815747 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
291 06:16:41.837132 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
292 06:16:41.841448 Chrome EC: UHEPI supported
293 06:16:41.844406 Reading cr50 boot mode
294 06:16:41.860303 Cr50 says boot_mode is VERIFIED_RW(0x00).
295 06:16:41.860470 Phase 1
296 06:16:41.863346 FMAP: area GBB found @ 1805000 (458752 bytes)
297 06:16:41.874087 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
298 06:16:41.880533 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
299 06:16:41.887089 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
300 06:16:41.887221 Phase 2
301 06:16:41.887293 Phase 3
302 06:16:41.894074 FMAP: area GBB found @ 1805000 (458752 bytes)
303 06:16:41.897140 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 06:16:41.904055 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 06:16:41.911163 VB2:vb2_verify_keyblock() Checking keyblock signature...
306 06:16:41.914857 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
307 06:16:41.926175 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
308 06:16:41.932714 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
309 06:16:41.944649 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
310 06:16:41.947854 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
311 06:16:41.954781 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 06:16:41.961256 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
313 06:16:41.968013 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 06:16:41.974578 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 06:16:41.978189 Phase 4
316 06:16:41.981688 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
317 06:16:41.988380 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
318 06:16:42.200966 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
319 06:16:42.207643 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
320 06:16:42.210493 Saving vboot hash.
321 06:16:42.217252 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
322 06:16:42.233791 tlcl_extend: response is 0
323 06:16:42.240119 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
324 06:16:42.246326 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
325 06:16:42.260828 tlcl_extend: response is 0
326 06:16:42.267456 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
327 06:16:42.288982 tlcl_lock_nv_write: response is 0
328 06:16:42.306980 tlcl_lock_nv_write: response is 0
329 06:16:42.307078 Slot A is selected
330 06:16:42.313191 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
331 06:16:42.320250 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
332 06:16:42.326888 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
333 06:16:42.333575 BS: verstage times (exec / console): total (unknown) / 264 ms
334 06:16:42.333678
335 06:16:42.333746
336 06:16:42.339970 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
337 06:16:42.345137 Google Chrome EC: version:
338 06:16:42.348243 ro: volmar_v2.0.14126-e605144e9c
339 06:16:42.351404 rw: volmar_v0.0.55-22d1557
340 06:16:42.355697 running image: 2
341 06:16:42.358211 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
342 06:16:42.368657 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 06:16:42.374906 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 06:16:42.382084 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
345 06:16:42.391834 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
346 06:16:42.401745 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
347 06:16:42.405377 EC took 982us to calculate image hash
348 06:16:42.415424 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
349 06:16:42.418136 VB2:sync_ec() select_rw=RW(active)
350 06:16:42.430425 Waited 595us to clear limit power flag.
351 06:16:42.433585 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 06:16:42.437399 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 06:16:42.440586 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
354 06:16:42.447196 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
355 06:16:42.450314 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
356 06:16:42.453782 TCO_STS: 0000 0000
357 06:16:42.457290 GEN_PMCON: d0015038 00002200
358 06:16:42.457373 GBLRST_CAUSE: 00000000 00000000
359 06:16:42.460695 HPR_CAUSE0: 00000000
360 06:16:42.464099 prev_sleep_state 5
361 06:16:42.466956 Abort disabling TXT, as CPU is not TXT capable.
362 06:16:42.474653 cse_lite: Number of partitions = 3
363 06:16:42.477792 cse_lite: Current partition = RO
364 06:16:42.477874 cse_lite: Next partition = RO
365 06:16:42.481521 cse_lite: Flags = 0x7
366 06:16:42.487624 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
367 06:16:42.497550 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
368 06:16:42.500983 FMAP: area SI_ME found @ 1000 (5238784 bytes)
369 06:16:42.507587 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
370 06:16:42.514140 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
371 06:16:42.521024 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
372 06:16:42.524648 cse_lite: CSE CBFS RW version : 16.1.25.2049
373 06:16:42.531170 cse_lite: Set Boot Partition Info Command (RW)
374 06:16:42.534631 HECI: Global Reset(Type:1) Command
375 06:16:43.955478 �&6���7l�ock starting (log level: 8)...
376 06:16:43.958897 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
377 06:16:43.962204 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
378 06:16:43.969306 CPU: AES supported, TXT NOT supported, VT supported
379 06:16:43.975477 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
380 06:16:43.979480 Cache size = 10 MiB
381 06:16:43.982621 MCH: device id 4609 (rev 04) is Alderlake-P
382 06:16:43.986277 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
383 06:16:43.992505 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
384 06:16:43.996893 VBOOT: Loading verstage.
385 06:16:44.000114 FMAP: Found "FLASH" version 1.1 at 0x1804000.
386 06:16:44.003677 FMAP: base = 0x0 size = 0x2000000 #areas = 37
387 06:16:44.010375 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
388 06:16:44.017734 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
389 06:16:44.024246 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
390 06:16:44.028072
391 06:16:44.028596
392 06:16:44.034618 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
393 06:16:44.041394 Probing TPM I2C: I2C bus 1 version 0x3230302a
394 06:16:44.044576 DW I2C bus 1 at 0xfe022000 (400 KHz)
395 06:16:44.048097 done! DID_VID 0x00281ae0
396 06:16:44.051444 TPM ready after 0 ms
397 06:16:44.055484 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
398 06:16:44.063546 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
399 06:16:44.070749 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
400 06:16:44.125798 tlcl_send_startup: Startup return code is 0
401 06:16:44.126312 TPM: setup succeeded
402 06:16:44.145781 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
403 06:16:44.167897 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
404 06:16:44.171828 Chrome EC: UHEPI supported
405 06:16:44.174772 Reading cr50 boot mode
406 06:16:44.189602 Cr50 says boot_mode is VERIFIED_RW(0x00).
407 06:16:44.190122 Phase 1
408 06:16:44.196665 FMAP: area GBB found @ 1805000 (458752 bytes)
409 06:16:44.203091 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
410 06:16:44.210069 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
411 06:16:44.216458 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
412 06:16:44.216979 Phase 2
413 06:16:44.219887 Phase 3
414 06:16:44.223664 FMAP: area GBB found @ 1805000 (458752 bytes)
415 06:16:44.230089 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
416 06:16:44.233574 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
417 06:16:44.239751 VB2:vb2_verify_keyblock() Checking keyblock signature...
418 06:16:44.246736 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
419 06:16:44.253331 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
420 06:16:44.263081 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
421 06:16:44.274523 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
422 06:16:44.278112 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
423 06:16:44.285236 VB2:vb2_verify_fw_preamble() Verifying preamble.
424 06:16:44.291981 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
425 06:16:44.298251 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
426 06:16:44.304341 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
427 06:16:44.308562 Phase 4
428 06:16:44.312099 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
429 06:16:44.318673 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
430 06:16:44.531649 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
431 06:16:44.537622 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
432 06:16:44.541380 Saving vboot hash.
433 06:16:44.548325 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
434 06:16:44.563905 tlcl_extend: response is 0
435 06:16:44.570453 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
436 06:16:44.574217 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
437 06:16:44.592139 tlcl_extend: response is 0
438 06:16:44.598297 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
439 06:16:44.617226 tlcl_lock_nv_write: response is 0
440 06:16:44.634566 tlcl_lock_nv_write: response is 0
441 06:16:44.635089 Slot A is selected
442 06:16:44.641133 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
443 06:16:44.647947 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
444 06:16:44.654323 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
445 06:16:44.661266 BS: verstage times (exec / console): total (unknown) / 256 ms
446 06:16:44.661786
447 06:16:44.662120
448 06:16:44.667787 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
449 06:16:44.671719 Google Chrome EC: version:
450 06:16:44.675406 ro: volmar_v2.0.14126-e605144e9c
451 06:16:44.678104 rw: volmar_v0.0.55-22d1557
452 06:16:44.681696 running image: 2
453 06:16:44.685326 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
454 06:16:44.695035 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
455 06:16:44.701709 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
456 06:16:44.708483 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
457 06:16:44.718018 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
458 06:16:44.728216 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
459 06:16:44.731929 EC took 940us to calculate image hash
460 06:16:44.741450 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
461 06:16:44.744870 VB2:sync_ec() select_rw=RW(active)
462 06:16:44.758008 Waited 270us to clear limit power flag.
463 06:16:44.761401 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
464 06:16:44.765342 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
465 06:16:44.768616 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
466 06:16:44.775053 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
467 06:16:44.778304 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
468 06:16:44.778723 TCO_STS: 0000 0000
469 06:16:44.781731 GEN_PMCON: d1001038 00002200
470 06:16:44.784929 GBLRST_CAUSE: 00000040 00000000
471 06:16:44.788269 HPR_CAUSE0: 00000000
472 06:16:44.791977 prev_sleep_state 5
473 06:16:44.794797 Abort disabling TXT, as CPU is not TXT capable.
474 06:16:44.802077 cse_lite: Number of partitions = 3
475 06:16:44.805800 cse_lite: Current partition = RW
476 06:16:44.806290 cse_lite: Next partition = RW
477 06:16:44.808764 cse_lite: Flags = 0x7
478 06:16:44.816012 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
479 06:16:44.825539 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
480 06:16:44.828837 FMAP: area SI_ME found @ 1000 (5238784 bytes)
481 06:16:44.835707 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
482 06:16:44.842386 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
483 06:16:44.848702 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
484 06:16:44.852085 cse_lite: CSE CBFS RW version : 16.1.25.2049
485 06:16:44.855549 Boot Count incremented to 2634
486 06:16:44.862044 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
487 06:16:44.868844 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
488 06:16:44.881425 Probing TPM I2C: done! DID_VID 0x00281ae0
489 06:16:44.884816 Locality already claimed
490 06:16:44.888272 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
491 06:16:44.907938 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
492 06:16:44.914311 MRC: Hash idx 0x100d comparison successful.
493 06:16:44.917702 MRC cache found, size f6c8
494 06:16:44.918240 bootmode is set to: 2
495 06:16:44.921913 EC returned error result code 3
496 06:16:44.924332 FW_CONFIG value from CBI is 0x131
497 06:16:44.931189 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
498 06:16:44.934589 SPD index = 0
499 06:16:44.941213 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
500 06:16:44.941936 SPD: module type is LPDDR4X
501 06:16:44.948224 SPD: module part number is K4U6E3S4AB-MGCL
502 06:16:44.954809 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
503 06:16:44.958177 SPD: device width 16 bits, bus width 16 bits
504 06:16:44.962081 SPD: module size is 1024 MB (per channel)
505 06:16:45.031073 CBMEM:
506 06:16:45.033970 IMD: root @ 0x76fff000 254 entries.
507 06:16:45.036814 IMD: root @ 0x76ffec00 62 entries.
508 06:16:45.044712 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
509 06:16:45.047899 RO_VPD is uninitialized or empty.
510 06:16:45.051606 FMAP: area RW_VPD found @ f29000 (8192 bytes)
511 06:16:45.054933 RW_VPD is uninitialized or empty.
512 06:16:45.061488 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
513 06:16:45.065151 External stage cache:
514 06:16:45.068398 IMD: root @ 0x7bbff000 254 entries.
515 06:16:45.071480 IMD: root @ 0x7bbfec00 62 entries.
516 06:16:45.078177 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
517 06:16:45.084862 MRC: Checking cached data update for 'RW_MRC_CACHE'.
518 06:16:45.088507 MRC: 'RW_MRC_CACHE' does not need update.
519 06:16:45.088826 8 DIMMs found
520 06:16:45.091526 SMM Memory Map
521 06:16:45.095009 SMRAM : 0x7b800000 0x800000
522 06:16:45.098681 Subregion 0: 0x7b800000 0x200000
523 06:16:45.101937 Subregion 1: 0x7ba00000 0x200000
524 06:16:45.105562 Subregion 2: 0x7bc00000 0x400000
525 06:16:45.108816 top_of_ram = 0x77000000
526 06:16:45.111864 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
527 06:16:45.118887 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
528 06:16:45.121761 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
529 06:16:45.128842 MTRR Range: Start=ff000000 End=0 (Size 1000000)
530 06:16:45.129394 Normal boot
531 06:16:45.138886 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
532 06:16:45.145479 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
533 06:16:45.152107 Processing 237 relocs. Offset value of 0x74ab9000
534 06:16:45.160053 BS: romstage times (exec / console): total (unknown) / 380 ms
535 06:16:45.167107
536 06:16:45.167623
537 06:16:45.173203 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
538 06:16:45.173625 Normal boot
539 06:16:45.180865 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
540 06:16:45.187030 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
541 06:16:45.193476 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
542 06:16:45.203759 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
543 06:16:45.250978 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
544 06:16:45.257527 Processing 5931 relocs. Offset value of 0x72a2f000
545 06:16:45.261452 BS: postcar times (exec / console): total (unknown) / 51 ms
546 06:16:45.264033
547 06:16:45.264552
548 06:16:45.270819 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
549 06:16:45.274447 Reserving BERT start 76a1e000, size 10000
550 06:16:45.277823 Normal boot
551 06:16:45.281300 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
552 06:16:45.287520 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
553 06:16:45.297692 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
554 06:16:45.300658 FMAP: area RW_VPD found @ f29000 (8192 bytes)
555 06:16:45.304768 Google Chrome EC: version:
556 06:16:45.307777 ro: volmar_v2.0.14126-e605144e9c
557 06:16:45.310836 rw: volmar_v0.0.55-22d1557
558 06:16:45.311360 running image: 2
559 06:16:45.317960 ACPI _SWS is PM1 Index 8 GPE Index -1
560 06:16:45.320763 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
561 06:16:45.325776 EC returned error result code 3
562 06:16:45.329061 FW_CONFIG value from CBI is 0x131
563 06:16:45.336660 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
564 06:16:45.339817 PCI: 00:1c.2 disabled by fw_config
565 06:16:45.347124 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
566 06:16:45.349849 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
567 06:16:45.356760 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
568 06:16:45.360253 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
569 06:16:45.366456 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
570 06:16:45.372955 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
571 06:16:45.375983 microcode: sig=0x906a4 pf=0x80 revision=0x423
572 06:16:45.383367 microcode: Update skipped, already up-to-date
573 06:16:45.389802 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
574 06:16:45.421852 Detected 6 core, 8 thread CPU.
575 06:16:45.425146 Setting up SMI for CPU
576 06:16:45.428188 IED base = 0x7bc00000
577 06:16:45.428607 IED size = 0x00400000
578 06:16:45.431916 Will perform SMM setup.
579 06:16:45.435010 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
580 06:16:45.439092 LAPIC 0x0 in XAPIC mode.
581 06:16:45.448437 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
582 06:16:45.451932 Processing 18 relocs. Offset value of 0x00030000
583 06:16:45.456992 Attempting to start 7 APs
584 06:16:45.460197 Waiting for 10ms after sending INIT.
585 06:16:45.472730 Waiting for SIPI to complete...
586 06:16:45.475707 LAPIC 0x1 in XAPIC mode.
587 06:16:45.476127 done.
588 06:16:45.482691 AP: slot 5 apic_id 1, MCU rev: 0x00000423
589 06:16:45.483231 LAPIC 0x12 in XAPIC mode.
590 06:16:45.486436 LAPIC 0x8 in XAPIC mode.
591 06:16:45.489163 LAPIC 0x9 in XAPIC mode.
592 06:16:45.492656 LAPIC 0x10 in XAPIC mode.
593 06:16:45.496272 AP: slot 6 apic_id 8, MCU rev: 0x00000423
594 06:16:45.499911 LAPIC 0x14 in XAPIC mode.
595 06:16:45.502713 AP: slot 7 apic_id 9, MCU rev: 0x00000423
596 06:16:45.506490 AP: slot 1 apic_id 14, MCU rev: 0x00000423
597 06:16:45.512960 AP: slot 3 apic_id 10, MCU rev: 0x00000423
598 06:16:45.516267 AP: slot 4 apic_id 12, MCU rev: 0x00000423
599 06:16:45.519384 LAPIC 0x16 in XAPIC mode.
600 06:16:45.522771 Waiting for SIPI to complete...
601 06:16:45.523289 done.
602 06:16:45.526561 AP: slot 2 apic_id 16, MCU rev: 0x00000423
603 06:16:45.529506 smm_setup_relocation_handler: enter
604 06:16:45.532421 smm_setup_relocation_handler: exit
605 06:16:45.542276 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
606 06:16:45.545593 Processing 11 relocs. Offset value of 0x00038000
607 06:16:45.552821 smm_module_setup_stub: stack_top = 0x7b804000
608 06:16:45.555813 smm_module_setup_stub: per cpu stack_size = 0x800
609 06:16:45.562192 smm_module_setup_stub: runtime.start32_offset = 0x4c
610 06:16:45.565379 smm_module_setup_stub: runtime.smm_size = 0x10000
611 06:16:45.572441 SMM Module: stub loaded at 38000. Will call 0x76a52094
612 06:16:45.575684 Installing permanent SMM handler to 0x7b800000
613 06:16:45.582301 smm_load_module: total_smm_space_needed e468, available -> 200000
614 06:16:45.592494 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
615 06:16:45.595846 Processing 255 relocs. Offset value of 0x7b9f6000
616 06:16:45.602995 smm_load_module: smram_start: 0x7b800000
617 06:16:45.605983 smm_load_module: smram_end: 7ba00000
618 06:16:45.609073 smm_load_module: handler start 0x7b9f6d5f
619 06:16:45.612445 smm_load_module: handler_size 98d0
620 06:16:45.615942 smm_load_module: fxsave_area 0x7b9ff000
621 06:16:45.619088 smm_load_module: fxsave_size 1000
622 06:16:45.622476 smm_load_module: CONFIG_MSEG_SIZE 0x0
623 06:16:45.629850 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
624 06:16:45.636001 smm_load_module: handler_mod_params.smbase = 0x7b800000
625 06:16:45.639260 smm_load_module: per_cpu_save_state_size = 0x400
626 06:16:45.642698 smm_load_module: num_cpus = 0x8
627 06:16:45.649093 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
628 06:16:45.652334 smm_load_module: total_save_state_size = 0x2000
629 06:16:45.656228 smm_load_module: cpu0 entry: 7b9e6000
630 06:16:45.662763 smm_create_map: cpus allowed in one segment 30
631 06:16:45.665641 smm_create_map: min # of segments needed 1
632 06:16:45.666080 CPU 0x0
633 06:16:45.668891 smbase 7b9e6000 entry 7b9ee000
634 06:16:45.675437 ss_start 7b9f5c00 code_end 7b9ee208
635 06:16:45.676056 CPU 0x1
636 06:16:45.678885 smbase 7b9e5c00 entry 7b9edc00
637 06:16:45.685433 ss_start 7b9f5800 code_end 7b9ede08
638 06:16:45.685864 CPU 0x2
639 06:16:45.689275 smbase 7b9e5800 entry 7b9ed800
640 06:16:45.692323 ss_start 7b9f5400 code_end 7b9eda08
641 06:16:45.695510 CPU 0x3
642 06:16:45.699247 smbase 7b9e5400 entry 7b9ed400
643 06:16:45.702208 ss_start 7b9f5000 code_end 7b9ed608
644 06:16:45.705726 CPU 0x4
645 06:16:45.708879 smbase 7b9e5000 entry 7b9ed000
646 06:16:45.712466 ss_start 7b9f4c00 code_end 7b9ed208
647 06:16:45.712989 CPU 0x5
648 06:16:45.715538 smbase 7b9e4c00 entry 7b9ecc00
649 06:16:45.722379 ss_start 7b9f4800 code_end 7b9ece08
650 06:16:45.722905 CPU 0x6
651 06:16:45.725782 smbase 7b9e4800 entry 7b9ec800
652 06:16:45.732178 ss_start 7b9f4400 code_end 7b9eca08
653 06:16:45.732710 CPU 0x7
654 06:16:45.735566 smbase 7b9e4400 entry 7b9ec400
655 06:16:45.739086 ss_start 7b9f4000 code_end 7b9ec608
656 06:16:45.748902 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
657 06:16:45.752003 Processing 11 relocs. Offset value of 0x7b9ee000
658 06:16:45.759694 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
659 06:16:45.765373 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
660 06:16:45.772229 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
661 06:16:45.778773 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
662 06:16:45.785695 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
663 06:16:45.788903 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
664 06:16:45.795731 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
665 06:16:45.802514 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
666 06:16:45.808981 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
667 06:16:45.815791 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
668 06:16:45.822626 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
669 06:16:45.829624 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
670 06:16:45.835680 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
671 06:16:45.839072 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
672 06:16:45.845492 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
673 06:16:45.852138 smm_module_setup_stub: stack_top = 0x7b804000
674 06:16:45.855806 smm_module_setup_stub: per cpu stack_size = 0x800
675 06:16:45.862259 smm_module_setup_stub: runtime.start32_offset = 0x4c
676 06:16:45.865253 smm_module_setup_stub: runtime.smm_size = 0x200000
677 06:16:45.872298 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
678 06:16:45.876742 Clearing SMI status registers
679 06:16:45.880009 SMI_STS: PM1
680 06:16:45.880432 PM1_STS: WAK PWRBTN
681 06:16:45.889713 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
682 06:16:45.893462 In relocation handler: CPU 0
683 06:16:45.896523 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
684 06:16:45.900184 Writing SMRR. base = 0x7b800006, mask=0xff800c00
685 06:16:45.903130 Relocation complete.
686 06:16:45.909812 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
687 06:16:45.913894 In relocation handler: CPU 5
688 06:16:45.916413 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
689 06:16:45.919712 Relocation complete.
690 06:16:45.926514 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
691 06:16:45.929835 In relocation handler: CPU 1
692 06:16:45.933487 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
693 06:16:45.936716 Writing SMRR. base = 0x7b800006, mask=0xff800c00
694 06:16:45.939794 Relocation complete.
695 06:16:45.946886 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
696 06:16:45.949633 In relocation handler: CPU 2
697 06:16:45.953380 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
698 06:16:45.960307 Writing SMRR. base = 0x7b800006, mask=0xff800c00
699 06:16:45.960841 Relocation complete.
700 06:16:45.970085 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
701 06:16:45.973794 In relocation handler: CPU 3
702 06:16:45.976221 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
703 06:16:45.979622 Writing SMRR. base = 0x7b800006, mask=0xff800c00
704 06:16:45.983211 Relocation complete.
705 06:16:45.990482 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
706 06:16:45.993222 In relocation handler: CPU 4
707 06:16:45.996623 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
708 06:16:46.003784 Writing SMRR. base = 0x7b800006, mask=0xff800c00
709 06:16:46.004309 Relocation complete.
710 06:16:46.010004 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
711 06:16:46.013844 In relocation handler: CPU 6
712 06:16:46.016936 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
713 06:16:46.023204 Writing SMRR. base = 0x7b800006, mask=0xff800c00
714 06:16:46.026744 Relocation complete.
715 06:16:46.033147 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
716 06:16:46.037011 In relocation handler: CPU 7
717 06:16:46.040175 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
718 06:16:46.040710 Relocation complete.
719 06:16:46.043278 Initializing CPU #0
720 06:16:46.046589 CPU: vendor Intel device 906a4
721 06:16:46.050089 CPU: family 06, model 9a, stepping 04
722 06:16:46.054032 Clearing out pending MCEs
723 06:16:46.056746 cpu: energy policy set to 7
724 06:16:46.059895 Turbo is available but hidden
725 06:16:46.063311 Turbo is available and visible
726 06:16:46.066848 microcode: Update skipped, already up-to-date
727 06:16:46.069924 CPU #0 initialized
728 06:16:46.070416 Initializing CPU #5
729 06:16:46.074114 Initializing CPU #2
730 06:16:46.074639 Initializing CPU #4
731 06:16:46.076513 Initializing CPU #3
732 06:16:46.080047 CPU: vendor Intel device 906a4
733 06:16:46.083633 CPU: family 06, model 9a, stepping 04
734 06:16:46.087132 CPU: vendor Intel device 906a4
735 06:16:46.090567 CPU: family 06, model 9a, stepping 04
736 06:16:46.094054 Initializing CPU #1
737 06:16:46.097163 CPU: vendor Intel device 906a4
738 06:16:46.100311 CPU: family 06, model 9a, stepping 04
739 06:16:46.103437 CPU: vendor Intel device 906a4
740 06:16:46.106689 CPU: family 06, model 9a, stepping 04
741 06:16:46.110085 Clearing out pending MCEs
742 06:16:46.113556 Clearing out pending MCEs
743 06:16:46.116779 CPU: vendor Intel device 906a4
744 06:16:46.120135 CPU: family 06, model 9a, stepping 04
745 06:16:46.120658 Initializing CPU #6
746 06:16:46.123766 cpu: energy policy set to 7
747 06:16:46.126651 Clearing out pending MCEs
748 06:16:46.130443 cpu: energy policy set to 7
749 06:16:46.133435 Clearing out pending MCEs
750 06:16:46.133900 cpu: energy policy set to 7
751 06:16:46.136765 cpu: energy policy set to 7
752 06:16:46.140258 Initializing CPU #7
753 06:16:46.143180 microcode: Update skipped, already up-to-date
754 06:16:46.146539 CPU #4 initialized
755 06:16:46.150127 microcode: Update skipped, already up-to-date
756 06:16:46.153078 CPU #1 initialized
757 06:16:46.157210 CPU: vendor Intel device 906a4
758 06:16:46.160586 CPU: family 06, model 9a, stepping 04
759 06:16:46.163738 CPU: vendor Intel device 906a4
760 06:16:46.166603 CPU: family 06, model 9a, stepping 04
761 06:16:46.170245 Clearing out pending MCEs
762 06:16:46.173244 microcode: Update skipped, already up-to-date
763 06:16:46.176457 CPU #2 initialized
764 06:16:46.179618 microcode: Update skipped, already up-to-date
765 06:16:46.183618 CPU #5 initialized
766 06:16:46.186637 cpu: energy policy set to 7
767 06:16:46.187063 Clearing out pending MCEs
768 06:16:46.193512 microcode: Update skipped, already up-to-date
769 06:16:46.194043 CPU #3 initialized
770 06:16:46.196663 cpu: energy policy set to 7
771 06:16:46.200208 Clearing out pending MCEs
772 06:16:46.203562 microcode: Update skipped, already up-to-date
773 06:16:46.206801 CPU #7 initialized
774 06:16:46.209790 cpu: energy policy set to 7
775 06:16:46.213496 microcode: Update skipped, already up-to-date
776 06:16:46.216524 CPU #6 initialized
777 06:16:46.220387 bsp_do_flight_plan done after 693 msecs.
778 06:16:46.223609 CPU: frequency set to 4400 MHz
779 06:16:46.224140 Enabling SMIs.
780 06:16:46.229612 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
781 06:16:46.247117 Probing TPM I2C: done! DID_VID 0x00281ae0
782 06:16:46.250761 Locality already claimed
783 06:16:46.253514 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
784 06:16:46.265257 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
785 06:16:46.268491 Enabling GPIO PM b/c CR50 has long IRQ pulse support
786 06:16:46.275542 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
787 06:16:46.282372 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
788 06:16:46.285497 Found a VBT of 9216 bytes after decompression
789 06:16:46.288762 PCI 1.0, PIN A, using IRQ #16
790 06:16:46.292301 PCI 2.0, PIN A, using IRQ #17
791 06:16:46.295321 PCI 4.0, PIN A, using IRQ #18
792 06:16:46.298686 PCI 5.0, PIN A, using IRQ #16
793 06:16:46.302122 PCI 6.0, PIN A, using IRQ #16
794 06:16:46.305803 PCI 6.2, PIN C, using IRQ #18
795 06:16:46.308822 PCI 7.0, PIN A, using IRQ #19
796 06:16:46.312121 PCI 7.1, PIN B, using IRQ #20
797 06:16:46.315640 PCI 7.2, PIN C, using IRQ #21
798 06:16:46.318874 PCI 7.3, PIN D, using IRQ #22
799 06:16:46.321964 PCI 8.0, PIN A, using IRQ #23
800 06:16:46.325497 PCI D.0, PIN A, using IRQ #17
801 06:16:46.326073 PCI D.1, PIN B, using IRQ #19
802 06:16:46.328520 PCI 10.0, PIN A, using IRQ #24
803 06:16:46.332216 PCI 10.1, PIN B, using IRQ #25
804 06:16:46.335299 PCI 10.6, PIN C, using IRQ #20
805 06:16:46.338223 PCI 10.7, PIN D, using IRQ #21
806 06:16:46.341794 PCI 11.0, PIN A, using IRQ #26
807 06:16:46.345237 PCI 11.1, PIN B, using IRQ #27
808 06:16:46.348086 PCI 11.2, PIN C, using IRQ #28
809 06:16:46.351757 PCI 11.3, PIN D, using IRQ #29
810 06:16:46.355860 PCI 12.0, PIN A, using IRQ #30
811 06:16:46.358845 PCI 12.6, PIN B, using IRQ #31
812 06:16:46.362058 PCI 12.7, PIN C, using IRQ #22
813 06:16:46.365173 PCI 13.0, PIN A, using IRQ #32
814 06:16:46.368619 PCI 13.1, PIN B, using IRQ #33
815 06:16:46.371682 PCI 13.2, PIN C, using IRQ #34
816 06:16:46.375471 PCI 13.3, PIN D, using IRQ #35
817 06:16:46.376001 PCI 14.0, PIN B, using IRQ #23
818 06:16:46.378490 PCI 14.1, PIN A, using IRQ #36
819 06:16:46.381492 PCI 14.3, PIN C, using IRQ #17
820 06:16:46.385080 PCI 15.0, PIN A, using IRQ #37
821 06:16:46.388379 PCI 15.1, PIN B, using IRQ #38
822 06:16:46.391778 PCI 15.2, PIN C, using IRQ #39
823 06:16:46.395581 PCI 15.3, PIN D, using IRQ #40
824 06:16:46.398821 PCI 16.0, PIN A, using IRQ #18
825 06:16:46.402072 PCI 16.1, PIN B, using IRQ #19
826 06:16:46.404938 PCI 16.2, PIN C, using IRQ #20
827 06:16:46.408776 PCI 16.3, PIN D, using IRQ #21
828 06:16:46.411654 PCI 16.4, PIN A, using IRQ #18
829 06:16:46.415521 PCI 16.5, PIN B, using IRQ #19
830 06:16:46.418330 PCI 17.0, PIN A, using IRQ #22
831 06:16:46.421608 PCI 19.0, PIN A, using IRQ #41
832 06:16:46.425272 PCI 19.1, PIN B, using IRQ #42
833 06:16:46.428302 PCI 19.2, PIN C, using IRQ #43
834 06:16:46.428833 PCI 1C.0, PIN A, using IRQ #16
835 06:16:46.431330 PCI 1C.1, PIN B, using IRQ #17
836 06:16:46.435016 PCI 1C.2, PIN C, using IRQ #18
837 06:16:46.438021 PCI 1C.3, PIN D, using IRQ #19
838 06:16:46.441144 PCI 1C.4, PIN A, using IRQ #16
839 06:16:46.444957 PCI 1C.5, PIN B, using IRQ #17
840 06:16:46.447736 PCI 1C.6, PIN C, using IRQ #18
841 06:16:46.451492 PCI 1C.7, PIN D, using IRQ #19
842 06:16:46.454662 PCI 1D.0, PIN A, using IRQ #16
843 06:16:46.457931 PCI 1D.1, PIN B, using IRQ #17
844 06:16:46.461807 PCI 1D.2, PIN C, using IRQ #18
845 06:16:46.464816 PCI 1D.3, PIN D, using IRQ #19
846 06:16:46.467811 PCI 1E.0, PIN A, using IRQ #23
847 06:16:46.471476 PCI 1E.1, PIN B, using IRQ #20
848 06:16:46.474839 PCI 1E.2, PIN C, using IRQ #44
849 06:16:46.477691 PCI 1E.3, PIN D, using IRQ #45
850 06:16:46.481810 PCI 1F.3, PIN B, using IRQ #22
851 06:16:46.482243 PCI 1F.4, PIN C, using IRQ #23
852 06:16:46.485182 PCI 1F.6, PIN D, using IRQ #20
853 06:16:46.487917 PCI 1F.7, PIN A, using IRQ #21
854 06:16:46.494512 IRQ: Using dynamically assigned PCI IO-APIC IRQs
855 06:16:46.500523 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
856 06:16:46.683811 FSPS returned 0
857 06:16:46.687009 Executing Phase 1 of FspMultiPhaseSiInit
858 06:16:46.696707 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
859 06:16:46.700253 port C0 DISC req: usage 1 usb3 1 usb2 1
860 06:16:46.703460 Raw Buffer output 0 00000111
861 06:16:46.706744 Raw Buffer output 1 00000000
862 06:16:46.710470 pmc_send_ipc_cmd succeeded
863 06:16:46.717050 port C1 DISC req: usage 1 usb3 3 usb2 3
864 06:16:46.717651 Raw Buffer output 0 00000331
865 06:16:46.720230 Raw Buffer output 1 00000000
866 06:16:46.724641 pmc_send_ipc_cmd succeeded
867 06:16:46.728156 Detected 6 core, 8 thread CPU.
868 06:16:46.731378 Detected 6 core, 8 thread CPU.
869 06:16:46.737400 Detected 6 core, 8 thread CPU.
870 06:16:46.740050 Detected 6 core, 8 thread CPU.
871 06:16:46.743348 Detected 6 core, 8 thread CPU.
872 06:16:46.746836 Detected 6 core, 8 thread CPU.
873 06:16:46.750484 Detected 6 core, 8 thread CPU.
874 06:16:46.753561 Detected 6 core, 8 thread CPU.
875 06:16:46.757064 Detected 6 core, 8 thread CPU.
876 06:16:46.759942 Detected 6 core, 8 thread CPU.
877 06:16:46.763862 Detected 6 core, 8 thread CPU.
878 06:16:46.766871 Detected 6 core, 8 thread CPU.
879 06:16:46.770090 Detected 6 core, 8 thread CPU.
880 06:16:46.773368 Detected 6 core, 8 thread CPU.
881 06:16:46.776476 Detected 6 core, 8 thread CPU.
882 06:16:46.780145 Detected 6 core, 8 thread CPU.
883 06:16:46.783783 Detected 6 core, 8 thread CPU.
884 06:16:46.786452 Detected 6 core, 8 thread CPU.
885 06:16:46.790760 Detected 6 core, 8 thread CPU.
886 06:16:46.793413 Detected 6 core, 8 thread CPU.
887 06:16:46.797178 Detected 6 core, 8 thread CPU.
888 06:16:46.797760 Detected 6 core, 8 thread CPU.
889 06:16:47.089692 Detected 6 core, 8 thread CPU.
890 06:16:47.093428 Detected 6 core, 8 thread CPU.
891 06:16:47.096905 Detected 6 core, 8 thread CPU.
892 06:16:47.100262 Detected 6 core, 8 thread CPU.
893 06:16:47.103383 Detected 6 core, 8 thread CPU.
894 06:16:47.106570 Detected 6 core, 8 thread CPU.
895 06:16:47.110036 Detected 6 core, 8 thread CPU.
896 06:16:47.113811 Detected 6 core, 8 thread CPU.
897 06:16:47.116467 Detected 6 core, 8 thread CPU.
898 06:16:47.119990 Detected 6 core, 8 thread CPU.
899 06:16:47.123017 Detected 6 core, 8 thread CPU.
900 06:16:47.126558 Detected 6 core, 8 thread CPU.
901 06:16:47.130087 Detected 6 core, 8 thread CPU.
902 06:16:47.133339 Detected 6 core, 8 thread CPU.
903 06:16:47.136836 Detected 6 core, 8 thread CPU.
904 06:16:47.139951 Detected 6 core, 8 thread CPU.
905 06:16:47.143570 Detected 6 core, 8 thread CPU.
906 06:16:47.147137 Detected 6 core, 8 thread CPU.
907 06:16:47.147714 Detected 6 core, 8 thread CPU.
908 06:16:47.149743 Detected 6 core, 8 thread CPU.
909 06:16:47.153686 Display FSP Version Info HOB
910 06:16:47.157090 Reference Code - CPU = c.0.65.70
911 06:16:47.160966 uCode Version = 0.0.4.23
912 06:16:47.163773 TXT ACM version = ff.ff.ff.ffff
913 06:16:47.166882 Reference Code - ME = c.0.65.70
914 06:16:47.170384 MEBx version = 0.0.0.0
915 06:16:47.173866 ME Firmware Version = Lite SKU
916 06:16:47.177504 Reference Code - PCH = c.0.65.70
917 06:16:47.180199 PCH-CRID Status = Disabled
918 06:16:47.183693 PCH-CRID Original Value = ff.ff.ff.ffff
919 06:16:47.186848 PCH-CRID New Value = ff.ff.ff.ffff
920 06:16:47.190130 OPROM - RST - RAID = ff.ff.ff.ffff
921 06:16:47.193577 PCH Hsio Version = 4.0.0.0
922 06:16:47.197208 Reference Code - SA - System Agent = c.0.65.70
923 06:16:47.200471 Reference Code - MRC = 0.0.3.80
924 06:16:47.203861 SA - PCIe Version = c.0.65.70
925 06:16:47.207143 SA-CRID Status = Disabled
926 06:16:47.210537 SA-CRID Original Value = 0.0.0.4
927 06:16:47.213438 SA-CRID New Value = 0.0.0.4
928 06:16:47.213910 OPROM - VBIOS = ff.ff.ff.ffff
929 06:16:47.220250 IO Manageability Engine FW Version = 24.0.4.0
930 06:16:47.223749 PHY Build Version = 0.0.0.2016
931 06:16:47.226872 Thunderbolt(TM) FW Version = 0.0.0.0
932 06:16:47.233247 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
933 06:16:47.239868 BS: BS_DEV_INIT_CHIPS run times (exec / console): 494 / 507 ms
934 06:16:47.240339 Enumerating buses...
935 06:16:47.247115 Show all devs... Before device enumeration.
936 06:16:47.247690 Root Device: enabled 1
937 06:16:47.250503 CPU_CLUSTER: 0: enabled 1
938 06:16:47.253157 DOMAIN: 0000: enabled 1
939 06:16:47.257492 GPIO: 0: enabled 1
940 06:16:47.258063 PCI: 00:00.0: enabled 1
941 06:16:47.260378 PCI: 00:01.0: enabled 0
942 06:16:47.264111 PCI: 00:01.1: enabled 0
943 06:16:47.264641 PCI: 00:02.0: enabled 1
944 06:16:47.266896 PCI: 00:04.0: enabled 1
945 06:16:47.269840 PCI: 00:05.0: enabled 0
946 06:16:47.273445 PCI: 00:06.0: enabled 1
947 06:16:47.273981 PCI: 00:06.2: enabled 0
948 06:16:47.276885 PCI: 00:07.0: enabled 0
949 06:16:47.279782 PCI: 00:07.1: enabled 0
950 06:16:47.283776 PCI: 00:07.2: enabled 0
951 06:16:47.284310 PCI: 00:07.3: enabled 0
952 06:16:47.286783 PCI: 00:08.0: enabled 0
953 06:16:47.290129 PCI: 00:09.0: enabled 0
954 06:16:47.293441 PCI: 00:0a.0: enabled 1
955 06:16:47.294021 PCI: 00:0d.0: enabled 1
956 06:16:47.297078 PCI: 00:0d.1: enabled 0
957 06:16:47.300129 PCI: 00:0d.2: enabled 0
958 06:16:47.303134 PCI: 00:0d.3: enabled 0
959 06:16:47.303662 PCI: 00:0e.0: enabled 0
960 06:16:47.306578 PCI: 00:10.0: enabled 0
961 06:16:47.309969 PCI: 00:10.1: enabled 0
962 06:16:47.310657 PCI: 00:10.6: enabled 0
963 06:16:47.313463 PCI: 00:10.7: enabled 0
964 06:16:47.317165 PCI: 00:12.0: enabled 0
965 06:16:47.320198 PCI: 00:12.6: enabled 0
966 06:16:47.320727 PCI: 00:12.7: enabled 0
967 06:16:47.323351 PCI: 00:13.0: enabled 0
968 06:16:47.326509 PCI: 00:14.0: enabled 1
969 06:16:47.329989 PCI: 00:14.1: enabled 0
970 06:16:47.330518 PCI: 00:14.2: enabled 1
971 06:16:47.333504 PCI: 00:14.3: enabled 1
972 06:16:47.336119 PCI: 00:15.0: enabled 1
973 06:16:47.340242 PCI: 00:15.1: enabled 1
974 06:16:47.340770 PCI: 00:15.2: enabled 0
975 06:16:47.343067 PCI: 00:15.3: enabled 1
976 06:16:47.346535 PCI: 00:16.0: enabled 1
977 06:16:47.346965 PCI: 00:16.1: enabled 0
978 06:16:47.350041 PCI: 00:16.2: enabled 0
979 06:16:47.353069 PCI: 00:16.3: enabled 0
980 06:16:47.356950 PCI: 00:16.4: enabled 0
981 06:16:47.357416 PCI: 00:16.5: enabled 0
982 06:16:47.360063 PCI: 00:17.0: enabled 1
983 06:16:47.363465 PCI: 00:19.0: enabled 0
984 06:16:47.366646 PCI: 00:19.1: enabled 1
985 06:16:47.367181 PCI: 00:19.2: enabled 0
986 06:16:47.369807 PCI: 00:1a.0: enabled 0
987 06:16:47.373170 PCI: 00:1c.0: enabled 0
988 06:16:47.376388 PCI: 00:1c.1: enabled 0
989 06:16:47.376920 PCI: 00:1c.2: enabled 0
990 06:16:47.379529 PCI: 00:1c.3: enabled 0
991 06:16:47.383199 PCI: 00:1c.4: enabled 0
992 06:16:47.383730 PCI: 00:1c.5: enabled 0
993 06:16:47.386346 PCI: 00:1c.6: enabled 0
994 06:16:47.389828 PCI: 00:1c.7: enabled 0
995 06:16:47.393042 PCI: 00:1d.0: enabled 0
996 06:16:47.393616 PCI: 00:1d.1: enabled 0
997 06:16:47.396783 PCI: 00:1d.2: enabled 0
998 06:16:47.399612 PCI: 00:1d.3: enabled 0
999 06:16:47.403127 PCI: 00:1e.0: enabled 1
1000 06:16:47.403666 PCI: 00:1e.1: enabled 0
1001 06:16:47.406640 PCI: 00:1e.2: enabled 0
1002 06:16:47.409783 PCI: 00:1e.3: enabled 1
1003 06:16:47.413171 PCI: 00:1f.0: enabled 1
1004 06:16:47.413706 PCI: 00:1f.1: enabled 0
1005 06:16:47.416236 PCI: 00:1f.2: enabled 1
1006 06:16:47.419845 PCI: 00:1f.3: enabled 1
1007 06:16:47.422931 PCI: 00:1f.4: enabled 0
1008 06:16:47.423459 PCI: 00:1f.5: enabled 1
1009 06:16:47.426087 PCI: 00:1f.6: enabled 0
1010 06:16:47.429756 PCI: 00:1f.7: enabled 0
1011 06:16:47.430288 GENERIC: 0.0: enabled 1
1012 06:16:47.433240 GENERIC: 0.0: enabled 1
1013 06:16:47.436326 GENERIC: 1.0: enabled 1
1014 06:16:47.439853 GENERIC: 0.0: enabled 1
1015 06:16:47.440383 GENERIC: 1.0: enabled 1
1016 06:16:47.443062 USB0 port 0: enabled 1
1017 06:16:47.446207 USB0 port 0: enabled 1
1018 06:16:47.450065 GENERIC: 0.0: enabled 1
1019 06:16:47.450622 I2C: 00:1a: enabled 1
1020 06:16:47.452943 I2C: 00:31: enabled 1
1021 06:16:47.456127 I2C: 00:32: enabled 1
1022 06:16:47.456591 I2C: 00:50: enabled 1
1023 06:16:47.459774 I2C: 00:10: enabled 1
1024 06:16:47.463148 I2C: 00:15: enabled 1
1025 06:16:47.463592 I2C: 00:2c: enabled 1
1026 06:16:47.466545 GENERIC: 0.0: enabled 1
1027 06:16:47.469853 SPI: 00: enabled 1
1028 06:16:47.470273 PNP: 0c09.0: enabled 1
1029 06:16:47.473773 GENERIC: 0.0: enabled 1
1030 06:16:47.476543 USB3 port 0: enabled 1
1031 06:16:47.477064 USB3 port 1: enabled 0
1032 06:16:47.480072 USB3 port 2: enabled 1
1033 06:16:47.483263 USB3 port 3: enabled 0
1034 06:16:47.486580 USB2 port 0: enabled 1
1035 06:16:47.487103 USB2 port 1: enabled 0
1036 06:16:47.489932 USB2 port 2: enabled 1
1037 06:16:47.493056 USB2 port 3: enabled 0
1038 06:16:47.493622 USB2 port 4: enabled 0
1039 06:16:47.496380 USB2 port 5: enabled 1
1040 06:16:47.500027 USB2 port 6: enabled 0
1041 06:16:47.500544 USB2 port 7: enabled 0
1042 06:16:47.502955 USB2 port 8: enabled 1
1043 06:16:47.506064 USB2 port 9: enabled 1
1044 06:16:47.509812 USB3 port 0: enabled 1
1045 06:16:47.510323 USB3 port 1: enabled 0
1046 06:16:47.513246 USB3 port 2: enabled 0
1047 06:16:47.516242 USB3 port 3: enabled 0
1048 06:16:47.516797 GENERIC: 0.0: enabled 1
1049 06:16:47.519707 GENERIC: 1.0: enabled 1
1050 06:16:47.523001 APIC: 00: enabled 1
1051 06:16:47.523556 APIC: 14: enabled 1
1052 06:16:47.526262 APIC: 16: enabled 1
1053 06:16:47.529942 APIC: 10: enabled 1
1054 06:16:47.530499 APIC: 12: enabled 1
1055 06:16:47.532945 APIC: 01: enabled 1
1056 06:16:47.533663 APIC: 08: enabled 1
1057 06:16:47.536383 APIC: 09: enabled 1
1058 06:16:47.539334 Compare with tree...
1059 06:16:47.539886 Root Device: enabled 1
1060 06:16:47.542841 CPU_CLUSTER: 0: enabled 1
1061 06:16:47.546648 APIC: 00: enabled 1
1062 06:16:47.549519 APIC: 14: enabled 1
1063 06:16:47.550076 APIC: 16: enabled 1
1064 06:16:47.553046 APIC: 10: enabled 1
1065 06:16:47.556306 APIC: 12: enabled 1
1066 06:16:47.556772 APIC: 01: enabled 1
1067 06:16:47.559379 APIC: 08: enabled 1
1068 06:16:47.563095 APIC: 09: enabled 1
1069 06:16:47.563668 DOMAIN: 0000: enabled 1
1070 06:16:47.566087 GPIO: 0: enabled 1
1071 06:16:47.569501 PCI: 00:00.0: enabled 1
1072 06:16:47.572449 PCI: 00:01.0: enabled 0
1073 06:16:47.572913 PCI: 00:01.1: enabled 0
1074 06:16:47.576183 PCI: 00:02.0: enabled 1
1075 06:16:47.579167 PCI: 00:04.0: enabled 1
1076 06:16:47.582817 GENERIC: 0.0: enabled 1
1077 06:16:47.587097 PCI: 00:05.0: enabled 0
1078 06:16:47.587679 PCI: 00:06.0: enabled 1
1079 06:16:47.589587 PCI: 00:06.2: enabled 0
1080 06:16:47.592978 PCI: 00:08.0: enabled 0
1081 06:16:47.596302 PCI: 00:09.0: enabled 0
1082 06:16:47.599590 PCI: 00:0a.0: enabled 1
1083 06:16:47.600169 PCI: 00:0d.0: enabled 1
1084 06:16:47.602937 USB0 port 0: enabled 1
1085 06:16:47.605919 USB3 port 0: enabled 1
1086 06:16:47.609285 USB3 port 1: enabled 0
1087 06:16:47.613084 USB3 port 2: enabled 1
1088 06:16:47.613711 USB3 port 3: enabled 0
1089 06:16:47.616624 PCI: 00:0d.1: enabled 0
1090 06:16:47.619215 PCI: 00:0d.2: enabled 0
1091 06:16:47.623410 PCI: 00:0d.3: enabled 0
1092 06:16:47.625971 PCI: 00:0e.0: enabled 0
1093 06:16:47.626555 PCI: 00:10.0: enabled 0
1094 06:16:47.629558 PCI: 00:10.1: enabled 0
1095 06:16:47.632831 PCI: 00:10.6: enabled 0
1096 06:16:47.636152 PCI: 00:10.7: enabled 0
1097 06:16:47.639862 PCI: 00:12.0: enabled 0
1098 06:16:47.640446 PCI: 00:12.6: enabled 0
1099 06:16:47.642541 PCI: 00:12.7: enabled 0
1100 06:16:47.646192 PCI: 00:13.0: enabled 0
1101 06:16:47.649457 PCI: 00:14.0: enabled 1
1102 06:16:47.653021 USB0 port 0: enabled 1
1103 06:16:47.653650 USB2 port 0: enabled 1
1104 06:16:47.656079 USB2 port 1: enabled 0
1105 06:16:47.659612 USB2 port 2: enabled 1
1106 06:16:47.662834 USB2 port 3: enabled 0
1107 06:16:47.666305 USB2 port 4: enabled 0
1108 06:16:47.666886 USB2 port 5: enabled 1
1109 06:16:47.669192 USB2 port 6: enabled 0
1110 06:16:47.672903 USB2 port 7: enabled 0
1111 06:16:47.676357 USB2 port 8: enabled 1
1112 06:16:47.679369 USB2 port 9: enabled 1
1113 06:16:47.682573 USB3 port 0: enabled 1
1114 06:16:47.683034 USB3 port 1: enabled 0
1115 06:16:47.685951 USB3 port 2: enabled 0
1116 06:16:47.689192 USB3 port 3: enabled 0
1117 06:16:47.692759 PCI: 00:14.1: enabled 0
1118 06:16:47.696009 PCI: 00:14.2: enabled 1
1119 06:16:47.696565 PCI: 00:14.3: enabled 1
1120 06:16:47.699643 GENERIC: 0.0: enabled 1
1121 06:16:47.702612 PCI: 00:15.0: enabled 1
1122 06:16:47.705796 I2C: 00:1a: enabled 1
1123 06:16:47.709704 I2C: 00:31: enabled 1
1124 06:16:47.710259 I2C: 00:32: enabled 1
1125 06:16:47.712813 PCI: 00:15.1: enabled 1
1126 06:16:47.715814 I2C: 00:50: enabled 1
1127 06:16:47.719371 PCI: 00:15.2: enabled 0
1128 06:16:47.722515 PCI: 00:15.3: enabled 1
1129 06:16:47.723068 I2C: 00:10: enabled 1
1130 06:16:47.725584 PCI: 00:16.0: enabled 1
1131 06:16:47.728595 PCI: 00:16.1: enabled 0
1132 06:16:47.732558 PCI: 00:16.2: enabled 0
1133 06:16:47.735656 PCI: 00:16.3: enabled 0
1134 06:16:47.736214 PCI: 00:16.4: enabled 0
1135 06:16:47.738713 PCI: 00:16.5: enabled 0
1136 06:16:47.742540 PCI: 00:17.0: enabled 1
1137 06:16:47.745647 PCI: 00:19.0: enabled 0
1138 06:16:47.749161 PCI: 00:19.1: enabled 1
1139 06:16:47.749718 I2C: 00:15: enabled 1
1140 06:16:47.752276 I2C: 00:2c: enabled 1
1141 06:16:47.755343 PCI: 00:19.2: enabled 0
1142 06:16:47.758958 PCI: 00:1a.0: enabled 0
1143 06:16:47.759414 PCI: 00:1e.0: enabled 1
1144 06:16:47.761942 PCI: 00:1e.1: enabled 0
1145 06:16:47.765160 PCI: 00:1e.2: enabled 0
1146 06:16:47.768902 PCI: 00:1e.3: enabled 1
1147 06:16:47.769368 SPI: 00: enabled 1
1148 06:16:47.772055 PCI: 00:1f.0: enabled 1
1149 06:16:47.775404 PNP: 0c09.0: enabled 1
1150 06:16:47.778715 PCI: 00:1f.1: enabled 0
1151 06:16:47.782019 PCI: 00:1f.2: enabled 1
1152 06:16:47.782442 GENERIC: 0.0: enabled 1
1153 06:16:47.785367 GENERIC: 0.0: enabled 1
1154 06:16:47.788622 GENERIC: 1.0: enabled 1
1155 06:16:47.791859 PCI: 00:1f.3: enabled 1
1156 06:16:47.795342 PCI: 00:1f.4: enabled 0
1157 06:16:47.798960 PCI: 00:1f.5: enabled 1
1158 06:16:47.799479 PCI: 00:1f.6: enabled 0
1159 06:16:47.801871 PCI: 00:1f.7: enabled 0
1160 06:16:47.805534 Root Device scanning...
1161 06:16:47.808844 scan_static_bus for Root Device
1162 06:16:47.812447 CPU_CLUSTER: 0 enabled
1163 06:16:47.812961 DOMAIN: 0000 enabled
1164 06:16:47.815576 DOMAIN: 0000 scanning...
1165 06:16:47.818480 PCI: pci_scan_bus for bus 00
1166 06:16:47.822057 PCI: 00:00.0 [8086/0000] ops
1167 06:16:47.825645 PCI: 00:00.0 [8086/4609] enabled
1168 06:16:47.828558 PCI: 00:02.0 [8086/0000] bus ops
1169 06:16:47.831695 PCI: 00:02.0 [8086/46b3] enabled
1170 06:16:47.835369 PCI: 00:04.0 [8086/0000] bus ops
1171 06:16:47.839055 PCI: 00:04.0 [8086/461d] enabled
1172 06:16:47.841738 PCI: 00:06.0 [8086/0000] bus ops
1173 06:16:47.845834 PCI: 00:06.0 [8086/464d] enabled
1174 06:16:47.848960 PCI: 00:08.0 [8086/464f] disabled
1175 06:16:47.852452 PCI: 00:0a.0 [8086/467d] enabled
1176 06:16:47.855544 PCI: 00:0d.0 [8086/0000] bus ops
1177 06:16:47.858140 PCI: 00:0d.0 [8086/461e] enabled
1178 06:16:47.862046 PCI: 00:14.0 [8086/0000] bus ops
1179 06:16:47.865207 PCI: 00:14.0 [8086/51ed] enabled
1180 06:16:47.868412 PCI: 00:14.2 [8086/51ef] enabled
1181 06:16:47.872204 PCI: 00:14.3 [8086/0000] bus ops
1182 06:16:47.875610 PCI: 00:14.3 [8086/51f0] enabled
1183 06:16:47.878972 PCI: 00:15.0 [8086/0000] bus ops
1184 06:16:47.881700 PCI: 00:15.0 [8086/51e8] enabled
1185 06:16:47.885154 PCI: 00:15.1 [8086/0000] bus ops
1186 06:16:47.888583 PCI: 00:15.1 [8086/51e9] enabled
1187 06:16:47.891804 PCI: 00:15.2 [8086/0000] bus ops
1188 06:16:47.895386 PCI: 00:15.2 [8086/51ea] disabled
1189 06:16:47.898985 PCI: 00:15.3 [8086/0000] bus ops
1190 06:16:47.902307 PCI: 00:15.3 [8086/51eb] enabled
1191 06:16:47.905055 PCI: 00:16.0 [8086/0000] ops
1192 06:16:47.908641 PCI: 00:16.0 [8086/51e0] enabled
1193 06:16:47.915403 PCI: Static device PCI: 00:17.0 not found, disabling it.
1194 06:16:47.919024 PCI: 00:19.0 [8086/0000] bus ops
1195 06:16:47.921706 PCI: 00:19.0 [8086/51c5] disabled
1196 06:16:47.925092 PCI: 00:19.1 [8086/0000] bus ops
1197 06:16:47.928564 PCI: 00:19.1 [8086/51c6] enabled
1198 06:16:47.931881 PCI: 00:1e.0 [8086/0000] ops
1199 06:16:47.935983 PCI: 00:1e.0 [8086/51a8] enabled
1200 06:16:47.938828 PCI: 00:1e.3 [8086/0000] bus ops
1201 06:16:47.941754 PCI: 00:1e.3 [8086/51ab] enabled
1202 06:16:47.945050 PCI: 00:1f.0 [8086/0000] bus ops
1203 06:16:47.948824 PCI: 00:1f.0 [8086/5182] enabled
1204 06:16:47.949376 RTC Init
1205 06:16:47.952384 Set power on after power failure.
1206 06:16:47.955156 Disabling Deep S3
1207 06:16:47.958196 Disabling Deep S3
1208 06:16:47.958619 Disabling Deep S4
1209 06:16:47.962586 Disabling Deep S4
1210 06:16:47.963096 Disabling Deep S5
1211 06:16:47.965709 Disabling Deep S5
1212 06:16:47.968479 PCI: 00:1f.2 [0000/0000] hidden
1213 06:16:47.971783 PCI: 00:1f.3 [8086/0000] bus ops
1214 06:16:47.975476 PCI: 00:1f.3 [8086/51c8] enabled
1215 06:16:47.978330 PCI: 00:1f.5 [8086/0000] bus ops
1216 06:16:47.981619 PCI: 00:1f.5 [8086/51a4] enabled
1217 06:16:47.982035 GPIO: 0 enabled
1218 06:16:47.985194 PCI: Leftover static devices:
1219 06:16:47.988385 PCI: 00:01.0
1220 06:16:47.988900 PCI: 00:01.1
1221 06:16:47.989280 PCI: 00:05.0
1222 06:16:47.991776 PCI: 00:06.2
1223 06:16:47.992277 PCI: 00:09.0
1224 06:16:47.995098 PCI: 00:0d.1
1225 06:16:47.995511 PCI: 00:0d.2
1226 06:16:47.998406 PCI: 00:0d.3
1227 06:16:47.998923 PCI: 00:0e.0
1228 06:16:47.999264 PCI: 00:10.0
1229 06:16:48.001518 PCI: 00:10.1
1230 06:16:48.001932 PCI: 00:10.6
1231 06:16:48.005000 PCI: 00:10.7
1232 06:16:48.005571 PCI: 00:12.0
1233 06:16:48.005910 PCI: 00:12.6
1234 06:16:48.008446 PCI: 00:12.7
1235 06:16:48.008943 PCI: 00:13.0
1236 06:16:48.011786 PCI: 00:14.1
1237 06:16:48.012196 PCI: 00:16.1
1238 06:16:48.012523 PCI: 00:16.2
1239 06:16:48.014970 PCI: 00:16.3
1240 06:16:48.015382 PCI: 00:16.4
1241 06:16:48.018369 PCI: 00:16.5
1242 06:16:48.018884 PCI: 00:17.0
1243 06:16:48.021764 PCI: 00:19.2
1244 06:16:48.022174 PCI: 00:1a.0
1245 06:16:48.022501 PCI: 00:1e.1
1246 06:16:48.025496 PCI: 00:1e.2
1247 06:16:48.026008 PCI: 00:1f.1
1248 06:16:48.028574 PCI: 00:1f.4
1249 06:16:48.029082 PCI: 00:1f.6
1250 06:16:48.029453 PCI: 00:1f.7
1251 06:16:48.031867 PCI: Check your devicetree.cb.
1252 06:16:48.035077 PCI: 00:02.0 scanning...
1253 06:16:48.038742 scan_generic_bus for PCI: 00:02.0
1254 06:16:48.042065 scan_generic_bus for PCI: 00:02.0 done
1255 06:16:48.048393 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1256 06:16:48.048897 PCI: 00:04.0 scanning...
1257 06:16:48.055101 scan_generic_bus for PCI: 00:04.0
1258 06:16:48.055614 GENERIC: 0.0 enabled
1259 06:16:48.061366 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1260 06:16:48.065150 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1261 06:16:48.068795 PCI: 00:06.0 scanning...
1262 06:16:48.071468 do_pci_scan_bridge for PCI: 00:06.0
1263 06:16:48.075442 PCI: pci_scan_bus for bus 01
1264 06:16:48.078841 PCI: 01:00.0 [15b7/5009] enabled
1265 06:16:48.081734 Enabling Common Clock Configuration
1266 06:16:48.084792 L1 Sub-State supported from root port 6
1267 06:16:48.088396 L1 Sub-State Support = 0x5
1268 06:16:48.091801 CommonModeRestoreTime = 0x6e
1269 06:16:48.095827 Power On Value = 0x5, Power On Scale = 0x2
1270 06:16:48.098286 ASPM: Enabled L1
1271 06:16:48.101675 PCIe: Max_Payload_Size adjusted to 256
1272 06:16:48.105037 PCI: 01:00.0: Enabled LTR
1273 06:16:48.108341 PCI: 01:00.0: Programmed LTR max latencies
1274 06:16:48.115028 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1275 06:16:48.115542 PCI: 00:0d.0 scanning...
1276 06:16:48.117923 scan_static_bus for PCI: 00:0d.0
1277 06:16:48.122018 USB0 port 0 enabled
1278 06:16:48.124836 USB0 port 0 scanning...
1279 06:16:48.128259 scan_static_bus for USB0 port 0
1280 06:16:48.128720 USB3 port 0 enabled
1281 06:16:48.131348 USB3 port 1 disabled
1282 06:16:48.134921 USB3 port 2 enabled
1283 06:16:48.135373 USB3 port 3 disabled
1284 06:16:48.138005 USB3 port 0 scanning...
1285 06:16:48.142178 scan_static_bus for USB3 port 0
1286 06:16:48.145150 scan_static_bus for USB3 port 0 done
1287 06:16:48.151509 scan_bus: bus USB3 port 0 finished in 6 msecs
1288 06:16:48.152016 USB3 port 2 scanning...
1289 06:16:48.154726 scan_static_bus for USB3 port 2
1290 06:16:48.158007 scan_static_bus for USB3 port 2 done
1291 06:16:48.164765 scan_bus: bus USB3 port 2 finished in 6 msecs
1292 06:16:48.168949 scan_static_bus for USB0 port 0 done
1293 06:16:48.171357 scan_bus: bus USB0 port 0 finished in 43 msecs
1294 06:16:48.174750 scan_static_bus for PCI: 00:0d.0 done
1295 06:16:48.182005 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1296 06:16:48.185067 PCI: 00:14.0 scanning...
1297 06:16:48.188486 scan_static_bus for PCI: 00:14.0
1298 06:16:48.189039 USB0 port 0 enabled
1299 06:16:48.191481 USB0 port 0 scanning...
1300 06:16:48.195041 scan_static_bus for USB0 port 0
1301 06:16:48.195584 USB2 port 0 enabled
1302 06:16:48.198537 USB2 port 1 disabled
1303 06:16:48.201642 USB2 port 2 enabled
1304 06:16:48.202097 USB2 port 3 disabled
1305 06:16:48.205238 USB2 port 4 disabled
1306 06:16:48.208444 USB2 port 5 enabled
1307 06:16:48.208992 USB2 port 6 disabled
1308 06:16:48.211953 USB2 port 7 disabled
1309 06:16:48.215060 USB2 port 8 enabled
1310 06:16:48.215612 USB2 port 9 enabled
1311 06:16:48.217911 USB3 port 0 enabled
1312 06:16:48.218366 USB3 port 1 disabled
1313 06:16:48.221443 USB3 port 2 disabled
1314 06:16:48.224824 USB3 port 3 disabled
1315 06:16:48.227976 USB2 port 0 scanning...
1316 06:16:48.228452 scan_static_bus for USB2 port 0
1317 06:16:48.234529 scan_static_bus for USB2 port 0 done
1318 06:16:48.237981 scan_bus: bus USB2 port 0 finished in 6 msecs
1319 06:16:48.241006 USB2 port 2 scanning...
1320 06:16:48.244836 scan_static_bus for USB2 port 2
1321 06:16:48.248101 scan_static_bus for USB2 port 2 done
1322 06:16:48.250999 scan_bus: bus USB2 port 2 finished in 6 msecs
1323 06:16:48.254312 USB2 port 5 scanning...
1324 06:16:48.257700 scan_static_bus for USB2 port 5
1325 06:16:48.261005 scan_static_bus for USB2 port 5 done
1326 06:16:48.264748 scan_bus: bus USB2 port 5 finished in 6 msecs
1327 06:16:48.268145 USB2 port 8 scanning...
1328 06:16:48.271276 scan_static_bus for USB2 port 8
1329 06:16:48.274485 scan_static_bus for USB2 port 8 done
1330 06:16:48.281495 scan_bus: bus USB2 port 8 finished in 6 msecs
1331 06:16:48.282075 USB2 port 9 scanning...
1332 06:16:48.284650 scan_static_bus for USB2 port 9
1333 06:16:48.287979 scan_static_bus for USB2 port 9 done
1334 06:16:48.294467 scan_bus: bus USB2 port 9 finished in 6 msecs
1335 06:16:48.297531 USB3 port 0 scanning...
1336 06:16:48.301429 scan_static_bus for USB3 port 0
1337 06:16:48.304914 scan_static_bus for USB3 port 0 done
1338 06:16:48.307881 scan_bus: bus USB3 port 0 finished in 6 msecs
1339 06:16:48.311073 scan_static_bus for USB0 port 0 done
1340 06:16:48.318041 scan_bus: bus USB0 port 0 finished in 120 msecs
1341 06:16:48.321226 scan_static_bus for PCI: 00:14.0 done
1342 06:16:48.324646 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1343 06:16:48.328226 PCI: 00:14.3 scanning...
1344 06:16:48.331080 scan_static_bus for PCI: 00:14.3
1345 06:16:48.334635 GENERIC: 0.0 enabled
1346 06:16:48.337709 scan_static_bus for PCI: 00:14.3 done
1347 06:16:48.340983 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1348 06:16:48.344311 PCI: 00:15.0 scanning...
1349 06:16:48.347622 scan_static_bus for PCI: 00:15.0
1350 06:16:48.348096 I2C: 00:1a enabled
1351 06:16:48.350922 I2C: 00:31 enabled
1352 06:16:48.354450 I2C: 00:32 enabled
1353 06:16:48.357565 scan_static_bus for PCI: 00:15.0 done
1354 06:16:48.360995 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1355 06:16:48.364492 PCI: 00:15.1 scanning...
1356 06:16:48.367816 scan_static_bus for PCI: 00:15.1
1357 06:16:48.371303 I2C: 00:50 enabled
1358 06:16:48.374113 scan_static_bus for PCI: 00:15.1 done
1359 06:16:48.377804 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1360 06:16:48.381520 PCI: 00:15.3 scanning...
1361 06:16:48.384876 scan_static_bus for PCI: 00:15.3
1362 06:16:48.385473 I2C: 00:10 enabled
1363 06:16:48.391047 scan_static_bus for PCI: 00:15.3 done
1364 06:16:48.394517 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1365 06:16:48.397783 PCI: 00:19.1 scanning...
1366 06:16:48.401274 scan_static_bus for PCI: 00:19.1
1367 06:16:48.401832 I2C: 00:15 enabled
1368 06:16:48.404530 I2C: 00:2c enabled
1369 06:16:48.407945 scan_static_bus for PCI: 00:19.1 done
1370 06:16:48.414887 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1371 06:16:48.415449 PCI: 00:1e.3 scanning...
1372 06:16:48.417801 scan_generic_bus for PCI: 00:1e.3
1373 06:16:48.421174 SPI: 00 enabled
1374 06:16:48.427617 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1375 06:16:48.431097 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1376 06:16:48.434050 PCI: 00:1f.0 scanning...
1377 06:16:48.437794 scan_static_bus for PCI: 00:1f.0
1378 06:16:48.438357 PNP: 0c09.0 enabled
1379 06:16:48.441296 PNP: 0c09.0 scanning...
1380 06:16:48.444799 scan_static_bus for PNP: 0c09.0
1381 06:16:48.447478 scan_static_bus for PNP: 0c09.0 done
1382 06:16:48.453889 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1383 06:16:48.457276 scan_static_bus for PCI: 00:1f.0 done
1384 06:16:48.460490 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1385 06:16:48.464127 PCI: 00:1f.2 scanning...
1386 06:16:48.467814 scan_static_bus for PCI: 00:1f.2
1387 06:16:48.470510 GENERIC: 0.0 enabled
1388 06:16:48.470970 GENERIC: 0.0 scanning...
1389 06:16:48.473812 scan_static_bus for GENERIC: 0.0
1390 06:16:48.477490 GENERIC: 0.0 enabled
1391 06:16:48.480572 GENERIC: 1.0 enabled
1392 06:16:48.484070 scan_static_bus for GENERIC: 0.0 done
1393 06:16:48.487493 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1394 06:16:48.490527 scan_static_bus for PCI: 00:1f.2 done
1395 06:16:48.497737 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1396 06:16:48.500867 PCI: 00:1f.3 scanning...
1397 06:16:48.504097 scan_static_bus for PCI: 00:1f.3
1398 06:16:48.507339 scan_static_bus for PCI: 00:1f.3 done
1399 06:16:48.510901 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1400 06:16:48.514670 PCI: 00:1f.5 scanning...
1401 06:16:48.517567 scan_generic_bus for PCI: 00:1f.5
1402 06:16:48.520598 scan_generic_bus for PCI: 00:1f.5 done
1403 06:16:48.527682 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1404 06:16:48.530785 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1405 06:16:48.534459 scan_static_bus for Root Device done
1406 06:16:48.540709 scan_bus: bus Root Device finished in 729 msecs
1407 06:16:48.541328 done
1408 06:16:48.547603 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1409 06:16:48.550889 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1410 06:16:48.557412 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1411 06:16:48.560673 SPI flash protection: WPSW=0 SRP0=0
1412 06:16:48.568193 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1413 06:16:48.571315 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1414 06:16:48.573841 found VGA at PCI: 00:02.0
1415 06:16:48.577740 Setting up VGA for PCI: 00:02.0
1416 06:16:48.584223 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1417 06:16:48.587360 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1418 06:16:48.590920 Allocating resources...
1419 06:16:48.593947 Reading resources...
1420 06:16:48.597450 Root Device read_resources bus 0 link: 0
1421 06:16:48.600862 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1422 06:16:48.607253 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1423 06:16:48.610896 DOMAIN: 0000 read_resources bus 0 link: 0
1424 06:16:48.617705 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1425 06:16:48.623860 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1426 06:16:48.627580 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1427 06:16:48.634021 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1428 06:16:48.640497 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1429 06:16:48.647213 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1430 06:16:48.653996 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1431 06:16:48.660491 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1432 06:16:48.667462 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1433 06:16:48.674669 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1434 06:16:48.680961 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1435 06:16:48.687197 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1436 06:16:48.693747 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1437 06:16:48.700514 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1438 06:16:48.703743 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1439 06:16:48.710434 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1440 06:16:48.717361 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1441 06:16:48.724031 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1442 06:16:48.730787 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1443 06:16:48.737275 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1444 06:16:48.743156 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1445 06:16:48.746480 PCI: 00:04.0 read_resources bus 1 link: 0
1446 06:16:48.750377 PCI: 00:04.0 read_resources bus 1 link: 0 done
1447 06:16:48.756691 PCI: 00:06.0 read_resources bus 1 link: 0
1448 06:16:48.759659 PCI: 00:06.0 read_resources bus 1 link: 0 done
1449 06:16:48.763074 PCI: 00:0d.0 read_resources bus 0 link: 0
1450 06:16:48.769851 USB0 port 0 read_resources bus 0 link: 0
1451 06:16:48.773013 USB0 port 0 read_resources bus 0 link: 0 done
1452 06:16:48.776421 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1453 06:16:48.783221 PCI: 00:14.0 read_resources bus 0 link: 0
1454 06:16:48.786350 USB0 port 0 read_resources bus 0 link: 0
1455 06:16:48.789489 USB0 port 0 read_resources bus 0 link: 0 done
1456 06:16:48.796601 PCI: 00:14.0 read_resources bus 0 link: 0 done
1457 06:16:48.800119 PCI: 00:14.3 read_resources bus 0 link: 0
1458 06:16:48.803019 PCI: 00:14.3 read_resources bus 0 link: 0 done
1459 06:16:48.809854 PCI: 00:15.0 read_resources bus 0 link: 0
1460 06:16:48.813638 PCI: 00:15.0 read_resources bus 0 link: 0 done
1461 06:16:48.817282 PCI: 00:15.1 read_resources bus 0 link: 0
1462 06:16:48.823773 PCI: 00:15.1 read_resources bus 0 link: 0 done
1463 06:16:48.826439 PCI: 00:15.3 read_resources bus 0 link: 0
1464 06:16:48.833379 PCI: 00:15.3 read_resources bus 0 link: 0 done
1465 06:16:48.836847 PCI: 00:19.1 read_resources bus 0 link: 0
1466 06:16:48.840001 PCI: 00:19.1 read_resources bus 0 link: 0 done
1467 06:16:48.846209 PCI: 00:1e.3 read_resources bus 2 link: 0
1468 06:16:48.849706 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1469 06:16:48.853039 PCI: 00:1f.0 read_resources bus 0 link: 0
1470 06:16:48.859766 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1471 06:16:48.863245 PCI: 00:1f.2 read_resources bus 0 link: 0
1472 06:16:48.866815 GENERIC: 0.0 read_resources bus 0 link: 0
1473 06:16:48.873361 GENERIC: 0.0 read_resources bus 0 link: 0 done
1474 06:16:48.877020 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1475 06:16:48.883620 DOMAIN: 0000 read_resources bus 0 link: 0 done
1476 06:16:48.886626 Root Device read_resources bus 0 link: 0 done
1477 06:16:48.889904 Done reading resources.
1478 06:16:48.897264 Show resources in subtree (Root Device)...After reading.
1479 06:16:48.900310 Root Device child on link 0 CPU_CLUSTER: 0
1480 06:16:48.902964 CPU_CLUSTER: 0 child on link 0 APIC: 00
1481 06:16:48.903423 APIC: 00
1482 06:16:48.906266 APIC: 14
1483 06:16:48.907015 APIC: 16
1484 06:16:48.909778 APIC: 10
1485 06:16:48.910268 APIC: 12
1486 06:16:48.910636 APIC: 01
1487 06:16:48.913144 APIC: 08
1488 06:16:48.913609 APIC: 09
1489 06:16:48.916731 DOMAIN: 0000 child on link 0 GPIO: 0
1490 06:16:48.926374 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1491 06:16:48.936578 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1492 06:16:48.937175 GPIO: 0
1493 06:16:48.939632 PCI: 00:00.0
1494 06:16:48.949787 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 06:16:48.960162 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1496 06:16:48.966945 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1497 06:16:48.976442 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1498 06:16:48.986089 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1499 06:16:48.996607 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1500 06:16:49.006529 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1501 06:16:49.016722 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1502 06:16:49.023485 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1503 06:16:49.033495 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1504 06:16:49.043241 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1505 06:16:49.052779 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1506 06:16:49.062551 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1507 06:16:49.072505 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1508 06:16:49.079412 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1509 06:16:49.089396 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1510 06:16:49.099753 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1511 06:16:49.109470 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1512 06:16:49.119507 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1513 06:16:49.129581 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1514 06:16:49.139488 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1515 06:16:49.146210 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1516 06:16:49.156453 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1517 06:16:49.165692 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1518 06:16:49.176579 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1519 06:16:49.185895 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1520 06:16:49.195819 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1521 06:16:49.206007 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1522 06:16:49.206580 PCI: 00:02.0
1523 06:16:49.215963 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1524 06:16:49.225720 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1525 06:16:49.235741 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1526 06:16:49.238874 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1527 06:16:49.249169 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1528 06:16:49.252349 GENERIC: 0.0
1529 06:16:49.256057 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1530 06:16:49.265878 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1531 06:16:49.275590 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1532 06:16:49.285752 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1533 06:16:49.286304 PCI: 01:00.0
1534 06:16:49.295931 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1535 06:16:49.305833 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1536 06:16:49.308897 PCI: 00:08.0
1537 06:16:49.309523 PCI: 00:0a.0
1538 06:16:49.318731 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1539 06:16:49.321980 PCI: 00:0d.0 child on link 0 USB0 port 0
1540 06:16:49.331900 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1541 06:16:49.338624 USB0 port 0 child on link 0 USB3 port 0
1542 06:16:49.339173 USB3 port 0
1543 06:16:49.342145 USB3 port 1
1544 06:16:49.342602 USB3 port 2
1545 06:16:49.345457 USB3 port 3
1546 06:16:49.348413 PCI: 00:14.0 child on link 0 USB0 port 0
1547 06:16:49.358366 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1548 06:16:49.365089 USB0 port 0 child on link 0 USB2 port 0
1549 06:16:49.365662 USB2 port 0
1550 06:16:49.368544 USB2 port 1
1551 06:16:49.369000 USB2 port 2
1552 06:16:49.371620 USB2 port 3
1553 06:16:49.372075 USB2 port 4
1554 06:16:49.375261 USB2 port 5
1555 06:16:49.375718 USB2 port 6
1556 06:16:49.378450 USB2 port 7
1557 06:16:49.378863 USB2 port 8
1558 06:16:49.381973 USB2 port 9
1559 06:16:49.382385 USB3 port 0
1560 06:16:49.385017 USB3 port 1
1561 06:16:49.385471 USB3 port 2
1562 06:16:49.388507 USB3 port 3
1563 06:16:49.388919 PCI: 00:14.2
1564 06:16:49.398258 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1565 06:16:49.408356 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1566 06:16:49.415778 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1567 06:16:49.425785 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1568 06:16:49.426309 GENERIC: 0.0
1569 06:16:49.431791 PCI: 00:15.0 child on link 0 I2C: 00:1a
1570 06:16:49.441645 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1571 06:16:49.442153 I2C: 00:1a
1572 06:16:49.445252 I2C: 00:31
1573 06:16:49.445787 I2C: 00:32
1574 06:16:49.448357 PCI: 00:15.1 child on link 0 I2C: 00:50
1575 06:16:49.458751 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1576 06:16:49.462371 I2C: 00:50
1577 06:16:49.462894 PCI: 00:15.2
1578 06:16:49.468586 PCI: 00:15.3 child on link 0 I2C: 00:10
1579 06:16:49.478235 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1580 06:16:49.478791 I2C: 00:10
1581 06:16:49.481773 PCI: 00:16.0
1582 06:16:49.491547 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1583 06:16:49.492007 PCI: 00:19.0
1584 06:16:49.494719 PCI: 00:19.1 child on link 0 I2C: 00:15
1585 06:16:49.505158 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1586 06:16:49.508696 I2C: 00:15
1587 06:16:49.509306 I2C: 00:2c
1588 06:16:49.511954 PCI: 00:1e.0
1589 06:16:49.522071 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1590 06:16:49.525211 PCI: 00:1e.3 child on link 0 SPI: 00
1591 06:16:49.535242 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1592 06:16:49.538341 SPI: 00
1593 06:16:49.541611 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1594 06:16:49.551673 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1595 06:16:49.552240 PNP: 0c09.0
1596 06:16:49.561646 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1597 06:16:49.564824 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1598 06:16:49.575006 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1599 06:16:49.584606 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1600 06:16:49.588186 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1601 06:16:49.591488 GENERIC: 0.0
1602 06:16:49.591904 GENERIC: 1.0
1603 06:16:49.594752 PCI: 00:1f.3
1604 06:16:49.604596 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1605 06:16:49.614672 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1606 06:16:49.615183 PCI: 00:1f.5
1607 06:16:49.624831 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1608 06:16:49.631867 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1609 06:16:49.638012 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1610 06:16:49.644863 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1611 06:16:49.651218 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1612 06:16:49.654698 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1613 06:16:49.658371 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1614 06:16:49.664571 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1615 06:16:49.671249 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1616 06:16:49.681710 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1617 06:16:49.688082 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1618 06:16:49.694304 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1619 06:16:49.701609 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1620 06:16:49.707969 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1621 06:16:49.717680 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1622 06:16:49.721255 DOMAIN: 0000: Resource ranges:
1623 06:16:49.724443 * Base: 1000, Size: 800, Tag: 100
1624 06:16:49.727978 * Base: 1900, Size: e700, Tag: 100
1625 06:16:49.731132 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1626 06:16:49.737621 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1627 06:16:49.744686 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1628 06:16:49.754482 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1629 06:16:49.761497 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1630 06:16:49.767552 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1631 06:16:49.777638 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1632 06:16:49.784271 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1633 06:16:49.791618 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1634 06:16:49.800881 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1635 06:16:49.807725 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1636 06:16:49.814628 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1637 06:16:49.824334 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1638 06:16:49.830748 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1639 06:16:49.837219 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1640 06:16:49.847844 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1641 06:16:49.854159 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1642 06:16:49.861152 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1643 06:16:49.871018 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1644 06:16:49.877147 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1645 06:16:49.884361 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1646 06:16:49.890467 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1647 06:16:49.900963 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1648 06:16:49.907497 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1649 06:16:49.913720 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1650 06:16:49.924110 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1651 06:16:49.930990 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1652 06:16:49.937212 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1653 06:16:49.947027 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1654 06:16:49.953778 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1655 06:16:49.960627 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1656 06:16:49.970293 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1657 06:16:49.977089 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1658 06:16:49.980273 DOMAIN: 0000: Resource ranges:
1659 06:16:49.983794 * Base: 80400000, Size: 3fc00000, Tag: 200
1660 06:16:49.990992 * Base: d0000000, Size: 28000000, Tag: 200
1661 06:16:49.993567 * Base: fa000000, Size: 1000000, Tag: 200
1662 06:16:49.997238 * Base: fb001000, Size: 17ff000, Tag: 200
1663 06:16:50.003483 * Base: fe800000, Size: 300000, Tag: 200
1664 06:16:50.007255 * Base: feb80000, Size: 80000, Tag: 200
1665 06:16:50.010470 * Base: fed00000, Size: 40000, Tag: 200
1666 06:16:50.013703 * Base: fed70000, Size: 10000, Tag: 200
1667 06:16:50.016558 * Base: fed88000, Size: 8000, Tag: 200
1668 06:16:50.023827 * Base: fed93000, Size: d000, Tag: 200
1669 06:16:50.027525 * Base: feda2000, Size: 1e000, Tag: 200
1670 06:16:50.030408 * Base: fede0000, Size: 1220000, Tag: 200
1671 06:16:50.037437 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1672 06:16:50.043855 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1673 06:16:50.050413 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1674 06:16:50.057269 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1675 06:16:50.064136 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1676 06:16:50.069843 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1677 06:16:50.076859 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1678 06:16:50.083389 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1679 06:16:50.089994 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1680 06:16:50.096762 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1681 06:16:50.103245 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1682 06:16:50.110082 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1683 06:16:50.116535 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1684 06:16:50.123824 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1685 06:16:50.130454 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1686 06:16:50.136788 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1687 06:16:50.143258 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1688 06:16:50.149796 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1689 06:16:50.156465 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1690 06:16:50.163182 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1691 06:16:50.169811 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1692 06:16:50.176038 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1693 06:16:50.179801 PCI: 00:06.0: Resource ranges:
1694 06:16:50.185981 * Base: 80400000, Size: 100000, Tag: 200
1695 06:16:50.192846 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1696 06:16:50.199545 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1697 06:16:50.206264 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1698 06:16:50.213497 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1699 06:16:50.219674 Root Device assign_resources, bus 0 link: 0
1700 06:16:50.222835 DOMAIN: 0000 assign_resources, bus 0 link: 0
1701 06:16:50.230320 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1702 06:16:50.239632 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1703 06:16:50.245955 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1704 06:16:50.256030 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1705 06:16:50.259330 PCI: 00:04.0 assign_resources, bus 1 link: 0
1706 06:16:50.262307 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1707 06:16:50.272831 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1708 06:16:50.282161 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1709 06:16:50.292324 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1710 06:16:50.295471 PCI: 00:06.0 assign_resources, bus 1 link: 0
1711 06:16:50.302260 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1712 06:16:50.312324 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1713 06:16:50.315717 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1714 06:16:50.325635 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1715 06:16:50.332054 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1716 06:16:50.335383 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1717 06:16:50.342042 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1718 06:16:50.348869 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1719 06:16:50.355508 PCI: 00:14.0 assign_resources, bus 0 link: 0
1720 06:16:50.358452 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1721 06:16:50.368733 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1722 06:16:50.375488 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1723 06:16:50.381744 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1724 06:16:50.388596 PCI: 00:14.3 assign_resources, bus 0 link: 0
1725 06:16:50.391912 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1726 06:16:50.401645 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1727 06:16:50.405065 PCI: 00:15.0 assign_resources, bus 0 link: 0
1728 06:16:50.411986 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1729 06:16:50.418883 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1730 06:16:50.421845 PCI: 00:15.1 assign_resources, bus 0 link: 0
1731 06:16:50.428441 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1732 06:16:50.435338 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1733 06:16:50.441536 PCI: 00:15.3 assign_resources, bus 0 link: 0
1734 06:16:50.444883 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1735 06:16:50.454866 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1736 06:16:50.461366 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1737 06:16:50.464963 PCI: 00:19.1 assign_resources, bus 0 link: 0
1738 06:16:50.471347 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1739 06:16:50.478379 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1740 06:16:50.484762 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1741 06:16:50.488160 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1742 06:16:50.491200 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1743 06:16:50.497723 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1744 06:16:50.501511 LPC: Trying to open IO window from 800 size 1ff
1745 06:16:50.511755 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1746 06:16:50.518084 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1747 06:16:50.528225 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1748 06:16:50.531380 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1749 06:16:50.537861 Root Device assign_resources, bus 0 link: 0 done
1750 06:16:50.538393 Done setting resources.
1751 06:16:50.544565 Show resources in subtree (Root Device)...After assigning values.
1752 06:16:50.551272 Root Device child on link 0 CPU_CLUSTER: 0
1753 06:16:50.554588 CPU_CLUSTER: 0 child on link 0 APIC: 00
1754 06:16:50.555058 APIC: 00
1755 06:16:50.557876 APIC: 14
1756 06:16:50.558338 APIC: 16
1757 06:16:50.558703 APIC: 10
1758 06:16:50.561569 APIC: 12
1759 06:16:50.562141 APIC: 01
1760 06:16:50.562516 APIC: 08
1761 06:16:50.564470 APIC: 09
1762 06:16:50.568149 DOMAIN: 0000 child on link 0 GPIO: 0
1763 06:16:50.578059 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1764 06:16:50.587784 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1765 06:16:50.588317 GPIO: 0
1766 06:16:50.591482 PCI: 00:00.0
1767 06:16:50.597810 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1768 06:16:50.607733 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1769 06:16:50.617892 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1770 06:16:50.627650 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1771 06:16:50.637602 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1772 06:16:50.647931 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1773 06:16:50.654701 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1774 06:16:50.664160 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1775 06:16:50.673756 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1776 06:16:50.683958 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1777 06:16:50.694532 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1778 06:16:50.703918 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1779 06:16:50.713955 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1780 06:16:50.723467 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1781 06:16:50.729938 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1782 06:16:50.740217 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1783 06:16:50.750400 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1784 06:16:50.759858 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1785 06:16:50.769613 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1786 06:16:50.779805 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1787 06:16:50.789744 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1788 06:16:50.796074 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1789 06:16:50.806274 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1790 06:16:50.815992 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1791 06:16:50.826396 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1792 06:16:50.836481 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1793 06:16:50.845929 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1794 06:16:50.856167 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1795 06:16:50.856726 PCI: 00:02.0
1796 06:16:50.869325 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1797 06:16:50.879101 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1798 06:16:50.888678 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1799 06:16:50.892318 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1800 06:16:50.901934 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1801 06:16:50.905210 GENERIC: 0.0
1802 06:16:50.908784 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1803 06:16:50.918752 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1804 06:16:50.928641 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1805 06:16:50.941796 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1806 06:16:50.942342 PCI: 01:00.0
1807 06:16:50.952344 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1808 06:16:50.961482 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1809 06:16:50.965247 PCI: 00:08.0
1810 06:16:50.965800 PCI: 00:0a.0
1811 06:16:50.975043 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1812 06:16:50.981654 PCI: 00:0d.0 child on link 0 USB0 port 0
1813 06:16:50.991425 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1814 06:16:50.995298 USB0 port 0 child on link 0 USB3 port 0
1815 06:16:50.998172 USB3 port 0
1816 06:16:50.998630 USB3 port 1
1817 06:16:51.001731 USB3 port 2
1818 06:16:51.002277 USB3 port 3
1819 06:16:51.007910 PCI: 00:14.0 child on link 0 USB0 port 0
1820 06:16:51.017916 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1821 06:16:51.021147 USB0 port 0 child on link 0 USB2 port 0
1822 06:16:51.024469 USB2 port 0
1823 06:16:51.024924 USB2 port 1
1824 06:16:51.028174 USB2 port 2
1825 06:16:51.028808 USB2 port 3
1826 06:16:51.031671 USB2 port 4
1827 06:16:51.032301 USB2 port 5
1828 06:16:51.035176 USB2 port 6
1829 06:16:51.035731 USB2 port 7
1830 06:16:51.038060 USB2 port 8
1831 06:16:51.038723 USB2 port 9
1832 06:16:51.040969 USB3 port 0
1833 06:16:51.044811 USB3 port 1
1834 06:16:51.045525 USB3 port 2
1835 06:16:51.047967 USB3 port 3
1836 06:16:51.048633 PCI: 00:14.2
1837 06:16:51.057677 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1838 06:16:51.068057 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1839 06:16:51.074492 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1840 06:16:51.084328 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1841 06:16:51.084791 GENERIC: 0.0
1842 06:16:51.091078 PCI: 00:15.0 child on link 0 I2C: 00:1a
1843 06:16:51.101196 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1844 06:16:51.101658 I2C: 00:1a
1845 06:16:51.104441 I2C: 00:31
1846 06:16:51.104975 I2C: 00:32
1847 06:16:51.107575 PCI: 00:15.1 child on link 0 I2C: 00:50
1848 06:16:51.120927 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1849 06:16:51.121490 I2C: 00:50
1850 06:16:51.124167 PCI: 00:15.2
1851 06:16:51.127372 PCI: 00:15.3 child on link 0 I2C: 00:10
1852 06:16:51.137607 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1853 06:16:51.138186 I2C: 00:10
1854 06:16:51.141159 PCI: 00:16.0
1855 06:16:51.151226 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1856 06:16:51.153895 PCI: 00:19.0
1857 06:16:51.157579 PCI: 00:19.1 child on link 0 I2C: 00:15
1858 06:16:51.167823 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1859 06:16:51.168387 I2C: 00:15
1860 06:16:51.171053 I2C: 00:2c
1861 06:16:51.171617 PCI: 00:1e.0
1862 06:16:51.184191 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1863 06:16:51.187434 PCI: 00:1e.3 child on link 0 SPI: 00
1864 06:16:51.197134 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1865 06:16:51.197685 SPI: 00
1866 06:16:51.204042 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1867 06:16:51.210551 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1868 06:16:51.214009 PNP: 0c09.0
1869 06:16:51.224005 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1870 06:16:51.227348 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1871 06:16:51.237332 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1872 06:16:51.247248 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1873 06:16:51.250680 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1874 06:16:51.251316 GENERIC: 0.0
1875 06:16:51.253791 GENERIC: 1.0
1876 06:16:51.257073 PCI: 00:1f.3
1877 06:16:51.267351 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1878 06:16:51.276968 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1879 06:16:51.277750 PCI: 00:1f.5
1880 06:16:51.287096 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1881 06:16:51.290638 Done allocating resources.
1882 06:16:51.297461 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1883 06:16:51.303997 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1884 06:16:51.307248 Configure audio over I2S with MAX98373 NAU88L25B.
1885 06:16:51.312204 Enabling BT offload
1886 06:16:51.319514 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1887 06:16:51.322981 Enabling resources...
1888 06:16:51.325936 PCI: 00:00.0 subsystem <- 8086/4609
1889 06:16:51.329159 PCI: 00:00.0 cmd <- 06
1890 06:16:51.332807 PCI: 00:02.0 subsystem <- 8086/46b3
1891 06:16:51.336252 PCI: 00:02.0 cmd <- 03
1892 06:16:51.339457 PCI: 00:04.0 subsystem <- 8086/461d
1893 06:16:51.339910 PCI: 00:04.0 cmd <- 02
1894 06:16:51.342238 PCI: 00:06.0 bridge ctrl <- 0013
1895 06:16:51.345786 PCI: 00:06.0 subsystem <- 8086/464d
1896 06:16:51.349174 PCI: 00:06.0 cmd <- 106
1897 06:16:51.352348 PCI: 00:0a.0 subsystem <- 8086/467d
1898 06:16:51.356167 PCI: 00:0a.0 cmd <- 02
1899 06:16:51.359498 PCI: 00:0d.0 subsystem <- 8086/461e
1900 06:16:51.362742 PCI: 00:0d.0 cmd <- 02
1901 06:16:51.365934 PCI: 00:14.0 subsystem <- 8086/51ed
1902 06:16:51.369930 PCI: 00:14.0 cmd <- 02
1903 06:16:51.372410 PCI: 00:14.2 subsystem <- 8086/51ef
1904 06:16:51.372963 PCI: 00:14.2 cmd <- 02
1905 06:16:51.375918 PCI: 00:14.3 subsystem <- 8086/51f0
1906 06:16:51.378928 PCI: 00:14.3 cmd <- 02
1907 06:16:51.382449 PCI: 00:15.0 subsystem <- 8086/51e8
1908 06:16:51.385699 PCI: 00:15.0 cmd <- 02
1909 06:16:51.389402 PCI: 00:15.1 subsystem <- 8086/51e9
1910 06:16:51.392812 PCI: 00:15.1 cmd <- 06
1911 06:16:51.395996 PCI: 00:15.3 subsystem <- 8086/51eb
1912 06:16:51.399490 PCI: 00:15.3 cmd <- 02
1913 06:16:51.402549 PCI: 00:16.0 subsystem <- 8086/51e0
1914 06:16:51.403099 PCI: 00:16.0 cmd <- 02
1915 06:16:51.405778 PCI: 00:19.1 subsystem <- 8086/51c6
1916 06:16:51.409433 PCI: 00:19.1 cmd <- 02
1917 06:16:51.412772 PCI: 00:1e.0 subsystem <- 8086/51a8
1918 06:16:51.416145 PCI: 00:1e.0 cmd <- 06
1919 06:16:51.419314 PCI: 00:1e.3 subsystem <- 8086/51ab
1920 06:16:51.422555 PCI: 00:1e.3 cmd <- 02
1921 06:16:51.426130 PCI: 00:1f.0 subsystem <- 8086/5182
1922 06:16:51.429224 PCI: 00:1f.0 cmd <- 407
1923 06:16:51.432431 PCI: 00:1f.3 subsystem <- 8086/51c8
1924 06:16:51.432988 PCI: 00:1f.3 cmd <- 02
1925 06:16:51.435784 PCI: 00:1f.5 subsystem <- 8086/51a4
1926 06:16:51.438841 PCI: 00:1f.5 cmd <- 406
1927 06:16:51.442981 PCI: 01:00.0 cmd <- 02
1928 06:16:51.443540 done.
1929 06:16:51.449303 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1930 06:16:51.452549 ME: Version: Unavailable
1931 06:16:51.455881 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1932 06:16:51.459200 Initializing devices...
1933 06:16:51.462828 Root Device init
1934 06:16:51.463379 mainboard: EC init
1935 06:16:51.468841 Chrome EC: Set SMI mask to 0x0000000000000000
1936 06:16:51.469480 Chrome EC: UHEPI supported
1937 06:16:51.476153 Chrome EC: clear events_b mask to 0x0000000000000000
1938 06:16:51.482625 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1939 06:16:51.489309 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1940 06:16:51.496335 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1941 06:16:51.499255 Chrome EC: Set WAKE mask to 0x0000000000000000
1942 06:16:51.507259 Root Device init finished in 40 msecs
1943 06:16:51.507812 PCI: 00:00.0 init
1944 06:16:51.510270 CPU TDP = 15 Watts
1945 06:16:51.513622 CPU PL1 = 15 Watts
1946 06:16:51.514178 CPU PL2 = 55 Watts
1947 06:16:51.516952 CPU PL4 = 123 Watts
1948 06:16:51.520666 PCI: 00:00.0 init finished in 8 msecs
1949 06:16:51.524024 PCI: 00:02.0 init
1950 06:16:51.524579 GMA: Found VBT in CBFS
1951 06:16:51.527445 GMA: Found valid VBT in CBFS
1952 06:16:51.533532 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1953 06:16:51.539987 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1954 06:16:51.543710 PCI: 00:02.0 init finished in 18 msecs
1955 06:16:51.547644 PCI: 00:06.0 init
1956 06:16:51.549853 Initializing PCH PCIe bridge.
1957 06:16:51.553246 PCI: 00:06.0 init finished in 3 msecs
1958 06:16:51.556942 PCI: 00:0a.0 init
1959 06:16:51.560580 PCI: 00:0a.0 init finished in 0 msecs
1960 06:16:51.561170 PCI: 00:14.0 init
1961 06:16:51.563531 PCI: 00:14.0 init finished in 0 msecs
1962 06:16:51.566564 PCI: 00:14.2 init
1963 06:16:51.569830 PCI: 00:14.2 init finished in 0 msecs
1964 06:16:51.573780 PCI: 00:15.0 init
1965 06:16:51.576755 I2C bus 0 version 0x3230302a
1966 06:16:51.579666 DW I2C bus 0 at 0x80655000 (400 KHz)
1967 06:16:51.583230 PCI: 00:15.0 init finished in 6 msecs
1968 06:16:51.583784 PCI: 00:15.1 init
1969 06:16:51.586645 I2C bus 1 version 0x3230302a
1970 06:16:51.590162 DW I2C bus 1 at 0x80656000 (400 KHz)
1971 06:16:51.596881 PCI: 00:15.1 init finished in 6 msecs
1972 06:16:51.597476 PCI: 00:15.3 init
1973 06:16:51.600729 I2C bus 3 version 0x3230302a
1974 06:16:51.603163 DW I2C bus 3 at 0x80657000 (400 KHz)
1975 06:16:51.606819 PCI: 00:15.3 init finished in 6 msecs
1976 06:16:51.610352 PCI: 00:16.0 init
1977 06:16:51.613483 PCI: 00:16.0 init finished in 0 msecs
1978 06:16:51.616394 PCI: 00:19.1 init
1979 06:16:51.616944 I2C bus 5 version 0x3230302a
1980 06:16:51.623462 DW I2C bus 5 at 0x80659000 (400 KHz)
1981 06:16:51.626769 PCI: 00:19.1 init finished in 6 msecs
1982 06:16:51.627326 PCI: 00:1f.0 init
1983 06:16:51.633166 IOAPIC: Initializing IOAPIC at 0xfec00000
1984 06:16:51.633725 IOAPIC: ID = 0x02
1985 06:16:51.637368 IOAPIC: Dumping registers
1986 06:16:51.639834 reg 0x0000: 0x02000000
1987 06:16:51.640289 reg 0x0001: 0x00770020
1988 06:16:51.643616 reg 0x0002: 0x00000000
1989 06:16:51.646302 IOAPIC: 120 interrupts
1990 06:16:51.650212 IOAPIC: Clearing IOAPIC at 0xfec00000
1991 06:16:51.653689 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1992 06:16:51.660063 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1993 06:16:51.662919 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1994 06:16:51.669744 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1995 06:16:51.673632 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1996 06:16:51.679512 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1997 06:16:51.682951 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1998 06:16:51.689786 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1999 06:16:51.693131 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2000 06:16:51.696424 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2001 06:16:51.703348 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2002 06:16:51.706736 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2003 06:16:51.713143 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2004 06:16:51.716771 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2005 06:16:51.722862 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2006 06:16:51.726961 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2007 06:16:51.733137 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2008 06:16:51.736550 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2009 06:16:51.739538 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2010 06:16:51.746708 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2011 06:16:51.749462 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2012 06:16:51.756126 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2013 06:16:51.759558 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2014 06:16:51.765902 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2015 06:16:51.769303 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2016 06:16:51.776197 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2017 06:16:51.779492 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2018 06:16:51.782448 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2019 06:16:51.789888 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2020 06:16:51.792726 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2021 06:16:51.799478 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2022 06:16:51.802454 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2023 06:16:51.809557 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2024 06:16:51.812859 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2025 06:16:51.815878 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2026 06:16:51.822587 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2027 06:16:51.826355 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2028 06:16:51.832894 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2029 06:16:51.836038 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2030 06:16:51.842498 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2031 06:16:51.846103 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2032 06:16:51.852562 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2033 06:16:51.855920 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2034 06:16:51.859211 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2035 06:16:51.865882 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2036 06:16:51.869711 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2037 06:16:51.876205 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2038 06:16:51.879102 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2039 06:16:51.885725 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2040 06:16:51.889397 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2041 06:16:51.895938 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2042 06:16:51.898838 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2043 06:16:51.902230 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2044 06:16:51.909200 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2045 06:16:51.912269 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2046 06:16:51.919284 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2047 06:16:51.922669 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2048 06:16:51.928990 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2049 06:16:51.932417 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2050 06:16:51.938844 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2051 06:16:51.942291 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2052 06:16:51.946022 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2053 06:16:51.953031 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2054 06:16:51.955690 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2055 06:16:51.962202 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2056 06:16:51.965815 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2057 06:16:51.972371 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2058 06:16:51.975821 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2059 06:16:51.978879 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2060 06:16:51.985486 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2061 06:16:51.989071 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2062 06:16:51.995463 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2063 06:16:51.998537 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2064 06:16:52.005412 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2065 06:16:52.008781 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2066 06:16:52.015357 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2067 06:16:52.019063 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2068 06:16:52.022378 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2069 06:16:52.028829 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2070 06:16:52.032515 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2071 06:16:52.039162 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2072 06:16:52.042019 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2073 06:16:52.049068 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2074 06:16:52.052299 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2075 06:16:52.058811 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2076 06:16:52.062062 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2077 06:16:52.065606 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2078 06:16:52.072041 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2079 06:16:52.075466 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2080 06:16:52.082320 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2081 06:16:52.085073 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2082 06:16:52.091548 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2083 06:16:52.095079 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2084 06:16:52.101897 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2085 06:16:52.105499 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2086 06:16:52.108937 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2087 06:16:52.115201 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2088 06:16:52.118227 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2089 06:16:52.125016 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2090 06:16:52.128363 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2091 06:16:52.134812 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2092 06:16:52.138039 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2093 06:16:52.145205 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2094 06:16:52.148673 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2095 06:16:52.151644 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2096 06:16:52.158286 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2097 06:16:52.162040 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2098 06:16:52.168374 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2099 06:16:52.171684 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2100 06:16:52.178192 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2101 06:16:52.181396 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2102 06:16:52.184935 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2103 06:16:52.191277 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2104 06:16:52.195341 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2105 06:16:52.201344 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2106 06:16:52.204771 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2107 06:16:52.211347 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2108 06:16:52.216230 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2109 06:16:52.221760 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2110 06:16:52.225206 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2111 06:16:52.227891 IOAPIC: Bootstrap Processor Local APIC = 0x00
2112 06:16:52.234722 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2113 06:16:52.237915 PCI: 00:1f.0 init finished in 607 msecs
2114 06:16:52.241793 PCI: 00:1f.2 init
2115 06:16:52.245031 apm_control: Disabling ACPI.
2116 06:16:52.247990 APMC done.
2117 06:16:52.252051 PCI: 00:1f.2 init finished in 6 msecs
2118 06:16:52.252614 PCI: 00:1f.3 init
2119 06:16:52.255119 PCI: 00:1f.3 init finished in 0 msecs
2120 06:16:52.258335 PCI: 01:00.0 init
2121 06:16:52.262016 PCI: 01:00.0 init finished in 0 msecs
2122 06:16:52.265031 PNP: 0c09.0 init
2123 06:16:52.269714 Google Chrome EC uptime: 12.113 seconds
2124 06:16:52.271703 Google Chrome AP resets since EC boot: 1
2125 06:16:52.278260 Google Chrome most recent AP reset causes:
2126 06:16:52.281546 0.341: 32775 shutdown: entering G3
2127 06:16:52.288572 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2128 06:16:52.291367 PNP: 0c09.0 init finished in 23 msecs
2129 06:16:52.291839 GENERIC: 0.0 init
2130 06:16:52.294612 GENERIC: 0.0 init finished in 0 msecs
2131 06:16:52.298253 GENERIC: 1.0 init
2132 06:16:52.301911 GENERIC: 1.0 init finished in 0 msecs
2133 06:16:52.305035 Devices initialized
2134 06:16:52.308263 Show all devs... After init.
2135 06:16:52.308811 Root Device: enabled 1
2136 06:16:52.311914 CPU_CLUSTER: 0: enabled 1
2137 06:16:52.314851 DOMAIN: 0000: enabled 1
2138 06:16:52.315403 GPIO: 0: enabled 1
2139 06:16:52.318280 PCI: 00:00.0: enabled 1
2140 06:16:52.321479 PCI: 00:01.0: enabled 0
2141 06:16:52.325234 PCI: 00:01.1: enabled 0
2142 06:16:52.325791 PCI: 00:02.0: enabled 1
2143 06:16:52.328168 PCI: 00:04.0: enabled 1
2144 06:16:52.331447 PCI: 00:05.0: enabled 0
2145 06:16:52.335035 PCI: 00:06.0: enabled 1
2146 06:16:52.335590 PCI: 00:06.2: enabled 0
2147 06:16:52.338466 PCI: 00:07.0: enabled 0
2148 06:16:52.341954 PCI: 00:07.1: enabled 0
2149 06:16:52.344673 PCI: 00:07.2: enabled 0
2150 06:16:52.345265 PCI: 00:07.3: enabled 0
2151 06:16:52.348378 PCI: 00:08.0: enabled 0
2152 06:16:52.351469 PCI: 00:09.0: enabled 0
2153 06:16:52.354925 PCI: 00:0a.0: enabled 1
2154 06:16:52.355475 PCI: 00:0d.0: enabled 1
2155 06:16:52.358186 PCI: 00:0d.1: enabled 0
2156 06:16:52.361432 PCI: 00:0d.2: enabled 0
2157 06:16:52.361990 PCI: 00:0d.3: enabled 0
2158 06:16:52.365260 PCI: 00:0e.0: enabled 0
2159 06:16:52.368068 PCI: 00:10.0: enabled 0
2160 06:16:52.371500 PCI: 00:10.1: enabled 0
2161 06:16:52.372112 PCI: 00:10.6: enabled 0
2162 06:16:52.374832 PCI: 00:10.7: enabled 0
2163 06:16:52.378577 PCI: 00:12.0: enabled 0
2164 06:16:52.381586 PCI: 00:12.6: enabled 0
2165 06:16:52.382045 PCI: 00:12.7: enabled 0
2166 06:16:52.384416 PCI: 00:13.0: enabled 0
2167 06:16:52.387886 PCI: 00:14.0: enabled 1
2168 06:16:52.391181 PCI: 00:14.1: enabled 0
2169 06:16:52.391641 PCI: 00:14.2: enabled 1
2170 06:16:52.394554 PCI: 00:14.3: enabled 1
2171 06:16:52.397881 PCI: 00:15.0: enabled 1
2172 06:16:52.398343 PCI: 00:15.1: enabled 1
2173 06:16:52.401222 PCI: 00:15.2: enabled 0
2174 06:16:52.404471 PCI: 00:15.3: enabled 1
2175 06:16:52.407958 PCI: 00:16.0: enabled 1
2176 06:16:52.408424 PCI: 00:16.1: enabled 0
2177 06:16:52.411331 PCI: 00:16.2: enabled 0
2178 06:16:52.414889 PCI: 00:16.3: enabled 0
2179 06:16:52.417809 PCI: 00:16.4: enabled 0
2180 06:16:52.418273 PCI: 00:16.5: enabled 0
2181 06:16:52.421641 PCI: 00:17.0: enabled 0
2182 06:16:52.424743 PCI: 00:19.0: enabled 0
2183 06:16:52.428159 PCI: 00:19.1: enabled 1
2184 06:16:52.428725 PCI: 00:19.2: enabled 0
2185 06:16:52.431329 PCI: 00:1a.0: enabled 0
2186 06:16:52.434566 PCI: 00:1c.0: enabled 0
2187 06:16:52.438529 PCI: 00:1c.1: enabled 0
2188 06:16:52.439096 PCI: 00:1c.2: enabled 0
2189 06:16:52.441693 PCI: 00:1c.3: enabled 0
2190 06:16:52.444580 PCI: 00:1c.4: enabled 0
2191 06:16:52.445178 PCI: 00:1c.5: enabled 0
2192 06:16:52.447421 PCI: 00:1c.6: enabled 0
2193 06:16:52.451286 PCI: 00:1c.7: enabled 0
2194 06:16:52.454192 PCI: 00:1d.0: enabled 0
2195 06:16:52.454656 PCI: 00:1d.1: enabled 0
2196 06:16:52.457671 PCI: 00:1d.2: enabled 0
2197 06:16:52.461341 PCI: 00:1d.3: enabled 0
2198 06:16:52.464671 PCI: 00:1e.0: enabled 1
2199 06:16:52.465286 PCI: 00:1e.1: enabled 0
2200 06:16:52.468098 PCI: 00:1e.2: enabled 0
2201 06:16:52.471391 PCI: 00:1e.3: enabled 1
2202 06:16:52.474992 PCI: 00:1f.0: enabled 1
2203 06:16:52.475557 PCI: 00:1f.1: enabled 0
2204 06:16:52.478028 PCI: 00:1f.2: enabled 1
2205 06:16:52.481123 PCI: 00:1f.3: enabled 1
2206 06:16:52.481702 PCI: 00:1f.4: enabled 0
2207 06:16:52.484000 PCI: 00:1f.5: enabled 1
2208 06:16:52.487277 PCI: 00:1f.6: enabled 0
2209 06:16:52.491283 PCI: 00:1f.7: enabled 0
2210 06:16:52.491795 GENERIC: 0.0: enabled 1
2211 06:16:52.493931 GENERIC: 0.0: enabled 1
2212 06:16:52.497491 GENERIC: 1.0: enabled 1
2213 06:16:52.500833 GENERIC: 0.0: enabled 1
2214 06:16:52.501337 GENERIC: 1.0: enabled 1
2215 06:16:52.504711 USB0 port 0: enabled 1
2216 06:16:52.507348 USB0 port 0: enabled 1
2217 06:16:52.511344 GENERIC: 0.0: enabled 1
2218 06:16:52.511910 I2C: 00:1a: enabled 1
2219 06:16:52.513845 I2C: 00:31: enabled 1
2220 06:16:52.517822 I2C: 00:32: enabled 1
2221 06:16:52.518382 I2C: 00:50: enabled 1
2222 06:16:52.520815 I2C: 00:10: enabled 1
2223 06:16:52.524513 I2C: 00:15: enabled 1
2224 06:16:52.525077 I2C: 00:2c: enabled 1
2225 06:16:52.527906 GENERIC: 0.0: enabled 1
2226 06:16:52.531550 SPI: 00: enabled 1
2227 06:16:52.532113 PNP: 0c09.0: enabled 1
2228 06:16:52.534100 GENERIC: 0.0: enabled 1
2229 06:16:52.537537 USB3 port 0: enabled 1
2230 06:16:52.538188 USB3 port 1: enabled 0
2231 06:16:52.540930 USB3 port 2: enabled 1
2232 06:16:52.544678 USB3 port 3: enabled 0
2233 06:16:52.547105 USB2 port 0: enabled 1
2234 06:16:52.547567 USB2 port 1: enabled 0
2235 06:16:52.550882 USB2 port 2: enabled 1
2236 06:16:52.553968 USB2 port 3: enabled 0
2237 06:16:52.554431 USB2 port 4: enabled 0
2238 06:16:52.557972 USB2 port 5: enabled 1
2239 06:16:52.561137 USB2 port 6: enabled 0
2240 06:16:52.561712 USB2 port 7: enabled 0
2241 06:16:52.564616 USB2 port 8: enabled 1
2242 06:16:52.567855 USB2 port 9: enabled 1
2243 06:16:52.571234 USB3 port 0: enabled 1
2244 06:16:52.571871 USB3 port 1: enabled 0
2245 06:16:52.573844 USB3 port 2: enabled 0
2246 06:16:52.577875 USB3 port 3: enabled 0
2247 06:16:52.578436 GENERIC: 0.0: enabled 1
2248 06:16:52.580783 GENERIC: 1.0: enabled 1
2249 06:16:52.584274 APIC: 00: enabled 1
2250 06:16:52.584849 APIC: 14: enabled 1
2251 06:16:52.587048 APIC: 16: enabled 1
2252 06:16:52.590561 APIC: 10: enabled 1
2253 06:16:52.591024 APIC: 12: enabled 1
2254 06:16:52.594134 APIC: 01: enabled 1
2255 06:16:52.597043 APIC: 08: enabled 1
2256 06:16:52.597698 APIC: 09: enabled 1
2257 06:16:52.600781 PCI: 01:00.0: enabled 1
2258 06:16:52.607421 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2259 06:16:52.610264 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2260 06:16:52.613813 ELOG: NV offset 0xf20000 size 0x4000
2261 06:16:52.621081 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2262 06:16:52.628624 ELOG: Event(17) added with size 13 at 2023-07-04 06:16:52 UTC
2263 06:16:52.635664 ELOG: Event(9E) added with size 10 at 2023-07-04 06:16:52 UTC
2264 06:16:52.641643 ELOG: Event(9F) added with size 14 at 2023-07-04 06:16:52 UTC
2265 06:16:52.648340 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2266 06:16:52.654660 ELOG: Event(A0) added with size 9 at 2023-07-04 06:16:52 UTC
2267 06:16:52.657721 elog_add_boot_reason: Logged dev mode boot
2268 06:16:52.664346 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2269 06:16:52.664981 Finalize devices...
2270 06:16:52.667881 PCI: 00:16.0 final
2271 06:16:52.671653 PCI: 00:1f.2 final
2272 06:16:52.672110 GENERIC: 0.0 final
2273 06:16:52.677729 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2274 06:16:52.681205 GENERIC: 1.0 final
2275 06:16:52.684499 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2276 06:16:52.687749 Devices finalized
2277 06:16:52.694667 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2278 06:16:52.697698 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2279 06:16:52.704561 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2280 06:16:52.707831 ME: HFSTS1 : 0x90000245
2281 06:16:52.714440 ME: HFSTS2 : 0x82100116
2282 06:16:52.717870 ME: HFSTS3 : 0x00000050
2283 06:16:52.721267 ME: HFSTS4 : 0x00004000
2284 06:16:52.728414 ME: HFSTS5 : 0x00000000
2285 06:16:52.731051 ME: HFSTS6 : 0x40600006
2286 06:16:52.734327 ME: Manufacturing Mode : NO
2287 06:16:52.737830 ME: SPI Protection Mode Enabled : YES
2288 06:16:52.744588 ME: FPFs Committed : YES
2289 06:16:52.747571 ME: Manufacturing Vars Locked : YES
2290 06:16:52.751795 ME: FW Partition Table : OK
2291 06:16:52.754574 ME: Bringup Loader Failure : NO
2292 06:16:52.757708 ME: Firmware Init Complete : YES
2293 06:16:52.761169 ME: Boot Options Present : NO
2294 06:16:52.764682 ME: Update In Progress : NO
2295 06:16:52.770912 ME: D0i3 Support : YES
2296 06:16:52.774042 ME: Low Power State Enabled : NO
2297 06:16:52.777397 ME: CPU Replaced : YES
2298 06:16:52.780816 ME: CPU Replacement Valid : YES
2299 06:16:52.784039 ME: Current Working State : 5
2300 06:16:52.787672 ME: Current Operation State : 1
2301 06:16:52.790790 ME: Current Operation Mode : 0
2302 06:16:52.793909 ME: Error Code : 0
2303 06:16:52.797315 ME: Enhanced Debug Mode : NO
2304 06:16:52.804400 ME: CPU Debug Disabled : YES
2305 06:16:52.807692 ME: TXT Support : NO
2306 06:16:52.811015 ME: WP for RO is enabled : YES
2307 06:16:52.817799 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2308 06:16:52.821398 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2309 06:16:52.827403 Ramoops buffer: 0x100000@0x76899000.
2310 06:16:52.830586 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2311 06:16:52.840445 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2312 06:16:52.844271 CBFS: 'fallback/slic' not found.
2313 06:16:52.847005 ACPI: Writing ACPI tables at 7686d000.
2314 06:16:52.847525 ACPI: * FACS
2315 06:16:52.850458 ACPI: * DSDT
2316 06:16:52.857366 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2317 06:16:52.860762 ACPI: * FADT
2318 06:16:52.861402 SCI is IRQ9
2319 06:16:52.863946 ACPI: added table 1/32, length now 40
2320 06:16:52.867007 ACPI: * SSDT
2321 06:16:52.873855 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2322 06:16:52.877368 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2323 06:16:52.883466 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2324 06:16:52.886769 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2325 06:16:52.893595 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2326 06:16:52.896823 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2327 06:16:52.903696 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2328 06:16:52.910177 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2329 06:16:52.913468 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2330 06:16:52.920244 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2331 06:16:52.924382 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2332 06:16:52.930661 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2333 06:16:52.933842 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2334 06:16:52.936759 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2335 06:16:52.946291 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2336 06:16:52.949540 PS2K: Passing 80 keymaps to kernel
2337 06:16:52.956557 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2338 06:16:52.962964 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2339 06:16:52.969591 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2340 06:16:52.976251 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2341 06:16:52.983020 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2342 06:16:52.989817 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2343 06:16:52.992538 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2344 06:16:52.999166 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2345 06:16:53.005942 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2346 06:16:53.012732 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2347 06:16:53.016106 ACPI: added table 2/32, length now 44
2348 06:16:53.019858 ACPI: * MCFG
2349 06:16:53.022915 ACPI: added table 3/32, length now 48
2350 06:16:53.023493 ACPI: * TPM2
2351 06:16:53.026481 TPM2 log created at 0x7685d000
2352 06:16:53.030053 ACPI: added table 4/32, length now 52
2353 06:16:53.033352 ACPI: * LPIT
2354 06:16:53.036283 ACPI: added table 5/32, length now 56
2355 06:16:53.039081 ACPI: * MADT
2356 06:16:53.039589 SCI is IRQ9
2357 06:16:53.042803 ACPI: added table 6/32, length now 60
2358 06:16:53.046146 cmd_reg from pmc_make_ipc_cmd 1052838
2359 06:16:53.052604 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2360 06:16:53.059623 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2361 06:16:53.066030 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2362 06:16:53.069168 PMC CrashLog size in discovery mode: 0xC00
2363 06:16:53.072766 cpu crashlog bar addr: 0x80640000
2364 06:16:53.075972 cpu discovery table offset: 0x6030
2365 06:16:53.082768 cpu_crashlog_discovery_table buffer count: 0x3
2366 06:16:53.089283 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2367 06:16:53.096401 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2368 06:16:53.102375 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2369 06:16:53.105793 PMC crashLog size in discovery mode : 0xC00
2370 06:16:53.112434 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2371 06:16:53.118833 discover mode PMC crashlog size adjusted to: 0x200
2372 06:16:53.125378 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2373 06:16:53.129394 discover mode PMC crashlog size adjusted to: 0x0
2374 06:16:53.132434 m_cpu_crashLog_size : 0x3480 bytes
2375 06:16:53.135846 CPU crashLog present.
2376 06:16:53.139250 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2377 06:16:53.148761 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2378 06:16:53.149380 current = 76876550
2379 06:16:53.152144 ACPI: * DMAR
2380 06:16:53.155921 ACPI: added table 7/32, length now 64
2381 06:16:53.159053 ACPI: added table 8/32, length now 68
2382 06:16:53.159622 ACPI: * HPET
2383 06:16:53.165474 ACPI: added table 9/32, length now 72
2384 06:16:53.166181 ACPI: done.
2385 06:16:53.169484 ACPI tables: 38528 bytes.
2386 06:16:53.172644 smbios_write_tables: 76857000
2387 06:16:53.175996 EC returned error result code 3
2388 06:16:53.178695 Couldn't obtain OEM name from CBI
2389 06:16:53.182529 Create SMBIOS type 16
2390 06:16:53.183089 Create SMBIOS type 17
2391 06:16:53.185717 Create SMBIOS type 20
2392 06:16:53.188649 GENERIC: 0.0 (WIFI Device)
2393 06:16:53.193004 SMBIOS tables: 2156 bytes.
2394 06:16:53.195951 Writing table forward entry at 0x00000500
2395 06:16:53.202342 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2396 06:16:53.205631 Writing coreboot table at 0x76891000
2397 06:16:53.212695 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2398 06:16:53.215613 1. 0000000000001000-000000000009ffff: RAM
2399 06:16:53.218656 2. 00000000000a0000-00000000000fffff: RESERVED
2400 06:16:53.225350 3. 0000000000100000-0000000076856fff: RAM
2401 06:16:53.229164 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2402 06:16:53.235351 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2403 06:16:53.241757 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2404 06:16:53.245454 7. 0000000077000000-00000000803fffff: RESERVED
2405 06:16:53.252381 8. 00000000c0000000-00000000cfffffff: RESERVED
2406 06:16:53.255550 9. 00000000f8000000-00000000f9ffffff: RESERVED
2407 06:16:53.258991 10. 00000000fb000000-00000000fb000fff: RESERVED
2408 06:16:53.265756 11. 00000000fc800000-00000000fe7fffff: RESERVED
2409 06:16:53.269156 12. 00000000feb00000-00000000feb7ffff: RESERVED
2410 06:16:53.275270 13. 00000000fec00000-00000000fecfffff: RESERVED
2411 06:16:53.278759 14. 00000000fed40000-00000000fed6ffff: RESERVED
2412 06:16:53.285310 15. 00000000fed80000-00000000fed87fff: RESERVED
2413 06:16:53.289230 16. 00000000fed90000-00000000fed92fff: RESERVED
2414 06:16:53.294830 17. 00000000feda0000-00000000feda1fff: RESERVED
2415 06:16:53.298509 18. 00000000fedc0000-00000000feddffff: RESERVED
2416 06:16:53.301835 19. 0000000100000000-000000027fbfffff: RAM
2417 06:16:53.305320 Passing 4 GPIOs to payload:
2418 06:16:53.312201 NAME | PORT | POLARITY | VALUE
2419 06:16:53.315503 lid | undefined | high | high
2420 06:16:53.321953 power | undefined | high | low
2421 06:16:53.328345 oprom | undefined | high | low
2422 06:16:53.332073 EC in RW | 0x00000151 | high | high
2423 06:16:53.332673 Board ID: 3
2424 06:16:53.335430 FW config: 0x131
2425 06:16:53.341905 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 12c5
2426 06:16:53.345757 coreboot table: 1748 bytes.
2427 06:16:53.349189 IMD ROOT 0. 0x76fff000 0x00001000
2428 06:16:53.351766 IMD SMALL 1. 0x76ffe000 0x00001000
2429 06:16:53.355325 FSP MEMORY 2. 0x76afe000 0x00500000
2430 06:16:53.358645 CONSOLE 3. 0x76ade000 0x00020000
2431 06:16:53.361883 RW MCACHE 4. 0x76add000 0x0000043c
2432 06:16:53.368450 RO MCACHE 5. 0x76adc000 0x00000fd8
2433 06:16:53.371423 FMAP 6. 0x76adb000 0x0000064a
2434 06:16:53.375474 TIME STAMP 7. 0x76ada000 0x00000910
2435 06:16:53.378399 VBOOT WORK 8. 0x76ac6000 0x00014000
2436 06:16:53.381896 MEM INFO 9. 0x76ac5000 0x000003b8
2437 06:16:53.385283 ROMSTG STCK10. 0x76ac4000 0x00001000
2438 06:16:53.388354 AFTER CAR 11. 0x76ab8000 0x0000c000
2439 06:16:53.392241 RAMSTAGE 12. 0x76a2e000 0x0008a000
2440 06:16:53.395332 ACPI BERT 13. 0x76a1e000 0x00010000
2441 06:16:53.401860 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2442 06:16:53.405419 REFCODE 15. 0x769ae000 0x0006f000
2443 06:16:53.408595 SMM BACKUP 16. 0x7699e000 0x00010000
2444 06:16:53.411791 IGD OPREGION17. 0x76999000 0x00004203
2445 06:16:53.414974 RAMOOPS 18. 0x76899000 0x00100000
2446 06:16:53.418723 COREBOOT 19. 0x76891000 0x00008000
2447 06:16:53.421726 ACPI 20. 0x7686d000 0x00024000
2448 06:16:53.424725 TPM2 TCGLOG21. 0x7685d000 0x00010000
2449 06:16:53.431623 PMC CRASHLOG22. 0x7685c000 0x00000c00
2450 06:16:53.435320 CPU CRASHLOG23. 0x76858000 0x00003480
2451 06:16:53.438145 SMBIOS 24. 0x76857000 0x00001000
2452 06:16:53.438567 IMD small region:
2453 06:16:53.444881 IMD ROOT 0. 0x76ffec00 0x00000400
2454 06:16:53.448456 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2455 06:16:53.451933 POWER STATE 2. 0x76ffeb80 0x00000044
2456 06:16:53.455175 ROMSTAGE 3. 0x76ffeb60 0x00000004
2457 06:16:53.458702 ACPI GNVS 4. 0x76ffeb00 0x00000048
2458 06:16:53.462088 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2459 06:16:53.468549 BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms
2460 06:16:53.472091 MTRR: Physical address space:
2461 06:16:53.478274 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2462 06:16:53.485210 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2463 06:16:53.491620 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2464 06:16:53.498015 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2465 06:16:53.504876 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2466 06:16:53.508433 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2467 06:16:53.515228 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2468 06:16:53.521797 MTRR: Fixed MSR 0x250 0x0606060606060606
2469 06:16:53.525295 MTRR: Fixed MSR 0x258 0x0606060606060606
2470 06:16:53.528008 MTRR: Fixed MSR 0x259 0x0000000000000000
2471 06:16:53.531478 MTRR: Fixed MSR 0x268 0x0606060606060606
2472 06:16:53.538302 MTRR: Fixed MSR 0x269 0x0606060606060606
2473 06:16:53.541287 MTRR: Fixed MSR 0x26a 0x0606060606060606
2474 06:16:53.545009 MTRR: Fixed MSR 0x26b 0x0606060606060606
2475 06:16:53.548289 MTRR: Fixed MSR 0x26c 0x0606060606060606
2476 06:16:53.551974 MTRR: Fixed MSR 0x26d 0x0606060606060606
2477 06:16:53.557930 MTRR: Fixed MSR 0x26e 0x0606060606060606
2478 06:16:53.561442 MTRR: Fixed MSR 0x26f 0x0606060606060606
2479 06:16:53.564545 call enable_fixed_mtrr()
2480 06:16:53.568849 CPU physical address size: 39 bits
2481 06:16:53.571496 MTRR: default type WB/UC MTRR counts: 6/6.
2482 06:16:53.578126 MTRR: UC selected as default type.
2483 06:16:53.581339 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2484 06:16:53.587816 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2485 06:16:53.594425 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2486 06:16:53.601170 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2487 06:16:53.607760 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2488 06:16:53.614466 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2489 06:16:53.621707 MTRR: Fixed MSR 0x250 0x0606060606060606
2490 06:16:53.624911 MTRR: Fixed MSR 0x258 0x0606060606060606
2491 06:16:53.628282 MTRR: Fixed MSR 0x259 0x0000000000000000
2492 06:16:53.631285 MTRR: Fixed MSR 0x268 0x0606060606060606
2493 06:16:53.634868 MTRR: Fixed MSR 0x269 0x0606060606060606
2494 06:16:53.641036 MTRR: Fixed MSR 0x26a 0x0606060606060606
2495 06:16:53.644300 MTRR: Fixed MSR 0x26b 0x0606060606060606
2496 06:16:53.647854 MTRR: Fixed MSR 0x26c 0x0606060606060606
2497 06:16:53.651452 MTRR: Fixed MSR 0x26d 0x0606060606060606
2498 06:16:53.657786 MTRR: Fixed MSR 0x26e 0x0606060606060606
2499 06:16:53.661084 MTRR: Fixed MSR 0x26f 0x0606060606060606
2500 06:16:53.664280 MTRR: Fixed MSR 0x250 0x0606060606060606
2501 06:16:53.667667 call enable_fixed_mtrr()
2502 06:16:53.670991 MTRR: Fixed MSR 0x250 0x0606060606060606
2503 06:16:53.677357 MTRR: Fixed MSR 0x250 0x0606060606060606
2504 06:16:53.680955 MTRR: Fixed MSR 0x250 0x0606060606060606
2505 06:16:53.684180 MTRR: Fixed MSR 0x258 0x0606060606060606
2506 06:16:53.687183 MTRR: Fixed MSR 0x259 0x0000000000000000
2507 06:16:53.693888 MTRR: Fixed MSR 0x268 0x0606060606060606
2508 06:16:53.697052 MTRR: Fixed MSR 0x269 0x0606060606060606
2509 06:16:53.700566 MTRR: Fixed MSR 0x258 0x0606060606060606
2510 06:16:53.703619 MTRR: Fixed MSR 0x259 0x0000000000000000
2511 06:16:53.707289 MTRR: Fixed MSR 0x268 0x0606060606060606
2512 06:16:53.713935 MTRR: Fixed MSR 0x269 0x0606060606060606
2513 06:16:53.717082 MTRR: Fixed MSR 0x26a 0x0606060606060606
2514 06:16:53.721086 MTRR: Fixed MSR 0x26b 0x0606060606060606
2515 06:16:53.724009 MTRR: Fixed MSR 0x26c 0x0606060606060606
2516 06:16:53.730647 MTRR: Fixed MSR 0x26d 0x0606060606060606
2517 06:16:53.733991 MTRR: Fixed MSR 0x26e 0x0606060606060606
2518 06:16:53.737208 MTRR: Fixed MSR 0x26f 0x0606060606060606
2519 06:16:53.740712 MTRR: Fixed MSR 0x250 0x0606060606060606
2520 06:16:53.747474 MTRR: Fixed MSR 0x26a 0x0606060606060606
2521 06:16:53.750057 MTRR: Fixed MSR 0x258 0x0606060606060606
2522 06:16:53.753883 call enable_fixed_mtrr()
2523 06:16:53.756610 MTRR: Fixed MSR 0x258 0x0606060606060606
2524 06:16:53.760227 MTRR: Fixed MSR 0x259 0x0000000000000000
2525 06:16:53.764021 MTRR: Fixed MSR 0x268 0x0606060606060606
2526 06:16:53.770387 MTRR: Fixed MSR 0x269 0x0606060606060606
2527 06:16:53.773494 CPU physical address size: 39 bits
2528 06:16:53.777228 CPU physical address size: 39 bits
2529 06:16:53.779880 MTRR: Fixed MSR 0x26b 0x0606060606060606
2530 06:16:53.783988 MTRR: Fixed MSR 0x259 0x0000000000000000
2531 06:16:53.786868 MTRR: Fixed MSR 0x26c 0x0606060606060606
2532 06:16:53.793651 MTRR: Fixed MSR 0x26d 0x0606060606060606
2533 06:16:53.796549 MTRR: Fixed MSR 0x26e 0x0606060606060606
2534 06:16:53.800040 MTRR: Fixed MSR 0x26f 0x0606060606060606
2535 06:16:53.803727 MTRR: Fixed MSR 0x26a 0x0606060606060606
2536 06:16:53.806539 call enable_fixed_mtrr()
2537 06:16:53.810017 MTRR: Fixed MSR 0x250 0x0606060606060606
2538 06:16:53.816601 MTRR: Fixed MSR 0x26b 0x0606060606060606
2539 06:16:53.820192 MTRR: Fixed MSR 0x26c 0x0606060606060606
2540 06:16:53.823646 MTRR: Fixed MSR 0x26d 0x0606060606060606
2541 06:16:53.826609 MTRR: Fixed MSR 0x26e 0x0606060606060606
2542 06:16:53.830257 MTRR: Fixed MSR 0x26f 0x0606060606060606
2543 06:16:53.836885 MTRR: Fixed MSR 0x268 0x0606060606060606
2544 06:16:53.837444 call enable_fixed_mtrr()
2545 06:16:53.843383 MTRR: Fixed MSR 0x269 0x0606060606060606
2546 06:16:53.846704 CPU physical address size: 39 bits
2547 06:16:53.849797 MTRR: Fixed MSR 0x258 0x0606060606060606
2548 06:16:53.853467 CPU physical address size: 39 bits
2549 06:16:53.856390 MTRR: Fixed MSR 0x26a 0x0606060606060606
2550 06:16:53.863424 MTRR: Fixed MSR 0x258 0x0606060606060606
2551 06:16:53.866982 MTRR: Fixed MSR 0x26b 0x0606060606060606
2552 06:16:53.869730 MTRR: Fixed MSR 0x26c 0x0606060606060606
2553 06:16:53.872874 MTRR: Fixed MSR 0x26d 0x0606060606060606
2554 06:16:53.876764 MTRR: Fixed MSR 0x26e 0x0606060606060606
2555 06:16:53.882989 MTRR: Fixed MSR 0x26f 0x0606060606060606
2556 06:16:53.886451 MTRR: Fixed MSR 0x259 0x0000000000000000
2557 06:16:53.889592 call enable_fixed_mtrr()
2558 06:16:53.892808 MTRR: Fixed MSR 0x268 0x0606060606060606
2559 06:16:53.896493 MTRR: Fixed MSR 0x269 0x0606060606060606
2560 06:16:53.899278 CPU physical address size: 39 bits
2561 06:16:53.902557 MTRR: Fixed MSR 0x259 0x0000000000000000
2562 06:16:53.909262 MTRR: Fixed MSR 0x26a 0x0606060606060606
2563 06:16:53.912721 MTRR: Fixed MSR 0x268 0x0606060606060606
2564 06:16:53.916198 MTRR: Fixed MSR 0x269 0x0606060606060606
2565 06:16:53.919464 MTRR: Fixed MSR 0x26b 0x0606060606060606
2566 06:16:53.925802 MTRR: Fixed MSR 0x26c 0x0606060606060606
2567 06:16:53.929788 MTRR: Fixed MSR 0x26d 0x0606060606060606
2568 06:16:53.932748 MTRR: Fixed MSR 0x26e 0x0606060606060606
2569 06:16:53.936128 MTRR: Fixed MSR 0x26f 0x0606060606060606
2570 06:16:53.943509 MTRR: Fixed MSR 0x26a 0x0606060606060606
2571 06:16:53.944023 call enable_fixed_mtrr()
2572 06:16:53.949250 MTRR: Fixed MSR 0x26b 0x0606060606060606
2573 06:16:53.952671 MTRR: Fixed MSR 0x26c 0x0606060606060606
2574 06:16:53.956161 MTRR: Fixed MSR 0x26d 0x0606060606060606
2575 06:16:53.959014 MTRR: Fixed MSR 0x26e 0x0606060606060606
2576 06:16:53.965801 MTRR: Fixed MSR 0x26f 0x0606060606060606
2577 06:16:53.969640 CPU physical address size: 39 bits
2578 06:16:53.970123 call enable_fixed_mtrr()
2579 06:16:53.972688 CPU physical address size: 39 bits
2580 06:16:53.977205
2581 06:16:53.977618 MTRR check
2582 06:16:53.980921 Fixed MTRRs : Enabled
2583 06:16:53.981484 Variable MTRRs: Enabled
2584 06:16:53.981831
2585 06:16:53.987634 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2586 06:16:53.990498 Checking cr50 for pending updates
2587 06:16:54.002865 Reading cr50 TPM mode
2588 06:16:54.018327 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2589 06:16:54.028358 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2590 06:16:54.031911 Checking segment from ROM address 0xf96cbe6c
2591 06:16:54.034777 Checking segment from ROM address 0xf96cbe88
2592 06:16:54.041668 Loading segment from ROM address 0xf96cbe6c
2593 06:16:54.042216 code (compression=1)
2594 06:16:54.051941 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2595 06:16:54.058293 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2596 06:16:54.061486 using LZMA
2597 06:16:54.084172 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2598 06:16:54.090157 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2599 06:16:54.098381 Loading segment from ROM address 0xf96cbe88
2600 06:16:54.101591 Entry Point 0x30000000
2601 06:16:54.102070 Loaded segments
2602 06:16:54.108436 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2603 06:16:54.114714 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2604 06:16:54.118010 Finalizing chipset.
2605 06:16:54.118575 apm_control: Finalizing SMM.
2606 06:16:54.122141 APMC done.
2607 06:16:54.124627 HECI: CSE device 16.1 is disabled
2608 06:16:54.128430 HECI: CSE device 16.2 is disabled
2609 06:16:54.131569 HECI: CSE device 16.3 is disabled
2610 06:16:54.134981 HECI: CSE device 16.4 is disabled
2611 06:16:54.138019 HECI: CSE device 16.5 is disabled
2612 06:16:54.141564 HECI: Sending End-of-Post
2613 06:16:54.149687 CSE: EOP requested action: continue boot
2614 06:16:54.152914 CSE EOP successful, continuing boot
2615 06:16:54.159728 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2616 06:16:54.162786 mp_park_aps done after 0 msecs.
2617 06:16:54.166235 Jumping to boot code at 0x30000000(0x76891000)
2618 06:16:54.175777 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2619 06:16:54.181069
2620 06:16:54.181679
2621 06:16:54.182166
2622 06:16:54.184254 Starting depthcharge on Volmar...
2623 06:16:54.184832
2624 06:16:54.186939 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2625 06:16:54.187564 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2626 06:16:54.188074 Setting prompt string to ['brya:']
2627 06:16:54.188604 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2628 06:16:54.190035 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2629 06:16:54.190523
2630 06:16:54.197051 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2631 06:16:54.197532
2632 06:16:54.203358 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2633 06:16:54.203888
2634 06:16:54.207088 configure_storage: Failed to remap 1C:2
2635 06:16:54.207616
2636 06:16:54.210311 Wipe memory regions:
2637 06:16:54.210725
2638 06:16:54.213409 [0x00000000001000, 0x000000000a0000)
2639 06:16:54.213826
2640 06:16:54.216684 [0x00000000100000, 0x00000030000000)
2641 06:16:54.323321
2642 06:16:54.326621 [0x00000032668e60, 0x00000076857000)
2643 06:16:54.474198
2644 06:16:54.477801 [0x00000100000000, 0x0000027fc00000)
2645 06:16:55.312448
2646 06:16:55.315658 ec_init: CrosEC protocol v3 supported (256, 256)
2647 06:16:55.923630
2648 06:16:55.924365 R8152: Initializing
2649 06:16:55.924813
2650 06:16:55.926537 Version 9 (ocp_data = 6010)
2651 06:16:55.926979
2652 06:16:55.929787 R8152: Done initializing
2653 06:16:55.930429
2654 06:16:55.933487 Adding net device
2655 06:16:56.234397
2656 06:16:56.237683 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2657 06:16:56.238147
2658 06:16:56.238512
2659 06:16:56.238850
2660 06:16:56.239618 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2662 06:16:56.341090 brya: tftpboot 192.168.201.1 11005216/tftp-deploy-2lmen4ez/kernel/bzImage 11005216/tftp-deploy-2lmen4ez/kernel/cmdline 11005216/tftp-deploy-2lmen4ez/ramdisk/ramdisk.cpio.gz
2663 06:16:56.341931 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2664 06:16:56.342504 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2665 06:16:56.347063 tftpboot 192.168.201.1 11005216/tftp-deploy-2lmen4ez/kernel/bzIploy-2lmen4ez/kernel/cmdline 11005216/tftp-deploy-2lmen4ez/ramdisk/ramdisk.cpio.gz
2666 06:16:56.347549
2667 06:16:56.347906 Waiting for link
2668 06:16:56.549935
2669 06:16:56.550463 done.
2670 06:16:56.551058
2671 06:16:56.551615 MAC: 00:e0:4c:68:00:8b
2672 06:16:56.552079
2673 06:16:56.552819 Sending DHCP discover... done.
2674 06:16:56.553235
2675 06:16:56.556975 Waiting for reply... done.
2676 06:16:56.557825
2677 06:16:56.560073 Sending DHCP request... done.
2678 06:16:56.560729
2679 06:16:56.562862 Waiting for reply... done.
2680 06:16:56.563319
2681 06:16:56.566576 My ip is 192.168.201.16
2682 06:16:56.567102
2683 06:16:56.569593 The DHCP server ip is 192.168.201.1
2684 06:16:56.570056
2685 06:16:56.572873 TFTP server IP predefined by user: 192.168.201.1
2686 06:16:56.573401
2687 06:16:56.579631 Bootfile predefined by user: 11005216/tftp-deploy-2lmen4ez/kernel/bzImage
2688 06:16:56.580071
2689 06:16:56.583040 Sending tftp read request... done.
2690 06:16:56.583480
2691 06:16:56.592471 Waiting for the transfer...
2692 06:16:56.593025
2693 06:16:56.895355 00000000 ################################################################
2694 06:16:56.895477
2695 06:16:57.193518 00080000 ################################################################
2696 06:16:57.193651
2697 06:16:57.456239 00100000 ################################################################
2698 06:16:57.456364
2699 06:16:57.715563 00180000 ################################################################
2700 06:16:57.715683
2701 06:16:57.981602 00200000 ################################################################
2702 06:16:57.981743
2703 06:16:58.275426 00280000 ################################################################
2704 06:16:58.275558
2705 06:16:58.568335 00300000 ################################################################
2706 06:16:58.568463
2707 06:16:58.854929 00380000 ################################################################
2708 06:16:58.855055
2709 06:16:59.152887 00400000 ################################################################
2710 06:16:59.153023
2711 06:16:59.449370 00480000 ################################################################
2712 06:16:59.449504
2713 06:16:59.734311 00500000 ################################################################
2714 06:16:59.734436
2715 06:17:00.011645 00580000 ################################################################
2716 06:17:00.011769
2717 06:17:00.264671 00600000 ################################################################
2718 06:17:00.264793
2719 06:17:00.543746 00680000 ################################################################
2720 06:17:00.543871
2721 06:17:00.824226 00700000 ################################################################
2722 06:17:00.824351
2723 06:17:01.103368 00780000 ################################################################
2724 06:17:01.103492
2725 06:17:01.380117 00800000 ################################################################
2726 06:17:01.380239
2727 06:17:01.657715 00880000 ################################################################
2728 06:17:01.657838
2729 06:17:01.940174 00900000 ################################################################
2730 06:17:01.940308
2731 06:17:02.227729 00980000 ################################################################
2732 06:17:02.227867
2733 06:17:02.518899 00a00000 ################################################################
2734 06:17:02.519033
2735 06:17:02.779346 00a80000 ################################################################
2736 06:17:02.779474
2737 06:17:03.051267 00b00000 ################################################################
2738 06:17:03.051395
2739 06:17:03.340702 00b80000 ################################################################
2740 06:17:03.340835
2741 06:17:03.592920 00c00000 ################################################################
2742 06:17:03.593042
2743 06:17:03.881983 00c80000 ################################################################
2744 06:17:03.882124
2745 06:17:04.254845 00d00000 ################################################################
2746 06:17:04.255343
2747 06:17:04.569274 00d80000 ################################################################
2748 06:17:04.569395
2749 06:17:04.936097 00e00000 ################################################################
2750 06:17:04.936576
2751 06:17:05.305467 00e80000 ################################################################
2752 06:17:05.305957
2753 06:17:05.665363 00f00000 ################################################################
2754 06:17:05.665854
2755 06:17:05.740962 00f80000 ################## done.
2756 06:17:05.741073
2757 06:17:05.744356 The bootfile was 16398560 bytes long.
2758 06:17:05.744440
2759 06:17:05.747994 Sending tftp read request... done.
2760 06:17:05.748077
2761 06:17:05.750913 Waiting for the transfer...
2762 06:17:05.750995
2763 06:17:06.005336 00000000 ################################################################
2764 06:17:06.005465
2765 06:17:06.257371 00080000 ################################################################
2766 06:17:06.257509
2767 06:17:06.508739 00100000 ################################################################
2768 06:17:06.508876
2769 06:17:06.763930 00180000 ################################################################
2770 06:17:06.764064
2771 06:17:07.020011 00200000 ################################################################
2772 06:17:07.020141
2773 06:17:07.272969 00280000 ################################################################
2774 06:17:07.273103
2775 06:17:07.523229 00300000 ################################################################
2776 06:17:07.523408
2777 06:17:07.755068 00380000 ################################################################
2778 06:17:07.755242
2779 06:17:07.996525 00400000 ################################################################
2780 06:17:07.996667
2781 06:17:08.246032 00480000 ################################################################
2782 06:17:08.246162
2783 06:17:08.494728 00500000 ################################################################
2784 06:17:08.494852
2785 06:17:08.743424 00580000 ################################################################
2786 06:17:08.743587
2787 06:17:08.991567 00600000 ################################################################
2788 06:17:08.991698
2789 06:17:09.238315 00680000 ################################################################
2790 06:17:09.238450
2791 06:17:09.490076 00700000 ################################################################
2792 06:17:09.490215
2793 06:17:09.740881 00780000 ################################################################
2794 06:17:09.741014
2795 06:17:09.993066 00800000 ################################################################
2796 06:17:09.993215
2797 06:17:10.241327 00880000 ################################################################
2798 06:17:10.241459
2799 06:17:10.487873 00900000 ################################################################
2800 06:17:10.487999
2801 06:17:10.736076 00980000 ################################################################
2802 06:17:10.736240
2803 06:17:10.985257 00a00000 ################################################################
2804 06:17:10.985388
2805 06:17:11.235278 00a80000 ################################################################
2806 06:17:11.235432
2807 06:17:11.491240 00b00000 ################################################################
2808 06:17:11.491366
2809 06:17:11.739897 00b80000 ################################################################
2810 06:17:11.740049
2811 06:17:11.988343 00c00000 ################################################################
2812 06:17:11.988503
2813 06:17:12.236963 00c80000 ################################################################
2814 06:17:12.237134
2815 06:17:12.275827 00d00000 ########## done.
2816 06:17:12.275938
2817 06:17:12.279414 Sending tftp read request... done.
2818 06:17:12.279517
2819 06:17:12.282433 Waiting for the transfer...
2820 06:17:12.282536
2821 06:17:12.282629 00000000 # done.
2822 06:17:12.282726
2823 06:17:12.292340 Command line loaded dynamically from TFTP file: 11005216/tftp-deploy-2lmen4ez/kernel/cmdline
2824 06:17:12.292416
2825 06:17:12.305446 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2826 06:17:12.311856
2827 06:17:12.314883 Shutting down all USB controllers.
2828 06:17:12.314983
2829 06:17:12.315075 Removing current net device
2830 06:17:12.315165
2831 06:17:12.318297 Finalizing coreboot
2832 06:17:12.318376
2833 06:17:12.325421 Exiting depthcharge with code 4 at timestamp: 28389097
2834 06:17:12.325502
2835 06:17:12.325566
2836 06:17:12.325631 Starting kernel ...
2837 06:17:12.325691
2838 06:17:12.325749
2839 06:17:12.326133 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2840 06:17:12.326228 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2841 06:17:12.326302 Setting prompt string to ['Linux version [0-9]']
2842 06:17:12.326376 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2843 06:17:12.326445 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2845 06:21:35.327289 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2847 06:21:35.328381 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2849 06:21:35.329286 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2852 06:21:35.330984 end: 2 depthcharge-action (duration 00:05:00) [common]
2854 06:21:35.331627 Cleaning after the job
2855 06:21:35.331717 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11005216/tftp-deploy-2lmen4ez/ramdisk
2856 06:21:35.333508 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11005216/tftp-deploy-2lmen4ez/kernel
2857 06:21:35.335625 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11005216/tftp-deploy-2lmen4ez/modules
2858 06:21:35.338631 start: 5.1 power-off (timeout 00:00:30) [common]
2859 06:21:35.338793 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=off'
2860 06:21:35.418092 >> Command sent successfully.
2861 06:21:35.430748 Returned 0 in 0 seconds
2862 06:21:35.532285 end: 5.1 power-off (duration 00:00:00) [common]
2864 06:21:35.533947 start: 5.2 read-feedback (timeout 00:10:00) [common]
2865 06:21:35.535222 Listened to connection for namespace 'common' for up to 1s
2867 06:21:35.536596 Listened to connection for namespace 'common' for up to 1s
2868 06:21:36.535863 Finalising connection for namespace 'common'
2869 06:21:36.536532 Disconnecting from shell: Finalise
2870 06:21:36.536951
2871 06:21:36.638101 end: 5.2 read-feedback (duration 00:00:01) [common]
2872 06:21:36.638692 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11005216
2873 06:21:36.704965 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11005216
2874 06:21:36.705370 JobError: Your job cannot terminate cleanly.