Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Warnings: 0
- Kernel Errors: 0
1 06:07:05.319543 lava-dispatcher, installed at version: 2023.05.1
2 06:07:05.319770 start: 0 validate
3 06:07:05.319915 Start time: 2023-07-04 06:07:05.319907+00:00 (UTC)
4 06:07:05.320052 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:07:05.320180 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 06:07:05.594009 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:07:05.594827 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.184-cip36-10-ga711f789c23e1%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:07:05.866686 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:07:05.867538 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.184-cip36-10-ga711f789c23e1%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 06:07:11.445461 validate duration: 6.13
12 06:07:11.445728 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:07:11.445822 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:07:11.445906 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:07:11.446028 Not decompressing ramdisk as can be used compressed.
16 06:07:11.446111 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 06:07:11.446174 saving as /var/lib/lava/dispatcher/tmp/11005047/tftp-deploy-686qzrn6/ramdisk/rootfs.cpio.gz
18 06:07:11.446234 total size: 8418130 (8MB)
19 06:07:12.111373 progress 0% (0MB)
20 06:07:12.114419 progress 5% (0MB)
21 06:07:12.116828 progress 10% (0MB)
22 06:07:12.119127 progress 15% (1MB)
23 06:07:12.121521 progress 20% (1MB)
24 06:07:12.123872 progress 25% (2MB)
25 06:07:12.126221 progress 30% (2MB)
26 06:07:12.128397 progress 35% (2MB)
27 06:07:12.130758 progress 40% (3MB)
28 06:07:12.133124 progress 45% (3MB)
29 06:07:12.135466 progress 50% (4MB)
30 06:07:12.137788 progress 55% (4MB)
31 06:07:12.140170 progress 60% (4MB)
32 06:07:12.142295 progress 65% (5MB)
33 06:07:12.144547 progress 70% (5MB)
34 06:07:12.146706 progress 75% (6MB)
35 06:07:12.148895 progress 80% (6MB)
36 06:07:12.151038 progress 85% (6MB)
37 06:07:12.153193 progress 90% (7MB)
38 06:07:12.155374 progress 95% (7MB)
39 06:07:12.157377 progress 100% (8MB)
40 06:07:12.157604 8MB downloaded in 0.71s (11.29MB/s)
41 06:07:12.157752 end: 1.1.1 http-download (duration 00:00:01) [common]
43 06:07:12.157986 end: 1.1 download-retry (duration 00:00:01) [common]
44 06:07:12.158073 start: 1.2 download-retry (timeout 00:09:59) [common]
45 06:07:12.158156 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 06:07:12.158297 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.184-cip36-10-ga711f789c23e1/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 06:07:12.158365 saving as /var/lib/lava/dispatcher/tmp/11005047/tftp-deploy-686qzrn6/kernel/bzImage
48 06:07:12.158425 total size: 13402336 (12MB)
49 06:07:12.158484 No compression specified
50 06:07:12.159610 progress 0% (0MB)
51 06:07:12.163032 progress 5% (0MB)
52 06:07:12.166382 progress 10% (1MB)
53 06:07:12.169899 progress 15% (1MB)
54 06:07:12.173322 progress 20% (2MB)
55 06:07:12.176820 progress 25% (3MB)
56 06:07:12.180169 progress 30% (3MB)
57 06:07:12.183681 progress 35% (4MB)
58 06:07:12.187022 progress 40% (5MB)
59 06:07:12.190529 progress 45% (5MB)
60 06:07:12.193908 progress 50% (6MB)
61 06:07:12.197316 progress 55% (7MB)
62 06:07:12.200870 progress 60% (7MB)
63 06:07:12.204255 progress 65% (8MB)
64 06:07:12.207817 progress 70% (8MB)
65 06:07:12.211214 progress 75% (9MB)
66 06:07:12.214809 progress 80% (10MB)
67 06:07:12.218268 progress 85% (10MB)
68 06:07:12.221758 progress 90% (11MB)
69 06:07:12.225076 progress 95% (12MB)
70 06:07:12.228575 progress 100% (12MB)
71 06:07:12.228673 12MB downloaded in 0.07s (181.96MB/s)
72 06:07:12.228871 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:07:12.229093 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:07:12.229183 start: 1.3 download-retry (timeout 00:09:59) [common]
76 06:07:12.229268 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 06:07:12.229399 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.184-cip36-10-ga711f789c23e1/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 06:07:12.229468 saving as /var/lib/lava/dispatcher/tmp/11005047/tftp-deploy-686qzrn6/modules/modules.tar
79 06:07:12.229528 total size: 527180 (0MB)
80 06:07:12.229588 Using unxz to decompress xz
81 06:07:12.233618 progress 6% (0MB)
82 06:07:12.234001 progress 12% (0MB)
83 06:07:12.234230 progress 18% (0MB)
84 06:07:12.235849 progress 24% (0MB)
85 06:07:12.237669 progress 31% (0MB)
86 06:07:12.239780 progress 37% (0MB)
87 06:07:12.241733 progress 43% (0MB)
88 06:07:12.243647 progress 49% (0MB)
89 06:07:12.246027 progress 55% (0MB)
90 06:07:12.248046 progress 62% (0MB)
91 06:07:12.249912 progress 68% (0MB)
92 06:07:12.252091 progress 74% (0MB)
93 06:07:12.254059 progress 80% (0MB)
94 06:07:12.256074 progress 87% (0MB)
95 06:07:12.257853 progress 93% (0MB)
96 06:07:12.260014 progress 99% (0MB)
97 06:07:12.266598 0MB downloaded in 0.04s (13.57MB/s)
98 06:07:12.266873 end: 1.3.1 http-download (duration 00:00:00) [common]
100 06:07:12.267130 end: 1.3 download-retry (duration 00:00:00) [common]
101 06:07:12.267227 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
102 06:07:12.267353 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
103 06:07:12.267434 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 06:07:12.267519 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
105 06:07:12.267743 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh
106 06:07:12.267874 makedir: /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin
107 06:07:12.267978 makedir: /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/tests
108 06:07:12.268076 makedir: /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/results
109 06:07:12.268189 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-add-keys
110 06:07:12.268337 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-add-sources
111 06:07:12.268466 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-background-process-start
112 06:07:12.268595 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-background-process-stop
113 06:07:12.268719 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-common-functions
114 06:07:12.268842 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-echo-ipv4
115 06:07:12.268967 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-install-packages
116 06:07:12.269091 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-installed-packages
117 06:07:12.269213 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-os-build
118 06:07:12.269338 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-probe-channel
119 06:07:12.269467 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-probe-ip
120 06:07:12.269590 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-target-ip
121 06:07:12.269714 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-target-mac
122 06:07:12.269837 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-target-storage
123 06:07:12.269967 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-test-case
124 06:07:12.270092 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-test-event
125 06:07:12.270216 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-test-feedback
126 06:07:12.270340 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-test-raise
127 06:07:12.270465 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-test-reference
128 06:07:12.270592 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-test-runner
129 06:07:12.270716 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-test-set
130 06:07:12.270843 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-test-shell
131 06:07:12.270969 Updating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-install-packages (oe)
132 06:07:12.271123 Updating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/bin/lava-installed-packages (oe)
133 06:07:12.271250 Creating /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/environment
134 06:07:12.271349 LAVA metadata
135 06:07:12.271423 - LAVA_JOB_ID=11005047
136 06:07:12.271490 - LAVA_DISPATCHER_IP=192.168.201.1
137 06:07:12.271589 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
138 06:07:12.271657 skipped lava-vland-overlay
139 06:07:12.271731 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 06:07:12.271814 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
141 06:07:12.271875 skipped lava-multinode-overlay
142 06:07:12.271947 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 06:07:12.272026 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
144 06:07:12.272100 Loading test definitions
145 06:07:12.272187 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
146 06:07:12.272261 Using /lava-11005047 at stage 0
147 06:07:12.272577 uuid=11005047_1.4.2.3.1 testdef=None
148 06:07:12.272664 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 06:07:12.272747 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
150 06:07:12.273276 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 06:07:12.273497 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
153 06:07:12.274132 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 06:07:12.274383 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
156 06:07:12.274990 runner path: /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/0/tests/0_dmesg test_uuid 11005047_1.4.2.3.1
157 06:07:12.275144 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 06:07:12.275404 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
160 06:07:12.275475 Using /lava-11005047 at stage 1
161 06:07:12.275765 uuid=11005047_1.4.2.3.5 testdef=None
162 06:07:12.275852 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 06:07:12.275935 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
164 06:07:12.276400 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 06:07:12.276611 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
167 06:07:12.277246 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 06:07:12.277468 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
170 06:07:12.278082 runner path: /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/1/tests/1_bootrr test_uuid 11005047_1.4.2.3.5
171 06:07:12.278233 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 06:07:12.278432 Creating lava-test-runner.conf files
174 06:07:12.278494 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/0 for stage 0
175 06:07:12.278582 - 0_dmesg
176 06:07:12.278662 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11005047/lava-overlay-9uthhkeh/lava-11005047/1 for stage 1
177 06:07:12.278753 - 1_bootrr
178 06:07:12.278846 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 06:07:12.278930 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
180 06:07:12.287338 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 06:07:12.287467 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
182 06:07:12.287582 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 06:07:12.287696 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 06:07:12.287812 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
185 06:07:12.536124 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 06:07:12.536492 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
187 06:07:12.536616 extracting modules file /var/lib/lava/dispatcher/tmp/11005047/tftp-deploy-686qzrn6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11005047/extract-overlay-ramdisk-ty1c7bw8/ramdisk
188 06:07:12.561142 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 06:07:12.561299 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
190 06:07:12.561397 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11005047/compress-overlay-fqky92kv/overlay-1.4.2.4.tar.gz to ramdisk
191 06:07:12.561469 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11005047/compress-overlay-fqky92kv/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11005047/extract-overlay-ramdisk-ty1c7bw8/ramdisk
192 06:07:12.569640 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 06:07:12.569779 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 06:07:12.569872 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 06:07:12.569960 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 06:07:12.570045 Building ramdisk /var/lib/lava/dispatcher/tmp/11005047/extract-overlay-ramdisk-ty1c7bw8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11005047/extract-overlay-ramdisk-ty1c7bw8/ramdisk
197 06:07:12.707143 >> 54145 blocks
198 06:07:13.635581 rename /var/lib/lava/dispatcher/tmp/11005047/extract-overlay-ramdisk-ty1c7bw8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11005047/tftp-deploy-686qzrn6/ramdisk/ramdisk.cpio.gz
199 06:07:13.636015 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 06:07:13.636145 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 06:07:13.636245 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 06:07:13.636343 No mkimage arch provided, not using FIT.
203 06:07:13.636434 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 06:07:13.636518 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 06:07:13.636623 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 06:07:13.636709 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 06:07:13.636788 No LXC device requested
208 06:07:13.636868 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 06:07:13.636958 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 06:07:13.637040 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 06:07:13.637114 Checking files for TFTP limit of 4294967296 bytes.
212 06:07:13.637513 end: 1 tftp-deploy (duration 00:00:02) [common]
213 06:07:13.637620 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 06:07:13.637711 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 06:07:13.637833 substitutions:
216 06:07:13.637900 - {DTB}: None
217 06:07:13.637965 - {INITRD}: 11005047/tftp-deploy-686qzrn6/ramdisk/ramdisk.cpio.gz
218 06:07:13.638025 - {KERNEL}: 11005047/tftp-deploy-686qzrn6/kernel/bzImage
219 06:07:13.638083 - {LAVA_MAC}: None
220 06:07:13.638139 - {PRESEED_CONFIG}: None
221 06:07:13.638195 - {PRESEED_LOCAL}: None
222 06:07:13.638252 - {RAMDISK}: 11005047/tftp-deploy-686qzrn6/ramdisk/ramdisk.cpio.gz
223 06:07:13.638310 - {ROOT_PART}: None
224 06:07:13.638367 - {ROOT}: None
225 06:07:13.638422 - {SERVER_IP}: 192.168.201.1
226 06:07:13.638477 - {TEE}: None
227 06:07:13.638532 Parsed boot commands:
228 06:07:13.638587 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 06:07:13.638756 Parsed boot commands: tftpboot 192.168.201.1 11005047/tftp-deploy-686qzrn6/kernel/bzImage 11005047/tftp-deploy-686qzrn6/kernel/cmdline 11005047/tftp-deploy-686qzrn6/ramdisk/ramdisk.cpio.gz
230 06:07:13.638843 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 06:07:13.638929 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 06:07:13.639021 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 06:07:13.639107 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 06:07:13.639177 Not connected, no need to disconnect.
235 06:07:13.639291 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 06:07:13.639373 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 06:07:13.639449 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cbv514-1h-34uz-brya-cbg-9'
238 06:07:13.643254 Setting prompt string to ['lava-test: # ']
239 06:07:13.643618 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 06:07:13.643724 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 06:07:13.643828 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 06:07:13.643916 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 06:07:13.644114 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=reboot'
244 06:07:18.779335 >> Command sent successfully.
245 06:07:18.782318 Returned 0 in 5 seconds
246 06:07:18.882691 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 06:07:18.883058 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 06:07:18.883176 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 06:07:18.883292 Setting prompt string to 'Starting depthcharge on Volmar...'
251 06:07:18.883374 Changing prompt to 'Starting depthcharge on Volmar...'
252 06:07:18.883468 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 06:07:18.883820 [Enter `^Ec?' for help]
254 06:07:20.260053
255 06:07:20.260213
256 06:07:20.266835 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 06:07:20.270824 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 06:07:20.274390 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 06:07:20.281774 CPU: AES supported, TXT NOT supported, VT supported
260 06:07:20.288762 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 06:07:20.292283 Cache size = 10 MiB
262 06:07:20.296511 MCH: device id 4609 (rev 04) is Alderlake-P
263 06:07:20.300037 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 06:07:20.306808 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 06:07:20.306890 VBOOT: Loading verstage.
266 06:07:20.314638 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 06:07:20.318336 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 06:07:20.322036 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 06:07:20.329464 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 06:07:20.336942 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 06:07:20.341797
272 06:07:20.341879
273 06:07:20.348846 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 06:07:20.352460 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 06:07:20.356571 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 06:07:20.360237 I2C TX abort detected (00000001)
277 06:07:20.363260 cr50_i2c_read: Address write failed
278 06:07:20.376523 .done! DID_VID 0x00281ae0
279 06:07:20.380955 TPM ready after 0 ms
280 06:07:20.384136 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
281 06:07:20.394255 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
282 06:07:20.401820 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
283 06:07:20.524296 tlcl_send_startup: Startup return code is 0
284 06:07:20.524446 TPM: setup succeeded
285 06:07:20.543681 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
286 06:07:20.565874 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
287 06:07:20.569703 Chrome EC: UHEPI supported
288 06:07:20.572918 Reading cr50 boot mode
289 06:07:20.588813 Cr50 says boot_mode is VERIFIED_RW(0x00).
290 06:07:20.588921 Phase 1
291 06:07:20.592704 FMAP: area GBB found @ 1805000 (458752 bytes)
292 06:07:20.602837 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
293 06:07:20.609672 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
294 06:07:20.615869 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
295 06:07:20.615956 Phase 2
296 06:07:20.616023 Phase 3
297 06:07:20.622664 FMAP: area GBB found @ 1805000 (458752 bytes)
298 06:07:20.625849 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 06:07:20.632595 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
300 06:07:20.639508 VB2:vb2_verify_keyblock() Checking keyblock signature...
301 06:07:20.646348 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
302 06:07:20.652471 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
303 06:07:20.659256 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
304 06:07:20.673201 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 06:07:20.676552 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
306 06:07:20.683330 VB2:vb2_verify_fw_preamble() Verifying preamble.
307 06:07:20.689633 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
308 06:07:20.696336 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
309 06:07:20.703007 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
310 06:07:20.707737 Phase 4
311 06:07:20.710305 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
312 06:07:20.717010 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
313 06:07:20.929795 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 06:07:20.937250 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 06:07:20.940878 Saving vboot hash.
316 06:07:20.947652 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
317 06:07:20.963541 tlcl_extend: response is 0
318 06:07:20.969718 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
319 06:07:20.976659 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
320 06:07:20.990747 tlcl_extend: response is 0
321 06:07:20.997554 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
322 06:07:21.016312 tlcl_lock_nv_write: response is 0
323 06:07:21.033643 tlcl_lock_nv_write: response is 0
324 06:07:21.033780 Slot A is selected
325 06:07:21.040303 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
326 06:07:21.046928 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
327 06:07:21.053721 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
328 06:07:21.060318 BS: verstage times (exec / console): total (unknown) / 264 ms
329 06:07:21.060442
330 06:07:21.060512
331 06:07:21.066794 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
332 06:07:21.070913 Google Chrome EC: version:
333 06:07:21.074106 ro: volmar_v2.0.14126-e605144e9c
334 06:07:21.077774 rw: volmar_v0.0.55-22d1557
335 06:07:21.080782 running image: 2
336 06:07:21.084001 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
337 06:07:21.094341 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 06:07:21.100944 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 06:07:21.107360 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
340 06:07:21.117388 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 06:07:21.127687 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 06:07:21.130990 EC took 946us to calculate image hash
343 06:07:21.140875 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 06:07:21.144290 VB2:sync_ec() select_rw=RW(active)
345 06:07:21.152325 Waited 270us to clear limit power flag.
346 06:07:21.159001 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 06:07:21.162201 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
348 06:07:21.165430 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 06:07:21.172216 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
350 06:07:21.175588 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
351 06:07:21.178856 TCO_STS: 0000 0000
352 06:07:21.178946 GEN_PMCON: d0015038 00002200
353 06:07:21.182412 GBLRST_CAUSE: 00000000 00000000
354 06:07:21.185767 HPR_CAUSE0: 00000000
355 06:07:21.188776 prev_sleep_state 5
356 06:07:21.192227 Abort disabling TXT, as CPU is not TXT capable.
357 06:07:21.199844 cse_lite: Number of partitions = 3
358 06:07:21.203160 cse_lite: Current partition = RO
359 06:07:21.203312 cse_lite: Next partition = RO
360 06:07:21.206632 cse_lite: Flags = 0x7
361 06:07:21.213175 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
362 06:07:21.223040 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
363 06:07:21.226788 FMAP: area SI_ME found @ 1000 (5238784 bytes)
364 06:07:21.233270 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
365 06:07:21.239872 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
366 06:07:21.246487 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
367 06:07:21.249893 cse_lite: CSE CBFS RW version : 16.1.25.2049
368 06:07:21.256363 cse_lite: Set Boot Partition Info Command (RW)
369 06:07:21.259728 HECI: Global Reset(Type:1) Command
370 06:07:22.742182 +3�fef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
371 06:07:22.748331 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
372 06:07:22.753159
373 06:07:22.753744
374 06:07:22.759961 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
375 06:07:22.767005 Probing TPM I2C: I2C bus 1 version 0x3230302a
376 06:07:22.770524 DW I2C bus 1 at 0xfe022000 (400 KHz)
377 06:07:22.774027 done! DID_VID 0x00281ae0
378 06:07:22.774535 TPM ready after 0 ms
379 06:07:22.777849 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
380 06:07:22.788722 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
381 06:07:22.795763 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
382 06:07:22.904558 tlcl_send_startup: Startup return code is 0
383 06:07:22.905056 TPM: setup succeeded
384 06:07:22.924128 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
385 06:07:22.946169 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
386 06:07:22.950139 Chrome EC: UHEPI supported
387 06:07:22.953434 Reading cr50 boot mode
388 06:07:22.968308 Cr50 says boot_mode is VERIFIED_RW(0x00).
389 06:07:22.968802 Phase 1
390 06:07:22.974953 FMAP: area GBB found @ 1805000 (458752 bytes)
391 06:07:22.981491 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 06:07:22.988656 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 06:07:22.995116 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
394 06:07:22.998188 Phase 2
395 06:07:22.998616 Phase 3
396 06:07:23.002079 FMAP: area GBB found @ 1805000 (458752 bytes)
397 06:07:23.008123 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
398 06:07:23.011750 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
399 06:07:23.018593 VB2:vb2_verify_keyblock() Checking keyblock signature...
400 06:07:23.024790 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
401 06:07:23.031618 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
402 06:07:23.041888 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
403 06:07:23.053577 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
404 06:07:23.056855 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
405 06:07:23.063212 VB2:vb2_verify_fw_preamble() Verifying preamble.
406 06:07:23.070125 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
407 06:07:23.076828 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
408 06:07:23.083894 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
409 06:07:23.087389 Phase 4
410 06:07:23.090961 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
411 06:07:23.097162 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
412 06:07:23.309805 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
413 06:07:23.317095 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
414 06:07:23.319912 Saving vboot hash.
415 06:07:23.326970 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
416 06:07:23.343197 tlcl_extend: response is 0
417 06:07:23.349604 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
418 06:07:23.356085 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
419 06:07:23.371277 tlcl_extend: response is 0
420 06:07:23.377445 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
421 06:07:23.395990 tlcl_lock_nv_write: response is 0
422 06:07:23.413754 tlcl_lock_nv_write: response is 0
423 06:07:23.414282 Slot A is selected
424 06:07:23.420641 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
425 06:07:23.427300 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
426 06:07:23.434745 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
427 06:07:23.441695 BS: verstage times (exec / console): total (unknown) / 256 ms
428 06:07:23.442191
429 06:07:23.442530
430 06:07:23.448518 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
431 06:07:23.451376 Google Chrome EC: version:
432 06:07:23.454491 ro: volmar_v2.0.14126-e605144e9c
433 06:07:23.457974 rw: volmar_v0.0.55-22d1557
434 06:07:23.461294 running image: 2
435 06:07:23.464995 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
436 06:07:23.471250 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
437 06:07:23.481868 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
438 06:07:23.488151 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
439 06:07:23.497879 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
440 06:07:23.507928 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
441 06:07:23.511135 EC took 941us to calculate image hash
442 06:07:23.521239 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
443 06:07:23.524551 VB2:sync_ec() select_rw=RW(active)
444 06:07:23.536627 Waited 270us to clear limit power flag.
445 06:07:23.540119 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
446 06:07:23.543483 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
447 06:07:23.546724 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
448 06:07:23.553954 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
449 06:07:23.557276 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
450 06:07:23.560176 TCO_STS: 0000 0000
451 06:07:23.560609 GEN_PMCON: d1001038 00002200
452 06:07:23.563588 GBLRST_CAUSE: 00000040 00000000
453 06:07:23.566950 HPR_CAUSE0: 00000000
454 06:07:23.570478 prev_sleep_state 5
455 06:07:23.573541 Abort disabling TXT, as CPU is not TXT capable.
456 06:07:23.581230 cse_lite: Number of partitions = 3
457 06:07:23.584739 cse_lite: Current partition = RW
458 06:07:23.585288 cse_lite: Next partition = RW
459 06:07:23.587995 cse_lite: Flags = 0x7
460 06:07:23.594497 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
461 06:07:23.604501 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
462 06:07:23.607994 FMAP: area SI_ME found @ 1000 (5238784 bytes)
463 06:07:23.614424 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
464 06:07:23.621155 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
465 06:07:23.627404 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
466 06:07:23.631104 cse_lite: CSE CBFS RW version : 16.1.25.2049
467 06:07:23.634095 Boot Count incremented to 3601
468 06:07:23.640618 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
469 06:07:23.647330 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
470 06:07:23.660520 Probing TPM I2C: done! DID_VID 0x00281ae0
471 06:07:23.663823 Locality already claimed
472 06:07:23.667176 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
473 06:07:23.686796 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
474 06:07:23.693554 MRC: Hash idx 0x100d comparison successful.
475 06:07:23.696596 MRC cache found, size f6c8
476 06:07:23.697021 bootmode is set to: 2
477 06:07:23.700798 EC returned error result code 3
478 06:07:23.704191 FW_CONFIG value from CBI is 0x131
479 06:07:23.710487 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
480 06:07:23.714280 SPD index = 0
481 06:07:23.720543 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
482 06:07:23.721080 SPD: module type is LPDDR4X
483 06:07:23.727416 SPD: module part number is K4U6E3S4AB-MGCL
484 06:07:23.733885 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
485 06:07:23.737709 SPD: device width 16 bits, bus width 16 bits
486 06:07:23.740872 SPD: module size is 1024 MB (per channel)
487 06:07:23.809499 CBMEM:
488 06:07:23.813131 IMD: root @ 0x76fff000 254 entries.
489 06:07:23.816209 IMD: root @ 0x76ffec00 62 entries.
490 06:07:23.823531 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
491 06:07:23.827126 RO_VPD is uninitialized or empty.
492 06:07:23.830463 FMAP: area RW_VPD found @ f29000 (8192 bytes)
493 06:07:23.833957 RW_VPD is uninitialized or empty.
494 06:07:23.840637 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
495 06:07:23.843706 External stage cache:
496 06:07:23.847132 IMD: root @ 0x7bbff000 254 entries.
497 06:07:23.850449 IMD: root @ 0x7bbfec00 62 entries.
498 06:07:23.857645 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
499 06:07:23.863834 MRC: Checking cached data update for 'RW_MRC_CACHE'.
500 06:07:23.867087 MRC: 'RW_MRC_CACHE' does not need update.
501 06:07:23.867598 8 DIMMs found
502 06:07:23.870910 SMM Memory Map
503 06:07:23.874043 SMRAM : 0x7b800000 0x800000
504 06:07:23.877380 Subregion 0: 0x7b800000 0x200000
505 06:07:23.880915 Subregion 1: 0x7ba00000 0x200000
506 06:07:23.884058 Subregion 2: 0x7bc00000 0x400000
507 06:07:23.887541 top_of_ram = 0x77000000
508 06:07:23.890609 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
509 06:07:23.897320 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
510 06:07:23.904036 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
511 06:07:23.907483 MTRR Range: Start=ff000000 End=0 (Size 1000000)
512 06:07:23.907978 Normal boot
513 06:07:23.917638 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
514 06:07:23.923746 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
515 06:07:23.930640 Processing 237 relocs. Offset value of 0x74ab9000
516 06:07:23.938402 BS: romstage times (exec / console): total (unknown) / 381 ms
517 06:07:23.945712
518 06:07:23.946208
519 06:07:23.952830 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
520 06:07:23.953374 Normal boot
521 06:07:23.959203 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
522 06:07:23.965624 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
523 06:07:23.972857 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
524 06:07:23.982200 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
525 06:07:24.031140 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
526 06:07:24.037364 Processing 5931 relocs. Offset value of 0x72a2f000
527 06:07:24.040846 BS: postcar times (exec / console): total (unknown) / 51 ms
528 06:07:24.044250
529 06:07:24.044761
530 06:07:24.050952 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
531 06:07:24.054106 Reserving BERT start 76a1e000, size 10000
532 06:07:24.057405 Normal boot
533 06:07:24.060579 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
534 06:07:24.067444 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
535 06:07:24.076984 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
536 06:07:24.080583 FMAP: area RW_VPD found @ f29000 (8192 bytes)
537 06:07:24.083870 Google Chrome EC: version:
538 06:07:24.087197 ro: volmar_v2.0.14126-e605144e9c
539 06:07:24.090210 rw: volmar_v0.0.55-22d1557
540 06:07:24.093681 running image: 2
541 06:07:24.097177 ACPI _SWS is PM1 Index 8 GPE Index -1
542 06:07:24.100400 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
543 06:07:24.105584 EC returned error result code 3
544 06:07:24.108594 FW_CONFIG value from CBI is 0x131
545 06:07:24.115489 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
546 06:07:24.118795 PCI: 00:1c.2 disabled by fw_config
547 06:07:24.125386 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
548 06:07:24.128566 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
549 06:07:24.135178 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
550 06:07:24.138552 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
551 06:07:24.145569 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
552 06:07:24.152231 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
553 06:07:24.158704 microcode: sig=0x906a4 pf=0x80 revision=0x423
554 06:07:24.161911 microcode: Update skipped, already up-to-date
555 06:07:24.168697 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
556 06:07:24.201369 Detected 6 core, 8 thread CPU.
557 06:07:24.204552 Setting up SMI for CPU
558 06:07:24.207592 IED base = 0x7bc00000
559 06:07:24.208024 IED size = 0x00400000
560 06:07:24.210977 Will perform SMM setup.
561 06:07:24.214622 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
562 06:07:24.217806 LAPIC 0x0 in XAPIC mode.
563 06:07:24.227737 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
564 06:07:24.231133 Processing 18 relocs. Offset value of 0x00030000
565 06:07:24.235597 Attempting to start 7 APs
566 06:07:24.238778 Waiting for 10ms after sending INIT.
567 06:07:24.252206 Waiting for SIPI to complete...
568 06:07:24.255820 done.
569 06:07:24.256403 LAPIC 0x12 in XAPIC mode.
570 06:07:24.258763 LAPIC 0x9 in XAPIC mode.
571 06:07:24.265089 AP: slot 4 apic_id 12, MCU rev: 0x00000423
572 06:07:24.265521 LAPIC 0x10 in XAPIC mode.
573 06:07:24.268664 LAPIC 0x16 in XAPIC mode.
574 06:07:24.272072 AP: slot 5 apic_id 9, MCU rev: 0x00000423
575 06:07:24.278325 AP: slot 2 apic_id 10, MCU rev: 0x00000423
576 06:07:24.281672 AP: slot 1 apic_id 16, MCU rev: 0x00000423
577 06:07:24.285416 LAPIC 0x14 in XAPIC mode.
578 06:07:24.288644 LAPIC 0x8 in XAPIC mode.
579 06:07:24.291744 AP: slot 3 apic_id 14, MCU rev: 0x00000423
580 06:07:24.295326 AP: slot 7 apic_id 8, MCU rev: 0x00000423
581 06:07:24.298422 LAPIC 0x1 in XAPIC mode.
582 06:07:24.302046 Waiting for SIPI to complete...
583 06:07:24.302613 done.
584 06:07:24.304817 AP: slot 6 apic_id 1, MCU rev: 0x00000423
585 06:07:24.308841 smm_setup_relocation_handler: enter
586 06:07:24.312140 smm_setup_relocation_handler: exit
587 06:07:24.322211 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
588 06:07:24.325439 Processing 11 relocs. Offset value of 0x00038000
589 06:07:24.331970 smm_module_setup_stub: stack_top = 0x7b804000
590 06:07:24.335274 smm_module_setup_stub: per cpu stack_size = 0x800
591 06:07:24.342187 smm_module_setup_stub: runtime.start32_offset = 0x4c
592 06:07:24.345069 smm_module_setup_stub: runtime.smm_size = 0x10000
593 06:07:24.351784 SMM Module: stub loaded at 38000. Will call 0x76a52094
594 06:07:24.355174 Installing permanent SMM handler to 0x7b800000
595 06:07:24.361425 smm_load_module: total_smm_space_needed e468, available -> 200000
596 06:07:24.371864 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
597 06:07:24.374953 Processing 255 relocs. Offset value of 0x7b9f6000
598 06:07:24.381872 smm_load_module: smram_start: 0x7b800000
599 06:07:24.385139 smm_load_module: smram_end: 7ba00000
600 06:07:24.388485 smm_load_module: handler start 0x7b9f6d5f
601 06:07:24.391681 smm_load_module: handler_size 98d0
602 06:07:24.394885 smm_load_module: fxsave_area 0x7b9ff000
603 06:07:24.398175 smm_load_module: fxsave_size 1000
604 06:07:24.401831 smm_load_module: CONFIG_MSEG_SIZE 0x0
605 06:07:24.408327 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
606 06:07:24.415033 smm_load_module: handler_mod_params.smbase = 0x7b800000
607 06:07:24.418547 smm_load_module: per_cpu_save_state_size = 0x400
608 06:07:24.421880 smm_load_module: num_cpus = 0x8
609 06:07:24.428437 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
610 06:07:24.431478 smm_load_module: total_save_state_size = 0x2000
611 06:07:24.434843 smm_load_module: cpu0 entry: 7b9e6000
612 06:07:24.442000 smm_create_map: cpus allowed in one segment 30
613 06:07:24.444742 smm_create_map: min # of segments needed 1
614 06:07:24.445242 CPU 0x0
615 06:07:24.448522 smbase 7b9e6000 entry 7b9ee000
616 06:07:24.454746 ss_start 7b9f5c00 code_end 7b9ee208
617 06:07:24.455176 CPU 0x1
618 06:07:24.458198 smbase 7b9e5c00 entry 7b9edc00
619 06:07:24.464728 ss_start 7b9f5800 code_end 7b9ede08
620 06:07:24.465228 CPU 0x2
621 06:07:24.468131 smbase 7b9e5800 entry 7b9ed800
622 06:07:24.471210 ss_start 7b9f5400 code_end 7b9eda08
623 06:07:24.474958 CPU 0x3
624 06:07:24.478166 smbase 7b9e5400 entry 7b9ed400
625 06:07:24.481489 ss_start 7b9f5000 code_end 7b9ed608
626 06:07:24.484942 CPU 0x4
627 06:07:24.487943 smbase 7b9e5000 entry 7b9ed000
628 06:07:24.491191 ss_start 7b9f4c00 code_end 7b9ed208
629 06:07:24.491659 CPU 0x5
630 06:07:24.494629 smbase 7b9e4c00 entry 7b9ecc00
631 06:07:24.501497 ss_start 7b9f4800 code_end 7b9ece08
632 06:07:24.502089 CPU 0x6
633 06:07:24.504619 smbase 7b9e4800 entry 7b9ec800
634 06:07:24.511629 ss_start 7b9f4400 code_end 7b9eca08
635 06:07:24.512174 CPU 0x7
636 06:07:24.514471 smbase 7b9e4400 entry 7b9ec400
637 06:07:24.518210 ss_start 7b9f4000 code_end 7b9ec608
638 06:07:24.527939 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
639 06:07:24.531071 Processing 11 relocs. Offset value of 0x7b9ee000
640 06:07:24.538210 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
641 06:07:24.544267 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
642 06:07:24.551204 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
643 06:07:24.558129 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
644 06:07:24.564663 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
645 06:07:24.567942 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
646 06:07:24.574791 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
647 06:07:24.581275 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
648 06:07:24.588022 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
649 06:07:24.594461 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
650 06:07:24.601404 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
651 06:07:24.607462 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
652 06:07:24.614669 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
653 06:07:24.621289 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
654 06:07:24.627921 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
655 06:07:24.630876 smm_module_setup_stub: stack_top = 0x7b804000
656 06:07:24.634421 smm_module_setup_stub: per cpu stack_size = 0x800
657 06:07:24.641038 smm_module_setup_stub: runtime.start32_offset = 0x4c
658 06:07:24.647425 smm_module_setup_stub: runtime.smm_size = 0x200000
659 06:07:24.650744 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
660 06:07:24.656154 Clearing SMI status registers
661 06:07:24.659568 SMI_STS: PM1
662 06:07:24.660119 PM1_STS: WAK PWRBTN
663 06:07:24.669307 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
664 06:07:24.672679 In relocation handler: CPU 0
665 06:07:24.675947 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
666 06:07:24.679250 Writing SMRR. base = 0x7b800006, mask=0xff800c00
667 06:07:24.682634 Relocation complete.
668 06:07:24.689364 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
669 06:07:24.692433 In relocation handler: CPU 6
670 06:07:24.695621 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
671 06:07:24.699276 Relocation complete.
672 06:07:24.705844 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
673 06:07:24.709056 In relocation handler: CPU 1
674 06:07:24.712223 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
675 06:07:24.719052 Writing SMRR. base = 0x7b800006, mask=0xff800c00
676 06:07:24.719646 Relocation complete.
677 06:07:24.725669 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
678 06:07:24.728815 In relocation handler: CPU 2
679 06:07:24.731982 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
680 06:07:24.738630 Writing SMRR. base = 0x7b800006, mask=0xff800c00
681 06:07:24.742345 Relocation complete.
682 06:07:24.749219 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
683 06:07:24.752291 In relocation handler: CPU 3
684 06:07:24.755723 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
685 06:07:24.758711 Writing SMRR. base = 0x7b800006, mask=0xff800c00
686 06:07:24.762243 Relocation complete.
687 06:07:24.769044 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
688 06:07:24.772656 In relocation handler: CPU 4
689 06:07:24.775616 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
690 06:07:24.782135 Writing SMRR. base = 0x7b800006, mask=0xff800c00
691 06:07:24.782689 Relocation complete.
692 06:07:24.792476 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
693 06:07:24.793032 In relocation handler: CPU 7
694 06:07:24.799273 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
695 06:07:24.802467 Writing SMRR. base = 0x7b800006, mask=0xff800c00
696 06:07:24.805575 Relocation complete.
697 06:07:24.811924 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
698 06:07:24.815371 In relocation handler: CPU 5
699 06:07:24.818736 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
700 06:07:24.822061 Relocation complete.
701 06:07:24.822502 Initializing CPU #0
702 06:07:24.825360 CPU: vendor Intel device 906a4
703 06:07:24.828492 CPU: family 06, model 9a, stepping 04
704 06:07:24.831749 Clearing out pending MCEs
705 06:07:24.835086 cpu: energy policy set to 7
706 06:07:24.838446 Turbo is available but hidden
707 06:07:24.842491 Turbo is available and visible
708 06:07:24.845681 microcode: Update skipped, already up-to-date
709 06:07:24.848726 CPU #0 initialized
710 06:07:24.849156 Initializing CPU #6
711 06:07:24.852202 Initializing CPU #3
712 06:07:24.855214 Initializing CPU #2
713 06:07:24.855683 Initializing CPU #1
714 06:07:24.858756 Initializing CPU #4
715 06:07:24.861871 CPU: vendor Intel device 906a4
716 06:07:24.865345 CPU: family 06, model 9a, stepping 04
717 06:07:24.869115 CPU: vendor Intel device 906a4
718 06:07:24.872214 CPU: family 06, model 9a, stepping 04
719 06:07:24.875340 Clearing out pending MCEs
720 06:07:24.878265 CPU: vendor Intel device 906a4
721 06:07:24.881669 CPU: family 06, model 9a, stepping 04
722 06:07:24.885586 Clearing out pending MCEs
723 06:07:24.888498 CPU: vendor Intel device 906a4
724 06:07:24.891927 CPU: family 06, model 9a, stepping 04
725 06:07:24.895268 CPU: vendor Intel device 906a4
726 06:07:24.898586 CPU: family 06, model 9a, stepping 04
727 06:07:24.902021 Clearing out pending MCEs
728 06:07:24.905417 cpu: energy policy set to 7
729 06:07:24.905959 Initializing CPU #5
730 06:07:24.907970 cpu: energy policy set to 7
731 06:07:24.911814 Clearing out pending MCEs
732 06:07:24.915128 cpu: energy policy set to 7
733 06:07:24.918222 cpu: energy policy set to 7
734 06:07:24.921622 microcode: Update skipped, already up-to-date
735 06:07:24.924909 CPU #1 initialized
736 06:07:24.928168 microcode: Update skipped, already up-to-date
737 06:07:24.931486 CPU #3 initialized
738 06:07:24.931931 Clearing out pending MCEs
739 06:07:24.937947 microcode: Update skipped, already up-to-date
740 06:07:24.938378 CPU #4 initialized
741 06:07:24.944547 microcode: Update skipped, already up-to-date
742 06:07:24.944991 CPU #2 initialized
743 06:07:24.947918 cpu: energy policy set to 7
744 06:07:24.951282 CPU: vendor Intel device 906a4
745 06:07:24.954475 CPU: family 06, model 9a, stepping 04
746 06:07:24.957842 Initializing CPU #7
747 06:07:24.961115 Clearing out pending MCEs
748 06:07:24.965070 CPU: vendor Intel device 906a4
749 06:07:24.967868 CPU: family 06, model 9a, stepping 04
750 06:07:24.971425 cpu: energy policy set to 7
751 06:07:24.971909 Clearing out pending MCEs
752 06:07:24.978019 microcode: Update skipped, already up-to-date
753 06:07:24.978538 CPU #5 initialized
754 06:07:24.984720 microcode: Update skipped, already up-to-date
755 06:07:24.985245 CPU #6 initialized
756 06:07:24.987764 cpu: energy policy set to 7
757 06:07:24.994892 microcode: Update skipped, already up-to-date
758 06:07:24.995444 CPU #7 initialized
759 06:07:24.997984 bsp_do_flight_plan done after 693 msecs.
760 06:07:25.001334 CPU: frequency set to 4400 MHz
761 06:07:25.004256 Enabling SMIs.
762 06:07:25.011136 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
763 06:07:25.026427 Probing TPM I2C: done! DID_VID 0x00281ae0
764 06:07:25.029946 Locality already claimed
765 06:07:25.033298 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
766 06:07:25.044442 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
767 06:07:25.047701 Enabling GPIO PM b/c CR50 has long IRQ pulse support
768 06:07:25.054271 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
769 06:07:25.061326 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
770 06:07:25.064315 Found a VBT of 9216 bytes after decompression
771 06:07:25.067880 PCI 1.0, PIN A, using IRQ #16
772 06:07:25.070976 PCI 2.0, PIN A, using IRQ #17
773 06:07:25.074452 PCI 4.0, PIN A, using IRQ #18
774 06:07:25.077771 PCI 5.0, PIN A, using IRQ #16
775 06:07:25.080693 PCI 6.0, PIN A, using IRQ #16
776 06:07:25.084332 PCI 6.2, PIN C, using IRQ #18
777 06:07:25.087562 PCI 7.0, PIN A, using IRQ #19
778 06:07:25.090795 PCI 7.1, PIN B, using IRQ #20
779 06:07:25.094518 PCI 7.2, PIN C, using IRQ #21
780 06:07:25.097795 PCI 7.3, PIN D, using IRQ #22
781 06:07:25.100802 PCI 8.0, PIN A, using IRQ #23
782 06:07:25.104252 PCI D.0, PIN A, using IRQ #17
783 06:07:25.107587 PCI D.1, PIN B, using IRQ #19
784 06:07:25.108148 PCI 10.0, PIN A, using IRQ #24
785 06:07:25.111028 PCI 10.1, PIN B, using IRQ #25
786 06:07:25.114357 PCI 10.6, PIN C, using IRQ #20
787 06:07:25.118011 PCI 10.7, PIN D, using IRQ #21
788 06:07:25.121041 PCI 11.0, PIN A, using IRQ #26
789 06:07:25.124003 PCI 11.1, PIN B, using IRQ #27
790 06:07:25.128152 PCI 11.2, PIN C, using IRQ #28
791 06:07:25.130744 PCI 11.3, PIN D, using IRQ #29
792 06:07:25.134419 PCI 12.0, PIN A, using IRQ #30
793 06:07:25.137538 PCI 12.6, PIN B, using IRQ #31
794 06:07:25.141192 PCI 12.7, PIN C, using IRQ #22
795 06:07:25.144516 PCI 13.0, PIN A, using IRQ #32
796 06:07:25.147524 PCI 13.1, PIN B, using IRQ #33
797 06:07:25.151284 PCI 13.2, PIN C, using IRQ #34
798 06:07:25.153994 PCI 13.3, PIN D, using IRQ #35
799 06:07:25.157769 PCI 14.0, PIN B, using IRQ #23
800 06:07:25.158234 PCI 14.1, PIN A, using IRQ #36
801 06:07:25.160920 PCI 14.3, PIN C, using IRQ #17
802 06:07:25.164035 PCI 15.0, PIN A, using IRQ #37
803 06:07:25.167514 PCI 15.1, PIN B, using IRQ #38
804 06:07:25.170678 PCI 15.2, PIN C, using IRQ #39
805 06:07:25.174100 PCI 15.3, PIN D, using IRQ #40
806 06:07:25.177716 PCI 16.0, PIN A, using IRQ #18
807 06:07:25.180720 PCI 16.1, PIN B, using IRQ #19
808 06:07:25.184030 PCI 16.2, PIN C, using IRQ #20
809 06:07:25.187641 PCI 16.3, PIN D, using IRQ #21
810 06:07:25.191394 PCI 16.4, PIN A, using IRQ #18
811 06:07:25.194139 PCI 16.5, PIN B, using IRQ #19
812 06:07:25.197551 PCI 17.0, PIN A, using IRQ #22
813 06:07:25.200765 PCI 19.0, PIN A, using IRQ #41
814 06:07:25.203884 PCI 19.1, PIN B, using IRQ #42
815 06:07:25.207248 PCI 19.2, PIN C, using IRQ #43
816 06:07:25.210305 PCI 1C.0, PIN A, using IRQ #16
817 06:07:25.210733 PCI 1C.1, PIN B, using IRQ #17
818 06:07:25.213792 PCI 1C.2, PIN C, using IRQ #18
819 06:07:25.217237 PCI 1C.3, PIN D, using IRQ #19
820 06:07:25.220651 PCI 1C.4, PIN A, using IRQ #16
821 06:07:25.223661 PCI 1C.5, PIN B, using IRQ #17
822 06:07:25.227265 PCI 1C.6, PIN C, using IRQ #18
823 06:07:25.230568 PCI 1C.7, PIN D, using IRQ #19
824 06:07:25.233860 PCI 1D.0, PIN A, using IRQ #16
825 06:07:25.237326 PCI 1D.1, PIN B, using IRQ #17
826 06:07:25.240779 PCI 1D.2, PIN C, using IRQ #18
827 06:07:25.243894 PCI 1D.3, PIN D, using IRQ #19
828 06:07:25.246956 PCI 1E.0, PIN A, using IRQ #23
829 06:07:25.250359 PCI 1E.1, PIN B, using IRQ #20
830 06:07:25.253472 PCI 1E.2, PIN C, using IRQ #44
831 06:07:25.256857 PCI 1E.3, PIN D, using IRQ #45
832 06:07:25.260099 PCI 1F.3, PIN B, using IRQ #22
833 06:07:25.263773 PCI 1F.4, PIN C, using IRQ #23
834 06:07:25.263938 PCI 1F.6, PIN D, using IRQ #20
835 06:07:25.266971 PCI 1F.7, PIN A, using IRQ #21
836 06:07:25.273674 IRQ: Using dynamically assigned PCI IO-APIC IRQs
837 06:07:25.279897 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
838 06:07:25.459357 FSPS returned 0
839 06:07:25.462799 Executing Phase 1 of FspMultiPhaseSiInit
840 06:07:25.472546 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
841 06:07:25.475732 port C0 DISC req: usage 1 usb3 1 usb2 1
842 06:07:25.479281 Raw Buffer output 0 00000111
843 06:07:25.482607 Raw Buffer output 1 00000000
844 06:07:25.486132 pmc_send_ipc_cmd succeeded
845 06:07:25.492947 port C1 DISC req: usage 1 usb3 3 usb2 3
846 06:07:25.493109 Raw Buffer output 0 00000331
847 06:07:25.496312 Raw Buffer output 1 00000000
848 06:07:25.500472 pmc_send_ipc_cmd succeeded
849 06:07:25.504306 Detected 6 core, 8 thread CPU.
850 06:07:25.507647 Detected 6 core, 8 thread CPU.
851 06:07:25.512676 Detected 6 core, 8 thread CPU.
852 06:07:25.516678 Detected 6 core, 8 thread CPU.
853 06:07:25.519535 Detected 6 core, 8 thread CPU.
854 06:07:25.523399 Detected 6 core, 8 thread CPU.
855 06:07:25.526401 Detected 6 core, 8 thread CPU.
856 06:07:25.529806 Detected 6 core, 8 thread CPU.
857 06:07:25.532868 Detected 6 core, 8 thread CPU.
858 06:07:25.536499 Detected 6 core, 8 thread CPU.
859 06:07:25.539301 Detected 6 core, 8 thread CPU.
860 06:07:25.543018 Detected 6 core, 8 thread CPU.
861 06:07:25.546294 Detected 6 core, 8 thread CPU.
862 06:07:25.549876 Detected 6 core, 8 thread CPU.
863 06:07:25.553231 Detected 6 core, 8 thread CPU.
864 06:07:25.556198 Detected 6 core, 8 thread CPU.
865 06:07:25.559973 Detected 6 core, 8 thread CPU.
866 06:07:25.563312 Detected 6 core, 8 thread CPU.
867 06:07:25.566362 Detected 6 core, 8 thread CPU.
868 06:07:25.570293 Detected 6 core, 8 thread CPU.
869 06:07:25.573326 Detected 6 core, 8 thread CPU.
870 06:07:25.573768 Detected 6 core, 8 thread CPU.
871 06:07:25.866486 Detected 6 core, 8 thread CPU.
872 06:07:25.869287 Detected 6 core, 8 thread CPU.
873 06:07:25.872407 Detected 6 core, 8 thread CPU.
874 06:07:25.875961 Detected 6 core, 8 thread CPU.
875 06:07:25.879097 Detected 6 core, 8 thread CPU.
876 06:07:25.882506 Detected 6 core, 8 thread CPU.
877 06:07:25.885779 Detected 6 core, 8 thread CPU.
878 06:07:25.889428 Detected 6 core, 8 thread CPU.
879 06:07:25.892708 Detected 6 core, 8 thread CPU.
880 06:07:25.896101 Detected 6 core, 8 thread CPU.
881 06:07:25.899594 Detected 6 core, 8 thread CPU.
882 06:07:25.902537 Detected 6 core, 8 thread CPU.
883 06:07:25.906296 Detected 6 core, 8 thread CPU.
884 06:07:25.909530 Detected 6 core, 8 thread CPU.
885 06:07:25.912718 Detected 6 core, 8 thread CPU.
886 06:07:25.915944 Detected 6 core, 8 thread CPU.
887 06:07:25.919378 Detected 6 core, 8 thread CPU.
888 06:07:25.922592 Detected 6 core, 8 thread CPU.
889 06:07:25.925756 Detected 6 core, 8 thread CPU.
890 06:07:25.929593 Detected 6 core, 8 thread CPU.
891 06:07:25.932619 Display FSP Version Info HOB
892 06:07:25.935853 Reference Code - CPU = c.0.65.70
893 06:07:25.936277 uCode Version = 0.0.4.23
894 06:07:25.939020 TXT ACM version = ff.ff.ff.ffff
895 06:07:25.942520 Reference Code - ME = c.0.65.70
896 06:07:25.945756 MEBx version = 0.0.0.0
897 06:07:25.949130 ME Firmware Version = Lite SKU
898 06:07:25.952622 Reference Code - PCH = c.0.65.70
899 06:07:25.955809 PCH-CRID Status = Disabled
900 06:07:25.959416 PCH-CRID Original Value = ff.ff.ff.ffff
901 06:07:25.962411 PCH-CRID New Value = ff.ff.ff.ffff
902 06:07:25.965704 OPROM - RST - RAID = ff.ff.ff.ffff
903 06:07:25.969150 PCH Hsio Version = 4.0.0.0
904 06:07:25.972699 Reference Code - SA - System Agent = c.0.65.70
905 06:07:25.976129 Reference Code - MRC = 0.0.3.80
906 06:07:25.978917 SA - PCIe Version = c.0.65.70
907 06:07:25.982662 SA-CRID Status = Disabled
908 06:07:25.985821 SA-CRID Original Value = 0.0.0.4
909 06:07:25.989496 SA-CRID New Value = 0.0.0.4
910 06:07:25.992229 OPROM - VBIOS = ff.ff.ff.ffff
911 06:07:25.995900 IO Manageability Engine FW Version = 24.0.4.0
912 06:07:25.999160 PHY Build Version = 0.0.0.2016
913 06:07:26.002459 Thunderbolt(TM) FW Version = 0.0.0.0
914 06:07:26.009307 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
915 06:07:26.015813 BS: BS_DEV_INIT_CHIPS run times (exec / console): 490 / 507 ms
916 06:07:26.019162 Enumerating buses...
917 06:07:26.022549 Show all devs... Before device enumeration.
918 06:07:26.025868 Root Device: enabled 1
919 06:07:26.026411 CPU_CLUSTER: 0: enabled 1
920 06:07:26.029760 DOMAIN: 0000: enabled 1
921 06:07:26.032723 GPIO: 0: enabled 1
922 06:07:26.033162 PCI: 00:00.0: enabled 1
923 06:07:26.035969 PCI: 00:01.0: enabled 0
924 06:07:26.039499 PCI: 00:01.1: enabled 0
925 06:07:26.042917 PCI: 00:02.0: enabled 1
926 06:07:26.043388 PCI: 00:04.0: enabled 1
927 06:07:26.046194 PCI: 00:05.0: enabled 0
928 06:07:26.049517 PCI: 00:06.0: enabled 1
929 06:07:26.052940 PCI: 00:06.2: enabled 0
930 06:07:26.053497 PCI: 00:07.0: enabled 0
931 06:07:26.055834 PCI: 00:07.1: enabled 0
932 06:07:26.059612 PCI: 00:07.2: enabled 0
933 06:07:26.060047 PCI: 00:07.3: enabled 0
934 06:07:26.062649 PCI: 00:08.0: enabled 0
935 06:07:26.066121 PCI: 00:09.0: enabled 0
936 06:07:26.068928 PCI: 00:0a.0: enabled 1
937 06:07:26.069403 PCI: 00:0d.0: enabled 1
938 06:07:26.072388 PCI: 00:0d.1: enabled 0
939 06:07:26.075933 PCI: 00:0d.2: enabled 0
940 06:07:26.079282 PCI: 00:0d.3: enabled 0
941 06:07:26.079827 PCI: 00:0e.0: enabled 0
942 06:07:26.082354 PCI: 00:10.0: enabled 0
943 06:07:26.085521 PCI: 00:10.1: enabled 0
944 06:07:26.089618 PCI: 00:10.6: enabled 0
945 06:07:26.090169 PCI: 00:10.7: enabled 0
946 06:07:26.092126 PCI: 00:12.0: enabled 0
947 06:07:26.095970 PCI: 00:12.6: enabled 0
948 06:07:26.098946 PCI: 00:12.7: enabled 0
949 06:07:26.099547 PCI: 00:13.0: enabled 0
950 06:07:26.102355 PCI: 00:14.0: enabled 1
951 06:07:26.105632 PCI: 00:14.1: enabled 0
952 06:07:26.109093 PCI: 00:14.2: enabled 1
953 06:07:26.109636 PCI: 00:14.3: enabled 1
954 06:07:26.112067 PCI: 00:15.0: enabled 1
955 06:07:26.115809 PCI: 00:15.1: enabled 1
956 06:07:26.116424 PCI: 00:15.2: enabled 0
957 06:07:26.118876 PCI: 00:15.3: enabled 1
958 06:07:26.122241 PCI: 00:16.0: enabled 1
959 06:07:26.125404 PCI: 00:16.1: enabled 0
960 06:07:26.125933 PCI: 00:16.2: enabled 0
961 06:07:26.128973 PCI: 00:16.3: enabled 0
962 06:07:26.131743 PCI: 00:16.4: enabled 0
963 06:07:26.135553 PCI: 00:16.5: enabled 0
964 06:07:26.135978 PCI: 00:17.0: enabled 1
965 06:07:26.138780 PCI: 00:19.0: enabled 0
966 06:07:26.142052 PCI: 00:19.1: enabled 1
967 06:07:26.145427 PCI: 00:19.2: enabled 0
968 06:07:26.145956 PCI: 00:1a.0: enabled 0
969 06:07:26.148594 PCI: 00:1c.0: enabled 0
970 06:07:26.151947 PCI: 00:1c.1: enabled 0
971 06:07:26.155280 PCI: 00:1c.2: enabled 0
972 06:07:26.155848 PCI: 00:1c.3: enabled 0
973 06:07:26.158519 PCI: 00:1c.4: enabled 0
974 06:07:26.162234 PCI: 00:1c.5: enabled 0
975 06:07:26.162794 PCI: 00:1c.6: enabled 0
976 06:07:26.165261 PCI: 00:1c.7: enabled 0
977 06:07:26.168398 PCI: 00:1d.0: enabled 0
978 06:07:26.171686 PCI: 00:1d.1: enabled 0
979 06:07:26.172197 PCI: 00:1d.2: enabled 0
980 06:07:26.175520 PCI: 00:1d.3: enabled 0
981 06:07:26.178116 PCI: 00:1e.0: enabled 1
982 06:07:26.181793 PCI: 00:1e.1: enabled 0
983 06:07:26.182314 PCI: 00:1e.2: enabled 0
984 06:07:26.184777 PCI: 00:1e.3: enabled 1
985 06:07:26.188215 PCI: 00:1f.0: enabled 1
986 06:07:26.191640 PCI: 00:1f.1: enabled 0
987 06:07:26.192167 PCI: 00:1f.2: enabled 1
988 06:07:26.194812 PCI: 00:1f.3: enabled 1
989 06:07:26.198296 PCI: 00:1f.4: enabled 0
990 06:07:26.201473 PCI: 00:1f.5: enabled 1
991 06:07:26.201988 PCI: 00:1f.6: enabled 0
992 06:07:26.204911 PCI: 00:1f.7: enabled 0
993 06:07:26.208396 GENERIC: 0.0: enabled 1
994 06:07:26.208976 GENERIC: 0.0: enabled 1
995 06:07:26.211268 GENERIC: 1.0: enabled 1
996 06:07:26.214798 GENERIC: 0.0: enabled 1
997 06:07:26.218184 GENERIC: 1.0: enabled 1
998 06:07:26.218699 USB0 port 0: enabled 1
999 06:07:26.221324 USB0 port 0: enabled 1
1000 06:07:26.224915 GENERIC: 0.0: enabled 1
1001 06:07:26.228292 I2C: 00:1a: enabled 1
1002 06:07:26.228732 I2C: 00:31: enabled 1
1003 06:07:26.231517 I2C: 00:32: enabled 1
1004 06:07:26.234466 I2C: 00:50: enabled 1
1005 06:07:26.234954 I2C: 00:10: enabled 1
1006 06:07:26.238188 I2C: 00:15: enabled 1
1007 06:07:26.241648 I2C: 00:2c: enabled 1
1008 06:07:26.242221 GENERIC: 0.0: enabled 1
1009 06:07:26.244706 SPI: 00: enabled 1
1010 06:07:26.248161 PNP: 0c09.0: enabled 1
1011 06:07:26.248627 GENERIC: 0.0: enabled 1
1012 06:07:26.251475 USB3 port 0: enabled 1
1013 06:07:26.254870 USB3 port 1: enabled 0
1014 06:07:26.255452 USB3 port 2: enabled 1
1015 06:07:26.258042 USB3 port 3: enabled 0
1016 06:07:26.261269 USB2 port 0: enabled 1
1017 06:07:26.264657 USB2 port 1: enabled 0
1018 06:07:26.265081 USB2 port 2: enabled 1
1019 06:07:26.267740 USB2 port 3: enabled 0
1020 06:07:26.271319 USB2 port 4: enabled 0
1021 06:07:26.271743 USB2 port 5: enabled 1
1022 06:07:26.274684 USB2 port 6: enabled 0
1023 06:07:26.278103 USB2 port 7: enabled 0
1024 06:07:26.281381 USB2 port 8: enabled 1
1025 06:07:26.281910 USB2 port 9: enabled 1
1026 06:07:26.284485 USB3 port 0: enabled 1
1027 06:07:26.288238 USB3 port 1: enabled 0
1028 06:07:26.288782 USB3 port 2: enabled 0
1029 06:07:26.291097 USB3 port 3: enabled 0
1030 06:07:26.294763 GENERIC: 0.0: enabled 1
1031 06:07:26.298071 GENERIC: 1.0: enabled 1
1032 06:07:26.298596 APIC: 00: enabled 1
1033 06:07:26.301323 APIC: 16: enabled 1
1034 06:07:26.301834 APIC: 10: enabled 1
1035 06:07:26.304637 APIC: 14: enabled 1
1036 06:07:26.308159 APIC: 12: enabled 1
1037 06:07:26.308664 APIC: 09: enabled 1
1038 06:07:26.311209 APIC: 01: enabled 1
1039 06:07:26.311754 APIC: 08: enabled 1
1040 06:07:26.314319 Compare with tree...
1041 06:07:26.318092 Root Device: enabled 1
1042 06:07:26.321515 CPU_CLUSTER: 0: enabled 1
1043 06:07:26.322037 APIC: 00: enabled 1
1044 06:07:26.324808 APIC: 16: enabled 1
1045 06:07:26.327593 APIC: 10: enabled 1
1046 06:07:26.328129 APIC: 14: enabled 1
1047 06:07:26.331485 APIC: 12: enabled 1
1048 06:07:26.334590 APIC: 09: enabled 1
1049 06:07:26.335085 APIC: 01: enabled 1
1050 06:07:26.337792 APIC: 08: enabled 1
1051 06:07:26.341045 DOMAIN: 0000: enabled 1
1052 06:07:26.341694 GPIO: 0: enabled 1
1053 06:07:26.344254 PCI: 00:00.0: enabled 1
1054 06:07:26.347708 PCI: 00:01.0: enabled 0
1055 06:07:26.350875 PCI: 00:01.1: enabled 0
1056 06:07:26.354339 PCI: 00:02.0: enabled 1
1057 06:07:26.354909 PCI: 00:04.0: enabled 1
1058 06:07:26.357843 GENERIC: 0.0: enabled 1
1059 06:07:26.361084 PCI: 00:05.0: enabled 0
1060 06:07:26.364459 PCI: 00:06.0: enabled 1
1061 06:07:26.367757 PCI: 00:06.2: enabled 0
1062 06:07:26.368252 PCI: 00:08.0: enabled 0
1063 06:07:26.370786 PCI: 00:09.0: enabled 0
1064 06:07:26.374083 PCI: 00:0a.0: enabled 1
1065 06:07:26.377598 PCI: 00:0d.0: enabled 1
1066 06:07:26.381086 USB0 port 0: enabled 1
1067 06:07:26.381711 USB3 port 0: enabled 1
1068 06:07:26.384212 USB3 port 1: enabled 0
1069 06:07:26.387541 USB3 port 2: enabled 1
1070 06:07:26.390946 USB3 port 3: enabled 0
1071 06:07:26.394105 PCI: 00:0d.1: enabled 0
1072 06:07:26.394698 PCI: 00:0d.2: enabled 0
1073 06:07:26.397708 PCI: 00:0d.3: enabled 0
1074 06:07:26.401125 PCI: 00:0e.0: enabled 0
1075 06:07:26.404231 PCI: 00:10.0: enabled 0
1076 06:07:26.407696 PCI: 00:10.1: enabled 0
1077 06:07:26.408322 PCI: 00:10.6: enabled 0
1078 06:07:26.410731 PCI: 00:10.7: enabled 0
1079 06:07:26.414089 PCI: 00:12.0: enabled 0
1080 06:07:26.417836 PCI: 00:12.6: enabled 0
1081 06:07:26.420854 PCI: 00:12.7: enabled 0
1082 06:07:26.421271 PCI: 00:13.0: enabled 0
1083 06:07:26.424122 PCI: 00:14.0: enabled 1
1084 06:07:26.427510 USB0 port 0: enabled 1
1085 06:07:26.431105 USB2 port 0: enabled 1
1086 06:07:26.434194 USB2 port 1: enabled 0
1087 06:07:26.434791 USB2 port 2: enabled 1
1088 06:07:26.437528 USB2 port 3: enabled 0
1089 06:07:26.440878 USB2 port 4: enabled 0
1090 06:07:26.444103 USB2 port 5: enabled 1
1091 06:07:26.447584 USB2 port 6: enabled 0
1092 06:07:26.450752 USB2 port 7: enabled 0
1093 06:07:26.451170 USB2 port 8: enabled 1
1094 06:07:26.454581 USB2 port 9: enabled 1
1095 06:07:26.458154 USB3 port 0: enabled 1
1096 06:07:26.461236 USB3 port 1: enabled 0
1097 06:07:26.464481 USB3 port 2: enabled 0
1098 06:07:26.464902 USB3 port 3: enabled 0
1099 06:07:26.467749 PCI: 00:14.1: enabled 0
1100 06:07:26.470981 PCI: 00:14.2: enabled 1
1101 06:07:26.474620 PCI: 00:14.3: enabled 1
1102 06:07:26.477667 GENERIC: 0.0: enabled 1
1103 06:07:26.478176 PCI: 00:15.0: enabled 1
1104 06:07:26.481275 I2C: 00:1a: enabled 1
1105 06:07:26.484061 I2C: 00:31: enabled 1
1106 06:07:26.487734 I2C: 00:32: enabled 1
1107 06:07:26.491034 PCI: 00:15.1: enabled 1
1108 06:07:26.491731 I2C: 00:50: enabled 1
1109 06:07:26.494468 PCI: 00:15.2: enabled 0
1110 06:07:26.497817 PCI: 00:15.3: enabled 1
1111 06:07:26.500958 I2C: 00:10: enabled 1
1112 06:07:26.501485 PCI: 00:16.0: enabled 1
1113 06:07:26.504338 PCI: 00:16.1: enabled 0
1114 06:07:26.507812 PCI: 00:16.2: enabled 0
1115 06:07:26.511192 PCI: 00:16.3: enabled 0
1116 06:07:26.514446 PCI: 00:16.4: enabled 0
1117 06:07:26.515010 PCI: 00:16.5: enabled 0
1118 06:07:26.517725 PCI: 00:17.0: enabled 1
1119 06:07:26.520963 PCI: 00:19.0: enabled 0
1120 06:07:26.524345 PCI: 00:19.1: enabled 1
1121 06:07:26.524957 I2C: 00:15: enabled 1
1122 06:07:26.527548 I2C: 00:2c: enabled 1
1123 06:07:26.530905 PCI: 00:19.2: enabled 0
1124 06:07:26.534133 PCI: 00:1a.0: enabled 0
1125 06:07:26.537209 PCI: 00:1e.0: enabled 1
1126 06:07:26.537759 PCI: 00:1e.1: enabled 0
1127 06:07:26.540734 PCI: 00:1e.2: enabled 0
1128 06:07:26.544351 PCI: 00:1e.3: enabled 1
1129 06:07:26.547673 SPI: 00: enabled 1
1130 06:07:26.550875 PCI: 00:1f.0: enabled 1
1131 06:07:26.551318 PNP: 0c09.0: enabled 1
1132 06:07:26.554075 PCI: 00:1f.1: enabled 0
1133 06:07:26.557249 PCI: 00:1f.2: enabled 1
1134 06:07:26.560625 GENERIC: 0.0: enabled 1
1135 06:07:26.563866 GENERIC: 0.0: enabled 1
1136 06:07:26.564284 GENERIC: 1.0: enabled 1
1137 06:07:26.567334 PCI: 00:1f.3: enabled 1
1138 06:07:26.570805 PCI: 00:1f.4: enabled 0
1139 06:07:26.574100 PCI: 00:1f.5: enabled 1
1140 06:07:26.577557 PCI: 00:1f.6: enabled 0
1141 06:07:26.578102 PCI: 00:1f.7: enabled 0
1142 06:07:26.580590 Root Device scanning...
1143 06:07:26.584281 scan_static_bus for Root Device
1144 06:07:26.587380 CPU_CLUSTER: 0 enabled
1145 06:07:26.587865 DOMAIN: 0000 enabled
1146 06:07:26.590830 DOMAIN: 0000 scanning...
1147 06:07:26.594203 PCI: pci_scan_bus for bus 00
1148 06:07:26.597168 PCI: 00:00.0 [8086/0000] ops
1149 06:07:26.600626 PCI: 00:00.0 [8086/4609] enabled
1150 06:07:26.603985 PCI: 00:02.0 [8086/0000] bus ops
1151 06:07:26.607320 PCI: 00:02.0 [8086/46b3] enabled
1152 06:07:26.610429 PCI: 00:04.0 [8086/0000] bus ops
1153 06:07:26.613747 PCI: 00:04.0 [8086/461d] enabled
1154 06:07:26.617340 PCI: 00:06.0 [8086/0000] bus ops
1155 06:07:26.620547 PCI: 00:06.0 [8086/464d] enabled
1156 06:07:26.623757 PCI: 00:08.0 [8086/464f] disabled
1157 06:07:26.627182 PCI: 00:0a.0 [8086/467d] enabled
1158 06:07:26.630435 PCI: 00:0d.0 [8086/0000] bus ops
1159 06:07:26.634143 PCI: 00:0d.0 [8086/461e] enabled
1160 06:07:26.637294 PCI: 00:14.0 [8086/0000] bus ops
1161 06:07:26.640673 PCI: 00:14.0 [8086/51ed] enabled
1162 06:07:26.643723 PCI: 00:14.2 [8086/51ef] enabled
1163 06:07:26.647312 PCI: 00:14.3 [8086/0000] bus ops
1164 06:07:26.650782 PCI: 00:14.3 [8086/51f0] enabled
1165 06:07:26.653832 PCI: 00:15.0 [8086/0000] bus ops
1166 06:07:26.657108 PCI: 00:15.0 [8086/51e8] enabled
1167 06:07:26.660585 PCI: 00:15.1 [8086/0000] bus ops
1168 06:07:26.663699 PCI: 00:15.1 [8086/51e9] enabled
1169 06:07:26.667150 PCI: 00:15.2 [8086/0000] bus ops
1170 06:07:26.670640 PCI: 00:15.2 [8086/51ea] disabled
1171 06:07:26.673972 PCI: 00:15.3 [8086/0000] bus ops
1172 06:07:26.677176 PCI: 00:15.3 [8086/51eb] enabled
1173 06:07:26.680644 PCI: 00:16.0 [8086/0000] ops
1174 06:07:26.683700 PCI: 00:16.0 [8086/51e0] enabled
1175 06:07:26.690606 PCI: Static device PCI: 00:17.0 not found, disabling it.
1176 06:07:26.693658 PCI: 00:19.0 [8086/0000] bus ops
1177 06:07:26.697308 PCI: 00:19.0 [8086/51c5] disabled
1178 06:07:26.700345 PCI: 00:19.1 [8086/0000] bus ops
1179 06:07:26.703760 PCI: 00:19.1 [8086/51c6] enabled
1180 06:07:26.707414 PCI: 00:1e.0 [8086/0000] ops
1181 06:07:26.710695 PCI: 00:1e.0 [8086/51a8] enabled
1182 06:07:26.713979 PCI: 00:1e.3 [8086/0000] bus ops
1183 06:07:26.717562 PCI: 00:1e.3 [8086/51ab] enabled
1184 06:07:26.720408 PCI: 00:1f.0 [8086/0000] bus ops
1185 06:07:26.723802 PCI: 00:1f.0 [8086/5182] enabled
1186 06:07:26.727002 RTC Init
1187 06:07:26.730295 Set power on after power failure.
1188 06:07:26.730747 Disabling Deep S3
1189 06:07:26.733772 Disabling Deep S3
1190 06:07:26.734304 Disabling Deep S4
1191 06:07:26.737302 Disabling Deep S4
1192 06:07:26.740370 Disabling Deep S5
1193 06:07:26.741013 Disabling Deep S5
1194 06:07:26.743469 PCI: 00:1f.2 [0000/0000] hidden
1195 06:07:26.747331 PCI: 00:1f.3 [8086/0000] bus ops
1196 06:07:26.750770 PCI: 00:1f.3 [8086/51c8] enabled
1197 06:07:26.753659 PCI: 00:1f.5 [8086/0000] bus ops
1198 06:07:26.757272 PCI: 00:1f.5 [8086/51a4] enabled
1199 06:07:26.760403 GPIO: 0 enabled
1200 06:07:26.763544 PCI: Leftover static devices:
1201 06:07:26.763979 PCI: 00:01.0
1202 06:07:26.764429 PCI: 00:01.1
1203 06:07:26.767329 PCI: 00:05.0
1204 06:07:26.767767 PCI: 00:06.2
1205 06:07:26.770933 PCI: 00:09.0
1206 06:07:26.771548 PCI: 00:0d.1
1207 06:07:26.772002 PCI: 00:0d.2
1208 06:07:26.773889 PCI: 00:0d.3
1209 06:07:26.774411 PCI: 00:0e.0
1210 06:07:26.777261 PCI: 00:10.0
1211 06:07:26.777800 PCI: 00:10.1
1212 06:07:26.778257 PCI: 00:10.6
1213 06:07:26.780361 PCI: 00:10.7
1214 06:07:26.780797 PCI: 00:12.0
1215 06:07:26.783772 PCI: 00:12.6
1216 06:07:26.784215 PCI: 00:12.7
1217 06:07:26.787603 PCI: 00:13.0
1218 06:07:26.788175 PCI: 00:14.1
1219 06:07:26.788632 PCI: 00:16.1
1220 06:07:26.790593 PCI: 00:16.2
1221 06:07:26.791026 PCI: 00:16.3
1222 06:07:26.793833 PCI: 00:16.4
1223 06:07:26.794387 PCI: 00:16.5
1224 06:07:26.794836 PCI: 00:17.0
1225 06:07:26.797263 PCI: 00:19.2
1226 06:07:26.797700 PCI: 00:1a.0
1227 06:07:26.800785 PCI: 00:1e.1
1228 06:07:26.801323 PCI: 00:1e.2
1229 06:07:26.801779 PCI: 00:1f.1
1230 06:07:26.803989 PCI: 00:1f.4
1231 06:07:26.804578 PCI: 00:1f.6
1232 06:07:26.806971 PCI: 00:1f.7
1233 06:07:26.810288 PCI: Check your devicetree.cb.
1234 06:07:26.810775 PCI: 00:02.0 scanning...
1235 06:07:26.813619 scan_generic_bus for PCI: 00:02.0
1236 06:07:26.820254 scan_generic_bus for PCI: 00:02.0 done
1237 06:07:26.823821 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1238 06:07:26.826751 PCI: 00:04.0 scanning...
1239 06:07:26.830275 scan_generic_bus for PCI: 00:04.0
1240 06:07:26.830784 GENERIC: 0.0 enabled
1241 06:07:26.836777 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1242 06:07:26.843329 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1243 06:07:26.843830 PCI: 00:06.0 scanning...
1244 06:07:26.850029 do_pci_scan_bridge for PCI: 00:06.0
1245 06:07:26.850547 PCI: pci_scan_bus for bus 01
1246 06:07:26.853351 PCI: 01:00.0 [15b7/5009] enabled
1247 06:07:26.860108 Enabling Common Clock Configuration
1248 06:07:26.863759 L1 Sub-State supported from root port 6
1249 06:07:26.866600 L1 Sub-State Support = 0x5
1250 06:07:26.870194 CommonModeRestoreTime = 0x6e
1251 06:07:26.873310 Power On Value = 0x5, Power On Scale = 0x2
1252 06:07:26.873758 ASPM: Enabled L1
1253 06:07:26.880707 PCIe: Max_Payload_Size adjusted to 256
1254 06:07:26.881253 PCI: 01:00.0: Enabled LTR
1255 06:07:26.886984 PCI: 01:00.0: Programmed LTR max latencies
1256 06:07:26.890270 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1257 06:07:26.893977 PCI: 00:0d.0 scanning...
1258 06:07:26.896935 scan_static_bus for PCI: 00:0d.0
1259 06:07:26.897422 USB0 port 0 enabled
1260 06:07:26.900235 USB0 port 0 scanning...
1261 06:07:26.903805 scan_static_bus for USB0 port 0
1262 06:07:26.906743 USB3 port 0 enabled
1263 06:07:26.907181 USB3 port 1 disabled
1264 06:07:26.910455 USB3 port 2 enabled
1265 06:07:26.913671 USB3 port 3 disabled
1266 06:07:26.914109 USB3 port 0 scanning...
1267 06:07:26.917070 scan_static_bus for USB3 port 0
1268 06:07:26.920519 scan_static_bus for USB3 port 0 done
1269 06:07:26.926511 scan_bus: bus USB3 port 0 finished in 6 msecs
1270 06:07:26.930065 USB3 port 2 scanning...
1271 06:07:26.933141 scan_static_bus for USB3 port 2
1272 06:07:26.936549 scan_static_bus for USB3 port 2 done
1273 06:07:26.939863 scan_bus: bus USB3 port 2 finished in 6 msecs
1274 06:07:26.943319 scan_static_bus for USB0 port 0 done
1275 06:07:26.949681 scan_bus: bus USB0 port 0 finished in 43 msecs
1276 06:07:26.953067 scan_static_bus for PCI: 00:0d.0 done
1277 06:07:26.956242 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1278 06:07:26.959499 PCI: 00:14.0 scanning...
1279 06:07:26.962746 scan_static_bus for PCI: 00:14.0
1280 06:07:26.966563 USB0 port 0 enabled
1281 06:07:26.966999 USB0 port 0 scanning...
1282 06:07:26.969318 scan_static_bus for USB0 port 0
1283 06:07:26.973238 USB2 port 0 enabled
1284 06:07:26.975985 USB2 port 1 disabled
1285 06:07:26.976410 USB2 port 2 enabled
1286 06:07:26.979848 USB2 port 3 disabled
1287 06:07:26.982809 USB2 port 4 disabled
1288 06:07:26.983274 USB2 port 5 enabled
1289 06:07:26.986102 USB2 port 6 disabled
1290 06:07:26.986585 USB2 port 7 disabled
1291 06:07:26.989318 USB2 port 8 enabled
1292 06:07:26.993241 USB2 port 9 enabled
1293 06:07:26.993800 USB3 port 0 enabled
1294 06:07:26.996637 USB3 port 1 disabled
1295 06:07:26.999589 USB3 port 2 disabled
1296 06:07:27.000074 USB3 port 3 disabled
1297 06:07:27.002918 USB2 port 0 scanning...
1298 06:07:27.006396 scan_static_bus for USB2 port 0
1299 06:07:27.009650 scan_static_bus for USB2 port 0 done
1300 06:07:27.012575 scan_bus: bus USB2 port 0 finished in 6 msecs
1301 06:07:27.015948 USB2 port 2 scanning...
1302 06:07:27.019294 scan_static_bus for USB2 port 2
1303 06:07:27.023155 scan_static_bus for USB2 port 2 done
1304 06:07:27.029251 scan_bus: bus USB2 port 2 finished in 6 msecs
1305 06:07:27.029693 USB2 port 5 scanning...
1306 06:07:27.032747 scan_static_bus for USB2 port 5
1307 06:07:27.035837 scan_static_bus for USB2 port 5 done
1308 06:07:27.042410 scan_bus: bus USB2 port 5 finished in 6 msecs
1309 06:07:27.046091 USB2 port 8 scanning...
1310 06:07:27.049326 scan_static_bus for USB2 port 8
1311 06:07:27.052681 scan_static_bus for USB2 port 8 done
1312 06:07:27.056111 scan_bus: bus USB2 port 8 finished in 6 msecs
1313 06:07:27.059351 USB2 port 9 scanning...
1314 06:07:27.062499 scan_static_bus for USB2 port 9
1315 06:07:27.066248 scan_static_bus for USB2 port 9 done
1316 06:07:27.069514 scan_bus: bus USB2 port 9 finished in 6 msecs
1317 06:07:27.072441 USB3 port 0 scanning...
1318 06:07:27.075687 scan_static_bus for USB3 port 0
1319 06:07:27.079065 scan_static_bus for USB3 port 0 done
1320 06:07:27.082503 scan_bus: bus USB3 port 0 finished in 6 msecs
1321 06:07:27.089166 scan_static_bus for USB0 port 0 done
1322 06:07:27.092173 scan_bus: bus USB0 port 0 finished in 120 msecs
1323 06:07:27.096032 scan_static_bus for PCI: 00:14.0 done
1324 06:07:27.102292 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1325 06:07:27.102813 PCI: 00:14.3 scanning...
1326 06:07:27.105752 scan_static_bus for PCI: 00:14.3
1327 06:07:27.109258 GENERIC: 0.0 enabled
1328 06:07:27.112579 scan_static_bus for PCI: 00:14.3 done
1329 06:07:27.119369 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1330 06:07:27.119916 PCI: 00:15.0 scanning...
1331 06:07:27.122679 scan_static_bus for PCI: 00:15.0
1332 06:07:27.126025 I2C: 00:1a enabled
1333 06:07:27.129242 I2C: 00:31 enabled
1334 06:07:27.129779 I2C: 00:32 enabled
1335 06:07:27.132435 scan_static_bus for PCI: 00:15.0 done
1336 06:07:27.138998 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1337 06:07:27.139555 PCI: 00:15.1 scanning...
1338 06:07:27.142174 scan_static_bus for PCI: 00:15.1
1339 06:07:27.145541 I2C: 00:50 enabled
1340 06:07:27.148883 scan_static_bus for PCI: 00:15.1 done
1341 06:07:27.155990 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1342 06:07:27.156507 PCI: 00:15.3 scanning...
1343 06:07:27.158843 scan_static_bus for PCI: 00:15.3
1344 06:07:27.162080 I2C: 00:10 enabled
1345 06:07:27.165622 scan_static_bus for PCI: 00:15.3 done
1346 06:07:27.171942 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1347 06:07:27.172456 PCI: 00:19.1 scanning...
1348 06:07:27.175588 scan_static_bus for PCI: 00:19.1
1349 06:07:27.179188 I2C: 00:15 enabled
1350 06:07:27.179762 I2C: 00:2c enabled
1351 06:07:27.185262 scan_static_bus for PCI: 00:19.1 done
1352 06:07:27.188876 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1353 06:07:27.192201 PCI: 00:1e.3 scanning...
1354 06:07:27.195766 scan_generic_bus for PCI: 00:1e.3
1355 06:07:27.196312 SPI: 00 enabled
1356 06:07:27.202431 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1357 06:07:27.208963 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1358 06:07:27.209507 PCI: 00:1f.0 scanning...
1359 06:07:27.212645 scan_static_bus for PCI: 00:1f.0
1360 06:07:27.215985 PNP: 0c09.0 enabled
1361 06:07:27.218872 PNP: 0c09.0 scanning...
1362 06:07:27.222254 scan_static_bus for PNP: 0c09.0
1363 06:07:27.225552 scan_static_bus for PNP: 0c09.0 done
1364 06:07:27.228754 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1365 06:07:27.231825 scan_static_bus for PCI: 00:1f.0 done
1366 06:07:27.239043 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1367 06:07:27.242068 PCI: 00:1f.2 scanning...
1368 06:07:27.245182 scan_static_bus for PCI: 00:1f.2
1369 06:07:27.245607 GENERIC: 0.0 enabled
1370 06:07:27.248687 GENERIC: 0.0 scanning...
1371 06:07:27.251701 scan_static_bus for GENERIC: 0.0
1372 06:07:27.255590 GENERIC: 0.0 enabled
1373 06:07:27.256028 GENERIC: 1.0 enabled
1374 06:07:27.258726 scan_static_bus for GENERIC: 0.0 done
1375 06:07:27.265162 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1376 06:07:27.268836 scan_static_bus for PCI: 00:1f.2 done
1377 06:07:27.271960 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1378 06:07:27.275120 PCI: 00:1f.3 scanning...
1379 06:07:27.278642 scan_static_bus for PCI: 00:1f.3
1380 06:07:27.282046 scan_static_bus for PCI: 00:1f.3 done
1381 06:07:27.288525 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1382 06:07:27.288967 PCI: 00:1f.5 scanning...
1383 06:07:27.291800 scan_generic_bus for PCI: 00:1f.5
1384 06:07:27.299189 scan_generic_bus for PCI: 00:1f.5 done
1385 06:07:27.302403 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1386 06:07:27.308681 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1387 06:07:27.311775 scan_static_bus for Root Device done
1388 06:07:27.315492 scan_bus: bus Root Device finished in 729 msecs
1389 06:07:27.316036 done
1390 06:07:27.322064 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1391 06:07:27.328550 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1392 06:07:27.335470 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1393 06:07:27.338465 SPI flash protection: WPSW=0 SRP0=0
1394 06:07:27.341596 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1395 06:07:27.348180 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1396 06:07:27.351698 found VGA at PCI: 00:02.0
1397 06:07:27.355358 Setting up VGA for PCI: 00:02.0
1398 06:07:27.358651 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1399 06:07:27.365286 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1400 06:07:27.368655 Allocating resources...
1401 06:07:27.369196 Reading resources...
1402 06:07:27.371848 Root Device read_resources bus 0 link: 0
1403 06:07:27.378920 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1404 06:07:27.381953 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1405 06:07:27.384807 DOMAIN: 0000 read_resources bus 0 link: 0
1406 06:07:27.392113 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1407 06:07:27.398683 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1408 06:07:27.405320 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1409 06:07:27.411796 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1410 06:07:27.418224 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1411 06:07:27.424940 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1412 06:07:27.431953 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1413 06:07:27.438188 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1414 06:07:27.444702 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1415 06:07:27.451536 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1416 06:07:27.458336 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1417 06:07:27.461423 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1418 06:07:27.468031 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1419 06:07:27.475062 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1420 06:07:27.481699 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1421 06:07:27.487975 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1422 06:07:27.494628 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1423 06:07:27.501027 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1424 06:07:27.508057 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1425 06:07:27.514491 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1426 06:07:27.517855 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1427 06:07:27.524720 PCI: 00:04.0 read_resources bus 1 link: 0
1428 06:07:27.527932 PCI: 00:04.0 read_resources bus 1 link: 0 done
1429 06:07:27.531736 PCI: 00:06.0 read_resources bus 1 link: 0
1430 06:07:27.537755 PCI: 00:06.0 read_resources bus 1 link: 0 done
1431 06:07:27.541218 PCI: 00:0d.0 read_resources bus 0 link: 0
1432 06:07:27.544307 USB0 port 0 read_resources bus 0 link: 0
1433 06:07:27.551049 USB0 port 0 read_resources bus 0 link: 0 done
1434 06:07:27.554341 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1435 06:07:27.557575 PCI: 00:14.0 read_resources bus 0 link: 0
1436 06:07:27.564587 USB0 port 0 read_resources bus 0 link: 0
1437 06:07:27.567691 USB0 port 0 read_resources bus 0 link: 0 done
1438 06:07:27.570844 PCI: 00:14.0 read_resources bus 0 link: 0 done
1439 06:07:27.577667 PCI: 00:14.3 read_resources bus 0 link: 0
1440 06:07:27.580876 PCI: 00:14.3 read_resources bus 0 link: 0 done
1441 06:07:27.584009 PCI: 00:15.0 read_resources bus 0 link: 0
1442 06:07:27.590876 PCI: 00:15.0 read_resources bus 0 link: 0 done
1443 06:07:27.594085 PCI: 00:15.1 read_resources bus 0 link: 0
1444 06:07:27.600047 PCI: 00:15.1 read_resources bus 0 link: 0 done
1445 06:07:27.603647 PCI: 00:15.3 read_resources bus 0 link: 0
1446 06:07:27.606790 PCI: 00:15.3 read_resources bus 0 link: 0 done
1447 06:07:27.613769 PCI: 00:19.1 read_resources bus 0 link: 0
1448 06:07:27.616879 PCI: 00:19.1 read_resources bus 0 link: 0 done
1449 06:07:27.620447 PCI: 00:1e.3 read_resources bus 2 link: 0
1450 06:07:27.627195 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1451 06:07:27.630001 PCI: 00:1f.0 read_resources bus 0 link: 0
1452 06:07:27.636920 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1453 06:07:27.639956 PCI: 00:1f.2 read_resources bus 0 link: 0
1454 06:07:27.643433 GENERIC: 0.0 read_resources bus 0 link: 0
1455 06:07:27.646640 GENERIC: 0.0 read_resources bus 0 link: 0 done
1456 06:07:27.653296 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1457 06:07:27.656851 DOMAIN: 0000 read_resources bus 0 link: 0 done
1458 06:07:27.663205 Root Device read_resources bus 0 link: 0 done
1459 06:07:27.666747 Done reading resources.
1460 06:07:27.670131 Show resources in subtree (Root Device)...After reading.
1461 06:07:27.676589 Root Device child on link 0 CPU_CLUSTER: 0
1462 06:07:27.679813 CPU_CLUSTER: 0 child on link 0 APIC: 00
1463 06:07:27.679901 APIC: 00
1464 06:07:27.683187 APIC: 16
1465 06:07:27.683314 APIC: 10
1466 06:07:27.683402 APIC: 14
1467 06:07:27.686830 APIC: 12
1468 06:07:27.686916 APIC: 09
1469 06:07:27.689852 APIC: 01
1470 06:07:27.689940 APIC: 08
1471 06:07:27.693324 DOMAIN: 0000 child on link 0 GPIO: 0
1472 06:07:27.703293 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1473 06:07:27.713321 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1474 06:07:27.713457 GPIO: 0
1475 06:07:27.716440 PCI: 00:00.0
1476 06:07:27.726758 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1477 06:07:27.733539 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1478 06:07:27.743146 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1479 06:07:27.753521 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1480 06:07:27.763631 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1481 06:07:27.773033 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1482 06:07:27.779942 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1483 06:07:27.789609 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1484 06:07:27.800131 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1485 06:07:27.809977 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1486 06:07:27.819480 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1487 06:07:27.829426 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1488 06:07:27.839316 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1489 06:07:27.846274 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1490 06:07:27.856329 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1491 06:07:27.866287 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1492 06:07:27.876377 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1493 06:07:27.886059 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1494 06:07:27.896182 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1495 06:07:27.906314 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1496 06:07:27.915696 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1497 06:07:27.922790 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1498 06:07:27.932768 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1499 06:07:27.942660 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1500 06:07:27.952397 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1501 06:07:27.962208 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1502 06:07:27.972558 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1503 06:07:27.981951 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1504 06:07:27.982038 PCI: 00:02.0
1505 06:07:27.992090 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1506 06:07:28.001981 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1507 06:07:28.012424 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1508 06:07:28.015456 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1509 06:07:28.025276 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1510 06:07:28.028784 GENERIC: 0.0
1511 06:07:28.032042 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1512 06:07:28.041834 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1513 06:07:28.051922 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1514 06:07:28.058830 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1515 06:07:28.062106 PCI: 01:00.0
1516 06:07:28.072026 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1517 06:07:28.081900 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1518 06:07:28.081983 PCI: 00:08.0
1519 06:07:28.085364 PCI: 00:0a.0
1520 06:07:28.095524 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1521 06:07:28.098574 PCI: 00:0d.0 child on link 0 USB0 port 0
1522 06:07:28.108751 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1523 06:07:28.115362 USB0 port 0 child on link 0 USB3 port 0
1524 06:07:28.115445 USB3 port 0
1525 06:07:28.118622 USB3 port 1
1526 06:07:28.118704 USB3 port 2
1527 06:07:28.121923 USB3 port 3
1528 06:07:28.125081 PCI: 00:14.0 child on link 0 USB0 port 0
1529 06:07:28.135097 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1530 06:07:28.138456 USB0 port 0 child on link 0 USB2 port 0
1531 06:07:28.141667 USB2 port 0
1532 06:07:28.145239 USB2 port 1
1533 06:07:28.145322 USB2 port 2
1534 06:07:28.148425 USB2 port 3
1535 06:07:28.148532 USB2 port 4
1536 06:07:28.151550 USB2 port 5
1537 06:07:28.151632 USB2 port 6
1538 06:07:28.155191 USB2 port 7
1539 06:07:28.155315 USB2 port 8
1540 06:07:28.158407 USB2 port 9
1541 06:07:28.158490 USB3 port 0
1542 06:07:28.161873 USB3 port 1
1543 06:07:28.161955 USB3 port 2
1544 06:07:28.164994 USB3 port 3
1545 06:07:28.165077 PCI: 00:14.2
1546 06:07:28.175327 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1547 06:07:28.184883 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1548 06:07:28.191902 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1549 06:07:28.201752 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1550 06:07:28.201837 GENERIC: 0.0
1551 06:07:28.208215 PCI: 00:15.0 child on link 0 I2C: 00:1a
1552 06:07:28.218320 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1553 06:07:28.218419 I2C: 00:1a
1554 06:07:28.218485 I2C: 00:31
1555 06:07:28.221516 I2C: 00:32
1556 06:07:28.224820 PCI: 00:15.1 child on link 0 I2C: 00:50
1557 06:07:28.235187 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1558 06:07:28.238483 I2C: 00:50
1559 06:07:28.238565 PCI: 00:15.2
1560 06:07:28.241434 PCI: 00:15.3 child on link 0 I2C: 00:10
1561 06:07:28.251412 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1562 06:07:28.254993 I2C: 00:10
1563 06:07:28.255077 PCI: 00:16.0
1564 06:07:28.265064 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1565 06:07:28.268317 PCI: 00:19.0
1566 06:07:28.271454 PCI: 00:19.1 child on link 0 I2C: 00:15
1567 06:07:28.281245 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1568 06:07:28.284871 I2C: 00:15
1569 06:07:28.284954 I2C: 00:2c
1570 06:07:28.288286 PCI: 00:1e.0
1571 06:07:28.298398 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1572 06:07:28.301559 PCI: 00:1e.3 child on link 0 SPI: 00
1573 06:07:28.311791 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1574 06:07:28.315055 SPI: 00
1575 06:07:28.318256 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1576 06:07:28.325050 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1577 06:07:28.328288 PNP: 0c09.0
1578 06:07:28.338406 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1579 06:07:28.341376 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1580 06:07:28.351195 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1581 06:07:28.361349 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1582 06:07:28.364622 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1583 06:07:28.367978 GENERIC: 0.0
1584 06:07:28.368062 GENERIC: 1.0
1585 06:07:28.371495 PCI: 00:1f.3
1586 06:07:28.381111 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1587 06:07:28.391349 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1588 06:07:28.391441 PCI: 00:1f.5
1589 06:07:28.401022 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1590 06:07:28.407909 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1591 06:07:28.414434 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1592 06:07:28.421228 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1593 06:07:28.427693 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1594 06:07:28.431054 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1595 06:07:28.434154 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1596 06:07:28.441220 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1597 06:07:28.447523 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1598 06:07:28.457668 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1599 06:07:28.464123 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1600 06:07:28.470951 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1601 06:07:28.477574 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1602 06:07:28.483991 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1603 06:07:28.493996 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1604 06:07:28.497211 DOMAIN: 0000: Resource ranges:
1605 06:07:28.500825 * Base: 1000, Size: 800, Tag: 100
1606 06:07:28.504073 * Base: 1900, Size: e700, Tag: 100
1607 06:07:28.507185 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1608 06:07:28.514213 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1609 06:07:28.520882 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1610 06:07:28.530738 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1611 06:07:28.537082 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1612 06:07:28.544090 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1613 06:07:28.553722 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1614 06:07:28.560357 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1615 06:07:28.567473 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1616 06:07:28.576920 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1617 06:07:28.583955 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1618 06:07:28.590662 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1619 06:07:28.600124 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1620 06:07:28.607109 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1621 06:07:28.613396 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1622 06:07:28.623530 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1623 06:07:28.630202 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1624 06:07:28.636898 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1625 06:07:28.646655 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1626 06:07:28.653104 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1627 06:07:28.659747 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1628 06:07:28.669940 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1629 06:07:28.676207 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1630 06:07:28.683037 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1631 06:07:28.692925 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1632 06:07:28.699728 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1633 06:07:28.706061 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1634 06:07:28.716262 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1635 06:07:28.722889 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1636 06:07:28.729499 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1637 06:07:28.739564 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1638 06:07:28.745888 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1639 06:07:28.752551 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1640 06:07:28.756318 DOMAIN: 0000: Resource ranges:
1641 06:07:28.762493 * Base: 80400000, Size: 3fc00000, Tag: 200
1642 06:07:28.765973 * Base: d0000000, Size: 28000000, Tag: 200
1643 06:07:28.769313 * Base: fa000000, Size: 1000000, Tag: 200
1644 06:07:28.772456 * Base: fb001000, Size: 17ff000, Tag: 200
1645 06:07:28.779356 * Base: fe800000, Size: 300000, Tag: 200
1646 06:07:28.782255 * Base: feb80000, Size: 80000, Tag: 200
1647 06:07:28.785660 * Base: fed00000, Size: 40000, Tag: 200
1648 06:07:28.788939 * Base: fed70000, Size: 10000, Tag: 200
1649 06:07:28.795822 * Base: fed88000, Size: 8000, Tag: 200
1650 06:07:28.799423 * Base: fed93000, Size: d000, Tag: 200
1651 06:07:28.802729 * Base: feda2000, Size: 1e000, Tag: 200
1652 06:07:28.805886 * Base: fede0000, Size: 1220000, Tag: 200
1653 06:07:28.812144 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1654 06:07:28.818838 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1655 06:07:28.825470 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1656 06:07:28.832065 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1657 06:07:28.839253 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1658 06:07:28.845695 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1659 06:07:28.852246 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1660 06:07:28.858957 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1661 06:07:28.865124 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1662 06:07:28.871911 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1663 06:07:28.878586 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1664 06:07:28.885275 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1665 06:07:28.891767 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1666 06:07:28.898551 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1667 06:07:28.905611 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1668 06:07:28.912228 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1669 06:07:28.918689 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1670 06:07:28.925082 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1671 06:07:28.931829 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1672 06:07:28.938826 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1673 06:07:28.945434 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1674 06:07:28.955365 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1675 06:07:28.958305 PCI: 00:06.0: Resource ranges:
1676 06:07:28.961593 * Base: 80400000, Size: 100000, Tag: 200
1677 06:07:28.968382 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1678 06:07:28.975198 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1679 06:07:28.981465 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1680 06:07:28.991633 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1681 06:07:28.994803 Root Device assign_resources, bus 0 link: 0
1682 06:07:28.997772 DOMAIN: 0000 assign_resources, bus 0 link: 0
1683 06:07:29.007818 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1684 06:07:29.014456 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1685 06:07:29.024407 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1686 06:07:29.030951 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1687 06:07:29.034212 PCI: 00:04.0 assign_resources, bus 1 link: 0
1688 06:07:29.040916 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1689 06:07:29.047835 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1690 06:07:29.057538 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1691 06:07:29.067372 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1692 06:07:29.070760 PCI: 00:06.0 assign_resources, bus 1 link: 0
1693 06:07:29.080894 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1694 06:07:29.087631 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1695 06:07:29.094192 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1696 06:07:29.100685 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1697 06:07:29.107514 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1698 06:07:29.114096 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1699 06:07:29.117480 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1700 06:07:29.127174 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1701 06:07:29.130332 PCI: 00:14.0 assign_resources, bus 0 link: 0
1702 06:07:29.137171 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1703 06:07:29.143725 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1704 06:07:29.150558 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1705 06:07:29.160350 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1706 06:07:29.163968 PCI: 00:14.3 assign_resources, bus 0 link: 0
1707 06:07:29.170291 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1708 06:07:29.177135 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1709 06:07:29.180063 PCI: 00:15.0 assign_resources, bus 0 link: 0
1710 06:07:29.186890 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1711 06:07:29.193471 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1712 06:07:29.199974 PCI: 00:15.1 assign_resources, bus 0 link: 0
1713 06:07:29.203399 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1714 06:07:29.213413 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1715 06:07:29.216564 PCI: 00:15.3 assign_resources, bus 0 link: 0
1716 06:07:29.220118 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1717 06:07:29.229983 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1718 06:07:29.237152 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1719 06:07:29.243162 PCI: 00:19.1 assign_resources, bus 0 link: 0
1720 06:07:29.247098 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1721 06:07:29.256500 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1722 06:07:29.259706 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1723 06:07:29.263120 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1724 06:07:29.269819 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1725 06:07:29.273055 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1726 06:07:29.280017 LPC: Trying to open IO window from 800 size 1ff
1727 06:07:29.286476 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1728 06:07:29.296638 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1729 06:07:29.303100 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1730 06:07:29.306241 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1731 06:07:29.312912 Root Device assign_resources, bus 0 link: 0 done
1732 06:07:29.316191 Done setting resources.
1733 06:07:29.323087 Show resources in subtree (Root Device)...After assigning values.
1734 06:07:29.326349 Root Device child on link 0 CPU_CLUSTER: 0
1735 06:07:29.329674 CPU_CLUSTER: 0 child on link 0 APIC: 00
1736 06:07:29.333096 APIC: 00
1737 06:07:29.333207 APIC: 16
1738 06:07:29.333295 APIC: 10
1739 06:07:29.336230 APIC: 14
1740 06:07:29.336337 APIC: 12
1741 06:07:29.336433 APIC: 09
1742 06:07:29.339491 APIC: 01
1743 06:07:29.339565 APIC: 08
1744 06:07:29.342838 DOMAIN: 0000 child on link 0 GPIO: 0
1745 06:07:29.352729 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1746 06:07:29.362957 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1747 06:07:29.366526 GPIO: 0
1748 06:07:29.366610 PCI: 00:00.0
1749 06:07:29.375867 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1750 06:07:29.386124 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1751 06:07:29.396079 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1752 06:07:29.402972 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1753 06:07:29.412462 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1754 06:07:29.422779 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1755 06:07:29.432388 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1756 06:07:29.442330 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1757 06:07:29.452326 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1758 06:07:29.462361 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1759 06:07:29.468958 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1760 06:07:29.478914 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1761 06:07:29.488830 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1762 06:07:29.498700 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1763 06:07:29.508644 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1764 06:07:29.515354 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1765 06:07:29.525144 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1766 06:07:29.535171 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1767 06:07:29.544950 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1768 06:07:29.554799 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1769 06:07:29.564910 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1770 06:07:29.574942 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1771 06:07:29.584596 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1772 06:07:29.594487 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1773 06:07:29.604522 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1774 06:07:29.614578 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1775 06:07:29.621079 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1776 06:07:29.631083 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1777 06:07:29.634140 PCI: 00:02.0
1778 06:07:29.643894 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1779 06:07:29.654062 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1780 06:07:29.663686 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1781 06:07:29.666964 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1782 06:07:29.680636 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1783 06:07:29.680727 GENERIC: 0.0
1784 06:07:29.683528 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1785 06:07:29.693401 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1786 06:07:29.706989 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1787 06:07:29.716604 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1788 06:07:29.716694 PCI: 01:00.0
1789 06:07:29.729857 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1790 06:07:29.740022 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1791 06:07:29.740115 PCI: 00:08.0
1792 06:07:29.743159 PCI: 00:0a.0
1793 06:07:29.753536 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1794 06:07:29.756798 PCI: 00:0d.0 child on link 0 USB0 port 0
1795 06:07:29.766127 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1796 06:07:29.772767 USB0 port 0 child on link 0 USB3 port 0
1797 06:07:29.772873 USB3 port 0
1798 06:07:29.776197 USB3 port 1
1799 06:07:29.776276 USB3 port 2
1800 06:07:29.779664 USB3 port 3
1801 06:07:29.782973 PCI: 00:14.0 child on link 0 USB0 port 0
1802 06:07:29.792872 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1803 06:07:29.799418 USB0 port 0 child on link 0 USB2 port 0
1804 06:07:29.799498 USB2 port 0
1805 06:07:29.803140 USB2 port 1
1806 06:07:29.803244 USB2 port 2
1807 06:07:29.806123 USB2 port 3
1808 06:07:29.806200 USB2 port 4
1809 06:07:29.809300 USB2 port 5
1810 06:07:29.809378 USB2 port 6
1811 06:07:29.812588 USB2 port 7
1812 06:07:29.812666 USB2 port 8
1813 06:07:29.816118 USB2 port 9
1814 06:07:29.816221 USB3 port 0
1815 06:07:29.819360 USB3 port 1
1816 06:07:29.823131 USB3 port 2
1817 06:07:29.823205 USB3 port 3
1818 06:07:29.825980 PCI: 00:14.2
1819 06:07:29.835980 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1820 06:07:29.845851 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1821 06:07:29.849300 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1822 06:07:29.859358 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1823 06:07:29.862543 GENERIC: 0.0
1824 06:07:29.865775 PCI: 00:15.0 child on link 0 I2C: 00:1a
1825 06:07:29.876212 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1826 06:07:29.879452 I2C: 00:1a
1827 06:07:29.879536 I2C: 00:31
1828 06:07:29.882674 I2C: 00:32
1829 06:07:29.885662 PCI: 00:15.1 child on link 0 I2C: 00:50
1830 06:07:29.895673 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1831 06:07:29.898942 I2C: 00:50
1832 06:07:29.899025 PCI: 00:15.2
1833 06:07:29.902333 PCI: 00:15.3 child on link 0 I2C: 00:10
1834 06:07:29.912197 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1835 06:07:29.915669 I2C: 00:10
1836 06:07:29.915786 PCI: 00:16.0
1837 06:07:29.928829 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1838 06:07:29.928916 PCI: 00:19.0
1839 06:07:29.932699 PCI: 00:19.1 child on link 0 I2C: 00:15
1840 06:07:29.942255 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1841 06:07:29.945677 I2C: 00:15
1842 06:07:29.945760 I2C: 00:2c
1843 06:07:29.948860 PCI: 00:1e.0
1844 06:07:29.959011 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1845 06:07:29.962389 PCI: 00:1e.3 child on link 0 SPI: 00
1846 06:07:29.975334 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1847 06:07:29.975421 SPI: 00
1848 06:07:29.978679 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1849 06:07:29.988825 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1850 06:07:29.988909 PNP: 0c09.0
1851 06:07:29.998947 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1852 06:07:30.002210 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1853 06:07:30.011983 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1854 06:07:30.021914 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1855 06:07:30.025367 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1856 06:07:30.028903 GENERIC: 0.0
1857 06:07:30.028988 GENERIC: 1.0
1858 06:07:30.032093 PCI: 00:1f.3
1859 06:07:30.041847 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1860 06:07:30.051978 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1861 06:07:30.055047 PCI: 00:1f.5
1862 06:07:30.065191 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1863 06:07:30.068382 Done allocating resources.
1864 06:07:30.075077 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1865 06:07:30.078219 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1866 06:07:30.084810 Configure audio over I2S with MAX98373 NAU88L25B.
1867 06:07:30.088527 Enabling BT offload
1868 06:07:30.095575 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1869 06:07:30.098893 Enabling resources...
1870 06:07:30.102109 PCI: 00:00.0 subsystem <- 8086/4609
1871 06:07:30.105786 PCI: 00:00.0 cmd <- 06
1872 06:07:30.108875 PCI: 00:02.0 subsystem <- 8086/46b3
1873 06:07:30.112269 PCI: 00:02.0 cmd <- 03
1874 06:07:30.115490 PCI: 00:04.0 subsystem <- 8086/461d
1875 06:07:30.115573 PCI: 00:04.0 cmd <- 02
1876 06:07:30.118745 PCI: 00:06.0 bridge ctrl <- 0013
1877 06:07:30.122117 PCI: 00:06.0 subsystem <- 8086/464d
1878 06:07:30.125775 PCI: 00:06.0 cmd <- 106
1879 06:07:30.128898 PCI: 00:0a.0 subsystem <- 8086/467d
1880 06:07:30.131969 PCI: 00:0a.0 cmd <- 02
1881 06:07:30.135421 PCI: 00:0d.0 subsystem <- 8086/461e
1882 06:07:30.138912 PCI: 00:0d.0 cmd <- 02
1883 06:07:30.141918 PCI: 00:14.0 subsystem <- 8086/51ed
1884 06:07:30.145252 PCI: 00:14.0 cmd <- 02
1885 06:07:30.148585 PCI: 00:14.2 subsystem <- 8086/51ef
1886 06:07:30.148669 PCI: 00:14.2 cmd <- 02
1887 06:07:30.155264 PCI: 00:14.3 subsystem <- 8086/51f0
1888 06:07:30.155355 PCI: 00:14.3 cmd <- 02
1889 06:07:30.158589 PCI: 00:15.0 subsystem <- 8086/51e8
1890 06:07:30.161903 PCI: 00:15.0 cmd <- 02
1891 06:07:30.165386 PCI: 00:15.1 subsystem <- 8086/51e9
1892 06:07:30.168579 PCI: 00:15.1 cmd <- 06
1893 06:07:30.171779 PCI: 00:15.3 subsystem <- 8086/51eb
1894 06:07:30.175470 PCI: 00:15.3 cmd <- 02
1895 06:07:30.178421 PCI: 00:16.0 subsystem <- 8086/51e0
1896 06:07:30.178504 PCI: 00:16.0 cmd <- 02
1897 06:07:30.185361 PCI: 00:19.1 subsystem <- 8086/51c6
1898 06:07:30.185441 PCI: 00:19.1 cmd <- 02
1899 06:07:30.188587 PCI: 00:1e.0 subsystem <- 8086/51a8
1900 06:07:30.191994 PCI: 00:1e.0 cmd <- 06
1901 06:07:30.195506 PCI: 00:1e.3 subsystem <- 8086/51ab
1902 06:07:30.198661 PCI: 00:1e.3 cmd <- 02
1903 06:07:30.201829 PCI: 00:1f.0 subsystem <- 8086/5182
1904 06:07:30.205469 PCI: 00:1f.0 cmd <- 407
1905 06:07:30.208728 PCI: 00:1f.3 subsystem <- 8086/51c8
1906 06:07:30.208828 PCI: 00:1f.3 cmd <- 02
1907 06:07:30.215097 PCI: 00:1f.5 subsystem <- 8086/51a4
1908 06:07:30.215200 PCI: 00:1f.5 cmd <- 406
1909 06:07:30.218482 PCI: 01:00.0 cmd <- 02
1910 06:07:30.218557 done.
1911 06:07:30.225177 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1912 06:07:30.228407 ME: Version: Unavailable
1913 06:07:30.231939 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1914 06:07:30.234947 Initializing devices...
1915 06:07:30.238211 Root Device init
1916 06:07:30.238285 mainboard: EC init
1917 06:07:30.244924 Chrome EC: Set SMI mask to 0x0000000000000000
1918 06:07:30.248303 Chrome EC: UHEPI supported
1919 06:07:30.255080 Chrome EC: clear events_b mask to 0x0000000000000000
1920 06:07:30.258393 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1921 06:07:30.265421 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1922 06:07:30.272125 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1923 06:07:30.278595 Chrome EC: Set WAKE mask to 0x0000000000000000
1924 06:07:30.282299 Root Device init finished in 42 msecs
1925 06:07:30.285361 PCI: 00:00.0 init
1926 06:07:30.289062 CPU TDP = 15 Watts
1927 06:07:30.289178 CPU PL1 = 15 Watts
1928 06:07:30.292379 CPU PL2 = 55 Watts
1929 06:07:30.295798 CPU PL4 = 123 Watts
1930 06:07:30.298916 PCI: 00:00.0 init finished in 8 msecs
1931 06:07:30.298999 PCI: 00:02.0 init
1932 06:07:30.302239 GMA: Found VBT in CBFS
1933 06:07:30.305436 GMA: Found valid VBT in CBFS
1934 06:07:30.312277 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1935 06:07:30.318822 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1936 06:07:30.322057 PCI: 00:02.0 init finished in 18 msecs
1937 06:07:30.325406 PCI: 00:06.0 init
1938 06:07:30.328999 Initializing PCH PCIe bridge.
1939 06:07:30.331942 PCI: 00:06.0 init finished in 3 msecs
1940 06:07:30.332025 PCI: 00:0a.0 init
1941 06:07:30.335451 PCI: 00:0a.0 init finished in 0 msecs
1942 06:07:30.338582 PCI: 00:14.0 init
1943 06:07:30.342194 PCI: 00:14.0 init finished in 0 msecs
1944 06:07:30.345286 PCI: 00:14.2 init
1945 06:07:30.348635 PCI: 00:14.2 init finished in 0 msecs
1946 06:07:30.348719 PCI: 00:15.0 init
1947 06:07:30.351941 I2C bus 0 version 0x3230302a
1948 06:07:30.355415 DW I2C bus 0 at 0x80655000 (400 KHz)
1949 06:07:30.361974 PCI: 00:15.0 init finished in 6 msecs
1950 06:07:30.362059 PCI: 00:15.1 init
1951 06:07:30.365283 I2C bus 1 version 0x3230302a
1952 06:07:30.368616 DW I2C bus 1 at 0x80656000 (400 KHz)
1953 06:07:30.371944 PCI: 00:15.1 init finished in 6 msecs
1954 06:07:30.375211 PCI: 00:15.3 init
1955 06:07:30.378529 I2C bus 3 version 0x3230302a
1956 06:07:30.382131 DW I2C bus 3 at 0x80657000 (400 KHz)
1957 06:07:30.385329 PCI: 00:15.3 init finished in 6 msecs
1958 06:07:30.388509 PCI: 00:16.0 init
1959 06:07:30.391773 PCI: 00:16.0 init finished in 0 msecs
1960 06:07:30.391861 PCI: 00:19.1 init
1961 06:07:30.395414 I2C bus 5 version 0x3230302a
1962 06:07:30.398714 DW I2C bus 5 at 0x80659000 (400 KHz)
1963 06:07:30.401933 PCI: 00:19.1 init finished in 6 msecs
1964 06:07:30.405282 PCI: 00:1f.0 init
1965 06:07:30.408612 IOAPIC: Initializing IOAPIC at 0xfec00000
1966 06:07:30.411963 IOAPIC: ID = 0x02
1967 06:07:30.415106 IOAPIC: Dumping registers
1968 06:07:30.415208 reg 0x0000: 0x02000000
1969 06:07:30.418421 reg 0x0001: 0x00770020
1970 06:07:30.421798 reg 0x0002: 0x00000000
1971 06:07:30.425372 IOAPIC: 120 interrupts
1972 06:07:30.428517 IOAPIC: Clearing IOAPIC at 0xfec00000
1973 06:07:30.431661 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1974 06:07:30.438620 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1975 06:07:30.441951 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1976 06:07:30.448230 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1977 06:07:30.451361 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1978 06:07:30.455301 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1979 06:07:30.461731 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1980 06:07:30.464884 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1981 06:07:30.471522 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1982 06:07:30.475013 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1983 06:07:30.481739 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1984 06:07:30.485133 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1985 06:07:30.491605 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1986 06:07:30.495009 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1987 06:07:30.498238 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1988 06:07:30.504847 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1989 06:07:30.508033 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1990 06:07:30.514706 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1991 06:07:30.518139 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1992 06:07:30.524700 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1993 06:07:30.527869 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1994 06:07:30.534777 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1995 06:07:30.538250 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1996 06:07:30.541282 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1997 06:07:30.547881 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1998 06:07:30.551115 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1999 06:07:30.557750 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2000 06:07:30.561278 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2001 06:07:30.568177 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2002 06:07:30.571176 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2003 06:07:30.574408 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2004 06:07:30.581180 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2005 06:07:30.584815 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2006 06:07:30.591194 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2007 06:07:30.594380 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2008 06:07:30.600969 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2009 06:07:30.604211 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2010 06:07:30.611078 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2011 06:07:30.614189 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2012 06:07:30.617624 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2013 06:07:30.624447 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2014 06:07:30.627414 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2015 06:07:30.634274 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2016 06:07:30.637431 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2017 06:07:30.644068 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2018 06:07:30.647409 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2019 06:07:30.654071 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2020 06:07:30.657640 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2021 06:07:30.660685 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2022 06:07:30.667401 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2023 06:07:30.670835 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2024 06:07:30.677360 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2025 06:07:30.680702 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2026 06:07:30.687496 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2027 06:07:30.690966 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2028 06:07:30.697269 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2029 06:07:30.700862 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2030 06:07:30.704360 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2031 06:07:30.710952 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2032 06:07:30.713953 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2033 06:07:30.720498 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2034 06:07:30.724156 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2035 06:07:30.730678 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2036 06:07:30.733892 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2037 06:07:30.740779 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2038 06:07:30.744224 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2039 06:07:30.747335 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2040 06:07:30.753877 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2041 06:07:30.757512 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2042 06:07:30.764012 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2043 06:07:30.767175 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2044 06:07:30.773997 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2045 06:07:30.777058 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2046 06:07:30.780552 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2047 06:07:30.787391 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2048 06:07:30.790506 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2049 06:07:30.797272 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2050 06:07:30.800574 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2051 06:07:30.807054 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2052 06:07:30.810396 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2053 06:07:30.817083 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2054 06:07:30.820358 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2055 06:07:30.823936 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2056 06:07:30.830498 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2057 06:07:30.833893 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2058 06:07:30.840283 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2059 06:07:30.843956 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2060 06:07:30.850117 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2061 06:07:30.853599 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2062 06:07:30.860275 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2063 06:07:30.863608 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2064 06:07:30.866918 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2065 06:07:30.873577 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2066 06:07:30.876718 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2067 06:07:30.883474 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2068 06:07:30.886917 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2069 06:07:30.893292 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2070 06:07:30.896931 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2071 06:07:30.903154 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2072 06:07:30.906744 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2073 06:07:30.909890 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2074 06:07:30.916638 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2075 06:07:30.919756 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2076 06:07:30.926581 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2077 06:07:30.929738 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2078 06:07:30.936588 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2079 06:07:30.939837 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2080 06:07:30.946421 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2081 06:07:30.949585 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2082 06:07:30.953191 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2083 06:07:30.959525 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2084 06:07:30.962946 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2085 06:07:30.969399 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2086 06:07:30.972937 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2087 06:07:30.979559 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2088 06:07:30.982705 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2089 06:07:30.989628 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2090 06:07:30.992813 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2091 06:07:30.996164 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2092 06:07:31.002740 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2093 06:07:31.006539 IOAPIC: Bootstrap Processor Local APIC = 0x00
2094 06:07:31.012593 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2095 06:07:31.016400 PCI: 00:1f.0 init finished in 607 msecs
2096 06:07:31.019335 PCI: 00:1f.2 init
2097 06:07:31.019409 apm_control: Disabling ACPI.
2098 06:07:31.025609 APMC done.
2099 06:07:31.028893 PCI: 00:1f.2 init finished in 6 msecs
2100 06:07:31.032094 PCI: 00:1f.3 init
2101 06:07:31.035356 PCI: 00:1f.3 init finished in 0 msecs
2102 06:07:31.035432 PCI: 01:00.0 init
2103 06:07:31.039159 PCI: 01:00.0 init finished in 0 msecs
2104 06:07:31.042435 PNP: 0c09.0 init
2105 06:07:31.045491 Google Chrome EC uptime: 12.222 seconds
2106 06:07:31.051962 Google Chrome AP resets since EC boot: 1
2107 06:07:31.055752 Google Chrome most recent AP reset causes:
2108 06:07:31.058922 0.343: 32775 shutdown: entering G3
2109 06:07:31.065302 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2110 06:07:31.068815 PNP: 0c09.0 init finished in 23 msecs
2111 06:07:31.072347 GENERIC: 0.0 init
2112 06:07:31.075352 GENERIC: 0.0 init finished in 0 msecs
2113 06:07:31.075428 GENERIC: 1.0 init
2114 06:07:31.078753 GENERIC: 1.0 init finished in 0 msecs
2115 06:07:31.082215 Devices initialized
2116 06:07:31.085534 Show all devs... After init.
2117 06:07:31.088848 Root Device: enabled 1
2118 06:07:31.088925 CPU_CLUSTER: 0: enabled 1
2119 06:07:31.092010 DOMAIN: 0000: enabled 1
2120 06:07:31.095244 GPIO: 0: enabled 1
2121 06:07:31.098782 PCI: 00:00.0: enabled 1
2122 06:07:31.098855 PCI: 00:01.0: enabled 0
2123 06:07:31.101865 PCI: 00:01.1: enabled 0
2124 06:07:31.105567 PCI: 00:02.0: enabled 1
2125 06:07:31.105654 PCI: 00:04.0: enabled 1
2126 06:07:31.108680 PCI: 00:05.0: enabled 0
2127 06:07:31.112107 PCI: 00:06.0: enabled 1
2128 06:07:31.115326 PCI: 00:06.2: enabled 0
2129 06:07:31.115402 PCI: 00:07.0: enabled 0
2130 06:07:31.118429 PCI: 00:07.1: enabled 0
2131 06:07:31.121921 PCI: 00:07.2: enabled 0
2132 06:07:31.125185 PCI: 00:07.3: enabled 0
2133 06:07:31.125258 PCI: 00:08.0: enabled 0
2134 06:07:31.128899 PCI: 00:09.0: enabled 0
2135 06:07:31.132106 PCI: 00:0a.0: enabled 1
2136 06:07:31.135055 PCI: 00:0d.0: enabled 1
2137 06:07:31.135126 PCI: 00:0d.1: enabled 0
2138 06:07:31.138409 PCI: 00:0d.2: enabled 0
2139 06:07:31.142015 PCI: 00:0d.3: enabled 0
2140 06:07:31.145439 PCI: 00:0e.0: enabled 0
2141 06:07:31.145511 PCI: 00:10.0: enabled 0
2142 06:07:31.148765 PCI: 00:10.1: enabled 0
2143 06:07:31.151747 PCI: 00:10.6: enabled 0
2144 06:07:31.151824 PCI: 00:10.7: enabled 0
2145 06:07:31.155446 PCI: 00:12.0: enabled 0
2146 06:07:31.158284 PCI: 00:12.6: enabled 0
2147 06:07:31.161775 PCI: 00:12.7: enabled 0
2148 06:07:31.161850 PCI: 00:13.0: enabled 0
2149 06:07:31.165042 PCI: 00:14.0: enabled 1
2150 06:07:31.168384 PCI: 00:14.1: enabled 0
2151 06:07:31.171599 PCI: 00:14.2: enabled 1
2152 06:07:31.171701 PCI: 00:14.3: enabled 1
2153 06:07:31.175315 PCI: 00:15.0: enabled 1
2154 06:07:31.178319 PCI: 00:15.1: enabled 1
2155 06:07:31.181623 PCI: 00:15.2: enabled 0
2156 06:07:31.181701 PCI: 00:15.3: enabled 1
2157 06:07:31.185292 PCI: 00:16.0: enabled 1
2158 06:07:31.188490 PCI: 00:16.1: enabled 0
2159 06:07:31.188567 PCI: 00:16.2: enabled 0
2160 06:07:31.191706 PCI: 00:16.3: enabled 0
2161 06:07:31.195240 PCI: 00:16.4: enabled 0
2162 06:07:31.198107 PCI: 00:16.5: enabled 0
2163 06:07:31.198181 PCI: 00:17.0: enabled 0
2164 06:07:31.201715 PCI: 00:19.0: enabled 0
2165 06:07:31.204890 PCI: 00:19.1: enabled 1
2166 06:07:31.208614 PCI: 00:19.2: enabled 0
2167 06:07:31.208686 PCI: 00:1a.0: enabled 0
2168 06:07:31.211760 PCI: 00:1c.0: enabled 0
2169 06:07:31.214700 PCI: 00:1c.1: enabled 0
2170 06:07:31.218393 PCI: 00:1c.2: enabled 0
2171 06:07:31.218482 PCI: 00:1c.3: enabled 0
2172 06:07:31.221497 PCI: 00:1c.4: enabled 0
2173 06:07:31.224693 PCI: 00:1c.5: enabled 0
2174 06:07:31.228224 PCI: 00:1c.6: enabled 0
2175 06:07:31.228305 PCI: 00:1c.7: enabled 0
2176 06:07:31.231601 PCI: 00:1d.0: enabled 0
2177 06:07:31.234866 PCI: 00:1d.1: enabled 0
2178 06:07:31.234948 PCI: 00:1d.2: enabled 0
2179 06:07:31.238326 PCI: 00:1d.3: enabled 0
2180 06:07:31.241235 PCI: 00:1e.0: enabled 1
2181 06:07:31.244655 PCI: 00:1e.1: enabled 0
2182 06:07:31.244736 PCI: 00:1e.2: enabled 0
2183 06:07:31.248336 PCI: 00:1e.3: enabled 1
2184 06:07:31.251213 PCI: 00:1f.0: enabled 1
2185 06:07:31.254643 PCI: 00:1f.1: enabled 0
2186 06:07:31.254725 PCI: 00:1f.2: enabled 1
2187 06:07:31.258233 PCI: 00:1f.3: enabled 1
2188 06:07:31.261426 PCI: 00:1f.4: enabled 0
2189 06:07:31.264708 PCI: 00:1f.5: enabled 1
2190 06:07:31.264790 PCI: 00:1f.6: enabled 0
2191 06:07:31.268265 PCI: 00:1f.7: enabled 0
2192 06:07:31.271648 GENERIC: 0.0: enabled 1
2193 06:07:31.274837 GENERIC: 0.0: enabled 1
2194 06:07:31.274919 GENERIC: 1.0: enabled 1
2195 06:07:31.277806 GENERIC: 0.0: enabled 1
2196 06:07:31.281127 GENERIC: 1.0: enabled 1
2197 06:07:31.281208 USB0 port 0: enabled 1
2198 06:07:31.284859 USB0 port 0: enabled 1
2199 06:07:31.287806 GENERIC: 0.0: enabled 1
2200 06:07:31.291341 I2C: 00:1a: enabled 1
2201 06:07:31.291423 I2C: 00:31: enabled 1
2202 06:07:31.294589 I2C: 00:32: enabled 1
2203 06:07:31.298018 I2C: 00:50: enabled 1
2204 06:07:31.298101 I2C: 00:10: enabled 1
2205 06:07:31.301377 I2C: 00:15: enabled 1
2206 06:07:31.304540 I2C: 00:2c: enabled 1
2207 06:07:31.304650 GENERIC: 0.0: enabled 1
2208 06:07:31.308228 SPI: 00: enabled 1
2209 06:07:31.311235 PNP: 0c09.0: enabled 1
2210 06:07:31.311351 GENERIC: 0.0: enabled 1
2211 06:07:31.314422 USB3 port 0: enabled 1
2212 06:07:31.317899 USB3 port 1: enabled 0
2213 06:07:31.317982 USB3 port 2: enabled 1
2214 06:07:31.321230 USB3 port 3: enabled 0
2215 06:07:31.324495 USB2 port 0: enabled 1
2216 06:07:31.327640 USB2 port 1: enabled 0
2217 06:07:31.327723 USB2 port 2: enabled 1
2218 06:07:31.331171 USB2 port 3: enabled 0
2219 06:07:31.334674 USB2 port 4: enabled 0
2220 06:07:31.334756 USB2 port 5: enabled 1
2221 06:07:31.337711 USB2 port 6: enabled 0
2222 06:07:31.341007 USB2 port 7: enabled 0
2223 06:07:31.344409 USB2 port 8: enabled 1
2224 06:07:31.344491 USB2 port 9: enabled 1
2225 06:07:31.347965 USB3 port 0: enabled 1
2226 06:07:31.351145 USB3 port 1: enabled 0
2227 06:07:31.351274 USB3 port 2: enabled 0
2228 06:07:31.354254 USB3 port 3: enabled 0
2229 06:07:31.357792 GENERIC: 0.0: enabled 1
2230 06:07:31.361115 GENERIC: 1.0: enabled 1
2231 06:07:31.361199 APIC: 00: enabled 1
2232 06:07:31.364518 APIC: 16: enabled 1
2233 06:07:31.364600 APIC: 10: enabled 1
2234 06:07:31.367829 APIC: 14: enabled 1
2235 06:07:31.371164 APIC: 12: enabled 1
2236 06:07:31.371307 APIC: 09: enabled 1
2237 06:07:31.374459 APIC: 01: enabled 1
2238 06:07:31.374552 APIC: 08: enabled 1
2239 06:07:31.377616 PCI: 01:00.0: enabled 1
2240 06:07:31.384323 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2241 06:07:31.387960 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2242 06:07:31.391203 ELOG: NV offset 0xf20000 size 0x4000
2243 06:07:31.399335 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2244 06:07:31.406287 ELOG: Event(17) added with size 13 at 2023-07-04 06:07:31 UTC
2245 06:07:31.412834 ELOG: Event(9E) added with size 10 at 2023-07-04 06:07:31 UTC
2246 06:07:31.419426 ELOG: Event(9F) added with size 14 at 2023-07-04 06:07:31 UTC
2247 06:07:31.426175 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2248 06:07:31.432691 ELOG: Event(A0) added with size 9 at 2023-07-04 06:07:31 UTC
2249 06:07:31.435909 elog_add_boot_reason: Logged dev mode boot
2250 06:07:31.442483 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2251 06:07:31.446176 Finalize devices...
2252 06:07:31.446250 PCI: 00:16.0 final
2253 06:07:31.449350 PCI: 00:1f.2 final
2254 06:07:31.449426 GENERIC: 0.0 final
2255 06:07:31.456061 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2256 06:07:31.459199 GENERIC: 1.0 final
2257 06:07:31.465857 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2258 06:07:31.465938 Devices finalized
2259 06:07:31.472481 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2260 06:07:31.475689 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2261 06:07:31.482665 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2262 06:07:31.489444 ME: HFSTS1 : 0x90000245
2263 06:07:31.492636 ME: HFSTS2 : 0x82100116
2264 06:07:31.495818 ME: HFSTS3 : 0x00000050
2265 06:07:31.502320 ME: HFSTS4 : 0x00004000
2266 06:07:31.505723 ME: HFSTS5 : 0x00000000
2267 06:07:31.509117 ME: HFSTS6 : 0x40600006
2268 06:07:31.512364 ME: Manufacturing Mode : NO
2269 06:07:31.518828 ME: SPI Protection Mode Enabled : YES
2270 06:07:31.522072 ME: FPFs Committed : YES
2271 06:07:31.525396 ME: Manufacturing Vars Locked : YES
2272 06:07:31.529080 ME: FW Partition Table : OK
2273 06:07:31.532178 ME: Bringup Loader Failure : NO
2274 06:07:31.535855 ME: Firmware Init Complete : YES
2275 06:07:31.538697 ME: Boot Options Present : NO
2276 06:07:31.542054 ME: Update In Progress : NO
2277 06:07:31.549191 ME: D0i3 Support : YES
2278 06:07:31.552328 ME: Low Power State Enabled : NO
2279 06:07:31.555176 ME: CPU Replaced : YES
2280 06:07:31.558923 ME: CPU Replacement Valid : YES
2281 06:07:31.562185 ME: Current Working State : 5
2282 06:07:31.565406 ME: Current Operation State : 1
2283 06:07:31.568642 ME: Current Operation Mode : 0
2284 06:07:31.572213 ME: Error Code : 0
2285 06:07:31.575423 ME: Enhanced Debug Mode : NO
2286 06:07:31.581931 ME: CPU Debug Disabled : YES
2287 06:07:31.585197 ME: TXT Support : NO
2288 06:07:31.588661 ME: WP for RO is enabled : YES
2289 06:07:31.595148 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2290 06:07:31.602127 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2291 06:07:31.604893 Ramoops buffer: 0x100000@0x76899000.
2292 06:07:31.608276 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2293 06:07:31.618750 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2294 06:07:31.621720 CBFS: 'fallback/slic' not found.
2295 06:07:31.624980 ACPI: Writing ACPI tables at 7686d000.
2296 06:07:31.625060 ACPI: * FACS
2297 06:07:31.628514 ACPI: * DSDT
2298 06:07:31.634890 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2299 06:07:31.638252 ACPI: * FADT
2300 06:07:31.638353 SCI is IRQ9
2301 06:07:31.644782 ACPI: added table 1/32, length now 40
2302 06:07:31.644868 ACPI: * SSDT
2303 06:07:31.651422 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2304 06:07:31.654538 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2305 06:07:31.661260 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2306 06:07:31.664822 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2307 06:07:31.671449 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2308 06:07:31.674380 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2309 06:07:31.681189 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2310 06:07:31.687824 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2311 06:07:31.690981 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2312 06:07:31.697790 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2313 06:07:31.701055 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2314 06:07:31.707876 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2315 06:07:31.711101 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2316 06:07:31.717739 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2317 06:07:31.725450 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2318 06:07:31.728541 PS2K: Passing 80 keymaps to kernel
2319 06:07:31.735399 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2320 06:07:31.742098 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2321 06:07:31.748220 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2322 06:07:31.755378 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2323 06:07:31.761824 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2324 06:07:31.768331 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2325 06:07:31.771606 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2326 06:07:31.778256 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2327 06:07:31.784844 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2328 06:07:31.791501 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2329 06:07:31.794767 ACPI: added table 2/32, length now 44
2330 06:07:31.798066 ACPI: * MCFG
2331 06:07:31.801870 ACPI: added table 3/32, length now 48
2332 06:07:31.801970 ACPI: * TPM2
2333 06:07:31.805246 TPM2 log created at 0x7685d000
2334 06:07:31.811332 ACPI: added table 4/32, length now 52
2335 06:07:31.811411 ACPI: * LPIT
2336 06:07:31.814865 ACPI: added table 5/32, length now 56
2337 06:07:31.818220 ACPI: * MADT
2338 06:07:31.818292 SCI is IRQ9
2339 06:07:31.821240 ACPI: added table 6/32, length now 60
2340 06:07:31.824930 cmd_reg from pmc_make_ipc_cmd 1052838
2341 06:07:31.831543 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2342 06:07:31.838362 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2343 06:07:31.844918 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2344 06:07:31.847962 PMC CrashLog size in discovery mode: 0xC00
2345 06:07:31.851315 cpu crashlog bar addr: 0x80640000
2346 06:07:31.854789 cpu discovery table offset: 0x6030
2347 06:07:31.861057 cpu_crashlog_discovery_table buffer count: 0x3
2348 06:07:31.867642 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2349 06:07:31.874358 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2350 06:07:31.881211 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2351 06:07:31.884442 PMC crashLog size in discovery mode : 0xC00
2352 06:07:31.890938 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2353 06:07:31.897800 discover mode PMC crashlog size adjusted to: 0x200
2354 06:07:31.904302 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2355 06:07:31.907814 discover mode PMC crashlog size adjusted to: 0x0
2356 06:07:31.910863 m_cpu_crashLog_size : 0x3480 bytes
2357 06:07:31.914224 CPU crashLog present.
2358 06:07:31.917608 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2359 06:07:31.927762 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2360 06:07:31.927845 current = 76876550
2361 06:07:31.930756 ACPI: * DMAR
2362 06:07:31.934351 ACPI: added table 7/32, length now 64
2363 06:07:31.937405 ACPI: added table 8/32, length now 68
2364 06:07:31.937480 ACPI: * HPET
2365 06:07:31.944311 ACPI: added table 9/32, length now 72
2366 06:07:31.944390 ACPI: done.
2367 06:07:31.947618 ACPI tables: 38528 bytes.
2368 06:07:31.951256 smbios_write_tables: 76857000
2369 06:07:31.954364 EC returned error result code 3
2370 06:07:31.957955 Couldn't obtain OEM name from CBI
2371 06:07:31.960964 Create SMBIOS type 16
2372 06:07:31.961040 Create SMBIOS type 17
2373 06:07:31.964627 Create SMBIOS type 20
2374 06:07:31.967845 GENERIC: 0.0 (WIFI Device)
2375 06:07:31.970802 SMBIOS tables: 2156 bytes.
2376 06:07:31.974321 Writing table forward entry at 0x00000500
2377 06:07:31.981124 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2378 06:07:31.984433 Writing coreboot table at 0x76891000
2379 06:07:31.991129 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2380 06:07:31.994267 1. 0000000000001000-000000000009ffff: RAM
2381 06:07:32.000855 2. 00000000000a0000-00000000000fffff: RESERVED
2382 06:07:32.003746 3. 0000000000100000-0000000076856fff: RAM
2383 06:07:32.010723 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2384 06:07:32.013979 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2385 06:07:32.020462 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2386 06:07:32.023855 7. 0000000077000000-00000000803fffff: RESERVED
2387 06:07:32.030520 8. 00000000c0000000-00000000cfffffff: RESERVED
2388 06:07:32.033550 9. 00000000f8000000-00000000f9ffffff: RESERVED
2389 06:07:32.040383 10. 00000000fb000000-00000000fb000fff: RESERVED
2390 06:07:32.043517 11. 00000000fc800000-00000000fe7fffff: RESERVED
2391 06:07:32.050503 12. 00000000feb00000-00000000feb7ffff: RESERVED
2392 06:07:32.053632 13. 00000000fec00000-00000000fecfffff: RESERVED
2393 06:07:32.060248 14. 00000000fed40000-00000000fed6ffff: RESERVED
2394 06:07:32.063607 15. 00000000fed80000-00000000fed87fff: RESERVED
2395 06:07:32.066967 16. 00000000fed90000-00000000fed92fff: RESERVED
2396 06:07:32.073332 17. 00000000feda0000-00000000feda1fff: RESERVED
2397 06:07:32.076851 18. 00000000fedc0000-00000000feddffff: RESERVED
2398 06:07:32.083199 19. 0000000100000000-000000027fbfffff: RAM
2399 06:07:32.083326 Passing 4 GPIOs to payload:
2400 06:07:32.090304 NAME | PORT | POLARITY | VALUE
2401 06:07:32.096675 lid | undefined | high | high
2402 06:07:32.100201 power | undefined | high | low
2403 06:07:32.106871 oprom | undefined | high | low
2404 06:07:32.110504 EC in RW | 0x00000151 | high | high
2405 06:07:32.113633 Board ID: 3
2406 06:07:32.113716 FW config: 0x131
2407 06:07:32.120114 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 9a2e
2408 06:07:32.123353 coreboot table: 1748 bytes.
2409 06:07:32.126647 IMD ROOT 0. 0x76fff000 0x00001000
2410 06:07:32.129951 IMD SMALL 1. 0x76ffe000 0x00001000
2411 06:07:32.133698 FSP MEMORY 2. 0x76afe000 0x00500000
2412 06:07:32.139843 CONSOLE 3. 0x76ade000 0x00020000
2413 06:07:32.143142 RW MCACHE 4. 0x76add000 0x0000043c
2414 06:07:32.146782 RO MCACHE 5. 0x76adc000 0x00000fd8
2415 06:07:32.150180 FMAP 6. 0x76adb000 0x0000064a
2416 06:07:32.153486 TIME STAMP 7. 0x76ada000 0x00000910
2417 06:07:32.156642 VBOOT WORK 8. 0x76ac6000 0x00014000
2418 06:07:32.159644 MEM INFO 9. 0x76ac5000 0x000003b8
2419 06:07:32.163146 ROMSTG STCK10. 0x76ac4000 0x00001000
2420 06:07:32.169941 AFTER CAR 11. 0x76ab8000 0x0000c000
2421 06:07:32.172938 RAMSTAGE 12. 0x76a2e000 0x0008a000
2422 06:07:32.176521 ACPI BERT 13. 0x76a1e000 0x00010000
2423 06:07:32.179634 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2424 06:07:32.183236 REFCODE 15. 0x769ae000 0x0006f000
2425 06:07:32.186423 SMM BACKUP 16. 0x7699e000 0x00010000
2426 06:07:32.189835 IGD OPREGION17. 0x76999000 0x00004203
2427 06:07:32.193100 RAMOOPS 18. 0x76899000 0x00100000
2428 06:07:32.199678 COREBOOT 19. 0x76891000 0x00008000
2429 06:07:32.203062 ACPI 20. 0x7686d000 0x00024000
2430 06:07:32.206805 TPM2 TCGLOG21. 0x7685d000 0x00010000
2431 06:07:32.209607 PMC CRASHLOG22. 0x7685c000 0x00000c00
2432 06:07:32.213277 CPU CRASHLOG23. 0x76858000 0x00003480
2433 06:07:32.216402 SMBIOS 24. 0x76857000 0x00001000
2434 06:07:32.219801 IMD small region:
2435 06:07:32.223053 IMD ROOT 0. 0x76ffec00 0x00000400
2436 06:07:32.226674 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2437 06:07:32.229635 POWER STATE 2. 0x76ffeb80 0x00000044
2438 06:07:32.236689 ROMSTAGE 3. 0x76ffeb60 0x00000004
2439 06:07:32.239628 ACPI GNVS 4. 0x76ffeb00 0x00000048
2440 06:07:32.243205 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2441 06:07:32.249966 BS: BS_WRITE_TABLES run times (exec / console): 8 / 624 ms
2442 06:07:32.253043 MTRR: Physical address space:
2443 06:07:32.256295 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2444 06:07:32.263082 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2445 06:07:32.269889 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2446 06:07:32.276396 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2447 06:07:32.283052 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2448 06:07:32.289419 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2449 06:07:32.296141 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2450 06:07:32.299568 MTRR: Fixed MSR 0x250 0x0606060606060606
2451 06:07:32.302704 MTRR: Fixed MSR 0x258 0x0606060606060606
2452 06:07:32.305848 MTRR: Fixed MSR 0x259 0x0000000000000000
2453 06:07:32.312612 MTRR: Fixed MSR 0x268 0x0606060606060606
2454 06:07:32.316124 MTRR: Fixed MSR 0x269 0x0606060606060606
2455 06:07:32.319180 MTRR: Fixed MSR 0x26a 0x0606060606060606
2456 06:07:32.322805 MTRR: Fixed MSR 0x26b 0x0606060606060606
2457 06:07:32.329375 MTRR: Fixed MSR 0x26c 0x0606060606060606
2458 06:07:32.332515 MTRR: Fixed MSR 0x26d 0x0606060606060606
2459 06:07:32.335960 MTRR: Fixed MSR 0x26e 0x0606060606060606
2460 06:07:32.339092 MTRR: Fixed MSR 0x26f 0x0606060606060606
2461 06:07:32.343616 call enable_fixed_mtrr()
2462 06:07:32.346967 CPU physical address size: 39 bits
2463 06:07:32.353787 MTRR: default type WB/UC MTRR counts: 6/6.
2464 06:07:32.356737 MTRR: UC selected as default type.
2465 06:07:32.363255 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2466 06:07:32.366975 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2467 06:07:32.373263 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2468 06:07:32.379938 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2469 06:07:32.386774 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2470 06:07:32.393137 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2471 06:07:32.399680 MTRR: Fixed MSR 0x250 0x0606060606060606
2472 06:07:32.402726 MTRR: Fixed MSR 0x258 0x0606060606060606
2473 06:07:32.406137 MTRR: Fixed MSR 0x259 0x0000000000000000
2474 06:07:32.409320 MTRR: Fixed MSR 0x268 0x0606060606060606
2475 06:07:32.416133 MTRR: Fixed MSR 0x269 0x0606060606060606
2476 06:07:32.419325 MTRR: Fixed MSR 0x26a 0x0606060606060606
2477 06:07:32.422808 MTRR: Fixed MSR 0x26b 0x0606060606060606
2478 06:07:32.426056 MTRR: Fixed MSR 0x26c 0x0606060606060606
2479 06:07:32.432510 MTRR: Fixed MSR 0x26d 0x0606060606060606
2480 06:07:32.436007 MTRR: Fixed MSR 0x26e 0x0606060606060606
2481 06:07:32.439140 MTRR: Fixed MSR 0x26f 0x0606060606060606
2482 06:07:32.442388 MTRR: Fixed MSR 0x250 0x0606060606060606
2483 06:07:32.449127 MTRR: Fixed MSR 0x250 0x0606060606060606
2484 06:07:32.452574 MTRR: Fixed MSR 0x250 0x0606060606060606
2485 06:07:32.455712 MTRR: Fixed MSR 0x258 0x0606060606060606
2486 06:07:32.459448 MTRR: Fixed MSR 0x259 0x0000000000000000
2487 06:07:32.465433 MTRR: Fixed MSR 0x268 0x0606060606060606
2488 06:07:32.468818 MTRR: Fixed MSR 0x269 0x0606060606060606
2489 06:07:32.472065 MTRR: Fixed MSR 0x26a 0x0606060606060606
2490 06:07:32.475339 MTRR: Fixed MSR 0x26b 0x0606060606060606
2491 06:07:32.482332 MTRR: Fixed MSR 0x26c 0x0606060606060606
2492 06:07:32.485675 MTRR: Fixed MSR 0x26d 0x0606060606060606
2493 06:07:32.488584 MTRR: Fixed MSR 0x26e 0x0606060606060606
2494 06:07:32.492308 MTRR: Fixed MSR 0x26f 0x0606060606060606
2495 06:07:32.498528 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 06:07:32.501649 MTRR: Fixed MSR 0x258 0x0606060606060606
2497 06:07:32.505059 MTRR: Fixed MSR 0x258 0x0606060606060606
2498 06:07:32.508519 call enable_fixed_mtrr()
2499 06:07:32.511656 MTRR: Fixed MSR 0x258 0x0606060606060606
2500 06:07:32.515120 MTRR: Fixed MSR 0x259 0x0000000000000000
2501 06:07:32.521803 MTRR: Fixed MSR 0x268 0x0606060606060606
2502 06:07:32.525010 MTRR: Fixed MSR 0x269 0x0606060606060606
2503 06:07:32.528529 call enable_fixed_mtrr()
2504 06:07:32.531802 MTRR: Fixed MSR 0x259 0x0000000000000000
2505 06:07:32.534895 MTRR: Fixed MSR 0x268 0x0606060606060606
2506 06:07:32.538394 MTRR: Fixed MSR 0x269 0x0606060606060606
2507 06:07:32.544908 MTRR: Fixed MSR 0x26a 0x0606060606060606
2508 06:07:32.548548 MTRR: Fixed MSR 0x26b 0x0606060606060606
2509 06:07:32.551565 MTRR: Fixed MSR 0x26c 0x0606060606060606
2510 06:07:32.554759 MTRR: Fixed MSR 0x26d 0x0606060606060606
2511 06:07:32.558155 MTRR: Fixed MSR 0x26e 0x0606060606060606
2512 06:07:32.564705 MTRR: Fixed MSR 0x26f 0x0606060606060606
2513 06:07:32.568202 MTRR: Fixed MSR 0x26a 0x0606060606060606
2514 06:07:32.571249 call enable_fixed_mtrr()
2515 06:07:32.574712 MTRR: Fixed MSR 0x250 0x0606060606060606
2516 06:07:32.578374 CPU physical address size: 39 bits
2517 06:07:32.581647 MTRR: Fixed MSR 0x258 0x0606060606060606
2518 06:07:32.584558 MTRR: Fixed MSR 0x250 0x0606060606060606
2519 06:07:32.591386 MTRR: Fixed MSR 0x259 0x0000000000000000
2520 06:07:32.594755 MTRR: Fixed MSR 0x268 0x0606060606060606
2521 06:07:32.597861 MTRR: Fixed MSR 0x269 0x0606060606060606
2522 06:07:32.601224 MTRR: Fixed MSR 0x259 0x0000000000000000
2523 06:07:32.608012 MTRR: Fixed MSR 0x26b 0x0606060606060606
2524 06:07:32.611473 MTRR: Fixed MSR 0x268 0x0606060606060606
2525 06:07:32.614628 MTRR: Fixed MSR 0x269 0x0606060606060606
2526 06:07:32.617845 MTRR: Fixed MSR 0x26a 0x0606060606060606
2527 06:07:32.624335 MTRR: Fixed MSR 0x26b 0x0606060606060606
2528 06:07:32.627798 MTRR: Fixed MSR 0x26c 0x0606060606060606
2529 06:07:32.631051 MTRR: Fixed MSR 0x26d 0x0606060606060606
2530 06:07:32.634461 MTRR: Fixed MSR 0x26e 0x0606060606060606
2531 06:07:32.640921 MTRR: Fixed MSR 0x26f 0x0606060606060606
2532 06:07:32.644347 MTRR: Fixed MSR 0x26c 0x0606060606060606
2533 06:07:32.647736 call enable_fixed_mtrr()
2534 06:07:32.650891 MTRR: Fixed MSR 0x258 0x0606060606060606
2535 06:07:32.654236 MTRR: Fixed MSR 0x26d 0x0606060606060606
2536 06:07:32.657823 MTRR: Fixed MSR 0x26e 0x0606060606060606
2537 06:07:32.660996 MTRR: Fixed MSR 0x26f 0x0606060606060606
2538 06:07:32.667743 CPU physical address size: 39 bits
2539 06:07:32.667830 call enable_fixed_mtrr()
2540 06:07:32.670853 CPU physical address size: 39 bits
2541 06:07:32.674074 CPU physical address size: 39 bits
2542 06:07:32.677460 CPU physical address size: 39 bits
2543 06:07:32.684085 MTRR: Fixed MSR 0x259 0x0000000000000000
2544 06:07:32.687335 MTRR: Fixed MSR 0x268 0x0606060606060606
2545 06:07:32.690967 MTRR: Fixed MSR 0x269 0x0606060606060606
2546 06:07:32.694324 MTRR: Fixed MSR 0x26a 0x0606060606060606
2547 06:07:32.700825 MTRR: Fixed MSR 0x26b 0x0606060606060606
2548 06:07:32.704403 MTRR: Fixed MSR 0x26c 0x0606060606060606
2549 06:07:32.707693 MTRR: Fixed MSR 0x26d 0x0606060606060606
2550 06:07:32.710939 MTRR: Fixed MSR 0x26e 0x0606060606060606
2551 06:07:32.717469 MTRR: Fixed MSR 0x26f 0x0606060606060606
2552 06:07:32.720620 MTRR: Fixed MSR 0x26a 0x0606060606060606
2553 06:07:32.723827 call enable_fixed_mtrr()
2554 06:07:32.727445 MTRR: Fixed MSR 0x26b 0x0606060606060606
2555 06:07:32.730605 MTRR: Fixed MSR 0x26c 0x0606060606060606
2556 06:07:32.733872 MTRR: Fixed MSR 0x26d 0x0606060606060606
2557 06:07:32.740625 MTRR: Fixed MSR 0x26e 0x0606060606060606
2558 06:07:32.743808 MTRR: Fixed MSR 0x26f 0x0606060606060606
2559 06:07:32.747191 CPU physical address size: 39 bits
2560 06:07:32.751099 call enable_fixed_mtrr()
2561 06:07:32.754263 CPU physical address size: 39 bits
2562 06:07:32.758100
2563 06:07:32.758183 MTRR check
2564 06:07:32.761206 Fixed MTRRs : Enabled
2565 06:07:32.761292 Variable MTRRs: Enabled
2566 06:07:32.761357
2567 06:07:32.768058 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2568 06:07:32.771238 Checking cr50 for pending updates
2569 06:07:32.783255 Reading cr50 TPM mode
2570 06:07:32.798840 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2571 06:07:32.808943 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2572 06:07:32.811996 Checking segment from ROM address 0xf96cbe6c
2573 06:07:32.815399 Checking segment from ROM address 0xf96cbe88
2574 06:07:32.821916 Loading segment from ROM address 0xf96cbe6c
2575 06:07:32.821999 code (compression=1)
2576 06:07:32.831775 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2577 06:07:32.838403 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2578 06:07:32.841952 using LZMA
2579 06:07:32.863668 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2580 06:07:32.870621 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2581 06:07:32.878733 Loading segment from ROM address 0xf96cbe88
2582 06:07:32.881639 Entry Point 0x30000000
2583 06:07:32.881723 Loaded segments
2584 06:07:32.888315 BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms
2585 06:07:32.895169 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2586 06:07:32.898364 Finalizing chipset.
2587 06:07:32.898448 apm_control: Finalizing SMM.
2588 06:07:32.902096 APMC done.
2589 06:07:32.905188 HECI: CSE device 16.1 is disabled
2590 06:07:32.908391 HECI: CSE device 16.2 is disabled
2591 06:07:32.911655 HECI: CSE device 16.3 is disabled
2592 06:07:32.915358 HECI: CSE device 16.4 is disabled
2593 06:07:32.918508 HECI: CSE device 16.5 is disabled
2594 06:07:32.921590 HECI: Sending End-of-Post
2595 06:07:32.929991 CSE: EOP requested action: continue boot
2596 06:07:32.933407 CSE EOP successful, continuing boot
2597 06:07:32.939894 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2598 06:07:32.943211 mp_park_aps done after 0 msecs.
2599 06:07:32.946319 Jumping to boot code at 0x30000000(0x76891000)
2600 06:07:32.956443 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2601 06:07:32.960864
2602 06:07:32.960948
2603 06:07:32.961013
2604 06:07:32.964240 Starting depthcharge on Volmar...
2605 06:07:32.964323
2606 06:07:32.964796 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2607 06:07:32.964897 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2608 06:07:32.964977 Setting prompt string to ['brya:']
2609 06:07:32.965054 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2610 06:07:32.970972 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2611 06:07:32.971057
2612 06:07:32.977435 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2613 06:07:32.977518
2614 06:07:32.984029 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2615 06:07:32.984113
2616 06:07:32.987176 configure_storage: Failed to remap 1C:2
2617 06:07:32.987294
2618 06:07:32.990407 Wipe memory regions:
2619 06:07:32.990489
2620 06:07:32.994083 [0x00000000001000, 0x000000000a0000)
2621 06:07:32.994166
2622 06:07:32.997314 [0x00000000100000, 0x00000030000000)
2623 06:07:33.104641
2624 06:07:33.107909 [0x00000032668e60, 0x00000076857000)
2625 06:07:33.258664
2626 06:07:33.261876 [0x00000100000000, 0x0000027fc00000)
2627 06:07:34.106898
2628 06:07:34.109556 ec_init: CrosEC protocol v3 supported (256, 256)
2629 06:07:34.720003
2630 06:07:34.720139 R8152: Initializing
2631 06:07:34.720209
2632 06:07:34.723183 Version 9 (ocp_data = 6010)
2633 06:07:34.723302
2634 06:07:34.726330 R8152: Done initializing
2635 06:07:34.726413
2636 06:07:34.729274 Adding net device
2637 06:07:35.030432
2638 06:07:35.033579 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2639 06:07:35.033666
2640 06:07:35.033732
2641 06:07:35.033792
2642 06:07:35.034066 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2644 06:07:35.134410 brya: tftpboot 192.168.201.1 11005047/tftp-deploy-686qzrn6/kernel/bzImage 11005047/tftp-deploy-686qzrn6/kernel/cmdline 11005047/tftp-deploy-686qzrn6/ramdisk/ramdisk.cpio.gz
2645 06:07:35.134570 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2646 06:07:35.134658 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2647 06:07:35.138969 tftpboot 192.168.201.1 11005047/tftp-deploy-686qzrn6/kernel/bzIploy-686qzrn6/kernel/cmdline 11005047/tftp-deploy-686qzrn6/ramdisk/ramdisk.cpio.gz
2648 06:07:35.139057
2649 06:07:35.139123 Waiting for link
2650 06:07:35.342842
2651 06:07:35.342975 done.
2652 06:07:35.343042
2653 06:07:35.343105 MAC: 00:e0:4c:68:05:70
2654 06:07:35.343165
2655 06:07:35.346214 Sending DHCP discover... done.
2656 06:07:35.346299
2657 06:07:35.349430 Waiting for reply... done.
2658 06:07:35.349513
2659 06:07:35.352668 Sending DHCP request... done.
2660 06:07:35.352751
2661 06:07:35.355954 Waiting for reply... done.
2662 06:07:35.356038
2663 06:07:35.359143 My ip is 192.168.201.16
2664 06:07:35.359260
2665 06:07:35.362766 The DHCP server ip is 192.168.201.1
2666 06:07:35.362849
2667 06:07:35.369495 TFTP server IP predefined by user: 192.168.201.1
2668 06:07:35.369580
2669 06:07:35.375810 Bootfile predefined by user: 11005047/tftp-deploy-686qzrn6/kernel/bzImage
2670 06:07:35.375894
2671 06:07:35.379482 Sending tftp read request... done.
2672 06:07:35.379565
2673 06:07:35.382724 Waiting for the transfer...
2674 06:07:35.382807
2675 06:07:35.637053 00000000 ################################################################
2676 06:07:35.637182
2677 06:07:35.892080 00080000 ################################################################
2678 06:07:35.892215
2679 06:07:36.142149 00100000 ################################################################
2680 06:07:36.142317
2681 06:07:36.395127 00180000 ################################################################
2682 06:07:36.395316
2683 06:07:36.649880 00200000 ################################################################
2684 06:07:36.650050
2685 06:07:36.922335 00280000 ################################################################
2686 06:07:36.922467
2687 06:07:37.202916 00300000 ################################################################
2688 06:07:37.203148
2689 06:07:37.465559 00380000 ################################################################
2690 06:07:37.465691
2691 06:07:37.746966 00400000 ################################################################
2692 06:07:37.747100
2693 06:07:38.007776 00480000 ################################################################
2694 06:07:38.007909
2695 06:07:38.279779 00500000 ################################################################
2696 06:07:38.279923
2697 06:07:38.556102 00580000 ################################################################
2698 06:07:38.556236
2699 06:07:38.815937 00600000 ################################################################
2700 06:07:38.816071
2701 06:07:39.101751 00680000 ################################################################
2702 06:07:39.101884
2703 06:07:39.386628 00700000 ################################################################
2704 06:07:39.386766
2705 06:07:39.647408 00780000 ################################################################
2706 06:07:39.647538
2707 06:07:39.931857 00800000 ################################################################
2708 06:07:39.931987
2709 06:07:40.216073 00880000 ################################################################
2710 06:07:40.216208
2711 06:07:40.477894 00900000 ################################################################
2712 06:07:40.478036
2713 06:07:40.732619 00980000 ################################################################
2714 06:07:40.732752
2715 06:07:41.005681 00a00000 ################################################################
2716 06:07:41.005838
2717 06:07:41.264165 00a80000 ################################################################
2718 06:07:41.264291
2719 06:07:41.515322 00b00000 ################################################################
2720 06:07:41.515448
2721 06:07:41.776101 00b80000 ################################################################
2722 06:07:41.776248
2723 06:07:42.049499 00c00000 ################################################################
2724 06:07:42.049630
2725 06:07:42.210791 00c80000 ##################################### done.
2726 06:07:42.210914
2727 06:07:42.213987 The bootfile was 13402336 bytes long.
2728 06:07:42.214070
2729 06:07:42.217273 Sending tftp read request... done.
2730 06:07:42.217356
2731 06:07:42.220165 Waiting for the transfer...
2732 06:07:42.220247
2733 06:07:42.498099 00000000 ################################################################
2734 06:07:42.498232
2735 06:07:42.770159 00080000 ################################################################
2736 06:07:42.770315
2737 06:07:43.026407 00100000 ################################################################
2738 06:07:43.026539
2739 06:07:43.299088 00180000 ################################################################
2740 06:07:43.299248
2741 06:07:43.577111 00200000 ################################################################
2742 06:07:43.577268
2743 06:07:43.857186 00280000 ################################################################
2744 06:07:43.857340
2745 06:07:44.144907 00300000 ################################################################
2746 06:07:44.145035
2747 06:07:44.404657 00380000 ################################################################
2748 06:07:44.404812
2749 06:07:44.656631 00400000 ################################################################
2750 06:07:44.656788
2751 06:07:44.904809 00480000 ################################################################
2752 06:07:44.904972
2753 06:07:45.153285 00500000 ################################################################
2754 06:07:45.153441
2755 06:07:45.425943 00580000 ################################################################
2756 06:07:45.426100
2757 06:07:45.691408 00600000 ################################################################
2758 06:07:45.691557
2759 06:07:45.948378 00680000 ################################################################
2760 06:07:45.948534
2761 06:07:46.196724 00700000 ################################################################
2762 06:07:46.196855
2763 06:07:46.439049 00780000 ################################################################
2764 06:07:46.439210
2765 06:07:46.703846 00800000 ################################################################
2766 06:07:46.703974
2767 06:07:46.871098 00880000 ############################################ done.
2768 06:07:46.871292
2769 06:07:46.874591 Sending tftp read request... done.
2770 06:07:46.874698
2771 06:07:46.877736 Waiting for the transfer...
2772 06:07:46.877845
2773 06:07:46.877938 00000000 # done.
2774 06:07:46.878039
2775 06:07:46.887680 Command line loaded dynamically from TFTP file: 11005047/tftp-deploy-686qzrn6/kernel/cmdline
2776 06:07:46.887766
2777 06:07:46.901012 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2778 06:07:46.906257
2779 06:07:46.909857 Shutting down all USB controllers.
2780 06:07:46.909936
2781 06:07:46.910002 Removing current net device
2782 06:07:46.910064
2783 06:07:46.913195 Finalizing coreboot
2784 06:07:46.913271
2785 06:07:46.919818 Exiting depthcharge with code 4 at timestamp: 24258576
2786 06:07:46.919896
2787 06:07:46.919960
2788 06:07:46.920020 Starting kernel ...
2789 06:07:46.920079
2790 06:07:46.920135
2791 06:07:46.920507 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2792 06:07:46.920601 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2793 06:07:46.920683 Setting prompt string to ['Linux version [0-9]']
2794 06:07:46.920759 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2795 06:07:46.920833 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2797 06:12:13.921560 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2799 06:12:13.922647 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2801 06:12:13.923534 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2804 06:12:13.924914 end: 2 depthcharge-action (duration 00:05:00) [common]
2806 06:12:13.926089 Cleaning after the job
2807 06:12:13.926563 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11005047/tftp-deploy-686qzrn6/ramdisk
2808 06:12:13.927887 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11005047/tftp-deploy-686qzrn6/kernel
2809 06:12:13.929768 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11005047/tftp-deploy-686qzrn6/modules
2810 06:12:13.930487 start: 5.1 power-off (timeout 00:00:30) [common]
2811 06:12:13.930642 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=off'
2812 06:12:14.001603 >> Command sent successfully.
2813 06:12:14.005913 Returned 0 in 0 seconds
2814 06:12:14.106983 end: 5.1 power-off (duration 00:00:00) [common]
2816 06:12:14.108637 start: 5.2 read-feedback (timeout 00:10:00) [common]
2817 06:12:14.109942 Listened to connection for namespace 'common' for up to 1s
2819 06:12:14.111782 Listened to connection for namespace 'common' for up to 1s
2820 06:12:15.110539 Finalising connection for namespace 'common'
2821 06:12:15.111293 Disconnecting from shell: Finalise
2822 06:12:15.111724
2823 06:12:15.212825 end: 5.2 read-feedback (duration 00:00:01) [common]
2824 06:12:15.213446 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11005047
2825 06:12:15.270503 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11005047
2826 06:12:15.270703 JobError: Your job cannot terminate cleanly.