Boot log: acer-cbv514-1h-34uz-brya

    1 10:50:36.363539  lava-dispatcher, installed at version: 2023.05.1
    2 10:50:36.363731  start: 0 validate
    3 10:50:36.363863  Start time: 2023-07-27 10:50:36.363855+00:00 (UTC)
    4 10:50:36.363987  Using caching service: 'http://localhost/cache/?uri=%s'
    5 10:50:36.364112  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 10:50:36.661848  Using caching service: 'http://localhost/cache/?uri=%s'
    7 10:50:36.662039  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.186-cip37-526-g7640d76efb649%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
    8 10:50:36.918817  Using caching service: 'http://localhost/cache/?uri=%s'
    9 10:50:36.919001  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.186-cip37-526-g7640d76efb649%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
   10 10:50:45.842154  validate duration: 9.48
   12 10:50:45.842456  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 10:50:45.842555  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 10:50:45.842641  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 10:50:45.842761  Not decompressing ramdisk as can be used compressed.
   16 10:50:45.842845  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 10:50:45.842910  saving as /var/lib/lava/dispatcher/tmp/11150749/tftp-deploy-na0g4vxn/ramdisk/rootfs.cpio.gz
   18 10:50:45.842970  total size: 8418130 (8MB)
   19 10:50:47.964952  progress   0% (0MB)
   20 10:50:47.968282  progress   5% (0MB)
   21 10:50:47.971554  progress  10% (0MB)
   22 10:50:47.974819  progress  15% (1MB)
   23 10:50:47.978080  progress  20% (1MB)
   24 10:50:47.981381  progress  25% (2MB)
   25 10:50:47.984679  progress  30% (2MB)
   26 10:50:47.987711  progress  35% (2MB)
   27 10:50:47.991102  progress  40% (3MB)
   28 10:50:47.994411  progress  45% (3MB)
   29 10:50:47.997691  progress  50% (4MB)
   30 10:50:48.000912  progress  55% (4MB)
   31 10:50:48.003458  progress  60% (4MB)
   32 10:50:48.005686  progress  65% (5MB)
   33 10:50:48.008062  progress  70% (5MB)
   34 10:50:48.010342  progress  75% (6MB)
   35 10:50:48.012676  progress  80% (6MB)
   36 10:50:48.015048  progress  85% (6MB)
   37 10:50:48.017386  progress  90% (7MB)
   38 10:50:48.019599  progress  95% (7MB)
   39 10:50:48.021796  progress 100% (8MB)
   40 10:50:48.022026  8MB downloaded in 2.18s (3.68MB/s)
   41 10:50:48.022175  end: 1.1.1 http-download (duration 00:00:02) [common]
   43 10:50:48.022415  end: 1.1 download-retry (duration 00:00:02) [common]
   44 10:50:48.022510  start: 1.2 download-retry (timeout 00:09:58) [common]
   45 10:50:48.022595  start: 1.2.1 http-download (timeout 00:09:58) [common]
   46 10:50:48.022729  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.186-cip37-526-g7640d76efb649/x86_64/x86_64_defconfig+x86-chromebook+kselftest/gcc-10/kernel/bzImage
   47 10:50:48.022800  saving as /var/lib/lava/dispatcher/tmp/11150749/tftp-deploy-na0g4vxn/kernel/bzImage
   48 10:50:48.022860  total size: 16413184 (15MB)
   49 10:50:48.022919  No compression specified
   50 10:50:48.287462  progress   0% (0MB)
   51 10:50:48.292011  progress   5% (0MB)
   52 10:50:48.296239  progress  10% (1MB)
   53 10:50:48.300947  progress  15% (2MB)
   54 10:50:48.305499  progress  20% (3MB)
   55 10:50:48.310043  progress  25% (3MB)
   56 10:50:48.314519  progress  30% (4MB)
   57 10:50:48.319100  progress  35% (5MB)
   58 10:50:48.323585  progress  40% (6MB)
   59 10:50:48.327864  progress  45% (7MB)
   60 10:50:48.332048  progress  50% (7MB)
   61 10:50:48.336261  progress  55% (8MB)
   62 10:50:48.340428  progress  60% (9MB)
   63 10:50:48.344638  progress  65% (10MB)
   64 10:50:48.349102  progress  70% (10MB)
   65 10:50:48.353277  progress  75% (11MB)
   66 10:50:48.357387  progress  80% (12MB)
   67 10:50:48.361467  progress  85% (13MB)
   68 10:50:48.365545  progress  90% (14MB)
   69 10:50:48.369647  progress  95% (14MB)
   70 10:50:48.373773  progress 100% (15MB)
   71 10:50:48.373999  15MB downloaded in 0.35s (44.58MB/s)
   72 10:50:48.374145  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 10:50:48.374371  end: 1.2 download-retry (duration 00:00:00) [common]
   75 10:50:48.374456  start: 1.3 download-retry (timeout 00:09:57) [common]
   76 10:50:48.374539  start: 1.3.1 http-download (timeout 00:09:57) [common]
   77 10:50:48.374698  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.186-cip37-526-g7640d76efb649/x86_64/x86_64_defconfig+x86-chromebook+kselftest/gcc-10/modules.tar.xz
   78 10:50:48.374790  saving as /var/lib/lava/dispatcher/tmp/11150749/tftp-deploy-na0g4vxn/modules/modules.tar
   79 10:50:48.374883  total size: 3449284 (3MB)
   80 10:50:48.374975  Using unxz to decompress xz
   81 10:50:48.378877  progress   0% (0MB)
   82 10:50:48.385083  progress   5% (0MB)
   83 10:50:48.394928  progress  10% (0MB)
   84 10:50:48.404836  progress  15% (0MB)
   85 10:50:48.416748  progress  20% (0MB)
   86 10:50:48.426953  progress  25% (0MB)
   87 10:50:48.437419  progress  30% (1MB)
   88 10:50:48.447311  progress  35% (1MB)
   89 10:50:48.459082  progress  40% (1MB)
   90 10:50:48.469245  progress  45% (1MB)
   91 10:50:48.479206  progress  50% (1MB)
   92 10:50:48.489214  progress  55% (1MB)
   93 10:50:48.498854  progress  60% (2MB)
   94 10:50:48.509887  progress  65% (2MB)
   95 10:50:48.521404  progress  70% (2MB)
   96 10:50:48.529656  progress  75% (2MB)
   97 10:50:48.543004  progress  80% (2MB)
   98 10:50:48.554758  progress  85% (2MB)
   99 10:50:48.564905  progress  90% (2MB)
  100 10:50:48.576765  progress  95% (3MB)
  101 10:50:48.586269  progress 100% (3MB)
  102 10:50:48.591205  3MB downloaded in 0.22s (15.21MB/s)
  103 10:50:48.591490  end: 1.3.1 http-download (duration 00:00:00) [common]
  105 10:50:48.591754  end: 1.3 download-retry (duration 00:00:00) [common]
  106 10:50:48.591848  start: 1.4 prepare-tftp-overlay (timeout 00:09:57) [common]
  107 10:50:48.591946  start: 1.4.1 extract-nfsrootfs (timeout 00:09:57) [common]
  108 10:50:48.592029  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  109 10:50:48.592115  start: 1.4.2 lava-overlay (timeout 00:09:57) [common]
  110 10:50:48.592335  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n
  111 10:50:48.592465  makedir: /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin
  112 10:50:48.592570  makedir: /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/tests
  113 10:50:48.592692  makedir: /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/results
  114 10:50:48.592827  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-add-keys
  115 10:50:48.592971  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-add-sources
  116 10:50:48.593096  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-background-process-start
  117 10:50:48.593222  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-background-process-stop
  118 10:50:48.593344  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-common-functions
  119 10:50:48.593466  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-echo-ipv4
  120 10:50:48.593590  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-install-packages
  121 10:50:48.593712  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-installed-packages
  122 10:50:48.593833  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-os-build
  123 10:50:48.593954  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-probe-channel
  124 10:50:48.594076  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-probe-ip
  125 10:50:48.594198  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-target-ip
  126 10:50:48.594320  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-target-mac
  127 10:50:48.594440  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-target-storage
  128 10:50:48.594565  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-test-case
  129 10:50:48.594687  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-test-event
  130 10:50:48.594808  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-test-feedback
  131 10:50:48.594930  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-test-raise
  132 10:50:48.595054  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-test-reference
  133 10:50:48.595178  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-test-runner
  134 10:50:48.595300  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-test-set
  135 10:50:48.595422  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-test-shell
  136 10:50:48.595547  Updating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-install-packages (oe)
  137 10:50:48.595692  Updating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/bin/lava-installed-packages (oe)
  138 10:50:48.595818  Creating /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/environment
  139 10:50:48.595922  LAVA metadata
  140 10:50:48.595995  - LAVA_JOB_ID=11150749
  141 10:50:48.596061  - LAVA_DISPATCHER_IP=192.168.201.1
  142 10:50:48.596165  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:57) [common]
  143 10:50:48.596235  skipped lava-vland-overlay
  144 10:50:48.596311  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  145 10:50:48.596398  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:57) [common]
  146 10:50:48.596463  skipped lava-multinode-overlay
  147 10:50:48.596537  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  148 10:50:48.596619  start: 1.4.2.3 test-definition (timeout 00:09:57) [common]
  149 10:50:48.596696  Loading test definitions
  150 10:50:48.596825  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:57) [common]
  151 10:50:48.596902  Using /lava-11150749 at stage 0
  152 10:50:48.597210  uuid=11150749_1.4.2.3.1 testdef=None
  153 10:50:48.597300  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  154 10:50:48.597390  start: 1.4.2.3.2 test-overlay (timeout 00:09:57) [common]
  155 10:50:48.597918  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  157 10:50:48.598144  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:57) [common]
  158 10:50:48.598788  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  160 10:50:48.599023  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:57) [common]
  161 10:50:48.599637  runner path: /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/0/tests/0_dmesg test_uuid 11150749_1.4.2.3.1
  162 10:50:48.599793  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  164 10:50:48.600024  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:57) [common]
  165 10:50:48.600097  Using /lava-11150749 at stage 1
  166 10:50:48.600389  uuid=11150749_1.4.2.3.5 testdef=None
  167 10:50:48.600478  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  168 10:50:48.600564  start: 1.4.2.3.6 test-overlay (timeout 00:09:57) [common]
  169 10:50:48.601067  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  171 10:50:48.601287  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:57) [common]
  172 10:50:48.601934  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  174 10:50:48.602172  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:57) [common]
  175 10:50:48.602808  runner path: /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/1/tests/1_bootrr test_uuid 11150749_1.4.2.3.5
  176 10:50:48.602960  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  178 10:50:48.603170  Creating lava-test-runner.conf files
  179 10:50:48.603235  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/0 for stage 0
  180 10:50:48.603323  - 0_dmesg
  181 10:50:48.603406  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11150749/lava-overlay-7hiwz93n/lava-11150749/1 for stage 1
  182 10:50:48.603498  - 1_bootrr
  183 10:50:48.603591  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  184 10:50:48.603677  start: 1.4.2.4 compress-overlay (timeout 00:09:57) [common]
  185 10:50:48.612249  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  186 10:50:48.612357  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:57) [common]
  187 10:50:48.612444  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  188 10:50:48.612528  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  189 10:50:48.612617  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
  190 10:50:48.850396  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  191 10:50:48.850749  start: 1.4.4 extract-modules (timeout 00:09:57) [common]
  192 10:50:48.850872  extracting modules file /var/lib/lava/dispatcher/tmp/11150749/tftp-deploy-na0g4vxn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11150749/extract-overlay-ramdisk-sqzmdaf9/ramdisk
  193 10:50:48.932197  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  194 10:50:48.932374  start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
  195 10:50:48.932478  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11150749/compress-overlay-a1315e2u/overlay-1.4.2.4.tar.gz to ramdisk
  196 10:50:48.932556  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11150749/compress-overlay-a1315e2u/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11150749/extract-overlay-ramdisk-sqzmdaf9/ramdisk
  197 10:50:48.940697  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  198 10:50:48.940860  start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
  199 10:50:48.940953  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  200 10:50:48.941043  start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
  201 10:50:48.941123  Building ramdisk /var/lib/lava/dispatcher/tmp/11150749/extract-overlay-ramdisk-sqzmdaf9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11150749/extract-overlay-ramdisk-sqzmdaf9/ramdisk
  202 10:50:49.149614  >> 92989 blocks

  203 10:50:50.646929  rename /var/lib/lava/dispatcher/tmp/11150749/extract-overlay-ramdisk-sqzmdaf9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11150749/tftp-deploy-na0g4vxn/ramdisk/ramdisk.cpio.gz
  204 10:50:50.647347  end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
  205 10:50:50.647473  start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
  206 10:50:50.647572  start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
  207 10:50:50.647668  No mkimage arch provided, not using FIT.
  208 10:50:50.647757  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  209 10:50:50.647844  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  210 10:50:50.647956  end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
  211 10:50:50.648050  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
  212 10:50:50.648129  No LXC device requested
  213 10:50:50.648212  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  214 10:50:50.648302  start: 1.6 deploy-device-env (timeout 00:09:55) [common]
  215 10:50:50.648384  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  216 10:50:50.648461  Checking files for TFTP limit of 4294967296 bytes.
  217 10:50:50.648901  end: 1 tftp-deploy (duration 00:00:05) [common]
  218 10:50:50.649011  start: 2 depthcharge-action (timeout 00:05:00) [common]
  219 10:50:50.649105  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  220 10:50:50.649232  substitutions:
  221 10:50:50.649300  - {DTB}: None
  222 10:50:50.649364  - {INITRD}: 11150749/tftp-deploy-na0g4vxn/ramdisk/ramdisk.cpio.gz
  223 10:50:50.649425  - {KERNEL}: 11150749/tftp-deploy-na0g4vxn/kernel/bzImage
  224 10:50:50.649484  - {LAVA_MAC}: None
  225 10:50:50.649540  - {PRESEED_CONFIG}: None
  226 10:50:50.649597  - {PRESEED_LOCAL}: None
  227 10:50:50.649654  - {RAMDISK}: 11150749/tftp-deploy-na0g4vxn/ramdisk/ramdisk.cpio.gz
  228 10:50:50.649711  - {ROOT_PART}: None
  229 10:50:50.649767  - {ROOT}: None
  230 10:50:50.649823  - {SERVER_IP}: 192.168.201.1
  231 10:50:50.649879  - {TEE}: None
  232 10:50:50.649935  Parsed boot commands:
  233 10:50:50.649991  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  234 10:50:50.650159  Parsed boot commands: tftpboot 192.168.201.1 11150749/tftp-deploy-na0g4vxn/kernel/bzImage 11150749/tftp-deploy-na0g4vxn/kernel/cmdline 11150749/tftp-deploy-na0g4vxn/ramdisk/ramdisk.cpio.gz
  235 10:50:50.650248  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  236 10:50:50.650333  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  237 10:50:50.650437  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  238 10:50:50.650531  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  239 10:50:50.650602  Not connected, no need to disconnect.
  240 10:50:50.650681  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  241 10:50:50.650765  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  242 10:50:50.650834  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-0'
  243 10:50:50.654176  Setting prompt string to ['lava-test: # ']
  244 10:50:50.654499  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  245 10:50:50.654605  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  246 10:50:50.654729  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  247 10:50:50.654851  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  248 10:50:50.655059  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=reboot'
  249 10:50:55.787713  >> Command sent successfully.

  250 10:50:55.790070  Returned 0 in 5 seconds
  251 10:50:55.890421  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  253 10:50:55.890832  end: 2.2.2 reset-device (duration 00:00:05) [common]
  254 10:50:55.890961  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  255 10:50:55.891078  Setting prompt string to 'Starting depthcharge on Volmar...'
  256 10:50:55.891177  Changing prompt to 'Starting depthcharge on Volmar...'
  257 10:50:55.891276  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  258 10:50:55.891627  [Enter `^Ec?' for help]

  259 10:50:57.266843  

  260 10:50:57.267004  

  261 10:50:57.273482  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  262 10:50:57.276952  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  263 10:50:57.283901  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  264 10:50:57.286873  CPU: AES supported, TXT NOT supported, VT supported

  265 10:50:57.297458  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  266 10:50:57.297574  Cache size = 10 MiB

  267 10:50:57.301360  MCH: device id 4609 (rev 04) is Alderlake-P

  268 10:50:57.308130  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  269 10:50:57.311654  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  270 10:50:57.315469  VBOOT: Loading verstage.

  271 10:50:57.319251  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  272 10:50:57.322423  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  273 10:50:57.328959  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  274 10:50:57.335741  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  275 10:50:57.346113  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  276 10:50:57.346198  

  277 10:50:57.346266  

  278 10:50:57.352816  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  279 10:50:57.361179  Probing TPM I2C: I2C bus 1 version 0x3230302a

  280 10:50:57.364646  DW I2C bus 1 at 0xfe022000 (400 KHz)

  281 10:50:57.368321  I2C TX abort detected (00000001)

  282 10:50:57.371910  cr50_i2c_read: Address write failed

  283 10:50:57.382891  .done! DID_VID 0x00281ae0

  284 10:50:57.386197  TPM ready after 0 ms

  285 10:50:57.390103  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  286 10:50:57.403236  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  287 10:50:57.409982  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  288 10:50:57.457131  tlcl_send_startup: Startup return code is 0

  289 10:50:57.457292  TPM: setup succeeded

  290 10:50:57.480566  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  291 10:50:57.501933  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  292 10:50:57.505397  Chrome EC: UHEPI supported

  293 10:50:57.508742  Reading cr50 boot mode

  294 10:50:57.523718  Cr50 says boot_mode is VERIFIED_RW(0x00).

  295 10:50:57.523845  Phase 1

  296 10:50:57.530469  FMAP: area GBB found @ 1805000 (458752 bytes)

  297 10:50:57.537250  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  298 10:50:57.544031  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  299 10:50:57.550534  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  300 10:50:57.550656  Phase 2

  301 10:50:57.553985  Phase 3

  302 10:50:57.557262  FMAP: area GBB found @ 1805000 (458752 bytes)

  303 10:50:57.563911  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  304 10:50:57.567184  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  305 10:50:57.573550  VB2:vb2_verify_keyblock() Checking keyblock signature...

  306 10:50:57.580454  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  307 10:50:57.587323  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  308 10:50:57.597206  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  309 10:50:57.608867  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  310 10:50:57.612040  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  311 10:50:57.618944  VB2:vb2_verify_fw_preamble() Verifying preamble.

  312 10:50:57.625566  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  313 10:50:57.632317  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  314 10:50:57.639085  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  315 10:50:57.642552  Phase 4

  316 10:50:57.646109  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  317 10:50:57.652651  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  318 10:50:57.864749  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  319 10:50:57.871428  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  320 10:50:57.874956  Saving vboot hash.

  321 10:50:57.881801  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  322 10:50:57.897836  tlcl_extend: response is 0

  323 10:50:57.904412  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  324 10:50:57.908073  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  325 10:50:57.925241  tlcl_extend: response is 0

  326 10:50:57.932181  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  327 10:50:57.951918  tlcl_lock_nv_write: response is 0

  328 10:50:57.971016  tlcl_lock_nv_write: response is 0

  329 10:50:57.971154  Slot A is selected

  330 10:50:57.977734  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  331 10:50:57.984364  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  332 10:50:57.990982  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  333 10:50:57.997960  BS: verstage times (exec / console): total (unknown) / 264 ms

  334 10:50:57.998089  

  335 10:50:57.998212  

  336 10:50:58.004498  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  337 10:50:58.008649  Google Chrome EC: version:

  338 10:50:58.011602  	ro: volmar_v2.0.14126-e605144e9c

  339 10:50:58.015100  	rw: volmar_v0.0.55-22d1557

  340 10:50:58.018610    running image: 2

  341 10:50:58.021669  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  342 10:50:58.031989  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  343 10:50:58.038472  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  344 10:50:58.045232  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  345 10:50:58.054993  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  346 10:50:58.065071  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  347 10:50:58.068691  EC took 941us to calculate image hash

  348 10:50:58.078196  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  349 10:50:58.081676  VB2:sync_ec() select_rw=RW(active)

  350 10:50:58.094263  Waited 270us to clear limit power flag.

  351 10:50:58.097982  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  352 10:50:58.101113  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  353 10:50:58.104492  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  354 10:50:58.111206  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  355 10:50:58.114815  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  356 10:50:58.118010  TCO_STS:   0000 0000

  357 10:50:58.118096  GEN_PMCON: d0015038 00002200

  358 10:50:58.121359  GBLRST_CAUSE: 00000000 00000000

  359 10:50:58.124624  HPR_CAUSE0: 00000000

  360 10:50:58.127775  prev_sleep_state 5

  361 10:50:58.131548  Abort disabling TXT, as CPU is not TXT capable.

  362 10:50:58.139321  cse_lite: Number of partitions = 3

  363 10:50:58.142067  cse_lite: Current partition = RO

  364 10:50:58.142152  cse_lite: Next partition = RO

  365 10:50:58.145548  cse_lite: Flags = 0x7

  366 10:50:58.152374  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  367 10:50:58.162405  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  368 10:50:58.165539  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  369 10:50:58.172346  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  370 10:50:58.178980  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  371 10:50:58.185877  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  372 10:50:58.189002  cse_lite: CSE CBFS RW version : 16.1.25.2049

  373 10:50:58.195547  cse_lite: Set Boot Partition Info Command (RW)

  374 10:50:58.198996  HECI: Global Reset(Type:1) Command

  375 10:50:59.631102  �F&6֘�h�U: AES supported, TXT NOT supported, VT supported

  376 10:50:59.641156  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  377 10:50:59.641259  Cache size = 10 MiB

  378 10:50:59.647374  MCH: device id 4609 (rev 04) is Alderlake-P

  379 10:50:59.651387  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  380 10:50:59.654170  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  381 10:50:59.657379  VBOOT: Loading verstage.

  382 10:50:59.664791  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  383 10:50:59.668505  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  384 10:50:59.671679  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  385 10:50:59.679544  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  386 10:50:59.689421  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  387 10:50:59.689508  

  388 10:50:59.689576  

  389 10:50:59.699797  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  390 10:50:59.702835  Probing TPM I2C: I2C bus 1 version 0x3230302a

  391 10:50:59.709625  DW I2C bus 1 at 0xfe022000 (400 KHz)

  392 10:50:59.709711  done! DID_VID 0x00281ae0

  393 10:50:59.713080  TPM ready after 0 ms

  394 10:50:59.716645  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  395 10:50:59.727561  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  396 10:50:59.734837  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  397 10:50:59.786654  tlcl_send_startup: Startup return code is 0

  398 10:50:59.786757  TPM: setup succeeded

  399 10:50:59.806458  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  400 10:50:59.828338  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  401 10:50:59.832258  Chrome EC: UHEPI supported

  402 10:50:59.835731  Reading cr50 boot mode

  403 10:50:59.850444  Cr50 says boot_mode is VERIFIED_RW(0x00).

  404 10:50:59.850532  Phase 1

  405 10:50:59.857369  FMAP: area GBB found @ 1805000 (458752 bytes)

  406 10:50:59.863983  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  407 10:50:59.870145  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  408 10:50:59.876988  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  409 10:50:59.877075  Phase 2

  410 10:50:59.880377  Phase 3

  411 10:50:59.884050  FMAP: area GBB found @ 1805000 (458752 bytes)

  412 10:50:59.890601  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  413 10:50:59.893680  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  414 10:50:59.900642  VB2:vb2_verify_keyblock() Checking keyblock signature...

  415 10:50:59.907257  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  416 10:50:59.913980  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  417 10:50:59.923847  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  418 10:50:59.935556  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  419 10:50:59.938825  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  420 10:50:59.945582  VB2:vb2_verify_fw_preamble() Verifying preamble.

  421 10:50:59.952149  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  422 10:50:59.958550  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  423 10:50:59.965559  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  424 10:50:59.969471  Phase 4

  425 10:50:59.972566  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  426 10:50:59.979798  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  427 10:51:00.191880  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  428 10:51:00.198285  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  429 10:51:00.201586  Saving vboot hash.

  430 10:51:00.208705  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  431 10:51:00.225058  tlcl_extend: response is 0

  432 10:51:00.231489  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  433 10:51:00.237913  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  434 10:51:00.252549  tlcl_extend: response is 0

  435 10:51:00.258925  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  436 10:51:00.279143  tlcl_lock_nv_write: response is 0

  437 10:51:00.298161  tlcl_lock_nv_write: response is 0

  438 10:51:00.298254  Slot A is selected

  439 10:51:00.304660  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  440 10:51:00.312392  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  441 10:51:00.318133  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  442 10:51:00.325286  BS: verstage times (exec / console): total (unknown) / 256 ms

  443 10:51:00.325373  

  444 10:51:00.325442  

  445 10:51:00.331530  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  446 10:51:00.335242  Google Chrome EC: version:

  447 10:51:00.338724  	ro: volmar_v2.0.14126-e605144e9c

  448 10:51:00.341745  	rw: volmar_v0.0.55-22d1557

  449 10:51:00.345166    running image: 2

  450 10:51:00.348650  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  451 10:51:00.358506  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  452 10:51:00.365273  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  453 10:51:00.371739  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  454 10:51:00.381932  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  455 10:51:00.392213  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  456 10:51:00.395502  EC took 1318us to calculate image hash

  457 10:51:00.405376  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  458 10:51:00.411769  VB2:sync_ec() select_rw=RW(active)

  459 10:51:00.420994  Waited 270us to clear limit power flag.

  460 10:51:00.425156  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  461 10:51:00.429077  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  462 10:51:00.432446  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  463 10:51:00.435616  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  464 10:51:00.442584  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  465 10:51:00.442726  TCO_STS:   0000 0000

  466 10:51:00.445612  GEN_PMCON: d1001038 00002200

  467 10:51:00.449473  GBLRST_CAUSE: 00000040 00000000

  468 10:51:00.452526  HPR_CAUSE0: 00000000

  469 10:51:00.452650  prev_sleep_state 5

  470 10:51:00.458838  Abort disabling TXT, as CPU is not TXT capable.

  471 10:51:00.465675  cse_lite: Number of partitions = 3

  472 10:51:00.469272  cse_lite: Current partition = RW

  473 10:51:00.469399  cse_lite: Next partition = RW

  474 10:51:00.472218  cse_lite: Flags = 0x7

  475 10:51:00.478954  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  476 10:51:00.489031  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  477 10:51:00.492044  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  478 10:51:00.498609  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  479 10:51:00.505970  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  480 10:51:00.512443  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  481 10:51:00.515520  cse_lite: CSE CBFS RW version : 16.1.25.2049

  482 10:51:00.519123  Boot Count incremented to 2022

  483 10:51:00.525684  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  484 10:51:00.532435  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  485 10:51:00.545147  Probing TPM I2C: done! DID_VID 0x00281ae0

  486 10:51:00.548160  Locality already claimed

  487 10:51:00.551894  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  488 10:51:00.570785  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  489 10:51:00.578005  MRC: Hash idx 0x100d comparison successful.

  490 10:51:00.581049  MRC cache found, size f6c8

  491 10:51:00.581135  bootmode is set to: 2

  492 10:51:00.585772  EC returned error result code 3

  493 10:51:00.589075  FW_CONFIG value from CBI is 0x131

  494 10:51:00.595909  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  495 10:51:00.598941  SPD index = 0

  496 10:51:00.605814  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  497 10:51:00.605901  SPD: module type is LPDDR4X

  498 10:51:00.614228  SPD: module part number is K4U6E3S4AB-MGCL

  499 10:51:00.621063  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  500 10:51:00.624260  SPD: device width 16 bits, bus width 16 bits

  501 10:51:00.627568  SPD: module size is 1024 MB (per channel)

  502 10:51:00.696255  CBMEM:

  503 10:51:00.699312  IMD: root @ 0x76fff000 254 entries.

  504 10:51:00.702795  IMD: root @ 0x76ffec00 62 entries.

  505 10:51:00.710497  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  506 10:51:00.713734  RO_VPD is uninitialized or empty.

  507 10:51:00.716933  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  508 10:51:00.720226  RW_VPD is uninitialized or empty.

  509 10:51:00.727198  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  510 10:51:00.730319  External stage cache:

  511 10:51:00.733963  IMD: root @ 0x7bbff000 254 entries.

  512 10:51:00.737246  IMD: root @ 0x7bbfec00 62 entries.

  513 10:51:00.743570  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  514 10:51:00.750346  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  515 10:51:00.753905  MRC: 'RW_MRC_CACHE' does not need update.

  516 10:51:00.754029  8 DIMMs found

  517 10:51:00.757294  SMM Memory Map

  518 10:51:00.760291  SMRAM       : 0x7b800000 0x800000

  519 10:51:00.763844   Subregion 0: 0x7b800000 0x200000

  520 10:51:00.767269   Subregion 1: 0x7ba00000 0x200000

  521 10:51:00.770787   Subregion 2: 0x7bc00000 0x400000

  522 10:51:00.773720  top_of_ram = 0x77000000

  523 10:51:00.777011  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  524 10:51:00.783676  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  525 10:51:00.790440  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  526 10:51:00.793887  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  527 10:51:00.794016  Normal boot

  528 10:51:00.804105  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  529 10:51:00.810672  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  530 10:51:00.817266  Processing 237 relocs. Offset value of 0x74ab9000

  531 10:51:00.824709  BS: romstage times (exec / console): total (unknown) / 381 ms

  532 10:51:00.832214  

  533 10:51:00.832337  

  534 10:51:00.839271  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  535 10:51:00.839400  Normal boot

  536 10:51:00.845746  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  537 10:51:00.852521  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  538 10:51:00.859005  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  539 10:51:00.869123  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  540 10:51:00.917487  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  541 10:51:00.924203  Processing 5931 relocs. Offset value of 0x72a2f000

  542 10:51:00.927274  BS: postcar times (exec / console): total (unknown) / 51 ms

  543 10:51:00.931023  

  544 10:51:00.931110  

  545 10:51:00.937616  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  546 10:51:00.940748  Reserving BERT start 76a1e000, size 10000

  547 10:51:00.944051  Normal boot

  548 10:51:00.947264  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  549 10:51:00.954034  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  550 10:51:00.963937  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  551 10:51:00.967366  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  552 10:51:00.970720  Google Chrome EC: version:

  553 10:51:00.973686  	ro: volmar_v2.0.14126-e605144e9c

  554 10:51:00.977154  	rw: volmar_v0.0.55-22d1557

  555 10:51:00.980671    running image: 2

  556 10:51:00.983811  ACPI _SWS is PM1 Index 8 GPE Index -1

  557 10:51:00.987317  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  558 10:51:00.991940  EC returned error result code 3

  559 10:51:00.994952  FW_CONFIG value from CBI is 0x131

  560 10:51:01.001494  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  561 10:51:01.005343  PCI: 00:1c.2 disabled by fw_config

  562 10:51:01.012317  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  563 10:51:01.015382  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  564 10:51:01.022144  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  565 10:51:01.025649  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  566 10:51:01.032698  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  567 10:51:01.038912  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  568 10:51:01.042100  microcode: sig=0x906a4 pf=0x80 revision=0x423

  569 10:51:01.048675  microcode: Update skipped, already up-to-date

  570 10:51:01.055407  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  571 10:51:01.087425  Detected 6 core, 8 thread CPU.

  572 10:51:01.090696  Setting up SMI for CPU

  573 10:51:01.094356  IED base = 0x7bc00000

  574 10:51:01.094484  IED size = 0x00400000

  575 10:51:01.097551  Will perform SMM setup.

  576 10:51:01.100885  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  577 10:51:01.104349  LAPIC 0x0 in XAPIC mode.

  578 10:51:01.114171  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  579 10:51:01.117362  Processing 18 relocs. Offset value of 0x00030000

  580 10:51:01.122003  Attempting to start 7 APs

  581 10:51:01.125129  Waiting for 10ms after sending INIT.

  582 10:51:01.138215  Waiting for SIPI to complete...

  583 10:51:01.141489  LAPIC 0x1 in XAPIC mode.

  584 10:51:01.145408  LAPIC 0x10 in XAPIC mode.

  585 10:51:01.148229  LAPIC 0x16 in XAPIC mode.

  586 10:51:01.151713  AP: slot 3 apic_id 10, MCU rev: 0x00000423

  587 10:51:01.155099  LAPIC 0x14 in XAPIC mode.

  588 10:51:01.158444  AP: slot 7 apic_id 1, MCU rev: 0x00000423

  589 10:51:01.161448  LAPIC 0x12 in XAPIC mode.

  590 10:51:01.164666  AP: slot 1 apic_id 14, MCU rev: 0x00000423

  591 10:51:01.171548  AP: slot 4 apic_id 12, MCU rev: 0x00000423

  592 10:51:01.171633  LAPIC 0x9 in XAPIC mode.

  593 10:51:01.178107  AP: slot 2 apic_id 16, MCU rev: 0x00000423

  594 10:51:01.181559  AP: slot 5 apic_id 9, MCU rev: 0x00000423

  595 10:51:01.184617  LAPIC 0x8 in XAPIC mode.

  596 10:51:01.184701  done.

  597 10:51:01.188288  Waiting for SIPI to complete...

  598 10:51:01.188373  done.

  599 10:51:01.191266  AP: slot 6 apic_id 8, MCU rev: 0x00000423

  600 10:51:01.194664  smm_setup_relocation_handler: enter

  601 10:51:01.198570  smm_setup_relocation_handler: exit

  602 10:51:01.208407  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  603 10:51:01.212158  Processing 11 relocs. Offset value of 0x00038000

  604 10:51:01.218343  smm_module_setup_stub: stack_top = 0x7b804000

  605 10:51:01.221642  smm_module_setup_stub: per cpu stack_size = 0x800

  606 10:51:01.228311  smm_module_setup_stub: runtime.start32_offset = 0x4c

  607 10:51:01.231474  smm_module_setup_stub: runtime.smm_size = 0x10000

  608 10:51:01.238224  SMM Module: stub loaded at 38000. Will call 0x76a52094

  609 10:51:01.241643  Installing permanent SMM handler to 0x7b800000

  610 10:51:01.248547  smm_load_module: total_smm_space_needed e468, available -> 200000

  611 10:51:01.257970  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  612 10:51:01.261311  Processing 255 relocs. Offset value of 0x7b9f6000

  613 10:51:01.268684  smm_load_module: smram_start: 0x7b800000

  614 10:51:01.271139  smm_load_module: smram_end: 7ba00000

  615 10:51:01.274966  smm_load_module: handler start 0x7b9f6d5f

  616 10:51:01.277989  smm_load_module: handler_size 98d0

  617 10:51:01.281330  smm_load_module: fxsave_area 0x7b9ff000

  618 10:51:01.284940  smm_load_module: fxsave_size 1000

  619 10:51:01.287941  smm_load_module: CONFIG_MSEG_SIZE 0x0

  620 10:51:01.294733  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  621 10:51:01.300999  smm_load_module: handler_mod_params.smbase = 0x7b800000

  622 10:51:01.304391  smm_load_module: per_cpu_save_state_size = 0x400

  623 10:51:01.307860  smm_load_module: num_cpus = 0x8

  624 10:51:01.314613  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  625 10:51:01.317619  smm_load_module: total_save_state_size = 0x2000

  626 10:51:01.320871  smm_load_module: cpu0 entry: 7b9e6000

  627 10:51:01.327662  smm_create_map: cpus allowed in one segment 30

  628 10:51:01.331154  smm_create_map: min # of segments needed 1

  629 10:51:01.331241  CPU 0x0

  630 10:51:01.334689      smbase 7b9e6000  entry 7b9ee000

  631 10:51:01.341019             ss_start 7b9f5c00  code_end 7b9ee208

  632 10:51:01.341108  CPU 0x1

  633 10:51:01.344212      smbase 7b9e5c00  entry 7b9edc00

  634 10:51:01.351113             ss_start 7b9f5800  code_end 7b9ede08

  635 10:51:01.351242  CPU 0x2

  636 10:51:01.354618      smbase 7b9e5800  entry 7b9ed800

  637 10:51:01.358062             ss_start 7b9f5400  code_end 7b9eda08

  638 10:51:01.361190  CPU 0x3

  639 10:51:01.364440      smbase 7b9e5400  entry 7b9ed400

  640 10:51:01.367703             ss_start 7b9f5000  code_end 7b9ed608

  641 10:51:01.367789  CPU 0x4

  642 10:51:01.374325      smbase 7b9e5000  entry 7b9ed000

  643 10:51:01.377657             ss_start 7b9f4c00  code_end 7b9ed208

  644 10:51:01.377768  CPU 0x5

  645 10:51:01.381012      smbase 7b9e4c00  entry 7b9ecc00

  646 10:51:01.387980             ss_start 7b9f4800  code_end 7b9ece08

  647 10:51:01.388066  CPU 0x6

  648 10:51:01.391204      smbase 7b9e4800  entry 7b9ec800

  649 10:51:01.397881             ss_start 7b9f4400  code_end 7b9eca08

  650 10:51:01.397993  CPU 0x7

  651 10:51:01.401198      smbase 7b9e4400  entry 7b9ec400

  652 10:51:01.404660             ss_start 7b9f4000  code_end 7b9ec608

  653 10:51:01.414551  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  654 10:51:01.417933  Processing 11 relocs. Offset value of 0x7b9ee000

  655 10:51:01.424709  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  656 10:51:01.431075  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  657 10:51:01.437919  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  658 10:51:01.444512  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  659 10:51:01.451462  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  660 10:51:01.454524  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  661 10:51:01.461163  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  662 10:51:01.467854  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  663 10:51:01.474750  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  664 10:51:01.481078  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  665 10:51:01.487607  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  666 10:51:01.494473  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  667 10:51:01.501144  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  668 10:51:01.504412  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  669 10:51:01.511206  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  670 10:51:01.517475  smm_module_setup_stub: stack_top = 0x7b804000

  671 10:51:01.520837  smm_module_setup_stub: per cpu stack_size = 0x800

  672 10:51:01.527742  smm_module_setup_stub: runtime.start32_offset = 0x4c

  673 10:51:01.530959  smm_module_setup_stub: runtime.smm_size = 0x200000

  674 10:51:01.538071  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  675 10:51:01.542192  Clearing SMI status registers

  676 10:51:01.545641  SMI_STS: PM1 

  677 10:51:01.545767  PM1_STS: WAK PWRBTN 

  678 10:51:01.555503  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  679 10:51:01.558862  In relocation handler: CPU 0

  680 10:51:01.562562  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  681 10:51:01.565979  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  682 10:51:01.569128  Relocation complete.

  683 10:51:01.576450  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  684 10:51:01.578807  In relocation handler: CPU 7

  685 10:51:01.581951  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  686 10:51:01.585651  Relocation complete.

  687 10:51:01.592342  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  688 10:51:01.595253  In relocation handler: CPU 3

  689 10:51:01.598658  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  690 10:51:01.605409  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  691 10:51:01.605495  Relocation complete.

  692 10:51:01.612105  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  693 10:51:01.615527  In relocation handler: CPU 4

  694 10:51:01.618983  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  695 10:51:01.625610  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  696 10:51:01.628700  Relocation complete.

  697 10:51:01.635387  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  698 10:51:01.638604  In relocation handler: CPU 2

  699 10:51:01.642131  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  700 10:51:01.645300  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  701 10:51:01.648657  Relocation complete.

  702 10:51:01.655224  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  703 10:51:01.658804  In relocation handler: CPU 1

  704 10:51:01.661778  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  705 10:51:01.668973  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  706 10:51:01.669059  Relocation complete.

  707 10:51:01.675677  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  708 10:51:01.678749  In relocation handler: CPU 5

  709 10:51:01.685414  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  710 10:51:01.685547  Relocation complete.

  711 10:51:01.692115  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  712 10:51:01.695732  In relocation handler: CPU 6

  713 10:51:01.698856  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  714 10:51:01.705234  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  715 10:51:01.708726  Relocation complete.

  716 10:51:01.708846  Initializing CPU #0

  717 10:51:01.712137  CPU: vendor Intel device 906a4

  718 10:51:01.715257  CPU: family 06, model 9a, stepping 04

  719 10:51:01.718783  Clearing out pending MCEs

  720 10:51:01.722104  cpu: energy policy set to 7

  721 10:51:01.725328  Turbo is available but hidden

  722 10:51:01.728914  Turbo is available and visible

  723 10:51:01.731987  microcode: Update skipped, already up-to-date

  724 10:51:01.735610  CPU #0 initialized

  725 10:51:01.735694  Initializing CPU #7

  726 10:51:01.738553  Initializing CPU #3

  727 10:51:01.742248  Initializing CPU #1

  728 10:51:01.745565  CPU: vendor Intel device 906a4

  729 10:51:01.748491  CPU: family 06, model 9a, stepping 04

  730 10:51:01.748574  Initializing CPU #4

  731 10:51:01.752266  Initializing CPU #2

  732 10:51:01.755226  CPU: vendor Intel device 906a4

  733 10:51:01.758686  CPU: family 06, model 9a, stepping 04

  734 10:51:01.762166  CPU: vendor Intel device 906a4

  735 10:51:01.765196  CPU: family 06, model 9a, stepping 04

  736 10:51:01.768878  Clearing out pending MCEs

  737 10:51:01.772109  Clearing out pending MCEs

  738 10:51:01.775117  CPU: vendor Intel device 906a4

  739 10:51:01.778751  CPU: family 06, model 9a, stepping 04

  740 10:51:01.781856  cpu: energy policy set to 7

  741 10:51:01.781940  cpu: energy policy set to 7

  742 10:51:01.785653  Clearing out pending MCEs

  743 10:51:01.791975  microcode: Update skipped, already up-to-date

  744 10:51:01.792060  CPU #4 initialized

  745 10:51:01.798463  microcode: Update skipped, already up-to-date

  746 10:51:01.798547  CPU #3 initialized

  747 10:51:01.802202  CPU: vendor Intel device 906a4

  748 10:51:01.805116  CPU: family 06, model 9a, stepping 04

  749 10:51:01.809056  Initializing CPU #5

  750 10:51:01.812070  Clearing out pending MCEs

  751 10:51:01.814973  cpu: energy policy set to 7

  752 10:51:01.815084  cpu: energy policy set to 7

  753 10:51:01.822381  microcode: Update skipped, already up-to-date

  754 10:51:01.822466  CPU #1 initialized

  755 10:51:01.825119  Initializing CPU #6

  756 10:51:01.828439  microcode: Update skipped, already up-to-date

  757 10:51:01.831815  CPU #2 initialized

  758 10:51:01.835350  CPU: vendor Intel device 906a4

  759 10:51:01.838387  CPU: family 06, model 9a, stepping 04

  760 10:51:01.841722  CPU: vendor Intel device 906a4

  761 10:51:01.845389  CPU: family 06, model 9a, stepping 04

  762 10:51:01.848362  Clearing out pending MCEs

  763 10:51:01.851902  Clearing out pending MCEs

  764 10:51:01.851986  Clearing out pending MCEs

  765 10:51:01.855075  cpu: energy policy set to 7

  766 10:51:01.858525  cpu: energy policy set to 7

  767 10:51:01.861610  cpu: energy policy set to 7

  768 10:51:01.865214  microcode: Update skipped, already up-to-date

  769 10:51:01.868573  CPU #6 initialized

  770 10:51:01.871625  microcode: Update skipped, already up-to-date

  771 10:51:01.875150  CPU #5 initialized

  772 10:51:01.878147  microcode: Update skipped, already up-to-date

  773 10:51:01.881972  CPU #7 initialized

  774 10:51:01.884970  bsp_do_flight_plan done after 693 msecs.

  775 10:51:01.888275  CPU: frequency set to 4400 MHz

  776 10:51:01.891869  Enabling SMIs.

  777 10:51:01.898531  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms

  778 10:51:01.913205  Probing TPM I2C: done! DID_VID 0x00281ae0

  779 10:51:01.916153  Locality already claimed

  780 10:51:01.919593  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  781 10:51:01.930586  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  782 10:51:01.934126  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  783 10:51:01.940777  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  784 10:51:01.947172  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  785 10:51:01.950547  Found a VBT of 9216 bytes after decompression

  786 10:51:01.953843  PCI  1.0, PIN A, using IRQ #16

  787 10:51:01.957327  PCI  2.0, PIN A, using IRQ #17

  788 10:51:01.960373  PCI  4.0, PIN A, using IRQ #18

  789 10:51:01.963899  PCI  5.0, PIN A, using IRQ #16

  790 10:51:01.967409  PCI  6.0, PIN A, using IRQ #16

  791 10:51:01.970395  PCI  6.2, PIN C, using IRQ #18

  792 10:51:01.973825  PCI  7.0, PIN A, using IRQ #19

  793 10:51:01.977222  PCI  7.1, PIN B, using IRQ #20

  794 10:51:01.980893  PCI  7.2, PIN C, using IRQ #21

  795 10:51:01.983873  PCI  7.3, PIN D, using IRQ #22

  796 10:51:01.987197  PCI  8.0, PIN A, using IRQ #23

  797 10:51:01.990635  PCI  D.0, PIN A, using IRQ #17

  798 10:51:01.993987  PCI  D.1, PIN B, using IRQ #19

  799 10:51:01.994072  PCI 10.0, PIN A, using IRQ #24

  800 10:51:01.997124  PCI 10.1, PIN B, using IRQ #25

  801 10:51:02.000567  PCI 10.6, PIN C, using IRQ #20

  802 10:51:02.003764  PCI 10.7, PIN D, using IRQ #21

  803 10:51:02.007352  PCI 11.0, PIN A, using IRQ #26

  804 10:51:02.010957  PCI 11.1, PIN B, using IRQ #27

  805 10:51:02.013722  PCI 11.2, PIN C, using IRQ #28

  806 10:51:02.017301  PCI 11.3, PIN D, using IRQ #29

  807 10:51:02.020355  PCI 12.0, PIN A, using IRQ #30

  808 10:51:02.023900  PCI 12.6, PIN B, using IRQ #31

  809 10:51:02.027308  PCI 12.7, PIN C, using IRQ #22

  810 10:51:02.030622  PCI 13.0, PIN A, using IRQ #32

  811 10:51:02.033800  PCI 13.1, PIN B, using IRQ #33

  812 10:51:02.036859  PCI 13.2, PIN C, using IRQ #34

  813 10:51:02.040418  PCI 13.3, PIN D, using IRQ #35

  814 10:51:02.043880  PCI 14.0, PIN B, using IRQ #23

  815 10:51:02.047035  PCI 14.1, PIN A, using IRQ #36

  816 10:51:02.047122  PCI 14.3, PIN C, using IRQ #17

  817 10:51:02.050081  PCI 15.0, PIN A, using IRQ #37

  818 10:51:02.053860  PCI 15.1, PIN B, using IRQ #38

  819 10:51:02.056897  PCI 15.2, PIN C, using IRQ #39

  820 10:51:02.060291  PCI 15.3, PIN D, using IRQ #40

  821 10:51:02.063537  PCI 16.0, PIN A, using IRQ #18

  822 10:51:02.066913  PCI 16.1, PIN B, using IRQ #19

  823 10:51:02.070493  PCI 16.2, PIN C, using IRQ #20

  824 10:51:02.073786  PCI 16.3, PIN D, using IRQ #21

  825 10:51:02.077104  PCI 16.4, PIN A, using IRQ #18

  826 10:51:02.080159  PCI 16.5, PIN B, using IRQ #19

  827 10:51:02.083634  PCI 17.0, PIN A, using IRQ #22

  828 10:51:02.087048  PCI 19.0, PIN A, using IRQ #41

  829 10:51:02.090516  PCI 19.1, PIN B, using IRQ #42

  830 10:51:02.094094  PCI 19.2, PIN C, using IRQ #43

  831 10:51:02.094209  PCI 1C.0, PIN A, using IRQ #16

  832 10:51:02.097077  PCI 1C.1, PIN B, using IRQ #17

  833 10:51:02.100686  PCI 1C.2, PIN C, using IRQ #18

  834 10:51:02.104155  PCI 1C.3, PIN D, using IRQ #19

  835 10:51:02.107262  PCI 1C.4, PIN A, using IRQ #16

  836 10:51:02.110284  PCI 1C.5, PIN B, using IRQ #17

  837 10:51:02.113644  PCI 1C.6, PIN C, using IRQ #18

  838 10:51:02.117198  PCI 1C.7, PIN D, using IRQ #19

  839 10:51:02.120712  PCI 1D.0, PIN A, using IRQ #16

  840 10:51:02.123703  PCI 1D.1, PIN B, using IRQ #17

  841 10:51:02.126957  PCI 1D.2, PIN C, using IRQ #18

  842 10:51:02.130678  PCI 1D.3, PIN D, using IRQ #19

  843 10:51:02.133923  PCI 1E.0, PIN A, using IRQ #23

  844 10:51:02.137511  PCI 1E.1, PIN B, using IRQ #20

  845 10:51:02.140760  PCI 1E.2, PIN C, using IRQ #44

  846 10:51:02.143735  PCI 1E.3, PIN D, using IRQ #45

  847 10:51:02.143822  PCI 1F.3, PIN B, using IRQ #22

  848 10:51:02.147205  PCI 1F.4, PIN C, using IRQ #23

  849 10:51:02.150646  PCI 1F.6, PIN D, using IRQ #20

  850 10:51:02.153549  PCI 1F.7, PIN A, using IRQ #21

  851 10:51:02.160448  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  852 10:51:02.166996  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  853 10:51:02.346328  FSPS returned 0

  854 10:51:02.350143  Executing Phase 1 of FspMultiPhaseSiInit

  855 10:51:02.360030  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  856 10:51:02.363331  port C0 DISC req: usage 1 usb3 1 usb2 1

  857 10:51:02.366896  Raw Buffer output 0 00000111

  858 10:51:02.370006  Raw Buffer output 1 00000000

  859 10:51:02.373640  pmc_send_ipc_cmd succeeded

  860 10:51:02.376960  port C1 DISC req: usage 1 usb3 3 usb2 3

  861 10:51:02.380368  Raw Buffer output 0 00000331

  862 10:51:02.383662  Raw Buffer output 1 00000000

  863 10:51:02.387353  pmc_send_ipc_cmd succeeded

  864 10:51:02.391177  Detected 6 core, 8 thread CPU.

  865 10:51:02.394588  Detected 6 core, 8 thread CPU.

  866 10:51:02.400032  Detected 6 core, 8 thread CPU.

  867 10:51:02.403362  Detected 6 core, 8 thread CPU.

  868 10:51:02.406641  Detected 6 core, 8 thread CPU.

  869 10:51:02.410126  Detected 6 core, 8 thread CPU.

  870 10:51:02.413866  Detected 6 core, 8 thread CPU.

  871 10:51:02.416618  Detected 6 core, 8 thread CPU.

  872 10:51:02.420372  Detected 6 core, 8 thread CPU.

  873 10:51:02.423218  Detected 6 core, 8 thread CPU.

  874 10:51:02.426679  Detected 6 core, 8 thread CPU.

  875 10:51:02.430033  Detected 6 core, 8 thread CPU.

  876 10:51:02.433359  Detected 6 core, 8 thread CPU.

  877 10:51:02.436548  Detected 6 core, 8 thread CPU.

  878 10:51:02.440262  Detected 6 core, 8 thread CPU.

  879 10:51:02.443710  Detected 6 core, 8 thread CPU.

  880 10:51:02.446738  Detected 6 core, 8 thread CPU.

  881 10:51:02.449861  Detected 6 core, 8 thread CPU.

  882 10:51:02.453637  Detected 6 core, 8 thread CPU.

  883 10:51:02.456702  Detected 6 core, 8 thread CPU.

  884 10:51:02.456815  Detected 6 core, 8 thread CPU.

  885 10:51:02.460058  Detected 6 core, 8 thread CPU.

  886 10:51:02.752688  Detected 6 core, 8 thread CPU.

  887 10:51:02.755869  Detected 6 core, 8 thread CPU.

  888 10:51:02.758990  Detected 6 core, 8 thread CPU.

  889 10:51:02.762465  Detected 6 core, 8 thread CPU.

  890 10:51:02.766372  Detected 6 core, 8 thread CPU.

  891 10:51:02.769331  Detected 6 core, 8 thread CPU.

  892 10:51:02.773348  Detected 6 core, 8 thread CPU.

  893 10:51:02.776196  Detected 6 core, 8 thread CPU.

  894 10:51:02.779065  Detected 6 core, 8 thread CPU.

  895 10:51:02.782474  Detected 6 core, 8 thread CPU.

  896 10:51:02.785823  Detected 6 core, 8 thread CPU.

  897 10:51:02.789550  Detected 6 core, 8 thread CPU.

  898 10:51:02.792859  Detected 6 core, 8 thread CPU.

  899 10:51:02.795807  Detected 6 core, 8 thread CPU.

  900 10:51:02.799265  Detected 6 core, 8 thread CPU.

  901 10:51:02.802669  Detected 6 core, 8 thread CPU.

  902 10:51:02.805672  Detected 6 core, 8 thread CPU.

  903 10:51:02.809398  Detected 6 core, 8 thread CPU.

  904 10:51:02.809488  Detected 6 core, 8 thread CPU.

  905 10:51:02.812499  Detected 6 core, 8 thread CPU.

  906 10:51:02.815972  Display FSP Version Info HOB

  907 10:51:02.819325  Reference Code - CPU = c.0.65.70

  908 10:51:02.822798  uCode Version = 0.0.4.23

  909 10:51:02.826307  TXT ACM version = ff.ff.ff.ffff

  910 10:51:02.829223  Reference Code - ME = c.0.65.70

  911 10:51:02.832633  MEBx version = 0.0.0.0

  912 10:51:02.835986  ME Firmware Version = Lite SKU

  913 10:51:02.839792  Reference Code - PCH = c.0.65.70

  914 10:51:02.842700  PCH-CRID Status = Disabled

  915 10:51:02.846090  PCH-CRID Original Value = ff.ff.ff.ffff

  916 10:51:02.849028  PCH-CRID New Value = ff.ff.ff.ffff

  917 10:51:02.852472  OPROM - RST - RAID = ff.ff.ff.ffff

  918 10:51:02.855945  PCH Hsio Version = 4.0.0.0

  919 10:51:02.859750  Reference Code - SA - System Agent = c.0.65.70

  920 10:51:02.862629  Reference Code - MRC = 0.0.3.80

  921 10:51:02.865711  SA - PCIe Version = c.0.65.70

  922 10:51:02.869190  SA-CRID Status = Disabled

  923 10:51:02.873099  SA-CRID Original Value = 0.0.0.4

  924 10:51:02.875871  SA-CRID New Value = 0.0.0.4

  925 10:51:02.879067  OPROM - VBIOS = ff.ff.ff.ffff

  926 10:51:02.882717  IO Manageability Engine FW Version = 24.0.4.0

  927 10:51:02.885999  PHY Build Version = 0.0.0.2016

  928 10:51:02.889410  Thunderbolt(TM) FW Version = 0.0.0.0

  929 10:51:02.895863  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  930 10:51:02.902780  BS: BS_DEV_INIT_CHIPS run times (exec / console): 490 / 507 ms

  931 10:51:02.902866  Enumerating buses...

  932 10:51:02.909150  Show all devs... Before device enumeration.

  933 10:51:02.909235  Root Device: enabled 1

  934 10:51:02.912626  CPU_CLUSTER: 0: enabled 1

  935 10:51:02.916026  DOMAIN: 0000: enabled 1

  936 10:51:02.919477  GPIO: 0: enabled 1

  937 10:51:02.919561  PCI: 00:00.0: enabled 1

  938 10:51:02.922542  PCI: 00:01.0: enabled 0

  939 10:51:02.926034  PCI: 00:01.1: enabled 0

  940 10:51:02.926119  PCI: 00:02.0: enabled 1

  941 10:51:02.929449  PCI: 00:04.0: enabled 1

  942 10:51:02.932531  PCI: 00:05.0: enabled 0

  943 10:51:02.935960  PCI: 00:06.0: enabled 1

  944 10:51:02.936044  PCI: 00:06.2: enabled 0

  945 10:51:02.939577  PCI: 00:07.0: enabled 0

  946 10:51:02.942499  PCI: 00:07.1: enabled 0

  947 10:51:02.945851  PCI: 00:07.2: enabled 0

  948 10:51:02.945935  PCI: 00:07.3: enabled 0

  949 10:51:02.949136  PCI: 00:08.0: enabled 0

  950 10:51:02.952674  PCI: 00:09.0: enabled 0

  951 10:51:02.955757  PCI: 00:0a.0: enabled 1

  952 10:51:02.955843  PCI: 00:0d.0: enabled 1

  953 10:51:02.959626  PCI: 00:0d.1: enabled 0

  954 10:51:02.962321  PCI: 00:0d.2: enabled 0

  955 10:51:02.962452  PCI: 00:0d.3: enabled 0

  956 10:51:02.966290  PCI: 00:0e.0: enabled 0

  957 10:51:02.969282  PCI: 00:10.0: enabled 0

  958 10:51:02.972443  PCI: 00:10.1: enabled 0

  959 10:51:02.972569  PCI: 00:10.6: enabled 0

  960 10:51:02.976093  PCI: 00:10.7: enabled 0

  961 10:51:02.979749  PCI: 00:12.0: enabled 0

  962 10:51:02.982595  PCI: 00:12.6: enabled 0

  963 10:51:02.982719  PCI: 00:12.7: enabled 0

  964 10:51:02.985958  PCI: 00:13.0: enabled 0

  965 10:51:02.989540  PCI: 00:14.0: enabled 1

  966 10:51:02.992504  PCI: 00:14.1: enabled 0

  967 10:51:02.992628  PCI: 00:14.2: enabled 1

  968 10:51:02.995830  PCI: 00:14.3: enabled 1

  969 10:51:02.999338  PCI: 00:15.0: enabled 1

  970 10:51:02.999463  PCI: 00:15.1: enabled 1

  971 10:51:03.002353  PCI: 00:15.2: enabled 0

  972 10:51:03.005827  PCI: 00:15.3: enabled 1

  973 10:51:03.009365  PCI: 00:16.0: enabled 1

  974 10:51:03.009449  PCI: 00:16.1: enabled 0

  975 10:51:03.012402  PCI: 00:16.2: enabled 0

  976 10:51:03.016134  PCI: 00:16.3: enabled 0

  977 10:51:03.018984  PCI: 00:16.4: enabled 0

  978 10:51:03.019114  PCI: 00:16.5: enabled 0

  979 10:51:03.022404  PCI: 00:17.0: enabled 1

  980 10:51:03.025872  PCI: 00:19.0: enabled 0

  981 10:51:03.029255  PCI: 00:19.1: enabled 1

  982 10:51:03.029364  PCI: 00:19.2: enabled 0

  983 10:51:03.032698  PCI: 00:1a.0: enabled 0

  984 10:51:03.035818  PCI: 00:1c.0: enabled 0

  985 10:51:03.035929  PCI: 00:1c.1: enabled 0

  986 10:51:03.039212  PCI: 00:1c.2: enabled 0

  987 10:51:03.042313  PCI: 00:1c.3: enabled 0

  988 10:51:03.045930  PCI: 00:1c.4: enabled 0

  989 10:51:03.046014  PCI: 00:1c.5: enabled 0

  990 10:51:03.049131  PCI: 00:1c.6: enabled 0

  991 10:51:03.052289  PCI: 00:1c.7: enabled 0

  992 10:51:03.055736  PCI: 00:1d.0: enabled 0

  993 10:51:03.055820  PCI: 00:1d.1: enabled 0

  994 10:51:03.059256  PCI: 00:1d.2: enabled 0

  995 10:51:03.062542  PCI: 00:1d.3: enabled 0

  996 10:51:03.065762  PCI: 00:1e.0: enabled 1

  997 10:51:03.065861  PCI: 00:1e.1: enabled 0

  998 10:51:03.069222  PCI: 00:1e.2: enabled 0

  999 10:51:03.072120  PCI: 00:1e.3: enabled 1

 1000 10:51:03.075469  PCI: 00:1f.0: enabled 1

 1001 10:51:03.075553  PCI: 00:1f.1: enabled 0

 1002 10:51:03.079388  PCI: 00:1f.2: enabled 1

 1003 10:51:03.082601  PCI: 00:1f.3: enabled 1

 1004 10:51:03.082684  PCI: 00:1f.4: enabled 0

 1005 10:51:03.085843  PCI: 00:1f.5: enabled 1

 1006 10:51:03.089009  PCI: 00:1f.6: enabled 0

 1007 10:51:03.092394  PCI: 00:1f.7: enabled 0

 1008 10:51:03.092478  GENERIC: 0.0: enabled 1

 1009 10:51:03.095457  GENERIC: 0.0: enabled 1

 1010 10:51:03.098842  GENERIC: 1.0: enabled 1

 1011 10:51:03.102176  GENERIC: 0.0: enabled 1

 1012 10:51:03.102261  GENERIC: 1.0: enabled 1

 1013 10:51:03.105721  USB0 port 0: enabled 1

 1014 10:51:03.109188  USB0 port 0: enabled 1

 1015 10:51:03.109271  GENERIC: 0.0: enabled 1

 1016 10:51:03.112285  I2C: 00:1a: enabled 1

 1017 10:51:03.115811  I2C: 00:31: enabled 1

 1018 10:51:03.115895  I2C: 00:32: enabled 1

 1019 10:51:03.118819  I2C: 00:50: enabled 1

 1020 10:51:03.122352  I2C: 00:10: enabled 1

 1021 10:51:03.122451  I2C: 00:15: enabled 1

 1022 10:51:03.126064  I2C: 00:2c: enabled 1

 1023 10:51:03.129170  GENERIC: 0.0: enabled 1

 1024 10:51:03.129255  SPI: 00: enabled 1

 1025 10:51:03.132258  PNP: 0c09.0: enabled 1

 1026 10:51:03.135751  GENERIC: 0.0: enabled 1

 1027 10:51:03.139178  USB3 port 0: enabled 1

 1028 10:51:03.139261  USB3 port 1: enabled 0

 1029 10:51:03.142506  USB3 port 2: enabled 1

 1030 10:51:03.145460  USB3 port 3: enabled 0

 1031 10:51:03.145543  USB2 port 0: enabled 1

 1032 10:51:03.148982  USB2 port 1: enabled 0

 1033 10:51:03.152206  USB2 port 2: enabled 1

 1034 10:51:03.155734  USB2 port 3: enabled 0

 1035 10:51:03.155822  USB2 port 4: enabled 0

 1036 10:51:03.159172  USB2 port 5: enabled 1

 1037 10:51:03.162530  USB2 port 6: enabled 0

 1038 10:51:03.162613  USB2 port 7: enabled 0

 1039 10:51:03.165601  USB2 port 8: enabled 1

 1040 10:51:03.169163  USB2 port 9: enabled 1

 1041 10:51:03.172450  USB3 port 0: enabled 1

 1042 10:51:03.172558  USB3 port 1: enabled 0

 1043 10:51:03.175420  USB3 port 2: enabled 0

 1044 10:51:03.179304  USB3 port 3: enabled 0

 1045 10:51:03.179387  GENERIC: 0.0: enabled 1

 1046 10:51:03.182606  GENERIC: 1.0: enabled 1

 1047 10:51:03.185630  APIC: 00: enabled 1

 1048 10:51:03.185713  APIC: 14: enabled 1

 1049 10:51:03.188904  APIC: 16: enabled 1

 1050 10:51:03.192943  APIC: 10: enabled 1

 1051 10:51:03.193026  APIC: 12: enabled 1

 1052 10:51:03.195603  APIC: 09: enabled 1

 1053 10:51:03.195686  APIC: 08: enabled 1

 1054 10:51:03.199265  APIC: 01: enabled 1

 1055 10:51:03.202228  Compare with tree...

 1056 10:51:03.202311  Root Device: enabled 1

 1057 10:51:03.205837   CPU_CLUSTER: 0: enabled 1

 1058 10:51:03.209272    APIC: 00: enabled 1

 1059 10:51:03.212349    APIC: 14: enabled 1

 1060 10:51:03.212431    APIC: 16: enabled 1

 1061 10:51:03.215689    APIC: 10: enabled 1

 1062 10:51:03.219169    APIC: 12: enabled 1

 1063 10:51:03.219252    APIC: 09: enabled 1

 1064 10:51:03.222433    APIC: 08: enabled 1

 1065 10:51:03.225669    APIC: 01: enabled 1

 1066 10:51:03.225751   DOMAIN: 0000: enabled 1

 1067 10:51:03.229048    GPIO: 0: enabled 1

 1068 10:51:03.232310    PCI: 00:00.0: enabled 1

 1069 10:51:03.236182    PCI: 00:01.0: enabled 0

 1070 10:51:03.236266    PCI: 00:01.1: enabled 0

 1071 10:51:03.238783    PCI: 00:02.0: enabled 1

 1072 10:51:03.242330    PCI: 00:04.0: enabled 1

 1073 10:51:03.245588     GENERIC: 0.0: enabled 1

 1074 10:51:03.249038    PCI: 00:05.0: enabled 0

 1075 10:51:03.249121    PCI: 00:06.0: enabled 1

 1076 10:51:03.252514    PCI: 00:06.2: enabled 0

 1077 10:51:03.256033    PCI: 00:08.0: enabled 0

 1078 10:51:03.258726    PCI: 00:09.0: enabled 0

 1079 10:51:03.258832    PCI: 00:0a.0: enabled 1

 1080 10:51:03.262150    PCI: 00:0d.0: enabled 1

 1081 10:51:03.266098     USB0 port 0: enabled 1

 1082 10:51:03.268795      USB3 port 0: enabled 1

 1083 10:51:03.272598      USB3 port 1: enabled 0

 1084 10:51:03.275765      USB3 port 2: enabled 1

 1085 10:51:03.275849      USB3 port 3: enabled 0

 1086 10:51:03.279191    PCI: 00:0d.1: enabled 0

 1087 10:51:03.282904    PCI: 00:0d.2: enabled 0

 1088 10:51:03.285542    PCI: 00:0d.3: enabled 0

 1089 10:51:03.288917    PCI: 00:0e.0: enabled 0

 1090 10:51:03.289002    PCI: 00:10.0: enabled 0

 1091 10:51:03.292382    PCI: 00:10.1: enabled 0

 1092 10:51:03.295935    PCI: 00:10.6: enabled 0

 1093 10:51:03.299183    PCI: 00:10.7: enabled 0

 1094 10:51:03.299267    PCI: 00:12.0: enabled 0

 1095 10:51:03.302301    PCI: 00:12.6: enabled 0

 1096 10:51:03.305803    PCI: 00:12.7: enabled 0

 1097 10:51:03.308685    PCI: 00:13.0: enabled 0

 1098 10:51:03.312425    PCI: 00:14.0: enabled 1

 1099 10:51:03.312509     USB0 port 0: enabled 1

 1100 10:51:03.315431      USB2 port 0: enabled 1

 1101 10:51:03.318857      USB2 port 1: enabled 0

 1102 10:51:03.322523      USB2 port 2: enabled 1

 1103 10:51:03.326015      USB2 port 3: enabled 0

 1104 10:51:03.329146      USB2 port 4: enabled 0

 1105 10:51:03.329231      USB2 port 5: enabled 1

 1106 10:51:03.332542      USB2 port 6: enabled 0

 1107 10:51:03.335825      USB2 port 7: enabled 0

 1108 10:51:03.338864      USB2 port 8: enabled 1

 1109 10:51:03.342252      USB2 port 9: enabled 1

 1110 10:51:03.342336      USB3 port 0: enabled 1

 1111 10:51:03.345697      USB3 port 1: enabled 0

 1112 10:51:03.348656      USB3 port 2: enabled 0

 1113 10:51:03.352155      USB3 port 3: enabled 0

 1114 10:51:03.355554    PCI: 00:14.1: enabled 0

 1115 10:51:03.358805    PCI: 00:14.2: enabled 1

 1116 10:51:03.358888    PCI: 00:14.3: enabled 1

 1117 10:51:03.362368     GENERIC: 0.0: enabled 1

 1118 10:51:03.365533    PCI: 00:15.0: enabled 1

 1119 10:51:03.369007     I2C: 00:1a: enabled 1

 1120 10:51:03.369090     I2C: 00:31: enabled 1

 1121 10:51:03.372116     I2C: 00:32: enabled 1

 1122 10:51:03.375426    PCI: 00:15.1: enabled 1

 1123 10:51:03.379076     I2C: 00:50: enabled 1

 1124 10:51:03.382284    PCI: 00:15.2: enabled 0

 1125 10:51:03.382367    PCI: 00:15.3: enabled 1

 1126 10:51:03.385683     I2C: 00:10: enabled 1

 1127 10:51:03.388699    PCI: 00:16.0: enabled 1

 1128 10:51:03.392295    PCI: 00:16.1: enabled 0

 1129 10:51:03.395854    PCI: 00:16.2: enabled 0

 1130 10:51:03.395936    PCI: 00:16.3: enabled 0

 1131 10:51:03.398871    PCI: 00:16.4: enabled 0

 1132 10:51:03.402176    PCI: 00:16.5: enabled 0

 1133 10:51:03.405612    PCI: 00:17.0: enabled 1

 1134 10:51:03.405711    PCI: 00:19.0: enabled 0

 1135 10:51:03.408655    PCI: 00:19.1: enabled 1

 1136 10:51:03.412036     I2C: 00:15: enabled 1

 1137 10:51:03.415347     I2C: 00:2c: enabled 1

 1138 10:51:03.418686    PCI: 00:19.2: enabled 0

 1139 10:51:03.418770    PCI: 00:1a.0: enabled 0

 1140 10:51:03.422060    PCI: 00:1e.0: enabled 1

 1141 10:51:03.425291    PCI: 00:1e.1: enabled 0

 1142 10:51:03.428905    PCI: 00:1e.2: enabled 0

 1143 10:51:03.431954    PCI: 00:1e.3: enabled 1

 1144 10:51:03.432038     SPI: 00: enabled 1

 1145 10:51:03.435388    PCI: 00:1f.0: enabled 1

 1146 10:51:03.438717     PNP: 0c09.0: enabled 1

 1147 10:51:03.441952    PCI: 00:1f.1: enabled 0

 1148 10:51:03.442037    PCI: 00:1f.2: enabled 1

 1149 10:51:03.445697     GENERIC: 0.0: enabled 1

 1150 10:51:03.448978      GENERIC: 0.0: enabled 1

 1151 10:51:03.452181      GENERIC: 1.0: enabled 1

 1152 10:51:03.455182    PCI: 00:1f.3: enabled 1

 1153 10:51:03.458662    PCI: 00:1f.4: enabled 0

 1154 10:51:03.458745    PCI: 00:1f.5: enabled 1

 1155 10:51:03.462530    PCI: 00:1f.6: enabled 0

 1156 10:51:03.465446    PCI: 00:1f.7: enabled 0

 1157 10:51:03.469014  Root Device scanning...

 1158 10:51:03.472121  scan_static_bus for Root Device

 1159 10:51:03.472216  CPU_CLUSTER: 0 enabled

 1160 10:51:03.475372  DOMAIN: 0000 enabled

 1161 10:51:03.478533  DOMAIN: 0000 scanning...

 1162 10:51:03.481728  PCI: pci_scan_bus for bus 00

 1163 10:51:03.481811  PCI: 00:00.0 [8086/0000] ops

 1164 10:51:03.485078  PCI: 00:00.0 [8086/4609] enabled

 1165 10:51:03.488962  PCI: 00:02.0 [8086/0000] bus ops

 1166 10:51:03.492017  PCI: 00:02.0 [8086/46b3] enabled

 1167 10:51:03.495430  PCI: 00:04.0 [8086/0000] bus ops

 1168 10:51:03.498832  PCI: 00:04.0 [8086/461d] enabled

 1169 10:51:03.502263  PCI: 00:06.0 [8086/0000] bus ops

 1170 10:51:03.505404  PCI: 00:06.0 [8086/464d] enabled

 1171 10:51:03.512311  PCI: 00:08.0 [8086/464f] disabled

 1172 10:51:03.515562  PCI: 00:0a.0 [8086/467d] enabled

 1173 10:51:03.518954  PCI: 00:0d.0 [8086/0000] bus ops

 1174 10:51:03.522027  PCI: 00:0d.0 [8086/461e] enabled

 1175 10:51:03.525550  PCI: 00:14.0 [8086/0000] bus ops

 1176 10:51:03.528551  PCI: 00:14.0 [8086/51ed] enabled

 1177 10:51:03.532144  PCI: 00:14.2 [8086/51ef] enabled

 1178 10:51:03.535268  PCI: 00:14.3 [8086/0000] bus ops

 1179 10:51:03.539005  PCI: 00:14.3 [8086/51f0] enabled

 1180 10:51:03.542360  PCI: 00:15.0 [8086/0000] bus ops

 1181 10:51:03.545317  PCI: 00:15.0 [8086/51e8] enabled

 1182 10:51:03.548781  PCI: 00:15.1 [8086/0000] bus ops

 1183 10:51:03.552109  PCI: 00:15.1 [8086/51e9] enabled

 1184 10:51:03.555585  PCI: 00:15.2 [8086/0000] bus ops

 1185 10:51:03.558668  PCI: 00:15.2 [8086/51ea] disabled

 1186 10:51:03.562051  PCI: 00:15.3 [8086/0000] bus ops

 1187 10:51:03.565608  PCI: 00:15.3 [8086/51eb] enabled

 1188 10:51:03.568652  PCI: 00:16.0 [8086/0000] ops

 1189 10:51:03.571972  PCI: 00:16.0 [8086/51e0] enabled

 1190 10:51:03.575340  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1191 10:51:03.578862  PCI: 00:19.0 [8086/0000] bus ops

 1192 10:51:03.582129  PCI: 00:19.0 [8086/51c5] disabled

 1193 10:51:03.585234  PCI: 00:19.1 [8086/0000] bus ops

 1194 10:51:03.588648  PCI: 00:19.1 [8086/51c6] enabled

 1195 10:51:03.592119  PCI: 00:1e.0 [8086/0000] ops

 1196 10:51:03.595398  PCI: 00:1e.0 [8086/51a8] enabled

 1197 10:51:03.598912  PCI: 00:1e.3 [8086/0000] bus ops

 1198 10:51:03.602412  PCI: 00:1e.3 [8086/51ab] enabled

 1199 10:51:03.605455  PCI: 00:1f.0 [8086/0000] bus ops

 1200 10:51:03.608601  PCI: 00:1f.0 [8086/5182] enabled

 1201 10:51:03.612561  RTC Init

 1202 10:51:03.616314  Set power on after power failure.

 1203 10:51:03.619692  Disabling Deep S3

 1204 10:51:03.619793  Disabling Deep S3

 1205 10:51:03.622748  Disabling Deep S4

 1206 10:51:03.622832  Disabling Deep S4

 1207 10:51:03.626251  Disabling Deep S5

 1208 10:51:03.626380  Disabling Deep S5

 1209 10:51:03.629642  PCI: 00:1f.2 [0000/0000] hidden

 1210 10:51:03.632887  PCI: 00:1f.3 [8086/0000] bus ops

 1211 10:51:03.635857  PCI: 00:1f.3 [8086/51c8] enabled

 1212 10:51:03.639323  PCI: 00:1f.5 [8086/0000] bus ops

 1213 10:51:03.642822  PCI: 00:1f.5 [8086/51a4] enabled

 1214 10:51:03.646134  GPIO: 0 enabled

 1215 10:51:03.649219  PCI: Leftover static devices:

 1216 10:51:03.649303  PCI: 00:01.0

 1217 10:51:03.652908  PCI: 00:01.1

 1218 10:51:03.652992  PCI: 00:05.0

 1219 10:51:03.653058  PCI: 00:06.2

 1220 10:51:03.656126  PCI: 00:09.0

 1221 10:51:03.656209  PCI: 00:0d.1

 1222 10:51:03.659642  PCI: 00:0d.2

 1223 10:51:03.659726  PCI: 00:0d.3

 1224 10:51:03.659792  PCI: 00:0e.0

 1225 10:51:03.662814  PCI: 00:10.0

 1226 10:51:03.662898  PCI: 00:10.1

 1227 10:51:03.666283  PCI: 00:10.6

 1228 10:51:03.666366  PCI: 00:10.7

 1229 10:51:03.666432  PCI: 00:12.0

 1230 10:51:03.669610  PCI: 00:12.6

 1231 10:51:03.669693  PCI: 00:12.7

 1232 10:51:03.672963  PCI: 00:13.0

 1233 10:51:03.673047  PCI: 00:14.1

 1234 10:51:03.676197  PCI: 00:16.1

 1235 10:51:03.676280  PCI: 00:16.2

 1236 10:51:03.676346  PCI: 00:16.3

 1237 10:51:03.679545  PCI: 00:16.4

 1238 10:51:03.679628  PCI: 00:16.5

 1239 10:51:03.682602  PCI: 00:17.0

 1240 10:51:03.682686  PCI: 00:19.2

 1241 10:51:03.682752  PCI: 00:1a.0

 1242 10:51:03.686149  PCI: 00:1e.1

 1243 10:51:03.686233  PCI: 00:1e.2

 1244 10:51:03.689559  PCI: 00:1f.1

 1245 10:51:03.689643  PCI: 00:1f.4

 1246 10:51:03.689710  PCI: 00:1f.6

 1247 10:51:03.692626  PCI: 00:1f.7

 1248 10:51:03.695974  PCI: Check your devicetree.cb.

 1249 10:51:03.699291  PCI: 00:02.0 scanning...

 1250 10:51:03.702444  scan_generic_bus for PCI: 00:02.0

 1251 10:51:03.706046  scan_generic_bus for PCI: 00:02.0 done

 1252 10:51:03.709022  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1253 10:51:03.712586  PCI: 00:04.0 scanning...

 1254 10:51:03.715737  scan_generic_bus for PCI: 00:04.0

 1255 10:51:03.719577  GENERIC: 0.0 enabled

 1256 10:51:03.722368  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1257 10:51:03.729262  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1258 10:51:03.732786  PCI: 00:06.0 scanning...

 1259 10:51:03.736149  do_pci_scan_bridge for PCI: 00:06.0

 1260 10:51:03.739110  PCI: pci_scan_bus for bus 01

 1261 10:51:03.742656  PCI: 01:00.0 [15b7/5009] enabled

 1262 10:51:03.745833  Enabling Common Clock Configuration

 1263 10:51:03.749311  L1 Sub-State supported from root port 6

 1264 10:51:03.752974  L1 Sub-State Support = 0x5

 1265 10:51:03.755796  CommonModeRestoreTime = 0x6e

 1266 10:51:03.759199  Power On Value = 0x5, Power On Scale = 0x2

 1267 10:51:03.759283  ASPM: Enabled L1

 1268 10:51:03.765646  PCIe: Max_Payload_Size adjusted to 256

 1269 10:51:03.765730  PCI: 01:00.0: Enabled LTR

 1270 10:51:03.772358  PCI: 01:00.0: Programmed LTR max latencies

 1271 10:51:03.775957  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1272 10:51:03.779022  PCI: 00:0d.0 scanning...

 1273 10:51:03.782770  scan_static_bus for PCI: 00:0d.0

 1274 10:51:03.785785  USB0 port 0 enabled

 1275 10:51:03.785869  USB0 port 0 scanning...

 1276 10:51:03.788867  scan_static_bus for USB0 port 0

 1277 10:51:03.792224  USB3 port 0 enabled

 1278 10:51:03.795479  USB3 port 1 disabled

 1279 10:51:03.795587  USB3 port 2 enabled

 1280 10:51:03.798828  USB3 port 3 disabled

 1281 10:51:03.802451  USB3 port 0 scanning...

 1282 10:51:03.805458  scan_static_bus for USB3 port 0

 1283 10:51:03.808951  scan_static_bus for USB3 port 0 done

 1284 10:51:03.811995  scan_bus: bus USB3 port 0 finished in 6 msecs

 1285 10:51:03.815676  USB3 port 2 scanning...

 1286 10:51:03.819088  scan_static_bus for USB3 port 2

 1287 10:51:03.821975  scan_static_bus for USB3 port 2 done

 1288 10:51:03.825396  scan_bus: bus USB3 port 2 finished in 6 msecs

 1289 10:51:03.828745  scan_static_bus for USB0 port 0 done

 1290 10:51:03.835957  scan_bus: bus USB0 port 0 finished in 43 msecs

 1291 10:51:03.839178  scan_static_bus for PCI: 00:0d.0 done

 1292 10:51:03.842214  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1293 10:51:03.845644  PCI: 00:14.0 scanning...

 1294 10:51:03.848939  scan_static_bus for PCI: 00:14.0

 1295 10:51:03.852292  USB0 port 0 enabled

 1296 10:51:03.852411  USB0 port 0 scanning...

 1297 10:51:03.855811  scan_static_bus for USB0 port 0

 1298 10:51:03.858992  USB2 port 0 enabled

 1299 10:51:03.861967  USB2 port 1 disabled

 1300 10:51:03.862089  USB2 port 2 enabled

 1301 10:51:03.865444  USB2 port 3 disabled

 1302 10:51:03.868854  USB2 port 4 disabled

 1303 10:51:03.868976  USB2 port 5 enabled

 1304 10:51:03.872209  USB2 port 6 disabled

 1305 10:51:03.875285  USB2 port 7 disabled

 1306 10:51:03.875405  USB2 port 8 enabled

 1307 10:51:03.878985  USB2 port 9 enabled

 1308 10:51:03.879106  USB3 port 0 enabled

 1309 10:51:03.882245  USB3 port 1 disabled

 1310 10:51:03.885288  USB3 port 2 disabled

 1311 10:51:03.885413  USB3 port 3 disabled

 1312 10:51:03.888905  USB2 port 0 scanning...

 1313 10:51:03.892096  scan_static_bus for USB2 port 0

 1314 10:51:03.895315  scan_static_bus for USB2 port 0 done

 1315 10:51:03.898707  scan_bus: bus USB2 port 0 finished in 6 msecs

 1316 10:51:03.902000  USB2 port 2 scanning...

 1317 10:51:03.905328  scan_static_bus for USB2 port 2

 1318 10:51:03.908763  scan_static_bus for USB2 port 2 done

 1319 10:51:03.915277  scan_bus: bus USB2 port 2 finished in 6 msecs

 1320 10:51:03.915360  USB2 port 5 scanning...

 1321 10:51:03.918680  scan_static_bus for USB2 port 5

 1322 10:51:03.922431  scan_static_bus for USB2 port 5 done

 1323 10:51:03.929007  scan_bus: bus USB2 port 5 finished in 6 msecs

 1324 10:51:03.932139  USB2 port 8 scanning...

 1325 10:51:03.935334  scan_static_bus for USB2 port 8

 1326 10:51:03.938802  scan_static_bus for USB2 port 8 done

 1327 10:51:03.941959  scan_bus: bus USB2 port 8 finished in 6 msecs

 1328 10:51:03.945798  USB2 port 9 scanning...

 1329 10:51:03.948646  scan_static_bus for USB2 port 9

 1330 10:51:03.952189  scan_static_bus for USB2 port 9 done

 1331 10:51:03.955449  scan_bus: bus USB2 port 9 finished in 6 msecs

 1332 10:51:03.959206  USB3 port 0 scanning...

 1333 10:51:03.962378  scan_static_bus for USB3 port 0

 1334 10:51:03.965237  scan_static_bus for USB3 port 0 done

 1335 10:51:03.968797  scan_bus: bus USB3 port 0 finished in 6 msecs

 1336 10:51:03.975405  scan_static_bus for USB0 port 0 done

 1337 10:51:03.978631  scan_bus: bus USB0 port 0 finished in 120 msecs

 1338 10:51:03.982359  scan_static_bus for PCI: 00:14.0 done

 1339 10:51:03.988973  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1340 10:51:03.989056  PCI: 00:14.3 scanning...

 1341 10:51:03.992025  scan_static_bus for PCI: 00:14.3

 1342 10:51:03.995639  GENERIC: 0.0 enabled

 1343 10:51:03.998511  scan_static_bus for PCI: 00:14.3 done

 1344 10:51:04.005528  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1345 10:51:04.005611  PCI: 00:15.0 scanning...

 1346 10:51:04.008660  scan_static_bus for PCI: 00:15.0

 1347 10:51:04.012118  I2C: 00:1a enabled

 1348 10:51:04.015496  I2C: 00:31 enabled

 1349 10:51:04.015578  I2C: 00:32 enabled

 1350 10:51:04.018679  scan_static_bus for PCI: 00:15.0 done

 1351 10:51:04.025147  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1352 10:51:04.025231  PCI: 00:15.1 scanning...

 1353 10:51:04.028720  scan_static_bus for PCI: 00:15.1

 1354 10:51:04.031963  I2C: 00:50 enabled

 1355 10:51:04.035279  scan_static_bus for PCI: 00:15.1 done

 1356 10:51:04.041793  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1357 10:51:04.041876  PCI: 00:15.3 scanning...

 1358 10:51:04.045385  scan_static_bus for PCI: 00:15.3

 1359 10:51:04.048729  I2C: 00:10 enabled

 1360 10:51:04.052027  scan_static_bus for PCI: 00:15.3 done

 1361 10:51:04.055229  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1362 10:51:04.058571  PCI: 00:19.1 scanning...

 1363 10:51:04.061813  scan_static_bus for PCI: 00:19.1

 1364 10:51:04.065046  I2C: 00:15 enabled

 1365 10:51:04.065129  I2C: 00:2c enabled

 1366 10:51:04.071730  scan_static_bus for PCI: 00:19.1 done

 1367 10:51:04.075407  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1368 10:51:04.078364  PCI: 00:1e.3 scanning...

 1369 10:51:04.081691  scan_generic_bus for PCI: 00:1e.3

 1370 10:51:04.081775  SPI: 00 enabled

 1371 10:51:04.088567  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1372 10:51:04.094990  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1373 10:51:04.095075  PCI: 00:1f.0 scanning...

 1374 10:51:04.098760  scan_static_bus for PCI: 00:1f.0

 1375 10:51:04.101989  PNP: 0c09.0 enabled

 1376 10:51:04.104943  PNP: 0c09.0 scanning...

 1377 10:51:04.108823  scan_static_bus for PNP: 0c09.0

 1378 10:51:04.111867  scan_static_bus for PNP: 0c09.0 done

 1379 10:51:04.114970  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1380 10:51:04.118528  scan_static_bus for PCI: 00:1f.0 done

 1381 10:51:04.124917  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1382 10:51:04.125041  PCI: 00:1f.2 scanning...

 1383 10:51:04.128285  scan_static_bus for PCI: 00:1f.2

 1384 10:51:04.131809  GENERIC: 0.0 enabled

 1385 10:51:04.135119  GENERIC: 0.0 scanning...

 1386 10:51:04.138502  scan_static_bus for GENERIC: 0.0

 1387 10:51:04.138596  GENERIC: 0.0 enabled

 1388 10:51:04.141798  GENERIC: 1.0 enabled

 1389 10:51:04.145219  scan_static_bus for GENERIC: 0.0 done

 1390 10:51:04.151796  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1391 10:51:04.155322  scan_static_bus for PCI: 00:1f.2 done

 1392 10:51:04.158511  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1393 10:51:04.161810  PCI: 00:1f.3 scanning...

 1394 10:51:04.165497  scan_static_bus for PCI: 00:1f.3

 1395 10:51:04.168658  scan_static_bus for PCI: 00:1f.3 done

 1396 10:51:04.174783  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1397 10:51:04.174869  PCI: 00:1f.5 scanning...

 1398 10:51:04.178378  scan_generic_bus for PCI: 00:1f.5

 1399 10:51:04.184693  scan_generic_bus for PCI: 00:1f.5 done

 1400 10:51:04.188064  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1401 10:51:04.194789  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1402 10:51:04.198004  scan_static_bus for Root Device done

 1403 10:51:04.201943  scan_bus: bus Root Device finished in 729 msecs

 1404 10:51:04.202027  done

 1405 10:51:04.207994  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms

 1406 10:51:04.214604  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1407 10:51:04.221480  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1408 10:51:04.224563  SPI flash protection: WPSW=0 SRP0=0

 1409 10:51:04.228109  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1410 10:51:04.234767  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1411 10:51:04.237969  found VGA at PCI: 00:02.0

 1412 10:51:04.241078  Setting up VGA for PCI: 00:02.0

 1413 10:51:04.244639  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1414 10:51:04.251272  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1415 10:51:04.254692  Allocating resources...

 1416 10:51:04.254776  Reading resources...

 1417 10:51:04.257749  Root Device read_resources bus 0 link: 0

 1418 10:51:04.264390  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1419 10:51:04.268106  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1420 10:51:04.274899  DOMAIN: 0000 read_resources bus 0 link: 0

 1421 10:51:04.277746  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1422 10:51:04.284428  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1423 10:51:04.290973  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1424 10:51:04.297583  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1425 10:51:04.304212  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1426 10:51:04.311034  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1427 10:51:04.317936  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1428 10:51:04.324131  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1429 10:51:04.327570  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1430 10:51:04.337911  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1431 10:51:04.340943  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1432 10:51:04.347761  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1433 10:51:04.354308  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1434 10:51:04.361058  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1435 10:51:04.367517  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1436 10:51:04.374324  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1437 10:51:04.381104  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1438 10:51:04.387420  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1439 10:51:04.394165  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1440 10:51:04.400794  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1441 10:51:04.404026  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1442 10:51:04.410681  PCI: 00:04.0 read_resources bus 1 link: 0

 1443 10:51:04.414160  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1444 10:51:04.417764  PCI: 00:06.0 read_resources bus 1 link: 0

 1445 10:51:04.423943  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1446 10:51:04.427184  PCI: 00:0d.0 read_resources bus 0 link: 0

 1447 10:51:04.430662  USB0 port 0 read_resources bus 0 link: 0

 1448 10:51:04.437132  USB0 port 0 read_resources bus 0 link: 0 done

 1449 10:51:04.440441  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1450 10:51:04.443830  PCI: 00:14.0 read_resources bus 0 link: 0

 1451 10:51:04.450732  USB0 port 0 read_resources bus 0 link: 0

 1452 10:51:04.453780  USB0 port 0 read_resources bus 0 link: 0 done

 1453 10:51:04.457318  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1454 10:51:04.463913  PCI: 00:14.3 read_resources bus 0 link: 0

 1455 10:51:04.467456  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1456 10:51:04.470360  PCI: 00:15.0 read_resources bus 0 link: 0

 1457 10:51:04.477480  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1458 10:51:04.480596  PCI: 00:15.1 read_resources bus 0 link: 0

 1459 10:51:04.487341  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1460 10:51:04.490807  PCI: 00:15.3 read_resources bus 0 link: 0

 1461 10:51:04.494142  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1462 10:51:04.500703  PCI: 00:19.1 read_resources bus 0 link: 0

 1463 10:51:04.504008  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1464 10:51:04.507752  PCI: 00:1e.3 read_resources bus 2 link: 0

 1465 10:51:04.514061  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1466 10:51:04.517608  PCI: 00:1f.0 read_resources bus 0 link: 0

 1467 10:51:04.520517  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1468 10:51:04.527386  PCI: 00:1f.2 read_resources bus 0 link: 0

 1469 10:51:04.530784  GENERIC: 0.0 read_resources bus 0 link: 0

 1470 10:51:04.533822  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1471 10:51:04.541033  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1472 10:51:04.543989  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1473 10:51:04.550685  Root Device read_resources bus 0 link: 0 done

 1474 10:51:04.550769  Done reading resources.

 1475 10:51:04.557371  Show resources in subtree (Root Device)...After reading.

 1476 10:51:04.561006   Root Device child on link 0 CPU_CLUSTER: 0

 1477 10:51:04.567646    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1478 10:51:04.567730     APIC: 00

 1479 10:51:04.567795     APIC: 14

 1480 10:51:04.571030     APIC: 16

 1481 10:51:04.571113     APIC: 10

 1482 10:51:04.574164     APIC: 12

 1483 10:51:04.574248     APIC: 09

 1484 10:51:04.574313     APIC: 08

 1485 10:51:04.577567     APIC: 01

 1486 10:51:04.580653    DOMAIN: 0000 child on link 0 GPIO: 0

 1487 10:51:04.590957    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1488 10:51:04.601163    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1489 10:51:04.601248     GPIO: 0

 1490 10:51:04.601314     PCI: 00:00.0

 1491 10:51:04.611249     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1492 10:51:04.620894     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1493 10:51:04.630712     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1494 10:51:04.640732     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1495 10:51:04.650645     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1496 10:51:04.657247     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1497 10:51:04.667146     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1498 10:51:04.677023     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1499 10:51:04.687228     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1500 10:51:04.697085     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1501 10:51:04.706851     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1502 10:51:04.716749     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1503 10:51:04.723468     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1504 10:51:04.733509     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1505 10:51:04.743609     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1506 10:51:04.753620     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1507 10:51:04.763504     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1508 10:51:04.773406     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1509 10:51:04.783061     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1510 10:51:04.789851     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1511 10:51:04.800071     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1512 10:51:04.810183     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1513 10:51:04.819908     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1514 10:51:04.830016     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1515 10:51:04.840396     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1516 10:51:04.849992     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1517 10:51:04.856762     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1518 10:51:04.866364     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1519 10:51:04.870018     PCI: 00:02.0

 1520 10:51:04.879637     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1521 10:51:04.890247     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1522 10:51:04.899906     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1523 10:51:04.903316     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1524 10:51:04.913329     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1525 10:51:04.913461      GENERIC: 0.0

 1526 10:51:04.919992     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1527 10:51:04.927039     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1528 10:51:04.936596     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1529 10:51:04.946464     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1530 10:51:04.949923      PCI: 01:00.0

 1531 10:51:04.960202      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1532 10:51:04.970066      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1533 10:51:04.970151     PCI: 00:08.0

 1534 10:51:04.972954     PCI: 00:0a.0

 1535 10:51:04.983050     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1536 10:51:04.986508     PCI: 00:0d.0 child on link 0 USB0 port 0

 1537 10:51:04.996643     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1538 10:51:04.999854      USB0 port 0 child on link 0 USB3 port 0

 1539 10:51:05.003244       USB3 port 0

 1540 10:51:05.003327       USB3 port 1

 1541 10:51:05.006628       USB3 port 2

 1542 10:51:05.006712       USB3 port 3

 1543 10:51:05.013427     PCI: 00:14.0 child on link 0 USB0 port 0

 1544 10:51:05.023294     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1545 10:51:05.026430      USB0 port 0 child on link 0 USB2 port 0

 1546 10:51:05.029801       USB2 port 0

 1547 10:51:05.029884       USB2 port 1

 1548 10:51:05.033252       USB2 port 2

 1549 10:51:05.033335       USB2 port 3

 1550 10:51:05.036952       USB2 port 4

 1551 10:51:05.037036       USB2 port 5

 1552 10:51:05.039782       USB2 port 6

 1553 10:51:05.039865       USB2 port 7

 1554 10:51:05.043478       USB2 port 8

 1555 10:51:05.043561       USB2 port 9

 1556 10:51:05.046652       USB3 port 0

 1557 10:51:05.046736       USB3 port 1

 1558 10:51:05.050023       USB3 port 2

 1559 10:51:05.050106       USB3 port 3

 1560 10:51:05.053159     PCI: 00:14.2

 1561 10:51:05.063486     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1562 10:51:05.073322     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1563 10:51:05.076672     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1564 10:51:05.086726     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1565 10:51:05.089881      GENERIC: 0.0

 1566 10:51:05.093397     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1567 10:51:05.103569     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1568 10:51:05.103653      I2C: 00:1a

 1569 10:51:05.107197      I2C: 00:31

 1570 10:51:05.107280      I2C: 00:32

 1571 10:51:05.113537     PCI: 00:15.1 child on link 0 I2C: 00:50

 1572 10:51:05.123671     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1573 10:51:05.123756      I2C: 00:50

 1574 10:51:05.126949     PCI: 00:15.2

 1575 10:51:05.130148     PCI: 00:15.3 child on link 0 I2C: 00:10

 1576 10:51:05.140022     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1577 10:51:05.140107      I2C: 00:10

 1578 10:51:05.143464     PCI: 00:16.0

 1579 10:51:05.153366     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1580 10:51:05.153449     PCI: 00:19.0

 1581 10:51:05.160564     PCI: 00:19.1 child on link 0 I2C: 00:15

 1582 10:51:05.170126     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1583 10:51:05.170234      I2C: 00:15

 1584 10:51:05.173534      I2C: 00:2c

 1585 10:51:05.173616     PCI: 00:1e.0

 1586 10:51:05.183526     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1587 10:51:05.189840     PCI: 00:1e.3 child on link 0 SPI: 00

 1588 10:51:05.200070     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1589 10:51:05.200182      SPI: 00

 1590 10:51:05.203047     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1591 10:51:05.213168     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1592 10:51:05.213253      PNP: 0c09.0

 1593 10:51:05.223169      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1594 10:51:05.226525     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1595 10:51:05.236644     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1596 10:51:05.246530     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1597 10:51:05.249959      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1598 10:51:05.253294       GENERIC: 0.0

 1599 10:51:05.256711       GENERIC: 1.0

 1600 10:51:05.256840     PCI: 00:1f.3

 1601 10:51:05.266992     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1602 10:51:05.276430     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1603 10:51:05.280101     PCI: 00:1f.5

 1604 10:51:05.286315     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1605 10:51:05.296342  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1606 10:51:05.299581   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1607 10:51:05.306233   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1608 10:51:05.312950   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1609 10:51:05.316371    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1610 10:51:05.322883    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1611 10:51:05.329380   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1612 10:51:05.336029   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1613 10:51:05.342853   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1614 10:51:05.349875  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1615 10:51:05.356316  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1616 10:51:05.366432   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1617 10:51:05.372778   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1618 10:51:05.379526   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1619 10:51:05.382423   DOMAIN: 0000: Resource ranges:

 1620 10:51:05.385886   * Base: 1000, Size: 800, Tag: 100

 1621 10:51:05.389549   * Base: 1900, Size: e700, Tag: 100

 1622 10:51:05.395883    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1623 10:51:05.402780  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1624 10:51:05.409317  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1625 10:51:05.416078   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1626 10:51:05.422653   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1627 10:51:05.432688   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1628 10:51:05.439782   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1629 10:51:05.446174   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1630 10:51:05.455970   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1631 10:51:05.462659   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1632 10:51:05.469346   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1633 10:51:05.479695   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1634 10:51:05.486339   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1635 10:51:05.492413   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1636 10:51:05.502362   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1637 10:51:05.509285   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1638 10:51:05.515665   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1639 10:51:05.526116   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1640 10:51:05.533264   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1641 10:51:05.539063   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1642 10:51:05.549363   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1643 10:51:05.555647   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1644 10:51:05.562514   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1645 10:51:05.569224   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1646 10:51:05.579250   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1647 10:51:05.585647   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1648 10:51:05.592425   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1649 10:51:05.602345   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1650 10:51:05.608813   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1651 10:51:05.615470   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1652 10:51:05.625293   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1653 10:51:05.632213   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1654 10:51:05.639030   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1655 10:51:05.642011   DOMAIN: 0000: Resource ranges:

 1656 10:51:05.648579   * Base: 80400000, Size: 3fc00000, Tag: 200

 1657 10:51:05.652021   * Base: d0000000, Size: 28000000, Tag: 200

 1658 10:51:05.655373   * Base: fa000000, Size: 1000000, Tag: 200

 1659 10:51:05.662313   * Base: fb001000, Size: 17ff000, Tag: 200

 1660 10:51:05.665654   * Base: fe800000, Size: 300000, Tag: 200

 1661 10:51:05.668469   * Base: feb80000, Size: 80000, Tag: 200

 1662 10:51:05.671783   * Base: fed00000, Size: 40000, Tag: 200

 1663 10:51:05.678708   * Base: fed70000, Size: 10000, Tag: 200

 1664 10:51:05.681906   * Base: fed88000, Size: 8000, Tag: 200

 1665 10:51:05.685242   * Base: fed93000, Size: d000, Tag: 200

 1666 10:51:05.688304   * Base: feda2000, Size: 1e000, Tag: 200

 1667 10:51:05.692228   * Base: fede0000, Size: 1220000, Tag: 200

 1668 10:51:05.698669   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1669 10:51:05.705602    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1670 10:51:05.712261    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1671 10:51:05.718880    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1672 10:51:05.725755    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1673 10:51:05.732299    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1674 10:51:05.738476    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1675 10:51:05.745247    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1676 10:51:05.752121    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1677 10:51:05.758574    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1678 10:51:05.765008    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1679 10:51:05.771904    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1680 10:51:05.778217    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1681 10:51:05.785014    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1682 10:51:05.791555    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1683 10:51:05.798576    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1684 10:51:05.804896    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1685 10:51:05.811457    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1686 10:51:05.818018    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1687 10:51:05.824434    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1688 10:51:05.831202  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1689 10:51:05.841148  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1690 10:51:05.844209   PCI: 00:06.0: Resource ranges:

 1691 10:51:05.847693   * Base: 80400000, Size: 100000, Tag: 200

 1692 10:51:05.854195    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1693 10:51:05.860692    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1694 10:51:05.870761  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1695 10:51:05.877729  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1696 10:51:05.881359  Root Device assign_resources, bus 0 link: 0

 1697 10:51:05.884380  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1698 10:51:05.894014  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1699 10:51:05.900858  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1700 10:51:05.910649  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1701 10:51:05.917339  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1702 10:51:05.920371  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1703 10:51:05.927460  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1704 10:51:05.933955  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1705 10:51:05.947327  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1706 10:51:05.953586  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1707 10:51:05.956975  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1708 10:51:05.967226  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1709 10:51:05.973917  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1710 10:51:05.980872  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1711 10:51:05.987198  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1712 10:51:05.997192  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1713 10:51:06.000289  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1714 10:51:06.003744  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1715 10:51:06.013817  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1716 10:51:06.017053  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1717 10:51:06.023851  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1718 10:51:06.030330  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1719 10:51:06.036783  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1720 10:51:06.047121  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1721 10:51:06.050116  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1722 10:51:06.056974  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1723 10:51:06.063604  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1724 10:51:06.070138  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1725 10:51:06.073598  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1726 10:51:06.080320  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1727 10:51:06.086889  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1728 10:51:06.090356  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1729 10:51:06.100452  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1730 10:51:06.103367  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1731 10:51:06.106920  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1732 10:51:06.116882  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1733 10:51:06.123510  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1734 10:51:06.130022  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1735 10:51:06.133659  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1736 10:51:06.143802  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1737 10:51:06.146529  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1738 10:51:06.150066  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1739 10:51:06.156742  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1740 10:51:06.160341  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1741 10:51:06.166540  LPC: Trying to open IO window from 800 size 1ff

 1742 10:51:06.173441  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1743 10:51:06.183019  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1744 10:51:06.189789  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1745 10:51:06.193285  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1746 10:51:06.199930  Root Device assign_resources, bus 0 link: 0 done

 1747 10:51:06.203188  Done setting resources.

 1748 10:51:06.209661  Show resources in subtree (Root Device)...After assigning values.

 1749 10:51:06.213241   Root Device child on link 0 CPU_CLUSTER: 0

 1750 10:51:06.216618    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1751 10:51:06.219739     APIC: 00

 1752 10:51:06.219823     APIC: 14

 1753 10:51:06.219891     APIC: 16

 1754 10:51:06.223236     APIC: 10

 1755 10:51:06.223319     APIC: 12

 1756 10:51:06.223386     APIC: 09

 1757 10:51:06.226597     APIC: 08

 1758 10:51:06.226680     APIC: 01

 1759 10:51:06.229604    DOMAIN: 0000 child on link 0 GPIO: 0

 1760 10:51:06.239747    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1761 10:51:06.249830    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1762 10:51:06.253182     GPIO: 0

 1763 10:51:06.253307     PCI: 00:00.0

 1764 10:51:06.263058     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1765 10:51:06.273151     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1766 10:51:06.282779     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1767 10:51:06.289743     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1768 10:51:06.299358     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1769 10:51:06.309440     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1770 10:51:06.319536     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1771 10:51:06.329207     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1772 10:51:06.339726     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1773 10:51:06.349970     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1774 10:51:06.356124     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1775 10:51:06.366084     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1776 10:51:06.375660     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1777 10:51:06.385689     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1778 10:51:06.395496     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1779 10:51:06.402624     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1780 10:51:06.412118     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1781 10:51:06.422271     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1782 10:51:06.432338     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1783 10:51:06.442073     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1784 10:51:06.451948     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1785 10:51:06.462129     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1786 10:51:06.471750     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1787 10:51:06.481615     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1788 10:51:06.491585     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1789 10:51:06.498261     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1790 10:51:06.507992     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1791 10:51:06.518269     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1792 10:51:06.521262     PCI: 00:02.0

 1793 10:51:06.531456     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1794 10:51:06.541177     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1795 10:51:06.551237     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1796 10:51:06.554748     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1797 10:51:06.564560     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1798 10:51:06.568175      GENERIC: 0.0

 1799 10:51:06.571290     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1800 10:51:06.581063     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1801 10:51:06.594484     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1802 10:51:06.604328     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1803 10:51:06.604414      PCI: 01:00.0

 1804 10:51:06.614402      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1805 10:51:06.624010      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1806 10:51:06.627414     PCI: 00:08.0

 1807 10:51:06.627499     PCI: 00:0a.0

 1808 10:51:06.640833     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1809 10:51:06.643866     PCI: 00:0d.0 child on link 0 USB0 port 0

 1810 10:51:06.653876     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1811 10:51:06.657184      USB0 port 0 child on link 0 USB3 port 0

 1812 10:51:06.660727       USB3 port 0

 1813 10:51:06.660862       USB3 port 1

 1814 10:51:06.663845       USB3 port 2

 1815 10:51:06.667444       USB3 port 3

 1816 10:51:06.670803     PCI: 00:14.0 child on link 0 USB0 port 0

 1817 10:51:06.681219     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1818 10:51:06.684183      USB0 port 0 child on link 0 USB2 port 0

 1819 10:51:06.687325       USB2 port 0

 1820 10:51:06.687409       USB2 port 1

 1821 10:51:06.690736       USB2 port 2

 1822 10:51:06.690819       USB2 port 3

 1823 10:51:06.693799       USB2 port 4

 1824 10:51:06.693883       USB2 port 5

 1825 10:51:06.697070       USB2 port 6

 1826 10:51:06.700616       USB2 port 7

 1827 10:51:06.700701       USB2 port 8

 1828 10:51:06.703923       USB2 port 9

 1829 10:51:06.704006       USB3 port 0

 1830 10:51:06.707285       USB3 port 1

 1831 10:51:06.707368       USB3 port 2

 1832 10:51:06.710584       USB3 port 3

 1833 10:51:06.710668     PCI: 00:14.2

 1834 10:51:06.720712     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1835 10:51:06.730638     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1836 10:51:06.737317     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1837 10:51:06.747386     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1838 10:51:06.747471      GENERIC: 0.0

 1839 10:51:06.753703     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1840 10:51:06.763922     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1841 10:51:06.764007      I2C: 00:1a

 1842 10:51:06.767061      I2C: 00:31

 1843 10:51:06.767146      I2C: 00:32

 1844 10:51:06.773966     PCI: 00:15.1 child on link 0 I2C: 00:50

 1845 10:51:06.784161     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1846 10:51:06.784247      I2C: 00:50

 1847 10:51:06.787080     PCI: 00:15.2

 1848 10:51:06.790202     PCI: 00:15.3 child on link 0 I2C: 00:10

 1849 10:51:06.800133     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1850 10:51:06.803451      I2C: 00:10

 1851 10:51:06.803534     PCI: 00:16.0

 1852 10:51:06.813512     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1853 10:51:06.816878     PCI: 00:19.0

 1854 10:51:06.820092     PCI: 00:19.1 child on link 0 I2C: 00:15

 1855 10:51:06.829909     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1856 10:51:06.833700      I2C: 00:15

 1857 10:51:06.833827      I2C: 00:2c

 1858 10:51:06.836637     PCI: 00:1e.0

 1859 10:51:06.846911     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1860 10:51:06.850170     PCI: 00:1e.3 child on link 0 SPI: 00

 1861 10:51:06.859872     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1862 10:51:06.863314      SPI: 00

 1863 10:51:06.866355     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1864 10:51:06.876438     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1865 10:51:06.876527      PNP: 0c09.0

 1866 10:51:06.886716      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1867 10:51:06.890161     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1868 10:51:06.900194     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1869 10:51:06.909598     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1870 10:51:06.913125      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1871 10:51:06.916534       GENERIC: 0.0

 1872 10:51:06.916655       GENERIC: 1.0

 1873 10:51:06.919986     PCI: 00:1f.3

 1874 10:51:06.929707     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1875 10:51:06.939914     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1876 10:51:06.939999     PCI: 00:1f.5

 1877 10:51:06.953042     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1878 10:51:06.953169  Done allocating resources.

 1879 10:51:06.959772  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms

 1880 10:51:06.966370  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1881 10:51:06.969313  Configure audio over I2S with MAX98373 NAU88L25B.

 1882 10:51:06.975058  Enabling BT offload

 1883 10:51:06.982320  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1884 10:51:06.986439  Enabling resources...

 1885 10:51:06.989195  PCI: 00:00.0 subsystem <- 8086/4609

 1886 10:51:06.992595  PCI: 00:00.0 cmd <- 06

 1887 10:51:06.995682  PCI: 00:02.0 subsystem <- 8086/46b3

 1888 10:51:06.999039  PCI: 00:02.0 cmd <- 03

 1889 10:51:07.002543  PCI: 00:04.0 subsystem <- 8086/461d

 1890 10:51:07.002626  PCI: 00:04.0 cmd <- 02

 1891 10:51:07.006000  PCI: 00:06.0 bridge ctrl <- 0013

 1892 10:51:07.009402  PCI: 00:06.0 subsystem <- 8086/464d

 1893 10:51:07.013003  PCI: 00:06.0 cmd <- 106

 1894 10:51:07.015657  PCI: 00:0a.0 subsystem <- 8086/467d

 1895 10:51:07.019046  PCI: 00:0a.0 cmd <- 02

 1896 10:51:07.022387  PCI: 00:0d.0 subsystem <- 8086/461e

 1897 10:51:07.025821  PCI: 00:0d.0 cmd <- 02

 1898 10:51:07.029278  PCI: 00:14.0 subsystem <- 8086/51ed

 1899 10:51:07.032509  PCI: 00:14.0 cmd <- 02

 1900 10:51:07.035981  PCI: 00:14.2 subsystem <- 8086/51ef

 1901 10:51:07.036065  PCI: 00:14.2 cmd <- 02

 1902 10:51:07.039412  PCI: 00:14.3 subsystem <- 8086/51f0

 1903 10:51:07.042552  PCI: 00:14.3 cmd <- 02

 1904 10:51:07.045819  PCI: 00:15.0 subsystem <- 8086/51e8

 1905 10:51:07.049055  PCI: 00:15.0 cmd <- 02

 1906 10:51:07.052306  PCI: 00:15.1 subsystem <- 8086/51e9

 1907 10:51:07.055840  PCI: 00:15.1 cmd <- 06

 1908 10:51:07.059336  PCI: 00:15.3 subsystem <- 8086/51eb

 1909 10:51:07.062511  PCI: 00:15.3 cmd <- 02

 1910 10:51:07.065805  PCI: 00:16.0 subsystem <- 8086/51e0

 1911 10:51:07.065890  PCI: 00:16.0 cmd <- 02

 1912 10:51:07.069236  PCI: 00:19.1 subsystem <- 8086/51c6

 1913 10:51:07.072641  PCI: 00:19.1 cmd <- 02

 1914 10:51:07.075828  PCI: 00:1e.0 subsystem <- 8086/51a8

 1915 10:51:07.079311  PCI: 00:1e.0 cmd <- 06

 1916 10:51:07.082215  PCI: 00:1e.3 subsystem <- 8086/51ab

 1917 10:51:07.085723  PCI: 00:1e.3 cmd <- 02

 1918 10:51:07.089462  PCI: 00:1f.0 subsystem <- 8086/5182

 1919 10:51:07.092249  PCI: 00:1f.0 cmd <- 407

 1920 10:51:07.095789  PCI: 00:1f.3 subsystem <- 8086/51c8

 1921 10:51:07.095872  PCI: 00:1f.3 cmd <- 02

 1922 10:51:07.098924  PCI: 00:1f.5 subsystem <- 8086/51a4

 1923 10:51:07.102398  PCI: 00:1f.5 cmd <- 406

 1924 10:51:07.105772  PCI: 01:00.0 cmd <- 02

 1925 10:51:07.105856  done.

 1926 10:51:07.112027  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1927 10:51:07.115653  ME: Version: Unavailable

 1928 10:51:07.118842  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1929 10:51:07.122769  Initializing devices...

 1930 10:51:07.122893  Root Device init

 1931 10:51:07.125793  mainboard: EC init

 1932 10:51:07.129144  Chrome EC: Set SMI mask to 0x0000000000000000

 1933 10:51:07.132734  Chrome EC: UHEPI supported

 1934 10:51:07.139443  Chrome EC: clear events_b mask to 0x0000000000000000

 1935 10:51:07.145753  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1936 10:51:07.152444  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1937 10:51:07.159237  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1938 10:51:07.162461  Chrome EC: Set WAKE mask to 0x0000000000000000

 1939 10:51:07.165839  Root Device init finished in 39 msecs

 1940 10:51:07.169219  PCI: 00:00.0 init

 1941 10:51:07.172667  CPU TDP = 15 Watts

 1942 10:51:07.172798  CPU PL1 = 15 Watts

 1943 10:51:07.175871  CPU PL2 = 55 Watts

 1944 10:51:07.179163  CPU PL4 = 123 Watts

 1945 10:51:07.182499  PCI: 00:00.0 init finished in 8 msecs

 1946 10:51:07.182584  PCI: 00:02.0 init

 1947 10:51:07.185641  GMA: Found VBT in CBFS

 1948 10:51:07.189187  GMA: Found valid VBT in CBFS

 1949 10:51:07.195552  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1950 10:51:07.202106                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1951 10:51:07.205651  PCI: 00:02.0 init finished in 18 msecs

 1952 10:51:07.209065  PCI: 00:06.0 init

 1953 10:51:07.212285  Initializing PCH PCIe bridge.

 1954 10:51:07.215718  PCI: 00:06.0 init finished in 3 msecs

 1955 10:51:07.215802  PCI: 00:0a.0 init

 1956 10:51:07.218674  PCI: 00:0a.0 init finished in 0 msecs

 1957 10:51:07.222329  PCI: 00:14.0 init

 1958 10:51:07.225275  PCI: 00:14.0 init finished in 0 msecs

 1959 10:51:07.228841  PCI: 00:14.2 init

 1960 10:51:07.231953  PCI: 00:14.2 init finished in 0 msecs

 1961 10:51:07.232027  PCI: 00:15.0 init

 1962 10:51:07.235360  I2C bus 0 version 0x3230302a

 1963 10:51:07.238819  DW I2C bus 0 at 0x80655000 (400 KHz)

 1964 10:51:07.245511  PCI: 00:15.0 init finished in 6 msecs

 1965 10:51:07.245595  PCI: 00:15.1 init

 1966 10:51:07.248926  I2C bus 1 version 0x3230302a

 1967 10:51:07.252218  DW I2C bus 1 at 0x80656000 (400 KHz)

 1968 10:51:07.255193  PCI: 00:15.1 init finished in 6 msecs

 1969 10:51:07.259147  PCI: 00:15.3 init

 1970 10:51:07.262270  I2C bus 3 version 0x3230302a

 1971 10:51:07.265304  DW I2C bus 3 at 0x80657000 (400 KHz)

 1972 10:51:07.268682  PCI: 00:15.3 init finished in 6 msecs

 1973 10:51:07.272206  PCI: 00:16.0 init

 1974 10:51:07.275345  PCI: 00:16.0 init finished in 0 msecs

 1975 10:51:07.275430  PCI: 00:19.1 init

 1976 10:51:07.279040  I2C bus 5 version 0x3230302a

 1977 10:51:07.281962  DW I2C bus 5 at 0x80659000 (400 KHz)

 1978 10:51:07.285174  PCI: 00:19.1 init finished in 6 msecs

 1979 10:51:07.288607  PCI: 00:1f.0 init

 1980 10:51:07.291918  IOAPIC: Initializing IOAPIC at 0xfec00000

 1981 10:51:07.295433  IOAPIC: ID = 0x02

 1982 10:51:07.298781  IOAPIC: Dumping registers

 1983 10:51:07.298864    reg 0x0000: 0x02000000

 1984 10:51:07.301837    reg 0x0001: 0x00770020

 1985 10:51:07.305196    reg 0x0002: 0x00000000

 1986 10:51:07.308772  IOAPIC: 120 interrupts

 1987 10:51:07.311774  IOAPIC: Clearing IOAPIC at 0xfec00000

 1988 10:51:07.315440  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1989 10:51:07.322109  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1990 10:51:07.325089  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1991 10:51:07.331918  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1992 10:51:07.335128  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1993 10:51:07.338943  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1994 10:51:07.345211  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1995 10:51:07.348640  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1996 10:51:07.355222  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1997 10:51:07.358628  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1998 10:51:07.365142  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1999 10:51:07.368584  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 2000 10:51:07.371822  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 2001 10:51:07.378454  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 2002 10:51:07.381991  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2003 10:51:07.388429  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2004 10:51:07.391801  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2005 10:51:07.398385  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2006 10:51:07.401897  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2007 10:51:07.408311  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2008 10:51:07.411909  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2009 10:51:07.414819  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2010 10:51:07.421926  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2011 10:51:07.425105  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2012 10:51:07.431836  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2013 10:51:07.435025  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2014 10:51:07.441485  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2015 10:51:07.445029  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2016 10:51:07.451368  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2017 10:51:07.454770  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2018 10:51:07.458328  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2019 10:51:07.464922  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2020 10:51:07.468467  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2021 10:51:07.474825  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2022 10:51:07.478262  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2023 10:51:07.484959  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2024 10:51:07.488175  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2025 10:51:07.494660  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2026 10:51:07.498259  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2027 10:51:07.501385  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2028 10:51:07.508141  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2029 10:51:07.511580  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2030 10:51:07.518277  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2031 10:51:07.521209  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2032 10:51:07.528177  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2033 10:51:07.531391  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2034 10:51:07.534462  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2035 10:51:07.541516  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2036 10:51:07.544645  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2037 10:51:07.551418  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2038 10:51:07.554551  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2039 10:51:07.561102  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2040 10:51:07.564410  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2041 10:51:07.571506  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2042 10:51:07.574489  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2043 10:51:07.577693  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2044 10:51:07.584470  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2045 10:51:07.588109  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2046 10:51:07.594454  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2047 10:51:07.597863  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2048 10:51:07.604505  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2049 10:51:07.608201  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2050 10:51:07.614364  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2051 10:51:07.617726  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2052 10:51:07.620952  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2053 10:51:07.627860  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2054 10:51:07.630999  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2055 10:51:07.637747  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2056 10:51:07.641066  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2057 10:51:07.647787  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2058 10:51:07.651087  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2059 10:51:07.654639  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2060 10:51:07.661133  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2061 10:51:07.664410  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2062 10:51:07.671147  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2063 10:51:07.674367  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2064 10:51:07.681089  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2065 10:51:07.684269  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2066 10:51:07.691058  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2067 10:51:07.694270  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2068 10:51:07.697615  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2069 10:51:07.704464  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2070 10:51:07.707841  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2071 10:51:07.714429  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2072 10:51:07.718001  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2073 10:51:07.724228  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2074 10:51:07.727685  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2075 10:51:07.730999  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2076 10:51:07.737866  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2077 10:51:07.740793  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2078 10:51:07.747747  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2079 10:51:07.750986  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2080 10:51:07.757371  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2081 10:51:07.761032  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2082 10:51:07.767653  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2083 10:51:07.770894  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2084 10:51:07.774036  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2085 10:51:07.780738  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2086 10:51:07.784262  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2087 10:51:07.791108  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2088 10:51:07.794101  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2089 10:51:07.800773  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2090 10:51:07.803980  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2091 10:51:07.810648  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2092 10:51:07.813932  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2093 10:51:07.820345  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2094 10:51:07.823788  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2095 10:51:07.827340  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2096 10:51:07.833576  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2097 10:51:07.837221  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2098 10:51:07.843760  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2099 10:51:07.847047  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2100 10:51:07.854045  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2101 10:51:07.856881  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2102 10:51:07.860517  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2103 10:51:07.867095  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2104 10:51:07.870529  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2105 10:51:07.877004  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2106 10:51:07.880361  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2107 10:51:07.887041  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2108 10:51:07.890625  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2109 10:51:07.897161  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2110 10:51:07.900388  PCI: 00:1f.0 init finished in 607 msecs

 2111 10:51:07.900475  PCI: 00:1f.2 init

 2112 10:51:07.903311  apm_control: Disabling ACPI.

 2113 10:51:07.908413  APMC done.

 2114 10:51:07.911745  PCI: 00:1f.2 init finished in 6 msecs

 2115 10:51:07.915041  PCI: 00:1f.3 init

 2116 10:51:07.918279  PCI: 00:1f.3 init finished in 0 msecs

 2117 10:51:07.918415  PCI: 01:00.0 init

 2118 10:51:07.921577  PCI: 01:00.0 init finished in 0 msecs

 2119 10:51:07.925039  PNP: 0c09.0 init

 2120 10:51:07.928441  Google Chrome EC uptime: 12.069 seconds

 2121 10:51:07.934962  Google Chrome AP resets since EC boot: 1

 2122 10:51:07.938386  Google Chrome most recent AP reset causes:

 2123 10:51:07.941840  	0.340: 32775 shutdown: entering G3

 2124 10:51:07.948233  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2125 10:51:07.951923  PNP: 0c09.0 init finished in 23 msecs

 2126 10:51:07.955248  GENERIC: 0.0 init

 2127 10:51:07.958444  GENERIC: 0.0 init finished in 0 msecs

 2128 10:51:07.958523  GENERIC: 1.0 init

 2129 10:51:07.961693  GENERIC: 1.0 init finished in 0 msecs

 2130 10:51:07.965024  Devices initialized

 2131 10:51:07.968282  Show all devs... After init.

 2132 10:51:07.971545  Root Device: enabled 1

 2133 10:51:07.971659  CPU_CLUSTER: 0: enabled 1

 2134 10:51:07.975048  DOMAIN: 0000: enabled 1

 2135 10:51:07.978421  GPIO: 0: enabled 1

 2136 10:51:07.981524  PCI: 00:00.0: enabled 1

 2137 10:51:07.981611  PCI: 00:01.0: enabled 0

 2138 10:51:07.985066  PCI: 00:01.1: enabled 0

 2139 10:51:07.988198  PCI: 00:02.0: enabled 1

 2140 10:51:07.988284  PCI: 00:04.0: enabled 1

 2141 10:51:07.991737  PCI: 00:05.0: enabled 0

 2142 10:51:07.995581  PCI: 00:06.0: enabled 1

 2143 10:51:07.998517  PCI: 00:06.2: enabled 0

 2144 10:51:07.998603  PCI: 00:07.0: enabled 0

 2145 10:51:08.001782  PCI: 00:07.1: enabled 0

 2146 10:51:08.004774  PCI: 00:07.2: enabled 0

 2147 10:51:08.008132  PCI: 00:07.3: enabled 0

 2148 10:51:08.008263  PCI: 00:08.0: enabled 0

 2149 10:51:08.011709  PCI: 00:09.0: enabled 0

 2150 10:51:08.014724  PCI: 00:0a.0: enabled 1

 2151 10:51:08.018344  PCI: 00:0d.0: enabled 1

 2152 10:51:08.018430  PCI: 00:0d.1: enabled 0

 2153 10:51:08.021719  PCI: 00:0d.2: enabled 0

 2154 10:51:08.025073  PCI: 00:0d.3: enabled 0

 2155 10:51:08.028160  PCI: 00:0e.0: enabled 0

 2156 10:51:08.028246  PCI: 00:10.0: enabled 0

 2157 10:51:08.031766  PCI: 00:10.1: enabled 0

 2158 10:51:08.034879  PCI: 00:10.6: enabled 0

 2159 10:51:08.034961  PCI: 00:10.7: enabled 0

 2160 10:51:08.038283  PCI: 00:12.0: enabled 0

 2161 10:51:08.041463  PCI: 00:12.6: enabled 0

 2162 10:51:08.045015  PCI: 00:12.7: enabled 0

 2163 10:51:08.045112  PCI: 00:13.0: enabled 0

 2164 10:51:08.048239  PCI: 00:14.0: enabled 1

 2165 10:51:08.051207  PCI: 00:14.1: enabled 0

 2166 10:51:08.054582  PCI: 00:14.2: enabled 1

 2167 10:51:08.054664  PCI: 00:14.3: enabled 1

 2168 10:51:08.058216  PCI: 00:15.0: enabled 1

 2169 10:51:08.061295  PCI: 00:15.1: enabled 1

 2170 10:51:08.064778  PCI: 00:15.2: enabled 0

 2171 10:51:08.064874  PCI: 00:15.3: enabled 1

 2172 10:51:08.068557  PCI: 00:16.0: enabled 1

 2173 10:51:08.071217  PCI: 00:16.1: enabled 0

 2174 10:51:08.071299  PCI: 00:16.2: enabled 0

 2175 10:51:08.075426  PCI: 00:16.3: enabled 0

 2176 10:51:08.078064  PCI: 00:16.4: enabled 0

 2177 10:51:08.081625  PCI: 00:16.5: enabled 0

 2178 10:51:08.081707  PCI: 00:17.0: enabled 0

 2179 10:51:08.084932  PCI: 00:19.0: enabled 0

 2180 10:51:08.088210  PCI: 00:19.1: enabled 1

 2181 10:51:08.091623  PCI: 00:19.2: enabled 0

 2182 10:51:08.091705  PCI: 00:1a.0: enabled 0

 2183 10:51:08.094654  PCI: 00:1c.0: enabled 0

 2184 10:51:08.097931  PCI: 00:1c.1: enabled 0

 2185 10:51:08.101800  PCI: 00:1c.2: enabled 0

 2186 10:51:08.101884  PCI: 00:1c.3: enabled 0

 2187 10:51:08.104602  PCI: 00:1c.4: enabled 0

 2188 10:51:08.107980  PCI: 00:1c.5: enabled 0

 2189 10:51:08.108105  PCI: 00:1c.6: enabled 0

 2190 10:51:08.111732  PCI: 00:1c.7: enabled 0

 2191 10:51:08.114502  PCI: 00:1d.0: enabled 0

 2192 10:51:08.118024  PCI: 00:1d.1: enabled 0

 2193 10:51:08.118146  PCI: 00:1d.2: enabled 0

 2194 10:51:08.121389  PCI: 00:1d.3: enabled 0

 2195 10:51:08.124687  PCI: 00:1e.0: enabled 1

 2196 10:51:08.128135  PCI: 00:1e.1: enabled 0

 2197 10:51:08.128254  PCI: 00:1e.2: enabled 0

 2198 10:51:08.131393  PCI: 00:1e.3: enabled 1

 2199 10:51:08.134394  PCI: 00:1f.0: enabled 1

 2200 10:51:08.137923  PCI: 00:1f.1: enabled 0

 2201 10:51:08.138047  PCI: 00:1f.2: enabled 1

 2202 10:51:08.141242  PCI: 00:1f.3: enabled 1

 2203 10:51:08.144766  PCI: 00:1f.4: enabled 0

 2204 10:51:08.144902  PCI: 00:1f.5: enabled 1

 2205 10:51:08.148091  PCI: 00:1f.6: enabled 0

 2206 10:51:08.151414  PCI: 00:1f.7: enabled 0

 2207 10:51:08.154452  GENERIC: 0.0: enabled 1

 2208 10:51:08.154575  GENERIC: 0.0: enabled 1

 2209 10:51:08.157786  GENERIC: 1.0: enabled 1

 2210 10:51:08.161127  GENERIC: 0.0: enabled 1

 2211 10:51:08.164954  GENERIC: 1.0: enabled 1

 2212 10:51:08.165073  USB0 port 0: enabled 1

 2213 10:51:08.167703  USB0 port 0: enabled 1

 2214 10:51:08.171147  GENERIC: 0.0: enabled 1

 2215 10:51:08.171229  I2C: 00:1a: enabled 1

 2216 10:51:08.174481  I2C: 00:31: enabled 1

 2217 10:51:08.177927  I2C: 00:32: enabled 1

 2218 10:51:08.180905  I2C: 00:50: enabled 1

 2219 10:51:08.180986  I2C: 00:10: enabled 1

 2220 10:51:08.184790  I2C: 00:15: enabled 1

 2221 10:51:08.187993  I2C: 00:2c: enabled 1

 2222 10:51:08.188076  GENERIC: 0.0: enabled 1

 2223 10:51:08.191058  SPI: 00: enabled 1

 2224 10:51:08.194266  PNP: 0c09.0: enabled 1

 2225 10:51:08.194348  GENERIC: 0.0: enabled 1

 2226 10:51:08.197616  USB3 port 0: enabled 1

 2227 10:51:08.201704  USB3 port 1: enabled 0

 2228 10:51:08.201786  USB3 port 2: enabled 1

 2229 10:51:08.204229  USB3 port 3: enabled 0

 2230 10:51:08.207998  USB2 port 0: enabled 1

 2231 10:51:08.210892  USB2 port 1: enabled 0

 2232 10:51:08.210975  USB2 port 2: enabled 1

 2233 10:51:08.214244  USB2 port 3: enabled 0

 2234 10:51:08.217865  USB2 port 4: enabled 0

 2235 10:51:08.217948  USB2 port 5: enabled 1

 2236 10:51:08.221398  USB2 port 6: enabled 0

 2237 10:51:08.224448  USB2 port 7: enabled 0

 2238 10:51:08.224556  USB2 port 8: enabled 1

 2239 10:51:08.227436  USB2 port 9: enabled 1

 2240 10:51:08.231208  USB3 port 0: enabled 1

 2241 10:51:08.234338  USB3 port 1: enabled 0

 2242 10:51:08.234420  USB3 port 2: enabled 0

 2243 10:51:08.237454  USB3 port 3: enabled 0

 2244 10:51:08.241233  GENERIC: 0.0: enabled 1

 2245 10:51:08.244025  GENERIC: 1.0: enabled 1

 2246 10:51:08.244107  APIC: 00: enabled 1

 2247 10:51:08.247697  APIC: 14: enabled 1

 2248 10:51:08.247778  APIC: 16: enabled 1

 2249 10:51:08.250662  APIC: 10: enabled 1

 2250 10:51:08.253899  APIC: 12: enabled 1

 2251 10:51:08.253980  APIC: 09: enabled 1

 2252 10:51:08.257255  APIC: 08: enabled 1

 2253 10:51:08.257337  APIC: 01: enabled 1

 2254 10:51:08.260630  PCI: 01:00.0: enabled 1

 2255 10:51:08.267276  BS: BS_DEV_INIT run times (exec / console): 8 / 1133 ms

 2256 10:51:08.270860  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2257 10:51:08.273939  ELOG: NV offset 0xf20000 size 0x4000

 2258 10:51:08.282485  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2259 10:51:08.289644  ELOG: Event(17) added with size 13 at 2023-07-27 10:51:04 UTC

 2260 10:51:08.295892  ELOG: Event(9E) added with size 10 at 2023-07-27 10:51:04 UTC

 2261 10:51:08.302525  ELOG: Event(9F) added with size 14 at 2023-07-27 10:51:04 UTC

 2262 10:51:08.308861  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2263 10:51:08.316376  ELOG: Event(A0) added with size 9 at 2023-07-27 10:51:04 UTC

 2264 10:51:08.319739  elog_add_boot_reason: Logged dev mode boot

 2265 10:51:08.325600  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2266 10:51:08.325684  Finalize devices...

 2267 10:51:08.329050  PCI: 00:16.0 final

 2268 10:51:08.332490  PCI: 00:1f.2 final

 2269 10:51:08.332598  GENERIC: 0.0 final

 2270 10:51:08.339041  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2271 10:51:08.342528  GENERIC: 1.0 final

 2272 10:51:08.345483  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2273 10:51:08.348938  Devices finalized

 2274 10:51:08.355497  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2275 10:51:08.358909  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2276 10:51:08.365726  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2277 10:51:08.368897  ME: HFSTS1                      : 0x90000245

 2278 10:51:08.375304  ME: HFSTS2                      : 0x82100116

 2279 10:51:08.378549  ME: HFSTS3                      : 0x00000050

 2280 10:51:08.385441  ME: HFSTS4                      : 0x00004000

 2281 10:51:08.388844  ME: HFSTS5                      : 0x00000000

 2282 10:51:08.392031  ME: HFSTS6                      : 0x40600006

 2283 10:51:08.395464  ME: Manufacturing Mode          : NO

 2284 10:51:08.402433  ME: SPI Protection Mode Enabled : YES

 2285 10:51:08.405664  ME: FPFs Committed              : YES

 2286 10:51:08.408964  ME: Manufacturing Vars Locked   : YES

 2287 10:51:08.412145  ME: FW Partition Table          : OK

 2288 10:51:08.415457  ME: Bringup Loader Failure      : NO

 2289 10:51:08.418557  ME: Firmware Init Complete      : YES

 2290 10:51:08.422472  ME: Boot Options Present        : NO

 2291 10:51:08.426382  ME: Update In Progress          : NO

 2292 10:51:08.432175  ME: D0i3 Support                : YES

 2293 10:51:08.435644  ME: Low Power State Enabled     : NO

 2294 10:51:08.438678  ME: CPU Replaced                : YES

 2295 10:51:08.441722  ME: CPU Replacement Valid       : YES

 2296 10:51:08.445345  ME: Current Working State       : 5

 2297 10:51:08.448766  ME: Current Operation State     : 1

 2298 10:51:08.452022  ME: Current Operation Mode      : 0

 2299 10:51:08.455227  ME: Error Code                  : 0

 2300 10:51:08.458593  ME: Enhanced Debug Mode         : NO

 2301 10:51:08.465144  ME: CPU Debug Disabled          : YES

 2302 10:51:08.468432  ME: TXT Support                 : NO

 2303 10:51:08.471763  ME: WP for RO is enabled        : YES

 2304 10:51:08.478609  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2305 10:51:08.481979  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2306 10:51:08.488293  Ramoops buffer: 0x100000@0x76899000.

 2307 10:51:08.492229  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2308 10:51:08.501438  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2309 10:51:08.505150  CBFS: 'fallback/slic' not found.

 2310 10:51:08.508533  ACPI: Writing ACPI tables at 7686d000.

 2311 10:51:08.508671  ACPI:    * FACS

 2312 10:51:08.511704  ACPI:    * DSDT

 2313 10:51:08.518151  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2314 10:51:08.521639  ACPI:    * FADT

 2315 10:51:08.521762  SCI is IRQ9

 2316 10:51:08.525265  ACPI: added table 1/32, length now 40

 2317 10:51:08.528235  ACPI:     * SSDT

 2318 10:51:08.535191  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2319 10:51:08.537980  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2320 10:51:08.544942  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2321 10:51:08.548267  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2322 10:51:08.554785  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2323 10:51:08.558131  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2324 10:51:08.564722  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2325 10:51:08.571563  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2326 10:51:08.574964  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2327 10:51:08.581289  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2328 10:51:08.584643  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2329 10:51:08.591238  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2330 10:51:08.594617  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2331 10:51:08.597947  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2332 10:51:08.607780  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2333 10:51:08.610659  PS2K: Passing 80 keymaps to kernel

 2334 10:51:08.617558  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2335 10:51:08.624282  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2336 10:51:08.630907  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2337 10:51:08.637725  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2338 10:51:08.643777  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2339 10:51:08.650695  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2340 10:51:08.654136  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2341 10:51:08.660567  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2342 10:51:08.667364  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2343 10:51:08.674099  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2344 10:51:08.677226  ACPI: added table 2/32, length now 44

 2345 10:51:08.680670  ACPI:    * MCFG

 2346 10:51:08.683952  ACPI: added table 3/32, length now 48

 2347 10:51:08.684075  ACPI:    * TPM2

 2348 10:51:08.687232  TPM2 log created at 0x7685d000

 2349 10:51:08.690609  ACPI: added table 4/32, length now 52

 2350 10:51:08.693884  ACPI:     * LPIT

 2351 10:51:08.697159  ACPI: added table 5/32, length now 56

 2352 10:51:08.700674  ACPI:    * MADT

 2353 10:51:08.700828  SCI is IRQ9

 2354 10:51:08.704081  ACPI: added table 6/32, length now 60

 2355 10:51:08.707268  cmd_reg from pmc_make_ipc_cmd 1052838

 2356 10:51:08.713942  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2357 10:51:08.720302  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2358 10:51:08.727449  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2359 10:51:08.730178  PMC CrashLog size in discovery mode: 0xC00

 2360 10:51:08.734573  cpu crashlog bar addr: 0x80640000

 2361 10:51:08.736817  cpu discovery table offset: 0x6030

 2362 10:51:08.743456  cpu_crashlog_discovery_table buffer count: 0x3

 2363 10:51:08.750197  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2364 10:51:08.756781  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2365 10:51:08.763483  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2366 10:51:08.767137  PMC crashLog size in discovery mode : 0xC00

 2367 10:51:08.773472  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2368 10:51:08.780197  discover mode PMC crashlog size adjusted to: 0x200

 2369 10:51:08.786532  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2370 10:51:08.789897  discover mode PMC crashlog size adjusted to: 0x0

 2371 10:51:08.792996  m_cpu_crashLog_size : 0x3480 bytes

 2372 10:51:08.796466  CPU crashLog present.

 2373 10:51:08.799803  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2374 10:51:08.809884  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2375 10:51:08.810009  current = 76876550

 2376 10:51:08.812982  ACPI:    * DMAR

 2377 10:51:08.816608  ACPI: added table 7/32, length now 64

 2378 10:51:08.819691  ACPI: added table 8/32, length now 68

 2379 10:51:08.819810  ACPI:    * HPET

 2380 10:51:08.826301  ACPI: added table 9/32, length now 72

 2381 10:51:08.826423  ACPI: done.

 2382 10:51:08.829771  ACPI tables: 38528 bytes.

 2383 10:51:08.833767  smbios_write_tables: 76857000

 2384 10:51:08.837481  EC returned error result code 3

 2385 10:51:08.840999  Couldn't obtain OEM name from CBI

 2386 10:51:08.843460  Create SMBIOS type 16

 2387 10:51:08.843542  Create SMBIOS type 17

 2388 10:51:08.847256  Create SMBIOS type 20

 2389 10:51:08.850323  GENERIC: 0.0 (WIFI Device)

 2390 10:51:08.853731  SMBIOS tables: 2156 bytes.

 2391 10:51:08.856909  Writing table forward entry at 0x00000500

 2392 10:51:08.864048  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2393 10:51:08.866692  Writing coreboot table at 0x76891000

 2394 10:51:08.873640   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2395 10:51:08.876896   1. 0000000000001000-000000000009ffff: RAM

 2396 10:51:08.880280   2. 00000000000a0000-00000000000fffff: RESERVED

 2397 10:51:08.886887   3. 0000000000100000-0000000076856fff: RAM

 2398 10:51:08.890212   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2399 10:51:08.896731   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2400 10:51:08.903520   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2401 10:51:08.906627   7. 0000000077000000-00000000803fffff: RESERVED

 2402 10:51:08.913844   8. 00000000c0000000-00000000cfffffff: RESERVED

 2403 10:51:08.916707   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2404 10:51:08.920690  10. 00000000fb000000-00000000fb000fff: RESERVED

 2405 10:51:08.926787  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2406 10:51:08.930325  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2407 10:51:08.936738  13. 00000000fec00000-00000000fecfffff: RESERVED

 2408 10:51:08.940356  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2409 10:51:08.946622  15. 00000000fed80000-00000000fed87fff: RESERVED

 2410 10:51:08.949847  16. 00000000fed90000-00000000fed92fff: RESERVED

 2411 10:51:08.953305  17. 00000000feda0000-00000000feda1fff: RESERVED

 2412 10:51:08.959880  18. 00000000fedc0000-00000000feddffff: RESERVED

 2413 10:51:08.963423  19. 0000000100000000-000000027fbfffff: RAM

 2414 10:51:08.966876  Passing 4 GPIOs to payload:

 2415 10:51:08.973314              NAME |       PORT | POLARITY |     VALUE

 2416 10:51:08.976721               lid |  undefined |     high |      high

 2417 10:51:08.983305             power |  undefined |     high |       low

 2418 10:51:08.987233             oprom |  undefined |     high |       low

 2419 10:51:08.993514          EC in RW | 0x00000151 |     high |      high

 2420 10:51:08.993603  Board ID: 3

 2421 10:51:08.996434  FW config: 0x131

 2422 10:51:09.003315  Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 573f

 2423 10:51:09.006886  coreboot table: 1748 bytes.

 2424 10:51:09.009593  IMD ROOT    0. 0x76fff000 0x00001000

 2425 10:51:09.013043  IMD SMALL   1. 0x76ffe000 0x00001000

 2426 10:51:09.016434  FSP MEMORY  2. 0x76afe000 0x00500000

 2427 10:51:09.020111  CONSOLE     3. 0x76ade000 0x00020000

 2428 10:51:09.023134  RW MCACHE   4. 0x76add000 0x0000043c

 2429 10:51:09.026702  RO MCACHE   5. 0x76adc000 0x00000fd8

 2430 10:51:09.033401  FMAP        6. 0x76adb000 0x0000064a

 2431 10:51:09.036361  TIME STAMP  7. 0x76ada000 0x00000910

 2432 10:51:09.040030  VBOOT WORK  8. 0x76ac6000 0x00014000

 2433 10:51:09.042916  MEM INFO    9. 0x76ac5000 0x000003b8

 2434 10:51:09.046535  ROMSTG STCK10. 0x76ac4000 0x00001000

 2435 10:51:09.050515  AFTER CAR  11. 0x76ab8000 0x0000c000

 2436 10:51:09.053235  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2437 10:51:09.056446  ACPI BERT  13. 0x76a1e000 0x00010000

 2438 10:51:09.063347  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2439 10:51:09.067358  REFCODE    15. 0x769ae000 0x0006f000

 2440 10:51:09.069920  SMM BACKUP 16. 0x7699e000 0x00010000

 2441 10:51:09.073362  IGD OPREGION17. 0x76999000 0x00004203

 2442 10:51:09.076434  RAMOOPS    18. 0x76899000 0x00100000

 2443 10:51:09.079858  COREBOOT   19. 0x76891000 0x00008000

 2444 10:51:09.083126  ACPI       20. 0x7686d000 0x00024000

 2445 10:51:09.086671  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2446 10:51:09.093507  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2447 10:51:09.096614  CPU CRASHLOG23. 0x76858000 0x00003480

 2448 10:51:09.100049  SMBIOS     24. 0x76857000 0x00001000

 2449 10:51:09.100133  IMD small region:

 2450 10:51:09.106604    IMD ROOT    0. 0x76ffec00 0x00000400

 2451 10:51:09.110155    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2452 10:51:09.113350    POWER STATE 2. 0x76ffeb80 0x00000044

 2453 10:51:09.116806    ROMSTAGE    3. 0x76ffeb60 0x00000004

 2454 10:51:09.120217    ACPI GNVS   4. 0x76ffeb00 0x00000048

 2455 10:51:09.123392    TYPE_C INFO 5. 0x76ffeae0 0x0000000c

 2456 10:51:09.130387  BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms

 2457 10:51:09.133598  MTRR: Physical address space:

 2458 10:51:09.140019  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2459 10:51:09.146586  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2460 10:51:09.153623  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2461 10:51:09.159941  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2462 10:51:09.163093  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2463 10:51:09.169736  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2464 10:51:09.176407  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2465 10:51:09.183289  MTRR: Fixed MSR 0x250 0x0606060606060606

 2466 10:51:09.186662  MTRR: Fixed MSR 0x258 0x0606060606060606

 2467 10:51:09.189697  MTRR: Fixed MSR 0x259 0x0000000000000000

 2468 10:51:09.193099  MTRR: Fixed MSR 0x268 0x0606060606060606

 2469 10:51:09.196679  MTRR: Fixed MSR 0x269 0x0606060606060606

 2470 10:51:09.202995  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2471 10:51:09.206493  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2472 10:51:09.209851  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2473 10:51:09.212939  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2474 10:51:09.219655  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2475 10:51:09.223224  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2476 10:51:09.226162  call enable_fixed_mtrr()

 2477 10:51:09.229734  CPU physical address size: 39 bits

 2478 10:51:09.232944  MTRR: default type WB/UC MTRR counts: 6/6.

 2479 10:51:09.239355  MTRR: UC selected as default type.

 2480 10:51:09.242964  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2481 10:51:09.249436  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2482 10:51:09.256075  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2483 10:51:09.262893  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2484 10:51:09.269498  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2485 10:51:09.275972  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2486 10:51:09.279260  MTRR: Fixed MSR 0x250 0x0606060606060606

 2487 10:51:09.286237  MTRR: Fixed MSR 0x258 0x0606060606060606

 2488 10:51:09.289302  MTRR: Fixed MSR 0x259 0x0000000000000000

 2489 10:51:09.292667  MTRR: Fixed MSR 0x268 0x0606060606060606

 2490 10:51:09.296085  MTRR: Fixed MSR 0x269 0x0606060606060606

 2491 10:51:09.302491  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2492 10:51:09.306162  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2493 10:51:09.309174  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2494 10:51:09.312520  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2495 10:51:09.319376  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2496 10:51:09.322351  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2497 10:51:09.325741  MTRR: Fixed MSR 0x250 0x0606060606060606

 2498 10:51:09.329452  MTRR: Fixed MSR 0x250 0x0606060606060606

 2499 10:51:09.332601  MTRR: Fixed MSR 0x250 0x0606060606060606

 2500 10:51:09.339390  MTRR: Fixed MSR 0x250 0x0606060606060606

 2501 10:51:09.342867  MTRR: Fixed MSR 0x250 0x0606060606060606

 2502 10:51:09.345873  MTRR: Fixed MSR 0x258 0x0606060606060606

 2503 10:51:09.349018  MTRR: Fixed MSR 0x259 0x0000000000000000

 2504 10:51:09.355620  MTRR: Fixed MSR 0x268 0x0606060606060606

 2505 10:51:09.358864  MTRR: Fixed MSR 0x269 0x0606060606060606

 2506 10:51:09.362205  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2507 10:51:09.365747  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2508 10:51:09.372253  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2509 10:51:09.375620  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2510 10:51:09.379556  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2511 10:51:09.383003  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2512 10:51:09.385735  call enable_fixed_mtrr()

 2513 10:51:09.389279  MTRR: Fixed MSR 0x258 0x0606060606060606

 2514 10:51:09.395678  MTRR: Fixed MSR 0x258 0x0606060606060606

 2515 10:51:09.395760  call enable_fixed_mtrr()

 2516 10:51:09.402059  MTRR: Fixed MSR 0x250 0x0606060606060606

 2517 10:51:09.405768  CPU physical address size: 39 bits

 2518 10:51:09.408873  MTRR: Fixed MSR 0x259 0x0000000000000000

 2519 10:51:09.411983  MTRR: Fixed MSR 0x268 0x0606060606060606

 2520 10:51:09.415399  MTRR: Fixed MSR 0x269 0x0606060606060606

 2521 10:51:09.422208  MTRR: Fixed MSR 0x259 0x0000000000000000

 2522 10:51:09.425768  MTRR: Fixed MSR 0x258 0x0606060606060606

 2523 10:51:09.428910  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2524 10:51:09.432587  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2525 10:51:09.435625  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2526 10:51:09.442172  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2527 10:51:09.445579  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2528 10:51:09.449881  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2529 10:51:09.452029  CPU physical address size: 39 bits

 2530 10:51:09.455423  MTRR: Fixed MSR 0x259 0x0000000000000000

 2531 10:51:09.462152  MTRR: Fixed MSR 0x268 0x0606060606060606

 2532 10:51:09.465445  MTRR: Fixed MSR 0x269 0x0606060606060606

 2533 10:51:09.468850  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2534 10:51:09.472055  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2535 10:51:09.478881  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2536 10:51:09.481856  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2537 10:51:09.485405  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2538 10:51:09.488635  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2539 10:51:09.491990  call enable_fixed_mtrr()

 2540 10:51:09.495261  call enable_fixed_mtrr()

 2541 10:51:09.498623  MTRR: Fixed MSR 0x268 0x0606060606060606

 2542 10:51:09.502029  CPU physical address size: 39 bits

 2543 10:51:09.505430  MTRR: Fixed MSR 0x269 0x0606060606060606

 2544 10:51:09.508587  CPU physical address size: 39 bits

 2545 10:51:09.515203  MTRR: Fixed MSR 0x258 0x0606060606060606

 2546 10:51:09.518393  MTRR: Fixed MSR 0x258 0x0606060606060606

 2547 10:51:09.521934  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2548 10:51:09.524948  MTRR: Fixed MSR 0x259 0x0000000000000000

 2549 10:51:09.531776  MTRR: Fixed MSR 0x268 0x0606060606060606

 2550 10:51:09.535098  MTRR: Fixed MSR 0x269 0x0606060606060606

 2551 10:51:09.538471  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2552 10:51:09.541542  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2553 10:51:09.548416  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2554 10:51:09.551792  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2555 10:51:09.555205  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2556 10:51:09.558111  MTRR: Fixed MSR 0x259 0x0000000000000000

 2557 10:51:09.561607  call enable_fixed_mtrr()

 2558 10:51:09.565058  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2559 10:51:09.567993  CPU physical address size: 39 bits

 2560 10:51:09.574803  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2561 10:51:09.578497  MTRR: Fixed MSR 0x268 0x0606060606060606

 2562 10:51:09.581434  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2563 10:51:09.584667  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2564 10:51:09.591348  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2565 10:51:09.594909  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2566 10:51:09.598362  MTRR: Fixed MSR 0x269 0x0606060606060606

 2567 10:51:09.601252  call enable_fixed_mtrr()

 2568 10:51:09.604591  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2569 10:51:09.607877  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2570 10:51:09.614753  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2571 10:51:09.617767  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2572 10:51:09.621030  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2573 10:51:09.624442  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2574 10:51:09.631118  CPU physical address size: 39 bits

 2575 10:51:09.634332  call enable_fixed_mtrr()

 2576 10:51:09.637762  CPU physical address size: 39 bits

 2577 10:51:09.637847  

 2578 10:51:09.641232  MTRR check

 2579 10:51:09.641317  Fixed MTRRs   : Enabled

 2580 10:51:09.644302  Variable MTRRs: Enabled

 2581 10:51:09.644386  

 2582 10:51:09.651082  BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms

 2583 10:51:09.654502  Checking cr50 for pending updates

 2584 10:51:09.665592  Reading cr50 TPM mode

 2585 10:51:09.680791  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2586 10:51:09.690914  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2587 10:51:09.694233  Checking segment from ROM address 0xf96cbe6c

 2588 10:51:09.697587  Checking segment from ROM address 0xf96cbe88

 2589 10:51:09.704306  Loading segment from ROM address 0xf96cbe6c

 2590 10:51:09.704389    code (compression=1)

 2591 10:51:09.714434    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2592 10:51:09.721041  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2593 10:51:09.724351  using LZMA

 2594 10:51:09.746617  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2595 10:51:09.753272  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2596 10:51:09.761859  Loading segment from ROM address 0xf96cbe88

 2597 10:51:09.764735    Entry Point 0x30000000

 2598 10:51:09.764889  Loaded segments

 2599 10:51:09.771356  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2600 10:51:09.778103  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2601 10:51:09.781400  Finalizing chipset.

 2602 10:51:09.781520  apm_control: Finalizing SMM.

 2603 10:51:09.785024  APMC done.

 2604 10:51:09.788235  HECI: CSE device 16.1 is disabled

 2605 10:51:09.791257  HECI: CSE device 16.2 is disabled

 2606 10:51:09.794589  HECI: CSE device 16.3 is disabled

 2607 10:51:09.798080  HECI: CSE device 16.4 is disabled

 2608 10:51:09.801336  HECI: CSE device 16.5 is disabled

 2609 10:51:09.804685  HECI: Sending End-of-Post

 2610 10:51:09.812864  CSE: EOP requested action: continue boot

 2611 10:51:09.816304  CSE EOP successful, continuing boot

 2612 10:51:09.822830  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2613 10:51:09.826294  mp_park_aps done after 0 msecs.

 2614 10:51:09.829381  Jumping to boot code at 0x30000000(0x76891000)

 2615 10:51:09.839548  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2616 10:51:09.843706  

 2617 10:51:09.843828  

 2618 10:51:09.843941  

 2619 10:51:09.846655  Starting depthcharge on Volmar...

 2620 10:51:09.846770  

 2621 10:51:09.847371  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2622 10:51:09.847529  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2623 10:51:09.847664  Setting prompt string to ['brya:']
 2624 10:51:09.847789  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2625 10:51:09.853485  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2626 10:51:09.853608  

 2627 10:51:09.860579  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2628 10:51:09.860698  

 2629 10:51:09.866728  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2630 10:51:09.866848  

 2631 10:51:09.870731  configure_storage: Failed to remap 1C:2

 2632 10:51:09.870849  

 2633 10:51:09.870966  Wipe memory regions:

 2634 10:51:09.873876  

 2635 10:51:09.876959  	[0x00000000001000, 0x000000000a0000)

 2636 10:51:09.877077  

 2637 10:51:09.880037  	[0x00000000100000, 0x00000030000000)

 2638 10:51:09.989751  

 2639 10:51:09.992930  	[0x00000032668e60, 0x00000076857000)

 2640 10:51:10.144531  

 2641 10:51:10.147963  	[0x00000100000000, 0x0000027fc00000)

 2642 10:51:11.001657  

 2643 10:51:11.004880  ec_init: CrosEC protocol v3 supported (256, 256)

 2644 10:51:11.614438  

 2645 10:51:11.614577  R8152: Initializing

 2646 10:51:11.614646  

 2647 10:51:11.617825  Version 9 (ocp_data = 6010)

 2648 10:51:11.617910  

 2649 10:51:11.621243  R8152: Done initializing

 2650 10:51:11.621327  

 2651 10:51:11.624283  Adding net device

 2652 10:51:11.925416  

 2653 10:51:11.928757  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2654 10:51:11.928917  

 2655 10:51:11.929028  

 2656 10:51:11.929139  

 2657 10:51:11.929489  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2659 10:51:12.029926  brya: tftpboot 192.168.201.1 11150749/tftp-deploy-na0g4vxn/kernel/bzImage 11150749/tftp-deploy-na0g4vxn/kernel/cmdline 11150749/tftp-deploy-na0g4vxn/ramdisk/ramdisk.cpio.gz

 2660 10:51:12.030082  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2661 10:51:12.030235  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2662 10:51:12.034524  tftpboot 192.168.201.1 11150749/tftp-deploy-na0g4vxn/kernel/bzIploy-na0g4vxn/kernel/cmdline 11150749/tftp-deploy-na0g4vxn/ramdisk/ramdisk.cpio.gz

 2663 10:51:12.034625  

 2664 10:51:12.034693  Waiting for link

 2665 10:51:12.237491  

 2666 10:51:12.237658  done.

 2667 10:51:12.237797  

 2668 10:51:12.237891  MAC: 00:e0:4c:68:01:8f

 2669 10:51:12.237979  

 2670 10:51:12.240883  Sending DHCP discover... done.

 2671 10:51:12.241000  

 2672 10:51:12.244435  Waiting for reply... done.

 2673 10:51:12.244549  

 2674 10:51:12.247521  Sending DHCP request... done.

 2675 10:51:12.247637  

 2676 10:51:12.250940  Waiting for reply... done.

 2677 10:51:12.251009  

 2678 10:51:12.254135  My ip is 192.168.201.28

 2679 10:51:12.254204  

 2680 10:51:12.257706  The DHCP server ip is 192.168.201.1

 2681 10:51:12.257788  

 2682 10:51:12.260641  TFTP server IP predefined by user: 192.168.201.1

 2683 10:51:12.260724  

 2684 10:51:12.267379  Bootfile predefined by user: 11150749/tftp-deploy-na0g4vxn/kernel/bzImage

 2685 10:51:12.267454  

 2686 10:51:12.270870  Sending tftp read request... done.

 2687 10:51:12.270946  

 2688 10:51:12.274046  Waiting for the transfer... 

 2689 10:51:12.277185  

 2690 10:51:12.536215  00000000 ################################################################

 2691 10:51:12.536401  

 2692 10:51:12.801506  00080000 ################################################################

 2693 10:51:12.801649  

 2694 10:51:13.059605  00100000 ################################################################

 2695 10:51:13.059795  

 2696 10:51:13.321504  00180000 ################################################################

 2697 10:51:13.321714  

 2698 10:51:13.583143  00200000 ################################################################

 2699 10:51:13.583306  

 2700 10:51:13.861575  00280000 ################################################################

 2701 10:51:13.861724  

 2702 10:51:14.120231  00300000 ################################################################

 2703 10:51:14.120379  

 2704 10:51:14.380670  00380000 ################################################################

 2705 10:51:14.380830  

 2706 10:51:14.649377  00400000 ################################################################

 2707 10:51:14.649573  

 2708 10:51:14.927138  00480000 ################################################################

 2709 10:51:14.927273  

 2710 10:51:15.201038  00500000 ################################################################

 2711 10:51:15.201172  

 2712 10:51:15.462645  00580000 ################################################################

 2713 10:51:15.462770  

 2714 10:51:15.735540  00600000 ################################################################

 2715 10:51:15.735681  

 2716 10:51:16.001761  00680000 ################################################################

 2717 10:51:16.001894  

 2718 10:51:16.277254  00700000 ################################################################

 2719 10:51:16.277461  

 2720 10:51:16.548345  00780000 ################################################################

 2721 10:51:16.548501  

 2722 10:51:16.819035  00800000 ################################################################

 2723 10:51:16.819190  

 2724 10:51:17.067648  00880000 ################################################################

 2725 10:51:17.067782  

 2726 10:51:17.333426  00900000 ################################################################

 2727 10:51:17.333569  

 2728 10:51:17.601733  00980000 ################################################################

 2729 10:51:17.601861  

 2730 10:51:17.860402  00a00000 ################################################################

 2731 10:51:17.860561  

 2732 10:51:18.143789  00a80000 ################################################################

 2733 10:51:18.144009  

 2734 10:51:18.399452  00b00000 ################################################################

 2735 10:51:18.399613  

 2736 10:51:18.655511  00b80000 ################################################################

 2737 10:51:18.655681  

 2738 10:51:18.913262  00c00000 ################################################################

 2739 10:51:18.913448  

 2740 10:51:19.172062  00c80000 ################################################################

 2741 10:51:19.172229  

 2742 10:51:19.430934  00d00000 ################################################################

 2743 10:51:19.431093  

 2744 10:51:19.705792  00d80000 ################################################################

 2745 10:51:19.705994  

 2746 10:51:19.978122  00e00000 ################################################################

 2747 10:51:19.978295  

 2748 10:51:20.256998  00e80000 ################################################################

 2749 10:51:20.257144  

 2750 10:51:20.543343  00f00000 ################################################################

 2751 10:51:20.543480  

 2752 10:51:20.630950  00f80000 #################### done.

 2753 10:51:20.633528  

 2754 10:51:20.636745  The bootfile was 16413184 bytes long.

 2755 10:51:20.636848  

 2756 10:51:20.640185  Sending tftp read request... done.

 2757 10:51:20.640267  

 2758 10:51:20.643454  Waiting for the transfer... 

 2759 10:51:20.643537  

 2760 10:51:20.921911  00000000 ################################################################

 2761 10:51:20.922108  

 2762 10:51:21.177513  00080000 ################################################################

 2763 10:51:21.177652  

 2764 10:51:21.479429  00100000 ################################################################

 2765 10:51:21.479590  

 2766 10:51:21.865711  00180000 ################################################################

 2767 10:51:21.865897  

 2768 10:51:22.203408  00200000 ################################################################

 2769 10:51:22.203535  

 2770 10:51:22.451826  00280000 ################################################################

 2771 10:51:22.451987  

 2772 10:51:22.703453  00300000 ################################################################

 2773 10:51:22.703588  

 2774 10:51:22.950833  00380000 ################################################################

 2775 10:51:22.950974  

 2776 10:51:23.198695  00400000 ################################################################

 2777 10:51:23.198863  

 2778 10:51:23.448617  00480000 ################################################################

 2779 10:51:23.448797  

 2780 10:51:23.711995  00500000 ################################################################

 2781 10:51:23.712253  

 2782 10:51:23.988137  00580000 ################################################################

 2783 10:51:23.988345  

 2784 10:51:24.255695  00600000 ################################################################

 2785 10:51:24.255834  

 2786 10:51:24.537187  00680000 ################################################################

 2787 10:51:24.537326  

 2788 10:51:24.830698  00700000 ################################################################

 2789 10:51:24.830869  

 2790 10:51:25.100221  00780000 ################################################################

 2791 10:51:25.100385  

 2792 10:51:25.390089  00800000 ################################################################

 2793 10:51:25.390231  

 2794 10:51:25.668549  00880000 ################################################################

 2795 10:51:25.668686  

 2796 10:51:25.949479  00900000 ################################################################

 2797 10:51:25.949609  

 2798 10:51:26.230054  00980000 ################################################################

 2799 10:51:26.230278  

 2800 10:51:26.507979  00a00000 ################################################################

 2801 10:51:26.508164  

 2802 10:51:26.794241  00a80000 ################################################################

 2803 10:51:26.794400  

 2804 10:51:27.060691  00b00000 ################################################################

 2805 10:51:27.060915  

 2806 10:51:27.333003  00b80000 ################################################################

 2807 10:51:27.333156  

 2808 10:51:27.609992  00c00000 ################################################################

 2809 10:51:27.610150  

 2810 10:51:27.879900  00c80000 ################################################################

 2811 10:51:27.880100  

 2812 10:51:27.937085  00d00000 ############## done.

 2813 10:51:27.937236  

 2814 10:51:27.940000  Sending tftp read request... done.

 2815 10:51:27.940084  

 2816 10:51:27.943856  Waiting for the transfer... 

 2817 10:51:27.943942  

 2818 10:51:27.944008  00000000 # done.

 2819 10:51:27.944072  

 2820 10:51:27.953434  Command line loaded dynamically from TFTP file: 11150749/tftp-deploy-na0g4vxn/kernel/cmdline

 2821 10:51:27.953519  

 2822 10:51:27.966960  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2823 10:51:27.975369  

 2824 10:51:27.978281  Shutting down all USB controllers.

 2825 10:51:27.978365  

 2826 10:51:27.978431  Removing current net device

 2827 10:51:27.978493  

 2828 10:51:27.981582  Finalizing coreboot

 2829 10:51:27.981666  

 2830 10:51:27.988245  Exiting depthcharge with code 4 at timestamp: 28388441

 2831 10:51:27.988329  

 2832 10:51:27.988395  

 2833 10:51:27.988457  Starting kernel ...

 2834 10:51:27.988518  

 2835 10:51:27.988576  

 2836 10:51:27.988969  end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
 2837 10:51:27.989069  start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
 2838 10:51:27.989146  Setting prompt string to ['Linux version [0-9]']
 2839 10:51:27.989213  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2840 10:51:27.989282  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2842 10:55:50.989313  end: 2.2.5 auto-login-action (duration 00:04:23) [common]
 2844 10:55:50.989522  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
 2846 10:55:50.989677  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2849 10:55:50.989923  end: 2 depthcharge-action (duration 00:05:00) [common]
 2851 10:55:50.990135  Cleaning after the job
 2852 10:55:50.990223  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11150749/tftp-deploy-na0g4vxn/ramdisk
 2853 10:55:50.991833  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11150749/tftp-deploy-na0g4vxn/kernel
 2854 10:55:50.993757  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11150749/tftp-deploy-na0g4vxn/modules
 2855 10:55:50.996501  start: 5.1 power-off (timeout 00:00:30) [common]
 2856 10:55:50.996669  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=off'
 2857 10:55:51.072289  >> Command sent successfully.

 2858 10:55:51.074675  Returned 0 in 0 seconds
 2859 10:55:51.175067  end: 5.1 power-off (duration 00:00:00) [common]
 2861 10:55:51.175408  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2862 10:55:51.175673  Listened to connection for namespace 'common' for up to 1s
 2864 10:55:51.176069  Listened to connection for namespace 'common' for up to 1s
 2865 10:55:52.176643  Finalising connection for namespace 'common'
 2866 10:55:52.176878  Disconnecting from shell: Finalise
 2867 10:55:52.176978  
 2868 10:55:52.277291  end: 5.2 read-feedback (duration 00:00:01) [common]
 2869 10:55:52.277432  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11150749
 2870 10:55:52.298959  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11150749
 2871 10:55:52.299151  JobError: Your job cannot terminate cleanly.