Boot log: acer-cbv514-1h-34uz-brya
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 10:43:30.126033 lava-dispatcher, installed at version: 2023.05.1
2 10:43:30.126238 start: 0 validate
3 10:43:30.126367 Start time: 2023-07-27 10:43:30.126360+00:00 (UTC)
4 10:43:30.126493 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:43:30.126705 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 10:43:30.394746 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:43:30.394993 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.186-cip37-526-g7640d76efb649%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:43:30.663150 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:43:30.663732 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.186-cip37-526-g7640d76efb649%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 10:43:36.002995 validate duration: 5.88
12 10:43:36.004889 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 10:43:36.005683 start: 1.1 download-retry (timeout 00:10:00) [common]
14 10:43:36.006352 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 10:43:36.007239 Not decompressing ramdisk as can be used compressed.
16 10:43:36.007711 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 10:43:36.008067 saving as /var/lib/lava/dispatcher/tmp/11150710/tftp-deploy-6xrg_ex7/ramdisk/rootfs.cpio.gz
18 10:43:36.008417 total size: 8418130 (8MB)
19 10:43:36.660120 progress 0% (0MB)
20 10:43:36.674814 progress 5% (0MB)
21 10:43:36.687497 progress 10% (0MB)
22 10:43:36.694997 progress 15% (1MB)
23 10:43:36.700533 progress 20% (1MB)
24 10:43:36.705003 progress 25% (2MB)
25 10:43:36.708918 progress 30% (2MB)
26 10:43:36.712226 progress 35% (2MB)
27 10:43:36.715551 progress 40% (3MB)
28 10:43:36.718788 progress 45% (3MB)
29 10:43:36.721670 progress 50% (4MB)
30 10:43:36.724460 progress 55% (4MB)
31 10:43:36.726958 progress 60% (4MB)
32 10:43:36.729155 progress 65% (5MB)
33 10:43:36.731470 progress 70% (5MB)
34 10:43:36.733701 progress 75% (6MB)
35 10:43:36.735959 progress 80% (6MB)
36 10:43:36.738174 progress 85% (6MB)
37 10:43:36.740583 progress 90% (7MB)
38 10:43:36.742944 progress 95% (7MB)
39 10:43:36.745003 progress 100% (8MB)
40 10:43:36.745240 8MB downloaded in 0.74s (10.90MB/s)
41 10:43:36.745391 end: 1.1.1 http-download (duration 00:00:01) [common]
43 10:43:36.745623 end: 1.1 download-retry (duration 00:00:01) [common]
44 10:43:36.745708 start: 1.2 download-retry (timeout 00:09:59) [common]
45 10:43:36.745791 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 10:43:36.745928 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.186-cip37-526-g7640d76efb649/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 10:43:36.745996 saving as /var/lib/lava/dispatcher/tmp/11150710/tftp-deploy-6xrg_ex7/kernel/bzImage
48 10:43:36.746054 total size: 13407776 (12MB)
49 10:43:36.746112 No compression specified
50 10:43:36.747265 progress 0% (0MB)
51 10:43:36.751026 progress 5% (0MB)
52 10:43:36.754443 progress 10% (1MB)
53 10:43:36.758078 progress 15% (1MB)
54 10:43:36.761550 progress 20% (2MB)
55 10:43:36.765238 progress 25% (3MB)
56 10:43:36.768711 progress 30% (3MB)
57 10:43:36.772334 progress 35% (4MB)
58 10:43:36.776118 progress 40% (5MB)
59 10:43:36.779867 progress 45% (5MB)
60 10:43:36.783342 progress 50% (6MB)
61 10:43:36.787017 progress 55% (7MB)
62 10:43:36.790451 progress 60% (7MB)
63 10:43:36.793910 progress 65% (8MB)
64 10:43:36.797576 progress 70% (8MB)
65 10:43:36.800993 progress 75% (9MB)
66 10:43:36.804833 progress 80% (10MB)
67 10:43:36.808234 progress 85% (10MB)
68 10:43:36.811818 progress 90% (11MB)
69 10:43:36.815210 progress 95% (12MB)
70 10:43:36.818784 progress 100% (12MB)
71 10:43:36.818919 12MB downloaded in 0.07s (175.50MB/s)
72 10:43:36.819062 end: 1.2.1 http-download (duration 00:00:00) [common]
74 10:43:36.819287 end: 1.2 download-retry (duration 00:00:00) [common]
75 10:43:36.819380 start: 1.3 download-retry (timeout 00:09:59) [common]
76 10:43:36.819469 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 10:43:36.819605 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.186-cip37-526-g7640d76efb649/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 10:43:36.819673 saving as /var/lib/lava/dispatcher/tmp/11150710/tftp-deploy-6xrg_ex7/modules/modules.tar
79 10:43:36.819732 total size: 529592 (0MB)
80 10:43:36.819790 Using unxz to decompress xz
81 10:43:36.823762 progress 6% (0MB)
82 10:43:36.824158 progress 12% (0MB)
83 10:43:36.824527 progress 18% (0MB)
84 10:43:36.826192 progress 24% (0MB)
85 10:43:36.828177 progress 30% (0MB)
86 10:43:36.830259 progress 37% (0MB)
87 10:43:36.832441 progress 43% (0MB)
88 10:43:36.834446 progress 49% (0MB)
89 10:43:36.836489 progress 55% (0MB)
90 10:43:36.838412 progress 61% (0MB)
91 10:43:36.840497 progress 68% (0MB)
92 10:43:36.842608 progress 74% (0MB)
93 10:43:36.844446 progress 80% (0MB)
94 10:43:36.846468 progress 86% (0MB)
95 10:43:36.848950 progress 92% (0MB)
96 10:43:36.850924 progress 98% (0MB)
97 10:43:36.857498 0MB downloaded in 0.04s (13.38MB/s)
98 10:43:36.857757 end: 1.3.1 http-download (duration 00:00:00) [common]
100 10:43:36.858039 end: 1.3 download-retry (duration 00:00:00) [common]
101 10:43:36.858140 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
102 10:43:36.858237 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
103 10:43:36.858316 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 10:43:36.858400 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
105 10:43:36.858708 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1
106 10:43:36.858844 makedir: /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin
107 10:43:36.858955 makedir: /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/tests
108 10:43:36.859090 makedir: /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/results
109 10:43:36.859241 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-add-keys
110 10:43:36.859385 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-add-sources
111 10:43:36.859518 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-background-process-start
112 10:43:36.859647 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-background-process-stop
113 10:43:36.859770 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-common-functions
114 10:43:36.859894 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-echo-ipv4
115 10:43:36.860020 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-install-packages
116 10:43:36.860146 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-installed-packages
117 10:43:36.860271 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-os-build
118 10:43:36.860404 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-probe-channel
119 10:43:36.860528 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-probe-ip
120 10:43:36.860652 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-target-ip
121 10:43:36.860773 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-target-mac
122 10:43:36.860894 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-target-storage
123 10:43:36.861022 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-test-case
124 10:43:36.861144 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-test-event
125 10:43:36.861266 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-test-feedback
126 10:43:36.861394 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-test-raise
127 10:43:36.861536 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-test-reference
128 10:43:36.861664 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-test-runner
129 10:43:36.861790 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-test-set
130 10:43:36.861923 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-test-shell
131 10:43:36.862050 Updating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-install-packages (oe)
132 10:43:36.862206 Updating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/bin/lava-installed-packages (oe)
133 10:43:36.862328 Creating /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/environment
134 10:43:36.862429 LAVA metadata
135 10:43:36.862504 - LAVA_JOB_ID=11150710
136 10:43:36.862609 - LAVA_DISPATCHER_IP=192.168.201.1
137 10:43:36.862716 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
138 10:43:36.862785 skipped lava-vland-overlay
139 10:43:36.862859 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 10:43:36.862944 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
141 10:43:36.863006 skipped lava-multinode-overlay
142 10:43:36.863080 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 10:43:36.863160 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
144 10:43:36.863243 Loading test definitions
145 10:43:36.863344 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
146 10:43:36.863416 Using /lava-11150710 at stage 0
147 10:43:36.863735 uuid=11150710_1.4.2.3.1 testdef=None
148 10:43:36.863822 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 10:43:36.863908 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
150 10:43:36.864459 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 10:43:36.864706 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
153 10:43:36.865341 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 10:43:36.865566 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
156 10:43:36.866185 runner path: /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/0/tests/0_dmesg test_uuid 11150710_1.4.2.3.1
157 10:43:36.866343 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 10:43:36.866602 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
160 10:43:36.866675 Using /lava-11150710 at stage 1
161 10:43:36.866972 uuid=11150710_1.4.2.3.5 testdef=None
162 10:43:36.867059 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 10:43:36.867142 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
164 10:43:36.867610 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 10:43:36.867825 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
167 10:43:36.868470 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 10:43:36.868699 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
170 10:43:36.869315 runner path: /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/1/tests/1_bootrr test_uuid 11150710_1.4.2.3.5
171 10:43:36.869464 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 10:43:36.869667 Creating lava-test-runner.conf files
174 10:43:36.869728 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/0 for stage 0
175 10:43:36.869817 - 0_dmesg
176 10:43:36.869898 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11150710/lava-overlay-m8tfr2k1/lava-11150710/1 for stage 1
177 10:43:36.869994 - 1_bootrr
178 10:43:36.870086 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 10:43:36.870171 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
180 10:43:36.878675 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 10:43:36.878777 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
182 10:43:36.878860 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 10:43:36.878942 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 10:43:36.879026 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
185 10:43:37.131643 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 10:43:37.132000 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
187 10:43:37.132118 extracting modules file /var/lib/lava/dispatcher/tmp/11150710/tftp-deploy-6xrg_ex7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11150710/extract-overlay-ramdisk-3f3tcvmf/ramdisk
188 10:43:37.158192 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 10:43:37.158393 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
190 10:43:37.158528 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11150710/compress-overlay-sw4e0qpm/overlay-1.4.2.4.tar.gz to ramdisk
191 10:43:37.158646 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11150710/compress-overlay-sw4e0qpm/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11150710/extract-overlay-ramdisk-3f3tcvmf/ramdisk
192 10:43:37.166999 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 10:43:37.167127 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 10:43:37.167220 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 10:43:37.167309 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 10:43:37.167386 Building ramdisk /var/lib/lava/dispatcher/tmp/11150710/extract-overlay-ramdisk-3f3tcvmf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11150710/extract-overlay-ramdisk-3f3tcvmf/ramdisk
197 10:43:37.304125 >> 54148 blocks
198 10:43:38.212254 rename /var/lib/lava/dispatcher/tmp/11150710/extract-overlay-ramdisk-3f3tcvmf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11150710/tftp-deploy-6xrg_ex7/ramdisk/ramdisk.cpio.gz
199 10:43:38.212686 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 10:43:38.212810 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 10:43:38.212909 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 10:43:38.213006 No mkimage arch provided, not using FIT.
203 10:43:38.213097 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 10:43:38.213181 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 10:43:38.213282 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 10:43:38.213371 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 10:43:38.213452 No LXC device requested
208 10:43:38.213534 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 10:43:38.213615 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 10:43:38.213698 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 10:43:38.213769 Checking files for TFTP limit of 4294967296 bytes.
212 10:43:38.214176 end: 1 tftp-deploy (duration 00:00:02) [common]
213 10:43:38.214279 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 10:43:38.214366 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 10:43:38.214485 substitutions:
216 10:43:38.214578 - {DTB}: None
217 10:43:38.214657 - {INITRD}: 11150710/tftp-deploy-6xrg_ex7/ramdisk/ramdisk.cpio.gz
218 10:43:38.214714 - {KERNEL}: 11150710/tftp-deploy-6xrg_ex7/kernel/bzImage
219 10:43:38.214770 - {LAVA_MAC}: None
220 10:43:38.214825 - {PRESEED_CONFIG}: None
221 10:43:38.214879 - {PRESEED_LOCAL}: None
222 10:43:38.214932 - {RAMDISK}: 11150710/tftp-deploy-6xrg_ex7/ramdisk/ramdisk.cpio.gz
223 10:43:38.214986 - {ROOT_PART}: None
224 10:43:38.215040 - {ROOT}: None
225 10:43:38.215093 - {SERVER_IP}: 192.168.201.1
226 10:43:38.215147 - {TEE}: None
227 10:43:38.215201 Parsed boot commands:
228 10:43:38.215254 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 10:43:38.215428 Parsed boot commands: tftpboot 192.168.201.1 11150710/tftp-deploy-6xrg_ex7/kernel/bzImage 11150710/tftp-deploy-6xrg_ex7/kernel/cmdline 11150710/tftp-deploy-6xrg_ex7/ramdisk/ramdisk.cpio.gz
230 10:43:38.215513 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 10:43:38.215601 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 10:43:38.215695 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 10:43:38.215790 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 10:43:38.215861 Not connected, no need to disconnect.
235 10:43:38.215935 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 10:43:38.216016 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 10:43:38.216083 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-7'
238 10:43:38.219698 Setting prompt string to ['lava-test: # ']
239 10:43:38.220062 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 10:43:38.220172 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 10:43:38.220268 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 10:43:38.220362 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 10:43:38.220604 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=reboot'
244 10:43:43.369891 >> Command sent successfully.
245 10:43:43.376569 Returned 0 in 5 seconds
246 10:43:43.477284 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 10:43:43.478755 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 10:43:43.479293 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 10:43:43.479777 Setting prompt string to 'Starting depthcharge on Volmar...'
251 10:43:43.480177 Changing prompt to 'Starting depthcharge on Volmar...'
252 10:43:43.480864 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 10:43:43.482173 [Enter `^Ec?' for help]
254 10:43:44.850193
255 10:43:44.850790
256 10:43:44.856846 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 10:43:44.859974 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 10:43:44.866886 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 10:43:44.873846 CPU: AES supported, TXT NOT supported, VT supported
260 10:43:44.881100 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 10:43:44.881644 Cache size = 10 MiB
262 10:43:44.888041 MCH: device id 4609 (rev 04) is Alderlake-P
263 10:43:44.891637 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 10:43:44.895325 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 10:43:44.899359 VBOOT: Loading verstage.
266 10:43:44.902655 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 10:43:44.909353 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 10:43:44.912619 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 10:43:44.922543 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 10:43:44.929329 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 10:43:44.929815
272 10:43:44.930304
273 10:43:44.939833 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 10:43:44.943800 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 10:43:44.946996 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 10:43:44.950731 I2C TX abort detected (00000001)
277 10:43:44.954081 cr50_i2c_read: Address write failed
278 10:43:44.967012 .done! DID_VID 0x00281ae0
279 10:43:44.970501 TPM ready after 0 ms
280 10:43:44.973647 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
281 10:43:44.988703 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
282 10:43:44.991661 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
283 10:43:45.032856 tlcl_send_startup: Startup return code is 0
284 10:43:45.033343 TPM: setup succeeded
285 10:43:45.054608 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
286 10:43:45.076517 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
287 10:43:45.079964 Chrome EC: UHEPI supported
288 10:43:45.083718 Reading cr50 boot mode
289 10:43:45.098700 Cr50 says boot_mode is VERIFIED_RW(0x00).
290 10:43:45.099127 Phase 1
291 10:43:45.105304 FMAP: area GBB found @ 1805000 (458752 bytes)
292 10:43:45.111816 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
293 10:43:45.118576 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
294 10:43:45.125258 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
295 10:43:45.125712 Phase 2
296 10:43:45.128313 Phase 3
297 10:43:45.131909 FMAP: area GBB found @ 1805000 (458752 bytes)
298 10:43:45.138632 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 10:43:45.142200 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
300 10:43:45.148654 VB2:vb2_verify_keyblock() Checking keyblock signature...
301 10:43:45.155552 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
302 10:43:45.162438 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
303 10:43:45.172188 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
304 10:43:45.183417 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 10:43:45.187155 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
306 10:43:45.193245 VB2:vb2_verify_fw_preamble() Verifying preamble.
307 10:43:45.199779 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
308 10:43:45.206713 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
309 10:43:45.213538 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
310 10:43:45.217433 Phase 4
311 10:43:45.220723 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
312 10:43:45.227361 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
313 10:43:45.439957 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 10:43:45.446709 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 10:43:45.449908 Saving vboot hash.
316 10:43:45.456786 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
317 10:43:45.472694 tlcl_extend: response is 0
318 10:43:45.479516 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
319 10:43:45.482731 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
320 10:43:45.500196 tlcl_extend: response is 0
321 10:43:45.507273 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
322 10:43:45.527057 tlcl_lock_nv_write: response is 0
323 10:43:45.546491 tlcl_lock_nv_write: response is 0
324 10:43:45.547216 Slot A is selected
325 10:43:45.552849 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
326 10:43:45.559646 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
327 10:43:45.566500 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
328 10:43:45.573082 BS: verstage times (exec / console): total (unknown) / 264 ms
329 10:43:45.573688
330 10:43:45.574090
331 10:43:45.579662 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
332 10:43:45.583294 Google Chrome EC: version:
333 10:43:45.586877 ro: volmar_v2.0.14126-e605144e9c
334 10:43:45.590156 rw: volmar_v0.0.55-22d1557
335 10:43:45.593501 running image: 2
336 10:43:45.596838 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
337 10:43:45.606999 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 10:43:45.613687 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 10:43:45.620968 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
340 10:43:45.630410 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 10:43:45.640790 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 10:43:45.643765 EC took 941us to calculate image hash
343 10:43:45.653944 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 10:43:45.657209 VB2:sync_ec() select_rw=RW(active)
345 10:43:45.668032 Waited 275us to clear limit power flag.
346 10:43:45.671560 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 10:43:45.675087 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
348 10:43:45.678367 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 10:43:45.684862 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
350 10:43:45.688093 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
351 10:43:45.691518 TCO_STS: 0000 0000
352 10:43:45.692181 GEN_PMCON: d0015038 00002200
353 10:43:45.694904 GBLRST_CAUSE: 00000000 00000000
354 10:43:45.698232 HPR_CAUSE0: 00000000
355 10:43:45.701489 prev_sleep_state 5
356 10:43:45.704796 Abort disabling TXT, as CPU is not TXT capable.
357 10:43:45.712960 cse_lite: Number of partitions = 3
358 10:43:45.716080 cse_lite: Current partition = RO
359 10:43:45.716669 cse_lite: Next partition = RO
360 10:43:45.719639 cse_lite: Flags = 0x7
361 10:43:45.726186 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
362 10:43:45.736431 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
363 10:43:45.739651 FMAP: area SI_ME found @ 1000 (5238784 bytes)
364 10:43:45.746274 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
365 10:43:45.752932 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
366 10:43:45.759772 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
367 10:43:45.762845 cse_lite: CSE CBFS RW version : 16.1.25.2049
368 10:43:45.769370 cse_lite: Set Boot Partition Info Command (RW)
369 10:43:45.773045 HECI: Global Reset(Type:1) Command
370 10:43:47.185659
371 10:43:47.186229
372 10:43:47.192910 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
373 10:43:47.196694 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
374 10:43:47.203503 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
375 10:43:47.206503 CPU: AES supported, TXT NOT supported, VT supported
376 10:43:47.213186 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
377 10:43:47.216846 Cache size = 10 MiB
378 10:43:47.220152 MCH: device id 4609 (rev 04) is Alderlake-P
379 10:43:47.227009 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
380 10:43:47.230239 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
381 10:43:47.233963 VBOOT: Loading verstage.
382 10:43:47.238051 FMAP: Found "FLASH" version 1.1 at 0x1804000.
383 10:43:47.245130 FMAP: base = 0x0 size = 0x2000000 #areas = 37
384 10:43:47.248443 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
385 10:43:47.255653 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
386 10:43:47.265812 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
387 10:43:47.266275
388 10:43:47.266686
389 10:43:47.272378 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
390 10:43:47.279984 Probing TPM I2C: I2C bus 1 version 0x3230302a
391 10:43:47.283772 DW I2C bus 1 at 0xfe022000 (400 KHz)
392 10:43:47.287059 done! DID_VID 0x00281ae0
393 10:43:47.290397 TPM ready after 0 ms
394 10:43:47.294140 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
395 10:43:47.302477 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
396 10:43:47.310249 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
397 10:43:47.353814 tlcl_send_startup: Startup return code is 0
398 10:43:47.354375 TPM: setup succeeded
399 10:43:47.374941 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
400 10:43:47.397318 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
401 10:43:47.400865 Chrome EC: UHEPI supported
402 10:43:47.404740 Reading cr50 boot mode
403 10:43:47.419910 Cr50 says boot_mode is VERIFIED_RW(0x00).
404 10:43:47.420375 Phase 1
405 10:43:47.426634 FMAP: area GBB found @ 1805000 (458752 bytes)
406 10:43:47.433461 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
407 10:43:47.439933 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
408 10:43:47.446657 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
409 10:43:47.447126 Phase 2
410 10:43:47.449748 Phase 3
411 10:43:47.453745 FMAP: area GBB found @ 1805000 (458752 bytes)
412 10:43:47.459912 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
413 10:43:47.463382 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
414 10:43:47.470686 VB2:vb2_verify_keyblock() Checking keyblock signature...
415 10:43:47.477022 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
416 10:43:47.483618 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
417 10:43:47.493616 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
418 10:43:47.505206 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
419 10:43:47.508452 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
420 10:43:47.515064 VB2:vb2_verify_fw_preamble() Verifying preamble.
421 10:43:47.521600 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
422 10:43:47.528586 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
423 10:43:47.535246 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
424 10:43:47.538657 Phase 4
425 10:43:47.541949 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
426 10:43:47.548642 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
427 10:43:47.761430 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
428 10:43:47.767945 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
429 10:43:47.771147 Saving vboot hash.
430 10:43:47.777960 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
431 10:43:47.793575 tlcl_extend: response is 0
432 10:43:47.800224 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
433 10:43:47.803617 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
434 10:43:47.821521 tlcl_extend: response is 0
435 10:43:47.827940 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
436 10:43:47.848094 tlcl_lock_nv_write: response is 0
437 10:43:47.867069 tlcl_lock_nv_write: response is 0
438 10:43:47.867651 Slot A is selected
439 10:43:47.873705 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
440 10:43:47.880513 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
441 10:43:47.887028 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
442 10:43:47.893385 BS: verstage times (exec / console): total (unknown) / 256 ms
443 10:43:47.893881
444 10:43:47.894250
445 10:43:47.900028 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
446 10:43:47.904293 Google Chrome EC: version:
447 10:43:47.907408 ro: volmar_v2.0.14126-e605144e9c
448 10:43:47.910636 rw: volmar_v0.0.55-22d1557
449 10:43:47.914045 running image: 2
450 10:43:47.917694 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
451 10:43:47.927652 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
452 10:43:47.934669 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
453 10:43:47.941323 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
454 10:43:47.951102 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
455 10:43:47.961482 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
456 10:43:47.964941 EC took 941us to calculate image hash
457 10:43:47.975037 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
458 10:43:47.978182 VB2:sync_ec() select_rw=RW(active)
459 10:43:47.988644 Waited 270us to clear limit power flag.
460 10:43:47.992441 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
461 10:43:47.996194 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
462 10:43:47.999816 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
463 10:43:48.002867 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
464 10:43:48.009972 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
465 10:43:48.010435 TCO_STS: 0000 0000
466 10:43:48.013316 GEN_PMCON: d1001038 00002200
467 10:43:48.016385 GBLRST_CAUSE: 00000040 00000000
468 10:43:48.019676 HPR_CAUSE0: 00000000
469 10:43:48.020145 prev_sleep_state 5
470 10:43:48.027125 Abort disabling TXT, as CPU is not TXT capable.
471 10:43:48.034171 cse_lite: Number of partitions = 3
472 10:43:48.034873 cse_lite: Current partition = RW
473 10:43:48.037411 cse_lite: Next partition = RW
474 10:43:48.040355 cse_lite: Flags = 0x7
475 10:43:48.047380 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
476 10:43:48.057369 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
477 10:43:48.060392 FMAP: area SI_ME found @ 1000 (5238784 bytes)
478 10:43:48.067374 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
479 10:43:48.073621 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
480 10:43:48.080957 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
481 10:43:48.084091 cse_lite: CSE CBFS RW version : 16.1.25.2049
482 10:43:48.087256 Boot Count incremented to 2202
483 10:43:48.094232 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
484 10:43:48.100987 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
485 10:43:48.112972 Probing TPM I2C: done! DID_VID 0x00281ae0
486 10:43:48.116321 Locality already claimed
487 10:43:48.119825 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
488 10:43:48.139686 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
489 10:43:48.145948 MRC: Hash idx 0x100d comparison successful.
490 10:43:48.149540 MRC cache found, size f6c8
491 10:43:48.150115 bootmode is set to: 2
492 10:43:48.153074 EC returned error result code 3
493 10:43:48.156400 FW_CONFIG value from CBI is 0x131
494 10:43:48.163279 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
495 10:43:48.166632 SPD index = 0
496 10:43:48.170063 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
497 10:43:48.173261 SPD: module type is LPDDR4X
498 10:43:48.180168 SPD: module part number is K4U6E3S4AB-MGCL
499 10:43:48.186857 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
500 10:43:48.190312 SPD: device width 16 bits, bus width 16 bits
501 10:43:48.193489 SPD: module size is 1024 MB (per channel)
502 10:43:48.262527 CBMEM:
503 10:43:48.265755 IMD: root @ 0x76fff000 254 entries.
504 10:43:48.269071 IMD: root @ 0x76ffec00 62 entries.
505 10:43:48.276879 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
506 10:43:48.280343 RO_VPD is uninitialized or empty.
507 10:43:48.283479 FMAP: area RW_VPD found @ f29000 (8192 bytes)
508 10:43:48.286754 RW_VPD is uninitialized or empty.
509 10:43:48.293400 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
510 10:43:48.296757 External stage cache:
511 10:43:48.300333 IMD: root @ 0x7bbff000 254 entries.
512 10:43:48.303557 IMD: root @ 0x7bbfec00 62 entries.
513 10:43:48.310026 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
514 10:43:48.316630 MRC: Checking cached data update for 'RW_MRC_CACHE'.
515 10:43:48.319875 MRC: 'RW_MRC_CACHE' does not need update.
516 10:43:48.320339 8 DIMMs found
517 10:43:48.323558 SMM Memory Map
518 10:43:48.326733 SMRAM : 0x7b800000 0x800000
519 10:43:48.330149 Subregion 0: 0x7b800000 0x200000
520 10:43:48.333557 Subregion 1: 0x7ba00000 0x200000
521 10:43:48.336871 Subregion 2: 0x7bc00000 0x400000
522 10:43:48.340223 top_of_ram = 0x77000000
523 10:43:48.343775 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
524 10:43:48.350311 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
525 10:43:48.353663 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
526 10:43:48.360631 MTRR Range: Start=ff000000 End=0 (Size 1000000)
527 10:43:48.361293 Normal boot
528 10:43:48.370408 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
529 10:43:48.376971 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
530 10:43:48.383821 Processing 237 relocs. Offset value of 0x74ab9000
531 10:43:48.391641 BS: romstage times (exec / console): total (unknown) / 380 ms
532 10:43:48.398507
533 10:43:48.399040
534 10:43:48.405551 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
535 10:43:48.406024 Normal boot
536 10:43:48.411590 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
537 10:43:48.418213 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
538 10:43:48.425145 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
539 10:43:48.435318 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
540 10:43:48.482642 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
541 10:43:48.489276 Processing 5931 relocs. Offset value of 0x72a2f000
542 10:43:48.492577 BS: postcar times (exec / console): total (unknown) / 51 ms
543 10:43:48.493143
544 10:43:48.496212
545 10:43:48.502597 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
546 10:43:48.506059 Reserving BERT start 76a1e000, size 10000
547 10:43:48.509421 Normal boot
548 10:43:48.512630 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
549 10:43:48.519727 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
550 10:43:48.526457 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
551 10:43:48.532988 FMAP: area RW_VPD found @ f29000 (8192 bytes)
552 10:43:48.536272 Google Chrome EC: version:
553 10:43:48.539532 ro: volmar_v2.0.14126-e605144e9c
554 10:43:48.542721 rw: volmar_v0.0.55-22d1557
555 10:43:48.543145 running image: 2
556 10:43:48.549234 ACPI _SWS is PM1 Index 8 GPE Index -1
557 10:43:48.552697 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
558 10:43:48.557644 EC returned error result code 3
559 10:43:48.560819 FW_CONFIG value from CBI is 0x131
560 10:43:48.567713 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
561 10:43:48.571139 PCI: 00:1c.2 disabled by fw_config
562 10:43:48.574788 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
563 10:43:48.581450 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
564 10:43:48.587856 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
565 10:43:48.591345 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
566 10:43:48.595105 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
567 10:43:48.604798 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
568 10:43:48.607849 microcode: sig=0x906a4 pf=0x80 revision=0x423
569 10:43:48.614495 microcode: Update skipped, already up-to-date
570 10:43:48.621335 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
571 10:43:48.652644 Detected 6 core, 8 thread CPU.
572 10:43:48.656376 Setting up SMI for CPU
573 10:43:48.659313 IED base = 0x7bc00000
574 10:43:48.659735 IED size = 0x00400000
575 10:43:48.663101 Will perform SMM setup.
576 10:43:48.666400 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
577 10:43:48.669815 LAPIC 0x0 in XAPIC mode.
578 10:43:48.679479 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
579 10:43:48.682940 Processing 18 relocs. Offset value of 0x00030000
580 10:43:48.687187 Attempting to start 7 APs
581 10:43:48.690439 Waiting for 10ms after sending INIT.
582 10:43:48.703420 Waiting for SIPI to complete...
583 10:43:48.707159 done.
584 10:43:48.707622 LAPIC 0x1 in XAPIC mode.
585 10:43:48.710607 LAPIC 0x10 in XAPIC mode.
586 10:43:48.713744 LAPIC 0x8 in XAPIC mode.
587 10:43:48.717002 LAPIC 0x9 in XAPIC mode.
588 10:43:48.720395 AP: slot 3 apic_id 10, MCU rev: 0x00000423
589 10:43:48.723628 LAPIC 0x12 in XAPIC mode.
590 10:43:48.727034 LAPIC 0x14 in XAPIC mode.
591 10:43:48.730096 AP: slot 6 apic_id 1, MCU rev: 0x00000423
592 10:43:48.733499 Waiting for SIPI to complete...
593 10:43:48.734069 done.
594 10:43:48.737197 AP: slot 4 apic_id 12, MCU rev: 0x00000423
595 10:43:48.740479 LAPIC 0x16 in XAPIC mode.
596 10:43:48.743550 AP: slot 1 apic_id 14, MCU rev: 0x00000423
597 10:43:48.750103 AP: slot 2 apic_id 16, MCU rev: 0x00000423
598 10:43:48.754003 AP: slot 5 apic_id 9, MCU rev: 0x00000423
599 10:43:48.757168 AP: slot 7 apic_id 8, MCU rev: 0x00000423
600 10:43:48.760348 smm_setup_relocation_handler: enter
601 10:43:48.763896 smm_setup_relocation_handler: exit
602 10:43:48.773824 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
603 10:43:48.777298 Processing 11 relocs. Offset value of 0x00038000
604 10:43:48.784003 smm_module_setup_stub: stack_top = 0x7b804000
605 10:43:48.787294 smm_module_setup_stub: per cpu stack_size = 0x800
606 10:43:48.794020 smm_module_setup_stub: runtime.start32_offset = 0x4c
607 10:43:48.797203 smm_module_setup_stub: runtime.smm_size = 0x10000
608 10:43:48.804305 SMM Module: stub loaded at 38000. Will call 0x76a52094
609 10:43:48.807568 Installing permanent SMM handler to 0x7b800000
610 10:43:48.814155 smm_load_module: total_smm_space_needed e468, available -> 200000
611 10:43:48.823998 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
612 10:43:48.827337 Processing 255 relocs. Offset value of 0x7b9f6000
613 10:43:48.830689 smm_load_module: smram_start: 0x7b800000
614 10:43:48.833927 smm_load_module: smram_end: 7ba00000
615 10:43:48.840367 smm_load_module: handler start 0x7b9f6d5f
616 10:43:48.844006 smm_load_module: handler_size 98d0
617 10:43:48.847171 smm_load_module: fxsave_area 0x7b9ff000
618 10:43:48.850495 smm_load_module: fxsave_size 1000
619 10:43:48.853868 smm_load_module: CONFIG_MSEG_SIZE 0x0
620 10:43:48.860489 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
621 10:43:48.863959 smm_load_module: handler_mod_params.smbase = 0x7b800000
622 10:43:48.870505 smm_load_module: per_cpu_save_state_size = 0x400
623 10:43:48.873680 smm_load_module: num_cpus = 0x8
624 10:43:48.880539 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
625 10:43:48.883902 smm_load_module: total_save_state_size = 0x2000
626 10:43:48.887006 smm_load_module: cpu0 entry: 7b9e6000
627 10:43:48.893974 smm_create_map: cpus allowed in one segment 30
628 10:43:48.897332 smm_create_map: min # of segments needed 1
629 10:43:48.897798 CPU 0x0
630 10:43:48.900568 smbase 7b9e6000 entry 7b9ee000
631 10:43:48.907027 ss_start 7b9f5c00 code_end 7b9ee208
632 10:43:48.907491 CPU 0x1
633 10:43:48.910368 smbase 7b9e5c00 entry 7b9edc00
634 10:43:48.913944 ss_start 7b9f5800 code_end 7b9ede08
635 10:43:48.917047 CPU 0x2
636 10:43:48.921037 smbase 7b9e5800 entry 7b9ed800
637 10:43:48.924376 ss_start 7b9f5400 code_end 7b9eda08
638 10:43:48.924942 CPU 0x3
639 10:43:48.930648 smbase 7b9e5400 entry 7b9ed400
640 10:43:48.933951 ss_start 7b9f5000 code_end 7b9ed608
641 10:43:48.934491 CPU 0x4
642 10:43:48.937377 smbase 7b9e5000 entry 7b9ed000
643 10:43:48.943913 ss_start 7b9f4c00 code_end 7b9ed208
644 10:43:48.944462 CPU 0x5
645 10:43:48.947383 smbase 7b9e4c00 entry 7b9ecc00
646 10:43:48.953825 ss_start 7b9f4800 code_end 7b9ece08
647 10:43:48.954284 CPU 0x6
648 10:43:48.957263 smbase 7b9e4800 entry 7b9ec800
649 10:43:48.960825 ss_start 7b9f4400 code_end 7b9eca08
650 10:43:48.964030 CPU 0x7
651 10:43:48.967361 smbase 7b9e4400 entry 7b9ec400
652 10:43:48.970488 ss_start 7b9f4000 code_end 7b9ec608
653 10:43:48.980646 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
654 10:43:48.984069 Processing 11 relocs. Offset value of 0x7b9ee000
655 10:43:48.990701 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
656 10:43:48.997285 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
657 10:43:49.003621 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
658 10:43:49.007002 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
659 10:43:49.013929 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
660 10:43:49.020369 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
661 10:43:49.027013 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
662 10:43:49.033950 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
663 10:43:49.040187 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
664 10:43:49.046896 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
665 10:43:49.053457 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
666 10:43:49.056940 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
667 10:43:49.063405 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
668 10:43:49.069992 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
669 10:43:49.076636 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
670 10:43:49.083493 smm_module_setup_stub: stack_top = 0x7b804000
671 10:43:49.086761 smm_module_setup_stub: per cpu stack_size = 0x800
672 10:43:49.093579 smm_module_setup_stub: runtime.start32_offset = 0x4c
673 10:43:49.096832 smm_module_setup_stub: runtime.smm_size = 0x200000
674 10:43:49.103699 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
675 10:43:49.107026 Clearing SMI status registers
676 10:43:49.110517 SMI_STS: PM1
677 10:43:49.113899 PM1_STS: WAK PWRBTN
678 10:43:49.120520 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
679 10:43:49.123760 In relocation handler: CPU 0
680 10:43:49.127484 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
681 10:43:49.130811 Writing SMRR. base = 0x7b800006, mask=0xff800c00
682 10:43:49.134222 Relocation complete.
683 10:43:49.140623 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
684 10:43:49.143910 In relocation handler: CPU 6
685 10:43:49.147169 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
686 10:43:49.150608 Relocation complete.
687 10:43:49.157060 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
688 10:43:49.160650 In relocation handler: CPU 4
689 10:43:49.164009 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
690 10:43:49.170619 Writing SMRR. base = 0x7b800006, mask=0xff800c00
691 10:43:49.171111 Relocation complete.
692 10:43:49.177236 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
693 10:43:49.180647 In relocation handler: CPU 3
694 10:43:49.184002 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
695 10:43:49.190742 Writing SMRR. base = 0x7b800006, mask=0xff800c00
696 10:43:49.193852 Relocation complete.
697 10:43:49.200923 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
698 10:43:49.204212 In relocation handler: CPU 2
699 10:43:49.207507 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
700 10:43:49.210777 Writing SMRR. base = 0x7b800006, mask=0xff800c00
701 10:43:49.214646 Relocation complete.
702 10:43:49.220921 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
703 10:43:49.224185 In relocation handler: CPU 1
704 10:43:49.227824 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
705 10:43:49.234051 Writing SMRR. base = 0x7b800006, mask=0xff800c00
706 10:43:49.234657 Relocation complete.
707 10:43:49.241227 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
708 10:43:49.244665 In relocation handler: CPU 5
709 10:43:49.247645 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
710 10:43:49.251187 Relocation complete.
711 10:43:49.257856 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
712 10:43:49.260992 In relocation handler: CPU 7
713 10:43:49.264587 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
714 10:43:49.271340 Writing SMRR. base = 0x7b800006, mask=0xff800c00
715 10:43:49.271905 Relocation complete.
716 10:43:49.274761 Initializing CPU #0
717 10:43:49.277838 CPU: vendor Intel device 906a4
718 10:43:49.281132 CPU: family 06, model 9a, stepping 04
719 10:43:49.285192 Clearing out pending MCEs
720 10:43:49.288066 cpu: energy policy set to 7
721 10:43:49.291074 Turbo is available but hidden
722 10:43:49.294638 Turbo is available and visible
723 10:43:49.298084 microcode: Update skipped, already up-to-date
724 10:43:49.301321 CPU #0 initialized
725 10:43:49.301786 Initializing CPU #6
726 10:43:49.304617 Initializing CPU #3
727 10:43:49.305082 Initializing CPU #4
728 10:43:49.307720 Initializing CPU #5
729 10:43:49.311287 Initializing CPU #2
730 10:43:49.314477 CPU: vendor Intel device 906a4
731 10:43:49.317816 CPU: family 06, model 9a, stepping 04
732 10:43:49.321514 CPU: vendor Intel device 906a4
733 10:43:49.324741 CPU: family 06, model 9a, stepping 04
734 10:43:49.327829 Clearing out pending MCEs
735 10:43:49.331612 CPU: vendor Intel device 906a4
736 10:43:49.334671 CPU: family 06, model 9a, stepping 04
737 10:43:49.335142 cpu: energy policy set to 7
738 10:43:49.338043 CPU: vendor Intel device 906a4
739 10:43:49.345072 CPU: family 06, model 9a, stepping 04
740 10:43:49.348297 microcode: Update skipped, already up-to-date
741 10:43:49.351554 CPU #3 initialized
742 10:43:49.352022 Clearing out pending MCEs
743 10:43:49.354588 Clearing out pending MCEs
744 10:43:49.358059 cpu: energy policy set to 7
745 10:43:49.361511 Initializing CPU #1
746 10:43:49.362032 cpu: energy policy set to 7
747 10:43:49.364865 CPU: vendor Intel device 906a4
748 10:43:49.368319 CPU: family 06, model 9a, stepping 04
749 10:43:49.371255 Clearing out pending MCEs
750 10:43:49.378322 microcode: Update skipped, already up-to-date
751 10:43:49.378833 CPU #2 initialized
752 10:43:49.385062 microcode: Update skipped, already up-to-date
753 10:43:49.385841 CPU #4 initialized
754 10:43:49.388402 cpu: energy policy set to 7
755 10:43:49.391544 Clearing out pending MCEs
756 10:43:49.395053 CPU: vendor Intel device 906a4
757 10:43:49.398219 CPU: family 06, model 9a, stepping 04
758 10:43:49.401404 cpu: energy policy set to 7
759 10:43:49.401980 Initializing CPU #7
760 10:43:49.408120 microcode: Update skipped, already up-to-date
761 10:43:49.408680 CPU #1 initialized
762 10:43:49.411629 Clearing out pending MCEs
763 10:43:49.414898 microcode: Update skipped, already up-to-date
764 10:43:49.418474 CPU #5 initialized
765 10:43:49.421649 CPU: vendor Intel device 906a4
766 10:43:49.424984 CPU: family 06, model 9a, stepping 04
767 10:43:49.428256 cpu: energy policy set to 7
768 10:43:49.431605 Clearing out pending MCEs
769 10:43:49.435311 microcode: Update skipped, already up-to-date
770 10:43:49.438023 CPU #6 initialized
771 10:43:49.441341 cpu: energy policy set to 7
772 10:43:49.444676 microcode: Update skipped, already up-to-date
773 10:43:49.444782 CPU #7 initialized
774 10:43:49.451441 bsp_do_flight_plan done after 712 msecs.
775 10:43:49.454838 CPU: frequency set to 4400 MHz
776 10:43:49.454926 Enabling SMIs.
777 10:43:49.461649 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
778 10:43:49.477748 Probing TPM I2C: done! DID_VID 0x00281ae0
779 10:43:49.481072 Locality already claimed
780 10:43:49.484730 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
781 10:43:49.495679 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
782 10:43:49.499076 Enabling GPIO PM b/c CR50 has long IRQ pulse support
783 10:43:49.505465 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
784 10:43:49.512583 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
785 10:43:49.515789 Found a VBT of 9216 bytes after decompression
786 10:43:49.519168 PCI 1.0, PIN A, using IRQ #16
787 10:43:49.522514 PCI 2.0, PIN A, using IRQ #17
788 10:43:49.525720 PCI 4.0, PIN A, using IRQ #18
789 10:43:49.529122 PCI 5.0, PIN A, using IRQ #16
790 10:43:49.532534 PCI 6.0, PIN A, using IRQ #16
791 10:43:49.535800 PCI 6.2, PIN C, using IRQ #18
792 10:43:49.539049 PCI 7.0, PIN A, using IRQ #19
793 10:43:49.542460 PCI 7.1, PIN B, using IRQ #20
794 10:43:49.545679 PCI 7.2, PIN C, using IRQ #21
795 10:43:49.548787 PCI 7.3, PIN D, using IRQ #22
796 10:43:49.552112 PCI 8.0, PIN A, using IRQ #23
797 10:43:49.555402 PCI D.0, PIN A, using IRQ #17
798 10:43:49.558759 PCI D.1, PIN B, using IRQ #19
799 10:43:49.558847 PCI 10.0, PIN A, using IRQ #24
800 10:43:49.562440 PCI 10.1, PIN B, using IRQ #25
801 10:43:49.566138 PCI 10.6, PIN C, using IRQ #20
802 10:43:49.569080 PCI 10.7, PIN D, using IRQ #21
803 10:43:49.572276 PCI 11.0, PIN A, using IRQ #26
804 10:43:49.575608 PCI 11.1, PIN B, using IRQ #27
805 10:43:49.579313 PCI 11.2, PIN C, using IRQ #28
806 10:43:49.582626 PCI 11.3, PIN D, using IRQ #29
807 10:43:49.586027 PCI 12.0, PIN A, using IRQ #30
808 10:43:49.589443 PCI 12.6, PIN B, using IRQ #31
809 10:43:49.592488 PCI 12.7, PIN C, using IRQ #22
810 10:43:49.595676 PCI 13.0, PIN A, using IRQ #32
811 10:43:49.598998 PCI 13.1, PIN B, using IRQ #33
812 10:43:49.602525 PCI 13.2, PIN C, using IRQ #34
813 10:43:49.605617 PCI 13.3, PIN D, using IRQ #35
814 10:43:49.609372 PCI 14.0, PIN B, using IRQ #23
815 10:43:49.610004 PCI 14.1, PIN A, using IRQ #36
816 10:43:49.612580 PCI 14.3, PIN C, using IRQ #17
817 10:43:49.616029 PCI 15.0, PIN A, using IRQ #37
818 10:43:49.619175 PCI 15.1, PIN B, using IRQ #38
819 10:43:49.622529 PCI 15.2, PIN C, using IRQ #39
820 10:43:49.625901 PCI 15.3, PIN D, using IRQ #40
821 10:43:49.629131 PCI 16.0, PIN A, using IRQ #18
822 10:43:49.632490 PCI 16.1, PIN B, using IRQ #19
823 10:43:49.635820 PCI 16.2, PIN C, using IRQ #20
824 10:43:49.639071 PCI 16.3, PIN D, using IRQ #21
825 10:43:49.642472 PCI 16.4, PIN A, using IRQ #18
826 10:43:49.645570 PCI 16.5, PIN B, using IRQ #19
827 10:43:49.649306 PCI 17.0, PIN A, using IRQ #22
828 10:43:49.652356 PCI 19.0, PIN A, using IRQ #41
829 10:43:49.656126 PCI 19.1, PIN B, using IRQ #42
830 10:43:49.659345 PCI 19.2, PIN C, using IRQ #43
831 10:43:49.659811 PCI 1C.0, PIN A, using IRQ #16
832 10:43:49.662591 PCI 1C.1, PIN B, using IRQ #17
833 10:43:49.665912 PCI 1C.2, PIN C, using IRQ #18
834 10:43:49.669155 PCI 1C.3, PIN D, using IRQ #19
835 10:43:49.672353 PCI 1C.4, PIN A, using IRQ #16
836 10:43:49.675681 PCI 1C.5, PIN B, using IRQ #17
837 10:43:49.679115 PCI 1C.6, PIN C, using IRQ #18
838 10:43:49.682661 PCI 1C.7, PIN D, using IRQ #19
839 10:43:49.685768 PCI 1D.0, PIN A, using IRQ #16
840 10:43:49.688963 PCI 1D.1, PIN B, using IRQ #17
841 10:43:49.692282 PCI 1D.2, PIN C, using IRQ #18
842 10:43:49.695872 PCI 1D.3, PIN D, using IRQ #19
843 10:43:49.699353 PCI 1E.0, PIN A, using IRQ #23
844 10:43:49.702618 PCI 1E.1, PIN B, using IRQ #20
845 10:43:49.705529 PCI 1E.2, PIN C, using IRQ #44
846 10:43:49.708768 PCI 1E.3, PIN D, using IRQ #45
847 10:43:49.709204 PCI 1F.3, PIN B, using IRQ #22
848 10:43:49.712318 PCI 1F.4, PIN C, using IRQ #23
849 10:43:49.715616 PCI 1F.6, PIN D, using IRQ #20
850 10:43:49.719231 PCI 1F.7, PIN A, using IRQ #21
851 10:43:49.725761 IRQ: Using dynamically assigned PCI IO-APIC IRQs
852 10:43:49.732285 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
853 10:43:49.912013 FSPS returned 0
854 10:43:49.915402 Executing Phase 1 of FspMultiPhaseSiInit
855 10:43:49.925287 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
856 10:43:49.929000 port C0 DISC req: usage 1 usb3 1 usb2 1
857 10:43:49.932529 Raw Buffer output 0 00000111
858 10:43:49.935645 Raw Buffer output 1 00000000
859 10:43:49.939106 pmc_send_ipc_cmd succeeded
860 10:43:49.945640 port C1 DISC req: usage 1 usb3 3 usb2 3
861 10:43:49.946110 Raw Buffer output 0 00000331
862 10:43:49.948774 Raw Buffer output 1 00000000
863 10:43:49.952855 pmc_send_ipc_cmd succeeded
864 10:43:49.956648 Detected 6 core, 8 thread CPU.
865 10:43:49.960207 Detected 6 core, 8 thread CPU.
866 10:43:49.965265 Detected 6 core, 8 thread CPU.
867 10:43:49.968511 Detected 6 core, 8 thread CPU.
868 10:43:49.971991 Detected 6 core, 8 thread CPU.
869 10:43:49.975692 Detected 6 core, 8 thread CPU.
870 10:43:49.978869 Detected 6 core, 8 thread CPU.
871 10:43:49.982138 Detected 6 core, 8 thread CPU.
872 10:43:49.985471 Detected 6 core, 8 thread CPU.
873 10:43:49.988818 Detected 6 core, 8 thread CPU.
874 10:43:49.992066 Detected 6 core, 8 thread CPU.
875 10:43:49.995396 Detected 6 core, 8 thread CPU.
876 10:43:49.999344 Detected 6 core, 8 thread CPU.
877 10:43:50.002312 Detected 6 core, 8 thread CPU.
878 10:43:50.005906 Detected 6 core, 8 thread CPU.
879 10:43:50.009185 Detected 6 core, 8 thread CPU.
880 10:43:50.012445 Detected 6 core, 8 thread CPU.
881 10:43:50.015981 Detected 6 core, 8 thread CPU.
882 10:43:50.016453 Detected 6 core, 8 thread CPU.
883 10:43:50.019461 Detected 6 core, 8 thread CPU.
884 10:43:50.022723 Detected 6 core, 8 thread CPU.
885 10:43:50.026003 Detected 6 core, 8 thread CPU.
886 10:43:50.318065 Detected 6 core, 8 thread CPU.
887 10:43:50.321230 Detected 6 core, 8 thread CPU.
888 10:43:50.324727 Detected 6 core, 8 thread CPU.
889 10:43:50.328458 Detected 6 core, 8 thread CPU.
890 10:43:50.331685 Detected 6 core, 8 thread CPU.
891 10:43:50.335078 Detected 6 core, 8 thread CPU.
892 10:43:50.338306 Detected 6 core, 8 thread CPU.
893 10:43:50.341572 Detected 6 core, 8 thread CPU.
894 10:43:50.344876 Detected 6 core, 8 thread CPU.
895 10:43:50.348246 Detected 6 core, 8 thread CPU.
896 10:43:50.351616 Detected 6 core, 8 thread CPU.
897 10:43:50.354951 Detected 6 core, 8 thread CPU.
898 10:43:50.358243 Detected 6 core, 8 thread CPU.
899 10:43:50.361430 Detected 6 core, 8 thread CPU.
900 10:43:50.364952 Detected 6 core, 8 thread CPU.
901 10:43:50.368491 Detected 6 core, 8 thread CPU.
902 10:43:50.371605 Detected 6 core, 8 thread CPU.
903 10:43:50.371690 Detected 6 core, 8 thread CPU.
904 10:43:50.374858 Detected 6 core, 8 thread CPU.
905 10:43:50.378453 Detected 6 core, 8 thread CPU.
906 10:43:50.381713 Display FSP Version Info HOB
907 10:43:50.385023 Reference Code - CPU = c.0.65.70
908 10:43:50.388468 uCode Version = 0.0.4.23
909 10:43:50.391711 TXT ACM version = ff.ff.ff.ffff
910 10:43:50.395384 Reference Code - ME = c.0.65.70
911 10:43:50.398538 MEBx version = 0.0.0.0
912 10:43:50.402046 ME Firmware Version = Lite SKU
913 10:43:50.405258 Reference Code - PCH = c.0.65.70
914 10:43:50.405341 PCH-CRID Status = Disabled
915 10:43:50.412132 PCH-CRID Original Value = ff.ff.ff.ffff
916 10:43:50.415257 PCH-CRID New Value = ff.ff.ff.ffff
917 10:43:50.418551 OPROM - RST - RAID = ff.ff.ff.ffff
918 10:43:50.421864 PCH Hsio Version = 4.0.0.0
919 10:43:50.425509 Reference Code - SA - System Agent = c.0.65.70
920 10:43:50.428657 Reference Code - MRC = 0.0.3.80
921 10:43:50.431988 SA - PCIe Version = c.0.65.70
922 10:43:50.435353 SA-CRID Status = Disabled
923 10:43:50.438509 SA-CRID Original Value = 0.0.0.4
924 10:43:50.441935 SA-CRID New Value = 0.0.0.4
925 10:43:50.442018 OPROM - VBIOS = ff.ff.ff.ffff
926 10:43:50.448521 IO Manageability Engine FW Version = 24.0.4.0
927 10:43:50.451738 PHY Build Version = 0.0.0.2016
928 10:43:50.455154 Thunderbolt(TM) FW Version = 0.0.0.0
929 10:43:50.461860 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
930 10:43:50.468512 BS: BS_DEV_INIT_CHIPS run times (exec / console): 491 / 507 ms
931 10:43:50.468600 Enumerating buses...
932 10:43:50.475286 Show all devs... Before device enumeration.
933 10:43:50.475369 Root Device: enabled 1
934 10:43:50.478745 CPU_CLUSTER: 0: enabled 1
935 10:43:50.482047 DOMAIN: 0000: enabled 1
936 10:43:50.482130 GPIO: 0: enabled 1
937 10:43:50.485259 PCI: 00:00.0: enabled 1
938 10:43:50.488440 PCI: 00:01.0: enabled 0
939 10:43:50.491764 PCI: 00:01.1: enabled 0
940 10:43:50.491846 PCI: 00:02.0: enabled 1
941 10:43:50.495243 PCI: 00:04.0: enabled 1
942 10:43:50.498292 PCI: 00:05.0: enabled 0
943 10:43:50.501521 PCI: 00:06.0: enabled 1
944 10:43:50.501604 PCI: 00:06.2: enabled 0
945 10:43:50.505058 PCI: 00:07.0: enabled 0
946 10:43:50.508500 PCI: 00:07.1: enabled 0
947 10:43:50.511852 PCI: 00:07.2: enabled 0
948 10:43:50.511935 PCI: 00:07.3: enabled 0
949 10:43:50.515572 PCI: 00:08.0: enabled 0
950 10:43:50.518708 PCI: 00:09.0: enabled 0
951 10:43:50.518817 PCI: 00:0a.0: enabled 1
952 10:43:50.521927 PCI: 00:0d.0: enabled 1
953 10:43:50.525352 PCI: 00:0d.1: enabled 0
954 10:43:50.528545 PCI: 00:0d.2: enabled 0
955 10:43:50.528628 PCI: 00:0d.3: enabled 0
956 10:43:50.531992 PCI: 00:0e.0: enabled 0
957 10:43:50.535589 PCI: 00:10.0: enabled 0
958 10:43:50.538843 PCI: 00:10.1: enabled 0
959 10:43:50.538925 PCI: 00:10.6: enabled 0
960 10:43:50.542085 PCI: 00:10.7: enabled 0
961 10:43:50.545538 PCI: 00:12.0: enabled 0
962 10:43:50.545620 PCI: 00:12.6: enabled 0
963 10:43:50.548860 PCI: 00:12.7: enabled 0
964 10:43:50.552162 PCI: 00:13.0: enabled 0
965 10:43:50.555383 PCI: 00:14.0: enabled 1
966 10:43:50.555466 PCI: 00:14.1: enabled 0
967 10:43:50.558728 PCI: 00:14.2: enabled 1
968 10:43:50.562069 PCI: 00:14.3: enabled 1
969 10:43:50.565457 PCI: 00:15.0: enabled 1
970 10:43:50.565539 PCI: 00:15.1: enabled 1
971 10:43:50.569183 PCI: 00:15.2: enabled 0
972 10:43:50.572051 PCI: 00:15.3: enabled 1
973 10:43:50.572133 PCI: 00:16.0: enabled 1
974 10:43:50.575817 PCI: 00:16.1: enabled 0
975 10:43:50.579189 PCI: 00:16.2: enabled 0
976 10:43:50.582486 PCI: 00:16.3: enabled 0
977 10:43:50.582605 PCI: 00:16.4: enabled 0
978 10:43:50.585671 PCI: 00:16.5: enabled 0
979 10:43:50.588959 PCI: 00:17.0: enabled 1
980 10:43:50.592320 PCI: 00:19.0: enabled 0
981 10:43:50.592403 PCI: 00:19.1: enabled 1
982 10:43:50.595736 PCI: 00:19.2: enabled 0
983 10:43:50.599153 PCI: 00:1a.0: enabled 0
984 10:43:50.602299 PCI: 00:1c.0: enabled 0
985 10:43:50.602382 PCI: 00:1c.1: enabled 0
986 10:43:50.605557 PCI: 00:1c.2: enabled 0
987 10:43:50.608951 PCI: 00:1c.3: enabled 0
988 10:43:50.609034 PCI: 00:1c.4: enabled 0
989 10:43:50.612391 PCI: 00:1c.5: enabled 0
990 10:43:50.615811 PCI: 00:1c.6: enabled 0
991 10:43:50.619078 PCI: 00:1c.7: enabled 0
992 10:43:50.619168 PCI: 00:1d.0: enabled 0
993 10:43:50.622460 PCI: 00:1d.1: enabled 0
994 10:43:50.625993 PCI: 00:1d.2: enabled 0
995 10:43:50.629256 PCI: 00:1d.3: enabled 0
996 10:43:50.629338 PCI: 00:1e.0: enabled 1
997 10:43:50.632317 PCI: 00:1e.1: enabled 0
998 10:43:50.635764 PCI: 00:1e.2: enabled 0
999 10:43:50.635847 PCI: 00:1e.3: enabled 1
1000 10:43:50.639130 PCI: 00:1f.0: enabled 1
1001 10:43:50.642498 PCI: 00:1f.1: enabled 0
1002 10:43:50.645878 PCI: 00:1f.2: enabled 1
1003 10:43:50.645960 PCI: 00:1f.3: enabled 1
1004 10:43:50.649349 PCI: 00:1f.4: enabled 0
1005 10:43:50.652534 PCI: 00:1f.5: enabled 1
1006 10:43:50.655689 PCI: 00:1f.6: enabled 0
1007 10:43:50.655771 PCI: 00:1f.7: enabled 0
1008 10:43:50.659272 GENERIC: 0.0: enabled 1
1009 10:43:50.662454 GENERIC: 0.0: enabled 1
1010 10:43:50.662537 GENERIC: 1.0: enabled 1
1011 10:43:50.665785 GENERIC: 0.0: enabled 1
1012 10:43:50.669045 GENERIC: 1.0: enabled 1
1013 10:43:50.672521 USB0 port 0: enabled 1
1014 10:43:50.672604 USB0 port 0: enabled 1
1015 10:43:50.675655 GENERIC: 0.0: enabled 1
1016 10:43:50.679068 I2C: 00:1a: enabled 1
1017 10:43:50.679150 I2C: 00:31: enabled 1
1018 10:43:50.682402 I2C: 00:32: enabled 1
1019 10:43:50.685746 I2C: 00:50: enabled 1
1020 10:43:50.685828 I2C: 00:10: enabled 1
1021 10:43:50.689429 I2C: 00:15: enabled 1
1022 10:43:50.692587 I2C: 00:2c: enabled 1
1023 10:43:50.696048 GENERIC: 0.0: enabled 1
1024 10:43:50.696131 SPI: 00: enabled 1
1025 10:43:50.699021 PNP: 0c09.0: enabled 1
1026 10:43:50.702914 GENERIC: 0.0: enabled 1
1027 10:43:50.702996 USB3 port 0: enabled 1
1028 10:43:50.705926 USB3 port 1: enabled 0
1029 10:43:50.709026 USB3 port 2: enabled 1
1030 10:43:50.709107 USB3 port 3: enabled 0
1031 10:43:50.712995 USB2 port 0: enabled 1
1032 10:43:50.715749 USB2 port 1: enabled 0
1033 10:43:50.715830 USB2 port 2: enabled 1
1034 10:43:50.719074 USB2 port 3: enabled 0
1035 10:43:50.722391 USB2 port 4: enabled 0
1036 10:43:50.726072 USB2 port 5: enabled 1
1037 10:43:50.726154 USB2 port 6: enabled 0
1038 10:43:50.729435 USB2 port 7: enabled 0
1039 10:43:50.732692 USB2 port 8: enabled 1
1040 10:43:50.732772 USB2 port 9: enabled 1
1041 10:43:50.735837 USB3 port 0: enabled 1
1042 10:43:50.739511 USB3 port 1: enabled 0
1043 10:43:50.739593 USB3 port 2: enabled 0
1044 10:43:50.742782 USB3 port 3: enabled 0
1045 10:43:50.745895 GENERIC: 0.0: enabled 1
1046 10:43:50.749248 GENERIC: 1.0: enabled 1
1047 10:43:50.749330 APIC: 00: enabled 1
1048 10:43:50.752601 APIC: 14: enabled 1
1049 10:43:50.752682 APIC: 16: enabled 1
1050 10:43:50.756331 APIC: 10: enabled 1
1051 10:43:50.759334 APIC: 12: enabled 1
1052 10:43:50.759415 APIC: 09: enabled 1
1053 10:43:50.762878 APIC: 01: enabled 1
1054 10:43:50.766211 APIC: 08: enabled 1
1055 10:43:50.766292 Compare with tree...
1056 10:43:50.769662 Root Device: enabled 1
1057 10:43:50.773025 CPU_CLUSTER: 0: enabled 1
1058 10:43:50.773106 APIC: 00: enabled 1
1059 10:43:50.776361 APIC: 14: enabled 1
1060 10:43:50.779433 APIC: 16: enabled 1
1061 10:43:50.779514 APIC: 10: enabled 1
1062 10:43:50.782866 APIC: 12: enabled 1
1063 10:43:50.786252 APIC: 09: enabled 1
1064 10:43:50.786333 APIC: 01: enabled 1
1065 10:43:50.789549 APIC: 08: enabled 1
1066 10:43:50.792729 DOMAIN: 0000: enabled 1
1067 10:43:50.795868 GPIO: 0: enabled 1
1068 10:43:50.795981 PCI: 00:00.0: enabled 1
1069 10:43:50.799210 PCI: 00:01.0: enabled 0
1070 10:43:50.802989 PCI: 00:01.1: enabled 0
1071 10:43:50.806301 PCI: 00:02.0: enabled 1
1072 10:43:50.806385 PCI: 00:04.0: enabled 1
1073 10:43:50.809623 GENERIC: 0.0: enabled 1
1074 10:43:50.812803 PCI: 00:05.0: enabled 0
1075 10:43:50.816411 PCI: 00:06.0: enabled 1
1076 10:43:50.819718 PCI: 00:06.2: enabled 0
1077 10:43:50.819799 PCI: 00:08.0: enabled 0
1078 10:43:50.823002 PCI: 00:09.0: enabled 0
1079 10:43:50.826304 PCI: 00:0a.0: enabled 1
1080 10:43:50.829491 PCI: 00:0d.0: enabled 1
1081 10:43:50.833002 USB0 port 0: enabled 1
1082 10:43:50.833083 USB3 port 0: enabled 1
1083 10:43:50.836316 USB3 port 1: enabled 0
1084 10:43:50.839462 USB3 port 2: enabled 1
1085 10:43:50.842616 USB3 port 3: enabled 0
1086 10:43:50.846298 PCI: 00:0d.1: enabled 0
1087 10:43:50.846410 PCI: 00:0d.2: enabled 0
1088 10:43:50.849364 PCI: 00:0d.3: enabled 0
1089 10:43:50.852917 PCI: 00:0e.0: enabled 0
1090 10:43:50.856243 PCI: 00:10.0: enabled 0
1091 10:43:50.859805 PCI: 00:10.1: enabled 0
1092 10:43:50.859947 PCI: 00:10.6: enabled 0
1093 10:43:50.862762 PCI: 00:10.7: enabled 0
1094 10:43:50.866054 PCI: 00:12.0: enabled 0
1095 10:43:50.869857 PCI: 00:12.6: enabled 0
1096 10:43:50.872724 PCI: 00:12.7: enabled 0
1097 10:43:50.872847 PCI: 00:13.0: enabled 0
1098 10:43:50.876662 PCI: 00:14.0: enabled 1
1099 10:43:50.879789 USB0 port 0: enabled 1
1100 10:43:50.883049 USB2 port 0: enabled 1
1101 10:43:50.886359 USB2 port 1: enabled 0
1102 10:43:50.886440 USB2 port 2: enabled 1
1103 10:43:50.889734 USB2 port 3: enabled 0
1104 10:43:50.893154 USB2 port 4: enabled 0
1105 10:43:50.896574 USB2 port 5: enabled 1
1106 10:43:50.899717 USB2 port 6: enabled 0
1107 10:43:50.899799 USB2 port 7: enabled 0
1108 10:43:50.903044 USB2 port 8: enabled 1
1109 10:43:50.906201 USB2 port 9: enabled 1
1110 10:43:50.910081 USB3 port 0: enabled 1
1111 10:43:50.913229 USB3 port 1: enabled 0
1112 10:43:50.916543 USB3 port 2: enabled 0
1113 10:43:50.916662 USB3 port 3: enabled 0
1114 10:43:50.919618 PCI: 00:14.1: enabled 0
1115 10:43:50.923015 PCI: 00:14.2: enabled 1
1116 10:43:50.926779 PCI: 00:14.3: enabled 1
1117 10:43:50.929579 GENERIC: 0.0: enabled 1
1118 10:43:50.929660 PCI: 00:15.0: enabled 1
1119 10:43:50.932938 I2C: 00:1a: enabled 1
1120 10:43:50.936641 I2C: 00:31: enabled 1
1121 10:43:50.940083 I2C: 00:32: enabled 1
1122 10:43:50.940172 PCI: 00:15.1: enabled 1
1123 10:43:50.943483 I2C: 00:50: enabled 1
1124 10:43:50.946507 PCI: 00:15.2: enabled 0
1125 10:43:50.949968 PCI: 00:15.3: enabled 1
1126 10:43:50.950049 I2C: 00:10: enabled 1
1127 10:43:50.953237 PCI: 00:16.0: enabled 1
1128 10:43:50.956585 PCI: 00:16.1: enabled 0
1129 10:43:50.960106 PCI: 00:16.2: enabled 0
1130 10:43:50.963120 PCI: 00:16.3: enabled 0
1131 10:43:50.963238 PCI: 00:16.4: enabled 0
1132 10:43:50.966522 PCI: 00:16.5: enabled 0
1133 10:43:50.970176 PCI: 00:17.0: enabled 1
1134 10:43:50.973179 PCI: 00:19.0: enabled 0
1135 10:43:50.976869 PCI: 00:19.1: enabled 1
1136 10:43:50.976968 I2C: 00:15: enabled 1
1137 10:43:50.980212 I2C: 00:2c: enabled 1
1138 10:43:50.983468 PCI: 00:19.2: enabled 0
1139 10:43:50.986713 PCI: 00:1a.0: enabled 0
1140 10:43:50.986795 PCI: 00:1e.0: enabled 1
1141 10:43:50.989895 PCI: 00:1e.1: enabled 0
1142 10:43:50.993690 PCI: 00:1e.2: enabled 0
1143 10:43:50.996588 PCI: 00:1e.3: enabled 1
1144 10:43:51.000086 SPI: 00: enabled 1
1145 10:43:51.000168 PCI: 00:1f.0: enabled 1
1146 10:43:51.003269 PNP: 0c09.0: enabled 1
1147 10:43:51.007145 PCI: 00:1f.1: enabled 0
1148 10:43:51.010459 PCI: 00:1f.2: enabled 1
1149 10:43:51.010596 GENERIC: 0.0: enabled 1
1150 10:43:51.013365 GENERIC: 0.0: enabled 1
1151 10:43:51.016794 GENERIC: 1.0: enabled 1
1152 10:43:51.020003 PCI: 00:1f.3: enabled 1
1153 10:43:51.023575 PCI: 00:1f.4: enabled 0
1154 10:43:51.027042 PCI: 00:1f.5: enabled 1
1155 10:43:51.027124 PCI: 00:1f.6: enabled 0
1156 10:43:51.030494 PCI: 00:1f.7: enabled 0
1157 10:43:51.033346 Root Device scanning...
1158 10:43:51.036912 scan_static_bus for Root Device
1159 10:43:51.040023 CPU_CLUSTER: 0 enabled
1160 10:43:51.040131 DOMAIN: 0000 enabled
1161 10:43:51.043435 DOMAIN: 0000 scanning...
1162 10:43:51.046676 PCI: pci_scan_bus for bus 00
1163 10:43:51.050358 PCI: 00:00.0 [8086/0000] ops
1164 10:43:51.053634 PCI: 00:00.0 [8086/4609] enabled
1165 10:43:51.057106 PCI: 00:02.0 [8086/0000] bus ops
1166 10:43:51.060121 PCI: 00:02.0 [8086/46b3] enabled
1167 10:43:51.063720 PCI: 00:04.0 [8086/0000] bus ops
1168 10:43:51.066992 PCI: 00:04.0 [8086/461d] enabled
1169 10:43:51.070626 PCI: 00:06.0 [8086/0000] bus ops
1170 10:43:51.073853 PCI: 00:06.0 [8086/464d] enabled
1171 10:43:51.077232 PCI: 00:08.0 [8086/464f] disabled
1172 10:43:51.080744 PCI: 00:0a.0 [8086/467d] enabled
1173 10:43:51.083784 PCI: 00:0d.0 [8086/0000] bus ops
1174 10:43:51.087271 PCI: 00:0d.0 [8086/461e] enabled
1175 10:43:51.090450 PCI: 00:14.0 [8086/0000] bus ops
1176 10:43:51.093844 PCI: 00:14.0 [8086/51ed] enabled
1177 10:43:51.096889 PCI: 00:14.2 [8086/51ef] enabled
1178 10:43:51.100550 PCI: 00:14.3 [8086/0000] bus ops
1179 10:43:51.103828 PCI: 00:14.3 [8086/51f0] enabled
1180 10:43:51.107051 PCI: 00:15.0 [8086/0000] bus ops
1181 10:43:51.110491 PCI: 00:15.0 [8086/51e8] enabled
1182 10:43:51.113813 PCI: 00:15.1 [8086/0000] bus ops
1183 10:43:51.117317 PCI: 00:15.1 [8086/51e9] enabled
1184 10:43:51.120537 PCI: 00:15.2 [8086/0000] bus ops
1185 10:43:51.123863 PCI: 00:15.2 [8086/51ea] disabled
1186 10:43:51.126998 PCI: 00:15.3 [8086/0000] bus ops
1187 10:43:51.130362 PCI: 00:15.3 [8086/51eb] enabled
1188 10:43:51.133583 PCI: 00:16.0 [8086/0000] ops
1189 10:43:51.137356 PCI: 00:16.0 [8086/51e0] enabled
1190 10:43:51.143870 PCI: Static device PCI: 00:17.0 not found, disabling it.
1191 10:43:51.147511 PCI: 00:19.0 [8086/0000] bus ops
1192 10:43:51.150692 PCI: 00:19.0 [8086/51c5] disabled
1193 10:43:51.154468 PCI: 00:19.1 [8086/0000] bus ops
1194 10:43:51.157331 PCI: 00:19.1 [8086/51c6] enabled
1195 10:43:51.160835 PCI: 00:1e.0 [8086/0000] ops
1196 10:43:51.164021 PCI: 00:1e.0 [8086/51a8] enabled
1197 10:43:51.167452 PCI: 00:1e.3 [8086/0000] bus ops
1198 10:43:51.170530 PCI: 00:1e.3 [8086/51ab] enabled
1199 10:43:51.173911 PCI: 00:1f.0 [8086/0000] bus ops
1200 10:43:51.177333 PCI: 00:1f.0 [8086/5182] enabled
1201 10:43:51.177792 RTC Init
1202 10:43:51.180637 Set power on after power failure.
1203 10:43:51.184060 Disabling Deep S3
1204 10:43:51.184707 Disabling Deep S3
1205 10:43:51.187303 Disabling Deep S4
1206 10:43:51.190436 Disabling Deep S4
1207 10:43:51.191174 Disabling Deep S5
1208 10:43:51.193950 Disabling Deep S5
1209 10:43:51.197383 PCI: 00:1f.2 [0000/0000] hidden
1210 10:43:51.200753 PCI: 00:1f.3 [8086/0000] bus ops
1211 10:43:51.204251 PCI: 00:1f.3 [8086/51c8] enabled
1212 10:43:51.207545 PCI: 00:1f.5 [8086/0000] bus ops
1213 10:43:51.210964 PCI: 00:1f.5 [8086/51a4] enabled
1214 10:43:51.211401 GPIO: 0 enabled
1215 10:43:51.213976 PCI: Leftover static devices:
1216 10:43:51.214409 PCI: 00:01.0
1217 10:43:51.217408 PCI: 00:01.1
1218 10:43:51.217875 PCI: 00:05.0
1219 10:43:51.220890 PCI: 00:06.2
1220 10:43:51.221306 PCI: 00:09.0
1221 10:43:51.223908 PCI: 00:0d.1
1222 10:43:51.224483 PCI: 00:0d.2
1223 10:43:51.225040 PCI: 00:0d.3
1224 10:43:51.227318 PCI: 00:0e.0
1225 10:43:51.227774 PCI: 00:10.0
1226 10:43:51.230657 PCI: 00:10.1
1227 10:43:51.231074 PCI: 00:10.6
1228 10:43:51.231402 PCI: 00:10.7
1229 10:43:51.234114 PCI: 00:12.0
1230 10:43:51.234531 PCI: 00:12.6
1231 10:43:51.237418 PCI: 00:12.7
1232 10:43:51.237833 PCI: 00:13.0
1233 10:43:51.238161 PCI: 00:14.1
1234 10:43:51.240816 PCI: 00:16.1
1235 10:43:51.241338 PCI: 00:16.2
1236 10:43:51.244065 PCI: 00:16.3
1237 10:43:51.244483 PCI: 00:16.4
1238 10:43:51.247467 PCI: 00:16.5
1239 10:43:51.247885 PCI: 00:17.0
1240 10:43:51.248220 PCI: 00:19.2
1241 10:43:51.250722 PCI: 00:1a.0
1242 10:43:51.251137 PCI: 00:1e.1
1243 10:43:51.254153 PCI: 00:1e.2
1244 10:43:51.254772 PCI: 00:1f.1
1245 10:43:51.255322 PCI: 00:1f.4
1246 10:43:51.257652 PCI: 00:1f.6
1247 10:43:51.258235 PCI: 00:1f.7
1248 10:43:51.260669 PCI: Check your devicetree.cb.
1249 10:43:51.264276 PCI: 00:02.0 scanning...
1250 10:43:51.267225 scan_generic_bus for PCI: 00:02.0
1251 10:43:51.270812 scan_generic_bus for PCI: 00:02.0 done
1252 10:43:51.277610 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1253 10:43:51.278053 PCI: 00:04.0 scanning...
1254 10:43:51.280878 scan_generic_bus for PCI: 00:04.0
1255 10:43:51.284300 GENERIC: 0.0 enabled
1256 10:43:51.290774 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1257 10:43:51.294127 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1258 10:43:51.297512 PCI: 00:06.0 scanning...
1259 10:43:51.301401 do_pci_scan_bridge for PCI: 00:06.0
1260 10:43:51.304172 PCI: pci_scan_bus for bus 01
1261 10:43:51.307581 PCI: 01:00.0 [15b7/5009] enabled
1262 10:43:51.311180 Enabling Common Clock Configuration
1263 10:43:51.314222 L1 Sub-State supported from root port 6
1264 10:43:51.317455 L1 Sub-State Support = 0x5
1265 10:43:51.321085 CommonModeRestoreTime = 0x6e
1266 10:43:51.324487 Power On Value = 0x5, Power On Scale = 0x2
1267 10:43:51.327527 ASPM: Enabled L1
1268 10:43:51.331017 PCIe: Max_Payload_Size adjusted to 256
1269 10:43:51.334206 PCI: 01:00.0: Enabled LTR
1270 10:43:51.337755 PCI: 01:00.0: Programmed LTR max latencies
1271 10:43:51.341095 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1272 10:43:51.344511 PCI: 00:0d.0 scanning...
1273 10:43:51.347846 scan_static_bus for PCI: 00:0d.0
1274 10:43:51.351239 USB0 port 0 enabled
1275 10:43:51.351887 USB0 port 0 scanning...
1276 10:43:51.354747 scan_static_bus for USB0 port 0
1277 10:43:51.357572 USB3 port 0 enabled
1278 10:43:51.361323 USB3 port 1 disabled
1279 10:43:51.361877 USB3 port 2 enabled
1280 10:43:51.364451 USB3 port 3 disabled
1281 10:43:51.367632 USB3 port 0 scanning...
1282 10:43:51.370888 scan_static_bus for USB3 port 0
1283 10:43:51.374184 scan_static_bus for USB3 port 0 done
1284 10:43:51.377932 scan_bus: bus USB3 port 0 finished in 6 msecs
1285 10:43:51.381076 USB3 port 2 scanning...
1286 10:43:51.384440 scan_static_bus for USB3 port 2
1287 10:43:51.387864 scan_static_bus for USB3 port 2 done
1288 10:43:51.391267 scan_bus: bus USB3 port 2 finished in 6 msecs
1289 10:43:51.394464 scan_static_bus for USB0 port 0 done
1290 10:43:51.401239 scan_bus: bus USB0 port 0 finished in 43 msecs
1291 10:43:51.404395 scan_static_bus for PCI: 00:0d.0 done
1292 10:43:51.407631 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1293 10:43:51.410952 PCI: 00:14.0 scanning...
1294 10:43:51.414584 scan_static_bus for PCI: 00:14.0
1295 10:43:51.418194 USB0 port 0 enabled
1296 10:43:51.421456 USB0 port 0 scanning...
1297 10:43:51.424693 scan_static_bus for USB0 port 0
1298 10:43:51.425354 USB2 port 0 enabled
1299 10:43:51.428025 USB2 port 1 disabled
1300 10:43:51.428679 USB2 port 2 enabled
1301 10:43:51.431313 USB2 port 3 disabled
1302 10:43:51.434623 USB2 port 4 disabled
1303 10:43:51.435184 USB2 port 5 enabled
1304 10:43:51.437970 USB2 port 6 disabled
1305 10:43:51.440889 USB2 port 7 disabled
1306 10:43:51.440998 USB2 port 8 enabled
1307 10:43:51.444128 USB2 port 9 enabled
1308 10:43:51.444242 USB3 port 0 enabled
1309 10:43:51.447515 USB3 port 1 disabled
1310 10:43:51.450842 USB3 port 2 disabled
1311 10:43:51.450932 USB3 port 3 disabled
1312 10:43:51.454126 USB2 port 0 scanning...
1313 10:43:51.457514 scan_static_bus for USB2 port 0
1314 10:43:51.460848 scan_static_bus for USB2 port 0 done
1315 10:43:51.467462 scan_bus: bus USB2 port 0 finished in 6 msecs
1316 10:43:51.467540 USB2 port 2 scanning...
1317 10:43:51.470534 scan_static_bus for USB2 port 2
1318 10:43:51.474308 scan_static_bus for USB2 port 2 done
1319 10:43:51.480761 scan_bus: bus USB2 port 2 finished in 6 msecs
1320 10:43:51.480878 USB2 port 5 scanning...
1321 10:43:51.483997 scan_static_bus for USB2 port 5
1322 10:43:51.490712 scan_static_bus for USB2 port 5 done
1323 10:43:51.494121 scan_bus: bus USB2 port 5 finished in 6 msecs
1324 10:43:51.497856 USB2 port 8 scanning...
1325 10:43:51.501129 scan_static_bus for USB2 port 8
1326 10:43:51.504331 scan_static_bus for USB2 port 8 done
1327 10:43:51.507511 scan_bus: bus USB2 port 8 finished in 6 msecs
1328 10:43:51.511057 USB2 port 9 scanning...
1329 10:43:51.514405 scan_static_bus for USB2 port 9
1330 10:43:51.517594 scan_static_bus for USB2 port 9 done
1331 10:43:51.521167 scan_bus: bus USB2 port 9 finished in 6 msecs
1332 10:43:51.524290 USB3 port 0 scanning...
1333 10:43:51.527655 scan_static_bus for USB3 port 0
1334 10:43:51.531105 scan_static_bus for USB3 port 0 done
1335 10:43:51.534169 scan_bus: bus USB3 port 0 finished in 6 msecs
1336 10:43:51.541259 scan_static_bus for USB0 port 0 done
1337 10:43:51.544630 scan_bus: bus USB0 port 0 finished in 120 msecs
1338 10:43:51.547847 scan_static_bus for PCI: 00:14.0 done
1339 10:43:51.554494 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1340 10:43:51.554771 PCI: 00:14.3 scanning...
1341 10:43:51.557831 scan_static_bus for PCI: 00:14.3
1342 10:43:51.561025 GENERIC: 0.0 enabled
1343 10:43:51.564940 scan_static_bus for PCI: 00:14.3 done
1344 10:43:51.571009 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1345 10:43:51.571383 PCI: 00:15.0 scanning...
1346 10:43:51.574768 scan_static_bus for PCI: 00:15.0
1347 10:43:51.577963 I2C: 00:1a enabled
1348 10:43:51.578372 I2C: 00:31 enabled
1349 10:43:51.581267 I2C: 00:32 enabled
1350 10:43:51.584629 scan_static_bus for PCI: 00:15.0 done
1351 10:43:51.591233 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1352 10:43:51.591672 PCI: 00:15.1 scanning...
1353 10:43:51.594648 scan_static_bus for PCI: 00:15.1
1354 10:43:51.598008 I2C: 00:50 enabled
1355 10:43:51.601252 scan_static_bus for PCI: 00:15.1 done
1356 10:43:51.608088 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1357 10:43:51.608481 PCI: 00:15.3 scanning...
1358 10:43:51.611554 scan_static_bus for PCI: 00:15.3
1359 10:43:51.614436 I2C: 00:10 enabled
1360 10:43:51.618352 scan_static_bus for PCI: 00:15.3 done
1361 10:43:51.621457 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1362 10:43:51.624832 PCI: 00:19.1 scanning...
1363 10:43:51.627919 scan_static_bus for PCI: 00:19.1
1364 10:43:51.631080 I2C: 00:15 enabled
1365 10:43:51.631161 I2C: 00:2c enabled
1366 10:43:51.634483 scan_static_bus for PCI: 00:19.1 done
1367 10:43:51.641338 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1368 10:43:51.644567 PCI: 00:1e.3 scanning...
1369 10:43:51.647628 scan_generic_bus for PCI: 00:1e.3
1370 10:43:51.647720 SPI: 00 enabled
1371 10:43:51.654232 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1372 10:43:51.657558 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1373 10:43:51.661010 PCI: 00:1f.0 scanning...
1374 10:43:51.664281 scan_static_bus for PCI: 00:1f.0
1375 10:43:51.667950 PNP: 0c09.0 enabled
1376 10:43:51.670919 PNP: 0c09.0 scanning...
1377 10:43:51.674185 scan_static_bus for PNP: 0c09.0
1378 10:43:51.677551 scan_static_bus for PNP: 0c09.0 done
1379 10:43:51.680894 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1380 10:43:51.684197 scan_static_bus for PCI: 00:1f.0 done
1381 10:43:51.691167 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1382 10:43:51.691256 PCI: 00:1f.2 scanning...
1383 10:43:51.694573 scan_static_bus for PCI: 00:1f.2
1384 10:43:51.697841 GENERIC: 0.0 enabled
1385 10:43:51.701125 GENERIC: 0.0 scanning...
1386 10:43:51.704420 scan_static_bus for GENERIC: 0.0
1387 10:43:51.704493 GENERIC: 0.0 enabled
1388 10:43:51.707696 GENERIC: 1.0 enabled
1389 10:43:51.711037 scan_static_bus for GENERIC: 0.0 done
1390 10:43:51.717834 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1391 10:43:51.721009 scan_static_bus for PCI: 00:1f.2 done
1392 10:43:51.724428 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1393 10:43:51.728015 PCI: 00:1f.3 scanning...
1394 10:43:51.731201 scan_static_bus for PCI: 00:1f.3
1395 10:43:51.734541 scan_static_bus for PCI: 00:1f.3 done
1396 10:43:51.737942 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1397 10:43:51.741079 PCI: 00:1f.5 scanning...
1398 10:43:51.744867 scan_generic_bus for PCI: 00:1f.5
1399 10:43:51.747890 scan_generic_bus for PCI: 00:1f.5 done
1400 10:43:51.754767 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1401 10:43:51.758023 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1402 10:43:51.761451 scan_static_bus for Root Device done
1403 10:43:51.767661 scan_bus: bus Root Device finished in 729 msecs
1404 10:43:51.767771 done
1405 10:43:51.774715 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1406 10:43:51.781512 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1407 10:43:51.784575 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1408 10:43:51.788372 SPI flash protection: WPSW=0 SRP0=0
1409 10:43:51.794673 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1410 10:43:51.801249 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1411 10:43:51.801351 found VGA at PCI: 00:02.0
1412 10:43:51.805127 Setting up VGA for PCI: 00:02.0
1413 10:43:51.811702 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1414 10:43:51.815055 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1415 10:43:51.818401 Allocating resources...
1416 10:43:51.821333 Reading resources...
1417 10:43:51.824955 Root Device read_resources bus 0 link: 0
1418 10:43:51.828224 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1419 10:43:51.834847 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1420 10:43:51.838318 DOMAIN: 0000 read_resources bus 0 link: 0
1421 10:43:51.844844 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1422 10:43:51.851870 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1423 10:43:51.858470 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1424 10:43:51.861610 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1425 10:43:51.868291 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1426 10:43:51.874891 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1427 10:43:51.881585 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1428 10:43:51.888593 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1429 10:43:51.895015 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1430 10:43:51.901924 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1431 10:43:51.908418 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1432 10:43:51.915605 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1433 10:43:51.921917 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1434 10:43:51.925425 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1435 10:43:51.931908 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1436 10:43:51.938666 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1437 10:43:51.945205 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1438 10:43:51.952435 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1439 10:43:51.958737 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1440 10:43:51.965456 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1441 10:43:51.972277 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1442 10:43:51.975690 PCI: 00:04.0 read_resources bus 1 link: 0
1443 10:43:51.978882 PCI: 00:04.0 read_resources bus 1 link: 0 done
1444 10:43:51.982366 PCI: 00:06.0 read_resources bus 1 link: 0
1445 10:43:51.988786 PCI: 00:06.0 read_resources bus 1 link: 0 done
1446 10:43:51.992439 PCI: 00:0d.0 read_resources bus 0 link: 0
1447 10:43:51.995958 USB0 port 0 read_resources bus 0 link: 0
1448 10:43:52.002225 USB0 port 0 read_resources bus 0 link: 0 done
1449 10:43:52.005896 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1450 10:43:52.009177 PCI: 00:14.0 read_resources bus 0 link: 0
1451 10:43:52.015941 USB0 port 0 read_resources bus 0 link: 0
1452 10:43:52.019233 USB0 port 0 read_resources bus 0 link: 0 done
1453 10:43:52.022517 PCI: 00:14.0 read_resources bus 0 link: 0 done
1454 10:43:52.029039 PCI: 00:14.3 read_resources bus 0 link: 0
1455 10:43:52.032455 PCI: 00:14.3 read_resources bus 0 link: 0 done
1456 10:43:52.036114 PCI: 00:15.0 read_resources bus 0 link: 0
1457 10:43:52.042601 PCI: 00:15.0 read_resources bus 0 link: 0 done
1458 10:43:52.045857 PCI: 00:15.1 read_resources bus 0 link: 0
1459 10:43:52.049371 PCI: 00:15.1 read_resources bus 0 link: 0 done
1460 10:43:52.056154 PCI: 00:15.3 read_resources bus 0 link: 0
1461 10:43:52.059688 PCI: 00:15.3 read_resources bus 0 link: 0 done
1462 10:43:52.062974 PCI: 00:19.1 read_resources bus 0 link: 0
1463 10:43:52.069616 PCI: 00:19.1 read_resources bus 0 link: 0 done
1464 10:43:52.072862 PCI: 00:1e.3 read_resources bus 2 link: 0
1465 10:43:52.079807 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1466 10:43:52.083077 PCI: 00:1f.0 read_resources bus 0 link: 0
1467 10:43:52.086222 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1468 10:43:52.092914 PCI: 00:1f.2 read_resources bus 0 link: 0
1469 10:43:52.096154 GENERIC: 0.0 read_resources bus 0 link: 0
1470 10:43:52.099505 GENERIC: 0.0 read_resources bus 0 link: 0 done
1471 10:43:52.106405 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1472 10:43:52.109630 DOMAIN: 0000 read_resources bus 0 link: 0 done
1473 10:43:52.112912 Root Device read_resources bus 0 link: 0 done
1474 10:43:52.116594 Done reading resources.
1475 10:43:52.123288 Show resources in subtree (Root Device)...After reading.
1476 10:43:52.126737 Root Device child on link 0 CPU_CLUSTER: 0
1477 10:43:52.129943 CPU_CLUSTER: 0 child on link 0 APIC: 00
1478 10:43:52.133209 APIC: 00
1479 10:43:52.133282 APIC: 14
1480 10:43:52.136681 APIC: 16
1481 10:43:52.136754 APIC: 10
1482 10:43:52.136832 APIC: 12
1483 10:43:52.140013 APIC: 09
1484 10:43:52.140085 APIC: 01
1485 10:43:52.143258 APIC: 08
1486 10:43:52.146700 DOMAIN: 0000 child on link 0 GPIO: 0
1487 10:43:52.153434 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1488 10:43:52.163121 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1489 10:43:52.166706 GPIO: 0
1490 10:43:52.166812 PCI: 00:00.0
1491 10:43:52.177005 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1492 10:43:52.187276 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1493 10:43:52.196965 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1494 10:43:52.207007 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1495 10:43:52.213773 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1496 10:43:52.223467 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1497 10:43:52.233522 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1498 10:43:52.243820 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1499 10:43:52.253634 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1500 10:43:52.263686 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1501 10:43:52.270416 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1502 10:43:52.280444 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1503 10:43:52.290709 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1504 10:43:52.300678 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1505 10:43:52.310419 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1506 10:43:52.317026 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1507 10:43:52.327389 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1508 10:43:52.337444 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1509 10:43:52.347240 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1510 10:43:52.357054 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1511 10:43:52.367141 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1512 10:43:52.373906 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1513 10:43:52.383719 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1514 10:43:52.393743 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1515 10:43:52.403953 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1516 10:43:52.414122 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1517 10:43:52.423999 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1518 10:43:52.434180 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1519 10:43:52.434262 PCI: 00:02.0
1520 10:43:52.444154 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1521 10:43:52.454106 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1522 10:43:52.464229 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1523 10:43:52.467896 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1524 10:43:52.477709 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1525 10:43:52.481354 GENERIC: 0.0
1526 10:43:52.484737 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1527 10:43:52.494530 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1528 10:43:52.504910 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1529 10:43:52.511646 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1530 10:43:52.514707 PCI: 01:00.0
1531 10:43:52.524895 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1532 10:43:52.534814 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1533 10:43:52.535194 PCI: 00:08.0
1534 10:43:52.538294 PCI: 00:0a.0
1535 10:43:52.548425 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1536 10:43:52.551794 PCI: 00:0d.0 child on link 0 USB0 port 0
1537 10:43:52.561587 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1538 10:43:52.564797 USB0 port 0 child on link 0 USB3 port 0
1539 10:43:52.567990 USB3 port 0
1540 10:43:52.568292 USB3 port 1
1541 10:43:52.571548 USB3 port 2
1542 10:43:52.571919 USB3 port 3
1543 10:43:52.578246 PCI: 00:14.0 child on link 0 USB0 port 0
1544 10:43:52.588442 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1545 10:43:52.591805 USB0 port 0 child on link 0 USB2 port 0
1546 10:43:52.594926 USB2 port 0
1547 10:43:52.595225 USB2 port 1
1548 10:43:52.598416 USB2 port 2
1549 10:43:52.598824 USB2 port 3
1550 10:43:52.601744 USB2 port 4
1551 10:43:52.602050 USB2 port 5
1552 10:43:52.605151 USB2 port 6
1553 10:43:52.605449 USB2 port 7
1554 10:43:52.608399 USB2 port 8
1555 10:43:52.608800 USB2 port 9
1556 10:43:52.611803 USB3 port 0
1557 10:43:52.612129 USB3 port 1
1558 10:43:52.615111 USB3 port 2
1559 10:43:52.618480 USB3 port 3
1560 10:43:52.618912 PCI: 00:14.2
1561 10:43:52.628197 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1562 10:43:52.638346 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1563 10:43:52.641771 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1564 10:43:52.651822 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1565 10:43:52.654968 GENERIC: 0.0
1566 10:43:52.658625 PCI: 00:15.0 child on link 0 I2C: 00:1a
1567 10:43:52.668401 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1568 10:43:52.671665 I2C: 00:1a
1569 10:43:52.671762 I2C: 00:31
1570 10:43:52.675205 I2C: 00:32
1571 10:43:52.678382 PCI: 00:15.1 child on link 0 I2C: 00:50
1572 10:43:52.688349 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 10:43:52.688432 I2C: 00:50
1574 10:43:52.691544 PCI: 00:15.2
1575 10:43:52.694835 PCI: 00:15.3 child on link 0 I2C: 00:10
1576 10:43:52.705263 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1577 10:43:52.705350 I2C: 00:10
1578 10:43:52.708561 PCI: 00:16.0
1579 10:43:52.718484 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1580 10:43:52.718623 PCI: 00:19.0
1581 10:43:52.725465 PCI: 00:19.1 child on link 0 I2C: 00:15
1582 10:43:52.735563 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1583 10:43:52.735646 I2C: 00:15
1584 10:43:52.738434 I2C: 00:2c
1585 10:43:52.738504 PCI: 00:1e.0
1586 10:43:52.748483 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1587 10:43:52.755489 PCI: 00:1e.3 child on link 0 SPI: 00
1588 10:43:52.765308 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1589 10:43:52.765422 SPI: 00
1590 10:43:52.768686 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1591 10:43:52.778611 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1592 10:43:52.778717 PNP: 0c09.0
1593 10:43:52.789249 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1594 10:43:52.792549 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1595 10:43:52.802304 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1596 10:43:52.812457 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1597 10:43:52.815878 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1598 10:43:52.819048 GENERIC: 0.0
1599 10:43:52.819129 GENERIC: 1.0
1600 10:43:52.822366 PCI: 00:1f.3
1601 10:43:52.832521 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1602 10:43:52.842558 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1603 10:43:52.842653 PCI: 00:1f.5
1604 10:43:52.852366 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1605 10:43:52.859204 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1606 10:43:52.865395 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1607 10:43:52.872250 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1608 10:43:52.878982 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1609 10:43:52.882356 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1610 10:43:52.885637 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1611 10:43:52.892052 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1612 10:43:52.902190 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1613 10:43:52.908984 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1614 10:43:52.915480 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1615 10:43:52.922192 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1616 10:43:52.929089 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1617 10:43:52.935974 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1618 10:43:52.945945 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1619 10:43:52.949024 DOMAIN: 0000: Resource ranges:
1620 10:43:52.952372 * Base: 1000, Size: 800, Tag: 100
1621 10:43:52.956011 * Base: 1900, Size: e700, Tag: 100
1622 10:43:52.959230 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1623 10:43:52.966021 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1624 10:43:52.972588 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1625 10:43:52.982411 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1626 10:43:52.989545 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1627 10:43:52.996138 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1628 10:43:53.006083 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1629 10:43:53.012968 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1630 10:43:53.019424 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1631 10:43:53.029217 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1632 10:43:53.036391 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1633 10:43:53.042960 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1634 10:43:53.049623 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1635 10:43:53.059270 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1636 10:43:53.066266 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1637 10:43:53.072621 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1638 10:43:53.083097 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1639 10:43:53.089338 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1640 10:43:53.096420 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1641 10:43:53.106625 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1642 10:43:53.112982 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1643 10:43:53.120017 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1644 10:43:53.126621 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1645 10:43:53.136927 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1646 10:43:53.143482 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1647 10:43:53.150079 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1648 10:43:53.160038 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1649 10:43:53.167046 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1650 10:43:53.173720 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1651 10:43:53.183903 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1652 10:43:53.190197 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1653 10:43:53.197189 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1654 10:43:53.203890 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1655 10:43:53.207067 DOMAIN: 0000: Resource ranges:
1656 10:43:53.213821 * Base: 80400000, Size: 3fc00000, Tag: 200
1657 10:43:53.217123 * Base: d0000000, Size: 28000000, Tag: 200
1658 10:43:53.220416 * Base: fa000000, Size: 1000000, Tag: 200
1659 10:43:53.227080 * Base: fb001000, Size: 17ff000, Tag: 200
1660 10:43:53.230266 * Base: fe800000, Size: 300000, Tag: 200
1661 10:43:53.233983 * Base: feb80000, Size: 80000, Tag: 200
1662 10:43:53.237400 * Base: fed00000, Size: 40000, Tag: 200
1663 10:43:53.243720 * Base: fed70000, Size: 10000, Tag: 200
1664 10:43:53.247295 * Base: fed88000, Size: 8000, Tag: 200
1665 10:43:53.250501 * Base: fed93000, Size: d000, Tag: 200
1666 10:43:53.253924 * Base: feda2000, Size: 1e000, Tag: 200
1667 10:43:53.257121 * Base: fede0000, Size: 1220000, Tag: 200
1668 10:43:53.263973 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1669 10:43:53.270424 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1670 10:43:53.277253 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1671 10:43:53.284035 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1672 10:43:53.290886 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1673 10:43:53.297476 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1674 10:43:53.304058 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1675 10:43:53.310443 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1676 10:43:53.317730 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1677 10:43:53.324201 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1678 10:43:53.330583 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1679 10:43:53.337370 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1680 10:43:53.344028 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1681 10:43:53.350810 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1682 10:43:53.357208 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1683 10:43:53.364445 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1684 10:43:53.370468 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1685 10:43:53.377284 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1686 10:43:53.383932 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1687 10:43:53.390930 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1688 10:43:53.397498 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1689 10:43:53.404136 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1690 10:43:53.407358 PCI: 00:06.0: Resource ranges:
1691 10:43:53.413983 * Base: 80400000, Size: 100000, Tag: 200
1692 10:43:53.420535 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1693 10:43:53.427276 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1694 10:43:53.433898 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1695 10:43:53.440485 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1696 10:43:53.447345 Root Device assign_resources, bus 0 link: 0
1697 10:43:53.450586 DOMAIN: 0000 assign_resources, bus 0 link: 0
1698 10:43:53.457228 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1699 10:43:53.467438 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1700 10:43:53.473914 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1701 10:43:53.483789 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1702 10:43:53.487493 PCI: 00:04.0 assign_resources, bus 1 link: 0
1703 10:43:53.494014 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1704 10:43:53.500394 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1705 10:43:53.510487 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1706 10:43:53.520574 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1707 10:43:53.523731 PCI: 00:06.0 assign_resources, bus 1 link: 0
1708 10:43:53.530460 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1709 10:43:53.540502 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1710 10:43:53.543880 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1711 10:43:53.553741 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1712 10:43:53.560377 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1713 10:43:53.563558 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1714 10:43:53.570172 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1715 10:43:53.577195 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1716 10:43:53.583663 PCI: 00:14.0 assign_resources, bus 0 link: 0
1717 10:43:53.587022 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1718 10:43:53.597265 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1719 10:43:53.603806 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1720 10:43:53.610344 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1721 10:43:53.616898 PCI: 00:14.3 assign_resources, bus 0 link: 0
1722 10:43:53.620543 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1723 10:43:53.630469 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1724 10:43:53.633801 PCI: 00:15.0 assign_resources, bus 0 link: 0
1725 10:43:53.640549 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1726 10:43:53.647278 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1727 10:43:53.650373 PCI: 00:15.1 assign_resources, bus 0 link: 0
1728 10:43:53.656939 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1729 10:43:53.663631 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1730 10:43:53.669801 PCI: 00:15.3 assign_resources, bus 0 link: 0
1731 10:43:53.673211 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1732 10:43:53.679931 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1733 10:43:53.690337 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1734 10:43:53.693689 PCI: 00:19.1 assign_resources, bus 0 link: 0
1735 10:43:53.700109 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1736 10:43:53.706892 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1737 10:43:53.713515 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1738 10:43:53.716545 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1739 10:43:53.720255 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1740 10:43:53.726811 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1741 10:43:53.729705 LPC: Trying to open IO window from 800 size 1ff
1742 10:43:53.739871 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1743 10:43:53.746815 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1744 10:43:53.756246 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1745 10:43:53.759472 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1746 10:43:53.762778 Root Device assign_resources, bus 0 link: 0 done
1747 10:43:53.766230 Done setting resources.
1748 10:43:53.772684 Show resources in subtree (Root Device)...After assigning values.
1749 10:43:53.779491 Root Device child on link 0 CPU_CLUSTER: 0
1750 10:43:53.782935 CPU_CLUSTER: 0 child on link 0 APIC: 00
1751 10:43:53.783016 APIC: 00
1752 10:43:53.786266 APIC: 14
1753 10:43:53.786348 APIC: 16
1754 10:43:53.786412 APIC: 10
1755 10:43:53.789675 APIC: 12
1756 10:43:53.789757 APIC: 09
1757 10:43:53.789820 APIC: 01
1758 10:43:53.792741 APIC: 08
1759 10:43:53.796360 DOMAIN: 0000 child on link 0 GPIO: 0
1760 10:43:53.806274 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1761 10:43:53.815984 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1762 10:43:53.816068 GPIO: 0
1763 10:43:53.819493 PCI: 00:00.0
1764 10:43:53.825795 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1765 10:43:53.836095 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1766 10:43:53.845814 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1767 10:43:53.855843 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1768 10:43:53.865921 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1769 10:43:53.875667 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1770 10:43:53.882331 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1771 10:43:53.892328 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1772 10:43:53.902362 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1773 10:43:53.912295 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1774 10:43:53.922446 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1775 10:43:53.932345 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1776 10:43:53.942206 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1777 10:43:53.948788 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1778 10:43:53.958811 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1779 10:43:53.969010 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1780 10:43:53.978831 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1781 10:43:53.988916 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1782 10:43:53.998818 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1783 10:43:54.008867 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1784 10:43:54.018885 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1785 10:43:54.025246 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1786 10:43:54.035203 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1787 10:43:54.045841 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1788 10:43:54.055298 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1789 10:43:54.065038 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1790 10:43:54.075379 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1791 10:43:54.085018 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1792 10:43:54.085101 PCI: 00:02.0
1793 10:43:54.095244 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1794 10:43:54.105053 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1795 10:43:54.115311 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1796 10:43:54.121824 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1797 10:43:54.131996 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1798 10:43:54.132078 GENERIC: 0.0
1799 10:43:54.138775 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1800 10:43:54.145236 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1801 10:43:54.158729 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1802 10:43:54.168634 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1803 10:43:54.171630 PCI: 01:00.0
1804 10:43:54.181800 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1805 10:43:54.191635 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1806 10:43:54.191718 PCI: 00:08.0
1807 10:43:54.195021 PCI: 00:0a.0
1808 10:43:54.204859 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1809 10:43:54.208499 PCI: 00:0d.0 child on link 0 USB0 port 0
1810 10:43:54.218152 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1811 10:43:54.224683 USB0 port 0 child on link 0 USB3 port 0
1812 10:43:54.224766 USB3 port 0
1813 10:43:54.227959 USB3 port 1
1814 10:43:54.228041 USB3 port 2
1815 10:43:54.231372 USB3 port 3
1816 10:43:54.234914 PCI: 00:14.0 child on link 0 USB0 port 0
1817 10:43:54.244894 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1818 10:43:54.251730 USB0 port 0 child on link 0 USB2 port 0
1819 10:43:54.251839 USB2 port 0
1820 10:43:54.254662 USB2 port 1
1821 10:43:54.254743 USB2 port 2
1822 10:43:54.258431 USB2 port 3
1823 10:43:54.258538 USB2 port 4
1824 10:43:54.261313 USB2 port 5
1825 10:43:54.261394 USB2 port 6
1826 10:43:54.265002 USB2 port 7
1827 10:43:54.265093 USB2 port 8
1828 10:43:54.268142 USB2 port 9
1829 10:43:54.268264 USB3 port 0
1830 10:43:54.271375 USB3 port 1
1831 10:43:54.271482 USB3 port 2
1832 10:43:54.274921 USB3 port 3
1833 10:43:54.278221 PCI: 00:14.2
1834 10:43:54.288124 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1835 10:43:54.297808 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1836 10:43:54.301125 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1837 10:43:54.311719 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1838 10:43:54.314777 GENERIC: 0.0
1839 10:43:54.318091 PCI: 00:15.0 child on link 0 I2C: 00:1a
1840 10:43:54.327701 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1841 10:43:54.331392 I2C: 00:1a
1842 10:43:54.331475 I2C: 00:31
1843 10:43:54.334694 I2C: 00:32
1844 10:43:54.337733 PCI: 00:15.1 child on link 0 I2C: 00:50
1845 10:43:54.348018 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1846 10:43:54.348100 I2C: 00:50
1847 10:43:54.351247 PCI: 00:15.2
1848 10:43:54.354784 PCI: 00:15.3 child on link 0 I2C: 00:10
1849 10:43:54.364271 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1850 10:43:54.367653 I2C: 00:10
1851 10:43:54.367734 PCI: 00:16.0
1852 10:43:54.377693 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1853 10:43:54.381049 PCI: 00:19.0
1854 10:43:54.384419 PCI: 00:19.1 child on link 0 I2C: 00:15
1855 10:43:54.394270 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1856 10:43:54.397704 I2C: 00:15
1857 10:43:54.397785 I2C: 00:2c
1858 10:43:54.401337 PCI: 00:1e.0
1859 10:43:54.411226 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1860 10:43:54.414348 PCI: 00:1e.3 child on link 0 SPI: 00
1861 10:43:54.424444 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1862 10:43:54.427664 SPI: 00
1863 10:43:54.431103 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1864 10:43:54.440664 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1865 10:43:54.440750 PNP: 0c09.0
1866 10:43:54.450993 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1867 10:43:54.454604 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1868 10:43:54.464402 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1869 10:43:54.474256 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1870 10:43:54.477520 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1871 10:43:54.480871 GENERIC: 0.0
1872 10:43:54.480952 GENERIC: 1.0
1873 10:43:54.484172 PCI: 00:1f.3
1874 10:43:54.494071 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1875 10:43:54.504349 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1876 10:43:54.507203 PCI: 00:1f.5
1877 10:43:54.517258 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1878 10:43:54.520426 Done allocating resources.
1879 10:43:54.523743 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1880 10:43:54.530575 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1881 10:43:54.537279 Configure audio over I2S with MAX98373 NAU88L25B.
1882 10:43:54.540589 Enabling BT offload
1883 10:43:54.547570 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1884 10:43:54.550965 Enabling resources...
1885 10:43:54.554189 PCI: 00:00.0 subsystem <- 8086/4609
1886 10:43:54.557447 PCI: 00:00.0 cmd <- 06
1887 10:43:54.560661 PCI: 00:02.0 subsystem <- 8086/46b3
1888 10:43:54.564099 PCI: 00:02.0 cmd <- 03
1889 10:43:54.567543 PCI: 00:04.0 subsystem <- 8086/461d
1890 10:43:54.567624 PCI: 00:04.0 cmd <- 02
1891 10:43:54.570869 PCI: 00:06.0 bridge ctrl <- 0013
1892 10:43:54.574149 PCI: 00:06.0 subsystem <- 8086/464d
1893 10:43:54.577579 PCI: 00:06.0 cmd <- 106
1894 10:43:54.580978 PCI: 00:0a.0 subsystem <- 8086/467d
1895 10:43:54.583809 PCI: 00:0a.0 cmd <- 02
1896 10:43:54.587136 PCI: 00:0d.0 subsystem <- 8086/461e
1897 10:43:54.590910 PCI: 00:0d.0 cmd <- 02
1898 10:43:54.594065 PCI: 00:14.0 subsystem <- 8086/51ed
1899 10:43:54.597396 PCI: 00:14.0 cmd <- 02
1900 10:43:54.600644 PCI: 00:14.2 subsystem <- 8086/51ef
1901 10:43:54.600724 PCI: 00:14.2 cmd <- 02
1902 10:43:54.607491 PCI: 00:14.3 subsystem <- 8086/51f0
1903 10:43:54.607572 PCI: 00:14.3 cmd <- 02
1904 10:43:54.610909 PCI: 00:15.0 subsystem <- 8086/51e8
1905 10:43:54.614126 PCI: 00:15.0 cmd <- 02
1906 10:43:54.617458 PCI: 00:15.1 subsystem <- 8086/51e9
1907 10:43:54.620617 PCI: 00:15.1 cmd <- 06
1908 10:43:54.624216 PCI: 00:15.3 subsystem <- 8086/51eb
1909 10:43:54.627129 PCI: 00:15.3 cmd <- 02
1910 10:43:54.630567 PCI: 00:16.0 subsystem <- 8086/51e0
1911 10:43:54.630662 PCI: 00:16.0 cmd <- 02
1912 10:43:54.637497 PCI: 00:19.1 subsystem <- 8086/51c6
1913 10:43:54.637578 PCI: 00:19.1 cmd <- 02
1914 10:43:54.640797 PCI: 00:1e.0 subsystem <- 8086/51a8
1915 10:43:54.644104 PCI: 00:1e.0 cmd <- 06
1916 10:43:54.646894 PCI: 00:1e.3 subsystem <- 8086/51ab
1917 10:43:54.650300 PCI: 00:1e.3 cmd <- 02
1918 10:43:54.654090 PCI: 00:1f.0 subsystem <- 8086/5182
1919 10:43:54.656793 PCI: 00:1f.0 cmd <- 407
1920 10:43:54.660121 PCI: 00:1f.3 subsystem <- 8086/51c8
1921 10:43:54.660216 PCI: 00:1f.3 cmd <- 02
1922 10:43:54.666941 PCI: 00:1f.5 subsystem <- 8086/51a4
1923 10:43:54.667022 PCI: 00:1f.5 cmd <- 406
1924 10:43:54.670523 PCI: 01:00.0 cmd <- 02
1925 10:43:54.670649 done.
1926 10:43:54.677209 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1927 10:43:54.680538 ME: Version: Unavailable
1928 10:43:54.683400 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1929 10:43:54.686751 Initializing devices...
1930 10:43:54.690468 Root Device init
1931 10:43:54.690572 mainboard: EC init
1932 10:43:54.696950 Chrome EC: Set SMI mask to 0x0000000000000000
1933 10:43:54.700278 Chrome EC: UHEPI supported
1934 10:43:54.703485 Chrome EC: clear events_b mask to 0x0000000000000000
1935 10:43:54.710608 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1936 10:43:54.717256 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1937 10:43:54.723531 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1938 10:43:54.730654 Chrome EC: Set WAKE mask to 0x0000000000000000
1939 10:43:54.734078 Root Device init finished in 41 msecs
1940 10:43:54.737470 PCI: 00:00.0 init
1941 10:43:54.740756 CPU TDP = 15 Watts
1942 10:43:54.740836 CPU PL1 = 15 Watts
1943 10:43:54.744063 CPU PL2 = 55 Watts
1944 10:43:54.747013 CPU PL4 = 123 Watts
1945 10:43:54.750358 PCI: 00:00.0 init finished in 8 msecs
1946 10:43:54.750438 PCI: 00:02.0 init
1947 10:43:54.753614 GMA: Found VBT in CBFS
1948 10:43:54.757353 GMA: Found valid VBT in CBFS
1949 10:43:54.763876 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1950 10:43:54.770121 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1951 10:43:54.773790 PCI: 00:02.0 init finished in 18 msecs
1952 10:43:54.777264 PCI: 00:06.0 init
1953 10:43:54.777374 Initializing PCH PCIe bridge.
1954 10:43:54.783981 PCI: 00:06.0 init finished in 3 msecs
1955 10:43:54.784101 PCI: 00:0a.0 init
1956 10:43:54.787513 PCI: 00:0a.0 init finished in 0 msecs
1957 10:43:54.790493 PCI: 00:14.0 init
1958 10:43:54.793950 PCI: 00:14.0 init finished in 0 msecs
1959 10:43:54.797168 PCI: 00:14.2 init
1960 10:43:54.800436 PCI: 00:14.2 init finished in 0 msecs
1961 10:43:54.800632 PCI: 00:15.0 init
1962 10:43:54.803738 I2C bus 0 version 0x3230302a
1963 10:43:54.807171 DW I2C bus 0 at 0x80655000 (400 KHz)
1964 10:43:54.810408 PCI: 00:15.0 init finished in 6 msecs
1965 10:43:54.813804 PCI: 00:15.1 init
1966 10:43:54.817346 I2C bus 1 version 0x3230302a
1967 10:43:54.820753 DW I2C bus 1 at 0x80656000 (400 KHz)
1968 10:43:54.824287 PCI: 00:15.1 init finished in 6 msecs
1969 10:43:54.827475 PCI: 00:15.3 init
1970 10:43:54.830934 I2C bus 3 version 0x3230302a
1971 10:43:54.834365 DW I2C bus 3 at 0x80657000 (400 KHz)
1972 10:43:54.837606 PCI: 00:15.3 init finished in 6 msecs
1973 10:43:54.838088 PCI: 00:16.0 init
1974 10:43:54.844521 PCI: 00:16.0 init finished in 0 msecs
1975 10:43:54.845116 PCI: 00:19.1 init
1976 10:43:54.847349 I2C bus 5 version 0x3230302a
1977 10:43:54.850583 DW I2C bus 5 at 0x80659000 (400 KHz)
1978 10:43:54.853997 PCI: 00:19.1 init finished in 6 msecs
1979 10:43:54.857705 PCI: 00:1f.0 init
1980 10:43:54.860997 IOAPIC: Initializing IOAPIC at 0xfec00000
1981 10:43:54.863907 IOAPIC: ID = 0x02
1982 10:43:54.864421 IOAPIC: Dumping registers
1983 10:43:54.867686 reg 0x0000: 0x02000000
1984 10:43:54.870636 reg 0x0001: 0x00770020
1985 10:43:54.873925 reg 0x0002: 0x00000000
1986 10:43:54.874345 IOAPIC: 120 interrupts
1987 10:43:54.880744 IOAPIC: Clearing IOAPIC at 0xfec00000
1988 10:43:54.884392 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1989 10:43:54.887314 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1990 10:43:54.894493 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1991 10:43:54.897358 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1992 10:43:54.904097 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1993 10:43:54.907242 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1994 10:43:54.914099 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1995 10:43:54.917262 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1996 10:43:54.924253 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1997 10:43:54.927493 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1998 10:43:54.930757 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1999 10:43:54.937520 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2000 10:43:54.940740 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2001 10:43:54.947471 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2002 10:43:54.950663 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2003 10:43:54.956948 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2004 10:43:54.960536 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2005 10:43:54.963864 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2006 10:43:54.970452 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2007 10:43:54.973856 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2008 10:43:54.980189 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2009 10:43:54.983806 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2010 10:43:54.990700 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2011 10:43:54.994440 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2012 10:43:55.001018 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2013 10:43:55.004241 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2014 10:43:55.007782 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2015 10:43:55.014368 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2016 10:43:55.017840 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2017 10:43:55.024319 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2018 10:43:55.027531 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2019 10:43:55.034172 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2020 10:43:55.038027 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2021 10:43:55.040984 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2022 10:43:55.047433 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2023 10:43:55.050949 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2024 10:43:55.057874 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2025 10:43:55.061198 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2026 10:43:55.067453 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2027 10:43:55.070982 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2028 10:43:55.077735 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2029 10:43:55.080733 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2030 10:43:55.083876 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2031 10:43:55.091056 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2032 10:43:55.093916 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2033 10:43:55.100818 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2034 10:43:55.103961 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2035 10:43:55.110402 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2036 10:43:55.113640 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2037 10:43:55.117261 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2038 10:43:55.123979 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2039 10:43:55.127468 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2040 10:43:55.133934 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2041 10:43:55.137008 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2042 10:43:55.143682 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2043 10:43:55.146872 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2044 10:43:55.153653 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2045 10:43:55.156978 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2046 10:43:55.160529 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2047 10:43:55.166793 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2048 10:43:55.170512 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2049 10:43:55.176761 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2050 10:43:55.180686 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2051 10:43:55.186881 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2052 10:43:55.190309 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2053 10:43:55.196874 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2054 10:43:55.200269 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2055 10:43:55.203649 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2056 10:43:55.210807 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2057 10:43:55.214179 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2058 10:43:55.220670 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2059 10:43:55.223670 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2060 10:43:55.230624 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2061 10:43:55.234235 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2062 10:43:55.237626 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2063 10:43:55.243840 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2064 10:43:55.247257 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2065 10:43:55.253698 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2066 10:43:55.257144 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2067 10:43:55.263739 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2068 10:43:55.267420 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2069 10:43:55.273653 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2070 10:43:55.276968 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2071 10:43:55.280329 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2072 10:43:55.287067 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2073 10:43:55.290402 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2074 10:43:55.297240 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2075 10:43:55.300532 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2076 10:43:55.306964 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2077 10:43:55.310663 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2078 10:43:55.316984 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2079 10:43:55.320279 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2080 10:43:55.323911 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2081 10:43:55.330580 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2082 10:43:55.333808 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2083 10:43:55.340545 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2084 10:43:55.344144 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2085 10:43:55.350850 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2086 10:43:55.354097 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2087 10:43:55.357410 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2088 10:43:55.363781 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2089 10:43:55.367271 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2090 10:43:55.373877 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2091 10:43:55.376879 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2092 10:43:55.384140 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2093 10:43:55.387335 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2094 10:43:55.393659 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2095 10:43:55.397164 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2096 10:43:55.400174 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2097 10:43:55.407142 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2098 10:43:55.410507 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2099 10:43:55.416792 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2100 10:43:55.420416 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2101 10:43:55.426944 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2102 10:43:55.430499 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2103 10:43:55.433786 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2104 10:43:55.440274 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2105 10:43:55.443577 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2106 10:43:55.450228 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2107 10:43:55.453506 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2108 10:43:55.460085 IOAPIC: Bootstrap Processor Local APIC = 0x00
2109 10:43:55.463415 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2110 10:43:55.467105 PCI: 00:1f.0 init finished in 607 msecs
2111 10:43:55.470000 PCI: 00:1f.2 init
2112 10:43:55.474177 apm_control: Disabling ACPI.
2113 10:43:55.477296 APMC done.
2114 10:43:55.480652 PCI: 00:1f.2 init finished in 6 msecs
2115 10:43:55.481109 PCI: 00:1f.3 init
2116 10:43:55.487731 PCI: 00:1f.3 init finished in 0 msecs
2117 10:43:55.488289 PCI: 01:00.0 init
2118 10:43:55.490737 PCI: 01:00.0 init finished in 0 msecs
2119 10:43:55.494670 PNP: 0c09.0 init
2120 10:43:55.497981 Google Chrome EC uptime: 12.105 seconds
2121 10:43:55.500794 Google Chrome AP resets since EC boot: 1
2122 10:43:55.507487 Google Chrome most recent AP reset causes:
2123 10:43:55.511088 0.342: 32775 shutdown: entering G3
2124 10:43:55.517801 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2125 10:43:55.521251 PNP: 0c09.0 init finished in 23 msecs
2126 10:43:55.521814 GENERIC: 0.0 init
2127 10:43:55.527774 GENERIC: 0.0 init finished in 0 msecs
2128 10:43:55.528322 GENERIC: 1.0 init
2129 10:43:55.531020 GENERIC: 1.0 init finished in 0 msecs
2130 10:43:55.534130 Devices initialized
2131 10:43:55.538126 Show all devs... After init.
2132 10:43:55.538733 Root Device: enabled 1
2133 10:43:55.541266 CPU_CLUSTER: 0: enabled 1
2134 10:43:55.544447 DOMAIN: 0000: enabled 1
2135 10:43:55.547620 GPIO: 0: enabled 1
2136 10:43:55.548078 PCI: 00:00.0: enabled 1
2137 10:43:55.550827 PCI: 00:01.0: enabled 0
2138 10:43:55.554038 PCI: 00:01.1: enabled 0
2139 10:43:55.554498 PCI: 00:02.0: enabled 1
2140 10:43:55.557519 PCI: 00:04.0: enabled 1
2141 10:43:55.561244 PCI: 00:05.0: enabled 0
2142 10:43:55.564372 PCI: 00:06.0: enabled 1
2143 10:43:55.564934 PCI: 00:06.2: enabled 0
2144 10:43:55.567459 PCI: 00:07.0: enabled 0
2145 10:43:55.571496 PCI: 00:07.1: enabled 0
2146 10:43:55.574810 PCI: 00:07.2: enabled 0
2147 10:43:55.575374 PCI: 00:07.3: enabled 0
2148 10:43:55.577626 PCI: 00:08.0: enabled 0
2149 10:43:55.581100 PCI: 00:09.0: enabled 0
2150 10:43:55.584753 PCI: 00:0a.0: enabled 1
2151 10:43:55.585314 PCI: 00:0d.0: enabled 1
2152 10:43:55.587464 PCI: 00:0d.1: enabled 0
2153 10:43:55.590869 PCI: 00:0d.2: enabled 0
2154 10:43:55.591463 PCI: 00:0d.3: enabled 0
2155 10:43:55.594388 PCI: 00:0e.0: enabled 0
2156 10:43:55.597519 PCI: 00:10.0: enabled 0
2157 10:43:55.601017 PCI: 00:10.1: enabled 0
2158 10:43:55.601477 PCI: 00:10.6: enabled 0
2159 10:43:55.604247 PCI: 00:10.7: enabled 0
2160 10:43:55.607661 PCI: 00:12.0: enabled 0
2161 10:43:55.610803 PCI: 00:12.6: enabled 0
2162 10:43:55.611268 PCI: 00:12.7: enabled 0
2163 10:43:55.614400 PCI: 00:13.0: enabled 0
2164 10:43:55.617446 PCI: 00:14.0: enabled 1
2165 10:43:55.621085 PCI: 00:14.1: enabled 0
2166 10:43:55.621681 PCI: 00:14.2: enabled 1
2167 10:43:55.624247 PCI: 00:14.3: enabled 1
2168 10:43:55.627340 PCI: 00:15.0: enabled 1
2169 10:43:55.630815 PCI: 00:15.1: enabled 1
2170 10:43:55.631277 PCI: 00:15.2: enabled 0
2171 10:43:55.634167 PCI: 00:15.3: enabled 1
2172 10:43:55.637508 PCI: 00:16.0: enabled 1
2173 10:43:55.637966 PCI: 00:16.1: enabled 0
2174 10:43:55.640448 PCI: 00:16.2: enabled 0
2175 10:43:55.644205 PCI: 00:16.3: enabled 0
2176 10:43:55.647219 PCI: 00:16.4: enabled 0
2177 10:43:55.647680 PCI: 00:16.5: enabled 0
2178 10:43:55.650470 PCI: 00:17.0: enabled 0
2179 10:43:55.654079 PCI: 00:19.0: enabled 0
2180 10:43:55.657205 PCI: 00:19.1: enabled 1
2181 10:43:55.657767 PCI: 00:19.2: enabled 0
2182 10:43:55.660987 PCI: 00:1a.0: enabled 0
2183 10:43:55.664226 PCI: 00:1c.0: enabled 0
2184 10:43:55.667342 PCI: 00:1c.1: enabled 0
2185 10:43:55.667804 PCI: 00:1c.2: enabled 0
2186 10:43:55.670658 PCI: 00:1c.3: enabled 0
2187 10:43:55.674211 PCI: 00:1c.4: enabled 0
2188 10:43:55.677403 PCI: 00:1c.5: enabled 0
2189 10:43:55.677859 PCI: 00:1c.6: enabled 0
2190 10:43:55.680669 PCI: 00:1c.7: enabled 0
2191 10:43:55.684300 PCI: 00:1d.0: enabled 0
2192 10:43:55.684863 PCI: 00:1d.1: enabled 0
2193 10:43:55.687419 PCI: 00:1d.2: enabled 0
2194 10:43:55.690954 PCI: 00:1d.3: enabled 0
2195 10:43:55.693974 PCI: 00:1e.0: enabled 1
2196 10:43:55.694534 PCI: 00:1e.1: enabled 0
2197 10:43:55.697340 PCI: 00:1e.2: enabled 0
2198 10:43:55.700605 PCI: 00:1e.3: enabled 1
2199 10:43:55.703833 PCI: 00:1f.0: enabled 1
2200 10:43:55.704293 PCI: 00:1f.1: enabled 0
2201 10:43:55.707103 PCI: 00:1f.2: enabled 1
2202 10:43:55.710626 PCI: 00:1f.3: enabled 1
2203 10:43:55.713668 PCI: 00:1f.4: enabled 0
2204 10:43:55.714127 PCI: 00:1f.5: enabled 1
2205 10:43:55.717101 PCI: 00:1f.6: enabled 0
2206 10:43:55.720664 PCI: 00:1f.7: enabled 0
2207 10:43:55.721220 GENERIC: 0.0: enabled 1
2208 10:43:55.723828 GENERIC: 0.0: enabled 1
2209 10:43:55.727043 GENERIC: 1.0: enabled 1
2210 10:43:55.730286 GENERIC: 0.0: enabled 1
2211 10:43:55.730781 GENERIC: 1.0: enabled 1
2212 10:43:55.733980 USB0 port 0: enabled 1
2213 10:43:55.737250 USB0 port 0: enabled 1
2214 10:43:55.740364 GENERIC: 0.0: enabled 1
2215 10:43:55.740955 I2C: 00:1a: enabled 1
2216 10:43:55.743656 I2C: 00:31: enabled 1
2217 10:43:55.746866 I2C: 00:32: enabled 1
2218 10:43:55.747325 I2C: 00:50: enabled 1
2219 10:43:55.750343 I2C: 00:10: enabled 1
2220 10:43:55.753720 I2C: 00:15: enabled 1
2221 10:43:55.754177 I2C: 00:2c: enabled 1
2222 10:43:55.757232 GENERIC: 0.0: enabled 1
2223 10:43:55.760505 SPI: 00: enabled 1
2224 10:43:55.761065 PNP: 0c09.0: enabled 1
2225 10:43:55.763612 GENERIC: 0.0: enabled 1
2226 10:43:55.767191 USB3 port 0: enabled 1
2227 10:43:55.767751 USB3 port 1: enabled 0
2228 10:43:55.770839 USB3 port 2: enabled 1
2229 10:43:55.774060 USB3 port 3: enabled 0
2230 10:43:55.777318 USB2 port 0: enabled 1
2231 10:43:55.777880 USB2 port 1: enabled 0
2232 10:43:55.780501 USB2 port 2: enabled 1
2233 10:43:55.783854 USB2 port 3: enabled 0
2234 10:43:55.784426 USB2 port 4: enabled 0
2235 10:43:55.786953 USB2 port 5: enabled 1
2236 10:43:55.790496 USB2 port 6: enabled 0
2237 10:43:55.793777 USB2 port 7: enabled 0
2238 10:43:55.794338 USB2 port 8: enabled 1
2239 10:43:55.796935 USB2 port 9: enabled 1
2240 10:43:55.800614 USB3 port 0: enabled 1
2241 10:43:55.801172 USB3 port 1: enabled 0
2242 10:43:55.803621 USB3 port 2: enabled 0
2243 10:43:55.806823 USB3 port 3: enabled 0
2244 10:43:55.810425 GENERIC: 0.0: enabled 1
2245 10:43:55.811064 GENERIC: 1.0: enabled 1
2246 10:43:55.813944 APIC: 00: enabled 1
2247 10:43:55.814507 APIC: 14: enabled 1
2248 10:43:55.817249 APIC: 16: enabled 1
2249 10:43:55.820568 APIC: 10: enabled 1
2250 10:43:55.821027 APIC: 12: enabled 1
2251 10:43:55.823468 APIC: 09: enabled 1
2252 10:43:55.826852 APIC: 01: enabled 1
2253 10:43:55.827478 APIC: 08: enabled 1
2254 10:43:55.830465 PCI: 01:00.0: enabled 1
2255 10:43:55.837371 BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms
2256 10:43:55.840077 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2257 10:43:55.843401 ELOG: NV offset 0xf20000 size 0x4000
2258 10:43:55.851046 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2259 10:43:55.858095 ELOG: Event(17) added with size 13 at 2023-07-27 10:44:10 UTC
2260 10:43:55.864783 ELOG: Event(9E) added with size 10 at 2023-07-27 10:44:10 UTC
2261 10:43:55.870929 ELOG: Event(9F) added with size 14 at 2023-07-27 10:44:10 UTC
2262 10:43:55.877839 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2263 10:43:55.884347 ELOG: Event(A0) added with size 9 at 2023-07-27 10:44:10 UTC
2264 10:43:55.887568 elog_add_boot_reason: Logged dev mode boot
2265 10:43:55.894497 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2266 10:43:55.895102 Finalize devices...
2267 10:43:55.898085 PCI: 00:16.0 final
2268 10:43:55.901494 PCI: 00:1f.2 final
2269 10:43:55.902061 GENERIC: 0.0 final
2270 10:43:55.907832 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2271 10:43:55.911215 GENERIC: 1.0 final
2272 10:43:55.914431 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2273 10:43:55.918080 Devices finalized
2274 10:43:55.924680 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2275 10:43:55.927977 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2276 10:43:55.934373 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2277 10:43:55.937614 ME: HFSTS1 : 0x90000245
2278 10:43:55.944861 ME: HFSTS2 : 0x82100116
2279 10:43:55.947647 ME: HFSTS3 : 0x00000050
2280 10:43:55.951057 ME: HFSTS4 : 0x00004000
2281 10:43:55.957947 ME: HFSTS5 : 0x00000000
2282 10:43:55.961296 ME: HFSTS6 : 0x40600006
2283 10:43:55.964645 ME: Manufacturing Mode : NO
2284 10:43:55.967683 ME: SPI Protection Mode Enabled : YES
2285 10:43:55.974524 ME: FPFs Committed : YES
2286 10:43:55.977862 ME: Manufacturing Vars Locked : YES
2287 10:43:55.980831 ME: FW Partition Table : OK
2288 10:43:55.984200 ME: Bringup Loader Failure : NO
2289 10:43:55.987825 ME: Firmware Init Complete : YES
2290 10:43:55.991362 ME: Boot Options Present : NO
2291 10:43:55.994424 ME: Update In Progress : NO
2292 10:43:55.997547 ME: D0i3 Support : YES
2293 10:43:56.004393 ME: Low Power State Enabled : NO
2294 10:43:56.007625 ME: CPU Replaced : YES
2295 10:43:56.010893 ME: CPU Replacement Valid : YES
2296 10:43:56.014418 ME: Current Working State : 5
2297 10:43:56.018001 ME: Current Operation State : 1
2298 10:43:56.021375 ME: Current Operation Mode : 0
2299 10:43:56.024143 ME: Error Code : 0
2300 10:43:56.027403 ME: Enhanced Debug Mode : NO
2301 10:43:56.030998 ME: CPU Debug Disabled : YES
2302 10:43:56.037743 ME: TXT Support : NO
2303 10:43:56.040958 ME: WP for RO is enabled : YES
2304 10:43:56.044508 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2305 10:43:56.050858 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2306 10:43:56.054057 Ramoops buffer: 0x100000@0x76899000.
2307 10:43:56.060995 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2308 10:43:56.067552 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2309 10:43:56.070713 CBFS: 'fallback/slic' not found.
2310 10:43:56.077430 ACPI: Writing ACPI tables at 7686d000.
2311 10:43:56.077890 ACPI: * FACS
2312 10:43:56.080702 ACPI: * DSDT
2313 10:43:56.087250 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2314 10:43:56.090979 ACPI: * FADT
2315 10:43:56.091438 SCI is IRQ9
2316 10:43:56.094212 ACPI: added table 1/32, length now 40
2317 10:43:56.097348 ACPI: * SSDT
2318 10:43:56.100774 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2319 10:43:56.107879 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2320 10:43:56.111060 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2321 10:43:56.114252 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2322 10:43:56.121050 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2323 10:43:56.127798 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2324 10:43:56.134500 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2325 10:43:56.137617 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2326 10:43:56.144641 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2327 10:43:56.147878 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2328 10:43:56.154606 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2329 10:43:56.157680 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2330 10:43:56.164416 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2331 10:43:56.167510 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2332 10:43:56.175103 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2333 10:43:56.178472 PS2K: Passing 80 keymaps to kernel
2334 10:43:56.185162 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2335 10:43:56.191648 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2336 10:43:56.198214 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2337 10:43:56.204731 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2338 10:43:56.211764 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2339 10:43:56.218433 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2340 10:43:56.221613 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2341 10:43:56.228157 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2342 10:43:56.234809 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2343 10:43:56.241682 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2344 10:43:56.244977 ACPI: added table 2/32, length now 44
2345 10:43:56.248365 ACPI: * MCFG
2346 10:43:56.251624 ACPI: added table 3/32, length now 48
2347 10:43:56.252135 ACPI: * TPM2
2348 10:43:56.254986 TPM2 log created at 0x7685d000
2349 10:43:56.258292 ACPI: added table 4/32, length now 52
2350 10:43:56.261228 ACPI: * LPIT
2351 10:43:56.264924 ACPI: added table 5/32, length now 56
2352 10:43:56.268009 ACPI: * MADT
2353 10:43:56.268423 SCI is IRQ9
2354 10:43:56.271279 ACPI: added table 6/32, length now 60
2355 10:43:56.274968 cmd_reg from pmc_make_ipc_cmd 1052838
2356 10:43:56.281535 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2357 10:43:56.288024 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2358 10:43:56.294682 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2359 10:43:56.298252 PMC CrashLog size in discovery mode: 0xC00
2360 10:43:56.306890 cpu crashlog bar addr: 0x80640000
2361 10:43:56.307517 cpu discovery table offset: 0x6030
2362 10:43:56.311282 cpu_crashlog_discovery_table buffer count: 0x3
2363 10:43:56.317962 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2364 10:43:56.325008 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2365 10:43:56.331543 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2366 10:43:56.334740 PMC crashLog size in discovery mode : 0xC00
2367 10:43:56.341329 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2368 10:43:56.344951 discover mode PMC crashlog size adjusted to: 0x200
2369 10:43:56.354683 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2370 10:43:56.358034 discover mode PMC crashlog size adjusted to: 0x0
2371 10:43:56.361333 m_cpu_crashLog_size : 0x3480 bytes
2372 10:43:56.364662 CPU crashLog present.
2373 10:43:56.367882 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2374 10:43:56.374909 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2375 10:43:56.378207 current = 76876550
2376 10:43:56.378713 ACPI: * DMAR
2377 10:43:56.384758 ACPI: added table 7/32, length now 64
2378 10:43:56.388173 ACPI: added table 8/32, length now 68
2379 10:43:56.388645 ACPI: * HPET
2380 10:43:56.391288 ACPI: added table 9/32, length now 72
2381 10:43:56.394449 ACPI: done.
2382 10:43:56.397953 ACPI tables: 38528 bytes.
2383 10:43:56.398670 smbios_write_tables: 76857000
2384 10:43:56.402535 EC returned error result code 3
2385 10:43:56.405783 Couldn't obtain OEM name from CBI
2386 10:43:56.409101 Create SMBIOS type 16
2387 10:43:56.412552 Create SMBIOS type 17
2388 10:43:56.415878 Create SMBIOS type 20
2389 10:43:56.416444 GENERIC: 0.0 (WIFI Device)
2390 10:43:56.419539 SMBIOS tables: 2156 bytes.
2391 10:43:56.422498 Writing table forward entry at 0x00000500
2392 10:43:56.429981 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2393 10:43:56.432279 Writing coreboot table at 0x76891000
2394 10:43:56.439546 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2395 10:43:56.442392 1. 0000000000001000-000000000009ffff: RAM
2396 10:43:56.449403 2. 00000000000a0000-00000000000fffff: RESERVED
2397 10:43:56.452569 3. 0000000000100000-0000000076856fff: RAM
2398 10:43:56.459114 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2399 10:43:56.462376 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2400 10:43:56.469171 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2401 10:43:56.475786 7. 0000000077000000-00000000803fffff: RESERVED
2402 10:43:56.479380 8. 00000000c0000000-00000000cfffffff: RESERVED
2403 10:43:56.485957 9. 00000000f8000000-00000000f9ffffff: RESERVED
2404 10:43:56.489209 10. 00000000fb000000-00000000fb000fff: RESERVED
2405 10:43:56.492475 11. 00000000fc800000-00000000fe7fffff: RESERVED
2406 10:43:56.499546 12. 00000000feb00000-00000000feb7ffff: RESERVED
2407 10:43:56.502375 13. 00000000fec00000-00000000fecfffff: RESERVED
2408 10:43:56.509391 14. 00000000fed40000-00000000fed6ffff: RESERVED
2409 10:43:56.512440 15. 00000000fed80000-00000000fed87fff: RESERVED
2410 10:43:56.519092 16. 00000000fed90000-00000000fed92fff: RESERVED
2411 10:43:56.522476 17. 00000000feda0000-00000000feda1fff: RESERVED
2412 10:43:56.526071 18. 00000000fedc0000-00000000feddffff: RESERVED
2413 10:43:56.532419 19. 0000000100000000-000000027fbfffff: RAM
2414 10:43:56.535624 Passing 4 GPIOs to payload:
2415 10:43:56.539083 NAME | PORT | POLARITY | VALUE
2416 10:43:56.545567 lid | undefined | high | high
2417 10:43:56.549040 power | undefined | high | low
2418 10:43:56.556254 oprom | undefined | high | low
2419 10:43:56.562735 EC in RW | 0x00000151 | high | high
2420 10:43:56.563154 Board ID: 3
2421 10:43:56.563480 FW config: 0x131
2422 10:43:56.569320 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 7d29
2423 10:43:56.572354 coreboot table: 1748 bytes.
2424 10:43:56.575622 IMD ROOT 0. 0x76fff000 0x00001000
2425 10:43:56.579341 IMD SMALL 1. 0x76ffe000 0x00001000
2426 10:43:56.586194 FSP MEMORY 2. 0x76afe000 0x00500000
2427 10:43:56.589362 CONSOLE 3. 0x76ade000 0x00020000
2428 10:43:56.592377 RW MCACHE 4. 0x76add000 0x0000043c
2429 10:43:56.595653 RO MCACHE 5. 0x76adc000 0x00000fd8
2430 10:43:56.599317 FMAP 6. 0x76adb000 0x0000064a
2431 10:43:56.602835 TIME STAMP 7. 0x76ada000 0x00000910
2432 10:43:56.605968 VBOOT WORK 8. 0x76ac6000 0x00014000
2433 10:43:56.609253 MEM INFO 9. 0x76ac5000 0x000003b8
2434 10:43:56.612671 ROMSTG STCK10. 0x76ac4000 0x00001000
2435 10:43:56.619148 AFTER CAR 11. 0x76ab8000 0x0000c000
2436 10:43:56.622722 RAMSTAGE 12. 0x76a2e000 0x0008a000
2437 10:43:56.626057 ACPI BERT 13. 0x76a1e000 0x00010000
2438 10:43:56.629114 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2439 10:43:56.632718 REFCODE 15. 0x769ae000 0x0006f000
2440 10:43:56.636012 SMM BACKUP 16. 0x7699e000 0x00010000
2441 10:43:56.639432 IGD OPREGION17. 0x76999000 0x00004203
2442 10:43:56.642771 RAMOOPS 18. 0x76899000 0x00100000
2443 10:43:56.649347 COREBOOT 19. 0x76891000 0x00008000
2444 10:43:56.652428 ACPI 20. 0x7686d000 0x00024000
2445 10:43:56.656160 TPM2 TCGLOG21. 0x7685d000 0x00010000
2446 10:43:56.659437 PMC CRASHLOG22. 0x7685c000 0x00000c00
2447 10:43:56.662685 CPU CRASHLOG23. 0x76858000 0x00003480
2448 10:43:56.665949 SMBIOS 24. 0x76857000 0x00001000
2449 10:43:56.669195 IMD small region:
2450 10:43:56.672770 IMD ROOT 0. 0x76ffec00 0x00000400
2451 10:43:56.676176 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2452 10:43:56.679460 POWER STATE 2. 0x76ffeb80 0x00000044
2453 10:43:56.682925 ROMSTAGE 3. 0x76ffeb60 0x00000004
2454 10:43:56.689203 ACPI GNVS 4. 0x76ffeb00 0x00000048
2455 10:43:56.692573 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2456 10:43:56.699700 BS: BS_WRITE_TABLES run times (exec / console): 6 / 624 ms
2457 10:43:56.702591 MTRR: Physical address space:
2458 10:43:56.705970 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2459 10:43:56.712624 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2460 10:43:56.719622 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2461 10:43:56.725819 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2462 10:43:56.732768 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2463 10:43:56.739431 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2464 10:43:56.746075 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2465 10:43:56.749222 MTRR: Fixed MSR 0x250 0x0606060606060606
2466 10:43:56.752438 MTRR: Fixed MSR 0x258 0x0606060606060606
2467 10:43:56.755764 MTRR: Fixed MSR 0x259 0x0000000000000000
2468 10:43:56.762406 MTRR: Fixed MSR 0x268 0x0606060606060606
2469 10:43:56.765620 MTRR: Fixed MSR 0x269 0x0606060606060606
2470 10:43:56.769440 MTRR: Fixed MSR 0x26a 0x0606060606060606
2471 10:43:56.772620 MTRR: Fixed MSR 0x26b 0x0606060606060606
2472 10:43:56.778993 MTRR: Fixed MSR 0x26c 0x0606060606060606
2473 10:43:56.782645 MTRR: Fixed MSR 0x26d 0x0606060606060606
2474 10:43:56.786016 MTRR: Fixed MSR 0x26e 0x0606060606060606
2475 10:43:56.789165 MTRR: Fixed MSR 0x26f 0x0606060606060606
2476 10:43:56.793106 call enable_fixed_mtrr()
2477 10:43:56.796472 CPU physical address size: 39 bits
2478 10:43:56.803208 MTRR: default type WB/UC MTRR counts: 6/6.
2479 10:43:56.806627 MTRR: UC selected as default type.
2480 10:43:56.813081 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2481 10:43:56.816355 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2482 10:43:56.823165 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2483 10:43:56.829808 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2484 10:43:56.836921 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2485 10:43:56.843032 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2486 10:43:56.850051 MTRR: Fixed MSR 0x250 0x0606060606060606
2487 10:43:56.853088 MTRR: Fixed MSR 0x258 0x0606060606060606
2488 10:43:56.856336 MTRR: Fixed MSR 0x259 0x0000000000000000
2489 10:43:56.859808 MTRR: Fixed MSR 0x268 0x0606060606060606
2490 10:43:56.866477 MTRR: Fixed MSR 0x269 0x0606060606060606
2491 10:43:56.869676 MTRR: Fixed MSR 0x26a 0x0606060606060606
2492 10:43:56.872906 MTRR: Fixed MSR 0x26b 0x0606060606060606
2493 10:43:56.876985 MTRR: Fixed MSR 0x26c 0x0606060606060606
2494 10:43:56.879742 MTRR: Fixed MSR 0x26d 0x0606060606060606
2495 10:43:56.886457 MTRR: Fixed MSR 0x26e 0x0606060606060606
2496 10:43:56.889778 MTRR: Fixed MSR 0x26f 0x0606060606060606
2497 10:43:56.892841 MTRR: Fixed MSR 0x250 0x0606060606060606
2498 10:43:56.895758 MTRR: Fixed MSR 0x250 0x0606060606060606
2499 10:43:56.902594 MTRR: Fixed MSR 0x250 0x0606060606060606
2500 10:43:56.905915 MTRR: Fixed MSR 0x258 0x0606060606060606
2501 10:43:56.909144 MTRR: Fixed MSR 0x259 0x0000000000000000
2502 10:43:56.912780 MTRR: Fixed MSR 0x268 0x0606060606060606
2503 10:43:56.919544 MTRR: Fixed MSR 0x269 0x0606060606060606
2504 10:43:56.922909 MTRR: Fixed MSR 0x258 0x0606060606060606
2505 10:43:56.926062 MTRR: Fixed MSR 0x259 0x0000000000000000
2506 10:43:56.929326 MTRR: Fixed MSR 0x268 0x0606060606060606
2507 10:43:56.932618 MTRR: Fixed MSR 0x269 0x0606060606060606
2508 10:43:56.939067 MTRR: Fixed MSR 0x26a 0x0606060606060606
2509 10:43:56.942411 MTRR: Fixed MSR 0x26b 0x0606060606060606
2510 10:43:56.945982 MTRR: Fixed MSR 0x26c 0x0606060606060606
2511 10:43:56.949262 MTRR: Fixed MSR 0x26d 0x0606060606060606
2512 10:43:56.955808 MTRR: Fixed MSR 0x26e 0x0606060606060606
2513 10:43:56.959145 MTRR: Fixed MSR 0x26f 0x0606060606060606
2514 10:43:56.962371 MTRR: Fixed MSR 0x250 0x0606060606060606
2515 10:43:56.965995 MTRR: Fixed MSR 0x26a 0x0606060606060606
2516 10:43:56.972290 MTRR: Fixed MSR 0x258 0x0606060606060606
2517 10:43:56.975754 MTRR: Fixed MSR 0x259 0x0000000000000000
2518 10:43:56.979161 MTRR: Fixed MSR 0x268 0x0606060606060606
2519 10:43:56.982381 MTRR: Fixed MSR 0x269 0x0606060606060606
2520 10:43:56.985770 MTRR: Fixed MSR 0x250 0x0606060606060606
2521 10:43:56.989151 call enable_fixed_mtrr()
2522 10:43:56.992868 MTRR: Fixed MSR 0x26b 0x0606060606060606
2523 10:43:56.999215 MTRR: Fixed MSR 0x26c 0x0606060606060606
2524 10:43:57.002372 MTRR: Fixed MSR 0x26d 0x0606060606060606
2525 10:43:57.005615 MTRR: Fixed MSR 0x26e 0x0606060606060606
2526 10:43:57.009130 MTRR: Fixed MSR 0x26f 0x0606060606060606
2527 10:43:57.015589 MTRR: Fixed MSR 0x250 0x0606060606060606
2528 10:43:57.018940 CPU physical address size: 39 bits
2529 10:43:57.019021 call enable_fixed_mtrr()
2530 10:43:57.025516 MTRR: Fixed MSR 0x258 0x0606060606060606
2531 10:43:57.028806 CPU physical address size: 39 bits
2532 10:43:57.032054 MTRR: Fixed MSR 0x258 0x0606060606060606
2533 10:43:57.035633 call enable_fixed_mtrr()
2534 10:43:57.038949 MTRR: Fixed MSR 0x26a 0x0606060606060606
2535 10:43:57.042269 MTRR: Fixed MSR 0x258 0x0606060606060606
2536 10:43:57.045591 MTRR: Fixed MSR 0x259 0x0000000000000000
2537 10:43:57.051958 MTRR: Fixed MSR 0x268 0x0606060606060606
2538 10:43:57.055626 MTRR: Fixed MSR 0x269 0x0606060606060606
2539 10:43:57.058979 MTRR: Fixed MSR 0x26a 0x0606060606060606
2540 10:43:57.062333 MTRR: Fixed MSR 0x26b 0x0606060606060606
2541 10:43:57.068980 MTRR: Fixed MSR 0x26c 0x0606060606060606
2542 10:43:57.072126 MTRR: Fixed MSR 0x26d 0x0606060606060606
2543 10:43:57.075527 MTRR: Fixed MSR 0x26e 0x0606060606060606
2544 10:43:57.078621 MTRR: Fixed MSR 0x26f 0x0606060606060606
2545 10:43:57.081897 CPU physical address size: 39 bits
2546 10:43:57.085165 call enable_fixed_mtrr()
2547 10:43:57.088730 MTRR: Fixed MSR 0x26b 0x0606060606060606
2548 10:43:57.092239 CPU physical address size: 39 bits
2549 10:43:57.098506 MTRR: Fixed MSR 0x26c 0x0606060606060606
2550 10:43:57.101954 MTRR: Fixed MSR 0x259 0x0000000000000000
2551 10:43:57.105161 MTRR: Fixed MSR 0x26d 0x0606060606060606
2552 10:43:57.108454 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 10:43:57.115498 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 10:43:57.118597 MTRR: Fixed MSR 0x268 0x0606060606060606
2555 10:43:57.122008 call enable_fixed_mtrr()
2556 10:43:57.125526 MTRR: Fixed MSR 0x269 0x0606060606060606
2557 10:43:57.128599 CPU physical address size: 39 bits
2558 10:43:57.131875 MTRR: Fixed MSR 0x26a 0x0606060606060606
2559 10:43:57.135193 MTRR: Fixed MSR 0x259 0x0000000000000000
2560 10:43:57.142049 MTRR: Fixed MSR 0x26b 0x0606060606060606
2561 10:43:57.145130 MTRR: Fixed MSR 0x26c 0x0606060606060606
2562 10:43:57.148294 MTRR: Fixed MSR 0x26d 0x0606060606060606
2563 10:43:57.151619 MTRR: Fixed MSR 0x26e 0x0606060606060606
2564 10:43:57.158464 MTRR: Fixed MSR 0x26f 0x0606060606060606
2565 10:43:57.162001 MTRR: Fixed MSR 0x268 0x0606060606060606
2566 10:43:57.165280 call enable_fixed_mtrr()
2567 10:43:57.168471 MTRR: Fixed MSR 0x269 0x0606060606060606
2568 10:43:57.171660 CPU physical address size: 39 bits
2569 10:43:57.174944 MTRR: Fixed MSR 0x26a 0x0606060606060606
2570 10:43:57.178232 MTRR: Fixed MSR 0x26b 0x0606060606060606
2571 10:43:57.184832 MTRR: Fixed MSR 0x26c 0x0606060606060606
2572 10:43:57.188489 MTRR: Fixed MSR 0x26d 0x0606060606060606
2573 10:43:57.191888 MTRR: Fixed MSR 0x26e 0x0606060606060606
2574 10:43:57.195018 MTRR: Fixed MSR 0x26f 0x0606060606060606
2575 10:43:57.198795 call enable_fixed_mtrr()
2576 10:43:57.202108 CPU physical address size: 39 bits
2577 10:43:57.206627
2578 10:43:57.206747 MTRR check
2579 10:43:57.209910 Fixed MTRRs : Enabled
2580 10:43:57.209992 Variable MTRRs: Enabled
2581 10:43:57.210076
2582 10:43:57.216933 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2583 10:43:57.220076 Checking cr50 for pending updates
2584 10:43:57.232165 Reading cr50 TPM mode
2585 10:43:57.247349 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2586 10:43:57.257452 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2587 10:43:57.260812 Checking segment from ROM address 0xf96cbe6c
2588 10:43:57.264591 Checking segment from ROM address 0xf96cbe88
2589 10:43:57.271378 Loading segment from ROM address 0xf96cbe6c
2590 10:43:57.271462 code (compression=1)
2591 10:43:57.281334 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2592 10:43:57.287886 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2593 10:43:57.291085 using LZMA
2594 10:43:57.312877 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2595 10:43:57.319904 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2596 10:43:57.327468 Loading segment from ROM address 0xf96cbe88
2597 10:43:57.331002 Entry Point 0x30000000
2598 10:43:57.331087 Loaded segments
2599 10:43:57.337788 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2600 10:43:57.344345 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2601 10:43:57.347626 Finalizing chipset.
2602 10:43:57.347710 apm_control: Finalizing SMM.
2603 10:43:57.350835 APMC done.
2604 10:43:57.354610 HECI: CSE device 16.1 is disabled
2605 10:43:57.357537 HECI: CSE device 16.2 is disabled
2606 10:43:57.361281 HECI: CSE device 16.3 is disabled
2607 10:43:57.364598 HECI: CSE device 16.4 is disabled
2608 10:43:57.367941 HECI: CSE device 16.5 is disabled
2609 10:43:57.370918 HECI: Sending End-of-Post
2610 10:43:57.379401 CSE: EOP requested action: continue boot
2611 10:43:57.382621 CSE EOP successful, continuing boot
2612 10:43:57.389348 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2613 10:43:57.392850 mp_park_aps done after 0 msecs.
2614 10:43:57.395983 Jumping to boot code at 0x30000000(0x76891000)
2615 10:43:57.405891 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2616 10:43:57.409692
2617 10:43:57.409774
2618 10:43:57.409857
2619 10:43:57.413250 Starting depthcharge on Volmar...
2620 10:43:57.413339
2621 10:43:57.413734 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2622 10:43:57.413850 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2623 10:43:57.413945 Setting prompt string to ['brya:']
2624 10:43:57.414036 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2625 10:43:57.420049 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2626 10:43:57.420136
2627 10:43:57.426530 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2628 10:43:57.426650
2629 10:43:57.433727 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2630 10:43:57.433842
2631 10:43:57.436723 configure_storage: Failed to remap 1C:2
2632 10:43:57.436820
2633 10:43:57.436900 Wipe memory regions:
2634 10:43:57.440183
2635 10:43:57.443400 [0x00000000001000, 0x000000000a0000)
2636 10:43:57.443481
2637 10:43:57.446583 [0x00000000100000, 0x00000030000000)
2638 10:43:57.554423
2639 10:43:57.557353 [0x00000032668e60, 0x00000076857000)
2640 10:43:57.708248
2641 10:43:57.711521 [0x00000100000000, 0x0000027fc00000)
2642 10:43:58.554931
2643 10:43:58.558190 ec_init: CrosEC protocol v3 supported (256, 256)
2644 10:43:59.167729
2645 10:43:59.167866 R8152: Initializing
2646 10:43:59.167934
2647 10:43:59.171442 Version 9 (ocp_data = 6010)
2648 10:43:59.171554
2649 10:43:59.174577 R8152: Done initializing
2650 10:43:59.174658
2651 10:43:59.177783 Adding net device
2652 10:43:59.478941
2653 10:43:59.482381 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2654 10:43:59.482472
2655 10:43:59.482536
2656 10:43:59.482607
2657 10:43:59.482879 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2659 10:43:59.583225 brya: tftpboot 192.168.201.1 11150710/tftp-deploy-6xrg_ex7/kernel/bzImage 11150710/tftp-deploy-6xrg_ex7/kernel/cmdline 11150710/tftp-deploy-6xrg_ex7/ramdisk/ramdisk.cpio.gz
2660 10:43:59.583345 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2661 10:43:59.583433 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2662 10:43:59.587797 tftpboot 192.168.201.1 11150710/tftp-deploy-6xrg_ex7/kernel/bzImploy-6xrg_ex7/kernel/cmdline 11150710/tftp-deploy-6xrg_ex7/ramdisk/ramdisk.cpio.gz
2663 10:43:59.587882
2664 10:43:59.587948 Waiting for link
2665 10:43:59.790364
2666 10:43:59.790489 done.
2667 10:43:59.790561
2668 10:43:59.790654 MAC: 00:e0:4c:68:02:37
2669 10:43:59.790715
2670 10:43:59.793419 Sending DHCP discover... done.
2671 10:43:59.793559
2672 10:43:59.797002 Waiting for reply... done.
2673 10:43:59.797083
2674 10:43:59.800309 Sending DHCP request... done.
2675 10:43:59.800391
2676 10:43:59.803859 Waiting for reply... done.
2677 10:43:59.806726
2678 10:43:59.806806 My ip is 192.168.201.15
2679 10:43:59.806870
2680 10:43:59.810005 The DHCP server ip is 192.168.201.1
2681 10:43:59.810086
2682 10:43:59.816806 TFTP server IP predefined by user: 192.168.201.1
2683 10:43:59.816914
2684 10:43:59.823396 Bootfile predefined by user: 11150710/tftp-deploy-6xrg_ex7/kernel/bzImage
2685 10:43:59.823477
2686 10:43:59.826974 Sending tftp read request... done.
2687 10:43:59.827056
2688 10:43:59.830353 Waiting for the transfer...
2689 10:43:59.830436
2690 10:44:00.081487 00000000 ################################################################
2691 10:44:00.081622
2692 10:44:00.332888 00080000 ################################################################
2693 10:44:00.333024
2694 10:44:00.583609 00100000 ################################################################
2695 10:44:00.583756
2696 10:44:00.832879 00180000 ################################################################
2697 10:44:00.833074
2698 10:44:01.102422 00200000 ################################################################
2699 10:44:01.102577
2700 10:44:01.356648 00280000 ################################################################
2701 10:44:01.356816
2702 10:44:01.603945 00300000 ################################################################
2703 10:44:01.604078
2704 10:44:01.853596 00380000 ################################################################
2705 10:44:01.853726
2706 10:44:02.101825 00400000 ################################################################
2707 10:44:02.101948
2708 10:44:02.360687 00480000 ################################################################
2709 10:44:02.360815
2710 10:44:02.619166 00500000 ################################################################
2711 10:44:02.619318
2712 10:44:02.875271 00580000 ################################################################
2713 10:44:02.875403
2714 10:44:03.129600 00600000 ################################################################
2715 10:44:03.129763
2716 10:44:03.386267 00680000 ################################################################
2717 10:44:03.386431
2718 10:44:03.642875 00700000 ################################################################
2719 10:44:03.643049
2720 10:44:03.899816 00780000 ################################################################
2721 10:44:03.899958
2722 10:44:04.155122 00800000 ################################################################
2723 10:44:04.155262
2724 10:44:04.410327 00880000 ################################################################
2725 10:44:04.410473
2726 10:44:04.665776 00900000 ################################################################
2727 10:44:04.665923
2728 10:44:04.915188 00980000 ################################################################
2729 10:44:04.915331
2730 10:44:05.177542 00a00000 ################################################################
2731 10:44:05.177686
2732 10:44:05.442892 00a80000 ################################################################
2733 10:44:05.443047
2734 10:44:05.703896 00b00000 ################################################################
2735 10:44:05.704054
2736 10:44:05.979971 00b80000 ################################################################
2737 10:44:05.980136
2738 10:44:06.246205 00c00000 ################################################################
2739 10:44:06.246373
2740 10:44:06.402393 00c80000 ##################################### done.
2741 10:44:06.405620
2742 10:44:06.408866 The bootfile was 13407776 bytes long.
2743 10:44:06.408979
2744 10:44:06.412454 Sending tftp read request... done.
2745 10:44:06.412563
2746 10:44:06.415377 Waiting for the transfer...
2747 10:44:06.415481
2748 10:44:06.675620 00000000 ################################################################
2749 10:44:06.675797
2750 10:44:06.923811 00080000 ################################################################
2751 10:44:06.923968
2752 10:44:07.178974 00100000 ################################################################
2753 10:44:07.179116
2754 10:44:07.450808 00180000 ################################################################
2755 10:44:07.450967
2756 10:44:07.724217 00200000 ################################################################
2757 10:44:07.724361
2758 10:44:07.993809 00280000 ################################################################
2759 10:44:07.993951
2760 10:44:08.256392 00300000 ################################################################
2761 10:44:08.256557
2762 10:44:08.519364 00380000 ################################################################
2763 10:44:08.519528
2764 10:44:08.785479 00400000 ################################################################
2765 10:44:08.785647
2766 10:44:09.039259 00480000 ################################################################
2767 10:44:09.039415
2768 10:44:09.301508 00500000 ################################################################
2769 10:44:09.301665
2770 10:44:09.553237 00580000 ################################################################
2771 10:44:09.553366
2772 10:44:09.807026 00600000 ################################################################
2773 10:44:09.807170
2774 10:44:10.067809 00680000 ################################################################
2775 10:44:10.067942
2776 10:44:10.329079 00700000 ################################################################
2777 10:44:10.329236
2778 10:44:10.579428 00780000 ################################################################
2779 10:44:10.579582
2780 10:44:10.836958 00800000 ################################################################
2781 10:44:10.837124
2782 10:44:11.025036 00880000 ############################################### done.
2783 10:44:11.025159
2784 10:44:11.028313 Sending tftp read request... done.
2785 10:44:11.028395
2786 10:44:11.031576 Waiting for the transfer...
2787 10:44:11.031681
2788 10:44:11.031762 00000000 # done.
2789 10:44:11.035057
2790 10:44:11.041873 Command line loaded dynamically from TFTP file: 11150710/tftp-deploy-6xrg_ex7/kernel/cmdline
2791 10:44:11.041956
2792 10:44:11.058343 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2793 10:44:11.063489
2794 10:44:11.066922 Shutting down all USB controllers.
2795 10:44:11.067003
2796 10:44:11.067068 Removing current net device
2797 10:44:11.067156
2798 10:44:11.070277 Finalizing coreboot
2799 10:44:11.070384
2800 10:44:11.076918 Exiting depthcharge with code 4 at timestamp: 23902083
2801 10:44:11.077014
2802 10:44:11.077104
2803 10:44:11.077169 Starting kernel ...
2804 10:44:11.077229
2805 10:44:11.077286
2806 10:44:11.077693 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2807 10:44:11.077792 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2808 10:44:11.077868 Setting prompt string to ['Linux version [0-9]']
2809 10:44:11.077938 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2810 10:44:11.078007 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2812 10:48:38.078791 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2814 10:48:38.079961 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2816 10:48:38.080800 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2819 10:48:38.082193 end: 2 depthcharge-action (duration 00:05:00) [common]
2821 10:48:38.083114 Cleaning after the job
2822 10:48:38.083204 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11150710/tftp-deploy-6xrg_ex7/ramdisk
2823 10:48:38.084547 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11150710/tftp-deploy-6xrg_ex7/kernel
2824 10:48:38.086320 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11150710/tftp-deploy-6xrg_ex7/modules
2825 10:48:38.086941 start: 5.1 power-off (timeout 00:00:30) [common]
2826 10:48:38.087098 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=off'
2827 10:48:38.169617 >> Command sent successfully.
2828 10:48:38.181573 Returned 0 in 0 seconds
2829 10:48:38.282904 end: 5.1 power-off (duration 00:00:00) [common]
2831 10:48:38.284508 start: 5.2 read-feedback (timeout 00:10:00) [common]
2832 10:48:38.285786 Listened to connection for namespace 'common' for up to 1s
2834 10:48:38.287275 Listened to connection for namespace 'common' for up to 1s
2835 10:48:39.286411 Finalising connection for namespace 'common'
2836 10:48:39.287114 Disconnecting from shell: Finalise
2837 10:48:39.287540
2838 10:48:39.388636 end: 5.2 read-feedback (duration 00:00:01) [common]
2839 10:48:39.389276 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11150710
2840 10:48:39.447397 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11150710
2841 10:48:39.447640 JobError: Your job cannot terminate cleanly.