Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 13:54:26.258027 lava-dispatcher, installed at version: 2023.05.1
2 13:54:26.258253 start: 0 validate
3 13:54:26.258415 Start time: 2023-08-11 13:54:26.258405+00:00 (UTC)
4 13:54:26.258561 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:54:26.258722 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 13:54:26.546715 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:54:26.546961 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.186-cip37-770-gddd36cfc4c4c8%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:54:26.814838 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:54:26.815028 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.186-cip37-770-gddd36cfc4c4c8%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
10 13:54:33.043466 validate duration: 6.79
12 13:54:33.043731 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:54:33.043829 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:54:33.043915 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:54:33.044037 Not decompressing ramdisk as can be used compressed.
16 13:54:33.044120 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 13:54:33.044185 saving as /var/lib/lava/dispatcher/tmp/11263707/tftp-deploy-vq2dn_7v/ramdisk/rootfs.cpio.gz
18 13:54:33.044246 total size: 8418130 (8MB)
19 13:54:34.843235 progress 0% (0MB)
20 13:54:34.845676 progress 5% (0MB)
21 13:54:34.848094 progress 10% (0MB)
22 13:54:34.850561 progress 15% (1MB)
23 13:54:34.853122 progress 20% (1MB)
24 13:54:34.855701 progress 25% (2MB)
25 13:54:34.858234 progress 30% (2MB)
26 13:54:34.860642 progress 35% (2MB)
27 13:54:34.863243 progress 40% (3MB)
28 13:54:34.865811 progress 45% (3MB)
29 13:54:34.868401 progress 50% (4MB)
30 13:54:34.870995 progress 55% (4MB)
31 13:54:34.873552 progress 60% (4MB)
32 13:54:34.875947 progress 65% (5MB)
33 13:54:34.878551 progress 70% (5MB)
34 13:54:34.881079 progress 75% (6MB)
35 13:54:34.883651 progress 80% (6MB)
36 13:54:34.886238 progress 85% (6MB)
37 13:54:34.888780 progress 90% (7MB)
38 13:54:34.891196 progress 95% (7MB)
39 13:54:34.893455 progress 100% (8MB)
40 13:54:34.893736 8MB downloaded in 1.85s (4.34MB/s)
41 13:54:34.893945 end: 1.1.1 http-download (duration 00:00:02) [common]
43 13:54:34.894343 end: 1.1 download-retry (duration 00:00:02) [common]
44 13:54:34.894464 start: 1.2 download-retry (timeout 00:09:58) [common]
45 13:54:34.894585 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 13:54:34.894758 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.186-cip37-770-gddd36cfc4c4c8/x86_64/x86_64_defconfig+x86-chromebook+kselftest/gcc-10/kernel/bzImage
47 13:54:34.894858 saving as /var/lib/lava/dispatcher/tmp/11263707/tftp-deploy-vq2dn_7v/kernel/bzImage
48 13:54:34.894956 total size: 16413824 (15MB)
49 13:54:34.895050 No compression specified
50 13:54:34.896814 progress 0% (0MB)
51 13:54:34.901412 progress 5% (0MB)
52 13:54:34.905678 progress 10% (1MB)
53 13:54:34.909997 progress 15% (2MB)
54 13:54:34.914374 progress 20% (3MB)
55 13:54:34.918651 progress 25% (3MB)
56 13:54:34.922900 progress 30% (4MB)
57 13:54:34.927168 progress 35% (5MB)
58 13:54:34.931419 progress 40% (6MB)
59 13:54:34.935766 progress 45% (7MB)
60 13:54:34.940145 progress 50% (7MB)
61 13:54:34.944582 progress 55% (8MB)
62 13:54:34.948848 progress 60% (9MB)
63 13:54:34.953172 progress 65% (10MB)
64 13:54:34.957590 progress 70% (10MB)
65 13:54:34.961858 progress 75% (11MB)
66 13:54:34.966122 progress 80% (12MB)
67 13:54:34.970308 progress 85% (13MB)
68 13:54:34.974606 progress 90% (14MB)
69 13:54:34.978929 progress 95% (14MB)
70 13:54:34.983241 progress 100% (15MB)
71 13:54:34.983477 15MB downloaded in 0.09s (176.84MB/s)
72 13:54:34.983622 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:54:34.983851 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:54:34.983937 start: 1.3 download-retry (timeout 00:09:58) [common]
76 13:54:34.984021 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 13:54:34.984160 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.186-cip37-770-gddd36cfc4c4c8/x86_64/x86_64_defconfig+x86-chromebook+kselftest/gcc-10/modules.tar.xz
78 13:54:34.984238 saving as /var/lib/lava/dispatcher/tmp/11263707/tftp-deploy-vq2dn_7v/modules/modules.tar
79 13:54:34.984305 total size: 3446312 (3MB)
80 13:54:34.984369 Using unxz to decompress xz
81 13:54:34.988050 progress 0% (0MB)
82 13:54:34.994460 progress 5% (0MB)
83 13:54:35.005382 progress 10% (0MB)
84 13:54:35.015714 progress 15% (0MB)
85 13:54:35.027875 progress 20% (0MB)
86 13:54:35.038012 progress 25% (0MB)
87 13:54:35.047942 progress 30% (1MB)
88 13:54:35.057857 progress 35% (1MB)
89 13:54:35.070075 progress 40% (1MB)
90 13:54:35.081058 progress 45% (1MB)
91 13:54:35.092316 progress 50% (1MB)
92 13:54:35.103482 progress 55% (1MB)
93 13:54:35.113913 progress 60% (2MB)
94 13:54:35.125505 progress 65% (2MB)
95 13:54:35.137435 progress 70% (2MB)
96 13:54:35.145876 progress 75% (2MB)
97 13:54:35.159962 progress 80% (2MB)
98 13:54:35.172040 progress 85% (2MB)
99 13:54:35.182903 progress 90% (2MB)
100 13:54:35.193414 progress 95% (3MB)
101 13:54:35.205646 progress 100% (3MB)
102 13:54:35.210645 3MB downloaded in 0.23s (14.52MB/s)
103 13:54:35.211070 end: 1.3.1 http-download (duration 00:00:00) [common]
105 13:54:35.211535 end: 1.3 download-retry (duration 00:00:00) [common]
106 13:54:35.211694 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
107 13:54:35.211863 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
108 13:54:35.212006 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
109 13:54:35.212154 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
110 13:54:35.212486 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c
111 13:54:35.212698 makedir: /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin
112 13:54:35.212894 makedir: /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/tests
113 13:54:35.213055 makedir: /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/results
114 13:54:35.213235 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-add-keys
115 13:54:35.213471 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-add-sources
116 13:54:35.213679 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-background-process-start
117 13:54:35.213883 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-background-process-stop
118 13:54:35.214084 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-common-functions
119 13:54:35.214287 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-echo-ipv4
120 13:54:35.214507 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-install-packages
121 13:54:35.214709 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-installed-packages
122 13:54:35.214921 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-os-build
123 13:54:35.215138 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-probe-channel
124 13:54:35.215348 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-probe-ip
125 13:54:35.215568 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-target-ip
126 13:54:35.215770 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-target-mac
127 13:54:35.215988 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-target-storage
128 13:54:35.216206 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-test-case
129 13:54:35.216421 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-test-event
130 13:54:35.216622 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-test-feedback
131 13:54:35.216864 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-test-raise
132 13:54:35.217083 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-test-reference
133 13:54:35.217298 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-test-runner
134 13:54:35.217514 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-test-set
135 13:54:35.217729 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-test-shell
136 13:54:35.217937 Updating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-install-packages (oe)
137 13:54:35.218187 Updating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/bin/lava-installed-packages (oe)
138 13:54:35.218384 Creating /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/environment
139 13:54:35.218565 LAVA metadata
140 13:54:35.218694 - LAVA_JOB_ID=11263707
141 13:54:35.218814 - LAVA_DISPATCHER_IP=192.168.201.1
142 13:54:35.218997 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
143 13:54:35.219118 skipped lava-vland-overlay
144 13:54:35.219258 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
145 13:54:35.219404 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
146 13:54:35.219521 skipped lava-multinode-overlay
147 13:54:35.219653 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
148 13:54:35.219792 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
149 13:54:35.219933 Loading test definitions
150 13:54:35.220092 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
151 13:54:35.220228 Using /lava-11263707 at stage 0
152 13:54:35.220776 uuid=11263707_1.4.2.3.1 testdef=None
153 13:54:35.220925 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
154 13:54:35.221068 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
155 13:54:35.221957 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
157 13:54:35.222362 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
158 13:54:35.223524 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
160 13:54:35.223946 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
161 13:54:35.226118 runner path: /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/0/tests/0_dmesg test_uuid 11263707_1.4.2.3.1
162 13:54:35.226346 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
164 13:54:35.226758 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
165 13:54:35.226882 Using /lava-11263707 at stage 1
166 13:54:35.227416 uuid=11263707_1.4.2.3.5 testdef=None
167 13:54:35.227561 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
168 13:54:35.227708 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
169 13:54:35.228512 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
171 13:54:35.228924 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
172 13:54:35.230054 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
174 13:54:35.230466 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
175 13:54:35.233096 runner path: /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/1/tests/1_bootrr test_uuid 11263707_1.4.2.3.5
176 13:54:35.233329 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
178 13:54:35.233708 Creating lava-test-runner.conf files
179 13:54:35.233823 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/0 for stage 0
180 13:54:35.233971 - 0_dmesg
181 13:54:35.234103 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11263707/lava-overlay-fdujkw4c/lava-11263707/1 for stage 1
182 13:54:35.234255 - 1_bootrr
183 13:54:35.234411 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
184 13:54:35.234558 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
185 13:54:35.247631 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
186 13:54:35.247799 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
187 13:54:35.247920 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
188 13:54:35.248046 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
189 13:54:35.248174 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
190 13:54:35.519161 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
191 13:54:35.519522 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
192 13:54:35.519644 extracting modules file /var/lib/lava/dispatcher/tmp/11263707/tftp-deploy-vq2dn_7v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11263707/extract-overlay-ramdisk-oqjqxitn/ramdisk
193 13:54:35.602845 end: 1.4.4 extract-modules (duration 00:00:00) [common]
194 13:54:35.603013 start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
195 13:54:35.603114 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11263707/compress-overlay-kheaka4t/overlay-1.4.2.4.tar.gz to ramdisk
196 13:54:35.603192 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11263707/compress-overlay-kheaka4t/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11263707/extract-overlay-ramdisk-oqjqxitn/ramdisk
197 13:54:35.614210 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
198 13:54:35.614366 start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
199 13:54:35.614466 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
200 13:54:35.614561 start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
201 13:54:35.614646 Building ramdisk /var/lib/lava/dispatcher/tmp/11263707/extract-overlay-ramdisk-oqjqxitn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11263707/extract-overlay-ramdisk-oqjqxitn/ramdisk
202 13:54:35.832065 >> 92985 blocks
203 13:54:37.445238 rename /var/lib/lava/dispatcher/tmp/11263707/extract-overlay-ramdisk-oqjqxitn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11263707/tftp-deploy-vq2dn_7v/ramdisk/ramdisk.cpio.gz
204 13:54:37.445780 end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
205 13:54:37.445935 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
206 13:54:37.446068 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
207 13:54:37.446191 No mkimage arch provided, not using FIT.
208 13:54:37.446311 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
209 13:54:37.446439 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
210 13:54:37.446603 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
211 13:54:37.446754 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
212 13:54:37.446859 No LXC device requested
213 13:54:37.446991 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
214 13:54:37.447181 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
215 13:54:37.447286 end: 1.6 deploy-device-env (duration 00:00:00) [common]
216 13:54:37.447399 Checking files for TFTP limit of 4294967296 bytes.
217 13:54:37.448007 end: 1 tftp-deploy (duration 00:00:04) [common]
218 13:54:37.448196 start: 2 depthcharge-action (timeout 00:05:00) [common]
219 13:54:37.448333 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
220 13:54:37.448514 substitutions:
221 13:54:37.448609 - {DTB}: None
222 13:54:37.448700 - {INITRD}: 11263707/tftp-deploy-vq2dn_7v/ramdisk/ramdisk.cpio.gz
223 13:54:37.448801 - {KERNEL}: 11263707/tftp-deploy-vq2dn_7v/kernel/bzImage
224 13:54:37.448935 - {LAVA_MAC}: None
225 13:54:37.449038 - {PRESEED_CONFIG}: None
226 13:54:37.449122 - {PRESEED_LOCAL}: None
227 13:54:37.449257 - {RAMDISK}: 11263707/tftp-deploy-vq2dn_7v/ramdisk/ramdisk.cpio.gz
228 13:54:37.449346 - {ROOT_PART}: None
229 13:54:37.449512 - {ROOT}: None
230 13:54:37.449638 - {SERVER_IP}: 192.168.201.1
231 13:54:37.449726 - {TEE}: None
232 13:54:37.449824 Parsed boot commands:
233 13:54:37.449936 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
234 13:54:37.450170 Parsed boot commands: tftpboot 192.168.201.1 11263707/tftp-deploy-vq2dn_7v/kernel/bzImage 11263707/tftp-deploy-vq2dn_7v/kernel/cmdline 11263707/tftp-deploy-vq2dn_7v/ramdisk/ramdisk.cpio.gz
235 13:54:37.450302 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
236 13:54:37.450431 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
237 13:54:37.450563 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
238 13:54:37.450684 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
239 13:54:37.450794 Not connected, no need to disconnect.
240 13:54:37.450912 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
241 13:54:37.451033 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
242 13:54:37.451131 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-0'
243 13:54:37.454669 Setting prompt string to ['lava-test: # ']
244 13:54:37.455126 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
245 13:54:37.455267 end: 2.2.1 reset-connection (duration 00:00:00) [common]
246 13:54:37.455399 start: 2.2.2 reset-device (timeout 00:05:00) [common]
247 13:54:37.455552 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
248 13:54:37.455942 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=reboot'
249 13:54:46.616940 >> Command sent successfully.
250 13:54:46.619529 Returned 0 in 9 seconds
251 13:54:46.719934 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
253 13:54:46.720433 end: 2.2.2 reset-device (duration 00:00:09) [common]
254 13:54:46.720591 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
255 13:54:46.720735 Setting prompt string to 'Starting depthcharge on Volmar...'
256 13:54:46.720868 Changing prompt to 'Starting depthcharge on Volmar...'
257 13:54:46.720987 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
258 13:54:46.721375 [Enter `^Ec?' for help]
259 13:54:48.097088
260 13:54:48.097231
261 13:54:48.103780 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
262 13:54:48.106848 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
263 13:54:48.113994 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
264 13:54:48.116938 CPU: AES supported, TXT NOT supported, VT supported
265 13:54:48.127333 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
266 13:54:48.127435 Cache size = 10 MiB
267 13:54:48.131401 MCH: device id 4609 (rev 04) is Alderlake-P
268 13:54:48.137801 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
269 13:54:48.141754 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
270 13:54:48.145118 VBOOT: Loading verstage.
271 13:54:48.148745 FMAP: Found "FLASH" version 1.1 at 0x1804000.
272 13:54:48.155882 FMAP: base = 0x0 size = 0x2000000 #areas = 37
273 13:54:48.159012 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
274 13:54:48.169109 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
275 13:54:48.175711 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
276 13:54:48.175805
277 13:54:48.175872
278 13:54:48.186719 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
279 13:54:48.189992 Probing TPM I2C: I2C bus 1 version 0x3230302a
280 13:54:48.193846 DW I2C bus 1 at 0xfe022000 (400 KHz)
281 13:54:48.196881 I2C TX abort detected (00000001)
282 13:54:48.201088 cr50_i2c_read: Address write failed
283 13:54:48.213422 .done! DID_VID 0x00281ae0
284 13:54:48.216699 TPM ready after 0 ms
285 13:54:48.220181 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
286 13:54:48.233735 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
287 13:54:48.240118 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
288 13:54:48.296241 tlcl_send_startup: Startup return code is 0
289 13:54:48.296369 TPM: setup succeeded
290 13:54:48.317067 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
291 13:54:48.339142 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
292 13:54:48.343670 Chrome EC: UHEPI supported
293 13:54:48.346620 Reading cr50 boot mode
294 13:54:48.361752 Cr50 says boot_mode is VERIFIED_RW(0x00).
295 13:54:48.361875 Phase 1
296 13:54:48.368248 FMAP: area GBB found @ 1805000 (458752 bytes)
297 13:54:48.375329 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
298 13:54:48.381694 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
299 13:54:48.388488 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
300 13:54:48.388602 Phase 2
301 13:54:48.391737 Phase 3
302 13:54:48.394867 FMAP: area GBB found @ 1805000 (458752 bytes)
303 13:54:48.402025 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 13:54:48.404990 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 13:54:48.412099 VB2:vb2_verify_keyblock() Checking keyblock signature...
306 13:54:48.418461 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
307 13:54:48.425088 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
308 13:54:48.434902 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
309 13:54:48.446878 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
310 13:54:48.449732 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
311 13:54:48.456790 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 13:54:48.463644 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
313 13:54:48.470213 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 13:54:48.476594 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 13:54:48.480402 Phase 4
316 13:54:48.484269 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
317 13:54:48.490686 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
318 13:54:48.703152 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
319 13:54:48.710175 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
320 13:54:48.713137 Saving vboot hash.
321 13:54:48.719549 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
322 13:54:48.735727 tlcl_extend: response is 0
323 13:54:48.742358 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
324 13:54:48.745525 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
325 13:54:48.765407 tlcl_extend: response is 0
326 13:54:48.772105 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
327 13:54:48.790013 tlcl_lock_nv_write: response is 0
328 13:54:48.809352 tlcl_lock_nv_write: response is 0
329 13:54:48.809492 Slot A is selected
330 13:54:48.815782 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
331 13:54:48.822588 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
332 13:54:48.829399 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
333 13:54:48.835890 BS: verstage times (exec / console): total (unknown) / 264 ms
334 13:54:48.835981
335 13:54:48.836047
336 13:54:48.842578 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
337 13:54:48.847445 Google Chrome EC: version:
338 13:54:48.850542 ro: volmar_v2.0.14126-e605144e9c
339 13:54:48.853717 rw: volmar_v0.0.55-22d1557
340 13:54:48.857804 running image: 2
341 13:54:48.860518 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
342 13:54:48.870730 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 13:54:48.877184 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 13:54:48.883933 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
345 13:54:48.893738 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
346 13:54:48.904019 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
347 13:54:48.907353 EC took 941us to calculate image hash
348 13:54:48.916844 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
349 13:54:48.920093 VB2:sync_ec() select_rw=RW(active)
350 13:54:48.931636 Waited 275us to clear limit power flag.
351 13:54:48.934897 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 13:54:48.938118 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 13:54:48.942017 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
354 13:54:48.948281 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
355 13:54:48.952009 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
356 13:54:48.955191 TCO_STS: 0000 0000
357 13:54:48.955279 GEN_PMCON: d0015038 00002200
358 13:54:48.958514 GBLRST_CAUSE: 00000000 00000000
359 13:54:48.961627 HPR_CAUSE0: 00000000
360 13:54:48.965232 prev_sleep_state 5
361 13:54:48.968263 Abort disabling TXT, as CPU is not TXT capable.
362 13:54:48.975867 cse_lite: Number of partitions = 3
363 13:54:48.979277 cse_lite: Current partition = RO
364 13:54:48.979364 cse_lite: Next partition = RO
365 13:54:48.982565 cse_lite: Flags = 0x7
366 13:54:48.989179 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
367 13:54:48.999188 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
368 13:54:49.002668 FMAP: area SI_ME found @ 1000 (5238784 bytes)
369 13:54:49.009432 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
370 13:54:49.015928 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
371 13:54:49.022368 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
372 13:54:49.026211 cse_lite: CSE CBFS RW version : 16.1.25.2049
373 13:54:49.032490 cse_lite: Set Boot Partition Info Command (RW)
374 13:54:49.036358 HECI: Global Reset(Type:1) Command
375 13:54:50.447393
376 13:54:50.447575
377 13:54:50.454099 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
378 13:54:50.458333 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
379 13:54:50.465044 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
380 13:54:50.468162 CPU: AES supported, TXT NOT supported, VT supported
381 13:54:50.477968 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
382 13:54:50.478060 Cache size = 10 MiB
383 13:54:50.484435 MCH: device id 4609 (rev 04) is Alderlake-P
384 13:54:50.488103 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
385 13:54:50.491310 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
386 13:54:50.494903 VBOOT: Loading verstage.
387 13:54:50.502770 FMAP: Found "FLASH" version 1.1 at 0x1804000.
388 13:54:50.505618 FMAP: base = 0x0 size = 0x2000000 #areas = 37
389 13:54:50.509099 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
390 13:54:50.516546 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
391 13:54:50.527035 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
392 13:54:50.527126
393 13:54:50.527208
394 13:54:50.536564 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
395 13:54:50.539654 Probing TPM I2C: I2C bus 1 version 0x3230302a
396 13:54:50.546584 DW I2C bus 1 at 0xfe022000 (400 KHz)
397 13:54:50.546697 done! DID_VID 0x00281ae0
398 13:54:50.550393 TPM ready after 0 ms
399 13:54:50.553618 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
400 13:54:50.567794 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
401 13:54:50.571297 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
402 13:54:50.633328 tlcl_send_startup: Startup return code is 0
403 13:54:50.633472 TPM: setup succeeded
404 13:54:50.653313 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
405 13:54:50.674890 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
406 13:54:50.679567 Chrome EC: UHEPI supported
407 13:54:50.682746 Reading cr50 boot mode
408 13:54:50.697350 Cr50 says boot_mode is VERIFIED_RW(0x00).
409 13:54:50.697440 Phase 1
410 13:54:50.704470 FMAP: area GBB found @ 1805000 (458752 bytes)
411 13:54:50.710894 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
412 13:54:50.717542 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
413 13:54:50.724327 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
414 13:54:50.727677 Phase 2
415 13:54:50.727796 Phase 3
416 13:54:50.730874 FMAP: area GBB found @ 1805000 (458752 bytes)
417 13:54:50.737706 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
418 13:54:50.740899 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
419 13:54:50.747906 VB2:vb2_verify_keyblock() Checking keyblock signature...
420 13:54:50.754248 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
421 13:54:50.760766 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
422 13:54:50.770770 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
423 13:54:50.782548 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
424 13:54:50.785699 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
425 13:54:50.792176 VB2:vb2_verify_fw_preamble() Verifying preamble.
426 13:54:50.799058 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
427 13:54:50.806014 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
428 13:54:50.812406 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
429 13:54:50.816229 Phase 4
430 13:54:50.819913 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
431 13:54:50.826376 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
432 13:54:51.038999 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
433 13:54:51.045385 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
434 13:54:51.049088 Saving vboot hash.
435 13:54:51.055332 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
436 13:54:51.071560 tlcl_extend: response is 0
437 13:54:51.077888 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
438 13:54:51.084443 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
439 13:54:51.098723 tlcl_extend: response is 0
440 13:54:51.105652 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
441 13:54:51.125745 tlcl_lock_nv_write: response is 0
442 13:54:51.144691 tlcl_lock_nv_write: response is 0
443 13:54:51.144845 Slot A is selected
444 13:54:51.151242 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
445 13:54:51.158289 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
446 13:54:51.165005 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
447 13:54:51.171232 BS: verstage times (exec / console): total (unknown) / 257 ms
448 13:54:51.171349
449 13:54:51.171449
450 13:54:51.177732 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
451 13:54:51.181736 Google Chrome EC: version:
452 13:54:51.185442 ro: volmar_v2.0.14126-e605144e9c
453 13:54:51.188636 rw: volmar_v0.0.55-22d1557
454 13:54:51.191700 running image: 2
455 13:54:51.195413 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
456 13:54:51.205223 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
457 13:54:51.212358 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
458 13:54:51.218496 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
459 13:54:51.228261 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
460 13:54:51.238467 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
461 13:54:51.242100 EC took 941us to calculate image hash
462 13:54:51.253225 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
463 13:54:51.256580 VB2:sync_ec() select_rw=RW(active)
464 13:54:51.272172 Waited 270us to clear limit power flag.
465 13:54:51.275229 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
466 13:54:51.278472 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
467 13:54:51.281720 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
468 13:54:51.288745 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
469 13:54:51.292444 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
470 13:54:51.295579 TCO_STS: 0000 0000
471 13:54:51.295666 GEN_PMCON: d1001038 00002200
472 13:54:51.298732 GBLRST_CAUSE: 00000040 00000000
473 13:54:51.302382 HPR_CAUSE0: 00000000
474 13:54:51.305489 prev_sleep_state 5
475 13:54:51.308730 Abort disabling TXT, as CPU is not TXT capable.
476 13:54:51.316782 cse_lite: Number of partitions = 3
477 13:54:51.320018 cse_lite: Current partition = RW
478 13:54:51.320106 cse_lite: Next partition = RW
479 13:54:51.323413 cse_lite: Flags = 0x7
480 13:54:51.329869 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
481 13:54:51.339887 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
482 13:54:51.343608 FMAP: area SI_ME found @ 1000 (5238784 bytes)
483 13:54:51.350301 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
484 13:54:51.356921 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
485 13:54:51.363348 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
486 13:54:51.366796 cse_lite: CSE CBFS RW version : 16.1.25.2049
487 13:54:51.370065 Boot Count incremented to 2112
488 13:54:51.376606 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
489 13:54:51.383439 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
490 13:54:51.396345 Probing TPM I2C: done! DID_VID 0x00281ae0
491 13:54:51.399563 Locality already claimed
492 13:54:51.402658 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
493 13:54:51.421981 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
494 13:54:51.428731 MRC: Hash idx 0x100d comparison successful.
495 13:54:51.432121 MRC cache found, size f6c8
496 13:54:51.432231 bootmode is set to: 2
497 13:54:51.435867 EC returned error result code 3
498 13:54:51.439176 FW_CONFIG value from CBI is 0x131
499 13:54:51.445659 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
500 13:54:51.449300 SPD index = 0
501 13:54:51.455849 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
502 13:54:51.455966 SPD: module type is LPDDR4X
503 13:54:51.462828 SPD: module part number is K4U6E3S4AB-MGCL
504 13:54:51.469678 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
505 13:54:51.472723 SPD: device width 16 bits, bus width 16 bits
506 13:54:51.476194 SPD: module size is 1024 MB (per channel)
507 13:54:51.545104 CBMEM:
508 13:54:51.548581 IMD: root @ 0x76fff000 254 entries.
509 13:54:51.551666 IMD: root @ 0x76ffec00 62 entries.
510 13:54:51.559414 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
511 13:54:51.562698 RO_VPD is uninitialized or empty.
512 13:54:51.566481 FMAP: area RW_VPD found @ f29000 (8192 bytes)
513 13:54:51.569664 RW_VPD is uninitialized or empty.
514 13:54:51.575857 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
515 13:54:51.579696 External stage cache:
516 13:54:51.582782 IMD: root @ 0x7bbff000 254 entries.
517 13:54:51.585841 IMD: root @ 0x7bbfec00 62 entries.
518 13:54:51.593048 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
519 13:54:51.599425 MRC: Checking cached data update for 'RW_MRC_CACHE'.
520 13:54:51.602631 MRC: 'RW_MRC_CACHE' does not need update.
521 13:54:51.602745 8 DIMMs found
522 13:54:51.606321 SMM Memory Map
523 13:54:51.609569 SMRAM : 0x7b800000 0x800000
524 13:54:51.612708 Subregion 0: 0x7b800000 0x200000
525 13:54:51.616469 Subregion 1: 0x7ba00000 0x200000
526 13:54:51.619710 Subregion 2: 0x7bc00000 0x400000
527 13:54:51.622909 top_of_ram = 0x77000000
528 13:54:51.626097 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
529 13:54:51.633179 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
530 13:54:51.639909 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
531 13:54:51.642808 MTRR Range: Start=ff000000 End=0 (Size 1000000)
532 13:54:51.642889 Normal boot
533 13:54:51.653155 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
534 13:54:51.659288 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
535 13:54:51.666302 Processing 237 relocs. Offset value of 0x74ab9000
536 13:54:51.674371 BS: romstage times (exec / console): total (unknown) / 381 ms
537 13:54:51.681602
538 13:54:51.681714
539 13:54:51.688034 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
540 13:54:51.688166 Normal boot
541 13:54:51.694683 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
542 13:54:51.701289 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
543 13:54:51.708151 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
544 13:54:51.718130 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
545 13:54:51.766284 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
546 13:54:51.772629 Processing 5931 relocs. Offset value of 0x72a2f000
547 13:54:51.775927 BS: postcar times (exec / console): total (unknown) / 51 ms
548 13:54:51.776035
549 13:54:51.779296
550 13:54:51.786467 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
551 13:54:51.789551 Reserving BERT start 76a1e000, size 10000
552 13:54:51.792639 Normal boot
553 13:54:51.795947 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
554 13:54:51.802647 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
555 13:54:51.812770 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
556 13:54:51.816016 FMAP: area RW_VPD found @ f29000 (8192 bytes)
557 13:54:51.819714 Google Chrome EC: version:
558 13:54:51.822912 ro: volmar_v2.0.14126-e605144e9c
559 13:54:51.826495 rw: volmar_v0.0.55-22d1557
560 13:54:51.829607 running image: 2
561 13:54:51.833501 ACPI _SWS is PM1 Index 8 GPE Index -1
562 13:54:51.836924 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
563 13:54:51.840918 EC returned error result code 3
564 13:54:51.844442 FW_CONFIG value from CBI is 0x131
565 13:54:51.850918 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
566 13:54:51.854643 PCI: 00:1c.2 disabled by fw_config
567 13:54:51.861485 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
568 13:54:51.864402 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
569 13:54:51.871332 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
570 13:54:51.874700 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
571 13:54:51.881287 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
572 13:54:51.888097 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
573 13:54:51.894769 microcode: sig=0x906a4 pf=0x80 revision=0x423
574 13:54:51.898008 microcode: Update skipped, already up-to-date
575 13:54:51.904447 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
576 13:54:51.937169 Detected 6 core, 8 thread CPU.
577 13:54:51.940509 Setting up SMI for CPU
578 13:54:51.943827 IED base = 0x7bc00000
579 13:54:51.943909 IED size = 0x00400000
580 13:54:51.947103 Will perform SMM setup.
581 13:54:51.953437 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
582 13:54:51.953524 LAPIC 0x0 in XAPIC mode.
583 13:54:51.963617 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
584 13:54:51.967191 Processing 18 relocs. Offset value of 0x00030000
585 13:54:51.971949 Attempting to start 7 APs
586 13:54:51.975228 Waiting for 10ms after sending INIT.
587 13:54:51.988186 Waiting for SIPI to complete...
588 13:54:51.991333 LAPIC 0x1 in XAPIC mode.
589 13:54:51.994892 LAPIC 0x10 in XAPIC mode.
590 13:54:51.997940 LAPIC 0x12 in XAPIC mode.
591 13:54:52.001147 AP: slot 2 apic_id 10, MCU rev: 0x00000423
592 13:54:52.004808 LAPIC 0x14 in XAPIC mode.
593 13:54:52.008023 AP: slot 3 apic_id 12, MCU rev: 0x00000423
594 13:54:52.011108 LAPIC 0x16 in XAPIC mode.
595 13:54:52.014320 AP: slot 4 apic_id 14, MCU rev: 0x00000423
596 13:54:52.021057 AP: slot 6 apic_id 1, MCU rev: 0x00000423
597 13:54:52.024417 AP: slot 1 apic_id 16, MCU rev: 0x00000423
598 13:54:52.024498 done.
599 13:54:52.027851 Waiting for SIPI to complete...
600 13:54:52.027951 done.
601 13:54:52.031149 LAPIC 0x8 in XAPIC mode.
602 13:54:52.034767 LAPIC 0x9 in XAPIC mode.
603 13:54:52.038116 AP: slot 7 apic_id 8, MCU rev: 0x00000423
604 13:54:52.041318 AP: slot 5 apic_id 9, MCU rev: 0x00000423
605 13:54:52.044607 smm_setup_relocation_handler: enter
606 13:54:52.047832 smm_setup_relocation_handler: exit
607 13:54:52.057999 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
608 13:54:52.061354 Processing 11 relocs. Offset value of 0x00038000
609 13:54:52.068428 smm_module_setup_stub: stack_top = 0x7b804000
610 13:54:52.071326 smm_module_setup_stub: per cpu stack_size = 0x800
611 13:54:52.077847 smm_module_setup_stub: runtime.start32_offset = 0x4c
612 13:54:52.081134 smm_module_setup_stub: runtime.smm_size = 0x10000
613 13:54:52.088068 SMM Module: stub loaded at 38000. Will call 0x76a52094
614 13:54:52.091304 Installing permanent SMM handler to 0x7b800000
615 13:54:52.097972 smm_load_module: total_smm_space_needed e468, available -> 200000
616 13:54:52.107969 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
617 13:54:52.111215 Processing 255 relocs. Offset value of 0x7b9f6000
618 13:54:52.114801 smm_load_module: smram_start: 0x7b800000
619 13:54:52.121123 smm_load_module: smram_end: 7ba00000
620 13:54:52.124867 smm_load_module: handler start 0x7b9f6d5f
621 13:54:52.128049 smm_load_module: handler_size 98d0
622 13:54:52.131448 smm_load_module: fxsave_area 0x7b9ff000
623 13:54:52.134971 smm_load_module: fxsave_size 1000
624 13:54:52.138486 smm_load_module: CONFIG_MSEG_SIZE 0x0
625 13:54:52.144792 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
626 13:54:52.148023 smm_load_module: handler_mod_params.smbase = 0x7b800000
627 13:54:52.154860 smm_load_module: per_cpu_save_state_size = 0x400
628 13:54:52.157862 smm_load_module: num_cpus = 0x8
629 13:54:52.164741 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
630 13:54:52.167948 smm_load_module: total_save_state_size = 0x2000
631 13:54:52.171114 smm_load_module: cpu0 entry: 7b9e6000
632 13:54:52.178104 smm_create_map: cpus allowed in one segment 30
633 13:54:52.181311 smm_create_map: min # of segments needed 1
634 13:54:52.181421 CPU 0x0
635 13:54:52.184541 smbase 7b9e6000 entry 7b9ee000
636 13:54:52.191548 ss_start 7b9f5c00 code_end 7b9ee208
637 13:54:52.191663 CPU 0x1
638 13:54:52.194797 smbase 7b9e5c00 entry 7b9edc00
639 13:54:52.201438 ss_start 7b9f5800 code_end 7b9ede08
640 13:54:52.201548 CPU 0x2
641 13:54:52.204729 smbase 7b9e5800 entry 7b9ed800
642 13:54:52.208352 ss_start 7b9f5400 code_end 7b9eda08
643 13:54:52.211221 CPU 0x3
644 13:54:52.215051 smbase 7b9e5400 entry 7b9ed400
645 13:54:52.217974 ss_start 7b9f5000 code_end 7b9ed608
646 13:54:52.218103 CPU 0x4
647 13:54:52.221267 smbase 7b9e5000 entry 7b9ed000
648 13:54:52.228207 ss_start 7b9f4c00 code_end 7b9ed208
649 13:54:52.228338 CPU 0x5
650 13:54:52.231401 smbase 7b9e4c00 entry 7b9ecc00
651 13:54:52.238422 ss_start 7b9f4800 code_end 7b9ece08
652 13:54:52.238562 CPU 0x6
653 13:54:52.241266 smbase 7b9e4800 entry 7b9ec800
654 13:54:52.244964 ss_start 7b9f4400 code_end 7b9eca08
655 13:54:52.248460 CPU 0x7
656 13:54:52.251452 smbase 7b9e4400 entry 7b9ec400
657 13:54:52.254834 ss_start 7b9f4000 code_end 7b9ec608
658 13:54:52.264799 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
659 13:54:52.267863 Processing 11 relocs. Offset value of 0x7b9ee000
660 13:54:52.274860 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
661 13:54:52.281168 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
662 13:54:52.288246 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
663 13:54:52.291708 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
664 13:54:52.297958 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
665 13:54:52.304488 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
666 13:54:52.311373 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
667 13:54:52.317827 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
668 13:54:52.324504 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
669 13:54:52.331360 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
670 13:54:52.337637 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
671 13:54:52.344537 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
672 13:54:52.351054 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
673 13:54:52.354477 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
674 13:54:52.361196 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
675 13:54:52.367940 smm_module_setup_stub: stack_top = 0x7b804000
676 13:54:52.371377 smm_module_setup_stub: per cpu stack_size = 0x800
677 13:54:52.377679 smm_module_setup_stub: runtime.start32_offset = 0x4c
678 13:54:52.380807 smm_module_setup_stub: runtime.smm_size = 0x200000
679 13:54:52.387729 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
680 13:54:52.392073 Clearing SMI status registers
681 13:54:52.395265 SMI_STS: PM1
682 13:54:52.395350 PM1_STS: WAK PWRBTN
683 13:54:52.405556 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
684 13:54:52.405645 In relocation handler: CPU 0
685 13:54:52.412577 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
686 13:54:52.415237 Writing SMRR. base = 0x7b800006, mask=0xff800c00
687 13:54:52.419015 Relocation complete.
688 13:54:52.425420 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
689 13:54:52.428880 In relocation handler: CPU 6
690 13:54:52.432351 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
691 13:54:52.435375 Relocation complete.
692 13:54:52.442268 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
693 13:54:52.445379 In relocation handler: CPU 1
694 13:54:52.448664 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
695 13:54:52.451842 Writing SMRR. base = 0x7b800006, mask=0xff800c00
696 13:54:52.455658 Relocation complete.
697 13:54:52.461842 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
698 13:54:52.465042 In relocation handler: CPU 3
699 13:54:52.468693 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
700 13:54:52.475694 Writing SMRR. base = 0x7b800006, mask=0xff800c00
701 13:54:52.475825 Relocation complete.
702 13:54:52.485677 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
703 13:54:52.485761 In relocation handler: CPU 2
704 13:54:52.491859 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
705 13:54:52.495669 Writing SMRR. base = 0x7b800006, mask=0xff800c00
706 13:54:52.499100 Relocation complete.
707 13:54:52.505541 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
708 13:54:52.509155 In relocation handler: CPU 4
709 13:54:52.512387 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
710 13:54:52.518794 Writing SMRR. base = 0x7b800006, mask=0xff800c00
711 13:54:52.518891 Relocation complete.
712 13:54:52.525797 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
713 13:54:52.528914 In relocation handler: CPU 5
714 13:54:52.532660 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
715 13:54:52.535248 Relocation complete.
716 13:54:52.542347 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
717 13:54:52.545510 In relocation handler: CPU 7
718 13:54:52.548691 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
719 13:54:52.555693 Writing SMRR. base = 0x7b800006, mask=0xff800c00
720 13:54:52.555830 Relocation complete.
721 13:54:52.558900 Initializing CPU #0
722 13:54:52.562325 CPU: vendor Intel device 906a4
723 13:54:52.565348 CPU: family 06, model 9a, stepping 04
724 13:54:52.569179 Clearing out pending MCEs
725 13:54:52.572185 cpu: energy policy set to 7
726 13:54:52.575641 Turbo is available but hidden
727 13:54:52.579184 Turbo is available and visible
728 13:54:52.582426 microcode: Update skipped, already up-to-date
729 13:54:52.585642 CPU #0 initialized
730 13:54:52.585731 Initializing CPU #6
731 13:54:52.589214 Initializing CPU #4
732 13:54:52.592410 Initializing CPU #3
733 13:54:52.592498 Initializing CPU #1
734 13:54:52.595550 Initializing CPU #2
735 13:54:52.598801 CPU: vendor Intel device 906a4
736 13:54:52.602084 CPU: family 06, model 9a, stepping 04
737 13:54:52.605781 CPU: vendor Intel device 906a4
738 13:54:52.608634 CPU: family 06, model 9a, stepping 04
739 13:54:52.612306 Clearing out pending MCEs
740 13:54:52.612419 Clearing out pending MCEs
741 13:54:52.615605 cpu: energy policy set to 7
742 13:54:52.618789 CPU: vendor Intel device 906a4
743 13:54:52.622374 CPU: family 06, model 9a, stepping 04
744 13:54:52.628936 microcode: Update skipped, already up-to-date
745 13:54:52.629044 CPU #3 initialized
746 13:54:52.632169 cpu: energy policy set to 7
747 13:54:52.635353 Clearing out pending MCEs
748 13:54:52.638927 Initializing CPU #7
749 13:54:52.639034 Initializing CPU #5
750 13:54:52.642399 cpu: energy policy set to 7
751 13:54:52.645338 CPU: vendor Intel device 906a4
752 13:54:52.648625 CPU: family 06, model 9a, stepping 04
753 13:54:52.655444 microcode: Update skipped, already up-to-date
754 13:54:52.655536 CPU #2 initialized
755 13:54:52.662459 microcode: Update skipped, already up-to-date
756 13:54:52.662554 CPU #1 initialized
757 13:54:52.665330 Clearing out pending MCEs
758 13:54:52.668621 CPU: vendor Intel device 906a4
759 13:54:52.672106 cpu: energy policy set to 7
760 13:54:52.675816 CPU: vendor Intel device 906a4
761 13:54:52.678788 CPU: family 06, model 9a, stepping 04
762 13:54:52.682150 microcode: Update skipped, already up-to-date
763 13:54:52.685973 CPU #4 initialized
764 13:54:52.688934 Clearing out pending MCEs
765 13:54:52.689013 CPU: vendor Intel device 906a4
766 13:54:52.695581 CPU: family 06, model 9a, stepping 04
767 13:54:52.695663 cpu: energy policy set to 7
768 13:54:52.698972 Clearing out pending MCEs
769 13:54:52.702249 CPU: family 06, model 9a, stepping 04
770 13:54:52.705589 cpu: energy policy set to 7
771 13:54:52.708831 Clearing out pending MCEs
772 13:54:52.711980 microcode: Update skipped, already up-to-date
773 13:54:52.715390 CPU #6 initialized
774 13:54:52.718981 microcode: Update skipped, already up-to-date
775 13:54:52.722527 CPU #5 initialized
776 13:54:52.725597 cpu: energy policy set to 7
777 13:54:52.728979 microcode: Update skipped, already up-to-date
778 13:54:52.732225 CPU #7 initialized
779 13:54:52.735465 bsp_do_flight_plan done after 702 msecs.
780 13:54:52.739063 CPU: frequency set to 4400 MHz
781 13:54:52.739146 Enabling SMIs.
782 13:54:52.745422 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
783 13:54:52.762396 Probing TPM I2C: done! DID_VID 0x00281ae0
784 13:54:52.766275 Locality already claimed
785 13:54:52.769224 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
786 13:54:52.780887 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
787 13:54:52.784069 Enabling GPIO PM b/c CR50 has long IRQ pulse support
788 13:54:52.790774 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
789 13:54:52.797468 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
790 13:54:52.800820 Found a VBT of 9216 bytes after decompression
791 13:54:52.803949 PCI 1.0, PIN A, using IRQ #16
792 13:54:52.807715 PCI 2.0, PIN A, using IRQ #17
793 13:54:52.811004 PCI 4.0, PIN A, using IRQ #18
794 13:54:52.814187 PCI 5.0, PIN A, using IRQ #16
795 13:54:52.817409 PCI 6.0, PIN A, using IRQ #16
796 13:54:52.820875 PCI 6.2, PIN C, using IRQ #18
797 13:54:52.824093 PCI 7.0, PIN A, using IRQ #19
798 13:54:52.827281 PCI 7.1, PIN B, using IRQ #20
799 13:54:52.831008 PCI 7.2, PIN C, using IRQ #21
800 13:54:52.834223 PCI 7.3, PIN D, using IRQ #22
801 13:54:52.837582 PCI 8.0, PIN A, using IRQ #23
802 13:54:52.840756 PCI D.0, PIN A, using IRQ #17
803 13:54:52.840881 PCI D.1, PIN B, using IRQ #19
804 13:54:52.844429 PCI 10.0, PIN A, using IRQ #24
805 13:54:52.847592 PCI 10.1, PIN B, using IRQ #25
806 13:54:52.850934 PCI 10.6, PIN C, using IRQ #20
807 13:54:52.853880 PCI 10.7, PIN D, using IRQ #21
808 13:54:52.857663 PCI 11.0, PIN A, using IRQ #26
809 13:54:52.860764 PCI 11.1, PIN B, using IRQ #27
810 13:54:52.864129 PCI 11.2, PIN C, using IRQ #28
811 13:54:52.867457 PCI 11.3, PIN D, using IRQ #29
812 13:54:52.871190 PCI 12.0, PIN A, using IRQ #30
813 13:54:52.874247 PCI 12.6, PIN B, using IRQ #31
814 13:54:52.877580 PCI 12.7, PIN C, using IRQ #22
815 13:54:52.881140 PCI 13.0, PIN A, using IRQ #32
816 13:54:52.884328 PCI 13.1, PIN B, using IRQ #33
817 13:54:52.887429 PCI 13.2, PIN C, using IRQ #34
818 13:54:52.887516 PCI 13.3, PIN D, using IRQ #35
819 13:54:52.890780 PCI 14.0, PIN B, using IRQ #23
820 13:54:52.893929 PCI 14.1, PIN A, using IRQ #36
821 13:54:52.897204 PCI 14.3, PIN C, using IRQ #17
822 13:54:52.901071 PCI 15.0, PIN A, using IRQ #37
823 13:54:52.904257 PCI 15.1, PIN B, using IRQ #38
824 13:54:52.907698 PCI 15.2, PIN C, using IRQ #39
825 13:54:52.910873 PCI 15.3, PIN D, using IRQ #40
826 13:54:52.914249 PCI 16.0, PIN A, using IRQ #18
827 13:54:52.917216 PCI 16.1, PIN B, using IRQ #19
828 13:54:52.920620 PCI 16.2, PIN C, using IRQ #20
829 13:54:52.924318 PCI 16.3, PIN D, using IRQ #21
830 13:54:52.927528 PCI 16.4, PIN A, using IRQ #18
831 13:54:52.930743 PCI 16.5, PIN B, using IRQ #19
832 13:54:52.933937 PCI 17.0, PIN A, using IRQ #22
833 13:54:52.937617 PCI 19.0, PIN A, using IRQ #41
834 13:54:52.937708 PCI 19.1, PIN B, using IRQ #42
835 13:54:52.940895 PCI 19.2, PIN C, using IRQ #43
836 13:54:52.944161 PCI 1C.0, PIN A, using IRQ #16
837 13:54:52.947308 PCI 1C.1, PIN B, using IRQ #17
838 13:54:52.950797 PCI 1C.2, PIN C, using IRQ #18
839 13:54:52.954229 PCI 1C.3, PIN D, using IRQ #19
840 13:54:52.957531 PCI 1C.4, PIN A, using IRQ #16
841 13:54:52.960671 PCI 1C.5, PIN B, using IRQ #17
842 13:54:52.964421 PCI 1C.6, PIN C, using IRQ #18
843 13:54:52.967595 PCI 1C.7, PIN D, using IRQ #19
844 13:54:52.970738 PCI 1D.0, PIN A, using IRQ #16
845 13:54:52.974071 PCI 1D.1, PIN B, using IRQ #17
846 13:54:52.977634 PCI 1D.2, PIN C, using IRQ #18
847 13:54:52.980833 PCI 1D.3, PIN D, using IRQ #19
848 13:54:52.984071 PCI 1E.0, PIN A, using IRQ #23
849 13:54:52.987649 PCI 1E.1, PIN B, using IRQ #20
850 13:54:52.987780 PCI 1E.2, PIN C, using IRQ #44
851 13:54:52.990807 PCI 1E.3, PIN D, using IRQ #45
852 13:54:52.994100 PCI 1F.3, PIN B, using IRQ #22
853 13:54:52.997577 PCI 1F.4, PIN C, using IRQ #23
854 13:54:53.000767 PCI 1F.6, PIN D, using IRQ #20
855 13:54:53.004415 PCI 1F.7, PIN A, using IRQ #21
856 13:54:53.010826 IRQ: Using dynamically assigned PCI IO-APIC IRQs
857 13:54:53.017486 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
858 13:54:53.201332 FSPS returned 0
859 13:54:53.203943 Executing Phase 1 of FspMultiPhaseSiInit
860 13:54:53.214542 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
861 13:54:53.217456 port C0 DISC req: usage 1 usb3 1 usb2 1
862 13:54:53.220643 Raw Buffer output 0 00000111
863 13:54:53.223961 Raw Buffer output 1 00000000
864 13:54:53.227965 pmc_send_ipc_cmd succeeded
865 13:54:53.234429 port C1 DISC req: usage 1 usb3 3 usb2 3
866 13:54:53.234514 Raw Buffer output 0 00000331
867 13:54:53.237554 Raw Buffer output 1 00000000
868 13:54:53.242054 pmc_send_ipc_cmd succeeded
869 13:54:53.245970 Detected 6 core, 8 thread CPU.
870 13:54:53.248725 Detected 6 core, 8 thread CPU.
871 13:54:53.254170 Detected 6 core, 8 thread CPU.
872 13:54:53.257343 Detected 6 core, 8 thread CPU.
873 13:54:53.261028 Detected 6 core, 8 thread CPU.
874 13:54:53.264538 Detected 6 core, 8 thread CPU.
875 13:54:53.267755 Detected 6 core, 8 thread CPU.
876 13:54:53.271132 Detected 6 core, 8 thread CPU.
877 13:54:53.274230 Detected 6 core, 8 thread CPU.
878 13:54:53.278290 Detected 6 core, 8 thread CPU.
879 13:54:53.281018 Detected 6 core, 8 thread CPU.
880 13:54:53.284353 Detected 6 core, 8 thread CPU.
881 13:54:53.287422 Detected 6 core, 8 thread CPU.
882 13:54:53.291218 Detected 6 core, 8 thread CPU.
883 13:54:53.294314 Detected 6 core, 8 thread CPU.
884 13:54:53.297867 Detected 6 core, 8 thread CPU.
885 13:54:53.301165 Detected 6 core, 8 thread CPU.
886 13:54:53.304344 Detected 6 core, 8 thread CPU.
887 13:54:53.307565 Detected 6 core, 8 thread CPU.
888 13:54:53.311329 Detected 6 core, 8 thread CPU.
889 13:54:53.311446 Detected 6 core, 8 thread CPU.
890 13:54:53.314266 Detected 6 core, 8 thread CPU.
891 13:54:53.606727 Detected 6 core, 8 thread CPU.
892 13:54:53.610260 Detected 6 core, 8 thread CPU.
893 13:54:53.613675 Detected 6 core, 8 thread CPU.
894 13:54:53.616675 Detected 6 core, 8 thread CPU.
895 13:54:53.619915 Detected 6 core, 8 thread CPU.
896 13:54:53.623647 Detected 6 core, 8 thread CPU.
897 13:54:53.626631 Detected 6 core, 8 thread CPU.
898 13:54:53.629849 Detected 6 core, 8 thread CPU.
899 13:54:53.633693 Detected 6 core, 8 thread CPU.
900 13:54:53.636933 Detected 6 core, 8 thread CPU.
901 13:54:53.640137 Detected 6 core, 8 thread CPU.
902 13:54:53.643102 Detected 6 core, 8 thread CPU.
903 13:54:53.646670 Detected 6 core, 8 thread CPU.
904 13:54:53.650123 Detected 6 core, 8 thread CPU.
905 13:54:53.653263 Detected 6 core, 8 thread CPU.
906 13:54:53.657016 Detected 6 core, 8 thread CPU.
907 13:54:53.660398 Detected 6 core, 8 thread CPU.
908 13:54:53.663329 Detected 6 core, 8 thread CPU.
909 13:54:53.667034 Detected 6 core, 8 thread CPU.
910 13:54:53.670529 Detected 6 core, 8 thread CPU.
911 13:54:53.670615 Display FSP Version Info HOB
912 13:54:53.673572 Reference Code - CPU = c.0.65.70
913 13:54:53.677064 uCode Version = 0.0.4.23
914 13:54:53.680205 TXT ACM version = ff.ff.ff.ffff
915 13:54:53.683322 Reference Code - ME = c.0.65.70
916 13:54:53.686819 MEBx version = 0.0.0.0
917 13:54:53.690080 ME Firmware Version = Lite SKU
918 13:54:53.693592 Reference Code - PCH = c.0.65.70
919 13:54:53.696768 PCH-CRID Status = Disabled
920 13:54:53.700190 PCH-CRID Original Value = ff.ff.ff.ffff
921 13:54:53.703401 PCH-CRID New Value = ff.ff.ff.ffff
922 13:54:53.706741 OPROM - RST - RAID = ff.ff.ff.ffff
923 13:54:53.710468 PCH Hsio Version = 4.0.0.0
924 13:54:53.713652 Reference Code - SA - System Agent = c.0.65.70
925 13:54:53.717112 Reference Code - MRC = 0.0.3.80
926 13:54:53.720070 SA - PCIe Version = c.0.65.70
927 13:54:53.723693 SA-CRID Status = Disabled
928 13:54:53.727019 SA-CRID Original Value = 0.0.0.4
929 13:54:53.730258 SA-CRID New Value = 0.0.0.4
930 13:54:53.733389 OPROM - VBIOS = ff.ff.ff.ffff
931 13:54:53.736648 IO Manageability Engine FW Version = 24.0.4.0
932 13:54:53.740487 PHY Build Version = 0.0.0.2016
933 13:54:53.743305 Thunderbolt(TM) FW Version = 0.0.0.0
934 13:54:53.750540 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
935 13:54:53.756599 BS: BS_DEV_INIT_CHIPS run times (exec / console): 495 / 507 ms
936 13:54:53.756720 Enumerating buses...
937 13:54:53.763456 Show all devs... Before device enumeration.
938 13:54:53.766766 Root Device: enabled 1
939 13:54:53.766886 CPU_CLUSTER: 0: enabled 1
940 13:54:53.770230 DOMAIN: 0000: enabled 1
941 13:54:53.773438 GPIO: 0: enabled 1
942 13:54:53.773546 PCI: 00:00.0: enabled 1
943 13:54:53.776651 PCI: 00:01.0: enabled 0
944 13:54:53.780410 PCI: 00:01.1: enabled 0
945 13:54:53.783845 PCI: 00:02.0: enabled 1
946 13:54:53.783958 PCI: 00:04.0: enabled 1
947 13:54:53.787112 PCI: 00:05.0: enabled 0
948 13:54:53.789985 PCI: 00:06.0: enabled 1
949 13:54:53.790071 PCI: 00:06.2: enabled 0
950 13:54:53.793440 PCI: 00:07.0: enabled 0
951 13:54:53.796676 PCI: 00:07.1: enabled 0
952 13:54:53.800171 PCI: 00:07.2: enabled 0
953 13:54:53.800294 PCI: 00:07.3: enabled 0
954 13:54:53.803301 PCI: 00:08.0: enabled 0
955 13:54:53.806562 PCI: 00:09.0: enabled 0
956 13:54:53.810508 PCI: 00:0a.0: enabled 1
957 13:54:53.810596 PCI: 00:0d.0: enabled 1
958 13:54:53.813657 PCI: 00:0d.1: enabled 0
959 13:54:53.816719 PCI: 00:0d.2: enabled 0
960 13:54:53.820322 PCI: 00:0d.3: enabled 0
961 13:54:53.820448 PCI: 00:0e.0: enabled 0
962 13:54:53.823568 PCI: 00:10.0: enabled 0
963 13:54:53.826576 PCI: 00:10.1: enabled 0
964 13:54:53.826652 PCI: 00:10.6: enabled 0
965 13:54:53.830573 PCI: 00:10.7: enabled 0
966 13:54:53.833466 PCI: 00:12.0: enabled 0
967 13:54:53.836855 PCI: 00:12.6: enabled 0
968 13:54:53.836967 PCI: 00:12.7: enabled 0
969 13:54:53.840044 PCI: 00:13.0: enabled 0
970 13:54:53.843457 PCI: 00:14.0: enabled 1
971 13:54:53.847006 PCI: 00:14.1: enabled 0
972 13:54:53.847138 PCI: 00:14.2: enabled 1
973 13:54:53.850209 PCI: 00:14.3: enabled 1
974 13:54:53.853527 PCI: 00:15.0: enabled 1
975 13:54:53.857070 PCI: 00:15.1: enabled 1
976 13:54:53.857196 PCI: 00:15.2: enabled 0
977 13:54:53.859967 PCI: 00:15.3: enabled 1
978 13:54:53.863555 PCI: 00:16.0: enabled 1
979 13:54:53.863686 PCI: 00:16.1: enabled 0
980 13:54:53.866981 PCI: 00:16.2: enabled 0
981 13:54:53.869996 PCI: 00:16.3: enabled 0
982 13:54:53.873734 PCI: 00:16.4: enabled 0
983 13:54:53.873860 PCI: 00:16.5: enabled 0
984 13:54:53.877006 PCI: 00:17.0: enabled 1
985 13:54:53.880176 PCI: 00:19.0: enabled 0
986 13:54:53.883263 PCI: 00:19.1: enabled 1
987 13:54:53.883371 PCI: 00:19.2: enabled 0
988 13:54:53.886957 PCI: 00:1a.0: enabled 0
989 13:54:53.890443 PCI: 00:1c.0: enabled 0
990 13:54:53.893247 PCI: 00:1c.1: enabled 0
991 13:54:53.893332 PCI: 00:1c.2: enabled 0
992 13:54:53.897050 PCI: 00:1c.3: enabled 0
993 13:54:53.900476 PCI: 00:1c.4: enabled 0
994 13:54:53.903533 PCI: 00:1c.5: enabled 0
995 13:54:53.903619 PCI: 00:1c.6: enabled 0
996 13:54:53.906609 PCI: 00:1c.7: enabled 0
997 13:54:53.909942 PCI: 00:1d.0: enabled 0
998 13:54:53.910030 PCI: 00:1d.1: enabled 0
999 13:54:53.913609 PCI: 00:1d.2: enabled 0
1000 13:54:53.916720 PCI: 00:1d.3: enabled 0
1001 13:54:53.920130 PCI: 00:1e.0: enabled 1
1002 13:54:53.920215 PCI: 00:1e.1: enabled 0
1003 13:54:53.923490 PCI: 00:1e.2: enabled 0
1004 13:54:53.926783 PCI: 00:1e.3: enabled 1
1005 13:54:53.930117 PCI: 00:1f.0: enabled 1
1006 13:54:53.930202 PCI: 00:1f.1: enabled 0
1007 13:54:53.933208 PCI: 00:1f.2: enabled 1
1008 13:54:53.936925 PCI: 00:1f.3: enabled 1
1009 13:54:53.939835 PCI: 00:1f.4: enabled 0
1010 13:54:53.939962 PCI: 00:1f.5: enabled 1
1011 13:54:53.943242 PCI: 00:1f.6: enabled 0
1012 13:54:53.946498 PCI: 00:1f.7: enabled 0
1013 13:54:53.946623 GENERIC: 0.0: enabled 1
1014 13:54:53.950269 GENERIC: 0.0: enabled 1
1015 13:54:53.953404 GENERIC: 1.0: enabled 1
1016 13:54:53.956824 GENERIC: 0.0: enabled 1
1017 13:54:53.956948 GENERIC: 1.0: enabled 1
1018 13:54:53.959940 USB0 port 0: enabled 1
1019 13:54:53.963315 USB0 port 0: enabled 1
1020 13:54:53.966800 GENERIC: 0.0: enabled 1
1021 13:54:53.966918 I2C: 00:1a: enabled 1
1022 13:54:53.970218 I2C: 00:31: enabled 1
1023 13:54:53.973260 I2C: 00:32: enabled 1
1024 13:54:53.973382 I2C: 00:50: enabled 1
1025 13:54:53.976665 I2C: 00:10: enabled 1
1026 13:54:53.980074 I2C: 00:15: enabled 1
1027 13:54:53.980198 I2C: 00:2c: enabled 1
1028 13:54:53.983288 GENERIC: 0.0: enabled 1
1029 13:54:53.986628 SPI: 00: enabled 1
1030 13:54:53.986750 PNP: 0c09.0: enabled 1
1031 13:54:53.990204 GENERIC: 0.0: enabled 1
1032 13:54:53.993362 USB3 port 0: enabled 1
1033 13:54:53.993488 USB3 port 1: enabled 0
1034 13:54:53.996872 USB3 port 2: enabled 1
1035 13:54:54.000055 USB3 port 3: enabled 0
1036 13:54:54.003335 USB2 port 0: enabled 1
1037 13:54:54.003460 USB2 port 1: enabled 0
1038 13:54:54.006508 USB2 port 2: enabled 1
1039 13:54:54.010210 USB2 port 3: enabled 0
1040 13:54:54.010318 USB2 port 4: enabled 0
1041 13:54:54.013287 USB2 port 5: enabled 1
1042 13:54:54.016519 USB2 port 6: enabled 0
1043 13:54:54.016638 USB2 port 7: enabled 0
1044 13:54:54.020004 USB2 port 8: enabled 1
1045 13:54:54.023134 USB2 port 9: enabled 1
1046 13:54:54.026653 USB3 port 0: enabled 1
1047 13:54:54.026761 USB3 port 1: enabled 0
1048 13:54:54.029852 USB3 port 2: enabled 0
1049 13:54:54.033074 USB3 port 3: enabled 0
1050 13:54:54.033180 GENERIC: 0.0: enabled 1
1051 13:54:54.037051 GENERIC: 1.0: enabled 1
1052 13:54:54.040145 APIC: 00: enabled 1
1053 13:54:54.040262 APIC: 16: enabled 1
1054 13:54:54.043190 APIC: 10: enabled 1
1055 13:54:54.046258 APIC: 12: enabled 1
1056 13:54:54.046372 APIC: 14: enabled 1
1057 13:54:54.050091 APIC: 09: enabled 1
1058 13:54:54.050173 APIC: 01: enabled 1
1059 13:54:54.053157 APIC: 08: enabled 1
1060 13:54:54.056412 Compare with tree...
1061 13:54:54.056516 Root Device: enabled 1
1062 13:54:54.059720 CPU_CLUSTER: 0: enabled 1
1063 13:54:54.062929 APIC: 00: enabled 1
1064 13:54:54.066847 APIC: 16: enabled 1
1065 13:54:54.066962 APIC: 10: enabled 1
1066 13:54:54.069970 APIC: 12: enabled 1
1067 13:54:54.073001 APIC: 14: enabled 1
1068 13:54:54.073107 APIC: 09: enabled 1
1069 13:54:54.076361 APIC: 01: enabled 1
1070 13:54:54.079776 APIC: 08: enabled 1
1071 13:54:54.079883 DOMAIN: 0000: enabled 1
1072 13:54:54.082832 GPIO: 0: enabled 1
1073 13:54:54.086391 PCI: 00:00.0: enabled 1
1074 13:54:54.089650 PCI: 00:01.0: enabled 0
1075 13:54:54.089757 PCI: 00:01.1: enabled 0
1076 13:54:54.092863 PCI: 00:02.0: enabled 1
1077 13:54:54.096462 PCI: 00:04.0: enabled 1
1078 13:54:54.099935 GENERIC: 0.0: enabled 1
1079 13:54:54.103020 PCI: 00:05.0: enabled 0
1080 13:54:54.103127 PCI: 00:06.0: enabled 1
1081 13:54:54.106265 PCI: 00:06.2: enabled 0
1082 13:54:54.110014 PCI: 00:08.0: enabled 0
1083 13:54:54.112888 PCI: 00:09.0: enabled 0
1084 13:54:54.116812 PCI: 00:0a.0: enabled 1
1085 13:54:54.116941 PCI: 00:0d.0: enabled 1
1086 13:54:54.119948 USB0 port 0: enabled 1
1087 13:54:54.123166 USB3 port 0: enabled 1
1088 13:54:54.126434 USB3 port 1: enabled 0
1089 13:54:54.130140 USB3 port 2: enabled 1
1090 13:54:54.130265 USB3 port 3: enabled 0
1091 13:54:54.133150 PCI: 00:0d.1: enabled 0
1092 13:54:54.136584 PCI: 00:0d.2: enabled 0
1093 13:54:54.139538 PCI: 00:0d.3: enabled 0
1094 13:54:54.143487 PCI: 00:0e.0: enabled 0
1095 13:54:54.143564 PCI: 00:10.0: enabled 0
1096 13:54:54.146520 PCI: 00:10.1: enabled 0
1097 13:54:54.149633 PCI: 00:10.6: enabled 0
1098 13:54:54.153347 PCI: 00:10.7: enabled 0
1099 13:54:54.156704 PCI: 00:12.0: enabled 0
1100 13:54:54.156802 PCI: 00:12.6: enabled 0
1101 13:54:54.159850 PCI: 00:12.7: enabled 0
1102 13:54:54.163096 PCI: 00:13.0: enabled 0
1103 13:54:54.166774 PCI: 00:14.0: enabled 1
1104 13:54:54.170074 USB0 port 0: enabled 1
1105 13:54:54.170145 USB2 port 0: enabled 1
1106 13:54:54.173371 USB2 port 1: enabled 0
1107 13:54:54.176559 USB2 port 2: enabled 1
1108 13:54:54.179693 USB2 port 3: enabled 0
1109 13:54:54.183339 USB2 port 4: enabled 0
1110 13:54:54.183445 USB2 port 5: enabled 1
1111 13:54:54.186570 USB2 port 6: enabled 0
1112 13:54:54.189651 USB2 port 7: enabled 0
1113 13:54:54.193552 USB2 port 8: enabled 1
1114 13:54:54.196594 USB2 port 9: enabled 1
1115 13:54:54.199644 USB3 port 0: enabled 1
1116 13:54:54.199766 USB3 port 1: enabled 0
1117 13:54:54.203030 USB3 port 2: enabled 0
1118 13:54:54.206292 USB3 port 3: enabled 0
1119 13:54:54.210037 PCI: 00:14.1: enabled 0
1120 13:54:54.213167 PCI: 00:14.2: enabled 1
1121 13:54:54.213242 PCI: 00:14.3: enabled 1
1122 13:54:54.216340 GENERIC: 0.0: enabled 1
1123 13:54:54.219479 PCI: 00:15.0: enabled 1
1124 13:54:54.223191 I2C: 00:1a: enabled 1
1125 13:54:54.226417 I2C: 00:31: enabled 1
1126 13:54:54.226523 I2C: 00:32: enabled 1
1127 13:54:54.229598 PCI: 00:15.1: enabled 1
1128 13:54:54.233501 I2C: 00:50: enabled 1
1129 13:54:54.236459 PCI: 00:15.2: enabled 0
1130 13:54:54.236543 PCI: 00:15.3: enabled 1
1131 13:54:54.239872 I2C: 00:10: enabled 1
1132 13:54:54.242976 PCI: 00:16.0: enabled 1
1133 13:54:54.246259 PCI: 00:16.1: enabled 0
1134 13:54:54.249586 PCI: 00:16.2: enabled 0
1135 13:54:54.249686 PCI: 00:16.3: enabled 0
1136 13:54:54.253181 PCI: 00:16.4: enabled 0
1137 13:54:54.256339 PCI: 00:16.5: enabled 0
1138 13:54:54.259692 PCI: 00:17.0: enabled 1
1139 13:54:54.263385 PCI: 00:19.0: enabled 0
1140 13:54:54.263470 PCI: 00:19.1: enabled 1
1141 13:54:54.266375 I2C: 00:15: enabled 1
1142 13:54:54.269551 I2C: 00:2c: enabled 1
1143 13:54:54.272831 PCI: 00:19.2: enabled 0
1144 13:54:54.272921 PCI: 00:1a.0: enabled 0
1145 13:54:54.276521 PCI: 00:1e.0: enabled 1
1146 13:54:54.279886 PCI: 00:1e.1: enabled 0
1147 13:54:54.283016 PCI: 00:1e.2: enabled 0
1148 13:54:54.286191 PCI: 00:1e.3: enabled 1
1149 13:54:54.286333 SPI: 00: enabled 1
1150 13:54:54.289868 PCI: 00:1f.0: enabled 1
1151 13:54:54.292958 PNP: 0c09.0: enabled 1
1152 13:54:54.296204 PCI: 00:1f.1: enabled 0
1153 13:54:54.296330 PCI: 00:1f.2: enabled 1
1154 13:54:54.299441 GENERIC: 0.0: enabled 1
1155 13:54:54.303022 GENERIC: 0.0: enabled 1
1156 13:54:54.306465 GENERIC: 1.0: enabled 1
1157 13:54:54.309491 PCI: 00:1f.3: enabled 1
1158 13:54:54.312644 PCI: 00:1f.4: enabled 0
1159 13:54:54.312763 PCI: 00:1f.5: enabled 1
1160 13:54:54.316545 PCI: 00:1f.6: enabled 0
1161 13:54:54.319380 PCI: 00:1f.7: enabled 0
1162 13:54:54.323134 Root Device scanning...
1163 13:54:54.326494 scan_static_bus for Root Device
1164 13:54:54.326613 CPU_CLUSTER: 0 enabled
1165 13:54:54.329799 DOMAIN: 0000 enabled
1166 13:54:54.332876 DOMAIN: 0000 scanning...
1167 13:54:54.336254 PCI: pci_scan_bus for bus 00
1168 13:54:54.339246 PCI: 00:00.0 [8086/0000] ops
1169 13:54:54.343111 PCI: 00:00.0 [8086/4609] enabled
1170 13:54:54.346234 PCI: 00:02.0 [8086/0000] bus ops
1171 13:54:54.349601 PCI: 00:02.0 [8086/46b3] enabled
1172 13:54:54.353185 PCI: 00:04.0 [8086/0000] bus ops
1173 13:54:54.356542 PCI: 00:04.0 [8086/461d] enabled
1174 13:54:54.359612 PCI: 00:06.0 [8086/0000] bus ops
1175 13:54:54.362641 PCI: 00:06.0 [8086/464d] enabled
1176 13:54:54.366606 PCI: 00:08.0 [8086/464f] disabled
1177 13:54:54.369603 PCI: 00:0a.0 [8086/467d] enabled
1178 13:54:54.372655 PCI: 00:0d.0 [8086/0000] bus ops
1179 13:54:54.376355 PCI: 00:0d.0 [8086/461e] enabled
1180 13:54:54.379585 PCI: 00:14.0 [8086/0000] bus ops
1181 13:54:54.382804 PCI: 00:14.0 [8086/51ed] enabled
1182 13:54:54.386281 PCI: 00:14.2 [8086/51ef] enabled
1183 13:54:54.389597 PCI: 00:14.3 [8086/0000] bus ops
1184 13:54:54.393029 PCI: 00:14.3 [8086/51f0] enabled
1185 13:54:54.396472 PCI: 00:15.0 [8086/0000] bus ops
1186 13:54:54.399624 PCI: 00:15.0 [8086/51e8] enabled
1187 13:54:54.403233 PCI: 00:15.1 [8086/0000] bus ops
1188 13:54:54.406341 PCI: 00:15.1 [8086/51e9] enabled
1189 13:54:54.410136 PCI: 00:15.2 [8086/0000] bus ops
1190 13:54:54.413330 PCI: 00:15.2 [8086/51ea] disabled
1191 13:54:54.416577 PCI: 00:15.3 [8086/0000] bus ops
1192 13:54:54.420162 PCI: 00:15.3 [8086/51eb] enabled
1193 13:54:54.423367 PCI: 00:16.0 [8086/0000] ops
1194 13:54:54.427001 PCI: 00:16.0 [8086/51e0] enabled
1195 13:54:54.430091 PCI: Static device PCI: 00:17.0 not found, disabling it.
1196 13:54:54.433407 PCI: 00:19.0 [8086/0000] bus ops
1197 13:54:54.436720 PCI: 00:19.0 [8086/51c5] disabled
1198 13:54:54.440082 PCI: 00:19.1 [8086/0000] bus ops
1199 13:54:54.443636 PCI: 00:19.1 [8086/51c6] enabled
1200 13:54:54.446723 PCI: 00:1e.0 [8086/0000] ops
1201 13:54:54.450477 PCI: 00:1e.0 [8086/51a8] enabled
1202 13:54:54.453462 PCI: 00:1e.3 [8086/0000] bus ops
1203 13:54:54.456904 PCI: 00:1e.3 [8086/51ab] enabled
1204 13:54:54.459997 PCI: 00:1f.0 [8086/0000] bus ops
1205 13:54:54.463597 PCI: 00:1f.0 [8086/5182] enabled
1206 13:54:54.467404 RTC Init
1207 13:54:54.470684 Set power on after power failure.
1208 13:54:54.473835 Disabling Deep S3
1209 13:54:54.473913 Disabling Deep S3
1210 13:54:54.477377 Disabling Deep S4
1211 13:54:54.477489 Disabling Deep S4
1212 13:54:54.480589 Disabling Deep S5
1213 13:54:54.480692 Disabling Deep S5
1214 13:54:54.484100 PCI: 00:1f.2 [0000/0000] hidden
1215 13:54:54.487143 PCI: 00:1f.3 [8086/0000] bus ops
1216 13:54:54.490676 PCI: 00:1f.3 [8086/51c8] enabled
1217 13:54:54.493778 PCI: 00:1f.5 [8086/0000] bus ops
1218 13:54:54.497018 PCI: 00:1f.5 [8086/51a4] enabled
1219 13:54:54.500599 GPIO: 0 enabled
1220 13:54:54.503727 PCI: Leftover static devices:
1221 13:54:54.503812 PCI: 00:01.0
1222 13:54:54.506962 PCI: 00:01.1
1223 13:54:54.507047 PCI: 00:05.0
1224 13:54:54.507114 PCI: 00:06.2
1225 13:54:54.510512 PCI: 00:09.0
1226 13:54:54.510598 PCI: 00:0d.1
1227 13:54:54.514192 PCI: 00:0d.2
1228 13:54:54.514278 PCI: 00:0d.3
1229 13:54:54.514344 PCI: 00:0e.0
1230 13:54:54.517272 PCI: 00:10.0
1231 13:54:54.517358 PCI: 00:10.1
1232 13:54:54.520551 PCI: 00:10.6
1233 13:54:54.520665 PCI: 00:10.7
1234 13:54:54.520768 PCI: 00:12.0
1235 13:54:54.524032 PCI: 00:12.6
1236 13:54:54.524120 PCI: 00:12.7
1237 13:54:54.527139 PCI: 00:13.0
1238 13:54:54.527249 PCI: 00:14.1
1239 13:54:54.530672 PCI: 00:16.1
1240 13:54:54.530788 PCI: 00:16.2
1241 13:54:54.530898 PCI: 00:16.3
1242 13:54:54.534040 PCI: 00:16.4
1243 13:54:54.534168 PCI: 00:16.5
1244 13:54:54.537291 PCI: 00:17.0
1245 13:54:54.537428 PCI: 00:19.2
1246 13:54:54.537539 PCI: 00:1a.0
1247 13:54:54.540346 PCI: 00:1e.1
1248 13:54:54.540467 PCI: 00:1e.2
1249 13:54:54.543760 PCI: 00:1f.1
1250 13:54:54.543881 PCI: 00:1f.4
1251 13:54:54.543977 PCI: 00:1f.6
1252 13:54:54.547211 PCI: 00:1f.7
1253 13:54:54.550995 PCI: Check your devicetree.cb.
1254 13:54:54.554052 PCI: 00:02.0 scanning...
1255 13:54:54.557171 scan_generic_bus for PCI: 00:02.0
1256 13:54:54.561022 scan_generic_bus for PCI: 00:02.0 done
1257 13:54:54.564334 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1258 13:54:54.567225 PCI: 00:04.0 scanning...
1259 13:54:54.570914 scan_generic_bus for PCI: 00:04.0
1260 13:54:54.573802 GENERIC: 0.0 enabled
1261 13:54:54.577465 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1262 13:54:54.584205 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1263 13:54:54.587355 PCI: 00:06.0 scanning...
1264 13:54:54.590594 do_pci_scan_bridge for PCI: 00:06.0
1265 13:54:54.593850 PCI: pci_scan_bus for bus 01
1266 13:54:54.597587 PCI: 01:00.0 [15b7/5009] enabled
1267 13:54:54.600765 Enabling Common Clock Configuration
1268 13:54:54.603983 L1 Sub-State supported from root port 6
1269 13:54:54.607527 L1 Sub-State Support = 0x5
1270 13:54:54.610841 CommonModeRestoreTime = 0x6e
1271 13:54:54.614002 Power On Value = 0x5, Power On Scale = 0x2
1272 13:54:54.614120 ASPM: Enabled L1
1273 13:54:54.620479 PCIe: Max_Payload_Size adjusted to 256
1274 13:54:54.620593 PCI: 01:00.0: Enabled LTR
1275 13:54:54.627473 PCI: 01:00.0: Programmed LTR max latencies
1276 13:54:54.630422 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1277 13:54:54.633647 PCI: 00:0d.0 scanning...
1278 13:54:54.637329 scan_static_bus for PCI: 00:0d.0
1279 13:54:54.640628 USB0 port 0 enabled
1280 13:54:54.640733 USB0 port 0 scanning...
1281 13:54:54.643808 scan_static_bus for USB0 port 0
1282 13:54:54.647552 USB3 port 0 enabled
1283 13:54:54.650742 USB3 port 1 disabled
1284 13:54:54.650848 USB3 port 2 enabled
1285 13:54:54.653778 USB3 port 3 disabled
1286 13:54:54.657240 USB3 port 0 scanning...
1287 13:54:54.657325 scan_static_bus for USB3 port 0
1288 13:54:54.663814 scan_static_bus for USB3 port 0 done
1289 13:54:54.667568 scan_bus: bus USB3 port 0 finished in 6 msecs
1290 13:54:54.670686 USB3 port 2 scanning...
1291 13:54:54.674145 scan_static_bus for USB3 port 2
1292 13:54:54.677017 scan_static_bus for USB3 port 2 done
1293 13:54:54.680847 scan_bus: bus USB3 port 2 finished in 6 msecs
1294 13:54:54.683960 scan_static_bus for USB0 port 0 done
1295 13:54:54.690483 scan_bus: bus USB0 port 0 finished in 43 msecs
1296 13:54:54.693864 scan_static_bus for PCI: 00:0d.0 done
1297 13:54:54.697419 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1298 13:54:54.700632 PCI: 00:14.0 scanning...
1299 13:54:54.703870 scan_static_bus for PCI: 00:14.0
1300 13:54:54.707230 USB0 port 0 enabled
1301 13:54:54.707313 USB0 port 0 scanning...
1302 13:54:54.710625 scan_static_bus for USB0 port 0
1303 13:54:54.713935 USB2 port 0 enabled
1304 13:54:54.717410 USB2 port 1 disabled
1305 13:54:54.717483 USB2 port 2 enabled
1306 13:54:54.720648 USB2 port 3 disabled
1307 13:54:54.720746 USB2 port 4 disabled
1308 13:54:54.723850 USB2 port 5 enabled
1309 13:54:54.727142 USB2 port 6 disabled
1310 13:54:54.727227 USB2 port 7 disabled
1311 13:54:54.730354 USB2 port 8 enabled
1312 13:54:54.734025 USB2 port 9 enabled
1313 13:54:54.734110 USB3 port 0 enabled
1314 13:54:54.736973 USB3 port 1 disabled
1315 13:54:54.740281 USB3 port 2 disabled
1316 13:54:54.740393 USB3 port 3 disabled
1317 13:54:54.743932 USB2 port 0 scanning...
1318 13:54:54.747151 scan_static_bus for USB2 port 0
1319 13:54:54.750356 scan_static_bus for USB2 port 0 done
1320 13:54:54.753973 scan_bus: bus USB2 port 0 finished in 6 msecs
1321 13:54:54.756977 USB2 port 2 scanning...
1322 13:54:54.760608 scan_static_bus for USB2 port 2
1323 13:54:54.763734 scan_static_bus for USB2 port 2 done
1324 13:54:54.770738 scan_bus: bus USB2 port 2 finished in 6 msecs
1325 13:54:54.770825 USB2 port 5 scanning...
1326 13:54:54.774027 scan_static_bus for USB2 port 5
1327 13:54:54.776998 scan_static_bus for USB2 port 5 done
1328 13:54:54.784007 scan_bus: bus USB2 port 5 finished in 6 msecs
1329 13:54:54.784095 USB2 port 8 scanning...
1330 13:54:54.787213 scan_static_bus for USB2 port 8
1331 13:54:54.794242 scan_static_bus for USB2 port 8 done
1332 13:54:54.797281 scan_bus: bus USB2 port 8 finished in 6 msecs
1333 13:54:54.800352 USB2 port 9 scanning...
1334 13:54:54.803663 scan_static_bus for USB2 port 9
1335 13:54:54.807006 scan_static_bus for USB2 port 9 done
1336 13:54:54.810952 scan_bus: bus USB2 port 9 finished in 6 msecs
1337 13:54:54.814002 USB3 port 0 scanning...
1338 13:54:54.817105 scan_static_bus for USB3 port 0
1339 13:54:54.820250 scan_static_bus for USB3 port 0 done
1340 13:54:54.824009 scan_bus: bus USB3 port 0 finished in 6 msecs
1341 13:54:54.826945 scan_static_bus for USB0 port 0 done
1342 13:54:54.833771 scan_bus: bus USB0 port 0 finished in 120 msecs
1343 13:54:54.836908 scan_static_bus for PCI: 00:14.0 done
1344 13:54:54.843580 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1345 13:54:54.843697 PCI: 00:14.3 scanning...
1346 13:54:54.846996 scan_static_bus for PCI: 00:14.3
1347 13:54:54.850443 GENERIC: 0.0 enabled
1348 13:54:54.853663 scan_static_bus for PCI: 00:14.3 done
1349 13:54:54.856885 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1350 13:54:54.860373 PCI: 00:15.0 scanning...
1351 13:54:54.863430 scan_static_bus for PCI: 00:15.0
1352 13:54:54.867145 I2C: 00:1a enabled
1353 13:54:54.867233 I2C: 00:31 enabled
1354 13:54:54.870392 I2C: 00:32 enabled
1355 13:54:54.873646 scan_static_bus for PCI: 00:15.0 done
1356 13:54:54.880186 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1357 13:54:54.880272 PCI: 00:15.1 scanning...
1358 13:54:54.883742 scan_static_bus for PCI: 00:15.1
1359 13:54:54.886936 I2C: 00:50 enabled
1360 13:54:54.890212 scan_static_bus for PCI: 00:15.1 done
1361 13:54:54.893328 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1362 13:54:54.896813 PCI: 00:15.3 scanning...
1363 13:54:54.900168 scan_static_bus for PCI: 00:15.3
1364 13:54:54.903402 I2C: 00:10 enabled
1365 13:54:54.906993 scan_static_bus for PCI: 00:15.3 done
1366 13:54:54.910179 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1367 13:54:54.913308 PCI: 00:19.1 scanning...
1368 13:54:54.916989 scan_static_bus for PCI: 00:19.1
1369 13:54:54.920192 I2C: 00:15 enabled
1370 13:54:54.920261 I2C: 00:2c enabled
1371 13:54:54.923918 scan_static_bus for PCI: 00:19.1 done
1372 13:54:54.929988 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1373 13:54:54.933855 PCI: 00:1e.3 scanning...
1374 13:54:54.936942 scan_generic_bus for PCI: 00:1e.3
1375 13:54:54.937047 SPI: 00 enabled
1376 13:54:54.943785 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1377 13:54:54.946893 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1378 13:54:54.950314 PCI: 00:1f.0 scanning...
1379 13:54:54.953713 scan_static_bus for PCI: 00:1f.0
1380 13:54:54.956801 PNP: 0c09.0 enabled
1381 13:54:54.960271 PNP: 0c09.0 scanning...
1382 13:54:54.960399 scan_static_bus for PNP: 0c09.0
1383 13:54:54.966766 scan_static_bus for PNP: 0c09.0 done
1384 13:54:54.970351 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1385 13:54:54.973623 scan_static_bus for PCI: 00:1f.0 done
1386 13:54:54.980437 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1387 13:54:54.980549 PCI: 00:1f.2 scanning...
1388 13:54:54.983455 scan_static_bus for PCI: 00:1f.2
1389 13:54:54.987032 GENERIC: 0.0 enabled
1390 13:54:54.990279 GENERIC: 0.0 scanning...
1391 13:54:54.993456 scan_static_bus for GENERIC: 0.0
1392 13:54:54.993561 GENERIC: 0.0 enabled
1393 13:54:54.997280 GENERIC: 1.0 enabled
1394 13:54:55.000342 scan_static_bus for GENERIC: 0.0 done
1395 13:54:55.006756 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1396 13:54:55.010008 scan_static_bus for PCI: 00:1f.2 done
1397 13:54:55.013485 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1398 13:54:55.017183 PCI: 00:1f.3 scanning...
1399 13:54:55.020152 scan_static_bus for PCI: 00:1f.3
1400 13:54:55.023352 scan_static_bus for PCI: 00:1f.3 done
1401 13:54:55.030053 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1402 13:54:55.030155 PCI: 00:1f.5 scanning...
1403 13:54:55.033273 scan_generic_bus for PCI: 00:1f.5
1404 13:54:55.036956 scan_generic_bus for PCI: 00:1f.5 done
1405 13:54:55.043269 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1406 13:54:55.046975 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1407 13:54:55.049968 scan_static_bus for Root Device done
1408 13:54:55.056890 scan_bus: bus Root Device finished in 729 msecs
1409 13:54:55.056980 done
1410 13:54:55.063598 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1411 13:54:55.070118 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1412 13:54:55.073419 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1413 13:54:55.080046 SPI flash protection: WPSW=0 SRP0=0
1414 13:54:55.083691 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1415 13:54:55.090105 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1416 13:54:55.093516 found VGA at PCI: 00:02.0
1417 13:54:55.097150 Setting up VGA for PCI: 00:02.0
1418 13:54:55.100304 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1419 13:54:55.104167 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1420 13:54:55.107371 Allocating resources...
1421 13:54:55.110503 Reading resources...
1422 13:54:55.113991 Root Device read_resources bus 0 link: 0
1423 13:54:55.117142 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1424 13:54:55.123947 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1425 13:54:55.127166 DOMAIN: 0000 read_resources bus 0 link: 0
1426 13:54:55.133852 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1427 13:54:55.140581 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1428 13:54:55.146888 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1429 13:54:55.153771 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1430 13:54:55.157016 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1431 13:54:55.163688 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1432 13:54:55.170376 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1433 13:54:55.176802 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1434 13:54:55.183651 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1435 13:54:55.190101 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1436 13:54:55.196720 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1437 13:54:55.203122 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1438 13:54:55.210136 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1439 13:54:55.216484 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1440 13:54:55.223506 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1441 13:54:55.229833 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1442 13:54:55.236573 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1443 13:54:55.239799 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1444 13:54:55.246691 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1445 13:54:55.253116 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1446 13:54:55.260385 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1447 13:54:55.263361 PCI: 00:04.0 read_resources bus 1 link: 0
1448 13:54:55.269975 PCI: 00:04.0 read_resources bus 1 link: 0 done
1449 13:54:55.273110 PCI: 00:06.0 read_resources bus 1 link: 0
1450 13:54:55.276284 PCI: 00:06.0 read_resources bus 1 link: 0 done
1451 13:54:55.282937 PCI: 00:0d.0 read_resources bus 0 link: 0
1452 13:54:55.286779 USB0 port 0 read_resources bus 0 link: 0
1453 13:54:55.289974 USB0 port 0 read_resources bus 0 link: 0 done
1454 13:54:55.296305 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1455 13:54:55.299784 PCI: 00:14.0 read_resources bus 0 link: 0
1456 13:54:55.303356 USB0 port 0 read_resources bus 0 link: 0
1457 13:54:55.310526 USB0 port 0 read_resources bus 0 link: 0 done
1458 13:54:55.313511 PCI: 00:14.0 read_resources bus 0 link: 0 done
1459 13:54:55.316721 PCI: 00:14.3 read_resources bus 0 link: 0
1460 13:54:55.323200 PCI: 00:14.3 read_resources bus 0 link: 0 done
1461 13:54:55.327030 PCI: 00:15.0 read_resources bus 0 link: 0
1462 13:54:55.329986 PCI: 00:15.0 read_resources bus 0 link: 0 done
1463 13:54:55.336829 PCI: 00:15.1 read_resources bus 0 link: 0
1464 13:54:55.339882 PCI: 00:15.1 read_resources bus 0 link: 0 done
1465 13:54:55.343647 PCI: 00:15.3 read_resources bus 0 link: 0
1466 13:54:55.349998 PCI: 00:15.3 read_resources bus 0 link: 0 done
1467 13:54:55.353726 PCI: 00:19.1 read_resources bus 0 link: 0
1468 13:54:55.356903 PCI: 00:19.1 read_resources bus 0 link: 0 done
1469 13:54:55.363596 PCI: 00:1e.3 read_resources bus 2 link: 0
1470 13:54:55.367051 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1471 13:54:55.370348 PCI: 00:1f.0 read_resources bus 0 link: 0
1472 13:54:55.376838 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1473 13:54:55.380024 PCI: 00:1f.2 read_resources bus 0 link: 0
1474 13:54:55.383774 GENERIC: 0.0 read_resources bus 0 link: 0
1475 13:54:55.390235 GENERIC: 0.0 read_resources bus 0 link: 0 done
1476 13:54:55.393787 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1477 13:54:55.400396 DOMAIN: 0000 read_resources bus 0 link: 0 done
1478 13:54:55.403763 Root Device read_resources bus 0 link: 0 done
1479 13:54:55.406756 Done reading resources.
1480 13:54:55.413698 Show resources in subtree (Root Device)...After reading.
1481 13:54:55.417085 Root Device child on link 0 CPU_CLUSTER: 0
1482 13:54:55.420363 CPU_CLUSTER: 0 child on link 0 APIC: 00
1483 13:54:55.423933 APIC: 00
1484 13:54:55.424005 APIC: 16
1485 13:54:55.424069 APIC: 10
1486 13:54:55.427095 APIC: 12
1487 13:54:55.427168 APIC: 14
1488 13:54:55.427233 APIC: 09
1489 13:54:55.430243 APIC: 01
1490 13:54:55.430312 APIC: 08
1491 13:54:55.433563 DOMAIN: 0000 child on link 0 GPIO: 0
1492 13:54:55.443575 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1493 13:54:55.453539 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1494 13:54:55.453626 GPIO: 0
1495 13:54:55.456868 PCI: 00:00.0
1496 13:54:55.467388 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1497 13:54:55.477214 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1498 13:54:55.483996 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1499 13:54:55.493685 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1500 13:54:55.503681 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1501 13:54:55.513685 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1502 13:54:55.523789 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1503 13:54:55.533911 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1504 13:54:55.540491 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1505 13:54:55.550382 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1506 13:54:55.560300 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1507 13:54:55.570028 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1508 13:54:55.580253 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1509 13:54:55.589858 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1510 13:54:55.596828 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1511 13:54:55.606479 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1512 13:54:55.616672 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1513 13:54:55.626530 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1514 13:54:55.636691 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1515 13:54:55.646861 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1516 13:54:55.656508 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1517 13:54:55.663349 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1518 13:54:55.673443 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1519 13:54:55.683247 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1520 13:54:55.693308 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1521 13:54:55.703601 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1522 13:54:55.713491 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1523 13:54:55.723379 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1524 13:54:55.723503 PCI: 00:02.0
1525 13:54:55.733502 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1526 13:54:55.743148 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1527 13:54:55.753271 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1528 13:54:55.756748 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1529 13:54:55.766479 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1530 13:54:55.770483 GENERIC: 0.0
1531 13:54:55.773322 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1532 13:54:55.783276 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1533 13:54:55.793186 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1534 13:54:55.800437 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1535 13:54:55.803288 PCI: 01:00.0
1536 13:54:55.813337 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1537 13:54:55.823250 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1538 13:54:55.826423 PCI: 00:08.0
1539 13:54:55.826510 PCI: 00:0a.0
1540 13:54:55.836513 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1541 13:54:55.839927 PCI: 00:0d.0 child on link 0 USB0 port 0
1542 13:54:55.849735 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1543 13:54:55.856135 USB0 port 0 child on link 0 USB3 port 0
1544 13:54:55.856258 USB3 port 0
1545 13:54:55.859672 USB3 port 1
1546 13:54:55.859794 USB3 port 2
1547 13:54:55.862987 USB3 port 3
1548 13:54:55.866131 PCI: 00:14.0 child on link 0 USB0 port 0
1549 13:54:55.876639 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1550 13:54:55.879852 USB0 port 0 child on link 0 USB2 port 0
1551 13:54:55.883177 USB2 port 0
1552 13:54:55.886394 USB2 port 1
1553 13:54:55.886506 USB2 port 2
1554 13:54:55.889798 USB2 port 3
1555 13:54:55.889876 USB2 port 4
1556 13:54:55.893081 USB2 port 5
1557 13:54:55.893158 USB2 port 6
1558 13:54:55.896137 USB2 port 7
1559 13:54:55.896208 USB2 port 8
1560 13:54:55.899905 USB2 port 9
1561 13:54:55.900034 USB3 port 0
1562 13:54:55.903112 USB3 port 1
1563 13:54:55.903217 USB3 port 2
1564 13:54:55.906347 USB3 port 3
1565 13:54:55.906458 PCI: 00:14.2
1566 13:54:55.916472 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1567 13:54:55.926330 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1568 13:54:55.933170 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1569 13:54:55.943142 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1570 13:54:55.943257 GENERIC: 0.0
1571 13:54:55.946191 PCI: 00:15.0 child on link 0 I2C: 00:1a
1572 13:54:55.956237 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 13:54:55.959850 I2C: 00:1a
1574 13:54:55.959961 I2C: 00:31
1575 13:54:55.963146 I2C: 00:32
1576 13:54:55.966437 PCI: 00:15.1 child on link 0 I2C: 00:50
1577 13:54:55.976286 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1578 13:54:55.979949 I2C: 00:50
1579 13:54:55.980034 PCI: 00:15.2
1580 13:54:55.983071 PCI: 00:15.3 child on link 0 I2C: 00:10
1581 13:54:55.993091 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1582 13:54:55.996341 I2C: 00:10
1583 13:54:55.996455 PCI: 00:16.0
1584 13:54:56.006277 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1585 13:54:56.009524 PCI: 00:19.0
1586 13:54:56.013190 PCI: 00:19.1 child on link 0 I2C: 00:15
1587 13:54:56.023186 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1588 13:54:56.026432 I2C: 00:15
1589 13:54:56.026519 I2C: 00:2c
1590 13:54:56.029722 PCI: 00:1e.0
1591 13:54:56.039495 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1592 13:54:56.043319 PCI: 00:1e.3 child on link 0 SPI: 00
1593 13:54:56.052876 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1594 13:54:56.052975 SPI: 00
1595 13:54:56.059807 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1596 13:54:56.066338 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1597 13:54:56.069834 PNP: 0c09.0
1598 13:54:56.079715 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1599 13:54:56.083098 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1600 13:54:56.093133 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1601 13:54:56.100043 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1602 13:54:56.106573 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1603 13:54:56.106652 GENERIC: 0.0
1604 13:54:56.109718 GENERIC: 1.0
1605 13:54:56.109795 PCI: 00:1f.3
1606 13:54:56.119441 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1607 13:54:56.132725 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1608 13:54:56.132826 PCI: 00:1f.5
1609 13:54:56.142643 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1610 13:54:56.149632 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1611 13:54:56.156384 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1612 13:54:56.162893 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1613 13:54:56.165960 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1614 13:54:56.172759 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1615 13:54:56.176216 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1616 13:54:56.182985 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1617 13:54:56.189631 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1618 13:54:56.199371 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1619 13:54:56.206189 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1620 13:54:56.212698 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1621 13:54:56.219666 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1622 13:54:56.226146 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1623 13:54:56.233099 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1624 13:54:56.236150 DOMAIN: 0000: Resource ranges:
1625 13:54:56.239497 * Base: 1000, Size: 800, Tag: 100
1626 13:54:56.246183 * Base: 1900, Size: e700, Tag: 100
1627 13:54:56.249678 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1628 13:54:56.256040 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1629 13:54:56.262994 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1630 13:54:56.269778 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1631 13:54:56.279643 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1632 13:54:56.286113 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1633 13:54:56.292899 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1634 13:54:56.303041 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1635 13:54:56.309766 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1636 13:54:56.316421 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1637 13:54:56.326067 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1638 13:54:56.333088 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1639 13:54:56.339286 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1640 13:54:56.349455 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1641 13:54:56.356092 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1642 13:54:56.362973 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1643 13:54:56.372890 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1644 13:54:56.379449 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1645 13:54:56.386399 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1646 13:54:56.393128 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1647 13:54:56.403247 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1648 13:54:56.409468 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1649 13:54:56.416408 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1650 13:54:56.426496 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1651 13:54:56.432863 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1652 13:54:56.439530 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1653 13:54:56.449702 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1654 13:54:56.456006 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1655 13:54:56.463042 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1656 13:54:56.472683 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1657 13:54:56.479579 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1658 13:54:56.485767 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1659 13:54:56.495875 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1660 13:54:56.499544 DOMAIN: 0000: Resource ranges:
1661 13:54:56.502557 * Base: 80400000, Size: 3fc00000, Tag: 200
1662 13:54:56.505760 * Base: d0000000, Size: 28000000, Tag: 200
1663 13:54:56.509196 * Base: fa000000, Size: 1000000, Tag: 200
1664 13:54:56.515912 * Base: fb001000, Size: 17ff000, Tag: 200
1665 13:54:56.519245 * Base: fe800000, Size: 300000, Tag: 200
1666 13:54:56.522814 * Base: feb80000, Size: 80000, Tag: 200
1667 13:54:56.525855 * Base: fed00000, Size: 40000, Tag: 200
1668 13:54:56.532832 * Base: fed70000, Size: 10000, Tag: 200
1669 13:54:56.536149 * Base: fed88000, Size: 8000, Tag: 200
1670 13:54:56.539148 * Base: fed93000, Size: d000, Tag: 200
1671 13:54:56.542796 * Base: feda2000, Size: 1e000, Tag: 200
1672 13:54:56.549089 * Base: fede0000, Size: 1220000, Tag: 200
1673 13:54:56.552292 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1674 13:54:56.559303 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1675 13:54:56.565871 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1676 13:54:56.572355 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1677 13:54:56.579152 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1678 13:54:56.585783 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1679 13:54:56.592387 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1680 13:54:56.598724 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1681 13:54:56.605552 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1682 13:54:56.612205 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1683 13:54:56.618784 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1684 13:54:56.625854 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1685 13:54:56.632075 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1686 13:54:56.638647 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1687 13:54:56.645249 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1688 13:54:56.652277 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1689 13:54:56.658829 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1690 13:54:56.665402 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1691 13:54:56.672250 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1692 13:54:56.678619 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1693 13:54:56.685045 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1694 13:54:56.695065 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1695 13:54:56.698373 PCI: 00:06.0: Resource ranges:
1696 13:54:56.701834 * Base: 80400000, Size: 100000, Tag: 200
1697 13:54:56.708315 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1698 13:54:56.715264 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1699 13:54:56.725079 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1700 13:54:56.731743 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1701 13:54:56.734721 Root Device assign_resources, bus 0 link: 0
1702 13:54:56.741647 DOMAIN: 0000 assign_resources, bus 0 link: 0
1703 13:54:56.748584 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1704 13:54:56.754987 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1705 13:54:56.765053 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1706 13:54:56.771440 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1707 13:54:56.778332 PCI: 00:04.0 assign_resources, bus 1 link: 0
1708 13:54:56.781609 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1709 13:54:56.791191 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1710 13:54:56.801241 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1711 13:54:56.808006 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1712 13:54:56.814892 PCI: 00:06.0 assign_resources, bus 1 link: 0
1713 13:54:56.821255 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1714 13:54:56.828247 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1715 13:54:56.834383 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1716 13:54:56.841241 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1717 13:54:56.851261 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1718 13:54:56.854355 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1719 13:54:56.857620 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1720 13:54:56.867622 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1721 13:54:56.871317 PCI: 00:14.0 assign_resources, bus 0 link: 0
1722 13:54:56.877642 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1723 13:54:56.884203 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1724 13:54:56.894512 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1725 13:54:56.900935 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1726 13:54:56.904137 PCI: 00:14.3 assign_resources, bus 0 link: 0
1727 13:54:56.910732 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1728 13:54:56.917592 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1729 13:54:56.924075 PCI: 00:15.0 assign_resources, bus 0 link: 0
1730 13:54:56.927388 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1731 13:54:56.937170 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1732 13:54:56.940877 PCI: 00:15.1 assign_resources, bus 0 link: 0
1733 13:54:56.944194 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1734 13:54:56.954177 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1735 13:54:56.957390 PCI: 00:15.3 assign_resources, bus 0 link: 0
1736 13:54:56.964238 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1737 13:54:56.970475 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1738 13:54:56.980574 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1739 13:54:56.983682 PCI: 00:19.1 assign_resources, bus 0 link: 0
1740 13:54:56.986947 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1741 13:54:56.997318 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1742 13:54:57.000449 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1743 13:54:57.007395 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1744 13:54:57.010618 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1745 13:54:57.013695 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1746 13:54:57.020264 LPC: Trying to open IO window from 800 size 1ff
1747 13:54:57.027048 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1748 13:54:57.037183 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1749 13:54:57.043802 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1750 13:54:57.050226 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1751 13:54:57.053724 Root Device assign_resources, bus 0 link: 0 done
1752 13:54:57.056761 Done setting resources.
1753 13:54:57.063532 Show resources in subtree (Root Device)...After assigning values.
1754 13:54:57.066851 Root Device child on link 0 CPU_CLUSTER: 0
1755 13:54:57.070395 CPU_CLUSTER: 0 child on link 0 APIC: 00
1756 13:54:57.073872 APIC: 00
1757 13:54:57.073956 APIC: 16
1758 13:54:57.074022 APIC: 10
1759 13:54:57.076771 APIC: 12
1760 13:54:57.076844 APIC: 14
1761 13:54:57.080700 APIC: 09
1762 13:54:57.080811 APIC: 01
1763 13:54:57.080903 APIC: 08
1764 13:54:57.086816 DOMAIN: 0000 child on link 0 GPIO: 0
1765 13:54:57.093820 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1766 13:54:57.103937 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1767 13:54:57.106714 GPIO: 0
1768 13:54:57.106792 PCI: 00:00.0
1769 13:54:57.117116 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1770 13:54:57.127162 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1771 13:54:57.136595 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1772 13:54:57.143384 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1773 13:54:57.153378 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1774 13:54:57.163440 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1775 13:54:57.173300 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1776 13:54:57.183376 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1777 13:54:57.193267 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1778 13:54:57.202918 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1779 13:54:57.209968 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1780 13:54:57.219832 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1781 13:54:57.229277 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1782 13:54:57.239329 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1783 13:54:57.249468 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1784 13:54:57.259141 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1785 13:54:57.266102 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1786 13:54:57.276087 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1787 13:54:57.286001 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1788 13:54:57.296098 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1789 13:54:57.306105 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1790 13:54:57.315720 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1791 13:54:57.326000 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1792 13:54:57.335956 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1793 13:54:57.345786 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1794 13:54:57.355374 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1795 13:54:57.362149 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1796 13:54:57.372418 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1797 13:54:57.375664 PCI: 00:02.0
1798 13:54:57.385489 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1799 13:54:57.395023 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1800 13:54:57.405160 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1801 13:54:57.408920 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1802 13:54:57.418313 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1803 13:54:57.421935 GENERIC: 0.0
1804 13:54:57.425525 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1805 13:54:57.435356 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1806 13:54:57.448345 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1807 13:54:57.458199 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1808 13:54:57.458312 PCI: 01:00.0
1809 13:54:57.468240 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1810 13:54:57.481556 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1811 13:54:57.481674 PCI: 00:08.0
1812 13:54:57.484729 PCI: 00:0a.0
1813 13:54:57.494847 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1814 13:54:57.498469 PCI: 00:0d.0 child on link 0 USB0 port 0
1815 13:54:57.508110 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1816 13:54:57.511487 USB0 port 0 child on link 0 USB3 port 0
1817 13:54:57.514715 USB3 port 0
1818 13:54:57.518621 USB3 port 1
1819 13:54:57.518726 USB3 port 2
1820 13:54:57.521520 USB3 port 3
1821 13:54:57.524747 PCI: 00:14.0 child on link 0 USB0 port 0
1822 13:54:57.535130 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1823 13:54:57.538241 USB0 port 0 child on link 0 USB2 port 0
1824 13:54:57.541383 USB2 port 0
1825 13:54:57.541497 USB2 port 1
1826 13:54:57.544793 USB2 port 2
1827 13:54:57.548325 USB2 port 3
1828 13:54:57.548439 USB2 port 4
1829 13:54:57.551468 USB2 port 5
1830 13:54:57.551596 USB2 port 6
1831 13:54:57.554661 USB2 port 7
1832 13:54:57.554804 USB2 port 8
1833 13:54:57.558478 USB2 port 9
1834 13:54:57.558602 USB3 port 0
1835 13:54:57.561655 USB3 port 1
1836 13:54:57.561780 USB3 port 2
1837 13:54:57.564738 USB3 port 3
1838 13:54:57.564861 PCI: 00:14.2
1839 13:54:57.574841 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1840 13:54:57.588226 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1841 13:54:57.591334 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1842 13:54:57.601306 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1843 13:54:57.604485 GENERIC: 0.0
1844 13:54:57.607967 PCI: 00:15.0 child on link 0 I2C: 00:1a
1845 13:54:57.618133 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1846 13:54:57.618245 I2C: 00:1a
1847 13:54:57.621213 I2C: 00:31
1848 13:54:57.621308 I2C: 00:32
1849 13:54:57.627588 PCI: 00:15.1 child on link 0 I2C: 00:50
1850 13:54:57.637881 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1851 13:54:57.638003 I2C: 00:50
1852 13:54:57.640950 PCI: 00:15.2
1853 13:54:57.644655 PCI: 00:15.3 child on link 0 I2C: 00:10
1854 13:54:57.654184 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1855 13:54:57.657822 I2C: 00:10
1856 13:54:57.657932 PCI: 00:16.0
1857 13:54:57.667817 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1858 13:54:57.671015 PCI: 00:19.0
1859 13:54:57.674119 PCI: 00:19.1 child on link 0 I2C: 00:15
1860 13:54:57.684133 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1861 13:54:57.687849 I2C: 00:15
1862 13:54:57.687943 I2C: 00:2c
1863 13:54:57.691073 PCI: 00:1e.0
1864 13:54:57.701326 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1865 13:54:57.704420 PCI: 00:1e.3 child on link 0 SPI: 00
1866 13:54:57.714397 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1867 13:54:57.717660 SPI: 00
1868 13:54:57.721023 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1869 13:54:57.730659 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1870 13:54:57.730746 PNP: 0c09.0
1871 13:54:57.740690 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1872 13:54:57.744083 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1873 13:54:57.753962 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1874 13:54:57.763958 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1875 13:54:57.767160 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1876 13:54:57.770555 GENERIC: 0.0
1877 13:54:57.770682 GENERIC: 1.0
1878 13:54:57.774191 PCI: 00:1f.3
1879 13:54:57.784382 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1880 13:54:57.794016 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1881 13:54:57.794106 PCI: 00:1f.5
1882 13:54:57.806978 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1883 13:54:57.807077 Done allocating resources.
1884 13:54:57.813707 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1885 13:54:57.820410 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1886 13:54:57.823514 Configure audio over I2S with MAX98373 NAU88L25B.
1887 13:54:57.829417 Enabling BT offload
1888 13:54:57.836839 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1889 13:54:57.840018 Enabling resources...
1890 13:54:57.843358 PCI: 00:00.0 subsystem <- 8086/4609
1891 13:54:57.847201 PCI: 00:00.0 cmd <- 06
1892 13:54:57.850109 PCI: 00:02.0 subsystem <- 8086/46b3
1893 13:54:57.853446 PCI: 00:02.0 cmd <- 03
1894 13:54:57.857047 PCI: 00:04.0 subsystem <- 8086/461d
1895 13:54:57.857130 PCI: 00:04.0 cmd <- 02
1896 13:54:57.860260 PCI: 00:06.0 bridge ctrl <- 0013
1897 13:54:57.863656 PCI: 00:06.0 subsystem <- 8086/464d
1898 13:54:57.867142 PCI: 00:06.0 cmd <- 106
1899 13:54:57.870371 PCI: 00:0a.0 subsystem <- 8086/467d
1900 13:54:57.873435 PCI: 00:0a.0 cmd <- 02
1901 13:54:57.876651 PCI: 00:0d.0 subsystem <- 8086/461e
1902 13:54:57.880273 PCI: 00:0d.0 cmd <- 02
1903 13:54:57.883198 PCI: 00:14.0 subsystem <- 8086/51ed
1904 13:54:57.887203 PCI: 00:14.0 cmd <- 02
1905 13:54:57.890351 PCI: 00:14.2 subsystem <- 8086/51ef
1906 13:54:57.890434 PCI: 00:14.2 cmd <- 02
1907 13:54:57.893275 PCI: 00:14.3 subsystem <- 8086/51f0
1908 13:54:57.896735 PCI: 00:14.3 cmd <- 02
1909 13:54:57.899769 PCI: 00:15.0 subsystem <- 8086/51e8
1910 13:54:57.903656 PCI: 00:15.0 cmd <- 02
1911 13:54:57.906944 PCI: 00:15.1 subsystem <- 8086/51e9
1912 13:54:57.909746 PCI: 00:15.1 cmd <- 06
1913 13:54:57.913560 PCI: 00:15.3 subsystem <- 8086/51eb
1914 13:54:57.916703 PCI: 00:15.3 cmd <- 02
1915 13:54:57.920377 PCI: 00:16.0 subsystem <- 8086/51e0
1916 13:54:57.920476 PCI: 00:16.0 cmd <- 02
1917 13:54:57.923114 PCI: 00:19.1 subsystem <- 8086/51c6
1918 13:54:57.926535 PCI: 00:19.1 cmd <- 02
1919 13:54:57.929822 PCI: 00:1e.0 subsystem <- 8086/51a8
1920 13:54:57.933038 PCI: 00:1e.0 cmd <- 06
1921 13:54:57.936868 PCI: 00:1e.3 subsystem <- 8086/51ab
1922 13:54:57.939982 PCI: 00:1e.3 cmd <- 02
1923 13:54:57.943358 PCI: 00:1f.0 subsystem <- 8086/5182
1924 13:54:57.946393 PCI: 00:1f.0 cmd <- 407
1925 13:54:57.949810 PCI: 00:1f.3 subsystem <- 8086/51c8
1926 13:54:57.949926 PCI: 00:1f.3 cmd <- 02
1927 13:54:57.953166 PCI: 00:1f.5 subsystem <- 8086/51a4
1928 13:54:57.956758 PCI: 00:1f.5 cmd <- 406
1929 13:54:57.959940 PCI: 01:00.0 cmd <- 02
1930 13:54:57.960055 done.
1931 13:54:57.966657 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1932 13:54:57.969568 ME: Version: Unavailable
1933 13:54:57.973312 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1934 13:54:57.976402 Initializing devices...
1935 13:54:57.980151 Root Device init
1936 13:54:57.980258 mainboard: EC init
1937 13:54:57.986794 Chrome EC: Set SMI mask to 0x0000000000000000
1938 13:54:57.989954 Chrome EC: UHEPI supported
1939 13:54:57.993084 Chrome EC: clear events_b mask to 0x0000000000000000
1940 13:54:57.999906 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1941 13:54:58.006969 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1942 13:54:58.013743 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1943 13:54:58.016773 Chrome EC: Set WAKE mask to 0x0000000000000000
1944 13:54:58.020071 Root Device init finished in 39 msecs
1945 13:54:58.023495 PCI: 00:00.0 init
1946 13:54:58.026641 CPU TDP = 15 Watts
1947 13:54:58.030040 CPU PL1 = 15 Watts
1948 13:54:58.030126 CPU PL2 = 55 Watts
1949 13:54:58.033568 CPU PL4 = 123 Watts
1950 13:54:58.036737 PCI: 00:00.0 init finished in 8 msecs
1951 13:54:58.036836 PCI: 00:02.0 init
1952 13:54:58.039819 GMA: Found VBT in CBFS
1953 13:54:58.043669 GMA: Found valid VBT in CBFS
1954 13:54:58.050001 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1955 13:54:58.056772 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1956 13:54:58.059868 PCI: 00:02.0 init finished in 18 msecs
1957 13:54:58.063528 PCI: 00:06.0 init
1958 13:54:58.066617 Initializing PCH PCIe bridge.
1959 13:54:58.069904 PCI: 00:06.0 init finished in 3 msecs
1960 13:54:58.069979 PCI: 00:0a.0 init
1961 13:54:58.076700 PCI: 00:0a.0 init finished in 0 msecs
1962 13:54:58.076786 PCI: 00:14.0 init
1963 13:54:58.079977 PCI: 00:14.0 init finished in 0 msecs
1964 13:54:58.083127 PCI: 00:14.2 init
1965 13:54:58.086791 PCI: 00:14.2 init finished in 0 msecs
1966 13:54:58.086866 PCI: 00:15.0 init
1967 13:54:58.089801 I2C bus 0 version 0x3230302a
1968 13:54:58.093173 DW I2C bus 0 at 0x80655000 (400 KHz)
1969 13:54:58.099846 PCI: 00:15.0 init finished in 6 msecs
1970 13:54:58.099979 PCI: 00:15.1 init
1971 13:54:58.103463 I2C bus 1 version 0x3230302a
1972 13:54:58.106574 DW I2C bus 1 at 0x80656000 (400 KHz)
1973 13:54:58.110193 PCI: 00:15.1 init finished in 6 msecs
1974 13:54:58.113376 PCI: 00:15.3 init
1975 13:54:58.116570 I2C bus 3 version 0x3230302a
1976 13:54:58.120223 DW I2C bus 3 at 0x80657000 (400 KHz)
1977 13:54:58.123247 PCI: 00:15.3 init finished in 6 msecs
1978 13:54:58.126695 PCI: 00:16.0 init
1979 13:54:58.130279 PCI: 00:16.0 init finished in 0 msecs
1980 13:54:58.130419 PCI: 00:19.1 init
1981 13:54:58.133208 I2C bus 5 version 0x3230302a
1982 13:54:58.136437 DW I2C bus 5 at 0x80659000 (400 KHz)
1983 13:54:58.139591 PCI: 00:19.1 init finished in 6 msecs
1984 13:54:58.143326 PCI: 00:1f.0 init
1985 13:54:58.146665 IOAPIC: Initializing IOAPIC at 0xfec00000
1986 13:54:58.149864 IOAPIC: ID = 0x02
1987 13:54:58.153151 IOAPIC: Dumping registers
1988 13:54:58.153240 reg 0x0000: 0x02000000
1989 13:54:58.156525 reg 0x0001: 0x00770020
1990 13:54:58.160290 reg 0x0002: 0x00000000
1991 13:54:58.163374 IOAPIC: 120 interrupts
1992 13:54:58.166719 IOAPIC: Clearing IOAPIC at 0xfec00000
1993 13:54:58.169859 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1994 13:54:58.176390 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1995 13:54:58.179871 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1996 13:54:58.186300 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1997 13:54:58.189562 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1998 13:54:58.193224 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1999 13:54:58.199507 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2000 13:54:58.203256 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2001 13:54:58.209573 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2002 13:54:58.213306 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2003 13:54:58.219742 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2004 13:54:58.223013 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2005 13:54:58.229599 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2006 13:54:58.233125 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2007 13:54:58.236204 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2008 13:54:58.242794 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2009 13:54:58.246067 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2010 13:54:58.253151 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2011 13:54:58.256325 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2012 13:54:58.262707 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2013 13:54:58.266402 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2014 13:54:58.272849 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2015 13:54:58.276479 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2016 13:54:58.279671 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2017 13:54:58.286429 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2018 13:54:58.289765 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2019 13:54:58.296455 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2020 13:54:58.299361 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2021 13:54:58.306271 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2022 13:54:58.309252 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2023 13:54:58.312912 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2024 13:54:58.319300 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2025 13:54:58.322585 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2026 13:54:58.329312 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2027 13:54:58.332787 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2028 13:54:58.339488 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2029 13:54:58.342801 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2030 13:54:58.349538 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2031 13:54:58.352722 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2032 13:54:58.355990 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2033 13:54:58.362421 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2034 13:54:58.365686 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2035 13:54:58.372299 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2036 13:54:58.376007 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2037 13:54:58.382419 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2038 13:54:58.385582 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2039 13:54:58.392237 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2040 13:54:58.395528 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2041 13:54:58.402427 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2042 13:54:58.405421 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2043 13:54:58.408666 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2044 13:54:58.415493 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2045 13:54:58.418591 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2046 13:54:58.425240 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2047 13:54:58.428707 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2048 13:54:58.435667 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2049 13:54:58.438716 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2050 13:54:58.445640 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2051 13:54:58.449001 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2052 13:54:58.452033 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2053 13:54:58.458540 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2054 13:54:58.462251 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2055 13:54:58.468565 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2056 13:54:58.472302 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2057 13:54:58.478723 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2058 13:54:58.482351 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2059 13:54:58.485443 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2060 13:54:58.491822 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2061 13:54:58.495429 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2062 13:54:58.501982 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2063 13:54:58.505058 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2064 13:54:58.512094 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2065 13:54:58.515381 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2066 13:54:58.521953 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2067 13:54:58.525289 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2068 13:54:58.528465 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2069 13:54:58.534984 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2070 13:54:58.538556 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2071 13:54:58.544898 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2072 13:54:58.548311 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2073 13:54:58.555245 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2074 13:54:58.558660 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2075 13:54:58.565201 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2076 13:54:58.568330 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2077 13:54:58.571680 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2078 13:54:58.578621 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2079 13:54:58.581699 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2080 13:54:58.588446 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2081 13:54:58.591663 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2082 13:54:58.598290 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2083 13:54:58.601611 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2084 13:54:58.608276 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2085 13:54:58.611734 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2086 13:54:58.614743 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2087 13:54:58.621738 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2088 13:54:58.625111 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2089 13:54:58.631869 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2090 13:54:58.634983 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2091 13:54:58.641361 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2092 13:54:58.644772 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2093 13:54:58.648307 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2094 13:54:58.655240 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2095 13:54:58.658308 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2096 13:54:58.664608 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2097 13:54:58.668179 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2098 13:54:58.674921 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2099 13:54:58.678101 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2100 13:54:58.684874 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2101 13:54:58.688251 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2102 13:54:58.691643 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2103 13:54:58.698367 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2104 13:54:58.701565 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2105 13:54:58.707807 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2106 13:54:58.711608 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2107 13:54:58.717847 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2108 13:54:58.721441 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2109 13:54:58.727867 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2110 13:54:58.731460 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2111 13:54:58.734883 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2112 13:54:58.741484 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2113 13:54:58.744810 IOAPIC: Bootstrap Processor Local APIC = 0x00
2114 13:54:58.750987 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2115 13:54:58.754468 PCI: 00:1f.0 init finished in 607 msecs
2116 13:54:58.757945 PCI: 00:1f.2 init
2117 13:54:58.758071 apm_control: Disabling ACPI.
2118 13:54:58.763651 APMC done.
2119 13:54:58.767352 PCI: 00:1f.2 init finished in 6 msecs
2120 13:54:58.770509 PCI: 00:1f.3 init
2121 13:54:58.773789 PCI: 00:1f.3 init finished in 0 msecs
2122 13:54:58.773926 PCI: 01:00.0 init
2123 13:54:58.777020 PCI: 01:00.0 init finished in 0 msecs
2124 13:54:58.780229 PNP: 0c09.0 init
2125 13:54:58.784167 Google Chrome EC uptime: 12.097 seconds
2126 13:54:58.790506 Google Chrome AP resets since EC boot: 1
2127 13:54:58.793762 Google Chrome most recent AP reset causes:
2128 13:54:58.796937 0.340: 32775 shutdown: entering G3
2129 13:54:58.803615 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2130 13:54:58.807227 PNP: 0c09.0 init finished in 23 msecs
2131 13:54:58.810431 GENERIC: 0.0 init
2132 13:54:58.813544 GENERIC: 0.0 init finished in 0 msecs
2133 13:54:58.813636 GENERIC: 1.0 init
2134 13:54:58.816783 GENERIC: 1.0 init finished in 0 msecs
2135 13:54:58.820456 Devices initialized
2136 13:54:58.823500 Show all devs... After init.
2137 13:54:58.827140 Root Device: enabled 1
2138 13:54:58.827219 CPU_CLUSTER: 0: enabled 1
2139 13:54:58.830407 DOMAIN: 0000: enabled 1
2140 13:54:58.833670 GPIO: 0: enabled 1
2141 13:54:58.836827 PCI: 00:00.0: enabled 1
2142 13:54:58.836925 PCI: 00:01.0: enabled 0
2143 13:54:58.840494 PCI: 00:01.1: enabled 0
2144 13:54:58.843836 PCI: 00:02.0: enabled 1
2145 13:54:58.843946 PCI: 00:04.0: enabled 1
2146 13:54:58.846950 PCI: 00:05.0: enabled 0
2147 13:54:58.850270 PCI: 00:06.0: enabled 1
2148 13:54:58.853837 PCI: 00:06.2: enabled 0
2149 13:54:58.853917 PCI: 00:07.0: enabled 0
2150 13:54:58.856972 PCI: 00:07.1: enabled 0
2151 13:54:58.860110 PCI: 00:07.2: enabled 0
2152 13:54:58.864381 PCI: 00:07.3: enabled 0
2153 13:54:58.864483 PCI: 00:08.0: enabled 0
2154 13:54:58.866931 PCI: 00:09.0: enabled 0
2155 13:54:58.870549 PCI: 00:0a.0: enabled 1
2156 13:54:58.873609 PCI: 00:0d.0: enabled 1
2157 13:54:58.873692 PCI: 00:0d.1: enabled 0
2158 13:54:58.876903 PCI: 00:0d.2: enabled 0
2159 13:54:58.879991 PCI: 00:0d.3: enabled 0
2160 13:54:58.880102 PCI: 00:0e.0: enabled 0
2161 13:54:58.883539 PCI: 00:10.0: enabled 0
2162 13:54:58.887111 PCI: 00:10.1: enabled 0
2163 13:54:58.890218 PCI: 00:10.6: enabled 0
2164 13:54:58.890302 PCI: 00:10.7: enabled 0
2165 13:54:58.893463 PCI: 00:12.0: enabled 0
2166 13:54:58.896676 PCI: 00:12.6: enabled 0
2167 13:54:58.900429 PCI: 00:12.7: enabled 0
2168 13:54:58.900556 PCI: 00:13.0: enabled 0
2169 13:54:58.903390 PCI: 00:14.0: enabled 1
2170 13:54:58.906645 PCI: 00:14.1: enabled 0
2171 13:54:58.910489 PCI: 00:14.2: enabled 1
2172 13:54:58.910597 PCI: 00:14.3: enabled 1
2173 13:54:58.913590 PCI: 00:15.0: enabled 1
2174 13:54:58.916603 PCI: 00:15.1: enabled 1
2175 13:54:58.919940 PCI: 00:15.2: enabled 0
2176 13:54:58.920025 PCI: 00:15.3: enabled 1
2177 13:54:58.923636 PCI: 00:16.0: enabled 1
2178 13:54:58.926781 PCI: 00:16.1: enabled 0
2179 13:54:58.926866 PCI: 00:16.2: enabled 0
2180 13:54:58.930438 PCI: 00:16.3: enabled 0
2181 13:54:58.933907 PCI: 00:16.4: enabled 0
2182 13:54:58.936777 PCI: 00:16.5: enabled 0
2183 13:54:58.936922 PCI: 00:17.0: enabled 0
2184 13:54:58.940285 PCI: 00:19.0: enabled 0
2185 13:54:58.943506 PCI: 00:19.1: enabled 1
2186 13:54:58.946789 PCI: 00:19.2: enabled 0
2187 13:54:58.946904 PCI: 00:1a.0: enabled 0
2188 13:54:58.950525 PCI: 00:1c.0: enabled 0
2189 13:54:58.953654 PCI: 00:1c.1: enabled 0
2190 13:54:58.953730 PCI: 00:1c.2: enabled 0
2191 13:54:58.956655 PCI: 00:1c.3: enabled 0
2192 13:54:58.960477 PCI: 00:1c.4: enabled 0
2193 13:54:58.963534 PCI: 00:1c.5: enabled 0
2194 13:54:58.963612 PCI: 00:1c.6: enabled 0
2195 13:54:58.966794 PCI: 00:1c.7: enabled 0
2196 13:54:58.970275 PCI: 00:1d.0: enabled 0
2197 13:54:58.973874 PCI: 00:1d.1: enabled 0
2198 13:54:58.973954 PCI: 00:1d.2: enabled 0
2199 13:54:58.976911 PCI: 00:1d.3: enabled 0
2200 13:54:58.980174 PCI: 00:1e.0: enabled 1
2201 13:54:58.983299 PCI: 00:1e.1: enabled 0
2202 13:54:58.983375 PCI: 00:1e.2: enabled 0
2203 13:54:58.986984 PCI: 00:1e.3: enabled 1
2204 13:54:58.989976 PCI: 00:1f.0: enabled 1
2205 13:54:58.990057 PCI: 00:1f.1: enabled 0
2206 13:54:58.993605 PCI: 00:1f.2: enabled 1
2207 13:54:58.996741 PCI: 00:1f.3: enabled 1
2208 13:54:59.000049 PCI: 00:1f.4: enabled 0
2209 13:54:59.000129 PCI: 00:1f.5: enabled 1
2210 13:54:59.003384 PCI: 00:1f.6: enabled 0
2211 13:54:59.006803 PCI: 00:1f.7: enabled 0
2212 13:54:59.010141 GENERIC: 0.0: enabled 1
2213 13:54:59.010226 GENERIC: 0.0: enabled 1
2214 13:54:59.013516 GENERIC: 1.0: enabled 1
2215 13:54:59.016793 GENERIC: 0.0: enabled 1
2216 13:54:59.020114 GENERIC: 1.0: enabled 1
2217 13:54:59.020241 USB0 port 0: enabled 1
2218 13:54:59.023199 USB0 port 0: enabled 1
2219 13:54:59.026799 GENERIC: 0.0: enabled 1
2220 13:54:59.026906 I2C: 00:1a: enabled 1
2221 13:54:59.030083 I2C: 00:31: enabled 1
2222 13:54:59.033115 I2C: 00:32: enabled 1
2223 13:54:59.033200 I2C: 00:50: enabled 1
2224 13:54:59.036784 I2C: 00:10: enabled 1
2225 13:54:59.040086 I2C: 00:15: enabled 1
2226 13:54:59.040170 I2C: 00:2c: enabled 1
2227 13:54:59.043394 GENERIC: 0.0: enabled 1
2228 13:54:59.046778 SPI: 00: enabled 1
2229 13:54:59.049960 PNP: 0c09.0: enabled 1
2230 13:54:59.050041 GENERIC: 0.0: enabled 1
2231 13:54:59.053137 USB3 port 0: enabled 1
2232 13:54:59.056406 USB3 port 1: enabled 0
2233 13:54:59.056512 USB3 port 2: enabled 1
2234 13:54:59.060136 USB3 port 3: enabled 0
2235 13:54:59.063146 USB2 port 0: enabled 1
2236 13:54:59.063236 USB2 port 1: enabled 0
2237 13:54:59.066865 USB2 port 2: enabled 1
2238 13:54:59.070036 USB2 port 3: enabled 0
2239 13:54:59.073252 USB2 port 4: enabled 0
2240 13:54:59.073355 USB2 port 5: enabled 1
2241 13:54:59.076482 USB2 port 6: enabled 0
2242 13:54:59.079934 USB2 port 7: enabled 0
2243 13:54:59.080036 USB2 port 8: enabled 1
2244 13:54:59.083090 USB2 port 9: enabled 1
2245 13:54:59.086782 USB3 port 0: enabled 1
2246 13:54:59.089638 USB3 port 1: enabled 0
2247 13:54:59.089740 USB3 port 2: enabled 0
2248 13:54:59.093226 USB3 port 3: enabled 0
2249 13:54:59.096641 GENERIC: 0.0: enabled 1
2250 13:54:59.096725 GENERIC: 1.0: enabled 1
2251 13:54:59.099717 APIC: 00: enabled 1
2252 13:54:59.103159 APIC: 16: enabled 1
2253 13:54:59.103243 APIC: 10: enabled 1
2254 13:54:59.106705 APIC: 12: enabled 1
2255 13:54:59.106792 APIC: 14: enabled 1
2256 13:54:59.110058 APIC: 09: enabled 1
2257 13:54:59.113445 APIC: 01: enabled 1
2258 13:54:59.113562 APIC: 08: enabled 1
2259 13:54:59.116378 PCI: 01:00.0: enabled 1
2260 13:54:59.123009 BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms
2261 13:54:59.126471 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2262 13:54:59.130046 ELOG: NV offset 0xf20000 size 0x4000
2263 13:54:59.137735 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2264 13:54:59.144153 ELOG: Event(17) added with size 13 at 2023-08-11 13:54:52 UTC
2265 13:54:59.150822 ELOG: Event(9E) added with size 10 at 2023-08-11 13:54:52 UTC
2266 13:54:59.157942 ELOG: Event(9F) added with size 14 at 2023-08-11 13:54:52 UTC
2267 13:54:59.164388 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2268 13:54:59.171055 ELOG: Event(A0) added with size 9 at 2023-08-11 13:54:52 UTC
2269 13:54:59.174262 elog_add_boot_reason: Logged dev mode boot
2270 13:54:59.180937 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2271 13:54:59.184549 Finalize devices...
2272 13:54:59.184660 PCI: 00:16.0 final
2273 13:54:59.187449 PCI: 00:1f.2 final
2274 13:54:59.187552 GENERIC: 0.0 final
2275 13:54:59.194111 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2276 13:54:59.197786 GENERIC: 1.0 final
2277 13:54:59.201052 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2278 13:54:59.204489 Devices finalized
2279 13:54:59.211143 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2280 13:54:59.214309 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2281 13:54:59.221219 BS: BS_POST_DEVICE exit times (exec / console): 1 / 5 ms
2282 13:54:59.224405 ME: HFSTS1 : 0x90000245
2283 13:54:59.231203 ME: HFSTS2 : 0x82100116
2284 13:54:59.234343 ME: HFSTS3 : 0x00000050
2285 13:54:59.237619 ME: HFSTS4 : 0x00004000
2286 13:54:59.244369 ME: HFSTS5 : 0x00000000
2287 13:54:59.247632 ME: HFSTS6 : 0x40600006
2288 13:54:59.250840 ME: Manufacturing Mode : NO
2289 13:54:59.254379 ME: SPI Protection Mode Enabled : YES
2290 13:54:59.261070 ME: FPFs Committed : YES
2291 13:54:59.264246 ME: Manufacturing Vars Locked : YES
2292 13:54:59.267299 ME: FW Partition Table : OK
2293 13:54:59.270945 ME: Bringup Loader Failure : NO
2294 13:54:59.274273 ME: Firmware Init Complete : YES
2295 13:54:59.277590 ME: Boot Options Present : NO
2296 13:54:59.280923 ME: Update In Progress : NO
2297 13:54:59.287312 ME: D0i3 Support : YES
2298 13:54:59.290773 ME: Low Power State Enabled : NO
2299 13:54:59.293927 ME: CPU Replaced : YES
2300 13:54:59.297125 ME: CPU Replacement Valid : YES
2301 13:54:59.300497 ME: Current Working State : 5
2302 13:54:59.303639 ME: Current Operation State : 1
2303 13:54:59.307584 ME: Current Operation Mode : 0
2304 13:54:59.310294 ME: Error Code : 0
2305 13:54:59.313932 ME: Enhanced Debug Mode : NO
2306 13:54:59.320392 ME: CPU Debug Disabled : YES
2307 13:54:59.323539 ME: TXT Support : NO
2308 13:54:59.327406 ME: WP for RO is enabled : YES
2309 13:54:59.333536 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2310 13:54:59.339968 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2311 13:54:59.343425 Ramoops buffer: 0x100000@0x76899000.
2312 13:54:59.346568 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2313 13:54:59.356501 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2314 13:54:59.359698 CBFS: 'fallback/slic' not found.
2315 13:54:59.363588 ACPI: Writing ACPI tables at 7686d000.
2316 13:54:59.363670 ACPI: * FACS
2317 13:54:59.366761 ACPI: * DSDT
2318 13:54:59.373562 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2319 13:54:59.376814 ACPI: * FADT
2320 13:54:59.376899 SCI is IRQ9
2321 13:54:59.379932 ACPI: added table 1/32, length now 40
2322 13:54:59.383575 ACPI: * SSDT
2323 13:54:59.389735 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2324 13:54:59.393333 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2325 13:54:59.400264 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2326 13:54:59.403527 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2327 13:54:59.410297 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2328 13:54:59.413414 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2329 13:54:59.420086 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2330 13:54:59.426285 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2331 13:54:59.429699 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2332 13:54:59.436343 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2333 13:54:59.439685 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2334 13:54:59.446370 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2335 13:54:59.449909 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2336 13:54:59.456404 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2337 13:54:59.462674 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2338 13:54:59.466425 PS2K: Passing 80 keymaps to kernel
2339 13:54:59.472865 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2340 13:54:59.479749 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2341 13:54:59.486493 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2342 13:54:59.492617 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2343 13:54:59.499626 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2344 13:54:59.502930 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2345 13:54:59.509230 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2346 13:54:59.516329 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2347 13:54:59.522521 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2348 13:54:59.529427 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2349 13:54:59.532510 ACPI: added table 2/32, length now 44
2350 13:54:59.535817 ACPI: * MCFG
2351 13:54:59.539251 ACPI: added table 3/32, length now 48
2352 13:54:59.539365 ACPI: * TPM2
2353 13:54:59.543015 TPM2 log created at 0x7685d000
2354 13:54:59.546156 ACPI: added table 4/32, length now 52
2355 13:54:59.549377 ACPI: * LPIT
2356 13:54:59.552463 ACPI: added table 5/32, length now 56
2357 13:54:59.555998 ACPI: * MADT
2358 13:54:59.556124 SCI is IRQ9
2359 13:54:59.559229 ACPI: added table 6/32, length now 60
2360 13:54:59.562477 cmd_reg from pmc_make_ipc_cmd 1052838
2361 13:54:59.569360 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2362 13:54:59.575808 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2363 13:54:59.582710 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2364 13:54:59.585761 PMC CrashLog size in discovery mode: 0xC00
2365 13:54:59.589142 cpu crashlog bar addr: 0x80640000
2366 13:54:59.592779 cpu discovery table offset: 0x6030
2367 13:54:59.599331 cpu_crashlog_discovery_table buffer count: 0x3
2368 13:54:59.605575 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2369 13:54:59.612644 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2370 13:54:59.618933 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2371 13:54:59.622150 PMC crashLog size in discovery mode : 0xC00
2372 13:54:59.629066 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2373 13:54:59.632347 discover mode PMC crashlog size adjusted to: 0x200
2374 13:54:59.638944 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2375 13:54:59.645708 discover mode PMC crashlog size adjusted to: 0x0
2376 13:54:59.649001 m_cpu_crashLog_size : 0x3480 bytes
2377 13:54:59.652113 CPU crashLog present.
2378 13:54:59.655804 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2379 13:54:59.662747 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2380 13:54:59.665720 current = 76876550
2381 13:54:59.665800 ACPI: * DMAR
2382 13:54:59.672565 ACPI: added table 7/32, length now 64
2383 13:54:59.675825 ACPI: added table 8/32, length now 68
2384 13:54:59.675935 ACPI: * HPET
2385 13:54:59.678899 ACPI: added table 9/32, length now 72
2386 13:54:59.682301 ACPI: done.
2387 13:54:59.685755 ACPI tables: 38528 bytes.
2388 13:54:59.689394 smbios_write_tables: 76857000
2389 13:54:59.692525 EC returned error result code 3
2390 13:54:59.695975 Couldn't obtain OEM name from CBI
2391 13:54:59.696061 Create SMBIOS type 16
2392 13:54:59.699254 Create SMBIOS type 17
2393 13:54:59.702690 Create SMBIOS type 20
2394 13:54:59.706134 GENERIC: 0.0 (WIFI Device)
2395 13:54:59.706231 SMBIOS tables: 2156 bytes.
2396 13:54:59.712590 Writing table forward entry at 0x00000500
2397 13:54:59.719155 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2398 13:54:59.722318 Writing coreboot table at 0x76891000
2399 13:54:59.729262 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2400 13:54:59.732559 1. 0000000000001000-000000000009ffff: RAM
2401 13:54:59.735709 2. 00000000000a0000-00000000000fffff: RESERVED
2402 13:54:59.742249 3. 0000000000100000-0000000076856fff: RAM
2403 13:54:59.745996 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2404 13:54:59.752080 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2405 13:54:59.758785 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2406 13:54:59.762263 7. 0000000077000000-00000000803fffff: RESERVED
2407 13:54:59.765543 8. 00000000c0000000-00000000cfffffff: RESERVED
2408 13:54:59.772193 9. 00000000f8000000-00000000f9ffffff: RESERVED
2409 13:54:59.775623 10. 00000000fb000000-00000000fb000fff: RESERVED
2410 13:54:59.782141 11. 00000000fc800000-00000000fe7fffff: RESERVED
2411 13:54:59.785409 12. 00000000feb00000-00000000feb7ffff: RESERVED
2412 13:54:59.792217 13. 00000000fec00000-00000000fecfffff: RESERVED
2413 13:54:59.795574 14. 00000000fed40000-00000000fed6ffff: RESERVED
2414 13:54:59.801992 15. 00000000fed80000-00000000fed87fff: RESERVED
2415 13:54:59.805614 16. 00000000fed90000-00000000fed92fff: RESERVED
2416 13:54:59.808524 17. 00000000feda0000-00000000feda1fff: RESERVED
2417 13:54:59.815201 18. 00000000fedc0000-00000000feddffff: RESERVED
2418 13:54:59.818714 19. 0000000100000000-000000027fbfffff: RAM
2419 13:54:59.821806 Passing 4 GPIOs to payload:
2420 13:54:59.828789 NAME | PORT | POLARITY | VALUE
2421 13:54:59.832187 lid | undefined | high | high
2422 13:54:59.838493 power | undefined | high | low
2423 13:54:59.842253 oprom | undefined | high | low
2424 13:54:59.848645 EC in RW | 0x00000151 | high | high
2425 13:54:59.848782 Board ID: 3
2426 13:54:59.852209 FW config: 0x131
2427 13:54:59.858767 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 573f
2428 13:54:59.861971 coreboot table: 1748 bytes.
2429 13:54:59.865470 IMD ROOT 0. 0x76fff000 0x00001000
2430 13:54:59.868778 IMD SMALL 1. 0x76ffe000 0x00001000
2431 13:54:59.871811 FSP MEMORY 2. 0x76afe000 0x00500000
2432 13:54:59.875064 CONSOLE 3. 0x76ade000 0x00020000
2433 13:54:59.878777 RW MCACHE 4. 0x76add000 0x0000043c
2434 13:54:59.882070 RO MCACHE 5. 0x76adc000 0x00000fd8
2435 13:54:59.888416 FMAP 6. 0x76adb000 0x0000064a
2436 13:54:59.892316 TIME STAMP 7. 0x76ada000 0x00000910
2437 13:54:59.895289 VBOOT WORK 8. 0x76ac6000 0x00014000
2438 13:54:59.898891 MEM INFO 9. 0x76ac5000 0x000003b8
2439 13:54:59.901931 ROMSTG STCK10. 0x76ac4000 0x00001000
2440 13:54:59.905742 AFTER CAR 11. 0x76ab8000 0x0000c000
2441 13:54:59.908824 RAMSTAGE 12. 0x76a2e000 0x0008a000
2442 13:54:59.911859 ACPI BERT 13. 0x76a1e000 0x00010000
2443 13:54:59.915396 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2444 13:54:59.921867 REFCODE 15. 0x769ae000 0x0006f000
2445 13:54:59.924969 SMM BACKUP 16. 0x7699e000 0x00010000
2446 13:54:59.928169 IGD OPREGION17. 0x76999000 0x00004203
2447 13:54:59.932167 RAMOOPS 18. 0x76899000 0x00100000
2448 13:54:59.935211 COREBOOT 19. 0x76891000 0x00008000
2449 13:54:59.938388 ACPI 20. 0x7686d000 0x00024000
2450 13:54:59.941891 TPM2 TCGLOG21. 0x7685d000 0x00010000
2451 13:54:59.948460 PMC CRASHLOG22. 0x7685c000 0x00000c00
2452 13:54:59.951661 CPU CRASHLOG23. 0x76858000 0x00003480
2453 13:54:59.955267 SMBIOS 24. 0x76857000 0x00001000
2454 13:54:59.955393 IMD small region:
2455 13:54:59.961588 IMD ROOT 0. 0x76ffec00 0x00000400
2456 13:54:59.965012 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2457 13:54:59.968520 POWER STATE 2. 0x76ffeb80 0x00000044
2458 13:54:59.972120 ROMSTAGE 3. 0x76ffeb60 0x00000004
2459 13:54:59.975186 ACPI GNVS 4. 0x76ffeb00 0x00000048
2460 13:54:59.978546 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2461 13:54:59.985294 BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms
2462 13:54:59.988331 MTRR: Physical address space:
2463 13:54:59.994719 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2464 13:55:00.001677 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2465 13:55:00.008387 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2466 13:55:00.014874 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2467 13:55:00.021645 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2468 13:55:00.025089 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2469 13:55:00.031224 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2470 13:55:00.038299 MTRR: Fixed MSR 0x250 0x0606060606060606
2471 13:55:00.041618 MTRR: Fixed MSR 0x258 0x0606060606060606
2472 13:55:00.044785 MTRR: Fixed MSR 0x259 0x0000000000000000
2473 13:55:00.047987 MTRR: Fixed MSR 0x268 0x0606060606060606
2474 13:55:00.055072 MTRR: Fixed MSR 0x269 0x0606060606060606
2475 13:55:00.058123 MTRR: Fixed MSR 0x26a 0x0606060606060606
2476 13:55:00.061262 MTRR: Fixed MSR 0x26b 0x0606060606060606
2477 13:55:00.064558 MTRR: Fixed MSR 0x26c 0x0606060606060606
2478 13:55:00.067636 MTRR: Fixed MSR 0x26d 0x0606060606060606
2479 13:55:00.074607 MTRR: Fixed MSR 0x26e 0x0606060606060606
2480 13:55:00.077889 MTRR: Fixed MSR 0x26f 0x0606060606060606
2481 13:55:00.081242 call enable_fixed_mtrr()
2482 13:55:00.084553 CPU physical address size: 39 bits
2483 13:55:00.091479 MTRR: default type WB/UC MTRR counts: 6/6.
2484 13:55:00.094623 MTRR: UC selected as default type.
2485 13:55:00.097913 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2486 13:55:00.104339 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2487 13:55:00.110848 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2488 13:55:00.117605 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2489 13:55:00.124252 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2490 13:55:00.131216 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2491 13:55:00.137681 MTRR: Fixed MSR 0x250 0x0606060606060606
2492 13:55:00.140855 MTRR: Fixed MSR 0x258 0x0606060606060606
2493 13:55:00.144115 MTRR: Fixed MSR 0x259 0x0000000000000000
2494 13:55:00.147734 MTRR: Fixed MSR 0x268 0x0606060606060606
2495 13:55:00.151063 MTRR: Fixed MSR 0x269 0x0606060606060606
2496 13:55:00.157536 MTRR: Fixed MSR 0x26a 0x0606060606060606
2497 13:55:00.160610 MTRR: Fixed MSR 0x26b 0x0606060606060606
2498 13:55:00.164389 MTRR: Fixed MSR 0x26c 0x0606060606060606
2499 13:55:00.167655 MTRR: Fixed MSR 0x26d 0x0606060606060606
2500 13:55:00.174085 MTRR: Fixed MSR 0x26e 0x0606060606060606
2501 13:55:00.177404 MTRR: Fixed MSR 0x26f 0x0606060606060606
2502 13:55:00.180911 MTRR: Fixed MSR 0x250 0x0606060606060606
2503 13:55:00.184106 MTRR: Fixed MSR 0x250 0x0606060606060606
2504 13:55:00.190678 MTRR: Fixed MSR 0x250 0x0606060606060606
2505 13:55:00.194174 MTRR: Fixed MSR 0x250 0x0606060606060606
2506 13:55:00.197447 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 13:55:00.200844 MTRR: Fixed MSR 0x259 0x0000000000000000
2508 13:55:00.207496 MTRR: Fixed MSR 0x268 0x0606060606060606
2509 13:55:00.210551 MTRR: Fixed MSR 0x269 0x0606060606060606
2510 13:55:00.214048 MTRR: Fixed MSR 0x26a 0x0606060606060606
2511 13:55:00.217261 MTRR: Fixed MSR 0x26b 0x0606060606060606
2512 13:55:00.220355 MTRR: Fixed MSR 0x26c 0x0606060606060606
2513 13:55:00.227233 MTRR: Fixed MSR 0x26d 0x0606060606060606
2514 13:55:00.230599 MTRR: Fixed MSR 0x26e 0x0606060606060606
2515 13:55:00.233867 MTRR: Fixed MSR 0x26f 0x0606060606060606
2516 13:55:00.237314 MTRR: Fixed MSR 0x250 0x0606060606060606
2517 13:55:00.244122 MTRR: Fixed MSR 0x258 0x0606060606060606
2518 13:55:00.247262 MTRR: Fixed MSR 0x258 0x0606060606060606
2519 13:55:00.250507 MTRR: Fixed MSR 0x259 0x0000000000000000
2520 13:55:00.254284 MTRR: Fixed MSR 0x268 0x0606060606060606
2521 13:55:00.260496 MTRR: Fixed MSR 0x269 0x0606060606060606
2522 13:55:00.264047 MTRR: Fixed MSR 0x258 0x0606060606060606
2523 13:55:00.267307 call enable_fixed_mtrr()
2524 13:55:00.270560 MTRR: Fixed MSR 0x250 0x0606060606060606
2525 13:55:00.273823 CPU physical address size: 39 bits
2526 13:55:00.277091 MTRR: Fixed MSR 0x259 0x0000000000000000
2527 13:55:00.280242 MTRR: Fixed MSR 0x268 0x0606060606060606
2528 13:55:00.287190 MTRR: Fixed MSR 0x269 0x0606060606060606
2529 13:55:00.290333 MTRR: Fixed MSR 0x259 0x0000000000000000
2530 13:55:00.294047 MTRR: Fixed MSR 0x26a 0x0606060606060606
2531 13:55:00.296904 MTRR: Fixed MSR 0x26b 0x0606060606060606
2532 13:55:00.303421 MTRR: Fixed MSR 0x26c 0x0606060606060606
2533 13:55:00.307035 MTRR: Fixed MSR 0x26d 0x0606060606060606
2534 13:55:00.310412 MTRR: Fixed MSR 0x26e 0x0606060606060606
2535 13:55:00.313524 MTRR: Fixed MSR 0x26f 0x0606060606060606
2536 13:55:00.317251 call enable_fixed_mtrr()
2537 13:55:00.320274 call enable_fixed_mtrr()
2538 13:55:00.323297 MTRR: Fixed MSR 0x26a 0x0606060606060606
2539 13:55:00.327049 MTRR: Fixed MSR 0x258 0x0606060606060606
2540 13:55:00.330084 MTRR: Fixed MSR 0x26b 0x0606060606060606
2541 13:55:00.336951 MTRR: Fixed MSR 0x26c 0x0606060606060606
2542 13:55:00.340211 MTRR: Fixed MSR 0x26d 0x0606060606060606
2543 13:55:00.343296 MTRR: Fixed MSR 0x26e 0x0606060606060606
2544 13:55:00.346497 MTRR: Fixed MSR 0x26f 0x0606060606060606
2545 13:55:00.353384 MTRR: Fixed MSR 0x259 0x0000000000000000
2546 13:55:00.356710 CPU physical address size: 39 bits
2547 13:55:00.359849 CPU physical address size: 39 bits
2548 13:55:00.363667 MTRR: Fixed MSR 0x268 0x0606060606060606
2549 13:55:00.366871 MTRR: Fixed MSR 0x268 0x0606060606060606
2550 13:55:00.369957 MTRR: Fixed MSR 0x269 0x0606060606060606
2551 13:55:00.376909 MTRR: Fixed MSR 0x26a 0x0606060606060606
2552 13:55:00.380279 MTRR: Fixed MSR 0x26b 0x0606060606060606
2553 13:55:00.383170 MTRR: Fixed MSR 0x26c 0x0606060606060606
2554 13:55:00.386376 MTRR: Fixed MSR 0x26d 0x0606060606060606
2555 13:55:00.393598 MTRR: Fixed MSR 0x26e 0x0606060606060606
2556 13:55:00.396473 MTRR: Fixed MSR 0x26f 0x0606060606060606
2557 13:55:00.399637 MTRR: Fixed MSR 0x269 0x0606060606060606
2558 13:55:00.403295 call enable_fixed_mtrr()
2559 13:55:00.406758 MTRR: Fixed MSR 0x26a 0x0606060606060606
2560 13:55:00.409841 MTRR: Fixed MSR 0x26b 0x0606060606060606
2561 13:55:00.416639 MTRR: Fixed MSR 0x26c 0x0606060606060606
2562 13:55:00.419877 MTRR: Fixed MSR 0x26d 0x0606060606060606
2563 13:55:00.423029 MTRR: Fixed MSR 0x26e 0x0606060606060606
2564 13:55:00.426197 MTRR: Fixed MSR 0x26f 0x0606060606060606
2565 13:55:00.429479 call enable_fixed_mtrr()
2566 13:55:00.433134 CPU physical address size: 39 bits
2567 13:55:00.436151 call enable_fixed_mtrr()
2568 13:55:00.439956 MTRR: Fixed MSR 0x258 0x0606060606060606
2569 13:55:00.443074 CPU physical address size: 39 bits
2570 13:55:00.446263 CPU physical address size: 39 bits
2571 13:55:00.449531 MTRR: Fixed MSR 0x259 0x0000000000000000
2572 13:55:00.456393 MTRR: Fixed MSR 0x268 0x0606060606060606
2573 13:55:00.459623 MTRR: Fixed MSR 0x269 0x0606060606060606
2574 13:55:00.462760 MTRR: Fixed MSR 0x26a 0x0606060606060606
2575 13:55:00.466186 MTRR: Fixed MSR 0x26b 0x0606060606060606
2576 13:55:00.472633 MTRR: Fixed MSR 0x26c 0x0606060606060606
2577 13:55:00.476316 MTRR: Fixed MSR 0x26d 0x0606060606060606
2578 13:55:00.479513 MTRR: Fixed MSR 0x26e 0x0606060606060606
2579 13:55:00.482674 MTRR: Fixed MSR 0x26f 0x0606060606060606
2580 13:55:00.486834 call enable_fixed_mtrr()
2581 13:55:00.490594 CPU physical address size: 39 bits
2582 13:55:00.494538
2583 13:55:00.494669 MTRR check
2584 13:55:00.497893 Fixed MTRRs : Enabled
2585 13:55:00.498035 Variable MTRRs: Enabled
2586 13:55:00.498158
2587 13:55:00.504943 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2588 13:55:00.508049 Checking cr50 for pending updates
2589 13:55:00.520321 Reading cr50 TPM mode
2590 13:55:00.535657 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2591 13:55:00.545502 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2592 13:55:00.548720 Checking segment from ROM address 0xf96cbe6c
2593 13:55:00.552492 Checking segment from ROM address 0xf96cbe88
2594 13:55:00.558963 Loading segment from ROM address 0xf96cbe6c
2595 13:55:00.559052 code (compression=1)
2596 13:55:00.569003 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2597 13:55:00.575900 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2598 13:55:00.578872 using LZMA
2599 13:55:00.601164 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2600 13:55:00.607907 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2601 13:55:00.616473 Loading segment from ROM address 0xf96cbe88
2602 13:55:00.619594 Entry Point 0x30000000
2603 13:55:00.619702 Loaded segments
2604 13:55:00.626473 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2605 13:55:00.632969 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2606 13:55:00.636359 Finalizing chipset.
2607 13:55:00.636450 apm_control: Finalizing SMM.
2608 13:55:00.639731 APMC done.
2609 13:55:00.642985 HECI: CSE device 16.1 is disabled
2610 13:55:00.646448 HECI: CSE device 16.2 is disabled
2611 13:55:00.649361 HECI: CSE device 16.3 is disabled
2612 13:55:00.653113 HECI: CSE device 16.4 is disabled
2613 13:55:00.656389 HECI: CSE device 16.5 is disabled
2614 13:55:00.659555 HECI: Sending End-of-Post
2615 13:55:00.667564 CSE: EOP requested action: continue boot
2616 13:55:00.671147 CSE EOP successful, continuing boot
2617 13:55:00.677629 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2618 13:55:00.681167 mp_park_aps done after 0 msecs.
2619 13:55:00.684393 Jumping to boot code at 0x30000000(0x76891000)
2620 13:55:00.694482 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2621 13:55:00.698490
2622 13:55:00.698580
2623 13:55:00.698647
2624 13:55:00.701512 Starting depthcharge on Volmar...
2625 13:55:00.701599
2626 13:55:00.701970 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2627 13:55:00.702073 start: 2.2.4 bootloader-commands (timeout 00:04:37) [common]
2628 13:55:00.702180 Setting prompt string to ['brya:']
2629 13:55:00.702266 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:37)
2630 13:55:00.708236 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2631 13:55:00.708323
2632 13:55:00.715166 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2633 13:55:00.715253
2634 13:55:00.721825 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2635 13:55:00.721940
2636 13:55:00.724809 configure_storage: Failed to remap 1C:2
2637 13:55:00.724916
2638 13:55:00.728562 Wipe memory regions:
2639 13:55:00.728667
2640 13:55:00.731752 [0x00000000001000, 0x000000000a0000)
2641 13:55:00.731880
2642 13:55:00.734999 [0x00000000100000, 0x00000030000000)
2643 13:55:00.844360
2644 13:55:00.847710 [0x00000032668e60, 0x00000076857000)
2645 13:55:00.999412
2646 13:55:01.002548 [0x00000100000000, 0x0000027fc00000)
2647 13:55:01.857286
2648 13:55:01.860203 ec_init: CrosEC protocol v3 supported (256, 256)
2649 13:55:02.469628
2650 13:55:02.469784 R8152: Initializing
2651 13:55:02.469882
2652 13:55:02.473240 Version 9 (ocp_data = 6010)
2653 13:55:02.473349
2654 13:55:02.476231 R8152: Done initializing
2655 13:55:02.476357
2656 13:55:02.479727 Adding net device
2657 13:55:02.780496
2658 13:55:02.783919 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2659 13:55:02.784027
2660 13:55:02.784093
2661 13:55:02.784154
2662 13:55:02.784434 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2664 13:55:02.884777 brya: tftpboot 192.168.201.1 11263707/tftp-deploy-vq2dn_7v/kernel/bzImage 11263707/tftp-deploy-vq2dn_7v/kernel/cmdline 11263707/tftp-deploy-vq2dn_7v/ramdisk/ramdisk.cpio.gz
2665 13:55:02.884941 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2666 13:55:02.885032 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:35)
2667 13:55:02.889136 tftpboot 192.168.201.1 11263707/tftp-deploy-vq2dn_7v/kernel/bzIploy-vq2dn_7v/kernel/cmdline 11263707/tftp-deploy-vq2dn_7v/ramdisk/ramdisk.cpio.gz
2668 13:55:02.889228
2669 13:55:02.889298 Waiting for link
2670 13:55:03.093079
2671 13:55:03.093221 done.
2672 13:55:03.093293
2673 13:55:03.093393 MAC: 00:e0:4c:68:01:8f
2674 13:55:03.093483
2675 13:55:03.096379 Sending DHCP discover... done.
2676 13:55:03.096486
2677 13:55:03.099588 Waiting for reply... done.
2678 13:55:03.099694
2679 13:55:03.102847 Sending DHCP request... done.
2680 13:55:03.102957
2681 13:55:03.109819 Waiting for reply... done.
2682 13:55:03.109939
2683 13:55:03.110034 My ip is 192.168.201.28
2684 13:55:03.110125
2685 13:55:03.112996 The DHCP server ip is 192.168.201.1
2686 13:55:03.116443
2687 13:55:03.119500 TFTP server IP predefined by user: 192.168.201.1
2688 13:55:03.119606
2689 13:55:03.126281 Bootfile predefined by user: 11263707/tftp-deploy-vq2dn_7v/kernel/bzImage
2690 13:55:03.126388
2691 13:55:03.129469 Sending tftp read request... done.
2692 13:55:03.129564
2693 13:55:03.133266 Waiting for the transfer...
2694 13:55:03.133352
2695 13:55:03.391439 00000000 ################################################################
2696 13:55:03.391600
2697 13:55:03.651152 00080000 ################################################################
2698 13:55:03.651318
2699 13:55:03.949355 00100000 ################################################################
2700 13:55:03.949487
2701 13:55:04.204027 00180000 ################################################################
2702 13:55:04.204163
2703 13:55:04.459424 00200000 ################################################################
2704 13:55:04.459603
2705 13:55:04.716846 00280000 ################################################################
2706 13:55:04.717015
2707 13:55:04.972371 00300000 ################################################################
2708 13:55:04.972544
2709 13:55:05.224337 00380000 ################################################################
2710 13:55:05.224502
2711 13:55:05.477091 00400000 ################################################################
2712 13:55:05.477268
2713 13:55:05.734100 00480000 ################################################################
2714 13:55:05.734235
2715 13:55:05.990511 00500000 ################################################################
2716 13:55:05.990652
2717 13:55:06.294534 00580000 ################################################################
2718 13:55:06.294752
2719 13:55:06.547055 00600000 ################################################################
2720 13:55:06.547191
2721 13:55:06.797655 00680000 ################################################################
2722 13:55:06.797801
2723 13:55:07.047387 00700000 ################################################################
2724 13:55:07.047553
2725 13:55:07.301142 00780000 ################################################################
2726 13:55:07.301289
2727 13:55:07.552240 00800000 ################################################################
2728 13:55:07.552449
2729 13:55:07.805345 00880000 ################################################################
2730 13:55:07.805488
2731 13:55:08.061511 00900000 ################################################################
2732 13:55:08.061651
2733 13:55:08.315819 00980000 ################################################################
2734 13:55:08.315980
2735 13:55:08.565109 00a00000 ################################################################
2736 13:55:08.565246
2737 13:55:08.815457 00a80000 ################################################################
2738 13:55:08.815623
2739 13:55:09.070999 00b00000 ################################################################
2740 13:55:09.071174
2741 13:55:09.320322 00b80000 ################################################################
2742 13:55:09.320479
2743 13:55:09.570132 00c00000 ################################################################
2744 13:55:09.570270
2745 13:55:09.819170 00c80000 ################################################################
2746 13:55:09.819363
2747 13:55:10.116057 00d00000 ################################################################
2748 13:55:10.116189
2749 13:55:10.443567 00d80000 ################################################################
2750 13:55:10.443738
2751 13:55:10.775401 00e00000 ################################################################
2752 13:55:10.775580
2753 13:55:11.105272 00e80000 ################################################################
2754 13:55:11.105473
2755 13:55:11.437015 00f00000 ################################################################
2756 13:55:11.437154
2757 13:55:11.538103 00f80000 #################### done.
2758 13:55:11.538241
2759 13:55:11.541271 The bootfile was 16413824 bytes long.
2760 13:55:11.541360
2761 13:55:11.544700 Sending tftp read request... done.
2762 13:55:11.544789
2763 13:55:11.548153 Waiting for the transfer...
2764 13:55:11.548230
2765 13:55:11.874913 00000000 ################################################################
2766 13:55:11.875098
2767 13:55:12.205039 00080000 ################################################################
2768 13:55:12.205217
2769 13:55:12.534979 00100000 ################################################################
2770 13:55:12.535161
2771 13:55:12.846397 00180000 ################################################################
2772 13:55:12.846611
2773 13:55:13.108787 00200000 ################################################################
2774 13:55:13.108920
2775 13:55:13.373798 00280000 ################################################################
2776 13:55:13.373990
2777 13:55:13.624038 00300000 ################################################################
2778 13:55:13.624227
2779 13:55:13.904691 00380000 ################################################################
2780 13:55:13.904902
2781 13:55:14.154416 00400000 ################################################################
2782 13:55:14.154626
2783 13:55:14.403410 00480000 ################################################################
2784 13:55:14.403580
2785 13:55:14.652965 00500000 ################################################################
2786 13:55:14.653172
2787 13:55:14.901453 00580000 ################################################################
2788 13:55:14.901667
2789 13:55:15.151687 00600000 ################################################################
2790 13:55:15.151829
2791 13:55:15.400052 00680000 ################################################################
2792 13:55:15.400231
2793 13:55:15.654333 00700000 ################################################################
2794 13:55:15.654466
2795 13:55:15.905483 00780000 ################################################################
2796 13:55:15.905625
2797 13:55:16.153841 00800000 ################################################################
2798 13:55:16.153980
2799 13:55:16.401823 00880000 ################################################################
2800 13:55:16.402024
2801 13:55:16.653770 00900000 ################################################################
2802 13:55:16.653965
2803 13:55:16.903089 00980000 ################################################################
2804 13:55:16.903228
2805 13:55:17.153011 00a00000 ################################################################
2806 13:55:17.153181
2807 13:55:17.405578 00a80000 ################################################################
2808 13:55:17.405715
2809 13:55:17.656533 00b00000 ################################################################
2810 13:55:17.656670
2811 13:55:17.906219 00b80000 ################################################################
2812 13:55:17.906355
2813 13:55:18.158068 00c00000 ################################################################
2814 13:55:18.158232
2815 13:55:18.414815 00c80000 ################################################################
2816 13:55:18.414958
2817 13:55:18.471126 00d00000 ############## done.
2818 13:55:18.471244
2819 13:55:18.474456 Sending tftp read request... done.
2820 13:55:18.477515
2821 13:55:18.477598 Waiting for the transfer...
2822 13:55:18.477676
2823 13:55:18.480874 00000000 # done.
2824 13:55:18.480966
2825 13:55:18.490647 Command line loaded dynamically from TFTP file: 11263707/tftp-deploy-vq2dn_7v/kernel/cmdline
2826 13:55:18.490768
2827 13:55:18.504309 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2828 13:55:18.511821
2829 13:55:18.515215 Shutting down all USB controllers.
2830 13:55:18.515345
2831 13:55:18.515466 Removing current net device
2832 13:55:18.515584
2833 13:55:18.518278 Finalizing coreboot
2834 13:55:18.518406
2835 13:55:18.524837 Exiting depthcharge with code 4 at timestamp: 28088255
2836 13:55:18.524970
2837 13:55:18.525093
2838 13:55:18.525210 Starting kernel ...
2839 13:55:18.525321
2840 13:55:18.525430
2841 13:55:18.526038 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2842 13:55:18.526197 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2843 13:55:18.526324 Setting prompt string to ['Linux version [0-9]']
2844 13:55:18.526452 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2845 13:55:18.526582 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2847 13:59:37.526471 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2849 13:59:37.526720 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2851 13:59:37.526878 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2854 13:59:37.527204 end: 2 depthcharge-action (duration 00:05:00) [common]
2856 13:59:37.527574 Cleaning after the job
2857 13:59:37.527693 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11263707/tftp-deploy-vq2dn_7v/ramdisk
2858 13:59:37.529499 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11263707/tftp-deploy-vq2dn_7v/kernel
2859 13:59:37.531372 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11263707/tftp-deploy-vq2dn_7v/modules
2860 13:59:37.534260 start: 5.1 power-off (timeout 00:00:30) [common]
2861 13:59:37.534571 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=off'
2862 13:59:37.611143 >> Command sent successfully.
2863 13:59:37.614607 Returned 0 in 0 seconds
2864 13:59:37.715066 end: 5.1 power-off (duration 00:00:00) [common]
2866 13:59:37.715598 start: 5.2 read-feedback (timeout 00:10:00) [common]
2867 13:59:37.715966 Listened to connection for namespace 'common' for up to 1s
2869 13:59:37.716503 Listened to connection for namespace 'common' for up to 1s
2870 13:59:38.716835 Finalising connection for namespace 'common'
2871 13:59:38.717092 Disconnecting from shell: Finalise
2872 13:59:38.717233
2873 13:59:38.817647 end: 5.2 read-feedback (duration 00:00:01) [common]
2874 13:59:38.817812 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11263707
2875 13:59:38.842019 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11263707
2876 13:59:38.842243 JobError: Your job cannot terminate cleanly.