Boot log: acer-cbv514-1h-34uz-brya

    1 16:04:30.570467  lava-dispatcher, installed at version: 2023.06
    2 16:04:30.570642  start: 0 validate
    3 16:04:30.570753  Start time: 2023-08-26 16:04:30.570746+00:00 (UTC)
    4 16:04:30.570862  Using caching service: 'http://localhost/cache/?uri=%s'
    5 16:04:30.570980  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 16:04:30.840058  Using caching service: 'http://localhost/cache/?uri=%s'
    7 16:04:30.840729  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.186-cip37-982-g80a0585c0aa62%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 16:04:31.110745  Using caching service: 'http://localhost/cache/?uri=%s'
    9 16:04:31.111343  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.186-cip37-982-g80a0585c0aa62%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 16:04:36.163106  validate duration: 5.59
   12 16:04:36.163733  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 16:04:36.163820  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 16:04:36.163894  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 16:04:36.164012  Not decompressing ramdisk as can be used compressed.
   16 16:04:36.164089  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 16:04:36.164147  saving as /var/lib/lava/dispatcher/tmp/11363393/tftp-deploy-vn2b_ee8/ramdisk/rootfs.cpio.gz
   18 16:04:36.164201  total size: 8418130 (8 MB)
   19 16:04:36.823224  progress   0 % (0 MB)
   20 16:04:36.828338  progress   5 % (0 MB)
   21 16:04:36.829936  progress  10 % (0 MB)
   22 16:04:36.831468  progress  15 % (1 MB)
   23 16:04:36.833002  progress  20 % (1 MB)
   24 16:04:36.834565  progress  25 % (2 MB)
   25 16:04:36.836096  progress  30 % (2 MB)
   26 16:04:36.837545  progress  35 % (2 MB)
   27 16:04:36.839107  progress  40 % (3 MB)
   28 16:04:36.840635  progress  45 % (3 MB)
   29 16:04:36.842209  progress  50 % (4 MB)
   30 16:04:36.843726  progress  55 % (4 MB)
   31 16:04:36.845219  progress  60 % (4 MB)
   32 16:04:36.846623  progress  65 % (5 MB)
   33 16:04:36.848110  progress  70 % (5 MB)
   34 16:04:36.849628  progress  75 % (6 MB)
   35 16:04:36.851146  progress  80 % (6 MB)
   36 16:04:36.852639  progress  85 % (6 MB)
   37 16:04:36.854158  progress  90 % (7 MB)
   38 16:04:36.855651  progress  95 % (7 MB)
   39 16:04:36.857094  progress 100 % (8 MB)
   40 16:04:36.857289  8 MB downloaded in 0.69 s (11.58 MB/s)
   41 16:04:36.857433  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 16:04:36.857630  end: 1.1 download-retry (duration 00:00:01) [common]
   44 16:04:36.857696  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 16:04:36.857758  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 16:04:36.857881  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.186-cip37-982-g80a0585c0aa62/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 16:04:36.858006  saving as /var/lib/lava/dispatcher/tmp/11363393/tftp-deploy-vn2b_ee8/kernel/bzImage
   48 16:04:36.858055  total size: 14015328 (13 MB)
   49 16:04:36.858106  No compression specified
   50 16:04:36.859082  progress   0 % (0 MB)
   51 16:04:36.861685  progress   5 % (0 MB)
   52 16:04:36.864169  progress  10 % (1 MB)
   53 16:04:36.866796  progress  15 % (2 MB)
   54 16:04:36.869286  progress  20 % (2 MB)
   55 16:04:36.871748  progress  25 % (3 MB)
   56 16:04:36.874336  progress  30 % (4 MB)
   57 16:04:36.876759  progress  35 % (4 MB)
   58 16:04:36.879433  progress  40 % (5 MB)
   59 16:04:36.881904  progress  45 % (6 MB)
   60 16:04:36.884347  progress  50 % (6 MB)
   61 16:04:36.886923  progress  55 % (7 MB)
   62 16:04:36.889392  progress  60 % (8 MB)
   63 16:04:36.891936  progress  65 % (8 MB)
   64 16:04:36.894402  progress  70 % (9 MB)
   65 16:04:36.896785  progress  75 % (10 MB)
   66 16:04:36.899298  progress  80 % (10 MB)
   67 16:04:36.901701  progress  85 % (11 MB)
   68 16:04:36.904054  progress  90 % (12 MB)
   69 16:04:36.906612  progress  95 % (12 MB)
   70 16:04:36.908998  progress 100 % (13 MB)
   71 16:04:36.909146  13 MB downloaded in 0.05 s (261.63 MB/s)
   72 16:04:36.909306  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 16:04:36.909493  end: 1.2 download-retry (duration 00:00:00) [common]
   75 16:04:36.909560  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 16:04:36.909624  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 16:04:36.909745  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.186-cip37-982-g80a0585c0aa62/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 16:04:36.909802  saving as /var/lib/lava/dispatcher/tmp/11363393/tftp-deploy-vn2b_ee8/modules/modules.tar
   79 16:04:36.909849  total size: 526960 (0 MB)
   80 16:04:36.909897  Using unxz to decompress xz
   81 16:04:36.913299  progress   6 % (0 MB)
   82 16:04:36.913596  progress  12 % (0 MB)
   83 16:04:36.913783  progress  18 % (0 MB)
   84 16:04:36.915409  progress  24 % (0 MB)
   85 16:04:36.916944  progress  31 % (0 MB)
   86 16:04:36.918595  progress  37 % (0 MB)
   87 16:04:36.920320  progress  43 % (0 MB)
   88 16:04:36.921826  progress  49 % (0 MB)
   89 16:04:36.923560  progress  55 % (0 MB)
   90 16:04:36.925594  progress  62 % (0 MB)
   91 16:04:36.927430  progress  68 % (0 MB)
   92 16:04:36.929165  progress  74 % (0 MB)
   93 16:04:36.930723  progress  80 % (0 MB)
   94 16:04:36.932620  progress  87 % (0 MB)
   95 16:04:36.934290  progress  93 % (0 MB)
   96 16:04:36.935885  progress  99 % (0 MB)
   97 16:04:36.941791  0 MB downloaded in 0.03 s (15.74 MB/s)
   98 16:04:36.941988  end: 1.3.1 http-download (duration 00:00:00) [common]
  100 16:04:36.942214  end: 1.3 download-retry (duration 00:00:00) [common]
  101 16:04:36.942292  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  102 16:04:36.942368  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  103 16:04:36.942445  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  104 16:04:36.942509  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  105 16:04:36.942681  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38
  106 16:04:36.942787  makedir: /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin
  107 16:04:36.942873  makedir: /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/tests
  108 16:04:36.942950  makedir: /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/results
  109 16:04:36.943042  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-add-keys
  110 16:04:36.943164  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-add-sources
  111 16:04:36.943268  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-background-process-start
  112 16:04:36.943368  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-background-process-stop
  113 16:04:36.943479  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-common-functions
  114 16:04:36.943572  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-echo-ipv4
  115 16:04:36.943668  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-install-packages
  116 16:04:36.943763  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-installed-packages
  117 16:04:36.943859  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-os-build
  118 16:04:36.943953  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-probe-channel
  119 16:04:36.944047  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-probe-ip
  120 16:04:36.944140  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-target-ip
  121 16:04:36.944232  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-target-mac
  122 16:04:36.944326  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-target-storage
  123 16:04:36.944423  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-test-case
  124 16:04:36.944517  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-test-event
  125 16:04:36.944609  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-test-feedback
  126 16:04:36.944702  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-test-raise
  127 16:04:36.944795  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-test-reference
  128 16:04:36.944890  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-test-runner
  129 16:04:36.944983  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-test-set
  130 16:04:36.945079  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-test-shell
  131 16:04:36.945174  Updating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-install-packages (oe)
  132 16:04:36.945333  Updating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/bin/lava-installed-packages (oe)
  133 16:04:36.945427  Creating /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/environment
  134 16:04:36.945507  LAVA metadata
  135 16:04:36.945569  - LAVA_JOB_ID=11363393
  136 16:04:36.945621  - LAVA_DISPATCHER_IP=192.168.201.1
  137 16:04:36.945702  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  138 16:04:36.945757  skipped lava-vland-overlay
  139 16:04:36.945821  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  140 16:04:36.945884  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  141 16:04:36.945934  skipped lava-multinode-overlay
  142 16:04:36.945990  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  143 16:04:36.946051  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  144 16:04:36.946108  Loading test definitions
  145 16:04:36.946180  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  146 16:04:36.946241  Using /lava-11363393 at stage 0
  147 16:04:36.946483  uuid=11363393_1.4.2.3.1 testdef=None
  148 16:04:36.946558  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  149 16:04:36.946635  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  150 16:04:36.947045  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  152 16:04:36.947219  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  153 16:04:36.947720  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  155 16:04:36.947898  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  156 16:04:36.948402  runner path: /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/0/tests/0_dmesg test_uuid 11363393_1.4.2.3.1
  157 16:04:36.948526  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  159 16:04:36.948704  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  160 16:04:36.948760  Using /lava-11363393 at stage 1
  161 16:04:36.948985  uuid=11363393_1.4.2.3.5 testdef=None
  162 16:04:36.949054  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  163 16:04:36.949118  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  164 16:04:36.949511  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  166 16:04:36.949679  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  167 16:04:36.950183  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  169 16:04:36.950369  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  170 16:04:36.950898  runner path: /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/1/tests/1_bootrr test_uuid 11363393_1.4.2.3.5
  171 16:04:36.951018  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  173 16:04:36.951177  Creating lava-test-runner.conf files
  174 16:04:36.951224  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/0 for stage 0
  175 16:04:36.951291  - 0_dmesg
  176 16:04:36.951355  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11363393/lava-overlay-27jdta38/lava-11363393/1 for stage 1
  177 16:04:36.951426  - 1_bootrr
  178 16:04:36.951502  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  179 16:04:36.951568  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  180 16:04:36.958227  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  181 16:04:36.958325  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  182 16:04:36.958396  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  183 16:04:36.958465  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  184 16:04:36.958533  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  185 16:04:37.123052  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  186 16:04:37.123389  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  187 16:04:37.123528  extracting modules file /var/lib/lava/dispatcher/tmp/11363393/tftp-deploy-vn2b_ee8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11363393/extract-overlay-ramdisk-dohxafu_/ramdisk
  188 16:04:37.139804  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  189 16:04:37.139940  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  190 16:04:37.140055  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11363393/compress-overlay-wqmj28wx/overlay-1.4.2.4.tar.gz to ramdisk
  191 16:04:37.140115  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11363393/compress-overlay-wqmj28wx/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11363393/extract-overlay-ramdisk-dohxafu_/ramdisk
  192 16:04:37.145895  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  193 16:04:37.145993  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  194 16:04:37.146072  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  195 16:04:37.146144  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  196 16:04:37.146204  Building ramdisk /var/lib/lava/dispatcher/tmp/11363393/extract-overlay-ramdisk-dohxafu_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11363393/extract-overlay-ramdisk-dohxafu_/ramdisk
  197 16:04:37.205716  >> 54148 blocks

  198 16:04:37.985099  rename /var/lib/lava/dispatcher/tmp/11363393/extract-overlay-ramdisk-dohxafu_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11363393/tftp-deploy-vn2b_ee8/ramdisk/ramdisk.cpio.gz
  199 16:04:37.985478  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  200 16:04:37.985600  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  201 16:04:37.985699  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  202 16:04:37.985805  No mkimage arch provided, not using FIT.
  203 16:04:37.985886  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  204 16:04:37.985970  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  205 16:04:37.986056  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  206 16:04:37.986139  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  207 16:04:37.986211  No LXC device requested
  208 16:04:37.986279  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  209 16:04:37.986347  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  210 16:04:37.986419  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  211 16:04:37.986477  Checking files for TFTP limit of 4294967296 bytes.
  212 16:04:37.986786  end: 1 tftp-deploy (duration 00:00:02) [common]
  213 16:04:37.986863  start: 2 depthcharge-action (timeout 00:05:00) [common]
  214 16:04:37.986929  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  215 16:04:37.987022  substitutions:
  216 16:04:37.987075  - {DTB}: None
  217 16:04:37.987124  - {INITRD}: 11363393/tftp-deploy-vn2b_ee8/ramdisk/ramdisk.cpio.gz
  218 16:04:37.987171  - {KERNEL}: 11363393/tftp-deploy-vn2b_ee8/kernel/bzImage
  219 16:04:37.987217  - {LAVA_MAC}: None
  220 16:04:37.987263  - {PRESEED_CONFIG}: None
  221 16:04:37.987308  - {PRESEED_LOCAL}: None
  222 16:04:37.987353  - {RAMDISK}: 11363393/tftp-deploy-vn2b_ee8/ramdisk/ramdisk.cpio.gz
  223 16:04:37.987412  - {ROOT_PART}: None
  224 16:04:37.987456  - {ROOT}: None
  225 16:04:37.987499  - {SERVER_IP}: 192.168.201.1
  226 16:04:37.987542  - {TEE}: None
  227 16:04:37.987588  Parsed boot commands:
  228 16:04:37.987631  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  229 16:04:37.987771  Parsed boot commands: tftpboot 192.168.201.1 11363393/tftp-deploy-vn2b_ee8/kernel/bzImage 11363393/tftp-deploy-vn2b_ee8/kernel/cmdline 11363393/tftp-deploy-vn2b_ee8/ramdisk/ramdisk.cpio.gz
  230 16:04:37.987843  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  231 16:04:37.987909  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  232 16:04:37.987979  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  233 16:04:37.988044  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  234 16:04:37.988098  Not connected, no need to disconnect.
  235 16:04:37.988155  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  236 16:04:37.988217  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  237 16:04:37.988271  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-1'
  238 16:04:37.991020  Setting prompt string to ['lava-test: # ']
  239 16:04:37.991263  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  240 16:04:37.991354  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  241 16:04:37.991433  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  242 16:04:37.991525  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  243 16:04:37.991681  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=reboot'
  244 16:04:43.133675  >> Command sent successfully.

  245 16:04:43.139685  Returned 0 in 5 seconds
  246 16:04:43.240371  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  248 16:04:43.241729  end: 2.2.2 reset-device (duration 00:00:05) [common]
  249 16:04:43.242121  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  250 16:04:43.242441  Setting prompt string to 'Starting depthcharge on Volmar...'
  251 16:04:43.242705  Changing prompt to 'Starting depthcharge on Volmar...'
  252 16:04:43.242974  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  253 16:04:43.243926  [Enter `^Ec?' for help]

  254 16:04:44.611218  

  255 16:04:44.611714  

  256 16:04:44.618799  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  257 16:04:44.622956  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  258 16:04:44.626622  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  259 16:04:44.633865  CPU: AES supported, TXT NOT supported, VT supported

  260 16:04:44.641523  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  261 16:04:44.642012  Cache size = 10 MiB

  262 16:04:44.649303  MCH: device id 4609 (rev 04) is Alderlake-P

  263 16:04:44.653108  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  264 16:04:44.655849  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  265 16:04:44.659746  VBOOT: Loading verstage.

  266 16:04:44.663635  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  267 16:04:44.670544  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  268 16:04:44.673130  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  269 16:04:44.683759  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  270 16:04:44.690339  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  271 16:04:44.690847  

  272 16:04:44.691138  

  273 16:04:44.700579  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  274 16:04:44.703789  Probing TPM I2C: I2C bus 1 version 0x3230302a

  275 16:04:44.707193  DW I2C bus 1 at 0xfe022000 (400 KHz)

  276 16:04:44.711288  done! DID_VID 0x00281ae0

  277 16:04:44.714940  TPM ready after 0 ms

  278 16:04:44.718111  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  279 16:04:44.731595  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  280 16:04:44.737760  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  281 16:04:44.793071  tlcl_send_startup: Startup return code is 0

  282 16:04:44.793584  TPM: setup succeeded

  283 16:04:44.814305  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  284 16:04:44.836765  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  285 16:04:44.840644  Chrome EC: UHEPI supported

  286 16:04:44.843656  Reading cr50 boot mode

  287 16:04:44.858352  Cr50 says boot_mode is VERIFIED_RW(0x00).

  288 16:04:44.858863  Phase 1

  289 16:04:44.865114  FMAP: area GBB found @ 1805000 (458752 bytes)

  290 16:04:44.871803  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  291 16:04:44.878936  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  292 16:04:44.886026  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  293 16:04:44.886564  Phase 2

  294 16:04:44.886867  Phase 3

  295 16:04:44.892958  FMAP: area GBB found @ 1805000 (458752 bytes)

  296 16:04:44.895778  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  297 16:04:44.902479  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  298 16:04:44.908982  VB2:vb2_verify_keyblock() Checking keyblock signature...

  299 16:04:44.916063  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  300 16:04:44.922393  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  301 16:04:44.929109  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  302 16:04:44.944204  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  303 16:04:44.947371  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  304 16:04:44.954271  VB2:vb2_verify_fw_preamble() Verifying preamble.

  305 16:04:44.957758  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  306 16:04:44.964933  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  307 16:04:44.975077  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  308 16:04:44.978322  Phase 4

  309 16:04:44.981652  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  310 16:04:44.988369  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  311 16:04:45.199705  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  312 16:04:45.206324  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  313 16:04:45.209812  Saving vboot hash.

  314 16:04:45.216324  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  315 16:04:45.232783  tlcl_extend: response is 0

  316 16:04:45.239351  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  317 16:04:45.245861  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  318 16:04:45.260150  tlcl_extend: response is 0

  319 16:04:45.266844  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  320 16:04:45.289789  tlcl_lock_nv_write: response is 0

  321 16:04:45.308892  tlcl_lock_nv_write: response is 0

  322 16:04:45.309424  Slot A is selected

  323 16:04:45.315382  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  324 16:04:45.322016  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  325 16:04:45.328533  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  326 16:04:45.335501  BS: verstage times (exec / console): total (unknown) / 257 ms

  327 16:04:45.336002  

  328 16:04:45.336288  

  329 16:04:45.342033  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  330 16:04:45.346239  Google Chrome EC: version:

  331 16:04:45.349370  	ro: volmar_v2.0.14126-e605144e9c

  332 16:04:45.352784  	rw: volmar_v0.0.55-22d1557

  333 16:04:45.356017    running image: 2

  334 16:04:45.359416  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  335 16:04:45.369536  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  336 16:04:45.376058  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  337 16:04:45.382691  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  338 16:04:45.392811  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  339 16:04:45.402307  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  340 16:04:45.405547  EC took 1016us to calculate image hash

  341 16:04:45.416232  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  342 16:04:45.421912  VB2:sync_ec() select_rw=RW(active)

  343 16:04:45.431936  Waited 270us to clear limit power flag.

  344 16:04:45.435527  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  345 16:04:45.438671  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  346 16:04:45.442407  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  347 16:04:45.448739  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  348 16:04:45.452318  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  349 16:04:45.455253  TCO_STS:   0000 0000

  350 16:04:45.458889  GEN_PMCON: d0015038 00002200

  351 16:04:45.462359  GBLRST_CAUSE: 00000000 00000000

  352 16:04:45.462839  HPR_CAUSE0: 00000000

  353 16:04:45.465339  prev_sleep_state 5

  354 16:04:45.468580  Abort disabling TXT, as CPU is not TXT capable.

  355 16:04:45.476815  cse_lite: Number of partitions = 3

  356 16:04:45.480142  cse_lite: Current partition = RO

  357 16:04:45.480641  cse_lite: Next partition = RO

  358 16:04:45.483494  cse_lite: Flags = 0x7

  359 16:04:45.490085  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  360 16:04:45.499709  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  361 16:04:45.502951  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  362 16:04:45.509812  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  363 16:04:45.516605  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  364 16:04:45.522724  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  365 16:04:45.526581  cse_lite: CSE CBFS RW version : 16.1.25.2049

  366 16:04:45.533062  cse_lite: Set Boot Partition Info Command (RW)

  367 16:04:45.536471  HECI: Global Reset(Type:1) Command

  368 16:04:46.956516  &6�v�7l�ock starting (log level: 8)...

  369 16:04:46.959534  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  370 16:04:46.963106  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  371 16:04:46.969737  CPU: AES supported, TXT NOT supported, VT supported

  372 16:04:46.976403  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  373 16:04:46.979420  Cache size = 10 MiB

  374 16:04:46.983018  MCH: device id 4609 (rev 04) is Alderlake-P

  375 16:04:46.989828  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  376 16:04:46.992986  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  377 16:04:46.997055  VBOOT: Loading verstage.

  378 16:04:47.000327  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  379 16:04:47.007652  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  380 16:04:47.010997  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  381 16:04:47.018652  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  382 16:04:47.025135  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  383 16:04:47.029299  

  384 16:04:47.029796  

  385 16:04:47.035750  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  386 16:04:47.042910  Probing TPM I2C: I2C bus 1 version 0x3230302a

  387 16:04:47.045765  DW I2C bus 1 at 0xfe022000 (400 KHz)

  388 16:04:47.048993  done! DID_VID 0x00281ae0

  389 16:04:47.052977  TPM ready after 0 ms

  390 16:04:47.056503  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  391 16:04:47.065139  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  392 16:04:47.072165  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  393 16:04:47.131356  tlcl_send_startup: Startup return code is 0

  394 16:04:47.131834  TPM: setup succeeded

  395 16:04:47.152710  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  396 16:04:47.174512  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  397 16:04:47.178650  Chrome EC: UHEPI supported

  398 16:04:47.181439  Reading cr50 boot mode

  399 16:04:47.196612  Cr50 says boot_mode is VERIFIED_RW(0x00).

  400 16:04:47.197116  Phase 1

  401 16:04:47.203463  FMAP: area GBB found @ 1805000 (458752 bytes)

  402 16:04:47.209506  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  403 16:04:47.216566  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  404 16:04:47.223119  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  405 16:04:47.226787  Phase 2

  406 16:04:47.227279  Phase 3

  407 16:04:47.230022  FMAP: area GBB found @ 1805000 (458752 bytes)

  408 16:04:47.236574  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  409 16:04:47.239972  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  410 16:04:47.246662  VB2:vb2_verify_keyblock() Checking keyblock signature...

  411 16:04:47.253082  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  412 16:04:47.259541  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  413 16:04:47.269818  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  414 16:04:47.281376  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  415 16:04:47.284731  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  416 16:04:47.291470  VB2:vb2_verify_fw_preamble() Verifying preamble.

  417 16:04:47.298513  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  418 16:04:47.305059  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  419 16:04:47.311749  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  420 16:04:47.315764  Phase 4

  421 16:04:47.318825  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  422 16:04:47.325354  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  423 16:04:47.538315  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  424 16:04:47.544604  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  425 16:04:47.548346  Saving vboot hash.

  426 16:04:47.554923  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  427 16:04:47.571256  tlcl_extend: response is 0

  428 16:04:47.577966  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  429 16:04:47.584357  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  430 16:04:47.598931  tlcl_extend: response is 0

  431 16:04:47.605623  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  432 16:04:47.625114  tlcl_lock_nv_write: response is 0

  433 16:04:47.644764  tlcl_lock_nv_write: response is 0

  434 16:04:47.645310  Slot A is selected

  435 16:04:47.651642  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  436 16:04:47.658190  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  437 16:04:47.664712  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  438 16:04:47.671257  BS: verstage times (exec / console): total (unknown) / 257 ms

  439 16:04:47.671757  

  440 16:04:47.672045  

  441 16:04:47.678024  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  442 16:04:47.682405  Google Chrome EC: version:

  443 16:04:47.685899  	ro: volmar_v2.0.14126-e605144e9c

  444 16:04:47.689342  	rw: volmar_v0.0.55-22d1557

  445 16:04:47.692641    running image: 2

  446 16:04:47.695952  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  447 16:04:47.705898  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  448 16:04:47.712488  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  449 16:04:47.719167  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  450 16:04:47.728940  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  451 16:04:47.738767  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  452 16:04:47.745412  EC took 1627us to calculate image hash

  453 16:04:47.756721  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  454 16:04:47.759341  VB2:sync_ec() select_rw=RW(active)

  455 16:04:47.772350  Waited 650us to clear limit power flag.

  456 16:04:47.775596  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  457 16:04:47.778742  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  458 16:04:47.782017  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  459 16:04:47.789096  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  460 16:04:47.792386  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  461 16:04:47.795380  TCO_STS:   0000 0000

  462 16:04:47.799100  GEN_PMCON: d1001038 00002200

  463 16:04:47.802544  GBLRST_CAUSE: 00000040 00000000

  464 16:04:47.803039  HPR_CAUSE0: 00000000

  465 16:04:47.805759  prev_sleep_state 5

  466 16:04:47.812182  Abort disabling TXT, as CPU is not TXT capable.

  467 16:04:47.815656  cse_lite: Number of partitions = 3

  468 16:04:47.818649  cse_lite: Current partition = RW

  469 16:04:47.822361  cse_lite: Next partition = RW

  470 16:04:47.825647  cse_lite: Flags = 0x7

  471 16:04:47.832104  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  472 16:04:47.838583  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  473 16:04:47.845313  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  474 16:04:47.851984  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  475 16:04:47.855095  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  476 16:04:47.865146  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  477 16:04:47.868705  cse_lite: CSE CBFS RW version : 16.1.25.2049

  478 16:04:47.872071  Boot Count incremented to 2218

  479 16:04:47.878777  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  480 16:04:47.885102  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  481 16:04:47.896727  Probing TPM I2C: done! DID_VID 0x00281ae0

  482 16:04:47.900089  Locality already claimed

  483 16:04:47.903113  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  484 16:04:47.922978  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  485 16:04:47.929612  MRC: Hash idx 0x100d comparison successful.

  486 16:04:47.932706  MRC cache found, size f6c8

  487 16:04:47.933241  bootmode is set to: 2

  488 16:04:47.937608  EC returned error result code 3

  489 16:04:47.941703  FW_CONFIG value from CBI is 0x131

  490 16:04:47.947873  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  491 16:04:47.951235  SPD index = 0

  492 16:04:47.957472  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  493 16:04:47.957974  SPD: module type is LPDDR4X

  494 16:04:47.965012  SPD: module part number is K4U6E3S4AB-MGCL

  495 16:04:47.971590  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  496 16:04:47.975077  SPD: device width 16 bits, bus width 16 bits

  497 16:04:47.977945  SPD: module size is 1024 MB (per channel)

  498 16:04:48.046814  CBMEM:

  499 16:04:48.050074  IMD: root @ 0x76fff000 254 entries.

  500 16:04:48.053103  IMD: root @ 0x76ffec00 62 entries.

  501 16:04:48.061483  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  502 16:04:48.064850  RO_VPD is uninitialized or empty.

  503 16:04:48.067637  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  504 16:04:48.071390  RW_VPD is uninitialized or empty.

  505 16:04:48.077667  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  506 16:04:48.081262  External stage cache:

  507 16:04:48.084478  IMD: root @ 0x7bbff000 254 entries.

  508 16:04:48.087676  IMD: root @ 0x7bbfec00 62 entries.

  509 16:04:48.094851  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  510 16:04:48.101337  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  511 16:04:48.104810  MRC: 'RW_MRC_CACHE' does not need update.

  512 16:04:48.105340  8 DIMMs found

  513 16:04:48.108009  SMM Memory Map

  514 16:04:48.111335  SMRAM       : 0x7b800000 0x800000

  515 16:04:48.114584   Subregion 0: 0x7b800000 0x200000

  516 16:04:48.117596   Subregion 1: 0x7ba00000 0x200000

  517 16:04:48.120870   Subregion 2: 0x7bc00000 0x400000

  518 16:04:48.124778  top_of_ram = 0x77000000

  519 16:04:48.127972  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  520 16:04:48.134635  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  521 16:04:48.141775  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  522 16:04:48.144541  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  523 16:04:48.145044  Normal boot

  524 16:04:48.154841  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  525 16:04:48.161316  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  526 16:04:48.167575  Processing 237 relocs. Offset value of 0x74ab9000

  527 16:04:48.176069  BS: romstage times (exec / console): total (unknown) / 381 ms

  528 16:04:48.183120  

  529 16:04:48.183642  

  530 16:04:48.189912  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  531 16:04:48.190418  Normal boot

  532 16:04:48.196761  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  533 16:04:48.203588  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  534 16:04:48.209804  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  535 16:04:48.219774  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  536 16:04:48.268952  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  537 16:04:48.275535  Processing 5931 relocs. Offset value of 0x72a2f000

  538 16:04:48.278539  BS: postcar times (exec / console): total (unknown) / 51 ms

  539 16:04:48.279037  

  540 16:04:48.281880  

  541 16:04:48.288531  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  542 16:04:48.292116  Reserving BERT start 76a1e000, size 10000

  543 16:04:48.295240  Normal boot

  544 16:04:48.298552  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  545 16:04:48.305589  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  546 16:04:48.315288  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  547 16:04:48.318405  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  548 16:04:48.321934  Google Chrome EC: version:

  549 16:04:48.325282  	ro: volmar_v2.0.14126-e605144e9c

  550 16:04:48.328951  	rw: volmar_v0.0.55-22d1557

  551 16:04:48.329498    running image: 2

  552 16:04:48.332295  ACPI _SWS is PM1 Index 8 GPE Index -1

  553 16:04:48.339164  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  554 16:04:48.342339  EC returned error result code 3

  555 16:04:48.345855  FW_CONFIG value from CBI is 0x131

  556 16:04:48.352516  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  557 16:04:48.355836  PCI: 00:1c.2 disabled by fw_config

  558 16:04:48.362359  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  559 16:04:48.365874  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  560 16:04:48.372788  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  561 16:04:48.375797  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  562 16:04:48.382872  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  563 16:04:48.389308  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  564 16:04:48.396128  microcode: sig=0x906a4 pf=0x80 revision=0x423

  565 16:04:48.399293  microcode: Update skipped, already up-to-date

  566 16:04:48.406154  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  567 16:04:48.438271  Detected 6 core, 8 thread CPU.

  568 16:04:48.441800  Setting up SMI for CPU

  569 16:04:48.444682  IED base = 0x7bc00000

  570 16:04:48.445173  IED size = 0x00400000

  571 16:04:48.448276  Will perform SMM setup.

  572 16:04:48.451671  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  573 16:04:48.454911  LAPIC 0x0 in XAPIC mode.

  574 16:04:48.464655  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  575 16:04:48.468070  Processing 18 relocs. Offset value of 0x00030000

  576 16:04:48.472862  Attempting to start 7 APs

  577 16:04:48.475957  Waiting for 10ms after sending INIT.

  578 16:04:48.488923  Waiting for SIPI to complete...

  579 16:04:48.492874  LAPIC 0x1 in XAPIC mode.

  580 16:04:48.496142  LAPIC 0x14 in XAPIC mode.

  581 16:04:48.499168  LAPIC 0x9 in XAPIC mode.

  582 16:04:48.502361  LAPIC 0x10 in XAPIC mode.

  583 16:04:48.502860  LAPIC 0x12 in XAPIC mode.

  584 16:04:48.505837  LAPIC 0x16 in XAPIC mode.

  585 16:04:48.508887  LAPIC 0x8 in XAPIC mode.

  586 16:04:48.512181  AP: slot 7 apic_id 9, MCU rev: 0x00000423

  587 16:04:48.518967  AP: slot 1 apic_id 12, MCU rev: 0x00000423

  588 16:04:48.522757  AP: slot 6 apic_id 8, MCU rev: 0x00000423

  589 16:04:48.525619  AP: slot 4 apic_id 10, MCU rev: 0x00000423

  590 16:04:48.528973  AP: slot 2 apic_id 14, MCU rev: 0x00000423

  591 16:04:48.535536  AP: slot 3 apic_id 16, MCU rev: 0x00000423

  592 16:04:48.538518  AP: slot 5 apic_id 1, MCU rev: 0x00000423

  593 16:04:48.538917  done.

  594 16:04:48.542211  Waiting for SIPI to complete...

  595 16:04:48.542748  done.

  596 16:04:48.545374  smm_setup_relocation_handler: enter

  597 16:04:48.548665  smm_setup_relocation_handler: exit

  598 16:04:48.558644  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  599 16:04:48.561864  Processing 11 relocs. Offset value of 0x00038000

  600 16:04:48.568493  smm_module_setup_stub: stack_top = 0x7b804000

  601 16:04:48.571891  smm_module_setup_stub: per cpu stack_size = 0x800

  602 16:04:48.578735  smm_module_setup_stub: runtime.start32_offset = 0x4c

  603 16:04:48.581389  smm_module_setup_stub: runtime.smm_size = 0x10000

  604 16:04:48.589103  SMM Module: stub loaded at 38000. Will call 0x76a52094

  605 16:04:48.592243  Installing permanent SMM handler to 0x7b800000

  606 16:04:48.598491  smm_load_module: total_smm_space_needed e468, available -> 200000

  607 16:04:48.608320  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  608 16:04:48.611394  Processing 255 relocs. Offset value of 0x7b9f6000

  609 16:04:48.618228  smm_load_module: smram_start: 0x7b800000

  610 16:04:48.622110  smm_load_module: smram_end: 7ba00000

  611 16:04:48.624811  smm_load_module: handler start 0x7b9f6d5f

  612 16:04:48.628191  smm_load_module: handler_size 98d0

  613 16:04:48.631488  smm_load_module: fxsave_area 0x7b9ff000

  614 16:04:48.635057  smm_load_module: fxsave_size 1000

  615 16:04:48.641869  smm_load_module: CONFIG_MSEG_SIZE 0x0

  616 16:04:48.644935  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  617 16:04:48.651466  smm_load_module: handler_mod_params.smbase = 0x7b800000

  618 16:04:48.654786  smm_load_module: per_cpu_save_state_size = 0x400

  619 16:04:48.658334  smm_load_module: num_cpus = 0x8

  620 16:04:48.664861  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  621 16:04:48.668217  smm_load_module: total_save_state_size = 0x2000

  622 16:04:48.674565  smm_load_module: cpu0 entry: 7b9e6000

  623 16:04:48.677918  smm_create_map: cpus allowed in one segment 30

  624 16:04:48.681403  smm_create_map: min # of segments needed 1

  625 16:04:48.684295  CPU 0x0

  626 16:04:48.688138      smbase 7b9e6000  entry 7b9ee000

  627 16:04:48.691116             ss_start 7b9f5c00  code_end 7b9ee208

  628 16:04:48.691517  CPU 0x1

  629 16:04:48.694597      smbase 7b9e5c00  entry 7b9edc00

  630 16:04:48.701407             ss_start 7b9f5800  code_end 7b9ede08

  631 16:04:48.701904  CPU 0x2

  632 16:04:48.704883      smbase 7b9e5800  entry 7b9ed800

  633 16:04:48.711183             ss_start 7b9f5400  code_end 7b9eda08

  634 16:04:48.711683  CPU 0x3

  635 16:04:48.714580      smbase 7b9e5400  entry 7b9ed400

  636 16:04:48.717483             ss_start 7b9f5000  code_end 7b9ed608

  637 16:04:48.720921  CPU 0x4

  638 16:04:48.724472      smbase 7b9e5000  entry 7b9ed000

  639 16:04:48.727604             ss_start 7b9f4c00  code_end 7b9ed208

  640 16:04:48.731007  CPU 0x5

  641 16:04:48.734228      smbase 7b9e4c00  entry 7b9ecc00

  642 16:04:48.737776             ss_start 7b9f4800  code_end 7b9ece08

  643 16:04:48.738278  CPU 0x6

  644 16:04:48.740918      smbase 7b9e4800  entry 7b9ec800

  645 16:04:48.747872             ss_start 7b9f4400  code_end 7b9eca08

  646 16:04:48.748371  CPU 0x7

  647 16:04:48.751326      smbase 7b9e4400  entry 7b9ec400

  648 16:04:48.757941             ss_start 7b9f4000  code_end 7b9ec608

  649 16:04:48.764581  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  650 16:04:48.770694  Processing 11 relocs. Offset value of 0x7b9ee000

  651 16:04:48.774410  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  652 16:04:48.780948  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  653 16:04:48.788107  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  654 16:04:48.794254  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  655 16:04:48.801002  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  656 16:04:48.807449  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  657 16:04:48.813806  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  658 16:04:48.817143  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  659 16:04:48.824085  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  660 16:04:48.830440  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  661 16:04:48.837183  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  662 16:04:48.843779  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  663 16:04:48.850398  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  664 16:04:48.857192  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  665 16:04:48.863484  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  666 16:04:48.867410  smm_module_setup_stub: stack_top = 0x7b804000

  667 16:04:48.873714  smm_module_setup_stub: per cpu stack_size = 0x800

  668 16:04:48.877109  smm_module_setup_stub: runtime.start32_offset = 0x4c

  669 16:04:48.883680  smm_module_setup_stub: runtime.smm_size = 0x200000

  670 16:04:48.890343  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  671 16:04:48.893738  Clearing SMI status registers

  672 16:04:48.897546  SMI_STS: PM1 

  673 16:04:48.898043  PM1_STS: WAK PWRBTN 

  674 16:04:48.903709  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  675 16:04:48.907211  In relocation handler: CPU 0

  676 16:04:48.913808  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  677 16:04:48.917173  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  678 16:04:48.920622  Relocation complete.

  679 16:04:48.926975  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  680 16:04:48.930511  In relocation handler: CPU 5

  681 16:04:48.933722  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  682 16:04:48.937083  Relocation complete.

  683 16:04:48.944045  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  684 16:04:48.946873  In relocation handler: CPU 3

  685 16:04:48.950379  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  686 16:04:48.953582  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  687 16:04:48.956930  Relocation complete.

  688 16:04:48.963489  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  689 16:04:48.966620  In relocation handler: CPU 4

  690 16:04:48.970150  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  691 16:04:48.977103  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  692 16:04:48.977653  Relocation complete.

  693 16:04:48.986891  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  694 16:04:48.987388  In relocation handler: CPU 2

  695 16:04:48.993387  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  696 16:04:48.996383  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  697 16:04:48.999872  Relocation complete.

  698 16:04:49.006574  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  699 16:04:49.009932  In relocation handler: CPU 1

  700 16:04:49.013259  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  701 16:04:49.019847  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  702 16:04:49.020344  Relocation complete.

  703 16:04:49.026573  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  704 16:04:49.029861  In relocation handler: CPU 7

  705 16:04:49.033145  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  706 16:04:49.036358  Relocation complete.

  707 16:04:49.042960  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  708 16:04:49.046389  In relocation handler: CPU 6

  709 16:04:49.049587  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  710 16:04:49.056193  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  711 16:04:49.059683  Relocation complete.

  712 16:04:49.060183  Initializing CPU #0

  713 16:04:49.062978  CPU: vendor Intel device 906a4

  714 16:04:49.066574  CPU: family 06, model 9a, stepping 04

  715 16:04:49.069437  Clearing out pending MCEs

  716 16:04:49.072882  cpu: energy policy set to 7

  717 16:04:49.076653  Turbo is available but hidden

  718 16:04:49.079623  Turbo is available and visible

  719 16:04:49.082727  microcode: Update skipped, already up-to-date

  720 16:04:49.085846  CPU #0 initialized

  721 16:04:49.086248  Initializing CPU #5

  722 16:04:49.089120  Initializing CPU #3

  723 16:04:49.092402  Initializing CPU #1

  724 16:04:49.096006  CPU: vendor Intel device 906a4

  725 16:04:49.099886  CPU: family 06, model 9a, stepping 04

  726 16:04:49.100387  Initializing CPU #4

  727 16:04:49.102660  Initializing CPU #2

  728 16:04:49.106071  Clearing out pending MCEs

  729 16:04:49.109362  CPU: vendor Intel device 906a4

  730 16:04:49.112451  CPU: family 06, model 9a, stepping 04

  731 16:04:49.112931  Initializing CPU #6

  732 16:04:49.115923  Clearing out pending MCEs

  733 16:04:49.119520  CPU: vendor Intel device 906a4

  734 16:04:49.122690  CPU: family 06, model 9a, stepping 04

  735 16:04:49.125944  CPU: vendor Intel device 906a4

  736 16:04:49.129388  CPU: family 06, model 9a, stepping 04

  737 16:04:49.132699  CPU: vendor Intel device 906a4

  738 16:04:49.136054  CPU: family 06, model 9a, stepping 04

  739 16:04:49.139083  cpu: energy policy set to 7

  740 16:04:49.142218  Clearing out pending MCEs

  741 16:04:49.145959  Clearing out pending MCEs

  742 16:04:49.149351  Clearing out pending MCEs

  743 16:04:49.152691  microcode: Update skipped, already up-to-date

  744 16:04:49.155949  CPU #3 initialized

  745 16:04:49.159375  cpu: energy policy set to 7

  746 16:04:49.159874  cpu: energy policy set to 7

  747 16:04:49.162489  cpu: energy policy set to 7

  748 16:04:49.168950  microcode: Update skipped, already up-to-date

  749 16:04:49.169496  CPU #2 initialized

  750 16:04:49.175875  microcode: Update skipped, already up-to-date

  751 16:04:49.176371  CPU #1 initialized

  752 16:04:49.182272  microcode: Update skipped, already up-to-date

  753 16:04:49.182771  CPU #4 initialized

  754 16:04:49.185324  Initializing CPU #7

  755 16:04:49.189088  CPU: vendor Intel device 906a4

  756 16:04:49.192284  CPU: family 06, model 9a, stepping 04

  757 16:04:49.195726  CPU: vendor Intel device 906a4

  758 16:04:49.198959  CPU: family 06, model 9a, stepping 04

  759 16:04:49.202547  cpu: energy policy set to 7

  760 16:04:49.205557  Clearing out pending MCEs

  761 16:04:49.206073  Clearing out pending MCEs

  762 16:04:49.208812  cpu: energy policy set to 7

  763 16:04:49.211872  cpu: energy policy set to 7

  764 16:04:49.215129  microcode: Update skipped, already up-to-date

  765 16:04:49.218741  CPU #6 initialized

  766 16:04:49.222036  microcode: Update skipped, already up-to-date

  767 16:04:49.225687  CPU #7 initialized

  768 16:04:49.229160  microcode: Update skipped, already up-to-date

  769 16:04:49.232282  CPU #5 initialized

  770 16:04:49.235230  bsp_do_flight_plan done after 688 msecs.

  771 16:04:49.238780  CPU: frequency set to 4400 MHz

  772 16:04:49.242037  Enabling SMIs.

  773 16:04:49.248702  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms

  774 16:04:49.263349  Probing TPM I2C: done! DID_VID 0x00281ae0

  775 16:04:49.266828  Locality already claimed

  776 16:04:49.270040  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  777 16:04:49.281593  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  778 16:04:49.284926  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  779 16:04:49.291726  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  780 16:04:49.298816  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  781 16:04:49.301662  Found a VBT of 9216 bytes after decompression

  782 16:04:49.304821  PCI  1.0, PIN A, using IRQ #16

  783 16:04:49.308353  PCI  2.0, PIN A, using IRQ #17

  784 16:04:49.311217  PCI  4.0, PIN A, using IRQ #18

  785 16:04:49.314606  PCI  5.0, PIN A, using IRQ #16

  786 16:04:49.318153  PCI  6.0, PIN A, using IRQ #16

  787 16:04:49.321180  PCI  6.2, PIN C, using IRQ #18

  788 16:04:49.325248  PCI  7.0, PIN A, using IRQ #19

  789 16:04:49.327844  PCI  7.1, PIN B, using IRQ #20

  790 16:04:49.331303  PCI  7.2, PIN C, using IRQ #21

  791 16:04:49.334439  PCI  7.3, PIN D, using IRQ #22

  792 16:04:49.337906  PCI  8.0, PIN A, using IRQ #23

  793 16:04:49.341123  PCI  D.0, PIN A, using IRQ #17

  794 16:04:49.344277  PCI  D.1, PIN B, using IRQ #19

  795 16:04:49.344690  PCI 10.0, PIN A, using IRQ #24

  796 16:04:49.348040  PCI 10.1, PIN B, using IRQ #25

  797 16:04:49.351495  PCI 10.6, PIN C, using IRQ #20

  798 16:04:49.354712  PCI 10.7, PIN D, using IRQ #21

  799 16:04:49.357918  PCI 11.0, PIN A, using IRQ #26

  800 16:04:49.361371  PCI 11.1, PIN B, using IRQ #27

  801 16:04:49.364586  PCI 11.2, PIN C, using IRQ #28

  802 16:04:49.368064  PCI 11.3, PIN D, using IRQ #29

  803 16:04:49.371080  PCI 12.0, PIN A, using IRQ #30

  804 16:04:49.374639  PCI 12.6, PIN B, using IRQ #31

  805 16:04:49.377916  PCI 12.7, PIN C, using IRQ #22

  806 16:04:49.381599  PCI 13.0, PIN A, using IRQ #32

  807 16:04:49.384714  PCI 13.1, PIN B, using IRQ #33

  808 16:04:49.387977  PCI 13.2, PIN C, using IRQ #34

  809 16:04:49.391302  PCI 13.3, PIN D, using IRQ #35

  810 16:04:49.394492  PCI 14.0, PIN B, using IRQ #23

  811 16:04:49.397729  PCI 14.1, PIN A, using IRQ #36

  812 16:04:49.401162  PCI 14.3, PIN C, using IRQ #17

  813 16:04:49.401695  PCI 15.0, PIN A, using IRQ #37

  814 16:04:49.404526  PCI 15.1, PIN B, using IRQ #38

  815 16:04:49.407613  PCI 15.2, PIN C, using IRQ #39

  816 16:04:49.411346  PCI 15.3, PIN D, using IRQ #40

  817 16:04:49.413841  PCI 16.0, PIN A, using IRQ #18

  818 16:04:49.417587  PCI 16.1, PIN B, using IRQ #19

  819 16:04:49.421070  PCI 16.2, PIN C, using IRQ #20

  820 16:04:49.424614  PCI 16.3, PIN D, using IRQ #21

  821 16:04:49.427607  PCI 16.4, PIN A, using IRQ #18

  822 16:04:49.430641  PCI 16.5, PIN B, using IRQ #19

  823 16:04:49.434108  PCI 17.0, PIN A, using IRQ #22

  824 16:04:49.437664  PCI 19.0, PIN A, using IRQ #41

  825 16:04:49.440641  PCI 19.1, PIN B, using IRQ #42

  826 16:04:49.443855  PCI 19.2, PIN C, using IRQ #43

  827 16:04:49.447730  PCI 1C.0, PIN A, using IRQ #16

  828 16:04:49.450955  PCI 1C.1, PIN B, using IRQ #17

  829 16:04:49.451458  PCI 1C.2, PIN C, using IRQ #18

  830 16:04:49.454775  PCI 1C.3, PIN D, using IRQ #19

  831 16:04:49.457265  PCI 1C.4, PIN A, using IRQ #16

  832 16:04:49.460634  PCI 1C.5, PIN B, using IRQ #17

  833 16:04:49.464176  PCI 1C.6, PIN C, using IRQ #18

  834 16:04:49.467664  PCI 1C.7, PIN D, using IRQ #19

  835 16:04:49.471180  PCI 1D.0, PIN A, using IRQ #16

  836 16:04:49.474478  PCI 1D.1, PIN B, using IRQ #17

  837 16:04:49.477662  PCI 1D.2, PIN C, using IRQ #18

  838 16:04:49.480944  PCI 1D.3, PIN D, using IRQ #19

  839 16:04:49.484220  PCI 1E.0, PIN A, using IRQ #23

  840 16:04:49.487541  PCI 1E.1, PIN B, using IRQ #20

  841 16:04:49.490719  PCI 1E.2, PIN C, using IRQ #44

  842 16:04:49.494085  PCI 1E.3, PIN D, using IRQ #45

  843 16:04:49.497464  PCI 1F.3, PIN B, using IRQ #22

  844 16:04:49.500981  PCI 1F.4, PIN C, using IRQ #23

  845 16:04:49.504425  PCI 1F.6, PIN D, using IRQ #20

  846 16:04:49.504925  PCI 1F.7, PIN A, using IRQ #21

  847 16:04:49.510884  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  848 16:04:49.517470  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  849 16:04:49.693262  FSPS returned 0

  850 16:04:49.696320  Executing Phase 1 of FspMultiPhaseSiInit

  851 16:04:49.706435  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  852 16:04:49.709497  port C0 DISC req: usage 1 usb3 1 usb2 1

  853 16:04:49.713021  Raw Buffer output 0 00000111

  854 16:04:49.716324  Raw Buffer output 1 00000000

  855 16:04:49.719804  pmc_send_ipc_cmd succeeded

  856 16:04:49.726146  port C1 DISC req: usage 1 usb3 3 usb2 3

  857 16:04:49.726642  Raw Buffer output 0 00000331

  858 16:04:49.729751  Raw Buffer output 1 00000000

  859 16:04:49.733984  pmc_send_ipc_cmd succeeded

  860 16:04:49.737799  Detected 6 core, 8 thread CPU.

  861 16:04:49.740722  Detected 6 core, 8 thread CPU.

  862 16:04:49.746362  Detected 6 core, 8 thread CPU.

  863 16:04:49.749615  Detected 6 core, 8 thread CPU.

  864 16:04:49.753319  Detected 6 core, 8 thread CPU.

  865 16:04:49.756276  Detected 6 core, 8 thread CPU.

  866 16:04:49.759840  Detected 6 core, 8 thread CPU.

  867 16:04:49.762818  Detected 6 core, 8 thread CPU.

  868 16:04:49.765955  Detected 6 core, 8 thread CPU.

  869 16:04:49.769550  Detected 6 core, 8 thread CPU.

  870 16:04:49.772735  Detected 6 core, 8 thread CPU.

  871 16:04:49.776429  Detected 6 core, 8 thread CPU.

  872 16:04:49.779657  Detected 6 core, 8 thread CPU.

  873 16:04:49.783281  Detected 6 core, 8 thread CPU.

  874 16:04:49.785839  Detected 6 core, 8 thread CPU.

  875 16:04:49.789773  Detected 6 core, 8 thread CPU.

  876 16:04:49.792789  Detected 6 core, 8 thread CPU.

  877 16:04:49.796157  Detected 6 core, 8 thread CPU.

  878 16:04:49.800028  Detected 6 core, 8 thread CPU.

  879 16:04:49.802925  Detected 6 core, 8 thread CPU.

  880 16:04:49.806042  Detected 6 core, 8 thread CPU.

  881 16:04:49.809241  Detected 6 core, 8 thread CPU.

  882 16:04:50.090060  Detected 6 core, 8 thread CPU.

  883 16:04:50.093241  Detected 6 core, 8 thread CPU.

  884 16:04:50.096345  Detected 6 core, 8 thread CPU.

  885 16:04:50.099982  Detected 6 core, 8 thread CPU.

  886 16:04:50.103361  Detected 6 core, 8 thread CPU.

  887 16:04:50.106397  Detected 6 core, 8 thread CPU.

  888 16:04:50.109877  Detected 6 core, 8 thread CPU.

  889 16:04:50.112947  Detected 6 core, 8 thread CPU.

  890 16:04:50.116126  Detected 6 core, 8 thread CPU.

  891 16:04:50.119960  Detected 6 core, 8 thread CPU.

  892 16:04:50.122849  Detected 6 core, 8 thread CPU.

  893 16:04:50.126465  Detected 6 core, 8 thread CPU.

  894 16:04:50.129733  Detected 6 core, 8 thread CPU.

  895 16:04:50.133016  Detected 6 core, 8 thread CPU.

  896 16:04:50.136197  Detected 6 core, 8 thread CPU.

  897 16:04:50.139540  Detected 6 core, 8 thread CPU.

  898 16:04:50.143086  Detected 6 core, 8 thread CPU.

  899 16:04:50.146269  Detected 6 core, 8 thread CPU.

  900 16:04:50.149594  Detected 6 core, 8 thread CPU.

  901 16:04:50.153005  Detected 6 core, 8 thread CPU.

  902 16:04:50.156179  Display FSP Version Info HOB

  903 16:04:50.159949  Reference Code - CPU = c.0.65.70

  904 16:04:50.160464  uCode Version = 0.0.4.23

  905 16:04:50.162920  TXT ACM version = ff.ff.ff.ffff

  906 16:04:50.166152  Reference Code - ME = c.0.65.70

  907 16:04:50.169725  MEBx version = 0.0.0.0

  908 16:04:50.172671  ME Firmware Version = Lite SKU

  909 16:04:50.176158  Reference Code - PCH = c.0.65.70

  910 16:04:50.179189  PCH-CRID Status = Disabled

  911 16:04:50.182805  PCH-CRID Original Value = ff.ff.ff.ffff

  912 16:04:50.185777  PCH-CRID New Value = ff.ff.ff.ffff

  913 16:04:50.189664  OPROM - RST - RAID = ff.ff.ff.ffff

  914 16:04:50.192969  PCH Hsio Version = 4.0.0.0

  915 16:04:50.196105  Reference Code - SA - System Agent = c.0.65.70

  916 16:04:50.199495  Reference Code - MRC = 0.0.3.80

  917 16:04:50.202825  SA - PCIe Version = c.0.65.70

  918 16:04:50.206008  SA-CRID Status = Disabled

  919 16:04:50.209317  SA-CRID Original Value = 0.0.0.4

  920 16:04:50.212807  SA-CRID New Value = 0.0.0.4

  921 16:04:50.215989  OPROM - VBIOS = ff.ff.ff.ffff

  922 16:04:50.219229  IO Manageability Engine FW Version = 24.0.4.0

  923 16:04:50.222507  PHY Build Version = 0.0.0.2016

  924 16:04:50.225953  Thunderbolt(TM) FW Version = 0.0.0.0

  925 16:04:50.232675  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  926 16:04:50.239325  BS: BS_DEV_INIT_CHIPS run times (exec / console): 477 / 507 ms

  927 16:04:50.242493  Enumerating buses...

  928 16:04:50.245912  Show all devs... Before device enumeration.

  929 16:04:50.249036  Root Device: enabled 1

  930 16:04:50.249462  CPU_CLUSTER: 0: enabled 1

  931 16:04:50.252877  DOMAIN: 0000: enabled 1

  932 16:04:50.255877  GPIO: 0: enabled 1

  933 16:04:50.259033  PCI: 00:00.0: enabled 1

  934 16:04:50.259546  PCI: 00:01.0: enabled 0

  935 16:04:50.262331  PCI: 00:01.1: enabled 0

  936 16:04:50.265838  PCI: 00:02.0: enabled 1

  937 16:04:50.266346  PCI: 00:04.0: enabled 1

  938 16:04:50.269192  PCI: 00:05.0: enabled 0

  939 16:04:50.272616  PCI: 00:06.0: enabled 1

  940 16:04:50.275687  PCI: 00:06.2: enabled 0

  941 16:04:50.276185  PCI: 00:07.0: enabled 0

  942 16:04:50.279165  PCI: 00:07.1: enabled 0

  943 16:04:50.282362  PCI: 00:07.2: enabled 0

  944 16:04:50.285789  PCI: 00:07.3: enabled 0

  945 16:04:50.286286  PCI: 00:08.0: enabled 0

  946 16:04:50.288988  PCI: 00:09.0: enabled 0

  947 16:04:50.292371  PCI: 00:0a.0: enabled 1

  948 16:04:50.295795  PCI: 00:0d.0: enabled 1

  949 16:04:50.296286  PCI: 00:0d.1: enabled 0

  950 16:04:50.299178  PCI: 00:0d.2: enabled 0

  951 16:04:50.302350  PCI: 00:0d.3: enabled 0

  952 16:04:50.305857  PCI: 00:0e.0: enabled 0

  953 16:04:50.306361  PCI: 00:10.0: enabled 0

  954 16:04:50.309159  PCI: 00:10.1: enabled 0

  955 16:04:50.312766  PCI: 00:10.6: enabled 0

  956 16:04:50.313300  PCI: 00:10.7: enabled 0

  957 16:04:50.315424  PCI: 00:12.0: enabled 0

  958 16:04:50.319116  PCI: 00:12.6: enabled 0

  959 16:04:50.322466  PCI: 00:12.7: enabled 0

  960 16:04:50.322873  PCI: 00:13.0: enabled 0

  961 16:04:50.325746  PCI: 00:14.0: enabled 1

  962 16:04:50.329548  PCI: 00:14.1: enabled 0

  963 16:04:50.332471  PCI: 00:14.2: enabled 1

  964 16:04:50.332968  PCI: 00:14.3: enabled 1

  965 16:04:50.335941  PCI: 00:15.0: enabled 1

  966 16:04:50.339184  PCI: 00:15.1: enabled 1

  967 16:04:50.342731  PCI: 00:15.2: enabled 0

  968 16:04:50.343220  PCI: 00:15.3: enabled 1

  969 16:04:50.345667  PCI: 00:16.0: enabled 1

  970 16:04:50.349091  PCI: 00:16.1: enabled 0

  971 16:04:50.349597  PCI: 00:16.2: enabled 0

  972 16:04:50.352451  PCI: 00:16.3: enabled 0

  973 16:04:50.355980  PCI: 00:16.4: enabled 0

  974 16:04:50.359136  PCI: 00:16.5: enabled 0

  975 16:04:50.359635  PCI: 00:17.0: enabled 1

  976 16:04:50.362237  PCI: 00:19.0: enabled 0

  977 16:04:50.365690  PCI: 00:19.1: enabled 1

  978 16:04:50.368665  PCI: 00:19.2: enabled 0

  979 16:04:50.369059  PCI: 00:1a.0: enabled 0

  980 16:04:50.372368  PCI: 00:1c.0: enabled 0

  981 16:04:50.375522  PCI: 00:1c.1: enabled 0

  982 16:04:50.378828  PCI: 00:1c.2: enabled 0

  983 16:04:50.379302  PCI: 00:1c.3: enabled 0

  984 16:04:50.381841  PCI: 00:1c.4: enabled 0

  985 16:04:50.385303  PCI: 00:1c.5: enabled 0

  986 16:04:50.388625  PCI: 00:1c.6: enabled 0

  987 16:04:50.388982  PCI: 00:1c.7: enabled 0

  988 16:04:50.392163  PCI: 00:1d.0: enabled 0

  989 16:04:50.395291  PCI: 00:1d.1: enabled 0

  990 16:04:50.395786  PCI: 00:1d.2: enabled 0

  991 16:04:50.398691  PCI: 00:1d.3: enabled 0

  992 16:04:50.401939  PCI: 00:1e.0: enabled 1

  993 16:04:50.405515  PCI: 00:1e.1: enabled 0

  994 16:04:50.406009  PCI: 00:1e.2: enabled 0

  995 16:04:50.408753  PCI: 00:1e.3: enabled 1

  996 16:04:50.412228  PCI: 00:1f.0: enabled 1

  997 16:04:50.415513  PCI: 00:1f.1: enabled 0

  998 16:04:50.416011  PCI: 00:1f.2: enabled 1

  999 16:04:50.418714  PCI: 00:1f.3: enabled 1

 1000 16:04:50.421866  PCI: 00:1f.4: enabled 0

 1001 16:04:50.425258  PCI: 00:1f.5: enabled 1

 1002 16:04:50.425772  PCI: 00:1f.6: enabled 0

 1003 16:04:50.428610  PCI: 00:1f.7: enabled 0

 1004 16:04:50.432013  GENERIC: 0.0: enabled 1

 1005 16:04:50.435331  GENERIC: 0.0: enabled 1

 1006 16:04:50.435831  GENERIC: 1.0: enabled 1

 1007 16:04:50.438535  GENERIC: 0.0: enabled 1

 1008 16:04:50.441657  GENERIC: 1.0: enabled 1

 1009 16:04:50.442059  USB0 port 0: enabled 1

 1010 16:04:50.445025  USB0 port 0: enabled 1

 1011 16:04:50.448484  GENERIC: 0.0: enabled 1

 1012 16:04:50.451692  I2C: 00:1a: enabled 1

 1013 16:04:50.452189  I2C: 00:31: enabled 1

 1014 16:04:50.455140  I2C: 00:32: enabled 1

 1015 16:04:50.458520  I2C: 00:50: enabled 1

 1016 16:04:50.459005  I2C: 00:10: enabled 1

 1017 16:04:50.461650  I2C: 00:15: enabled 1

 1018 16:04:50.464949  I2C: 00:2c: enabled 1

 1019 16:04:50.465485  GENERIC: 0.0: enabled 1

 1020 16:04:50.468473  SPI: 00: enabled 1

 1021 16:04:50.471801  PNP: 0c09.0: enabled 1

 1022 16:04:50.472290  GENERIC: 0.0: enabled 1

 1023 16:04:50.475238  USB3 port 0: enabled 1

 1024 16:04:50.478721  USB3 port 1: enabled 0

 1025 16:04:50.479238  USB3 port 2: enabled 1

 1026 16:04:50.481911  USB3 port 3: enabled 0

 1027 16:04:50.484744  USB2 port 0: enabled 1

 1028 16:04:50.488336  USB2 port 1: enabled 0

 1029 16:04:50.488836  USB2 port 2: enabled 1

 1030 16:04:50.491839  USB2 port 3: enabled 0

 1031 16:04:50.495213  USB2 port 4: enabled 0

 1032 16:04:50.495704  USB2 port 5: enabled 1

 1033 16:04:50.498818  USB2 port 6: enabled 0

 1034 16:04:50.502012  USB2 port 7: enabled 0

 1035 16:04:50.504904  USB2 port 8: enabled 1

 1036 16:04:50.505427  USB2 port 9: enabled 1

 1037 16:04:50.507995  USB3 port 0: enabled 1

 1038 16:04:50.511524  USB3 port 1: enabled 0

 1039 16:04:50.512009  USB3 port 2: enabled 0

 1040 16:04:50.514583  USB3 port 3: enabled 0

 1041 16:04:50.518312  GENERIC: 0.0: enabled 1

 1042 16:04:50.522066  GENERIC: 1.0: enabled 1

 1043 16:04:50.522557  APIC: 00: enabled 1

 1044 16:04:50.525069  APIC: 12: enabled 1

 1045 16:04:50.525503  APIC: 14: enabled 1

 1046 16:04:50.528366  APIC: 16: enabled 1

 1047 16:04:50.531925  APIC: 10: enabled 1

 1048 16:04:50.532419  APIC: 01: enabled 1

 1049 16:04:50.535028  APIC: 08: enabled 1

 1050 16:04:50.535515  APIC: 09: enabled 1

 1051 16:04:50.537999  Compare with tree...

 1052 16:04:50.541083  Root Device: enabled 1

 1053 16:04:50.544945   CPU_CLUSTER: 0: enabled 1

 1054 16:04:50.545474    APIC: 00: enabled 1

 1055 16:04:50.548241    APIC: 12: enabled 1

 1056 16:04:50.551616    APIC: 14: enabled 1

 1057 16:04:50.552108    APIC: 16: enabled 1

 1058 16:04:50.555245    APIC: 10: enabled 1

 1059 16:04:50.558188    APIC: 01: enabled 1

 1060 16:04:50.558718    APIC: 08: enabled 1

 1061 16:04:50.561383    APIC: 09: enabled 1

 1062 16:04:50.565020   DOMAIN: 0000: enabled 1

 1063 16:04:50.565440    GPIO: 0: enabled 1

 1064 16:04:50.568095    PCI: 00:00.0: enabled 1

 1065 16:04:50.571631    PCI: 00:01.0: enabled 0

 1066 16:04:50.574836    PCI: 00:01.1: enabled 0

 1067 16:04:50.578116    PCI: 00:02.0: enabled 1

 1068 16:04:50.578629    PCI: 00:04.0: enabled 1

 1069 16:04:50.581285     GENERIC: 0.0: enabled 1

 1070 16:04:50.584751    PCI: 00:05.0: enabled 0

 1071 16:04:50.587825    PCI: 00:06.0: enabled 1

 1072 16:04:50.591348    PCI: 00:06.2: enabled 0

 1073 16:04:50.591821    PCI: 00:08.0: enabled 0

 1074 16:04:50.594519    PCI: 00:09.0: enabled 0

 1075 16:04:50.597910    PCI: 00:0a.0: enabled 1

 1076 16:04:50.601372    PCI: 00:0d.0: enabled 1

 1077 16:04:50.604695     USB0 port 0: enabled 1

 1078 16:04:50.605186      USB3 port 0: enabled 1

 1079 16:04:50.608161      USB3 port 1: enabled 0

 1080 16:04:50.611576      USB3 port 2: enabled 1

 1081 16:04:50.614622      USB3 port 3: enabled 0

 1082 16:04:50.617718    PCI: 00:0d.1: enabled 0

 1083 16:04:50.621306    PCI: 00:0d.2: enabled 0

 1084 16:04:50.621795    PCI: 00:0d.3: enabled 0

 1085 16:04:50.624344    PCI: 00:0e.0: enabled 0

 1086 16:04:50.627832    PCI: 00:10.0: enabled 0

 1087 16:04:50.631192    PCI: 00:10.1: enabled 0

 1088 16:04:50.631641    PCI: 00:10.6: enabled 0

 1089 16:04:50.634721    PCI: 00:10.7: enabled 0

 1090 16:04:50.637695    PCI: 00:12.0: enabled 0

 1091 16:04:50.641125    PCI: 00:12.6: enabled 0

 1092 16:04:50.644501    PCI: 00:12.7: enabled 0

 1093 16:04:50.644999    PCI: 00:13.0: enabled 0

 1094 16:04:50.647844    PCI: 00:14.0: enabled 1

 1095 16:04:50.651381     USB0 port 0: enabled 1

 1096 16:04:50.654384      USB2 port 0: enabled 1

 1097 16:04:50.657903      USB2 port 1: enabled 0

 1098 16:04:50.661175      USB2 port 2: enabled 1

 1099 16:04:50.661705      USB2 port 3: enabled 0

 1100 16:04:50.664597      USB2 port 4: enabled 0

 1101 16:04:50.667478      USB2 port 5: enabled 1

 1102 16:04:50.671277      USB2 port 6: enabled 0

 1103 16:04:50.674448      USB2 port 7: enabled 0

 1104 16:04:50.674945      USB2 port 8: enabled 1

 1105 16:04:50.677810      USB2 port 9: enabled 1

 1106 16:04:50.681005      USB3 port 0: enabled 1

 1107 16:04:50.684264      USB3 port 1: enabled 0

 1108 16:04:50.687374      USB3 port 2: enabled 0

 1109 16:04:50.690980      USB3 port 3: enabled 0

 1110 16:04:50.691474    PCI: 00:14.1: enabled 0

 1111 16:04:50.694592    PCI: 00:14.2: enabled 1

 1112 16:04:50.697629    PCI: 00:14.3: enabled 1

 1113 16:04:50.701250     GENERIC: 0.0: enabled 1

 1114 16:04:50.704388    PCI: 00:15.0: enabled 1

 1115 16:04:50.704882     I2C: 00:1a: enabled 1

 1116 16:04:50.707733     I2C: 00:31: enabled 1

 1117 16:04:50.711009     I2C: 00:32: enabled 1

 1118 16:04:50.714417    PCI: 00:15.1: enabled 1

 1119 16:04:50.714907     I2C: 00:50: enabled 1

 1120 16:04:50.717549    PCI: 00:15.2: enabled 0

 1121 16:04:50.720862    PCI: 00:15.3: enabled 1

 1122 16:04:50.724287     I2C: 00:10: enabled 1

 1123 16:04:50.727599    PCI: 00:16.0: enabled 1

 1124 16:04:50.728087    PCI: 00:16.1: enabled 0

 1125 16:04:50.730847    PCI: 00:16.2: enabled 0

 1126 16:04:50.734066    PCI: 00:16.3: enabled 0

 1127 16:04:50.737303    PCI: 00:16.4: enabled 0

 1128 16:04:50.741028    PCI: 00:16.5: enabled 0

 1129 16:04:50.741544    PCI: 00:17.0: enabled 1

 1130 16:04:50.744278    PCI: 00:19.0: enabled 0

 1131 16:04:50.747370    PCI: 00:19.1: enabled 1

 1132 16:04:50.750549     I2C: 00:15: enabled 1

 1133 16:04:50.751043     I2C: 00:2c: enabled 1

 1134 16:04:50.753971    PCI: 00:19.2: enabled 0

 1135 16:04:50.757491    PCI: 00:1a.0: enabled 0

 1136 16:04:50.760810    PCI: 00:1e.0: enabled 1

 1137 16:04:50.764155    PCI: 00:1e.1: enabled 0

 1138 16:04:50.764647    PCI: 00:1e.2: enabled 0

 1139 16:04:50.767223    PCI: 00:1e.3: enabled 1

 1140 16:04:50.770408     SPI: 00: enabled 1

 1141 16:04:50.774393    PCI: 00:1f.0: enabled 1

 1142 16:04:50.774880     PNP: 0c09.0: enabled 1

 1143 16:04:50.777113    PCI: 00:1f.1: enabled 0

 1144 16:04:50.780726    PCI: 00:1f.2: enabled 1

 1145 16:04:50.783831     GENERIC: 0.0: enabled 1

 1146 16:04:50.787304      GENERIC: 0.0: enabled 1

 1147 16:04:50.790946      GENERIC: 1.0: enabled 1

 1148 16:04:50.791440    PCI: 00:1f.3: enabled 1

 1149 16:04:50.793865    PCI: 00:1f.4: enabled 0

 1150 16:04:50.797268    PCI: 00:1f.5: enabled 1

 1151 16:04:50.800320    PCI: 00:1f.6: enabled 0

 1152 16:04:50.803933    PCI: 00:1f.7: enabled 0

 1153 16:04:50.804425  Root Device scanning...

 1154 16:04:50.807226  scan_static_bus for Root Device

 1155 16:04:50.810492  CPU_CLUSTER: 0 enabled

 1156 16:04:50.813880  DOMAIN: 0000 enabled

 1157 16:04:50.814370  DOMAIN: 0000 scanning...

 1158 16:04:50.817248  PCI: pci_scan_bus for bus 00

 1159 16:04:50.820442  PCI: 00:00.0 [8086/0000] ops

 1160 16:04:50.823744  PCI: 00:00.0 [8086/4609] enabled

 1161 16:04:50.827406  PCI: 00:02.0 [8086/0000] bus ops

 1162 16:04:50.830346  PCI: 00:02.0 [8086/46b3] enabled

 1163 16:04:50.834108  PCI: 00:04.0 [8086/0000] bus ops

 1164 16:04:50.837173  PCI: 00:04.0 [8086/461d] enabled

 1165 16:04:50.840310  PCI: 00:06.0 [8086/0000] bus ops

 1166 16:04:50.843774  PCI: 00:06.0 [8086/464d] enabled

 1167 16:04:50.846953  PCI: 00:08.0 [8086/464f] disabled

 1168 16:04:50.850363  PCI: 00:0a.0 [8086/467d] enabled

 1169 16:04:50.853806  PCI: 00:0d.0 [8086/0000] bus ops

 1170 16:04:50.856939  PCI: 00:0d.0 [8086/461e] enabled

 1171 16:04:50.860358  PCI: 00:14.0 [8086/0000] bus ops

 1172 16:04:50.863706  PCI: 00:14.0 [8086/51ed] enabled

 1173 16:04:50.866914  PCI: 00:14.2 [8086/51ef] enabled

 1174 16:04:50.870572  PCI: 00:14.3 [8086/0000] bus ops

 1175 16:04:50.873942  PCI: 00:14.3 [8086/51f0] enabled

 1176 16:04:50.877635  PCI: 00:15.0 [8086/0000] bus ops

 1177 16:04:50.880699  PCI: 00:15.0 [8086/51e8] enabled

 1178 16:04:50.884066  PCI: 00:15.1 [8086/0000] bus ops

 1179 16:04:50.886967  PCI: 00:15.1 [8086/51e9] enabled

 1180 16:04:50.890687  PCI: 00:15.2 [8086/0000] bus ops

 1181 16:04:50.897192  PCI: 00:15.2 [8086/51ea] disabled

 1182 16:04:50.900426  PCI: 00:15.3 [8086/0000] bus ops

 1183 16:04:50.903825  PCI: 00:15.3 [8086/51eb] enabled

 1184 16:04:50.904307  PCI: 00:16.0 [8086/0000] ops

 1185 16:04:50.907337  PCI: 00:16.0 [8086/51e0] enabled

 1186 16:04:50.913868  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1187 16:04:50.917129  PCI: 00:19.0 [8086/0000] bus ops

 1188 16:04:50.920538  PCI: 00:19.0 [8086/51c5] disabled

 1189 16:04:50.923952  PCI: 00:19.1 [8086/0000] bus ops

 1190 16:04:50.927102  PCI: 00:19.1 [8086/51c6] enabled

 1191 16:04:50.930444  PCI: 00:1e.0 [8086/0000] ops

 1192 16:04:50.934028  PCI: 00:1e.0 [8086/51a8] enabled

 1193 16:04:50.937099  PCI: 00:1e.3 [8086/0000] bus ops

 1194 16:04:50.940443  PCI: 00:1e.3 [8086/51ab] enabled

 1195 16:04:50.943626  PCI: 00:1f.0 [8086/0000] bus ops

 1196 16:04:50.946827  PCI: 00:1f.0 [8086/5182] enabled

 1197 16:04:50.950265  RTC Init

 1198 16:04:50.953685  Set power on after power failure.

 1199 16:04:50.956786  Disabling Deep S3

 1200 16:04:50.957321  Disabling Deep S3

 1201 16:04:50.960214  Disabling Deep S4

 1202 16:04:50.960708  Disabling Deep S4

 1203 16:04:50.963461  Disabling Deep S5

 1204 16:04:50.963953  Disabling Deep S5

 1205 16:04:50.966361  PCI: 00:1f.2 [0000/0000] hidden

 1206 16:04:50.969854  PCI: 00:1f.3 [8086/0000] bus ops

 1207 16:04:50.973512  PCI: 00:1f.3 [8086/51c8] enabled

 1208 16:04:50.976806  PCI: 00:1f.5 [8086/0000] bus ops

 1209 16:04:50.979908  PCI: 00:1f.5 [8086/51a4] enabled

 1210 16:04:50.983381  GPIO: 0 enabled

 1211 16:04:50.986475  PCI: Leftover static devices:

 1212 16:04:50.986872  PCI: 00:01.0

 1213 16:04:50.990082  PCI: 00:01.1

 1214 16:04:50.990574  PCI: 00:05.0

 1215 16:04:50.990856  PCI: 00:06.2

 1216 16:04:50.993238  PCI: 00:09.0

 1217 16:04:50.993630  PCI: 00:0d.1

 1218 16:04:50.996766  PCI: 00:0d.2

 1219 16:04:50.997297  PCI: 00:0d.3

 1220 16:04:50.997593  PCI: 00:0e.0

 1221 16:04:50.999874  PCI: 00:10.0

 1222 16:04:51.000260  PCI: 00:10.1

 1223 16:04:51.003433  PCI: 00:10.6

 1224 16:04:51.003940  PCI: 00:10.7

 1225 16:04:51.006962  PCI: 00:12.0

 1226 16:04:51.007452  PCI: 00:12.6

 1227 16:04:51.007737  PCI: 00:12.7

 1228 16:04:51.009962  PCI: 00:13.0

 1229 16:04:51.010456  PCI: 00:14.1

 1230 16:04:51.013390  PCI: 00:16.1

 1231 16:04:51.013881  PCI: 00:16.2

 1232 16:04:51.014164  PCI: 00:16.3

 1233 16:04:51.016733  PCI: 00:16.4

 1234 16:04:51.017247  PCI: 00:16.5

 1235 16:04:51.020171  PCI: 00:17.0

 1236 16:04:51.020656  PCI: 00:19.2

 1237 16:04:51.020934  PCI: 00:1a.0

 1238 16:04:51.023298  PCI: 00:1e.1

 1239 16:04:51.023684  PCI: 00:1e.2

 1240 16:04:51.026758  PCI: 00:1f.1

 1241 16:04:51.027241  PCI: 00:1f.4

 1242 16:04:51.030067  PCI: 00:1f.6

 1243 16:04:51.030553  PCI: 00:1f.7

 1244 16:04:51.033601  PCI: Check your devicetree.cb.

 1245 16:04:51.036916  PCI: 00:02.0 scanning...

 1246 16:04:51.040155  scan_generic_bus for PCI: 00:02.0

 1247 16:04:51.043362  scan_generic_bus for PCI: 00:02.0 done

 1248 16:04:51.046584  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1249 16:04:51.049894  PCI: 00:04.0 scanning...

 1250 16:04:51.053390  scan_generic_bus for PCI: 00:04.0

 1251 16:04:51.056570  GENERIC: 0.0 enabled

 1252 16:04:51.063278  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1253 16:04:51.066641  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1254 16:04:51.069878  PCI: 00:06.0 scanning...

 1255 16:04:51.073162  do_pci_scan_bridge for PCI: 00:06.0

 1256 16:04:51.076449  PCI: pci_scan_bus for bus 01

 1257 16:04:51.079886  PCI: 01:00.0 [15b7/5009] enabled

 1258 16:04:51.083375  Enabling Common Clock Configuration

 1259 16:04:51.086624  L1 Sub-State supported from root port 6

 1260 16:04:51.090143  L1 Sub-State Support = 0x5

 1261 16:04:51.093246  CommonModeRestoreTime = 0x6e

 1262 16:04:51.096238  Power On Value = 0x5, Power On Scale = 0x2

 1263 16:04:51.099498  ASPM: Enabled L1

 1264 16:04:51.103067  PCIe: Max_Payload_Size adjusted to 256

 1265 16:04:51.106403  PCI: 01:00.0: Enabled LTR

 1266 16:04:51.110097  PCI: 01:00.0: Programmed LTR max latencies

 1267 16:04:51.113095  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1268 16:04:51.116462  PCI: 00:0d.0 scanning...

 1269 16:04:51.119774  scan_static_bus for PCI: 00:0d.0

 1270 16:04:51.123210  USB0 port 0 enabled

 1271 16:04:51.123702  USB0 port 0 scanning...

 1272 16:04:51.126422  scan_static_bus for USB0 port 0

 1273 16:04:51.129900  USB3 port 0 enabled

 1274 16:04:51.133100  USB3 port 1 disabled

 1275 16:04:51.133635  USB3 port 2 enabled

 1276 16:04:51.136821  USB3 port 3 disabled

 1277 16:04:51.139803  USB3 port 0 scanning...

 1278 16:04:51.142716  scan_static_bus for USB3 port 0

 1279 16:04:51.146514  scan_static_bus for USB3 port 0 done

 1280 16:04:51.149919  scan_bus: bus USB3 port 0 finished in 6 msecs

 1281 16:04:51.152846  USB3 port 2 scanning...

 1282 16:04:51.156371  scan_static_bus for USB3 port 2

 1283 16:04:51.159803  scan_static_bus for USB3 port 2 done

 1284 16:04:51.163085  scan_bus: bus USB3 port 2 finished in 6 msecs

 1285 16:04:51.166230  scan_static_bus for USB0 port 0 done

 1286 16:04:51.173040  scan_bus: bus USB0 port 0 finished in 43 msecs

 1287 16:04:51.176322  scan_static_bus for PCI: 00:0d.0 done

 1288 16:04:51.179585  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1289 16:04:51.183116  PCI: 00:14.0 scanning...

 1290 16:04:51.186337  scan_static_bus for PCI: 00:14.0

 1291 16:04:51.189151  USB0 port 0 enabled

 1292 16:04:51.192959  USB0 port 0 scanning...

 1293 16:04:51.196384  scan_static_bus for USB0 port 0

 1294 16:04:51.196882  USB2 port 0 enabled

 1295 16:04:51.199496  USB2 port 1 disabled

 1296 16:04:51.199982  USB2 port 2 enabled

 1297 16:04:51.202655  USB2 port 3 disabled

 1298 16:04:51.205950  USB2 port 4 disabled

 1299 16:04:51.206458  USB2 port 5 enabled

 1300 16:04:51.209612  USB2 port 6 disabled

 1301 16:04:51.212775  USB2 port 7 disabled

 1302 16:04:51.213300  USB2 port 8 enabled

 1303 16:04:51.216011  USB2 port 9 enabled

 1304 16:04:51.216482  USB3 port 0 enabled

 1305 16:04:51.219921  USB3 port 1 disabled

 1306 16:04:51.222625  USB3 port 2 disabled

 1307 16:04:51.223134  USB3 port 3 disabled

 1308 16:04:51.225734  USB2 port 0 scanning...

 1309 16:04:51.228966  scan_static_bus for USB2 port 0

 1310 16:04:51.232741  scan_static_bus for USB2 port 0 done

 1311 16:04:51.239673  scan_bus: bus USB2 port 0 finished in 6 msecs

 1312 16:04:51.240163  USB2 port 2 scanning...

 1313 16:04:51.242804  scan_static_bus for USB2 port 2

 1314 16:04:51.246048  scan_static_bus for USB2 port 2 done

 1315 16:04:51.252653  scan_bus: bus USB2 port 2 finished in 6 msecs

 1316 16:04:51.256213  USB2 port 5 scanning...

 1317 16:04:51.256705  scan_static_bus for USB2 port 5

 1318 16:04:51.262717  scan_static_bus for USB2 port 5 done

 1319 16:04:51.265962  scan_bus: bus USB2 port 5 finished in 6 msecs

 1320 16:04:51.269103  USB2 port 8 scanning...

 1321 16:04:51.273066  scan_static_bus for USB2 port 8

 1322 16:04:51.275918  scan_static_bus for USB2 port 8 done

 1323 16:04:51.279497  scan_bus: bus USB2 port 8 finished in 6 msecs

 1324 16:04:51.282437  USB2 port 9 scanning...

 1325 16:04:51.285907  scan_static_bus for USB2 port 9

 1326 16:04:51.289246  scan_static_bus for USB2 port 9 done

 1327 16:04:51.292431  scan_bus: bus USB2 port 9 finished in 6 msecs

 1328 16:04:51.295902  USB3 port 0 scanning...

 1329 16:04:51.299184  scan_static_bus for USB3 port 0

 1330 16:04:51.302429  scan_static_bus for USB3 port 0 done

 1331 16:04:51.309318  scan_bus: bus USB3 port 0 finished in 6 msecs

 1332 16:04:51.312584  scan_static_bus for USB0 port 0 done

 1333 16:04:51.316030  scan_bus: bus USB0 port 0 finished in 120 msecs

 1334 16:04:51.318649  scan_static_bus for PCI: 00:14.0 done

 1335 16:04:51.325868  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1336 16:04:51.328876  PCI: 00:14.3 scanning...

 1337 16:04:51.332173  scan_static_bus for PCI: 00:14.3

 1338 16:04:51.332563  GENERIC: 0.0 enabled

 1339 16:04:51.335613  scan_static_bus for PCI: 00:14.3 done

 1340 16:04:51.342296  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1341 16:04:51.345278  PCI: 00:15.0 scanning...

 1342 16:04:51.349015  scan_static_bus for PCI: 00:15.0

 1343 16:04:51.349555  I2C: 00:1a enabled

 1344 16:04:51.352253  I2C: 00:31 enabled

 1345 16:04:51.352742  I2C: 00:32 enabled

 1346 16:04:51.355620  scan_static_bus for PCI: 00:15.0 done

 1347 16:04:51.362395  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1348 16:04:51.365628  PCI: 00:15.1 scanning...

 1349 16:04:51.368467  scan_static_bus for PCI: 00:15.1

 1350 16:04:51.368796  I2C: 00:50 enabled

 1351 16:04:51.372128  scan_static_bus for PCI: 00:15.1 done

 1352 16:04:51.378642  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1353 16:04:51.382379  PCI: 00:15.3 scanning...

 1354 16:04:51.385619  scan_static_bus for PCI: 00:15.3

 1355 16:04:51.386105  I2C: 00:10 enabled

 1356 16:04:51.388509  scan_static_bus for PCI: 00:15.3 done

 1357 16:04:51.395487  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1358 16:04:51.395972  PCI: 00:19.1 scanning...

 1359 16:04:51.398801  scan_static_bus for PCI: 00:19.1

 1360 16:04:51.402138  I2C: 00:15 enabled

 1361 16:04:51.405539  I2C: 00:2c enabled

 1362 16:04:51.408754  scan_static_bus for PCI: 00:19.1 done

 1363 16:04:51.411900  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1364 16:04:51.415311  PCI: 00:1e.3 scanning...

 1365 16:04:51.418540  scan_generic_bus for PCI: 00:1e.3

 1366 16:04:51.421926  SPI: 00 enabled

 1367 16:04:51.425561  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1368 16:04:51.431861  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1369 16:04:51.435427  PCI: 00:1f.0 scanning...

 1370 16:04:51.438657  scan_static_bus for PCI: 00:1f.0

 1371 16:04:51.439147  PNP: 0c09.0 enabled

 1372 16:04:51.441545  PNP: 0c09.0 scanning...

 1373 16:04:51.444983  scan_static_bus for PNP: 0c09.0

 1374 16:04:51.448823  scan_static_bus for PNP: 0c09.0 done

 1375 16:04:51.451731  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1376 16:04:51.458372  scan_static_bus for PCI: 00:1f.0 done

 1377 16:04:51.461764  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1378 16:04:51.464979  PCI: 00:1f.2 scanning...

 1379 16:04:51.468185  scan_static_bus for PCI: 00:1f.2

 1380 16:04:51.468517  GENERIC: 0.0 enabled

 1381 16:04:51.471887  GENERIC: 0.0 scanning...

 1382 16:04:51.475223  scan_static_bus for GENERIC: 0.0

 1383 16:04:51.478334  GENERIC: 0.0 enabled

 1384 16:04:51.478800  GENERIC: 1.0 enabled

 1385 16:04:51.484985  scan_static_bus for GENERIC: 0.0 done

 1386 16:04:51.488303  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1387 16:04:51.491960  scan_static_bus for PCI: 00:1f.2 done

 1388 16:04:51.498492  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1389 16:04:51.498982  PCI: 00:1f.3 scanning...

 1390 16:04:51.501719  scan_static_bus for PCI: 00:1f.3

 1391 16:04:51.508396  scan_static_bus for PCI: 00:1f.3 done

 1392 16:04:51.511526  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1393 16:04:51.514744  PCI: 00:1f.5 scanning...

 1394 16:04:51.518127  scan_generic_bus for PCI: 00:1f.5

 1395 16:04:51.521460  scan_generic_bus for PCI: 00:1f.5 done

 1396 16:04:51.524946  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1397 16:04:51.531393  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1398 16:04:51.534504  scan_static_bus for Root Device done

 1399 16:04:51.537720  scan_bus: bus Root Device finished in 729 msecs

 1400 16:04:51.541331  done

 1401 16:04:51.544621  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms

 1402 16:04:51.551394  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1403 16:04:51.558013  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1404 16:04:51.561152  SPI flash protection: WPSW=1 SRP0=0

 1405 16:04:51.567939  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1406 16:04:51.571417  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1407 16:04:51.574350  found VGA at PCI: 00:02.0

 1408 16:04:51.577684  Setting up VGA for PCI: 00:02.0

 1409 16:04:51.584337  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1410 16:04:51.587698  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1411 16:04:51.590927  Allocating resources...

 1412 16:04:51.594499  Reading resources...

 1413 16:04:51.597796  Root Device read_resources bus 0 link: 0

 1414 16:04:51.601537  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1415 16:04:51.607836  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1416 16:04:51.611009  DOMAIN: 0000 read_resources bus 0 link: 0

 1417 16:04:51.617739  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1418 16:04:51.624433  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1419 16:04:51.627716  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1420 16:04:51.634407  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1421 16:04:51.640875  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1422 16:04:51.647291  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1423 16:04:51.653921  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1424 16:04:51.660943  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1425 16:04:51.667404  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1426 16:04:51.674021  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1427 16:04:51.680683  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1428 16:04:51.687488  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1429 16:04:51.693873  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1430 16:04:51.700523  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1431 16:04:51.703653  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1432 16:04:51.710565  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1433 16:04:51.717245  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1434 16:04:51.723826  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1435 16:04:51.730424  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1436 16:04:51.737206  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1437 16:04:51.743974  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1438 16:04:51.747207  PCI: 00:04.0 read_resources bus 1 link: 0

 1439 16:04:51.750481  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1440 16:04:51.757010  PCI: 00:06.0 read_resources bus 1 link: 0

 1441 16:04:51.760585  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1442 16:04:51.763654  PCI: 00:0d.0 read_resources bus 0 link: 0

 1443 16:04:51.770478  USB0 port 0 read_resources bus 0 link: 0

 1444 16:04:51.773809  USB0 port 0 read_resources bus 0 link: 0 done

 1445 16:04:51.777186  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1446 16:04:51.783774  PCI: 00:14.0 read_resources bus 0 link: 0

 1447 16:04:51.787174  USB0 port 0 read_resources bus 0 link: 0

 1448 16:04:51.790312  USB0 port 0 read_resources bus 0 link: 0 done

 1449 16:04:51.797308  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1450 16:04:51.800213  PCI: 00:14.3 read_resources bus 0 link: 0

 1451 16:04:51.803353  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1452 16:04:51.810150  PCI: 00:15.0 read_resources bus 0 link: 0

 1453 16:04:51.813423  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1454 16:04:51.816733  PCI: 00:15.1 read_resources bus 0 link: 0

 1455 16:04:51.823432  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1456 16:04:51.827178  PCI: 00:15.3 read_resources bus 0 link: 0

 1457 16:04:51.833503  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1458 16:04:51.836953  PCI: 00:19.1 read_resources bus 0 link: 0

 1459 16:04:51.840060  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1460 16:04:51.846820  PCI: 00:1e.3 read_resources bus 2 link: 0

 1461 16:04:51.850550  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1462 16:04:51.853391  PCI: 00:1f.0 read_resources bus 0 link: 0

 1463 16:04:51.860243  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1464 16:04:51.863465  PCI: 00:1f.2 read_resources bus 0 link: 0

 1465 16:04:51.866706  GENERIC: 0.0 read_resources bus 0 link: 0

 1466 16:04:51.873525  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1467 16:04:51.876731  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1468 16:04:51.883287  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1469 16:04:51.886845  Root Device read_resources bus 0 link: 0 done

 1470 16:04:51.889756  Done reading resources.

 1471 16:04:51.893558  Show resources in subtree (Root Device)...After reading.

 1472 16:04:51.900016   Root Device child on link 0 CPU_CLUSTER: 0

 1473 16:04:51.903633    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1474 16:04:51.904124     APIC: 00

 1475 16:04:51.906581     APIC: 12

 1476 16:04:51.906965     APIC: 14

 1477 16:04:51.910333     APIC: 16

 1478 16:04:51.910823     APIC: 10

 1479 16:04:51.911101     APIC: 01

 1480 16:04:51.913697     APIC: 08

 1481 16:04:51.914081     APIC: 09

 1482 16:04:51.916909    DOMAIN: 0000 child on link 0 GPIO: 0

 1483 16:04:51.926848    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1484 16:04:51.936964    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1485 16:04:51.937506     GPIO: 0

 1486 16:04:51.940147     PCI: 00:00.0

 1487 16:04:51.949994     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1488 16:04:51.959834     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1489 16:04:51.966400     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1490 16:04:51.976564     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1491 16:04:51.986375     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1492 16:04:51.996755     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1493 16:04:52.006579     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1494 16:04:52.016107     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1495 16:04:52.022921     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1496 16:04:52.032619     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1497 16:04:52.043260     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1498 16:04:52.052852     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1499 16:04:52.062536     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1500 16:04:52.072770     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1501 16:04:52.078942     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1502 16:04:52.089236     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1503 16:04:52.099016     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1504 16:04:52.108986     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1505 16:04:52.118663     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1506 16:04:52.129084     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1507 16:04:52.139048     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1508 16:04:52.148803     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1509 16:04:52.155550     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1510 16:04:52.165413     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1511 16:04:52.175144     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1512 16:04:52.185388     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1513 16:04:52.195251     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1514 16:04:52.205580     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1515 16:04:52.206077     PCI: 00:02.0

 1516 16:04:52.218575     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1517 16:04:52.228969     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1518 16:04:52.235362     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1519 16:04:52.241653     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1520 16:04:52.251280     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1521 16:04:52.251763      GENERIC: 0.0

 1522 16:04:52.255101     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1523 16:04:52.265117     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1524 16:04:52.275160     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1525 16:04:52.285084     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1526 16:04:52.285627      PCI: 01:00.0

 1527 16:04:52.295205      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1528 16:04:52.304825      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1529 16:04:52.307837     PCI: 00:08.0

 1530 16:04:52.308228     PCI: 00:0a.0

 1531 16:04:52.318076     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1532 16:04:52.324686     PCI: 00:0d.0 child on link 0 USB0 port 0

 1533 16:04:52.334743     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1534 16:04:52.338129      USB0 port 0 child on link 0 USB3 port 0

 1535 16:04:52.341552       USB3 port 0

 1536 16:04:52.342046       USB3 port 1

 1537 16:04:52.344755       USB3 port 2

 1538 16:04:52.345270       USB3 port 3

 1539 16:04:52.347994     PCI: 00:14.0 child on link 0 USB0 port 0

 1540 16:04:52.361048     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1541 16:04:52.364034      USB0 port 0 child on link 0 USB2 port 0

 1542 16:04:52.364448       USB2 port 0

 1543 16:04:52.367611       USB2 port 1

 1544 16:04:52.368109       USB2 port 2

 1545 16:04:52.370529       USB2 port 3

 1546 16:04:52.374423       USB2 port 4

 1547 16:04:52.375099       USB2 port 5

 1548 16:04:52.377490       USB2 port 6

 1549 16:04:52.377894       USB2 port 7

 1550 16:04:52.380984       USB2 port 8

 1551 16:04:52.381514       USB2 port 9

 1552 16:04:52.384547       USB3 port 0

 1553 16:04:52.385033       USB3 port 1

 1554 16:04:52.387852       USB3 port 2

 1555 16:04:52.388336       USB3 port 3

 1556 16:04:52.390971     PCI: 00:14.2

 1557 16:04:52.401023     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1558 16:04:52.410901     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1559 16:04:52.414509     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1560 16:04:52.424206     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1561 16:04:52.427608      GENERIC: 0.0

 1562 16:04:52.430764     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1563 16:04:52.440950     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1564 16:04:52.441493      I2C: 00:1a

 1565 16:04:52.444253      I2C: 00:31

 1566 16:04:52.444741      I2C: 00:32

 1567 16:04:52.451048     PCI: 00:15.1 child on link 0 I2C: 00:50

 1568 16:04:52.460744     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1569 16:04:52.461280      I2C: 00:50

 1570 16:04:52.464222     PCI: 00:15.2

 1571 16:04:52.467636     PCI: 00:15.3 child on link 0 I2C: 00:10

 1572 16:04:52.477140     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1573 16:04:52.477689      I2C: 00:10

 1574 16:04:52.480485     PCI: 00:16.0

 1575 16:04:52.490216     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1576 16:04:52.490701     PCI: 00:19.0

 1577 16:04:52.497340     PCI: 00:19.1 child on link 0 I2C: 00:15

 1578 16:04:52.507269     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1579 16:04:52.507771      I2C: 00:15

 1580 16:04:52.511162      I2C: 00:2c

 1581 16:04:52.511652     PCI: 00:1e.0

 1582 16:04:52.523828     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1583 16:04:52.527232     PCI: 00:1e.3 child on link 0 SPI: 00

 1584 16:04:52.537111     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1585 16:04:52.537656      SPI: 00

 1586 16:04:52.540549     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1587 16:04:52.550574     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1588 16:04:52.553879      PNP: 0c09.0

 1589 16:04:52.560256      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1590 16:04:52.567261     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1591 16:04:52.573459     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1592 16:04:52.583698     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1593 16:04:52.590001      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1594 16:04:52.590507       GENERIC: 0.0

 1595 16:04:52.593785       GENERIC: 1.0

 1596 16:04:52.594288     PCI: 00:1f.3

 1597 16:04:52.603646     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1598 16:04:52.613788     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1599 16:04:52.616522     PCI: 00:1f.5

 1600 16:04:52.623276     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1601 16:04:52.633110  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1602 16:04:52.636728   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1603 16:04:52.643494   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1604 16:04:52.650076   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1605 16:04:52.653393    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1606 16:04:52.660130    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1607 16:04:52.666774   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1608 16:04:52.673149   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1609 16:04:52.679487   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1610 16:04:52.686688  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1611 16:04:52.693279  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1612 16:04:52.703050   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1613 16:04:52.709669   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1614 16:04:52.716372   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1615 16:04:52.719499   DOMAIN: 0000: Resource ranges:

 1616 16:04:52.722786   * Base: 1000, Size: 800, Tag: 100

 1617 16:04:52.726169   * Base: 1900, Size: e700, Tag: 100

 1618 16:04:52.733052    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1619 16:04:52.739527  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1620 16:04:52.746368  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1621 16:04:52.752467   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1622 16:04:52.762503   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1623 16:04:52.769042   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1624 16:04:52.776110   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1625 16:04:52.785562   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1626 16:04:52.792174   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1627 16:04:52.798951   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1628 16:04:52.808900   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1629 16:04:52.815479   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1630 16:04:52.821709   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1631 16:04:52.831772   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1632 16:04:52.838804   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1633 16:04:52.845460   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1634 16:04:52.854947   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1635 16:04:52.861570   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1636 16:04:52.868267   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1637 16:04:52.878048   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1638 16:04:52.884815   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1639 16:04:52.891259   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1640 16:04:52.901600   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1641 16:04:52.908264   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1642 16:04:52.914887   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1643 16:04:52.924435   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1644 16:04:52.931361   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1645 16:04:52.937602   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1646 16:04:52.947698   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1647 16:04:52.954097   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1648 16:04:52.960948   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1649 16:04:52.970993   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1650 16:04:52.977389   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1651 16:04:52.980915   DOMAIN: 0000: Resource ranges:

 1652 16:04:52.984269   * Base: 80400000, Size: 3fc00000, Tag: 200

 1653 16:04:52.990944   * Base: d0000000, Size: 28000000, Tag: 200

 1654 16:04:52.994204   * Base: fa000000, Size: 1000000, Tag: 200

 1655 16:04:52.997597   * Base: fb001000, Size: 17ff000, Tag: 200

 1656 16:04:53.000812   * Base: fe800000, Size: 300000, Tag: 200

 1657 16:04:53.007546   * Base: feb80000, Size: 80000, Tag: 200

 1658 16:04:53.010920   * Base: fed00000, Size: 40000, Tag: 200

 1659 16:04:53.013881   * Base: fed70000, Size: 10000, Tag: 200

 1660 16:04:53.017678   * Base: fed88000, Size: 8000, Tag: 200

 1661 16:04:53.023995   * Base: fed93000, Size: d000, Tag: 200

 1662 16:04:53.027271   * Base: feda2000, Size: 1e000, Tag: 200

 1663 16:04:53.030976   * Base: fede0000, Size: 1220000, Tag: 200

 1664 16:04:53.037062   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1665 16:04:53.043891    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1666 16:04:53.050601    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1667 16:04:53.057326    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1668 16:04:53.063663    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1669 16:04:53.070200    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1670 16:04:53.077141    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1671 16:04:53.083868    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1672 16:04:53.090443    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1673 16:04:53.097360    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1674 16:04:53.103951    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1675 16:04:53.110385    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1676 16:04:53.117095    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1677 16:04:53.123478    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1678 16:04:53.130468    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1679 16:04:53.136647    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1680 16:04:53.143430    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1681 16:04:53.150027    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1682 16:04:53.156773    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1683 16:04:53.163374    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1684 16:04:53.169948  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1685 16:04:53.176582  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1686 16:04:53.179773   PCI: 00:06.0: Resource ranges:

 1687 16:04:53.186790   * Base: 80400000, Size: 100000, Tag: 200

 1688 16:04:53.193305    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1689 16:04:53.199965    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1690 16:04:53.206752  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1691 16:04:53.213262  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1692 16:04:53.219802  Root Device assign_resources, bus 0 link: 0

 1693 16:04:53.222842  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1694 16:04:53.229769  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1695 16:04:53.239749  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1696 16:04:53.246395  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1697 16:04:53.256205  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1698 16:04:53.259270  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1699 16:04:53.262909  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1700 16:04:53.272608  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1701 16:04:53.282743  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1702 16:04:53.292594  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1703 16:04:53.295965  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1704 16:04:53.303125  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1705 16:04:53.312701  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1706 16:04:53.315979  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1707 16:04:53.326483  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1708 16:04:53.332669  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1709 16:04:53.335893  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1710 16:04:53.342838  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1711 16:04:53.349085  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1712 16:04:53.355922  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1713 16:04:53.359089  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1714 16:04:53.369325  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1715 16:04:53.375868  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1716 16:04:53.382546  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1717 16:04:53.389169  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1718 16:04:53.392573  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1719 16:04:53.402237  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1720 16:04:53.405553  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1721 16:04:53.412232  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1722 16:04:53.418860  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1723 16:04:53.422166  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1724 16:04:53.429040  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1725 16:04:53.435572  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1726 16:04:53.442445  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1727 16:04:53.445580  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1728 16:04:53.455402  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1729 16:04:53.462207  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1730 16:04:53.465405  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1731 16:04:53.471701  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1732 16:04:53.478630  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1733 16:04:53.485083  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1734 16:04:53.488560  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1735 16:04:53.491653  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1736 16:04:53.498433  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1737 16:04:53.501765  LPC: Trying to open IO window from 800 size 1ff

 1738 16:04:53.511770  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1739 16:04:53.518397  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1740 16:04:53.528367  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1741 16:04:53.531686  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1742 16:04:53.537905  Root Device assign_resources, bus 0 link: 0 done

 1743 16:04:53.538416  Done setting resources.

 1744 16:04:53.544863  Show resources in subtree (Root Device)...After assigning values.

 1745 16:04:53.551510   Root Device child on link 0 CPU_CLUSTER: 0

 1746 16:04:53.554522    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1747 16:04:53.554908     APIC: 00

 1748 16:04:53.557901     APIC: 12

 1749 16:04:53.558282     APIC: 14

 1750 16:04:53.558556     APIC: 16

 1751 16:04:53.561294     APIC: 10

 1752 16:04:53.561787     APIC: 01

 1753 16:04:53.564663     APIC: 08

 1754 16:04:53.565046     APIC: 09

 1755 16:04:53.567871    DOMAIN: 0000 child on link 0 GPIO: 0

 1756 16:04:53.577967    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1757 16:04:53.588105    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1758 16:04:53.588563     GPIO: 0

 1759 16:04:53.591527     PCI: 00:00.0

 1760 16:04:53.600932     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1761 16:04:53.608064     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1762 16:04:53.617720     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1763 16:04:53.628059     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1764 16:04:53.637879     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1765 16:04:53.647866     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1766 16:04:53.657399     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1767 16:04:53.664162     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1768 16:04:53.674605     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1769 16:04:53.684069     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1770 16:04:53.693643     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1771 16:04:53.703922     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1772 16:04:53.713785     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1773 16:04:53.723513     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1774 16:04:53.730349     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1775 16:04:53.740028     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1776 16:04:53.750009     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1777 16:04:53.759970     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1778 16:04:53.769907     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1779 16:04:53.780003     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1780 16:04:53.789987     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1781 16:04:53.800087     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1782 16:04:53.806502     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1783 16:04:53.816773     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1784 16:04:53.826292     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1785 16:04:53.836389     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1786 16:04:53.846184     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1787 16:04:53.856235     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1788 16:04:53.856741     PCI: 00:02.0

 1789 16:04:53.869330     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1790 16:04:53.879551     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1791 16:04:53.889455     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1792 16:04:53.892694     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1793 16:04:53.902452     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1794 16:04:53.906199      GENERIC: 0.0

 1795 16:04:53.909122     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1796 16:04:53.919265     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1797 16:04:53.928753     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1798 16:04:53.941977     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1799 16:04:53.942425      PCI: 01:00.0

 1800 16:04:53.952193      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1801 16:04:53.962204      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1802 16:04:53.965704     PCI: 00:08.0

 1803 16:04:53.966194     PCI: 00:0a.0

 1804 16:04:53.975500     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1805 16:04:53.982181     PCI: 00:0d.0 child on link 0 USB0 port 0

 1806 16:04:53.992213     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1807 16:04:53.995721      USB0 port 0 child on link 0 USB3 port 0

 1808 16:04:53.999153       USB3 port 0

 1809 16:04:53.999649       USB3 port 1

 1810 16:04:54.001965       USB3 port 2

 1811 16:04:54.002471       USB3 port 3

 1812 16:04:54.008780     PCI: 00:14.0 child on link 0 USB0 port 0

 1813 16:04:54.018863     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1814 16:04:54.021924      USB0 port 0 child on link 0 USB2 port 0

 1815 16:04:54.025363       USB2 port 0

 1816 16:04:54.025819       USB2 port 1

 1817 16:04:54.028586       USB2 port 2

 1818 16:04:54.029105       USB2 port 3

 1819 16:04:54.031896       USB2 port 4

 1820 16:04:54.032396       USB2 port 5

 1821 16:04:54.035169       USB2 port 6

 1822 16:04:54.035661       USB2 port 7

 1823 16:04:54.038851       USB2 port 8

 1824 16:04:54.039351       USB2 port 9

 1825 16:04:54.041371       USB3 port 0

 1826 16:04:54.045316       USB3 port 1

 1827 16:04:54.045814       USB3 port 2

 1828 16:04:54.048324       USB3 port 3

 1829 16:04:54.048822     PCI: 00:14.2

 1830 16:04:54.058741     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1831 16:04:54.068352     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1832 16:04:54.074582     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1833 16:04:54.084810     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1834 16:04:54.085334      GENERIC: 0.0

 1835 16:04:54.091675     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1836 16:04:54.101663     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1837 16:04:54.102169      I2C: 00:1a

 1838 16:04:54.104557      I2C: 00:31

 1839 16:04:54.104935      I2C: 00:32

 1840 16:04:54.107965     PCI: 00:15.1 child on link 0 I2C: 00:50

 1841 16:04:54.121253     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1842 16:04:54.121772      I2C: 00:50

 1843 16:04:54.124325     PCI: 00:15.2

 1844 16:04:54.127823     PCI: 00:15.3 child on link 0 I2C: 00:10

 1845 16:04:54.137977     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1846 16:04:54.138471      I2C: 00:10

 1847 16:04:54.141241     PCI: 00:16.0

 1848 16:04:54.151158     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1849 16:04:54.154860     PCI: 00:19.0

 1850 16:04:54.158089     PCI: 00:19.1 child on link 0 I2C: 00:15

 1851 16:04:54.167793     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1852 16:04:54.168289      I2C: 00:15

 1853 16:04:54.171217      I2C: 00:2c

 1854 16:04:54.171717     PCI: 00:1e.0

 1855 16:04:54.184530     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1856 16:04:54.187774     PCI: 00:1e.3 child on link 0 SPI: 00

 1857 16:04:54.197881     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1858 16:04:54.201055      SPI: 00

 1859 16:04:54.204331     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1860 16:04:54.210890     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1861 16:04:54.214130      PNP: 0c09.0

 1862 16:04:54.224202      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1863 16:04:54.227364     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1864 16:04:54.237444     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1865 16:04:54.247552     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1866 16:04:54.250580      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1867 16:04:54.254339       GENERIC: 0.0

 1868 16:04:54.254837       GENERIC: 1.0

 1869 16:04:54.257618     PCI: 00:1f.3

 1870 16:04:54.267851     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1871 16:04:54.277576     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1872 16:04:54.278083     PCI: 00:1f.5

 1873 16:04:54.290849     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1874 16:04:54.291353  Done allocating resources.

 1875 16:04:54.297316  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms

 1876 16:04:54.304092  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1877 16:04:54.307222  Configure audio over I2S with MAX98373 NAU88L25B.

 1878 16:04:54.312415  Enabling BT offload

 1879 16:04:54.320111  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1880 16:04:54.323127  Enabling resources...

 1881 16:04:54.326077  PCI: 00:00.0 subsystem <- 8086/4609

 1882 16:04:54.329924  PCI: 00:00.0 cmd <- 06

 1883 16:04:54.333269  PCI: 00:02.0 subsystem <- 8086/46b3

 1884 16:04:54.336487  PCI: 00:02.0 cmd <- 03

 1885 16:04:54.339840  PCI: 00:04.0 subsystem <- 8086/461d

 1886 16:04:54.340344  PCI: 00:04.0 cmd <- 02

 1887 16:04:54.343112  PCI: 00:06.0 bridge ctrl <- 0013

 1888 16:04:54.346491  PCI: 00:06.0 subsystem <- 8086/464d

 1889 16:04:54.349618  PCI: 00:06.0 cmd <- 106

 1890 16:04:54.353060  PCI: 00:0a.0 subsystem <- 8086/467d

 1891 16:04:54.356294  PCI: 00:0a.0 cmd <- 02

 1892 16:04:54.359993  PCI: 00:0d.0 subsystem <- 8086/461e

 1893 16:04:54.363275  PCI: 00:0d.0 cmd <- 02

 1894 16:04:54.366314  PCI: 00:14.0 subsystem <- 8086/51ed

 1895 16:04:54.369651  PCI: 00:14.0 cmd <- 02

 1896 16:04:54.372969  PCI: 00:14.2 subsystem <- 8086/51ef

 1897 16:04:54.373511  PCI: 00:14.2 cmd <- 02

 1898 16:04:54.379783  PCI: 00:14.3 subsystem <- 8086/51f0

 1899 16:04:54.380286  PCI: 00:14.3 cmd <- 02

 1900 16:04:54.382509  PCI: 00:15.0 subsystem <- 8086/51e8

 1901 16:04:54.385836  PCI: 00:15.0 cmd <- 02

 1902 16:04:54.389734  PCI: 00:15.1 subsystem <- 8086/51e9

 1903 16:04:54.393085  PCI: 00:15.1 cmd <- 06

 1904 16:04:54.396116  PCI: 00:15.3 subsystem <- 8086/51eb

 1905 16:04:54.399469  PCI: 00:15.3 cmd <- 02

 1906 16:04:54.402496  PCI: 00:16.0 subsystem <- 8086/51e0

 1907 16:04:54.402878  PCI: 00:16.0 cmd <- 02

 1908 16:04:54.409916  PCI: 00:19.1 subsystem <- 8086/51c6

 1909 16:04:54.410375  PCI: 00:19.1 cmd <- 02

 1910 16:04:54.412441  PCI: 00:1e.0 subsystem <- 8086/51a8

 1911 16:04:54.416155  PCI: 00:1e.0 cmd <- 06

 1912 16:04:54.419290  PCI: 00:1e.3 subsystem <- 8086/51ab

 1913 16:04:54.423131  PCI: 00:1e.3 cmd <- 02

 1914 16:04:54.426064  PCI: 00:1f.0 subsystem <- 8086/5182

 1915 16:04:54.429399  PCI: 00:1f.0 cmd <- 407

 1916 16:04:54.432641  PCI: 00:1f.3 subsystem <- 8086/51c8

 1917 16:04:54.433150  PCI: 00:1f.3 cmd <- 02

 1918 16:04:54.439155  PCI: 00:1f.5 subsystem <- 8086/51a4

 1919 16:04:54.439682  PCI: 00:1f.5 cmd <- 406

 1920 16:04:54.442492  PCI: 01:00.0 cmd <- 02

 1921 16:04:54.443122  done.

 1922 16:04:54.448967  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1923 16:04:54.452480  ME: Version: Unavailable

 1924 16:04:54.455856  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1925 16:04:54.459437  Initializing devices...

 1926 16:04:54.462494  Root Device init

 1927 16:04:54.462983  mainboard: EC init

 1928 16:04:54.469193  Chrome EC: Set SMI mask to 0x0000000000000000

 1929 16:04:54.472296  Chrome EC: UHEPI supported

 1930 16:04:54.475987  Chrome EC: clear events_b mask to 0x0000000000000000

 1931 16:04:54.482735  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1932 16:04:54.489592  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1933 16:04:54.495681  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1934 16:04:54.502321  Chrome EC: Set WAKE mask to 0x0000000000000000

 1935 16:04:54.505851  Root Device init finished in 41 msecs

 1936 16:04:54.508991  PCI: 00:00.0 init

 1937 16:04:54.512598  CPU TDP = 15 Watts

 1938 16:04:54.513083  CPU PL1 = 15 Watts

 1939 16:04:54.515825  CPU PL2 = 55 Watts

 1940 16:04:54.518963  CPU PL4 = 123 Watts

 1941 16:04:54.522365  PCI: 00:00.0 init finished in 8 msecs

 1942 16:04:54.522855  PCI: 00:02.0 init

 1943 16:04:54.525581  GMA: Found VBT in CBFS

 1944 16:04:54.528875  GMA: Found valid VBT in CBFS

 1945 16:04:54.535858  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1946 16:04:54.542027                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1947 16:04:54.544966  PCI: 00:02.0 init finished in 18 msecs

 1948 16:04:54.548981  PCI: 00:06.0 init

 1949 16:04:54.552116  Initializing PCH PCIe bridge.

 1950 16:04:54.555846  PCI: 00:06.0 init finished in 3 msecs

 1951 16:04:54.556352  PCI: 00:0a.0 init

 1952 16:04:54.561959  PCI: 00:0a.0 init finished in 0 msecs

 1953 16:04:54.562463  PCI: 00:14.0 init

 1954 16:04:54.565334  PCI: 00:14.0 init finished in 0 msecs

 1955 16:04:54.568828  PCI: 00:14.2 init

 1956 16:04:54.572106  PCI: 00:14.2 init finished in 0 msecs

 1957 16:04:54.572609  PCI: 00:15.0 init

 1958 16:04:54.575213  I2C bus 0 version 0x3230302a

 1959 16:04:54.578766  DW I2C bus 0 at 0x80655000 (400 KHz)

 1960 16:04:54.585318  PCI: 00:15.0 init finished in 6 msecs

 1961 16:04:54.585815  PCI: 00:15.1 init

 1962 16:04:54.588798  I2C bus 1 version 0x3230302a

 1963 16:04:54.592646  DW I2C bus 1 at 0x80656000 (400 KHz)

 1964 16:04:54.595608  PCI: 00:15.1 init finished in 6 msecs

 1965 16:04:54.598317  PCI: 00:15.3 init

 1966 16:04:54.602103  I2C bus 3 version 0x3230302a

 1967 16:04:54.605616  DW I2C bus 3 at 0x80657000 (400 KHz)

 1968 16:04:54.608634  PCI: 00:15.3 init finished in 6 msecs

 1969 16:04:54.612087  PCI: 00:16.0 init

 1970 16:04:54.615198  PCI: 00:16.0 init finished in 0 msecs

 1971 16:04:54.615701  PCI: 00:19.1 init

 1972 16:04:54.618826  I2C bus 5 version 0x3230302a

 1973 16:04:54.622372  DW I2C bus 5 at 0x80659000 (400 KHz)

 1974 16:04:54.624947  PCI: 00:19.1 init finished in 6 msecs

 1975 16:04:54.628285  PCI: 00:1f.0 init

 1976 16:04:54.631809  IOAPIC: Initializing IOAPIC at 0xfec00000

 1977 16:04:54.635082  IOAPIC: ID = 0x02

 1978 16:04:54.638061  IOAPIC: Dumping registers

 1979 16:04:54.641487    reg 0x0000: 0x02000000

 1980 16:04:54.641989    reg 0x0001: 0x00770020

 1981 16:04:54.644939    reg 0x0002: 0x00000000

 1982 16:04:54.648766  IOAPIC: 120 interrupts

 1983 16:04:54.651828  IOAPIC: Clearing IOAPIC at 0xfec00000

 1984 16:04:54.655227  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1985 16:04:54.661561  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1986 16:04:54.664773  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1987 16:04:54.671546  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1988 16:04:54.674690  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1989 16:04:54.681600  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1990 16:04:54.684883  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1991 16:04:54.688345  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1992 16:04:54.694431  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1993 16:04:54.698039  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1994 16:04:54.705111  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1995 16:04:54.708210  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 1996 16:04:54.714658  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 1997 16:04:54.718005  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 1998 16:04:54.724574  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 1999 16:04:54.727955  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2000 16:04:54.731484  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2001 16:04:54.737794  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2002 16:04:54.741032  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2003 16:04:54.747989  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2004 16:04:54.751338  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2005 16:04:54.757948  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2006 16:04:54.761111  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2007 16:04:54.767906  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2008 16:04:54.771206  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2009 16:04:54.774401  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2010 16:04:54.781167  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2011 16:04:54.784463  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2012 16:04:54.791199  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2013 16:04:54.794363  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2014 16:04:54.801061  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2015 16:04:54.804535  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2016 16:04:54.810800  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2017 16:04:54.814325  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2018 16:04:54.817850  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2019 16:04:54.824688  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2020 16:04:54.827596  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2021 16:04:54.834123  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2022 16:04:54.837611  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2023 16:04:54.844179  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2024 16:04:54.847344  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2025 16:04:54.854102  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2026 16:04:54.857379  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2027 16:04:54.860463  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2028 16:04:54.867358  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2029 16:04:54.870568  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2030 16:04:54.877349  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2031 16:04:54.880587  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2032 16:04:54.887538  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2033 16:04:54.890737  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2034 16:04:54.893980  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2035 16:04:54.900500  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2036 16:04:54.904185  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2037 16:04:54.910919  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2038 16:04:54.914073  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2039 16:04:54.920586  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2040 16:04:54.923778  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2041 16:04:54.930750  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2042 16:04:54.933902  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2043 16:04:54.937171  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2044 16:04:54.944012  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2045 16:04:54.947157  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2046 16:04:54.953998  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2047 16:04:54.957122  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2048 16:04:54.963729  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2049 16:04:54.966839  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2050 16:04:54.973389  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2051 16:04:54.976797  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2052 16:04:54.980568  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2053 16:04:54.987075  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2054 16:04:54.990229  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2055 16:04:54.996692  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2056 16:04:55.000136  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2057 16:04:55.006867  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2058 16:04:55.010001  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2059 16:04:55.016796  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2060 16:04:55.020182  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2061 16:04:55.023253  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2062 16:04:55.029976  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2063 16:04:55.033311  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2064 16:04:55.040226  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2065 16:04:55.043519  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2066 16:04:55.050306  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2067 16:04:55.053013  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2068 16:04:55.059881  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2069 16:04:55.063485  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2070 16:04:55.066495  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2071 16:04:55.073533  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2072 16:04:55.076481  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2073 16:04:55.083274  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2074 16:04:55.087181  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2075 16:04:55.093110  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2076 16:04:55.096422  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2077 16:04:55.103261  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2078 16:04:55.106531  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2079 16:04:55.109861  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2080 16:04:55.116349  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2081 16:04:55.119755  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2082 16:04:55.126503  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2083 16:04:55.129692  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2084 16:04:55.136368  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2085 16:04:55.139624  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2086 16:04:55.146088  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2087 16:04:55.149786  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2088 16:04:55.152626  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2089 16:04:55.159551  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2090 16:04:55.162927  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2091 16:04:55.169818  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2092 16:04:55.173000  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2093 16:04:55.179550  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2094 16:04:55.182909  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2095 16:04:55.189449  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2096 16:04:55.192952  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2097 16:04:55.195952  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2098 16:04:55.202878  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2099 16:04:55.206319  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2100 16:04:55.212878  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2101 16:04:55.216030  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2102 16:04:55.222565  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2103 16:04:55.225990  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2104 16:04:55.228958  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2105 16:04:55.236003  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2106 16:04:55.239041  PCI: 00:1f.0 init finished in 607 msecs

 2107 16:04:55.242795  PCI: 00:1f.2 init

 2108 16:04:55.245685  apm_control: Disabling ACPI.

 2109 16:04:55.249754  APMC done.

 2110 16:04:55.254246  PCI: 00:1f.2 init finished in 7 msecs

 2111 16:04:55.256867  PCI: 00:1f.3 init

 2112 16:04:55.260121  PCI: 00:1f.3 init finished in 0 msecs

 2113 16:04:55.260613  PCI: 01:00.0 init

 2114 16:04:55.263184  PCI: 01:00.0 init finished in 0 msecs

 2115 16:04:55.266805  PNP: 0c09.0 init

 2116 16:04:55.273275  Google Chrome EC uptime: 12.143 seconds

 2117 16:04:55.276850  Google Chrome AP resets since EC boot: 1

 2118 16:04:55.280092  Google Chrome most recent AP reset causes:

 2119 16:04:55.283412  	0.341: 32775 shutdown: entering G3

 2120 16:04:55.289731  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2121 16:04:55.293366  PNP: 0c09.0 init finished in 23 msecs

 2122 16:04:55.296132  GENERIC: 0.0 init

 2123 16:04:55.300030  GENERIC: 0.0 init finished in 0 msecs

 2124 16:04:55.303098  GENERIC: 1.0 init

 2125 16:04:55.306498  GENERIC: 1.0 init finished in 0 msecs

 2126 16:04:55.306984  Devices initialized

 2127 16:04:55.309936  Show all devs... After init.

 2128 16:04:55.313203  Root Device: enabled 1

 2129 16:04:55.316417  CPU_CLUSTER: 0: enabled 1

 2130 16:04:55.319638  DOMAIN: 0000: enabled 1

 2131 16:04:55.320127  GPIO: 0: enabled 1

 2132 16:04:55.322887  PCI: 00:00.0: enabled 1

 2133 16:04:55.326472  PCI: 00:01.0: enabled 0

 2134 16:04:55.326960  PCI: 00:01.1: enabled 0

 2135 16:04:55.329269  PCI: 00:02.0: enabled 1

 2136 16:04:55.333037  PCI: 00:04.0: enabled 1

 2137 16:04:55.336328  PCI: 00:05.0: enabled 0

 2138 16:04:55.336813  PCI: 00:06.0: enabled 1

 2139 16:04:55.339714  PCI: 00:06.2: enabled 0

 2140 16:04:55.342882  PCI: 00:07.0: enabled 0

 2141 16:04:55.345993  PCI: 00:07.1: enabled 0

 2142 16:04:55.346493  PCI: 00:07.2: enabled 0

 2143 16:04:55.349498  PCI: 00:07.3: enabled 0

 2144 16:04:55.352623  PCI: 00:08.0: enabled 0

 2145 16:04:55.353114  PCI: 00:09.0: enabled 0

 2146 16:04:55.355867  PCI: 00:0a.0: enabled 1

 2147 16:04:55.359300  PCI: 00:0d.0: enabled 1

 2148 16:04:55.362395  PCI: 00:0d.1: enabled 0

 2149 16:04:55.362798  PCI: 00:0d.2: enabled 0

 2150 16:04:55.366158  PCI: 00:0d.3: enabled 0

 2151 16:04:55.369544  PCI: 00:0e.0: enabled 0

 2152 16:04:55.372853  PCI: 00:10.0: enabled 0

 2153 16:04:55.373280  PCI: 00:10.1: enabled 0

 2154 16:04:55.375789  PCI: 00:10.6: enabled 0

 2155 16:04:55.379111  PCI: 00:10.7: enabled 0

 2156 16:04:55.382588  PCI: 00:12.0: enabled 0

 2157 16:04:55.382969  PCI: 00:12.6: enabled 0

 2158 16:04:55.385936  PCI: 00:12.7: enabled 0

 2159 16:04:55.389654  PCI: 00:13.0: enabled 0

 2160 16:04:55.392859  PCI: 00:14.0: enabled 1

 2161 16:04:55.393355  PCI: 00:14.1: enabled 0

 2162 16:04:55.395627  PCI: 00:14.2: enabled 1

 2163 16:04:55.399486  PCI: 00:14.3: enabled 1

 2164 16:04:55.399940  PCI: 00:15.0: enabled 1

 2165 16:04:55.402493  PCI: 00:15.1: enabled 1

 2166 16:04:55.406303  PCI: 00:15.2: enabled 0

 2167 16:04:55.409865  PCI: 00:15.3: enabled 1

 2168 16:04:55.410363  PCI: 00:16.0: enabled 1

 2169 16:04:55.412763  PCI: 00:16.1: enabled 0

 2170 16:04:55.415993  PCI: 00:16.2: enabled 0

 2171 16:04:55.419279  PCI: 00:16.3: enabled 0

 2172 16:04:55.419770  PCI: 00:16.4: enabled 0

 2173 16:04:55.422536  PCI: 00:16.5: enabled 0

 2174 16:04:55.426003  PCI: 00:17.0: enabled 0

 2175 16:04:55.428977  PCI: 00:19.0: enabled 0

 2176 16:04:55.429508  PCI: 00:19.1: enabled 1

 2177 16:04:55.432560  PCI: 00:19.2: enabled 0

 2178 16:04:55.436012  PCI: 00:1a.0: enabled 0

 2179 16:04:55.436500  PCI: 00:1c.0: enabled 0

 2180 16:04:55.439365  PCI: 00:1c.1: enabled 0

 2181 16:04:55.442626  PCI: 00:1c.2: enabled 0

 2182 16:04:55.445847  PCI: 00:1c.3: enabled 0

 2183 16:04:55.446338  PCI: 00:1c.4: enabled 0

 2184 16:04:55.449046  PCI: 00:1c.5: enabled 0

 2185 16:04:55.452283  PCI: 00:1c.6: enabled 0

 2186 16:04:55.455897  PCI: 00:1c.7: enabled 0

 2187 16:04:55.456385  PCI: 00:1d.0: enabled 0

 2188 16:04:55.459359  PCI: 00:1d.1: enabled 0

 2189 16:04:55.462262  PCI: 00:1d.2: enabled 0

 2190 16:04:55.466577  PCI: 00:1d.3: enabled 0

 2191 16:04:55.467125  PCI: 00:1e.0: enabled 1

 2192 16:04:55.468943  PCI: 00:1e.1: enabled 0

 2193 16:04:55.472097  PCI: 00:1e.2: enabled 0

 2194 16:04:55.475518  PCI: 00:1e.3: enabled 1

 2195 16:04:55.475900  PCI: 00:1f.0: enabled 1

 2196 16:04:55.479130  PCI: 00:1f.1: enabled 0

 2197 16:04:55.482515  PCI: 00:1f.2: enabled 1

 2198 16:04:55.483006  PCI: 00:1f.3: enabled 1

 2199 16:04:55.485788  PCI: 00:1f.4: enabled 0

 2200 16:04:55.488982  PCI: 00:1f.5: enabled 1

 2201 16:04:55.492080  PCI: 00:1f.6: enabled 0

 2202 16:04:55.492462  PCI: 00:1f.7: enabled 0

 2203 16:04:55.495296  GENERIC: 0.0: enabled 1

 2204 16:04:55.499075  GENERIC: 0.0: enabled 1

 2205 16:04:55.502184  GENERIC: 1.0: enabled 1

 2206 16:04:55.502668  GENERIC: 0.0: enabled 1

 2207 16:04:55.505487  GENERIC: 1.0: enabled 1

 2208 16:04:55.508983  USB0 port 0: enabled 1

 2209 16:04:55.512199  USB0 port 0: enabled 1

 2210 16:04:55.512711  GENERIC: 0.0: enabled 1

 2211 16:04:55.515859  I2C: 00:1a: enabled 1

 2212 16:04:55.518733  I2C: 00:31: enabled 1

 2213 16:04:55.519212  I2C: 00:32: enabled 1

 2214 16:04:55.522130  I2C: 00:50: enabled 1

 2215 16:04:55.525861  I2C: 00:10: enabled 1

 2216 16:04:55.526348  I2C: 00:15: enabled 1

 2217 16:04:55.528639  I2C: 00:2c: enabled 1

 2218 16:04:55.532163  GENERIC: 0.0: enabled 1

 2219 16:04:55.532648  SPI: 00: enabled 1

 2220 16:04:55.535585  PNP: 0c09.0: enabled 1

 2221 16:04:55.538722  GENERIC: 0.0: enabled 1

 2222 16:04:55.539198  USB3 port 0: enabled 1

 2223 16:04:55.542103  USB3 port 1: enabled 0

 2224 16:04:55.545319  USB3 port 2: enabled 1

 2225 16:04:55.548592  USB3 port 3: enabled 0

 2226 16:04:55.548981  USB2 port 0: enabled 1

 2227 16:04:55.552093  USB2 port 1: enabled 0

 2228 16:04:55.555586  USB2 port 2: enabled 1

 2229 16:04:55.556072  USB2 port 3: enabled 0

 2230 16:04:55.558907  USB2 port 4: enabled 0

 2231 16:04:55.561931  USB2 port 5: enabled 1

 2232 16:04:55.565661  USB2 port 6: enabled 0

 2233 16:04:55.566145  USB2 port 7: enabled 0

 2234 16:04:55.569086  USB2 port 8: enabled 1

 2235 16:04:55.572264  USB2 port 9: enabled 1

 2236 16:04:55.572762  USB3 port 0: enabled 1

 2237 16:04:55.574916  USB3 port 1: enabled 0

 2238 16:04:55.578762  USB3 port 2: enabled 0

 2239 16:04:55.579262  USB3 port 3: enabled 0

 2240 16:04:55.582149  GENERIC: 0.0: enabled 1

 2241 16:04:55.585238  GENERIC: 1.0: enabled 1

 2242 16:04:55.588518  APIC: 00: enabled 1

 2243 16:04:55.589006  APIC: 12: enabled 1

 2244 16:04:55.591949  APIC: 14: enabled 1

 2245 16:04:55.592456  APIC: 16: enabled 1

 2246 16:04:55.595182  APIC: 10: enabled 1

 2247 16:04:55.598312  APIC: 01: enabled 1

 2248 16:04:55.598705  APIC: 08: enabled 1

 2249 16:04:55.601971  APIC: 09: enabled 1

 2250 16:04:55.605000  PCI: 01:00.0: enabled 1

 2251 16:04:55.608796  BS: BS_DEV_INIT run times (exec / console): 13 / 1133 ms

 2252 16:04:55.615273  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2253 16:04:55.618574  ELOG: NV offset 0xf20000 size 0x4000

 2254 16:04:55.625127  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2255 16:04:55.631884  ELOG: Event(17) added with size 13 at 2023-08-26 16:04:55 UTC

 2256 16:04:55.638515  ELOG: Event(9E) added with size 10 at 2023-08-26 16:04:55 UTC

 2257 16:04:55.645015  ELOG: Event(9F) added with size 14 at 2023-08-26 16:04:55 UTC

 2258 16:04:55.651570  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2259 16:04:55.658216  ELOG: Event(A0) added with size 9 at 2023-08-26 16:04:55 UTC

 2260 16:04:55.661772  elog_add_boot_reason: Logged dev mode boot

 2261 16:04:55.668019  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2262 16:04:55.671345  Finalize devices...

 2263 16:04:55.671840  PCI: 00:16.0 final

 2264 16:04:55.674622  PCI: 00:1f.2 final

 2265 16:04:55.675064  GENERIC: 0.0 final

 2266 16:04:55.681450  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2267 16:04:55.684549  GENERIC: 1.0 final

 2268 16:04:55.691312  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2269 16:04:55.691812  Devices finalized

 2270 16:04:55.697840  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2271 16:04:55.701040  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2272 16:04:55.707844  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2273 16:04:55.714448  ME: HFSTS1                      : 0x90000245

 2274 16:04:55.717853  ME: HFSTS2                      : 0x82100116

 2275 16:04:55.721051  ME: HFSTS3                      : 0x00000050

 2276 16:04:55.728007  ME: HFSTS4                      : 0x00004000

 2277 16:04:55.731720  ME: HFSTS5                      : 0x00000000

 2278 16:04:55.734354  ME: HFSTS6                      : 0x40600006

 2279 16:04:55.737929  ME: Manufacturing Mode          : NO

 2280 16:04:55.744381  ME: SPI Protection Mode Enabled : YES

 2281 16:04:55.747725  ME: FPFs Committed              : YES

 2282 16:04:55.750584  ME: Manufacturing Vars Locked   : YES

 2283 16:04:55.754361  ME: FW Partition Table          : OK

 2284 16:04:55.757674  ME: Bringup Loader Failure      : NO

 2285 16:04:55.761103  ME: Firmware Init Complete      : YES

 2286 16:04:55.764547  ME: Boot Options Present        : NO

 2287 16:04:55.770594  ME: Update In Progress          : NO

 2288 16:04:55.774420  ME: D0i3 Support                : YES

 2289 16:04:55.777415  ME: Low Power State Enabled     : NO

 2290 16:04:55.780949  ME: CPU Replaced                : YES

 2291 16:04:55.784160  ME: CPU Replacement Valid       : YES

 2292 16:04:55.787662  ME: Current Working State       : 5

 2293 16:04:55.790979  ME: Current Operation State     : 1

 2294 16:04:55.794056  ME: Current Operation Mode      : 0

 2295 16:04:55.797286  ME: Error Code                  : 0

 2296 16:04:55.804032  ME: Enhanced Debug Mode         : NO

 2297 16:04:55.807338  ME: CPU Debug Disabled          : YES

 2298 16:04:55.811251  ME: TXT Support                 : NO

 2299 16:04:55.814056  ME: WP for RO is enabled        : YES

 2300 16:04:55.820464  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2301 16:04:55.827090  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2302 16:04:55.830640  Ramoops buffer: 0x100000@0x76899000.

 2303 16:04:55.834088  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2304 16:04:55.843806  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2305 16:04:55.847194  CBFS: 'fallback/slic' not found.

 2306 16:04:55.850283  ACPI: Writing ACPI tables at 7686d000.

 2307 16:04:55.850671  ACPI:    * FACS

 2308 16:04:55.853875  ACPI:    * DSDT

 2309 16:04:55.860517  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2310 16:04:55.863857  ACPI:    * FADT

 2311 16:04:55.864349  SCI is IRQ9

 2312 16:04:55.870474  ACPI: added table 1/32, length now 40

 2313 16:04:55.870972  ACPI:     * SSDT

 2314 16:04:55.876907  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2315 16:04:55.880544  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2316 16:04:55.886846  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2317 16:04:55.890069  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2318 16:04:55.896920  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2319 16:04:55.900312  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2320 16:04:55.906925  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2321 16:04:55.913607  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2322 16:04:55.916910  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2323 16:04:55.923590  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2324 16:04:55.926639  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2325 16:04:55.933632  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2326 16:04:55.936653  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2327 16:04:55.943088  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2328 16:04:55.949973  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2329 16:04:55.953123  PS2K: Passing 80 keymaps to kernel

 2330 16:04:55.960091  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2331 16:04:55.966568  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2332 16:04:55.973040  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2333 16:04:55.979700  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2334 16:04:55.982866  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2335 16:04:55.990022  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2336 16:04:55.995934  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2337 16:04:56.002990  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2338 16:04:56.009857  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2339 16:04:56.016288  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2340 16:04:56.020007  ACPI: added table 2/32, length now 44

 2341 16:04:56.022867  ACPI:    * MCFG

 2342 16:04:56.026197  ACPI: added table 3/32, length now 48

 2343 16:04:56.026632  ACPI:    * TPM2

 2344 16:04:56.029407  TPM2 log created at 0x7685d000

 2345 16:04:56.032769  ACPI: added table 4/32, length now 52

 2346 16:04:56.036404  ACPI:     * LPIT

 2347 16:04:56.039526  ACPI: added table 5/32, length now 56

 2348 16:04:56.042929  ACPI:    * MADT

 2349 16:04:56.043434  SCI is IRQ9

 2350 16:04:56.045956  ACPI: added table 6/32, length now 60

 2351 16:04:56.049528  cmd_reg from pmc_make_ipc_cmd 1052838

 2352 16:04:56.056133  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2353 16:04:56.062818  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2354 16:04:56.069518  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2355 16:04:56.072503  PMC CrashLog size in discovery mode: 0xC00

 2356 16:04:56.075997  cpu crashlog bar addr: 0x80640000

 2357 16:04:56.079164  cpu discovery table offset: 0x6030

 2358 16:04:56.085869  cpu_crashlog_discovery_table buffer count: 0x3

 2359 16:04:56.089430  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2360 16:04:56.095848  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2361 16:04:56.105914  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2362 16:04:56.109240  PMC crashLog size in discovery mode : 0xC00

 2363 16:04:56.115978  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2364 16:04:56.119208  discover mode PMC crashlog size adjusted to: 0x200

 2365 16:04:56.125401  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2366 16:04:56.132120  discover mode PMC crashlog size adjusted to: 0x0

 2367 16:04:56.135746  m_cpu_crashLog_size : 0x3480 bytes

 2368 16:04:56.138962  CPU crashLog present.

 2369 16:04:56.142066  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2370 16:04:56.148872  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2371 16:04:56.151740  current = 76876550

 2372 16:04:56.155195  ACPI:    * DMAR

 2373 16:04:56.158514  ACPI: added table 7/32, length now 64

 2374 16:04:56.161605  ACPI: added table 8/32, length now 68

 2375 16:04:56.161929  ACPI:    * HPET

 2376 16:04:56.168424  ACPI: added table 9/32, length now 72

 2377 16:04:56.168955  ACPI: done.

 2378 16:04:56.171613  ACPI tables: 38528 bytes.

 2379 16:04:56.175229  smbios_write_tables: 76857000

 2380 16:04:56.178604  EC returned error result code 3

 2381 16:04:56.181783  Couldn't obtain OEM name from CBI

 2382 16:04:56.185368  Create SMBIOS type 16

 2383 16:04:56.185869  Create SMBIOS type 17

 2384 16:04:56.188918  Create SMBIOS type 20

 2385 16:04:56.192325  GENERIC: 0.0 (WIFI Device)

 2386 16:04:56.195394  SMBIOS tables: 2156 bytes.

 2387 16:04:56.198656  Writing table forward entry at 0x00000500

 2388 16:04:56.205483  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2389 16:04:56.208598  Writing coreboot table at 0x76891000

 2390 16:04:56.215252   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2391 16:04:56.218321   1. 0000000000001000-000000000009ffff: RAM

 2392 16:04:56.221770   2. 00000000000a0000-00000000000fffff: RESERVED

 2393 16:04:56.228288   3. 0000000000100000-0000000076856fff: RAM

 2394 16:04:56.235131   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2395 16:04:56.238735   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2396 16:04:56.245039   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2397 16:04:56.248584   7. 0000000077000000-00000000803fffff: RESERVED

 2398 16:04:56.254852   8. 00000000c0000000-00000000cfffffff: RESERVED

 2399 16:04:56.258372   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2400 16:04:56.264892  10. 00000000fb000000-00000000fb000fff: RESERVED

 2401 16:04:56.268131  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2402 16:04:56.271685  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2403 16:04:56.278352  13. 00000000fec00000-00000000fecfffff: RESERVED

 2404 16:04:56.281423  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2405 16:04:56.287896  15. 00000000fed80000-00000000fed87fff: RESERVED

 2406 16:04:56.291332  16. 00000000fed90000-00000000fed92fff: RESERVED

 2407 16:04:56.298394  17. 00000000feda0000-00000000feda1fff: RESERVED

 2408 16:04:56.301240  18. 00000000fedc0000-00000000feddffff: RESERVED

 2409 16:04:56.304563  19. 0000000100000000-000000027fbfffff: RAM

 2410 16:04:56.307947  Passing 4 GPIOs to payload:

 2411 16:04:56.314649              NAME |       PORT | POLARITY |     VALUE

 2412 16:04:56.318126               lid |  undefined |     high |      high

 2413 16:04:56.324586             power |  undefined |     high |       low

 2414 16:04:56.331089             oprom |  undefined |     high |       low

 2415 16:04:56.334647          EC in RW | 0x00000151 |     high |      high

 2416 16:04:56.337792  Board ID: 3

 2417 16:04:56.338296  FW config: 0x131

 2418 16:04:56.344463  Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum c11c

 2419 16:04:56.347676  coreboot table: 1748 bytes.

 2420 16:04:56.350938  IMD ROOT    0. 0x76fff000 0x00001000

 2421 16:04:56.353984  IMD SMALL   1. 0x76ffe000 0x00001000

 2422 16:04:56.357546  FSP MEMORY  2. 0x76afe000 0x00500000

 2423 16:04:56.360882  CONSOLE     3. 0x76ade000 0x00020000

 2424 16:04:56.367487  RW MCACHE   4. 0x76add000 0x0000043c

 2425 16:04:56.370751  RO MCACHE   5. 0x76adc000 0x00000fd8

 2426 16:04:56.374063  FMAP        6. 0x76adb000 0x0000064a

 2427 16:04:56.377336  TIME STAMP  7. 0x76ada000 0x00000910

 2428 16:04:56.381179  VBOOT WORK  8. 0x76ac6000 0x00014000

 2429 16:04:56.384358  MEM INFO    9. 0x76ac5000 0x000003b8

 2430 16:04:56.387696  ROMSTG STCK10. 0x76ac4000 0x00001000

 2431 16:04:56.390947  AFTER CAR  11. 0x76ab8000 0x0000c000

 2432 16:04:56.397614  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2433 16:04:56.400686  ACPI BERT  13. 0x76a1e000 0x00010000

 2434 16:04:56.403679  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2435 16:04:56.407367  REFCODE    15. 0x769ae000 0x0006f000

 2436 16:04:56.410739  SMM BACKUP 16. 0x7699e000 0x00010000

 2437 16:04:56.413737  IGD OPREGION17. 0x76999000 0x00004203

 2438 16:04:56.417183  RAMOOPS    18. 0x76899000 0x00100000

 2439 16:04:56.424475  COREBOOT   19. 0x76891000 0x00008000

 2440 16:04:56.427342  ACPI       20. 0x7686d000 0x00024000

 2441 16:04:56.430418  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2442 16:04:56.434031  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2443 16:04:56.437071  CPU CRASHLOG23. 0x76858000 0x00003480

 2444 16:04:56.440391  SMBIOS     24. 0x76857000 0x00001000

 2445 16:04:56.443724  IMD small region:

 2446 16:04:56.446935    IMD ROOT    0. 0x76ffec00 0x00000400

 2447 16:04:56.450810    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2448 16:04:56.453650    POWER STATE 2. 0x76ffeb80 0x00000044

 2449 16:04:56.457332    ROMSTAGE    3. 0x76ffeb60 0x00000004

 2450 16:04:56.464037    ACPI GNVS   4. 0x76ffeb00 0x00000048

 2451 16:04:56.467204    TYPE_C INFO 5. 0x76ffeae0 0x0000000c

 2452 16:04:56.474030  BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms

 2453 16:04:56.474538  MTRR: Physical address space:

 2454 16:04:56.480790  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2455 16:04:56.487120  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2456 16:04:56.493778  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2457 16:04:56.500479  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2458 16:04:56.507025  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2459 16:04:56.513678  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2460 16:04:56.520447  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2461 16:04:56.523877  MTRR: Fixed MSR 0x250 0x0606060606060606

 2462 16:04:56.526906  MTRR: Fixed MSR 0x258 0x0606060606060606

 2463 16:04:56.529869  MTRR: Fixed MSR 0x259 0x0000000000000000

 2464 16:04:56.536668  MTRR: Fixed MSR 0x268 0x0606060606060606

 2465 16:04:56.539708  MTRR: Fixed MSR 0x269 0x0606060606060606

 2466 16:04:56.543535  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2467 16:04:56.546925  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2468 16:04:56.553289  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2469 16:04:56.557126  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2470 16:04:56.560198  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2471 16:04:56.563383  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2472 16:04:56.567589  call enable_fixed_mtrr()

 2473 16:04:56.570878  CPU physical address size: 39 bits

 2474 16:04:56.577658  MTRR: default type WB/UC MTRR counts: 6/6.

 2475 16:04:56.580724  MTRR: UC selected as default type.

 2476 16:04:56.587169  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2477 16:04:56.590555  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2478 16:04:56.597187  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2479 16:04:56.604062  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2480 16:04:56.610884  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2481 16:04:56.617081  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2482 16:04:56.624009  MTRR: Fixed MSR 0x250 0x0606060606060606

 2483 16:04:56.627201  MTRR: Fixed MSR 0x258 0x0606060606060606

 2484 16:04:56.630334  MTRR: Fixed MSR 0x259 0x0000000000000000

 2485 16:04:56.633375  MTRR: Fixed MSR 0x268 0x0606060606060606

 2486 16:04:56.640713  MTRR: Fixed MSR 0x269 0x0606060606060606

 2487 16:04:56.643756  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2488 16:04:56.646715  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2489 16:04:56.650053  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2490 16:04:56.657563  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2491 16:04:56.660319  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2492 16:04:56.663783  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2493 16:04:56.667035  MTRR: Fixed MSR 0x250 0x0606060606060606

 2494 16:04:56.670193  MTRR: Fixed MSR 0x250 0x0606060606060606

 2495 16:04:56.676840  MTRR: Fixed MSR 0x250 0x0606060606060606

 2496 16:04:56.680050  MTRR: Fixed MSR 0x250 0x0606060606060606

 2497 16:04:56.683675  MTRR: Fixed MSR 0x258 0x0606060606060606

 2498 16:04:56.686740  MTRR: Fixed MSR 0x259 0x0000000000000000

 2499 16:04:56.693104  MTRR: Fixed MSR 0x268 0x0606060606060606

 2500 16:04:56.696251  MTRR: Fixed MSR 0x269 0x0606060606060606

 2501 16:04:56.700323  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2502 16:04:56.703480  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2503 16:04:56.710225  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2504 16:04:56.713594  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2505 16:04:56.716697  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2506 16:04:56.719942  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2507 16:04:56.726604  MTRR: Fixed MSR 0x250 0x0606060606060606

 2508 16:04:56.729703  MTRR: Fixed MSR 0x258 0x0606060606060606

 2509 16:04:56.733037  call enable_fixed_mtrr()

 2510 16:04:56.736635  MTRR: Fixed MSR 0x259 0x0000000000000000

 2511 16:04:56.739808  MTRR: Fixed MSR 0x268 0x0606060606060606

 2512 16:04:56.742839  MTRR: Fixed MSR 0x269 0x0606060606060606

 2513 16:04:56.746271  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2514 16:04:56.753394  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2515 16:04:56.756459  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2516 16:04:56.759864  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2517 16:04:56.762945  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2518 16:04:56.769351  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2519 16:04:56.772558  MTRR: Fixed MSR 0x258 0x0606060606060606

 2520 16:04:56.776896  call enable_fixed_mtrr()

 2521 16:04:56.777402  call enable_fixed_mtrr()

 2522 16:04:56.779705  CPU physical address size: 39 bits

 2523 16:04:56.786401  MTRR: Fixed MSR 0x259 0x0000000000000000

 2524 16:04:56.789618  MTRR: Fixed MSR 0x258 0x0606060606060606

 2525 16:04:56.793028  CPU physical address size: 39 bits

 2526 16:04:56.796538  MTRR: Fixed MSR 0x268 0x0606060606060606

 2527 16:04:56.800034  MTRR: Fixed MSR 0x259 0x0000000000000000

 2528 16:04:56.806338  MTRR: Fixed MSR 0x269 0x0606060606060606

 2529 16:04:56.809602  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2530 16:04:56.812840  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2531 16:04:56.816782  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2532 16:04:56.822800  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2533 16:04:56.826148  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2534 16:04:56.829671  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2535 16:04:56.832545  MTRR: Fixed MSR 0x268 0x0606060606060606

 2536 16:04:56.836238  call enable_fixed_mtrr()

 2537 16:04:56.839459  CPU physical address size: 39 bits

 2538 16:04:56.842734  MTRR: Fixed MSR 0x269 0x0606060606060606

 2539 16:04:56.846210  CPU physical address size: 39 bits

 2540 16:04:56.852862  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2541 16:04:56.855922  MTRR: Fixed MSR 0x258 0x0606060606060606

 2542 16:04:56.859406  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2543 16:04:56.862595  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2544 16:04:56.869631  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2545 16:04:56.872861  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2546 16:04:56.875967  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2547 16:04:56.879227  MTRR: Fixed MSR 0x259 0x0000000000000000

 2548 16:04:56.882284  call enable_fixed_mtrr()

 2549 16:04:56.885668  MTRR: Fixed MSR 0x250 0x0606060606060606

 2550 16:04:56.888892  CPU physical address size: 39 bits

 2551 16:04:56.895775  MTRR: Fixed MSR 0x258 0x0606060606060606

 2552 16:04:56.898691  MTRR: Fixed MSR 0x268 0x0606060606060606

 2553 16:04:56.902343  MTRR: Fixed MSR 0x269 0x0606060606060606

 2554 16:04:56.905587  MTRR: Fixed MSR 0x259 0x0000000000000000

 2555 16:04:56.913058  MTRR: Fixed MSR 0x268 0x0606060606060606

 2556 16:04:56.915804  MTRR: Fixed MSR 0x269 0x0606060606060606

 2557 16:04:56.919194  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2558 16:04:56.922086  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2559 16:04:56.928841  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2560 16:04:56.932284  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2561 16:04:56.935844  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2562 16:04:56.938853  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2563 16:04:56.945548  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2564 16:04:56.946048  call enable_fixed_mtrr()

 2565 16:04:56.952227  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2566 16:04:56.955348  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2567 16:04:56.958724  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2568 16:04:56.962380  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2569 16:04:56.968486  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2570 16:04:56.971876  CPU physical address size: 39 bits

 2571 16:04:56.975583  call enable_fixed_mtrr()

 2572 16:04:56.978305  CPU physical address size: 39 bits

 2573 16:04:56.981670  

 2574 16:04:56.982167  MTRR check

 2575 16:04:56.985154  Fixed MTRRs   : Enabled

 2576 16:04:56.985707  Variable MTRRs: Enabled

 2577 16:04:56.985996  

 2578 16:04:56.991346  BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms

 2579 16:04:56.995046  Checking cr50 for pending updates

 2580 16:04:57.007111  Reading cr50 TPM mode

 2581 16:04:57.022518  BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms

 2582 16:04:57.032366  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2583 16:04:57.035815  Checking segment from ROM address 0xf96cbe6c

 2584 16:04:57.039106  Checking segment from ROM address 0xf96cbe88

 2585 16:04:57.045371  Loading segment from ROM address 0xf96cbe6c

 2586 16:04:57.045855    code (compression=1)

 2587 16:04:57.055738    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2588 16:04:57.065012  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2589 16:04:57.065537  using LZMA

 2590 16:04:57.088148  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2591 16:04:57.094520  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2592 16:04:57.102283  Loading segment from ROM address 0xf96cbe88

 2593 16:04:57.106012    Entry Point 0x30000000

 2594 16:04:57.106521  Loaded segments

 2595 16:04:57.112149  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2596 16:04:57.118834  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2597 16:04:57.122247  Finalizing chipset.

 2598 16:04:57.125388  apm_control: Finalizing SMM.

 2599 16:04:57.125845  APMC done.

 2600 16:04:57.128751  HECI: CSE device 16.1 is disabled

 2601 16:04:57.132219  HECI: CSE device 16.2 is disabled

 2602 16:04:57.135863  HECI: CSE device 16.3 is disabled

 2603 16:04:57.139224  HECI: CSE device 16.4 is disabled

 2604 16:04:57.142389  HECI: CSE device 16.5 is disabled

 2605 16:04:57.145389  HECI: Sending End-of-Post

 2606 16:04:57.154019  CSE: EOP requested action: continue boot

 2607 16:04:57.157702  CSE EOP successful, continuing boot

 2608 16:04:57.164246  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2609 16:04:57.167324  mp_park_aps done after 0 msecs.

 2610 16:04:57.170443  Jumping to boot code at 0x30000000(0x76891000)

 2611 16:04:57.180307  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2612 16:04:57.184637  

 2613 16:04:57.185135  

 2614 16:04:57.185483  

 2615 16:04:57.188062  Starting depthcharge on Volmar...

 2616 16:04:57.188565  

 2617 16:04:57.189862  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2618 16:04:57.190271  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2619 16:04:57.190656  Setting prompt string to ['brya:']
 2620 16:04:57.190964  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2621 16:04:57.194549  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2622 16:04:57.195058  

 2623 16:04:57.201257  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2624 16:04:57.201771  

 2625 16:04:57.207665  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2626 16:04:57.208161  

 2627 16:04:57.211492  configure_storage: Failed to remap 1C:2

 2628 16:04:57.211997  

 2629 16:04:57.214896  Wipe memory regions:

 2630 16:04:57.215401  

 2631 16:04:57.217991  	[0x00000000001000, 0x000000000a0000)

 2632 16:04:57.218491  

 2633 16:04:57.221173  	[0x00000000100000, 0x00000030000000)

 2634 16:04:57.326078  

 2635 16:04:57.329384  	[0x00000032668e60, 0x00000076857000)

 2636 16:04:57.477061  

 2637 16:04:57.480165  	[0x00000100000000, 0x0000027fc00000)

 2638 16:04:58.311628  

 2639 16:04:58.314534  ec_init: CrosEC protocol v3 supported (256, 256)

 2640 16:04:58.923576  

 2641 16:04:58.924077  R8152: Initializing

 2642 16:04:58.924364  

 2643 16:04:58.926467  Version 9 (ocp_data = 6010)

 2644 16:04:58.926963  

 2645 16:04:58.929858  R8152: Done initializing

 2646 16:04:58.930340  

 2647 16:04:58.933255  Adding net device

 2648 16:04:59.233939  

 2649 16:04:59.237045  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2650 16:04:59.237577  

 2651 16:04:59.237868  

 2652 16:04:59.238113  

 2653 16:04:59.238750  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2655 16:04:59.339858  brya: tftpboot 192.168.201.1 11363393/tftp-deploy-vn2b_ee8/kernel/bzImage 11363393/tftp-deploy-vn2b_ee8/kernel/cmdline 11363393/tftp-deploy-vn2b_ee8/ramdisk/ramdisk.cpio.gz

 2656 16:04:59.340453  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2657 16:04:59.340809  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2658 16:04:59.345546  tftpboot 192.168.201.1 11363393/tftp-deploy-vn2b_ee8/kernel/bzIploy-vn2b_ee8/kernel/cmdline 11363393/tftp-deploy-vn2b_ee8/ramdisk/ramdisk.cpio.gz

 2659 16:04:59.346063  

 2660 16:04:59.346347  Waiting for link

 2661 16:04:59.548087  

 2662 16:04:59.548581  done.

 2663 16:04:59.548865  

 2664 16:04:59.549106  MAC: 00:e0:4c:68:03:d9

 2665 16:04:59.549390  

 2666 16:04:59.551457  Sending DHCP discover... done.

 2667 16:04:59.551955  

 2668 16:04:59.554709  Waiting for reply... done.

 2669 16:04:59.555231  

 2670 16:04:59.557842  Sending DHCP request... done.

 2671 16:04:59.558232  

 2672 16:04:59.564242  Waiting for reply... done.

 2673 16:04:59.564754  

 2674 16:04:59.565058  My ip is 192.168.201.14

 2675 16:04:59.565340  

 2676 16:04:59.567570  The DHCP server ip is 192.168.201.1

 2677 16:04:59.571103  

 2678 16:04:59.574448  TFTP server IP predefined by user: 192.168.201.1

 2679 16:04:59.574870  

 2680 16:04:59.580884  Bootfile predefined by user: 11363393/tftp-deploy-vn2b_ee8/kernel/bzImage

 2681 16:04:59.581439  

 2682 16:04:59.584209  Sending tftp read request... done.

 2683 16:04:59.584611  

 2684 16:04:59.591730  Waiting for the transfer... 

 2685 16:04:59.592220  

 2686 16:04:59.822553  00000000 ################################################################

 2687 16:04:59.822664  

 2688 16:05:00.052077  00080000 ################################################################

 2689 16:05:00.052189  

 2690 16:05:00.276666  00100000 ################################################################

 2691 16:05:00.276782  

 2692 16:05:00.504326  00180000 ################################################################

 2693 16:05:00.504447  

 2694 16:05:00.733077  00200000 ################################################################

 2695 16:05:00.733186  

 2696 16:05:00.958697  00280000 ################################################################

 2697 16:05:00.958823  

 2698 16:05:01.185455  00300000 ################################################################

 2699 16:05:01.185583  

 2700 16:05:01.412659  00380000 ################################################################

 2701 16:05:01.412785  

 2702 16:05:01.639776  00400000 ################################################################

 2703 16:05:01.639882  

 2704 16:05:01.865437  00480000 ################################################################

 2705 16:05:01.865541  

 2706 16:05:02.092617  00500000 ################################################################

 2707 16:05:02.092754  

 2708 16:05:02.319959  00580000 ################################################################

 2709 16:05:02.320072  

 2710 16:05:02.548503  00600000 ################################################################

 2711 16:05:02.548612  

 2712 16:05:02.776081  00680000 ################################################################

 2713 16:05:02.776191  

 2714 16:05:03.003216  00700000 ################################################################

 2715 16:05:03.003340  

 2716 16:05:03.231670  00780000 ################################################################

 2717 16:05:03.231781  

 2718 16:05:03.459828  00800000 ################################################################

 2719 16:05:03.459950  

 2720 16:05:03.685685  00880000 ################################################################

 2721 16:05:03.685794  

 2722 16:05:03.910009  00900000 ################################################################

 2723 16:05:03.910130  

 2724 16:05:04.137041  00980000 ################################################################

 2725 16:05:04.137151  

 2726 16:05:04.364981  00a00000 ################################################################

 2727 16:05:04.365093  

 2728 16:05:04.593110  00a80000 ################################################################

 2729 16:05:04.593222  

 2730 16:05:04.821611  00b00000 ################################################################

 2731 16:05:04.821723  

 2732 16:05:05.049333  00b80000 ################################################################

 2733 16:05:05.049435  

 2734 16:05:05.277070  00c00000 ################################################################

 2735 16:05:05.277173  

 2736 16:05:05.505263  00c80000 ################################################################

 2737 16:05:05.505378  

 2738 16:05:05.672597  00d00000 ############################################### done.

 2739 16:05:05.672703  

 2740 16:05:05.675980  The bootfile was 14015328 bytes long.

 2741 16:05:05.676062  

 2742 16:05:05.679256  Sending tftp read request... done.

 2743 16:05:05.679338  

 2744 16:05:05.682913  Waiting for the transfer... 

 2745 16:05:05.682988  

 2746 16:05:05.912249  00000000 ################################################################

 2747 16:05:05.912367  

 2748 16:05:06.140212  00080000 ################################################################

 2749 16:05:06.140322  

 2750 16:05:06.369669  00100000 ################################################################

 2751 16:05:06.369811  

 2752 16:05:06.599302  00180000 ################################################################

 2753 16:05:06.599418  

 2754 16:05:06.828173  00200000 ################################################################

 2755 16:05:06.828278  

 2756 16:05:07.057387  00280000 ################################################################

 2757 16:05:07.057501  

 2758 16:05:07.286683  00300000 ################################################################

 2759 16:05:07.286805  

 2760 16:05:07.515896  00380000 ################################################################

 2761 16:05:07.516040  

 2762 16:05:07.745777  00400000 ################################################################

 2763 16:05:07.745892  

 2764 16:05:07.974238  00480000 ################################################################

 2765 16:05:07.974343  

 2766 16:05:08.202985  00500000 ################################################################

 2767 16:05:08.203096  

 2768 16:05:08.431330  00580000 ################################################################

 2769 16:05:08.431467  

 2770 16:05:08.656891  00600000 ################################################################

 2771 16:05:08.657005  

 2772 16:05:08.885177  00680000 ################################################################

 2773 16:05:08.885294  

 2774 16:05:09.114603  00700000 ################################################################

 2775 16:05:09.114741  

 2776 16:05:09.342141  00780000 ################################################################

 2777 16:05:09.342257  

 2778 16:05:09.571066  00800000 ################################################################

 2779 16:05:09.571200  

 2780 16:05:09.728502  00880000 ############################################# done.

 2781 16:05:09.728604  

 2782 16:05:09.732037  Sending tftp read request... done.

 2783 16:05:09.732118  

 2784 16:05:09.735156  Waiting for the transfer... 

 2785 16:05:09.735232  

 2786 16:05:09.738728  00000000 # done.

 2787 16:05:09.738804  

 2788 16:05:09.745279  Command line loaded dynamically from TFTP file: 11363393/tftp-deploy-vn2b_ee8/kernel/cmdline

 2789 16:05:09.745598  

 2790 16:05:09.762019  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2791 16:05:09.768142  

 2792 16:05:09.771652  Shutting down all USB controllers.

 2793 16:05:09.772110  

 2794 16:05:09.772364  Removing current net device

 2795 16:05:09.772583  

 2796 16:05:09.774603  Finalizing coreboot

 2797 16:05:09.774950  

 2798 16:05:09.781043  Exiting depthcharge with code 4 at timestamp: 22843702

 2799 16:05:09.781519  

 2800 16:05:09.781776  

 2801 16:05:09.781995  Starting kernel ...

 2802 16:05:09.782204  

 2803 16:05:09.782407  

 2804 16:05:09.783329  end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
 2805 16:05:09.783668  start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
 2806 16:05:09.783930  Setting prompt string to ['Linux version [0-9]']
 2807 16:05:09.784172  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2808 16:05:09.784416  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2810 16:09:37.784475  end: 2.2.5 auto-login-action (duration 00:04:28) [common]
 2812 16:09:37.785305  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
 2814 16:09:37.785913  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2817 16:09:37.786903  end: 2 depthcharge-action (duration 00:05:00) [common]
 2819 16:09:37.787769  Cleaning after the job
 2820 16:09:37.788091  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11363393/tftp-deploy-vn2b_ee8/ramdisk
 2821 16:09:37.789945  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11363393/tftp-deploy-vn2b_ee8/kernel
 2822 16:09:37.791309  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11363393/tftp-deploy-vn2b_ee8/modules
 2823 16:09:37.791717  start: 5.1 power-off (timeout 00:00:30) [common]
 2824 16:09:37.791850  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-1' '--port=1' '--command=off'
 2825 16:09:37.869847  >> Command sent successfully.

 2826 16:09:37.877814  Returned 0 in 0 seconds
 2827 16:09:37.978756  end: 5.1 power-off (duration 00:00:00) [common]
 2829 16:09:37.980010  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2830 16:09:37.980910  Listened to connection for namespace 'common' for up to 1s
 2832 16:09:37.982070  Listened to connection for namespace 'common' for up to 1s
 2833 16:09:38.981449  Finalising connection for namespace 'common'
 2834 16:09:38.981989  Disconnecting from shell: Finalise
 2835 16:09:38.982391  
 2836 16:09:39.083282  end: 5.2 read-feedback (duration 00:00:01) [common]
 2837 16:09:39.083834  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11363393
 2838 16:09:39.109683  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11363393
 2839 16:09:39.109840  JobError: Your job cannot terminate cleanly.