Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 12:50:30.822540 lava-dispatcher, installed at version: 2023.06
2 12:50:30.822745 start: 0 validate
3 12:50:30.822879 Start time: 2023-09-19 12:50:30.822871+00:00 (UTC)
4 12:50:30.823043 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:30.823189 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:50:31.094285 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:31.095419 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.191-cip38-661-g112a3073ff26%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:31.365452 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:31.366155 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.191-cip38-661-g112a3073ff26%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:50:47.863749 validate duration: 17.04
12 12:50:47.864005 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:50:47.864098 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:50:47.864178 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:50:47.864327 Not decompressing ramdisk as can be used compressed.
16 12:50:47.864423 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:50:47.864488 saving as /var/lib/lava/dispatcher/tmp/11570949/tftp-deploy-oixokc9y/ramdisk/rootfs.cpio.gz
18 12:50:47.864551 total size: 8418130 (8 MB)
19 12:50:48.997914 progress 0 % (0 MB)
20 12:50:49.010302 progress 5 % (0 MB)
21 12:50:49.022044 progress 10 % (0 MB)
22 12:50:49.031647 progress 15 % (1 MB)
23 12:50:49.037861 progress 20 % (1 MB)
24 12:50:49.042954 progress 25 % (2 MB)
25 12:50:49.047132 progress 30 % (2 MB)
26 12:50:49.050464 progress 35 % (2 MB)
27 12:50:49.053822 progress 40 % (3 MB)
28 12:50:49.056956 progress 45 % (3 MB)
29 12:50:49.059886 progress 50 % (4 MB)
30 12:50:49.062623 progress 55 % (4 MB)
31 12:50:49.065091 progress 60 % (4 MB)
32 12:50:49.067371 progress 65 % (5 MB)
33 12:50:49.069608 progress 70 % (5 MB)
34 12:50:49.071861 progress 75 % (6 MB)
35 12:50:49.074033 progress 80 % (6 MB)
36 12:50:49.076220 progress 85 % (6 MB)
37 12:50:49.078366 progress 90 % (7 MB)
38 12:50:49.080545 progress 95 % (7 MB)
39 12:50:49.082575 progress 100 % (8 MB)
40 12:50:49.082796 8 MB downloaded in 1.22 s (6.59 MB/s)
41 12:50:49.082988 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:50:49.083224 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:50:49.083308 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:50:49.083389 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:50:49.083523 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.191-cip38-661-g112a3073ff26/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:50:49.083590 saving as /var/lib/lava/dispatcher/tmp/11570949/tftp-deploy-oixokc9y/kernel/bzImage
48 12:50:49.083649 total size: 14016480 (13 MB)
49 12:50:49.083712 No compression specified
50 12:50:49.350590 progress 0 % (0 MB)
51 12:50:49.370418 progress 5 % (0 MB)
52 12:50:49.386865 progress 10 % (1 MB)
53 12:50:49.396072 progress 15 % (2 MB)
54 12:50:49.402648 progress 20 % (2 MB)
55 12:50:49.408129 progress 25 % (3 MB)
56 12:50:49.413195 progress 30 % (4 MB)
57 12:50:49.417608 progress 35 % (4 MB)
58 12:50:49.422059 progress 40 % (5 MB)
59 12:50:49.425891 progress 45 % (6 MB)
60 12:50:49.429618 progress 50 % (6 MB)
61 12:50:49.433375 progress 55 % (7 MB)
62 12:50:49.436872 progress 60 % (8 MB)
63 12:50:49.440556 progress 65 % (8 MB)
64 12:50:49.444285 progress 70 % (9 MB)
65 12:50:49.447817 progress 75 % (10 MB)
66 12:50:49.451583 progress 80 % (10 MB)
67 12:50:49.455211 progress 85 % (11 MB)
68 12:50:49.458693 progress 90 % (12 MB)
69 12:50:49.462374 progress 95 % (12 MB)
70 12:50:49.465971 progress 100 % (13 MB)
71 12:50:49.466179 13 MB downloaded in 0.38 s (34.94 MB/s)
72 12:50:49.466324 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:50:49.466549 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:50:49.466634 start: 1.3 download-retry (timeout 00:09:58) [common]
76 12:50:49.466716 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 12:50:49.466858 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.191-cip38-661-g112a3073ff26/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:50:49.466957 saving as /var/lib/lava/dispatcher/tmp/11570949/tftp-deploy-oixokc9y/modules/modules.tar
79 12:50:49.467048 total size: 527248 (0 MB)
80 12:50:49.467109 Using unxz to decompress xz
81 12:50:49.471199 progress 6 % (0 MB)
82 12:50:49.471581 progress 12 % (0 MB)
83 12:50:49.471815 progress 18 % (0 MB)
84 12:50:49.473573 progress 24 % (0 MB)
85 12:50:49.475584 progress 31 % (0 MB)
86 12:50:49.477491 progress 37 % (0 MB)
87 12:50:49.479568 progress 43 % (0 MB)
88 12:50:49.481523 progress 49 % (0 MB)
89 12:50:49.483619 progress 55 % (0 MB)
90 12:50:49.485535 progress 62 % (0 MB)
91 12:50:49.487658 progress 68 % (0 MB)
92 12:50:49.489613 progress 74 % (0 MB)
93 12:50:49.491823 progress 80 % (0 MB)
94 12:50:49.493714 progress 87 % (0 MB)
95 12:50:49.495550 progress 93 % (0 MB)
96 12:50:49.497903 progress 99 % (0 MB)
97 12:50:49.504325 0 MB downloaded in 0.04 s (13.49 MB/s)
98 12:50:49.504554 end: 1.3.1 http-download (duration 00:00:00) [common]
100 12:50:49.504805 end: 1.3 download-retry (duration 00:00:00) [common]
101 12:50:49.504897 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
102 12:50:49.504990 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
103 12:50:49.505070 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 12:50:49.505153 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
105 12:50:49.505373 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57
106 12:50:49.505505 makedir: /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin
107 12:50:49.505608 makedir: /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/tests
108 12:50:49.505704 makedir: /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/results
109 12:50:49.505817 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-add-keys
110 12:50:49.505965 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-add-sources
111 12:50:49.506096 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-background-process-start
112 12:50:49.506223 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-background-process-stop
113 12:50:49.506348 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-common-functions
114 12:50:49.506470 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-echo-ipv4
115 12:50:49.506594 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-install-packages
116 12:50:49.506716 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-installed-packages
117 12:50:49.506837 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-os-build
118 12:50:49.507017 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-probe-channel
119 12:50:49.507144 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-probe-ip
120 12:50:49.507265 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-target-ip
121 12:50:49.507386 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-target-mac
122 12:50:49.507506 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-target-storage
123 12:50:49.507630 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-test-case
124 12:50:49.507754 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-test-event
125 12:50:49.507875 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-test-feedback
126 12:50:49.507996 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-test-raise
127 12:50:49.508116 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-test-reference
128 12:50:49.508240 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-test-runner
129 12:50:49.508362 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-test-set
130 12:50:49.508485 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-test-shell
131 12:50:49.508609 Updating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-install-packages (oe)
132 12:50:49.508760 Updating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/bin/lava-installed-packages (oe)
133 12:50:49.508879 Creating /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/environment
134 12:50:49.508977 LAVA metadata
135 12:50:49.509049 - LAVA_JOB_ID=11570949
136 12:50:49.509112 - LAVA_DISPATCHER_IP=192.168.201.1
137 12:50:49.509211 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
138 12:50:49.509279 skipped lava-vland-overlay
139 12:50:49.509353 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 12:50:49.509429 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
141 12:50:49.509492 skipped lava-multinode-overlay
142 12:50:49.509563 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 12:50:49.509642 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
144 12:50:49.509713 Loading test definitions
145 12:50:49.509803 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
146 12:50:49.509876 Using /lava-11570949 at stage 0
147 12:50:49.510190 uuid=11570949_1.4.2.3.1 testdef=None
148 12:50:49.510277 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 12:50:49.510361 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
150 12:50:49.510882 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 12:50:49.511150 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
153 12:50:49.511778 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 12:50:49.512003 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
156 12:50:49.512603 runner path: /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/0/tests/0_dmesg test_uuid 11570949_1.4.2.3.1
157 12:50:49.512755 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 12:50:49.512987 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
160 12:50:49.513057 Using /lava-11570949 at stage 1
161 12:50:49.513353 uuid=11570949_1.4.2.3.5 testdef=None
162 12:50:49.513439 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 12:50:49.513521 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
164 12:50:49.513985 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 12:50:49.514195 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
167 12:50:49.514826 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 12:50:49.515128 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
170 12:50:49.515749 runner path: /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/1/tests/1_bootrr test_uuid 11570949_1.4.2.3.5
171 12:50:49.515897 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 12:50:49.516095 Creating lava-test-runner.conf files
174 12:50:49.516155 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/0 for stage 0
175 12:50:49.516241 - 0_dmesg
176 12:50:49.516320 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11570949/lava-overlay-7forbv57/lava-11570949/1 for stage 1
177 12:50:49.516409 - 1_bootrr
178 12:50:49.516500 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 12:50:49.516584 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
180 12:50:49.525384 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 12:50:49.525515 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
182 12:50:49.525628 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 12:50:49.525740 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 12:50:49.525853 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
185 12:50:49.771106 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 12:50:49.771472 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
187 12:50:49.771590 extracting modules file /var/lib/lava/dispatcher/tmp/11570949/tftp-deploy-oixokc9y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11570949/extract-overlay-ramdisk-1gq7dyuk/ramdisk
188 12:50:49.796370 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 12:50:49.796515 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
190 12:50:49.796607 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11570949/compress-overlay-uiw2g8g2/overlay-1.4.2.4.tar.gz to ramdisk
191 12:50:49.796676 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11570949/compress-overlay-uiw2g8g2/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11570949/extract-overlay-ramdisk-1gq7dyuk/ramdisk
192 12:50:49.804747 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 12:50:49.804855 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
194 12:50:49.804944 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 12:50:49.805031 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
196 12:50:49.805105 Building ramdisk /var/lib/lava/dispatcher/tmp/11570949/extract-overlay-ramdisk-1gq7dyuk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11570949/extract-overlay-ramdisk-1gq7dyuk/ramdisk
197 12:50:49.952363 >> 54149 blocks
198 12:50:50.838737 rename /var/lib/lava/dispatcher/tmp/11570949/extract-overlay-ramdisk-1gq7dyuk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11570949/tftp-deploy-oixokc9y/ramdisk/ramdisk.cpio.gz
199 12:50:50.839206 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 12:50:50.839348 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
201 12:50:50.839473 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
202 12:50:50.839570 No mkimage arch provided, not using FIT.
203 12:50:50.839657 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 12:50:50.839739 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 12:50:50.839841 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 12:50:50.839936 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
207 12:50:50.840016 No LXC device requested
208 12:50:50.840091 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 12:50:50.840172 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
210 12:50:50.840246 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 12:50:50.840316 Checking files for TFTP limit of 4294967296 bytes.
212 12:50:50.840704 end: 1 tftp-deploy (duration 00:00:03) [common]
213 12:50:50.840806 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 12:50:50.840898 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 12:50:50.841018 substitutions:
216 12:50:50.841085 - {DTB}: None
217 12:50:50.841147 - {INITRD}: 11570949/tftp-deploy-oixokc9y/ramdisk/ramdisk.cpio.gz
218 12:50:50.841205 - {KERNEL}: 11570949/tftp-deploy-oixokc9y/kernel/bzImage
219 12:50:50.841262 - {LAVA_MAC}: None
220 12:50:50.841322 - {PRESEED_CONFIG}: None
221 12:50:50.841429 - {PRESEED_LOCAL}: None
222 12:50:50.841500 - {RAMDISK}: 11570949/tftp-deploy-oixokc9y/ramdisk/ramdisk.cpio.gz
223 12:50:50.841554 - {ROOT_PART}: None
224 12:50:50.841607 - {ROOT}: None
225 12:50:50.841661 - {SERVER_IP}: 192.168.201.1
226 12:50:50.841714 - {TEE}: None
227 12:50:50.841767 Parsed boot commands:
228 12:50:50.841820 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 12:50:50.841992 Parsed boot commands: tftpboot 192.168.201.1 11570949/tftp-deploy-oixokc9y/kernel/bzImage 11570949/tftp-deploy-oixokc9y/kernel/cmdline 11570949/tftp-deploy-oixokc9y/ramdisk/ramdisk.cpio.gz
230 12:50:50.842079 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 12:50:50.842163 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 12:50:50.842251 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 12:50:50.842336 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 12:50:50.842405 Not connected, no need to disconnect.
235 12:50:50.842477 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 12:50:50.842560 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 12:50:50.842633 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-6'
238 12:50:50.846604 Setting prompt string to ['lava-test: # ']
239 12:50:50.847004 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 12:50:50.847106 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 12:50:50.847204 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 12:50:50.847346 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 12:50:50.847655 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-6' '--port=1' '--command=reboot'
244 12:50:55.996508 >> Command sent successfully.
245 12:50:56.002460 Returned 0 in 5 seconds
246 12:50:56.103301 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 12:50:56.104850 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 12:50:56.105429 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 12:50:56.105925 Setting prompt string to 'Starting depthcharge on Volmar...'
251 12:50:56.106345 Changing prompt to 'Starting depthcharge on Volmar...'
252 12:50:56.106789 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 12:50:56.108508 [Enter `^Ec?' for help]
254 12:50:57.476608
255 12:50:57.477133
256 12:50:57.483879 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 12:50:57.487678 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 12:50:57.491299 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 12:50:57.498660 CPU: AES supported, TXT NOT supported, VT supported
260 12:50:57.505862 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 12:50:57.509794 Cache size = 10 MiB
262 12:50:57.513130 MCH: device id 4609 (rev 04) is Alderlake-P
263 12:50:57.516762 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 12:50:57.520416 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 12:50:57.524310 VBOOT: Loading verstage.
266 12:50:57.528424 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 12:50:57.535438 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 12:50:57.538837 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 12:50:57.548629 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 12:50:57.555358 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 12:50:57.555890
272 12:50:57.556236
273 12:50:57.565256 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 12:50:57.569564 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 12:50:57.575860 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 12:50:57.576382 done! DID_VID 0x00281ae0
277 12:50:57.579894 TPM ready after 0 ms
278 12:50:57.583238 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
279 12:50:57.596604 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
280 12:50:57.602817 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
281 12:50:57.654269 tlcl_send_startup: Startup return code is 0
282 12:50:57.654787 TPM: setup succeeded
283 12:50:57.675762 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
284 12:50:57.698005 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
285 12:50:57.701297 Chrome EC: UHEPI supported
286 12:50:57.704654 Reading cr50 boot mode
287 12:50:57.719601 Cr50 says boot_mode is VERIFIED_RW(0x00).
288 12:50:57.720265 Phase 1
289 12:50:57.726490 FMAP: area GBB found @ 1805000 (458752 bytes)
290 12:50:57.733064 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
291 12:50:57.741132 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
292 12:50:57.747960 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
293 12:50:57.748495 Phase 2
294 12:50:57.748940 Phase 3
295 12:50:57.755091 FMAP: area GBB found @ 1805000 (458752 bytes)
296 12:50:57.758663 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 12:50:57.765334 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 12:50:57.768240 VB2:vb2_verify_keyblock() Checking keyblock signature...
299 12:50:57.775152 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
300 12:50:57.781596 VB2:vb2_verify_digest() HW RSA forbidden, using SW
301 12:50:57.788591 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
302 12:50:57.800841 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
303 12:50:57.804259 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 12:50:57.811476 VB2:vb2_verify_fw_preamble() Verifying preamble.
305 12:50:57.818157 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
306 12:50:57.822235 VB2:vb2_verify_digest() HW RSA forbidden, using SW
307 12:50:57.828705 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
308 12:50:57.832213 Phase 4
309 12:50:57.835351 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
310 12:50:57.842185 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
311 12:50:58.066862 VB2:vb2_verify_digest() HW RSA forbidden, using SW
312 12:50:58.073923 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
313 12:50:58.077016 Saving vboot hash.
314 12:50:58.083339 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
315 12:50:58.099815 tlcl_extend: response is 0
316 12:50:58.106407 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
317 12:50:58.113097 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
318 12:50:58.127112 tlcl_extend: response is 0
319 12:50:58.133854 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
320 12:50:58.151058 tlcl_lock_nv_write: response is 0
321 12:50:58.172715 tlcl_lock_nv_write: response is 0
322 12:50:58.173243 Slot A is selected
323 12:50:58.179620 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
324 12:50:58.186445 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
325 12:50:58.192814 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
326 12:50:58.199833 BS: verstage times (exec / console): total (unknown) / 246 ms
327 12:50:58.200365
328 12:50:58.200708
329 12:50:58.206257 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
330 12:50:58.210405 Google Chrome EC: version:
331 12:50:58.213688 ro: volmar_v2.0.14126-e605144e9c
332 12:50:58.216908 rw: volmar_v0.0.55-22d1557
333 12:50:58.220086 running image: 2
334 12:50:58.223453 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
335 12:50:58.233781 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
336 12:50:58.240027 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
337 12:50:58.246420 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
338 12:50:58.257125 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
339 12:50:58.266558 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
340 12:50:58.270220 EC took 981us to calculate image hash
341 12:50:58.279753 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 12:50:58.283591 VB2:sync_ec() select_rw=RW(active)
343 12:50:58.295581 Waited 270us to clear limit power flag.
344 12:50:58.299642 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 12:50:58.302853 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 12:50:58.306128 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
347 12:50:58.313000 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
348 12:50:58.316232 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
349 12:50:58.319540 TCO_STS: 0000 0000
350 12:50:58.322748 GEN_PMCON: d0015038 00002200
351 12:50:58.323312 GBLRST_CAUSE: 00000000 00000000
352 12:50:58.326403 HPR_CAUSE0: 00000000
353 12:50:58.329693 prev_sleep_state 5
354 12:50:58.333274 Abort disabling TXT, as CPU is not TXT capable.
355 12:50:58.340904 cse_lite: Number of partitions = 3
356 12:50:58.344059 cse_lite: Current partition = RO
357 12:50:58.344491 cse_lite: Next partition = RO
358 12:50:58.347762 cse_lite: Flags = 0x7
359 12:50:58.354222 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
360 12:50:58.363879 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
361 12:50:58.367411 FMAP: area SI_ME found @ 1000 (5238784 bytes)
362 12:50:58.374014 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
363 12:50:58.380723 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
364 12:50:58.387697 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
365 12:50:58.390875 cse_lite: CSE CBFS RW version : 16.1.25.2049
366 12:50:58.397348 cse_lite: Set Boot Partition Info Command (RW)
367 12:50:58.400313 HECI: Global Reset(Type:1) Command
368 12:50:59.811077
369 12:50:59.811600
370 12:50:59.818090 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
371 12:50:59.821954 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
372 12:50:59.828803 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
373 12:50:59.831814 CPU: AES supported, TXT NOT supported, VT supported
374 12:50:59.841892 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
375 12:50:59.842478 Cache size = 10 MiB
376 12:50:59.845514 MCH: device id 4609 (rev 04) is Alderlake-P
377 12:50:59.852060 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
378 12:50:59.855557 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
379 12:50:59.858705 VBOOT: Loading verstage.
380 12:50:59.865952 FMAP: Found "FLASH" version 1.1 at 0x1804000.
381 12:50:59.869317 FMAP: base = 0x0 size = 0x2000000 #areas = 37
382 12:50:59.873020 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 12:50:59.880330 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
384 12:50:59.890594 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
385 12:50:59.891162
386 12:50:59.891507
387 12:50:59.900271 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
388 12:50:59.906956 Probing TPM I2C: I2C bus 1 version 0x3230302a
389 12:50:59.910302 DW I2C bus 1 at 0xfe022000 (400 KHz)
390 12:50:59.913719 done! DID_VID 0x00281ae0
391 12:50:59.914244 TPM ready after 0 ms
392 12:50:59.920611 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
393 12:50:59.931605 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
394 12:50:59.935459 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
395 12:50:59.990037 tlcl_send_startup: Startup return code is 0
396 12:50:59.990557 TPM: setup succeeded
397 12:51:00.011628 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
398 12:51:00.033816 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
399 12:51:00.036979 Chrome EC: UHEPI supported
400 12:51:00.040774 Reading cr50 boot mode
401 12:51:00.055469 Cr50 says boot_mode is VERIFIED_RW(0x00).
402 12:51:00.056005 Phase 1
403 12:51:00.062115 FMAP: area GBB found @ 1805000 (458752 bytes)
404 12:51:00.068445 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 12:51:00.075252 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 12:51:00.082188 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
407 12:51:00.085428 Phase 2
408 12:51:00.085910 Phase 3
409 12:51:00.088672 FMAP: area GBB found @ 1805000 (458752 bytes)
410 12:51:00.095523 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
411 12:51:00.098734 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
412 12:51:00.105791 VB2:vb2_verify_keyblock() Checking keyblock signature...
413 12:51:00.112410 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
414 12:51:00.118970 VB2:vb2_verify_digest() HW RSA forbidden, using SW
415 12:51:00.121932 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
416 12:51:00.136487 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
417 12:51:00.139422 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
418 12:51:00.146475 VB2:vb2_verify_fw_preamble() Verifying preamble.
419 12:51:00.152878 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
420 12:51:00.156107 VB2:vb2_verify_digest() HW RSA forbidden, using SW
421 12:51:00.162819 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
422 12:51:00.167155 Phase 4
423 12:51:00.170139 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
424 12:51:00.177367 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
425 12:51:00.402990 VB2:vb2_verify_digest() HW RSA forbidden, using SW
426 12:51:00.409499 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
427 12:51:00.413125 Saving vboot hash.
428 12:51:00.419589 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
429 12:51:00.435267 tlcl_extend: response is 0
430 12:51:00.442158 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
431 12:51:00.448636 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
432 12:51:00.463397 tlcl_extend: response is 0
433 12:51:00.469544 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
434 12:51:00.489586 tlcl_lock_nv_write: response is 0
435 12:51:00.509122 tlcl_lock_nv_write: response is 0
436 12:51:00.509651 Slot A is selected
437 12:51:00.515573 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
438 12:51:00.521803 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
439 12:51:00.528883 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
440 12:51:00.535767 BS: verstage times (exec / console): total (unknown) / 246 ms
441 12:51:00.536297
442 12:51:00.536646
443 12:51:00.541828 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
444 12:51:00.545940 Google Chrome EC: version:
445 12:51:00.549561 ro: volmar_v2.0.14126-e605144e9c
446 12:51:00.552857 rw: volmar_v0.0.55-22d1557
447 12:51:00.555856 running image: 2
448 12:51:00.559602 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
449 12:51:00.569197 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
450 12:51:00.575948 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
451 12:51:00.582788 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
452 12:51:00.593244 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
453 12:51:00.602715 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
454 12:51:00.606416 EC took 1182us to calculate image hash
455 12:51:00.615777 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
456 12:51:00.619307 VB2:sync_ec() select_rw=RW(active)
457 12:51:00.631437 Waited 270us to clear limit power flag.
458 12:51:00.634741 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
459 12:51:00.638680 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
460 12:51:00.642289 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
461 12:51:00.646837 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
462 12:51:00.650383 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
463 12:51:00.653291 TCO_STS: 0000 0000
464 12:51:00.657026 GEN_PMCON: d1001038 00002200
465 12:51:00.660131 GBLRST_CAUSE: 00000040 00000000
466 12:51:00.660656 HPR_CAUSE0: 00000000
467 12:51:00.663052 prev_sleep_state 5
468 12:51:00.669593 Abort disabling TXT, as CPU is not TXT capable.
469 12:51:00.673527 cse_lite: Number of partitions = 3
470 12:51:00.676697 cse_lite: Current partition = RW
471 12:51:00.679904 cse_lite: Next partition = RW
472 12:51:00.683446 cse_lite: Flags = 0x7
473 12:51:00.689703 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
474 12:51:00.696594 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
475 12:51:00.703136 FMAP: area SI_ME found @ 1000 (5238784 bytes)
476 12:51:00.709915 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
477 12:51:00.716674 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
478 12:51:00.723606 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
479 12:51:00.726696 cse_lite: CSE CBFS RW version : 16.1.25.2049
480 12:51:00.729691 Boot Count incremented to 3396
481 12:51:00.736424 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
482 12:51:00.743075 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
483 12:51:00.755368 Probing TPM I2C: done! DID_VID 0x00281ae0
484 12:51:00.758505 Locality already claimed
485 12:51:00.761929 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
486 12:51:00.781259 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
487 12:51:00.787768 MRC: Hash idx 0x100d comparison successful.
488 12:51:00.791302 MRC cache found, size f6c8
489 12:51:00.791839 bootmode is set to: 2
490 12:51:00.794830 EC returned error result code 3
491 12:51:00.798816 FW_CONFIG value from CBI is 0x131
492 12:51:00.804766 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
493 12:51:00.808028 SPD index = 0
494 12:51:00.815077 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
495 12:51:00.815606 SPD: module type is LPDDR4X
496 12:51:00.823355 SPD: module part number is K4U6E3S4AB-MGCL
497 12:51:00.830211 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
498 12:51:00.833658 SPD: device width 16 bits, bus width 16 bits
499 12:51:00.836660 SPD: module size is 1024 MB (per channel)
500 12:51:00.906291 CBMEM:
501 12:51:00.909580 IMD: root @ 0x76fff000 254 entries.
502 12:51:00.912403 IMD: root @ 0x76ffec00 62 entries.
503 12:51:00.920301 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
504 12:51:00.923999 RO_VPD is uninitialized or empty.
505 12:51:00.927317 FMAP: area RW_VPD found @ f29000 (8192 bytes)
506 12:51:00.934011 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
507 12:51:00.937300 External stage cache:
508 12:51:00.940844 IMD: root @ 0x7bbff000 254 entries.
509 12:51:00.944181 IMD: root @ 0x7bbfec00 62 entries.
510 12:51:00.950810 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
511 12:51:00.957507 MRC: Checking cached data update for 'RW_MRC_CACHE'.
512 12:51:00.960965 MRC: 'RW_MRC_CACHE' does not need update.
513 12:51:00.961493 8 DIMMs found
514 12:51:00.964307 SMM Memory Map
515 12:51:00.967285 SMRAM : 0x7b800000 0x800000
516 12:51:00.970588 Subregion 0: 0x7b800000 0x200000
517 12:51:00.974535 Subregion 1: 0x7ba00000 0x200000
518 12:51:00.977848 Subregion 2: 0x7bc00000 0x400000
519 12:51:00.980476 top_of_ram = 0x77000000
520 12:51:00.984367 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
521 12:51:00.990814 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
522 12:51:00.997326 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
523 12:51:01.000978 MTRR Range: Start=ff000000 End=0 (Size 1000000)
524 12:51:01.001557 Normal boot
525 12:51:01.011005 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
526 12:51:01.016918 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
527 12:51:01.023615 Processing 237 relocs. Offset value of 0x74ab9000
528 12:51:01.032092 BS: romstage times (exec / console): total (unknown) / 377 ms
529 12:51:01.039186
530 12:51:01.039708
531 12:51:01.045788 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
532 12:51:01.046220 Normal boot
533 12:51:01.052643 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
534 12:51:01.059632 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
535 12:51:01.066443 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
536 12:51:01.075984 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
537 12:51:01.124565 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
538 12:51:01.131044 Processing 5931 relocs. Offset value of 0x72a2f000
539 12:51:01.134267 BS: postcar times (exec / console): total (unknown) / 51 ms
540 12:51:01.134795
541 12:51:01.137418
542 12:51:01.144002 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
543 12:51:01.147591 Reserving BERT start 76a1e000, size 10000
544 12:51:01.150772 Normal boot
545 12:51:01.154371 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
546 12:51:01.160854 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
547 12:51:01.170473 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
548 12:51:01.173744 FMAP: area RW_VPD found @ f29000 (8192 bytes)
549 12:51:01.177359 Google Chrome EC: version:
550 12:51:01.180616 ro: volmar_v2.0.14126-e605144e9c
551 12:51:01.184251 rw: volmar_v0.0.55-22d1557
552 12:51:01.187495 running image: 2
553 12:51:01.190339 ACPI _SWS is PM1 Index 8 GPE Index -1
554 12:51:01.194040 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
555 12:51:01.198006 EC returned error result code 3
556 12:51:01.202036 FW_CONFIG value from CBI is 0x131
557 12:51:01.208301 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
558 12:51:01.211880 PCI: 00:1c.2 disabled by fw_config
559 12:51:01.218394 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
560 12:51:01.222275 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
561 12:51:01.228993 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
562 12:51:01.232246 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
563 12:51:01.238782 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
564 12:51:01.245569 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
565 12:51:01.249097 microcode: sig=0x906a4 pf=0x80 revision=0x423
566 12:51:01.255539 microcode: Update skipped, already up-to-date
567 12:51:01.261999 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
568 12:51:01.293957 Detected 6 core, 8 thread CPU.
569 12:51:01.297362 Setting up SMI for CPU
570 12:51:01.300644 IED base = 0x7bc00000
571 12:51:01.301170 IED size = 0x00400000
572 12:51:01.303805 Will perform SMM setup.
573 12:51:01.307492 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
574 12:51:01.310844 LAPIC 0x0 in XAPIC mode.
575 12:51:01.320385 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
576 12:51:01.323941 Processing 18 relocs. Offset value of 0x00030000
577 12:51:01.328314 Attempting to start 7 APs
578 12:51:01.331619 Waiting for 10ms after sending INIT.
579 12:51:01.344863 Waiting for SIPI to complete...
580 12:51:01.348627 done.
581 12:51:01.349149 LAPIC 0x1 in XAPIC mode.
582 12:51:01.351613 LAPIC 0x16 in XAPIC mode.
583 12:51:01.355069 LAPIC 0x10 in XAPIC mode.
584 12:51:01.358133 Waiting for SIPI to complete...
585 12:51:01.358559 done.
586 12:51:01.361848 AP: slot 4 apic_id 10, MCU rev: 0x00000423
587 12:51:01.364870 LAPIC 0x14 in XAPIC mode.
588 12:51:01.368102 LAPIC 0x12 in XAPIC mode.
589 12:51:01.371396 AP: slot 5 apic_id 1, MCU rev: 0x00000423
590 12:51:01.378170 AP: slot 2 apic_id 14, MCU rev: 0x00000423
591 12:51:01.381644 AP: slot 3 apic_id 16, MCU rev: 0x00000423
592 12:51:01.384689 AP: slot 1 apic_id 12, MCU rev: 0x00000423
593 12:51:01.388242 LAPIC 0x9 in XAPIC mode.
594 12:51:01.391367 LAPIC 0x8 in XAPIC mode.
595 12:51:01.394833 AP: slot 7 apic_id 9, MCU rev: 0x00000423
596 12:51:01.398312 AP: slot 6 apic_id 8, MCU rev: 0x00000423
597 12:51:01.401677 smm_setup_relocation_handler: enter
598 12:51:01.404506 smm_setup_relocation_handler: exit
599 12:51:01.414734 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
600 12:51:01.418501 Processing 11 relocs. Offset value of 0x00038000
601 12:51:01.425200 smm_module_setup_stub: stack_top = 0x7b804000
602 12:51:01.428305 smm_module_setup_stub: per cpu stack_size = 0x800
603 12:51:01.435080 smm_module_setup_stub: runtime.start32_offset = 0x4c
604 12:51:01.438273 smm_module_setup_stub: runtime.smm_size = 0x10000
605 12:51:01.444802 SMM Module: stub loaded at 38000. Will call 0x76a52094
606 12:51:01.448400 Installing permanent SMM handler to 0x7b800000
607 12:51:01.454714 smm_load_module: total_smm_space_needed e468, available -> 200000
608 12:51:01.465084 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
609 12:51:01.468175 Processing 255 relocs. Offset value of 0x7b9f6000
610 12:51:01.471577 smm_load_module: smram_start: 0x7b800000
611 12:51:01.478100 smm_load_module: smram_end: 7ba00000
612 12:51:01.481208 smm_load_module: handler start 0x7b9f6d5f
613 12:51:01.484752 smm_load_module: handler_size 98d0
614 12:51:01.488109 smm_load_module: fxsave_area 0x7b9ff000
615 12:51:01.491527 smm_load_module: fxsave_size 1000
616 12:51:01.495116 smm_load_module: CONFIG_MSEG_SIZE 0x0
617 12:51:01.501421 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
618 12:51:01.508243 smm_load_module: handler_mod_params.smbase = 0x7b800000
619 12:51:01.511564 smm_load_module: per_cpu_save_state_size = 0x400
620 12:51:01.515100 smm_load_module: num_cpus = 0x8
621 12:51:01.521553 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
622 12:51:01.524843 smm_load_module: total_save_state_size = 0x2000
623 12:51:01.528035 smm_load_module: cpu0 entry: 7b9e6000
624 12:51:01.535146 smm_create_map: cpus allowed in one segment 30
625 12:51:01.538412 smm_create_map: min # of segments needed 1
626 12:51:01.538988 CPU 0x0
627 12:51:01.541836 smbase 7b9e6000 entry 7b9ee000
628 12:51:01.548229 ss_start 7b9f5c00 code_end 7b9ee208
629 12:51:01.548756 CPU 0x1
630 12:51:01.551644 smbase 7b9e5c00 entry 7b9edc00
631 12:51:01.558474 ss_start 7b9f5800 code_end 7b9ede08
632 12:51:01.558939 CPU 0x2
633 12:51:01.561418 smbase 7b9e5800 entry 7b9ed800
634 12:51:01.565010 ss_start 7b9f5400 code_end 7b9eda08
635 12:51:01.568691 CPU 0x3
636 12:51:01.571537 smbase 7b9e5400 entry 7b9ed400
637 12:51:01.575314 ss_start 7b9f5000 code_end 7b9ed608
638 12:51:01.575850 CPU 0x4
639 12:51:01.578550 smbase 7b9e5000 entry 7b9ed000
640 12:51:01.585023 ss_start 7b9f4c00 code_end 7b9ed208
641 12:51:01.585559 CPU 0x5
642 12:51:01.588486 smbase 7b9e4c00 entry 7b9ecc00
643 12:51:01.595347 ss_start 7b9f4800 code_end 7b9ece08
644 12:51:01.595886 CPU 0x6
645 12:51:01.598588 smbase 7b9e4800 entry 7b9ec800
646 12:51:01.601900 ss_start 7b9f4400 code_end 7b9eca08
647 12:51:01.604892 CPU 0x7
648 12:51:01.608170 smbase 7b9e4400 entry 7b9ec400
649 12:51:01.611473 ss_start 7b9f4000 code_end 7b9ec608
650 12:51:01.621456 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
651 12:51:01.624815 Processing 11 relocs. Offset value of 0x7b9ee000
652 12:51:01.631599 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
653 12:51:01.638353 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
654 12:51:01.644936 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
655 12:51:01.648291 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
656 12:51:01.655119 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
657 12:51:01.661827 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
658 12:51:01.668247 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
659 12:51:01.674343 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
660 12:51:01.681488 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
661 12:51:01.688609 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
662 12:51:01.695009 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
663 12:51:01.698752 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
664 12:51:01.705361 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
665 12:51:01.711909 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
666 12:51:01.718781 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
667 12:51:01.725339 smm_module_setup_stub: stack_top = 0x7b804000
668 12:51:01.728556 smm_module_setup_stub: per cpu stack_size = 0x800
669 12:51:01.735634 smm_module_setup_stub: runtime.start32_offset = 0x4c
670 12:51:01.738716 smm_module_setup_stub: runtime.smm_size = 0x200000
671 12:51:01.745464 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
672 12:51:01.748892 Clearing SMI status registers
673 12:51:01.752278 SMI_STS: PM1
674 12:51:01.752848 PM1_STS: WAK PWRBTN
675 12:51:01.762404 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
676 12:51:01.765198 In relocation handler: CPU 0
677 12:51:01.768735 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
678 12:51:01.772135 Writing SMRR. base = 0x7b800006, mask=0xff800c00
679 12:51:01.775575 Relocation complete.
680 12:51:01.781783 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
681 12:51:01.785808 In relocation handler: CPU 5
682 12:51:01.788769 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
683 12:51:01.792127 Relocation complete.
684 12:51:01.798759 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
685 12:51:01.802663 In relocation handler: CPU 4
686 12:51:01.805417 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
687 12:51:01.812371 Writing SMRR. base = 0x7b800006, mask=0xff800c00
688 12:51:01.812902 Relocation complete.
689 12:51:01.819057 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
690 12:51:01.822307 In relocation handler: CPU 2
691 12:51:01.825496 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
692 12:51:01.831964 Writing SMRR. base = 0x7b800006, mask=0xff800c00
693 12:51:01.835526 Relocation complete.
694 12:51:01.842077 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
695 12:51:01.845601 In relocation handler: CPU 1
696 12:51:01.848763 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
697 12:51:01.852389 Writing SMRR. base = 0x7b800006, mask=0xff800c00
698 12:51:01.855765 Relocation complete.
699 12:51:01.862077 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
700 12:51:01.865698 In relocation handler: CPU 3
701 12:51:01.869136 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
702 12:51:01.875817 Writing SMRR. base = 0x7b800006, mask=0xff800c00
703 12:51:01.876345 Relocation complete.
704 12:51:01.881966 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
705 12:51:01.885524 In relocation handler: CPU 6
706 12:51:01.892466 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
707 12:51:01.895841 Writing SMRR. base = 0x7b800006, mask=0xff800c00
708 12:51:01.899227 Relocation complete.
709 12:51:01.905560 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
710 12:51:01.908908 In relocation handler: CPU 7
711 12:51:01.912223 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
712 12:51:01.915822 Relocation complete.
713 12:51:01.916347 Initializing CPU #0
714 12:51:01.919447 CPU: vendor Intel device 906a4
715 12:51:01.922660 CPU: family 06, model 9a, stepping 04
716 12:51:01.925882 Clearing out pending MCEs
717 12:51:01.929192 cpu: energy policy set to 7
718 12:51:01.932531 Turbo is available but hidden
719 12:51:01.935875 Turbo is available and visible
720 12:51:01.938985 microcode: Update skipped, already up-to-date
721 12:51:01.941950 CPU #0 initialized
722 12:51:01.942380 Initializing CPU #5
723 12:51:01.945720 Initializing CPU #2
724 12:51:01.949096 Initializing CPU #3
725 12:51:01.949628 Initializing CPU #4
726 12:51:01.952206 CPU: vendor Intel device 906a4
727 12:51:01.955558 CPU: family 06, model 9a, stepping 04
728 12:51:01.958959 Initializing CPU #1
729 12:51:01.962107 Initializing CPU #6
730 12:51:01.962631 Clearing out pending MCEs
731 12:51:01.965754 CPU: vendor Intel device 906a4
732 12:51:01.968953 CPU: family 06, model 9a, stepping 04
733 12:51:01.972203 CPU: vendor Intel device 906a4
734 12:51:01.975870 CPU: family 06, model 9a, stepping 04
735 12:51:01.979473 CPU: vendor Intel device 906a4
736 12:51:01.985609 CPU: family 06, model 9a, stepping 04
737 12:51:01.986126 cpu: energy policy set to 7
738 12:51:01.988586 Clearing out pending MCEs
739 12:51:01.992471 Clearing out pending MCEs
740 12:51:01.995740 cpu: energy policy set to 7
741 12:51:01.999067 microcode: Update skipped, already up-to-date
742 12:51:02.001993 CPU #2 initialized
743 12:51:02.005285 microcode: Update skipped, already up-to-date
744 12:51:02.009171 CPU #4 initialized
745 12:51:02.012465 CPU: vendor Intel device 906a4
746 12:51:02.015331 CPU: family 06, model 9a, stepping 04
747 12:51:02.019044 cpu: energy policy set to 7
748 12:51:02.019572 Clearing out pending MCEs
749 12:51:02.025701 microcode: Update skipped, already up-to-date
750 12:51:02.026227 CPU #1 initialized
751 12:51:02.029143 Clearing out pending MCEs
752 12:51:02.032281 cpu: energy policy set to 7
753 12:51:02.035850 Initializing CPU #7
754 12:51:02.039333 microcode: Update skipped, already up-to-date
755 12:51:02.042310 CPU #3 initialized
756 12:51:02.042835 cpu: energy policy set to 7
757 12:51:02.046021 CPU: vendor Intel device 906a4
758 12:51:02.052501 CPU: family 06, model 9a, stepping 04
759 12:51:02.055586 microcode: Update skipped, already up-to-date
760 12:51:02.056021 CPU #5 initialized
761 12:51:02.059057 CPU: vendor Intel device 906a4
762 12:51:02.065660 CPU: family 06, model 9a, stepping 04
763 12:51:02.066186 Clearing out pending MCEs
764 12:51:02.069122 Clearing out pending MCEs
765 12:51:02.072122 cpu: energy policy set to 7
766 12:51:02.075689 cpu: energy policy set to 7
767 12:51:02.079614 microcode: Update skipped, already up-to-date
768 12:51:02.082520 CPU #7 initialized
769 12:51:02.085679 microcode: Update skipped, already up-to-date
770 12:51:02.089027 CPU #6 initialized
771 12:51:02.092724 bsp_do_flight_plan done after 729 msecs.
772 12:51:02.095847 CPU: frequency set to 4400 MHz
773 12:51:02.096376 Enabling SMIs.
774 12:51:02.102748 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
775 12:51:02.119652 Probing TPM I2C: done! DID_VID 0x00281ae0
776 12:51:02.123094 Locality already claimed
777 12:51:02.126190 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
778 12:51:02.137907 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
779 12:51:02.141056 Enabling GPIO PM b/c CR50 has long IRQ pulse support
780 12:51:02.147836 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
781 12:51:02.153993 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
782 12:51:02.157572 Found a VBT of 9216 bytes after decompression
783 12:51:02.161118 PCI 1.0, PIN A, using IRQ #16
784 12:51:02.164329 PCI 2.0, PIN A, using IRQ #17
785 12:51:02.167566 PCI 4.0, PIN A, using IRQ #18
786 12:51:02.170937 PCI 5.0, PIN A, using IRQ #16
787 12:51:02.174274 PCI 6.0, PIN A, using IRQ #16
788 12:51:02.177363 PCI 6.2, PIN C, using IRQ #18
789 12:51:02.181416 PCI 7.0, PIN A, using IRQ #19
790 12:51:02.184690 PCI 7.1, PIN B, using IRQ #20
791 12:51:02.187594 PCI 7.2, PIN C, using IRQ #21
792 12:51:02.190984 PCI 7.3, PIN D, using IRQ #22
793 12:51:02.194596 PCI 8.0, PIN A, using IRQ #23
794 12:51:02.197333 PCI D.0, PIN A, using IRQ #17
795 12:51:02.197764 PCI D.1, PIN B, using IRQ #19
796 12:51:02.200811 PCI 10.0, PIN A, using IRQ #24
797 12:51:02.204831 PCI 10.1, PIN B, using IRQ #25
798 12:51:02.207785 PCI 10.6, PIN C, using IRQ #20
799 12:51:02.210786 PCI 10.7, PIN D, using IRQ #21
800 12:51:02.214191 PCI 11.0, PIN A, using IRQ #26
801 12:51:02.217634 PCI 11.1, PIN B, using IRQ #27
802 12:51:02.221085 PCI 11.2, PIN C, using IRQ #28
803 12:51:02.224194 PCI 11.3, PIN D, using IRQ #29
804 12:51:02.227731 PCI 12.0, PIN A, using IRQ #30
805 12:51:02.230958 PCI 12.6, PIN B, using IRQ #31
806 12:51:02.234493 PCI 12.7, PIN C, using IRQ #22
807 12:51:02.237886 PCI 13.0, PIN A, using IRQ #32
808 12:51:02.240817 PCI 13.1, PIN B, using IRQ #33
809 12:51:02.244292 PCI 13.2, PIN C, using IRQ #34
810 12:51:02.247538 PCI 13.3, PIN D, using IRQ #35
811 12:51:02.248059 PCI 14.0, PIN B, using IRQ #23
812 12:51:02.250817 PCI 14.1, PIN A, using IRQ #36
813 12:51:02.254445 PCI 14.3, PIN C, using IRQ #17
814 12:51:02.257657 PCI 15.0, PIN A, using IRQ #37
815 12:51:02.261016 PCI 15.1, PIN B, using IRQ #38
816 12:51:02.264348 PCI 15.2, PIN C, using IRQ #39
817 12:51:02.268133 PCI 15.3, PIN D, using IRQ #40
818 12:51:02.271024 PCI 16.0, PIN A, using IRQ #18
819 12:51:02.273905 PCI 16.1, PIN B, using IRQ #19
820 12:51:02.277541 PCI 16.2, PIN C, using IRQ #20
821 12:51:02.281020 PCI 16.3, PIN D, using IRQ #21
822 12:51:02.284226 PCI 16.4, PIN A, using IRQ #18
823 12:51:02.287584 PCI 16.5, PIN B, using IRQ #19
824 12:51:02.290846 PCI 17.0, PIN A, using IRQ #22
825 12:51:02.294289 PCI 19.0, PIN A, using IRQ #41
826 12:51:02.297587 PCI 19.1, PIN B, using IRQ #42
827 12:51:02.300452 PCI 19.2, PIN C, using IRQ #43
828 12:51:02.300874 PCI 1C.0, PIN A, using IRQ #16
829 12:51:02.304222 PCI 1C.1, PIN B, using IRQ #17
830 12:51:02.307289 PCI 1C.2, PIN C, using IRQ #18
831 12:51:02.310825 PCI 1C.3, PIN D, using IRQ #19
832 12:51:02.314442 PCI 1C.4, PIN A, using IRQ #16
833 12:51:02.317247 PCI 1C.5, PIN B, using IRQ #17
834 12:51:02.320757 PCI 1C.6, PIN C, using IRQ #18
835 12:51:02.324468 PCI 1C.7, PIN D, using IRQ #19
836 12:51:02.327540 PCI 1D.0, PIN A, using IRQ #16
837 12:51:02.330885 PCI 1D.1, PIN B, using IRQ #17
838 12:51:02.334106 PCI 1D.2, PIN C, using IRQ #18
839 12:51:02.337419 PCI 1D.3, PIN D, using IRQ #19
840 12:51:02.340779 PCI 1E.0, PIN A, using IRQ #23
841 12:51:02.343497 PCI 1E.1, PIN B, using IRQ #20
842 12:51:02.347490 PCI 1E.2, PIN C, using IRQ #44
843 12:51:02.350711 PCI 1E.3, PIN D, using IRQ #45
844 12:51:02.353990 PCI 1F.3, PIN B, using IRQ #22
845 12:51:02.354516 PCI 1F.4, PIN C, using IRQ #23
846 12:51:02.357350 PCI 1F.6, PIN D, using IRQ #20
847 12:51:02.360262 PCI 1F.7, PIN A, using IRQ #21
848 12:51:02.366817 IRQ: Using dynamically assigned PCI IO-APIC IRQs
849 12:51:02.373571 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
850 12:51:02.552982 FSPS returned 0
851 12:51:02.556377 Executing Phase 1 of FspMultiPhaseSiInit
852 12:51:02.566087 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
853 12:51:02.569731 port C0 DISC req: usage 1 usb3 1 usb2 1
854 12:51:02.572691 Raw Buffer output 0 00000111
855 12:51:02.576726 Raw Buffer output 1 00000000
856 12:51:02.580456 pmc_send_ipc_cmd succeeded
857 12:51:02.583462 port C1 DISC req: usage 1 usb3 3 usb2 3
858 12:51:02.587228 Raw Buffer output 0 00000331
859 12:51:02.590516 Raw Buffer output 1 00000000
860 12:51:02.594188 pmc_send_ipc_cmd succeeded
861 12:51:02.597850 Detected 6 core, 8 thread CPU.
862 12:51:02.601210 Detected 6 core, 8 thread CPU.
863 12:51:02.607248 Detected 6 core, 8 thread CPU.
864 12:51:02.609954 Detected 6 core, 8 thread CPU.
865 12:51:02.613233 Detected 6 core, 8 thread CPU.
866 12:51:02.616387 Detected 6 core, 8 thread CPU.
867 12:51:02.619819 Detected 6 core, 8 thread CPU.
868 12:51:02.623305 Detected 6 core, 8 thread CPU.
869 12:51:02.626800 Detected 6 core, 8 thread CPU.
870 12:51:02.630084 Detected 6 core, 8 thread CPU.
871 12:51:02.633294 Detected 6 core, 8 thread CPU.
872 12:51:02.636916 Detected 6 core, 8 thread CPU.
873 12:51:02.639525 Detected 6 core, 8 thread CPU.
874 12:51:02.643433 Detected 6 core, 8 thread CPU.
875 12:51:02.646347 Detected 6 core, 8 thread CPU.
876 12:51:02.650054 Detected 6 core, 8 thread CPU.
877 12:51:02.653547 Detected 6 core, 8 thread CPU.
878 12:51:02.656801 Detected 6 core, 8 thread CPU.
879 12:51:02.660375 Detected 6 core, 8 thread CPU.
880 12:51:02.663829 Detected 6 core, 8 thread CPU.
881 12:51:02.664351 Detected 6 core, 8 thread CPU.
882 12:51:02.666503 Detected 6 core, 8 thread CPU.
883 12:51:02.949648 Detected 6 core, 8 thread CPU.
884 12:51:02.952955 Detected 6 core, 8 thread CPU.
885 12:51:02.956498 Detected 6 core, 8 thread CPU.
886 12:51:02.960217 Detected 6 core, 8 thread CPU.
887 12:51:02.963036 Detected 6 core, 8 thread CPU.
888 12:51:02.966552 Detected 6 core, 8 thread CPU.
889 12:51:02.970158 Detected 6 core, 8 thread CPU.
890 12:51:02.973234 Detected 6 core, 8 thread CPU.
891 12:51:02.976512 Detected 6 core, 8 thread CPU.
892 12:51:02.979896 Detected 6 core, 8 thread CPU.
893 12:51:02.983018 Detected 6 core, 8 thread CPU.
894 12:51:02.986270 Detected 6 core, 8 thread CPU.
895 12:51:02.990058 Detected 6 core, 8 thread CPU.
896 12:51:02.993318 Detected 6 core, 8 thread CPU.
897 12:51:02.996812 Detected 6 core, 8 thread CPU.
898 12:51:03.000187 Detected 6 core, 8 thread CPU.
899 12:51:03.003325 Detected 6 core, 8 thread CPU.
900 12:51:03.006801 Detected 6 core, 8 thread CPU.
901 12:51:03.007416 Detected 6 core, 8 thread CPU.
902 12:51:03.010126 Detected 6 core, 8 thread CPU.
903 12:51:03.013415 Display FSP Version Info HOB
904 12:51:03.016893 Reference Code - CPU = c.0.65.70
905 12:51:03.020220 uCode Version = 0.0.4.23
906 12:51:03.023749 TXT ACM version = ff.ff.ff.ffff
907 12:51:03.026986 Reference Code - ME = c.0.65.70
908 12:51:03.030372 MEBx version = 0.0.0.0
909 12:51:03.033152 ME Firmware Version = Lite SKU
910 12:51:03.036821 Reference Code - PCH = c.0.65.70
911 12:51:03.040168 PCH-CRID Status = Disabled
912 12:51:03.043332 PCH-CRID Original Value = ff.ff.ff.ffff
913 12:51:03.047262 PCH-CRID New Value = ff.ff.ff.ffff
914 12:51:03.050036 OPROM - RST - RAID = ff.ff.ff.ffff
915 12:51:03.053163 PCH Hsio Version = 4.0.0.0
916 12:51:03.057046 Reference Code - SA - System Agent = c.0.65.70
917 12:51:03.060063 Reference Code - MRC = 0.0.3.80
918 12:51:03.063550 SA - PCIe Version = c.0.65.70
919 12:51:03.066871 SA-CRID Status = Disabled
920 12:51:03.070081 SA-CRID Original Value = 0.0.0.4
921 12:51:03.073264 SA-CRID New Value = 0.0.0.4
922 12:51:03.076520 OPROM - VBIOS = ff.ff.ff.ffff
923 12:51:03.080081 IO Manageability Engine FW Version = 24.0.4.0
924 12:51:03.083656 PHY Build Version = 0.0.0.2016
925 12:51:03.086793 Thunderbolt(TM) FW Version = 0.0.0.0
926 12:51:03.093276 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
927 12:51:03.100340 BS: BS_DEV_INIT_CHIPS run times (exec / console): 481 / 507 ms
928 12:51:03.100872 Enumerating buses...
929 12:51:03.106987 Show all devs... Before device enumeration.
930 12:51:03.107505 Root Device: enabled 1
931 12:51:03.110436 CPU_CLUSTER: 0: enabled 1
932 12:51:03.113635 DOMAIN: 0000: enabled 1
933 12:51:03.117022 GPIO: 0: enabled 1
934 12:51:03.117548 PCI: 00:00.0: enabled 1
935 12:51:03.120216 PCI: 00:01.0: enabled 0
936 12:51:03.123357 PCI: 00:01.1: enabled 0
937 12:51:03.123893 PCI: 00:02.0: enabled 1
938 12:51:03.127152 PCI: 00:04.0: enabled 1
939 12:51:03.130528 PCI: 00:05.0: enabled 0
940 12:51:03.133582 PCI: 00:06.0: enabled 1
941 12:51:03.134102 PCI: 00:06.2: enabled 0
942 12:51:03.136647 PCI: 00:07.0: enabled 0
943 12:51:03.139928 PCI: 00:07.1: enabled 0
944 12:51:03.143677 PCI: 00:07.2: enabled 0
945 12:51:03.144197 PCI: 00:07.3: enabled 0
946 12:51:03.146403 PCI: 00:08.0: enabled 0
947 12:51:03.149801 PCI: 00:09.0: enabled 0
948 12:51:03.153131 PCI: 00:0a.0: enabled 1
949 12:51:03.153656 PCI: 00:0d.0: enabled 1
950 12:51:03.156494 PCI: 00:0d.1: enabled 0
951 12:51:03.159860 PCI: 00:0d.2: enabled 0
952 12:51:03.163197 PCI: 00:0d.3: enabled 0
953 12:51:03.163713 PCI: 00:0e.0: enabled 0
954 12:51:03.167056 PCI: 00:10.0: enabled 0
955 12:51:03.170051 PCI: 00:10.1: enabled 0
956 12:51:03.170572 PCI: 00:10.6: enabled 0
957 12:51:03.172896 PCI: 00:10.7: enabled 0
958 12:51:03.176098 PCI: 00:12.0: enabled 0
959 12:51:03.179554 PCI: 00:12.6: enabled 0
960 12:51:03.179976 PCI: 00:12.7: enabled 0
961 12:51:03.182873 PCI: 00:13.0: enabled 0
962 12:51:03.186825 PCI: 00:14.0: enabled 1
963 12:51:03.190168 PCI: 00:14.1: enabled 0
964 12:51:03.190687 PCI: 00:14.2: enabled 1
965 12:51:03.192942 PCI: 00:14.3: enabled 1
966 12:51:03.196516 PCI: 00:15.0: enabled 1
967 12:51:03.199838 PCI: 00:15.1: enabled 1
968 12:51:03.200365 PCI: 00:15.2: enabled 0
969 12:51:03.202963 PCI: 00:15.3: enabled 1
970 12:51:03.206255 PCI: 00:16.0: enabled 1
971 12:51:03.210123 PCI: 00:16.1: enabled 0
972 12:51:03.210642 PCI: 00:16.2: enabled 0
973 12:51:03.213268 PCI: 00:16.3: enabled 0
974 12:51:03.216573 PCI: 00:16.4: enabled 0
975 12:51:03.217097 PCI: 00:16.5: enabled 0
976 12:51:03.219590 PCI: 00:17.0: enabled 1
977 12:51:03.222978 PCI: 00:19.0: enabled 0
978 12:51:03.226286 PCI: 00:19.1: enabled 1
979 12:51:03.226805 PCI: 00:19.2: enabled 0
980 12:51:03.230125 PCI: 00:1a.0: enabled 0
981 12:51:03.233191 PCI: 00:1c.0: enabled 0
982 12:51:03.236349 PCI: 00:1c.1: enabled 0
983 12:51:03.236870 PCI: 00:1c.2: enabled 0
984 12:51:03.239457 PCI: 00:1c.3: enabled 0
985 12:51:03.243044 PCI: 00:1c.4: enabled 0
986 12:51:03.246160 PCI: 00:1c.5: enabled 0
987 12:51:03.246680 PCI: 00:1c.6: enabled 0
988 12:51:03.248951 PCI: 00:1c.7: enabled 0
989 12:51:03.252791 PCI: 00:1d.0: enabled 0
990 12:51:03.255807 PCI: 00:1d.1: enabled 0
991 12:51:03.256231 PCI: 00:1d.2: enabled 0
992 12:51:03.259613 PCI: 00:1d.3: enabled 0
993 12:51:03.262764 PCI: 00:1e.0: enabled 1
994 12:51:03.263362 PCI: 00:1e.1: enabled 0
995 12:51:03.266024 PCI: 00:1e.2: enabled 0
996 12:51:03.269385 PCI: 00:1e.3: enabled 1
997 12:51:03.272756 PCI: 00:1f.0: enabled 1
998 12:51:03.273273 PCI: 00:1f.1: enabled 0
999 12:51:03.275609 PCI: 00:1f.2: enabled 1
1000 12:51:03.279371 PCI: 00:1f.3: enabled 1
1001 12:51:03.282633 PCI: 00:1f.4: enabled 0
1002 12:51:03.283197 PCI: 00:1f.5: enabled 1
1003 12:51:03.286153 PCI: 00:1f.6: enabled 0
1004 12:51:03.289520 PCI: 00:1f.7: enabled 0
1005 12:51:03.293027 GENERIC: 0.0: enabled 1
1006 12:51:03.293553 GENERIC: 0.0: enabled 1
1007 12:51:03.295854 GENERIC: 1.0: enabled 1
1008 12:51:03.299548 GENERIC: 0.0: enabled 1
1009 12:51:03.300075 GENERIC: 1.0: enabled 1
1010 12:51:03.302437 USB0 port 0: enabled 1
1011 12:51:03.306004 USB0 port 0: enabled 1
1012 12:51:03.309109 GENERIC: 0.0: enabled 1
1013 12:51:03.309535 I2C: 00:1a: enabled 1
1014 12:51:03.312634 I2C: 00:31: enabled 1
1015 12:51:03.315877 I2C: 00:32: enabled 1
1016 12:51:03.316401 I2C: 00:50: enabled 1
1017 12:51:03.318993 I2C: 00:10: enabled 1
1018 12:51:03.322651 I2C: 00:15: enabled 1
1019 12:51:03.323218 I2C: 00:2c: enabled 1
1020 12:51:03.326221 GENERIC: 0.0: enabled 1
1021 12:51:03.329745 SPI: 00: enabled 1
1022 12:51:03.330263 PNP: 0c09.0: enabled 1
1023 12:51:03.332589 GENERIC: 0.0: enabled 1
1024 12:51:03.335620 USB3 port 0: enabled 1
1025 12:51:03.336060 USB3 port 1: enabled 0
1026 12:51:03.339622 USB3 port 2: enabled 1
1027 12:51:03.342747 USB3 port 3: enabled 0
1028 12:51:03.346207 USB2 port 0: enabled 1
1029 12:51:03.346715 USB2 port 1: enabled 0
1030 12:51:03.349385 USB2 port 2: enabled 1
1031 12:51:03.352932 USB2 port 3: enabled 0
1032 12:51:03.353440 USB2 port 4: enabled 0
1033 12:51:03.356013 USB2 port 5: enabled 1
1034 12:51:03.359463 USB2 port 6: enabled 0
1035 12:51:03.362819 USB2 port 7: enabled 0
1036 12:51:03.363425 USB2 port 8: enabled 1
1037 12:51:03.365664 USB2 port 9: enabled 1
1038 12:51:03.369625 USB3 port 0: enabled 1
1039 12:51:03.370140 USB3 port 1: enabled 0
1040 12:51:03.372639 USB3 port 2: enabled 0
1041 12:51:03.376014 USB3 port 3: enabled 0
1042 12:51:03.376483 GENERIC: 0.0: enabled 1
1043 12:51:03.379369 GENERIC: 1.0: enabled 1
1044 12:51:03.382822 APIC: 00: enabled 1
1045 12:51:03.383405 APIC: 12: enabled 1
1046 12:51:03.386098 APIC: 14: enabled 1
1047 12:51:03.389702 APIC: 16: enabled 1
1048 12:51:03.390227 APIC: 10: enabled 1
1049 12:51:03.392361 APIC: 01: enabled 1
1050 12:51:03.395736 APIC: 08: enabled 1
1051 12:51:03.396153 APIC: 09: enabled 1
1052 12:51:03.399515 Compare with tree...
1053 12:51:03.400057 Root Device: enabled 1
1054 12:51:03.402331 CPU_CLUSTER: 0: enabled 1
1055 12:51:03.405775 APIC: 00: enabled 1
1056 12:51:03.409365 APIC: 12: enabled 1
1057 12:51:03.409551 APIC: 14: enabled 1
1058 12:51:03.411850 APIC: 16: enabled 1
1059 12:51:03.415618 APIC: 10: enabled 1
1060 12:51:03.415722 APIC: 01: enabled 1
1061 12:51:03.418624 APIC: 08: enabled 1
1062 12:51:03.422618 APIC: 09: enabled 1
1063 12:51:03.423065 DOMAIN: 0000: enabled 1
1064 12:51:03.426061 GPIO: 0: enabled 1
1065 12:51:03.429306 PCI: 00:00.0: enabled 1
1066 12:51:03.432490 PCI: 00:01.0: enabled 0
1067 12:51:03.433014 PCI: 00:01.1: enabled 0
1068 12:51:03.435945 PCI: 00:02.0: enabled 1
1069 12:51:03.439113 PCI: 00:04.0: enabled 1
1070 12:51:03.443190 GENERIC: 0.0: enabled 1
1071 12:51:03.445956 PCI: 00:05.0: enabled 0
1072 12:51:03.446467 PCI: 00:06.0: enabled 1
1073 12:51:03.449448 PCI: 00:06.2: enabled 0
1074 12:51:03.452430 PCI: 00:08.0: enabled 0
1075 12:51:03.455899 PCI: 00:09.0: enabled 0
1076 12:51:03.459492 PCI: 00:0a.0: enabled 1
1077 12:51:03.459999 PCI: 00:0d.0: enabled 1
1078 12:51:03.462776 USB0 port 0: enabled 1
1079 12:51:03.466005 USB3 port 0: enabled 1
1080 12:51:03.469152 USB3 port 1: enabled 0
1081 12:51:03.472202 USB3 port 2: enabled 1
1082 12:51:03.475722 USB3 port 3: enabled 0
1083 12:51:03.476472 PCI: 00:0d.1: enabled 0
1084 12:51:03.479220 PCI: 00:0d.2: enabled 0
1085 12:51:03.482856 PCI: 00:0d.3: enabled 0
1086 12:51:03.485981 PCI: 00:0e.0: enabled 0
1087 12:51:03.489526 PCI: 00:10.0: enabled 0
1088 12:51:03.490033 PCI: 00:10.1: enabled 0
1089 12:51:03.492471 PCI: 00:10.6: enabled 0
1090 12:51:03.496144 PCI: 00:10.7: enabled 0
1091 12:51:03.498950 PCI: 00:12.0: enabled 0
1092 12:51:03.499380 PCI: 00:12.6: enabled 0
1093 12:51:03.502398 PCI: 00:12.7: enabled 0
1094 12:51:03.505667 PCI: 00:13.0: enabled 0
1095 12:51:03.509235 PCI: 00:14.0: enabled 1
1096 12:51:03.512669 USB0 port 0: enabled 1
1097 12:51:03.513176 USB2 port 0: enabled 1
1098 12:51:03.515735 USB2 port 1: enabled 0
1099 12:51:03.519065 USB2 port 2: enabled 1
1100 12:51:03.522611 USB2 port 3: enabled 0
1101 12:51:03.525638 USB2 port 4: enabled 0
1102 12:51:03.528831 USB2 port 5: enabled 1
1103 12:51:03.529254 USB2 port 6: enabled 0
1104 12:51:03.532179 USB2 port 7: enabled 0
1105 12:51:03.535800 USB2 port 8: enabled 1
1106 12:51:03.539059 USB2 port 9: enabled 1
1107 12:51:03.542746 USB3 port 0: enabled 1
1108 12:51:03.546068 USB3 port 1: enabled 0
1109 12:51:03.546594 USB3 port 2: enabled 0
1110 12:51:03.548861 USB3 port 3: enabled 0
1111 12:51:03.552449 PCI: 00:14.1: enabled 0
1112 12:51:03.555541 PCI: 00:14.2: enabled 1
1113 12:51:03.558792 PCI: 00:14.3: enabled 1
1114 12:51:03.559365 GENERIC: 0.0: enabled 1
1115 12:51:03.562670 PCI: 00:15.0: enabled 1
1116 12:51:03.565783 I2C: 00:1a: enabled 1
1117 12:51:03.569056 I2C: 00:31: enabled 1
1118 12:51:03.569566 I2C: 00:32: enabled 1
1119 12:51:03.572541 PCI: 00:15.1: enabled 1
1120 12:51:03.575444 I2C: 00:50: enabled 1
1121 12:51:03.579058 PCI: 00:15.2: enabled 0
1122 12:51:03.582189 PCI: 00:15.3: enabled 1
1123 12:51:03.582707 I2C: 00:10: enabled 1
1124 12:51:03.585830 PCI: 00:16.0: enabled 1
1125 12:51:03.588882 PCI: 00:16.1: enabled 0
1126 12:51:03.592346 PCI: 00:16.2: enabled 0
1127 12:51:03.595685 PCI: 00:16.3: enabled 0
1128 12:51:03.596209 PCI: 00:16.4: enabled 0
1129 12:51:03.599445 PCI: 00:16.5: enabled 0
1130 12:51:03.602299 PCI: 00:17.0: enabled 1
1131 12:51:03.606017 PCI: 00:19.0: enabled 0
1132 12:51:03.609182 PCI: 00:19.1: enabled 1
1133 12:51:03.609696 I2C: 00:15: enabled 1
1134 12:51:03.612534 I2C: 00:2c: enabled 1
1135 12:51:03.615627 PCI: 00:19.2: enabled 0
1136 12:51:03.619107 PCI: 00:1a.0: enabled 0
1137 12:51:03.619620 PCI: 00:1e.0: enabled 1
1138 12:51:03.622424 PCI: 00:1e.1: enabled 0
1139 12:51:03.625389 PCI: 00:1e.2: enabled 0
1140 12:51:03.628841 PCI: 00:1e.3: enabled 1
1141 12:51:03.629357 SPI: 00: enabled 1
1142 12:51:03.632210 PCI: 00:1f.0: enabled 1
1143 12:51:03.635479 PNP: 0c09.0: enabled 1
1144 12:51:03.639090 PCI: 00:1f.1: enabled 0
1145 12:51:03.642188 PCI: 00:1f.2: enabled 1
1146 12:51:03.642699 GENERIC: 0.0: enabled 1
1147 12:51:03.645390 GENERIC: 0.0: enabled 1
1148 12:51:03.649141 GENERIC: 1.0: enabled 1
1149 12:51:03.651893 PCI: 00:1f.3: enabled 1
1150 12:51:03.655464 PCI: 00:1f.4: enabled 0
1151 12:51:03.658622 PCI: 00:1f.5: enabled 1
1152 12:51:03.659071 PCI: 00:1f.6: enabled 0
1153 12:51:03.662385 PCI: 00:1f.7: enabled 0
1154 12:51:03.665243 Root Device scanning...
1155 12:51:03.669193 scan_static_bus for Root Device
1156 12:51:03.672115 CPU_CLUSTER: 0 enabled
1157 12:51:03.672629 DOMAIN: 0000 enabled
1158 12:51:03.675247 DOMAIN: 0000 scanning...
1159 12:51:03.678521 PCI: pci_scan_bus for bus 00
1160 12:51:03.681771 PCI: 00:00.0 [8086/0000] ops
1161 12:51:03.685123 PCI: 00:00.0 [8086/4609] enabled
1162 12:51:03.688691 PCI: 00:02.0 [8086/0000] bus ops
1163 12:51:03.691677 PCI: 00:02.0 [8086/46b3] enabled
1164 12:51:03.695165 PCI: 00:04.0 [8086/0000] bus ops
1165 12:51:03.698305 PCI: 00:04.0 [8086/461d] enabled
1166 12:51:03.701918 PCI: 00:06.0 [8086/0000] bus ops
1167 12:51:03.705989 PCI: 00:06.0 [8086/464d] enabled
1168 12:51:03.708775 PCI: 00:08.0 [8086/464f] disabled
1169 12:51:03.712313 PCI: 00:0a.0 [8086/467d] enabled
1170 12:51:03.715828 PCI: 00:0d.0 [8086/0000] bus ops
1171 12:51:03.719063 PCI: 00:0d.0 [8086/461e] enabled
1172 12:51:03.722502 PCI: 00:14.0 [8086/0000] bus ops
1173 12:51:03.725841 PCI: 00:14.0 [8086/51ed] enabled
1174 12:51:03.729382 PCI: 00:14.2 [8086/51ef] enabled
1175 12:51:03.732300 PCI: 00:14.3 [8086/0000] bus ops
1176 12:51:03.735602 PCI: 00:14.3 [8086/51f0] enabled
1177 12:51:03.738817 PCI: 00:15.0 [8086/0000] bus ops
1178 12:51:03.742248 PCI: 00:15.0 [8086/51e8] enabled
1179 12:51:03.745430 PCI: 00:15.1 [8086/0000] bus ops
1180 12:51:03.749069 PCI: 00:15.1 [8086/51e9] enabled
1181 12:51:03.751780 PCI: 00:15.2 [8086/0000] bus ops
1182 12:51:03.755601 PCI: 00:15.2 [8086/51ea] disabled
1183 12:51:03.758662 PCI: 00:15.3 [8086/0000] bus ops
1184 12:51:03.761874 PCI: 00:15.3 [8086/51eb] enabled
1185 12:51:03.765547 PCI: 00:16.0 [8086/0000] ops
1186 12:51:03.768779 PCI: 00:16.0 [8086/51e0] enabled
1187 12:51:03.775524 PCI: Static device PCI: 00:17.0 not found, disabling it.
1188 12:51:03.778476 PCI: 00:19.0 [8086/0000] bus ops
1189 12:51:03.781877 PCI: 00:19.0 [8086/51c5] disabled
1190 12:51:03.785388 PCI: 00:19.1 [8086/0000] bus ops
1191 12:51:03.788532 PCI: 00:19.1 [8086/51c6] enabled
1192 12:51:03.791984 PCI: 00:1e.0 [8086/0000] ops
1193 12:51:03.795483 PCI: 00:1e.0 [8086/51a8] enabled
1194 12:51:03.798650 PCI: 00:1e.3 [8086/0000] bus ops
1195 12:51:03.801480 PCI: 00:1e.3 [8086/51ab] enabled
1196 12:51:03.805153 PCI: 00:1f.0 [8086/0000] bus ops
1197 12:51:03.808335 PCI: 00:1f.0 [8086/5182] enabled
1198 12:51:03.808858 RTC Init
1199 12:51:03.811435 Set power on after power failure.
1200 12:51:03.815120 Disabling Deep S3
1201 12:51:03.819061 Disabling Deep S3
1202 12:51:03.819576 Disabling Deep S4
1203 12:51:03.822026 Disabling Deep S4
1204 12:51:03.822532 Disabling Deep S5
1205 12:51:03.825460 Disabling Deep S5
1206 12:51:03.828627 PCI: 00:1f.2 [0000/0000] hidden
1207 12:51:03.832055 PCI: 00:1f.3 [8086/0000] bus ops
1208 12:51:03.835250 PCI: 00:1f.3 [8086/51c8] enabled
1209 12:51:03.838749 PCI: 00:1f.5 [8086/0000] bus ops
1210 12:51:03.841919 PCI: 00:1f.5 [8086/51a4] enabled
1211 12:51:03.842432 GPIO: 0 enabled
1212 12:51:03.845152 PCI: Leftover static devices:
1213 12:51:03.848437 PCI: 00:01.0
1214 12:51:03.848952 PCI: 00:01.1
1215 12:51:03.849286 PCI: 00:05.0
1216 12:51:03.851842 PCI: 00:06.2
1217 12:51:03.852371 PCI: 00:09.0
1218 12:51:03.855306 PCI: 00:0d.1
1219 12:51:03.855819 PCI: 00:0d.2
1220 12:51:03.858093 PCI: 00:0d.3
1221 12:51:03.858510 PCI: 00:0e.0
1222 12:51:03.858837 PCI: 00:10.0
1223 12:51:03.861718 PCI: 00:10.1
1224 12:51:03.862133 PCI: 00:10.6
1225 12:51:03.865280 PCI: 00:10.7
1226 12:51:03.865698 PCI: 00:12.0
1227 12:51:03.866029 PCI: 00:12.6
1228 12:51:03.868157 PCI: 00:12.7
1229 12:51:03.868666 PCI: 00:13.0
1230 12:51:03.871375 PCI: 00:14.1
1231 12:51:03.871887 PCI: 00:16.1
1232 12:51:03.874979 PCI: 00:16.2
1233 12:51:03.875502 PCI: 00:16.3
1234 12:51:03.875838 PCI: 00:16.4
1235 12:51:03.878321 PCI: 00:16.5
1236 12:51:03.878739 PCI: 00:17.0
1237 12:51:03.881227 PCI: 00:19.2
1238 12:51:03.881644 PCI: 00:1a.0
1239 12:51:03.881973 PCI: 00:1e.1
1240 12:51:03.884787 PCI: 00:1e.2
1241 12:51:03.885203 PCI: 00:1f.1
1242 12:51:03.888825 PCI: 00:1f.4
1243 12:51:03.889339 PCI: 00:1f.6
1244 12:51:03.889675 PCI: 00:1f.7
1245 12:51:03.892235 PCI: Check your devicetree.cb.
1246 12:51:03.895006 PCI: 00:02.0 scanning...
1247 12:51:03.898048 scan_generic_bus for PCI: 00:02.0
1248 12:51:03.901460 scan_generic_bus for PCI: 00:02.0 done
1249 12:51:03.908331 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1250 12:51:03.911123 PCI: 00:04.0 scanning...
1251 12:51:03.914682 scan_generic_bus for PCI: 00:04.0
1252 12:51:03.915268 GENERIC: 0.0 enabled
1253 12:51:03.921294 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1254 12:51:03.924941 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1255 12:51:03.927934 PCI: 00:06.0 scanning...
1256 12:51:03.931485 do_pci_scan_bridge for PCI: 00:06.0
1257 12:51:03.934798 PCI: pci_scan_bus for bus 01
1258 12:51:03.938282 PCI: 01:00.0 [15b7/5009] enabled
1259 12:51:03.941880 Enabling Common Clock Configuration
1260 12:51:03.947976 L1 Sub-State supported from root port 6
1261 12:51:03.948489 L1 Sub-State Support = 0x5
1262 12:51:03.951732 CommonModeRestoreTime = 0x6e
1263 12:51:03.958215 Power On Value = 0x5, Power On Scale = 0x2
1264 12:51:03.958732 ASPM: Enabled L1
1265 12:51:03.961859 PCIe: Max_Payload_Size adjusted to 256
1266 12:51:03.964864 PCI: 01:00.0: Enabled LTR
1267 12:51:03.968046 PCI: 01:00.0: Programmed LTR max latencies
1268 12:51:03.975025 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1269 12:51:03.978378 PCI: 00:0d.0 scanning...
1270 12:51:03.981693 scan_static_bus for PCI: 00:0d.0
1271 12:51:03.982207 USB0 port 0 enabled
1272 12:51:03.985037 USB0 port 0 scanning...
1273 12:51:03.988565 scan_static_bus for USB0 port 0
1274 12:51:03.989078 USB3 port 0 enabled
1275 12:51:03.991669 USB3 port 1 disabled
1276 12:51:03.994842 USB3 port 2 enabled
1277 12:51:03.995388 USB3 port 3 disabled
1278 12:51:03.998173 USB3 port 0 scanning...
1279 12:51:04.001211 scan_static_bus for USB3 port 0
1280 12:51:04.004537 scan_static_bus for USB3 port 0 done
1281 12:51:04.011633 scan_bus: bus USB3 port 0 finished in 6 msecs
1282 12:51:04.012157 USB3 port 2 scanning...
1283 12:51:04.015047 scan_static_bus for USB3 port 2
1284 12:51:04.018458 scan_static_bus for USB3 port 2 done
1285 12:51:04.024953 scan_bus: bus USB3 port 2 finished in 6 msecs
1286 12:51:04.027931 scan_static_bus for USB0 port 0 done
1287 12:51:04.031826 scan_bus: bus USB0 port 0 finished in 43 msecs
1288 12:51:04.034895 scan_static_bus for PCI: 00:0d.0 done
1289 12:51:04.041378 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1290 12:51:04.044596 PCI: 00:14.0 scanning...
1291 12:51:04.048588 scan_static_bus for PCI: 00:14.0
1292 12:51:04.049102 USB0 port 0 enabled
1293 12:51:04.051065 USB0 port 0 scanning...
1294 12:51:04.054612 scan_static_bus for USB0 port 0
1295 12:51:04.058197 USB2 port 0 enabled
1296 12:51:04.058734 USB2 port 1 disabled
1297 12:51:04.061544 USB2 port 2 enabled
1298 12:51:04.062056 USB2 port 3 disabled
1299 12:51:04.065030 USB2 port 4 disabled
1300 12:51:04.067990 USB2 port 5 enabled
1301 12:51:04.068507 USB2 port 6 disabled
1302 12:51:04.071327 USB2 port 7 disabled
1303 12:51:04.074863 USB2 port 8 enabled
1304 12:51:04.075415 USB2 port 9 enabled
1305 12:51:04.077576 USB3 port 0 enabled
1306 12:51:04.081489 USB3 port 1 disabled
1307 12:51:04.081999 USB3 port 2 disabled
1308 12:51:04.084708 USB3 port 3 disabled
1309 12:51:04.088404 USB2 port 0 scanning...
1310 12:51:04.091678 scan_static_bus for USB2 port 0
1311 12:51:04.094401 scan_static_bus for USB2 port 0 done
1312 12:51:04.098244 scan_bus: bus USB2 port 0 finished in 6 msecs
1313 12:51:04.101390 USB2 port 2 scanning...
1314 12:51:04.104457 scan_static_bus for USB2 port 2
1315 12:51:04.108140 scan_static_bus for USB2 port 2 done
1316 12:51:04.111306 scan_bus: bus USB2 port 2 finished in 6 msecs
1317 12:51:04.114283 USB2 port 5 scanning...
1318 12:51:04.117902 scan_static_bus for USB2 port 5
1319 12:51:04.121290 scan_static_bus for USB2 port 5 done
1320 12:51:04.124787 scan_bus: bus USB2 port 5 finished in 6 msecs
1321 12:51:04.128136 USB2 port 8 scanning...
1322 12:51:04.131252 scan_static_bus for USB2 port 8
1323 12:51:04.134267 scan_static_bus for USB2 port 8 done
1324 12:51:04.141512 scan_bus: bus USB2 port 8 finished in 6 msecs
1325 12:51:04.142025 USB2 port 9 scanning...
1326 12:51:04.144681 scan_static_bus for USB2 port 9
1327 12:51:04.147921 scan_static_bus for USB2 port 9 done
1328 12:51:04.154471 scan_bus: bus USB2 port 9 finished in 6 msecs
1329 12:51:04.157587 USB3 port 0 scanning...
1330 12:51:04.161235 scan_static_bus for USB3 port 0
1331 12:51:04.164703 scan_static_bus for USB3 port 0 done
1332 12:51:04.167769 scan_bus: bus USB3 port 0 finished in 6 msecs
1333 12:51:04.171322 scan_static_bus for USB0 port 0 done
1334 12:51:04.177853 scan_bus: bus USB0 port 0 finished in 120 msecs
1335 12:51:04.181206 scan_static_bus for PCI: 00:14.0 done
1336 12:51:04.184280 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1337 12:51:04.187778 PCI: 00:14.3 scanning...
1338 12:51:04.191102 scan_static_bus for PCI: 00:14.3
1339 12:51:04.194512 GENERIC: 0.0 enabled
1340 12:51:04.197945 scan_static_bus for PCI: 00:14.3 done
1341 12:51:04.201314 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1342 12:51:04.204778 PCI: 00:15.0 scanning...
1343 12:51:04.207790 scan_static_bus for PCI: 00:15.0
1344 12:51:04.208313 I2C: 00:1a enabled
1345 12:51:04.211170 I2C: 00:31 enabled
1346 12:51:04.214266 I2C: 00:32 enabled
1347 12:51:04.217994 scan_static_bus for PCI: 00:15.0 done
1348 12:51:04.221263 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1349 12:51:04.224390 PCI: 00:15.1 scanning...
1350 12:51:04.227819 scan_static_bus for PCI: 00:15.1
1351 12:51:04.230992 I2C: 00:50 enabled
1352 12:51:04.234121 scan_static_bus for PCI: 00:15.1 done
1353 12:51:04.237770 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1354 12:51:04.240775 PCI: 00:15.3 scanning...
1355 12:51:04.244639 scan_static_bus for PCI: 00:15.3
1356 12:51:04.245146 I2C: 00:10 enabled
1357 12:51:04.251164 scan_static_bus for PCI: 00:15.3 done
1358 12:51:04.254425 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1359 12:51:04.257700 PCI: 00:19.1 scanning...
1360 12:51:04.260872 scan_static_bus for PCI: 00:19.1
1361 12:51:04.261387 I2C: 00:15 enabled
1362 12:51:04.263931 I2C: 00:2c enabled
1363 12:51:04.267496 scan_static_bus for PCI: 00:19.1 done
1364 12:51:04.274159 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1365 12:51:04.274680 PCI: 00:1e.3 scanning...
1366 12:51:04.277344 scan_generic_bus for PCI: 00:1e.3
1367 12:51:04.280806 SPI: 00 enabled
1368 12:51:04.287873 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1369 12:51:04.291119 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1370 12:51:04.294538 PCI: 00:1f.0 scanning...
1371 12:51:04.297748 scan_static_bus for PCI: 00:1f.0
1372 12:51:04.298301 PNP: 0c09.0 enabled
1373 12:51:04.301330 PNP: 0c09.0 scanning...
1374 12:51:04.304744 scan_static_bus for PNP: 0c09.0
1375 12:51:04.308022 scan_static_bus for PNP: 0c09.0 done
1376 12:51:04.314610 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1377 12:51:04.317524 scan_static_bus for PCI: 00:1f.0 done
1378 12:51:04.321349 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1379 12:51:04.324689 PCI: 00:1f.2 scanning...
1380 12:51:04.327896 scan_static_bus for PCI: 00:1f.2
1381 12:51:04.331527 GENERIC: 0.0 enabled
1382 12:51:04.332044 GENERIC: 0.0 scanning...
1383 12:51:04.334781 scan_static_bus for GENERIC: 0.0
1384 12:51:04.337822 GENERIC: 0.0 enabled
1385 12:51:04.341276 GENERIC: 1.0 enabled
1386 12:51:04.344431 scan_static_bus for GENERIC: 0.0 done
1387 12:51:04.347896 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1388 12:51:04.351226 scan_static_bus for PCI: 00:1f.2 done
1389 12:51:04.357778 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1390 12:51:04.360577 PCI: 00:1f.3 scanning...
1391 12:51:04.364455 scan_static_bus for PCI: 00:1f.3
1392 12:51:04.367766 scan_static_bus for PCI: 00:1f.3 done
1393 12:51:04.371232 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1394 12:51:04.374580 PCI: 00:1f.5 scanning...
1395 12:51:04.377523 scan_generic_bus for PCI: 00:1f.5
1396 12:51:04.381155 scan_generic_bus for PCI: 00:1f.5 done
1397 12:51:04.387480 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1398 12:51:04.390717 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1399 12:51:04.394266 scan_static_bus for Root Device done
1400 12:51:04.401322 scan_bus: bus Root Device finished in 729 msecs
1401 12:51:04.401836 done
1402 12:51:04.407800 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1403 12:51:04.410647 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1404 12:51:04.417674 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1405 12:51:04.421089 SPI flash protection: WPSW=0 SRP0=0
1406 12:51:04.427593 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1407 12:51:04.430562 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1408 12:51:04.434105 found VGA at PCI: 00:02.0
1409 12:51:04.437279 Setting up VGA for PCI: 00:02.0
1410 12:51:04.444399 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1411 12:51:04.447391 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1412 12:51:04.450805 Allocating resources...
1413 12:51:04.454036 Reading resources...
1414 12:51:04.457381 Root Device read_resources bus 0 link: 0
1415 12:51:04.460597 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1416 12:51:04.467406 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1417 12:51:04.470529 DOMAIN: 0000 read_resources bus 0 link: 0
1418 12:51:04.477452 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1419 12:51:04.483730 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1420 12:51:04.490313 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1421 12:51:04.494004 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1422 12:51:04.500379 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1423 12:51:04.507004 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1424 12:51:04.513406 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1425 12:51:04.520185 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1426 12:51:04.527192 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1427 12:51:04.533549 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1428 12:51:04.540162 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1429 12:51:04.546626 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1430 12:51:04.553414 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1431 12:51:04.559995 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1432 12:51:04.566788 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1433 12:51:04.569814 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1434 12:51:04.576968 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1435 12:51:04.583111 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1436 12:51:04.590049 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1437 12:51:04.596609 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1438 12:51:04.603673 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1439 12:51:04.606755 PCI: 00:04.0 read_resources bus 1 link: 0
1440 12:51:04.613682 PCI: 00:04.0 read_resources bus 1 link: 0 done
1441 12:51:04.617020 PCI: 00:06.0 read_resources bus 1 link: 0
1442 12:51:04.619801 PCI: 00:06.0 read_resources bus 1 link: 0 done
1443 12:51:04.623111 PCI: 00:0d.0 read_resources bus 0 link: 0
1444 12:51:04.630077 USB0 port 0 read_resources bus 0 link: 0
1445 12:51:04.633533 USB0 port 0 read_resources bus 0 link: 0 done
1446 12:51:04.639828 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1447 12:51:04.643249 PCI: 00:14.0 read_resources bus 0 link: 0
1448 12:51:04.646981 USB0 port 0 read_resources bus 0 link: 0
1449 12:51:04.650104 USB0 port 0 read_resources bus 0 link: 0 done
1450 12:51:04.656254 PCI: 00:14.0 read_resources bus 0 link: 0 done
1451 12:51:04.659837 PCI: 00:14.3 read_resources bus 0 link: 0
1452 12:51:04.666431 PCI: 00:14.3 read_resources bus 0 link: 0 done
1453 12:51:04.669862 PCI: 00:15.0 read_resources bus 0 link: 0
1454 12:51:04.673203 PCI: 00:15.0 read_resources bus 0 link: 0 done
1455 12:51:04.680031 PCI: 00:15.1 read_resources bus 0 link: 0
1456 12:51:04.683261 PCI: 00:15.1 read_resources bus 0 link: 0 done
1457 12:51:04.686458 PCI: 00:15.3 read_resources bus 0 link: 0
1458 12:51:04.693241 PCI: 00:15.3 read_resources bus 0 link: 0 done
1459 12:51:04.696598 PCI: 00:19.1 read_resources bus 0 link: 0
1460 12:51:04.700192 PCI: 00:19.1 read_resources bus 0 link: 0 done
1461 12:51:04.706765 PCI: 00:1e.3 read_resources bus 2 link: 0
1462 12:51:04.710264 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1463 12:51:04.713361 PCI: 00:1f.0 read_resources bus 0 link: 0
1464 12:51:04.719866 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1465 12:51:04.723663 PCI: 00:1f.2 read_resources bus 0 link: 0
1466 12:51:04.726838 GENERIC: 0.0 read_resources bus 0 link: 0
1467 12:51:04.733259 GENERIC: 0.0 read_resources bus 0 link: 0 done
1468 12:51:04.736588 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1469 12:51:04.743393 DOMAIN: 0000 read_resources bus 0 link: 0 done
1470 12:51:04.746806 Root Device read_resources bus 0 link: 0 done
1471 12:51:04.749996 Done reading resources.
1472 12:51:04.756592 Show resources in subtree (Root Device)...After reading.
1473 12:51:04.759607 Root Device child on link 0 CPU_CLUSTER: 0
1474 12:51:04.763520 CPU_CLUSTER: 0 child on link 0 APIC: 00
1475 12:51:04.766210 APIC: 00
1476 12:51:04.766723 APIC: 12
1477 12:51:04.767096 APIC: 14
1478 12:51:04.769933 APIC: 16
1479 12:51:04.770348 APIC: 10
1480 12:51:04.770678 APIC: 01
1481 12:51:04.773559 APIC: 08
1482 12:51:04.774070 APIC: 09
1483 12:51:04.776225 DOMAIN: 0000 child on link 0 GPIO: 0
1484 12:51:04.786808 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1485 12:51:04.796504 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1486 12:51:04.799889 GPIO: 0
1487 12:51:04.800406 PCI: 00:00.0
1488 12:51:04.810048 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1489 12:51:04.819718 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1490 12:51:04.826480 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1491 12:51:04.836728 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1492 12:51:04.846384 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1493 12:51:04.856254 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1494 12:51:04.866085 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1495 12:51:04.876205 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1496 12:51:04.886260 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1497 12:51:04.892785 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1498 12:51:04.902826 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1499 12:51:04.912832 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1500 12:51:04.922861 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1501 12:51:04.932477 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1502 12:51:04.942346 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1503 12:51:04.949395 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1504 12:51:04.959019 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1505 12:51:04.969009 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1506 12:51:04.979371 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1507 12:51:04.989247 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1508 12:51:04.999383 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1509 12:51:05.009135 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1510 12:51:05.016170 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1511 12:51:05.026124 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1512 12:51:05.035855 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1513 12:51:05.046102 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1514 12:51:05.055758 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1515 12:51:05.066150 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1516 12:51:05.066669 PCI: 00:02.0
1517 12:51:05.075658 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1518 12:51:05.089251 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1519 12:51:05.096203 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1520 12:51:05.099087 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1521 12:51:05.109329 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1522 12:51:05.112257 GENERIC: 0.0
1523 12:51:05.115937 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1524 12:51:05.125964 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1525 12:51:05.135908 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1526 12:51:05.145982 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1527 12:51:05.146508 PCI: 01:00.0
1528 12:51:05.155748 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1529 12:51:05.165399 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1530 12:51:05.169309 PCI: 00:08.0
1531 12:51:05.169826 PCI: 00:0a.0
1532 12:51:05.179330 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1533 12:51:05.182067 PCI: 00:0d.0 child on link 0 USB0 port 0
1534 12:51:05.192156 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1535 12:51:05.199028 USB0 port 0 child on link 0 USB3 port 0
1536 12:51:05.199560 USB3 port 0
1537 12:51:05.202450 USB3 port 1
1538 12:51:05.203020 USB3 port 2
1539 12:51:05.205953 USB3 port 3
1540 12:51:05.209098 PCI: 00:14.0 child on link 0 USB0 port 0
1541 12:51:05.219539 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1542 12:51:05.225874 USB0 port 0 child on link 0 USB2 port 0
1543 12:51:05.226397 USB2 port 0
1544 12:51:05.229520 USB2 port 1
1545 12:51:05.230039 USB2 port 2
1546 12:51:05.232316 USB2 port 3
1547 12:51:05.232836 USB2 port 4
1548 12:51:05.235882 USB2 port 5
1549 12:51:05.236401 USB2 port 6
1550 12:51:05.238953 USB2 port 7
1551 12:51:05.239481 USB2 port 8
1552 12:51:05.242467 USB2 port 9
1553 12:51:05.243029 USB3 port 0
1554 12:51:05.245696 USB3 port 1
1555 12:51:05.246227 USB3 port 2
1556 12:51:05.249189 USB3 port 3
1557 12:51:05.252312 PCI: 00:14.2
1558 12:51:05.259311 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1559 12:51:05.268791 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1560 12:51:05.275558 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1561 12:51:05.285479 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1562 12:51:05.286007 GENERIC: 0.0
1563 12:51:05.292091 PCI: 00:15.0 child on link 0 I2C: 00:1a
1564 12:51:05.301936 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1565 12:51:05.302449 I2C: 00:1a
1566 12:51:05.305309 I2C: 00:31
1567 12:51:05.305828 I2C: 00:32
1568 12:51:05.308838 PCI: 00:15.1 child on link 0 I2C: 00:50
1569 12:51:05.318878 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1570 12:51:05.322306 I2C: 00:50
1571 12:51:05.322839 PCI: 00:15.2
1572 12:51:05.328608 PCI: 00:15.3 child on link 0 I2C: 00:10
1573 12:51:05.338659 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1574 12:51:05.339252 I2C: 00:10
1575 12:51:05.342017 PCI: 00:16.0
1576 12:51:05.351855 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1577 12:51:05.352379 PCI: 00:19.0
1578 12:51:05.355335 PCI: 00:19.1 child on link 0 I2C: 00:15
1579 12:51:05.365642 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1580 12:51:05.369028 I2C: 00:15
1581 12:51:05.369553 I2C: 00:2c
1582 12:51:05.372079 PCI: 00:1e.0
1583 12:51:05.382399 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1584 12:51:05.385688 PCI: 00:1e.3 child on link 0 SPI: 00
1585 12:51:05.395720 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1586 12:51:05.398805 SPI: 00
1587 12:51:05.402413 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1588 12:51:05.412452 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1589 12:51:05.412975 PNP: 0c09.0
1590 12:51:05.422319 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1591 12:51:05.425398 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1592 12:51:05.436157 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1593 12:51:05.445985 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1594 12:51:05.448899 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1595 12:51:05.452410 GENERIC: 0.0
1596 12:51:05.452827 GENERIC: 1.0
1597 12:51:05.455469 PCI: 00:1f.3
1598 12:51:05.465817 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1599 12:51:05.475600 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1600 12:51:05.476114 PCI: 00:1f.5
1601 12:51:05.485674 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1602 12:51:05.492236 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1603 12:51:05.499055 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1604 12:51:05.505611 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1605 12:51:05.512273 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1606 12:51:05.515412 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1607 12:51:05.518606 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1608 12:51:05.525229 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1609 12:51:05.532106 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1610 12:51:05.542666 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1611 12:51:05.548947 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1612 12:51:05.555440 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1613 12:51:05.561770 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1614 12:51:05.568888 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1615 12:51:05.578885 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1616 12:51:05.581915 DOMAIN: 0000: Resource ranges:
1617 12:51:05.585877 * Base: 1000, Size: 800, Tag: 100
1618 12:51:05.588604 * Base: 1900, Size: e700, Tag: 100
1619 12:51:05.592003 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1620 12:51:05.598874 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1621 12:51:05.605276 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1622 12:51:05.615085 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1623 12:51:05.621930 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1624 12:51:05.628873 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1625 12:51:05.638379 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1626 12:51:05.645282 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1627 12:51:05.652111 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1628 12:51:05.661482 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1629 12:51:05.668911 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1630 12:51:05.674927 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1631 12:51:05.684982 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1632 12:51:05.691828 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1633 12:51:05.699106 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1634 12:51:05.704855 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1635 12:51:05.715275 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1636 12:51:05.721847 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1637 12:51:05.728568 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1638 12:51:05.738791 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1639 12:51:05.745043 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1640 12:51:05.751578 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1641 12:51:05.761837 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1642 12:51:05.768150 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1643 12:51:05.775241 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1644 12:51:05.784927 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1645 12:51:05.791590 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1646 12:51:05.798363 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1647 12:51:05.808089 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1648 12:51:05.814678 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1649 12:51:05.821605 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1650 12:51:05.831295 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1651 12:51:05.838451 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1652 12:51:05.841714 DOMAIN: 0000: Resource ranges:
1653 12:51:05.844949 * Base: 80400000, Size: 3fc00000, Tag: 200
1654 12:51:05.851558 * Base: d0000000, Size: 28000000, Tag: 200
1655 12:51:05.854886 * Base: fa000000, Size: 1000000, Tag: 200
1656 12:51:05.857972 * Base: fb001000, Size: 17ff000, Tag: 200
1657 12:51:05.861445 * Base: fe800000, Size: 300000, Tag: 200
1658 12:51:05.867496 * Base: feb80000, Size: 80000, Tag: 200
1659 12:51:05.871267 * Base: fed00000, Size: 40000, Tag: 200
1660 12:51:05.874554 * Base: fed70000, Size: 10000, Tag: 200
1661 12:51:05.877993 * Base: fed88000, Size: 8000, Tag: 200
1662 12:51:05.884661 * Base: fed93000, Size: d000, Tag: 200
1663 12:51:05.887506 * Base: feda2000, Size: 1e000, Tag: 200
1664 12:51:05.891330 * Base: fede0000, Size: 1220000, Tag: 200
1665 12:51:05.897987 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1666 12:51:05.904566 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1667 12:51:05.910980 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1668 12:51:05.917882 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1669 12:51:05.924393 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1670 12:51:05.931037 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1671 12:51:05.937382 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1672 12:51:05.943816 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1673 12:51:05.950863 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1674 12:51:05.957276 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1675 12:51:05.964102 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1676 12:51:05.970715 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1677 12:51:05.977197 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1678 12:51:05.983549 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1679 12:51:05.990521 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1680 12:51:05.997385 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1681 12:51:06.003942 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1682 12:51:06.010857 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1683 12:51:06.017065 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1684 12:51:06.023820 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1685 12:51:06.030498 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1686 12:51:06.037140 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1687 12:51:06.040324 PCI: 00:06.0: Resource ranges:
1688 12:51:06.046999 * Base: 80400000, Size: 100000, Tag: 200
1689 12:51:06.053778 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1690 12:51:06.060484 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1691 12:51:06.067022 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1692 12:51:06.073870 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1693 12:51:06.080289 Root Device assign_resources, bus 0 link: 0
1694 12:51:06.083439 DOMAIN: 0000 assign_resources, bus 0 link: 0
1695 12:51:06.090077 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1696 12:51:06.099894 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1697 12:51:06.106635 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1698 12:51:06.116769 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1699 12:51:06.119987 PCI: 00:04.0 assign_resources, bus 1 link: 0
1700 12:51:06.123364 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1701 12:51:06.133181 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1702 12:51:06.143089 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1703 12:51:06.153154 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1704 12:51:06.156487 PCI: 00:06.0 assign_resources, bus 1 link: 0
1705 12:51:06.162991 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1706 12:51:06.173209 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1707 12:51:06.176311 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1708 12:51:06.186671 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1709 12:51:06.193358 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1710 12:51:06.196157 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1711 12:51:06.202998 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1712 12:51:06.209919 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1713 12:51:06.215995 PCI: 00:14.0 assign_resources, bus 0 link: 0
1714 12:51:06.219577 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1715 12:51:06.229688 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1716 12:51:06.235867 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1717 12:51:06.242578 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1718 12:51:06.249452 PCI: 00:14.3 assign_resources, bus 0 link: 0
1719 12:51:06.252388 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1720 12:51:06.262627 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1721 12:51:06.265664 PCI: 00:15.0 assign_resources, bus 0 link: 0
1722 12:51:06.272510 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1723 12:51:06.279383 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1724 12:51:06.282269 PCI: 00:15.1 assign_resources, bus 0 link: 0
1725 12:51:06.289237 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1726 12:51:06.295655 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1727 12:51:06.302568 PCI: 00:15.3 assign_resources, bus 0 link: 0
1728 12:51:06.305719 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1729 12:51:06.315473 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1730 12:51:06.322347 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1731 12:51:06.325713 PCI: 00:19.1 assign_resources, bus 0 link: 0
1732 12:51:06.331934 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1733 12:51:06.339254 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1734 12:51:06.345576 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1735 12:51:06.348966 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1736 12:51:06.352178 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1737 12:51:06.358780 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1738 12:51:06.361892 LPC: Trying to open IO window from 800 size 1ff
1739 12:51:06.371911 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1740 12:51:06.378778 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1741 12:51:06.388652 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1742 12:51:06.391705 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1743 12:51:06.398510 Root Device assign_resources, bus 0 link: 0 done
1744 12:51:06.399073 Done setting resources.
1745 12:51:06.405517 Show resources in subtree (Root Device)...After assigning values.
1746 12:51:06.411860 Root Device child on link 0 CPU_CLUSTER: 0
1747 12:51:06.415420 CPU_CLUSTER: 0 child on link 0 APIC: 00
1748 12:51:06.415936 APIC: 00
1749 12:51:06.418482 APIC: 12
1750 12:51:06.419041 APIC: 14
1751 12:51:06.419382 APIC: 16
1752 12:51:06.421823 APIC: 10
1753 12:51:06.422339 APIC: 01
1754 12:51:06.425203 APIC: 08
1755 12:51:06.425717 APIC: 09
1756 12:51:06.428536 DOMAIN: 0000 child on link 0 GPIO: 0
1757 12:51:06.438692 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1758 12:51:06.448653 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1759 12:51:06.449173 GPIO: 0
1760 12:51:06.451426 PCI: 00:00.0
1761 12:51:06.461771 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1762 12:51:06.468273 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1763 12:51:06.478318 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1764 12:51:06.488501 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1765 12:51:06.498290 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1766 12:51:06.507897 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1767 12:51:06.518308 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1768 12:51:06.524760 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1769 12:51:06.534710 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1770 12:51:06.544801 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1771 12:51:06.555010 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1772 12:51:06.564360 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1773 12:51:06.574538 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1774 12:51:06.581433 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1775 12:51:06.591236 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1776 12:51:06.601137 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1777 12:51:06.610945 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1778 12:51:06.621005 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1779 12:51:06.631093 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1780 12:51:06.640964 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1781 12:51:06.650742 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1782 12:51:06.657573 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1783 12:51:06.667314 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1784 12:51:06.677438 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1785 12:51:06.687360 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1786 12:51:06.697321 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1787 12:51:06.707086 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1788 12:51:06.717072 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1789 12:51:06.717596 PCI: 00:02.0
1790 12:51:06.727133 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1791 12:51:06.740477 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1792 12:51:06.747270 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1793 12:51:06.753854 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1794 12:51:06.763805 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1795 12:51:06.764342 GENERIC: 0.0
1796 12:51:06.769903 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1797 12:51:06.780157 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1798 12:51:06.790256 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1799 12:51:06.800250 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1800 12:51:06.803354 PCI: 01:00.0
1801 12:51:06.813261 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1802 12:51:06.823246 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1803 12:51:06.826959 PCI: 00:08.0
1804 12:51:06.827477 PCI: 00:0a.0
1805 12:51:06.836841 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1806 12:51:06.843093 PCI: 00:0d.0 child on link 0 USB0 port 0
1807 12:51:06.853277 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1808 12:51:06.856523 USB0 port 0 child on link 0 USB3 port 0
1809 12:51:06.859602 USB3 port 0
1810 12:51:06.860027 USB3 port 1
1811 12:51:06.863149 USB3 port 2
1812 12:51:06.863661 USB3 port 3
1813 12:51:06.866336 PCI: 00:14.0 child on link 0 USB0 port 0
1814 12:51:06.879545 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1815 12:51:06.883580 USB0 port 0 child on link 0 USB2 port 0
1816 12:51:06.884177 USB2 port 0
1817 12:51:06.886204 USB2 port 1
1818 12:51:06.886617 USB2 port 2
1819 12:51:06.890150 USB2 port 3
1820 12:51:06.893180 USB2 port 4
1821 12:51:06.893694 USB2 port 5
1822 12:51:06.896376 USB2 port 6
1823 12:51:06.896890 USB2 port 7
1824 12:51:06.899530 USB2 port 8
1825 12:51:06.899942 USB2 port 9
1826 12:51:06.903446 USB3 port 0
1827 12:51:06.904046 USB3 port 1
1828 12:51:06.906357 USB3 port 2
1829 12:51:06.906872 USB3 port 3
1830 12:51:06.909877 PCI: 00:14.2
1831 12:51:06.920079 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1832 12:51:06.929603 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1833 12:51:06.933127 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1834 12:51:06.943482 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1835 12:51:06.946596 GENERIC: 0.0
1836 12:51:06.949699 PCI: 00:15.0 child on link 0 I2C: 00:1a
1837 12:51:06.959437 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1838 12:51:06.963015 I2C: 00:1a
1839 12:51:06.963429 I2C: 00:31
1840 12:51:06.966373 I2C: 00:32
1841 12:51:06.969404 PCI: 00:15.1 child on link 0 I2C: 00:50
1842 12:51:06.979509 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1843 12:51:06.982863 I2C: 00:50
1844 12:51:06.983350 PCI: 00:15.2
1845 12:51:06.989032 PCI: 00:15.3 child on link 0 I2C: 00:10
1846 12:51:06.999380 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1847 12:51:06.999885 I2C: 00:10
1848 12:51:07.002674 PCI: 00:16.0
1849 12:51:07.013037 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1850 12:51:07.013562 PCI: 00:19.0
1851 12:51:07.019440 PCI: 00:19.1 child on link 0 I2C: 00:15
1852 12:51:07.029498 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1853 12:51:07.030025 I2C: 00:15
1854 12:51:07.033168 I2C: 00:2c
1855 12:51:07.033684 PCI: 00:1e.0
1856 12:51:07.042645 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1857 12:51:07.049015 PCI: 00:1e.3 child on link 0 SPI: 00
1858 12:51:07.059336 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1859 12:51:07.059855 SPI: 00
1860 12:51:07.063066 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1861 12:51:07.072322 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1862 12:51:07.075688 PNP: 0c09.0
1863 12:51:07.082278 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1864 12:51:07.089119 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1865 12:51:07.095698 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1866 12:51:07.105860 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1867 12:51:07.112543 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1868 12:51:07.113057 GENERIC: 0.0
1869 12:51:07.115829 GENERIC: 1.0
1870 12:51:07.116342 PCI: 00:1f.3
1871 12:51:07.125722 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1872 12:51:07.139158 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1873 12:51:07.139671 PCI: 00:1f.5
1874 12:51:07.148854 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1875 12:51:07.152280 Done allocating resources.
1876 12:51:07.159027 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1877 12:51:07.161873 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1878 12:51:07.169086 Configure audio over I2S with MAX98373 NAU88L25B.
1879 12:51:07.173253 Enabling BT offload
1880 12:51:07.180059 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1881 12:51:07.183727 Enabling resources...
1882 12:51:07.186991 PCI: 00:00.0 subsystem <- 8086/4609
1883 12:51:07.190425 PCI: 00:00.0 cmd <- 06
1884 12:51:07.193995 PCI: 00:02.0 subsystem <- 8086/46b3
1885 12:51:07.197277 PCI: 00:02.0 cmd <- 03
1886 12:51:07.200105 PCI: 00:04.0 subsystem <- 8086/461d
1887 12:51:07.200523 PCI: 00:04.0 cmd <- 02
1888 12:51:07.203777 PCI: 00:06.0 bridge ctrl <- 0013
1889 12:51:07.207008 PCI: 00:06.0 subsystem <- 8086/464d
1890 12:51:07.210502 PCI: 00:06.0 cmd <- 106
1891 12:51:07.213496 PCI: 00:0a.0 subsystem <- 8086/467d
1892 12:51:07.217028 PCI: 00:0a.0 cmd <- 02
1893 12:51:07.220358 PCI: 00:0d.0 subsystem <- 8086/461e
1894 12:51:07.223879 PCI: 00:0d.0 cmd <- 02
1895 12:51:07.227028 PCI: 00:14.0 subsystem <- 8086/51ed
1896 12:51:07.230557 PCI: 00:14.0 cmd <- 02
1897 12:51:07.233672 PCI: 00:14.2 subsystem <- 8086/51ef
1898 12:51:07.234186 PCI: 00:14.2 cmd <- 02
1899 12:51:07.237202 PCI: 00:14.3 subsystem <- 8086/51f0
1900 12:51:07.240266 PCI: 00:14.3 cmd <- 02
1901 12:51:07.243813 PCI: 00:15.0 subsystem <- 8086/51e8
1902 12:51:07.247239 PCI: 00:15.0 cmd <- 02
1903 12:51:07.250863 PCI: 00:15.1 subsystem <- 8086/51e9
1904 12:51:07.253948 PCI: 00:15.1 cmd <- 06
1905 12:51:07.256995 PCI: 00:15.3 subsystem <- 8086/51eb
1906 12:51:07.260616 PCI: 00:15.3 cmd <- 02
1907 12:51:07.263823 PCI: 00:16.0 subsystem <- 8086/51e0
1908 12:51:07.264338 PCI: 00:16.0 cmd <- 02
1909 12:51:07.267057 PCI: 00:19.1 subsystem <- 8086/51c6
1910 12:51:07.270071 PCI: 00:19.1 cmd <- 02
1911 12:51:07.273838 PCI: 00:1e.0 subsystem <- 8086/51a8
1912 12:51:07.277241 PCI: 00:1e.0 cmd <- 06
1913 12:51:07.280596 PCI: 00:1e.3 subsystem <- 8086/51ab
1914 12:51:07.283834 PCI: 00:1e.3 cmd <- 02
1915 12:51:07.286976 PCI: 00:1f.0 subsystem <- 8086/5182
1916 12:51:07.290611 PCI: 00:1f.0 cmd <- 407
1917 12:51:07.294019 PCI: 00:1f.3 subsystem <- 8086/51c8
1918 12:51:07.294536 PCI: 00:1f.3 cmd <- 02
1919 12:51:07.296978 PCI: 00:1f.5 subsystem <- 8086/51a4
1920 12:51:07.300770 PCI: 00:1f.5 cmd <- 406
1921 12:51:07.303512 PCI: 01:00.0 cmd <- 02
1922 12:51:07.304019 done.
1923 12:51:07.310227 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1924 12:51:07.313453 ME: Version: Unavailable
1925 12:51:07.316726 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1926 12:51:07.320322 Initializing devices...
1927 12:51:07.320846 Root Device init
1928 12:51:07.323340 mainboard: EC init
1929 12:51:07.326981 Chrome EC: Set SMI mask to 0x0000000000000000
1930 12:51:07.330754 Chrome EC: UHEPI supported
1931 12:51:07.338460 Chrome EC: clear events_b mask to 0x0000000000000000
1932 12:51:07.344966 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1933 12:51:07.351583 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1934 12:51:07.358489 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1935 12:51:07.364871 Chrome EC: Set WAKE mask to 0x0000000000000000
1936 12:51:07.367897 Root Device init finished in 42 msecs
1937 12:51:07.371457 PCI: 00:00.0 init
1938 12:51:07.374832 CPU TDP = 15 Watts
1939 12:51:07.375414 CPU PL1 = 15 Watts
1940 12:51:07.378257 CPU PL2 = 55 Watts
1941 12:51:07.381010 CPU PL4 = 123 Watts
1942 12:51:07.384726 PCI: 00:00.0 init finished in 8 msecs
1943 12:51:07.385305 PCI: 00:02.0 init
1944 12:51:07.388151 GMA: Found VBT in CBFS
1945 12:51:07.391360 GMA: Found valid VBT in CBFS
1946 12:51:07.398326 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1947 12:51:07.404376 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1948 12:51:07.407890 PCI: 00:02.0 init finished in 18 msecs
1949 12:51:07.411463 PCI: 00:06.0 init
1950 12:51:07.411999 Initializing PCH PCIe bridge.
1951 12:51:07.418047 PCI: 00:06.0 init finished in 3 msecs
1952 12:51:07.418566 PCI: 00:0a.0 init
1953 12:51:07.421266 PCI: 00:0a.0 init finished in 0 msecs
1954 12:51:07.424445 PCI: 00:14.0 init
1955 12:51:07.427619 PCI: 00:14.0 init finished in 0 msecs
1956 12:51:07.431291 PCI: 00:14.2 init
1957 12:51:07.434450 PCI: 00:14.2 init finished in 0 msecs
1958 12:51:07.435019 PCI: 00:15.0 init
1959 12:51:07.438271 I2C bus 0 version 0x3230302a
1960 12:51:07.441026 DW I2C bus 0 at 0x80655000 (400 KHz)
1961 12:51:07.444771 PCI: 00:15.0 init finished in 6 msecs
1962 12:51:07.447811 PCI: 00:15.1 init
1963 12:51:07.451301 I2C bus 1 version 0x3230302a
1964 12:51:07.454883 DW I2C bus 1 at 0x80656000 (400 KHz)
1965 12:51:07.458148 PCI: 00:15.1 init finished in 6 msecs
1966 12:51:07.461507 PCI: 00:15.3 init
1967 12:51:07.464518 I2C bus 3 version 0x3230302a
1968 12:51:07.467852 DW I2C bus 3 at 0x80657000 (400 KHz)
1969 12:51:07.471304 PCI: 00:15.3 init finished in 6 msecs
1970 12:51:07.471861 PCI: 00:16.0 init
1971 12:51:07.477759 PCI: 00:16.0 init finished in 0 msecs
1972 12:51:07.478283 PCI: 00:19.1 init
1973 12:51:07.481528 I2C bus 5 version 0x3230302a
1974 12:51:07.484214 DW I2C bus 5 at 0x80659000 (400 KHz)
1975 12:51:07.487609 PCI: 00:19.1 init finished in 6 msecs
1976 12:51:07.491309 PCI: 00:1f.0 init
1977 12:51:07.494281 IOAPIC: Initializing IOAPIC at 0xfec00000
1978 12:51:07.498093 IOAPIC: ID = 0x02
1979 12:51:07.501011 IOAPIC: Dumping registers
1980 12:51:07.501533 reg 0x0000: 0x02000000
1981 12:51:07.504465 reg 0x0001: 0x00770020
1982 12:51:07.507915 reg 0x0002: 0x00000000
1983 12:51:07.511478 IOAPIC: 120 interrupts
1984 12:51:07.514574 IOAPIC: Clearing IOAPIC at 0xfec00000
1985 12:51:07.517743 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1986 12:51:07.524369 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1987 12:51:07.527633 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1988 12:51:07.531158 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1989 12:51:07.537373 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1990 12:51:07.540783 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1991 12:51:07.547490 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1992 12:51:07.551079 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1993 12:51:07.557607 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1994 12:51:07.560871 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1995 12:51:07.567638 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1996 12:51:07.571296 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1997 12:51:07.574503 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1998 12:51:07.580970 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1999 12:51:07.583881 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2000 12:51:07.591061 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2001 12:51:07.594269 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2002 12:51:07.601023 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2003 12:51:07.603876 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2004 12:51:07.607469 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2005 12:51:07.614005 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2006 12:51:07.617060 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2007 12:51:07.623926 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2008 12:51:07.627910 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2009 12:51:07.634017 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2010 12:51:07.637224 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2011 12:51:07.644136 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2012 12:51:07.647351 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2013 12:51:07.650839 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2014 12:51:07.657242 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2015 12:51:07.660685 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2016 12:51:07.667134 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2017 12:51:07.670618 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2018 12:51:07.677037 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2019 12:51:07.680746 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2020 12:51:07.687220 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2021 12:51:07.690664 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2022 12:51:07.693977 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2023 12:51:07.700547 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2024 12:51:07.704220 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2025 12:51:07.710854 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2026 12:51:07.714303 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2027 12:51:07.720814 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2028 12:51:07.723922 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2029 12:51:07.730621 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2030 12:51:07.733887 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2031 12:51:07.737323 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2032 12:51:07.743563 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2033 12:51:07.747154 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2034 12:51:07.753932 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2035 12:51:07.757051 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2036 12:51:07.763834 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2037 12:51:07.767146 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2038 12:51:07.773352 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2039 12:51:07.776403 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2040 12:51:07.780032 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2041 12:51:07.786715 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2042 12:51:07.790298 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2043 12:51:07.796871 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2044 12:51:07.799886 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2045 12:51:07.806640 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2046 12:51:07.810094 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2047 12:51:07.816882 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2048 12:51:07.819874 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2049 12:51:07.823539 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2050 12:51:07.830035 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2051 12:51:07.833261 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2052 12:51:07.839705 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2053 12:51:07.843101 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2054 12:51:07.850108 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2055 12:51:07.853371 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2056 12:51:07.860062 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2057 12:51:07.863120 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2058 12:51:07.866850 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2059 12:51:07.873392 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2060 12:51:07.876719 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2061 12:51:07.883057 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2062 12:51:07.886414 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2063 12:51:07.893250 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2064 12:51:07.896026 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2065 12:51:07.899680 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2066 12:51:07.906251 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2067 12:51:07.909752 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2068 12:51:07.916462 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2069 12:51:07.919295 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2070 12:51:07.926256 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2071 12:51:07.929855 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2072 12:51:07.936159 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2073 12:51:07.939811 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2074 12:51:07.942851 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2075 12:51:07.949910 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2076 12:51:07.952833 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2077 12:51:07.959293 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2078 12:51:07.963109 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2079 12:51:07.969053 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2080 12:51:07.972911 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2081 12:51:07.979439 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2082 12:51:07.983142 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2083 12:51:07.985728 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2084 12:51:07.992949 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2085 12:51:07.996007 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2086 12:51:08.002683 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2087 12:51:08.006199 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2088 12:51:08.013152 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2089 12:51:08.015674 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2090 12:51:08.022741 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2091 12:51:08.025965 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2092 12:51:08.029595 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2093 12:51:08.036232 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2094 12:51:08.039472 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2095 12:51:08.046180 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2096 12:51:08.049578 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2097 12:51:08.055858 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2098 12:51:08.059590 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2099 12:51:08.062590 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2100 12:51:08.069577 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2101 12:51:08.072707 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2102 12:51:08.078965 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2103 12:51:08.082576 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2104 12:51:08.089277 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2105 12:51:08.092598 IOAPIC: Bootstrap Processor Local APIC = 0x00
2106 12:51:08.099315 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2107 12:51:08.102616 PCI: 00:1f.0 init finished in 607 msecs
2108 12:51:08.103189 PCI: 00:1f.2 init
2109 12:51:08.105794 apm_control: Disabling ACPI.
2110 12:51:08.110874 APMC done.
2111 12:51:08.113796 PCI: 00:1f.2 init finished in 6 msecs
2112 12:51:08.117200 PCI: 00:1f.3 init
2113 12:51:08.120626 PCI: 00:1f.3 init finished in 0 msecs
2114 12:51:08.121145 PCI: 01:00.0 init
2115 12:51:08.124146 PCI: 01:00.0 init finished in 0 msecs
2116 12:51:08.127272 PNP: 0c09.0 init
2117 12:51:08.130791 Google Chrome EC uptime: 12.083 seconds
2118 12:51:08.137158 Google Chrome AP resets since EC boot: 1
2119 12:51:08.140700 Google Chrome most recent AP reset causes:
2120 12:51:08.144124 0.341: 32775 shutdown: entering G3
2121 12:51:08.150826 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2122 12:51:08.154043 PNP: 0c09.0 init finished in 23 msecs
2123 12:51:08.157341 GENERIC: 0.0 init
2124 12:51:08.160465 GENERIC: 0.0 init finished in 0 msecs
2125 12:51:08.160983 GENERIC: 1.0 init
2126 12:51:08.164018 GENERIC: 1.0 init finished in 0 msecs
2127 12:51:08.167174 Devices initialized
2128 12:51:08.170821 Show all devs... After init.
2129 12:51:08.173728 Root Device: enabled 1
2130 12:51:08.177289 CPU_CLUSTER: 0: enabled 1
2131 12:51:08.177803 DOMAIN: 0000: enabled 1
2132 12:51:08.180188 GPIO: 0: enabled 1
2133 12:51:08.183551 PCI: 00:00.0: enabled 1
2134 12:51:08.183964 PCI: 00:01.0: enabled 0
2135 12:51:08.186729 PCI: 00:01.1: enabled 0
2136 12:51:08.190421 PCI: 00:02.0: enabled 1
2137 12:51:08.193861 PCI: 00:04.0: enabled 1
2138 12:51:08.194379 PCI: 00:05.0: enabled 0
2139 12:51:08.197052 PCI: 00:06.0: enabled 1
2140 12:51:08.200365 PCI: 00:06.2: enabled 0
2141 12:51:08.200883 PCI: 00:07.0: enabled 0
2142 12:51:08.203490 PCI: 00:07.1: enabled 0
2143 12:51:08.206893 PCI: 00:07.2: enabled 0
2144 12:51:08.210040 PCI: 00:07.3: enabled 0
2145 12:51:08.210558 PCI: 00:08.0: enabled 0
2146 12:51:08.213547 PCI: 00:09.0: enabled 0
2147 12:51:08.216864 PCI: 00:0a.0: enabled 1
2148 12:51:08.220118 PCI: 00:0d.0: enabled 1
2149 12:51:08.220636 PCI: 00:0d.1: enabled 0
2150 12:51:08.223587 PCI: 00:0d.2: enabled 0
2151 12:51:08.227015 PCI: 00:0d.3: enabled 0
2152 12:51:08.230433 PCI: 00:0e.0: enabled 0
2153 12:51:08.231003 PCI: 00:10.0: enabled 0
2154 12:51:08.233658 PCI: 00:10.1: enabled 0
2155 12:51:08.236832 PCI: 00:10.6: enabled 0
2156 12:51:08.239760 PCI: 00:10.7: enabled 0
2157 12:51:08.240284 PCI: 00:12.0: enabled 0
2158 12:51:08.243431 PCI: 00:12.6: enabled 0
2159 12:51:08.246454 PCI: 00:12.7: enabled 0
2160 12:51:08.247024 PCI: 00:13.0: enabled 0
2161 12:51:08.250232 PCI: 00:14.0: enabled 1
2162 12:51:08.253396 PCI: 00:14.1: enabled 0
2163 12:51:08.257237 PCI: 00:14.2: enabled 1
2164 12:51:08.257760 PCI: 00:14.3: enabled 1
2165 12:51:08.260114 PCI: 00:15.0: enabled 1
2166 12:51:08.263239 PCI: 00:15.1: enabled 1
2167 12:51:08.266783 PCI: 00:15.2: enabled 0
2168 12:51:08.267343 PCI: 00:15.3: enabled 1
2169 12:51:08.270058 PCI: 00:16.0: enabled 1
2170 12:51:08.272886 PCI: 00:16.1: enabled 0
2171 12:51:08.276203 PCI: 00:16.2: enabled 0
2172 12:51:08.276633 PCI: 00:16.3: enabled 0
2173 12:51:08.279654 PCI: 00:16.4: enabled 0
2174 12:51:08.283170 PCI: 00:16.5: enabled 0
2175 12:51:08.286452 PCI: 00:17.0: enabled 0
2176 12:51:08.286964 PCI: 00:19.0: enabled 0
2177 12:51:08.289504 PCI: 00:19.1: enabled 1
2178 12:51:08.293074 PCI: 00:19.2: enabled 0
2179 12:51:08.296340 PCI: 00:1a.0: enabled 0
2180 12:51:08.296751 PCI: 00:1c.0: enabled 0
2181 12:51:08.299547 PCI: 00:1c.1: enabled 0
2182 12:51:08.302606 PCI: 00:1c.2: enabled 0
2183 12:51:08.303064 PCI: 00:1c.3: enabled 0
2184 12:51:08.306210 PCI: 00:1c.4: enabled 0
2185 12:51:08.309468 PCI: 00:1c.5: enabled 0
2186 12:51:08.312703 PCI: 00:1c.6: enabled 0
2187 12:51:08.313123 PCI: 00:1c.7: enabled 0
2188 12:51:08.316008 PCI: 00:1d.0: enabled 0
2189 12:51:08.319465 PCI: 00:1d.1: enabled 0
2190 12:51:08.323272 PCI: 00:1d.2: enabled 0
2191 12:51:08.323785 PCI: 00:1d.3: enabled 0
2192 12:51:08.326332 PCI: 00:1e.0: enabled 1
2193 12:51:08.329520 PCI: 00:1e.1: enabled 0
2194 12:51:08.332772 PCI: 00:1e.2: enabled 0
2195 12:51:08.333283 PCI: 00:1e.3: enabled 1
2196 12:51:08.336431 PCI: 00:1f.0: enabled 1
2197 12:51:08.339546 PCI: 00:1f.1: enabled 0
2198 12:51:08.342645 PCI: 00:1f.2: enabled 1
2199 12:51:08.343216 PCI: 00:1f.3: enabled 1
2200 12:51:08.346208 PCI: 00:1f.4: enabled 0
2201 12:51:08.349342 PCI: 00:1f.5: enabled 1
2202 12:51:08.349854 PCI: 00:1f.6: enabled 0
2203 12:51:08.353035 PCI: 00:1f.7: enabled 0
2204 12:51:08.355774 GENERIC: 0.0: enabled 1
2205 12:51:08.359319 GENERIC: 0.0: enabled 1
2206 12:51:08.359883 GENERIC: 1.0: enabled 1
2207 12:51:08.362518 GENERIC: 0.0: enabled 1
2208 12:51:08.366110 GENERIC: 1.0: enabled 1
2209 12:51:08.369217 USB0 port 0: enabled 1
2210 12:51:08.369728 USB0 port 0: enabled 1
2211 12:51:08.372552 GENERIC: 0.0: enabled 1
2212 12:51:08.375919 I2C: 00:1a: enabled 1
2213 12:51:08.376603 I2C: 00:31: enabled 1
2214 12:51:08.379043 I2C: 00:32: enabled 1
2215 12:51:08.382236 I2C: 00:50: enabled 1
2216 12:51:08.382644 I2C: 00:10: enabled 1
2217 12:51:08.386210 I2C: 00:15: enabled 1
2218 12:51:08.388987 I2C: 00:2c: enabled 1
2219 12:51:08.389402 GENERIC: 0.0: enabled 1
2220 12:51:08.392877 SPI: 00: enabled 1
2221 12:51:08.395879 PNP: 0c09.0: enabled 1
2222 12:51:08.399512 GENERIC: 0.0: enabled 1
2223 12:51:08.400026 USB3 port 0: enabled 1
2224 12:51:08.402826 USB3 port 1: enabled 0
2225 12:51:08.406187 USB3 port 2: enabled 1
2226 12:51:08.406697 USB3 port 3: enabled 0
2227 12:51:08.409368 USB2 port 0: enabled 1
2228 12:51:08.412548 USB2 port 1: enabled 0
2229 12:51:08.413024 USB2 port 2: enabled 1
2230 12:51:08.415874 USB2 port 3: enabled 0
2231 12:51:08.418970 USB2 port 4: enabled 0
2232 12:51:08.422743 USB2 port 5: enabled 1
2233 12:51:08.423313 USB2 port 6: enabled 0
2234 12:51:08.425950 USB2 port 7: enabled 0
2235 12:51:08.429418 USB2 port 8: enabled 1
2236 12:51:08.429927 USB2 port 9: enabled 1
2237 12:51:08.432771 USB3 port 0: enabled 1
2238 12:51:08.435896 USB3 port 1: enabled 0
2239 12:51:08.439100 USB3 port 2: enabled 0
2240 12:51:08.439688 USB3 port 3: enabled 0
2241 12:51:08.442600 GENERIC: 0.0: enabled 1
2242 12:51:08.445660 GENERIC: 1.0: enabled 1
2243 12:51:08.446170 APIC: 00: enabled 1
2244 12:51:08.448953 APIC: 12: enabled 1
2245 12:51:08.452471 APIC: 14: enabled 1
2246 12:51:08.452985 APIC: 16: enabled 1
2247 12:51:08.455367 APIC: 10: enabled 1
2248 12:51:08.455779 APIC: 01: enabled 1
2249 12:51:08.459245 APIC: 08: enabled 1
2250 12:51:08.462227 APIC: 09: enabled 1
2251 12:51:08.462740 PCI: 01:00.0: enabled 1
2252 12:51:08.469004 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2253 12:51:08.475639 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2254 12:51:08.478571 ELOG: NV offset 0xf20000 size 0x4000
2255 12:51:08.485470 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2256 12:51:08.491974 ELOG: Event(17) added with size 13 at 2023-09-19 12:51:08 UTC
2257 12:51:08.499051 ELOG: Event(9E) added with size 10 at 2023-09-19 12:51:08 UTC
2258 12:51:08.505283 ELOG: Event(9F) added with size 14 at 2023-09-19 12:51:09 UTC
2259 12:51:08.511833 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2260 12:51:08.518491 ELOG: Event(A0) added with size 9 at 2023-09-19 12:51:09 UTC
2261 12:51:08.521669 elog_add_boot_reason: Logged dev mode boot
2262 12:51:08.528761 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2263 12:51:08.529284 Finalize devices...
2264 12:51:08.531591 PCI: 00:16.0 final
2265 12:51:08.532007 PCI: 00:1f.2 final
2266 12:51:08.535207 GENERIC: 0.0 final
2267 12:51:08.541922 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2268 12:51:08.545485 GENERIC: 1.0 final
2269 12:51:08.548308 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2270 12:51:08.551731 Devices finalized
2271 12:51:08.558388 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2272 12:51:08.561762 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2273 12:51:08.567943 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2274 12:51:08.571590 ME: HFSTS1 : 0x90000245
2275 12:51:08.578253 ME: HFSTS2 : 0x82100116
2276 12:51:08.581535 ME: HFSTS3 : 0x00000050
2277 12:51:08.584842 ME: HFSTS4 : 0x00004000
2278 12:51:08.591908 ME: HFSTS5 : 0x00000000
2279 12:51:08.594655 ME: HFSTS6 : 0x40600006
2280 12:51:08.597998 ME: Manufacturing Mode : NO
2281 12:51:08.601337 ME: SPI Protection Mode Enabled : YES
2282 12:51:08.608119 ME: FPFs Committed : YES
2283 12:51:08.610870 ME: Manufacturing Vars Locked : YES
2284 12:51:08.614631 ME: FW Partition Table : OK
2285 12:51:08.618154 ME: Bringup Loader Failure : NO
2286 12:51:08.621193 ME: Firmware Init Complete : YES
2287 12:51:08.624397 ME: Boot Options Present : NO
2288 12:51:08.628115 ME: Update In Progress : NO
2289 12:51:08.631039 ME: D0i3 Support : YES
2290 12:51:08.637694 ME: Low Power State Enabled : NO
2291 12:51:08.641250 ME: CPU Replaced : YES
2292 12:51:08.644327 ME: CPU Replacement Valid : YES
2293 12:51:08.648027 ME: Current Working State : 5
2294 12:51:08.651144 ME: Current Operation State : 1
2295 12:51:08.654584 ME: Current Operation Mode : 0
2296 12:51:08.657889 ME: Error Code : 0
2297 12:51:08.660752 ME: Enhanced Debug Mode : NO
2298 12:51:08.664497 ME: CPU Debug Disabled : YES
2299 12:51:08.671443 ME: TXT Support : NO
2300 12:51:08.674821 ME: WP for RO is enabled : YES
2301 12:51:08.677788 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2302 12:51:08.684717 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2303 12:51:08.687604 Ramoops buffer: 0x100000@0x76899000.
2304 12:51:08.694576 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2305 12:51:08.701286 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2306 12:51:08.704862 CBFS: 'fallback/slic' not found.
2307 12:51:08.711238 ACPI: Writing ACPI tables at 7686d000.
2308 12:51:08.711778 ACPI: * FACS
2309 12:51:08.714751 ACPI: * DSDT
2310 12:51:08.721271 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2311 12:51:08.724478 ACPI: * FADT
2312 12:51:08.725016 SCI is IRQ9
2313 12:51:08.727759 ACPI: added table 1/32, length now 40
2314 12:51:08.731479 ACPI: * SSDT
2315 12:51:08.734700 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2316 12:51:08.741602 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2317 12:51:08.744815 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2318 12:51:08.748183 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2319 12:51:08.754730 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2320 12:51:08.761643 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2321 12:51:08.767852 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2322 12:51:08.771339 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2323 12:51:08.778024 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2324 12:51:08.781388 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2325 12:51:08.787893 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2326 12:51:08.791867 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2327 12:51:08.798056 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2328 12:51:08.801309 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2329 12:51:08.808462 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2330 12:51:08.811616 PS2K: Passing 80 keymaps to kernel
2331 12:51:08.818457 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2332 12:51:08.825308 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2333 12:51:08.831709 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2334 12:51:08.838449 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2335 12:51:08.844995 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2336 12:51:08.851431 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2337 12:51:08.855049 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2338 12:51:08.861634 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2339 12:51:08.868206 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2340 12:51:08.874978 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2341 12:51:08.878133 ACPI: added table 2/32, length now 44
2342 12:51:08.881341 ACPI: * MCFG
2343 12:51:08.884598 ACPI: added table 3/32, length now 48
2344 12:51:08.885037 ACPI: * TPM2
2345 12:51:08.887884 TPM2 log created at 0x7685d000
2346 12:51:08.891311 ACPI: added table 4/32, length now 52
2347 12:51:08.894963 ACPI: * LPIT
2348 12:51:08.898143 ACPI: added table 5/32, length now 56
2349 12:51:08.901267 ACPI: * MADT
2350 12:51:08.901802 SCI is IRQ9
2351 12:51:08.904765 ACPI: added table 6/32, length now 60
2352 12:51:08.908217 cmd_reg from pmc_make_ipc_cmd 1052838
2353 12:51:08.915116 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2354 12:51:08.920990 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2355 12:51:08.927479 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2356 12:51:08.931300 PMC CrashLog size in discovery mode: 0xC00
2357 12:51:08.934488 cpu crashlog bar addr: 0x80640000
2358 12:51:08.938006 cpu discovery table offset: 0x6030
2359 12:51:08.944831 cpu_crashlog_discovery_table buffer count: 0x3
2360 12:51:08.951243 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2361 12:51:08.957996 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2362 12:51:08.964880 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2363 12:51:08.968038 PMC crashLog size in discovery mode : 0xC00
2364 12:51:08.974278 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2365 12:51:08.980572 discover mode PMC crashlog size adjusted to: 0x200
2366 12:51:08.987458 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2367 12:51:08.990720 discover mode PMC crashlog size adjusted to: 0x0
2368 12:51:08.993702 m_cpu_crashLog_size : 0x3480 bytes
2369 12:51:08.997386 CPU crashLog present.
2370 12:51:09.000830 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2371 12:51:09.010758 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2372 12:51:09.011348 current = 76876550
2373 12:51:09.014283 ACPI: * DMAR
2374 12:51:09.017528 ACPI: added table 7/32, length now 64
2375 12:51:09.020382 ACPI: added table 8/32, length now 68
2376 12:51:09.020821 ACPI: * HPET
2377 12:51:09.027258 ACPI: added table 9/32, length now 72
2378 12:51:09.027808 ACPI: done.
2379 12:51:09.030311 ACPI tables: 38528 bytes.
2380 12:51:09.034061 smbios_write_tables: 76857000
2381 12:51:09.037099 EC returned error result code 3
2382 12:51:09.040839 Couldn't obtain OEM name from CBI
2383 12:51:09.043804 Create SMBIOS type 16
2384 12:51:09.047308 Create SMBIOS type 17
2385 12:51:09.047851 Create SMBIOS type 20
2386 12:51:09.050675 GENERIC: 0.0 (WIFI Device)
2387 12:51:09.054109 SMBIOS tables: 2156 bytes.
2388 12:51:09.057316 Writing table forward entry at 0x00000500
2389 12:51:09.063948 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2390 12:51:09.066940 Writing coreboot table at 0x76891000
2391 12:51:09.073881 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2392 12:51:09.077382 1. 0000000000001000-000000000009ffff: RAM
2393 12:51:09.084140 2. 00000000000a0000-00000000000fffff: RESERVED
2394 12:51:09.087243 3. 0000000000100000-0000000076856fff: RAM
2395 12:51:09.094160 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2396 12:51:09.097282 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2397 12:51:09.103681 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2398 12:51:09.110495 7. 0000000077000000-00000000803fffff: RESERVED
2399 12:51:09.113701 8. 00000000c0000000-00000000cfffffff: RESERVED
2400 12:51:09.120642 9. 00000000f8000000-00000000f9ffffff: RESERVED
2401 12:51:09.123718 10. 00000000fb000000-00000000fb000fff: RESERVED
2402 12:51:09.127339 11. 00000000fc800000-00000000fe7fffff: RESERVED
2403 12:51:09.134012 12. 00000000feb00000-00000000feb7ffff: RESERVED
2404 12:51:09.136693 13. 00000000fec00000-00000000fecfffff: RESERVED
2405 12:51:09.143453 14. 00000000fed40000-00000000fed6ffff: RESERVED
2406 12:51:09.146575 15. 00000000fed80000-00000000fed87fff: RESERVED
2407 12:51:09.153685 16. 00000000fed90000-00000000fed92fff: RESERVED
2408 12:51:09.156850 17. 00000000feda0000-00000000feda1fff: RESERVED
2409 12:51:09.163574 18. 00000000fedc0000-00000000feddffff: RESERVED
2410 12:51:09.166880 19. 0000000100000000-000000027fbfffff: RAM
2411 12:51:09.170136 Passing 4 GPIOs to payload:
2412 12:51:09.173688 NAME | PORT | POLARITY | VALUE
2413 12:51:09.179934 lid | undefined | high | high
2414 12:51:09.183161 power | undefined | high | low
2415 12:51:09.189760 oprom | undefined | high | low
2416 12:51:09.196745 EC in RW | 0x00000151 | high | high
2417 12:51:09.197319 Board ID: 3
2418 12:51:09.199440 FW config: 0x131
2419 12:51:09.202973 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 9521
2420 12:51:09.206493 coreboot table: 1788 bytes.
2421 12:51:09.209560 IMD ROOT 0. 0x76fff000 0x00001000
2422 12:51:09.216956 IMD SMALL 1. 0x76ffe000 0x00001000
2423 12:51:09.219931 FSP MEMORY 2. 0x76afe000 0x00500000
2424 12:51:09.223208 CONSOLE 3. 0x76ade000 0x00020000
2425 12:51:09.226774 RW MCACHE 4. 0x76add000 0x0000043c
2426 12:51:09.229857 RO MCACHE 5. 0x76adc000 0x00000fd8
2427 12:51:09.233114 FMAP 6. 0x76adb000 0x0000064a
2428 12:51:09.236384 TIME STAMP 7. 0x76ada000 0x00000910
2429 12:51:09.239930 VBOOT WORK 8. 0x76ac6000 0x00014000
2430 12:51:09.246484 MEM INFO 9. 0x76ac5000 0x000003b8
2431 12:51:09.249975 ROMSTG STCK10. 0x76ac4000 0x00001000
2432 12:51:09.253120 AFTER CAR 11. 0x76ab8000 0x0000c000
2433 12:51:09.256328 RAMSTAGE 12. 0x76a2e000 0x0008a000
2434 12:51:09.259891 ACPI BERT 13. 0x76a1e000 0x00010000
2435 12:51:09.262982 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2436 12:51:09.266553 REFCODE 15. 0x769ae000 0x0006f000
2437 12:51:09.270109 SMM BACKUP 16. 0x7699e000 0x00010000
2438 12:51:09.276725 IGD OPREGION17. 0x76999000 0x00004203
2439 12:51:09.279892 RAMOOPS 18. 0x76899000 0x00100000
2440 12:51:09.283096 COREBOOT 19. 0x76891000 0x00008000
2441 12:51:09.286431 ACPI 20. 0x7686d000 0x00024000
2442 12:51:09.289529 TPM2 TCGLOG21. 0x7685d000 0x00010000
2443 12:51:09.292783 PMC CRASHLOG22. 0x7685c000 0x00000c00
2444 12:51:09.296565 CPU CRASHLOG23. 0x76858000 0x00003480
2445 12:51:09.299592 SMBIOS 24. 0x76857000 0x00001000
2446 12:51:09.302832 IMD small region:
2447 12:51:09.306362 IMD ROOT 0. 0x76ffec00 0x00000400
2448 12:51:09.309465 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2449 12:51:09.316956 VPD 2. 0x76ffeb60 0x0000006c
2450 12:51:09.319425 POWER STATE 3. 0x76ffeb00 0x00000044
2451 12:51:09.323078 ROMSTAGE 4. 0x76ffeae0 0x00000004
2452 12:51:09.326837 ACPI GNVS 5. 0x76ffea80 0x00000048
2453 12:51:09.329906 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2454 12:51:09.336609 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2455 12:51:09.339660 MTRR: Physical address space:
2456 12:51:09.346460 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2457 12:51:09.353037 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2458 12:51:09.359713 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2459 12:51:09.363330 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2460 12:51:09.369423 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2461 12:51:09.376354 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2462 12:51:09.382651 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2463 12:51:09.386407 MTRR: Fixed MSR 0x250 0x0606060606060606
2464 12:51:09.392910 MTRR: Fixed MSR 0x258 0x0606060606060606
2465 12:51:09.396354 MTRR: Fixed MSR 0x259 0x0000000000000000
2466 12:51:09.399403 MTRR: Fixed MSR 0x268 0x0606060606060606
2467 12:51:09.402633 MTRR: Fixed MSR 0x269 0x0606060606060606
2468 12:51:09.409350 MTRR: Fixed MSR 0x26a 0x0606060606060606
2469 12:51:09.412782 MTRR: Fixed MSR 0x26b 0x0606060606060606
2470 12:51:09.415784 MTRR: Fixed MSR 0x26c 0x0606060606060606
2471 12:51:09.419025 MTRR: Fixed MSR 0x26d 0x0606060606060606
2472 12:51:09.422776 MTRR: Fixed MSR 0x26e 0x0606060606060606
2473 12:51:09.429442 MTRR: Fixed MSR 0x26f 0x0606060606060606
2474 12:51:09.432972 call enable_fixed_mtrr()
2475 12:51:09.435867 CPU physical address size: 39 bits
2476 12:51:09.439439 MTRR: default type WB/UC MTRR counts: 6/6.
2477 12:51:09.442983 MTRR: UC selected as default type.
2478 12:51:09.449629 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2479 12:51:09.455905 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2480 12:51:09.462629 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2481 12:51:09.469561 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2482 12:51:09.475993 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2483 12:51:09.482458 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2484 12:51:09.486837 MTRR: Fixed MSR 0x250 0x0606060606060606
2485 12:51:09.489263 MTRR: Fixed MSR 0x258 0x0606060606060606
2486 12:51:09.495449 MTRR: Fixed MSR 0x259 0x0000000000000000
2487 12:51:09.499314 MTRR: Fixed MSR 0x268 0x0606060606060606
2488 12:51:09.502860 MTRR: Fixed MSR 0x269 0x0606060606060606
2489 12:51:09.505966 MTRR: Fixed MSR 0x26a 0x0606060606060606
2490 12:51:09.512363 MTRR: Fixed MSR 0x26b 0x0606060606060606
2491 12:51:09.515811 MTRR: Fixed MSR 0x26c 0x0606060606060606
2492 12:51:09.519405 MTRR: Fixed MSR 0x26d 0x0606060606060606
2493 12:51:09.522393 MTRR: Fixed MSR 0x26e 0x0606060606060606
2494 12:51:09.529044 MTRR: Fixed MSR 0x26f 0x0606060606060606
2495 12:51:09.532347 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 12:51:09.535588 MTRR: Fixed MSR 0x250 0x0606060606060606
2497 12:51:09.538972 MTRR: Fixed MSR 0x250 0x0606060606060606
2498 12:51:09.545532 MTRR: Fixed MSR 0x250 0x0606060606060606
2499 12:51:09.548960 MTRR: Fixed MSR 0x258 0x0606060606060606
2500 12:51:09.552166 MTRR: Fixed MSR 0x259 0x0000000000000000
2501 12:51:09.555352 MTRR: Fixed MSR 0x268 0x0606060606060606
2502 12:51:09.558365 MTRR: Fixed MSR 0x269 0x0606060606060606
2503 12:51:09.565269 MTRR: Fixed MSR 0x26a 0x0606060606060606
2504 12:51:09.568485 MTRR: Fixed MSR 0x26b 0x0606060606060606
2505 12:51:09.571665 MTRR: Fixed MSR 0x26c 0x0606060606060606
2506 12:51:09.575377 MTRR: Fixed MSR 0x26d 0x0606060606060606
2507 12:51:09.582332 MTRR: Fixed MSR 0x26e 0x0606060606060606
2508 12:51:09.585392 MTRR: Fixed MSR 0x26f 0x0606060606060606
2509 12:51:09.588596 MTRR: Fixed MSR 0x258 0x0606060606060606
2510 12:51:09.591837 MTRR: Fixed MSR 0x250 0x0606060606060606
2511 12:51:09.598203 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 12:51:09.601924 MTRR: Fixed MSR 0x258 0x0606060606060606
2513 12:51:09.604828 MTRR: Fixed MSR 0x259 0x0000000000000000
2514 12:51:09.608853 MTRR: Fixed MSR 0x268 0x0606060606060606
2515 12:51:09.614878 MTRR: Fixed MSR 0x269 0x0606060606060606
2516 12:51:09.615415 call enable_fixed_mtrr()
2517 12:51:09.621721 MTRR: Fixed MSR 0x26a 0x0606060606060606
2518 12:51:09.624799 MTRR: Fixed MSR 0x26b 0x0606060606060606
2519 12:51:09.628491 MTRR: Fixed MSR 0x26c 0x0606060606060606
2520 12:51:09.631440 MTRR: Fixed MSR 0x26d 0x0606060606060606
2521 12:51:09.634943 MTRR: Fixed MSR 0x26e 0x0606060606060606
2522 12:51:09.641550 MTRR: Fixed MSR 0x26f 0x0606060606060606
2523 12:51:09.644703 MTRR: Fixed MSR 0x259 0x0000000000000000
2524 12:51:09.648316 MTRR: Fixed MSR 0x268 0x0606060606060606
2525 12:51:09.651563 MTRR: Fixed MSR 0x269 0x0606060606060606
2526 12:51:09.658268 MTRR: Fixed MSR 0x26a 0x0606060606060606
2527 12:51:09.661807 MTRR: Fixed MSR 0x26b 0x0606060606060606
2528 12:51:09.664914 MTRR: Fixed MSR 0x26c 0x0606060606060606
2529 12:51:09.668274 MTRR: Fixed MSR 0x26d 0x0606060606060606
2530 12:51:09.674844 MTRR: Fixed MSR 0x26e 0x0606060606060606
2531 12:51:09.678393 MTRR: Fixed MSR 0x26f 0x0606060606060606
2532 12:51:09.681460 MTRR: Fixed MSR 0x259 0x0000000000000000
2533 12:51:09.684687 call enable_fixed_mtrr()
2534 12:51:09.687832 CPU physical address size: 39 bits
2535 12:51:09.691368 MTRR: Fixed MSR 0x250 0x0606060606060606
2536 12:51:09.695205 call enable_fixed_mtrr()
2537 12:51:09.698290 MTRR: Fixed MSR 0x258 0x0606060606060606
2538 12:51:09.701974 MTRR: Fixed MSR 0x259 0x0000000000000000
2539 12:51:09.708261 MTRR: Fixed MSR 0x268 0x0606060606060606
2540 12:51:09.711074 MTRR: Fixed MSR 0x269 0x0606060606060606
2541 12:51:09.714818 CPU physical address size: 39 bits
2542 12:51:09.718157 MTRR: Fixed MSR 0x26a 0x0606060606060606
2543 12:51:09.724338 MTRR: Fixed MSR 0x268 0x0606060606060606
2544 12:51:09.727656 CPU physical address size: 39 bits
2545 12:51:09.731246 MTRR: Fixed MSR 0x269 0x0606060606060606
2546 12:51:09.734542 MTRR: Fixed MSR 0x258 0x0606060606060606
2547 12:51:09.738015 MTRR: Fixed MSR 0x259 0x0000000000000000
2548 12:51:09.744641 MTRR: Fixed MSR 0x268 0x0606060606060606
2549 12:51:09.747867 MTRR: Fixed MSR 0x269 0x0606060606060606
2550 12:51:09.751324 MTRR: Fixed MSR 0x26a 0x0606060606060606
2551 12:51:09.754532 MTRR: Fixed MSR 0x26b 0x0606060606060606
2552 12:51:09.757805 MTRR: Fixed MSR 0x26c 0x0606060606060606
2553 12:51:09.764795 MTRR: Fixed MSR 0x26d 0x0606060606060606
2554 12:51:09.767742 MTRR: Fixed MSR 0x26e 0x0606060606060606
2555 12:51:09.771520 MTRR: Fixed MSR 0x26f 0x0606060606060606
2556 12:51:09.774447 call enable_fixed_mtrr()
2557 12:51:09.777733 call enable_fixed_mtrr()
2558 12:51:09.780665 MTRR: Fixed MSR 0x26a 0x0606060606060606
2559 12:51:09.784532 CPU physical address size: 39 bits
2560 12:51:09.787680 MTRR: Fixed MSR 0x26b 0x0606060606060606
2561 12:51:09.790846 MTRR: Fixed MSR 0x26b 0x0606060606060606
2562 12:51:09.797588 MTRR: Fixed MSR 0x26c 0x0606060606060606
2563 12:51:09.801297 MTRR: Fixed MSR 0x26d 0x0606060606060606
2564 12:51:09.804154 MTRR: Fixed MSR 0x26e 0x0606060606060606
2565 12:51:09.807858 MTRR: Fixed MSR 0x26f 0x0606060606060606
2566 12:51:09.814283 MTRR: Fixed MSR 0x26c 0x0606060606060606
2567 12:51:09.814803 call enable_fixed_mtrr()
2568 12:51:09.820994 MTRR: Fixed MSR 0x26d 0x0606060606060606
2569 12:51:09.824179 MTRR: Fixed MSR 0x26e 0x0606060606060606
2570 12:51:09.827419 MTRR: Fixed MSR 0x26f 0x0606060606060606
2571 12:51:09.831042 CPU physical address size: 39 bits
2572 12:51:09.834054 call enable_fixed_mtrr()
2573 12:51:09.837551 CPU physical address size: 39 bits
2574 12:51:09.840730 CPU physical address size: 39 bits
2575 12:51:09.843731
2576 12:51:09.844241 MTRR check
2577 12:51:09.847098 Fixed MTRRs : Enabled
2578 12:51:09.847512 Variable MTRRs: Enabled
2579 12:51:09.847844
2580 12:51:09.854212 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2581 12:51:09.857329 Checking cr50 for pending updates
2582 12:51:09.870195 Reading cr50 TPM mode
2583 12:51:09.885149 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2584 12:51:09.895081 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2585 12:51:09.898240 Checking segment from ROM address 0xf96cbe6c
2586 12:51:09.901629 Checking segment from ROM address 0xf96cbe88
2587 12:51:09.908451 Loading segment from ROM address 0xf96cbe6c
2588 12:51:09.908978 code (compression=1)
2589 12:51:09.918725 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2590 12:51:09.927837 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2591 12:51:09.928365 using LZMA
2592 12:51:09.950492 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2593 12:51:09.957203 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2594 12:51:09.964754 Loading segment from ROM address 0xf96cbe88
2595 12:51:09.967808 Entry Point 0x30000000
2596 12:51:09.968232 Loaded segments
2597 12:51:09.974465 BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms
2598 12:51:09.981065 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2599 12:51:09.984787 Finalizing chipset.
2600 12:51:09.985212 apm_control: Finalizing SMM.
2601 12:51:09.987960 APMC done.
2602 12:51:09.991324 HECI: CSE device 16.1 is disabled
2603 12:51:09.994707 HECI: CSE device 16.2 is disabled
2604 12:51:09.998310 HECI: CSE device 16.3 is disabled
2605 12:51:10.001550 HECI: CSE device 16.4 is disabled
2606 12:51:10.004909 HECI: CSE device 16.5 is disabled
2607 12:51:10.007559 HECI: Sending End-of-Post
2608 12:51:10.016437 CSE: EOP requested action: continue boot
2609 12:51:10.019620 CSE EOP successful, continuing boot
2610 12:51:10.026603 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2611 12:51:10.030114 mp_park_aps done after 0 msecs.
2612 12:51:10.033035 Jumping to boot code at 0x30000000(0x76891000)
2613 12:51:10.043114 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2614 12:51:10.046684
2615 12:51:10.047134
2616 12:51:10.047470
2617 12:51:10.050134 Starting depthcharge on Volmar...
2618 12:51:10.050660
2619 12:51:10.051880 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2620 12:51:10.052377 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2621 12:51:10.052766 Setting prompt string to ['brya:']
2622 12:51:10.053134 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2623 12:51:10.057018 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2624 12:51:10.057550
2625 12:51:10.063518 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2626 12:51:10.064053
2627 12:51:10.070238 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2628 12:51:10.070769
2629 12:51:10.073243 configure_storage: Failed to remap 1C:2
2630 12:51:10.073781
2631 12:51:10.076417 Wipe memory regions:
2632 12:51:10.076843
2633 12:51:10.079836 [0x00000000001000, 0x000000000a0000)
2634 12:51:10.080322
2635 12:51:10.083509 [0x00000000100000, 0x00000030000000)
2636 12:51:10.186971
2637 12:51:10.189806 [0x00000032668e60, 0x00000076857000)
2638 12:51:10.334569
2639 12:51:10.337570 [0x00000100000000, 0x0000027fc00000)
2640 12:51:11.148572
2641 12:51:11.151564 ec_init: CrosEC protocol v3 supported (256, 256)
2642 12:51:11.761579
2643 12:51:11.762121 R8152: Initializing
2644 12:51:11.762578
2645 12:51:11.764438 Version 9 (ocp_data = 6010)
2646 12:51:11.764983
2647 12:51:11.767839 R8152: Done initializing
2648 12:51:11.768381
2649 12:51:11.771313 Adding net device
2650 12:51:12.072212
2651 12:51:12.075227 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2652 12:51:12.075770
2653 12:51:12.076221
2654 12:51:12.076639
2655 12:51:12.077505 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2657 12:51:12.179028 brya: tftpboot 192.168.201.1 11570949/tftp-deploy-oixokc9y/kernel/bzImage 11570949/tftp-deploy-oixokc9y/kernel/cmdline 11570949/tftp-deploy-oixokc9y/ramdisk/ramdisk.cpio.gz
2658 12:51:12.179692 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2659 12:51:12.180201 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2660 12:51:12.184594 tftpboot 192.168.201.1 11570949/tftp-deploy-oixokc9y/kernel/bzImploy-oixokc9y/kernel/cmdline 11570949/tftp-deploy-oixokc9y/ramdisk/ramdisk.cpio.gz
2661 12:51:12.184766
2662 12:51:12.184868 Waiting for link
2663 12:51:12.387868
2664 12:51:12.388405 done.
2665 12:51:12.388861
2666 12:51:12.389283 MAC: 00:e0:4c:68:02:be
2667 12:51:12.389696
2668 12:51:12.390421 Sending DHCP discover... done.
2669 12:51:12.390794
2670 12:51:12.393796 Waiting for reply... done.
2671 12:51:12.394341
2672 12:51:12.397161 Sending DHCP request... done.
2673 12:51:12.397599
2674 12:51:12.404350 Waiting for reply... done.
2675 12:51:12.404789
2676 12:51:12.405225 My ip is 192.168.201.17
2677 12:51:12.405636
2678 12:51:12.410995 The DHCP server ip is 192.168.201.1
2679 12:51:12.411536
2680 12:51:12.414315 TFTP server IP predefined by user: 192.168.201.1
2681 12:51:12.414863
2682 12:51:12.421086 Bootfile predefined by user: 11570949/tftp-deploy-oixokc9y/kernel/bzImage
2683 12:51:12.421639
2684 12:51:12.423791 Sending tftp read request... done.
2685 12:51:12.424227
2686 12:51:12.432499 Waiting for the transfer...
2687 12:51:12.433018
2688 12:51:12.725315 00000000 ################################################################
2689 12:51:12.725459
2690 12:51:13.010217 00080000 ################################################################
2691 12:51:13.010355
2692 12:51:13.292612 00100000 ################################################################
2693 12:51:13.292748
2694 12:51:13.572213 00180000 ################################################################
2695 12:51:13.572367
2696 12:51:13.852155 00200000 ################################################################
2697 12:51:13.852289
2698 12:51:14.133865 00280000 ################################################################
2699 12:51:14.134000
2700 12:51:14.427632 00300000 ################################################################
2701 12:51:14.427768
2702 12:51:14.709150 00380000 ################################################################
2703 12:51:14.709279
2704 12:51:14.989675 00400000 ################################################################
2705 12:51:14.989813
2706 12:51:15.278704 00480000 ################################################################
2707 12:51:15.278846
2708 12:51:15.559121 00500000 ################################################################
2709 12:51:15.559253
2710 12:51:15.839686 00580000 ################################################################
2711 12:51:15.839822
2712 12:51:16.119688 00600000 ################################################################
2713 12:51:16.119823
2714 12:51:16.399574 00680000 ################################################################
2715 12:51:16.399708
2716 12:51:16.685379 00700000 ################################################################
2717 12:51:16.685511
2718 12:51:16.971475 00780000 ################################################################
2719 12:51:16.971618
2720 12:51:17.271586 00800000 ################################################################
2721 12:51:17.271721
2722 12:51:17.576939 00880000 ################################################################
2723 12:51:17.577081
2724 12:51:17.858030 00900000 ################################################################
2725 12:51:17.858167
2726 12:51:18.143256 00980000 ################################################################
2727 12:51:18.143398
2728 12:51:18.425544 00a00000 ################################################################
2729 12:51:18.425680
2730 12:51:18.707858 00a80000 ################################################################
2731 12:51:18.708000
2732 12:51:18.989607 00b00000 ################################################################
2733 12:51:18.989779
2734 12:51:19.270640 00b80000 ################################################################
2735 12:51:19.270772
2736 12:51:19.558336 00c00000 ################################################################
2737 12:51:19.558469
2738 12:51:19.849141 00c80000 ################################################################
2739 12:51:19.849271
2740 12:51:20.056485 00d00000 ############################################### done.
2741 12:51:20.056626
2742 12:51:20.059781 The bootfile was 14016480 bytes long.
2743 12:51:20.059869
2744 12:51:20.063594 Sending tftp read request... done.
2745 12:51:20.063686
2746 12:51:20.066454 Waiting for the transfer...
2747 12:51:20.066550
2748 12:51:20.379719 00000000 ################################################################
2749 12:51:20.379856
2750 12:51:20.673447 00080000 ################################################################
2751 12:51:20.673580
2752 12:51:20.962350 00100000 ################################################################
2753 12:51:20.962483
2754 12:51:21.256058 00180000 ################################################################
2755 12:51:21.256200
2756 12:51:21.567519 00200000 ################################################################
2757 12:51:21.567654
2758 12:51:21.941368 00280000 ################################################################
2759 12:51:21.941878
2760 12:51:22.329472 00300000 ################################################################
2761 12:51:22.329993
2762 12:51:22.728279 00380000 ################################################################
2763 12:51:22.728783
2764 12:51:23.109293 00400000 ################################################################
2765 12:51:23.109845
2766 12:51:23.430439 00480000 ################################################################
2767 12:51:23.430582
2768 12:51:23.728367 00500000 ################################################################
2769 12:51:23.728501
2770 12:51:24.019286 00580000 ################################################################
2771 12:51:24.019414
2772 12:51:24.312012 00600000 ################################################################
2773 12:51:24.312153
2774 12:51:24.605744 00680000 ################################################################
2775 12:51:24.605875
2776 12:51:24.903049 00700000 ################################################################
2777 12:51:24.903185
2778 12:51:25.201690 00780000 ################################################################
2779 12:51:25.201831
2780 12:51:25.501414 00800000 ################################################################
2781 12:51:25.501550
2782 12:51:25.711799 00880000 ############################################## done.
2783 12:51:25.711926
2784 12:51:25.715006 Sending tftp read request... done.
2785 12:51:25.715093
2786 12:51:25.718511 Waiting for the transfer...
2787 12:51:25.718602
2788 12:51:25.721971 00000000 # done.
2789 12:51:25.722143
2790 12:51:25.729000 Command line loaded dynamically from TFTP file: 11570949/tftp-deploy-oixokc9y/kernel/cmdline
2791 12:51:25.729187
2792 12:51:25.745455 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2793 12:51:25.751547
2794 12:51:25.754763 Shutting down all USB controllers.
2795 12:51:25.755037
2796 12:51:25.755176 Removing current net device
2797 12:51:25.755297
2798 12:51:25.757970 Finalizing coreboot
2799 12:51:25.758225
2800 12:51:25.764529 Exiting depthcharge with code 4 at timestamp: 25963950
2801 12:51:25.764822
2802 12:51:25.764997
2803 12:51:25.765155 Starting kernel ...
2804 12:51:25.765303
2805 12:51:25.765446
2806 12:51:25.766144 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2807 12:51:25.766411 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2808 12:51:25.766626 Setting prompt string to ['Linux version [0-9]']
2809 12:51:25.766823 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2810 12:51:25.767043 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2812 12:55:50.767471 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2814 12:55:50.768468 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2816 12:55:50.769225 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2819 12:55:50.770468 end: 2 depthcharge-action (duration 00:05:00) [common]
2821 12:55:50.771532 Cleaning after the job
2822 12:55:50.771988 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11570949/tftp-deploy-oixokc9y/ramdisk
2823 12:55:50.773656 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11570949/tftp-deploy-oixokc9y/kernel
2824 12:55:50.775588 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11570949/tftp-deploy-oixokc9y/modules
2825 12:55:50.776176 start: 5.1 power-off (timeout 00:00:30) [common]
2826 12:55:50.776333 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-6' '--port=1' '--command=off'
2827 12:55:50.853138 >> Command sent successfully.
2828 12:55:50.857047 Returned 0 in 0 seconds
2829 12:55:50.957972 end: 5.1 power-off (duration 00:00:00) [common]
2831 12:55:50.959663 start: 5.2 read-feedback (timeout 00:10:00) [common]
2832 12:55:50.961104 Listened to connection for namespace 'common' for up to 1s
2834 12:55:50.962431 Listened to connection for namespace 'common' for up to 1s
2835 12:55:51.961847 Finalising connection for namespace 'common'
2836 12:55:51.962467 Disconnecting from shell: Finalise
2837 12:55:51.962832
2838 12:55:52.063856 end: 5.2 read-feedback (duration 00:00:01) [common]
2839 12:55:52.064457 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11570949
2840 12:55:52.119688 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11570949
2841 12:55:52.119895 JobError: Your job cannot terminate cleanly.