Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 12:50:26.322153 lava-dispatcher, installed at version: 2023.06
2 12:50:26.322401 start: 0 validate
3 12:50:26.322569 Start time: 2023-09-19 12:50:26.322560+00:00 (UTC)
4 12:50:26.322736 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:26.322936 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:50:26.594057 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:26.594894 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.191-cip38-661-g112a3073ff26%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:26.858465 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:26.859259 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.191-cip38-661-g112a3073ff26%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:50:31.089017 validate duration: 4.77
12 12:50:31.089283 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:50:31.089380 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:50:31.089466 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:50:31.089585 Not decompressing ramdisk as can be used compressed.
16 12:50:31.089669 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:50:31.089738 saving as /var/lib/lava/dispatcher/tmp/11570953/tftp-deploy-1e6smxml/ramdisk/rootfs.cpio.gz
18 12:50:31.089804 total size: 8418130 (8 MB)
19 12:50:31.747996 progress 0 % (0 MB)
20 12:50:31.751331 progress 5 % (0 MB)
21 12:50:31.754852 progress 10 % (0 MB)
22 12:50:31.758544 progress 15 % (1 MB)
23 12:50:31.762295 progress 20 % (1 MB)
24 12:50:31.766015 progress 25 % (2 MB)
25 12:50:31.769730 progress 30 % (2 MB)
26 12:50:31.773175 progress 35 % (2 MB)
27 12:50:31.776869 progress 40 % (3 MB)
28 12:50:31.780567 progress 45 % (3 MB)
29 12:50:31.783798 progress 50 % (4 MB)
30 12:50:31.786844 progress 55 % (4 MB)
31 12:50:31.789680 progress 60 % (4 MB)
32 12:50:31.792114 progress 65 % (5 MB)
33 12:50:31.794648 progress 70 % (5 MB)
34 12:50:31.797056 progress 75 % (6 MB)
35 12:50:31.799354 progress 80 % (6 MB)
36 12:50:31.801611 progress 85 % (6 MB)
37 12:50:31.803992 progress 90 % (7 MB)
38 12:50:31.806194 progress 95 % (7 MB)
39 12:50:31.808303 progress 100 % (8 MB)
40 12:50:31.808531 8 MB downloaded in 0.72 s (11.17 MB/s)
41 12:50:31.808685 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:50:31.808947 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:50:31.809034 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:50:31.809121 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:50:31.809265 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.191-cip38-661-g112a3073ff26/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:50:31.809336 saving as /var/lib/lava/dispatcher/tmp/11570953/tftp-deploy-1e6smxml/kernel/bzImage
48 12:50:31.809398 total size: 14016480 (13 MB)
49 12:50:31.809461 No compression specified
50 12:50:31.810597 progress 0 % (0 MB)
51 12:50:31.814318 progress 5 % (0 MB)
52 12:50:31.817983 progress 10 % (1 MB)
53 12:50:31.821765 progress 15 % (2 MB)
54 12:50:31.825431 progress 20 % (2 MB)
55 12:50:31.829028 progress 25 % (3 MB)
56 12:50:31.832774 progress 30 % (4 MB)
57 12:50:31.836405 progress 35 % (4 MB)
58 12:50:31.840268 progress 40 % (5 MB)
59 12:50:31.843876 progress 45 % (6 MB)
60 12:50:31.847555 progress 50 % (6 MB)
61 12:50:31.851369 progress 55 % (7 MB)
62 12:50:31.855024 progress 60 % (8 MB)
63 12:50:31.858872 progress 65 % (8 MB)
64 12:50:31.862490 progress 70 % (9 MB)
65 12:50:31.866087 progress 75 % (10 MB)
66 12:50:31.869840 progress 80 % (10 MB)
67 12:50:31.873358 progress 85 % (11 MB)
68 12:50:31.876879 progress 90 % (12 MB)
69 12:50:31.880557 progress 95 % (12 MB)
70 12:50:31.884088 progress 100 % (13 MB)
71 12:50:31.884301 13 MB downloaded in 0.07 s (178.47 MB/s)
72 12:50:31.884451 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:50:31.884683 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:50:31.884775 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:50:31.884862 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:50:31.885004 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.191-cip38-661-g112a3073ff26/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:50:31.885074 saving as /var/lib/lava/dispatcher/tmp/11570953/tftp-deploy-1e6smxml/modules/modules.tar
79 12:50:31.885136 total size: 527248 (0 MB)
80 12:50:31.885199 Using unxz to decompress xz
81 12:50:31.889399 progress 6 % (0 MB)
82 12:50:31.889794 progress 12 % (0 MB)
83 12:50:31.890030 progress 18 % (0 MB)
84 12:50:31.891699 progress 24 % (0 MB)
85 12:50:31.893657 progress 31 % (0 MB)
86 12:50:31.895611 progress 37 % (0 MB)
87 12:50:31.897628 progress 43 % (0 MB)
88 12:50:31.899638 progress 49 % (0 MB)
89 12:50:31.901574 progress 55 % (0 MB)
90 12:50:31.903539 progress 62 % (0 MB)
91 12:50:31.905483 progress 68 % (0 MB)
92 12:50:31.907517 progress 74 % (0 MB)
93 12:50:31.909754 progress 80 % (0 MB)
94 12:50:31.911776 progress 87 % (0 MB)
95 12:50:31.913592 progress 93 % (0 MB)
96 12:50:31.916064 progress 99 % (0 MB)
97 12:50:31.922575 0 MB downloaded in 0.04 s (13.43 MB/s)
98 12:50:31.922814 end: 1.3.1 http-download (duration 00:00:00) [common]
100 12:50:31.923224 end: 1.3 download-retry (duration 00:00:00) [common]
101 12:50:31.923323 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
102 12:50:31.923423 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
103 12:50:31.923564 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 12:50:31.923691 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
105 12:50:31.923927 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y
106 12:50:31.924068 makedir: /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin
107 12:50:31.924177 makedir: /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/tests
108 12:50:31.924279 makedir: /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/results
109 12:50:31.924397 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-add-keys
110 12:50:31.924552 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-add-sources
111 12:50:31.924687 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-background-process-start
112 12:50:31.924821 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-background-process-stop
113 12:50:31.924949 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-common-functions
114 12:50:31.925076 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-echo-ipv4
115 12:50:31.925205 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-install-packages
116 12:50:31.925335 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-installed-packages
117 12:50:31.925463 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-os-build
118 12:50:31.925591 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-probe-channel
119 12:50:31.925723 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-probe-ip
120 12:50:31.925851 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-target-ip
121 12:50:31.925978 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-target-mac
122 12:50:31.926105 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-target-storage
123 12:50:31.926237 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-test-case
124 12:50:31.926364 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-test-event
125 12:50:31.926490 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-test-feedback
126 12:50:31.926616 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-test-raise
127 12:50:31.926743 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-test-reference
128 12:50:31.926873 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-test-runner
129 12:50:31.927002 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-test-set
130 12:50:31.927138 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-test-shell
131 12:50:31.927270 Updating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-install-packages (oe)
132 12:50:31.927424 Updating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/bin/lava-installed-packages (oe)
133 12:50:31.927550 Creating /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/environment
134 12:50:31.927652 LAVA metadata
135 12:50:31.927725 - LAVA_JOB_ID=11570953
136 12:50:31.927791 - LAVA_DISPATCHER_IP=192.168.201.1
137 12:50:31.927896 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
138 12:50:31.927962 skipped lava-vland-overlay
139 12:50:31.928042 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 12:50:31.928122 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
141 12:50:31.928186 skipped lava-multinode-overlay
142 12:50:31.928261 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 12:50:31.928342 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
144 12:50:31.928415 Loading test definitions
145 12:50:31.928508 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
146 12:50:31.928581 Using /lava-11570953 at stage 0
147 12:50:31.928906 uuid=11570953_1.4.2.3.1 testdef=None
148 12:50:31.928996 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 12:50:31.929083 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
150 12:50:31.929634 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 12:50:31.929853 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
153 12:50:31.930522 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 12:50:31.930756 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
156 12:50:31.931395 runner path: /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/0/tests/0_dmesg test_uuid 11570953_1.4.2.3.1
157 12:50:31.931552 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 12:50:31.931782 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
160 12:50:31.931855 Using /lava-11570953 at stage 1
161 12:50:31.932159 uuid=11570953_1.4.2.3.5 testdef=None
162 12:50:31.932248 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 12:50:31.932333 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
164 12:50:31.932821 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 12:50:31.933036 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
167 12:50:31.933693 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 12:50:31.933927 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
170 12:50:31.934576 runner path: /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/1/tests/1_bootrr test_uuid 11570953_1.4.2.3.5
171 12:50:31.934729 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 12:50:31.934935 Creating lava-test-runner.conf files
174 12:50:31.934998 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/0 for stage 0
175 12:50:31.935094 - 0_dmesg
176 12:50:31.935177 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11570953/lava-overlay-4wxfpe7y/lava-11570953/1 for stage 1
177 12:50:31.935269 - 1_bootrr
178 12:50:31.935364 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 12:50:31.935449 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
180 12:50:31.943986 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 12:50:31.944092 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
182 12:50:31.944177 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 12:50:31.944264 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 12:50:31.944350 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
185 12:50:32.198231 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 12:50:32.198630 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
187 12:50:32.198754 extracting modules file /var/lib/lava/dispatcher/tmp/11570953/tftp-deploy-1e6smxml/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11570953/extract-overlay-ramdisk-yuqepyxv/ramdisk
188 12:50:32.224209 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 12:50:32.224357 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
190 12:50:32.224452 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11570953/compress-overlay-vtqv5zp3/overlay-1.4.2.4.tar.gz to ramdisk
191 12:50:32.224525 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11570953/compress-overlay-vtqv5zp3/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11570953/extract-overlay-ramdisk-yuqepyxv/ramdisk
192 12:50:32.232782 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 12:50:32.232895 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
194 12:50:32.232988 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 12:50:32.233082 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
196 12:50:32.233158 Building ramdisk /var/lib/lava/dispatcher/tmp/11570953/extract-overlay-ramdisk-yuqepyxv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11570953/extract-overlay-ramdisk-yuqepyxv/ramdisk
197 12:50:32.376870 >> 54149 blocks
198 12:50:33.258550 rename /var/lib/lava/dispatcher/tmp/11570953/extract-overlay-ramdisk-yuqepyxv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11570953/tftp-deploy-1e6smxml/ramdisk/ramdisk.cpio.gz
199 12:50:33.259006 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 12:50:33.259209 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 12:50:33.259310 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 12:50:33.259407 No mkimage arch provided, not using FIT.
203 12:50:33.259497 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 12:50:33.259578 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 12:50:33.259720 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 12:50:33.259817 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 12:50:33.259900 No LXC device requested
208 12:50:33.259977 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 12:50:33.260059 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 12:50:33.260134 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 12:50:33.260207 Checking files for TFTP limit of 4294967296 bytes.
212 12:50:33.260613 end: 1 tftp-deploy (duration 00:00:02) [common]
213 12:50:33.260716 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 12:50:33.260806 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 12:50:33.260921 substitutions:
216 12:50:33.260987 - {DTB}: None
217 12:50:33.261048 - {INITRD}: 11570953/tftp-deploy-1e6smxml/ramdisk/ramdisk.cpio.gz
218 12:50:33.261107 - {KERNEL}: 11570953/tftp-deploy-1e6smxml/kernel/bzImage
219 12:50:33.261164 - {LAVA_MAC}: None
220 12:50:33.261221 - {PRESEED_CONFIG}: None
221 12:50:33.261276 - {PRESEED_LOCAL}: None
222 12:50:33.261331 - {RAMDISK}: 11570953/tftp-deploy-1e6smxml/ramdisk/ramdisk.cpio.gz
223 12:50:33.261388 - {ROOT_PART}: None
224 12:50:33.261444 - {ROOT}: None
225 12:50:33.261498 - {SERVER_IP}: 192.168.201.1
226 12:50:33.261553 - {TEE}: None
227 12:50:33.261607 Parsed boot commands:
228 12:50:33.261662 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 12:50:33.261832 Parsed boot commands: tftpboot 192.168.201.1 11570953/tftp-deploy-1e6smxml/kernel/bzImage 11570953/tftp-deploy-1e6smxml/kernel/cmdline 11570953/tftp-deploy-1e6smxml/ramdisk/ramdisk.cpio.gz
230 12:50:33.261920 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 12:50:33.262004 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 12:50:33.262097 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 12:50:33.262186 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 12:50:33.262255 Not connected, no need to disconnect.
235 12:50:33.262329 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 12:50:33.262413 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 12:50:33.262479 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-5'
238 12:50:33.266508 Setting prompt string to ['lava-test: # ']
239 12:50:33.266856 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 12:50:33.266965 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 12:50:33.267062 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 12:50:33.267211 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 12:50:33.267449 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
244 12:50:38.424978 >> Command sent successfully.
245 12:50:38.435661 Returned 0 in 5 seconds
246 12:50:38.536907 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 12:50:38.538326 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 12:50:38.538830 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 12:50:38.539317 Setting prompt string to 'Starting depthcharge on Voema...'
251 12:50:38.539677 Changing prompt to 'Starting depthcharge on Voema...'
252 12:50:38.540024 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
253 12:50:38.541216 [Enter `^Ec?' for help]
254 12:50:40.131475
255 12:50:40.132058
256 12:50:40.141357 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
257 12:50:40.144534 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
258 12:50:40.151660 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
259 12:50:40.154758 CPU: AES supported, TXT NOT supported, VT supported
260 12:50:40.161523 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
261 12:50:40.164656 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
262 12:50:40.171731 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
263 12:50:40.175027 VBOOT: Loading verstage.
264 12:50:40.178490 FMAP: Found "FLASH" version 1.1 at 0x1804000.
265 12:50:40.185135 FMAP: base = 0x0 size = 0x2000000 #areas = 32
266 12:50:40.188306 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
267 12:50:40.198952 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
268 12:50:40.205178 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
269 12:50:40.205782
270 12:50:40.206159
271 12:50:40.218064 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
272 12:50:40.231971 Probing TPM: . done!
273 12:50:40.235288 TPM ready after 0 ms
274 12:50:40.238690 Connected to device vid:did:rid of 1ae0:0028:00
275 12:50:40.250330 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
276 12:50:40.256527 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
277 12:50:40.260636 Initialized TPM device CR50 revision 0
278 12:50:40.310658 tlcl_send_startup: Startup return code is 0
279 12:50:40.311294 TPM: setup succeeded
280 12:50:40.325045 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
281 12:50:40.339058 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 12:50:40.351784 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
283 12:50:40.361716 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
284 12:50:40.365553 Chrome EC: UHEPI supported
285 12:50:40.369012 Phase 1
286 12:50:40.372563 FMAP: area GBB found @ 1805000 (458752 bytes)
287 12:50:40.382896 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
288 12:50:40.389370 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
289 12:50:40.395808 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
290 12:50:40.403056 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
291 12:50:40.406002 Recovery requested (1009000e)
292 12:50:40.409659 TPM: Extending digest for VBOOT: boot mode into PCR 0
293 12:50:40.421265 tlcl_extend: response is 0
294 12:50:40.427606 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
295 12:50:40.437692 tlcl_extend: response is 0
296 12:50:40.444217 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
297 12:50:40.450437 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
298 12:50:40.457573 BS: verstage times (exec / console): total (unknown) / 142 ms
299 12:50:40.458157
300 12:50:40.458534
301 12:50:40.470714 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
302 12:50:40.474237 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
303 12:50:40.481304 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
304 12:50:40.484778 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
305 12:50:40.488192 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
306 12:50:40.494433 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
307 12:50:40.497604 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
308 12:50:40.501500 TCO_STS: 0000 0000
309 12:50:40.504999 GEN_PMCON: d0015038 00002200
310 12:50:40.507708 GBLRST_CAUSE: 00000000 00000000
311 12:50:40.508180 HPR_CAUSE0: 00000000
312 12:50:40.511328 prev_sleep_state 5
313 12:50:40.514395 Boot Count incremented to 23156
314 12:50:40.521667 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
315 12:50:40.527959 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 12:50:40.534512 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 12:50:40.541191 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
318 12:50:40.545143 Chrome EC: UHEPI supported
319 12:50:40.551622 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 12:50:40.564429 Probing TPM: done!
321 12:50:40.571140 Connected to device vid:did:rid of 1ae0:0028:00
322 12:50:40.582021 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
323 12:50:40.589116 Initialized TPM device CR50 revision 0
324 12:50:40.599395 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
325 12:50:40.606235 MRC: Hash idx 0x100b comparison successful.
326 12:50:40.609375 MRC cache found, size faa8
327 12:50:40.609864 bootmode is set to: 2
328 12:50:40.612902 SPD index = 0
329 12:50:40.619591 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
330 12:50:40.623071 SPD: module type is LPDDR4X
331 12:50:40.626320 SPD: module part number is MT53E512M64D4NW-046
332 12:50:40.632618 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
333 12:50:40.636346 SPD: device width 16 bits, bus width 16 bits
334 12:50:40.642629 SPD: module size is 1024 MB (per channel)
335 12:50:41.075258 CBMEM:
336 12:50:41.078682 IMD: root @ 0x76fff000 254 entries.
337 12:50:41.082174 IMD: root @ 0x76ffec00 62 entries.
338 12:50:41.085152 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
339 12:50:41.091622 FMAP: area RW_VPD found @ f35000 (8192 bytes)
340 12:50:41.095512 External stage cache:
341 12:50:41.098290 IMD: root @ 0x7b3ff000 254 entries.
342 12:50:41.102219 IMD: root @ 0x7b3fec00 62 entries.
343 12:50:41.116933 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
344 12:50:41.123656 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
345 12:50:41.130103 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
346 12:50:41.144202 MRC: 'RECOVERY_MRC_CACHE' does not need update.
347 12:50:41.151151 cse_lite: Skip switching to RW in the recovery path
348 12:50:41.151739 8 DIMMs found
349 12:50:41.152126 SMM Memory Map
350 12:50:41.155067 SMRAM : 0x7b000000 0x800000
351 12:50:41.158996 Subregion 0: 0x7b000000 0x200000
352 12:50:41.162182 Subregion 1: 0x7b200000 0x200000
353 12:50:41.165537 Subregion 2: 0x7b400000 0x400000
354 12:50:41.168919 top_of_ram = 0x77000000
355 12:50:41.175308 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
356 12:50:41.178986 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
357 12:50:41.185606 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
358 12:50:41.188897 MTRR Range: Start=ff000000 End=0 (Size 1000000)
359 12:50:41.195527 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
360 12:50:41.202387 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
361 12:50:41.214064 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
362 12:50:41.217080 Processing 211 relocs. Offset value of 0x74c0b000
363 12:50:41.227189 BS: romstage times (exec / console): total (unknown) / 277 ms
364 12:50:41.233022
365 12:50:41.233588
366 12:50:41.243048 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
367 12:50:41.246303 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
368 12:50:41.256557 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
369 12:50:41.263408 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
370 12:50:41.270238 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
371 12:50:41.276728 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
372 12:50:41.323482 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
373 12:50:41.329751 Processing 5008 relocs. Offset value of 0x75d98000
374 12:50:41.333988 BS: postcar times (exec / console): total (unknown) / 59 ms
375 12:50:41.334606
376 12:50:41.336767
377 12:50:41.346631 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
378 12:50:41.347383 Normal boot
379 12:50:41.350326 FW_CONFIG value is 0x804c02
380 12:50:41.353696 PCI: 00:07.0 disabled by fw_config
381 12:50:41.357128 PCI: 00:07.1 disabled by fw_config
382 12:50:41.360444 PCI: 00:0d.2 disabled by fw_config
383 12:50:41.364064 PCI: 00:1c.7 disabled by fw_config
384 12:50:41.370718 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 12:50:41.377554 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 12:50:41.380306 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
387 12:50:41.383832 GENERIC: 0.0 disabled by fw_config
388 12:50:41.387469 GENERIC: 1.0 disabled by fw_config
389 12:50:41.393763 fw_config match found: DB_USB=USB3_ACTIVE
390 12:50:41.396990 fw_config match found: DB_USB=USB3_ACTIVE
391 12:50:41.400229 fw_config match found: DB_USB=USB3_ACTIVE
392 12:50:41.403614 fw_config match found: DB_USB=USB3_ACTIVE
393 12:50:41.410671 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
394 12:50:41.417488 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
395 12:50:41.424023 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
396 12:50:41.434031 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
397 12:50:41.437263 microcode: sig=0x806c1 pf=0x80 revision=0x86
398 12:50:41.440491 microcode: Update skipped, already up-to-date
399 12:50:41.447245 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
400 12:50:41.477007 Detected 4 core, 8 thread CPU.
401 12:50:41.479932 Setting up SMI for CPU
402 12:50:41.483576 IED base = 0x7b400000
403 12:50:41.484154 IED size = 0x00400000
404 12:50:41.487158 Will perform SMM setup.
405 12:50:41.494180 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
406 12:50:41.500184 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
407 12:50:41.507049 Processing 16 relocs. Offset value of 0x00030000
408 12:50:41.510255 Attempting to start 7 APs
409 12:50:41.513164 Waiting for 10ms after sending INIT.
410 12:50:41.528911 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
411 12:50:41.529499 done.
412 12:50:41.531672 AP: slot 6 apic_id 3.
413 12:50:41.535210 AP: slot 2 apic_id 2.
414 12:50:41.535781 AP: slot 3 apic_id 5.
415 12:50:41.538789 AP: slot 7 apic_id 4.
416 12:50:41.542322 AP: slot 5 apic_id 6.
417 12:50:41.544909 AP: slot 4 apic_id 7.
418 12:50:41.548635 Waiting for 2nd SIPI to complete...done.
419 12:50:41.554886 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
420 12:50:41.561557 Processing 13 relocs. Offset value of 0x00038000
421 12:50:41.565123 Unable to locate Global NVS
422 12:50:41.571823 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
423 12:50:41.575157 Installing permanent SMM handler to 0x7b000000
424 12:50:41.585321 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
425 12:50:41.588658 Processing 794 relocs. Offset value of 0x7b010000
426 12:50:41.598492 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
427 12:50:41.601882 Processing 13 relocs. Offset value of 0x7b008000
428 12:50:41.608514 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
429 12:50:41.615207 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
430 12:50:41.618824 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
431 12:50:41.624866 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
432 12:50:41.631410 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
433 12:50:41.638490 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
434 12:50:41.645387 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
435 12:50:41.646042 Unable to locate Global NVS
436 12:50:41.651932 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
437 12:50:41.656906 Clearing SMI status registers
438 12:50:41.660024 SMI_STS: PM1
439 12:50:41.660610 PM1_STS: PWRBTN
440 12:50:41.670106 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
441 12:50:41.670693 In relocation handler: CPU 0
442 12:50:41.676473 New SMBASE=0x7b000000 IEDBASE=0x7b400000
443 12:50:41.679984 Writing SMRR. base = 0x7b000006, mask=0xff800c00
444 12:50:41.683642 Relocation complete.
445 12:50:41.690071 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
446 12:50:41.693309 In relocation handler: CPU 1
447 12:50:41.697125 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
448 12:50:41.700749 Relocation complete.
449 12:50:41.707724 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
450 12:50:41.709967 In relocation handler: CPU 5
451 12:50:41.713848 New SMBASE=0x7affec00 IEDBASE=0x7b400000
452 12:50:41.717365 Writing SMRR. base = 0x7b000006, mask=0xff800c00
453 12:50:41.720177 Relocation complete.
454 12:50:41.726978 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
455 12:50:41.730847 In relocation handler: CPU 4
456 12:50:41.733739 New SMBASE=0x7afff000 IEDBASE=0x7b400000
457 12:50:41.737173 Relocation complete.
458 12:50:41.743651 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
459 12:50:41.747420 In relocation handler: CPU 3
460 12:50:41.750254 New SMBASE=0x7afff400 IEDBASE=0x7b400000
461 12:50:41.753893 Relocation complete.
462 12:50:41.760439 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
463 12:50:41.763761 In relocation handler: CPU 7
464 12:50:41.766988 New SMBASE=0x7affe400 IEDBASE=0x7b400000
465 12:50:41.773746 Writing SMRR. base = 0x7b000006, mask=0xff800c00
466 12:50:41.774340 Relocation complete.
467 12:50:41.784112 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
468 12:50:41.784715 In relocation handler: CPU 2
469 12:50:41.790380 New SMBASE=0x7afff800 IEDBASE=0x7b400000
470 12:50:41.793936 Writing SMRR. base = 0x7b000006, mask=0xff800c00
471 12:50:41.797161 Relocation complete.
472 12:50:41.803708 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
473 12:50:41.807172 In relocation handler: CPU 6
474 12:50:41.810430 New SMBASE=0x7affe800 IEDBASE=0x7b400000
475 12:50:41.813825 Relocation complete.
476 12:50:41.814407 Initializing CPU #0
477 12:50:41.817338 CPU: vendor Intel device 806c1
478 12:50:41.821363 CPU: family 06, model 8c, stepping 01
479 12:50:41.825033 Clearing out pending MCEs
480 12:50:41.829039 Setting up local APIC...
481 12:50:41.829640 apic_id: 0x00 done.
482 12:50:41.832544 Turbo is available but hidden
483 12:50:41.836354 Turbo is available and visible
484 12:50:41.839162 microcode: Update skipped, already up-to-date
485 12:50:41.842272 CPU #0 initialized
486 12:50:41.845928 Initializing CPU #6
487 12:50:41.846406 Initializing CPU #2
488 12:50:41.849009 CPU: vendor Intel device 806c1
489 12:50:41.852821 CPU: family 06, model 8c, stepping 01
490 12:50:41.855821 CPU: vendor Intel device 806c1
491 12:50:41.858979 CPU: family 06, model 8c, stepping 01
492 12:50:41.862456 Clearing out pending MCEs
493 12:50:41.865490 Clearing out pending MCEs
494 12:50:41.869231 Setting up local APIC...
495 12:50:41.869814 Initializing CPU #7
496 12:50:41.872042 Initializing CPU #1
497 12:50:41.875424 apic_id: 0x03 done.
498 12:50:41.875911 Setting up local APIC...
499 12:50:41.879225 CPU: vendor Intel device 806c1
500 12:50:41.885788 CPU: family 06, model 8c, stepping 01
501 12:50:41.886386 apic_id: 0x02 done.
502 12:50:41.892280 microcode: Update skipped, already up-to-date
503 12:50:41.895670 microcode: Update skipped, already up-to-date
504 12:50:41.896285 CPU #6 initialized
505 12:50:41.899188 Initializing CPU #3
506 12:50:41.902249 CPU: vendor Intel device 806c1
507 12:50:41.905732 CPU: family 06, model 8c, stepping 01
508 12:50:41.908788 CPU: vendor Intel device 806c1
509 12:50:41.911987 CPU: family 06, model 8c, stepping 01
510 12:50:41.915961 Clearing out pending MCEs
511 12:50:41.918896 Clearing out pending MCEs
512 12:50:41.922363 Setting up local APIC...
513 12:50:41.922951 Initializing CPU #4
514 12:50:41.925879 Initializing CPU #5
515 12:50:41.929444 CPU: vendor Intel device 806c1
516 12:50:41.932157 CPU: family 06, model 8c, stepping 01
517 12:50:41.935842 Setting up local APIC...
518 12:50:41.936421 Clearing out pending MCEs
519 12:50:41.939157 CPU: vendor Intel device 806c1
520 12:50:41.945903 CPU: family 06, model 8c, stepping 01
521 12:50:41.946493 Clearing out pending MCEs
522 12:50:41.949369 Setting up local APIC...
523 12:50:41.952356 Clearing out pending MCEs
524 12:50:41.955807 apic_id: 0x04 done.
525 12:50:41.956395 apic_id: 0x05 done.
526 12:50:41.962416 microcode: Update skipped, already up-to-date
527 12:50:41.965776 microcode: Update skipped, already up-to-date
528 12:50:41.966360 CPU #7 initialized
529 12:50:41.969044 CPU #2 initialized
530 12:50:41.972646 apic_id: 0x07 done.
531 12:50:41.973249 Setting up local APIC...
532 12:50:41.975528 CPU #3 initialized
533 12:50:41.979027 Setting up local APIC...
534 12:50:41.982511 microcode: Update skipped, already up-to-date
535 12:50:41.985813 apic_id: 0x06 done.
536 12:50:41.986400 CPU #4 initialized
537 12:50:41.992555 microcode: Update skipped, already up-to-date
538 12:50:41.993140 apic_id: 0x01 done.
539 12:50:41.996048 CPU #5 initialized
540 12:50:41.999222 microcode: Update skipped, already up-to-date
541 12:50:42.002626 CPU #1 initialized
542 12:50:42.005727 bsp_do_flight_plan done after 455 msecs.
543 12:50:42.009253 CPU: frequency set to 4000 MHz
544 12:50:42.012284 Enabling SMIs.
545 12:50:42.019227 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
546 12:50:42.034135 SATAXPCIE1 indicates PCIe NVMe is present
547 12:50:42.037163 Probing TPM: done!
548 12:50:42.041009 Connected to device vid:did:rid of 1ae0:0028:00
549 12:50:42.051576 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
550 12:50:42.054436 Initialized TPM device CR50 revision 0
551 12:50:42.058281 Enabling S0i3.4
552 12:50:42.064739 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
553 12:50:42.067836 Found a VBT of 8704 bytes after decompression
554 12:50:42.075160 cse_lite: CSE RO boot. HybridStorageMode disabled
555 12:50:42.081595 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
556 12:50:42.156091 FSPS returned 0
557 12:50:42.159304 Executing Phase 1 of FspMultiPhaseSiInit
558 12:50:42.169509 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
559 12:50:42.172959 port C0 DISC req: usage 1 usb3 1 usb2 5
560 12:50:42.176013 Raw Buffer output 0 00000511
561 12:50:42.179331 Raw Buffer output 1 00000000
562 12:50:42.183156 pmc_send_ipc_cmd succeeded
563 12:50:42.189821 port C1 DISC req: usage 1 usb3 2 usb2 3
564 12:50:42.190398 Raw Buffer output 0 00000321
565 12:50:42.192989 Raw Buffer output 1 00000000
566 12:50:42.197218 pmc_send_ipc_cmd succeeded
567 12:50:42.202432 Detected 4 core, 8 thread CPU.
568 12:50:42.205475 Detected 4 core, 8 thread CPU.
569 12:50:42.439894 Display FSP Version Info HOB
570 12:50:42.443245 Reference Code - CPU = a.0.4c.31
571 12:50:42.446525 uCode Version = 0.0.0.86
572 12:50:42.450027 TXT ACM version = ff.ff.ff.ffff
573 12:50:42.453147 Reference Code - ME = a.0.4c.31
574 12:50:42.456301 MEBx version = 0.0.0.0
575 12:50:42.459940 ME Firmware Version = Consumer SKU
576 12:50:42.463309 Reference Code - PCH = a.0.4c.31
577 12:50:42.466087 PCH-CRID Status = Disabled
578 12:50:42.469747 PCH-CRID Original Value = ff.ff.ff.ffff
579 12:50:42.473004 PCH-CRID New Value = ff.ff.ff.ffff
580 12:50:42.476340 OPROM - RST - RAID = ff.ff.ff.ffff
581 12:50:42.479541 PCH Hsio Version = 4.0.0.0
582 12:50:42.482814 Reference Code - SA - System Agent = a.0.4c.31
583 12:50:42.486428 Reference Code - MRC = 2.0.0.1
584 12:50:42.489652 SA - PCIe Version = a.0.4c.31
585 12:50:42.493316 SA-CRID Status = Disabled
586 12:50:42.496246 SA-CRID Original Value = 0.0.0.1
587 12:50:42.499590 SA-CRID New Value = 0.0.0.1
588 12:50:42.502695 OPROM - VBIOS = ff.ff.ff.ffff
589 12:50:42.506457 IO Manageability Engine FW Version = 11.1.4.0
590 12:50:42.509517 PHY Build Version = 0.0.0.e0
591 12:50:42.512793 Thunderbolt(TM) FW Version = 0.0.0.0
592 12:50:42.519514 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
593 12:50:42.523230 ITSS IRQ Polarities Before:
594 12:50:42.523811 IPC0: 0xffffffff
595 12:50:42.526300 IPC1: 0xffffffff
596 12:50:42.526878 IPC2: 0xffffffff
597 12:50:42.529761 IPC3: 0xffffffff
598 12:50:42.532973 ITSS IRQ Polarities After:
599 12:50:42.533448 IPC0: 0xffffffff
600 12:50:42.536247 IPC1: 0xffffffff
601 12:50:42.536820 IPC2: 0xffffffff
602 12:50:42.539478 IPC3: 0xffffffff
603 12:50:42.542939 Found PCIe Root Port #9 at PCI: 00:1d.0.
604 12:50:42.556345 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
605 12:50:42.566361 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
606 12:50:42.579944 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
607 12:50:42.586211 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
608 12:50:42.586795 Enumerating buses...
609 12:50:42.593033 Show all devs... Before device enumeration.
610 12:50:42.593628 Root Device: enabled 1
611 12:50:42.596370 DOMAIN: 0000: enabled 1
612 12:50:42.599650 CPU_CLUSTER: 0: enabled 1
613 12:50:42.603133 PCI: 00:00.0: enabled 1
614 12:50:42.603717 PCI: 00:02.0: enabled 1
615 12:50:42.606615 PCI: 00:04.0: enabled 1
616 12:50:42.610030 PCI: 00:05.0: enabled 1
617 12:50:42.610613 PCI: 00:06.0: enabled 0
618 12:50:42.613661 PCI: 00:07.0: enabled 0
619 12:50:42.616797 PCI: 00:07.1: enabled 0
620 12:50:42.619819 PCI: 00:07.2: enabled 0
621 12:50:42.620294 PCI: 00:07.3: enabled 0
622 12:50:42.623452 PCI: 00:08.0: enabled 1
623 12:50:42.626671 PCI: 00:09.0: enabled 0
624 12:50:42.629965 PCI: 00:0a.0: enabled 0
625 12:50:42.630551 PCI: 00:0d.0: enabled 1
626 12:50:42.632983 PCI: 00:0d.1: enabled 0
627 12:50:42.636764 PCI: 00:0d.2: enabled 0
628 12:50:42.640092 PCI: 00:0d.3: enabled 0
629 12:50:42.640695 PCI: 00:0e.0: enabled 0
630 12:50:42.643170 PCI: 00:10.2: enabled 1
631 12:50:42.646378 PCI: 00:10.6: enabled 0
632 12:50:42.646854 PCI: 00:10.7: enabled 0
633 12:50:42.649642 PCI: 00:12.0: enabled 0
634 12:50:42.653293 PCI: 00:12.6: enabled 0
635 12:50:42.656660 PCI: 00:13.0: enabled 0
636 12:50:42.657093 PCI: 00:14.0: enabled 1
637 12:50:42.660061 PCI: 00:14.1: enabled 0
638 12:50:42.663630 PCI: 00:14.2: enabled 1
639 12:50:42.666749 PCI: 00:14.3: enabled 1
640 12:50:42.667213 PCI: 00:15.0: enabled 1
641 12:50:42.670194 PCI: 00:15.1: enabled 1
642 12:50:42.673348 PCI: 00:15.2: enabled 1
643 12:50:42.673890 PCI: 00:15.3: enabled 1
644 12:50:42.676408 PCI: 00:16.0: enabled 1
645 12:50:42.680546 PCI: 00:16.1: enabled 0
646 12:50:42.683110 PCI: 00:16.2: enabled 0
647 12:50:42.683548 PCI: 00:16.3: enabled 0
648 12:50:42.686840 PCI: 00:16.4: enabled 0
649 12:50:42.690086 PCI: 00:16.5: enabled 0
650 12:50:42.693462 PCI: 00:17.0: enabled 1
651 12:50:42.694022 PCI: 00:19.0: enabled 0
652 12:50:42.696446 PCI: 00:19.1: enabled 1
653 12:50:42.699755 PCI: 00:19.2: enabled 0
654 12:50:42.703339 PCI: 00:1c.0: enabled 1
655 12:50:42.703896 PCI: 00:1c.1: enabled 0
656 12:50:42.706796 PCI: 00:1c.2: enabled 0
657 12:50:42.709926 PCI: 00:1c.3: enabled 0
658 12:50:42.710490 PCI: 00:1c.4: enabled 0
659 12:50:42.713645 PCI: 00:1c.5: enabled 0
660 12:50:42.716841 PCI: 00:1c.6: enabled 1
661 12:50:42.720258 PCI: 00:1c.7: enabled 0
662 12:50:42.720804 PCI: 00:1d.0: enabled 1
663 12:50:42.723484 PCI: 00:1d.1: enabled 0
664 12:50:42.726809 PCI: 00:1d.2: enabled 1
665 12:50:42.730010 PCI: 00:1d.3: enabled 0
666 12:50:42.730597 PCI: 00:1e.0: enabled 1
667 12:50:42.733489 PCI: 00:1e.1: enabled 0
668 12:50:42.736666 PCI: 00:1e.2: enabled 1
669 12:50:42.740324 PCI: 00:1e.3: enabled 1
670 12:50:42.740915 PCI: 00:1f.0: enabled 1
671 12:50:42.743319 PCI: 00:1f.1: enabled 0
672 12:50:42.746709 PCI: 00:1f.2: enabled 1
673 12:50:42.750119 PCI: 00:1f.3: enabled 1
674 12:50:42.750707 PCI: 00:1f.4: enabled 0
675 12:50:42.753186 PCI: 00:1f.5: enabled 1
676 12:50:42.756736 PCI: 00:1f.6: enabled 0
677 12:50:42.757326 PCI: 00:1f.7: enabled 0
678 12:50:42.759970 APIC: 00: enabled 1
679 12:50:42.763476 GENERIC: 0.0: enabled 1
680 12:50:42.763958 GENERIC: 0.0: enabled 1
681 12:50:42.766855 GENERIC: 1.0: enabled 1
682 12:50:42.770375 GENERIC: 0.0: enabled 1
683 12:50:42.773394 GENERIC: 1.0: enabled 1
684 12:50:42.773985 USB0 port 0: enabled 1
685 12:50:42.776685 GENERIC: 0.0: enabled 1
686 12:50:42.779936 USB0 port 0: enabled 1
687 12:50:42.784030 GENERIC: 0.0: enabled 1
688 12:50:42.784628 I2C: 00:1a: enabled 1
689 12:50:42.786756 I2C: 00:31: enabled 1
690 12:50:42.790126 I2C: 00:32: enabled 1
691 12:50:42.790710 I2C: 00:10: enabled 1
692 12:50:42.793605 I2C: 00:15: enabled 1
693 12:50:42.796600 GENERIC: 0.0: enabled 0
694 12:50:42.797084 GENERIC: 1.0: enabled 0
695 12:50:42.799888 GENERIC: 0.0: enabled 1
696 12:50:42.803444 SPI: 00: enabled 1
697 12:50:42.804042 SPI: 00: enabled 1
698 12:50:42.806848 PNP: 0c09.0: enabled 1
699 12:50:42.809901 GENERIC: 0.0: enabled 1
700 12:50:42.810448 USB3 port 0: enabled 1
701 12:50:42.813216 USB3 port 1: enabled 1
702 12:50:42.816945 USB3 port 2: enabled 0
703 12:50:42.819883 USB3 port 3: enabled 0
704 12:50:42.820363 USB2 port 0: enabled 0
705 12:50:42.823466 USB2 port 1: enabled 1
706 12:50:42.826836 USB2 port 2: enabled 1
707 12:50:42.827460 USB2 port 3: enabled 0
708 12:50:42.830324 USB2 port 4: enabled 1
709 12:50:42.833337 USB2 port 5: enabled 0
710 12:50:42.833819 USB2 port 6: enabled 0
711 12:50:42.836726 USB2 port 7: enabled 0
712 12:50:42.840366 USB2 port 8: enabled 0
713 12:50:42.843195 USB2 port 9: enabled 0
714 12:50:42.843675 USB3 port 0: enabled 0
715 12:50:42.846943 USB3 port 1: enabled 1
716 12:50:42.850244 USB3 port 2: enabled 0
717 12:50:42.850828 USB3 port 3: enabled 0
718 12:50:42.853537 GENERIC: 0.0: enabled 1
719 12:50:42.856474 GENERIC: 1.0: enabled 1
720 12:50:42.859981 APIC: 01: enabled 1
721 12:50:42.860464 APIC: 02: enabled 1
722 12:50:42.863252 APIC: 05: enabled 1
723 12:50:42.863734 APIC: 07: enabled 1
724 12:50:42.866905 APIC: 06: enabled 1
725 12:50:42.869755 APIC: 03: enabled 1
726 12:50:42.870235 APIC: 04: enabled 1
727 12:50:42.873328 Compare with tree...
728 12:50:42.876665 Root Device: enabled 1
729 12:50:42.877208 DOMAIN: 0000: enabled 1
730 12:50:42.880295 PCI: 00:00.0: enabled 1
731 12:50:42.883271 PCI: 00:02.0: enabled 1
732 12:50:42.887232 PCI: 00:04.0: enabled 1
733 12:50:42.890109 GENERIC: 0.0: enabled 1
734 12:50:42.890752 PCI: 00:05.0: enabled 1
735 12:50:42.893583 PCI: 00:06.0: enabled 0
736 12:50:42.896693 PCI: 00:07.0: enabled 0
737 12:50:42.899787 GENERIC: 0.0: enabled 1
738 12:50:42.903489 PCI: 00:07.1: enabled 0
739 12:50:42.904081 GENERIC: 1.0: enabled 1
740 12:50:42.906862 PCI: 00:07.2: enabled 0
741 12:50:42.909960 GENERIC: 0.0: enabled 1
742 12:50:42.913594 PCI: 00:07.3: enabled 0
743 12:50:42.917001 GENERIC: 1.0: enabled 1
744 12:50:42.917596 PCI: 00:08.0: enabled 1
745 12:50:42.919900 PCI: 00:09.0: enabled 0
746 12:50:42.923150 PCI: 00:0a.0: enabled 0
747 12:50:42.926947 PCI: 00:0d.0: enabled 1
748 12:50:42.927591 USB0 port 0: enabled 1
749 12:50:42.930111 USB3 port 0: enabled 1
750 12:50:42.933360 USB3 port 1: enabled 1
751 12:50:42.936529 USB3 port 2: enabled 0
752 12:50:42.939987 USB3 port 3: enabled 0
753 12:50:42.943660 PCI: 00:0d.1: enabled 0
754 12:50:42.944248 PCI: 00:0d.2: enabled 0
755 12:50:42.946583 GENERIC: 0.0: enabled 1
756 12:50:42.949979 PCI: 00:0d.3: enabled 0
757 12:50:42.953387 PCI: 00:0e.0: enabled 0
758 12:50:42.956762 PCI: 00:10.2: enabled 1
759 12:50:42.957354 PCI: 00:10.6: enabled 0
760 12:50:42.960438 PCI: 00:10.7: enabled 0
761 12:50:42.963471 PCI: 00:12.0: enabled 0
762 12:50:42.967122 PCI: 00:12.6: enabled 0
763 12:50:42.967723 PCI: 00:13.0: enabled 0
764 12:50:42.970489 PCI: 00:14.0: enabled 1
765 12:50:42.973421 USB0 port 0: enabled 1
766 12:50:42.976750 USB2 port 0: enabled 0
767 12:50:42.980089 USB2 port 1: enabled 1
768 12:50:42.983504 USB2 port 2: enabled 1
769 12:50:42.984108 USB2 port 3: enabled 0
770 12:50:42.986621 USB2 port 4: enabled 1
771 12:50:42.990450 USB2 port 5: enabled 0
772 12:50:42.993793 USB2 port 6: enabled 0
773 12:50:42.996720 USB2 port 7: enabled 0
774 12:50:42.997310 USB2 port 8: enabled 0
775 12:50:43.000132 USB2 port 9: enabled 0
776 12:50:43.003195 USB3 port 0: enabled 0
777 12:50:43.007378 USB3 port 1: enabled 1
778 12:50:43.010257 USB3 port 2: enabled 0
779 12:50:43.013663 USB3 port 3: enabled 0
780 12:50:43.014258 PCI: 00:14.1: enabled 0
781 12:50:43.017111 PCI: 00:14.2: enabled 1
782 12:50:43.020282 PCI: 00:14.3: enabled 1
783 12:50:43.023286 GENERIC: 0.0: enabled 1
784 12:50:43.026785 PCI: 00:15.0: enabled 1
785 12:50:43.027426 I2C: 00:1a: enabled 1
786 12:50:43.030289 I2C: 00:31: enabled 1
787 12:50:43.033189 I2C: 00:32: enabled 1
788 12:50:43.036668 PCI: 00:15.1: enabled 1
789 12:50:43.037145 I2C: 00:10: enabled 1
790 12:50:43.039982 PCI: 00:15.2: enabled 1
791 12:50:43.043472 PCI: 00:15.3: enabled 1
792 12:50:43.046560 PCI: 00:16.0: enabled 1
793 12:50:43.049785 PCI: 00:16.1: enabled 0
794 12:50:43.050289 PCI: 00:16.2: enabled 0
795 12:50:43.053048 PCI: 00:16.3: enabled 0
796 12:50:43.056502 PCI: 00:16.4: enabled 0
797 12:50:43.060057 PCI: 00:16.5: enabled 0
798 12:50:43.063430 PCI: 00:17.0: enabled 1
799 12:50:43.064030 PCI: 00:19.0: enabled 0
800 12:50:43.067466 PCI: 00:19.1: enabled 1
801 12:50:43.070526 I2C: 00:15: enabled 1
802 12:50:43.071159 PCI: 00:19.2: enabled 0
803 12:50:43.074206 PCI: 00:1d.0: enabled 1
804 12:50:43.077527 GENERIC: 0.0: enabled 1
805 12:50:43.081151 PCI: 00:1e.0: enabled 1
806 12:50:43.083919 PCI: 00:1e.1: enabled 0
807 12:50:43.084413 PCI: 00:1e.2: enabled 1
808 12:50:43.087366 SPI: 00: enabled 1
809 12:50:43.091037 PCI: 00:1e.3: enabled 1
810 12:50:43.091678 SPI: 00: enabled 1
811 12:50:43.094344 PCI: 00:1f.0: enabled 1
812 12:50:43.098115 PNP: 0c09.0: enabled 1
813 12:50:43.100888 PCI: 00:1f.1: enabled 0
814 12:50:43.104297 PCI: 00:1f.2: enabled 1
815 12:50:43.104786 GENERIC: 0.0: enabled 1
816 12:50:43.107945 GENERIC: 0.0: enabled 1
817 12:50:43.159731 GENERIC: 1.0: enabled 1
818 12:50:43.160358 PCI: 00:1f.3: enabled 1
819 12:50:43.160873 PCI: 00:1f.4: enabled 0
820 12:50:43.161345 PCI: 00:1f.5: enabled 1
821 12:50:43.162155 PCI: 00:1f.6: enabled 0
822 12:50:43.162564 PCI: 00:1f.7: enabled 0
823 12:50:43.163018 CPU_CLUSTER: 0: enabled 1
824 12:50:43.163512 APIC: 00: enabled 1
825 12:50:43.163954 APIC: 01: enabled 1
826 12:50:43.164393 APIC: 02: enabled 1
827 12:50:43.164824 APIC: 05: enabled 1
828 12:50:43.165257 APIC: 07: enabled 1
829 12:50:43.165687 APIC: 06: enabled 1
830 12:50:43.166227 APIC: 03: enabled 1
831 12:50:43.166767 APIC: 04: enabled 1
832 12:50:43.167311 Root Device scanning...
833 12:50:43.167751 scan_static_bus for Root Device
834 12:50:43.168222 DOMAIN: 0000 enabled
835 12:50:43.168698 CPU_CLUSTER: 0 enabled
836 12:50:43.169110 DOMAIN: 0000 scanning...
837 12:50:43.169785 PCI: pci_scan_bus for bus 00
838 12:50:43.170167 PCI: 00:00.0 [8086/0000] ops
839 12:50:43.173452 PCI: 00:00.0 [8086/9a12] enabled
840 12:50:43.174032 PCI: 00:02.0 [8086/0000] bus ops
841 12:50:43.176347 PCI: 00:02.0 [8086/9a40] enabled
842 12:50:43.179822 PCI: 00:04.0 [8086/0000] bus ops
843 12:50:43.183200 PCI: 00:04.0 [8086/9a03] enabled
844 12:50:43.186649 PCI: 00:05.0 [8086/9a19] enabled
845 12:50:43.190319 PCI: 00:07.0 [0000/0000] hidden
846 12:50:43.193392 PCI: 00:08.0 [8086/9a11] enabled
847 12:50:43.196596 PCI: 00:0a.0 [8086/9a0d] disabled
848 12:50:43.200026 PCI: 00:0d.0 [8086/0000] bus ops
849 12:50:43.203111 PCI: 00:0d.0 [8086/9a13] enabled
850 12:50:43.206637 PCI: 00:14.0 [8086/0000] bus ops
851 12:50:43.210299 PCI: 00:14.0 [8086/a0ed] enabled
852 12:50:43.213067 PCI: 00:14.2 [8086/a0ef] enabled
853 12:50:43.216257 PCI: 00:14.3 [8086/0000] bus ops
854 12:50:43.220021 PCI: 00:14.3 [8086/a0f0] enabled
855 12:50:43.223343 PCI: 00:15.0 [8086/0000] bus ops
856 12:50:43.226752 PCI: 00:15.0 [8086/a0e8] enabled
857 12:50:43.229799 PCI: 00:15.1 [8086/0000] bus ops
858 12:50:43.233598 PCI: 00:15.1 [8086/a0e9] enabled
859 12:50:43.236345 PCI: 00:15.2 [8086/0000] bus ops
860 12:50:43.239701 PCI: 00:15.2 [8086/a0ea] enabled
861 12:50:43.243591 PCI: 00:15.3 [8086/0000] bus ops
862 12:50:43.246487 PCI: 00:15.3 [8086/a0eb] enabled
863 12:50:43.249791 PCI: 00:16.0 [8086/0000] ops
864 12:50:43.253726 PCI: 00:16.0 [8086/a0e0] enabled
865 12:50:43.256664 PCI: Static device PCI: 00:17.0 not found, disabling it.
866 12:50:43.260103 PCI: 00:19.0 [8086/0000] bus ops
867 12:50:43.263239 PCI: 00:19.0 [8086/a0c5] disabled
868 12:50:43.266789 PCI: 00:19.1 [8086/0000] bus ops
869 12:50:43.269910 PCI: 00:19.1 [8086/a0c6] enabled
870 12:50:43.273226 PCI: 00:1d.0 [8086/0000] bus ops
871 12:50:43.276313 PCI: 00:1d.0 [8086/a0b0] enabled
872 12:50:43.279820 PCI: 00:1e.0 [8086/0000] ops
873 12:50:43.283057 PCI: 00:1e.0 [8086/a0a8] enabled
874 12:50:43.286503 PCI: 00:1e.2 [8086/0000] bus ops
875 12:50:43.289728 PCI: 00:1e.2 [8086/a0aa] enabled
876 12:50:43.293422 PCI: 00:1e.3 [8086/0000] bus ops
877 12:50:43.296669 PCI: 00:1e.3 [8086/a0ab] enabled
878 12:50:43.299936 PCI: 00:1f.0 [8086/0000] bus ops
879 12:50:43.303028 PCI: 00:1f.0 [8086/a087] enabled
880 12:50:43.306200 RTC Init
881 12:50:43.309872 Set power on after power failure.
882 12:50:43.310361 Disabling Deep S3
883 12:50:43.313412 Disabling Deep S3
884 12:50:43.313924 Disabling Deep S4
885 12:50:43.316767 Disabling Deep S4
886 12:50:43.319791 Disabling Deep S5
887 12:50:43.320220 Disabling Deep S5
888 12:50:43.323694 PCI: 00:1f.2 [0000/0000] hidden
889 12:50:43.326739 PCI: 00:1f.3 [8086/0000] bus ops
890 12:50:43.330224 PCI: 00:1f.3 [8086/a0c8] enabled
891 12:50:43.333471 PCI: 00:1f.5 [8086/0000] bus ops
892 12:50:43.336708 PCI: 00:1f.5 [8086/a0a4] enabled
893 12:50:43.340036 PCI: Leftover static devices:
894 12:50:43.340563 PCI: 00:10.2
895 12:50:43.343459 PCI: 00:10.6
896 12:50:43.343887 PCI: 00:10.7
897 12:50:43.346658 PCI: 00:06.0
898 12:50:43.347327 PCI: 00:07.1
899 12:50:43.347683 PCI: 00:07.2
900 12:50:43.350178 PCI: 00:07.3
901 12:50:43.350605 PCI: 00:09.0
902 12:50:43.353463 PCI: 00:0d.1
903 12:50:43.354061 PCI: 00:0d.2
904 12:50:43.354414 PCI: 00:0d.3
905 12:50:43.357436 PCI: 00:0e.0
906 12:50:43.357871 PCI: 00:12.0
907 12:50:43.360185 PCI: 00:12.6
908 12:50:43.360719 PCI: 00:13.0
909 12:50:43.363737 PCI: 00:14.1
910 12:50:43.364309 PCI: 00:16.1
911 12:50:43.364685 PCI: 00:16.2
912 12:50:43.366753 PCI: 00:16.3
913 12:50:43.367264 PCI: 00:16.4
914 12:50:43.369899 PCI: 00:16.5
915 12:50:43.370329 PCI: 00:17.0
916 12:50:43.370676 PCI: 00:19.2
917 12:50:43.373696 PCI: 00:1e.1
918 12:50:43.374227 PCI: 00:1f.1
919 12:50:43.376573 PCI: 00:1f.4
920 12:50:43.377007 PCI: 00:1f.6
921 12:50:43.377350 PCI: 00:1f.7
922 12:50:43.379743 PCI: Check your devicetree.cb.
923 12:50:43.383433 PCI: 00:02.0 scanning...
924 12:50:43.386588 scan_generic_bus for PCI: 00:02.0
925 12:50:43.390098 scan_generic_bus for PCI: 00:02.0 done
926 12:50:43.397140 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
927 12:50:43.400045 PCI: 00:04.0 scanning...
928 12:50:43.403610 scan_generic_bus for PCI: 00:04.0
929 12:50:43.404148 GENERIC: 0.0 enabled
930 12:50:43.410125 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
931 12:50:43.417046 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
932 12:50:43.417581 PCI: 00:0d.0 scanning...
933 12:50:43.420131 scan_static_bus for PCI: 00:0d.0
934 12:50:43.423675 USB0 port 0 enabled
935 12:50:43.427169 USB0 port 0 scanning...
936 12:50:43.430156 scan_static_bus for USB0 port 0
937 12:50:43.430682 USB3 port 0 enabled
938 12:50:43.433409 USB3 port 1 enabled
939 12:50:43.436877 USB3 port 2 disabled
940 12:50:43.437413 USB3 port 3 disabled
941 12:50:43.440689 USB3 port 0 scanning...
942 12:50:43.444208 scan_static_bus for USB3 port 0
943 12:50:43.447252 scan_static_bus for USB3 port 0 done
944 12:50:43.453463 scan_bus: bus USB3 port 0 finished in 6 msecs
945 12:50:43.453989 USB3 port 1 scanning...
946 12:50:43.457130 scan_static_bus for USB3 port 1
947 12:50:43.460465 scan_static_bus for USB3 port 1 done
948 12:50:43.466974 scan_bus: bus USB3 port 1 finished in 6 msecs
949 12:50:43.470728 scan_static_bus for USB0 port 0 done
950 12:50:43.473475 scan_bus: bus USB0 port 0 finished in 43 msecs
951 12:50:43.477000 scan_static_bus for PCI: 00:0d.0 done
952 12:50:43.483895 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
953 12:50:43.487729 PCI: 00:14.0 scanning...
954 12:50:43.490325 scan_static_bus for PCI: 00:14.0
955 12:50:43.490823 USB0 port 0 enabled
956 12:50:43.493743 USB0 port 0 scanning...
957 12:50:43.497252 scan_static_bus for USB0 port 0
958 12:50:43.500298 USB2 port 0 disabled
959 12:50:43.500780 USB2 port 1 enabled
960 12:50:43.504015 USB2 port 2 enabled
961 12:50:43.507486 USB2 port 3 disabled
962 12:50:43.508064 USB2 port 4 enabled
963 12:50:43.511164 USB2 port 5 disabled
964 12:50:43.513691 USB2 port 6 disabled
965 12:50:43.514168 USB2 port 7 disabled
966 12:50:43.517462 USB2 port 8 disabled
967 12:50:43.518035 USB2 port 9 disabled
968 12:50:43.520621 USB3 port 0 disabled
969 12:50:43.523752 USB3 port 1 enabled
970 12:50:43.524229 USB3 port 2 disabled
971 12:50:43.527061 USB3 port 3 disabled
972 12:50:43.530557 USB2 port 1 scanning...
973 12:50:43.534245 scan_static_bus for USB2 port 1
974 12:50:43.536991 scan_static_bus for USB2 port 1 done
975 12:50:43.540474 scan_bus: bus USB2 port 1 finished in 6 msecs
976 12:50:43.543776 USB2 port 2 scanning...
977 12:50:43.547170 scan_static_bus for USB2 port 2
978 12:50:43.550320 scan_static_bus for USB2 port 2 done
979 12:50:43.557147 scan_bus: bus USB2 port 2 finished in 6 msecs
980 12:50:43.557626 USB2 port 4 scanning...
981 12:50:43.560691 scan_static_bus for USB2 port 4
982 12:50:43.563630 scan_static_bus for USB2 port 4 done
983 12:50:43.570628 scan_bus: bus USB2 port 4 finished in 6 msecs
984 12:50:43.573865 USB3 port 1 scanning...
985 12:50:43.577494 scan_static_bus for USB3 port 1
986 12:50:43.580414 scan_static_bus for USB3 port 1 done
987 12:50:43.583583 scan_bus: bus USB3 port 1 finished in 6 msecs
988 12:50:43.587321 scan_static_bus for USB0 port 0 done
989 12:50:43.594029 scan_bus: bus USB0 port 0 finished in 93 msecs
990 12:50:43.597268 scan_static_bus for PCI: 00:14.0 done
991 12:50:43.600363 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
992 12:50:43.603787 PCI: 00:14.3 scanning...
993 12:50:43.607142 scan_static_bus for PCI: 00:14.3
994 12:50:43.610768 GENERIC: 0.0 enabled
995 12:50:43.613845 scan_static_bus for PCI: 00:14.3 done
996 12:50:43.617388 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
997 12:50:43.620686 PCI: 00:15.0 scanning...
998 12:50:43.624028 scan_static_bus for PCI: 00:15.0
999 12:50:43.626897 I2C: 00:1a enabled
1000 12:50:43.627453 I2C: 00:31 enabled
1001 12:50:43.630737 I2C: 00:32 enabled
1002 12:50:43.634426 scan_static_bus for PCI: 00:15.0 done
1003 12:50:43.637308 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1004 12:50:43.640689 PCI: 00:15.1 scanning...
1005 12:50:43.643830 scan_static_bus for PCI: 00:15.1
1006 12:50:43.648180 I2C: 00:10 enabled
1007 12:50:43.651599 scan_static_bus for PCI: 00:15.1 done
1008 12:50:43.654782 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1009 12:50:43.658379 PCI: 00:15.2 scanning...
1010 12:50:43.661654 scan_static_bus for PCI: 00:15.2
1011 12:50:43.665765 scan_static_bus for PCI: 00:15.2 done
1012 12:50:43.668614 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1013 12:50:43.671980 PCI: 00:15.3 scanning...
1014 12:50:43.675238 scan_static_bus for PCI: 00:15.3
1015 12:50:43.678220 scan_static_bus for PCI: 00:15.3 done
1016 12:50:43.685197 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1017 12:50:43.685749 PCI: 00:19.1 scanning...
1018 12:50:43.688379 scan_static_bus for PCI: 00:19.1
1019 12:50:43.691735 I2C: 00:15 enabled
1020 12:50:43.695195 scan_static_bus for PCI: 00:19.1 done
1021 12:50:43.701709 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1022 12:50:43.702149 PCI: 00:1d.0 scanning...
1023 12:50:43.705106 do_pci_scan_bridge for PCI: 00:1d.0
1024 12:50:43.708488 PCI: pci_scan_bus for bus 01
1025 12:50:43.712048 PCI: 01:00.0 [1c5c/174a] enabled
1026 12:50:43.714965 GENERIC: 0.0 enabled
1027 12:50:43.718581 Enabling Common Clock Configuration
1028 12:50:43.721984 L1 Sub-State supported from root port 29
1029 12:50:43.725749 L1 Sub-State Support = 0xf
1030 12:50:43.728596 CommonModeRestoreTime = 0x28
1031 12:50:43.732035 Power On Value = 0x16, Power On Scale = 0x0
1032 12:50:43.735284 ASPM: Enabled L1
1033 12:50:43.738847 PCIe: Max_Payload_Size adjusted to 128
1034 12:50:43.745645 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1035 12:50:43.746218 PCI: 00:1e.2 scanning...
1036 12:50:43.749101 scan_generic_bus for PCI: 00:1e.2
1037 12:50:43.751986 SPI: 00 enabled
1038 12:50:43.759265 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1039 12:50:43.762094 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1040 12:50:43.765571 PCI: 00:1e.3 scanning...
1041 12:50:43.769105 scan_generic_bus for PCI: 00:1e.3
1042 12:50:43.772095 SPI: 00 enabled
1043 12:50:43.775645 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1044 12:50:43.781961 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1045 12:50:43.785525 PCI: 00:1f.0 scanning...
1046 12:50:43.788850 scan_static_bus for PCI: 00:1f.0
1047 12:50:43.789413 PNP: 0c09.0 enabled
1048 12:50:43.792131 PNP: 0c09.0 scanning...
1049 12:50:43.795407 scan_static_bus for PNP: 0c09.0
1050 12:50:43.798949 scan_static_bus for PNP: 0c09.0 done
1051 12:50:43.802281 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1052 12:50:43.809033 scan_static_bus for PCI: 00:1f.0 done
1053 12:50:43.812178 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1054 12:50:43.815298 PCI: 00:1f.2 scanning...
1055 12:50:43.818742 scan_static_bus for PCI: 00:1f.2
1056 12:50:43.822044 GENERIC: 0.0 enabled
1057 12:50:43.822515 GENERIC: 0.0 scanning...
1058 12:50:43.825868 scan_static_bus for GENERIC: 0.0
1059 12:50:43.829033 GENERIC: 0.0 enabled
1060 12:50:43.832255 GENERIC: 1.0 enabled
1061 12:50:43.835926 scan_static_bus for GENERIC: 0.0 done
1062 12:50:43.839014 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1063 12:50:43.842328 scan_static_bus for PCI: 00:1f.2 done
1064 12:50:43.849129 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1065 12:50:43.852255 PCI: 00:1f.3 scanning...
1066 12:50:43.855604 scan_static_bus for PCI: 00:1f.3
1067 12:50:43.858704 scan_static_bus for PCI: 00:1f.3 done
1068 12:50:43.862280 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1069 12:50:43.865618 PCI: 00:1f.5 scanning...
1070 12:50:43.868696 scan_generic_bus for PCI: 00:1f.5
1071 12:50:43.872507 scan_generic_bus for PCI: 00:1f.5 done
1072 12:50:43.878989 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1073 12:50:43.882248 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1074 12:50:43.885428 scan_static_bus for Root Device done
1075 12:50:43.892301 scan_bus: bus Root Device finished in 736 msecs
1076 12:50:43.892771 done
1077 12:50:43.899708 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1078 12:50:43.902282 Chrome EC: UHEPI supported
1079 12:50:43.909118 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1080 12:50:43.912715 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1081 12:50:43.918964 SPI flash protection: WPSW=0 SRP0=0
1082 12:50:43.922779 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1083 12:50:43.928984 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1084 12:50:43.932862 found VGA at PCI: 00:02.0
1085 12:50:43.933442 Setting up VGA for PCI: 00:02.0
1086 12:50:43.938739 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1087 12:50:43.945276 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1088 12:50:43.945705 Allocating resources...
1089 12:50:43.949248 Reading resources...
1090 12:50:43.952186 Root Device read_resources bus 0 link: 0
1091 12:50:43.955335 DOMAIN: 0000 read_resources bus 0 link: 0
1092 12:50:43.963014 PCI: 00:04.0 read_resources bus 1 link: 0
1093 12:50:43.966774 PCI: 00:04.0 read_resources bus 1 link: 0 done
1094 12:50:43.973565 PCI: 00:0d.0 read_resources bus 0 link: 0
1095 12:50:43.976731 USB0 port 0 read_resources bus 0 link: 0
1096 12:50:43.983039 USB0 port 0 read_resources bus 0 link: 0 done
1097 12:50:43.986806 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1098 12:50:43.989786 PCI: 00:14.0 read_resources bus 0 link: 0
1099 12:50:43.997050 USB0 port 0 read_resources bus 0 link: 0
1100 12:50:43.999692 USB0 port 0 read_resources bus 0 link: 0 done
1101 12:50:44.006849 PCI: 00:14.0 read_resources bus 0 link: 0 done
1102 12:50:44.009967 PCI: 00:14.3 read_resources bus 0 link: 0
1103 12:50:44.016482 PCI: 00:14.3 read_resources bus 0 link: 0 done
1104 12:50:44.020433 PCI: 00:15.0 read_resources bus 0 link: 0
1105 12:50:44.027161 PCI: 00:15.0 read_resources bus 0 link: 0 done
1106 12:50:44.030197 PCI: 00:15.1 read_resources bus 0 link: 0
1107 12:50:44.036840 PCI: 00:15.1 read_resources bus 0 link: 0 done
1108 12:50:44.040452 PCI: 00:19.1 read_resources bus 0 link: 0
1109 12:50:44.047367 PCI: 00:19.1 read_resources bus 0 link: 0 done
1110 12:50:44.050269 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 12:50:44.057363 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 12:50:44.060661 PCI: 00:1e.2 read_resources bus 2 link: 0
1113 12:50:44.067250 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1114 12:50:44.071022 PCI: 00:1e.3 read_resources bus 3 link: 0
1115 12:50:44.077352 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1116 12:50:44.080748 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 12:50:44.087495 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 12:50:44.091155 PCI: 00:1f.2 read_resources bus 0 link: 0
1119 12:50:44.093983 GENERIC: 0.0 read_resources bus 0 link: 0
1120 12:50:44.100761 GENERIC: 0.0 read_resources bus 0 link: 0 done
1121 12:50:44.104168 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1122 12:50:44.111587 DOMAIN: 0000 read_resources bus 0 link: 0 done
1123 12:50:44.114965 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1124 12:50:44.121830 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1125 12:50:44.125702 Root Device read_resources bus 0 link: 0 done
1126 12:50:44.128095 Done reading resources.
1127 12:50:44.134813 Show resources in subtree (Root Device)...After reading.
1128 12:50:44.138667 Root Device child on link 0 DOMAIN: 0000
1129 12:50:44.141659 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1130 12:50:44.151436 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1131 12:50:44.161486 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1132 12:50:44.162059 PCI: 00:00.0
1133 12:50:44.171401 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1134 12:50:44.181269 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1135 12:50:44.191672 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1136 12:50:44.201461 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1137 12:50:44.211685 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1138 12:50:44.221635 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1139 12:50:44.227899 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1140 12:50:44.238305 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1141 12:50:44.248387 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1142 12:50:44.258153 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1143 12:50:44.268224 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1144 12:50:44.274736 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1145 12:50:44.284848 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1146 12:50:44.294851 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1147 12:50:44.304820 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1148 12:50:44.315191 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1149 12:50:44.325044 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1150 12:50:44.331554 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1151 12:50:44.341859 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1152 12:50:44.351733 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1153 12:50:44.352315 PCI: 00:02.0
1154 12:50:44.364565 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1155 12:50:44.374784 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1156 12:50:44.381452 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1157 12:50:44.387941 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1158 12:50:44.398226 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1159 12:50:44.398797 GENERIC: 0.0
1160 12:50:44.401692 PCI: 00:05.0
1161 12:50:44.411459 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1162 12:50:44.415241 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1163 12:50:44.417831 GENERIC: 0.0
1164 12:50:44.418304 PCI: 00:08.0
1165 12:50:44.427912 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 12:50:44.431621 PCI: 00:0a.0
1167 12:50:44.434821 PCI: 00:0d.0 child on link 0 USB0 port 0
1168 12:50:44.444723 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1169 12:50:44.447936 USB0 port 0 child on link 0 USB3 port 0
1170 12:50:44.451622 USB3 port 0
1171 12:50:44.452208 USB3 port 1
1172 12:50:44.454428 USB3 port 2
1173 12:50:44.454899 USB3 port 3
1174 12:50:44.461237 PCI: 00:14.0 child on link 0 USB0 port 0
1175 12:50:44.471253 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1176 12:50:44.474610 USB0 port 0 child on link 0 USB2 port 0
1177 12:50:44.477927 USB2 port 0
1178 12:50:44.478494 USB2 port 1
1179 12:50:44.481771 USB2 port 2
1180 12:50:44.482379 USB2 port 3
1181 12:50:44.484396 USB2 port 4
1182 12:50:44.484868 USB2 port 5
1183 12:50:44.488339 USB2 port 6
1184 12:50:44.488910 USB2 port 7
1185 12:50:44.491141 USB2 port 8
1186 12:50:44.491608 USB2 port 9
1187 12:50:44.494428 USB3 port 0
1188 12:50:44.494896 USB3 port 1
1189 12:50:44.497787 USB3 port 2
1190 12:50:44.498271 USB3 port 3
1191 12:50:44.501417 PCI: 00:14.2
1192 12:50:44.511428 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1193 12:50:44.521123 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1194 12:50:44.524538 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1195 12:50:44.534513 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 12:50:44.537546 GENERIC: 0.0
1197 12:50:44.541290 PCI: 00:15.0 child on link 0 I2C: 00:1a
1198 12:50:44.551209 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 12:50:44.554537 I2C: 00:1a
1200 12:50:44.555160 I2C: 00:31
1201 12:50:44.558029 I2C: 00:32
1202 12:50:44.561409 PCI: 00:15.1 child on link 0 I2C: 00:10
1203 12:50:44.571269 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 12:50:44.572040 I2C: 00:10
1205 12:50:44.574353 PCI: 00:15.2
1206 12:50:44.584222 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 12:50:44.584779 PCI: 00:15.3
1208 12:50:44.594490 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 12:50:44.598012 PCI: 00:16.0
1210 12:50:44.607595 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 12:50:44.608154 PCI: 00:19.0
1212 12:50:44.614883 PCI: 00:19.1 child on link 0 I2C: 00:15
1213 12:50:44.624345 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:50:44.624915 I2C: 00:15
1215 12:50:44.627881 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1216 12:50:44.637981 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1217 12:50:44.647590 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1218 12:50:44.657349 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1219 12:50:44.657898 GENERIC: 0.0
1220 12:50:44.660933 PCI: 01:00.0
1221 12:50:44.671370 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 12:50:44.680891 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1223 12:50:44.687669 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1224 12:50:44.690700 PCI: 00:1e.0
1225 12:50:44.701286 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1226 12:50:44.704166 PCI: 00:1e.2 child on link 0 SPI: 00
1227 12:50:44.714061 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 12:50:44.717489 SPI: 00
1229 12:50:44.720530 PCI: 00:1e.3 child on link 0 SPI: 00
1230 12:50:44.730440 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1231 12:50:44.731209 SPI: 00
1232 12:50:44.736931 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1233 12:50:44.744254 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1234 12:50:44.747204 PNP: 0c09.0
1235 12:50:44.753811 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1236 12:50:44.760680 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1237 12:50:44.770766 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1238 12:50:44.777240 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1239 12:50:44.783830 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1240 12:50:44.784382 GENERIC: 0.0
1241 12:50:44.787163 GENERIC: 1.0
1242 12:50:44.787630 PCI: 00:1f.3
1243 12:50:44.797349 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1244 12:50:44.807248 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1245 12:50:44.810494 PCI: 00:1f.5
1246 12:50:44.820138 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1247 12:50:44.823909 CPU_CLUSTER: 0 child on link 0 APIC: 00
1248 12:50:44.824478 APIC: 00
1249 12:50:44.827464 APIC: 01
1250 12:50:44.828032 APIC: 02
1251 12:50:44.828408 APIC: 05
1252 12:50:44.830197 APIC: 07
1253 12:50:44.830661 APIC: 06
1254 12:50:44.833482 APIC: 03
1255 12:50:44.833948 APIC: 04
1256 12:50:44.840472 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1257 12:50:44.846931 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1258 12:50:44.853656 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1259 12:50:44.860511 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1260 12:50:44.863607 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1261 12:50:44.866945 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1262 12:50:44.870571 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1263 12:50:44.880377 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1264 12:50:44.887046 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1265 12:50:44.894187 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1266 12:50:44.900528 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1267 12:50:44.907011 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1268 12:50:44.913803 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1269 12:50:44.923664 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1270 12:50:44.930721 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1271 12:50:44.933964 DOMAIN: 0000: Resource ranges:
1272 12:50:44.936974 * Base: 1000, Size: 800, Tag: 100
1273 12:50:44.940293 * Base: 1900, Size: e700, Tag: 100
1274 12:50:44.947391 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1275 12:50:44.954288 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1276 12:50:44.960709 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1277 12:50:44.966821 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1278 12:50:44.974465 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1279 12:50:44.983477 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1280 12:50:44.990254 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1281 12:50:44.996654 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1282 12:50:45.006809 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1283 12:50:45.014093 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1284 12:50:45.020326 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1285 12:50:45.030418 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1286 12:50:45.036474 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1287 12:50:45.043707 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1288 12:50:45.053718 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1289 12:50:45.060266 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1290 12:50:45.066939 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1291 12:50:45.076548 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1292 12:50:45.083145 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1293 12:50:45.090012 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1294 12:50:45.099596 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1295 12:50:45.106703 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1296 12:50:45.113151 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1297 12:50:45.123038 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1298 12:50:45.129675 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1299 12:50:45.133336 DOMAIN: 0000: Resource ranges:
1300 12:50:45.136136 * Base: 7fc00000, Size: 40400000, Tag: 200
1301 12:50:45.139706 * Base: d0000000, Size: 28000000, Tag: 200
1302 12:50:45.146757 * Base: fa000000, Size: 1000000, Tag: 200
1303 12:50:45.149848 * Base: fb001000, Size: 2fff000, Tag: 200
1304 12:50:45.153125 * Base: fe010000, Size: 2e000, Tag: 200
1305 12:50:45.156417 * Base: fe03f000, Size: d41000, Tag: 200
1306 12:50:45.163469 * Base: fed88000, Size: 8000, Tag: 200
1307 12:50:45.166563 * Base: fed93000, Size: d000, Tag: 200
1308 12:50:45.169843 * Base: feda2000, Size: 1e000, Tag: 200
1309 12:50:45.172970 * Base: fede0000, Size: 1220000, Tag: 200
1310 12:50:45.179924 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1311 12:50:45.186429 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1312 12:50:45.193449 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1313 12:50:45.199448 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1314 12:50:45.206598 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1315 12:50:45.213536 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1316 12:50:45.220054 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1317 12:50:45.226785 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1318 12:50:45.233317 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1319 12:50:45.240353 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1320 12:50:45.246497 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1321 12:50:45.253224 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1322 12:50:45.259866 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1323 12:50:45.266798 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1324 12:50:45.273510 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1325 12:50:45.280055 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1326 12:50:45.286826 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1327 12:50:45.293365 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1328 12:50:45.299898 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1329 12:50:45.306824 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1330 12:50:45.313658 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1331 12:50:45.320108 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1332 12:50:45.326870 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1333 12:50:45.333500 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1334 12:50:45.340258 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1335 12:50:45.343640 PCI: 00:1d.0: Resource ranges:
1336 12:50:45.350296 * Base: 7fc00000, Size: 100000, Tag: 200
1337 12:50:45.356802 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1338 12:50:45.363488 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1339 12:50:45.366514 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1340 12:50:45.376641 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1341 12:50:45.383271 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1342 12:50:45.389968 Root Device assign_resources, bus 0 link: 0
1343 12:50:45.393073 DOMAIN: 0000 assign_resources, bus 0 link: 0
1344 12:50:45.403103 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1345 12:50:45.410109 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1346 12:50:45.417252 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1347 12:50:45.427147 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1348 12:50:45.430283 PCI: 00:04.0 assign_resources, bus 1 link: 0
1349 12:50:45.436632 PCI: 00:04.0 assign_resources, bus 1 link: 0
1350 12:50:45.443557 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1351 12:50:45.450180 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1352 12:50:45.460535 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1353 12:50:45.463863 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1354 12:50:45.470504 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1355 12:50:45.477138 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1356 12:50:45.480454 PCI: 00:14.0 assign_resources, bus 0 link: 0
1357 12:50:45.487063 PCI: 00:14.0 assign_resources, bus 0 link: 0
1358 12:50:45.493843 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1359 12:50:45.504080 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1360 12:50:45.510481 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1361 12:50:45.517215 PCI: 00:14.3 assign_resources, bus 0 link: 0
1362 12:50:45.520244 PCI: 00:14.3 assign_resources, bus 0 link: 0
1363 12:50:45.527263 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1364 12:50:45.533727 PCI: 00:15.0 assign_resources, bus 0 link: 0
1365 12:50:45.537299 PCI: 00:15.0 assign_resources, bus 0 link: 0
1366 12:50:45.547558 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1367 12:50:45.550856 PCI: 00:15.1 assign_resources, bus 0 link: 0
1368 12:50:45.554339 PCI: 00:15.1 assign_resources, bus 0 link: 0
1369 12:50:45.563914 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1370 12:50:45.570694 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1371 12:50:45.580567 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1372 12:50:45.587340 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1373 12:50:45.594121 PCI: 00:19.1 assign_resources, bus 0 link: 0
1374 12:50:45.597867 PCI: 00:19.1 assign_resources, bus 0 link: 0
1375 12:50:45.607446 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1376 12:50:45.617496 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1377 12:50:45.623728 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1378 12:50:45.627643 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1379 12:50:45.637830 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1380 12:50:45.644583 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1381 12:50:45.654290 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1382 12:50:45.657359 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1383 12:50:45.667394 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1384 12:50:45.670957 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1385 12:50:45.674350 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1386 12:50:45.684783 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1387 12:50:45.687715 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1388 12:50:45.694238 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1389 12:50:45.697783 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1390 12:50:45.700642 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1391 12:50:45.707421 LPC: Trying to open IO window from 800 size 1ff
1392 12:50:45.714382 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1393 12:50:45.724333 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1394 12:50:45.731201 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1395 12:50:45.738468 DOMAIN: 0000 assign_resources, bus 0 link: 0
1396 12:50:45.741307 Root Device assign_resources, bus 0 link: 0
1397 12:50:45.744538 Done setting resources.
1398 12:50:45.751428 Show resources in subtree (Root Device)...After assigning values.
1399 12:50:45.754703 Root Device child on link 0 DOMAIN: 0000
1400 12:50:45.757649 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1401 12:50:45.767739 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1402 12:50:45.777924 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1403 12:50:45.781092 PCI: 00:00.0
1404 12:50:45.787722 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1405 12:50:45.797552 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1406 12:50:45.807812 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1407 12:50:45.817985 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1408 12:50:45.827775 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1409 12:50:45.838282 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1410 12:50:45.844910 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1411 12:50:45.854573 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1412 12:50:45.864641 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1413 12:50:45.874731 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1414 12:50:45.884291 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1415 12:50:45.891138 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1416 12:50:45.901471 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1417 12:50:45.911438 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1418 12:50:45.920880 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1419 12:50:45.931158 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1420 12:50:45.941694 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1421 12:50:45.948177 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1422 12:50:45.958259 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1423 12:50:45.968279 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1424 12:50:45.968856 PCI: 00:02.0
1425 12:50:45.981434 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1426 12:50:45.991638 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1427 12:50:46.001334 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1428 12:50:46.004526 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1429 12:50:46.014470 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1430 12:50:46.018237 GENERIC: 0.0
1431 12:50:46.018895 PCI: 00:05.0
1432 12:50:46.027789 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1433 12:50:46.035039 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1434 12:50:46.035668 GENERIC: 0.0
1435 12:50:46.038310 PCI: 00:08.0
1436 12:50:46.048221 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1437 12:50:46.048799 PCI: 00:0a.0
1438 12:50:46.054830 PCI: 00:0d.0 child on link 0 USB0 port 0
1439 12:50:46.064803 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1440 12:50:46.068051 USB0 port 0 child on link 0 USB3 port 0
1441 12:50:46.071454 USB3 port 0
1442 12:50:46.072019 USB3 port 1
1443 12:50:46.074954 USB3 port 2
1444 12:50:46.075564 USB3 port 3
1445 12:50:46.081326 PCI: 00:14.0 child on link 0 USB0 port 0
1446 12:50:46.091261 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1447 12:50:46.094717 USB0 port 0 child on link 0 USB2 port 0
1448 12:50:46.095216 USB2 port 0
1449 12:50:46.097885 USB2 port 1
1450 12:50:46.102074 USB2 port 2
1451 12:50:46.102538 USB2 port 3
1452 12:50:46.104689 USB2 port 4
1453 12:50:46.105210 USB2 port 5
1454 12:50:46.108047 USB2 port 6
1455 12:50:46.108510 USB2 port 7
1456 12:50:46.111349 USB2 port 8
1457 12:50:46.111814 USB2 port 9
1458 12:50:46.114463 USB3 port 0
1459 12:50:46.114881 USB3 port 1
1460 12:50:46.118587 USB3 port 2
1461 12:50:46.119004 USB3 port 3
1462 12:50:46.121191 PCI: 00:14.2
1463 12:50:46.131217 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1464 12:50:46.141176 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1465 12:50:46.144403 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1466 12:50:46.157539 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1467 12:50:46.157711 GENERIC: 0.0
1468 12:50:46.161135 PCI: 00:15.0 child on link 0 I2C: 00:1a
1469 12:50:46.170776 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1470 12:50:46.174575 I2C: 00:1a
1471 12:50:46.174668 I2C: 00:31
1472 12:50:46.177540 I2C: 00:32
1473 12:50:46.181012 PCI: 00:15.1 child on link 0 I2C: 00:10
1474 12:50:46.190787 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1475 12:50:46.194235 I2C: 00:10
1476 12:50:46.194332 PCI: 00:15.2
1477 12:50:46.204333 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1478 12:50:46.208081 PCI: 00:15.3
1479 12:50:46.217528 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1480 12:50:46.217643 PCI: 00:16.0
1481 12:50:46.227778 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1482 12:50:46.230990 PCI: 00:19.0
1483 12:50:46.234291 PCI: 00:19.1 child on link 0 I2C: 00:15
1484 12:50:46.244314 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1485 12:50:46.247884 I2C: 00:15
1486 12:50:46.250859 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1487 12:50:46.261164 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1488 12:50:46.271022 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1489 12:50:46.284614 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1490 12:50:46.284769 GENERIC: 0.0
1491 12:50:46.287639 PCI: 01:00.0
1492 12:50:46.297755 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1493 12:50:46.307742 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1494 12:50:46.317723 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1495 12:50:46.321100 PCI: 00:1e.0
1496 12:50:46.330964 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1497 12:50:46.334669 PCI: 00:1e.2 child on link 0 SPI: 00
1498 12:50:46.344441 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1499 12:50:46.347749 SPI: 00
1500 12:50:46.351040 PCI: 00:1e.3 child on link 0 SPI: 00
1501 12:50:46.361464 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1502 12:50:46.361643 SPI: 00
1503 12:50:46.367752 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1504 12:50:46.374919 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1505 12:50:46.378242 PNP: 0c09.0
1506 12:50:46.384970 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1507 12:50:46.391664 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1508 12:50:46.398330 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1509 12:50:46.408362 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1510 12:50:46.415191 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1511 12:50:46.415437 GENERIC: 0.0
1512 12:50:46.418223 GENERIC: 1.0
1513 12:50:46.418459 PCI: 00:1f.3
1514 12:50:46.428466 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1515 12:50:46.438661 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1516 12:50:46.441943 PCI: 00:1f.5
1517 12:50:46.452050 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1518 12:50:46.455293 CPU_CLUSTER: 0 child on link 0 APIC: 00
1519 12:50:46.458513 APIC: 00
1520 12:50:46.458974 APIC: 01
1521 12:50:46.459387 APIC: 02
1522 12:50:46.462280 APIC: 05
1523 12:50:46.462876 APIC: 07
1524 12:50:46.465674 APIC: 06
1525 12:50:46.466203 APIC: 03
1526 12:50:46.466539 APIC: 04
1527 12:50:46.469177 Done allocating resources.
1528 12:50:46.475530 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1529 12:50:46.481986 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1530 12:50:46.485603 Configure GPIOs for I2S audio on UP4.
1531 12:50:46.492525 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1532 12:50:46.495612 Enabling resources...
1533 12:50:46.498691 PCI: 00:00.0 subsystem <- 8086/9a12
1534 12:50:46.501976 PCI: 00:00.0 cmd <- 06
1535 12:50:46.505306 PCI: 00:02.0 subsystem <- 8086/9a40
1536 12:50:46.506002 PCI: 00:02.0 cmd <- 03
1537 12:50:46.512107 PCI: 00:04.0 subsystem <- 8086/9a03
1538 12:50:46.512653 PCI: 00:04.0 cmd <- 02
1539 12:50:46.515937 PCI: 00:05.0 subsystem <- 8086/9a19
1540 12:50:46.518884 PCI: 00:05.0 cmd <- 02
1541 12:50:46.522414 PCI: 00:08.0 subsystem <- 8086/9a11
1542 12:50:46.525739 PCI: 00:08.0 cmd <- 06
1543 12:50:46.528679 PCI: 00:0d.0 subsystem <- 8086/9a13
1544 12:50:46.532517 PCI: 00:0d.0 cmd <- 02
1545 12:50:46.535839 PCI: 00:14.0 subsystem <- 8086/a0ed
1546 12:50:46.539205 PCI: 00:14.0 cmd <- 02
1547 12:50:46.542328 PCI: 00:14.2 subsystem <- 8086/a0ef
1548 12:50:46.545783 PCI: 00:14.2 cmd <- 02
1549 12:50:46.548952 PCI: 00:14.3 subsystem <- 8086/a0f0
1550 12:50:46.549418 PCI: 00:14.3 cmd <- 02
1551 12:50:46.555960 PCI: 00:15.0 subsystem <- 8086/a0e8
1552 12:50:46.556517 PCI: 00:15.0 cmd <- 02
1553 12:50:46.559199 PCI: 00:15.1 subsystem <- 8086/a0e9
1554 12:50:46.562642 PCI: 00:15.1 cmd <- 02
1555 12:50:46.566315 PCI: 00:15.2 subsystem <- 8086/a0ea
1556 12:50:46.569214 PCI: 00:15.2 cmd <- 02
1557 12:50:46.572755 PCI: 00:15.3 subsystem <- 8086/a0eb
1558 12:50:46.575949 PCI: 00:15.3 cmd <- 02
1559 12:50:46.579547 PCI: 00:16.0 subsystem <- 8086/a0e0
1560 12:50:46.582589 PCI: 00:16.0 cmd <- 02
1561 12:50:46.586383 PCI: 00:19.1 subsystem <- 8086/a0c6
1562 12:50:46.589145 PCI: 00:19.1 cmd <- 02
1563 12:50:46.592625 PCI: 00:1d.0 bridge ctrl <- 0013
1564 12:50:46.595585 PCI: 00:1d.0 subsystem <- 8086/a0b0
1565 12:50:46.596050 PCI: 00:1d.0 cmd <- 06
1566 12:50:46.602630 PCI: 00:1e.0 subsystem <- 8086/a0a8
1567 12:50:46.603255 PCI: 00:1e.0 cmd <- 06
1568 12:50:46.605891 PCI: 00:1e.2 subsystem <- 8086/a0aa
1569 12:50:46.609455 PCI: 00:1e.2 cmd <- 06
1570 12:50:46.612797 PCI: 00:1e.3 subsystem <- 8086/a0ab
1571 12:50:46.615809 PCI: 00:1e.3 cmd <- 02
1572 12:50:46.619211 PCI: 00:1f.0 subsystem <- 8086/a087
1573 12:50:46.622854 PCI: 00:1f.0 cmd <- 407
1574 12:50:46.626404 PCI: 00:1f.3 subsystem <- 8086/a0c8
1575 12:50:46.629142 PCI: 00:1f.3 cmd <- 02
1576 12:50:46.632794 PCI: 00:1f.5 subsystem <- 8086/a0a4
1577 12:50:46.636123 PCI: 00:1f.5 cmd <- 406
1578 12:50:46.639273 PCI: 01:00.0 cmd <- 02
1579 12:50:46.643531 done.
1580 12:50:46.647021 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1581 12:50:46.650740 Initializing devices...
1582 12:50:46.654355 Root Device init
1583 12:50:46.657211 Chrome EC: Set SMI mask to 0x0000000000000000
1584 12:50:46.663687 Chrome EC: clear events_b mask to 0x0000000000000000
1585 12:50:46.670638 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1586 12:50:46.673771 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1587 12:50:46.681331 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1588 12:50:46.688222 Chrome EC: Set WAKE mask to 0x0000000000000000
1589 12:50:46.691408 fw_config match found: DB_USB=USB3_ACTIVE
1590 12:50:46.698324 Configure Right Type-C port orientation for retimer
1591 12:50:46.701465 Root Device init finished in 45 msecs
1592 12:50:46.705001 PCI: 00:00.0 init
1593 12:50:46.708264 CPU TDP = 9 Watts
1594 12:50:46.708827 CPU PL1 = 9 Watts
1595 12:50:46.711247 CPU PL2 = 40 Watts
1596 12:50:46.714713 CPU PL4 = 83 Watts
1597 12:50:46.718365 PCI: 00:00.0 init finished in 8 msecs
1598 12:50:46.718930 PCI: 00:02.0 init
1599 12:50:46.721745 GMA: Found VBT in CBFS
1600 12:50:46.724682 GMA: Found valid VBT in CBFS
1601 12:50:46.731422 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1602 12:50:46.738318 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1603 12:50:46.741366 PCI: 00:02.0 init finished in 18 msecs
1604 12:50:46.744774 PCI: 00:05.0 init
1605 12:50:46.748064 PCI: 00:05.0 init finished in 0 msecs
1606 12:50:46.751351 PCI: 00:08.0 init
1607 12:50:46.754677 PCI: 00:08.0 init finished in 0 msecs
1608 12:50:46.758287 PCI: 00:14.0 init
1609 12:50:46.761610 PCI: 00:14.0 init finished in 0 msecs
1610 12:50:46.762183 PCI: 00:14.2 init
1611 12:50:46.768216 PCI: 00:14.2 init finished in 0 msecs
1612 12:50:46.768802 PCI: 00:15.0 init
1613 12:50:46.771522 I2C bus 0 version 0x3230302a
1614 12:50:46.774483 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1615 12:50:46.778904 PCI: 00:15.0 init finished in 6 msecs
1616 12:50:46.781579 PCI: 00:15.1 init
1617 12:50:46.785189 I2C bus 1 version 0x3230302a
1618 12:50:46.788420 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1619 12:50:46.791788 PCI: 00:15.1 init finished in 6 msecs
1620 12:50:46.794840 PCI: 00:15.2 init
1621 12:50:46.798194 I2C bus 2 version 0x3230302a
1622 12:50:46.801500 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1623 12:50:46.805025 PCI: 00:15.2 init finished in 6 msecs
1624 12:50:46.808256 PCI: 00:15.3 init
1625 12:50:46.808681 I2C bus 3 version 0x3230302a
1626 12:50:46.815424 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1627 12:50:46.818356 PCI: 00:15.3 init finished in 6 msecs
1628 12:50:46.818775 PCI: 00:16.0 init
1629 12:50:46.825189 PCI: 00:16.0 init finished in 0 msecs
1630 12:50:46.825707 PCI: 00:19.1 init
1631 12:50:46.828234 I2C bus 5 version 0x3230302a
1632 12:50:46.831738 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1633 12:50:46.834891 PCI: 00:19.1 init finished in 6 msecs
1634 12:50:46.838610 PCI: 00:1d.0 init
1635 12:50:46.841548 Initializing PCH PCIe bridge.
1636 12:50:46.844864 PCI: 00:1d.0 init finished in 3 msecs
1637 12:50:46.848507 PCI: 00:1f.0 init
1638 12:50:46.851699 IOAPIC: Initializing IOAPIC at 0xfec00000
1639 12:50:46.858519 IOAPIC: Bootstrap Processor Local APIC = 0x00
1640 12:50:46.859170 IOAPIC: ID = 0x02
1641 12:50:46.862319 IOAPIC: Dumping registers
1642 12:50:46.865691 reg 0x0000: 0x02000000
1643 12:50:46.868805 reg 0x0001: 0x00770020
1644 12:50:46.869380 reg 0x0002: 0x00000000
1645 12:50:46.875258 PCI: 00:1f.0 init finished in 21 msecs
1646 12:50:46.875860 PCI: 00:1f.2 init
1647 12:50:46.879210 Disabling ACPI via APMC.
1648 12:50:46.882747 APMC done.
1649 12:50:46.885393 PCI: 00:1f.2 init finished in 5 msecs
1650 12:50:46.896863 PCI: 01:00.0 init
1651 12:50:46.900061 PCI: 01:00.0 init finished in 0 msecs
1652 12:50:46.903616 PNP: 0c09.0 init
1653 12:50:46.910654 Google Chrome EC uptime: 8.394 seconds
1654 12:50:46.913592 Google Chrome AP resets since EC boot: 1
1655 12:50:46.916921 Google Chrome most recent AP reset causes:
1656 12:50:46.920388 0.350: 32775 shutdown: entering G3
1657 12:50:46.926919 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1658 12:50:46.930304 PNP: 0c09.0 init finished in 23 msecs
1659 12:50:46.936641 Devices initialized
1660 12:50:46.939720 Show all devs... After init.
1661 12:50:46.943226 Root Device: enabled 1
1662 12:50:46.943797 DOMAIN: 0000: enabled 1
1663 12:50:46.947153 CPU_CLUSTER: 0: enabled 1
1664 12:50:46.949735 PCI: 00:00.0: enabled 1
1665 12:50:46.953318 PCI: 00:02.0: enabled 1
1666 12:50:46.953886 PCI: 00:04.0: enabled 1
1667 12:50:46.956303 PCI: 00:05.0: enabled 1
1668 12:50:46.959423 PCI: 00:06.0: enabled 0
1669 12:50:46.963012 PCI: 00:07.0: enabled 0
1670 12:50:46.963627 PCI: 00:07.1: enabled 0
1671 12:50:46.966235 PCI: 00:07.2: enabled 0
1672 12:50:46.969918 PCI: 00:07.3: enabled 0
1673 12:50:46.973296 PCI: 00:08.0: enabled 1
1674 12:50:46.973859 PCI: 00:09.0: enabled 0
1675 12:50:46.976076 PCI: 00:0a.0: enabled 0
1676 12:50:46.979957 PCI: 00:0d.0: enabled 1
1677 12:50:46.980509 PCI: 00:0d.1: enabled 0
1678 12:50:46.983380 PCI: 00:0d.2: enabled 0
1679 12:50:46.986661 PCI: 00:0d.3: enabled 0
1680 12:50:46.989592 PCI: 00:0e.0: enabled 0
1681 12:50:46.990095 PCI: 00:10.2: enabled 1
1682 12:50:46.993165 PCI: 00:10.6: enabled 0
1683 12:50:46.996381 PCI: 00:10.7: enabled 0
1684 12:50:46.999752 PCI: 00:12.0: enabled 0
1685 12:50:47.000336 PCI: 00:12.6: enabled 0
1686 12:50:47.002978 PCI: 00:13.0: enabled 0
1687 12:50:47.006101 PCI: 00:14.0: enabled 1
1688 12:50:47.010070 PCI: 00:14.1: enabled 0
1689 12:50:47.010637 PCI: 00:14.2: enabled 1
1690 12:50:47.013043 PCI: 00:14.3: enabled 1
1691 12:50:47.016452 PCI: 00:15.0: enabled 1
1692 12:50:47.019733 PCI: 00:15.1: enabled 1
1693 12:50:47.020321 PCI: 00:15.2: enabled 1
1694 12:50:47.022881 PCI: 00:15.3: enabled 1
1695 12:50:47.026200 PCI: 00:16.0: enabled 1
1696 12:50:47.026766 PCI: 00:16.1: enabled 0
1697 12:50:47.029420 PCI: 00:16.2: enabled 0
1698 12:50:47.032771 PCI: 00:16.3: enabled 0
1699 12:50:47.036112 PCI: 00:16.4: enabled 0
1700 12:50:47.036679 PCI: 00:16.5: enabled 0
1701 12:50:47.039559 PCI: 00:17.0: enabled 0
1702 12:50:47.042731 PCI: 00:19.0: enabled 0
1703 12:50:47.046210 PCI: 00:19.1: enabled 1
1704 12:50:47.046775 PCI: 00:19.2: enabled 0
1705 12:50:47.049564 PCI: 00:1c.0: enabled 1
1706 12:50:47.053023 PCI: 00:1c.1: enabled 0
1707 12:50:47.053589 PCI: 00:1c.2: enabled 0
1708 12:50:47.056441 PCI: 00:1c.3: enabled 0
1709 12:50:47.059664 PCI: 00:1c.4: enabled 0
1710 12:50:47.063015 PCI: 00:1c.5: enabled 0
1711 12:50:47.063622 PCI: 00:1c.6: enabled 1
1712 12:50:47.066264 PCI: 00:1c.7: enabled 0
1713 12:50:47.069902 PCI: 00:1d.0: enabled 1
1714 12:50:47.073036 PCI: 00:1d.1: enabled 0
1715 12:50:47.073589 PCI: 00:1d.2: enabled 1
1716 12:50:47.076305 PCI: 00:1d.3: enabled 0
1717 12:50:47.079839 PCI: 00:1e.0: enabled 1
1718 12:50:47.082904 PCI: 00:1e.1: enabled 0
1719 12:50:47.083538 PCI: 00:1e.2: enabled 1
1720 12:50:47.086174 PCI: 00:1e.3: enabled 1
1721 12:50:47.089452 PCI: 00:1f.0: enabled 1
1722 12:50:47.089917 PCI: 00:1f.1: enabled 0
1723 12:50:47.092814 PCI: 00:1f.2: enabled 1
1724 12:50:47.096111 PCI: 00:1f.3: enabled 1
1725 12:50:47.099562 PCI: 00:1f.4: enabled 0
1726 12:50:47.100138 PCI: 00:1f.5: enabled 1
1727 12:50:47.102744 PCI: 00:1f.6: enabled 0
1728 12:50:47.106343 PCI: 00:1f.7: enabled 0
1729 12:50:47.107036 APIC: 00: enabled 1
1730 12:50:47.109509 GENERIC: 0.0: enabled 1
1731 12:50:47.112761 GENERIC: 0.0: enabled 1
1732 12:50:47.115917 GENERIC: 1.0: enabled 1
1733 12:50:47.116395 GENERIC: 0.0: enabled 1
1734 12:50:47.119697 GENERIC: 1.0: enabled 1
1735 12:50:47.123148 USB0 port 0: enabled 1
1736 12:50:47.126214 GENERIC: 0.0: enabled 1
1737 12:50:47.126779 USB0 port 0: enabled 1
1738 12:50:47.129233 GENERIC: 0.0: enabled 1
1739 12:50:47.132930 I2C: 00:1a: enabled 1
1740 12:50:47.133502 I2C: 00:31: enabled 1
1741 12:50:47.136183 I2C: 00:32: enabled 1
1742 12:50:47.139717 I2C: 00:10: enabled 1
1743 12:50:47.140285 I2C: 00:15: enabled 1
1744 12:50:47.142574 GENERIC: 0.0: enabled 0
1745 12:50:47.146308 GENERIC: 1.0: enabled 0
1746 12:50:47.149512 GENERIC: 0.0: enabled 1
1747 12:50:47.150082 SPI: 00: enabled 1
1748 12:50:47.153123 SPI: 00: enabled 1
1749 12:50:47.153688 PNP: 0c09.0: enabled 1
1750 12:50:47.156447 GENERIC: 0.0: enabled 1
1751 12:50:47.159535 USB3 port 0: enabled 1
1752 12:50:47.162671 USB3 port 1: enabled 1
1753 12:50:47.163157 USB3 port 2: enabled 0
1754 12:50:47.165956 USB3 port 3: enabled 0
1755 12:50:47.169521 USB2 port 0: enabled 0
1756 12:50:47.169987 USB2 port 1: enabled 1
1757 12:50:47.172841 USB2 port 2: enabled 1
1758 12:50:47.176314 USB2 port 3: enabled 0
1759 12:50:47.179199 USB2 port 4: enabled 1
1760 12:50:47.179622 USB2 port 5: enabled 0
1761 12:50:47.182819 USB2 port 6: enabled 0
1762 12:50:47.185973 USB2 port 7: enabled 0
1763 12:50:47.186396 USB2 port 8: enabled 0
1764 12:50:47.189387 USB2 port 9: enabled 0
1765 12:50:47.192487 USB3 port 0: enabled 0
1766 12:50:47.192787 USB3 port 1: enabled 1
1767 12:50:47.195695 USB3 port 2: enabled 0
1768 12:50:47.199139 USB3 port 3: enabled 0
1769 12:50:47.202390 GENERIC: 0.0: enabled 1
1770 12:50:47.202570 GENERIC: 1.0: enabled 1
1771 12:50:47.205699 APIC: 01: enabled 1
1772 12:50:47.208893 APIC: 02: enabled 1
1773 12:50:47.209045 APIC: 05: enabled 1
1774 12:50:47.212192 APIC: 07: enabled 1
1775 12:50:47.212321 APIC: 06: enabled 1
1776 12:50:47.215738 APIC: 03: enabled 1
1777 12:50:47.218829 APIC: 04: enabled 1
1778 12:50:47.218979 PCI: 01:00.0: enabled 1
1779 12:50:47.225385 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1780 12:50:47.228953 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1781 12:50:47.235439 ELOG: NV offset 0xf30000 size 0x1000
1782 12:50:47.242330 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1783 12:50:47.248889 ELOG: Event(17) added with size 13 at 2023-09-19 12:50:47 UTC
1784 12:50:47.255894 ELOG: Event(92) added with size 9 at 2023-09-19 12:50:47 UTC
1785 12:50:47.262436 ELOG: Event(93) added with size 9 at 2023-09-19 12:50:47 UTC
1786 12:50:47.268955 ELOG: Event(9E) added with size 10 at 2023-09-19 12:50:47 UTC
1787 12:50:47.272250 ELOG: Event(9F) added with size 14 at 2023-09-19 12:50:47 UTC
1788 12:50:47.279332 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1789 12:50:47.285853 ELOG: Event(A1) added with size 10 at 2023-09-19 12:50:47 UTC
1790 12:50:47.292127 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1791 12:50:47.298929 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1792 12:50:47.299016 Finalize devices...
1793 12:50:47.302214 Devices finalized
1794 12:50:47.305902 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1795 12:50:47.312515 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1796 12:50:47.319197 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1797 12:50:47.322430 ME: HFSTS1 : 0x80030055
1798 12:50:47.325607 ME: HFSTS2 : 0x30280116
1799 12:50:47.332610 ME: HFSTS3 : 0x00000050
1800 12:50:47.336001 ME: HFSTS4 : 0x00004000
1801 12:50:47.339056 ME: HFSTS5 : 0x00000000
1802 12:50:47.345676 ME: HFSTS6 : 0x00400006
1803 12:50:47.349046 ME: Manufacturing Mode : YES
1804 12:50:47.352444 ME: SPI Protection Mode Enabled : NO
1805 12:50:47.356052 ME: FW Partition Table : OK
1806 12:50:47.358946 ME: Bringup Loader Failure : NO
1807 12:50:47.362542 ME: Firmware Init Complete : NO
1808 12:50:47.369212 ME: Boot Options Present : NO
1809 12:50:47.372353 ME: Update In Progress : NO
1810 12:50:47.375709 ME: D0i3 Support : YES
1811 12:50:47.379239 ME: Low Power State Enabled : NO
1812 12:50:47.382490 ME: CPU Replaced : YES
1813 12:50:47.385534 ME: CPU Replacement Valid : YES
1814 12:50:47.389398 ME: Current Working State : 5
1815 12:50:47.392278 ME: Current Operation State : 1
1816 12:50:47.395550 ME: Current Operation Mode : 3
1817 12:50:47.402638 ME: Error Code : 0
1818 12:50:47.405766 ME: Enhanced Debug Mode : NO
1819 12:50:47.409089 ME: CPU Debug Disabled : YES
1820 12:50:47.412538 ME: TXT Support : NO
1821 12:50:47.419422 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1822 12:50:47.427393 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1823 12:50:47.429220 CBFS: 'fallback/slic' not found.
1824 12:50:47.432516 ACPI: Writing ACPI tables at 76b01000.
1825 12:50:47.435978 ACPI: * FACS
1826 12:50:47.436059 ACPI: * DSDT
1827 12:50:47.439106 Ramoops buffer: 0x100000@0x76a00000.
1828 12:50:47.445999 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1829 12:50:47.449237 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1830 12:50:47.452607 Google Chrome EC: version:
1831 12:50:47.455758 ro: voema_v2.0.7540-147f8d37d1
1832 12:50:47.458994 rw: voema_v2.0.7540-147f8d37d1
1833 12:50:47.462277 running image: 2
1834 12:50:47.469015 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1835 12:50:47.472256 ACPI: * FADT
1836 12:50:47.472338 SCI is IRQ9
1837 12:50:47.475667 ACPI: added table 1/32, length now 40
1838 12:50:47.479109 ACPI: * SSDT
1839 12:50:47.482394 Found 1 CPU(s) with 8 core(s) each.
1840 12:50:47.485761 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1841 12:50:47.489350 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1842 12:50:47.495714 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1843 12:50:47.498998 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1844 12:50:47.505683 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1845 12:50:47.508976 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1846 12:50:47.515819 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1847 12:50:47.518979 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1848 12:50:47.528990 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1849 12:50:47.532601 \_SB.PCI0.RP09: Added StorageD3Enable property
1850 12:50:47.535717 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1851 12:50:47.538905 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1852 12:50:47.546945 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1853 12:50:47.550635 PS2K: Passing 80 keymaps to kernel
1854 12:50:47.556769 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1855 12:50:47.563530 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1856 12:50:47.570095 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1857 12:50:47.576512 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1858 12:50:47.583336 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1859 12:50:47.590169 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1860 12:50:47.596587 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1861 12:50:47.603447 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1862 12:50:47.606606 ACPI: added table 2/32, length now 44
1863 12:50:47.606690 ACPI: * MCFG
1864 12:50:47.613201 ACPI: added table 3/32, length now 48
1865 12:50:47.613285 ACPI: * TPM2
1866 12:50:47.616640 TPM2 log created at 0x769f0000
1867 12:50:47.619966 ACPI: added table 4/32, length now 52
1868 12:50:47.623381 ACPI: * MADT
1869 12:50:47.623463 SCI is IRQ9
1870 12:50:47.627268 ACPI: added table 5/32, length now 56
1871 12:50:47.629986 current = 76b09850
1872 12:50:47.630067 ACPI: * DMAR
1873 12:50:47.633545 ACPI: added table 6/32, length now 60
1874 12:50:47.640421 ACPI: added table 7/32, length now 64
1875 12:50:47.640506 ACPI: * HPET
1876 12:50:47.643570 ACPI: added table 8/32, length now 68
1877 12:50:47.646801 ACPI: done.
1878 12:50:47.646882 ACPI tables: 35216 bytes.
1879 12:50:47.650008 smbios_write_tables: 769ef000
1880 12:50:47.653675 EC returned error result code 3
1881 12:50:47.656614 Couldn't obtain OEM name from CBI
1882 12:50:47.661283 Create SMBIOS type 16
1883 12:50:47.664570 Create SMBIOS type 17
1884 12:50:47.668463 GENERIC: 0.0 (WIFI Device)
1885 12:50:47.668546 SMBIOS tables: 1750 bytes.
1886 12:50:47.674946 Writing table forward entry at 0x00000500
1887 12:50:47.681369 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1888 12:50:47.684541 Writing coreboot table at 0x76b25000
1889 12:50:47.691200 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1890 12:50:47.694654 1. 0000000000001000-000000000009ffff: RAM
1891 12:50:47.697662 2. 00000000000a0000-00000000000fffff: RESERVED
1892 12:50:47.704539 3. 0000000000100000-00000000769eefff: RAM
1893 12:50:47.707692 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1894 12:50:47.714684 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1895 12:50:47.721532 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1896 12:50:47.724781 7. 0000000077000000-000000007fbfffff: RESERVED
1897 12:50:47.727802 8. 00000000c0000000-00000000cfffffff: RESERVED
1898 12:50:47.734498 9. 00000000f8000000-00000000f9ffffff: RESERVED
1899 12:50:47.737893 10. 00000000fb000000-00000000fb000fff: RESERVED
1900 12:50:47.744946 11. 00000000fe000000-00000000fe00ffff: RESERVED
1901 12:50:47.748308 12. 00000000fed80000-00000000fed87fff: RESERVED
1902 12:50:47.754668 13. 00000000fed90000-00000000fed92fff: RESERVED
1903 12:50:47.757892 14. 00000000feda0000-00000000feda1fff: RESERVED
1904 12:50:47.761476 15. 00000000fedc0000-00000000feddffff: RESERVED
1905 12:50:47.767818 16. 0000000100000000-00000002803fffff: RAM
1906 12:50:47.771277 Passing 4 GPIOs to payload:
1907 12:50:47.775325 NAME | PORT | POLARITY | VALUE
1908 12:50:47.781339 lid | undefined | high | high
1909 12:50:47.784864 power | undefined | high | low
1910 12:50:47.791388 oprom | undefined | high | low
1911 12:50:47.795279 EC in RW | 0x000000e5 | high | high
1912 12:50:47.801373 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 5e7
1913 12:50:47.805089 coreboot table: 1576 bytes.
1914 12:50:47.808216 IMD ROOT 0. 0x76fff000 0x00001000
1915 12:50:47.811453 IMD SMALL 1. 0x76ffe000 0x00001000
1916 12:50:47.818528 FSP MEMORY 2. 0x76c4e000 0x003b0000
1917 12:50:47.821440 VPD 3. 0x76c4d000 0x00000367
1918 12:50:47.824873 RO MCACHE 4. 0x76c4c000 0x00000fdc
1919 12:50:47.828278 CONSOLE 5. 0x76c2c000 0x00020000
1920 12:50:47.831735 FMAP 6. 0x76c2b000 0x00000578
1921 12:50:47.834934 TIME STAMP 7. 0x76c2a000 0x00000910
1922 12:50:47.838545 VBOOT WORK 8. 0x76c16000 0x00014000
1923 12:50:47.841649 ROMSTG STCK 9. 0x76c15000 0x00001000
1924 12:50:47.844917 AFTER CAR 10. 0x76c0a000 0x0000b000
1925 12:50:47.851668 RAMSTAGE 11. 0x76b97000 0x00073000
1926 12:50:47.854939 REFCODE 12. 0x76b42000 0x00055000
1927 12:50:47.858320 SMM BACKUP 13. 0x76b32000 0x00010000
1928 12:50:47.861500 4f444749 14. 0x76b30000 0x00002000
1929 12:50:47.864850 EXT VBT15. 0x76b2d000 0x0000219f
1930 12:50:47.868300 COREBOOT 16. 0x76b25000 0x00008000
1931 12:50:47.871710 ACPI 17. 0x76b01000 0x00024000
1932 12:50:47.875190 ACPI GNVS 18. 0x76b00000 0x00001000
1933 12:50:47.878211 RAMOOPS 19. 0x76a00000 0x00100000
1934 12:50:47.884830 TPM2 TCGLOG20. 0x769f0000 0x00010000
1935 12:50:47.888218 SMBIOS 21. 0x769ef000 0x00000800
1936 12:50:47.888301 IMD small region:
1937 12:50:47.891576 IMD ROOT 0. 0x76ffec00 0x00000400
1938 12:50:47.898170 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1939 12:50:47.901802 POWER STATE 2. 0x76ffeb80 0x00000044
1940 12:50:47.904830 ROMSTAGE 3. 0x76ffeb60 0x00000004
1941 12:50:47.908163 MEM INFO 4. 0x76ffe980 0x000001e0
1942 12:50:47.914877 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1943 12:50:47.918496 MTRR: Physical address space:
1944 12:50:47.924911 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1945 12:50:47.928293 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1946 12:50:47.935293 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1947 12:50:47.941543 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1948 12:50:47.948070 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1949 12:50:47.954942 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1950 12:50:47.961819 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1951 12:50:47.964973 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 12:50:47.968220 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 12:50:47.974895 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 12:50:47.978469 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 12:50:47.981819 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 12:50:47.984843 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 12:50:47.988102 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 12:50:47.994905 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 12:50:47.998430 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 12:50:48.001753 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 12:50:48.004866 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 12:50:48.009224 call enable_fixed_mtrr()
1963 12:50:48.012331 CPU physical address size: 39 bits
1964 12:50:48.019125 MTRR: default type WB/UC MTRR counts: 6/6.
1965 12:50:48.022634 MTRR: UC selected as default type.
1966 12:50:48.029209 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1967 12:50:48.032557 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1968 12:50:48.039021 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1969 12:50:48.045786 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1970 12:50:48.052696 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1971 12:50:48.059677 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1972 12:50:48.062578 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 12:50:48.069521 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 12:50:48.072971 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 12:50:48.076149 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 12:50:48.079441 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 12:50:48.085825 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 12:50:48.089022 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 12:50:48.092449 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 12:50:48.095859 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 12:50:48.102941 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 12:50:48.106006 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 12:50:48.109595 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 12:50:48.112456 call enable_fixed_mtrr()
1985 12:50:48.115919 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 12:50:48.122755 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 12:50:48.126674 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 12:50:48.129442 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 12:50:48.133058 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 12:50:48.135975 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 12:50:48.142817 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 12:50:48.145979 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 12:50:48.149713 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 12:50:48.152499 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 12:50:48.156851 CPU physical address size: 39 bits
1996 12:50:48.163363 call enable_fixed_mtrr()
1997 12:50:48.166652 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 12:50:48.170153 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 12:50:48.173190 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 12:50:48.176757 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 12:50:48.183317 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 12:50:48.186607 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 12:50:48.190376 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 12:50:48.193536 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 12:50:48.199924 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 12:50:48.203678 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 12:50:48.206963 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 12:50:48.210010 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 12:50:48.217660 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 12:50:48.221022 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 12:50:48.224226 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 12:50:48.228218 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 12:50:48.234295 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 12:50:48.237666 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 12:50:48.240830 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 12:50:48.244387 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 12:50:48.247360 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 12:50:48.254574 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 12:50:48.257508 call enable_fixed_mtrr()
2020 12:50:48.260902 call enable_fixed_mtrr()
2021 12:50:48.264257 CPU physical address size: 39 bits
2022 12:50:48.267553 CPU physical address size: 39 bits
2023 12:50:48.270926 CPU physical address size: 39 bits
2024 12:50:48.274519 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 12:50:48.274601
2026 12:50:48.277652 MTRR check
2027 12:50:48.281022 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 12:50:48.284439 MTRR: Fixed MSR 0x259 0x0000000000000000
2029 12:50:48.287510 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 12:50:48.294101 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 12:50:48.297468 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 12:50:48.300857 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 12:50:48.303952 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 12:50:48.310858 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 12:50:48.313942 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 12:50:48.317153 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 12:50:48.323852 Fixed MTRRs : call enable_fixed_mtrr()
2038 12:50:48.323934 Enabled
2039 12:50:48.327336 Variable MTRRs: Enabled
2040 12:50:48.327418
2041 12:50:48.330339 CPU physical address size: 39 bits
2042 12:50:48.337171 BS: BS_WRITE_TABLES exit times (exec / console): 261 / 151 ms
2043 12:50:48.340830 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 12:50:48.344099 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 12:50:48.350367 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 12:50:48.353691 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 12:50:48.357196 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 12:50:48.360734 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 12:50:48.363961 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 12:50:48.370446 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 12:50:48.373908 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 12:50:48.377284 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 12:50:48.380460 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 12:50:48.387041 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 12:50:48.390455 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 12:50:48.393666 call enable_fixed_mtrr()
2057 12:50:48.397288 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 12:50:48.400569 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 12:50:48.407004 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 12:50:48.410523 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 12:50:48.413925 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 12:50:48.416717 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 12:50:48.423419 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 12:50:48.426699 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 12:50:48.430119 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 12:50:48.433453 CPU physical address size: 39 bits
2067 12:50:48.440043 call enable_fixed_mtrr()
2068 12:50:48.443959 Checking cr50 for pending updates
2069 12:50:48.444040 CPU physical address size: 39 bits
2070 12:50:48.449322 Reading cr50 TPM mode
2071 12:50:48.459432 BS: BS_PAYLOAD_LOAD entry times (exec / console): 111 / 6 ms
2072 12:50:48.469551 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2073 12:50:48.472939 Checking segment from ROM address 0xffc02b38
2074 12:50:48.476160 Checking segment from ROM address 0xffc02b54
2075 12:50:48.482941 Loading segment from ROM address 0xffc02b38
2076 12:50:48.483048 code (compression=0)
2077 12:50:48.492780 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2078 12:50:48.499636 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2079 12:50:48.502858 it's not compressed!
2080 12:50:48.642348 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2081 12:50:48.648754 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2082 12:50:48.655221 Loading segment from ROM address 0xffc02b54
2083 12:50:48.655303 Entry Point 0x30000000
2084 12:50:48.658768 Loaded segments
2085 12:50:48.665161 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2086 12:50:48.708342 Finalizing chipset.
2087 12:50:48.711503 Finalizing SMM.
2088 12:50:48.711585 APMC done.
2089 12:50:48.718411 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2090 12:50:48.721744 mp_park_aps done after 0 msecs.
2091 12:50:48.725332 Jumping to boot code at 0x30000000(0x76b25000)
2092 12:50:48.735053 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2093 12:50:48.735175
2094 12:50:48.735241
2095 12:50:48.735300
2096 12:50:48.738578 Starting depthcharge on Voema...
2097 12:50:48.738659
2098 12:50:48.738998 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2099 12:50:48.739121 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2100 12:50:48.739227 Setting prompt string to ['volteer:']
2101 12:50:48.739303 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2102 12:50:48.748300 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2103 12:50:48.748384
2104 12:50:48.754830 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2105 12:50:48.754916
2106 12:50:48.758158 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2107 12:50:48.762177
2108 12:50:48.762302 Failed to find eMMC card reader
2109 12:50:48.762374
2110 12:50:48.765447 Wipe memory regions:
2111 12:50:48.765534
2112 12:50:48.769262 [0x00000000001000, 0x000000000a0000)
2113 12:50:48.769345
2114 12:50:48.772112 [0x00000000100000, 0x00000030000000)
2115 12:50:48.800002
2116 12:50:48.803593 [0x00000032662db0, 0x000000769ef000)
2117 12:50:48.839232
2118 12:50:48.842410 [0x00000100000000, 0x00000280400000)
2119 12:50:49.044870
2120 12:50:49.048271 ec_init: CrosEC protocol v3 supported (256, 256)
2121 12:50:49.048858
2122 12:50:49.054820 update_port_state: port C0 state: usb enable 1 mux conn 0
2123 12:50:49.055406
2124 12:50:49.064484 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2125 12:50:49.065060
2126 12:50:49.068125 pmc_check_ipc_sts: STS_BUSY done after 1566 us
2127 12:50:49.071988
2128 12:50:49.074973 send_conn_disc_msg: pmc_send_cmd succeeded
2129 12:50:49.505783
2130 12:50:49.506365 R8152: Initializing
2131 12:50:49.506858
2132 12:50:49.509047 Version 6 (ocp_data = 5c30)
2133 12:50:49.509632
2134 12:50:49.511961 R8152: Done initializing
2135 12:50:49.512439
2136 12:50:49.515211 Adding net device
2137 12:50:49.817330
2138 12:50:49.820826 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2139 12:50:49.821400
2140 12:50:49.821765
2141 12:50:49.822104
2142 12:50:49.824431 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2144 12:50:49.926017 volteer: tftpboot 192.168.201.1 11570953/tftp-deploy-1e6smxml/kernel/bzImage 11570953/tftp-deploy-1e6smxml/kernel/cmdline 11570953/tftp-deploy-1e6smxml/ramdisk/ramdisk.cpio.gz
2145 12:50:49.926647 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2146 12:50:49.927170 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2147 12:50:49.931585 tftpboot 192.168.201.1 11570953/tftp-deploy-1e6smxml/kernel/bzIloy-1e6smxml/kernel/cmdline 11570953/tftp-deploy-1e6smxml/ramdisk/ramdisk.cpio.gz
2148 12:50:49.932024
2149 12:50:49.932353 Waiting for link
2150 12:50:50.135407
2151 12:50:50.135968 done.
2152 12:50:50.136342
2153 12:50:50.136730 MAC: 00:24:32:30:7d:bc
2154 12:50:50.137190
2155 12:50:50.138225 Sending DHCP discover... done.
2156 12:50:50.138700
2157 12:50:50.141731 Waiting for reply... done.
2158 12:50:50.142340
2159 12:50:50.147366 Sending DHCP request... done.
2160 12:50:50.147787
2161 12:50:50.153523 Waiting for reply... done.
2162 12:50:50.154070
2163 12:50:50.154439 My ip is 192.168.201.22
2164 12:50:50.154785
2165 12:50:50.156692 The DHCP server ip is 192.168.201.1
2166 12:50:50.161001
2167 12:50:50.163469 TFTP server IP predefined by user: 192.168.201.1
2168 12:50:50.163895
2169 12:50:50.170202 Bootfile predefined by user: 11570953/tftp-deploy-1e6smxml/kernel/bzImage
2170 12:50:50.170725
2171 12:50:50.173763 Sending tftp read request... done.
2172 12:50:50.174285
2173 12:50:50.182548 Waiting for the transfer...
2174 12:50:50.183109
2175 12:50:50.899118 00000000 ################################################################
2176 12:50:50.899655
2177 12:50:51.605310 00080000 ################################################################
2178 12:50:51.605881
2179 12:50:52.310709 00100000 ################################################################
2180 12:50:52.311285
2181 12:50:53.022859 00180000 ################################################################
2182 12:50:53.023697
2183 12:50:53.736340 00200000 ################################################################
2184 12:50:53.736897
2185 12:50:54.431516 00280000 ################################################################
2186 12:50:54.432035
2187 12:50:55.138822 00300000 ################################################################
2188 12:50:55.139462
2189 12:50:55.844075 00380000 ################################################################
2190 12:50:55.844595
2191 12:50:56.550224 00400000 ################################################################
2192 12:50:56.550762
2193 12:50:57.261402 00480000 ################################################################
2194 12:50:57.261907
2195 12:50:57.967425 00500000 ################################################################
2196 12:50:57.967931
2197 12:50:58.665825 00580000 ################################################################
2198 12:50:58.666333
2199 12:50:59.376766 00600000 ################################################################
2200 12:50:59.377276
2201 12:51:00.076371 00680000 ################################################################
2202 12:51:00.076905
2203 12:51:00.781115 00700000 ################################################################
2204 12:51:00.781655
2205 12:51:01.490643 00780000 ################################################################
2206 12:51:01.491186
2207 12:51:02.199530 00800000 ################################################################
2208 12:51:02.200081
2209 12:51:02.921972 00880000 ################################################################
2210 12:51:02.922592
2211 12:51:03.638366 00900000 ################################################################
2212 12:51:03.638889
2213 12:51:04.353761 00980000 ################################################################
2214 12:51:04.354313
2215 12:51:05.039417 00a00000 ################################################################
2216 12:51:05.039951
2217 12:51:05.717162 00a80000 ################################################################
2218 12:51:05.717795
2219 12:51:06.398104 00b00000 ################################################################
2220 12:51:06.398651
2221 12:51:07.076292 00b80000 ################################################################
2222 12:51:07.077149
2223 12:51:07.772374 00c00000 ################################################################
2224 12:51:07.772916
2225 12:51:08.496413 00c80000 ################################################################
2226 12:51:08.496960
2227 12:51:09.012896 00d00000 ############################################### done.
2228 12:51:09.013425
2229 12:51:09.016541 The bootfile was 14016480 bytes long.
2230 12:51:09.016978
2231 12:51:09.019615 Sending tftp read request... done.
2232 12:51:09.020046
2233 12:51:09.022749 Waiting for the transfer...
2234 12:51:09.023213
2235 12:51:09.712985 00000000 ################################################################
2236 12:51:09.713534
2237 12:51:10.323345 00080000 ################################################################
2238 12:51:10.323550
2239 12:51:10.966114 00100000 ################################################################
2240 12:51:10.966262
2241 12:51:11.588817 00180000 ################################################################
2242 12:51:11.588968
2243 12:51:12.193485 00200000 ################################################################
2244 12:51:12.193637
2245 12:51:12.799834 00280000 ################################################################
2246 12:51:12.799983
2247 12:51:13.470497 00300000 ################################################################
2248 12:51:13.471066
2249 12:51:14.126288 00380000 ################################################################
2250 12:51:14.126813
2251 12:51:14.787294 00400000 ################################################################
2252 12:51:14.787445
2253 12:51:15.399292 00480000 ################################################################
2254 12:51:15.399445
2255 12:51:16.014751 00500000 ################################################################
2256 12:51:16.014905
2257 12:51:16.675518 00580000 ################################################################
2258 12:51:16.676038
2259 12:51:17.367375 00600000 ################################################################
2260 12:51:17.367914
2261 12:51:18.056634 00680000 ################################################################
2262 12:51:18.057192
2263 12:51:18.710654 00700000 ################################################################
2264 12:51:18.711091
2265 12:51:19.355573 00780000 ################################################################
2266 12:51:19.356184
2267 12:51:20.070333 00800000 ################################################################
2268 12:51:20.071012
2270 12:55:33.364565 end: 2.2.4 bootloader-commands (duration 00:04:45) [common]
2272 12:55:33.365613 depthcharge-retry failed: 1 of 1 attempts. 'wait for prompt timed out'
2274 12:55:33.366453 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2277 12:55:33.368076 end: 2 depthcharge-action (duration 00:05:00) [common]
2279 12:55:33.368562 Cleaning after the job
2280 12:55:33.368653 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11570953/tftp-deploy-1e6smxml/ramdisk
2281 12:55:33.370013 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11570953/tftp-deploy-1e6smxml/kernel
2282 12:55:33.372087 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11570953/tftp-deploy-1e6smxml/modules
2283 12:55:33.372861 start: 5.1 power-off (timeout 00:00:30) [common]
2284 12:55:33.373022 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2285 12:55:33.453368 >> Command sent successfully.
2286 12:55:33.464106 Returned 0 in 0 seconds
2287 12:55:33.565415 end: 5.1 power-off (duration 00:00:00) [common]
2289 12:55:33.566991 start: 5.2 read-feedback (timeout 00:10:00) [common]
2290 12:55:33.568405 Listened to connection for namespace 'common' for up to 1s
2291 12:55:34.568985 Finalising connection for namespace 'common'
2292 12:55:34.569676 Disconnecting from shell: Finalise
2293 12:55:34.570107 00880000 ############
2294 12:55:34.671146 end: 5.2 read-feedback (duration 00:00:01) [common]
2295 12:55:34.671774 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11570953
2296 12:55:34.693266 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11570953
2297 12:55:34.693409 JobError: Your job cannot terminate cleanly.