Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Errors: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Errors: 2
1 18:55:15.976321 lava-dispatcher, installed at version: 2023.10
2 18:55:15.976537 start: 0 validate
3 18:55:15.976667 Start time: 2023-11-22 18:55:15.976659+00:00 (UTC)
4 18:55:15.976785 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:55:15.976927 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 18:55:16.246486 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:55:16.247258 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.200-cip40-188-g33d0b44cd71d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:55:16.506467 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:55:16.507303 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.200-cip40-188-g33d0b44cd71d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
10 18:55:27.760846 validate duration: 11.78
12 18:55:27.761119 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:55:27.761222 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:55:27.761312 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:55:27.761437 Not decompressing ramdisk as can be used compressed.
16 18:55:27.761524 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 18:55:27.761588 saving as /var/lib/lava/dispatcher/tmp/12061583/tftp-deploy-2_qlwvuz/ramdisk/rootfs.cpio.gz
18 18:55:27.761652 total size: 8418130 (8 MB)
19 18:55:29.508125 progress 0 % (0 MB)
20 18:55:29.513172 progress 5 % (0 MB)
21 18:55:29.515470 progress 10 % (0 MB)
22 18:55:29.517740 progress 15 % (1 MB)
23 18:55:29.519998 progress 20 % (1 MB)
24 18:55:29.522273 progress 25 % (2 MB)
25 18:55:29.524491 progress 30 % (2 MB)
26 18:55:29.526587 progress 35 % (2 MB)
27 18:55:29.528796 progress 40 % (3 MB)
28 18:55:29.531073 progress 45 % (3 MB)
29 18:55:29.533373 progress 50 % (4 MB)
30 18:55:29.535611 progress 55 % (4 MB)
31 18:55:29.537783 progress 60 % (4 MB)
32 18:55:29.539797 progress 65 % (5 MB)
33 18:55:29.541973 progress 70 % (5 MB)
34 18:55:29.544145 progress 75 % (6 MB)
35 18:55:29.546320 progress 80 % (6 MB)
36 18:55:29.548483 progress 85 % (6 MB)
37 18:55:29.550657 progress 90 % (7 MB)
38 18:55:29.552815 progress 95 % (7 MB)
39 18:55:29.554848 progress 100 % (8 MB)
40 18:55:29.555073 8 MB downloaded in 1.79 s (4.48 MB/s)
41 18:55:29.555222 end: 1.1.1 http-download (duration 00:00:02) [common]
43 18:55:29.555461 end: 1.1 download-retry (duration 00:00:02) [common]
44 18:55:29.555549 start: 1.2 download-retry (timeout 00:09:58) [common]
45 18:55:29.555634 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 18:55:29.555772 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.200-cip40-188-g33d0b44cd71d/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/kernel/bzImage
47 18:55:29.555846 saving as /var/lib/lava/dispatcher/tmp/12061583/tftp-deploy-2_qlwvuz/kernel/bzImage
48 18:55:29.555907 total size: 17275488 (16 MB)
49 18:55:29.555968 No compression specified
50 18:55:29.810634 progress 0 % (0 MB)
51 18:55:29.838608 progress 5 % (0 MB)
52 18:55:29.853471 progress 10 % (1 MB)
53 18:55:29.862724 progress 15 % (2 MB)
54 18:55:29.869541 progress 20 % (3 MB)
55 18:55:29.875514 progress 25 % (4 MB)
56 18:55:29.880994 progress 30 % (4 MB)
57 18:55:29.885665 progress 35 % (5 MB)
58 18:55:29.890218 progress 40 % (6 MB)
59 18:55:29.894890 progress 45 % (7 MB)
60 18:55:29.899483 progress 50 % (8 MB)
61 18:55:29.904037 progress 55 % (9 MB)
62 18:55:29.908754 progress 60 % (9 MB)
63 18:55:29.913174 progress 65 % (10 MB)
64 18:55:29.917756 progress 70 % (11 MB)
65 18:55:29.922231 progress 75 % (12 MB)
66 18:55:29.926644 progress 80 % (13 MB)
67 18:55:29.931114 progress 85 % (14 MB)
68 18:55:29.935503 progress 90 % (14 MB)
69 18:55:29.939904 progress 95 % (15 MB)
70 18:55:29.944444 progress 100 % (16 MB)
71 18:55:29.944576 16 MB downloaded in 0.39 s (42.39 MB/s)
72 18:55:29.944722 end: 1.2.1 http-download (duration 00:00:00) [common]
74 18:55:29.944953 end: 1.2 download-retry (duration 00:00:00) [common]
75 18:55:29.945045 start: 1.3 download-retry (timeout 00:09:58) [common]
76 18:55:29.945132 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 18:55:29.945269 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.200-cip40-188-g33d0b44cd71d/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/modules.tar.xz
78 18:55:29.945338 saving as /var/lib/lava/dispatcher/tmp/12061583/tftp-deploy-2_qlwvuz/modules/modules.tar
79 18:55:29.945400 total size: 3311672 (3 MB)
80 18:55:29.945463 Using unxz to decompress xz
81 18:55:29.949831 progress 0 % (0 MB)
82 18:55:29.955686 progress 5 % (0 MB)
83 18:55:29.963988 progress 10 % (0 MB)
84 18:55:29.971859 progress 15 % (0 MB)
85 18:55:29.982733 progress 20 % (0 MB)
86 18:55:29.993816 progress 25 % (0 MB)
87 18:55:30.002898 progress 30 % (0 MB)
88 18:55:30.014945 progress 35 % (1 MB)
89 18:55:30.026386 progress 40 % (1 MB)
90 18:55:30.036560 progress 45 % (1 MB)
91 18:55:30.046742 progress 50 % (1 MB)
92 18:55:30.056597 progress 55 % (1 MB)
93 18:55:30.069145 progress 60 % (1 MB)
94 18:55:30.079430 progress 65 % (2 MB)
95 18:55:30.089319 progress 70 % (2 MB)
96 18:55:30.099221 progress 75 % (2 MB)
97 18:55:30.109007 progress 80 % (2 MB)
98 18:55:30.118721 progress 85 % (2 MB)
99 18:55:30.128509 progress 90 % (2 MB)
100 18:55:30.140628 progress 95 % (3 MB)
101 18:55:30.151035 progress 100 % (3 MB)
102 18:55:30.155963 3 MB downloaded in 0.21 s (15.00 MB/s)
103 18:55:30.156205 end: 1.3.1 http-download (duration 00:00:00) [common]
105 18:55:30.156470 end: 1.3 download-retry (duration 00:00:00) [common]
106 18:55:30.156563 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
107 18:55:30.156657 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
108 18:55:30.156739 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
109 18:55:30.156825 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
110 18:55:30.157054 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph
111 18:55:30.157192 makedir: /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin
112 18:55:30.157298 makedir: /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/tests
113 18:55:30.157398 makedir: /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/results
114 18:55:30.157512 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-add-keys
115 18:55:30.157667 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-add-sources
116 18:55:30.157809 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-background-process-start
117 18:55:30.157944 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-background-process-stop
118 18:55:30.158074 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-common-functions
119 18:55:30.158205 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-echo-ipv4
120 18:55:30.158331 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-install-packages
121 18:55:30.158456 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-installed-packages
122 18:55:30.158581 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-os-build
123 18:55:30.158707 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-probe-channel
124 18:55:30.158831 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-probe-ip
125 18:55:30.158955 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-target-ip
126 18:55:30.159079 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-target-mac
127 18:55:30.159202 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-target-storage
128 18:55:30.159331 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-test-case
129 18:55:30.159457 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-test-event
130 18:55:30.159581 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-test-feedback
131 18:55:30.159705 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-test-raise
132 18:55:30.159831 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-test-reference
133 18:55:30.159958 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-test-runner
134 18:55:30.160086 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-test-set
135 18:55:30.160211 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-test-shell
136 18:55:30.160340 Updating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-install-packages (oe)
137 18:55:30.160494 Updating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/bin/lava-installed-packages (oe)
138 18:55:30.160616 Creating /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/environment
139 18:55:30.160715 LAVA metadata
140 18:55:30.160789 - LAVA_JOB_ID=12061583
141 18:55:30.160853 - LAVA_DISPATCHER_IP=192.168.201.1
142 18:55:30.160955 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
143 18:55:30.161027 skipped lava-vland-overlay
144 18:55:30.161102 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
145 18:55:30.161181 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
146 18:55:30.161245 skipped lava-multinode-overlay
147 18:55:30.161321 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
148 18:55:30.161400 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
149 18:55:30.161476 Loading test definitions
150 18:55:30.161568 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
151 18:55:30.161646 Using /lava-12061583 at stage 0
152 18:55:30.162106 uuid=12061583_1.4.2.3.1 testdef=None
153 18:55:30.162198 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
154 18:55:30.162286 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
155 18:55:30.162816 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
157 18:55:30.163039 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
158 18:55:30.163681 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
160 18:55:30.163909 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
161 18:55:30.164531 runner path: /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/0/tests/0_dmesg test_uuid 12061583_1.4.2.3.1
162 18:55:30.164684 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
164 18:55:30.164912 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
165 18:55:30.164983 Using /lava-12061583 at stage 1
166 18:55:30.165282 uuid=12061583_1.4.2.3.5 testdef=None
167 18:55:30.165369 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
168 18:55:30.165452 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
169 18:55:30.165926 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
171 18:55:30.166156 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
172 18:55:30.166805 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
174 18:55:30.167032 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
175 18:55:30.167661 runner path: /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/1/tests/1_bootrr test_uuid 12061583_1.4.2.3.5
176 18:55:30.167812 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
178 18:55:30.168020 Creating lava-test-runner.conf files
179 18:55:30.168103 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/0 for stage 0
180 18:55:30.168193 - 0_dmesg
181 18:55:30.168273 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12061583/lava-overlay-y7xnk_ph/lava-12061583/1 for stage 1
182 18:55:30.168364 - 1_bootrr
183 18:55:30.168459 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
184 18:55:30.168545 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
185 18:55:30.176938 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
186 18:55:30.177041 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
187 18:55:30.177126 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
188 18:55:30.177210 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
189 18:55:30.177294 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
190 18:55:30.424750 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
191 18:55:30.425127 start: 1.4.4 extract-modules (timeout 00:09:57) [common]
192 18:55:30.425244 extracting modules file /var/lib/lava/dispatcher/tmp/12061583/tftp-deploy-2_qlwvuz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12061583/extract-overlay-ramdisk-g0qqfqfq/ramdisk
193 18:55:30.506941 end: 1.4.4 extract-modules (duration 00:00:00) [common]
194 18:55:30.507111 start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
195 18:55:30.507208 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12061583/compress-overlay-yoyn4m7t/overlay-1.4.2.4.tar.gz to ramdisk
196 18:55:30.507277 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12061583/compress-overlay-yoyn4m7t/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12061583/extract-overlay-ramdisk-g0qqfqfq/ramdisk
197 18:55:30.515653 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
198 18:55:30.515763 start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
199 18:55:30.515850 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
200 18:55:30.515936 start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
201 18:55:30.516014 Building ramdisk /var/lib/lava/dispatcher/tmp/12061583/extract-overlay-ramdisk-g0qqfqfq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12061583/extract-overlay-ramdisk-g0qqfqfq/ramdisk
202 18:55:30.759806 >> 91450 blocks
203 18:55:32.179500 rename /var/lib/lava/dispatcher/tmp/12061583/extract-overlay-ramdisk-g0qqfqfq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12061583/tftp-deploy-2_qlwvuz/ramdisk/ramdisk.cpio.gz
204 18:55:32.179956 end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
205 18:55:32.180084 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
206 18:55:32.180183 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
207 18:55:32.180276 No mkimage arch provided, not using FIT.
208 18:55:32.180365 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
209 18:55:32.180447 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
210 18:55:32.180553 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
211 18:55:32.180641 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
212 18:55:32.180718 No LXC device requested
213 18:55:32.180797 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
214 18:55:32.180882 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
215 18:55:32.180960 end: 1.6 deploy-device-env (duration 00:00:00) [common]
216 18:55:32.181033 Checking files for TFTP limit of 4294967296 bytes.
217 18:55:32.181442 end: 1 tftp-deploy (duration 00:00:04) [common]
218 18:55:32.181545 start: 2 depthcharge-action (timeout 00:05:00) [common]
219 18:55:32.181633 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
220 18:55:32.181750 substitutions:
221 18:55:32.181815 - {DTB}: None
222 18:55:32.181883 - {INITRD}: 12061583/tftp-deploy-2_qlwvuz/ramdisk/ramdisk.cpio.gz
223 18:55:32.181978 - {KERNEL}: 12061583/tftp-deploy-2_qlwvuz/kernel/bzImage
224 18:55:32.182036 - {LAVA_MAC}: None
225 18:55:32.182093 - {PRESEED_CONFIG}: None
226 18:55:32.182149 - {PRESEED_LOCAL}: None
227 18:55:32.182203 - {RAMDISK}: 12061583/tftp-deploy-2_qlwvuz/ramdisk/ramdisk.cpio.gz
228 18:55:32.182258 - {ROOT_PART}: None
229 18:55:32.182312 - {ROOT}: None
230 18:55:32.182365 - {SERVER_IP}: 192.168.201.1
231 18:55:32.182418 - {TEE}: None
232 18:55:32.182472 Parsed boot commands:
233 18:55:32.182525 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
234 18:55:32.182696 Parsed boot commands: tftpboot 192.168.201.1 12061583/tftp-deploy-2_qlwvuz/kernel/bzImage 12061583/tftp-deploy-2_qlwvuz/kernel/cmdline 12061583/tftp-deploy-2_qlwvuz/ramdisk/ramdisk.cpio.gz
235 18:55:32.182781 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
236 18:55:32.182865 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
237 18:55:32.182958 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
238 18:55:32.183042 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
239 18:55:32.183111 Not connected, no need to disconnect.
240 18:55:32.183185 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
241 18:55:32.183267 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
242 18:55:32.183332 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-5'
243 18:55:32.187367 Setting prompt string to ['lava-test: # ']
244 18:55:32.187699 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
245 18:55:32.187800 end: 2.2.1 reset-connection (duration 00:00:00) [common]
246 18:55:32.187899 start: 2.2.2 reset-device (timeout 00:05:00) [common]
247 18:55:32.188006 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
248 18:55:32.188221 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=reboot'
249 18:55:37.320759 >> Command sent successfully.
250 18:55:37.323352 Returned 0 in 5 seconds
251 18:55:37.423734 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
253 18:55:37.424071 end: 2.2.2 reset-device (duration 00:00:05) [common]
254 18:55:37.424169 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
255 18:55:37.424256 Setting prompt string to 'Starting depthcharge on Volmar...'
256 18:55:37.424321 Changing prompt to 'Starting depthcharge on Volmar...'
257 18:55:37.424388 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
258 18:55:37.424710 [Enter `^Ec?' for help]
259 18:55:38.799973
260 18:55:38.800129
261 18:55:38.806759 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
262 18:55:38.810844 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
263 18:55:38.814750 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
264 18:55:38.822251 CPU: AES supported, TXT NOT supported, VT supported
265 18:55:38.829681 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
266 18:55:38.829765 Cache size = 10 MiB
267 18:55:38.837646 MCH: device id 4609 (rev 04) is Alderlake-P
268 18:55:38.841456 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
269 18:55:38.845802 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
270 18:55:38.849811 VBOOT: Loading verstage.
271 18:55:38.853398 FMAP: Found "FLASH" version 1.1 at 0x1804000.
272 18:55:38.856700 FMAP: base = 0x0 size = 0x2000000 #areas = 37
273 18:55:38.863504 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
274 18:55:38.870441 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
275 18:55:38.877149 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
276 18:55:38.880883
277 18:55:38.880966
278 18:55:38.887761 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
279 18:55:38.895211 Probing TPM I2C: I2C bus 1 version 0x3230302a
280 18:55:38.898448 DW I2C bus 1 at 0xfe022000 (400 KHz)
281 18:55:38.902518 I2C TX abort detected (00000001)
282 18:55:38.905409 cr50_i2c_read: Address write failed
283 18:55:38.916047 .done! DID_VID 0x00281ae0
284 18:55:38.919357 TPM ready after 0 ms
285 18:55:38.923042 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
286 18:55:38.936592 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
287 18:55:38.943348 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
288 18:55:38.995787 tlcl_send_startup: Startup return code is 0
289 18:55:38.995962 TPM: setup succeeded
290 18:55:39.018806 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
291 18:55:39.040895 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
292 18:55:39.045186 Chrome EC: UHEPI supported
293 18:55:39.048144 Reading cr50 boot mode
294 18:55:39.063964 Cr50 says boot_mode is VERIFIED_RW(0x00).
295 18:55:39.064051 Phase 1
296 18:55:39.067017 FMAP: area GBB found @ 1805000 (458752 bytes)
297 18:55:39.077882 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
298 18:55:39.084795 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
299 18:55:39.091342 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
300 18:55:39.091427 Phase 2
301 18:55:39.091493 Phase 3
302 18:55:39.097870 FMAP: area GBB found @ 1805000 (458752 bytes)
303 18:55:39.101497 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 18:55:39.107886 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 18:55:39.114324 VB2:vb2_verify_keyblock() Checking keyblock signature...
306 18:55:39.122080 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
307 18:55:39.128797 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
308 18:55:39.136017 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
309 18:55:39.148661 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
310 18:55:39.151926 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
311 18:55:39.158780 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 18:55:39.165277 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
313 18:55:39.171712 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 18:55:39.178272 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 18:55:39.182453 Phase 4
316 18:55:39.185347 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
317 18:55:39.192259 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
318 18:55:39.404924 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
319 18:55:39.411199 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
320 18:55:39.414924 Saving vboot hash.
321 18:55:39.420989 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
322 18:55:39.437151 tlcl_extend: response is 0
323 18:55:39.443626 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
324 18:55:39.450408 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
325 18:55:39.464724 tlcl_extend: response is 0
326 18:55:39.471481 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
327 18:55:39.492894 tlcl_lock_nv_write: response is 0
328 18:55:39.512318 tlcl_lock_nv_write: response is 0
329 18:55:39.512412 Slot A is selected
330 18:55:39.518749 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
331 18:55:39.525556 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
332 18:55:39.531811 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
333 18:55:39.539096 BS: verstage times (exec / console): total (unknown) / 264 ms
334 18:55:39.539180
335 18:55:39.539247
336 18:55:39.545417 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
337 18:55:39.549764 Google Chrome EC: version:
338 18:55:39.553065 ro: volmar_v2.0.14126-e605144e9c
339 18:55:39.556605 rw: volmar_v0.0.55-22d1557
340 18:55:39.560006 running image: 2
341 18:55:39.563261 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
342 18:55:39.573018 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 18:55:39.579642 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 18:55:39.586546 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
345 18:55:39.596355 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
346 18:55:39.606160 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
347 18:55:39.609681 EC took 942us to calculate image hash
348 18:55:39.619750 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
349 18:55:39.622923 VB2:sync_ec() select_rw=RW(active)
350 18:55:39.634417 Waited 594us to clear limit power flag.
351 18:55:39.637192 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 18:55:39.641012 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 18:55:39.643990 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
354 18:55:39.650865 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
355 18:55:39.654191 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
356 18:55:39.657268 TCO_STS: 0000 0000
357 18:55:39.660809 GEN_PMCON: d0015038 00002200
358 18:55:39.660892 GBLRST_CAUSE: 00000000 00000000
359 18:55:39.663900 HPR_CAUSE0: 00000000
360 18:55:39.667407 prev_sleep_state 5
361 18:55:39.670804 Abort disabling TXT, as CPU is not TXT capable.
362 18:55:39.678675 cse_lite: Number of partitions = 3
363 18:55:39.682022 cse_lite: Current partition = RO
364 18:55:39.682106 cse_lite: Next partition = RO
365 18:55:39.685782 cse_lite: Flags = 0x7
366 18:55:39.692529 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
367 18:55:39.701882 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
368 18:55:39.705314 FMAP: area SI_ME found @ 1000 (5238784 bytes)
369 18:55:39.712476 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
370 18:55:39.718848 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
371 18:55:39.725382 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
372 18:55:39.728368 cse_lite: CSE CBFS RW version : 16.1.25.2049
373 18:55:39.735205 cse_lite: Set Boot Partition Info Command (RW)
374 18:55:39.738421 HECI: Global Reset(Type:1) Command
375 18:55:41.150579
376 18:55:41.150735
377 18:55:41.157509 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
378 18:55:41.161302 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
379 18:55:41.168165 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
380 18:55:41.171239 CPU: AES supported, TXT NOT supported, VT supported
381 18:55:41.181291 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
382 18:55:41.181380 Cache size = 10 MiB
383 18:55:41.187654 MCH: device id 4609 (rev 04) is Alderlake-P
384 18:55:41.191558 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
385 18:55:41.194737 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
386 18:55:41.197730 VBOOT: Loading verstage.
387 18:55:41.205570 FMAP: Found "FLASH" version 1.1 at 0x1804000.
388 18:55:41.209018 FMAP: base = 0x0 size = 0x2000000 #areas = 37
389 18:55:41.211947 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
390 18:55:41.222599 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
391 18:55:41.229313 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
392 18:55:41.229401
393 18:55:41.229485
394 18:55:41.239231 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
395 18:55:41.245822 Probing TPM I2C: I2C bus 1 version 0x3230302a
396 18:55:41.249248 DW I2C bus 1 at 0xfe022000 (400 KHz)
397 18:55:41.253046 done! DID_VID 0x00281ae0
398 18:55:41.253133 TPM ready after 0 ms
399 18:55:41.257269 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
400 18:55:41.267621 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
401 18:55:41.275040 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
402 18:55:41.331373 tlcl_send_startup: Startup return code is 0
403 18:55:41.331517 TPM: setup succeeded
404 18:55:41.350865 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
405 18:55:41.372895 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
406 18:55:41.376727 Chrome EC: UHEPI supported
407 18:55:41.380211 Reading cr50 boot mode
408 18:55:41.395096 Cr50 says boot_mode is VERIFIED_RW(0x00).
409 18:55:41.395214 Phase 1
410 18:55:41.401625 FMAP: area GBB found @ 1805000 (458752 bytes)
411 18:55:41.408023 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
412 18:55:41.414908 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
413 18:55:41.421433 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
414 18:55:41.421518 Phase 2
415 18:55:41.424736 Phase 3
416 18:55:41.428203 FMAP: area GBB found @ 1805000 (458752 bytes)
417 18:55:41.434911 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
418 18:55:41.438275 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
419 18:55:41.444853 VB2:vb2_verify_keyblock() Checking keyblock signature...
420 18:55:41.451385 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
421 18:55:41.458110 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
422 18:55:41.468302 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
423 18:55:41.479939 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
424 18:55:41.483524 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
425 18:55:41.490063 VB2:vb2_verify_fw_preamble() Verifying preamble.
426 18:55:41.496488 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
427 18:55:41.503330 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
428 18:55:41.510074 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
429 18:55:41.513866 Phase 4
430 18:55:41.517449 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
431 18:55:41.523748 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
432 18:55:41.736094 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
433 18:55:41.743044 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
434 18:55:41.746180 Saving vboot hash.
435 18:55:41.752582 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
436 18:55:41.768569 tlcl_extend: response is 0
437 18:55:41.775412 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
438 18:55:41.782042 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
439 18:55:41.796490 tlcl_extend: response is 0
440 18:55:41.803118 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
441 18:55:41.821458 tlcl_lock_nv_write: response is 0
442 18:55:41.840596 tlcl_lock_nv_write: response is 0
443 18:55:41.840703 Slot A is selected
444 18:55:41.847481 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
445 18:55:41.854015 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
446 18:55:41.860403 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
447 18:55:41.867420 BS: verstage times (exec / console): total (unknown) / 256 ms
448 18:55:41.867505
449 18:55:41.867571
450 18:55:41.873852 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
451 18:55:41.878003 Google Chrome EC: version:
452 18:55:41.881245 ro: volmar_v2.0.14126-e605144e9c
453 18:55:41.884557 rw: volmar_v0.0.55-22d1557
454 18:55:41.887920 running image: 2
455 18:55:41.891259 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
456 18:55:41.901527 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
457 18:55:41.907726 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
458 18:55:41.914463 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
459 18:55:41.924516 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
460 18:55:41.934866 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
461 18:55:41.938356 EC took 1117us to calculate image hash
462 18:55:41.948093 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
463 18:55:41.951551 VB2:sync_ec() select_rw=RW(active)
464 18:55:41.964077 Waited 270us to clear limit power flag.
465 18:55:41.968280 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
466 18:55:41.971606 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
467 18:55:41.975420 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
468 18:55:41.978307 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
469 18:55:41.985143 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
470 18:55:41.985229 TCO_STS: 0000 0000
471 18:55:41.988460 GEN_PMCON: d1001038 00002200
472 18:55:41.991732 GBLRST_CAUSE: 00000040 00000000
473 18:55:41.995115 HPR_CAUSE0: 00000000
474 18:55:41.995198 prev_sleep_state 5
475 18:55:42.002000 Abort disabling TXT, as CPU is not TXT capable.
476 18:55:42.008885 cse_lite: Number of partitions = 3
477 18:55:42.012354 cse_lite: Current partition = RW
478 18:55:42.012438 cse_lite: Next partition = RW
479 18:55:42.015884 cse_lite: Flags = 0x7
480 18:55:42.022122 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
481 18:55:42.032363 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
482 18:55:42.035664 FMAP: area SI_ME found @ 1000 (5238784 bytes)
483 18:55:42.042056 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
484 18:55:42.048604 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
485 18:55:42.055387 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
486 18:55:42.058743 cse_lite: CSE CBFS RW version : 16.1.25.2049
487 18:55:42.062187 Boot Count incremented to 3814
488 18:55:42.068541 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
489 18:55:42.075629 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
490 18:55:42.088186 Probing TPM I2C: done! DID_VID 0x00281ae0
491 18:55:42.091765 Locality already claimed
492 18:55:42.095011 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
493 18:55:42.114439 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
494 18:55:42.120879 MRC: Hash idx 0x100d comparison successful.
495 18:55:42.124098 MRC cache found, size f6c8
496 18:55:42.124194 bootmode is set to: 2
497 18:55:42.127841 EC returned error result code 3
498 18:55:42.131238 FW_CONFIG value from CBI is 0x131
499 18:55:42.137994 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
500 18:55:42.141427 SPD index = 0
501 18:55:42.148052 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
502 18:55:42.148137 SPD: module type is LPDDR4X
503 18:55:42.154691 SPD: module part number is K4U6E3S4AB-MGCL
504 18:55:42.161592 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
505 18:55:42.164774 SPD: device width 16 bits, bus width 16 bits
506 18:55:42.168245 SPD: module size is 1024 MB (per channel)
507 18:55:42.237434 CBMEM:
508 18:55:42.240543 IMD: root @ 0x76fff000 254 entries.
509 18:55:42.243729 IMD: root @ 0x76ffec00 62 entries.
510 18:55:42.251339 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
511 18:55:42.255021 RO_VPD is uninitialized or empty.
512 18:55:42.257918 FMAP: area RW_VPD found @ f29000 (8192 bytes)
513 18:55:42.264815 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
514 18:55:42.268256 External stage cache:
515 18:55:42.271465 IMD: root @ 0x7bbff000 254 entries.
516 18:55:42.274954 IMD: root @ 0x7bbfec00 62 entries.
517 18:55:42.281446 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
518 18:55:42.288298 MRC: Checking cached data update for 'RW_MRC_CACHE'.
519 18:55:42.291578 MRC: 'RW_MRC_CACHE' does not need update.
520 18:55:42.291661 8 DIMMs found
521 18:55:42.294851 SMM Memory Map
522 18:55:42.298458 SMRAM : 0x7b800000 0x800000
523 18:55:42.301603 Subregion 0: 0x7b800000 0x200000
524 18:55:42.304945 Subregion 1: 0x7ba00000 0x200000
525 18:55:42.308460 Subregion 2: 0x7bc00000 0x400000
526 18:55:42.311583 top_of_ram = 0x77000000
527 18:55:42.314858 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
528 18:55:42.321857 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
529 18:55:42.328531 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
530 18:55:42.331730 MTRR Range: Start=ff000000 End=0 (Size 1000000)
531 18:55:42.331813 Normal boot
532 18:55:42.341715 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
533 18:55:42.348442 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
534 18:55:42.354813 Processing 237 relocs. Offset value of 0x74ab9000
535 18:55:42.362582 BS: romstage times (exec / console): total (unknown) / 377 ms
536 18:55:42.370309
537 18:55:42.370394
538 18:55:42.376488 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
539 18:55:42.376567 Normal boot
540 18:55:42.383721 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
541 18:55:42.390200 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
542 18:55:42.396549 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
543 18:55:42.406532 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
544 18:55:42.454996 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
545 18:55:42.461416 Processing 5931 relocs. Offset value of 0x72a2f000
546 18:55:42.464770 BS: postcar times (exec / console): total (unknown) / 51 ms
547 18:55:42.464850
548 18:55:42.468365
549 18:55:42.474590 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
550 18:55:42.478275 Reserving BERT start 76a1e000, size 10000
551 18:55:42.481593 Normal boot
552 18:55:42.485020 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
553 18:55:42.491321 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
554 18:55:42.501518 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
555 18:55:42.504618 FMAP: area RW_VPD found @ f29000 (8192 bytes)
556 18:55:42.508040 Google Chrome EC: version:
557 18:55:42.511547 ro: volmar_v2.0.14126-e605144e9c
558 18:55:42.514718 rw: volmar_v0.0.55-22d1557
559 18:55:42.514806 running image: 2
560 18:55:42.521305 ACPI _SWS is PM1 Index 8 GPE Index -1
561 18:55:42.524571 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
562 18:55:42.528583 EC returned error result code 3
563 18:55:42.531930 FW_CONFIG value from CBI is 0x131
564 18:55:42.539181 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
565 18:55:42.542904 PCI: 00:1c.2 disabled by fw_config
566 18:55:42.549238 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
567 18:55:42.552671 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
568 18:55:42.559322 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
569 18:55:42.562581 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
570 18:55:42.569627 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
571 18:55:42.575859 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
572 18:55:42.579549 microcode: sig=0x906a4 pf=0x80 revision=0x423
573 18:55:42.586104 microcode: Update skipped, already up-to-date
574 18:55:42.592644 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
575 18:55:42.624611 Detected 6 core, 8 thread CPU.
576 18:55:42.627650 Setting up SMI for CPU
577 18:55:42.630993 IED base = 0x7bc00000
578 18:55:42.631075 IED size = 0x00400000
579 18:55:42.634236 Will perform SMM setup.
580 18:55:42.637826 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
581 18:55:42.640864 LAPIC 0x0 in XAPIC mode.
582 18:55:42.650817 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
583 18:55:42.654014 Processing 18 relocs. Offset value of 0x00030000
584 18:55:42.659277 Attempting to start 7 APs
585 18:55:42.662629 Waiting for 10ms after sending INIT.
586 18:55:42.675123 Waiting for SIPI to complete...
587 18:55:42.678510 done.
588 18:55:42.678593 LAPIC 0x12 in XAPIC mode.
589 18:55:42.681785 LAPIC 0x14 in XAPIC mode.
590 18:55:42.688379 AP: slot 1 apic_id 12, MCU rev: 0x00000423
591 18:55:42.688463 LAPIC 0x16 in XAPIC mode.
592 18:55:42.691896 LAPIC 0x10 in XAPIC mode.
593 18:55:42.695239 AP: slot 2 apic_id 14, MCU rev: 0x00000423
594 18:55:42.701953 AP: slot 4 apic_id 10, MCU rev: 0x00000423
595 18:55:42.705132 AP: slot 3 apic_id 16, MCU rev: 0x00000423
596 18:55:42.708272 LAPIC 0x9 in XAPIC mode.
597 18:55:42.711993 LAPIC 0x8 in XAPIC mode.
598 18:55:42.715059 AP: slot 7 apic_id 9, MCU rev: 0x00000423
599 18:55:42.718830 LAPIC 0x1 in XAPIC mode.
600 18:55:42.721716 Waiting for SIPI to complete...
601 18:55:42.721826 done.
602 18:55:42.725410 AP: slot 5 apic_id 1, MCU rev: 0x00000423
603 18:55:42.728961 AP: slot 6 apic_id 8, MCU rev: 0x00000423
604 18:55:42.731691 smm_setup_relocation_handler: enter
605 18:55:42.735166 smm_setup_relocation_handler: exit
606 18:55:42.745444 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
607 18:55:42.749045 Processing 11 relocs. Offset value of 0x00038000
608 18:55:42.755263 smm_module_setup_stub: stack_top = 0x7b804000
609 18:55:42.758390 smm_module_setup_stub: per cpu stack_size = 0x800
610 18:55:42.765353 smm_module_setup_stub: runtime.start32_offset = 0x4c
611 18:55:42.769095 smm_module_setup_stub: runtime.smm_size = 0x10000
612 18:55:42.775207 SMM Module: stub loaded at 38000. Will call 0x76a52094
613 18:55:42.778394 Installing permanent SMM handler to 0x7b800000
614 18:55:42.784939 smm_load_module: total_smm_space_needed e468, available -> 200000
615 18:55:42.795037 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
616 18:55:42.798379 Processing 255 relocs. Offset value of 0x7b9f6000
617 18:55:42.804822 smm_load_module: smram_start: 0x7b800000
618 18:55:42.808265 smm_load_module: smram_end: 7ba00000
619 18:55:42.811854 smm_load_module: handler start 0x7b9f6d5f
620 18:55:42.814781 smm_load_module: handler_size 98d0
621 18:55:42.818252 smm_load_module: fxsave_area 0x7b9ff000
622 18:55:42.821971 smm_load_module: fxsave_size 1000
623 18:55:42.824692 smm_load_module: CONFIG_MSEG_SIZE 0x0
624 18:55:42.831428 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
625 18:55:42.838214 smm_load_module: handler_mod_params.smbase = 0x7b800000
626 18:55:42.841325 smm_load_module: per_cpu_save_state_size = 0x400
627 18:55:42.844739 smm_load_module: num_cpus = 0x8
628 18:55:42.851596 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
629 18:55:42.854767 smm_load_module: total_save_state_size = 0x2000
630 18:55:42.858228 smm_load_module: cpu0 entry: 7b9e6000
631 18:55:42.865240 smm_create_map: cpus allowed in one segment 30
632 18:55:42.868780 smm_create_map: min # of segments needed 1
633 18:55:42.868864 CPU 0x0
634 18:55:42.871510 smbase 7b9e6000 entry 7b9ee000
635 18:55:42.878559 ss_start 7b9f5c00 code_end 7b9ee208
636 18:55:42.878644 CPU 0x1
637 18:55:42.882130 smbase 7b9e5c00 entry 7b9edc00
638 18:55:42.888443 ss_start 7b9f5800 code_end 7b9ede08
639 18:55:42.888528 CPU 0x2
640 18:55:42.891620 smbase 7b9e5800 entry 7b9ed800
641 18:55:42.894948 ss_start 7b9f5400 code_end 7b9eda08
642 18:55:42.898289 CPU 0x3
643 18:55:42.901670 smbase 7b9e5400 entry 7b9ed400
644 18:55:42.905146 ss_start 7b9f5000 code_end 7b9ed608
645 18:55:42.905230 CPU 0x4
646 18:55:42.911558 smbase 7b9e5000 entry 7b9ed000
647 18:55:42.914783 ss_start 7b9f4c00 code_end 7b9ed208
648 18:55:42.914866 CPU 0x5
649 18:55:42.918469 smbase 7b9e4c00 entry 7b9ecc00
650 18:55:42.924584 ss_start 7b9f4800 code_end 7b9ece08
651 18:55:42.924670 CPU 0x6
652 18:55:42.927913 smbase 7b9e4800 entry 7b9ec800
653 18:55:42.934810 ss_start 7b9f4400 code_end 7b9eca08
654 18:55:42.934895 CPU 0x7
655 18:55:42.937930 smbase 7b9e4400 entry 7b9ec400
656 18:55:42.941330 ss_start 7b9f4000 code_end 7b9ec608
657 18:55:42.951528 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
658 18:55:42.954841 Processing 11 relocs. Offset value of 0x7b9ee000
659 18:55:42.961451 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
660 18:55:42.967907 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
661 18:55:42.974746 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
662 18:55:42.981321 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
663 18:55:42.988022 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
664 18:55:42.991483 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
665 18:55:42.997983 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
666 18:55:43.004550 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
667 18:55:43.011364 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
668 18:55:43.017872 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
669 18:55:43.024621 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
670 18:55:43.031453 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
671 18:55:43.038250 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
672 18:55:43.041179 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
673 18:55:43.047778 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
674 18:55:43.054621 smm_module_setup_stub: stack_top = 0x7b804000
675 18:55:43.058082 smm_module_setup_stub: per cpu stack_size = 0x800
676 18:55:43.064452 smm_module_setup_stub: runtime.start32_offset = 0x4c
677 18:55:43.067816 smm_module_setup_stub: runtime.smm_size = 0x200000
678 18:55:43.074486 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
679 18:55:43.079134 Clearing SMI status registers
680 18:55:43.082210 SMI_STS: PM1
681 18:55:43.082294 PM1_STS: WAK PWRBTN
682 18:55:43.092676 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
683 18:55:43.095746 In relocation handler: CPU 0
684 18:55:43.098972 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
685 18:55:43.102768 Writing SMRR. base = 0x7b800006, mask=0xff800c00
686 18:55:43.105666 Relocation complete.
687 18:55:43.112962 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
688 18:55:43.115818 In relocation handler: CPU 5
689 18:55:43.119125 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
690 18:55:43.122121 Relocation complete.
691 18:55:43.129173 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
692 18:55:43.132134 In relocation handler: CPU 1
693 18:55:43.135467 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
694 18:55:43.142356 Writing SMRR. base = 0x7b800006, mask=0xff800c00
695 18:55:43.142440 Relocation complete.
696 18:55:43.148692 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
697 18:55:43.152211 In relocation handler: CPU 2
698 18:55:43.155275 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
699 18:55:43.162184 Writing SMRR. base = 0x7b800006, mask=0xff800c00
700 18:55:43.165582 Relocation complete.
701 18:55:43.172270 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
702 18:55:43.175667 In relocation handler: CPU 4
703 18:55:43.178904 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
704 18:55:43.182877 Writing SMRR. base = 0x7b800006, mask=0xff800c00
705 18:55:43.185565 Relocation complete.
706 18:55:43.192048 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
707 18:55:43.195903 In relocation handler: CPU 3
708 18:55:43.199118 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
709 18:55:43.205905 Writing SMRR. base = 0x7b800006, mask=0xff800c00
710 18:55:43.206004 Relocation complete.
711 18:55:43.211929 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
712 18:55:43.215504 In relocation handler: CPU 6
713 18:55:43.222151 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
714 18:55:43.225497 Writing SMRR. base = 0x7b800006, mask=0xff800c00
715 18:55:43.228892 Relocation complete.
716 18:55:43.235349 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
717 18:55:43.238653 In relocation handler: CPU 7
718 18:55:43.241811 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
719 18:55:43.245068 Relocation complete.
720 18:55:43.245151 Initializing CPU #0
721 18:55:43.248455 CPU: vendor Intel device 906a4
722 18:55:43.251794 CPU: family 06, model 9a, stepping 04
723 18:55:43.255296 Clearing out pending MCEs
724 18:55:43.258362 cpu: energy policy set to 7
725 18:55:43.261826 Turbo is available but hidden
726 18:55:43.265807 Turbo is available and visible
727 18:55:43.268390 microcode: Update skipped, already up-to-date
728 18:55:43.271546 CPU #0 initialized
729 18:55:43.274717 Initializing CPU #5
730 18:55:43.274801 Initializing CPU #2
731 18:55:43.278239 Initializing CPU #1
732 18:55:43.281575 CPU: vendor Intel device 906a4
733 18:55:43.284951 CPU: family 06, model 9a, stepping 04
734 18:55:43.288161 Initializing CPU #4
735 18:55:43.288245 CPU: vendor Intel device 906a4
736 18:55:43.294695 CPU: family 06, model 9a, stepping 04
737 18:55:43.294779 Initializing CPU #3
738 18:55:43.298344 Clearing out pending MCEs
739 18:55:43.301423 CPU: vendor Intel device 906a4
740 18:55:43.304868 CPU: family 06, model 9a, stepping 04
741 18:55:43.308231 cpu: energy policy set to 7
742 18:55:43.311223 Clearing out pending MCEs
743 18:55:43.314454 CPU: vendor Intel device 906a4
744 18:55:43.318012 CPU: family 06, model 9a, stepping 04
745 18:55:43.321312 CPU: vendor Intel device 906a4
746 18:55:43.324362 CPU: family 06, model 9a, stepping 04
747 18:55:43.327791 Clearing out pending MCEs
748 18:55:43.331420 Clearing out pending MCEs
749 18:55:43.334554 microcode: Update skipped, already up-to-date
750 18:55:43.337611 CPU #2 initialized
751 18:55:43.337694 cpu: energy policy set to 7
752 18:55:43.340938 Clearing out pending MCEs
753 18:55:43.344782 Initializing CPU #6
754 18:55:43.347755 cpu: energy policy set to 7
755 18:55:43.351074 microcode: Update skipped, already up-to-date
756 18:55:43.354227 CPU #1 initialized
757 18:55:43.357860 microcode: Update skipped, already up-to-date
758 18:55:43.361028 CPU #4 initialized
759 18:55:43.361111 cpu: energy policy set to 7
760 18:55:43.364188 cpu: energy policy set to 7
761 18:55:43.370751 microcode: Update skipped, already up-to-date
762 18:55:43.370834 CPU #3 initialized
763 18:55:43.374091 CPU: vendor Intel device 906a4
764 18:55:43.377680 CPU: family 06, model 9a, stepping 04
765 18:55:43.383954 microcode: Update skipped, already up-to-date
766 18:55:43.384037 CPU #5 initialized
767 18:55:43.387301 Initializing CPU #7
768 18:55:43.390872 Clearing out pending MCEs
769 18:55:43.394121 CPU: vendor Intel device 906a4
770 18:55:43.397560 CPU: family 06, model 9a, stepping 04
771 18:55:43.400569 cpu: energy policy set to 7
772 18:55:43.400652 Clearing out pending MCEs
773 18:55:43.407185 microcode: Update skipped, already up-to-date
774 18:55:43.407268 CPU #6 initialized
775 18:55:43.410773 cpu: energy policy set to 7
776 18:55:43.417671 microcode: Update skipped, already up-to-date
777 18:55:43.417755 CPU #7 initialized
778 18:55:43.424026 bsp_do_flight_plan done after 697 msecs.
779 18:55:43.424111 CPU: frequency set to 4400 MHz
780 18:55:43.427560 Enabling SMIs.
781 18:55:43.433978 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
782 18:55:43.449578 Probing TPM I2C: done! DID_VID 0x00281ae0
783 18:55:43.453096 Locality already claimed
784 18:55:43.456214 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
785 18:55:43.467778 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
786 18:55:43.471390 Enabling GPIO PM b/c CR50 has long IRQ pulse support
787 18:55:43.478053 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
788 18:55:43.484804 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
789 18:55:43.488768 Found a VBT of 9216 bytes after decompression
790 18:55:43.491227 PCI 1.0, PIN A, using IRQ #16
791 18:55:43.494492 PCI 2.0, PIN A, using IRQ #17
792 18:55:43.497758 PCI 4.0, PIN A, using IRQ #18
793 18:55:43.501268 PCI 5.0, PIN A, using IRQ #16
794 18:55:43.504676 PCI 6.0, PIN A, using IRQ #16
795 18:55:43.507527 PCI 6.2, PIN C, using IRQ #18
796 18:55:43.510854 PCI 7.0, PIN A, using IRQ #19
797 18:55:43.514374 PCI 7.1, PIN B, using IRQ #20
798 18:55:43.517783 PCI 7.2, PIN C, using IRQ #21
799 18:55:43.521087 PCI 7.3, PIN D, using IRQ #22
800 18:55:43.524606 PCI 8.0, PIN A, using IRQ #23
801 18:55:43.527575 PCI D.0, PIN A, using IRQ #17
802 18:55:43.527662 PCI D.1, PIN B, using IRQ #19
803 18:55:43.531105 PCI 10.0, PIN A, using IRQ #24
804 18:55:43.534494 PCI 10.1, PIN B, using IRQ #25
805 18:55:43.537432 PCI 10.6, PIN C, using IRQ #20
806 18:55:43.541593 PCI 10.7, PIN D, using IRQ #21
807 18:55:43.544924 PCI 11.0, PIN A, using IRQ #26
808 18:55:43.547834 PCI 11.1, PIN B, using IRQ #27
809 18:55:43.551166 PCI 11.2, PIN C, using IRQ #28
810 18:55:43.554288 PCI 11.3, PIN D, using IRQ #29
811 18:55:43.557868 PCI 12.0, PIN A, using IRQ #30
812 18:55:43.561133 PCI 12.6, PIN B, using IRQ #31
813 18:55:43.564721 PCI 12.7, PIN C, using IRQ #22
814 18:55:43.567841 PCI 13.0, PIN A, using IRQ #32
815 18:55:43.571108 PCI 13.1, PIN B, using IRQ #33
816 18:55:43.574268 PCI 13.2, PIN C, using IRQ #34
817 18:55:43.577542 PCI 13.3, PIN D, using IRQ #35
818 18:55:43.581504 PCI 14.0, PIN B, using IRQ #23
819 18:55:43.581666 PCI 14.1, PIN A, using IRQ #36
820 18:55:43.584300 PCI 14.3, PIN C, using IRQ #17
821 18:55:43.588108 PCI 15.0, PIN A, using IRQ #37
822 18:55:43.591028 PCI 15.1, PIN B, using IRQ #38
823 18:55:43.594301 PCI 15.2, PIN C, using IRQ #39
824 18:55:43.597821 PCI 15.3, PIN D, using IRQ #40
825 18:55:43.601346 PCI 16.0, PIN A, using IRQ #18
826 18:55:43.604242 PCI 16.1, PIN B, using IRQ #19
827 18:55:43.608165 PCI 16.2, PIN C, using IRQ #20
828 18:55:43.611075 PCI 16.3, PIN D, using IRQ #21
829 18:55:43.614354 PCI 16.4, PIN A, using IRQ #18
830 18:55:43.617582 PCI 16.5, PIN B, using IRQ #19
831 18:55:43.620976 PCI 17.0, PIN A, using IRQ #22
832 18:55:43.624088 PCI 19.0, PIN A, using IRQ #41
833 18:55:43.627796 PCI 19.1, PIN B, using IRQ #42
834 18:55:43.631219 PCI 19.2, PIN C, using IRQ #43
835 18:55:43.631626 PCI 1C.0, PIN A, using IRQ #16
836 18:55:43.634657 PCI 1C.1, PIN B, using IRQ #17
837 18:55:43.637914 PCI 1C.2, PIN C, using IRQ #18
838 18:55:43.641646 PCI 1C.3, PIN D, using IRQ #19
839 18:55:43.644575 PCI 1C.4, PIN A, using IRQ #16
840 18:55:43.647723 PCI 1C.5, PIN B, using IRQ #17
841 18:55:43.651004 PCI 1C.6, PIN C, using IRQ #18
842 18:55:43.654147 PCI 1C.7, PIN D, using IRQ #19
843 18:55:43.657867 PCI 1D.0, PIN A, using IRQ #16
844 18:55:43.661234 PCI 1D.1, PIN B, using IRQ #17
845 18:55:43.664492 PCI 1D.2, PIN C, using IRQ #18
846 18:55:43.667718 PCI 1D.3, PIN D, using IRQ #19
847 18:55:43.671121 PCI 1E.0, PIN A, using IRQ #23
848 18:55:43.674453 PCI 1E.1, PIN B, using IRQ #20
849 18:55:43.677541 PCI 1E.2, PIN C, using IRQ #44
850 18:55:43.681124 PCI 1E.3, PIN D, using IRQ #45
851 18:55:43.684513 PCI 1F.3, PIN B, using IRQ #22
852 18:55:43.685020 PCI 1F.4, PIN C, using IRQ #23
853 18:55:43.687645 PCI 1F.6, PIN D, using IRQ #20
854 18:55:43.691179 PCI 1F.7, PIN A, using IRQ #21
855 18:55:43.697857 IRQ: Using dynamically assigned PCI IO-APIC IRQs
856 18:55:43.704813 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
857 18:55:43.881487 FSPS returned 0
858 18:55:43.884525 Executing Phase 1 of FspMultiPhaseSiInit
859 18:55:43.894455 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
860 18:55:43.897985 port C0 DISC req: usage 1 usb3 1 usb2 1
861 18:55:43.901376 Raw Buffer output 0 00000111
862 18:55:43.904366 Raw Buffer output 1 00000000
863 18:55:43.908440 pmc_send_ipc_cmd succeeded
864 18:55:43.914902 port C1 DISC req: usage 1 usb3 3 usb2 3
865 18:55:43.915000 Raw Buffer output 0 00000331
866 18:55:43.918140 Raw Buffer output 1 00000000
867 18:55:43.922131 pmc_send_ipc_cmd succeeded
868 18:55:43.925848 Detected 6 core, 8 thread CPU.
869 18:55:43.929465 Detected 6 core, 8 thread CPU.
870 18:55:43.934756 Detected 6 core, 8 thread CPU.
871 18:55:43.938216 Detected 6 core, 8 thread CPU.
872 18:55:43.941163 Detected 6 core, 8 thread CPU.
873 18:55:43.944497 Detected 6 core, 8 thread CPU.
874 18:55:43.948244 Detected 6 core, 8 thread CPU.
875 18:55:43.951441 Detected 6 core, 8 thread CPU.
876 18:55:43.954654 Detected 6 core, 8 thread CPU.
877 18:55:43.957845 Detected 6 core, 8 thread CPU.
878 18:55:43.961649 Detected 6 core, 8 thread CPU.
879 18:55:43.964877 Detected 6 core, 8 thread CPU.
880 18:55:43.968200 Detected 6 core, 8 thread CPU.
881 18:55:43.971686 Detected 6 core, 8 thread CPU.
882 18:55:43.974795 Detected 6 core, 8 thread CPU.
883 18:55:43.978110 Detected 6 core, 8 thread CPU.
884 18:55:43.981780 Detected 6 core, 8 thread CPU.
885 18:55:43.984584 Detected 6 core, 8 thread CPU.
886 18:55:43.988160 Detected 6 core, 8 thread CPU.
887 18:55:43.991540 Detected 6 core, 8 thread CPU.
888 18:55:43.991623 Detected 6 core, 8 thread CPU.
889 18:55:43.994720 Detected 6 core, 8 thread CPU.
890 18:55:44.286384 Detected 6 core, 8 thread CPU.
891 18:55:44.289796 Detected 6 core, 8 thread CPU.
892 18:55:44.292915 Detected 6 core, 8 thread CPU.
893 18:55:44.296485 Detected 6 core, 8 thread CPU.
894 18:55:44.299566 Detected 6 core, 8 thread CPU.
895 18:55:44.303355 Detected 6 core, 8 thread CPU.
896 18:55:44.306625 Detected 6 core, 8 thread CPU.
897 18:55:44.310078 Detected 6 core, 8 thread CPU.
898 18:55:44.313463 Detected 6 core, 8 thread CPU.
899 18:55:44.316533 Detected 6 core, 8 thread CPU.
900 18:55:44.319829 Detected 6 core, 8 thread CPU.
901 18:55:44.322939 Detected 6 core, 8 thread CPU.
902 18:55:44.326464 Detected 6 core, 8 thread CPU.
903 18:55:44.329808 Detected 6 core, 8 thread CPU.
904 18:55:44.333279 Detected 6 core, 8 thread CPU.
905 18:55:44.336643 Detected 6 core, 8 thread CPU.
906 18:55:44.339764 Detected 6 core, 8 thread CPU.
907 18:55:44.343169 Detected 6 core, 8 thread CPU.
908 18:55:44.346259 Detected 6 core, 8 thread CPU.
909 18:55:44.346342 Detected 6 core, 8 thread CPU.
910 18:55:44.350209 Display FSP Version Info HOB
911 18:55:44.353661 Reference Code - CPU = c.0.65.70
912 18:55:44.356899 uCode Version = 0.0.4.23
913 18:55:44.360366 TXT ACM version = ff.ff.ff.ffff
914 18:55:44.363082 Reference Code - ME = c.0.65.70
915 18:55:44.366468 MEBx version = 0.0.0.0
916 18:55:44.370000 ME Firmware Version = Lite SKU
917 18:55:44.373402 Reference Code - PCH = c.0.65.70
918 18:55:44.377007 PCH-CRID Status = Disabled
919 18:55:44.380322 PCH-CRID Original Value = ff.ff.ff.ffff
920 18:55:44.383448 PCH-CRID New Value = ff.ff.ff.ffff
921 18:55:44.386679 OPROM - RST - RAID = ff.ff.ff.ffff
922 18:55:44.389861 PCH Hsio Version = 4.0.0.0
923 18:55:44.393596 Reference Code - SA - System Agent = c.0.65.70
924 18:55:44.396388 Reference Code - MRC = 0.0.3.80
925 18:55:44.399701 SA - PCIe Version = c.0.65.70
926 18:55:44.403559 SA-CRID Status = Disabled
927 18:55:44.406262 SA-CRID Original Value = 0.0.0.4
928 18:55:44.409780 SA-CRID New Value = 0.0.0.4
929 18:55:44.413111 OPROM - VBIOS = ff.ff.ff.ffff
930 18:55:44.416510 IO Manageability Engine FW Version = 24.0.4.0
931 18:55:44.420048 PHY Build Version = 0.0.0.2016
932 18:55:44.422922 Thunderbolt(TM) FW Version = 0.0.0.0
933 18:55:44.429800 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
934 18:55:44.436550 BS: BS_DEV_INIT_CHIPS run times (exec / console): 488 / 507 ms
935 18:55:44.436633 Enumerating buses...
936 18:55:44.443192 Show all devs... Before device enumeration.
937 18:55:44.446243 Root Device: enabled 1
938 18:55:44.446325 CPU_CLUSTER: 0: enabled 1
939 18:55:44.450006 DOMAIN: 0000: enabled 1
940 18:55:44.453014 GPIO: 0: enabled 1
941 18:55:44.453095 PCI: 00:00.0: enabled 1
942 18:55:44.456573 PCI: 00:01.0: enabled 0
943 18:55:44.459863 PCI: 00:01.1: enabled 0
944 18:55:44.463228 PCI: 00:02.0: enabled 1
945 18:55:44.463310 PCI: 00:04.0: enabled 1
946 18:55:44.466634 PCI: 00:05.0: enabled 0
947 18:55:44.470192 PCI: 00:06.0: enabled 1
948 18:55:44.470274 PCI: 00:06.2: enabled 0
949 18:55:44.473079 PCI: 00:07.0: enabled 0
950 18:55:44.476747 PCI: 00:07.1: enabled 0
951 18:55:44.480242 PCI: 00:07.2: enabled 0
952 18:55:44.480324 PCI: 00:07.3: enabled 0
953 18:55:44.483280 PCI: 00:08.0: enabled 0
954 18:55:44.486700 PCI: 00:09.0: enabled 0
955 18:55:44.489918 PCI: 00:0a.0: enabled 1
956 18:55:44.490001 PCI: 00:0d.0: enabled 1
957 18:55:44.493839 PCI: 00:0d.1: enabled 0
958 18:55:44.496648 PCI: 00:0d.2: enabled 0
959 18:55:44.496729 PCI: 00:0d.3: enabled 0
960 18:55:44.500292 PCI: 00:0e.0: enabled 0
961 18:55:44.503376 PCI: 00:10.0: enabled 0
962 18:55:44.506415 PCI: 00:10.1: enabled 0
963 18:55:44.506501 PCI: 00:10.6: enabled 0
964 18:55:44.509795 PCI: 00:10.7: enabled 0
965 18:55:44.513387 PCI: 00:12.0: enabled 0
966 18:55:44.516835 PCI: 00:12.6: enabled 0
967 18:55:44.516919 PCI: 00:12.7: enabled 0
968 18:55:44.519792 PCI: 00:13.0: enabled 0
969 18:55:44.523531 PCI: 00:14.0: enabled 1
970 18:55:44.526466 PCI: 00:14.1: enabled 0
971 18:55:44.526549 PCI: 00:14.2: enabled 1
972 18:55:44.529832 PCI: 00:14.3: enabled 1
973 18:55:44.533336 PCI: 00:15.0: enabled 1
974 18:55:44.533420 PCI: 00:15.1: enabled 1
975 18:55:44.536772 PCI: 00:15.2: enabled 0
976 18:55:44.539928 PCI: 00:15.3: enabled 1
977 18:55:44.543204 PCI: 00:16.0: enabled 1
978 18:55:44.543287 PCI: 00:16.1: enabled 0
979 18:55:44.546801 PCI: 00:16.2: enabled 0
980 18:55:44.550002 PCI: 00:16.3: enabled 0
981 18:55:44.553184 PCI: 00:16.4: enabled 0
982 18:55:44.553268 PCI: 00:16.5: enabled 0
983 18:55:44.556539 PCI: 00:17.0: enabled 1
984 18:55:44.559910 PCI: 00:19.0: enabled 0
985 18:55:44.563336 PCI: 00:19.1: enabled 1
986 18:55:44.563420 PCI: 00:19.2: enabled 0
987 18:55:44.566681 PCI: 00:1a.0: enabled 0
988 18:55:44.570169 PCI: 00:1c.0: enabled 0
989 18:55:44.573524 PCI: 00:1c.1: enabled 0
990 18:55:44.573606 PCI: 00:1c.2: enabled 0
991 18:55:44.576941 PCI: 00:1c.3: enabled 0
992 18:55:44.579862 PCI: 00:1c.4: enabled 0
993 18:55:44.579946 PCI: 00:1c.5: enabled 0
994 18:55:44.583065 PCI: 00:1c.6: enabled 0
995 18:55:44.586546 PCI: 00:1c.7: enabled 0
996 18:55:44.589917 PCI: 00:1d.0: enabled 0
997 18:55:44.590002 PCI: 00:1d.1: enabled 0
998 18:55:44.593135 PCI: 00:1d.2: enabled 0
999 18:55:44.596439 PCI: 00:1d.3: enabled 0
1000 18:55:44.600008 PCI: 00:1e.0: enabled 1
1001 18:55:44.600091 PCI: 00:1e.1: enabled 0
1002 18:55:44.603149 PCI: 00:1e.2: enabled 0
1003 18:55:44.606660 PCI: 00:1e.3: enabled 1
1004 18:55:44.609831 PCI: 00:1f.0: enabled 1
1005 18:55:44.609940 PCI: 00:1f.1: enabled 0
1006 18:55:44.612912 PCI: 00:1f.2: enabled 1
1007 18:55:44.616312 PCI: 00:1f.3: enabled 1
1008 18:55:44.616395 PCI: 00:1f.4: enabled 0
1009 18:55:44.619796 PCI: 00:1f.5: enabled 1
1010 18:55:44.623288 PCI: 00:1f.6: enabled 0
1011 18:55:44.626267 PCI: 00:1f.7: enabled 0
1012 18:55:44.626351 GENERIC: 0.0: enabled 1
1013 18:55:44.629889 GENERIC: 0.0: enabled 1
1014 18:55:44.633194 GENERIC: 1.0: enabled 1
1015 18:55:44.636628 GENERIC: 0.0: enabled 1
1016 18:55:44.636712 GENERIC: 1.0: enabled 1
1017 18:55:44.640079 USB0 port 0: enabled 1
1018 18:55:44.643074 USB0 port 0: enabled 1
1019 18:55:44.643157 GENERIC: 0.0: enabled 1
1020 18:55:44.646365 I2C: 00:1a: enabled 1
1021 18:55:44.649827 I2C: 00:31: enabled 1
1022 18:55:44.653112 I2C: 00:32: enabled 1
1023 18:55:44.653196 I2C: 00:50: enabled 1
1024 18:55:44.656344 I2C: 00:10: enabled 1
1025 18:55:44.659889 I2C: 00:15: enabled 1
1026 18:55:44.659971 I2C: 00:2c: enabled 1
1027 18:55:44.663400 GENERIC: 0.0: enabled 1
1028 18:55:44.666204 SPI: 00: enabled 1
1029 18:55:44.666286 PNP: 0c09.0: enabled 1
1030 18:55:44.669456 GENERIC: 0.0: enabled 1
1031 18:55:44.672783 USB3 port 0: enabled 1
1032 18:55:44.672866 USB3 port 1: enabled 0
1033 18:55:44.676422 USB3 port 2: enabled 1
1034 18:55:44.679963 USB3 port 3: enabled 0
1035 18:55:44.680045 USB2 port 0: enabled 1
1036 18:55:44.682800 USB2 port 1: enabled 0
1037 18:55:44.686203 USB2 port 2: enabled 1
1038 18:55:44.689452 USB2 port 3: enabled 0
1039 18:55:44.689536 USB2 port 4: enabled 0
1040 18:55:44.693238 USB2 port 5: enabled 1
1041 18:55:44.696244 USB2 port 6: enabled 0
1042 18:55:44.696327 USB2 port 7: enabled 0
1043 18:55:44.699459 USB2 port 8: enabled 1
1044 18:55:44.703007 USB2 port 9: enabled 1
1045 18:55:44.706211 USB3 port 0: enabled 1
1046 18:55:44.706293 USB3 port 1: enabled 0
1047 18:55:44.709376 USB3 port 2: enabled 0
1048 18:55:44.713157 USB3 port 3: enabled 0
1049 18:55:44.713239 GENERIC: 0.0: enabled 1
1050 18:55:44.716123 GENERIC: 1.0: enabled 1
1051 18:55:44.719669 APIC: 00: enabled 1
1052 18:55:44.719752 APIC: 12: enabled 1
1053 18:55:44.723024 APIC: 14: enabled 1
1054 18:55:44.726244 APIC: 16: enabled 1
1055 18:55:44.726326 APIC: 10: enabled 1
1056 18:55:44.729358 APIC: 01: enabled 1
1057 18:55:44.729440 APIC: 08: enabled 1
1058 18:55:44.732878 APIC: 09: enabled 1
1059 18:55:44.736157 Compare with tree...
1060 18:55:44.736239 Root Device: enabled 1
1061 18:55:44.739499 CPU_CLUSTER: 0: enabled 1
1062 18:55:44.742670 APIC: 00: enabled 1
1063 18:55:44.746083 APIC: 12: enabled 1
1064 18:55:44.746164 APIC: 14: enabled 1
1065 18:55:44.749574 APIC: 16: enabled 1
1066 18:55:44.753380 APIC: 10: enabled 1
1067 18:55:44.753461 APIC: 01: enabled 1
1068 18:55:44.755883 APIC: 08: enabled 1
1069 18:55:44.759587 APIC: 09: enabled 1
1070 18:55:44.759669 DOMAIN: 0000: enabled 1
1071 18:55:44.763431 GPIO: 0: enabled 1
1072 18:55:44.766281 PCI: 00:00.0: enabled 1
1073 18:55:44.769587 PCI: 00:01.0: enabled 0
1074 18:55:44.769669 PCI: 00:01.1: enabled 0
1075 18:55:44.773168 PCI: 00:02.0: enabled 1
1076 18:55:44.776358 PCI: 00:04.0: enabled 1
1077 18:55:44.779705 GENERIC: 0.0: enabled 1
1078 18:55:44.783052 PCI: 00:05.0: enabled 0
1079 18:55:44.783133 PCI: 00:06.0: enabled 1
1080 18:55:44.786154 PCI: 00:06.2: enabled 0
1081 18:55:44.789485 PCI: 00:08.0: enabled 0
1082 18:55:44.792669 PCI: 00:09.0: enabled 0
1083 18:55:44.796070 PCI: 00:0a.0: enabled 1
1084 18:55:44.796151 PCI: 00:0d.0: enabled 1
1085 18:55:44.799323 USB0 port 0: enabled 1
1086 18:55:44.803337 USB3 port 0: enabled 1
1087 18:55:44.806175 USB3 port 1: enabled 0
1088 18:55:44.809247 USB3 port 2: enabled 1
1089 18:55:44.809328 USB3 port 3: enabled 0
1090 18:55:44.812641 PCI: 00:0d.1: enabled 0
1091 18:55:44.815959 PCI: 00:0d.2: enabled 0
1092 18:55:44.819328 PCI: 00:0d.3: enabled 0
1093 18:55:44.822615 PCI: 00:0e.0: enabled 0
1094 18:55:44.822696 PCI: 00:10.0: enabled 0
1095 18:55:44.826123 PCI: 00:10.1: enabled 0
1096 18:55:44.829578 PCI: 00:10.6: enabled 0
1097 18:55:44.832482 PCI: 00:10.7: enabled 0
1098 18:55:44.835924 PCI: 00:12.0: enabled 0
1099 18:55:44.836005 PCI: 00:12.6: enabled 0
1100 18:55:44.839487 PCI: 00:12.7: enabled 0
1101 18:55:44.843003 PCI: 00:13.0: enabled 0
1102 18:55:44.846311 PCI: 00:14.0: enabled 1
1103 18:55:44.849288 USB0 port 0: enabled 1
1104 18:55:44.849385 USB2 port 0: enabled 1
1105 18:55:44.852721 USB2 port 1: enabled 0
1106 18:55:44.856187 USB2 port 2: enabled 1
1107 18:55:44.859385 USB2 port 3: enabled 0
1108 18:55:44.862599 USB2 port 4: enabled 0
1109 18:55:44.865768 USB2 port 5: enabled 1
1110 18:55:44.865865 USB2 port 6: enabled 0
1111 18:55:44.869070 USB2 port 7: enabled 0
1112 18:55:44.872744 USB2 port 8: enabled 1
1113 18:55:44.875840 USB2 port 9: enabled 1
1114 18:55:44.879102 USB3 port 0: enabled 1
1115 18:55:44.879184 USB3 port 1: enabled 0
1116 18:55:44.882486 USB3 port 2: enabled 0
1117 18:55:44.885944 USB3 port 3: enabled 0
1118 18:55:44.889202 PCI: 00:14.1: enabled 0
1119 18:55:44.892646 PCI: 00:14.2: enabled 1
1120 18:55:44.892728 PCI: 00:14.3: enabled 1
1121 18:55:44.895615 GENERIC: 0.0: enabled 1
1122 18:55:44.898955 PCI: 00:15.0: enabled 1
1123 18:55:44.902813 I2C: 00:1a: enabled 1
1124 18:55:44.906032 I2C: 00:31: enabled 1
1125 18:55:44.906113 I2C: 00:32: enabled 1
1126 18:55:44.908882 PCI: 00:15.1: enabled 1
1127 18:55:44.912383 I2C: 00:50: enabled 1
1128 18:55:44.915572 PCI: 00:15.2: enabled 0
1129 18:55:44.918871 PCI: 00:15.3: enabled 1
1130 18:55:44.918952 I2C: 00:10: enabled 1
1131 18:55:44.922226 PCI: 00:16.0: enabled 1
1132 18:55:44.925641 PCI: 00:16.1: enabled 0
1133 18:55:44.928833 PCI: 00:16.2: enabled 0
1134 18:55:44.928913 PCI: 00:16.3: enabled 0
1135 18:55:44.932475 PCI: 00:16.4: enabled 0
1136 18:55:44.935648 PCI: 00:16.5: enabled 0
1137 18:55:44.939107 PCI: 00:17.0: enabled 1
1138 18:55:44.942322 PCI: 00:19.0: enabled 0
1139 18:55:44.942403 PCI: 00:19.1: enabled 1
1140 18:55:44.946193 I2C: 00:15: enabled 1
1141 18:55:44.949305 I2C: 00:2c: enabled 1
1142 18:55:44.952478 PCI: 00:19.2: enabled 0
1143 18:55:44.955654 PCI: 00:1a.0: enabled 0
1144 18:55:44.955738 PCI: 00:1e.0: enabled 1
1145 18:55:44.959111 PCI: 00:1e.1: enabled 0
1146 18:55:44.962473 PCI: 00:1e.2: enabled 0
1147 18:55:44.966006 PCI: 00:1e.3: enabled 1
1148 18:55:44.966089 SPI: 00: enabled 1
1149 18:55:44.969326 PCI: 00:1f.0: enabled 1
1150 18:55:44.972177 PNP: 0c09.0: enabled 1
1151 18:55:44.975451 PCI: 00:1f.1: enabled 0
1152 18:55:44.979037 PCI: 00:1f.2: enabled 1
1153 18:55:44.979119 GENERIC: 0.0: enabled 1
1154 18:55:44.982008 GENERIC: 0.0: enabled 1
1155 18:55:44.985338 GENERIC: 1.0: enabled 1
1156 18:55:44.988910 PCI: 00:1f.3: enabled 1
1157 18:55:44.992138 PCI: 00:1f.4: enabled 0
1158 18:55:44.995514 PCI: 00:1f.5: enabled 1
1159 18:55:44.995596 PCI: 00:1f.6: enabled 0
1160 18:55:44.998613 PCI: 00:1f.7: enabled 0
1161 18:55:45.002266 Root Device scanning...
1162 18:55:45.005332 scan_static_bus for Root Device
1163 18:55:45.008511 CPU_CLUSTER: 0 enabled
1164 18:55:45.008591 DOMAIN: 0000 enabled
1165 18:55:45.011990 DOMAIN: 0000 scanning...
1166 18:55:45.015390 PCI: pci_scan_bus for bus 00
1167 18:55:45.018619 PCI: 00:00.0 [8086/0000] ops
1168 18:55:45.021855 PCI: 00:00.0 [8086/4609] enabled
1169 18:55:45.025512 PCI: 00:02.0 [8086/0000] bus ops
1170 18:55:45.028622 PCI: 00:02.0 [8086/46b3] enabled
1171 18:55:45.032345 PCI: 00:04.0 [8086/0000] bus ops
1172 18:55:45.035237 PCI: 00:04.0 [8086/461d] enabled
1173 18:55:45.038664 PCI: 00:06.0 [8086/0000] bus ops
1174 18:55:45.042125 PCI: 00:06.0 [8086/464d] enabled
1175 18:55:45.045710 PCI: 00:08.0 [8086/464f] disabled
1176 18:55:45.048890 PCI: 00:0a.0 [8086/467d] enabled
1177 18:55:45.052271 PCI: 00:0d.0 [8086/0000] bus ops
1178 18:55:45.055705 PCI: 00:0d.0 [8086/461e] enabled
1179 18:55:45.058815 PCI: 00:14.0 [8086/0000] bus ops
1180 18:55:45.062088 PCI: 00:14.0 [8086/51ed] enabled
1181 18:55:45.065844 PCI: 00:14.2 [8086/51ef] enabled
1182 18:55:45.068916 PCI: 00:14.3 [8086/0000] bus ops
1183 18:55:45.072485 PCI: 00:14.3 [8086/51f0] enabled
1184 18:55:45.075759 PCI: 00:15.0 [8086/0000] bus ops
1185 18:55:45.079030 PCI: 00:15.0 [8086/51e8] enabled
1186 18:55:45.082423 PCI: 00:15.1 [8086/0000] bus ops
1187 18:55:45.085821 PCI: 00:15.1 [8086/51e9] enabled
1188 18:55:45.088779 PCI: 00:15.2 [8086/0000] bus ops
1189 18:55:45.092149 PCI: 00:15.2 [8086/51ea] disabled
1190 18:55:45.095496 PCI: 00:15.3 [8086/0000] bus ops
1191 18:55:45.099073 PCI: 00:15.3 [8086/51eb] enabled
1192 18:55:45.102271 PCI: 00:16.0 [8086/0000] ops
1193 18:55:45.105663 PCI: 00:16.0 [8086/51e0] enabled
1194 18:55:45.112427 PCI: Static device PCI: 00:17.0 not found, disabling it.
1195 18:55:45.115791 PCI: 00:19.0 [8086/0000] bus ops
1196 18:55:45.118795 PCI: 00:19.0 [8086/51c5] disabled
1197 18:55:45.122583 PCI: 00:19.1 [8086/0000] bus ops
1198 18:55:45.125541 PCI: 00:19.1 [8086/51c6] enabled
1199 18:55:45.129004 PCI: 00:1e.0 [8086/0000] ops
1200 18:55:45.132363 PCI: 00:1e.0 [8086/51a8] enabled
1201 18:55:45.135906 PCI: 00:1e.3 [8086/0000] bus ops
1202 18:55:45.138721 PCI: 00:1e.3 [8086/51ab] enabled
1203 18:55:45.141997 PCI: 00:1f.0 [8086/0000] bus ops
1204 18:55:45.145299 PCI: 00:1f.0 [8086/5182] enabled
1205 18:55:45.145382 RTC Init
1206 18:55:45.148987 Set power on after power failure.
1207 18:55:45.152593 Disabling Deep S3
1208 18:55:45.152677 Disabling Deep S3
1209 18:55:45.155330 Disabling Deep S4
1210 18:55:45.159034 Disabling Deep S4
1211 18:55:45.159117 Disabling Deep S5
1212 18:55:45.161939 Disabling Deep S5
1213 18:55:45.166041 PCI: 00:1f.2 [0000/0000] hidden
1214 18:55:45.168627 PCI: 00:1f.3 [8086/0000] bus ops
1215 18:55:45.172230 PCI: 00:1f.3 [8086/51c8] enabled
1216 18:55:45.175473 PCI: 00:1f.5 [8086/0000] bus ops
1217 18:55:45.178698 PCI: 00:1f.5 [8086/51a4] enabled
1218 18:55:45.178781 GPIO: 0 enabled
1219 18:55:45.182079 PCI: Leftover static devices:
1220 18:55:45.182162 PCI: 00:01.0
1221 18:55:45.185890 PCI: 00:01.1
1222 18:55:45.185976 PCI: 00:05.0
1223 18:55:45.188844 PCI: 00:06.2
1224 18:55:45.188926 PCI: 00:09.0
1225 18:55:45.192128 PCI: 00:0d.1
1226 18:55:45.192210 PCI: 00:0d.2
1227 18:55:45.192274 PCI: 00:0d.3
1228 18:55:45.195592 PCI: 00:0e.0
1229 18:55:45.195675 PCI: 00:10.0
1230 18:55:45.198667 PCI: 00:10.1
1231 18:55:45.198749 PCI: 00:10.6
1232 18:55:45.198814 PCI: 00:10.7
1233 18:55:45.202265 PCI: 00:12.0
1234 18:55:45.202347 PCI: 00:12.6
1235 18:55:45.205393 PCI: 00:12.7
1236 18:55:45.205475 PCI: 00:13.0
1237 18:55:45.205540 PCI: 00:14.1
1238 18:55:45.209186 PCI: 00:16.1
1239 18:55:45.209268 PCI: 00:16.2
1240 18:55:45.212418 PCI: 00:16.3
1241 18:55:45.212500 PCI: 00:16.4
1242 18:55:45.215790 PCI: 00:16.5
1243 18:55:45.215874 PCI: 00:17.0
1244 18:55:45.215938 PCI: 00:19.2
1245 18:55:45.218875 PCI: 00:1a.0
1246 18:55:45.218957 PCI: 00:1e.1
1247 18:55:45.222016 PCI: 00:1e.2
1248 18:55:45.222118 PCI: 00:1f.1
1249 18:55:45.222184 PCI: 00:1f.4
1250 18:55:45.225394 PCI: 00:1f.6
1251 18:55:45.225476 PCI: 00:1f.7
1252 18:55:45.228660 PCI: Check your devicetree.cb.
1253 18:55:45.232148 PCI: 00:02.0 scanning...
1254 18:55:45.235367 scan_generic_bus for PCI: 00:02.0
1255 18:55:45.238613 scan_generic_bus for PCI: 00:02.0 done
1256 18:55:45.245470 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1257 18:55:45.245552 PCI: 00:04.0 scanning...
1258 18:55:45.248827 scan_generic_bus for PCI: 00:04.0
1259 18:55:45.252724 GENERIC: 0.0 enabled
1260 18:55:45.258678 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1261 18:55:45.261900 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1262 18:55:45.265215 PCI: 00:06.0 scanning...
1263 18:55:45.268787 do_pci_scan_bridge for PCI: 00:06.0
1264 18:55:45.271896 PCI: pci_scan_bus for bus 01
1265 18:55:45.275358 PCI: 01:00.0 [15b7/5009] enabled
1266 18:55:45.278832 Enabling Common Clock Configuration
1267 18:55:45.282268 L1 Sub-State supported from root port 6
1268 18:55:45.285538 L1 Sub-State Support = 0x5
1269 18:55:45.288765 CommonModeRestoreTime = 0x6e
1270 18:55:45.292038 Power On Value = 0x5, Power On Scale = 0x2
1271 18:55:45.295167 ASPM: Enabled L1
1272 18:55:45.298791 PCIe: Max_Payload_Size adjusted to 256
1273 18:55:45.302073 PCI: 01:00.0: Enabled LTR
1274 18:55:45.305232 PCI: 01:00.0: Programmed LTR max latencies
1275 18:55:45.312124 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1276 18:55:45.312207 PCI: 00:0d.0 scanning...
1277 18:55:45.315396 scan_static_bus for PCI: 00:0d.0
1278 18:55:45.318896 USB0 port 0 enabled
1279 18:55:45.321755 USB0 port 0 scanning...
1280 18:55:45.325021 scan_static_bus for USB0 port 0
1281 18:55:45.325103 USB3 port 0 enabled
1282 18:55:45.328574 USB3 port 1 disabled
1283 18:55:45.331955 USB3 port 2 enabled
1284 18:55:45.332035 USB3 port 3 disabled
1285 18:55:45.335516 USB3 port 0 scanning...
1286 18:55:45.338314 scan_static_bus for USB3 port 0
1287 18:55:45.342092 scan_static_bus for USB3 port 0 done
1288 18:55:45.345221 scan_bus: bus USB3 port 0 finished in 6 msecs
1289 18:55:45.348317 USB3 port 2 scanning...
1290 18:55:45.352032 scan_static_bus for USB3 port 2
1291 18:55:45.355556 scan_static_bus for USB3 port 2 done
1292 18:55:45.361529 scan_bus: bus USB3 port 2 finished in 6 msecs
1293 18:55:45.364890 scan_static_bus for USB0 port 0 done
1294 18:55:45.368754 scan_bus: bus USB0 port 0 finished in 43 msecs
1295 18:55:45.371684 scan_static_bus for PCI: 00:0d.0 done
1296 18:55:45.378483 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1297 18:55:45.378567 PCI: 00:14.0 scanning...
1298 18:55:45.381827 scan_static_bus for PCI: 00:14.0
1299 18:55:45.384805 USB0 port 0 enabled
1300 18:55:45.388420 USB0 port 0 scanning...
1301 18:55:45.391545 scan_static_bus for USB0 port 0
1302 18:55:45.391628 USB2 port 0 enabled
1303 18:55:45.395020 USB2 port 1 disabled
1304 18:55:45.398239 USB2 port 2 enabled
1305 18:55:45.398323 USB2 port 3 disabled
1306 18:55:45.401476 USB2 port 4 disabled
1307 18:55:45.404694 USB2 port 5 enabled
1308 18:55:45.404778 USB2 port 6 disabled
1309 18:55:45.408303 USB2 port 7 disabled
1310 18:55:45.411581 USB2 port 8 enabled
1311 18:55:45.411664 USB2 port 9 enabled
1312 18:55:45.414914 USB3 port 0 enabled
1313 18:55:45.414997 USB3 port 1 disabled
1314 18:55:45.418177 USB3 port 2 disabled
1315 18:55:45.421281 USB3 port 3 disabled
1316 18:55:45.421365 USB2 port 0 scanning...
1317 18:55:45.424668 scan_static_bus for USB2 port 0
1318 18:55:45.431604 scan_static_bus for USB2 port 0 done
1319 18:55:45.434859 scan_bus: bus USB2 port 0 finished in 6 msecs
1320 18:55:45.438068 USB2 port 2 scanning...
1321 18:55:45.441605 scan_static_bus for USB2 port 2
1322 18:55:45.445089 scan_static_bus for USB2 port 2 done
1323 18:55:45.448081 scan_bus: bus USB2 port 2 finished in 6 msecs
1324 18:55:45.451160 USB2 port 5 scanning...
1325 18:55:45.454657 scan_static_bus for USB2 port 5
1326 18:55:45.457852 scan_static_bus for USB2 port 5 done
1327 18:55:45.461349 scan_bus: bus USB2 port 5 finished in 6 msecs
1328 18:55:45.464623 USB2 port 8 scanning...
1329 18:55:45.467885 scan_static_bus for USB2 port 8
1330 18:55:45.471277 scan_static_bus for USB2 port 8 done
1331 18:55:45.474591 scan_bus: bus USB2 port 8 finished in 6 msecs
1332 18:55:45.477841 USB2 port 9 scanning...
1333 18:55:45.481219 scan_static_bus for USB2 port 9
1334 18:55:45.484724 scan_static_bus for USB2 port 9 done
1335 18:55:45.491606 scan_bus: bus USB2 port 9 finished in 6 msecs
1336 18:55:45.491696 USB3 port 0 scanning...
1337 18:55:45.494937 scan_static_bus for USB3 port 0
1338 18:55:45.498271 scan_static_bus for USB3 port 0 done
1339 18:55:45.504672 scan_bus: bus USB3 port 0 finished in 6 msecs
1340 18:55:45.508458 scan_static_bus for USB0 port 0 done
1341 18:55:45.511218 scan_bus: bus USB0 port 0 finished in 120 msecs
1342 18:55:45.518049 scan_static_bus for PCI: 00:14.0 done
1343 18:55:45.521527 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1344 18:55:45.524517 PCI: 00:14.3 scanning...
1345 18:55:45.527875 scan_static_bus for PCI: 00:14.3
1346 18:55:45.527959 GENERIC: 0.0 enabled
1347 18:55:45.534469 scan_static_bus for PCI: 00:14.3 done
1348 18:55:45.538057 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1349 18:55:45.541082 PCI: 00:15.0 scanning...
1350 18:55:45.544324 scan_static_bus for PCI: 00:15.0
1351 18:55:45.544409 I2C: 00:1a enabled
1352 18:55:45.548129 I2C: 00:31 enabled
1353 18:55:45.551496 I2C: 00:32 enabled
1354 18:55:45.554550 scan_static_bus for PCI: 00:15.0 done
1355 18:55:45.557812 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1356 18:55:45.560990 PCI: 00:15.1 scanning...
1357 18:55:45.564868 scan_static_bus for PCI: 00:15.1
1358 18:55:45.564963 I2C: 00:50 enabled
1359 18:55:45.570824 scan_static_bus for PCI: 00:15.1 done
1360 18:55:45.574408 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1361 18:55:45.577765 PCI: 00:15.3 scanning...
1362 18:55:45.581119 scan_static_bus for PCI: 00:15.3
1363 18:55:45.581204 I2C: 00:10 enabled
1364 18:55:45.587849 scan_static_bus for PCI: 00:15.3 done
1365 18:55:45.591025 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1366 18:55:45.594653 PCI: 00:19.1 scanning...
1367 18:55:45.597510 scan_static_bus for PCI: 00:19.1
1368 18:55:45.597598 I2C: 00:15 enabled
1369 18:55:45.601534 I2C: 00:2c enabled
1370 18:55:45.604311 scan_static_bus for PCI: 00:19.1 done
1371 18:55:45.607453 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1372 18:55:45.610808 PCI: 00:1e.3 scanning...
1373 18:55:45.614290 scan_generic_bus for PCI: 00:1e.3
1374 18:55:45.617551 SPI: 00 enabled
1375 18:55:45.623982 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1376 18:55:45.627510 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1377 18:55:45.630751 PCI: 00:1f.0 scanning...
1378 18:55:45.634522 scan_static_bus for PCI: 00:1f.0
1379 18:55:45.634610 PNP: 0c09.0 enabled
1380 18:55:45.637551 PNP: 0c09.0 scanning...
1381 18:55:45.641268 scan_static_bus for PNP: 0c09.0
1382 18:55:45.644136 scan_static_bus for PNP: 0c09.0 done
1383 18:55:45.651347 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1384 18:55:45.654502 scan_static_bus for PCI: 00:1f.0 done
1385 18:55:45.657482 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1386 18:55:45.660823 PCI: 00:1f.2 scanning...
1387 18:55:45.664243 scan_static_bus for PCI: 00:1f.2
1388 18:55:45.667788 GENERIC: 0.0 enabled
1389 18:55:45.667876 GENERIC: 0.0 scanning...
1390 18:55:45.670958 scan_static_bus for GENERIC: 0.0
1391 18:55:45.674188 GENERIC: 0.0 enabled
1392 18:55:45.677393 GENERIC: 1.0 enabled
1393 18:55:45.680648 scan_static_bus for GENERIC: 0.0 done
1394 18:55:45.684259 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1395 18:55:45.687467 scan_static_bus for PCI: 00:1f.2 done
1396 18:55:45.694048 scan_bus: bus PCI: 00:1f.2 finished in 27 msecs
1397 18:55:45.697309 PCI: 00:1f.3 scanning...
1398 18:55:45.700920 scan_static_bus for PCI: 00:1f.3
1399 18:55:45.704031 scan_static_bus for PCI: 00:1f.3 done
1400 18:55:45.707665 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1401 18:55:45.711150 PCI: 00:1f.5 scanning...
1402 18:55:45.714077 scan_generic_bus for PCI: 00:1f.5
1403 18:55:45.717227 scan_generic_bus for PCI: 00:1f.5 done
1404 18:55:45.720858 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1405 18:55:45.727279 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1406 18:55:45.730547 scan_static_bus for Root Device done
1407 18:55:45.737551 scan_bus: bus Root Device finished in 729 msecs
1408 18:55:45.737650 done
1409 18:55:45.743900 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1410 18:55:45.747296 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1411 18:55:45.754287 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1412 18:55:45.757393 SPI flash protection: WPSW=0 SRP0=0
1413 18:55:45.763873 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1414 18:55:45.767515 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1415 18:55:45.770720 found VGA at PCI: 00:02.0
1416 18:55:45.773811 Setting up VGA for PCI: 00:02.0
1417 18:55:45.781197 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1418 18:55:45.784190 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1419 18:55:45.787161 Allocating resources...
1420 18:55:45.790511 Reading resources...
1421 18:55:45.794189 Root Device read_resources bus 0 link: 0
1422 18:55:45.797284 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1423 18:55:45.804019 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1424 18:55:45.807075 DOMAIN: 0000 read_resources bus 0 link: 0
1425 18:55:45.813787 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1426 18:55:45.820588 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1427 18:55:45.823828 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1428 18:55:45.830370 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1429 18:55:45.837218 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1430 18:55:45.843743 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1431 18:55:45.850463 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1432 18:55:45.857008 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1433 18:55:45.863787 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1434 18:55:45.870401 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1435 18:55:45.877550 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1436 18:55:45.883695 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1437 18:55:45.890869 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1438 18:55:45.896834 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1439 18:55:45.900372 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1440 18:55:45.906811 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1441 18:55:45.913629 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1442 18:55:45.920407 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1443 18:55:45.927068 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1444 18:55:45.933685 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1445 18:55:45.940549 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1446 18:55:45.943465 PCI: 00:04.0 read_resources bus 1 link: 0
1447 18:55:45.946984 PCI: 00:04.0 read_resources bus 1 link: 0 done
1448 18:55:45.953530 PCI: 00:06.0 read_resources bus 1 link: 0
1449 18:55:45.956891 PCI: 00:06.0 read_resources bus 1 link: 0 done
1450 18:55:45.960470 PCI: 00:0d.0 read_resources bus 0 link: 0
1451 18:55:45.966978 USB0 port 0 read_resources bus 0 link: 0
1452 18:55:45.970218 USB0 port 0 read_resources bus 0 link: 0 done
1453 18:55:45.973462 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1454 18:55:45.980373 PCI: 00:14.0 read_resources bus 0 link: 0
1455 18:55:45.983441 USB0 port 0 read_resources bus 0 link: 0
1456 18:55:45.986678 USB0 port 0 read_resources bus 0 link: 0 done
1457 18:55:45.993562 PCI: 00:14.0 read_resources bus 0 link: 0 done
1458 18:55:45.997021 PCI: 00:14.3 read_resources bus 0 link: 0
1459 18:55:46.000282 PCI: 00:14.3 read_resources bus 0 link: 0 done
1460 18:55:46.007063 PCI: 00:15.0 read_resources bus 0 link: 0
1461 18:55:46.010228 PCI: 00:15.0 read_resources bus 0 link: 0 done
1462 18:55:46.013840 PCI: 00:15.1 read_resources bus 0 link: 0
1463 18:55:46.020234 PCI: 00:15.1 read_resources bus 0 link: 0 done
1464 18:55:46.023527 PCI: 00:15.3 read_resources bus 0 link: 0
1465 18:55:46.026966 PCI: 00:15.3 read_resources bus 0 link: 0 done
1466 18:55:46.033795 PCI: 00:19.1 read_resources bus 0 link: 0
1467 18:55:46.037596 PCI: 00:19.1 read_resources bus 0 link: 0 done
1468 18:55:46.043890 PCI: 00:1e.3 read_resources bus 2 link: 0
1469 18:55:46.047159 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1470 18:55:46.050374 PCI: 00:1f.0 read_resources bus 0 link: 0
1471 18:55:46.057067 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1472 18:55:46.060619 PCI: 00:1f.2 read_resources bus 0 link: 0
1473 18:55:46.063584 GENERIC: 0.0 read_resources bus 0 link: 0
1474 18:55:46.070222 GENERIC: 0.0 read_resources bus 0 link: 0 done
1475 18:55:46.073358 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1476 18:55:46.080364 DOMAIN: 0000 read_resources bus 0 link: 0 done
1477 18:55:46.083646 Root Device read_resources bus 0 link: 0 done
1478 18:55:46.087060 Done reading resources.
1479 18:55:46.090100 Show resources in subtree (Root Device)...After reading.
1480 18:55:46.097133 Root Device child on link 0 CPU_CLUSTER: 0
1481 18:55:46.100140 CPU_CLUSTER: 0 child on link 0 APIC: 00
1482 18:55:46.100240 APIC: 00
1483 18:55:46.103624 APIC: 12
1484 18:55:46.103713 APIC: 14
1485 18:55:46.103779 APIC: 16
1486 18:55:46.106853 APIC: 10
1487 18:55:46.106939 APIC: 01
1488 18:55:46.110238 APIC: 08
1489 18:55:46.110326 APIC: 09
1490 18:55:46.113653 DOMAIN: 0000 child on link 0 GPIO: 0
1491 18:55:46.123772 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1492 18:55:46.133842 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1493 18:55:46.133972 GPIO: 0
1494 18:55:46.136669 PCI: 00:00.0
1495 18:55:46.146950 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 18:55:46.153648 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1497 18:55:46.163215 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1498 18:55:46.173207 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1499 18:55:46.183243 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1500 18:55:46.193487 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1501 18:55:46.203131 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1502 18:55:46.210221 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1503 18:55:46.220160 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1504 18:55:46.229995 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1505 18:55:46.240249 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1506 18:55:46.250029 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1507 18:55:46.260260 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1508 18:55:46.266852 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1509 18:55:46.276610 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1510 18:55:46.286656 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1511 18:55:46.296725 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1512 18:55:46.307032 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1513 18:55:46.316882 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1514 18:55:46.326945 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1515 18:55:46.333578 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1516 18:55:46.343614 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1517 18:55:46.353555 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1518 18:55:46.363438 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1519 18:55:46.373184 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1520 18:55:46.383363 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1521 18:55:46.393220 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1522 18:55:46.403174 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1523 18:55:46.403279 PCI: 00:02.0
1524 18:55:46.412896 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1525 18:55:46.423066 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1526 18:55:46.433204 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1527 18:55:46.436160 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1528 18:55:46.446265 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1529 18:55:46.449515 GENERIC: 0.0
1530 18:55:46.452584 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1531 18:55:46.462545 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1532 18:55:46.472739 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1533 18:55:46.479386 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1534 18:55:46.482609 PCI: 01:00.0
1535 18:55:46.492538 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1536 18:55:46.502474 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1537 18:55:46.502593 PCI: 00:08.0
1538 18:55:46.505803 PCI: 00:0a.0
1539 18:55:46.515925 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1540 18:55:46.519149 PCI: 00:0d.0 child on link 0 USB0 port 0
1541 18:55:46.529239 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1542 18:55:46.535937 USB0 port 0 child on link 0 USB3 port 0
1543 18:55:46.536023 USB3 port 0
1544 18:55:46.539521 USB3 port 1
1545 18:55:46.539604 USB3 port 2
1546 18:55:46.542393 USB3 port 3
1547 18:55:46.545618 PCI: 00:14.0 child on link 0 USB0 port 0
1548 18:55:46.555531 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1549 18:55:46.558947 USB0 port 0 child on link 0 USB2 port 0
1550 18:55:46.562164 USB2 port 0
1551 18:55:46.565363 USB2 port 1
1552 18:55:46.565447 USB2 port 2
1553 18:55:46.569050 USB2 port 3
1554 18:55:46.569132 USB2 port 4
1555 18:55:46.572389 USB2 port 5
1556 18:55:46.572471 USB2 port 6
1557 18:55:46.575761 USB2 port 7
1558 18:55:46.575844 USB2 port 8
1559 18:55:46.578980 USB2 port 9
1560 18:55:46.579063 USB3 port 0
1561 18:55:46.582382 USB3 port 1
1562 18:55:46.582465 USB3 port 2
1563 18:55:46.585608 USB3 port 3
1564 18:55:46.585690 PCI: 00:14.2
1565 18:55:46.595397 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1566 18:55:46.605604 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1567 18:55:46.612151 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1568 18:55:46.621998 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1569 18:55:46.622085 GENERIC: 0.0
1570 18:55:46.628440 PCI: 00:15.0 child on link 0 I2C: 00:1a
1571 18:55:46.638574 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 18:55:46.638663 I2C: 00:1a
1573 18:55:46.638730 I2C: 00:31
1574 18:55:46.641796 I2C: 00:32
1575 18:55:46.645735 PCI: 00:15.1 child on link 0 I2C: 00:50
1576 18:55:46.655603 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1577 18:55:46.659279 I2C: 00:50
1578 18:55:46.659383 PCI: 00:15.2
1579 18:55:46.662396 PCI: 00:15.3 child on link 0 I2C: 00:10
1580 18:55:46.672185 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1581 18:55:46.675694 I2C: 00:10
1582 18:55:46.675889 PCI: 00:16.0
1583 18:55:46.685512 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1584 18:55:46.688631 PCI: 00:19.0
1585 18:55:46.691807 PCI: 00:19.1 child on link 0 I2C: 00:15
1586 18:55:46.702223 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1587 18:55:46.705159 I2C: 00:15
1588 18:55:46.705295 I2C: 00:2c
1589 18:55:46.708679 PCI: 00:1e.0
1590 18:55:46.718530 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1591 18:55:46.721744 PCI: 00:1e.3 child on link 0 SPI: 00
1592 18:55:46.732261 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1593 18:55:46.735164 SPI: 00
1594 18:55:46.738649 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1595 18:55:46.748633 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1596 18:55:46.748716 PNP: 0c09.0
1597 18:55:46.758724 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1598 18:55:46.762086 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1599 18:55:46.771869 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1600 18:55:46.781662 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1601 18:55:46.785304 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1602 18:55:46.788851 GENERIC: 0.0
1603 18:55:46.788933 GENERIC: 1.0
1604 18:55:46.791697 PCI: 00:1f.3
1605 18:55:46.802253 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1606 18:55:46.811652 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1607 18:55:46.811736 PCI: 00:1f.5
1608 18:55:46.822063 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1609 18:55:46.828310 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1610 18:55:46.834983 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1611 18:55:46.841710 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1612 18:55:46.845170 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1613 18:55:46.851618 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1614 18:55:46.855108 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1615 18:55:46.862066 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1616 18:55:46.868567 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1617 18:55:46.878661 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1618 18:55:46.884853 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1619 18:55:46.891583 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1620 18:55:46.898334 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1621 18:55:46.907851 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1622 18:55:46.914967 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1623 18:55:46.918129 DOMAIN: 0000: Resource ranges:
1624 18:55:46.921800 * Base: 1000, Size: 800, Tag: 100
1625 18:55:46.924765 * Base: 1900, Size: e700, Tag: 100
1626 18:55:46.928194 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1627 18:55:46.935128 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1628 18:55:46.941341 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1629 18:55:46.951274 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1630 18:55:46.958110 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1631 18:55:46.964688 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1632 18:55:46.974609 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1633 18:55:46.981518 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1634 18:55:46.987890 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1635 18:55:46.997807 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1636 18:55:47.004391 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1637 18:55:47.011123 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1638 18:55:47.021090 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1639 18:55:47.027983 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1640 18:55:47.034522 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1641 18:55:47.041080 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1642 18:55:47.051060 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1643 18:55:47.057786 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1644 18:55:47.064528 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1645 18:55:47.074328 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1646 18:55:47.080905 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1647 18:55:47.087741 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1648 18:55:47.097817 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1649 18:55:47.104134 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1650 18:55:47.110596 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1651 18:55:47.120411 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1652 18:55:47.127322 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1653 18:55:47.133752 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1654 18:55:47.143948 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1655 18:55:47.150629 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1656 18:55:47.157351 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1657 18:55:47.166985 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1658 18:55:47.173477 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1659 18:55:47.176603 DOMAIN: 0000: Resource ranges:
1660 18:55:47.180055 * Base: 80400000, Size: 3fc00000, Tag: 200
1661 18:55:47.186611 * Base: d0000000, Size: 28000000, Tag: 200
1662 18:55:47.190233 * Base: fa000000, Size: 1000000, Tag: 200
1663 18:55:47.193503 * Base: fb001000, Size: 17ff000, Tag: 200
1664 18:55:47.200048 * Base: fe800000, Size: 300000, Tag: 200
1665 18:55:47.203416 * Base: feb80000, Size: 80000, Tag: 200
1666 18:55:47.206801 * Base: fed00000, Size: 40000, Tag: 200
1667 18:55:47.210385 * Base: fed70000, Size: 10000, Tag: 200
1668 18:55:47.213302 * Base: fed88000, Size: 8000, Tag: 200
1669 18:55:47.219892 * Base: fed93000, Size: d000, Tag: 200
1670 18:55:47.223316 * Base: feda2000, Size: 1e000, Tag: 200
1671 18:55:47.226467 * Base: fede0000, Size: 1220000, Tag: 200
1672 18:55:47.233289 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1673 18:55:47.239727 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1674 18:55:47.246612 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1675 18:55:47.253142 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1676 18:55:47.259695 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1677 18:55:47.266476 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1678 18:55:47.273201 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1679 18:55:47.279641 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1680 18:55:47.286373 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1681 18:55:47.292816 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1682 18:55:47.299627 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1683 18:55:47.305996 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1684 18:55:47.312647 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1685 18:55:47.319373 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1686 18:55:47.326300 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1687 18:55:47.332961 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1688 18:55:47.339203 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1689 18:55:47.345849 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1690 18:55:47.353149 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1691 18:55:47.358966 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1692 18:55:47.365711 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1693 18:55:47.372300 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1694 18:55:47.375613 PCI: 00:06.0: Resource ranges:
1695 18:55:47.382591 * Base: 80400000, Size: 100000, Tag: 200
1696 18:55:47.388906 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1697 18:55:47.395393 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1698 18:55:47.402672 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1699 18:55:47.409010 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1700 18:55:47.415293 Root Device assign_resources, bus 0 link: 0
1701 18:55:47.419025 DOMAIN: 0000 assign_resources, bus 0 link: 0
1702 18:55:47.428631 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1703 18:55:47.435931 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1704 18:55:47.442185 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1705 18:55:47.451864 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1706 18:55:47.455414 PCI: 00:04.0 assign_resources, bus 1 link: 0
1707 18:55:47.462192 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1708 18:55:47.468750 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1709 18:55:47.478615 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1710 18:55:47.488391 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1711 18:55:47.491737 PCI: 00:06.0 assign_resources, bus 1 link: 0
1712 18:55:47.498470 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1713 18:55:47.508527 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1714 18:55:47.511958 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1715 18:55:47.522099 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1716 18:55:47.528898 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1717 18:55:47.535023 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1718 18:55:47.538334 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1719 18:55:47.544853 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1720 18:55:47.551680 PCI: 00:14.0 assign_resources, bus 0 link: 0
1721 18:55:47.554923 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1722 18:55:47.564916 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1723 18:55:47.571793 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1724 18:55:47.581572 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1725 18:55:47.585089 PCI: 00:14.3 assign_resources, bus 0 link: 0
1726 18:55:47.588134 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1727 18:55:47.597818 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1728 18:55:47.601132 PCI: 00:15.0 assign_resources, bus 0 link: 0
1729 18:55:47.607819 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1730 18:55:47.614579 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1731 18:55:47.621204 PCI: 00:15.1 assign_resources, bus 0 link: 0
1732 18:55:47.624506 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1733 18:55:47.631175 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1734 18:55:47.637988 PCI: 00:15.3 assign_resources, bus 0 link: 0
1735 18:55:47.641492 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1736 18:55:47.651637 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1737 18:55:47.657703 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1738 18:55:47.661294 PCI: 00:19.1 assign_resources, bus 0 link: 0
1739 18:55:47.667896 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1740 18:55:47.674593 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1741 18:55:47.681032 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1742 18:55:47.684588 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1743 18:55:47.690992 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1744 18:55:47.694240 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1745 18:55:47.700895 LPC: Trying to open IO window from 800 size 1ff
1746 18:55:47.707761 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1747 18:55:47.714172 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1748 18:55:47.724356 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1749 18:55:47.727643 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1750 18:55:47.734380 Root Device assign_resources, bus 0 link: 0 done
1751 18:55:47.734464 Done setting resources.
1752 18:55:47.741029 Show resources in subtree (Root Device)...After assigning values.
1753 18:55:47.747470 Root Device child on link 0 CPU_CLUSTER: 0
1754 18:55:47.751054 CPU_CLUSTER: 0 child on link 0 APIC: 00
1755 18:55:47.751137 APIC: 00
1756 18:55:47.754052 APIC: 12
1757 18:55:47.754134 APIC: 14
1758 18:55:47.754199 APIC: 16
1759 18:55:47.757733 APIC: 10
1760 18:55:47.757815 APIC: 01
1761 18:55:47.760620 APIC: 08
1762 18:55:47.760702 APIC: 09
1763 18:55:47.764298 DOMAIN: 0000 child on link 0 GPIO: 0
1764 18:55:47.774065 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1765 18:55:47.784140 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1766 18:55:47.784223 GPIO: 0
1767 18:55:47.787411 PCI: 00:00.0
1768 18:55:47.797292 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1769 18:55:47.803990 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1770 18:55:47.813744 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1771 18:55:47.824055 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1772 18:55:47.834171 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1773 18:55:47.844175 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1774 18:55:47.854321 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1775 18:55:47.860499 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1776 18:55:47.870611 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1777 18:55:47.880578 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1778 18:55:47.890365 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1779 18:55:47.900870 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1780 18:55:47.910771 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1781 18:55:47.920936 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1782 18:55:47.926964 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1783 18:55:47.936907 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1784 18:55:47.946854 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1785 18:55:47.957040 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1786 18:55:47.966929 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1787 18:55:47.976849 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1788 18:55:47.986820 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1789 18:55:47.996727 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1790 18:55:48.003761 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1791 18:55:48.013750 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1792 18:55:48.023229 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1793 18:55:48.032952 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1794 18:55:48.042666 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1795 18:55:48.052725 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1796 18:55:48.053250 PCI: 00:02.0
1797 18:55:48.066340 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1798 18:55:48.075651 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1799 18:55:48.086041 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1800 18:55:48.089165 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1801 18:55:48.099577 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1802 18:55:48.102582 GENERIC: 0.0
1803 18:55:48.106042 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1804 18:55:48.116076 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1805 18:55:48.125936 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1806 18:55:48.139057 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1807 18:55:48.139549 PCI: 01:00.0
1808 18:55:48.148917 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1809 18:55:48.158626 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1810 18:55:48.162063 PCI: 00:08.0
1811 18:55:48.162489 PCI: 00:0a.0
1812 18:55:48.175424 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1813 18:55:48.178394 PCI: 00:0d.0 child on link 0 USB0 port 0
1814 18:55:48.188788 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1815 18:55:48.191951 USB0 port 0 child on link 0 USB3 port 0
1816 18:55:48.194885 USB3 port 0
1817 18:55:48.195272 USB3 port 1
1818 18:55:48.198507 USB3 port 2
1819 18:55:48.198895 USB3 port 3
1820 18:55:48.205273 PCI: 00:14.0 child on link 0 USB0 port 0
1821 18:55:48.214890 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1822 18:55:48.218430 USB0 port 0 child on link 0 USB2 port 0
1823 18:55:48.221993 USB2 port 0
1824 18:55:48.222501 USB2 port 1
1825 18:55:48.225308 USB2 port 2
1826 18:55:48.225986 USB2 port 3
1827 18:55:48.228261 USB2 port 4
1828 18:55:48.228778 USB2 port 5
1829 18:55:48.231603 USB2 port 6
1830 18:55:48.234671 USB2 port 7
1831 18:55:48.235094 USB2 port 8
1832 18:55:48.238392 USB2 port 9
1833 18:55:48.238874 USB3 port 0
1834 18:55:48.241776 USB3 port 1
1835 18:55:48.242306 USB3 port 2
1836 18:55:48.244789 USB3 port 3
1837 18:55:48.245302 PCI: 00:14.2
1838 18:55:48.254854 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1839 18:55:48.267662 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1840 18:55:48.272153 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1841 18:55:48.281122 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1842 18:55:48.283968 GENERIC: 0.0
1843 18:55:48.287608 PCI: 00:15.0 child on link 0 I2C: 00:1a
1844 18:55:48.297851 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1845 18:55:48.298380 I2C: 00:1a
1846 18:55:48.301137 I2C: 00:31
1847 18:55:48.301651 I2C: 00:32
1848 18:55:48.307688 PCI: 00:15.1 child on link 0 I2C: 00:50
1849 18:55:48.317580 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1850 18:55:48.318190 I2C: 00:50
1851 18:55:48.320623 PCI: 00:15.2
1852 18:55:48.324479 PCI: 00:15.3 child on link 0 I2C: 00:10
1853 18:55:48.334588 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1854 18:55:48.337697 I2C: 00:10
1855 18:55:48.338258 PCI: 00:16.0
1856 18:55:48.347594 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1857 18:55:48.350895 PCI: 00:19.0
1858 18:55:48.353981 PCI: 00:19.1 child on link 0 I2C: 00:15
1859 18:55:48.364290 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1860 18:55:48.367284 I2C: 00:15
1861 18:55:48.367798 I2C: 00:2c
1862 18:55:48.370585 PCI: 00:1e.0
1863 18:55:48.380798 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1864 18:55:48.384450 PCI: 00:1e.3 child on link 0 SPI: 00
1865 18:55:48.394048 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1866 18:55:48.397644 SPI: 00
1867 18:55:48.400928 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1868 18:55:48.410551 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1869 18:55:48.411073 PNP: 0c09.0
1870 18:55:48.420209 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1871 18:55:48.423903 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1872 18:55:48.433987 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1873 18:55:48.443825 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1874 18:55:48.447440 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1875 18:55:48.450537 GENERIC: 0.0
1876 18:55:48.451055 GENERIC: 1.0
1877 18:55:48.453848 PCI: 00:1f.3
1878 18:55:48.464014 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1879 18:55:48.473829 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1880 18:55:48.476529 PCI: 00:1f.5
1881 18:55:48.486993 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1882 18:55:48.487482 Done allocating resources.
1883 18:55:48.493421 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1884 18:55:48.499901 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1885 18:55:48.503621 Configure audio over I2S with MAX98373 NAU88L25B.
1886 18:55:48.509271 Enabling BT offload
1887 18:55:48.516980 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1888 18:55:48.519987 Enabling resources...
1889 18:55:48.523373 PCI: 00:00.0 subsystem <- 8086/4609
1890 18:55:48.526743 PCI: 00:00.0 cmd <- 06
1891 18:55:48.529899 PCI: 00:02.0 subsystem <- 8086/46b3
1892 18:55:48.533204 PCI: 00:02.0 cmd <- 03
1893 18:55:48.536758 PCI: 00:04.0 subsystem <- 8086/461d
1894 18:55:48.537286 PCI: 00:04.0 cmd <- 02
1895 18:55:48.539630 PCI: 00:06.0 bridge ctrl <- 0013
1896 18:55:48.542954 PCI: 00:06.0 subsystem <- 8086/464d
1897 18:55:48.546773 PCI: 00:06.0 cmd <- 106
1898 18:55:48.549768 PCI: 00:0a.0 subsystem <- 8086/467d
1899 18:55:48.553144 PCI: 00:0a.0 cmd <- 02
1900 18:55:48.556668 PCI: 00:0d.0 subsystem <- 8086/461e
1901 18:55:48.559484 PCI: 00:0d.0 cmd <- 02
1902 18:55:48.562749 PCI: 00:14.0 subsystem <- 8086/51ed
1903 18:55:48.566423 PCI: 00:14.0 cmd <- 02
1904 18:55:48.569958 PCI: 00:14.2 subsystem <- 8086/51ef
1905 18:55:48.570478 PCI: 00:14.2 cmd <- 02
1906 18:55:48.576496 PCI: 00:14.3 subsystem <- 8086/51f0
1907 18:55:48.577015 PCI: 00:14.3 cmd <- 02
1908 18:55:48.579837 PCI: 00:15.0 subsystem <- 8086/51e8
1909 18:55:48.582566 PCI: 00:15.0 cmd <- 02
1910 18:55:48.586139 PCI: 00:15.1 subsystem <- 8086/51e9
1911 18:55:48.589345 PCI: 00:15.1 cmd <- 06
1912 18:55:48.593337 PCI: 00:15.3 subsystem <- 8086/51eb
1913 18:55:48.595834 PCI: 00:15.3 cmd <- 02
1914 18:55:48.599930 PCI: 00:16.0 subsystem <- 8086/51e0
1915 18:55:48.600415 PCI: 00:16.0 cmd <- 02
1916 18:55:48.606020 PCI: 00:19.1 subsystem <- 8086/51c6
1917 18:55:48.606502 PCI: 00:19.1 cmd <- 02
1918 18:55:48.609651 PCI: 00:1e.0 subsystem <- 8086/51a8
1919 18:55:48.612850 PCI: 00:1e.0 cmd <- 06
1920 18:55:48.616456 PCI: 00:1e.3 subsystem <- 8086/51ab
1921 18:55:48.619922 PCI: 00:1e.3 cmd <- 02
1922 18:55:48.622626 PCI: 00:1f.0 subsystem <- 8086/5182
1923 18:55:48.626491 PCI: 00:1f.0 cmd <- 407
1924 18:55:48.629648 PCI: 00:1f.3 subsystem <- 8086/51c8
1925 18:55:48.630183 PCI: 00:1f.3 cmd <- 02
1926 18:55:48.635941 PCI: 00:1f.5 subsystem <- 8086/51a4
1927 18:55:48.636423 PCI: 00:1f.5 cmd <- 406
1928 18:55:48.639450 PCI: 01:00.0 cmd <- 02
1929 18:55:48.639937 done.
1930 18:55:48.646413 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1931 18:55:48.650255 ME: Version: Unavailable
1932 18:55:48.653122 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1933 18:55:48.656085 Initializing devices...
1934 18:55:48.659575 Root Device init
1935 18:55:48.660200 mainboard: EC init
1936 18:55:48.666212 Chrome EC: Set SMI mask to 0x0000000000000000
1937 18:55:48.669417 Chrome EC: UHEPI supported
1938 18:55:48.676188 Chrome EC: clear events_b mask to 0x0000000000000000
1939 18:55:48.682636 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1940 18:55:48.689493 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1941 18:55:48.695928 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1942 18:55:48.699279 Chrome EC: Set WAKE mask to 0x0000000000000000
1943 18:55:48.706803 Root Device init finished in 43 msecs
1944 18:55:48.707323 PCI: 00:00.0 init
1945 18:55:48.710348 CPU TDP = 15 Watts
1946 18:55:48.713641 CPU PL1 = 15 Watts
1947 18:55:48.714188 CPU PL2 = 55 Watts
1948 18:55:48.716770 CPU PL4 = 123 Watts
1949 18:55:48.719951 PCI: 00:00.0 init finished in 8 msecs
1950 18:55:48.723351 PCI: 00:02.0 init
1951 18:55:48.723802 GMA: Found VBT in CBFS
1952 18:55:48.726625 GMA: Found valid VBT in CBFS
1953 18:55:48.733643 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1954 18:55:48.740165 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1955 18:55:48.743681 PCI: 00:02.0 init finished in 18 msecs
1956 18:55:48.746901 PCI: 00:06.0 init
1957 18:55:48.750030 Initializing PCH PCIe bridge.
1958 18:55:48.753183 PCI: 00:06.0 init finished in 3 msecs
1959 18:55:48.756602 PCI: 00:0a.0 init
1960 18:55:48.760410 PCI: 00:0a.0 init finished in 0 msecs
1961 18:55:48.761041 PCI: 00:14.0 init
1962 18:55:48.763167 PCI: 00:14.0 init finished in 0 msecs
1963 18:55:48.766529 PCI: 00:14.2 init
1964 18:55:48.770050 PCI: 00:14.2 init finished in 0 msecs
1965 18:55:48.773411 PCI: 00:15.0 init
1966 18:55:48.776645 I2C bus 0 version 0x3230302a
1967 18:55:48.780143 DW I2C bus 0 at 0x80655000 (400 KHz)
1968 18:55:48.783664 PCI: 00:15.0 init finished in 6 msecs
1969 18:55:48.784191 PCI: 00:15.1 init
1970 18:55:48.786698 I2C bus 1 version 0x3230302a
1971 18:55:48.789949 DW I2C bus 1 at 0x80656000 (400 KHz)
1972 18:55:48.793349 PCI: 00:15.1 init finished in 6 msecs
1973 18:55:48.796627 PCI: 00:15.3 init
1974 18:55:48.799854 I2C bus 3 version 0x3230302a
1975 18:55:48.803357 DW I2C bus 3 at 0x80657000 (400 KHz)
1976 18:55:48.806757 PCI: 00:15.3 init finished in 6 msecs
1977 18:55:48.810197 PCI: 00:16.0 init
1978 18:55:48.813532 PCI: 00:16.0 init finished in 0 msecs
1979 18:55:48.814076 PCI: 00:19.1 init
1980 18:55:48.817010 I2C bus 5 version 0x3230302a
1981 18:55:48.819997 DW I2C bus 5 at 0x80659000 (400 KHz)
1982 18:55:48.826880 PCI: 00:19.1 init finished in 6 msecs
1983 18:55:48.827527 PCI: 00:1f.0 init
1984 18:55:48.830254 IOAPIC: Initializing IOAPIC at 0xfec00000
1985 18:55:48.833107 IOAPIC: ID = 0x02
1986 18:55:48.836678 IOAPIC: Dumping registers
1987 18:55:48.840137 reg 0x0000: 0x02000000
1988 18:55:48.840690 reg 0x0001: 0x00770020
1989 18:55:48.843630 reg 0x0002: 0x00000000
1990 18:55:48.846433 IOAPIC: 120 interrupts
1991 18:55:48.849908 IOAPIC: Clearing IOAPIC at 0xfec00000
1992 18:55:48.853329 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1993 18:55:48.860048 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1994 18:55:48.862891 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1995 18:55:48.870175 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1996 18:55:48.873109 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1997 18:55:48.880101 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1998 18:55:48.883338 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1999 18:55:48.889910 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2000 18:55:48.893227 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2001 18:55:48.896561 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2002 18:55:48.902801 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2003 18:55:48.906791 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2004 18:55:48.913222 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2005 18:55:48.916429 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2006 18:55:48.923013 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2007 18:55:48.925949 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2008 18:55:48.933022 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2009 18:55:48.936400 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2010 18:55:48.939766 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2011 18:55:48.945922 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2012 18:55:48.949509 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2013 18:55:48.956017 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2014 18:55:48.959138 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2015 18:55:48.965758 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2016 18:55:48.969019 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2017 18:55:48.975708 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2018 18:55:48.978958 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2019 18:55:48.982577 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2020 18:55:48.988961 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2021 18:55:48.992414 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2022 18:55:48.999345 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2023 18:55:49.002114 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2024 18:55:49.008961 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2025 18:55:49.012291 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2026 18:55:49.019113 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2027 18:55:49.022569 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2028 18:55:49.025958 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2029 18:55:49.032314 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2030 18:55:49.035891 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2031 18:55:49.042738 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2032 18:55:49.045760 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2033 18:55:49.052495 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2034 18:55:49.055431 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2035 18:55:49.062119 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2036 18:55:49.065572 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2037 18:55:49.069078 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2038 18:55:49.075494 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2039 18:55:49.078820 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2040 18:55:49.085822 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2041 18:55:49.089276 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2042 18:55:49.095680 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2043 18:55:49.099137 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2044 18:55:49.101920 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2045 18:55:49.109421 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2046 18:55:49.112416 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2047 18:55:49.118601 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2048 18:55:49.122083 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2049 18:55:49.128677 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2050 18:55:49.132287 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2051 18:55:49.138839 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2052 18:55:49.142249 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2053 18:55:49.145667 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2054 18:55:49.152004 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2055 18:55:49.155443 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2056 18:55:49.161979 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2057 18:55:49.165953 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2058 18:55:49.171910 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2059 18:55:49.175352 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2060 18:55:49.182306 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2061 18:55:49.185559 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2062 18:55:49.188454 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2063 18:55:49.194977 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2064 18:55:49.198524 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2065 18:55:49.205441 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2066 18:55:49.208965 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2067 18:55:49.214892 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2068 18:55:49.218361 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2069 18:55:49.225834 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2070 18:55:49.228554 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2071 18:55:49.231404 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2072 18:55:49.238796 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2073 18:55:49.242246 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2074 18:55:49.248519 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2075 18:55:49.251777 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2076 18:55:49.258388 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2077 18:55:49.261548 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2078 18:55:49.264903 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2079 18:55:49.271534 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2080 18:55:49.274729 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2081 18:55:49.281562 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2082 18:55:49.285030 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2083 18:55:49.291203 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2084 18:55:49.294818 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2085 18:55:49.301570 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2086 18:55:49.304741 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2087 18:55:49.311671 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2088 18:55:49.314323 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2089 18:55:49.318453 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2090 18:55:49.324995 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2091 18:55:49.328049 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2092 18:55:49.335212 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2093 18:55:49.338321 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2094 18:55:49.344799 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2095 18:55:49.348123 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2096 18:55:49.350961 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2097 18:55:49.358045 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2098 18:55:49.361441 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2099 18:55:49.367851 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2100 18:55:49.371147 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2101 18:55:49.377999 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2102 18:55:49.381187 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2103 18:55:49.387911 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2104 18:55:49.390905 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2105 18:55:49.394523 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2106 18:55:49.401051 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2107 18:55:49.404606 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2108 18:55:49.411361 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2109 18:55:49.414524 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2110 18:55:49.421176 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2111 18:55:49.424378 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2112 18:55:49.430921 IOAPIC: Bootstrap Processor Local APIC = 0x00
2113 18:55:49.434398 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2114 18:55:49.437810 PCI: 00:1f.0 init finished in 607 msecs
2115 18:55:49.441467 PCI: 00:1f.2 init
2116 18:55:49.444902 apm_control: Disabling ACPI.
2117 18:55:49.448034 APMC done.
2118 18:55:49.451935 PCI: 00:1f.2 init finished in 6 msecs
2119 18:55:49.452450 PCI: 00:1f.3 init
2120 18:55:49.457857 PCI: 00:1f.3 init finished in 0 msecs
2121 18:55:49.458407 PCI: 01:00.0 init
2122 18:55:49.461304 PCI: 01:00.0 init finished in 0 msecs
2123 18:55:49.464225 PNP: 0c09.0 init
2124 18:55:49.467781 Google Chrome EC uptime: 12.109 seconds
2125 18:55:49.470965 Google Chrome AP resets since EC boot: 1
2126 18:55:49.477725 Google Chrome most recent AP reset causes:
2127 18:55:49.481137 0.341: 32775 shutdown: entering G3
2128 18:55:49.487784 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2129 18:55:49.490648 PNP: 0c09.0 init finished in 23 msecs
2130 18:55:49.491160 GENERIC: 0.0 init
2131 18:55:49.497322 GENERIC: 0.0 init finished in 0 msecs
2132 18:55:49.497742 GENERIC: 1.0 init
2133 18:55:49.501162 GENERIC: 1.0 init finished in 0 msecs
2134 18:55:49.504017 Devices initialized
2135 18:55:49.507426 Show all devs... After init.
2136 18:55:49.510508 Root Device: enabled 1
2137 18:55:49.510924 CPU_CLUSTER: 0: enabled 1
2138 18:55:49.514171 DOMAIN: 0000: enabled 1
2139 18:55:49.517259 GPIO: 0: enabled 1
2140 18:55:49.517764 PCI: 00:00.0: enabled 1
2141 18:55:49.520860 PCI: 00:01.0: enabled 0
2142 18:55:49.524054 PCI: 00:01.1: enabled 0
2143 18:55:49.527330 PCI: 00:02.0: enabled 1
2144 18:55:49.527843 PCI: 00:04.0: enabled 1
2145 18:55:49.530359 PCI: 00:05.0: enabled 0
2146 18:55:49.534103 PCI: 00:06.0: enabled 1
2147 18:55:49.537100 PCI: 00:06.2: enabled 0
2148 18:55:49.537610 PCI: 00:07.0: enabled 0
2149 18:55:49.540812 PCI: 00:07.1: enabled 0
2150 18:55:49.543707 PCI: 00:07.2: enabled 0
2151 18:55:49.544125 PCI: 00:07.3: enabled 0
2152 18:55:49.547439 PCI: 00:08.0: enabled 0
2153 18:55:49.550869 PCI: 00:09.0: enabled 0
2154 18:55:49.553993 PCI: 00:0a.0: enabled 1
2155 18:55:49.554411 PCI: 00:0d.0: enabled 1
2156 18:55:49.557008 PCI: 00:0d.1: enabled 0
2157 18:55:49.560961 PCI: 00:0d.2: enabled 0
2158 18:55:49.563498 PCI: 00:0d.3: enabled 0
2159 18:55:49.563916 PCI: 00:0e.0: enabled 0
2160 18:55:49.567113 PCI: 00:10.0: enabled 0
2161 18:55:49.570267 PCI: 00:10.1: enabled 0
2162 18:55:49.573794 PCI: 00:10.6: enabled 0
2163 18:55:49.574356 PCI: 00:10.7: enabled 0
2164 18:55:49.577355 PCI: 00:12.0: enabled 0
2165 18:55:49.580786 PCI: 00:12.6: enabled 0
2166 18:55:49.584260 PCI: 00:12.7: enabled 0
2167 18:55:49.584775 PCI: 00:13.0: enabled 0
2168 18:55:49.586583 PCI: 00:14.0: enabled 1
2169 18:55:49.590277 PCI: 00:14.1: enabled 0
2170 18:55:49.593830 PCI: 00:14.2: enabled 1
2171 18:55:49.594389 PCI: 00:14.3: enabled 1
2172 18:55:49.596807 PCI: 00:15.0: enabled 1
2173 18:55:49.600122 PCI: 00:15.1: enabled 1
2174 18:55:49.600642 PCI: 00:15.2: enabled 0
2175 18:55:49.603412 PCI: 00:15.3: enabled 1
2176 18:55:49.607042 PCI: 00:16.0: enabled 1
2177 18:55:49.610322 PCI: 00:16.1: enabled 0
2178 18:55:49.610841 PCI: 00:16.2: enabled 0
2179 18:55:49.613805 PCI: 00:16.3: enabled 0
2180 18:55:49.616674 PCI: 00:16.4: enabled 0
2181 18:55:49.619951 PCI: 00:16.5: enabled 0
2182 18:55:49.620466 PCI: 00:17.0: enabled 0
2183 18:55:49.623218 PCI: 00:19.0: enabled 0
2184 18:55:49.626845 PCI: 00:19.1: enabled 1
2185 18:55:49.630171 PCI: 00:19.2: enabled 0
2186 18:55:49.630590 PCI: 00:1a.0: enabled 0
2187 18:55:49.632889 PCI: 00:1c.0: enabled 0
2188 18:55:49.637057 PCI: 00:1c.1: enabled 0
2189 18:55:49.639976 PCI: 00:1c.2: enabled 0
2190 18:55:49.640491 PCI: 00:1c.3: enabled 0
2191 18:55:49.643046 PCI: 00:1c.4: enabled 0
2192 18:55:49.646771 PCI: 00:1c.5: enabled 0
2193 18:55:49.647310 PCI: 00:1c.6: enabled 0
2194 18:55:49.650384 PCI: 00:1c.7: enabled 0
2195 18:55:49.652719 PCI: 00:1d.0: enabled 0
2196 18:55:49.656078 PCI: 00:1d.1: enabled 0
2197 18:55:49.656498 PCI: 00:1d.2: enabled 0
2198 18:55:49.659787 PCI: 00:1d.3: enabled 0
2199 18:55:49.662722 PCI: 00:1e.0: enabled 1
2200 18:55:49.666160 PCI: 00:1e.1: enabled 0
2201 18:55:49.666811 PCI: 00:1e.2: enabled 0
2202 18:55:49.669541 PCI: 00:1e.3: enabled 1
2203 18:55:49.673058 PCI: 00:1f.0: enabled 1
2204 18:55:49.676233 PCI: 00:1f.1: enabled 0
2205 18:55:49.676735 PCI: 00:1f.2: enabled 1
2206 18:55:49.679669 PCI: 00:1f.3: enabled 1
2207 18:55:49.682664 PCI: 00:1f.4: enabled 0
2208 18:55:49.686163 PCI: 00:1f.5: enabled 1
2209 18:55:49.686605 PCI: 00:1f.6: enabled 0
2210 18:55:49.689424 PCI: 00:1f.7: enabled 0
2211 18:55:49.693033 GENERIC: 0.0: enabled 1
2212 18:55:49.696095 GENERIC: 0.0: enabled 1
2213 18:55:49.696517 GENERIC: 1.0: enabled 1
2214 18:55:49.699547 GENERIC: 0.0: enabled 1
2215 18:55:49.703129 GENERIC: 1.0: enabled 1
2216 18:55:49.703552 USB0 port 0: enabled 1
2217 18:55:49.706022 USB0 port 0: enabled 1
2218 18:55:49.709664 GENERIC: 0.0: enabled 1
2219 18:55:49.713205 I2C: 00:1a: enabled 1
2220 18:55:49.713744 I2C: 00:31: enabled 1
2221 18:55:49.716431 I2C: 00:32: enabled 1
2222 18:55:49.719269 I2C: 00:50: enabled 1
2223 18:55:49.719686 I2C: 00:10: enabled 1
2224 18:55:49.722470 I2C: 00:15: enabled 1
2225 18:55:49.726493 I2C: 00:2c: enabled 1
2226 18:55:49.727006 GENERIC: 0.0: enabled 1
2227 18:55:49.729200 SPI: 00: enabled 1
2228 18:55:49.732919 PNP: 0c09.0: enabled 1
2229 18:55:49.733436 GENERIC: 0.0: enabled 1
2230 18:55:49.736340 USB3 port 0: enabled 1
2231 18:55:49.739758 USB3 port 1: enabled 0
2232 18:55:49.740273 USB3 port 2: enabled 1
2233 18:55:49.742584 USB3 port 3: enabled 0
2234 18:55:49.746034 USB2 port 0: enabled 1
2235 18:55:49.749721 USB2 port 1: enabled 0
2236 18:55:49.750280 USB2 port 2: enabled 1
2237 18:55:49.752798 USB2 port 3: enabled 0
2238 18:55:49.756537 USB2 port 4: enabled 0
2239 18:55:49.757050 USB2 port 5: enabled 1
2240 18:55:49.759473 USB2 port 6: enabled 0
2241 18:55:49.762820 USB2 port 7: enabled 0
2242 18:55:49.765913 USB2 port 8: enabled 1
2243 18:55:49.766437 USB2 port 9: enabled 1
2244 18:55:49.769357 USB3 port 0: enabled 1
2245 18:55:49.773023 USB3 port 1: enabled 0
2246 18:55:49.773539 USB3 port 2: enabled 0
2247 18:55:49.776163 USB3 port 3: enabled 0
2248 18:55:49.779457 GENERIC: 0.0: enabled 1
2249 18:55:49.782645 GENERIC: 1.0: enabled 1
2250 18:55:49.783068 APIC: 00: enabled 1
2251 18:55:49.785725 APIC: 12: enabled 1
2252 18:55:49.786180 APIC: 14: enabled 1
2253 18:55:49.789291 APIC: 16: enabled 1
2254 18:55:49.792839 APIC: 10: enabled 1
2255 18:55:49.793386 APIC: 01: enabled 1
2256 18:55:49.795985 APIC: 08: enabled 1
2257 18:55:49.796521 APIC: 09: enabled 1
2258 18:55:49.799093 PCI: 01:00.0: enabled 1
2259 18:55:49.806291 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2260 18:55:49.809116 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2261 18:55:49.812673 ELOG: NV offset 0xf20000 size 0x4000
2262 18:55:49.821026 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2263 18:55:49.827476 ELOG: Event(17) added with size 13 at 2023-11-22 18:55:49 UTC
2264 18:55:49.834315 ELOG: Event(9E) added with size 10 at 2023-11-22 18:55:49 UTC
2265 18:55:49.841007 ELOG: Event(9F) added with size 14 at 2023-11-22 18:55:49 UTC
2266 18:55:49.848000 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2267 18:55:49.854365 ELOG: Event(A0) added with size 9 at 2023-11-22 18:55:49 UTC
2268 18:55:49.857446 elog_add_boot_reason: Logged dev mode boot
2269 18:55:49.864153 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2270 18:55:49.864658 Finalize devices...
2271 18:55:49.867426 PCI: 00:16.0 final
2272 18:55:49.871045 PCI: 00:1f.2 final
2273 18:55:49.871573 GENERIC: 0.0 final
2274 18:55:49.878252 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2275 18:55:49.881162 GENERIC: 1.0 final
2276 18:55:49.887746 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2277 18:55:49.888269 Devices finalized
2278 18:55:49.894410 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2279 18:55:49.897312 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2280 18:55:49.904148 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2281 18:55:49.907420 ME: HFSTS1 : 0x90000245
2282 18:55:49.914223 ME: HFSTS2 : 0x82100116
2283 18:55:49.917229 ME: HFSTS3 : 0x00000050
2284 18:55:49.923994 ME: HFSTS4 : 0x00004000
2285 18:55:49.927309 ME: HFSTS5 : 0x00000000
2286 18:55:49.930679 ME: HFSTS6 : 0x40600006
2287 18:55:49.934242 ME: Manufacturing Mode : NO
2288 18:55:49.940895 ME: SPI Protection Mode Enabled : YES
2289 18:55:49.944106 ME: FPFs Committed : YES
2290 18:55:49.947335 ME: Manufacturing Vars Locked : YES
2291 18:55:49.950861 ME: FW Partition Table : OK
2292 18:55:49.953857 ME: Bringup Loader Failure : NO
2293 18:55:49.957567 ME: Firmware Init Complete : YES
2294 18:55:49.960727 ME: Boot Options Present : NO
2295 18:55:49.964053 ME: Update In Progress : NO
2296 18:55:49.970437 ME: D0i3 Support : YES
2297 18:55:49.974058 ME: Low Power State Enabled : NO
2298 18:55:49.977125 ME: CPU Replaced : YES
2299 18:55:49.980723 ME: CPU Replacement Valid : YES
2300 18:55:49.984091 ME: Current Working State : 5
2301 18:55:49.987571 ME: Current Operation State : 1
2302 18:55:49.990876 ME: Current Operation Mode : 0
2303 18:55:49.993852 ME: Error Code : 0
2304 18:55:49.997142 ME: Enhanced Debug Mode : NO
2305 18:55:50.003738 ME: CPU Debug Disabled : YES
2306 18:55:50.007316 ME: TXT Support : NO
2307 18:55:50.010332 ME: WP for RO is enabled : YES
2308 18:55:50.017021 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2309 18:55:50.024013 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2310 18:55:50.027344 Ramoops buffer: 0x100000@0x76899000.
2311 18:55:50.030377 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2312 18:55:50.040001 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2313 18:55:50.043384 CBFS: 'fallback/slic' not found.
2314 18:55:50.047242 ACPI: Writing ACPI tables at 7686d000.
2315 18:55:50.047766 ACPI: * FACS
2316 18:55:50.049994 ACPI: * DSDT
2317 18:55:50.056917 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2318 18:55:50.060400 ACPI: * FADT
2319 18:55:50.060914 SCI is IRQ9
2320 18:55:50.063360 ACPI: added table 1/32, length now 40
2321 18:55:50.066817 ACPI: * SSDT
2322 18:55:50.073095 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2323 18:55:50.077034 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2324 18:55:50.083349 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2325 18:55:50.086813 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2326 18:55:50.093658 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2327 18:55:50.097116 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2328 18:55:50.103510 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2329 18:55:50.110279 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2330 18:55:50.113833 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2331 18:55:50.120087 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2332 18:55:50.123635 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2333 18:55:50.130493 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2334 18:55:50.133174 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2335 18:55:50.136582 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2336 18:55:50.146844 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2337 18:55:50.149536 PS2K: Passing 80 keymaps to kernel
2338 18:55:50.156395 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2339 18:55:50.163043 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2340 18:55:50.169328 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2341 18:55:50.176331 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2342 18:55:50.182631 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2343 18:55:50.189442 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2344 18:55:50.193014 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2345 18:55:50.199080 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2346 18:55:50.206022 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2347 18:55:50.212864 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2348 18:55:50.216233 ACPI: added table 2/32, length now 44
2349 18:55:50.219271 ACPI: * MCFG
2350 18:55:50.222773 ACPI: added table 3/32, length now 48
2351 18:55:50.223287 ACPI: * TPM2
2352 18:55:50.225732 TPM2 log created at 0x7685d000
2353 18:55:50.229350 ACPI: added table 4/32, length now 52
2354 18:55:50.232763 ACPI: * LPIT
2355 18:55:50.235623 ACPI: added table 5/32, length now 56
2356 18:55:50.239403 ACPI: * MADT
2357 18:55:50.239916 SCI is IRQ9
2358 18:55:50.242748 ACPI: added table 6/32, length now 60
2359 18:55:50.246086 cmd_reg from pmc_make_ipc_cmd 1052838
2360 18:55:50.252536 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2361 18:55:50.258953 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2362 18:55:50.265980 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2363 18:55:50.269049 PMC CrashLog size in discovery mode: 0xC00
2364 18:55:50.272967 cpu crashlog bar addr: 0x80640000
2365 18:55:50.275837 cpu discovery table offset: 0x6030
2366 18:55:50.282281 cpu_crashlog_discovery_table buffer count: 0x3
2367 18:55:50.289041 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2368 18:55:50.295866 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2369 18:55:50.302217 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2370 18:55:50.305668 PMC crashLog size in discovery mode : 0xC00
2371 18:55:50.312453 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2372 18:55:50.319103 discover mode PMC crashlog size adjusted to: 0x200
2373 18:55:50.325281 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2374 18:55:50.328754 discover mode PMC crashlog size adjusted to: 0x0
2375 18:55:50.332389 m_cpu_crashLog_size : 0x3480 bytes
2376 18:55:50.335735 CPU crashLog present.
2377 18:55:50.338816 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2378 18:55:50.345676 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2379 18:55:50.348658 current = 76876550
2380 18:55:50.352359 ACPI: * DMAR
2381 18:55:50.355692 ACPI: added table 7/32, length now 64
2382 18:55:50.358503 ACPI: added table 8/32, length now 68
2383 18:55:50.358921 ACPI: * HPET
2384 18:55:50.365344 ACPI: added table 9/32, length now 72
2385 18:55:50.365865 ACPI: done.
2386 18:55:50.369021 ACPI tables: 38528 bytes.
2387 18:55:50.371866 smbios_write_tables: 76857000
2388 18:55:50.375402 EC returned error result code 3
2389 18:55:50.378662 Couldn't obtain OEM name from CBI
2390 18:55:50.381969 Create SMBIOS type 16
2391 18:55:50.382385 Create SMBIOS type 17
2392 18:55:50.385438 Create SMBIOS type 20
2393 18:55:50.389340 GENERIC: 0.0 (WIFI Device)
2394 18:55:50.392230 SMBIOS tables: 2156 bytes.
2395 18:55:50.395714 Writing table forward entry at 0x00000500
2396 18:55:50.402085 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2397 18:55:50.407988 Writing coreboot table at 0x76891000
2398 18:55:50.413408 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2399 18:55:50.415267 1. 0000000000001000-000000000009ffff: RAM
2400 18:55:50.418844 2. 00000000000a0000-00000000000fffff: RESERVED
2401 18:55:50.425630 3. 0000000000100000-0000000076856fff: RAM
2402 18:55:50.428994 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2403 18:55:50.435558 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2404 18:55:50.442531 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2405 18:55:50.445166 7. 0000000077000000-00000000803fffff: RESERVED
2406 18:55:50.452043 8. 00000000c0000000-00000000cfffffff: RESERVED
2407 18:55:50.455506 9. 00000000f8000000-00000000f9ffffff: RESERVED
2408 18:55:50.458805 10. 00000000fb000000-00000000fb000fff: RESERVED
2409 18:55:50.465350 11. 00000000fc800000-00000000fe7fffff: RESERVED
2410 18:55:50.468757 12. 00000000feb00000-00000000feb7ffff: RESERVED
2411 18:55:50.475326 13. 00000000fec00000-00000000fecfffff: RESERVED
2412 18:55:50.478604 14. 00000000fed40000-00000000fed6ffff: RESERVED
2413 18:55:50.485136 15. 00000000fed80000-00000000fed87fff: RESERVED
2414 18:55:50.488788 16. 00000000fed90000-00000000fed92fff: RESERVED
2415 18:55:50.494644 17. 00000000feda0000-00000000feda1fff: RESERVED
2416 18:55:50.498494 18. 00000000fedc0000-00000000feddffff: RESERVED
2417 18:55:50.501449 19. 0000000100000000-000000027fbfffff: RAM
2418 18:55:50.504940 Passing 4 GPIOs to payload:
2419 18:55:50.511574 NAME | PORT | POLARITY | VALUE
2420 18:55:50.514880 lid | undefined | high | high
2421 18:55:50.521368 power | undefined | high | low
2422 18:55:50.528153 oprom | undefined | high | low
2423 18:55:50.531350 EC in RW | 0x00000151 | high | high
2424 18:55:50.534861 Board ID: 3
2425 18:55:50.535281 FW config: 0x131
2426 18:55:50.541198 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 54b6
2427 18:55:50.544663 coreboot table: 1788 bytes.
2428 18:55:50.548167 IMD ROOT 0. 0x76fff000 0x00001000
2429 18:55:50.551800 IMD SMALL 1. 0x76ffe000 0x00001000
2430 18:55:50.555247 FSP MEMORY 2. 0x76afe000 0x00500000
2431 18:55:50.558334 CONSOLE 3. 0x76ade000 0x00020000
2432 18:55:50.561717 RW MCACHE 4. 0x76add000 0x0000043c
2433 18:55:50.568192 RO MCACHE 5. 0x76adc000 0x00000fd8
2434 18:55:50.571490 FMAP 6. 0x76adb000 0x0000064a
2435 18:55:50.574445 TIME STAMP 7. 0x76ada000 0x00000910
2436 18:55:50.578190 VBOOT WORK 8. 0x76ac6000 0x00014000
2437 18:55:50.581757 MEM INFO 9. 0x76ac5000 0x000003b8
2438 18:55:50.585061 ROMSTG STCK10. 0x76ac4000 0x00001000
2439 18:55:50.587939 AFTER CAR 11. 0x76ab8000 0x0000c000
2440 18:55:50.591785 RAMSTAGE 12. 0x76a2e000 0x0008a000
2441 18:55:50.594534 ACPI BERT 13. 0x76a1e000 0x00010000
2442 18:55:50.601186 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2443 18:55:50.605167 REFCODE 15. 0x769ae000 0x0006f000
2444 18:55:50.608255 SMM BACKUP 16. 0x7699e000 0x00010000
2445 18:55:50.611720 IGD OPREGION17. 0x76999000 0x00004203
2446 18:55:50.614700 RAMOOPS 18. 0x76899000 0x00100000
2447 18:55:50.618227 COREBOOT 19. 0x76891000 0x00008000
2448 18:55:50.621847 ACPI 20. 0x7686d000 0x00024000
2449 18:55:50.624763 TPM2 TCGLOG21. 0x7685d000 0x00010000
2450 18:55:50.631923 PMC CRASHLOG22. 0x7685c000 0x00000c00
2451 18:55:50.634962 CPU CRASHLOG23. 0x76858000 0x00003480
2452 18:55:50.638011 SMBIOS 24. 0x76857000 0x00001000
2453 18:55:50.638532 IMD small region:
2454 18:55:50.644950 IMD ROOT 0. 0x76ffec00 0x00000400
2455 18:55:50.648429 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2456 18:55:50.651348 VPD 2. 0x76ffeb80 0x00000058
2457 18:55:50.654969 POWER STATE 3. 0x76ffeb20 0x00000044
2458 18:55:50.658128 ROMSTAGE 4. 0x76ffeb00 0x00000004
2459 18:55:50.665014 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2460 18:55:50.668547 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2461 18:55:50.671326 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2462 18:55:50.674730 MTRR: Physical address space:
2463 18:55:50.681338 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2464 18:55:50.688225 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2465 18:55:50.694578 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2466 18:55:50.701001 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2467 18:55:50.708008 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2468 18:55:50.714353 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2469 18:55:50.721215 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2470 18:55:50.724759 MTRR: Fixed MSR 0x250 0x0606060606060606
2471 18:55:50.727835 MTRR: Fixed MSR 0x258 0x0606060606060606
2472 18:55:50.730932 MTRR: Fixed MSR 0x259 0x0000000000000000
2473 18:55:50.737638 MTRR: Fixed MSR 0x268 0x0606060606060606
2474 18:55:50.741235 MTRR: Fixed MSR 0x269 0x0606060606060606
2475 18:55:50.744679 MTRR: Fixed MSR 0x26a 0x0606060606060606
2476 18:55:50.747931 MTRR: Fixed MSR 0x26b 0x0606060606060606
2477 18:55:50.750727 MTRR: Fixed MSR 0x26c 0x0606060606060606
2478 18:55:50.757937 MTRR: Fixed MSR 0x26d 0x0606060606060606
2479 18:55:50.761232 MTRR: Fixed MSR 0x26e 0x0606060606060606
2480 18:55:50.764345 MTRR: Fixed MSR 0x26f 0x0606060606060606
2481 18:55:50.768115 call enable_fixed_mtrr()
2482 18:55:50.771351 CPU physical address size: 39 bits
2483 18:55:50.778121 MTRR: default type WB/UC MTRR counts: 6/6.
2484 18:55:50.781411 MTRR: UC selected as default type.
2485 18:55:50.788163 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2486 18:55:50.791433 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2487 18:55:50.798434 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2488 18:55:50.804692 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2489 18:55:50.811384 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2490 18:55:50.817710 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2491 18:55:50.824547 MTRR: Fixed MSR 0x250 0x0606060606060606
2492 18:55:50.828157 MTRR: Fixed MSR 0x258 0x0606060606060606
2493 18:55:50.830920 MTRR: Fixed MSR 0x259 0x0000000000000000
2494 18:55:50.834502 MTRR: Fixed MSR 0x268 0x0606060606060606
2495 18:55:50.840881 MTRR: Fixed MSR 0x269 0x0606060606060606
2496 18:55:50.844811 MTRR: Fixed MSR 0x26a 0x0606060606060606
2497 18:55:50.847827 MTRR: Fixed MSR 0x26b 0x0606060606060606
2498 18:55:50.850945 MTRR: Fixed MSR 0x26c 0x0606060606060606
2499 18:55:50.857759 MTRR: Fixed MSR 0x26d 0x0606060606060606
2500 18:55:50.861436 MTRR: Fixed MSR 0x26e 0x0606060606060606
2501 18:55:50.864779 MTRR: Fixed MSR 0x26f 0x0606060606060606
2502 18:55:50.867707 MTRR: Fixed MSR 0x250 0x0606060606060606
2503 18:55:50.870990 MTRR: Fixed MSR 0x250 0x0606060606060606
2504 18:55:50.877719 MTRR: Fixed MSR 0x250 0x0606060606060606
2505 18:55:50.881138 MTRR: Fixed MSR 0x250 0x0606060606060606
2506 18:55:50.884633 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 18:55:50.887913 MTRR: Fixed MSR 0x259 0x0000000000000000
2508 18:55:50.893952 MTRR: Fixed MSR 0x268 0x0606060606060606
2509 18:55:50.897122 MTRR: Fixed MSR 0x269 0x0606060606060606
2510 18:55:50.901020 MTRR: Fixed MSR 0x26a 0x0606060606060606
2511 18:55:50.903892 MTRR: Fixed MSR 0x26b 0x0606060606060606
2512 18:55:50.910396 MTRR: Fixed MSR 0x26c 0x0606060606060606
2513 18:55:50.914162 MTRR: Fixed MSR 0x26d 0x0606060606060606
2514 18:55:50.917518 MTRR: Fixed MSR 0x26e 0x0606060606060606
2515 18:55:50.920646 MTRR: Fixed MSR 0x26f 0x0606060606060606
2516 18:55:50.923863 MTRR: Fixed MSR 0x250 0x0606060606060606
2517 18:55:50.927157 call enable_fixed_mtrr()
2518 18:55:50.930372 MTRR: Fixed MSR 0x258 0x0606060606060606
2519 18:55:50.937311 MTRR: Fixed MSR 0x259 0x0000000000000000
2520 18:55:50.940414 MTRR: Fixed MSR 0x268 0x0606060606060606
2521 18:55:50.944112 MTRR: Fixed MSR 0x269 0x0606060606060606
2522 18:55:50.947564 MTRR: Fixed MSR 0x258 0x0606060606060606
2523 18:55:50.950817 CPU physical address size: 39 bits
2524 18:55:50.957380 MTRR: Fixed MSR 0x258 0x0606060606060606
2525 18:55:50.960435 MTRR: Fixed MSR 0x26a 0x0606060606060606
2526 18:55:50.963732 MTRR: Fixed MSR 0x250 0x0606060606060606
2527 18:55:50.967507 MTRR: Fixed MSR 0x259 0x0000000000000000
2528 18:55:50.973495 MTRR: Fixed MSR 0x26b 0x0606060606060606
2529 18:55:50.977258 MTRR: Fixed MSR 0x26c 0x0606060606060606
2530 18:55:50.980697 MTRR: Fixed MSR 0x26d 0x0606060606060606
2531 18:55:50.983599 MTRR: Fixed MSR 0x26e 0x0606060606060606
2532 18:55:50.990569 MTRR: Fixed MSR 0x26f 0x0606060606060606
2533 18:55:50.994043 MTRR: Fixed MSR 0x259 0x0000000000000000
2534 18:55:50.996927 call enable_fixed_mtrr()
2535 18:55:51.000554 MTRR: Fixed MSR 0x268 0x0606060606060606
2536 18:55:51.003422 MTRR: Fixed MSR 0x269 0x0606060606060606
2537 18:55:51.006747 CPU physical address size: 39 bits
2538 18:55:51.010551 MTRR: Fixed MSR 0x258 0x0606060606060606
2539 18:55:51.017166 MTRR: Fixed MSR 0x26a 0x0606060606060606
2540 18:55:51.020280 MTRR: Fixed MSR 0x268 0x0606060606060606
2541 18:55:51.023596 MTRR: Fixed MSR 0x26b 0x0606060606060606
2542 18:55:51.027048 MTRR: Fixed MSR 0x26c 0x0606060606060606
2543 18:55:51.033333 MTRR: Fixed MSR 0x26d 0x0606060606060606
2544 18:55:51.036801 MTRR: Fixed MSR 0x26e 0x0606060606060606
2545 18:55:51.040051 MTRR: Fixed MSR 0x26f 0x0606060606060606
2546 18:55:51.043401 MTRR: Fixed MSR 0x259 0x0000000000000000
2547 18:55:51.046973 call enable_fixed_mtrr()
2548 18:55:51.050014 MTRR: Fixed MSR 0x258 0x0606060606060606
2549 18:55:51.053654 call enable_fixed_mtrr()
2550 18:55:51.056759 MTRR: Fixed MSR 0x269 0x0606060606060606
2551 18:55:51.060054 CPU physical address size: 39 bits
2552 18:55:51.066561 MTRR: Fixed MSR 0x26a 0x0606060606060606
2553 18:55:51.070080 MTRR: Fixed MSR 0x268 0x0606060606060606
2554 18:55:51.073319 MTRR: Fixed MSR 0x26b 0x0606060606060606
2555 18:55:51.076780 MTRR: Fixed MSR 0x26c 0x0606060606060606
2556 18:55:51.080372 MTRR: Fixed MSR 0x26d 0x0606060606060606
2557 18:55:51.086667 MTRR: Fixed MSR 0x26e 0x0606060606060606
2558 18:55:51.089787 MTRR: Fixed MSR 0x26f 0x0606060606060606
2559 18:55:51.093592 CPU physical address size: 39 bits
2560 18:55:51.096712 call enable_fixed_mtrr()
2561 18:55:51.099967 MTRR: Fixed MSR 0x259 0x0000000000000000
2562 18:55:51.103412 CPU physical address size: 39 bits
2563 18:55:51.106514 MTRR: Fixed MSR 0x268 0x0606060606060606
2564 18:55:51.113306 MTRR: Fixed MSR 0x269 0x0606060606060606
2565 18:55:51.117025 MTRR: Fixed MSR 0x269 0x0606060606060606
2566 18:55:51.119979 MTRR: Fixed MSR 0x26a 0x0606060606060606
2567 18:55:51.123537 MTRR: Fixed MSR 0x26b 0x0606060606060606
2568 18:55:51.126265 MTRR: Fixed MSR 0x26c 0x0606060606060606
2569 18:55:51.132796 MTRR: Fixed MSR 0x26d 0x0606060606060606
2570 18:55:51.136513 MTRR: Fixed MSR 0x26e 0x0606060606060606
2571 18:55:51.139972 MTRR: Fixed MSR 0x26f 0x0606060606060606
2572 18:55:51.143178 MTRR: Fixed MSR 0x26a 0x0606060606060606
2573 18:55:51.146541 call enable_fixed_mtrr()
2574 18:55:51.149838 MTRR: Fixed MSR 0x26b 0x0606060606060606
2575 18:55:51.156568 MTRR: Fixed MSR 0x26c 0x0606060606060606
2576 18:55:51.159506 MTRR: Fixed MSR 0x26d 0x0606060606060606
2577 18:55:51.163527 MTRR: Fixed MSR 0x26e 0x0606060606060606
2578 18:55:51.166132 MTRR: Fixed MSR 0x26f 0x0606060606060606
2579 18:55:51.169979 CPU physical address size: 39 bits
2580 18:55:51.172910 call enable_fixed_mtrr()
2581 18:55:51.175883 CPU physical address size: 39 bits
2582 18:55:51.180646
2583 18:55:51.181160 MTRR check
2584 18:55:51.183790 Fixed MTRRs : Enabled
2585 18:55:51.184309 Variable MTRRs: Enabled
2586 18:55:51.184644
2587 18:55:51.190344 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2588 18:55:51.193451 Checking cr50 for pending updates
2589 18:55:51.206056 Reading cr50 TPM mode
2590 18:55:51.221459 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2591 18:55:51.230809 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2592 18:55:51.234538 Checking segment from ROM address 0xf96cbe6c
2593 18:55:51.237446 Checking segment from ROM address 0xf96cbe88
2594 18:55:51.244320 Loading segment from ROM address 0xf96cbe6c
2595 18:55:51.244862 code (compression=1)
2596 18:55:51.254271 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2597 18:55:51.260920 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2598 18:55:51.264363 using LZMA
2599 18:55:51.287033 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2600 18:55:51.293787 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2601 18:55:51.302011 Loading segment from ROM address 0xf96cbe88
2602 18:55:51.305122 Entry Point 0x30000000
2603 18:55:51.305638 Loaded segments
2604 18:55:51.312046 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2605 18:55:51.318464 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2606 18:55:51.321749 Finalizing chipset.
2607 18:55:51.322300 apm_control: Finalizing SMM.
2608 18:55:51.325222 APMC done.
2609 18:55:51.328277 HECI: CSE device 16.1 is disabled
2610 18:55:51.331422 HECI: CSE device 16.2 is disabled
2611 18:55:51.334753 HECI: CSE device 16.3 is disabled
2612 18:55:51.338763 HECI: CSE device 16.4 is disabled
2613 18:55:51.341665 HECI: CSE device 16.5 is disabled
2614 18:55:51.344959 HECI: Sending End-of-Post
2615 18:55:51.352825 CSE: EOP requested action: continue boot
2616 18:55:51.356232 CSE EOP successful, continuing boot
2617 18:55:51.363185 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2618 18:55:51.366663 mp_park_aps done after 0 msecs.
2619 18:55:51.369510 Jumping to boot code at 0x30000000(0x76891000)
2620 18:55:51.379618 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2621 18:55:51.383868
2622 18:55:51.384281
2623 18:55:51.384604
2624 18:55:51.387538 Starting depthcharge on Volmar...
2625 18:55:51.388073
2626 18:55:51.389382 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2627 18:55:51.389991 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2628 18:55:51.390503 Setting prompt string to ['brya:']
2629 18:55:51.390898 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2630 18:55:51.394308 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2631 18:55:51.394831
2632 18:55:51.400468 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2633 18:55:51.401031
2634 18:55:51.407627 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2635 18:55:51.408145
2636 18:55:51.410398 configure_storage: Failed to remap 1C:2
2637 18:55:51.410919
2638 18:55:51.413866 Wipe memory regions:
2639 18:55:51.414420
2640 18:55:51.417016 [0x00000000001000, 0x000000000a0000)
2641 18:55:51.417529
2642 18:55:51.420434 [0x00000000100000, 0x00000030000000)
2643 18:55:51.526717
2644 18:55:51.529802 [0x00000032668e60, 0x00000076857000)
2645 18:55:51.677418
2646 18:55:51.680952 [0x00000100000000, 0x0000027fc00000)
2647 18:55:52.512340
2648 18:55:52.515793 ec_init: CrosEC protocol v3 supported (256, 256)
2649 18:55:53.125820
2650 18:55:53.126378 R8152: Initializing
2651 18:55:53.126765
2652 18:55:53.128475 Version 9 (ocp_data = 6010)
2653 18:55:53.128907
2654 18:55:53.132023 R8152: Done initializing
2655 18:55:53.132544
2656 18:55:53.134773 Adding net device
2657 18:55:53.436025
2658 18:55:53.439207 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2659 18:55:53.439671
2660 18:55:53.440006
2661 18:55:53.440324
2662 18:55:53.441036 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2664 18:55:53.542160 brya: tftpboot 192.168.201.1 12061583/tftp-deploy-2_qlwvuz/kernel/bzImage 12061583/tftp-deploy-2_qlwvuz/kernel/cmdline 12061583/tftp-deploy-2_qlwvuz/ramdisk/ramdisk.cpio.gz
2665 18:55:53.542763 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2666 18:55:53.543306 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2667 18:55:53.547729 tftpboot 192.168.201.1 12061583/tftp-deploy-2_qlwvuz/kernel/bzIploy-2_qlwvuz/kernel/cmdline 12061583/tftp-deploy-2_qlwvuz/ramdisk/ramdisk.cpio.gz
2668 18:55:53.548272
2669 18:55:53.548605 Waiting for link
2670 18:55:53.750460
2671 18:55:53.751113 done.
2672 18:55:53.751632
2673 18:55:53.752008 MAC: 00:e0:4c:68:00:8b
2674 18:55:53.752320
2675 18:55:53.753374 Sending DHCP discover... done.
2676 18:55:53.753767
2677 18:55:53.757244 Waiting for reply... done.
2678 18:55:53.757941
2679 18:55:53.760126 Sending DHCP request... done.
2680 18:55:53.760640
2681 18:55:53.767072 Waiting for reply... done.
2682 18:55:53.767588
2683 18:55:53.767925 My ip is 192.168.201.16
2684 18:55:53.768230
2685 18:55:53.770341 The DHCP server ip is 192.168.201.1
2686 18:55:53.773734
2687 18:55:53.777729 TFTP server IP predefined by user: 192.168.201.1
2688 18:55:53.778325
2689 18:55:53.784070 Bootfile predefined by user: 12061583/tftp-deploy-2_qlwvuz/kernel/bzImage
2690 18:55:53.784614
2691 18:55:53.786871 Sending tftp read request... done.
2692 18:55:53.787285
2693 18:55:53.795410 Waiting for the transfer...
2694 18:55:53.795849
2695 18:55:54.121114 00000000 ################################################################
2696 18:55:54.121288
2697 18:55:54.370017 00080000 ################################################################
2698 18:55:54.370160
2699 18:55:54.618776 00100000 ################################################################
2700 18:55:54.618947
2701 18:55:54.871192 00180000 ################################################################
2702 18:55:54.871346
2703 18:55:55.120966 00200000 ################################################################
2704 18:55:55.121109
2705 18:55:55.369071 00280000 ################################################################
2706 18:55:55.369213
2707 18:55:55.617613 00300000 ################################################################
2708 18:55:55.617752
2709 18:55:55.866244 00380000 ################################################################
2710 18:55:55.866383
2711 18:55:56.118060 00400000 ################################################################
2712 18:55:56.118195
2713 18:55:56.366473 00480000 ################################################################
2714 18:55:56.366608
2715 18:55:56.615274 00500000 ################################################################
2716 18:55:56.615404
2717 18:55:56.870082 00580000 ################################################################
2718 18:55:56.870220
2719 18:55:57.123823 00600000 ################################################################
2720 18:55:57.123985
2721 18:55:57.377028 00680000 ################################################################
2722 18:55:57.377161
2723 18:55:57.639312 00700000 ################################################################
2724 18:55:57.639442
2725 18:55:57.889044 00780000 ################################################################
2726 18:55:57.889175
2727 18:55:58.137863 00800000 ################################################################
2728 18:55:58.138000
2729 18:55:58.387738 00880000 ################################################################
2730 18:55:58.387869
2731 18:55:58.644845 00900000 ################################################################
2732 18:55:58.644975
2733 18:55:58.893753 00980000 ################################################################
2734 18:55:58.893941
2735 18:55:59.162894 00a00000 ################################################################
2736 18:55:59.163022
2737 18:55:59.414910 00a80000 ################################################################
2738 18:55:59.415038
2739 18:55:59.662999 00b00000 ################################################################
2740 18:55:59.663127
2741 18:55:59.915405 00b80000 ################################################################
2742 18:55:59.915557
2743 18:56:00.163536 00c00000 ################################################################
2744 18:56:00.163663
2745 18:56:00.411964 00c80000 ################################################################
2746 18:56:00.412093
2747 18:56:00.662219 00d00000 ################################################################
2748 18:56:00.662350
2749 18:56:00.940957 00d80000 ################################################################
2750 18:56:00.941083
2751 18:56:01.192133 00e00000 ################################################################
2752 18:56:01.192260
2753 18:56:01.440902 00e80000 ################################################################
2754 18:56:01.441030
2755 18:56:01.691534 00f00000 ################################################################
2756 18:56:01.691669
2757 18:56:01.942523 00f80000 ################################################################
2758 18:56:01.942662
2759 18:56:02.187123 01000000 ############################################################# done.
2760 18:56:02.187253
2761 18:56:02.190543 The bootfile was 17275488 bytes long.
2762 18:56:02.190639
2763 18:56:02.194183 Sending tftp read request... done.
2764 18:56:02.194273
2765 18:56:02.197105 Waiting for the transfer...
2766 18:56:02.197283
2767 18:56:02.545048 00000000 ################################################################
2768 18:56:02.545183
2769 18:56:02.806952 00080000 ################################################################
2770 18:56:02.807089
2771 18:56:03.054209 00100000 ################################################################
2772 18:56:03.054346
2773 18:56:03.317800 00180000 ################################################################
2774 18:56:03.317961
2775 18:56:03.616344 00200000 ################################################################
2776 18:56:03.616493
2777 18:56:03.916133 00280000 ################################################################
2778 18:56:03.916292
2779 18:56:04.272777 00300000 ################################################################
2780 18:56:04.273277
2781 18:56:04.676505 00380000 ################################################################
2782 18:56:04.677176
2783 18:56:05.075933 00400000 ################################################################
2784 18:56:05.076423
2785 18:56:05.462143 00480000 ################################################################
2786 18:56:05.462875
2787 18:56:05.725780 00500000 ################################################################
2788 18:56:05.725985
2789 18:56:05.987990 00580000 ################################################################
2790 18:56:05.988151
2791 18:56:06.242220 00600000 ################################################################
2792 18:56:06.242365
2793 18:56:06.497759 00680000 ################################################################
2794 18:56:06.497914
2795 18:56:06.744828 00700000 ################################################################
2796 18:56:06.744995
2797 18:56:06.998199 00780000 ################################################################
2798 18:56:06.998344
2799 18:56:07.253385 00800000 ################################################################
2800 18:56:07.253533
2801 18:56:07.507587 00880000 ################################################################
2802 18:56:07.507728
2803 18:56:07.757202 00900000 ################################################################
2804 18:56:07.757353
2805 18:56:08.001273 00980000 ################################################################
2806 18:56:08.001436
2807 18:56:08.233979 00a00000 ################################################################
2808 18:56:08.234134
2809 18:56:08.492021 00a80000 ################################################################
2810 18:56:08.492184
2811 18:56:08.753524 00b00000 ################################################################
2812 18:56:08.753656
2813 18:56:09.005082 00b80000 ################################################################
2814 18:56:09.005226
2815 18:56:09.267980 00c00000 ################################################################
2816 18:56:09.268113
2817 18:56:09.504775 00c80000 ####################################################### done.
2818 18:56:09.504914
2819 18:56:09.507580 Sending tftp read request... done.
2820 18:56:09.507664
2821 18:56:09.511326 Waiting for the transfer...
2822 18:56:09.511409
2823 18:56:09.511475 00000000 # done.
2824 18:56:09.511538
2825 18:56:09.521281 Command line loaded dynamically from TFTP file: 12061583/tftp-deploy-2_qlwvuz/kernel/cmdline
2826 18:56:09.521367
2827 18:56:09.537746 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2828 18:56:09.543107
2829 18:56:09.546431 Shutting down all USB controllers.
2830 18:56:09.546514
2831 18:56:09.546579 Removing current net device
2832 18:56:09.546640
2833 18:56:09.549738 Finalizing coreboot
2834 18:56:09.549847
2835 18:56:09.556687 Exiting depthcharge with code 4 at timestamp: 28416117
2836 18:56:09.556770
2837 18:56:09.556835
2838 18:56:09.556896 Starting kernel ...
2839 18:56:09.556954
2840 18:56:09.557011
2841 18:56:09.557476 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2842 18:56:09.557579 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2843 18:56:09.557656 Setting prompt string to ['Linux version [0-9]']
2844 18:56:09.557724 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2845 18:56:09.557793 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2847 19:00:32.557843 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2849 19:00:32.558136 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2851 19:00:32.558304 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2854 19:00:32.558580 end: 2 depthcharge-action (duration 00:05:00) [common]
2856 19:00:32.558817 Cleaning after the job
2857 19:00:32.558911 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12061583/tftp-deploy-2_qlwvuz/ramdisk
2858 19:00:32.561049 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12061583/tftp-deploy-2_qlwvuz/kernel
2859 19:00:32.563551 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12061583/tftp-deploy-2_qlwvuz/modules
2860 19:00:32.567033 start: 5.1 power-off (timeout 00:00:30) [common]
2861 19:00:32.567325 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=off'
2862 19:00:32.637734 >> Command sent successfully.
2863 19:00:32.640146 Returned 0 in 0 seconds
2864 19:00:32.740521 end: 5.1 power-off (duration 00:00:00) [common]
2866 19:00:32.740840 start: 5.2 read-feedback (timeout 00:10:00) [common]
2867 19:00:32.741092 Listened to connection for namespace 'common' for up to 1s
2868 19:00:33.742003 Finalising connection for namespace 'common'
2869 19:00:33.742178 Disconnecting from shell: Finalise
2870 19:00:33.742255
2871 19:00:33.842565 end: 5.2 read-feedback (duration 00:00:01) [common]
2872 19:00:33.842694 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12061583
2873 19:00:33.868475 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12061583
2874 19:00:33.868645 JobError: Your job cannot terminate cleanly.