Boot log: acer-cbv514-1h-34uz-brya

    1 18:55:49.605950  lava-dispatcher, installed at version: 2023.10
    2 18:55:49.606149  start: 0 validate
    3 18:55:49.606281  Start time: 2023-11-22 18:55:49.606271+00:00 (UTC)
    4 18:55:49.606452  Using caching service: 'http://localhost/cache/?uri=%s'
    5 18:55:49.606584  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 18:55:49.609523  Using caching service: 'http://localhost/cache/?uri=%s'
    7 18:55:49.609652  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.200-cip40-188-g33d0b44cd71d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
    8 18:56:17.918440  Using caching service: 'http://localhost/cache/?uri=%s'
    9 18:56:17.919172  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 18:56:18.174308  Using caching service: 'http://localhost/cache/?uri=%s'
   11 18:56:18.174468  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.200-cip40-188-g33d0b44cd71d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
   12 18:56:26.189149  validate duration: 36.58
   14 18:56:26.189448  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 18:56:26.189550  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 18:56:26.189634  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 18:56:26.189756  Not decompressing ramdisk as can be used compressed.
   18 18:56:26.189839  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
   19 18:56:26.189907  saving as /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/ramdisk/initrd.cpio.gz
   20 18:56:26.189971  total size: 5432690 (5 MB)
   21 18:56:26.191234  progress   0 % (0 MB)
   22 18:56:26.192942  progress   5 % (0 MB)
   23 18:56:26.194407  progress  10 % (0 MB)
   24 18:56:26.195826  progress  15 % (0 MB)
   25 18:56:26.197447  progress  20 % (1 MB)
   26 18:56:26.198933  progress  25 % (1 MB)
   27 18:56:26.200363  progress  30 % (1 MB)
   28 18:56:26.201972  progress  35 % (1 MB)
   29 18:56:26.203367  progress  40 % (2 MB)
   30 18:56:26.204817  progress  45 % (2 MB)
   31 18:56:26.206261  progress  50 % (2 MB)
   32 18:56:26.207874  progress  55 % (2 MB)
   33 18:56:26.209357  progress  60 % (3 MB)
   34 18:56:26.210775  progress  65 % (3 MB)
   35 18:56:26.212430  progress  70 % (3 MB)
   36 18:56:26.213918  progress  75 % (3 MB)
   37 18:56:26.215396  progress  80 % (4 MB)
   38 18:56:26.216869  progress  85 % (4 MB)
   39 18:56:26.218627  progress  90 % (4 MB)
   40 18:56:26.220078  progress  95 % (4 MB)
   41 18:56:26.221614  progress 100 % (5 MB)
   42 18:56:26.221838  5 MB downloaded in 0.03 s (162.59 MB/s)
   43 18:56:26.221992  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 18:56:26.222236  end: 1.1 download-retry (duration 00:00:00) [common]
   46 18:56:26.222321  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 18:56:26.222404  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 18:56:26.222542  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.200-cip40-188-g33d0b44cd71d/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/kernel/bzImage
   49 18:56:26.222611  saving as /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/kernel/bzImage
   50 18:56:26.222671  total size: 17275488 (16 MB)
   51 18:56:26.222732  No compression specified
   52 18:56:26.224286  progress   0 % (0 MB)
   53 18:56:26.228911  progress   5 % (0 MB)
   54 18:56:26.233445  progress  10 % (1 MB)
   55 18:56:26.238208  progress  15 % (2 MB)
   56 18:56:26.242973  progress  20 % (3 MB)
   57 18:56:26.247442  progress  25 % (4 MB)
   58 18:56:26.252101  progress  30 % (4 MB)
   59 18:56:26.256628  progress  35 % (5 MB)
   60 18:56:26.261149  progress  40 % (6 MB)
   61 18:56:26.265808  progress  45 % (7 MB)
   62 18:56:26.270287  progress  50 % (8 MB)
   63 18:56:26.274820  progress  55 % (9 MB)
   64 18:56:26.279557  progress  60 % (9 MB)
   65 18:56:26.284384  progress  65 % (10 MB)
   66 18:56:26.289267  progress  70 % (11 MB)
   67 18:56:26.293787  progress  75 % (12 MB)
   68 18:56:26.298306  progress  80 % (13 MB)
   69 18:56:26.303211  progress  85 % (14 MB)
   70 18:56:26.307719  progress  90 % (14 MB)
   71 18:56:26.312174  progress  95 % (15 MB)
   72 18:56:26.316991  progress 100 % (16 MB)
   73 18:56:26.317141  16 MB downloaded in 0.09 s (174.40 MB/s)
   74 18:56:26.317321  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 18:56:26.317555  end: 1.2 download-retry (duration 00:00:00) [common]
   77 18:56:26.317639  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 18:56:26.317725  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 18:56:26.317867  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
   80 18:56:26.317937  saving as /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/nfsrootfs/full.rootfs.tar
   81 18:56:26.317999  total size: 133380384 (127 MB)
   82 18:56:26.318060  Using unxz to decompress xz
   83 18:56:26.322644  progress   0 % (0 MB)
   84 18:56:26.683239  progress   5 % (6 MB)
   85 18:56:27.056779  progress  10 % (12 MB)
   86 18:56:27.369515  progress  15 % (19 MB)
   87 18:56:27.565241  progress  20 % (25 MB)
   88 18:56:27.820351  progress  25 % (31 MB)
   89 18:56:28.189067  progress  30 % (38 MB)
   90 18:56:28.559845  progress  35 % (44 MB)
   91 18:56:28.985506  progress  40 % (50 MB)
   92 18:56:29.389011  progress  45 % (57 MB)
   93 18:56:29.756426  progress  50 % (63 MB)
   94 18:56:30.135665  progress  55 % (69 MB)
   95 18:56:30.504218  progress  60 % (76 MB)
   96 18:56:30.873648  progress  65 % (82 MB)
   97 18:56:31.244968  progress  70 % (89 MB)
   98 18:56:31.616918  progress  75 % (95 MB)
   99 18:56:32.073734  progress  80 % (101 MB)
  100 18:56:32.522673  progress  85 % (108 MB)
  101 18:56:32.790948  progress  90 % (114 MB)
  102 18:56:33.155178  progress  95 % (120 MB)
  103 18:56:33.571692  progress 100 % (127 MB)
  104 18:56:33.577320  127 MB downloaded in 7.26 s (17.52 MB/s)
  105 18:56:33.577595  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 18:56:33.577861  end: 1.3 download-retry (duration 00:00:07) [common]
  108 18:56:33.577949  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 18:56:33.578035  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 18:56:33.578188  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.200-cip40-188-g33d0b44cd71d/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/modules.tar.xz
  111 18:56:33.578257  saving as /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/modules/modules.tar
  112 18:56:33.578318  total size: 3311672 (3 MB)
  113 18:56:33.578380  Using unxz to decompress xz
  114 18:56:33.832495  progress   0 % (0 MB)
  115 18:56:33.838617  progress   5 % (0 MB)
  116 18:56:33.846905  progress  10 % (0 MB)
  117 18:56:33.855034  progress  15 % (0 MB)
  118 18:56:33.866271  progress  20 % (0 MB)
  119 18:56:33.877658  progress  25 % (0 MB)
  120 18:56:33.886912  progress  30 % (0 MB)
  121 18:56:33.898659  progress  35 % (1 MB)
  122 18:56:33.909843  progress  40 % (1 MB)
  123 18:56:33.921141  progress  45 % (1 MB)
  124 18:56:33.932845  progress  50 % (1 MB)
  125 18:56:33.943899  progress  55 % (1 MB)
  126 18:56:33.955994  progress  60 % (1 MB)
  127 18:56:33.965790  progress  65 % (2 MB)
  128 18:56:33.975664  progress  70 % (2 MB)
  129 18:56:33.985546  progress  75 % (2 MB)
  130 18:56:33.995670  progress  80 % (2 MB)
  131 18:56:34.005706  progress  85 % (2 MB)
  132 18:56:34.015790  progress  90 % (2 MB)
  133 18:56:34.028257  progress  95 % (3 MB)
  134 18:56:34.038990  progress 100 % (3 MB)
  135 18:56:34.043959  3 MB downloaded in 0.47 s (6.78 MB/s)
  136 18:56:34.044251  end: 1.4.1 http-download (duration 00:00:00) [common]
  138 18:56:34.044621  end: 1.4 download-retry (duration 00:00:00) [common]
  139 18:56:34.044733  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  140 18:56:34.044849  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  141 18:56:36.272134  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12061631/extract-nfsrootfs-ocfr773v
  142 18:56:36.272340  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  143 18:56:36.272444  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  144 18:56:36.272627  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc
  145 18:56:36.272763  makedir: /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin
  146 18:56:36.272868  makedir: /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/tests
  147 18:56:36.272969  makedir: /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/results
  148 18:56:36.273072  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-add-keys
  149 18:56:36.273235  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-add-sources
  150 18:56:36.273383  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-background-process-start
  151 18:56:36.273514  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-background-process-stop
  152 18:56:36.273641  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-common-functions
  153 18:56:36.273768  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-echo-ipv4
  154 18:56:36.273896  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-install-packages
  155 18:56:36.274091  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-installed-packages
  156 18:56:36.274217  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-os-build
  157 18:56:36.274343  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-probe-channel
  158 18:56:36.274471  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-probe-ip
  159 18:56:36.274641  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-target-ip
  160 18:56:36.274783  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-target-mac
  161 18:56:36.274955  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-target-storage
  162 18:56:36.275099  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-test-case
  163 18:56:36.275230  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-test-event
  164 18:56:36.275357  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-test-feedback
  165 18:56:36.275508  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-test-raise
  166 18:56:36.275642  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-test-reference
  167 18:56:36.275826  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-test-runner
  168 18:56:36.275968  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-test-set
  169 18:56:36.276178  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-test-shell
  170 18:56:36.276307  Updating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-install-packages (oe)
  171 18:56:36.276483  Updating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/bin/lava-installed-packages (oe)
  172 18:56:36.276621  Creating /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/environment
  173 18:56:36.276734  LAVA metadata
  174 18:56:36.276834  - LAVA_JOB_ID=12061631
  175 18:56:36.276914  - LAVA_DISPATCHER_IP=192.168.201.1
  176 18:56:36.277048  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  177 18:56:36.277160  skipped lava-vland-overlay
  178 18:56:36.277238  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  179 18:56:36.277374  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  180 18:56:36.277450  skipped lava-multinode-overlay
  181 18:56:36.277524  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  182 18:56:36.277603  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  183 18:56:36.277676  Loading test definitions
  184 18:56:36.277767  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  185 18:56:36.277850  Using /lava-12061631 at stage 0
  186 18:56:36.278258  uuid=12061631_1.5.2.3.1 testdef=None
  187 18:56:36.278348  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  188 18:56:36.278433  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  189 18:56:36.279079  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  191 18:56:36.279303  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  192 18:56:36.280021  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  194 18:56:36.280291  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  195 18:56:36.281212  runner path: /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/0/tests/0_dmesg test_uuid 12061631_1.5.2.3.1
  196 18:56:36.281395  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  198 18:56:36.281619  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
  199 18:56:36.281690  Using /lava-12061631 at stage 1
  200 18:56:36.282040  uuid=12061631_1.5.2.3.5 testdef=None
  201 18:56:36.282143  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  202 18:56:36.282227  start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
  203 18:56:36.282769  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  205 18:56:36.282998  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
  206 18:56:36.283763  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  208 18:56:36.284031  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
  209 18:56:36.284842  runner path: /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/1/tests/1_bootrr test_uuid 12061631_1.5.2.3.5
  210 18:56:36.285053  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  212 18:56:36.285297  Creating lava-test-runner.conf files
  213 18:56:36.285375  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/0 for stage 0
  214 18:56:36.285481  - 0_dmesg
  215 18:56:36.285562  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12061631/lava-overlay-trlxhgwc/lava-12061631/1 for stage 1
  216 18:56:36.285669  - 1_bootrr
  217 18:56:36.285785  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  218 18:56:36.285871  start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
  219 18:56:36.293657  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  220 18:56:36.293767  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
  221 18:56:36.293857  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  222 18:56:36.293944  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  223 18:56:36.294034  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
  224 18:56:36.435354  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  225 18:56:36.435861  start: 1.5.4 extract-modules (timeout 00:09:50) [common]
  226 18:56:36.436047  extracting modules file /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12061631/extract-nfsrootfs-ocfr773v
  227 18:56:36.528915  extracting modules file /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12061631/extract-overlay-ramdisk-5g_vyqh4/ramdisk
  228 18:56:36.617203  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  229 18:56:36.617371  start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
  230 18:56:36.617483  [common] Applying overlay to NFS
  231 18:56:36.617559  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12061631/compress-overlay-dk5a6p9j/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12061631/extract-nfsrootfs-ocfr773v
  232 18:56:36.628032  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 18:56:36.628184  start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
  234 18:56:36.628310  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  235 18:56:36.628435  start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
  236 18:56:36.628596  Building ramdisk /var/lib/lava/dispatcher/tmp/12061631/extract-overlay-ramdisk-5g_vyqh4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12061631/extract-overlay-ramdisk-5g_vyqh4/ramdisk
  237 18:56:36.801897  >> 67824 blocks

  238 18:56:37.960572  rename /var/lib/lava/dispatcher/tmp/12061631/extract-overlay-ramdisk-5g_vyqh4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/ramdisk/ramdisk.cpio.gz
  239 18:56:37.961020  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  240 18:56:37.961147  start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
  241 18:56:37.961244  start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
  242 18:56:37.961337  No mkimage arch provided, not using FIT.
  243 18:56:37.961428  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  244 18:56:37.961509  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  245 18:56:37.961609  end: 1.5 prepare-tftp-overlay (duration 00:00:04) [common]
  246 18:56:37.961701  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
  247 18:56:37.961781  No LXC device requested
  248 18:56:37.961860  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  249 18:56:37.961947  start: 1.7 deploy-device-env (timeout 00:09:48) [common]
  250 18:56:37.962027  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  251 18:56:37.962104  Checking files for TFTP limit of 4294967296 bytes.
  252 18:56:37.962507  end: 1 tftp-deploy (duration 00:00:12) [common]
  253 18:56:37.962611  start: 2 depthcharge-action (timeout 00:05:00) [common]
  254 18:56:37.962702  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  255 18:56:37.962826  substitutions:
  256 18:56:37.962893  - {DTB}: None
  257 18:56:37.962957  - {INITRD}: 12061631/tftp-deploy-c1pv04w0/ramdisk/ramdisk.cpio.gz
  258 18:56:37.963016  - {KERNEL}: 12061631/tftp-deploy-c1pv04w0/kernel/bzImage
  259 18:56:37.963074  - {LAVA_MAC}: None
  260 18:56:37.963129  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12061631/extract-nfsrootfs-ocfr773v
  261 18:56:37.963185  - {NFS_SERVER_IP}: 192.168.201.1
  262 18:56:37.963239  - {PRESEED_CONFIG}: None
  263 18:56:37.963293  - {PRESEED_LOCAL}: None
  264 18:56:37.963346  - {RAMDISK}: 12061631/tftp-deploy-c1pv04w0/ramdisk/ramdisk.cpio.gz
  265 18:56:37.963399  - {ROOT_PART}: None
  266 18:56:37.963453  - {ROOT}: None
  267 18:56:37.963507  - {SERVER_IP}: 192.168.201.1
  268 18:56:37.963561  - {TEE}: None
  269 18:56:37.963614  Parsed boot commands:
  270 18:56:37.963667  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  271 18:56:37.963845  Parsed boot commands: tftpboot 192.168.201.1 12061631/tftp-deploy-c1pv04w0/kernel/bzImage 12061631/tftp-deploy-c1pv04w0/kernel/cmdline 12061631/tftp-deploy-c1pv04w0/ramdisk/ramdisk.cpio.gz
  272 18:56:37.963933  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  273 18:56:37.964018  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  274 18:56:37.964110  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  275 18:56:37.964197  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  276 18:56:37.964267  Not connected, no need to disconnect.
  277 18:56:37.964339  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  278 18:56:37.964420  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  279 18:56:37.964501  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-8'
  280 18:56:37.968491  Setting prompt string to ['lava-test: # ']
  281 18:56:37.968895  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  282 18:56:37.969029  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  283 18:56:37.969144  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  284 18:56:37.969249  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  285 18:56:37.969469  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-8' '--port=1' '--command=reboot'
  286 18:56:43.100362  >> Command sent successfully.

  287 18:56:43.102978  Returned 0 in 5 seconds
  288 18:56:43.203345  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  290 18:56:43.203667  end: 2.2.2 reset-device (duration 00:00:05) [common]
  291 18:56:43.203769  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  292 18:56:43.203870  Setting prompt string to 'Starting depthcharge on Volmar...'
  293 18:56:43.203939  Changing prompt to 'Starting depthcharge on Volmar...'
  294 18:56:43.204023  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  295 18:56:43.204275  [Enter `^Ec?' for help]

  296 18:56:44.579576  

  297 18:56:44.579744  

  298 18:56:44.586195  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  299 18:56:44.589492  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  300 18:56:44.595820  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  301 18:56:44.599228  CPU: AES supported, TXT NOT supported, VT supported

  302 18:56:44.609279  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  303 18:56:44.609403  Cache size = 10 MiB

  304 18:56:44.616796  MCH: device id 4609 (rev 04) is Alderlake-P

  305 18:56:44.620561  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  306 18:56:44.623913  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  307 18:56:44.627893  VBOOT: Loading verstage.

  308 18:56:44.631633  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  309 18:56:44.637759  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  310 18:56:44.641391  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  311 18:56:44.651238  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  312 18:56:44.657651  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  313 18:56:44.657744  

  314 18:56:44.657819  

  315 18:56:44.668614  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  316 18:56:44.671498  Probing TPM I2C: I2C bus 1 version 0x3230302a

  317 18:56:44.675477  DW I2C bus 1 at 0xfe022000 (400 KHz)

  318 18:56:44.679187  done! DID_VID 0x00281ae0

  319 18:56:44.682583  TPM ready after 0 ms

  320 18:56:44.685720  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  321 18:56:44.698949  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  322 18:56:44.705681  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  323 18:56:44.759581  tlcl_send_startup: Startup return code is 0

  324 18:56:44.759687  TPM: setup succeeded

  325 18:56:44.781020  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  326 18:56:44.805250  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  327 18:56:44.808338  Chrome EC: UHEPI supported

  328 18:56:44.811909  Reading cr50 boot mode

  329 18:56:44.826148  Cr50 says boot_mode is VERIFIED_RW(0x00).

  330 18:56:44.826267  Phase 1

  331 18:56:44.833234  FMAP: area GBB found @ 1805000 (458752 bytes)

  332 18:56:44.839742  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  333 18:56:44.846568  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  334 18:56:44.853184  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  335 18:56:44.856180  Phase 2

  336 18:56:44.856260  Phase 3

  337 18:56:44.859516  FMAP: area GBB found @ 1805000 (458752 bytes)

  338 18:56:44.866205  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  339 18:56:44.869474  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  340 18:56:44.876141  VB2:vb2_verify_keyblock() Checking keyblock signature...

  341 18:56:44.882738  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  342 18:56:44.889812  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  343 18:56:44.899251  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  344 18:56:44.911514  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  345 18:56:44.915107  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  346 18:56:44.921598  VB2:vb2_verify_fw_preamble() Verifying preamble.

  347 18:56:44.927888  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  348 18:56:44.934689  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  349 18:56:44.941489  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  350 18:56:44.945339  Phase 4

  351 18:56:44.949006  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  352 18:56:44.955304  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  353 18:56:45.168089  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  354 18:56:45.174518  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  355 18:56:45.178150  Saving vboot hash.

  356 18:56:45.184401  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  357 18:56:45.200358  tlcl_extend: response is 0

  358 18:56:45.207558  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  359 18:56:45.213525  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  360 18:56:45.228323  tlcl_extend: response is 0

  361 18:56:45.235078  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  362 18:56:45.254892  tlcl_lock_nv_write: response is 0

  363 18:56:45.274458  tlcl_lock_nv_write: response is 0

  364 18:56:45.274558  Slot A is selected

  365 18:56:45.280722  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  366 18:56:45.287577  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  367 18:56:45.294203  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  368 18:56:45.300769  BS: verstage times (exec / console): total (unknown) / 256 ms

  369 18:56:45.300853  

  370 18:56:45.300919  

  371 18:56:45.307344  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  372 18:56:45.311842  Google Chrome EC: version:

  373 18:56:45.314870  	ro: volmar_v2.0.14126-e605144e9c

  374 18:56:45.318257  	rw: volmar_v0.0.55-22d1557

  375 18:56:45.321164    running image: 2

  376 18:56:45.324924  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  377 18:56:45.334994  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  378 18:56:45.341637  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  379 18:56:45.347699  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  380 18:56:45.357815  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  381 18:56:45.367747  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  382 18:56:45.371238  EC took 941us to calculate image hash

  383 18:56:45.380966  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  384 18:56:45.384626  VB2:sync_ec() select_rw=RW(active)

  385 18:56:45.395794  Waited 269us to clear limit power flag.

  386 18:56:45.399563  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  387 18:56:45.402598  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  388 18:56:45.405800  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  389 18:56:45.412317  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  390 18:56:45.415897  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  391 18:56:45.419135  TCO_STS:   0000 0000

  392 18:56:45.419219  GEN_PMCON: d0015038 00002200

  393 18:56:45.422259  GBLRST_CAUSE: 00000000 00000000

  394 18:56:45.425745  HPR_CAUSE0: 00000000

  395 18:56:45.429231  prev_sleep_state 5

  396 18:56:45.432330  Abort disabling TXT, as CPU is not TXT capable.

  397 18:56:45.440641  cse_lite: Number of partitions = 3

  398 18:56:45.443941  cse_lite: Current partition = RO

  399 18:56:45.444023  cse_lite: Next partition = RO

  400 18:56:45.447315  cse_lite: Flags = 0x7

  401 18:56:45.453997  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  402 18:56:45.463942  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  403 18:56:45.467354  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  404 18:56:45.473620  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  405 18:56:45.480418  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  406 18:56:45.486745  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  407 18:56:45.490177  cse_lite: CSE CBFS RW version : 16.1.25.2049

  408 18:56:45.496829  cse_lite: Set Boot Partition Info Command (RW)

  409 18:56:45.500355  HECI: Global Reset(Type:1) Command

  410 18:56:46.912190  

  411 18:56:46.912356  

  412 18:56:46.919378  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  413 18:56:46.922871  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  414 18:56:46.929890  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  415 18:56:46.933027  CPU: AES supported, TXT NOT supported, VT supported

  416 18:56:46.942854  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  417 18:56:46.942966  Cache size = 10 MiB

  418 18:56:46.946229  MCH: device id 4609 (rev 04) is Alderlake-P

  419 18:56:46.953234  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  420 18:56:46.956726  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  421 18:56:46.959782  VBOOT: Loading verstage.

  422 18:56:46.967212  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  423 18:56:46.970712  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  424 18:56:46.973807  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  425 18:56:46.981298  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  426 18:56:46.991528  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  427 18:56:46.991631  

  428 18:56:46.991723  

  429 18:56:47.001013  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  430 18:56:47.007962  Probing TPM I2C: I2C bus 1 version 0x3230302a

  431 18:56:47.011229  DW I2C bus 1 at 0xfe022000 (400 KHz)

  432 18:56:47.014379  done! DID_VID 0x00281ae0

  433 18:56:47.014480  TPM ready after 0 ms

  434 18:56:47.018253  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  435 18:56:47.032326  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  436 18:56:47.035956  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  437 18:56:47.092544  tlcl_send_startup: Startup return code is 0

  438 18:56:47.092648  TPM: setup succeeded

  439 18:56:47.113959  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  440 18:56:47.135577  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  441 18:56:47.139791  Chrome EC: UHEPI supported

  442 18:56:47.143070  Reading cr50 boot mode

  443 18:56:47.158101  Cr50 says boot_mode is VERIFIED_RW(0x00).

  444 18:56:47.158194  Phase 1

  445 18:56:47.164415  FMAP: area GBB found @ 1805000 (458752 bytes)

  446 18:56:47.171115  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  447 18:56:47.177690  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  448 18:56:47.184272  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  449 18:56:47.187577  Phase 2

  450 18:56:47.187662  Phase 3

  451 18:56:47.191349  FMAP: area GBB found @ 1805000 (458752 bytes)

  452 18:56:47.197709  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  453 18:56:47.200984  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  454 18:56:47.207399  VB2:vb2_verify_keyblock() Checking keyblock signature...

  455 18:56:47.214249  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  456 18:56:47.220583  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  457 18:56:47.230505  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  458 18:56:47.242663  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  459 18:56:47.245883  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  460 18:56:47.252958  VB2:vb2_verify_fw_preamble() Verifying preamble.

  461 18:56:47.259543  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  462 18:56:47.265846  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  463 18:56:47.272407  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  464 18:56:47.276846  Phase 4

  465 18:56:47.280003  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  466 18:56:47.286750  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  467 18:56:47.499386  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  468 18:56:47.505839  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  469 18:56:47.509035  Saving vboot hash.

  470 18:56:47.516004  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  471 18:56:47.532101  tlcl_extend: response is 0

  472 18:56:47.538573  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  473 18:56:47.544706  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  474 18:56:47.559529  tlcl_extend: response is 0

  475 18:56:47.566164  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  476 18:56:47.585819  tlcl_lock_nv_write: response is 0

  477 18:56:47.605460  tlcl_lock_nv_write: response is 0

  478 18:56:47.605549  Slot A is selected

  479 18:56:47.612071  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  480 18:56:47.618706  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  481 18:56:47.625219  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  482 18:56:47.631639  BS: verstage times (exec / console): total (unknown) / 256 ms

  483 18:56:47.631758  

  484 18:56:47.631873  

  485 18:56:47.638565  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  486 18:56:47.642384  Google Chrome EC: version:

  487 18:56:47.645804  	ro: volmar_v2.0.14126-e605144e9c

  488 18:56:47.649064  	rw: volmar_v0.0.55-22d1557

  489 18:56:47.652548    running image: 2

  490 18:56:47.655549  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  491 18:56:47.665941  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  492 18:56:47.671992  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  493 18:56:47.678972  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  494 18:56:47.688835  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  495 18:56:47.698754  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  496 18:56:47.705246  EC took 1656us to calculate image hash

  497 18:56:47.715816  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  498 18:56:47.718815  VB2:sync_ec() select_rw=RW(active)

  499 18:56:47.735267  Waited 270us to clear limit power flag.

  500 18:56:47.738640  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  501 18:56:47.741923  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  502 18:56:47.745274  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  503 18:56:47.751852  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  504 18:56:47.755289  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  505 18:56:47.758452  TCO_STS:   0000 0000

  506 18:56:47.761507  GEN_PMCON: d1001038 00002200

  507 18:56:47.764800  GBLRST_CAUSE: 00000040 00000000

  508 18:56:47.764885  HPR_CAUSE0: 00000000

  509 18:56:47.768539  prev_sleep_state 5

  510 18:56:47.771793  Abort disabling TXT, as CPU is not TXT capable.

  511 18:56:47.779380  cse_lite: Number of partitions = 3

  512 18:56:47.782904  cse_lite: Current partition = RW

  513 18:56:47.782989  cse_lite: Next partition = RW

  514 18:56:47.786069  cse_lite: Flags = 0x7

  515 18:56:47.792811  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  516 18:56:47.802716  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  517 18:56:47.805995  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  518 18:56:47.812426  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  519 18:56:47.819138  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  520 18:56:47.825913  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  521 18:56:47.829485  cse_lite: CSE CBFS RW version : 16.1.25.2049

  522 18:56:47.832760  Boot Count incremented to 15256

  523 18:56:47.839904  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  524 18:56:47.845964  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  525 18:56:47.858868  Probing TPM I2C: done! DID_VID 0x00281ae0

  526 18:56:47.862183  Locality already claimed

  527 18:56:47.865683  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  528 18:56:47.885158  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  529 18:56:47.891683  MRC: Hash idx 0x100d comparison successful.

  530 18:56:47.895040  MRC cache found, size f6c8

  531 18:56:47.895116  bootmode is set to: 2

  532 18:56:47.898924  EC returned error result code 3

  533 18:56:47.902092  FW_CONFIG value from CBI is 0x131

  534 18:56:47.908601  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  535 18:56:47.912095  SPD index = 0

  536 18:56:47.918482  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  537 18:56:47.918564  SPD: module type is LPDDR4X

  538 18:56:47.925871  SPD: module part number is K4U6E3S4AB-MGCL

  539 18:56:47.932453  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  540 18:56:47.935540  SPD: device width 16 bits, bus width 16 bits

  541 18:56:47.939316  SPD: module size is 1024 MB (per channel)

  542 18:56:48.007578  CBMEM:

  543 18:56:48.011254  IMD: root @ 0x76fff000 254 entries.

  544 18:56:48.014488  IMD: root @ 0x76ffec00 62 entries.

  545 18:56:48.022093  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  546 18:56:48.025366  RO_VPD is uninitialized or empty.

  547 18:56:48.029181  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  548 18:56:48.035878  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  549 18:56:48.039148  External stage cache:

  550 18:56:48.042225  IMD: root @ 0x7bbff000 254 entries.

  551 18:56:48.045560  IMD: root @ 0x7bbfec00 62 entries.

  552 18:56:48.052485  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  553 18:56:48.058970  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  554 18:56:48.062360  MRC: 'RW_MRC_CACHE' does not need update.

  555 18:56:48.062432  8 DIMMs found

  556 18:56:48.065512  SMM Memory Map

  557 18:56:48.069103  SMRAM       : 0x7b800000 0x800000

  558 18:56:48.072833   Subregion 0: 0x7b800000 0x200000

  559 18:56:48.075866   Subregion 1: 0x7ba00000 0x200000

  560 18:56:48.079065   Subregion 2: 0x7bc00000 0x400000

  561 18:56:48.082261  top_of_ram = 0x77000000

  562 18:56:48.085457  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  563 18:56:48.092251  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  564 18:56:48.098879  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  565 18:56:48.102372  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  566 18:56:48.102448  Normal boot

  567 18:56:48.112127  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  568 18:56:48.119010  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  569 18:56:48.125560  Processing 237 relocs. Offset value of 0x74ab9000

  570 18:56:48.133787  BS: romstage times (exec / console): total (unknown) / 377 ms

  571 18:56:48.141038  

  572 18:56:48.141152  

  573 18:56:48.147961  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  574 18:56:48.148045  Normal boot

  575 18:56:48.154403  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  576 18:56:48.161289  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  577 18:56:48.167601  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  578 18:56:48.177642  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  579 18:56:48.226179  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  580 18:56:48.232468  Processing 5931 relocs. Offset value of 0x72a2f000

  581 18:56:48.235861  BS: postcar times (exec / console): total (unknown) / 51 ms

  582 18:56:48.239318  

  583 18:56:48.239393  

  584 18:56:48.245998  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  585 18:56:48.249449  Reserving BERT start 76a1e000, size 10000

  586 18:56:48.252557  Normal boot

  587 18:56:48.255939  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  588 18:56:48.262423  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  589 18:56:48.272495  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  590 18:56:48.275571  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  591 18:56:48.279293  Google Chrome EC: version:

  592 18:56:48.282225  	ro: volmar_v2.0.14126-e605144e9c

  593 18:56:48.285450  	rw: volmar_v0.0.55-22d1557

  594 18:56:48.288841    running image: 2

  595 18:56:48.292536  ACPI _SWS is PM1 Index 8 GPE Index -1

  596 18:56:48.296002  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  597 18:56:48.299885  EC returned error result code 3

  598 18:56:48.303486  FW_CONFIG value from CBI is 0x131

  599 18:56:48.310080  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  600 18:56:48.313357  PCI: 00:1c.2 disabled by fw_config

  601 18:56:48.320150  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  602 18:56:48.323467  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  603 18:56:48.330046  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  604 18:56:48.333242  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  605 18:56:48.340166  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  606 18:56:48.346797  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  607 18:56:48.349926  microcode: sig=0x906a4 pf=0x80 revision=0x423

  608 18:56:48.356835  microcode: Update skipped, already up-to-date

  609 18:56:48.363279  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  610 18:56:48.395438  Detected 6 core, 8 thread CPU.

  611 18:56:48.399086  Setting up SMI for CPU

  612 18:56:48.402475  IED base = 0x7bc00000

  613 18:56:48.402558  IED size = 0x00400000

  614 18:56:48.405927  Will perform SMM setup.

  615 18:56:48.408768  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  616 18:56:48.412440  LAPIC 0x0 in XAPIC mode.

  617 18:56:48.422393  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  618 18:56:48.425716  Processing 18 relocs. Offset value of 0x00030000

  619 18:56:48.430142  Attempting to start 7 APs

  620 18:56:48.433560  Waiting for 10ms after sending INIT.

  621 18:56:48.446521  Waiting for SIPI to complete...

  622 18:56:48.449991  done.

  623 18:56:48.450077  LAPIC 0x10 in XAPIC mode.

  624 18:56:48.452898  LAPIC 0x8 in XAPIC mode.

  625 18:56:48.456173  LAPIC 0x14 in XAPIC mode.

  626 18:56:48.459993  LAPIC 0x12 in XAPIC mode.

  627 18:56:48.463153  LAPIC 0x9 in XAPIC mode.

  628 18:56:48.466546  AP: slot 4 apic_id 10, MCU rev: 0x00000423

  629 18:56:48.469764  LAPIC 0x1 in XAPIC mode.

  630 18:56:48.473073  AP: slot 2 apic_id 14, MCU rev: 0x00000423

  631 18:56:48.476630  AP: slot 1 apic_id 12, MCU rev: 0x00000423

  632 18:56:48.479968  AP: slot 7 apic_id 8, MCU rev: 0x00000423

  633 18:56:48.482951  LAPIC 0x16 in XAPIC mode.

  634 18:56:48.489568  AP: slot 5 apic_id 9, MCU rev: 0x00000423

  635 18:56:48.492849  AP: slot 3 apic_id 16, MCU rev: 0x00000423

  636 18:56:48.496025  Waiting for SIPI to complete...

  637 18:56:48.496126  done.

  638 18:56:48.499360  AP: slot 6 apic_id 1, MCU rev: 0x00000423

  639 18:56:48.503133  smm_setup_relocation_handler: enter

  640 18:56:48.506667  smm_setup_relocation_handler: exit

  641 18:56:48.515905  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  642 18:56:48.519657  Processing 11 relocs. Offset value of 0x00038000

  643 18:56:48.526074  smm_module_setup_stub: stack_top = 0x7b804000

  644 18:56:48.529430  smm_module_setup_stub: per cpu stack_size = 0x800

  645 18:56:48.536272  smm_module_setup_stub: runtime.start32_offset = 0x4c

  646 18:56:48.539452  smm_module_setup_stub: runtime.smm_size = 0x10000

  647 18:56:48.545953  SMM Module: stub loaded at 38000. Will call 0x76a52094

  648 18:56:48.549529  Installing permanent SMM handler to 0x7b800000

  649 18:56:48.555887  smm_load_module: total_smm_space_needed e468, available -> 200000

  650 18:56:48.565862  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  651 18:56:48.569107  Processing 255 relocs. Offset value of 0x7b9f6000

  652 18:56:48.575867  smm_load_module: smram_start: 0x7b800000

  653 18:56:48.579149  smm_load_module: smram_end: 7ba00000

  654 18:56:48.582563  smm_load_module: handler start 0x7b9f6d5f

  655 18:56:48.585818  smm_load_module: handler_size 98d0

  656 18:56:48.589267  smm_load_module: fxsave_area 0x7b9ff000

  657 18:56:48.592768  smm_load_module: fxsave_size 1000

  658 18:56:48.595911  smm_load_module: CONFIG_MSEG_SIZE 0x0

  659 18:56:48.602630  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  660 18:56:48.609239  smm_load_module: handler_mod_params.smbase = 0x7b800000

  661 18:56:48.612293  smm_load_module: per_cpu_save_state_size = 0x400

  662 18:56:48.615552  smm_load_module: num_cpus = 0x8

  663 18:56:48.622556  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  664 18:56:48.625907  smm_load_module: total_save_state_size = 0x2000

  665 18:56:48.632316  smm_load_module: cpu0 entry: 7b9e6000

  666 18:56:48.635848  smm_create_map: cpus allowed in one segment 30

  667 18:56:48.638971  smm_create_map: min # of segments needed 1

  668 18:56:48.639055  CPU 0x0

  669 18:56:48.645585      smbase 7b9e6000  entry 7b9ee000

  670 18:56:48.648862             ss_start 7b9f5c00  code_end 7b9ee208

  671 18:56:48.648945  CPU 0x1

  672 18:56:48.652160      smbase 7b9e5c00  entry 7b9edc00

  673 18:56:48.658610             ss_start 7b9f5800  code_end 7b9ede08

  674 18:56:48.658721  CPU 0x2

  675 18:56:48.661946      smbase 7b9e5800  entry 7b9ed800

  676 18:56:48.668999             ss_start 7b9f5400  code_end 7b9eda08

  677 18:56:48.669083  CPU 0x3

  678 18:56:48.672001      smbase 7b9e5400  entry 7b9ed400

  679 18:56:48.675675             ss_start 7b9f5000  code_end 7b9ed608

  680 18:56:48.678530  CPU 0x4

  681 18:56:48.681903      smbase 7b9e5000  entry 7b9ed000

  682 18:56:48.685298             ss_start 7b9f4c00  code_end 7b9ed208

  683 18:56:48.685382  CPU 0x5

  684 18:56:48.692042      smbase 7b9e4c00  entry 7b9ecc00

  685 18:56:48.695105             ss_start 7b9f4800  code_end 7b9ece08

  686 18:56:48.695189  CPU 0x6

  687 18:56:48.698485      smbase 7b9e4800  entry 7b9ec800

  688 18:56:48.705267             ss_start 7b9f4400  code_end 7b9eca08

  689 18:56:48.705350  CPU 0x7

  690 18:56:48.708502      smbase 7b9e4400  entry 7b9ec400

  691 18:56:48.715043             ss_start 7b9f4000  code_end 7b9ec608

  692 18:56:48.722075  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  693 18:56:48.728575  Processing 11 relocs. Offset value of 0x7b9ee000

  694 18:56:48.731687  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  695 18:56:48.738191  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  696 18:56:48.745146  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  697 18:56:48.751654  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  698 18:56:48.758512  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  699 18:56:48.764938  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  700 18:56:48.771535  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  701 18:56:48.774817  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  702 18:56:48.781446  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  703 18:56:48.788186  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  704 18:56:48.794870  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  705 18:56:48.801327  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  706 18:56:48.808080  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  707 18:56:48.814549  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  708 18:56:48.821230  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  709 18:56:48.824530  smm_module_setup_stub: stack_top = 0x7b804000

  710 18:56:48.831246  smm_module_setup_stub: per cpu stack_size = 0x800

  711 18:56:48.834849  smm_module_setup_stub: runtime.start32_offset = 0x4c

  712 18:56:48.841513  smm_module_setup_stub: runtime.smm_size = 0x200000

  713 18:56:48.847875  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  714 18:56:48.851069  Clearing SMI status registers

  715 18:56:48.854633  SMI_STS: PM1 

  716 18:56:48.854749  PM1_STS: WAK PWRBTN 

  717 18:56:48.861184  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  718 18:56:48.864735  In relocation handler: CPU 0

  719 18:56:48.868049  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  720 18:56:48.874741  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  721 18:56:48.877571  Relocation complete.

  722 18:56:48.884448  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  723 18:56:48.887621  In relocation handler: CPU 6

  724 18:56:48.891228  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  725 18:56:48.894191  Relocation complete.

  726 18:56:48.901026  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  727 18:56:48.904371  In relocation handler: CPU 4

  728 18:56:48.907763  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  729 18:56:48.911074  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  730 18:56:48.914339  Relocation complete.

  731 18:56:48.920743  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  732 18:56:48.924427  In relocation handler: CPU 2

  733 18:56:48.927863  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  734 18:56:48.934134  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  735 18:56:48.934244  Relocation complete.

  736 18:56:48.941248  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  737 18:56:48.944016  In relocation handler: CPU 3

  738 18:56:48.950982  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  739 18:56:48.954149  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  740 18:56:48.957587  Relocation complete.

  741 18:56:48.963930  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  742 18:56:48.967197  In relocation handler: CPU 1

  743 18:56:48.971055  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  744 18:56:48.974010  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  745 18:56:48.977557  Relocation complete.

  746 18:56:48.984273  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  747 18:56:48.987347  In relocation handler: CPU 7

  748 18:56:48.990818  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  749 18:56:48.997391  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  750 18:56:48.997475  Relocation complete.

  751 18:56:49.007404  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  752 18:56:49.010660  In relocation handler: CPU 5

  753 18:56:49.014053  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  754 18:56:49.014137  Relocation complete.

  755 18:56:49.017355  Initializing CPU #0

  756 18:56:49.020815  CPU: vendor Intel device 906a4

  757 18:56:49.023762  CPU: family 06, model 9a, stepping 04

  758 18:56:49.027060  Clearing out pending MCEs

  759 18:56:49.030391  cpu: energy policy set to 7

  760 18:56:49.033720  Turbo is available but hidden

  761 18:56:49.037381  Turbo is available and visible

  762 18:56:49.040775  microcode: Update skipped, already up-to-date

  763 18:56:49.044202  CPU #0 initialized

  764 18:56:49.044285  Initializing CPU #6

  765 18:56:49.047135  Initializing CPU #4

  766 18:56:49.047255  Initializing CPU #2

  767 18:56:49.050815  CPU: vendor Intel device 906a4

  768 18:56:49.057212  CPU: family 06, model 9a, stepping 04

  769 18:56:49.057293  Initializing CPU #3

  770 18:56:49.060288  CPU: vendor Intel device 906a4

  771 18:56:49.063840  CPU: family 06, model 9a, stepping 04

  772 18:56:49.067212  Clearing out pending MCEs

  773 18:56:49.070254  Clearing out pending MCEs

  774 18:56:49.073721  CPU: vendor Intel device 906a4

  775 18:56:49.077053  CPU: family 06, model 9a, stepping 04

  776 18:56:49.080261  Initializing CPU #7

  777 18:56:49.080333  Initializing CPU #1

  778 18:56:49.083575  Clearing out pending MCEs

  779 18:56:49.086939  cpu: energy policy set to 7

  780 18:56:49.090329  CPU: vendor Intel device 906a4

  781 18:56:49.093481  CPU: family 06, model 9a, stepping 04

  782 18:56:49.097194  cpu: energy policy set to 7

  783 18:56:49.100264  Clearing out pending MCEs

  784 18:56:49.100343  CPU: vendor Intel device 906a4

  785 18:56:49.107168  CPU: family 06, model 9a, stepping 04

  786 18:56:49.107246  cpu: energy policy set to 7

  787 18:56:49.113689  microcode: Update skipped, already up-to-date

  788 18:56:49.113771  CPU #2 initialized

  789 18:56:49.120431  microcode: Update skipped, already up-to-date

  790 18:56:49.120592  CPU #4 initialized

  791 18:56:49.123503  Initializing CPU #5

  792 18:56:49.127360  cpu: energy policy set to 7

  793 18:56:49.130344  microcode: Update skipped, already up-to-date

  794 18:56:49.133841  CPU #3 initialized

  795 18:56:49.137090  microcode: Update skipped, already up-to-date

  796 18:56:49.140167  CPU #1 initialized

  797 18:56:49.143525  CPU: vendor Intel device 906a4

  798 18:56:49.146753  CPU: family 06, model 9a, stepping 04

  799 18:56:49.149937  CPU: vendor Intel device 906a4

  800 18:56:49.153428  CPU: family 06, model 9a, stepping 04

  801 18:56:49.156562  Clearing out pending MCEs

  802 18:56:49.160122  Clearing out pending MCEs

  803 18:56:49.160256  cpu: energy policy set to 7

  804 18:56:49.163453  cpu: energy policy set to 7

  805 18:56:49.170328  microcode: Update skipped, already up-to-date

  806 18:56:49.170424  CPU #7 initialized

  807 18:56:49.176368  microcode: Update skipped, already up-to-date

  808 18:56:49.176447  CPU #5 initialized

  809 18:56:49.179666  Clearing out pending MCEs

  810 18:56:49.183332  cpu: energy policy set to 7

  811 18:56:49.187036  microcode: Update skipped, already up-to-date

  812 18:56:49.189639  CPU #6 initialized

  813 18:56:49.193233  bsp_do_flight_plan done after 693 msecs.

  814 18:56:49.196406  CPU: frequency set to 4400 MHz

  815 18:56:49.199942  Enabling SMIs.

  816 18:56:49.206407  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms

  817 18:56:49.220793  Probing TPM I2C: done! DID_VID 0x00281ae0

  818 18:56:49.224043  Locality already claimed

  819 18:56:49.227437  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  820 18:56:49.238714  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  821 18:56:49.242330  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  822 18:56:49.248646  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  823 18:56:49.255476  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  824 18:56:49.258833  Found a VBT of 9216 bytes after decompression

  825 18:56:49.262176  PCI  1.0, PIN A, using IRQ #16

  826 18:56:49.265493  PCI  2.0, PIN A, using IRQ #17

  827 18:56:49.268931  PCI  4.0, PIN A, using IRQ #18

  828 18:56:49.272435  PCI  5.0, PIN A, using IRQ #16

  829 18:56:49.275643  PCI  6.0, PIN A, using IRQ #16

  830 18:56:49.278630  PCI  6.2, PIN C, using IRQ #18

  831 18:56:49.281904  PCI  7.0, PIN A, using IRQ #19

  832 18:56:49.285321  PCI  7.1, PIN B, using IRQ #20

  833 18:56:49.288516  PCI  7.2, PIN C, using IRQ #21

  834 18:56:49.292331  PCI  7.3, PIN D, using IRQ #22

  835 18:56:49.295308  PCI  8.0, PIN A, using IRQ #23

  836 18:56:49.298634  PCI  D.0, PIN A, using IRQ #17

  837 18:56:49.302054  PCI  D.1, PIN B, using IRQ #19

  838 18:56:49.302164  PCI 10.0, PIN A, using IRQ #24

  839 18:56:49.305439  PCI 10.1, PIN B, using IRQ #25

  840 18:56:49.308942  PCI 10.6, PIN C, using IRQ #20

  841 18:56:49.312172  PCI 10.7, PIN D, using IRQ #21

  842 18:56:49.315524  PCI 11.0, PIN A, using IRQ #26

  843 18:56:49.318663  PCI 11.1, PIN B, using IRQ #27

  844 18:56:49.321769  PCI 11.2, PIN C, using IRQ #28

  845 18:56:49.325098  PCI 11.3, PIN D, using IRQ #29

  846 18:56:49.328347  PCI 12.0, PIN A, using IRQ #30

  847 18:56:49.331784  PCI 12.6, PIN B, using IRQ #31

  848 18:56:49.335277  PCI 12.7, PIN C, using IRQ #22

  849 18:56:49.338721  PCI 13.0, PIN A, using IRQ #32

  850 18:56:49.341868  PCI 13.1, PIN B, using IRQ #33

  851 18:56:49.345335  PCI 13.2, PIN C, using IRQ #34

  852 18:56:49.348698  PCI 13.3, PIN D, using IRQ #35

  853 18:56:49.351966  PCI 14.0, PIN B, using IRQ #23

  854 18:56:49.355241  PCI 14.1, PIN A, using IRQ #36

  855 18:56:49.355324  PCI 14.3, PIN C, using IRQ #17

  856 18:56:49.358526  PCI 15.0, PIN A, using IRQ #37

  857 18:56:49.361907  PCI 15.1, PIN B, using IRQ #38

  858 18:56:49.365219  PCI 15.2, PIN C, using IRQ #39

  859 18:56:49.368393  PCI 15.3, PIN D, using IRQ #40

  860 18:56:49.371568  PCI 16.0, PIN A, using IRQ #18

  861 18:56:49.375210  PCI 16.1, PIN B, using IRQ #19

  862 18:56:49.378599  PCI 16.2, PIN C, using IRQ #20

  863 18:56:49.381818  PCI 16.3, PIN D, using IRQ #21

  864 18:56:49.384772  PCI 16.4, PIN A, using IRQ #18

  865 18:56:49.388181  PCI 16.5, PIN B, using IRQ #19

  866 18:56:49.391607  PCI 17.0, PIN A, using IRQ #22

  867 18:56:49.394913  PCI 19.0, PIN A, using IRQ #41

  868 18:56:49.397869  PCI 19.1, PIN B, using IRQ #42

  869 18:56:49.401184  PCI 19.2, PIN C, using IRQ #43

  870 18:56:49.404701  PCI 1C.0, PIN A, using IRQ #16

  871 18:56:49.407783  PCI 1C.1, PIN B, using IRQ #17

  872 18:56:49.411362  PCI 1C.2, PIN C, using IRQ #18

  873 18:56:49.411473  PCI 1C.3, PIN D, using IRQ #19

  874 18:56:49.414504  PCI 1C.4, PIN A, using IRQ #16

  875 18:56:49.417872  PCI 1C.5, PIN B, using IRQ #17

  876 18:56:49.421272  PCI 1C.6, PIN C, using IRQ #18

  877 18:56:49.424607  PCI 1C.7, PIN D, using IRQ #19

  878 18:56:49.427875  PCI 1D.0, PIN A, using IRQ #16

  879 18:56:49.431245  PCI 1D.1, PIN B, using IRQ #17

  880 18:56:49.434407  PCI 1D.2, PIN C, using IRQ #18

  881 18:56:49.437822  PCI 1D.3, PIN D, using IRQ #19

  882 18:56:49.441279  PCI 1E.0, PIN A, using IRQ #23

  883 18:56:49.444406  PCI 1E.1, PIN B, using IRQ #20

  884 18:56:49.447792  PCI 1E.2, PIN C, using IRQ #44

  885 18:56:49.450975  PCI 1E.3, PIN D, using IRQ #45

  886 18:56:49.454305  PCI 1F.3, PIN B, using IRQ #22

  887 18:56:49.457719  PCI 1F.4, PIN C, using IRQ #23

  888 18:56:49.461021  PCI 1F.6, PIN D, using IRQ #20

  889 18:56:49.464339  PCI 1F.7, PIN A, using IRQ #21

  890 18:56:49.467613  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  891 18:56:49.474304  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  892 18:56:49.658154  FSPS returned 0

  893 18:56:49.661552  Executing Phase 1 of FspMultiPhaseSiInit

  894 18:56:49.671511  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  895 18:56:49.675021  port C0 DISC req: usage 1 usb3 1 usb2 1

  896 18:56:49.678368  Raw Buffer output 0 00000111

  897 18:56:49.681459  Raw Buffer output 1 00000000

  898 18:56:49.685426  pmc_send_ipc_cmd succeeded

  899 18:56:49.692040  port C1 DISC req: usage 1 usb3 3 usb2 3

  900 18:56:49.692122  Raw Buffer output 0 00000331

  901 18:56:49.695225  Raw Buffer output 1 00000000

  902 18:56:49.699577  pmc_send_ipc_cmd succeeded

  903 18:56:49.703265  Detected 6 core, 8 thread CPU.

  904 18:56:49.706490  Detected 6 core, 8 thread CPU.

  905 18:56:49.712069  Detected 6 core, 8 thread CPU.

  906 18:56:49.715279  Detected 6 core, 8 thread CPU.

  907 18:56:49.718725  Detected 6 core, 8 thread CPU.

  908 18:56:49.721917  Detected 6 core, 8 thread CPU.

  909 18:56:49.725177  Detected 6 core, 8 thread CPU.

  910 18:56:49.728550  Detected 6 core, 8 thread CPU.

  911 18:56:49.731750  Detected 6 core, 8 thread CPU.

  912 18:56:49.735070  Detected 6 core, 8 thread CPU.

  913 18:56:49.738147  Detected 6 core, 8 thread CPU.

  914 18:56:49.741481  Detected 6 core, 8 thread CPU.

  915 18:56:49.744918  Detected 6 core, 8 thread CPU.

  916 18:56:49.748410  Detected 6 core, 8 thread CPU.

  917 18:56:49.751751  Detected 6 core, 8 thread CPU.

  918 18:56:49.755033  Detected 6 core, 8 thread CPU.

  919 18:56:49.758353  Detected 6 core, 8 thread CPU.

  920 18:56:49.761319  Detected 6 core, 8 thread CPU.

  921 18:56:49.764983  Detected 6 core, 8 thread CPU.

  922 18:56:49.767943  Detected 6 core, 8 thread CPU.

  923 18:56:49.771566  Detected 6 core, 8 thread CPU.

  924 18:56:49.774706  Detected 6 core, 8 thread CPU.

  925 18:56:50.054022  Detected 6 core, 8 thread CPU.

  926 18:56:50.057054  Detected 6 core, 8 thread CPU.

  927 18:56:50.060439  Detected 6 core, 8 thread CPU.

  928 18:56:50.063816  Detected 6 core, 8 thread CPU.

  929 18:56:50.067097  Detected 6 core, 8 thread CPU.

  930 18:56:50.070674  Detected 6 core, 8 thread CPU.

  931 18:56:50.074201  Detected 6 core, 8 thread CPU.

  932 18:56:50.077271  Detected 6 core, 8 thread CPU.

  933 18:56:50.080352  Detected 6 core, 8 thread CPU.

  934 18:56:50.083790  Detected 6 core, 8 thread CPU.

  935 18:56:50.087447  Detected 6 core, 8 thread CPU.

  936 18:56:50.090439  Detected 6 core, 8 thread CPU.

  937 18:56:50.093633  Detected 6 core, 8 thread CPU.

  938 18:56:50.096784  Detected 6 core, 8 thread CPU.

  939 18:56:50.100411  Detected 6 core, 8 thread CPU.

  940 18:56:50.103711  Detected 6 core, 8 thread CPU.

  941 18:56:50.106905  Detected 6 core, 8 thread CPU.

  942 18:56:50.110293  Detected 6 core, 8 thread CPU.

  943 18:56:50.113509  Detected 6 core, 8 thread CPU.

  944 18:56:50.116812  Detected 6 core, 8 thread CPU.

  945 18:56:50.120060  Display FSP Version Info HOB

  946 18:56:50.123550  Reference Code - CPU = c.0.65.70

  947 18:56:50.123627  uCode Version = 0.0.4.23

  948 18:56:50.126991  TXT ACM version = ff.ff.ff.ffff

  949 18:56:50.130118  Reference Code - ME = c.0.65.70

  950 18:56:50.133467  MEBx version = 0.0.0.0

  951 18:56:50.136835  ME Firmware Version = Lite SKU

  952 18:56:50.139977  Reference Code - PCH = c.0.65.70

  953 18:56:50.143194  PCH-CRID Status = Disabled

  954 18:56:50.146817  PCH-CRID Original Value = ff.ff.ff.ffff

  955 18:56:50.150043  PCH-CRID New Value = ff.ff.ff.ffff

  956 18:56:50.153514  OPROM - RST - RAID = ff.ff.ff.ffff

  957 18:56:50.156636  PCH Hsio Version = 4.0.0.0

  958 18:56:50.160134  Reference Code - SA - System Agent = c.0.65.70

  959 18:56:50.163444  Reference Code - MRC = 0.0.3.80

  960 18:56:50.166648  SA - PCIe Version = c.0.65.70

  961 18:56:50.169649  SA-CRID Status = Disabled

  962 18:56:50.173265  SA-CRID Original Value = 0.0.0.4

  963 18:56:50.176519  SA-CRID New Value = 0.0.0.4

  964 18:56:50.179746  OPROM - VBIOS = ff.ff.ff.ffff

  965 18:56:50.183341  IO Manageability Engine FW Version = 24.0.4.0

  966 18:56:50.186432  PHY Build Version = 0.0.0.2016

  967 18:56:50.189605  Thunderbolt(TM) FW Version = 0.0.0.0

  968 18:56:50.196583  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  969 18:56:50.202965  BS: BS_DEV_INIT_CHIPS run times (exec / console): 484 / 507 ms

  970 18:56:50.206395  Enumerating buses...

  971 18:56:50.209415  Show all devs... Before device enumeration.

  972 18:56:50.213156  Root Device: enabled 1

  973 18:56:50.216313  CPU_CLUSTER: 0: enabled 1

  974 18:56:50.216396  DOMAIN: 0000: enabled 1

  975 18:56:50.219725  GPIO: 0: enabled 1

  976 18:56:50.222992  PCI: 00:00.0: enabled 1

  977 18:56:50.223092  PCI: 00:01.0: enabled 0

  978 18:56:50.226212  PCI: 00:01.1: enabled 0

  979 18:56:50.229844  PCI: 00:02.0: enabled 1

  980 18:56:50.233120  PCI: 00:04.0: enabled 1

  981 18:56:50.233204  PCI: 00:05.0: enabled 0

  982 18:56:50.236085  PCI: 00:06.0: enabled 1

  983 18:56:50.239865  PCI: 00:06.2: enabled 0

  984 18:56:50.242565  PCI: 00:07.0: enabled 0

  985 18:56:50.242649  PCI: 00:07.1: enabled 0

  986 18:56:50.246069  PCI: 00:07.2: enabled 0

  987 18:56:50.249476  PCI: 00:07.3: enabled 0

  988 18:56:50.249576  PCI: 00:08.0: enabled 0

  989 18:56:50.252860  PCI: 00:09.0: enabled 0

  990 18:56:50.256070  PCI: 00:0a.0: enabled 1

  991 18:56:50.259387  PCI: 00:0d.0: enabled 1

  992 18:56:50.259471  PCI: 00:0d.1: enabled 0

  993 18:56:50.262662  PCI: 00:0d.2: enabled 0

  994 18:56:50.266077  PCI: 00:0d.3: enabled 0

  995 18:56:50.269401  PCI: 00:0e.0: enabled 0

  996 18:56:50.269502  PCI: 00:10.0: enabled 0

  997 18:56:50.272755  PCI: 00:10.1: enabled 0

  998 18:56:50.276174  PCI: 00:10.6: enabled 0

  999 18:56:50.279229  PCI: 00:10.7: enabled 0

 1000 18:56:50.279312  PCI: 00:12.0: enabled 0

 1001 18:56:50.282595  PCI: 00:12.6: enabled 0

 1002 18:56:50.286069  PCI: 00:12.7: enabled 0

 1003 18:56:50.289171  PCI: 00:13.0: enabled 0

 1004 18:56:50.289255  PCI: 00:14.0: enabled 1

 1005 18:56:50.292433  PCI: 00:14.1: enabled 0

 1006 18:56:50.295951  PCI: 00:14.2: enabled 1

 1007 18:56:50.296034  PCI: 00:14.3: enabled 1

 1008 18:56:50.299350  PCI: 00:15.0: enabled 1

 1009 18:56:50.302763  PCI: 00:15.1: enabled 1

 1010 18:56:50.305692  PCI: 00:15.2: enabled 0

 1011 18:56:50.305773  PCI: 00:15.3: enabled 1

 1012 18:56:50.308991  PCI: 00:16.0: enabled 1

 1013 18:56:50.312487  PCI: 00:16.1: enabled 0

 1014 18:56:50.316099  PCI: 00:16.2: enabled 0

 1015 18:56:50.316176  PCI: 00:16.3: enabled 0

 1016 18:56:50.319283  PCI: 00:16.4: enabled 0

 1017 18:56:50.322414  PCI: 00:16.5: enabled 0

 1018 18:56:50.325691  PCI: 00:17.0: enabled 1

 1019 18:56:50.325786  PCI: 00:19.0: enabled 0

 1020 18:56:50.329130  PCI: 00:19.1: enabled 1

 1021 18:56:50.332338  PCI: 00:19.2: enabled 0

 1022 18:56:50.332417  PCI: 00:1a.0: enabled 0

 1023 18:56:50.336078  PCI: 00:1c.0: enabled 0

 1024 18:56:50.338964  PCI: 00:1c.1: enabled 0

 1025 18:56:50.342212  PCI: 00:1c.2: enabled 0

 1026 18:56:50.342295  PCI: 00:1c.3: enabled 0

 1027 18:56:50.346039  PCI: 00:1c.4: enabled 0

 1028 18:56:50.348955  PCI: 00:1c.5: enabled 0

 1029 18:56:50.352513  PCI: 00:1c.6: enabled 0

 1030 18:56:50.352589  PCI: 00:1c.7: enabled 0

 1031 18:56:50.355796  PCI: 00:1d.0: enabled 0

 1032 18:56:50.359121  PCI: 00:1d.1: enabled 0

 1033 18:56:50.362555  PCI: 00:1d.2: enabled 0

 1034 18:56:50.362632  PCI: 00:1d.3: enabled 0

 1035 18:56:50.365908  PCI: 00:1e.0: enabled 1

 1036 18:56:50.369187  PCI: 00:1e.1: enabled 0

 1037 18:56:50.369270  PCI: 00:1e.2: enabled 0

 1038 18:56:50.372483  PCI: 00:1e.3: enabled 1

 1039 18:56:50.375572  PCI: 00:1f.0: enabled 1

 1040 18:56:50.379197  PCI: 00:1f.1: enabled 0

 1041 18:56:50.379275  PCI: 00:1f.2: enabled 1

 1042 18:56:50.382397  PCI: 00:1f.3: enabled 1

 1043 18:56:50.386002  PCI: 00:1f.4: enabled 0

 1044 18:56:50.388797  PCI: 00:1f.5: enabled 1

 1045 18:56:50.388883  PCI: 00:1f.6: enabled 0

 1046 18:56:50.392242  PCI: 00:1f.7: enabled 0

 1047 18:56:50.395922  GENERIC: 0.0: enabled 1

 1048 18:56:50.398841  GENERIC: 0.0: enabled 1

 1049 18:56:50.398914  GENERIC: 1.0: enabled 1

 1050 18:56:50.402610  GENERIC: 0.0: enabled 1

 1051 18:56:50.405877  GENERIC: 1.0: enabled 1

 1052 18:56:50.405951  USB0 port 0: enabled 1

 1053 18:56:50.409314  USB0 port 0: enabled 1

 1054 18:56:50.412258  GENERIC: 0.0: enabled 1

 1055 18:56:50.415474  I2C: 00:1a: enabled 1

 1056 18:56:50.415548  I2C: 00:31: enabled 1

 1057 18:56:50.418972  I2C: 00:32: enabled 1

 1058 18:56:50.422377  I2C: 00:50: enabled 1

 1059 18:56:50.422451  I2C: 00:10: enabled 1

 1060 18:56:50.425736  I2C: 00:15: enabled 1

 1061 18:56:50.429057  I2C: 00:2c: enabled 1

 1062 18:56:50.429131  GENERIC: 0.0: enabled 1

 1063 18:56:50.432085  SPI: 00: enabled 1

 1064 18:56:50.435751  PNP: 0c09.0: enabled 1

 1065 18:56:50.435825  GENERIC: 0.0: enabled 1

 1066 18:56:50.438871  USB3 port 0: enabled 1

 1067 18:56:50.442326  USB3 port 1: enabled 0

 1068 18:56:50.445670  USB3 port 2: enabled 1

 1069 18:56:50.445743  USB3 port 3: enabled 0

 1070 18:56:50.449046  USB2 port 0: enabled 1

 1071 18:56:50.452149  USB2 port 1: enabled 0

 1072 18:56:50.452235  USB2 port 2: enabled 1

 1073 18:56:50.455551  USB2 port 3: enabled 0

 1074 18:56:50.458907  USB2 port 4: enabled 0

 1075 18:56:50.458993  USB2 port 5: enabled 1

 1076 18:56:50.462234  USB2 port 6: enabled 0

 1077 18:56:50.465593  USB2 port 7: enabled 0

 1078 18:56:50.468735  USB2 port 8: enabled 1

 1079 18:56:50.468809  USB2 port 9: enabled 1

 1080 18:56:50.472051  USB3 port 0: enabled 1

 1081 18:56:50.475357  USB3 port 1: enabled 0

 1082 18:56:50.475431  USB3 port 2: enabled 0

 1083 18:56:50.478588  USB3 port 3: enabled 0

 1084 18:56:50.482152  GENERIC: 0.0: enabled 1

 1085 18:56:50.485188  GENERIC: 1.0: enabled 1

 1086 18:56:50.485267  APIC: 00: enabled 1

 1087 18:56:50.488947  APIC: 12: enabled 1

 1088 18:56:50.489021  APIC: 14: enabled 1

 1089 18:56:50.491960  APIC: 16: enabled 1

 1090 18:56:50.495361  APIC: 10: enabled 1

 1091 18:56:50.495437  APIC: 09: enabled 1

 1092 18:56:50.498591  APIC: 01: enabled 1

 1093 18:56:50.502230  APIC: 08: enabled 1

 1094 18:56:50.502305  Compare with tree...

 1095 18:56:50.505085  Root Device: enabled 1

 1096 18:56:50.508608   CPU_CLUSTER: 0: enabled 1

 1097 18:56:50.508683    APIC: 00: enabled 1

 1098 18:56:50.511821    APIC: 12: enabled 1

 1099 18:56:50.515184    APIC: 14: enabled 1

 1100 18:56:50.515258    APIC: 16: enabled 1

 1101 18:56:50.518658    APIC: 10: enabled 1

 1102 18:56:50.521884    APIC: 09: enabled 1

 1103 18:56:50.521963    APIC: 01: enabled 1

 1104 18:56:50.525166    APIC: 08: enabled 1

 1105 18:56:50.528326   DOMAIN: 0000: enabled 1

 1106 18:56:50.531949    GPIO: 0: enabled 1

 1107 18:56:50.532034    PCI: 00:00.0: enabled 1

 1108 18:56:50.535080    PCI: 00:01.0: enabled 0

 1109 18:56:50.538352    PCI: 00:01.1: enabled 0

 1110 18:56:50.541912    PCI: 00:02.0: enabled 1

 1111 18:56:50.545106    PCI: 00:04.0: enabled 1

 1112 18:56:50.545190     GENERIC: 0.0: enabled 1

 1113 18:56:50.548436    PCI: 00:05.0: enabled 0

 1114 18:56:50.552151    PCI: 00:06.0: enabled 1

 1115 18:56:50.554855    PCI: 00:06.2: enabled 0

 1116 18:56:50.558379    PCI: 00:08.0: enabled 0

 1117 18:56:50.558460    PCI: 00:09.0: enabled 0

 1118 18:56:50.561730    PCI: 00:0a.0: enabled 1

 1119 18:56:50.565094    PCI: 00:0d.0: enabled 1

 1120 18:56:50.568312     USB0 port 0: enabled 1

 1121 18:56:50.571659      USB3 port 0: enabled 1

 1122 18:56:50.571733      USB3 port 1: enabled 0

 1123 18:56:50.574994      USB3 port 2: enabled 1

 1124 18:56:50.578321      USB3 port 3: enabled 0

 1125 18:56:50.582019    PCI: 00:0d.1: enabled 0

 1126 18:56:50.585247    PCI: 00:0d.2: enabled 0

 1127 18:56:50.585318    PCI: 00:0d.3: enabled 0

 1128 18:56:50.588300    PCI: 00:0e.0: enabled 0

 1129 18:56:50.591780    PCI: 00:10.0: enabled 0

 1130 18:56:50.595126    PCI: 00:10.1: enabled 0

 1131 18:56:50.598137    PCI: 00:10.6: enabled 0

 1132 18:56:50.598238    PCI: 00:10.7: enabled 0

 1133 18:56:50.601807    PCI: 00:12.0: enabled 0

 1134 18:56:50.605122    PCI: 00:12.6: enabled 0

 1135 18:56:50.608243    PCI: 00:12.7: enabled 0

 1136 18:56:50.611472    PCI: 00:13.0: enabled 0

 1137 18:56:50.611555    PCI: 00:14.0: enabled 1

 1138 18:56:50.614848     USB0 port 0: enabled 1

 1139 18:56:50.618202      USB2 port 0: enabled 1

 1140 18:56:50.621505      USB2 port 1: enabled 0

 1141 18:56:50.625183      USB2 port 2: enabled 1

 1142 18:56:50.625263      USB2 port 3: enabled 0

 1143 18:56:50.628381      USB2 port 4: enabled 0

 1144 18:56:50.631435      USB2 port 5: enabled 1

 1145 18:56:50.634994      USB2 port 6: enabled 0

 1146 18:56:50.638590      USB2 port 7: enabled 0

 1147 18:56:50.641515      USB2 port 8: enabled 1

 1148 18:56:50.641589      USB2 port 9: enabled 1

 1149 18:56:50.644920      USB3 port 0: enabled 1

 1150 18:56:50.648312      USB3 port 1: enabled 0

 1151 18:56:50.651374      USB3 port 2: enabled 0

 1152 18:56:50.654776      USB3 port 3: enabled 0

 1153 18:56:50.654852    PCI: 00:14.1: enabled 0

 1154 18:56:50.657997    PCI: 00:14.2: enabled 1

 1155 18:56:50.661531    PCI: 00:14.3: enabled 1

 1156 18:56:50.665059     GENERIC: 0.0: enabled 1

 1157 18:56:50.668177    PCI: 00:15.0: enabled 1

 1158 18:56:50.668271     I2C: 00:1a: enabled 1

 1159 18:56:50.671308     I2C: 00:31: enabled 1

 1160 18:56:50.674694     I2C: 00:32: enabled 1

 1161 18:56:50.678010    PCI: 00:15.1: enabled 1

 1162 18:56:50.678076     I2C: 00:50: enabled 1

 1163 18:56:50.681296    PCI: 00:15.2: enabled 0

 1164 18:56:50.684709    PCI: 00:15.3: enabled 1

 1165 18:56:50.688102     I2C: 00:10: enabled 1

 1166 18:56:50.691414    PCI: 00:16.0: enabled 1

 1167 18:56:50.691484    PCI: 00:16.1: enabled 0

 1168 18:56:50.694739    PCI: 00:16.2: enabled 0

 1169 18:56:50.697707    PCI: 00:16.3: enabled 0

 1170 18:56:50.701303    PCI: 00:16.4: enabled 0

 1171 18:56:50.704382    PCI: 00:16.5: enabled 0

 1172 18:56:50.704483    PCI: 00:17.0: enabled 1

 1173 18:56:50.708086    PCI: 00:19.0: enabled 0

 1174 18:56:50.711404    PCI: 00:19.1: enabled 1

 1175 18:56:50.714612     I2C: 00:15: enabled 1

 1176 18:56:50.718064     I2C: 00:2c: enabled 1

 1177 18:56:50.718129    PCI: 00:19.2: enabled 0

 1178 18:56:50.721289    PCI: 00:1a.0: enabled 0

 1179 18:56:50.724576    PCI: 00:1e.0: enabled 1

 1180 18:56:50.727853    PCI: 00:1e.1: enabled 0

 1181 18:56:50.727921    PCI: 00:1e.2: enabled 0

 1182 18:56:50.731062    PCI: 00:1e.3: enabled 1

 1183 18:56:50.734627     SPI: 00: enabled 1

 1184 18:56:50.737636    PCI: 00:1f.0: enabled 1

 1185 18:56:50.741109     PNP: 0c09.0: enabled 1

 1186 18:56:50.741184    PCI: 00:1f.1: enabled 0

 1187 18:56:50.744378    PCI: 00:1f.2: enabled 1

 1188 18:56:50.747654     GENERIC: 0.0: enabled 1

 1189 18:56:50.751285      GENERIC: 0.0: enabled 1

 1190 18:56:50.754343      GENERIC: 1.0: enabled 1

 1191 18:56:50.754445    PCI: 00:1f.3: enabled 1

 1192 18:56:50.757674    PCI: 00:1f.4: enabled 0

 1193 18:56:50.760832    PCI: 00:1f.5: enabled 1

 1194 18:56:50.764580    PCI: 00:1f.6: enabled 0

 1195 18:56:50.767788    PCI: 00:1f.7: enabled 0

 1196 18:56:50.767862  Root Device scanning...

 1197 18:56:50.771082  scan_static_bus for Root Device

 1198 18:56:50.774466  CPU_CLUSTER: 0 enabled

 1199 18:56:50.777703  DOMAIN: 0000 enabled

 1200 18:56:50.777775  DOMAIN: 0000 scanning...

 1201 18:56:50.780901  PCI: pci_scan_bus for bus 00

 1202 18:56:50.784202  PCI: 00:00.0 [8086/0000] ops

 1203 18:56:50.787544  PCI: 00:00.0 [8086/4609] enabled

 1204 18:56:50.791004  PCI: 00:02.0 [8086/0000] bus ops

 1205 18:56:50.794484  PCI: 00:02.0 [8086/46b3] enabled

 1206 18:56:50.797506  PCI: 00:04.0 [8086/0000] bus ops

 1207 18:56:50.801046  PCI: 00:04.0 [8086/461d] enabled

 1208 18:56:50.804358  PCI: 00:06.0 [8086/0000] bus ops

 1209 18:56:50.807758  PCI: 00:06.0 [8086/464d] enabled

 1210 18:56:50.810822  PCI: 00:08.0 [8086/464f] disabled

 1211 18:56:50.814300  PCI: 00:0a.0 [8086/467d] enabled

 1212 18:56:50.817520  PCI: 00:0d.0 [8086/0000] bus ops

 1213 18:56:50.821186  PCI: 00:0d.0 [8086/461e] enabled

 1214 18:56:50.824585  PCI: 00:14.0 [8086/0000] bus ops

 1215 18:56:50.828143  PCI: 00:14.0 [8086/51ed] enabled

 1216 18:56:50.831218  PCI: 00:14.2 [8086/51ef] enabled

 1217 18:56:50.834462  PCI: 00:14.3 [8086/0000] bus ops

 1218 18:56:50.838238  PCI: 00:14.3 [8086/51f0] enabled

 1219 18:56:50.841230  PCI: 00:15.0 [8086/0000] bus ops

 1220 18:56:50.844557  PCI: 00:15.0 [8086/51e8] enabled

 1221 18:56:50.847752  PCI: 00:15.1 [8086/0000] bus ops

 1222 18:56:50.851141  PCI: 00:15.1 [8086/51e9] enabled

 1223 18:56:50.854656  PCI: 00:15.2 [8086/0000] bus ops

 1224 18:56:50.858004  PCI: 00:15.2 [8086/51ea] disabled

 1225 18:56:50.861333  PCI: 00:15.3 [8086/0000] bus ops

 1226 18:56:50.864381  PCI: 00:15.3 [8086/51eb] enabled

 1227 18:56:50.867965  PCI: 00:16.0 [8086/0000] ops

 1228 18:56:50.871470  PCI: 00:16.0 [8086/51e0] enabled

 1229 18:56:50.877976  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1230 18:56:50.881313  PCI: 00:19.0 [8086/0000] bus ops

 1231 18:56:50.884473  PCI: 00:19.0 [8086/51c5] disabled

 1232 18:56:50.887935  PCI: 00:19.1 [8086/0000] bus ops

 1233 18:56:50.891234  PCI: 00:19.1 [8086/51c6] enabled

 1234 18:56:50.894680  PCI: 00:1e.0 [8086/0000] ops

 1235 18:56:50.898029  PCI: 00:1e.0 [8086/51a8] enabled

 1236 18:56:50.901166  PCI: 00:1e.3 [8086/0000] bus ops

 1237 18:56:50.904532  PCI: 00:1e.3 [8086/51ab] enabled

 1238 18:56:50.907898  PCI: 00:1f.0 [8086/0000] bus ops

 1239 18:56:50.911208  PCI: 00:1f.0 [8086/5182] enabled

 1240 18:56:50.914494  RTC Init

 1241 18:56:50.917533  Set power on after power failure.

 1242 18:56:50.917613  Disabling Deep S3

 1243 18:56:50.920833  Disabling Deep S3

 1244 18:56:50.924094  Disabling Deep S4

 1245 18:56:50.924168  Disabling Deep S4

 1246 18:56:50.927878  Disabling Deep S5

 1247 18:56:50.927947  Disabling Deep S5

 1248 18:56:50.930939  PCI: 00:1f.2 [0000/0000] hidden

 1249 18:56:50.934480  PCI: 00:1f.3 [8086/0000] bus ops

 1250 18:56:50.937860  PCI: 00:1f.3 [8086/51c8] enabled

 1251 18:56:50.941044  PCI: 00:1f.5 [8086/0000] bus ops

 1252 18:56:50.944209  PCI: 00:1f.5 [8086/51a4] enabled

 1253 18:56:50.947367  GPIO: 0 enabled

 1254 18:56:50.950780  PCI: Leftover static devices:

 1255 18:56:50.950868  PCI: 00:01.0

 1256 18:56:50.954605  PCI: 00:01.1

 1257 18:56:50.954689  PCI: 00:05.0

 1258 18:56:50.954752  PCI: 00:06.2

 1259 18:56:50.957932  PCI: 00:09.0

 1260 18:56:50.958013  PCI: 00:0d.1

 1261 18:56:50.961080  PCI: 00:0d.2

 1262 18:56:50.961150  PCI: 00:0d.3

 1263 18:56:50.961211  PCI: 00:0e.0

 1264 18:56:50.964360  PCI: 00:10.0

 1265 18:56:50.964481  PCI: 00:10.1

 1266 18:56:50.967391  PCI: 00:10.6

 1267 18:56:50.967471  PCI: 00:10.7

 1268 18:56:50.967534  PCI: 00:12.0

 1269 18:56:50.970675  PCI: 00:12.6

 1270 18:56:50.970770  PCI: 00:12.7

 1271 18:56:50.974394  PCI: 00:13.0

 1272 18:56:50.974498  PCI: 00:14.1

 1273 18:56:50.977272  PCI: 00:16.1

 1274 18:56:50.977344  PCI: 00:16.2

 1275 18:56:50.977404  PCI: 00:16.3

 1276 18:56:50.981000  PCI: 00:16.4

 1277 18:56:50.981077  PCI: 00:16.5

 1278 18:56:50.984271  PCI: 00:17.0

 1279 18:56:50.984337  PCI: 00:19.2

 1280 18:56:50.984403  PCI: 00:1a.0

 1281 18:56:50.987242  PCI: 00:1e.1

 1282 18:56:50.987310  PCI: 00:1e.2

 1283 18:56:50.990566  PCI: 00:1f.1

 1284 18:56:50.990636  PCI: 00:1f.4

 1285 18:56:50.993961  PCI: 00:1f.6

 1286 18:56:50.994032  PCI: 00:1f.7

 1287 18:56:50.997263  PCI: Check your devicetree.cb.

 1288 18:56:51.000426  PCI: 00:02.0 scanning...

 1289 18:56:51.003795  scan_generic_bus for PCI: 00:02.0

 1290 18:56:51.007099  scan_generic_bus for PCI: 00:02.0 done

 1291 18:56:51.010961  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1292 18:56:51.014100  PCI: 00:04.0 scanning...

 1293 18:56:51.017091  scan_generic_bus for PCI: 00:04.0

 1294 18:56:51.020760  GENERIC: 0.0 enabled

 1295 18:56:51.023885  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1296 18:56:51.030424  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1297 18:56:51.033846  PCI: 00:06.0 scanning...

 1298 18:56:51.037093  do_pci_scan_bridge for PCI: 00:06.0

 1299 18:56:51.040708  PCI: pci_scan_bus for bus 01

 1300 18:56:51.043857  PCI: 01:00.0 [15b7/5009] enabled

 1301 18:56:51.047434  Enabling Common Clock Configuration

 1302 18:56:51.050656  L1 Sub-State supported from root port 6

 1303 18:56:51.054060  L1 Sub-State Support = 0x5

 1304 18:56:51.057441  CommonModeRestoreTime = 0x6e

 1305 18:56:51.060828  Power On Value = 0x5, Power On Scale = 0x2

 1306 18:56:51.063886  ASPM: Enabled L1

 1307 18:56:51.066957  PCIe: Max_Payload_Size adjusted to 256

 1308 18:56:51.067042  PCI: 01:00.0: Enabled LTR

 1309 18:56:51.073849  PCI: 01:00.0: Programmed LTR max latencies

 1310 18:56:51.077379  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1311 18:56:51.080614  PCI: 00:0d.0 scanning...

 1312 18:56:51.083804  scan_static_bus for PCI: 00:0d.0

 1313 18:56:51.087258  USB0 port 0 enabled

 1314 18:56:51.087358  USB0 port 0 scanning...

 1315 18:56:51.090428  scan_static_bus for USB0 port 0

 1316 18:56:51.093965  USB3 port 0 enabled

 1317 18:56:51.097282  USB3 port 1 disabled

 1318 18:56:51.097381  USB3 port 2 enabled

 1319 18:56:51.100658  USB3 port 3 disabled

 1320 18:56:51.103834  USB3 port 0 scanning...

 1321 18:56:51.107104  scan_static_bus for USB3 port 0

 1322 18:56:51.110691  scan_static_bus for USB3 port 0 done

 1323 18:56:51.113670  scan_bus: bus USB3 port 0 finished in 6 msecs

 1324 18:56:51.117176  USB3 port 2 scanning...

 1325 18:56:51.120390  scan_static_bus for USB3 port 2

 1326 18:56:51.123556  scan_static_bus for USB3 port 2 done

 1327 18:56:51.127174  scan_bus: bus USB3 port 2 finished in 6 msecs

 1328 18:56:51.130308  scan_static_bus for USB0 port 0 done

 1329 18:56:51.137143  scan_bus: bus USB0 port 0 finished in 43 msecs

 1330 18:56:51.140593  scan_static_bus for PCI: 00:0d.0 done

 1331 18:56:51.143816  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1332 18:56:51.147118  PCI: 00:14.0 scanning...

 1333 18:56:51.150035  scan_static_bus for PCI: 00:14.0

 1334 18:56:51.153847  USB0 port 0 enabled

 1335 18:56:51.153955  USB0 port 0 scanning...

 1336 18:56:51.156950  scan_static_bus for USB0 port 0

 1337 18:56:51.160089  USB2 port 0 enabled

 1338 18:56:51.163641  USB2 port 1 disabled

 1339 18:56:51.163749  USB2 port 2 enabled

 1340 18:56:51.166958  USB2 port 3 disabled

 1341 18:56:51.170476  USB2 port 4 disabled

 1342 18:56:51.170577  USB2 port 5 enabled

 1343 18:56:51.173623  USB2 port 6 disabled

 1344 18:56:51.177076  USB2 port 7 disabled

 1345 18:56:51.177156  USB2 port 8 enabled

 1346 18:56:51.180076  USB2 port 9 enabled

 1347 18:56:51.180144  USB3 port 0 enabled

 1348 18:56:51.183667  USB3 port 1 disabled

 1349 18:56:51.187002  USB3 port 2 disabled

 1350 18:56:51.187070  USB3 port 3 disabled

 1351 18:56:51.190293  USB2 port 0 scanning...

 1352 18:56:51.193563  scan_static_bus for USB2 port 0

 1353 18:56:51.196936  scan_static_bus for USB2 port 0 done

 1354 18:56:51.203591  scan_bus: bus USB2 port 0 finished in 6 msecs

 1355 18:56:51.203671  USB2 port 2 scanning...

 1356 18:56:51.206950  scan_static_bus for USB2 port 2

 1357 18:56:51.210182  scan_static_bus for USB2 port 2 done

 1358 18:56:51.216761  scan_bus: bus USB2 port 2 finished in 6 msecs

 1359 18:56:51.216869  USB2 port 5 scanning...

 1360 18:56:51.219919  scan_static_bus for USB2 port 5

 1361 18:56:51.226822  scan_static_bus for USB2 port 5 done

 1362 18:56:51.230130  scan_bus: bus USB2 port 5 finished in 6 msecs

 1363 18:56:51.233387  USB2 port 8 scanning...

 1364 18:56:51.236625  scan_static_bus for USB2 port 8

 1365 18:56:51.239946  scan_static_bus for USB2 port 8 done

 1366 18:56:51.243161  scan_bus: bus USB2 port 8 finished in 6 msecs

 1367 18:56:51.246497  USB2 port 9 scanning...

 1368 18:56:51.250171  scan_static_bus for USB2 port 9

 1369 18:56:51.253438  scan_static_bus for USB2 port 9 done

 1370 18:56:51.256857  scan_bus: bus USB2 port 9 finished in 6 msecs

 1371 18:56:51.259940  USB3 port 0 scanning...

 1372 18:56:51.263186  scan_static_bus for USB3 port 0

 1373 18:56:51.266395  scan_static_bus for USB3 port 0 done

 1374 18:56:51.273040  scan_bus: bus USB3 port 0 finished in 6 msecs

 1375 18:56:51.276804  scan_static_bus for USB0 port 0 done

 1376 18:56:51.279793  scan_bus: bus USB0 port 0 finished in 120 msecs

 1377 18:56:51.283235  scan_static_bus for PCI: 00:14.0 done

 1378 18:56:51.290207  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1379 18:56:51.290287  PCI: 00:14.3 scanning...

 1380 18:56:51.293414  scan_static_bus for PCI: 00:14.3

 1381 18:56:51.296361  GENERIC: 0.0 enabled

 1382 18:56:51.299623  scan_static_bus for PCI: 00:14.3 done

 1383 18:56:51.307024  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1384 18:56:51.307127  PCI: 00:15.0 scanning...

 1385 18:56:51.310018  scan_static_bus for PCI: 00:15.0

 1386 18:56:51.312839  I2C: 00:1a enabled

 1387 18:56:51.316624  I2C: 00:31 enabled

 1388 18:56:51.316706  I2C: 00:32 enabled

 1389 18:56:51.319961  scan_static_bus for PCI: 00:15.0 done

 1390 18:56:51.326517  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1391 18:56:51.329606  PCI: 00:15.1 scanning...

 1392 18:56:51.333257  scan_static_bus for PCI: 00:15.1

 1393 18:56:51.333339  I2C: 00:50 enabled

 1394 18:56:51.336151  scan_static_bus for PCI: 00:15.1 done

 1395 18:56:51.342860  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1396 18:56:51.342943  PCI: 00:15.3 scanning...

 1397 18:56:51.346464  scan_static_bus for PCI: 00:15.3

 1398 18:56:51.349867  I2C: 00:10 enabled

 1399 18:56:51.353064  scan_static_bus for PCI: 00:15.3 done

 1400 18:56:51.359481  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1401 18:56:51.359565  PCI: 00:19.1 scanning...

 1402 18:56:51.365746  scan_static_bus for PCI: 00:19.1

 1403 18:56:51.366152  I2C: 00:15 enabled

 1404 18:56:51.369781  I2C: 00:2c enabled

 1405 18:56:51.372997  scan_static_bus for PCI: 00:19.1 done

 1406 18:56:51.376067  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1407 18:56:51.379288  PCI: 00:1e.3 scanning...

 1408 18:56:51.382816  scan_generic_bus for PCI: 00:1e.3

 1409 18:56:51.382899  SPI: 00 enabled

 1410 18:56:51.389267  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1411 18:56:51.395877  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1412 18:56:51.395959  PCI: 00:1f.0 scanning...

 1413 18:56:51.399546  scan_static_bus for PCI: 00:1f.0

 1414 18:56:51.402909  PNP: 0c09.0 enabled

 1415 18:56:51.406045  PNP: 0c09.0 scanning...

 1416 18:56:51.409231  scan_static_bus for PNP: 0c09.0

 1417 18:56:51.412806  scan_static_bus for PNP: 0c09.0 done

 1418 18:56:51.416426  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1419 18:56:51.419297  scan_static_bus for PCI: 00:1f.0 done

 1420 18:56:51.425821  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1421 18:56:51.429140  PCI: 00:1f.2 scanning...

 1422 18:56:51.432839  scan_static_bus for PCI: 00:1f.2

 1423 18:56:51.432922  GENERIC: 0.0 enabled

 1424 18:56:51.435818  GENERIC: 0.0 scanning...

 1425 18:56:51.439323  scan_static_bus for GENERIC: 0.0

 1426 18:56:51.442348  GENERIC: 0.0 enabled

 1427 18:56:51.442430  GENERIC: 1.0 enabled

 1428 18:56:51.449269  scan_static_bus for GENERIC: 0.0 done

 1429 18:56:51.452858  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1430 18:56:51.456065  scan_static_bus for PCI: 00:1f.2 done

 1431 18:56:51.462720  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1432 18:56:51.462804  PCI: 00:1f.3 scanning...

 1433 18:56:51.465822  scan_static_bus for PCI: 00:1f.3

 1434 18:56:51.469380  scan_static_bus for PCI: 00:1f.3 done

 1435 18:56:51.475933  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1436 18:56:51.479310  PCI: 00:1f.5 scanning...

 1437 18:56:51.482553  scan_generic_bus for PCI: 00:1f.5

 1438 18:56:51.485971  scan_generic_bus for PCI: 00:1f.5 done

 1439 18:56:51.488964  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1440 18:56:51.495790  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1441 18:56:51.499061  scan_static_bus for Root Device done

 1442 18:56:51.502260  scan_bus: bus Root Device finished in 729 msecs

 1443 18:56:51.502342  done

 1444 18:56:51.509069  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms

 1445 18:56:51.515738  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1446 18:56:51.522458  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1447 18:56:51.525761  SPI flash protection: WPSW=0 SRP0=0

 1448 18:56:51.529025  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1449 18:56:51.535559  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1450 18:56:51.538806  found VGA at PCI: 00:02.0

 1451 18:56:51.542409  Setting up VGA for PCI: 00:02.0

 1452 18:56:51.545640  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1453 18:56:51.552402  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1454 18:56:51.555685  Allocating resources...

 1455 18:56:51.555767  Reading resources...

 1456 18:56:51.562158  Root Device read_resources bus 0 link: 0

 1457 18:56:51.565593  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1458 18:56:51.568807  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1459 18:56:51.575600  DOMAIN: 0000 read_resources bus 0 link: 0

 1460 18:56:51.582132  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1461 18:56:51.585798  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1462 18:56:51.592207  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1463 18:56:51.598622  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1464 18:56:51.605630  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1465 18:56:51.612108  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1466 18:56:51.619113  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1467 18:56:51.625404  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1468 18:56:51.632086  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1469 18:56:51.638518  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1470 18:56:51.645662  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1471 18:56:51.651924  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1472 18:56:51.655014  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1473 18:56:51.661855  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1474 18:56:51.668722  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1475 18:56:51.674763  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1476 18:56:51.681963  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1477 18:56:51.688115  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1478 18:56:51.694682  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1479 18:56:51.701222  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1480 18:56:51.707884  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1481 18:56:51.711569  PCI: 00:04.0 read_resources bus 1 link: 0

 1482 18:56:51.714573  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1483 18:56:51.721120  PCI: 00:06.0 read_resources bus 1 link: 0

 1484 18:56:51.724641  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1485 18:56:51.727908  PCI: 00:0d.0 read_resources bus 0 link: 0

 1486 18:56:51.734784  USB0 port 0 read_resources bus 0 link: 0

 1487 18:56:51.738099  USB0 port 0 read_resources bus 0 link: 0 done

 1488 18:56:51.741123  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1489 18:56:51.747801  PCI: 00:14.0 read_resources bus 0 link: 0

 1490 18:56:51.750960  USB0 port 0 read_resources bus 0 link: 0

 1491 18:56:51.754281  USB0 port 0 read_resources bus 0 link: 0 done

 1492 18:56:51.760831  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1493 18:56:51.764140  PCI: 00:14.3 read_resources bus 0 link: 0

 1494 18:56:51.767857  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1495 18:56:51.774649  PCI: 00:15.0 read_resources bus 0 link: 0

 1496 18:56:51.777540  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1497 18:56:51.780801  PCI: 00:15.1 read_resources bus 0 link: 0

 1498 18:56:51.787535  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1499 18:56:51.790642  PCI: 00:15.3 read_resources bus 0 link: 0

 1500 18:56:51.797373  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1501 18:56:51.800725  PCI: 00:19.1 read_resources bus 0 link: 0

 1502 18:56:51.804184  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1503 18:56:51.810560  PCI: 00:1e.3 read_resources bus 2 link: 0

 1504 18:56:51.813803  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1505 18:56:51.817203  PCI: 00:1f.0 read_resources bus 0 link: 0

 1506 18:56:51.823829  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1507 18:56:51.827168  PCI: 00:1f.2 read_resources bus 0 link: 0

 1508 18:56:51.830459  GENERIC: 0.0 read_resources bus 0 link: 0

 1509 18:56:51.837200  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1510 18:56:51.840888  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1511 18:56:51.847080  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1512 18:56:51.850579  Root Device read_resources bus 0 link: 0 done

 1513 18:56:51.853777  Done reading resources.

 1514 18:56:51.857256  Show resources in subtree (Root Device)...After reading.

 1515 18:56:51.863899   Root Device child on link 0 CPU_CLUSTER: 0

 1516 18:56:51.866890    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1517 18:56:51.866991     APIC: 00

 1518 18:56:51.870346     APIC: 12

 1519 18:56:51.870417     APIC: 14

 1520 18:56:51.873843     APIC: 16

 1521 18:56:51.873918     APIC: 10

 1522 18:56:51.873980     APIC: 09

 1523 18:56:51.876820     APIC: 01

 1524 18:56:51.876886     APIC: 08

 1525 18:56:51.880193    DOMAIN: 0000 child on link 0 GPIO: 0

 1526 18:56:51.890134    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1527 18:56:51.900312    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1528 18:56:51.900396     GPIO: 0

 1529 18:56:51.903635     PCI: 00:00.0

 1530 18:56:51.913788     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1531 18:56:51.923402     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1532 18:56:51.929859     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1533 18:56:51.939729     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1534 18:56:51.949624     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1535 18:56:51.959762     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1536 18:56:51.969707     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1537 18:56:51.979832     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1538 18:56:51.989410     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1539 18:56:51.999287     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1540 18:56:52.006132     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1541 18:56:52.015904     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1542 18:56:52.025924     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1543 18:56:52.035805     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1544 18:56:52.045812     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1545 18:56:52.055472     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1546 18:56:52.062318     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1547 18:56:52.072186     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1548 18:56:52.082303     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1549 18:56:52.092136     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1550 18:56:52.102209     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1551 18:56:52.111953     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1552 18:56:52.121728     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1553 18:56:52.131643     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1554 18:56:52.141555     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1555 18:56:52.148060     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1556 18:56:52.158018     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1557 18:56:52.167951     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1558 18:56:52.171631     PCI: 00:02.0

 1559 18:56:52.181233     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1560 18:56:52.191463     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1561 18:56:52.201208     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1562 18:56:52.204667     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1563 18:56:52.214208     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1564 18:56:52.214294      GENERIC: 0.0

 1565 18:56:52.220832     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1566 18:56:52.227660     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1567 18:56:52.237390     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1568 18:56:52.247233     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1569 18:56:52.250898      PCI: 01:00.0

 1570 18:56:52.261057      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1571 18:56:52.270603      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1572 18:56:52.270687     PCI: 00:08.0

 1573 18:56:52.274143     PCI: 00:0a.0

 1574 18:56:52.283863     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1575 18:56:52.287347     PCI: 00:0d.0 child on link 0 USB0 port 0

 1576 18:56:52.296989     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1577 18:56:52.300664      USB0 port 0 child on link 0 USB3 port 0

 1578 18:56:52.304098       USB3 port 0

 1579 18:56:52.304179       USB3 port 1

 1580 18:56:52.307475       USB3 port 2

 1581 18:56:52.310336       USB3 port 3

 1582 18:56:52.313668     PCI: 00:14.0 child on link 0 USB0 port 0

 1583 18:56:52.323777     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1584 18:56:52.326793      USB0 port 0 child on link 0 USB2 port 0

 1585 18:56:52.330490       USB2 port 0

 1586 18:56:52.330561       USB2 port 1

 1587 18:56:52.333815       USB2 port 2

 1588 18:56:52.333887       USB2 port 3

 1589 18:56:52.337087       USB2 port 4

 1590 18:56:52.337162       USB2 port 5

 1591 18:56:52.340367       USB2 port 6

 1592 18:56:52.340441       USB2 port 7

 1593 18:56:52.343790       USB2 port 8

 1594 18:56:52.347128       USB2 port 9

 1595 18:56:52.347199       USB3 port 0

 1596 18:56:52.350362       USB3 port 1

 1597 18:56:52.350440       USB3 port 2

 1598 18:56:52.353705       USB3 port 3

 1599 18:56:52.353803     PCI: 00:14.2

 1600 18:56:52.363514     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1601 18:56:52.373319     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1602 18:56:52.380402     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1603 18:56:52.390247     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1604 18:56:52.390332      GENERIC: 0.0

 1605 18:56:52.393301     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1606 18:56:52.403482     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1607 18:56:52.406668      I2C: 00:1a

 1608 18:56:52.406750      I2C: 00:31

 1609 18:56:52.410207      I2C: 00:32

 1610 18:56:52.413548     PCI: 00:15.1 child on link 0 I2C: 00:50

 1611 18:56:52.423669     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1612 18:56:52.426690      I2C: 00:50

 1613 18:56:52.426772     PCI: 00:15.2

 1614 18:56:52.429829     PCI: 00:15.3 child on link 0 I2C: 00:10

 1615 18:56:52.440111     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1616 18:56:52.442985      I2C: 00:10

 1617 18:56:52.443067     PCI: 00:16.0

 1618 18:56:52.452977     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1619 18:56:52.456647     PCI: 00:19.0

 1620 18:56:52.459797     PCI: 00:19.1 child on link 0 I2C: 00:15

 1621 18:56:52.469732     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1622 18:56:52.473344      I2C: 00:15

 1623 18:56:52.473423      I2C: 00:2c

 1624 18:56:52.476367     PCI: 00:1e.0

 1625 18:56:52.486245     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1626 18:56:52.489873     PCI: 00:1e.3 child on link 0 SPI: 00

 1627 18:56:52.499860     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1628 18:56:52.499947      SPI: 00

 1629 18:56:52.506314     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1630 18:56:52.512813     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1631 18:56:52.516414      PNP: 0c09.0

 1632 18:56:52.526260      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1633 18:56:52.529495     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1634 18:56:52.539714     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1635 18:56:52.549441     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1636 18:56:52.552788      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1637 18:56:52.552871       GENERIC: 0.0

 1638 18:56:52.556371       GENERIC: 1.0

 1639 18:56:52.559263     PCI: 00:1f.3

 1640 18:56:52.569153     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1641 18:56:52.579605     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1642 18:56:52.579688     PCI: 00:1f.5

 1643 18:56:52.589211     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1644 18:56:52.596002  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1645 18:56:52.602543   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1646 18:56:52.609269   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1647 18:56:52.615610   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1648 18:56:52.618889    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1649 18:56:52.622637    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1650 18:56:52.628892   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1651 18:56:52.635395   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1652 18:56:52.645608   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1653 18:56:52.652231  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1654 18:56:52.658862  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1655 18:56:52.665469   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1656 18:56:52.671952   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1657 18:56:52.682344   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1658 18:56:52.685588   DOMAIN: 0000: Resource ranges:

 1659 18:56:52.688544   * Base: 1000, Size: 800, Tag: 100

 1660 18:56:52.692305   * Base: 1900, Size: e700, Tag: 100

 1661 18:56:52.695726    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1662 18:56:52.702097  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1663 18:56:52.708717  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1664 18:56:52.718698   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1665 18:56:52.725295   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1666 18:56:52.731947   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1667 18:56:52.741640   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1668 18:56:52.748643   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1669 18:56:52.755083   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1670 18:56:52.765216   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1671 18:56:52.772168   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1672 18:56:52.778517   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1673 18:56:52.788218   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1674 18:56:52.794910   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1675 18:56:52.801653   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1676 18:56:52.811433   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1677 18:56:52.817952   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1678 18:56:52.824582   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1679 18:56:52.834594   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1680 18:56:52.841412   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1681 18:56:52.848001   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1682 18:56:52.858129   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1683 18:56:52.864536   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1684 18:56:52.871550   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1685 18:56:52.878035   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1686 18:56:52.888049   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1687 18:56:52.894811   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1688 18:56:52.904480   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1689 18:56:52.911292   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1690 18:56:52.917699   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1691 18:56:52.924187   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1692 18:56:52.934461   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1693 18:56:52.940805   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1694 18:56:52.944133   DOMAIN: 0000: Resource ranges:

 1695 18:56:52.947353   * Base: 80400000, Size: 3fc00000, Tag: 200

 1696 18:56:52.954223   * Base: d0000000, Size: 28000000, Tag: 200

 1697 18:56:52.957645   * Base: fa000000, Size: 1000000, Tag: 200

 1698 18:56:52.960859   * Base: fb001000, Size: 17ff000, Tag: 200

 1699 18:56:52.967309   * Base: fe800000, Size: 300000, Tag: 200

 1700 18:56:52.970636   * Base: feb80000, Size: 80000, Tag: 200

 1701 18:56:52.974282   * Base: fed00000, Size: 40000, Tag: 200

 1702 18:56:52.977642   * Base: fed70000, Size: 10000, Tag: 200

 1703 18:56:52.983844   * Base: fed88000, Size: 8000, Tag: 200

 1704 18:56:52.987600   * Base: fed93000, Size: d000, Tag: 200

 1705 18:56:52.990788   * Base: feda2000, Size: 1e000, Tag: 200

 1706 18:56:52.994146   * Base: fede0000, Size: 1220000, Tag: 200

 1707 18:56:53.000950   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1708 18:56:53.007437    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1709 18:56:53.014111    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1710 18:56:53.020510    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1711 18:56:53.026989    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1712 18:56:53.034033    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1713 18:56:53.040619    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1714 18:56:53.047152    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1715 18:56:53.053941    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1716 18:56:53.060240    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1717 18:56:53.067310    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1718 18:56:53.073346    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1719 18:56:53.080266    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1720 18:56:53.086992    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1721 18:56:53.093721    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1722 18:56:53.100339    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1723 18:56:53.106530    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1724 18:56:53.113576    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1725 18:56:53.120226    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1726 18:56:53.126855    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1727 18:56:53.133336  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1728 18:56:53.140194  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1729 18:56:53.143278   PCI: 00:06.0: Resource ranges:

 1730 18:56:53.150632   * Base: 80400000, Size: 100000, Tag: 200

 1731 18:56:53.156479    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1732 18:56:53.163366    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1733 18:56:53.169835  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1734 18:56:53.176390  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1735 18:56:53.182883  Root Device assign_resources, bus 0 link: 0

 1736 18:56:53.186235  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1737 18:56:53.192951  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1738 18:56:53.203104  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1739 18:56:53.210108  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1740 18:56:53.219473  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1741 18:56:53.223103  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1742 18:56:53.229279  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1743 18:56:53.236129  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1744 18:56:53.246253  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1745 18:56:53.256022  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1746 18:56:53.259629  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1747 18:56:53.269141  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1748 18:56:53.275707  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1749 18:56:53.279314  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1750 18:56:53.289085  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1751 18:56:53.296077  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1752 18:56:53.302348  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1753 18:56:53.305821  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1754 18:56:53.315676  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1755 18:56:53.318926  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1756 18:56:53.322162  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1757 18:56:53.332247  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1758 18:56:53.339259  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1759 18:56:53.349247  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1760 18:56:53.352328  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1761 18:56:53.355696  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1762 18:56:53.365584  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1763 18:56:53.368891  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1764 18:56:53.375759  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1765 18:56:53.382261  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1766 18:56:53.389068  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1767 18:56:53.392287  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1768 18:56:53.398693  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1769 18:56:53.405547  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1770 18:56:53.408886  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1771 18:56:53.418825  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1772 18:56:53.425419  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1773 18:56:53.428820  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1774 18:56:53.435051  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1775 18:56:53.441811  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1776 18:56:53.448975  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1777 18:56:53.451782  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1778 18:56:53.458512  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1779 18:56:53.461901  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1780 18:56:53.465410  LPC: Trying to open IO window from 800 size 1ff

 1781 18:56:53.475266  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1782 18:56:53.482087  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1783 18:56:53.491852  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1784 18:56:53.495055  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1785 18:56:53.501812  Root Device assign_resources, bus 0 link: 0 done

 1786 18:56:53.501893  Done setting resources.

 1787 18:56:53.508291  Show resources in subtree (Root Device)...After assigning values.

 1788 18:56:53.514746   Root Device child on link 0 CPU_CLUSTER: 0

 1789 18:56:53.518004    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1790 18:56:53.518084     APIC: 00

 1791 18:56:53.521499     APIC: 12

 1792 18:56:53.521579     APIC: 14

 1793 18:56:53.524657     APIC: 16

 1794 18:56:53.524737     APIC: 10

 1795 18:56:53.524801     APIC: 09

 1796 18:56:53.528398     APIC: 01

 1797 18:56:53.528516     APIC: 08

 1798 18:56:53.531699    DOMAIN: 0000 child on link 0 GPIO: 0

 1799 18:56:53.541480    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1800 18:56:53.551202    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1801 18:56:53.551286     GPIO: 0

 1802 18:56:53.554800     PCI: 00:00.0

 1803 18:56:53.564764     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1804 18:56:53.574399     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1805 18:56:53.581114     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1806 18:56:53.590861     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1807 18:56:53.600721     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1808 18:56:53.611037     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1809 18:56:53.620794     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1810 18:56:53.630573     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1811 18:56:53.640729     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1812 18:56:53.647543     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1813 18:56:53.657199     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1814 18:56:53.667239     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1815 18:56:53.677083     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1816 18:56:53.687064     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1817 18:56:53.696646     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1818 18:56:53.703461     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1819 18:56:53.713258     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1820 18:56:53.723258     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1821 18:56:53.733357     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1822 18:56:53.743078     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1823 18:56:53.753184     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1824 18:56:53.763080     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1825 18:56:53.772968     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1826 18:56:53.783235     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1827 18:56:53.792888     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1828 18:56:53.799705     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1829 18:56:53.809375     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1830 18:56:53.819297     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1831 18:56:53.822632     PCI: 00:02.0

 1832 18:56:53.832578     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1833 18:56:53.842429     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1834 18:56:53.852667     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1835 18:56:53.855579     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1836 18:56:53.865578     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1837 18:56:53.869032      GENERIC: 0.0

 1838 18:56:53.872357     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1839 18:56:53.881973     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1840 18:56:53.895594     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1841 18:56:53.905674     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1842 18:56:53.905756      PCI: 01:00.0

 1843 18:56:53.915076      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1844 18:56:53.928584      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1845 18:56:53.928669     PCI: 00:08.0

 1846 18:56:53.931913     PCI: 00:0a.0

 1847 18:56:53.941820     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1848 18:56:53.944834     PCI: 00:0d.0 child on link 0 USB0 port 0

 1849 18:56:53.954765     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1850 18:56:53.958499      USB0 port 0 child on link 0 USB3 port 0

 1851 18:56:53.961596       USB3 port 0

 1852 18:56:53.965015       USB3 port 1

 1853 18:56:53.965095       USB3 port 2

 1854 18:56:53.968018       USB3 port 3

 1855 18:56:53.971436     PCI: 00:14.0 child on link 0 USB0 port 0

 1856 18:56:53.981206     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1857 18:56:53.984574      USB0 port 0 child on link 0 USB2 port 0

 1858 18:56:53.987986       USB2 port 0

 1859 18:56:53.991185       USB2 port 1

 1860 18:56:53.991268       USB2 port 2

 1861 18:56:53.994647       USB2 port 3

 1862 18:56:53.994729       USB2 port 4

 1863 18:56:53.997878       USB2 port 5

 1864 18:56:53.997960       USB2 port 6

 1865 18:56:54.000946       USB2 port 7

 1866 18:56:54.001029       USB2 port 8

 1867 18:56:54.004633       USB2 port 9

 1868 18:56:54.004716       USB3 port 0

 1869 18:56:54.007630       USB3 port 1

 1870 18:56:54.007712       USB3 port 2

 1871 18:56:54.011087       USB3 port 3

 1872 18:56:54.011169     PCI: 00:14.2

 1873 18:56:54.024424     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1874 18:56:54.034169     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1875 18:56:54.037692     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1876 18:56:54.047471     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1877 18:56:54.050815      GENERIC: 0.0

 1878 18:56:54.054340     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1879 18:56:54.064542     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1880 18:56:54.067102      I2C: 00:1a

 1881 18:56:54.067189      I2C: 00:31

 1882 18:56:54.070524      I2C: 00:32

 1883 18:56:54.073984     PCI: 00:15.1 child on link 0 I2C: 00:50

 1884 18:56:54.084006     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1885 18:56:54.084092      I2C: 00:50

 1886 18:56:54.086950     PCI: 00:15.2

 1887 18:56:54.090334     PCI: 00:15.3 child on link 0 I2C: 00:10

 1888 18:56:54.100584     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1889 18:56:54.103930      I2C: 00:10

 1890 18:56:54.104012     PCI: 00:16.0

 1891 18:56:54.113609     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1892 18:56:54.116920     PCI: 00:19.0

 1893 18:56:54.120261     PCI: 00:19.1 child on link 0 I2C: 00:15

 1894 18:56:54.130314     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1895 18:56:54.133632      I2C: 00:15

 1896 18:56:54.133714      I2C: 00:2c

 1897 18:56:54.136651     PCI: 00:1e.0

 1898 18:56:54.146638     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1899 18:56:54.150306     PCI: 00:1e.3 child on link 0 SPI: 00

 1900 18:56:54.163250     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1901 18:56:54.163339      SPI: 00

 1902 18:56:54.166704     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1903 18:56:54.176593     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1904 18:56:54.176676      PNP: 0c09.0

 1905 18:56:54.186821      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1906 18:56:54.189802     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1907 18:56:54.199734     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1908 18:56:54.209734     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1909 18:56:54.213077      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1910 18:56:54.216442       GENERIC: 0.0

 1911 18:56:54.219476       GENERIC: 1.0

 1912 18:56:54.219558     PCI: 00:1f.3

 1913 18:56:54.229731     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1914 18:56:54.239679     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1915 18:56:54.242873     PCI: 00:1f.5

 1916 18:56:54.252676     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1917 18:56:54.256202  Done allocating resources.

 1918 18:56:54.262819  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms

 1919 18:56:54.265859  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1920 18:56:54.272348  Configure audio over I2S with MAX98373 NAU88L25B.

 1921 18:56:54.276226  Enabling BT offload

 1922 18:56:54.283669  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1923 18:56:54.287065  Enabling resources...

 1924 18:56:54.290325  PCI: 00:00.0 subsystem <- 8086/4609

 1925 18:56:54.293659  PCI: 00:00.0 cmd <- 06

 1926 18:56:54.296985  PCI: 00:02.0 subsystem <- 8086/46b3

 1927 18:56:54.300196  PCI: 00:02.0 cmd <- 03

 1928 18:56:54.303492  PCI: 00:04.0 subsystem <- 8086/461d

 1929 18:56:54.303575  PCI: 00:04.0 cmd <- 02

 1930 18:56:54.307126  PCI: 00:06.0 bridge ctrl <- 0013

 1931 18:56:54.310135  PCI: 00:06.0 subsystem <- 8086/464d

 1932 18:56:54.313593  PCI: 00:06.0 cmd <- 106

 1933 18:56:54.317053  PCI: 00:0a.0 subsystem <- 8086/467d

 1934 18:56:54.320391  PCI: 00:0a.0 cmd <- 02

 1935 18:56:54.323635  PCI: 00:0d.0 subsystem <- 8086/461e

 1936 18:56:54.326863  PCI: 00:0d.0 cmd <- 02

 1937 18:56:54.329986  PCI: 00:14.0 subsystem <- 8086/51ed

 1938 18:56:54.333378  PCI: 00:14.0 cmd <- 02

 1939 18:56:54.336598  PCI: 00:14.2 subsystem <- 8086/51ef

 1940 18:56:54.336680  PCI: 00:14.2 cmd <- 02

 1941 18:56:54.343407  PCI: 00:14.3 subsystem <- 8086/51f0

 1942 18:56:54.343496  PCI: 00:14.3 cmd <- 02

 1943 18:56:54.346676  PCI: 00:15.0 subsystem <- 8086/51e8

 1944 18:56:54.349958  PCI: 00:15.0 cmd <- 02

 1945 18:56:54.353606  PCI: 00:15.1 subsystem <- 8086/51e9

 1946 18:56:54.356362  PCI: 00:15.1 cmd <- 06

 1947 18:56:54.359943  PCI: 00:15.3 subsystem <- 8086/51eb

 1948 18:56:54.363110  PCI: 00:15.3 cmd <- 02

 1949 18:56:54.366418  PCI: 00:16.0 subsystem <- 8086/51e0

 1950 18:56:54.366500  PCI: 00:16.0 cmd <- 02

 1951 18:56:54.373026  PCI: 00:19.1 subsystem <- 8086/51c6

 1952 18:56:54.373108  PCI: 00:19.1 cmd <- 02

 1953 18:56:54.376362  PCI: 00:1e.0 subsystem <- 8086/51a8

 1954 18:56:54.379780  PCI: 00:1e.0 cmd <- 06

 1955 18:56:54.383071  PCI: 00:1e.3 subsystem <- 8086/51ab

 1956 18:56:54.386407  PCI: 00:1e.3 cmd <- 02

 1957 18:56:54.389897  PCI: 00:1f.0 subsystem <- 8086/5182

 1958 18:56:54.393268  PCI: 00:1f.0 cmd <- 407

 1959 18:56:54.396614  PCI: 00:1f.3 subsystem <- 8086/51c8

 1960 18:56:54.396696  PCI: 00:1f.3 cmd <- 02

 1961 18:56:54.403376  PCI: 00:1f.5 subsystem <- 8086/51a4

 1962 18:56:54.403458  PCI: 00:1f.5 cmd <- 406

 1963 18:56:54.406598  PCI: 01:00.0 cmd <- 02

 1964 18:56:54.406695  done.

 1965 18:56:54.413268  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1966 18:56:54.416357  ME: Version: Unavailable

 1967 18:56:54.419582  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1968 18:56:54.423184  Initializing devices...

 1969 18:56:54.426279  Root Device init

 1970 18:56:54.426361  mainboard: EC init

 1971 18:56:54.433024  Chrome EC: Set SMI mask to 0x0000000000000000

 1972 18:56:54.436207  Chrome EC: UHEPI supported

 1973 18:56:54.442950  Chrome EC: clear events_b mask to 0x0000000000000000

 1974 18:56:54.445974  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1975 18:56:54.452990  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1976 18:56:54.459559  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1977 18:56:54.462730  Chrome EC: Set WAKE mask to 0x0000000000000000

 1978 18:56:54.469907  Root Device init finished in 39 msecs

 1979 18:56:54.469984  PCI: 00:00.0 init

 1980 18:56:54.472840  CPU TDP = 15 Watts

 1981 18:56:54.476237  CPU PL1 = 15 Watts

 1982 18:56:54.476341  CPU PL2 = 55 Watts

 1983 18:56:54.479671  CPU PL4 = 123 Watts

 1984 18:56:54.483015  PCI: 00:00.0 init finished in 8 msecs

 1985 18:56:54.486720  PCI: 00:02.0 init

 1986 18:56:54.486795  GMA: Found VBT in CBFS

 1987 18:56:54.489946  GMA: Found valid VBT in CBFS

 1988 18:56:54.496244  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1989 18:56:54.502987                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1990 18:56:54.506101  PCI: 00:02.0 init finished in 18 msecs

 1991 18:56:54.509529  PCI: 00:06.0 init

 1992 18:56:54.512771  Initializing PCH PCIe bridge.

 1993 18:56:54.516212  PCI: 00:06.0 init finished in 3 msecs

 1994 18:56:54.519508  PCI: 00:0a.0 init

 1995 18:56:54.522839  PCI: 00:0a.0 init finished in 0 msecs

 1996 18:56:54.522910  PCI: 00:14.0 init

 1997 18:56:54.526163  PCI: 00:14.0 init finished in 0 msecs

 1998 18:56:54.529795  PCI: 00:14.2 init

 1999 18:56:54.532784  PCI: 00:14.2 init finished in 0 msecs

 2000 18:56:54.536299  PCI: 00:15.0 init

 2001 18:56:54.539674  I2C bus 0 version 0x3230302a

 2002 18:56:54.543116  DW I2C bus 0 at 0x80655000 (400 KHz)

 2003 18:56:54.546424  PCI: 00:15.0 init finished in 6 msecs

 2004 18:56:54.546507  PCI: 00:15.1 init

 2005 18:56:54.549876  I2C bus 1 version 0x3230302a

 2006 18:56:54.553122  DW I2C bus 1 at 0x80656000 (400 KHz)

 2007 18:56:54.556045  PCI: 00:15.1 init finished in 6 msecs

 2008 18:56:54.559644  PCI: 00:15.3 init

 2009 18:56:54.562780  I2C bus 3 version 0x3230302a

 2010 18:56:54.566422  DW I2C bus 3 at 0x80657000 (400 KHz)

 2011 18:56:54.569389  PCI: 00:15.3 init finished in 6 msecs

 2012 18:56:54.572875  PCI: 00:16.0 init

 2013 18:56:54.576409  PCI: 00:16.0 init finished in 0 msecs

 2014 18:56:54.576500  PCI: 00:19.1 init

 2015 18:56:54.579515  I2C bus 5 version 0x3230302a

 2016 18:56:54.583220  DW I2C bus 5 at 0x80659000 (400 KHz)

 2017 18:56:54.589472  PCI: 00:19.1 init finished in 6 msecs

 2018 18:56:54.589555  PCI: 00:1f.0 init

 2019 18:56:54.592759  IOAPIC: Initializing IOAPIC at 0xfec00000

 2020 18:56:54.596256  IOAPIC: ID = 0x02

 2021 18:56:54.599453  IOAPIC: Dumping registers

 2022 18:56:54.602834    reg 0x0000: 0x02000000

 2023 18:56:54.602919    reg 0x0001: 0x00770020

 2024 18:56:54.606097    reg 0x0002: 0x00000000

 2025 18:56:54.609528  IOAPIC: 120 interrupts

 2026 18:56:54.612743  IOAPIC: Clearing IOAPIC at 0xfec00000

 2027 18:56:54.616422  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 2028 18:56:54.622800  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 2029 18:56:54.626134  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 2030 18:56:54.632772  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 2031 18:56:54.636277  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 2032 18:56:54.642492  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 2033 18:56:54.645801  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 2034 18:56:54.652429  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 2035 18:56:54.655798  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 2036 18:56:54.659061  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 2037 18:56:54.666062  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 2038 18:56:54.669371  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 2039 18:56:54.675755  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 2040 18:56:54.679199  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 2041 18:56:54.685881  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2042 18:56:54.689132  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2043 18:56:54.695826  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2044 18:56:54.699305  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2045 18:56:54.702830  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2046 18:56:54.709098  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2047 18:56:54.712341  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2048 18:56:54.718754  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2049 18:56:54.722117  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2050 18:56:54.728799  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2051 18:56:54.732197  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2052 18:56:54.738704  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2053 18:56:54.741884  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2054 18:56:54.745210  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2055 18:56:54.752001  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2056 18:56:54.755498  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2057 18:56:54.761908  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2058 18:56:54.765386  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2059 18:56:54.772097  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2060 18:56:54.775354  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2061 18:56:54.782323  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2062 18:56:54.784987  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2063 18:56:54.788256  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2064 18:56:54.795066  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2065 18:56:54.798373  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2066 18:56:54.805111  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2067 18:56:54.808205  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2068 18:56:54.815222  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2069 18:56:54.818513  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2070 18:56:54.825026  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2071 18:56:54.828015  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2072 18:56:54.834871  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2073 18:56:54.838148  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2074 18:56:54.841377  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2075 18:56:54.848352  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2076 18:56:54.851600  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2077 18:56:54.857821  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2078 18:56:54.861140  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2079 18:56:54.868064  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2080 18:56:54.871024  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2081 18:56:54.877618  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2082 18:56:54.880896  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2083 18:56:54.884407  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2084 18:56:54.890972  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2085 18:56:54.894308  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2086 18:56:54.900972  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2087 18:56:54.904413  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2088 18:56:54.910670  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2089 18:56:54.914076  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2090 18:56:54.920595  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2091 18:56:54.924209  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2092 18:56:54.927377  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2093 18:56:54.934225  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2094 18:56:54.937216  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2095 18:56:54.943771  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2096 18:56:54.947108  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2097 18:56:54.953879  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2098 18:56:54.957177  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2099 18:56:54.963806  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2100 18:56:54.967274  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2101 18:56:54.970488  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2102 18:56:54.977117  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2103 18:56:54.980304  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2104 18:56:54.987179  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2105 18:56:54.990226  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2106 18:56:54.996935  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2107 18:56:55.000392  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2108 18:56:55.007045  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2109 18:56:55.010292  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2110 18:56:55.013507  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2111 18:56:55.020366  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2112 18:56:55.023522  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2113 18:56:55.030053  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2114 18:56:55.033482  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2115 18:56:55.039962  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2116 18:56:55.043660  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2117 18:56:55.050185  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2118 18:56:55.053667  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2119 18:56:55.056966  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2120 18:56:55.063633  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2121 18:56:55.066971  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2122 18:56:55.073295  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2123 18:56:55.076577  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2124 18:56:55.083461  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2125 18:56:55.086775  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2126 18:56:55.093446  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2127 18:56:55.096947  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2128 18:56:55.099940  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2129 18:56:55.106769  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2130 18:56:55.110237  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2131 18:56:55.116763  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2132 18:56:55.120073  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2133 18:56:55.126459  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2134 18:56:55.129838  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2135 18:56:55.136652  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2136 18:56:55.139972  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2137 18:56:55.143097  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2138 18:56:55.149964  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2139 18:56:55.153099  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2140 18:56:55.159750  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2141 18:56:55.163239  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2142 18:56:55.169804  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2143 18:56:55.173104  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2144 18:56:55.179864  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2145 18:56:55.183037  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2146 18:56:55.186415  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2147 18:56:55.193112  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2148 18:56:55.196019  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2149 18:56:55.202896  PCI: 00:1f.0 init finished in 607 msecs

 2150 18:56:55.202973  PCI: 00:1f.2 init

 2151 18:56:55.206045  apm_control: Disabling ACPI.

 2152 18:56:55.209751  APMC done.

 2153 18:56:55.212998  PCI: 00:1f.2 init finished in 6 msecs

 2154 18:56:55.216628  PCI: 00:1f.3 init

 2155 18:56:55.219697  PCI: 00:1f.3 init finished in 0 msecs

 2156 18:56:55.219768  PCI: 01:00.0 init

 2157 18:56:55.223236  PCI: 01:00.0 init finished in 0 msecs

 2158 18:56:55.226605  PNP: 0c09.0 init

 2159 18:56:55.229588  Google Chrome EC uptime: 12.127 seconds

 2160 18:56:55.236843  Google Chrome AP resets since EC boot: 1

 2161 18:56:55.239620  Google Chrome most recent AP reset causes:

 2162 18:56:55.243073  	0.342: 32775 shutdown: entering G3

 2163 18:56:55.249781  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2164 18:56:55.253091  PNP: 0c09.0 init finished in 23 msecs

 2165 18:56:55.256451  GENERIC: 0.0 init

 2166 18:56:55.259623  GENERIC: 0.0 init finished in 0 msecs

 2167 18:56:55.259696  GENERIC: 1.0 init

 2168 18:56:55.266272  GENERIC: 1.0 init finished in 0 msecs

 2169 18:56:55.266385  Devices initialized

 2170 18:56:55.269749  Show all devs... After init.

 2171 18:56:55.273051  Root Device: enabled 1

 2172 18:56:55.276438  CPU_CLUSTER: 0: enabled 1

 2173 18:56:55.276525  DOMAIN: 0000: enabled 1

 2174 18:56:55.279856  GPIO: 0: enabled 1

 2175 18:56:55.282733  PCI: 00:00.0: enabled 1

 2176 18:56:55.282803  PCI: 00:01.0: enabled 0

 2177 18:56:55.286044  PCI: 00:01.1: enabled 0

 2178 18:56:55.289795  PCI: 00:02.0: enabled 1

 2179 18:56:55.293240  PCI: 00:04.0: enabled 1

 2180 18:56:55.293312  PCI: 00:05.0: enabled 0

 2181 18:56:55.296406  PCI: 00:06.0: enabled 1

 2182 18:56:55.299782  PCI: 00:06.2: enabled 0

 2183 18:56:55.299852  PCI: 00:07.0: enabled 0

 2184 18:56:55.303128  PCI: 00:07.1: enabled 0

 2185 18:56:55.306390  PCI: 00:07.2: enabled 0

 2186 18:56:55.309461  PCI: 00:07.3: enabled 0

 2187 18:56:55.309570  PCI: 00:08.0: enabled 0

 2188 18:56:55.312940  PCI: 00:09.0: enabled 0

 2189 18:56:55.316164  PCI: 00:0a.0: enabled 1

 2190 18:56:55.319754  PCI: 00:0d.0: enabled 1

 2191 18:56:55.319859  PCI: 00:0d.1: enabled 0

 2192 18:56:55.322671  PCI: 00:0d.2: enabled 0

 2193 18:56:55.326261  PCI: 00:0d.3: enabled 0

 2194 18:56:55.329563  PCI: 00:0e.0: enabled 0

 2195 18:56:55.329644  PCI: 00:10.0: enabled 0

 2196 18:56:55.332819  PCI: 00:10.1: enabled 0

 2197 18:56:55.336345  PCI: 00:10.6: enabled 0

 2198 18:56:55.336448  PCI: 00:10.7: enabled 0

 2199 18:56:55.339230  PCI: 00:12.0: enabled 0

 2200 18:56:55.342622  PCI: 00:12.6: enabled 0

 2201 18:56:55.346124  PCI: 00:12.7: enabled 0

 2202 18:56:55.346203  PCI: 00:13.0: enabled 0

 2203 18:56:55.349306  PCI: 00:14.0: enabled 1

 2204 18:56:55.352575  PCI: 00:14.1: enabled 0

 2205 18:56:55.356279  PCI: 00:14.2: enabled 1

 2206 18:56:55.356386  PCI: 00:14.3: enabled 1

 2207 18:56:55.359207  PCI: 00:15.0: enabled 1

 2208 18:56:55.362583  PCI: 00:15.1: enabled 1

 2209 18:56:55.366315  PCI: 00:15.2: enabled 0

 2210 18:56:55.366399  PCI: 00:15.3: enabled 1

 2211 18:56:55.369515  PCI: 00:16.0: enabled 1

 2212 18:56:55.372893  PCI: 00:16.1: enabled 0

 2213 18:56:55.376119  PCI: 00:16.2: enabled 0

 2214 18:56:55.376218  PCI: 00:16.3: enabled 0

 2215 18:56:55.379195  PCI: 00:16.4: enabled 0

 2216 18:56:55.382804  PCI: 00:16.5: enabled 0

 2217 18:56:55.382914  PCI: 00:17.0: enabled 0

 2218 18:56:55.386204  PCI: 00:19.0: enabled 0

 2219 18:56:55.389574  PCI: 00:19.1: enabled 1

 2220 18:56:55.392856  PCI: 00:19.2: enabled 0

 2221 18:56:55.392935  PCI: 00:1a.0: enabled 0

 2222 18:56:55.395755  PCI: 00:1c.0: enabled 0

 2223 18:56:55.399195  PCI: 00:1c.1: enabled 0

 2224 18:56:55.402579  PCI: 00:1c.2: enabled 0

 2225 18:56:55.402653  PCI: 00:1c.3: enabled 0

 2226 18:56:55.405785  PCI: 00:1c.4: enabled 0

 2227 18:56:55.409158  PCI: 00:1c.5: enabled 0

 2228 18:56:55.412622  PCI: 00:1c.6: enabled 0

 2229 18:56:55.412717  PCI: 00:1c.7: enabled 0

 2230 18:56:55.415977  PCI: 00:1d.0: enabled 0

 2231 18:56:55.419149  PCI: 00:1d.1: enabled 0

 2232 18:56:55.422356  PCI: 00:1d.2: enabled 0

 2233 18:56:55.422462  PCI: 00:1d.3: enabled 0

 2234 18:56:55.426073  PCI: 00:1e.0: enabled 1

 2235 18:56:55.429173  PCI: 00:1e.1: enabled 0

 2236 18:56:55.429255  PCI: 00:1e.2: enabled 0

 2237 18:56:55.432357  PCI: 00:1e.3: enabled 1

 2238 18:56:55.436046  PCI: 00:1f.0: enabled 1

 2239 18:56:55.438825  PCI: 00:1f.1: enabled 0

 2240 18:56:55.438925  PCI: 00:1f.2: enabled 1

 2241 18:56:55.442291  PCI: 00:1f.3: enabled 1

 2242 18:56:55.445713  PCI: 00:1f.4: enabled 0

 2243 18:56:55.449002  PCI: 00:1f.5: enabled 1

 2244 18:56:55.449084  PCI: 00:1f.6: enabled 0

 2245 18:56:55.452360  PCI: 00:1f.7: enabled 0

 2246 18:56:55.455630  GENERIC: 0.0: enabled 1

 2247 18:56:55.458986  GENERIC: 0.0: enabled 1

 2248 18:56:55.459072  GENERIC: 1.0: enabled 1

 2249 18:56:55.462363  GENERIC: 0.0: enabled 1

 2250 18:56:55.465820  GENERIC: 1.0: enabled 1

 2251 18:56:55.465902  USB0 port 0: enabled 1

 2252 18:56:55.468985  USB0 port 0: enabled 1

 2253 18:56:55.472297  GENERIC: 0.0: enabled 1

 2254 18:56:55.475458  I2C: 00:1a: enabled 1

 2255 18:56:55.475535  I2C: 00:31: enabled 1

 2256 18:56:55.478911  I2C: 00:32: enabled 1

 2257 18:56:55.482181  I2C: 00:50: enabled 1

 2258 18:56:55.482252  I2C: 00:10: enabled 1

 2259 18:56:55.485508  I2C: 00:15: enabled 1

 2260 18:56:55.489151  I2C: 00:2c: enabled 1

 2261 18:56:55.489232  GENERIC: 0.0: enabled 1

 2262 18:56:55.492370  SPI: 00: enabled 1

 2263 18:56:55.495816  PNP: 0c09.0: enabled 1

 2264 18:56:55.495896  GENERIC: 0.0: enabled 1

 2265 18:56:55.499045  USB3 port 0: enabled 1

 2266 18:56:55.502433  USB3 port 1: enabled 0

 2267 18:56:55.505792  USB3 port 2: enabled 1

 2268 18:56:55.505871  USB3 port 3: enabled 0

 2269 18:56:55.509143  USB2 port 0: enabled 1

 2270 18:56:55.512525  USB2 port 1: enabled 0

 2271 18:56:55.512606  USB2 port 2: enabled 1

 2272 18:56:55.515304  USB2 port 3: enabled 0

 2273 18:56:55.518652  USB2 port 4: enabled 0

 2274 18:56:55.518733  USB2 port 5: enabled 1

 2275 18:56:55.522399  USB2 port 6: enabled 0

 2276 18:56:55.526045  USB2 port 7: enabled 0

 2277 18:56:55.528657  USB2 port 8: enabled 1

 2278 18:56:55.528737  USB2 port 9: enabled 1

 2279 18:56:55.532433  USB3 port 0: enabled 1

 2280 18:56:55.535702  USB3 port 1: enabled 0

 2281 18:56:55.535782  USB3 port 2: enabled 0

 2282 18:56:55.539013  USB3 port 3: enabled 0

 2283 18:56:55.542304  GENERIC: 0.0: enabled 1

 2284 18:56:55.545524  GENERIC: 1.0: enabled 1

 2285 18:56:55.545615  APIC: 00: enabled 1

 2286 18:56:55.549113  APIC: 12: enabled 1

 2287 18:56:55.549198  APIC: 14: enabled 1

 2288 18:56:55.552213  APIC: 16: enabled 1

 2289 18:56:55.555815  APIC: 10: enabled 1

 2290 18:56:55.555895  APIC: 09: enabled 1

 2291 18:56:55.558687  APIC: 01: enabled 1

 2292 18:56:55.558768  APIC: 08: enabled 1

 2293 18:56:55.562070  PCI: 01:00.0: enabled 1

 2294 18:56:55.568566  BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms

 2295 18:56:55.571956  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2296 18:56:55.575683  ELOG: NV offset 0xf20000 size 0x4000

 2297 18:56:55.583648  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2298 18:56:55.590481  ELOG: Event(17) added with size 13 at 2023-11-22 18:56:55 UTC

 2299 18:56:55.597095  ELOG: Event(9E) added with size 10 at 2023-11-22 18:56:55 UTC

 2300 18:56:55.603958  ELOG: Event(9F) added with size 14 at 2023-11-22 18:56:55 UTC

 2301 18:56:55.610806  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2302 18:56:55.616941  ELOG: Event(A0) added with size 9 at 2023-11-22 18:56:55 UTC

 2303 18:56:55.620310  elog_add_boot_reason: Logged dev mode boot

 2304 18:56:55.626966  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2305 18:56:55.630429  Finalize devices...

 2306 18:56:55.630510  PCI: 00:16.0 final

 2307 18:56:55.633979  PCI: 00:1f.2 final

 2308 18:56:55.634059  GENERIC: 0.0 final

 2309 18:56:55.640014  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2310 18:56:55.643604  GENERIC: 1.0 final

 2311 18:56:55.650142  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2312 18:56:55.650224  Devices finalized

 2313 18:56:55.656997  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2314 18:56:55.660122  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2315 18:56:55.666516  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2316 18:56:55.673211  ME: HFSTS1                      : 0x90000245

 2317 18:56:55.676530  ME: HFSTS2                      : 0x82100116

 2318 18:56:55.680018  ME: HFSTS3                      : 0x00000050

 2319 18:56:55.686533  ME: HFSTS4                      : 0x00004000

 2320 18:56:55.690138  ME: HFSTS5                      : 0x00000000

 2321 18:56:55.693306  ME: HFSTS6                      : 0x40600006

 2322 18:56:55.696617  ME: Manufacturing Mode          : NO

 2323 18:56:55.703157  ME: SPI Protection Mode Enabled : YES

 2324 18:56:55.706363  ME: FPFs Committed              : YES

 2325 18:56:55.710000  ME: Manufacturing Vars Locked   : YES

 2326 18:56:55.713150  ME: FW Partition Table          : OK

 2327 18:56:55.716413  ME: Bringup Loader Failure      : NO

 2328 18:56:55.719568  ME: Firmware Init Complete      : YES

 2329 18:56:55.723161  ME: Boot Options Present        : NO

 2330 18:56:55.729644  ME: Update In Progress          : NO

 2331 18:56:55.733032  ME: D0i3 Support                : YES

 2332 18:56:55.736198  ME: Low Power State Enabled     : NO

 2333 18:56:55.739640  ME: CPU Replaced                : YES

 2334 18:56:55.743117  ME: CPU Replacement Valid       : YES

 2335 18:56:55.746463  ME: Current Working State       : 5

 2336 18:56:55.749773  ME: Current Operation State     : 1

 2337 18:56:55.753126  ME: Current Operation Mode      : 0

 2338 18:56:55.756107  ME: Error Code                  : 0

 2339 18:56:55.763067  ME: Enhanced Debug Mode         : NO

 2340 18:56:55.766613  ME: CPU Debug Disabled          : YES

 2341 18:56:55.769568  ME: TXT Support                 : NO

 2342 18:56:55.773150  ME: WP for RO is enabled        : YES

 2343 18:56:55.779700  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2344 18:56:55.786190  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2345 18:56:55.789408  Ramoops buffer: 0x100000@0x76899000.

 2346 18:56:55.796129  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2347 18:56:55.803094  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2348 18:56:55.805901  CBFS: 'fallback/slic' not found.

 2349 18:56:55.809095  ACPI: Writing ACPI tables at 7686d000.

 2350 18:56:55.809169  ACPI:    * FACS

 2351 18:56:55.812863  ACPI:    * DSDT

 2352 18:56:55.819398  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2353 18:56:55.823060  ACPI:    * FADT

 2354 18:56:55.823138  SCI is IRQ9

 2355 18:56:55.829466  ACPI: added table 1/32, length now 40

 2356 18:56:55.829542  ACPI:     * SSDT

 2357 18:56:55.835896  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2358 18:56:55.839350  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2359 18:56:55.845879  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2360 18:56:55.849217  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2361 18:56:55.855881  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2362 18:56:55.859215  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2363 18:56:55.866067  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2364 18:56:55.872579  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2365 18:56:55.876028  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2366 18:56:55.882564  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2367 18:56:55.885900  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2368 18:56:55.892534  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2369 18:56:55.895791  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2370 18:56:55.902634  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2371 18:56:55.908896  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2372 18:56:55.912441  PS2K: Passing 80 keymaps to kernel

 2373 18:56:55.918865  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2374 18:56:55.925753  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2375 18:56:55.932273  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2376 18:56:55.938879  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2377 18:56:55.942807  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2378 18:56:55.948909  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2379 18:56:55.955556  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2380 18:56:55.962281  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2381 18:56:55.968714  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2382 18:56:55.975625  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2383 18:56:55.978919  ACPI: added table 2/32, length now 44

 2384 18:56:55.979004  ACPI:    * MCFG

 2385 18:56:55.985401  ACPI: added table 3/32, length now 48

 2386 18:56:55.985481  ACPI:    * TPM2

 2387 18:56:55.988374  TPM2 log created at 0x7685d000

 2388 18:56:55.991988  ACPI: added table 4/32, length now 52

 2389 18:56:55.994977  ACPI:     * LPIT

 2390 18:56:55.998378  ACPI: added table 5/32, length now 56

 2391 18:56:55.998463  ACPI:    * MADT

 2392 18:56:56.001944  SCI is IRQ9

 2393 18:56:56.005441  ACPI: added table 6/32, length now 60

 2394 18:56:56.008328  cmd_reg from pmc_make_ipc_cmd 1052838

 2395 18:56:56.014980  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2396 18:56:56.021811  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2397 18:56:56.028433  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2398 18:56:56.031735  PMC CrashLog size in discovery mode: 0xC00

 2399 18:56:56.035128  cpu crashlog bar addr: 0x80640000

 2400 18:56:56.038539  cpu discovery table offset: 0x6030

 2401 18:56:56.041540  cpu_crashlog_discovery_table buffer count: 0x3

 2402 18:56:56.048370  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2403 18:56:56.054706  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2404 18:56:56.061376  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2405 18:56:56.068286  PMC crashLog size in discovery mode : 0xC00

 2406 18:56:56.074596  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2407 18:56:56.077901  discover mode PMC crashlog size adjusted to: 0x200

 2408 18:56:56.084676  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2409 18:56:56.091256  discover mode PMC crashlog size adjusted to: 0x0

 2410 18:56:56.094391  m_cpu_crashLog_size : 0x3480 bytes

 2411 18:56:56.097809  CPU crashLog present.

 2412 18:56:56.101006  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2413 18:56:56.108043  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2414 18:56:56.111008  current = 76876550

 2415 18:56:56.111090  ACPI:    * DMAR

 2416 18:56:56.114750  ACPI: added table 7/32, length now 64

 2417 18:56:56.120894  ACPI: added table 8/32, length now 68

 2418 18:56:56.120978  ACPI:    * HPET

 2419 18:56:56.124389  ACPI: added table 9/32, length now 72

 2420 18:56:56.127645  ACPI: done.

 2421 18:56:56.127727  ACPI tables: 38528 bytes.

 2422 18:56:56.131009  smbios_write_tables: 76857000

 2423 18:56:56.135809  EC returned error result code 3

 2424 18:56:56.139249  Couldn't obtain OEM name from CBI

 2425 18:56:56.142743  Create SMBIOS type 16

 2426 18:56:56.146172  Create SMBIOS type 17

 2427 18:56:56.149472  Create SMBIOS type 20

 2428 18:56:56.149554  GENERIC: 0.0 (WIFI Device)

 2429 18:56:56.152845  SMBIOS tables: 2156 bytes.

 2430 18:56:56.155969  Writing table forward entry at 0x00000500

 2431 18:56:56.162461  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2432 18:56:56.165923  Writing coreboot table at 0x76891000

 2433 18:56:56.172719   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2434 18:56:56.179314   1. 0000000000001000-000000000009ffff: RAM

 2435 18:56:56.182631   2. 00000000000a0000-00000000000fffff: RESERVED

 2436 18:56:56.185691   3. 0000000000100000-0000000076856fff: RAM

 2437 18:56:56.192440   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2438 18:56:56.195875   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2439 18:56:56.202330   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2440 18:56:56.209352   7. 0000000077000000-00000000803fffff: RESERVED

 2441 18:56:56.212492   8. 00000000c0000000-00000000cfffffff: RESERVED

 2442 18:56:56.219008   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2443 18:56:56.222511  10. 00000000fb000000-00000000fb000fff: RESERVED

 2444 18:56:56.225819  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2445 18:56:56.232195  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2446 18:56:56.235676  13. 00000000fec00000-00000000fecfffff: RESERVED

 2447 18:56:56.242287  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2448 18:56:56.245563  15. 00000000fed80000-00000000fed87fff: RESERVED

 2449 18:56:56.252441  16. 00000000fed90000-00000000fed92fff: RESERVED

 2450 18:56:56.255360  17. 00000000feda0000-00000000feda1fff: RESERVED

 2451 18:56:56.261956  18. 00000000fedc0000-00000000feddffff: RESERVED

 2452 18:56:56.265397  19. 0000000100000000-000000027fbfffff: RAM

 2453 18:56:56.268814  Passing 4 GPIOs to payload:

 2454 18:56:56.272260              NAME |       PORT | POLARITY |     VALUE

 2455 18:56:56.278850               lid |  undefined |     high |      high

 2456 18:56:56.282261             power |  undefined |     high |       low

 2457 18:56:56.289011             oprom |  undefined |     high |       low

 2458 18:56:56.295301          EC in RW | 0x00000151 |     high |      high

 2459 18:56:56.295383  Board ID: 3

 2460 18:56:56.298516  FW config: 0x131

 2461 18:56:56.302095  Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum e946

 2462 18:56:56.305289  coreboot table: 1788 bytes.

 2463 18:56:56.308782  IMD ROOT    0. 0x76fff000 0x00001000

 2464 18:56:56.315124  IMD SMALL   1. 0x76ffe000 0x00001000

 2465 18:56:56.318628  FSP MEMORY  2. 0x76afe000 0x00500000

 2466 18:56:56.321900  CONSOLE     3. 0x76ade000 0x00020000

 2467 18:56:56.325388  RW MCACHE   4. 0x76add000 0x0000043c

 2468 18:56:56.328822  RO MCACHE   5. 0x76adc000 0x00000fd8

 2469 18:56:56.331821  FMAP        6. 0x76adb000 0x0000064a

 2470 18:56:56.335712  TIME STAMP  7. 0x76ada000 0x00000910

 2471 18:56:56.338866  VBOOT WORK  8. 0x76ac6000 0x00014000

 2472 18:56:56.345467  MEM INFO    9. 0x76ac5000 0x000003b8

 2473 18:56:56.348844  ROMSTG STCK10. 0x76ac4000 0x00001000

 2474 18:56:56.352220  AFTER CAR  11. 0x76ab8000 0x0000c000

 2475 18:56:56.355582  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2476 18:56:56.358839  ACPI BERT  13. 0x76a1e000 0x00010000

 2477 18:56:56.362242  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2478 18:56:56.365191  REFCODE    15. 0x769ae000 0x0006f000

 2479 18:56:56.368782  SMM BACKUP 16. 0x7699e000 0x00010000

 2480 18:56:56.375322  IGD OPREGION17. 0x76999000 0x00004203

 2481 18:56:56.378763  RAMOOPS    18. 0x76899000 0x00100000

 2482 18:56:56.382010  COREBOOT   19. 0x76891000 0x00008000

 2483 18:56:56.385315  ACPI       20. 0x7686d000 0x00024000

 2484 18:56:56.388599  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2485 18:56:56.392084  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2486 18:56:56.395397  CPU CRASHLOG23. 0x76858000 0x00003480

 2487 18:56:56.398978  SMBIOS     24. 0x76857000 0x00001000

 2488 18:56:56.401721  IMD small region:

 2489 18:56:56.405456    IMD ROOT    0. 0x76ffec00 0x00000400

 2490 18:56:56.408732    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2491 18:56:56.415074    VPD         2. 0x76ffeb60 0x0000006c

 2492 18:56:56.418379    POWER STATE 3. 0x76ffeb00 0x00000044

 2493 18:56:56.421940    ROMSTAGE    4. 0x76ffeae0 0x00000004

 2494 18:56:56.425173    ACPI GNVS   5. 0x76ffea80 0x00000048

 2495 18:56:56.428699    TYPE_C INFO 6. 0x76ffea60 0x0000000c

 2496 18:56:56.435298  BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms

 2497 18:56:56.438933  MTRR: Physical address space:

 2498 18:56:56.445210  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2499 18:56:56.451860  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2500 18:56:56.458386  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2501 18:56:56.464782  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2502 18:56:56.468283  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2503 18:56:56.474913  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2504 18:56:56.481723  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2505 18:56:56.484556  MTRR: Fixed MSR 0x250 0x0606060606060606

 2506 18:56:56.491217  MTRR: Fixed MSR 0x258 0x0606060606060606

 2507 18:56:56.494552  MTRR: Fixed MSR 0x259 0x0000000000000000

 2508 18:56:56.497985  MTRR: Fixed MSR 0x268 0x0606060606060606

 2509 18:56:56.501406  MTRR: Fixed MSR 0x269 0x0606060606060606

 2510 18:56:56.508060  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2511 18:56:56.511321  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2512 18:56:56.514750  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2513 18:56:56.517924  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2514 18:56:56.524640  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2515 18:56:56.528092  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2516 18:56:56.531318  call enable_fixed_mtrr()

 2517 18:56:56.534368  CPU physical address size: 39 bits

 2518 18:56:56.537697  MTRR: default type WB/UC MTRR counts: 6/6.

 2519 18:56:56.540954  MTRR: UC selected as default type.

 2520 18:56:56.547892  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2521 18:56:56.554578  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2522 18:56:56.561181  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2523 18:56:56.567518  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2524 18:56:56.574261  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2525 18:56:56.581035  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2526 18:56:56.584105  MTRR: Fixed MSR 0x250 0x0606060606060606

 2527 18:56:56.590851  MTRR: Fixed MSR 0x258 0x0606060606060606

 2528 18:56:56.594299  MTRR: Fixed MSR 0x259 0x0000000000000000

 2529 18:56:56.597642  MTRR: Fixed MSR 0x268 0x0606060606060606

 2530 18:56:56.600992  MTRR: Fixed MSR 0x269 0x0606060606060606

 2531 18:56:56.607262  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2532 18:56:56.610498  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2533 18:56:56.613683  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2534 18:56:56.617152  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2535 18:56:56.623982  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2536 18:56:56.627537  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2537 18:56:56.630258  MTRR: Fixed MSR 0x250 0x0606060606060606

 2538 18:56:56.633645  MTRR: Fixed MSR 0x250 0x0606060606060606

 2539 18:56:56.637106  call enable_fixed_mtrr()

 2540 18:56:56.640146  MTRR: Fixed MSR 0x250 0x0606060606060606

 2541 18:56:56.646965  MTRR: Fixed MSR 0x258 0x0606060606060606

 2542 18:56:56.650143  MTRR: Fixed MSR 0x259 0x0000000000000000

 2543 18:56:56.653768  MTRR: Fixed MSR 0x268 0x0606060606060606

 2544 18:56:56.656835  MTRR: Fixed MSR 0x269 0x0606060606060606

 2545 18:56:56.660434  MTRR: Fixed MSR 0x258 0x0606060606060606

 2546 18:56:56.666834  MTRR: Fixed MSR 0x259 0x0000000000000000

 2547 18:56:56.670152  MTRR: Fixed MSR 0x268 0x0606060606060606

 2548 18:56:56.673361  MTRR: Fixed MSR 0x269 0x0606060606060606

 2549 18:56:56.677009  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2550 18:56:56.683505  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2551 18:56:56.686665  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2552 18:56:56.689851  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2553 18:56:56.693427  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2554 18:56:56.699771  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2555 18:56:56.703657  MTRR: Fixed MSR 0x250 0x0606060606060606

 2556 18:56:56.706530  MTRR: Fixed MSR 0x250 0x0606060606060606

 2557 18:56:56.709852  MTRR: Fixed MSR 0x258 0x0606060606060606

 2558 18:56:56.716537  MTRR: Fixed MSR 0x258 0x0606060606060606

 2559 18:56:56.719823  MTRR: Fixed MSR 0x259 0x0000000000000000

 2560 18:56:56.723129  MTRR: Fixed MSR 0x268 0x0606060606060606

 2561 18:56:56.726395  MTRR: Fixed MSR 0x269 0x0606060606060606

 2562 18:56:56.729872  MTRR: Fixed MSR 0x259 0x0000000000000000

 2563 18:56:56.736399  MTRR: Fixed MSR 0x268 0x0606060606060606

 2564 18:56:56.739824  MTRR: Fixed MSR 0x269 0x0606060606060606

 2565 18:56:56.743286  CPU physical address size: 39 bits

 2566 18:56:56.746632  MTRR: Fixed MSR 0x250 0x0606060606060606

 2567 18:56:56.749866  call enable_fixed_mtrr()

 2568 18:56:56.753408  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2569 18:56:56.756719  CPU physical address size: 39 bits

 2570 18:56:56.763005  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2571 18:56:56.766511  MTRR: Fixed MSR 0x258 0x0606060606060606

 2572 18:56:56.769869  MTRR: Fixed MSR 0x258 0x0606060606060606

 2573 18:56:56.773236  MTRR: Fixed MSR 0x259 0x0000000000000000

 2574 18:56:56.776534  MTRR: Fixed MSR 0x268 0x0606060606060606

 2575 18:56:56.782966  MTRR: Fixed MSR 0x269 0x0606060606060606

 2576 18:56:56.786260  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2577 18:56:56.789804  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2578 18:56:56.792975  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2579 18:56:56.799870  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2580 18:56:56.802883  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2581 18:56:56.806321  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2582 18:56:56.809584  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2583 18:56:56.812923  call enable_fixed_mtrr()

 2584 18:56:56.816263  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2585 18:56:56.819923  CPU physical address size: 39 bits

 2586 18:56:56.826055  MTRR: Fixed MSR 0x259 0x0000000000000000

 2587 18:56:56.829407  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2588 18:56:56.832914  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2589 18:56:56.836136  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2590 18:56:56.842466  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2591 18:56:56.846224  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2592 18:56:56.849061  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2593 18:56:56.852404  call enable_fixed_mtrr()

 2594 18:56:56.855946  MTRR: Fixed MSR 0x268 0x0606060606060606

 2595 18:56:56.858962  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2596 18:56:56.865894  MTRR: Fixed MSR 0x269 0x0606060606060606

 2597 18:56:56.868776  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2598 18:56:56.872156  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2599 18:56:56.875984  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2600 18:56:56.882305  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2601 18:56:56.885763  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2602 18:56:56.888885  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2603 18:56:56.892286  CPU physical address size: 39 bits

 2604 18:56:56.895863  call enable_fixed_mtrr()

 2605 18:56:56.898822  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2606 18:56:56.902099  CPU physical address size: 39 bits

 2607 18:56:56.905857  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2608 18:56:56.912217  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2609 18:56:56.915603  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2610 18:56:56.918990  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2611 18:56:56.922193  call enable_fixed_mtrr()

 2612 18:56:56.925635  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2613 18:56:56.928751  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2614 18:56:56.932101  CPU physical address size: 39 bits

 2615 18:56:56.935395  call enable_fixed_mtrr()

 2616 18:56:56.938350  CPU physical address size: 39 bits

 2617 18:56:56.942724  

 2618 18:56:56.942885  MTRR check

 2619 18:56:56.946026  Fixed MTRRs   : Enabled

 2620 18:56:56.946183  Variable MTRRs: Enabled

 2621 18:56:56.946317  

 2622 18:56:56.952803  BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms

 2623 18:56:56.955768  Checking cr50 for pending updates

 2624 18:56:56.968098  Reading cr50 TPM mode

 2625 18:56:56.983254  BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms

 2626 18:56:56.990160  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2627 18:56:56.996887  Checking segment from ROM address 0xf96cbe6c

 2628 18:56:57.000320  Checking segment from ROM address 0xf96cbe88

 2629 18:56:57.003770  Loading segment from ROM address 0xf96cbe6c

 2630 18:56:57.007061    code (compression=1)

 2631 18:56:57.017291    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2632 18:56:57.023631  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2633 18:56:57.026933  using LZMA

 2634 18:56:57.048341  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2635 18:56:57.054901  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2636 18:56:57.062721  Loading segment from ROM address 0xf96cbe88

 2637 18:56:57.066553    Entry Point 0x30000000

 2638 18:56:57.066639  Loaded segments

 2639 18:56:57.072750  BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms

 2640 18:56:57.079617  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2641 18:56:57.082823  Finalizing chipset.

 2642 18:56:57.082912  apm_control: Finalizing SMM.

 2643 18:56:57.086231  APMC done.

 2644 18:56:57.089592  HECI: CSE device 16.1 is disabled

 2645 18:56:57.092903  HECI: CSE device 16.2 is disabled

 2646 18:56:57.096078  HECI: CSE device 16.3 is disabled

 2647 18:56:57.099698  HECI: CSE device 16.4 is disabled

 2648 18:56:57.103172  HECI: CSE device 16.5 is disabled

 2649 18:56:57.105929  HECI: Sending End-of-Post

 2650 18:56:57.114227  CSE: EOP requested action: continue boot

 2651 18:56:57.117807  CSE EOP successful, continuing boot

 2652 18:56:57.124570  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2653 18:56:57.127591  mp_park_aps done after 0 msecs.

 2654 18:56:57.130789  Jumping to boot code at 0x30000000(0x76891000)

 2655 18:56:57.140838  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2656 18:56:57.145329  

 2657 18:56:57.145412  

 2658 18:56:57.145477  

 2659 18:56:57.148634  Starting depthcharge on Volmar...

 2660 18:56:57.148716  

 2661 18:56:57.149099  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2662 18:56:57.149200  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2663 18:56:57.149283  Setting prompt string to ['brya:']
 2664 18:56:57.149365  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2665 18:56:57.155210  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2666 18:56:57.155295  

 2667 18:56:57.161616  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2668 18:56:57.161702  

 2669 18:56:57.168164  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2670 18:56:57.168251  

 2671 18:56:57.171512  configure_storage: Failed to remap 1C:2

 2672 18:56:57.171596  

 2673 18:56:57.174755  Wipe memory regions:

 2674 18:56:57.174841  

 2675 18:56:57.178060  	[0x00000000001000, 0x000000000a0000)

 2676 18:56:57.178143  

 2677 18:56:57.181327  	[0x00000000100000, 0x00000030000000)

 2678 18:56:57.284095  

 2679 18:56:57.287144  	[0x00000032668e60, 0x00000076857000)

 2680 18:56:57.431258  

 2681 18:56:57.434887  	[0x00000100000000, 0x0000027fc00000)

 2682 18:56:58.245245  

 2683 18:56:58.248508  ec_init: CrosEC protocol v3 supported (256, 256)

 2684 18:56:58.852839  

 2685 18:56:58.852978  R8152: Initializing

 2686 18:56:58.853047  

 2687 18:56:58.855754  Version 9 (ocp_data = 6010)

 2688 18:56:58.855837  

 2689 18:56:58.859645  R8152: Done initializing

 2690 18:56:58.859727  

 2691 18:56:58.862639  Adding net device

 2692 18:56:59.163418  

 2693 18:56:59.166698  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2694 18:56:59.166786  

 2695 18:56:59.166852  

 2696 18:56:59.166913  

 2697 18:56:59.167193  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2699 18:56:59.267523  brya: tftpboot 192.168.201.1 12061631/tftp-deploy-c1pv04w0/kernel/bzImage 12061631/tftp-deploy-c1pv04w0/kernel/cmdline 12061631/tftp-deploy-c1pv04w0/ramdisk/ramdisk.cpio.gz

 2700 18:56:59.267914  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2701 18:56:59.268055  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2702 18:56:59.272329  tftpboot 192.168.201.1 12061631/tftp-deploy-c1pv04w0/kernel/bzImaloy-c1pv04w0/kernel/cmdline 12061631/tftp-deploy-c1pv04w0/ramdisk/ramdisk.cpio.gz

 2703 18:56:59.272420  

 2704 18:56:59.272532  Waiting for link

 2705 18:56:59.474887  

 2706 18:56:59.475021  done.

 2707 18:56:59.475089  

 2708 18:56:59.475151  MAC: 00:e0:4c:68:01:74

 2709 18:56:59.475209  

 2710 18:56:59.478111  Sending DHCP discover... done.

 2711 18:56:59.478193  

 2712 18:56:59.481599  Waiting for reply... done.

 2713 18:56:59.481682  

 2714 18:56:59.485077  Sending DHCP request... done.

 2715 18:56:59.485160  

 2716 18:56:59.487986  Waiting for reply... done.

 2717 18:56:59.491434  

 2718 18:56:59.491516  My ip is 192.168.201.16

 2719 18:56:59.491583  

 2720 18:56:59.494732  The DHCP server ip is 192.168.201.1

 2721 18:56:59.494814  

 2722 18:56:59.501408  TFTP server IP predefined by user: 192.168.201.1

 2723 18:56:59.501492  

 2724 18:56:59.507948  Bootfile predefined by user: 12061631/tftp-deploy-c1pv04w0/kernel/bzImage

 2725 18:56:59.508032  

 2726 18:56:59.511218  Sending tftp read request... done.

 2727 18:56:59.511300  

 2728 18:56:59.514854  Waiting for the transfer... 

 2729 18:56:59.514938  

 2730 18:56:59.769903  00000000 ################################################################

 2731 18:56:59.770067  

 2732 18:57:00.015980  00080000 ################################################################

 2733 18:57:00.016113  

 2734 18:57:00.267642  00100000 ################################################################

 2735 18:57:00.267778  

 2736 18:57:00.513900  00180000 ################################################################

 2737 18:57:00.514035  

 2738 18:57:00.756901  00200000 ################################################################

 2739 18:57:00.757032  

 2740 18:57:01.007305  00280000 ################################################################

 2741 18:57:01.007438  

 2742 18:57:01.261703  00300000 ################################################################

 2743 18:57:01.261835  

 2744 18:57:01.513157  00380000 ################################################################

 2745 18:57:01.513292  

 2746 18:57:01.770152  00400000 ################################################################

 2747 18:57:01.770285  

 2748 18:57:02.024314  00480000 ################################################################

 2749 18:57:02.024455  

 2750 18:57:02.279856  00500000 ################################################################

 2751 18:57:02.279983  

 2752 18:57:02.533627  00580000 ################################################################

 2753 18:57:02.533762  

 2754 18:57:02.781492  00600000 ################################################################

 2755 18:57:02.781626  

 2756 18:57:03.031554  00680000 ################################################################

 2757 18:57:03.031690  

 2758 18:57:03.281191  00700000 ################################################################

 2759 18:57:03.281325  

 2760 18:57:03.536758  00780000 ################################################################

 2761 18:57:03.536925  

 2762 18:57:03.787744  00800000 ################################################################

 2763 18:57:03.787873  

 2764 18:57:04.036878  00880000 ################################################################

 2765 18:57:04.037013  

 2766 18:57:04.301348  00900000 ################################################################

 2767 18:57:04.301483  

 2768 18:57:04.556479  00980000 ################################################################

 2769 18:57:04.556653  

 2770 18:57:04.810238  00a00000 ################################################################

 2771 18:57:04.810373  

 2772 18:57:05.062927  00a80000 ################################################################

 2773 18:57:05.063097  

 2774 18:57:05.308653  00b00000 ################################################################

 2775 18:57:05.308814  

 2776 18:57:05.557045  00b80000 ################################################################

 2777 18:57:05.557216  

 2778 18:57:05.804700  00c00000 ################################################################

 2779 18:57:05.804860  

 2780 18:57:06.049767  00c80000 ################################################################

 2781 18:57:06.049925  

 2782 18:57:06.293276  00d00000 ################################################################

 2783 18:57:06.293406  

 2784 18:57:06.538716  00d80000 ################################################################

 2785 18:57:06.538882  

 2786 18:57:06.783744  00e00000 ################################################################

 2787 18:57:06.783905  

 2788 18:57:07.030323  00e80000 ################################################################

 2789 18:57:07.030482  

 2790 18:57:07.276805  00f00000 ################################################################

 2791 18:57:07.276944  

 2792 18:57:07.524901  00f80000 ################################################################

 2793 18:57:07.525066  

 2794 18:57:07.763035  01000000 ############################################################# done.

 2795 18:57:07.763204  

 2796 18:57:07.766360  The bootfile was 17275488 bytes long.

 2797 18:57:07.766478  

 2798 18:57:07.769224  Sending tftp read request... done.

 2799 18:57:07.769318  

 2800 18:57:07.772449  Waiting for the transfer... 

 2801 18:57:07.772570  

 2802 18:57:08.007227  00000000 ################################################################

 2803 18:57:08.007407  

 2804 18:57:08.248240  00080000 ################################################################

 2805 18:57:08.248378  

 2806 18:57:08.488565  00100000 ################################################################

 2807 18:57:08.488709  

 2808 18:57:08.721972  00180000 ################################################################

 2809 18:57:08.722136  

 2810 18:57:08.961961  00200000 ################################################################

 2811 18:57:08.962116  

 2812 18:57:09.209380  00280000 ################################################################

 2813 18:57:09.209517  

 2814 18:57:09.456585  00300000 ################################################################

 2815 18:57:09.456720  

 2816 18:57:09.715275  00380000 ################################################################

 2817 18:57:09.715412  

 2818 18:57:09.982786  00400000 ################################################################

 2819 18:57:09.982925  

 2820 18:57:10.257908  00480000 ################################################################

 2821 18:57:10.258071  

 2822 18:57:10.527929  00500000 ################################################################

 2823 18:57:10.528073  

 2824 18:57:10.800717  00580000 ################################################################

 2825 18:57:10.800883  

 2826 18:57:11.048901  00600000 ################################################################

 2827 18:57:11.049070  

 2828 18:57:11.306373  00680000 ################################################################

 2829 18:57:11.306537  

 2830 18:57:11.554977  00700000 ################################################################

 2831 18:57:11.555139  

 2832 18:57:11.801537  00780000 ################################################################

 2833 18:57:11.801709  

 2834 18:57:12.051043  00800000 ################################################################

 2835 18:57:12.051209  

 2836 18:57:12.299373  00880000 ################################################################

 2837 18:57:12.299515  

 2838 18:57:12.551529  00900000 ################################################################

 2839 18:57:12.551705  

 2840 18:57:12.797332  00980000 ################################################################

 2841 18:57:12.797469  

 2842 18:57:12.801917  00a00000 # done.

 2843 18:57:12.802003  

 2844 18:57:12.805252  Sending tftp read request... done.

 2845 18:57:12.805335  

 2846 18:57:12.808801  Waiting for the transfer... 

 2847 18:57:12.808884  

 2848 18:57:12.808950  00000000 # done.

 2849 18:57:12.809013  

 2850 18:57:12.818498  Command line loaded dynamically from TFTP file: 12061631/tftp-deploy-c1pv04w0/kernel/cmdline

 2851 18:57:12.818583  

 2852 18:57:12.841840  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12061631/extract-nfsrootfs-ocfr773v,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2853 18:57:12.850934  

 2854 18:57:12.854799  Shutting down all USB controllers.

 2855 18:57:12.854906  

 2856 18:57:12.854973  Removing current net device

 2857 18:57:12.855036  

 2858 18:57:12.857638  Finalizing coreboot

 2859 18:57:12.857720  

 2860 18:57:12.864290  Exiting depthcharge with code 4 at timestamp: 25962475

 2861 18:57:12.864373  

 2862 18:57:12.864437  

 2863 18:57:12.864538  Starting kernel ...

 2864 18:57:12.864598  

 2865 18:57:12.864656  

 2866 18:57:12.865057  end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
 2867 18:57:12.865152  start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
 2868 18:57:12.865225  Setting prompt string to ['Linux version [0-9]']
 2869 18:57:12.865291  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2870 18:57:12.865358  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2872 19:01:37.865408  end: 2.2.5 auto-login-action (duration 00:04:25) [common]
 2874 19:01:37.865609  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
 2876 19:01:37.865764  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2879 19:01:37.866014  end: 2 depthcharge-action (duration 00:05:00) [common]
 2881 19:01:37.866255  Cleaning after the job
 2882 19:01:37.866344  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/ramdisk
 2883 19:01:37.866748  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/kernel
 2884 19:01:37.867245  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/nfsrootfs
 2885 19:01:37.884372  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12061631/tftp-deploy-c1pv04w0/modules
 2886 19:01:37.887805  start: 5.1 power-off (timeout 00:00:30) [common]
 2887 19:01:37.887988  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-8' '--port=1' '--command=off'
 2888 19:01:37.964956  >> Command sent successfully.

 2889 19:01:37.967608  Returned 0 in 0 seconds
 2890 19:01:38.067974  end: 5.1 power-off (duration 00:00:00) [common]
 2892 19:01:38.068311  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2893 19:01:38.068607  Listened to connection for namespace 'common' for up to 1s
 2895 19:01:38.068988  Listened to connection for namespace 'common' for up to 1s
 2896 19:01:39.068561  Finalising connection for namespace 'common'
 2897 19:01:39.068755  Disconnecting from shell: Finalise
 2898 19:01:39.068845  
 2899 19:01:39.169225  end: 5.2 read-feedback (duration 00:00:01) [common]
 2900 19:01:39.169408  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12061631
 2901 19:01:39.458655  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12061631
 2902 19:01:39.458882  JobError: Your job cannot terminate cleanly.