Boot log: acer-cbv514-1h-34uz-brya
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:08:42.854889 lava-dispatcher, installed at version: 2023.10
2 12:08:42.855104 start: 0 validate
3 12:08:42.855238 Start time: 2023-12-14 12:08:42.855231+00:00 (UTC)
4 12:08:42.855358 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:08:42.855483 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:08:43.127699 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:08:43.128404 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.201-cip41-69-g8f7b450fc28ed%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:08:43.399576 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:08:43.400376 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.201-cip41-69-g8f7b450fc28ed%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
10 12:08:49.133127 validate duration: 6.28
12 12:08:49.133551 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:08:49.133673 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:08:49.133808 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:08:49.134011 Not decompressing ramdisk as can be used compressed.
16 12:08:49.134111 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:08:49.134215 saving as /var/lib/lava/dispatcher/tmp/12269264/tftp-deploy-9wi4np1l/ramdisk/rootfs.cpio.gz
18 12:08:49.134321 total size: 8418130 (8 MB)
19 12:08:50.872006 progress 0 % (0 MB)
20 12:08:50.885582 progress 5 % (0 MB)
21 12:08:50.899263 progress 10 % (0 MB)
22 12:08:50.907724 progress 15 % (1 MB)
23 12:08:50.913483 progress 20 % (1 MB)
24 12:08:50.918279 progress 25 % (2 MB)
25 12:08:50.922401 progress 30 % (2 MB)
26 12:08:50.925793 progress 35 % (2 MB)
27 12:08:50.929086 progress 40 % (3 MB)
28 12:08:50.932183 progress 45 % (3 MB)
29 12:08:50.935039 progress 50 % (4 MB)
30 12:08:50.937711 progress 55 % (4 MB)
31 12:08:50.940322 progress 60 % (4 MB)
32 12:08:50.942551 progress 65 % (5 MB)
33 12:08:50.944832 progress 70 % (5 MB)
34 12:08:50.947115 progress 75 % (6 MB)
35 12:08:50.949325 progress 80 % (6 MB)
36 12:08:50.951559 progress 85 % (6 MB)
37 12:08:50.953789 progress 90 % (7 MB)
38 12:08:50.956062 progress 95 % (7 MB)
39 12:08:50.958187 progress 100 % (8 MB)
40 12:08:50.958427 8 MB downloaded in 1.82 s (4.40 MB/s)
41 12:08:50.958598 end: 1.1.1 http-download (duration 00:00:02) [common]
43 12:08:50.958866 end: 1.1 download-retry (duration 00:00:02) [common]
44 12:08:50.958976 start: 1.2 download-retry (timeout 00:09:58) [common]
45 12:08:50.959079 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 12:08:50.959231 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.201-cip41-69-g8f7b450fc28ed/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/kernel/bzImage
47 12:08:50.959310 saving as /var/lib/lava/dispatcher/tmp/12269264/tftp-deploy-9wi4np1l/kernel/bzImage
48 12:08:50.959410 total size: 17275200 (16 MB)
49 12:08:50.959511 No compression specified
50 12:08:50.961469 progress 0 % (0 MB)
51 12:08:50.966238 progress 5 % (0 MB)
52 12:08:50.970700 progress 10 % (1 MB)
53 12:08:50.975332 progress 15 % (2 MB)
54 12:08:50.979808 progress 20 % (3 MB)
55 12:08:50.984347 progress 25 % (4 MB)
56 12:08:50.989037 progress 30 % (4 MB)
57 12:08:50.993577 progress 35 % (5 MB)
58 12:08:50.998121 progress 40 % (6 MB)
59 12:08:51.002828 progress 45 % (7 MB)
60 12:08:51.007295 progress 50 % (8 MB)
61 12:08:51.011822 progress 55 % (9 MB)
62 12:08:51.016575 progress 60 % (9 MB)
63 12:08:51.021104 progress 65 % (10 MB)
64 12:08:51.025800 progress 70 % (11 MB)
65 12:08:51.030295 progress 75 % (12 MB)
66 12:08:51.034857 progress 80 % (13 MB)
67 12:08:51.039535 progress 85 % (14 MB)
68 12:08:51.043974 progress 90 % (14 MB)
69 12:08:51.048387 progress 95 % (15 MB)
70 12:08:51.052994 progress 100 % (16 MB)
71 12:08:51.053139 16 MB downloaded in 0.09 s (175.78 MB/s)
72 12:08:51.053306 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:08:51.053570 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:08:51.053704 start: 1.3 download-retry (timeout 00:09:58) [common]
76 12:08:51.053835 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 12:08:51.054045 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.201-cip41-69-g8f7b450fc28ed/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/modules.tar.xz
78 12:08:51.054146 saving as /var/lib/lava/dispatcher/tmp/12269264/tftp-deploy-9wi4np1l/modules/modules.tar
79 12:08:51.054247 total size: 3316536 (3 MB)
80 12:08:51.054349 Using unxz to decompress xz
81 12:08:51.059131 progress 0 % (0 MB)
82 12:08:51.065019 progress 5 % (0 MB)
83 12:08:51.073234 progress 10 % (0 MB)
84 12:08:51.081268 progress 15 % (0 MB)
85 12:08:51.092470 progress 20 % (0 MB)
86 12:08:51.104116 progress 25 % (0 MB)
87 12:08:51.112943 progress 30 % (0 MB)
88 12:08:51.125607 progress 35 % (1 MB)
89 12:08:51.137097 progress 40 % (1 MB)
90 12:08:51.147118 progress 45 % (1 MB)
91 12:08:51.156969 progress 50 % (1 MB)
92 12:08:51.166737 progress 55 % (1 MB)
93 12:08:51.178568 progress 60 % (1 MB)
94 12:08:51.188209 progress 65 % (2 MB)
95 12:08:51.197843 progress 70 % (2 MB)
96 12:08:51.207453 progress 75 % (2 MB)
97 12:08:51.217302 progress 80 % (2 MB)
98 12:08:51.228867 progress 85 % (2 MB)
99 12:08:51.238879 progress 90 % (2 MB)
100 12:08:51.248862 progress 95 % (3 MB)
101 12:08:51.259421 progress 100 % (3 MB)
102 12:08:51.264797 3 MB downloaded in 0.21 s (15.02 MB/s)
103 12:08:51.265107 end: 1.3.1 http-download (duration 00:00:00) [common]
105 12:08:51.265368 end: 1.3 download-retry (duration 00:00:00) [common]
106 12:08:51.265461 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
107 12:08:51.265555 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
108 12:08:51.265638 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
109 12:08:51.265722 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
110 12:08:51.265984 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk
111 12:08:51.266122 makedir: /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin
112 12:08:51.266228 makedir: /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/tests
113 12:08:51.266328 makedir: /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/results
114 12:08:51.266443 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-add-keys
115 12:08:51.266590 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-add-sources
116 12:08:51.266721 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-background-process-start
117 12:08:51.266854 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-background-process-stop
118 12:08:51.266981 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-common-functions
119 12:08:51.267107 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-echo-ipv4
120 12:08:51.267238 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-install-packages
121 12:08:51.267363 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-installed-packages
122 12:08:51.267488 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-os-build
123 12:08:51.267615 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-probe-channel
124 12:08:51.267739 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-probe-ip
125 12:08:51.267864 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-target-ip
126 12:08:51.267988 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-target-mac
127 12:08:51.268112 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-target-storage
128 12:08:51.268242 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-test-case
129 12:08:51.268368 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-test-event
130 12:08:51.268492 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-test-feedback
131 12:08:51.268616 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-test-raise
132 12:08:51.268743 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-test-reference
133 12:08:51.268870 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-test-runner
134 12:08:51.268994 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-test-set
135 12:08:51.269120 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-test-shell
136 12:08:51.269249 Updating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-install-packages (oe)
137 12:08:51.269403 Updating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/bin/lava-installed-packages (oe)
138 12:08:51.269526 Creating /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/environment
139 12:08:51.269626 LAVA metadata
140 12:08:51.269706 - LAVA_JOB_ID=12269264
141 12:08:51.269769 - LAVA_DISPATCHER_IP=192.168.201.1
142 12:08:51.269878 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
143 12:08:51.269951 skipped lava-vland-overlay
144 12:08:51.270025 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
145 12:08:51.270107 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
146 12:08:51.270169 skipped lava-multinode-overlay
147 12:08:51.270240 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
148 12:08:51.270319 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
149 12:08:51.270394 Loading test definitions
150 12:08:51.270487 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
151 12:08:51.270566 Using /lava-12269264 at stage 0
152 12:08:51.270885 uuid=12269264_1.4.2.3.1 testdef=None
153 12:08:51.270973 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
154 12:08:51.271061 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
155 12:08:51.271593 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
157 12:08:51.271815 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
158 12:08:51.272450 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
160 12:08:51.272678 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
161 12:08:51.273292 runner path: /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/0/tests/0_dmesg test_uuid 12269264_1.4.2.3.1
162 12:08:51.273447 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
164 12:08:51.273676 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
165 12:08:51.273747 Using /lava-12269264 at stage 1
166 12:08:51.274061 uuid=12269264_1.4.2.3.5 testdef=None
167 12:08:51.274149 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
168 12:08:51.274233 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
169 12:08:51.274714 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
171 12:08:51.274933 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
172 12:08:51.275577 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
174 12:08:51.275804 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
175 12:08:51.276424 runner path: /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/1/tests/1_bootrr test_uuid 12269264_1.4.2.3.5
176 12:08:51.276578 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
178 12:08:51.276786 Creating lava-test-runner.conf files
179 12:08:51.276849 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/0 for stage 0
180 12:08:51.276979 - 0_dmesg
181 12:08:51.277060 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12269264/lava-overlay-o5lxw0pk/lava-12269264/1 for stage 1
182 12:08:51.277151 - 1_bootrr
183 12:08:51.277245 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
184 12:08:51.277332 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
185 12:08:51.285751 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
186 12:08:51.285861 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
187 12:08:51.285950 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
188 12:08:51.286035 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
189 12:08:51.286118 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
190 12:08:51.540219 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
191 12:08:51.540605 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
192 12:08:51.540719 extracting modules file /var/lib/lava/dispatcher/tmp/12269264/tftp-deploy-9wi4np1l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12269264/extract-overlay-ramdisk-islmkaas/ramdisk
193 12:08:51.624248 end: 1.4.4 extract-modules (duration 00:00:00) [common]
194 12:08:51.624426 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
195 12:08:51.624524 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12269264/compress-overlay-2lamfivv/overlay-1.4.2.4.tar.gz to ramdisk
196 12:08:51.624599 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12269264/compress-overlay-2lamfivv/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12269264/extract-overlay-ramdisk-islmkaas/ramdisk
197 12:08:51.632827 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
198 12:08:51.632939 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
199 12:08:51.633027 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
200 12:08:51.633112 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
201 12:08:51.633188 Building ramdisk /var/lib/lava/dispatcher/tmp/12269264/extract-overlay-ramdisk-islmkaas/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12269264/extract-overlay-ramdisk-islmkaas/ramdisk
202 12:08:51.887198 >> 91450 blocks
203 12:08:53.370148 rename /var/lib/lava/dispatcher/tmp/12269264/extract-overlay-ramdisk-islmkaas/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12269264/tftp-deploy-9wi4np1l/ramdisk/ramdisk.cpio.gz
204 12:08:53.370598 end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
205 12:08:53.370727 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
206 12:08:53.370828 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
207 12:08:53.370928 No mkimage arch provided, not using FIT.
208 12:08:53.371022 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
209 12:08:53.371109 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
210 12:08:53.371217 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
211 12:08:53.371308 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
212 12:08:53.371389 No LXC device requested
213 12:08:53.371472 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
214 12:08:53.371559 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
215 12:08:53.371638 end: 1.6 deploy-device-env (duration 00:00:00) [common]
216 12:08:53.371714 Checking files for TFTP limit of 4294967296 bytes.
217 12:08:53.372105 end: 1 tftp-deploy (duration 00:00:04) [common]
218 12:08:53.372210 start: 2 depthcharge-action (timeout 00:05:00) [common]
219 12:08:53.372299 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
220 12:08:53.372422 substitutions:
221 12:08:53.372487 - {DTB}: None
222 12:08:53.372550 - {INITRD}: 12269264/tftp-deploy-9wi4np1l/ramdisk/ramdisk.cpio.gz
223 12:08:53.372609 - {KERNEL}: 12269264/tftp-deploy-9wi4np1l/kernel/bzImage
224 12:08:53.372666 - {LAVA_MAC}: None
225 12:08:53.372721 - {PRESEED_CONFIG}: None
226 12:08:53.372775 - {PRESEED_LOCAL}: None
227 12:08:53.372830 - {RAMDISK}: 12269264/tftp-deploy-9wi4np1l/ramdisk/ramdisk.cpio.gz
228 12:08:53.372885 - {ROOT_PART}: None
229 12:08:53.372939 - {ROOT}: None
230 12:08:53.372992 - {SERVER_IP}: 192.168.201.1
231 12:08:53.373045 - {TEE}: None
232 12:08:53.373097 Parsed boot commands:
233 12:08:53.373151 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
234 12:08:53.373325 Parsed boot commands: tftpboot 192.168.201.1 12269264/tftp-deploy-9wi4np1l/kernel/bzImage 12269264/tftp-deploy-9wi4np1l/kernel/cmdline 12269264/tftp-deploy-9wi4np1l/ramdisk/ramdisk.cpio.gz
235 12:08:53.373412 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
236 12:08:53.373498 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
237 12:08:53.373590 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
238 12:08:53.373676 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
239 12:08:53.373747 Not connected, no need to disconnect.
240 12:08:53.373822 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
241 12:08:53.373949 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
242 12:08:53.374016 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-8'
243 12:08:53.377866 Setting prompt string to ['lava-test: # ']
244 12:08:53.378217 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
245 12:08:53.378325 end: 2.2.1 reset-connection (duration 00:00:00) [common]
246 12:08:53.378424 start: 2.2.2 reset-device (timeout 00:05:00) [common]
247 12:08:53.378513 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
248 12:08:53.378706 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-8' '--port=1' '--command=reboot'
249 12:08:58.524309 >> Command sent successfully.
250 12:08:58.535091 Returned 0 in 5 seconds
251 12:08:58.636213 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
253 12:08:58.637574 end: 2.2.2 reset-device (duration 00:00:05) [common]
254 12:08:58.638103 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
255 12:08:58.638531 Setting prompt string to 'Starting depthcharge on Volmar...'
256 12:08:58.638871 Changing prompt to 'Starting depthcharge on Volmar...'
257 12:08:58.639217 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
258 12:08:58.640358 [Enter `^Ec?' for help]
259 12:09:00.008075
260 12:09:00.008608
261 12:09:00.015308 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
262 12:09:00.019430 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
263 12:09:00.023035 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
264 12:09:00.030208 CPU: AES supported, TXT NOT supported, VT supported
265 12:09:00.036791 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
266 12:09:00.040854 Cache size = 10 MiB
267 12:09:00.044048 MCH: device id 4609 (rev 04) is Alderlake-P
268 12:09:00.048068 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
269 12:09:00.055052 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
270 12:09:00.055475 VBOOT: Loading verstage.
271 12:09:00.062100 FMAP: Found "FLASH" version 1.1 at 0x1804000.
272 12:09:00.065547 FMAP: base = 0x0 size = 0x2000000 #areas = 37
273 12:09:00.072457 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
274 12:09:00.078651 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
275 12:09:00.085336 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
276 12:09:00.088924
277 12:09:00.089342
278 12:09:00.096504 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
279 12:09:00.103674 Probing TPM I2C: I2C bus 1 version 0x3230302a
280 12:09:00.106776 DW I2C bus 1 at 0xfe022000 (400 KHz)
281 12:09:00.110413 done! DID_VID 0x00281ae0
282 12:09:00.110858 TPM ready after 0 ms
283 12:09:00.117349 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
284 12:09:00.127566 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
285 12:09:00.134381 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
286 12:09:00.186620 tlcl_send_startup: Startup return code is 0
287 12:09:00.187157 TPM: setup succeeded
288 12:09:00.208639 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
289 12:09:00.231986 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
290 12:09:00.235711 Chrome EC: UHEPI supported
291 12:09:00.239038 Reading cr50 boot mode
292 12:09:00.253465 Cr50 says boot_mode is VERIFIED_RW(0x00).
293 12:09:00.254039 Phase 1
294 12:09:00.260242 FMAP: area GBB found @ 1805000 (458752 bytes)
295 12:09:00.266754 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
296 12:09:00.273650 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
297 12:09:00.280248 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
298 12:09:00.283877 Phase 2
299 12:09:00.284410 Phase 3
300 12:09:00.286656 FMAP: area GBB found @ 1805000 (458752 bytes)
301 12:09:00.293335 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
302 12:09:00.296336 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
303 12:09:00.303231 VB2:vb2_verify_keyblock() Checking keyblock signature...
304 12:09:00.310083 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
305 12:09:00.316771 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
306 12:09:00.326466 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
307 12:09:00.338787 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
308 12:09:00.342535 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
309 12:09:00.348653 VB2:vb2_verify_fw_preamble() Verifying preamble.
310 12:09:00.355279 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
311 12:09:00.361812 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
312 12:09:00.368355 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
313 12:09:00.372831 Phase 4
314 12:09:00.375900 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
315 12:09:00.382487 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
316 12:09:00.594665 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
317 12:09:00.601323 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
318 12:09:00.604582 Saving vboot hash.
319 12:09:00.611567 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
320 12:09:00.627804 tlcl_extend: response is 0
321 12:09:00.634440 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
322 12:09:00.640950 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
323 12:09:00.655844 tlcl_extend: response is 0
324 12:09:00.662381 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
325 12:09:00.682481 tlcl_lock_nv_write: response is 0
326 12:09:00.701678 tlcl_lock_nv_write: response is 0
327 12:09:00.702294 Slot A is selected
328 12:09:00.707998 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
329 12:09:00.714421 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
330 12:09:00.721641 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
331 12:09:00.728447 BS: verstage times (exec / console): total (unknown) / 257 ms
332 12:09:00.729017
333 12:09:00.729472
334 12:09:00.734707 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
335 12:09:00.739000 Google Chrome EC: version:
336 12:09:00.742239 ro: volmar_v2.0.14126-e605144e9c
337 12:09:00.745336 rw: volmar_v0.0.55-22d1557
338 12:09:00.748874 running image: 2
339 12:09:00.751989 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
340 12:09:00.761596 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
341 12:09:00.768312 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
342 12:09:00.775374 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
343 12:09:00.785550 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
344 12:09:00.795199 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
345 12:09:00.798334 EC took 1116us to calculate image hash
346 12:09:00.808375 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
347 12:09:00.811737 VB2:sync_ec() select_rw=RW(active)
348 12:09:00.823187 Waited 270us to clear limit power flag.
349 12:09:00.826508 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
350 12:09:00.830006 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
351 12:09:00.833354 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
352 12:09:00.839728 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
353 12:09:00.843322 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
354 12:09:00.846649 TCO_STS: 0000 0000
355 12:09:00.849695 GEN_PMCON: d0015038 00002200
356 12:09:00.852990 GBLRST_CAUSE: 00000000 00000000
357 12:09:00.853429 HPR_CAUSE0: 00000000
358 12:09:00.856570 prev_sleep_state 5
359 12:09:00.859613 Abort disabling TXT, as CPU is not TXT capable.
360 12:09:00.868072 cse_lite: Number of partitions = 3
361 12:09:00.871598 cse_lite: Current partition = RO
362 12:09:00.872025 cse_lite: Next partition = RO
363 12:09:00.874990 cse_lite: Flags = 0x7
364 12:09:00.881600 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
365 12:09:00.891262 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
366 12:09:00.894796 FMAP: area SI_ME found @ 1000 (5238784 bytes)
367 12:09:00.901574 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
368 12:09:00.908214 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
369 12:09:00.914452 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
370 12:09:00.918332 cse_lite: CSE CBFS RW version : 16.1.25.2049
371 12:09:00.924660 cse_lite: Set Boot Partition Info Command (RW)
372 12:09:00.928302 HECI: Global Reset(Type:1) Command
373 12:09:02.371287 he: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
374 12:09:02.371827 Cache size = 10 MiB
375 12:09:02.377915 MCH: device id 4609 (rev 04) is Alderlake-P
376 12:09:02.381059 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
377 12:09:02.388434 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
378 12:09:02.388959 VBOOT: Loading verstage.
379 12:09:02.395138 FMAP: Found "FLASH" version 1.1 at 0x1804000.
380 12:09:02.398740 FMAP: base = 0x0 size = 0x2000000 #areas = 37
381 12:09:02.402483 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
382 12:09:02.412991 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
383 12:09:02.419862 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
384 12:09:02.420292
385 12:09:02.420640
386 12:09:02.429604 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
387 12:09:02.436625 Probing TPM I2C: I2C bus 1 version 0x3230302a
388 12:09:02.439605 DW I2C bus 1 at 0xfe022000 (400 KHz)
389 12:09:02.443231 done! DID_VID 0x00281ae0
390 12:09:02.443673 TPM ready after 0 ms
391 12:09:02.447438 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
392 12:09:02.457757 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
393 12:09:02.464605 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
394 12:09:02.519962 tlcl_send_startup: Startup return code is 0
395 12:09:02.520606 TPM: setup succeeded
396 12:09:02.539638 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
397 12:09:02.561609 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
398 12:09:02.565978 Chrome EC: UHEPI supported
399 12:09:02.569504 Reading cr50 boot mode
400 12:09:02.584009 Cr50 says boot_mode is VERIFIED_RW(0x00).
401 12:09:02.584548 Phase 1
402 12:09:02.590455 FMAP: area GBB found @ 1805000 (458752 bytes)
403 12:09:02.597418 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
404 12:09:02.603983 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
405 12:09:02.610400 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
406 12:09:02.613828 Phase 2
407 12:09:02.614429 Phase 3
408 12:09:02.617008 FMAP: area GBB found @ 1805000 (458752 bytes)
409 12:09:02.624110 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 12:09:02.627502 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
411 12:09:02.633998 VB2:vb2_verify_keyblock() Checking keyblock signature...
412 12:09:02.640307 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
413 12:09:02.647105 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
414 12:09:02.656728 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
415 12:09:02.669352 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
416 12:09:02.672428 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
417 12:09:02.679128 VB2:vb2_verify_fw_preamble() Verifying preamble.
418 12:09:02.685602 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
419 12:09:02.692301 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
420 12:09:02.698670 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
421 12:09:02.702929 Phase 4
422 12:09:02.706028 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
423 12:09:02.712728 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
424 12:09:02.925425 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
425 12:09:02.932035 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
426 12:09:02.935498 Saving vboot hash.
427 12:09:02.941936 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
428 12:09:02.957949 tlcl_extend: response is 0
429 12:09:02.964500 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
430 12:09:02.970862 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
431 12:09:02.985581 tlcl_extend: response is 0
432 12:09:02.992169 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
433 12:09:03.012203 tlcl_lock_nv_write: response is 0
434 12:09:03.031214 tlcl_lock_nv_write: response is 0
435 12:09:03.031727 Slot A is selected
436 12:09:03.037926 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
437 12:09:03.044552 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
438 12:09:03.051195 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
439 12:09:03.058032 BS: verstage times (exec / console): total (unknown) / 256 ms
440 12:09:03.058465
441 12:09:03.058804
442 12:09:03.064581 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
443 12:09:03.068314 Google Chrome EC: version:
444 12:09:03.071950 ro: volmar_v2.0.14126-e605144e9c
445 12:09:03.074994 rw: volmar_v0.0.55-22d1557
446 12:09:03.078480 running image: 2
447 12:09:03.081539 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
448 12:09:03.091736 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
449 12:09:03.098023 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
450 12:09:03.104803 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
451 12:09:03.114859 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 12:09:03.124741 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
453 12:09:03.128362 EC took 941us to calculate image hash
454 12:09:03.138186 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
455 12:09:03.141513 VB2:sync_ec() select_rw=RW(active)
456 12:09:03.162037 Waited 305us to clear limit power flag.
457 12:09:03.165196 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
458 12:09:03.168545 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
459 12:09:03.171706 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
460 12:09:03.178635 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
461 12:09:03.181707 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
462 12:09:03.185387 TCO_STS: 0000 0000
463 12:09:03.188571 GEN_PMCON: d1001038 00002200
464 12:09:03.191652 GBLRST_CAUSE: 00000040 00000000
465 12:09:03.192184 HPR_CAUSE0: 00000000
466 12:09:03.195227 prev_sleep_state 5
467 12:09:03.201701 Abort disabling TXT, as CPU is not TXT capable.
468 12:09:03.205253 cse_lite: Number of partitions = 3
469 12:09:03.208658 cse_lite: Current partition = RW
470 12:09:03.211695 cse_lite: Next partition = RW
471 12:09:03.215283 cse_lite: Flags = 0x7
472 12:09:03.221960 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
473 12:09:03.228280 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
474 12:09:03.235290 FMAP: area SI_ME found @ 1000 (5238784 bytes)
475 12:09:03.241658 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
476 12:09:03.244950 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
477 12:09:03.251800 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
478 12:09:03.258316 cse_lite: CSE CBFS RW version : 16.1.25.2049
479 12:09:03.261774 Boot Count incremented to 15547
480 12:09:03.268576 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
481 12:09:03.274791 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
482 12:09:03.286541 Probing TPM I2C: done! DID_VID 0x00281ae0
483 12:09:03.290261 Locality already claimed
484 12:09:03.293351 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
485 12:09:03.312677 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
486 12:09:03.319903 MRC: Hash idx 0x100d comparison successful.
487 12:09:03.322685 MRC cache found, size f6c8
488 12:09:03.323106 bootmode is set to: 2
489 12:09:03.326381 EC returned error result code 3
490 12:09:03.329819 FW_CONFIG value from CBI is 0x131
491 12:09:03.336528 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
492 12:09:03.339629 SPD index = 0
493 12:09:03.346067 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
494 12:09:03.346527 SPD: module type is LPDDR4X
495 12:09:03.352964 SPD: module part number is K4U6E3S4AB-MGCL
496 12:09:03.359931 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
497 12:09:03.363148 SPD: device width 16 bits, bus width 16 bits
498 12:09:03.366497 SPD: module size is 1024 MB (per channel)
499 12:09:03.435622 CBMEM:
500 12:09:03.439031 IMD: root @ 0x76fff000 254 entries.
501 12:09:03.442179 IMD: root @ 0x76ffec00 62 entries.
502 12:09:03.450025 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
503 12:09:03.453714 RO_VPD is uninitialized or empty.
504 12:09:03.456531 FMAP: area RW_VPD found @ f29000 (8192 bytes)
505 12:09:03.463374 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
506 12:09:03.466527 External stage cache:
507 12:09:03.470043 IMD: root @ 0x7bbff000 254 entries.
508 12:09:03.473091 IMD: root @ 0x7bbfec00 62 entries.
509 12:09:03.480430 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
510 12:09:03.486816 MRC: Checking cached data update for 'RW_MRC_CACHE'.
511 12:09:03.490368 MRC: 'RW_MRC_CACHE' does not need update.
512 12:09:03.490798 8 DIMMs found
513 12:09:03.493647 SMM Memory Map
514 12:09:03.496674 SMRAM : 0x7b800000 0x800000
515 12:09:03.500090 Subregion 0: 0x7b800000 0x200000
516 12:09:03.503393 Subregion 1: 0x7ba00000 0x200000
517 12:09:03.506592 Subregion 2: 0x7bc00000 0x400000
518 12:09:03.510038 top_of_ram = 0x77000000
519 12:09:03.513074 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
520 12:09:03.520244 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
521 12:09:03.526557 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
522 12:09:03.530189 MTRR Range: Start=ff000000 End=0 (Size 1000000)
523 12:09:03.530722 Normal boot
524 12:09:03.539759 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
525 12:09:03.546416 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
526 12:09:03.553025 Processing 237 relocs. Offset value of 0x74ab9000
527 12:09:03.561329 BS: romstage times (exec / console): total (unknown) / 377 ms
528 12:09:03.568564
529 12:09:03.568988
530 12:09:03.575107 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
531 12:09:03.575631 Normal boot
532 12:09:03.582067 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
533 12:09:03.588563 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
534 12:09:03.595041 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
535 12:09:03.605062 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
536 12:09:03.653119 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
537 12:09:03.659648 Processing 5931 relocs. Offset value of 0x72a2f000
538 12:09:03.663145 BS: postcar times (exec / console): total (unknown) / 51 ms
539 12:09:03.666118
540 12:09:03.666582
541 12:09:03.673121 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
542 12:09:03.676167 Reserving BERT start 76a1e000, size 10000
543 12:09:03.679539 Normal boot
544 12:09:03.682573 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
545 12:09:03.689371 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
546 12:09:03.699116 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
547 12:09:03.702634 FMAP: area RW_VPD found @ f29000 (8192 bytes)
548 12:09:03.706052 Google Chrome EC: version:
549 12:09:03.709630 ro: volmar_v2.0.14126-e605144e9c
550 12:09:03.712730 rw: volmar_v0.0.55-22d1557
551 12:09:03.716073 running image: 2
552 12:09:03.719627 ACPI _SWS is PM1 Index 8 GPE Index -1
553 12:09:03.723233 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
554 12:09:03.726908 EC returned error result code 3
555 12:09:03.730293 FW_CONFIG value from CBI is 0x131
556 12:09:03.737039 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
557 12:09:03.740595 PCI: 00:1c.2 disabled by fw_config
558 12:09:03.747323 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 12:09:03.750523 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
560 12:09:03.757415 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
561 12:09:03.760417 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
562 12:09:03.767253 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
563 12:09:03.773746 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
564 12:09:03.780683 microcode: sig=0x906a4 pf=0x80 revision=0x423
565 12:09:03.783737 microcode: Update skipped, already up-to-date
566 12:09:03.790350 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
567 12:09:03.822643 Detected 6 core, 8 thread CPU.
568 12:09:03.825551 Setting up SMI for CPU
569 12:09:03.829516 IED base = 0x7bc00000
570 12:09:03.830226 IED size = 0x00400000
571 12:09:03.832790 Will perform SMM setup.
572 12:09:03.835797 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
573 12:09:03.838814 LAPIC 0x0 in XAPIC mode.
574 12:09:03.849275 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
575 12:09:03.852015 Processing 18 relocs. Offset value of 0x00030000
576 12:09:03.856635 Attempting to start 7 APs
577 12:09:03.860297 Waiting for 10ms after sending INIT.
578 12:09:03.873511 Waiting for SIPI to complete...
579 12:09:03.876820 done.
580 12:09:03.877243 LAPIC 0x16 in XAPIC mode.
581 12:09:03.879680 LAPIC 0x14 in XAPIC mode.
582 12:09:03.886753 AP: slot 2 apic_id 16, MCU rev: 0x00000423
583 12:09:03.887229 LAPIC 0x10 in XAPIC mode.
584 12:09:03.889679 LAPIC 0x8 in XAPIC mode.
585 12:09:03.893038 AP: slot 3 apic_id 10, MCU rev: 0x00000423
586 12:09:03.896382 LAPIC 0x12 in XAPIC mode.
587 12:09:03.902956 AP: slot 1 apic_id 14, MCU rev: 0x00000423
588 12:09:03.906489 AP: slot 4 apic_id 12, MCU rev: 0x00000423
589 12:09:03.909585 LAPIC 0x1 in XAPIC mode.
590 12:09:03.913218 Waiting for SIPI to complete...
591 12:09:03.913734 done.
592 12:09:03.916002 LAPIC 0x9 in XAPIC mode.
593 12:09:03.919431 AP: slot 7 apic_id 8, MCU rev: 0x00000423
594 12:09:03.923061 AP: slot 5 apic_id 9, MCU rev: 0x00000423
595 12:09:03.926140 AP: slot 6 apic_id 1, MCU rev: 0x00000423
596 12:09:03.930049 smm_setup_relocation_handler: enter
597 12:09:03.933066 smm_setup_relocation_handler: exit
598 12:09:03.942644 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
599 12:09:03.946431 Processing 11 relocs. Offset value of 0x00038000
600 12:09:03.952782 smm_module_setup_stub: stack_top = 0x7b804000
601 12:09:03.956255 smm_module_setup_stub: per cpu stack_size = 0x800
602 12:09:03.962711 smm_module_setup_stub: runtime.start32_offset = 0x4c
603 12:09:03.966358 smm_module_setup_stub: runtime.smm_size = 0x10000
604 12:09:03.972663 SMM Module: stub loaded at 38000. Will call 0x76a52094
605 12:09:03.975974 Installing permanent SMM handler to 0x7b800000
606 12:09:03.983189 smm_load_module: total_smm_space_needed e468, available -> 200000
607 12:09:03.993106 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
608 12:09:03.995805 Processing 255 relocs. Offset value of 0x7b9f6000
609 12:09:04.002739 smm_load_module: smram_start: 0x7b800000
610 12:09:04.006245 smm_load_module: smram_end: 7ba00000
611 12:09:04.009373 smm_load_module: handler start 0x7b9f6d5f
612 12:09:04.012490 smm_load_module: handler_size 98d0
613 12:09:04.015701 smm_load_module: fxsave_area 0x7b9ff000
614 12:09:04.019520 smm_load_module: fxsave_size 1000
615 12:09:04.022650 smm_load_module: CONFIG_MSEG_SIZE 0x0
616 12:09:04.029497 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
617 12:09:04.035682 smm_load_module: handler_mod_params.smbase = 0x7b800000
618 12:09:04.039260 smm_load_module: per_cpu_save_state_size = 0x400
619 12:09:04.042314 smm_load_module: num_cpus = 0x8
620 12:09:04.049724 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
621 12:09:04.052438 smm_load_module: total_save_state_size = 0x2000
622 12:09:04.055814 smm_load_module: cpu0 entry: 7b9e6000
623 12:09:04.062274 smm_create_map: cpus allowed in one segment 30
624 12:09:04.066000 smm_create_map: min # of segments needed 1
625 12:09:04.066518 CPU 0x0
626 12:09:04.072529 smbase 7b9e6000 entry 7b9ee000
627 12:09:04.075507 ss_start 7b9f5c00 code_end 7b9ee208
628 12:09:04.075928 CPU 0x1
629 12:09:04.079094 smbase 7b9e5c00 entry 7b9edc00
630 12:09:04.085720 ss_start 7b9f5800 code_end 7b9ede08
631 12:09:04.086207 CPU 0x2
632 12:09:04.088879 smbase 7b9e5800 entry 7b9ed800
633 12:09:04.095649 ss_start 7b9f5400 code_end 7b9eda08
634 12:09:04.096160 CPU 0x3
635 12:09:04.099288 smbase 7b9e5400 entry 7b9ed400
636 12:09:04.102564 ss_start 7b9f5000 code_end 7b9ed608
637 12:09:04.105663 CPU 0x4
638 12:09:04.108794 smbase 7b9e5000 entry 7b9ed000
639 12:09:04.112186 ss_start 7b9f4c00 code_end 7b9ed208
640 12:09:04.112601 CPU 0x5
641 12:09:04.118675 smbase 7b9e4c00 entry 7b9ecc00
642 12:09:04.122181 ss_start 7b9f4800 code_end 7b9ece08
643 12:09:04.122773 CPU 0x6
644 12:09:04.125416 smbase 7b9e4800 entry 7b9ec800
645 12:09:04.132199 ss_start 7b9f4400 code_end 7b9eca08
646 12:09:04.132787 CPU 0x7
647 12:09:04.135344 smbase 7b9e4400 entry 7b9ec400
648 12:09:04.141986 ss_start 7b9f4000 code_end 7b9ec608
649 12:09:04.149151 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
650 12:09:04.152424 Processing 11 relocs. Offset value of 0x7b9ee000
651 12:09:04.159425 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
652 12:09:04.165730 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
653 12:09:04.172640 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
654 12:09:04.179198 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
655 12:09:04.185705 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
656 12:09:04.189347 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
657 12:09:04.195576 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
658 12:09:04.202206 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
659 12:09:04.209034 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
660 12:09:04.215464 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
661 12:09:04.222542 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
662 12:09:04.228829 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
663 12:09:04.235654 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
664 12:09:04.241968 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
665 12:09:04.248799 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
666 12:09:04.252090 smm_module_setup_stub: stack_top = 0x7b804000
667 12:09:04.258628 smm_module_setup_stub: per cpu stack_size = 0x800
668 12:09:04.262121 smm_module_setup_stub: runtime.start32_offset = 0x4c
669 12:09:04.268944 smm_module_setup_stub: runtime.smm_size = 0x200000
670 12:09:04.272111 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
671 12:09:04.276908 Clearing SMI status registers
672 12:09:04.280214 SMI_STS: PM1
673 12:09:04.280685 PM1_STS: WAK PWRBTN
674 12:09:04.290583 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
675 12:09:04.294402 In relocation handler: CPU 0
676 12:09:04.297018 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
677 12:09:04.300515 Writing SMRR. base = 0x7b800006, mask=0xff800c00
678 12:09:04.303295 Relocation complete.
679 12:09:04.309762 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
680 12:09:04.313547 In relocation handler: CPU 6
681 12:09:04.316468 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
682 12:09:04.320329 Relocation complete.
683 12:09:04.326666 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
684 12:09:04.329897 In relocation handler: CPU 1
685 12:09:04.332969 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
686 12:09:04.340109 Writing SMRR. base = 0x7b800006, mask=0xff800c00
687 12:09:04.340556 Relocation complete.
688 12:09:04.346676 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
689 12:09:04.349630 In relocation handler: CPU 3
690 12:09:04.356687 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
691 12:09:04.359969 Writing SMRR. base = 0x7b800006, mask=0xff800c00
692 12:09:04.363041 Relocation complete.
693 12:09:04.369904 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
694 12:09:04.372808 In relocation handler: CPU 2
695 12:09:04.376272 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
696 12:09:04.379692 Writing SMRR. base = 0x7b800006, mask=0xff800c00
697 12:09:04.382756 Relocation complete.
698 12:09:04.389946 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
699 12:09:04.393165 In relocation handler: CPU 4
700 12:09:04.396217 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
701 12:09:04.403101 Writing SMRR. base = 0x7b800006, mask=0xff800c00
702 12:09:04.403549 Relocation complete.
703 12:09:04.413188 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
704 12:09:04.416210 In relocation handler: CPU 5
705 12:09:04.419625 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
706 12:09:04.420077 Relocation complete.
707 12:09:04.429480 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
708 12:09:04.430071 In relocation handler: CPU 7
709 12:09:04.436579 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
710 12:09:04.439496 Writing SMRR. base = 0x7b800006, mask=0xff800c00
711 12:09:04.443008 Relocation complete.
712 12:09:04.443450 Initializing CPU #0
713 12:09:04.446151 CPU: vendor Intel device 906a4
714 12:09:04.452967 CPU: family 06, model 9a, stepping 04
715 12:09:04.453536 Clearing out pending MCEs
716 12:09:04.456414 cpu: energy policy set to 7
717 12:09:04.459663 Turbo is available but hidden
718 12:09:04.462686 Turbo is available and visible
719 12:09:04.466147 microcode: Update skipped, already up-to-date
720 12:09:04.469666 CPU #0 initialized
721 12:09:04.472849 Initializing CPU #6
722 12:09:04.473288 Initializing CPU #2
723 12:09:04.475774 Initializing CPU #1
724 12:09:04.476280 Initializing CPU #4
725 12:09:04.479477 Initializing CPU #5
726 12:09:04.483061 CPU: vendor Intel device 906a4
727 12:09:04.486074 CPU: family 06, model 9a, stepping 04
728 12:09:04.489340 CPU: vendor Intel device 906a4
729 12:09:04.492756 CPU: family 06, model 9a, stepping 04
730 12:09:04.496484 Initializing CPU #3
731 12:09:04.499034 Clearing out pending MCEs
732 12:09:04.502573 CPU: vendor Intel device 906a4
733 12:09:04.506325 CPU: family 06, model 9a, stepping 04
734 12:09:04.509317 cpu: energy policy set to 7
735 12:09:04.509889 Clearing out pending MCEs
736 12:09:04.512919 CPU: vendor Intel device 906a4
737 12:09:04.515770 CPU: family 06, model 9a, stepping 04
738 12:09:04.519051 CPU: vendor Intel device 906a4
739 12:09:04.525724 CPU: family 06, model 9a, stepping 04
740 12:09:04.526226 Clearing out pending MCEs
741 12:09:04.528960 Clearing out pending MCEs
742 12:09:04.532618 cpu: energy policy set to 7
743 12:09:04.535981 Initializing CPU #7
744 12:09:04.539367 CPU: vendor Intel device 906a4
745 12:09:04.542448 CPU: family 06, model 9a, stepping 04
746 12:09:04.545806 CPU: vendor Intel device 906a4
747 12:09:04.549382 CPU: family 06, model 9a, stepping 04
748 12:09:04.552264 microcode: Update skipped, already up-to-date
749 12:09:04.556053 CPU #4 initialized
750 12:09:04.559002 cpu: energy policy set to 7
751 12:09:04.562532 microcode: Update skipped, already up-to-date
752 12:09:04.565746 CPU #1 initialized
753 12:09:04.566273 Clearing out pending MCEs
754 12:09:04.568912 cpu: energy policy set to 7
755 12:09:04.575440 microcode: Update skipped, already up-to-date
756 12:09:04.575967 CPU #3 initialized
757 12:09:04.582287 microcode: Update skipped, already up-to-date
758 12:09:04.582720 CPU #2 initialized
759 12:09:04.585323 cpu: energy policy set to 7
760 12:09:04.588993 Clearing out pending MCEs
761 12:09:04.592235 Clearing out pending MCEs
762 12:09:04.592769 cpu: energy policy set to 7
763 12:09:04.598724 microcode: Update skipped, already up-to-date
764 12:09:04.599268 CPU #6 initialized
765 12:09:04.602211 cpu: energy policy set to 7
766 12:09:04.609066 microcode: Update skipped, already up-to-date
767 12:09:04.609597 CPU #5 initialized
768 12:09:04.615515 microcode: Update skipped, already up-to-date
769 12:09:04.615947 CPU #7 initialized
770 12:09:04.621762 bsp_do_flight_plan done after 704 msecs.
771 12:09:04.622234 CPU: frequency set to 4400 MHz
772 12:09:04.625527 Enabling SMIs.
773 12:09:04.632255 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
774 12:09:04.647484 Probing TPM I2C: done! DID_VID 0x00281ae0
775 12:09:04.650568 Locality already claimed
776 12:09:04.654112 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
777 12:09:04.665752 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
778 12:09:04.668928 Enabling GPIO PM b/c CR50 has long IRQ pulse support
779 12:09:04.675727 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
780 12:09:04.682035 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
781 12:09:04.685806 Found a VBT of 9216 bytes after decompression
782 12:09:04.689053 PCI 1.0, PIN A, using IRQ #16
783 12:09:04.692321 PCI 2.0, PIN A, using IRQ #17
784 12:09:04.695644 PCI 4.0, PIN A, using IRQ #18
785 12:09:04.698484 PCI 5.0, PIN A, using IRQ #16
786 12:09:04.702018 PCI 6.0, PIN A, using IRQ #16
787 12:09:04.705479 PCI 6.2, PIN C, using IRQ #18
788 12:09:04.708824 PCI 7.0, PIN A, using IRQ #19
789 12:09:04.712329 PCI 7.1, PIN B, using IRQ #20
790 12:09:04.715170 PCI 7.2, PIN C, using IRQ #21
791 12:09:04.718838 PCI 7.3, PIN D, using IRQ #22
792 12:09:04.722714 PCI 8.0, PIN A, using IRQ #23
793 12:09:04.725672 PCI D.0, PIN A, using IRQ #17
794 12:09:04.728853 PCI D.1, PIN B, using IRQ #19
795 12:09:04.729438 PCI 10.0, PIN A, using IRQ #24
796 12:09:04.732401 PCI 10.1, PIN B, using IRQ #25
797 12:09:04.735265 PCI 10.6, PIN C, using IRQ #20
798 12:09:04.739010 PCI 10.7, PIN D, using IRQ #21
799 12:09:04.742040 PCI 11.0, PIN A, using IRQ #26
800 12:09:04.745731 PCI 11.1, PIN B, using IRQ #27
801 12:09:04.748396 PCI 11.2, PIN C, using IRQ #28
802 12:09:04.752245 PCI 11.3, PIN D, using IRQ #29
803 12:09:04.755250 PCI 12.0, PIN A, using IRQ #30
804 12:09:04.758575 PCI 12.6, PIN B, using IRQ #31
805 12:09:04.762090 PCI 12.7, PIN C, using IRQ #22
806 12:09:04.764944 PCI 13.0, PIN A, using IRQ #32
807 12:09:04.768744 PCI 13.1, PIN B, using IRQ #33
808 12:09:04.771949 PCI 13.2, PIN C, using IRQ #34
809 12:09:04.775342 PCI 13.3, PIN D, using IRQ #35
810 12:09:04.778514 PCI 14.0, PIN B, using IRQ #23
811 12:09:04.782023 PCI 14.1, PIN A, using IRQ #36
812 12:09:04.782585 PCI 14.3, PIN C, using IRQ #17
813 12:09:04.785256 PCI 15.0, PIN A, using IRQ #37
814 12:09:04.788555 PCI 15.1, PIN B, using IRQ #38
815 12:09:04.792024 PCI 15.2, PIN C, using IRQ #39
816 12:09:04.795039 PCI 15.3, PIN D, using IRQ #40
817 12:09:04.798300 PCI 16.0, PIN A, using IRQ #18
818 12:09:04.802090 PCI 16.1, PIN B, using IRQ #19
819 12:09:04.805259 PCI 16.2, PIN C, using IRQ #20
820 12:09:04.808280 PCI 16.3, PIN D, using IRQ #21
821 12:09:04.811840 PCI 16.4, PIN A, using IRQ #18
822 12:09:04.815143 PCI 16.5, PIN B, using IRQ #19
823 12:09:04.818226 PCI 17.0, PIN A, using IRQ #22
824 12:09:04.821826 PCI 19.0, PIN A, using IRQ #41
825 12:09:04.825153 PCI 19.1, PIN B, using IRQ #42
826 12:09:04.828069 PCI 19.2, PIN C, using IRQ #43
827 12:09:04.831916 PCI 1C.0, PIN A, using IRQ #16
828 12:09:04.834843 PCI 1C.1, PIN B, using IRQ #17
829 12:09:04.835389 PCI 1C.2, PIN C, using IRQ #18
830 12:09:04.838700 PCI 1C.3, PIN D, using IRQ #19
831 12:09:04.841739 PCI 1C.4, PIN A, using IRQ #16
832 12:09:04.844789 PCI 1C.5, PIN B, using IRQ #17
833 12:09:04.848262 PCI 1C.6, PIN C, using IRQ #18
834 12:09:04.852034 PCI 1C.7, PIN D, using IRQ #19
835 12:09:04.855030 PCI 1D.0, PIN A, using IRQ #16
836 12:09:04.858209 PCI 1D.1, PIN B, using IRQ #17
837 12:09:04.861876 PCI 1D.2, PIN C, using IRQ #18
838 12:09:04.864930 PCI 1D.3, PIN D, using IRQ #19
839 12:09:04.868485 PCI 1E.0, PIN A, using IRQ #23
840 12:09:04.871358 PCI 1E.1, PIN B, using IRQ #20
841 12:09:04.874768 PCI 1E.2, PIN C, using IRQ #44
842 12:09:04.877827 PCI 1E.3, PIN D, using IRQ #45
843 12:09:04.881461 PCI 1F.3, PIN B, using IRQ #22
844 12:09:04.884530 PCI 1F.4, PIN C, using IRQ #23
845 12:09:04.887822 PCI 1F.6, PIN D, using IRQ #20
846 12:09:04.888267 PCI 1F.7, PIN A, using IRQ #21
847 12:09:04.895181 IRQ: Using dynamically assigned PCI IO-APIC IRQs
848 12:09:04.900955 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
849 12:09:05.082390 FSPS returned 0
850 12:09:05.085562 Executing Phase 1 of FspMultiPhaseSiInit
851 12:09:05.095479 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
852 12:09:05.098551 port C0 DISC req: usage 1 usb3 1 usb2 1
853 12:09:05.102034 Raw Buffer output 0 00000111
854 12:09:05.105254 Raw Buffer output 1 00000000
855 12:09:05.109211 pmc_send_ipc_cmd succeeded
856 12:09:05.115394 port C1 DISC req: usage 1 usb3 3 usb2 3
857 12:09:05.115843 Raw Buffer output 0 00000331
858 12:09:05.119004 Raw Buffer output 1 00000000
859 12:09:05.123112 pmc_send_ipc_cmd succeeded
860 12:09:05.126666 Detected 6 core, 8 thread CPU.
861 12:09:05.130545 Detected 6 core, 8 thread CPU.
862 12:09:05.135366 Detected 6 core, 8 thread CPU.
863 12:09:05.139116 Detected 6 core, 8 thread CPU.
864 12:09:05.141911 Detected 6 core, 8 thread CPU.
865 12:09:05.145598 Detected 6 core, 8 thread CPU.
866 12:09:05.148739 Detected 6 core, 8 thread CPU.
867 12:09:05.152103 Detected 6 core, 8 thread CPU.
868 12:09:05.155062 Detected 6 core, 8 thread CPU.
869 12:09:05.158687 Detected 6 core, 8 thread CPU.
870 12:09:05.162171 Detected 6 core, 8 thread CPU.
871 12:09:05.165399 Detected 6 core, 8 thread CPU.
872 12:09:05.168401 Detected 6 core, 8 thread CPU.
873 12:09:05.171924 Detected 6 core, 8 thread CPU.
874 12:09:05.175328 Detected 6 core, 8 thread CPU.
875 12:09:05.178436 Detected 6 core, 8 thread CPU.
876 12:09:05.181719 Detected 6 core, 8 thread CPU.
877 12:09:05.185593 Detected 6 core, 8 thread CPU.
878 12:09:05.188409 Detected 6 core, 8 thread CPU.
879 12:09:05.192322 Detected 6 core, 8 thread CPU.
880 12:09:05.194999 Detected 6 core, 8 thread CPU.
881 12:09:05.198127 Detected 6 core, 8 thread CPU.
882 12:09:05.477771 Detected 6 core, 8 thread CPU.
883 12:09:05.481426 Detected 6 core, 8 thread CPU.
884 12:09:05.484456 Detected 6 core, 8 thread CPU.
885 12:09:05.488018 Detected 6 core, 8 thread CPU.
886 12:09:05.490873 Detected 6 core, 8 thread CPU.
887 12:09:05.494766 Detected 6 core, 8 thread CPU.
888 12:09:05.497570 Detected 6 core, 8 thread CPU.
889 12:09:05.501058 Detected 6 core, 8 thread CPU.
890 12:09:05.504655 Detected 6 core, 8 thread CPU.
891 12:09:05.508128 Detected 6 core, 8 thread CPU.
892 12:09:05.510912 Detected 6 core, 8 thread CPU.
893 12:09:05.514209 Detected 6 core, 8 thread CPU.
894 12:09:05.517603 Detected 6 core, 8 thread CPU.
895 12:09:05.520821 Detected 6 core, 8 thread CPU.
896 12:09:05.524363 Detected 6 core, 8 thread CPU.
897 12:09:05.527936 Detected 6 core, 8 thread CPU.
898 12:09:05.531243 Detected 6 core, 8 thread CPU.
899 12:09:05.534146 Detected 6 core, 8 thread CPU.
900 12:09:05.537466 Detected 6 core, 8 thread CPU.
901 12:09:05.538106 Detected 6 core, 8 thread CPU.
902 12:09:05.541477 Display FSP Version Info HOB
903 12:09:05.544733 Reference Code - CPU = c.0.65.70
904 12:09:05.548327 uCode Version = 0.0.4.23
905 12:09:05.551893 TXT ACM version = ff.ff.ff.ffff
906 12:09:05.554642 Reference Code - ME = c.0.65.70
907 12:09:05.558451 MEBx version = 0.0.0.0
908 12:09:05.561363 ME Firmware Version = Lite SKU
909 12:09:05.565236 Reference Code - PCH = c.0.65.70
910 12:09:05.568039 PCH-CRID Status = Disabled
911 12:09:05.571766 PCH-CRID Original Value = ff.ff.ff.ffff
912 12:09:05.575758 PCH-CRID New Value = ff.ff.ff.ffff
913 12:09:05.578372 OPROM - RST - RAID = ff.ff.ff.ffff
914 12:09:05.581522 PCH Hsio Version = 4.0.0.0
915 12:09:05.584781 Reference Code - SA - System Agent = c.0.65.70
916 12:09:05.588462 Reference Code - MRC = 0.0.3.80
917 12:09:05.591571 SA - PCIe Version = c.0.65.70
918 12:09:05.594768 SA-CRID Status = Disabled
919 12:09:05.598157 SA-CRID Original Value = 0.0.0.4
920 12:09:05.601791 SA-CRID New Value = 0.0.0.4
921 12:09:05.602369 OPROM - VBIOS = ff.ff.ff.ffff
922 12:09:05.608711 IO Manageability Engine FW Version = 24.0.4.0
923 12:09:05.611407 PHY Build Version = 0.0.0.2016
924 12:09:05.615392 Thunderbolt(TM) FW Version = 0.0.0.0
925 12:09:05.621650 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
926 12:09:05.628129 BS: BS_DEV_INIT_CHIPS run times (exec / console): 481 / 507 ms
927 12:09:05.628650 Enumerating buses...
928 12:09:05.634728 Show all devs... Before device enumeration.
929 12:09:05.635150 Root Device: enabled 1
930 12:09:05.638264 CPU_CLUSTER: 0: enabled 1
931 12:09:05.641813 DOMAIN: 0000: enabled 1
932 12:09:05.642430 GPIO: 0: enabled 1
933 12:09:05.644601 PCI: 00:00.0: enabled 1
934 12:09:05.648396 PCI: 00:01.0: enabled 0
935 12:09:05.651447 PCI: 00:01.1: enabled 0
936 12:09:05.651873 PCI: 00:02.0: enabled 1
937 12:09:05.654503 PCI: 00:04.0: enabled 1
938 12:09:05.658138 PCI: 00:05.0: enabled 0
939 12:09:05.661312 PCI: 00:06.0: enabled 1
940 12:09:05.661733 PCI: 00:06.2: enabled 0
941 12:09:05.664677 PCI: 00:07.0: enabled 0
942 12:09:05.668156 PCI: 00:07.1: enabled 0
943 12:09:05.671210 PCI: 00:07.2: enabled 0
944 12:09:05.671632 PCI: 00:07.3: enabled 0
945 12:09:05.675046 PCI: 00:08.0: enabled 0
946 12:09:05.677806 PCI: 00:09.0: enabled 0
947 12:09:05.681400 PCI: 00:0a.0: enabled 1
948 12:09:05.681944 PCI: 00:0d.0: enabled 1
949 12:09:05.685250 PCI: 00:0d.1: enabled 0
950 12:09:05.687945 PCI: 00:0d.2: enabled 0
951 12:09:05.688470 PCI: 00:0d.3: enabled 0
952 12:09:05.691789 PCI: 00:0e.0: enabled 0
953 12:09:05.694602 PCI: 00:10.0: enabled 0
954 12:09:05.698107 PCI: 00:10.1: enabled 0
955 12:09:05.698626 PCI: 00:10.6: enabled 0
956 12:09:05.701651 PCI: 00:10.7: enabled 0
957 12:09:05.704463 PCI: 00:12.0: enabled 0
958 12:09:05.708124 PCI: 00:12.6: enabled 0
959 12:09:05.708547 PCI: 00:12.7: enabled 0
960 12:09:05.711402 PCI: 00:13.0: enabled 0
961 12:09:05.714994 PCI: 00:14.0: enabled 1
962 12:09:05.717990 PCI: 00:14.1: enabled 0
963 12:09:05.718513 PCI: 00:14.2: enabled 1
964 12:09:05.721443 PCI: 00:14.3: enabled 1
965 12:09:05.724692 PCI: 00:15.0: enabled 1
966 12:09:05.725218 PCI: 00:15.1: enabled 1
967 12:09:05.728544 PCI: 00:15.2: enabled 0
968 12:09:05.731517 PCI: 00:15.3: enabled 1
969 12:09:05.734788 PCI: 00:16.0: enabled 1
970 12:09:05.735224 PCI: 00:16.1: enabled 0
971 12:09:05.737942 PCI: 00:16.2: enabled 0
972 12:09:05.741592 PCI: 00:16.3: enabled 0
973 12:09:05.745012 PCI: 00:16.4: enabled 0
974 12:09:05.745555 PCI: 00:16.5: enabled 0
975 12:09:05.748293 PCI: 00:17.0: enabled 1
976 12:09:05.751282 PCI: 00:19.0: enabled 0
977 12:09:05.754780 PCI: 00:19.1: enabled 1
978 12:09:05.755306 PCI: 00:19.2: enabled 0
979 12:09:05.758093 PCI: 00:1a.0: enabled 0
980 12:09:05.761119 PCI: 00:1c.0: enabled 0
981 12:09:05.761540 PCI: 00:1c.1: enabled 0
982 12:09:05.764935 PCI: 00:1c.2: enabled 0
983 12:09:05.767687 PCI: 00:1c.3: enabled 0
984 12:09:05.771228 PCI: 00:1c.4: enabled 0
985 12:09:05.771656 PCI: 00:1c.5: enabled 0
986 12:09:05.774505 PCI: 00:1c.6: enabled 0
987 12:09:05.777713 PCI: 00:1c.7: enabled 0
988 12:09:05.780972 PCI: 00:1d.0: enabled 0
989 12:09:05.781402 PCI: 00:1d.1: enabled 0
990 12:09:05.784597 PCI: 00:1d.2: enabled 0
991 12:09:05.787622 PCI: 00:1d.3: enabled 0
992 12:09:05.791118 PCI: 00:1e.0: enabled 1
993 12:09:05.791797 PCI: 00:1e.1: enabled 0
994 12:09:05.794355 PCI: 00:1e.2: enabled 0
995 12:09:05.797765 PCI: 00:1e.3: enabled 1
996 12:09:05.801462 PCI: 00:1f.0: enabled 1
997 12:09:05.802200 PCI: 00:1f.1: enabled 0
998 12:09:05.804284 PCI: 00:1f.2: enabled 1
999 12:09:05.807693 PCI: 00:1f.3: enabled 1
1000 12:09:05.808120 PCI: 00:1f.4: enabled 0
1001 12:09:05.811434 PCI: 00:1f.5: enabled 1
1002 12:09:05.814521 PCI: 00:1f.6: enabled 0
1003 12:09:05.817793 PCI: 00:1f.7: enabled 0
1004 12:09:05.818522 GENERIC: 0.0: enabled 1
1005 12:09:05.821189 GENERIC: 0.0: enabled 1
1006 12:09:05.824332 GENERIC: 1.0: enabled 1
1007 12:09:05.827940 GENERIC: 0.0: enabled 1
1008 12:09:05.828464 GENERIC: 1.0: enabled 1
1009 12:09:05.830718 USB0 port 0: enabled 1
1010 12:09:05.834268 USB0 port 0: enabled 1
1011 12:09:05.834901 GENERIC: 0.0: enabled 1
1012 12:09:05.837707 I2C: 00:1a: enabled 1
1013 12:09:05.840861 I2C: 00:31: enabled 1
1014 12:09:05.844335 I2C: 00:32: enabled 1
1015 12:09:05.844861 I2C: 00:50: enabled 1
1016 12:09:05.848130 I2C: 00:10: enabled 1
1017 12:09:05.850812 I2C: 00:15: enabled 1
1018 12:09:05.851344 I2C: 00:2c: enabled 1
1019 12:09:05.854378 GENERIC: 0.0: enabled 1
1020 12:09:05.857810 SPI: 00: enabled 1
1021 12:09:05.858367 PNP: 0c09.0: enabled 1
1022 12:09:05.861530 GENERIC: 0.0: enabled 1
1023 12:09:05.864721 USB3 port 0: enabled 1
1024 12:09:05.865243 USB3 port 1: enabled 0
1025 12:09:05.867538 USB3 port 2: enabled 1
1026 12:09:05.871314 USB3 port 3: enabled 0
1027 12:09:05.874617 USB2 port 0: enabled 1
1028 12:09:05.875140 USB2 port 1: enabled 0
1029 12:09:05.877578 USB2 port 2: enabled 1
1030 12:09:05.880942 USB2 port 3: enabled 0
1031 12:09:05.881485 USB2 port 4: enabled 0
1032 12:09:05.884547 USB2 port 5: enabled 1
1033 12:09:05.887719 USB2 port 6: enabled 0
1034 12:09:05.888284 USB2 port 7: enabled 0
1035 12:09:05.890681 USB2 port 8: enabled 1
1036 12:09:05.894343 USB2 port 9: enabled 1
1037 12:09:05.897706 USB3 port 0: enabled 1
1038 12:09:05.898267 USB3 port 1: enabled 0
1039 12:09:05.900731 USB3 port 2: enabled 0
1040 12:09:05.904186 USB3 port 3: enabled 0
1041 12:09:05.904707 GENERIC: 0.0: enabled 1
1042 12:09:05.907589 GENERIC: 1.0: enabled 1
1043 12:09:05.910574 APIC: 00: enabled 1
1044 12:09:05.910993 APIC: 14: enabled 1
1045 12:09:05.913824 APIC: 16: enabled 1
1046 12:09:05.917618 APIC: 10: enabled 1
1047 12:09:05.918194 APIC: 12: enabled 1
1048 12:09:05.920559 APIC: 09: enabled 1
1049 12:09:05.920977 APIC: 01: enabled 1
1050 12:09:05.924441 APIC: 08: enabled 1
1051 12:09:05.927705 Compare with tree...
1052 12:09:05.928225 Root Device: enabled 1
1053 12:09:05.930658 CPU_CLUSTER: 0: enabled 1
1054 12:09:05.934204 APIC: 00: enabled 1
1055 12:09:05.937574 APIC: 14: enabled 1
1056 12:09:05.938139 APIC: 16: enabled 1
1057 12:09:05.940608 APIC: 10: enabled 1
1058 12:09:05.944585 APIC: 12: enabled 1
1059 12:09:05.945109 APIC: 09: enabled 1
1060 12:09:05.947600 APIC: 01: enabled 1
1061 12:09:05.950514 APIC: 08: enabled 1
1062 12:09:05.951036 DOMAIN: 0000: enabled 1
1063 12:09:05.954392 GPIO: 0: enabled 1
1064 12:09:05.957229 PCI: 00:00.0: enabled 1
1065 12:09:05.960897 PCI: 00:01.0: enabled 0
1066 12:09:05.961418 PCI: 00:01.1: enabled 0
1067 12:09:05.963535 PCI: 00:02.0: enabled 1
1068 12:09:05.967199 PCI: 00:04.0: enabled 1
1069 12:09:05.970867 GENERIC: 0.0: enabled 1
1070 12:09:05.973937 PCI: 00:05.0: enabled 0
1071 12:09:05.974464 PCI: 00:06.0: enabled 1
1072 12:09:05.977527 PCI: 00:06.2: enabled 0
1073 12:09:05.980515 PCI: 00:08.0: enabled 0
1074 12:09:05.984156 PCI: 00:09.0: enabled 0
1075 12:09:05.986970 PCI: 00:0a.0: enabled 1
1076 12:09:05.987392 PCI: 00:0d.0: enabled 1
1077 12:09:05.990726 USB0 port 0: enabled 1
1078 12:09:05.993944 USB3 port 0: enabled 1
1079 12:09:05.997361 USB3 port 1: enabled 0
1080 12:09:06.000296 USB3 port 2: enabled 1
1081 12:09:06.003829 USB3 port 3: enabled 0
1082 12:09:06.004355 PCI: 00:0d.1: enabled 0
1083 12:09:06.007041 PCI: 00:0d.2: enabled 0
1084 12:09:06.010281 PCI: 00:0d.3: enabled 0
1085 12:09:06.013733 PCI: 00:0e.0: enabled 0
1086 12:09:06.016878 PCI: 00:10.0: enabled 0
1087 12:09:06.017495 PCI: 00:10.1: enabled 0
1088 12:09:06.020504 PCI: 00:10.6: enabled 0
1089 12:09:06.023511 PCI: 00:10.7: enabled 0
1090 12:09:06.027061 PCI: 00:12.0: enabled 0
1091 12:09:06.027479 PCI: 00:12.6: enabled 0
1092 12:09:06.030355 PCI: 00:12.7: enabled 0
1093 12:09:06.033488 PCI: 00:13.0: enabled 0
1094 12:09:06.036933 PCI: 00:14.0: enabled 1
1095 12:09:06.040475 USB0 port 0: enabled 1
1096 12:09:06.040999 USB2 port 0: enabled 1
1097 12:09:06.043775 USB2 port 1: enabled 0
1098 12:09:06.047349 USB2 port 2: enabled 1
1099 12:09:06.050172 USB2 port 3: enabled 0
1100 12:09:06.053441 USB2 port 4: enabled 0
1101 12:09:06.056621 USB2 port 5: enabled 1
1102 12:09:06.057044 USB2 port 6: enabled 0
1103 12:09:06.060024 USB2 port 7: enabled 0
1104 12:09:06.063863 USB2 port 8: enabled 1
1105 12:09:06.066668 USB2 port 9: enabled 1
1106 12:09:06.070247 USB3 port 0: enabled 1
1107 12:09:06.073325 USB3 port 1: enabled 0
1108 12:09:06.073748 USB3 port 2: enabled 0
1109 12:09:06.076808 USB3 port 3: enabled 0
1110 12:09:06.079990 PCI: 00:14.1: enabled 0
1111 12:09:06.083807 PCI: 00:14.2: enabled 1
1112 12:09:06.086721 PCI: 00:14.3: enabled 1
1113 12:09:06.087148 GENERIC: 0.0: enabled 1
1114 12:09:06.090299 PCI: 00:15.0: enabled 1
1115 12:09:06.093643 I2C: 00:1a: enabled 1
1116 12:09:06.096426 I2C: 00:31: enabled 1
1117 12:09:06.097165 I2C: 00:32: enabled 1
1118 12:09:06.099976 PCI: 00:15.1: enabled 1
1119 12:09:06.103390 I2C: 00:50: enabled 1
1120 12:09:06.106724 PCI: 00:15.2: enabled 0
1121 12:09:06.110191 PCI: 00:15.3: enabled 1
1122 12:09:06.110615 I2C: 00:10: enabled 1
1123 12:09:06.113545 PCI: 00:16.0: enabled 1
1124 12:09:06.116361 PCI: 00:16.1: enabled 0
1125 12:09:06.119810 PCI: 00:16.2: enabled 0
1126 12:09:06.123436 PCI: 00:16.3: enabled 0
1127 12:09:06.124390 PCI: 00:16.4: enabled 0
1128 12:09:06.127048 PCI: 00:16.5: enabled 0
1129 12:09:06.129748 PCI: 00:17.0: enabled 1
1130 12:09:06.133547 PCI: 00:19.0: enabled 0
1131 12:09:06.136617 PCI: 00:19.1: enabled 1
1132 12:09:06.137125 I2C: 00:15: enabled 1
1133 12:09:06.140390 I2C: 00:2c: enabled 1
1134 12:09:06.143197 PCI: 00:19.2: enabled 0
1135 12:09:06.146299 PCI: 00:1a.0: enabled 0
1136 12:09:06.146725 PCI: 00:1e.0: enabled 1
1137 12:09:06.149960 PCI: 00:1e.1: enabled 0
1138 12:09:06.153068 PCI: 00:1e.2: enabled 0
1139 12:09:06.156341 PCI: 00:1e.3: enabled 1
1140 12:09:06.160113 SPI: 00: enabled 1
1141 12:09:06.160633 PCI: 00:1f.0: enabled 1
1142 12:09:06.163484 PNP: 0c09.0: enabled 1
1143 12:09:06.166371 PCI: 00:1f.1: enabled 0
1144 12:09:06.169936 PCI: 00:1f.2: enabled 1
1145 12:09:06.170353 GENERIC: 0.0: enabled 1
1146 12:09:06.173026 GENERIC: 0.0: enabled 1
1147 12:09:06.176739 GENERIC: 1.0: enabled 1
1148 12:09:06.179557 PCI: 00:1f.3: enabled 1
1149 12:09:06.183407 PCI: 00:1f.4: enabled 0
1150 12:09:06.186540 PCI: 00:1f.5: enabled 1
1151 12:09:06.187058 PCI: 00:1f.6: enabled 0
1152 12:09:06.189800 PCI: 00:1f.7: enabled 0
1153 12:09:06.193513 Root Device scanning...
1154 12:09:06.196458 scan_static_bus for Root Device
1155 12:09:06.199818 CPU_CLUSTER: 0 enabled
1156 12:09:06.200232 DOMAIN: 0000 enabled
1157 12:09:06.202996 DOMAIN: 0000 scanning...
1158 12:09:06.206853 PCI: pci_scan_bus for bus 00
1159 12:09:06.209930 PCI: 00:00.0 [8086/0000] ops
1160 12:09:06.213237 PCI: 00:00.0 [8086/4609] enabled
1161 12:09:06.216498 PCI: 00:02.0 [8086/0000] bus ops
1162 12:09:06.219716 PCI: 00:02.0 [8086/46b3] enabled
1163 12:09:06.223009 PCI: 00:04.0 [8086/0000] bus ops
1164 12:09:06.226315 PCI: 00:04.0 [8086/461d] enabled
1165 12:09:06.229636 PCI: 00:06.0 [8086/0000] bus ops
1166 12:09:06.232681 PCI: 00:06.0 [8086/464d] enabled
1167 12:09:06.236227 PCI: 00:08.0 [8086/464f] disabled
1168 12:09:06.239592 PCI: 00:0a.0 [8086/467d] enabled
1169 12:09:06.243069 PCI: 00:0d.0 [8086/0000] bus ops
1170 12:09:06.246141 PCI: 00:0d.0 [8086/461e] enabled
1171 12:09:06.249940 PCI: 00:14.0 [8086/0000] bus ops
1172 12:09:06.252670 PCI: 00:14.0 [8086/51ed] enabled
1173 12:09:06.256228 PCI: 00:14.2 [8086/51ef] enabled
1174 12:09:06.259895 PCI: 00:14.3 [8086/0000] bus ops
1175 12:09:06.262785 PCI: 00:14.3 [8086/51f0] enabled
1176 12:09:06.266080 PCI: 00:15.0 [8086/0000] bus ops
1177 12:09:06.269334 PCI: 00:15.0 [8086/51e8] enabled
1178 12:09:06.272646 PCI: 00:15.1 [8086/0000] bus ops
1179 12:09:06.276167 PCI: 00:15.1 [8086/51e9] enabled
1180 12:09:06.279152 PCI: 00:15.2 [8086/0000] bus ops
1181 12:09:06.282692 PCI: 00:15.2 [8086/51ea] disabled
1182 12:09:06.286069 PCI: 00:15.3 [8086/0000] bus ops
1183 12:09:06.289535 PCI: 00:15.3 [8086/51eb] enabled
1184 12:09:06.292580 PCI: 00:16.0 [8086/0000] ops
1185 12:09:06.296164 PCI: 00:16.0 [8086/51e0] enabled
1186 12:09:06.302667 PCI: Static device PCI: 00:17.0 not found, disabling it.
1187 12:09:06.305943 PCI: 00:19.0 [8086/0000] bus ops
1188 12:09:06.309111 PCI: 00:19.0 [8086/51c5] disabled
1189 12:09:06.312487 PCI: 00:19.1 [8086/0000] bus ops
1190 12:09:06.315946 PCI: 00:19.1 [8086/51c6] enabled
1191 12:09:06.319342 PCI: 00:1e.0 [8086/0000] ops
1192 12:09:06.322244 PCI: 00:1e.0 [8086/51a8] enabled
1193 12:09:06.326068 PCI: 00:1e.3 [8086/0000] bus ops
1194 12:09:06.329426 PCI: 00:1e.3 [8086/51ab] enabled
1195 12:09:06.332445 PCI: 00:1f.0 [8086/0000] bus ops
1196 12:09:06.335513 PCI: 00:1f.0 [8086/5182] enabled
1197 12:09:06.335937 RTC Init
1198 12:09:06.342643 Set power on after power failure.
1199 12:09:06.343158 Disabling Deep S3
1200 12:09:06.345981 Disabling Deep S3
1201 12:09:06.346400 Disabling Deep S4
1202 12:09:06.349152 Disabling Deep S4
1203 12:09:06.349663 Disabling Deep S5
1204 12:09:06.352712 Disabling Deep S5
1205 12:09:06.356480 PCI: 00:1f.2 [0000/0000] hidden
1206 12:09:06.359853 PCI: 00:1f.3 [8086/0000] bus ops
1207 12:09:06.362780 PCI: 00:1f.3 [8086/51c8] enabled
1208 12:09:06.366363 PCI: 00:1f.5 [8086/0000] bus ops
1209 12:09:06.369629 PCI: 00:1f.5 [8086/51a4] enabled
1210 12:09:06.370091 GPIO: 0 enabled
1211 12:09:06.372990 PCI: Leftover static devices:
1212 12:09:06.376592 PCI: 00:01.0
1213 12:09:06.377104 PCI: 00:01.1
1214 12:09:06.379264 PCI: 00:05.0
1215 12:09:06.379904 PCI: 00:06.2
1216 12:09:06.380483 PCI: 00:09.0
1217 12:09:06.382756 PCI: 00:0d.1
1218 12:09:06.383179 PCI: 00:0d.2
1219 12:09:06.385907 PCI: 00:0d.3
1220 12:09:06.386329 PCI: 00:0e.0
1221 12:09:06.386661 PCI: 00:10.0
1222 12:09:06.389364 PCI: 00:10.1
1223 12:09:06.389783 PCI: 00:10.6
1224 12:09:06.392591 PCI: 00:10.7
1225 12:09:06.393010 PCI: 00:12.0
1226 12:09:06.393340 PCI: 00:12.6
1227 12:09:06.395891 PCI: 00:12.7
1228 12:09:06.396311 PCI: 00:13.0
1229 12:09:06.399519 PCI: 00:14.1
1230 12:09:06.399941 PCI: 00:16.1
1231 12:09:06.403071 PCI: 00:16.2
1232 12:09:06.403585 PCI: 00:16.3
1233 12:09:06.403922 PCI: 00:16.4
1234 12:09:06.405810 PCI: 00:16.5
1235 12:09:06.406272 PCI: 00:17.0
1236 12:09:06.409383 PCI: 00:19.2
1237 12:09:06.409802 PCI: 00:1a.0
1238 12:09:06.410211 PCI: 00:1e.1
1239 12:09:06.412692 PCI: 00:1e.2
1240 12:09:06.413207 PCI: 00:1f.1
1241 12:09:06.416033 PCI: 00:1f.4
1242 12:09:06.416455 PCI: 00:1f.6
1243 12:09:06.416786 PCI: 00:1f.7
1244 12:09:06.419447 PCI: Check your devicetree.cb.
1245 12:09:06.422762 PCI: 00:02.0 scanning...
1246 12:09:06.426099 scan_generic_bus for PCI: 00:02.0
1247 12:09:06.429182 scan_generic_bus for PCI: 00:02.0 done
1248 12:09:06.435834 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1249 12:09:06.438970 PCI: 00:04.0 scanning...
1250 12:09:06.442487 scan_generic_bus for PCI: 00:04.0
1251 12:09:06.442909 GENERIC: 0.0 enabled
1252 12:09:06.449511 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1253 12:09:06.455794 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1254 12:09:06.456418 PCI: 00:06.0 scanning...
1255 12:09:06.459392 do_pci_scan_bridge for PCI: 00:06.0
1256 12:09:06.462420 PCI: pci_scan_bus for bus 01
1257 12:09:06.465832 PCI: 01:00.0 [15b7/5009] enabled
1258 12:09:06.468958 Enabling Common Clock Configuration
1259 12:09:06.476014 L1 Sub-State supported from root port 6
1260 12:09:06.476527 L1 Sub-State Support = 0x5
1261 12:09:06.479572 CommonModeRestoreTime = 0x6e
1262 12:09:06.486232 Power On Value = 0x5, Power On Scale = 0x2
1263 12:09:06.486751 ASPM: Enabled L1
1264 12:09:06.489414 PCIe: Max_Payload_Size adjusted to 256
1265 12:09:06.492285 PCI: 01:00.0: Enabled LTR
1266 12:09:06.496089 PCI: 01:00.0: Programmed LTR max latencies
1267 12:09:06.502724 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1268 12:09:06.505567 PCI: 00:0d.0 scanning...
1269 12:09:06.509159 scan_static_bus for PCI: 00:0d.0
1270 12:09:06.509589 USB0 port 0 enabled
1271 12:09:06.512291 USB0 port 0 scanning...
1272 12:09:06.516172 scan_static_bus for USB0 port 0
1273 12:09:06.519267 USB3 port 0 enabled
1274 12:09:06.519825 USB3 port 1 disabled
1275 12:09:06.522183 USB3 port 2 enabled
1276 12:09:06.522653 USB3 port 3 disabled
1277 12:09:06.525613 USB3 port 0 scanning...
1278 12:09:06.529185 scan_static_bus for USB3 port 0
1279 12:09:06.532172 scan_static_bus for USB3 port 0 done
1280 12:09:06.538926 scan_bus: bus USB3 port 0 finished in 6 msecs
1281 12:09:06.539355 USB3 port 2 scanning...
1282 12:09:06.542412 scan_static_bus for USB3 port 2
1283 12:09:06.546067 scan_static_bus for USB3 port 2 done
1284 12:09:06.552716 scan_bus: bus USB3 port 2 finished in 6 msecs
1285 12:09:06.555655 scan_static_bus for USB0 port 0 done
1286 12:09:06.559257 scan_bus: bus USB0 port 0 finished in 43 msecs
1287 12:09:06.565907 scan_static_bus for PCI: 00:0d.0 done
1288 12:09:06.568974 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1289 12:09:06.572456 PCI: 00:14.0 scanning...
1290 12:09:06.575494 scan_static_bus for PCI: 00:14.0
1291 12:09:06.576009 USB0 port 0 enabled
1292 12:09:06.578895 USB0 port 0 scanning...
1293 12:09:06.582309 scan_static_bus for USB0 port 0
1294 12:09:06.585428 USB2 port 0 enabled
1295 12:09:06.585892 USB2 port 1 disabled
1296 12:09:06.589185 USB2 port 2 enabled
1297 12:09:06.592321 USB2 port 3 disabled
1298 12:09:06.592927 USB2 port 4 disabled
1299 12:09:06.595592 USB2 port 5 enabled
1300 12:09:06.596015 USB2 port 6 disabled
1301 12:09:06.598732 USB2 port 7 disabled
1302 12:09:06.602528 USB2 port 8 enabled
1303 12:09:06.603081 USB2 port 9 enabled
1304 12:09:06.605318 USB3 port 0 enabled
1305 12:09:06.608658 USB3 port 1 disabled
1306 12:09:06.609269 USB3 port 2 disabled
1307 12:09:06.612124 USB3 port 3 disabled
1308 12:09:06.615899 USB2 port 0 scanning...
1309 12:09:06.618777 scan_static_bus for USB2 port 0
1310 12:09:06.622182 scan_static_bus for USB2 port 0 done
1311 12:09:06.625701 scan_bus: bus USB2 port 0 finished in 6 msecs
1312 12:09:06.628703 USB2 port 2 scanning...
1313 12:09:06.632168 scan_static_bus for USB2 port 2
1314 12:09:06.635527 scan_static_bus for USB2 port 2 done
1315 12:09:06.638555 scan_bus: bus USB2 port 2 finished in 6 msecs
1316 12:09:06.642249 USB2 port 5 scanning...
1317 12:09:06.645546 scan_static_bus for USB2 port 5
1318 12:09:06.648822 scan_static_bus for USB2 port 5 done
1319 12:09:06.655444 scan_bus: bus USB2 port 5 finished in 6 msecs
1320 12:09:06.655972 USB2 port 8 scanning...
1321 12:09:06.658637 scan_static_bus for USB2 port 8
1322 12:09:06.661715 scan_static_bus for USB2 port 8 done
1323 12:09:06.668406 scan_bus: bus USB2 port 8 finished in 6 msecs
1324 12:09:06.668923 USB2 port 9 scanning...
1325 12:09:06.671813 scan_static_bus for USB2 port 9
1326 12:09:06.678562 scan_static_bus for USB2 port 9 done
1327 12:09:06.682065 scan_bus: bus USB2 port 9 finished in 6 msecs
1328 12:09:06.685553 USB3 port 0 scanning...
1329 12:09:06.688654 scan_static_bus for USB3 port 0
1330 12:09:06.692312 scan_static_bus for USB3 port 0 done
1331 12:09:06.695329 scan_bus: bus USB3 port 0 finished in 6 msecs
1332 12:09:06.698736 scan_static_bus for USB0 port 0 done
1333 12:09:06.705033 scan_bus: bus USB0 port 0 finished in 120 msecs
1334 12:09:06.708657 scan_static_bus for PCI: 00:14.0 done
1335 12:09:06.711518 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1336 12:09:06.714842 PCI: 00:14.3 scanning...
1337 12:09:06.718403 scan_static_bus for PCI: 00:14.3
1338 12:09:06.721451 GENERIC: 0.0 enabled
1339 12:09:06.724878 scan_static_bus for PCI: 00:14.3 done
1340 12:09:06.728493 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1341 12:09:06.731593 PCI: 00:15.0 scanning...
1342 12:09:06.734891 scan_static_bus for PCI: 00:15.0
1343 12:09:06.738547 I2C: 00:1a enabled
1344 12:09:06.738962 I2C: 00:31 enabled
1345 12:09:06.741799 I2C: 00:32 enabled
1346 12:09:06.745031 scan_static_bus for PCI: 00:15.0 done
1347 12:09:06.747976 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1348 12:09:06.751506 PCI: 00:15.1 scanning...
1349 12:09:06.754627 scan_static_bus for PCI: 00:15.1
1350 12:09:06.758337 I2C: 00:50 enabled
1351 12:09:06.761308 scan_static_bus for PCI: 00:15.1 done
1352 12:09:06.764602 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1353 12:09:06.768170 PCI: 00:15.3 scanning...
1354 12:09:06.771452 scan_static_bus for PCI: 00:15.3
1355 12:09:06.774598 I2C: 00:10 enabled
1356 12:09:06.777934 scan_static_bus for PCI: 00:15.3 done
1357 12:09:06.781541 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1358 12:09:06.784512 PCI: 00:19.1 scanning...
1359 12:09:06.787972 scan_static_bus for PCI: 00:19.1
1360 12:09:06.791380 I2C: 00:15 enabled
1361 12:09:06.791802 I2C: 00:2c enabled
1362 12:09:06.794509 scan_static_bus for PCI: 00:19.1 done
1363 12:09:06.801290 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1364 12:09:06.804461 PCI: 00:1e.3 scanning...
1365 12:09:06.807855 scan_generic_bus for PCI: 00:1e.3
1366 12:09:06.808295 SPI: 00 enabled
1367 12:09:06.814843 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1368 12:09:06.818178 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1369 12:09:06.821371 PCI: 00:1f.0 scanning...
1370 12:09:06.825049 scan_static_bus for PCI: 00:1f.0
1371 12:09:06.828466 PNP: 0c09.0 enabled
1372 12:09:06.828984 PNP: 0c09.0 scanning...
1373 12:09:06.831542 scan_static_bus for PNP: 0c09.0
1374 12:09:06.837998 scan_static_bus for PNP: 0c09.0 done
1375 12:09:06.841157 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1376 12:09:06.844943 scan_static_bus for PCI: 00:1f.0 done
1377 12:09:06.851330 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1378 12:09:06.851922 PCI: 00:1f.2 scanning...
1379 12:09:06.854314 scan_static_bus for PCI: 00:1f.2
1380 12:09:06.858520 GENERIC: 0.0 enabled
1381 12:09:06.861330 GENERIC: 0.0 scanning...
1382 12:09:06.864898 scan_static_bus for GENERIC: 0.0
1383 12:09:06.865425 GENERIC: 0.0 enabled
1384 12:09:06.868177 GENERIC: 1.0 enabled
1385 12:09:06.871244 scan_static_bus for GENERIC: 0.0 done
1386 12:09:06.877932 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1387 12:09:06.881316 scan_static_bus for PCI: 00:1f.2 done
1388 12:09:06.884805 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1389 12:09:06.887623 PCI: 00:1f.3 scanning...
1390 12:09:06.891179 scan_static_bus for PCI: 00:1f.3
1391 12:09:06.894651 scan_static_bus for PCI: 00:1f.3 done
1392 12:09:06.898030 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1393 12:09:06.901500 PCI: 00:1f.5 scanning...
1394 12:09:06.904270 scan_generic_bus for PCI: 00:1f.5
1395 12:09:06.908135 scan_generic_bus for PCI: 00:1f.5 done
1396 12:09:06.914579 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1397 12:09:06.917654 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1398 12:09:06.921481 scan_static_bus for Root Device done
1399 12:09:06.928094 scan_bus: bus Root Device finished in 729 msecs
1400 12:09:06.928627 done
1401 12:09:06.934409 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1402 12:09:06.941142 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1403 12:09:06.944765 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1404 12:09:06.951379 SPI flash protection: WPSW=0 SRP0=0
1405 12:09:06.954700 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1406 12:09:06.961218 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1407 12:09:06.964761 found VGA at PCI: 00:02.0
1408 12:09:06.967646 Setting up VGA for PCI: 00:02.0
1409 12:09:06.970740 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1410 12:09:06.977434 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1411 12:09:06.977879 Allocating resources...
1412 12:09:06.980961 Reading resources...
1413 12:09:06.984179 Root Device read_resources bus 0 link: 0
1414 12:09:06.990688 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1415 12:09:06.994305 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1416 12:09:06.997582 DOMAIN: 0000 read_resources bus 0 link: 0
1417 12:09:07.004183 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1418 12:09:07.010678 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1419 12:09:07.017460 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1420 12:09:07.024223 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1421 12:09:07.030525 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1422 12:09:07.037209 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1423 12:09:07.040945 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1424 12:09:07.047384 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1425 12:09:07.054165 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1426 12:09:07.060766 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1427 12:09:07.067550 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1428 12:09:07.073999 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1429 12:09:07.080605 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1430 12:09:07.087006 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1431 12:09:07.093885 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1432 12:09:07.100309 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1433 12:09:07.106637 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1434 12:09:07.113739 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1435 12:09:07.116818 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1436 12:09:07.123701 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1437 12:09:07.130502 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1438 12:09:07.133594 PCI: 00:04.0 read_resources bus 1 link: 0
1439 12:09:07.140136 PCI: 00:04.0 read_resources bus 1 link: 0 done
1440 12:09:07.143821 PCI: 00:06.0 read_resources bus 1 link: 0
1441 12:09:07.150261 PCI: 00:06.0 read_resources bus 1 link: 0 done
1442 12:09:07.153232 PCI: 00:0d.0 read_resources bus 0 link: 0
1443 12:09:07.156920 USB0 port 0 read_resources bus 0 link: 0
1444 12:09:07.160076 USB0 port 0 read_resources bus 0 link: 0 done
1445 12:09:07.166465 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1446 12:09:07.170012 PCI: 00:14.0 read_resources bus 0 link: 0
1447 12:09:07.173475 USB0 port 0 read_resources bus 0 link: 0
1448 12:09:07.179961 USB0 port 0 read_resources bus 0 link: 0 done
1449 12:09:07.183521 PCI: 00:14.0 read_resources bus 0 link: 0 done
1450 12:09:07.189716 PCI: 00:14.3 read_resources bus 0 link: 0
1451 12:09:07.193194 PCI: 00:14.3 read_resources bus 0 link: 0 done
1452 12:09:07.196237 PCI: 00:15.0 read_resources bus 0 link: 0
1453 12:09:07.203405 PCI: 00:15.0 read_resources bus 0 link: 0 done
1454 12:09:07.206592 PCI: 00:15.1 read_resources bus 0 link: 0
1455 12:09:07.209777 PCI: 00:15.1 read_resources bus 0 link: 0 done
1456 12:09:07.216503 PCI: 00:15.3 read_resources bus 0 link: 0
1457 12:09:07.220009 PCI: 00:15.3 read_resources bus 0 link: 0 done
1458 12:09:07.222908 PCI: 00:19.1 read_resources bus 0 link: 0
1459 12:09:07.229836 PCI: 00:19.1 read_resources bus 0 link: 0 done
1460 12:09:07.233555 PCI: 00:1e.3 read_resources bus 2 link: 0
1461 12:09:07.240006 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1462 12:09:07.243200 PCI: 00:1f.0 read_resources bus 0 link: 0
1463 12:09:07.246474 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1464 12:09:07.253021 PCI: 00:1f.2 read_resources bus 0 link: 0
1465 12:09:07.256118 GENERIC: 0.0 read_resources bus 0 link: 0
1466 12:09:07.259414 GENERIC: 0.0 read_resources bus 0 link: 0 done
1467 12:09:07.266448 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1468 12:09:07.269286 DOMAIN: 0000 read_resources bus 0 link: 0 done
1469 12:09:07.276085 Root Device read_resources bus 0 link: 0 done
1470 12:09:07.276617 Done reading resources.
1471 12:09:07.282591 Show resources in subtree (Root Device)...After reading.
1472 12:09:07.286560 Root Device child on link 0 CPU_CLUSTER: 0
1473 12:09:07.292494 CPU_CLUSTER: 0 child on link 0 APIC: 00
1474 12:09:07.293006 APIC: 00
1475 12:09:07.293369 APIC: 14
1476 12:09:07.296089 APIC: 16
1477 12:09:07.296510 APIC: 10
1478 12:09:07.296840 APIC: 12
1479 12:09:07.299046 APIC: 09
1480 12:09:07.299469 APIC: 01
1481 12:09:07.302973 APIC: 08
1482 12:09:07.306086 DOMAIN: 0000 child on link 0 GPIO: 0
1483 12:09:07.316197 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1484 12:09:07.326219 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1485 12:09:07.326684 GPIO: 0
1486 12:09:07.327025 PCI: 00:00.0
1487 12:09:07.336207 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1488 12:09:07.346268 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1489 12:09:07.356177 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1490 12:09:07.366037 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1491 12:09:07.375773 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1492 12:09:07.382496 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1493 12:09:07.392366 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1494 12:09:07.402569 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1495 12:09:07.412623 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1496 12:09:07.422051 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1497 12:09:07.432094 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1498 12:09:07.442612 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1499 12:09:07.448986 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1500 12:09:07.458056 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1501 12:09:07.468416 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1502 12:09:07.478330 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1503 12:09:07.488106 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1504 12:09:07.498113 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1505 12:09:07.508099 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1506 12:09:07.517948 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1507 12:09:07.524650 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1508 12:09:07.534830 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1509 12:09:07.544507 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1510 12:09:07.554851 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1511 12:09:07.564211 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1512 12:09:07.574866 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1513 12:09:07.584695 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1514 12:09:07.594506 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1515 12:09:07.594930 PCI: 00:02.0
1516 12:09:07.604783 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1517 12:09:07.614627 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1518 12:09:07.624365 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1519 12:09:07.627970 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1520 12:09:07.637639 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1521 12:09:07.641140 GENERIC: 0.0
1522 12:09:07.644344 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1523 12:09:07.654738 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1524 12:09:07.664414 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1525 12:09:07.670921 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1526 12:09:07.674290 PCI: 01:00.0
1527 12:09:07.684169 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1528 12:09:07.694477 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1529 12:09:07.694990 PCI: 00:08.0
1530 12:09:07.697946 PCI: 00:0a.0
1531 12:09:07.707527 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1532 12:09:07.710578 PCI: 00:0d.0 child on link 0 USB0 port 0
1533 12:09:07.720599 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1534 12:09:07.727049 USB0 port 0 child on link 0 USB3 port 0
1535 12:09:07.727505 USB3 port 0
1536 12:09:07.730552 USB3 port 1
1537 12:09:07.730971 USB3 port 2
1538 12:09:07.733820 USB3 port 3
1539 12:09:07.737317 PCI: 00:14.0 child on link 0 USB0 port 0
1540 12:09:07.747115 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1541 12:09:07.750696 USB0 port 0 child on link 0 USB2 port 0
1542 12:09:07.754189 USB2 port 0
1543 12:09:07.754631 USB2 port 1
1544 12:09:07.757040 USB2 port 2
1545 12:09:07.757517 USB2 port 3
1546 12:09:07.760505 USB2 port 4
1547 12:09:07.764275 USB2 port 5
1548 12:09:07.764783 USB2 port 6
1549 12:09:07.767240 USB2 port 7
1550 12:09:07.767653 USB2 port 8
1551 12:09:07.770986 USB2 port 9
1552 12:09:07.771634 USB3 port 0
1553 12:09:07.774078 USB3 port 1
1554 12:09:07.774594 USB3 port 2
1555 12:09:07.777534 USB3 port 3
1556 12:09:07.778085 PCI: 00:14.2
1557 12:09:07.787159 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1558 12:09:07.797169 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1559 12:09:07.803609 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1560 12:09:07.814121 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1561 12:09:07.814649 GENERIC: 0.0
1562 12:09:07.817411 PCI: 00:15.0 child on link 0 I2C: 00:1a
1563 12:09:07.827154 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1564 12:09:07.830417 I2C: 00:1a
1565 12:09:07.830833 I2C: 00:31
1566 12:09:07.833709 I2C: 00:32
1567 12:09:07.837304 PCI: 00:15.1 child on link 0 I2C: 00:50
1568 12:09:07.847076 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1569 12:09:07.850429 I2C: 00:50
1570 12:09:07.851025 PCI: 00:15.2
1571 12:09:07.853585 PCI: 00:15.3 child on link 0 I2C: 00:10
1572 12:09:07.863884 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 12:09:07.866821 I2C: 00:10
1574 12:09:07.867329 PCI: 00:16.0
1575 12:09:07.877057 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1576 12:09:07.880449 PCI: 00:19.0
1577 12:09:07.883476 PCI: 00:19.1 child on link 0 I2C: 00:15
1578 12:09:07.893596 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1579 12:09:07.897163 I2C: 00:15
1580 12:09:07.897671 I2C: 00:2c
1581 12:09:07.900313 PCI: 00:1e.0
1582 12:09:07.910235 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1583 12:09:07.913972 PCI: 00:1e.3 child on link 0 SPI: 00
1584 12:09:07.923396 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1585 12:09:07.927213 SPI: 00
1586 12:09:07.929950 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1587 12:09:07.937455 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1588 12:09:07.940350 PNP: 0c09.0
1589 12:09:07.950015 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1590 12:09:07.953474 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1591 12:09:07.963278 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1592 12:09:07.973173 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1593 12:09:07.976705 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1594 12:09:07.980403 GENERIC: 0.0
1595 12:09:07.980919 GENERIC: 1.0
1596 12:09:07.983084 PCI: 00:1f.3
1597 12:09:07.993208 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1598 12:09:08.003038 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1599 12:09:08.003543 PCI: 00:1f.5
1600 12:09:08.012811 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1601 12:09:08.019327 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1602 12:09:08.026176 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1603 12:09:08.032874 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1604 12:09:08.039046 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1605 12:09:08.042504 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1606 12:09:08.045521 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1607 12:09:08.052284 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1608 12:09:08.062146 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1609 12:09:08.069052 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1610 12:09:08.075912 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1611 12:09:08.082520 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1612 12:09:08.089090 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1613 12:09:08.095678 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1614 12:09:08.105312 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1615 12:09:08.108960 DOMAIN: 0000: Resource ranges:
1616 12:09:08.112141 * Base: 1000, Size: 800, Tag: 100
1617 12:09:08.115463 * Base: 1900, Size: e700, Tag: 100
1618 12:09:08.122154 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1619 12:09:08.128734 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1620 12:09:08.135583 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1621 12:09:08.142049 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1622 12:09:08.148729 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1623 12:09:08.158779 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1624 12:09:08.165171 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1625 12:09:08.171971 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1626 12:09:08.181971 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1627 12:09:08.188357 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1628 12:09:08.195435 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1629 12:09:08.205027 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1630 12:09:08.211590 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1631 12:09:08.218130 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1632 12:09:08.224921 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1633 12:09:08.234841 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1634 12:09:08.241283 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1635 12:09:08.248093 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1636 12:09:08.258041 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1637 12:09:08.264790 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1638 12:09:08.271472 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1639 12:09:08.281100 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1640 12:09:08.287950 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1641 12:09:08.294382 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1642 12:09:08.304628 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1643 12:09:08.311266 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1644 12:09:08.317873 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1645 12:09:08.327739 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1646 12:09:08.334703 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1647 12:09:08.341114 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1648 12:09:08.351160 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1649 12:09:08.357680 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1650 12:09:08.364531 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1651 12:09:08.367620 DOMAIN: 0000: Resource ranges:
1652 12:09:08.374313 * Base: 80400000, Size: 3fc00000, Tag: 200
1653 12:09:08.377504 * Base: d0000000, Size: 28000000, Tag: 200
1654 12:09:08.381299 * Base: fa000000, Size: 1000000, Tag: 200
1655 12:09:08.387765 * Base: fb001000, Size: 17ff000, Tag: 200
1656 12:09:08.390870 * Base: fe800000, Size: 300000, Tag: 200
1657 12:09:08.394090 * Base: feb80000, Size: 80000, Tag: 200
1658 12:09:08.397567 * Base: fed00000, Size: 40000, Tag: 200
1659 12:09:08.404118 * Base: fed70000, Size: 10000, Tag: 200
1660 12:09:08.407128 * Base: fed88000, Size: 8000, Tag: 200
1661 12:09:08.410858 * Base: fed93000, Size: d000, Tag: 200
1662 12:09:08.413929 * Base: feda2000, Size: 1e000, Tag: 200
1663 12:09:08.417592 * Base: fede0000, Size: 1220000, Tag: 200
1664 12:09:08.424134 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1665 12:09:08.430592 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1666 12:09:08.437304 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1667 12:09:08.443854 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1668 12:09:08.450574 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1669 12:09:08.457141 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1670 12:09:08.464063 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1671 12:09:08.470670 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1672 12:09:08.477407 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1673 12:09:08.483421 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1674 12:09:08.490472 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1675 12:09:08.497230 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1676 12:09:08.503507 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1677 12:09:08.510309 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1678 12:09:08.516915 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1679 12:09:08.523534 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1680 12:09:08.530305 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1681 12:09:08.537012 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1682 12:09:08.543831 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1683 12:09:08.550271 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1684 12:09:08.556773 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1685 12:09:08.566731 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1686 12:09:08.570333 PCI: 00:06.0: Resource ranges:
1687 12:09:08.572986 * Base: 80400000, Size: 100000, Tag: 200
1688 12:09:08.579794 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1689 12:09:08.586245 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1690 12:09:08.593160 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1691 12:09:08.603165 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1692 12:09:08.606633 Root Device assign_resources, bus 0 link: 0
1693 12:09:08.609900 DOMAIN: 0000 assign_resources, bus 0 link: 0
1694 12:09:08.619834 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1695 12:09:08.626462 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1696 12:09:08.636063 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1697 12:09:08.642723 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1698 12:09:08.646173 PCI: 00:04.0 assign_resources, bus 1 link: 0
1699 12:09:08.652889 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1700 12:09:08.659156 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1701 12:09:08.669254 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1702 12:09:08.679606 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1703 12:09:08.682795 PCI: 00:06.0 assign_resources, bus 1 link: 0
1704 12:09:08.692749 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1705 12:09:08.699564 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1706 12:09:08.706196 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1707 12:09:08.712287 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1708 12:09:08.719268 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1709 12:09:08.725930 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1710 12:09:08.729234 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1711 12:09:08.739278 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1712 12:09:08.742375 PCI: 00:14.0 assign_resources, bus 0 link: 0
1713 12:09:08.748995 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1714 12:09:08.755539 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1715 12:09:08.762109 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1716 12:09:08.772019 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1717 12:09:08.775542 PCI: 00:14.3 assign_resources, bus 0 link: 0
1718 12:09:08.782213 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1719 12:09:08.788809 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1720 12:09:08.795282 PCI: 00:15.0 assign_resources, bus 0 link: 0
1721 12:09:08.798585 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1722 12:09:08.805155 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1723 12:09:08.812033 PCI: 00:15.1 assign_resources, bus 0 link: 0
1724 12:09:08.815065 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1725 12:09:08.825265 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1726 12:09:08.828547 PCI: 00:15.3 assign_resources, bus 0 link: 0
1727 12:09:08.834949 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1728 12:09:08.841956 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1729 12:09:08.848597 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1730 12:09:08.855623 PCI: 00:19.1 assign_resources, bus 0 link: 0
1731 12:09:08.858442 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1732 12:09:08.868517 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1733 12:09:08.871481 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1734 12:09:08.878405 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1735 12:09:08.881478 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1736 12:09:08.884971 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1737 12:09:08.891747 LPC: Trying to open IO window from 800 size 1ff
1738 12:09:08.898038 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1739 12:09:08.908106 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1740 12:09:08.914820 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1741 12:09:08.918166 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1742 12:09:08.924777 Root Device assign_resources, bus 0 link: 0 done
1743 12:09:08.928286 Done setting resources.
1744 12:09:08.934560 Show resources in subtree (Root Device)...After assigning values.
1745 12:09:08.938341 Root Device child on link 0 CPU_CLUSTER: 0
1746 12:09:08.941587 CPU_CLUSTER: 0 child on link 0 APIC: 00
1747 12:09:08.944624 APIC: 00
1748 12:09:08.945042 APIC: 14
1749 12:09:08.945368 APIC: 16
1750 12:09:08.948485 APIC: 10
1751 12:09:08.949022 APIC: 12
1752 12:09:08.951131 APIC: 09
1753 12:09:08.951730 APIC: 01
1754 12:09:08.952207 APIC: 08
1755 12:09:08.954911 DOMAIN: 0000 child on link 0 GPIO: 0
1756 12:09:08.965014 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1757 12:09:08.974604 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1758 12:09:08.978171 GPIO: 0
1759 12:09:08.978585 PCI: 00:00.0
1760 12:09:08.988161 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1761 12:09:08.997965 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1762 12:09:09.007802 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1763 12:09:09.014516 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1764 12:09:09.024188 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1765 12:09:09.034168 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1766 12:09:09.044007 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1767 12:09:09.054058 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1768 12:09:09.064048 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1769 12:09:09.074324 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1770 12:09:09.080746 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1771 12:09:09.090650 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1772 12:09:09.100594 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1773 12:09:09.110329 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1774 12:09:09.120155 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1775 12:09:09.130524 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1776 12:09:09.136890 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1777 12:09:09.146585 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1778 12:09:09.156488 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1779 12:09:09.166601 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1780 12:09:09.176615 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1781 12:09:09.186106 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1782 12:09:09.196290 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1783 12:09:09.206077 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1784 12:09:09.215990 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1785 12:09:09.222480 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1786 12:09:09.232774 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1787 12:09:09.242722 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1788 12:09:09.245732 PCI: 00:02.0
1789 12:09:09.255888 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1790 12:09:09.265673 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1791 12:09:09.275677 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1792 12:09:09.279104 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1793 12:09:09.289178 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1794 12:09:09.292312 GENERIC: 0.0
1795 12:09:09.295553 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1796 12:09:09.305224 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1797 12:09:09.318464 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1798 12:09:09.328766 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1799 12:09:09.328888 PCI: 01:00.0
1800 12:09:09.341704 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1801 12:09:09.351771 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1802 12:09:09.351857 PCI: 00:08.0
1803 12:09:09.354916 PCI: 00:0a.0
1804 12:09:09.365115 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1805 12:09:09.368053 PCI: 00:0d.0 child on link 0 USB0 port 0
1806 12:09:09.378289 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1807 12:09:09.384904 USB0 port 0 child on link 0 USB3 port 0
1808 12:09:09.384987 USB3 port 0
1809 12:09:09.387926 USB3 port 1
1810 12:09:09.388008 USB3 port 2
1811 12:09:09.391376 USB3 port 3
1812 12:09:09.394885 PCI: 00:14.0 child on link 0 USB0 port 0
1813 12:09:09.404553 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1814 12:09:09.411213 USB0 port 0 child on link 0 USB2 port 0
1815 12:09:09.411296 USB2 port 0
1816 12:09:09.414749 USB2 port 1
1817 12:09:09.414831 USB2 port 2
1818 12:09:09.417726 USB2 port 3
1819 12:09:09.417808 USB2 port 4
1820 12:09:09.421280 USB2 port 5
1821 12:09:09.421363 USB2 port 6
1822 12:09:09.424697 USB2 port 7
1823 12:09:09.424779 USB2 port 8
1824 12:09:09.428135 USB2 port 9
1825 12:09:09.428217 USB3 port 0
1826 12:09:09.431186 USB3 port 1
1827 12:09:09.431268 USB3 port 2
1828 12:09:09.434266 USB3 port 3
1829 12:09:09.437860 PCI: 00:14.2
1830 12:09:09.447798 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1831 12:09:09.457488 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1832 12:09:09.460859 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1833 12:09:09.470620 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1834 12:09:09.474330 GENERIC: 0.0
1835 12:09:09.477335 PCI: 00:15.0 child on link 0 I2C: 00:1a
1836 12:09:09.487364 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1837 12:09:09.490608 I2C: 00:1a
1838 12:09:09.490690 I2C: 00:31
1839 12:09:09.494102 I2C: 00:32
1840 12:09:09.497474 PCI: 00:15.1 child on link 0 I2C: 00:50
1841 12:09:09.507185 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1842 12:09:09.510776 I2C: 00:50
1843 12:09:09.510859 PCI: 00:15.2
1844 12:09:09.513821 PCI: 00:15.3 child on link 0 I2C: 00:10
1845 12:09:09.523585 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1846 12:09:09.527251 I2C: 00:10
1847 12:09:09.527333 PCI: 00:16.0
1848 12:09:09.540358 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1849 12:09:09.540441 PCI: 00:19.0
1850 12:09:09.543453 PCI: 00:19.1 child on link 0 I2C: 00:15
1851 12:09:09.556578 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1852 12:09:09.556663 I2C: 00:15
1853 12:09:09.556746 I2C: 00:2c
1854 12:09:09.560184 PCI: 00:1e.0
1855 12:09:09.569698 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1856 12:09:09.576796 PCI: 00:1e.3 child on link 0 SPI: 00
1857 12:09:09.586677 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1858 12:09:09.586762 SPI: 00
1859 12:09:09.590007 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1860 12:09:09.599744 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1861 12:09:09.603292 PNP: 0c09.0
1862 12:09:09.609652 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1863 12:09:09.616158 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1864 12:09:09.622688 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1865 12:09:09.632884 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1866 12:09:09.639628 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1867 12:09:09.639712 GENERIC: 0.0
1868 12:09:09.642677 GENERIC: 1.0
1869 12:09:09.642760 PCI: 00:1f.3
1870 12:09:09.652625 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1871 12:09:09.665743 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1872 12:09:09.665875 PCI: 00:1f.5
1873 12:09:09.676024 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1874 12:09:09.679005 Done allocating resources.
1875 12:09:09.685798 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1876 12:09:09.689299 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1877 12:09:09.695686 Configure audio over I2S with MAX98373 NAU88L25B.
1878 12:09:09.700055 Enabling BT offload
1879 12:09:09.707697 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1880 12:09:09.710534 Enabling resources...
1881 12:09:09.714188 PCI: 00:00.0 subsystem <- 8086/4609
1882 12:09:09.717286 PCI: 00:00.0 cmd <- 06
1883 12:09:09.720858 PCI: 00:02.0 subsystem <- 8086/46b3
1884 12:09:09.723856 PCI: 00:02.0 cmd <- 03
1885 12:09:09.727592 PCI: 00:04.0 subsystem <- 8086/461d
1886 12:09:09.727675 PCI: 00:04.0 cmd <- 02
1887 12:09:09.730542 PCI: 00:06.0 bridge ctrl <- 0013
1888 12:09:09.734175 PCI: 00:06.0 subsystem <- 8086/464d
1889 12:09:09.737286 PCI: 00:06.0 cmd <- 106
1890 12:09:09.740752 PCI: 00:0a.0 subsystem <- 8086/467d
1891 12:09:09.743854 PCI: 00:0a.0 cmd <- 02
1892 12:09:09.747393 PCI: 00:0d.0 subsystem <- 8086/461e
1893 12:09:09.750413 PCI: 00:0d.0 cmd <- 02
1894 12:09:09.753829 PCI: 00:14.0 subsystem <- 8086/51ed
1895 12:09:09.757078 PCI: 00:14.0 cmd <- 02
1896 12:09:09.760639 PCI: 00:14.2 subsystem <- 8086/51ef
1897 12:09:09.760723 PCI: 00:14.2 cmd <- 02
1898 12:09:09.763619 PCI: 00:14.3 subsystem <- 8086/51f0
1899 12:09:09.767126 PCI: 00:14.3 cmd <- 02
1900 12:09:09.770632 PCI: 00:15.0 subsystem <- 8086/51e8
1901 12:09:09.773609 PCI: 00:15.0 cmd <- 02
1902 12:09:09.776998 PCI: 00:15.1 subsystem <- 8086/51e9
1903 12:09:09.780606 PCI: 00:15.1 cmd <- 06
1904 12:09:09.783870 PCI: 00:15.3 subsystem <- 8086/51eb
1905 12:09:09.787297 PCI: 00:15.3 cmd <- 02
1906 12:09:09.790484 PCI: 00:16.0 subsystem <- 8086/51e0
1907 12:09:09.790567 PCI: 00:16.0 cmd <- 02
1908 12:09:09.793847 PCI: 00:19.1 subsystem <- 8086/51c6
1909 12:09:09.797323 PCI: 00:19.1 cmd <- 02
1910 12:09:09.800526 PCI: 00:1e.0 subsystem <- 8086/51a8
1911 12:09:09.803830 PCI: 00:1e.0 cmd <- 06
1912 12:09:09.807179 PCI: 00:1e.3 subsystem <- 8086/51ab
1913 12:09:09.810465 PCI: 00:1e.3 cmd <- 02
1914 12:09:09.814033 PCI: 00:1f.0 subsystem <- 8086/5182
1915 12:09:09.817226 PCI: 00:1f.0 cmd <- 407
1916 12:09:09.820502 PCI: 00:1f.3 subsystem <- 8086/51c8
1917 12:09:09.820585 PCI: 00:1f.3 cmd <- 02
1918 12:09:09.823565 PCI: 00:1f.5 subsystem <- 8086/51a4
1919 12:09:09.826826 PCI: 00:1f.5 cmd <- 406
1920 12:09:09.830269 PCI: 01:00.0 cmd <- 02
1921 12:09:09.830352 done.
1922 12:09:09.836987 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1923 12:09:09.840618 ME: Version: Unavailable
1924 12:09:09.843606 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1925 12:09:09.847138 Initializing devices...
1926 12:09:09.850166 Root Device init
1927 12:09:09.850248 mainboard: EC init
1928 12:09:09.856916 Chrome EC: Set SMI mask to 0x0000000000000000
1929 12:09:09.856999 Chrome EC: UHEPI supported
1930 12:09:09.864546 Chrome EC: clear events_b mask to 0x0000000000000000
1931 12:09:09.871035 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1932 12:09:09.877603 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1933 12:09:09.880595 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1934 12:09:09.887296 Chrome EC: Set WAKE mask to 0x0000000000000000
1935 12:09:09.890989 Root Device init finished in 38 msecs
1936 12:09:09.894302 PCI: 00:00.0 init
1937 12:09:09.897686 CPU TDP = 15 Watts
1938 12:09:09.897795 CPU PL1 = 15 Watts
1939 12:09:09.900632 CPU PL2 = 55 Watts
1940 12:09:09.900713 CPU PL4 = 123 Watts
1941 12:09:09.907568 PCI: 00:00.0 init finished in 8 msecs
1942 12:09:09.907650 PCI: 00:02.0 init
1943 12:09:09.910547 GMA: Found VBT in CBFS
1944 12:09:09.914236 GMA: Found valid VBT in CBFS
1945 12:09:09.917509 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1946 12:09:09.927124 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1947 12:09:09.930502 PCI: 00:02.0 init finished in 18 msecs
1948 12:09:09.930584 PCI: 00:06.0 init
1949 12:09:09.934016 Initializing PCH PCIe bridge.
1950 12:09:09.940635 PCI: 00:06.0 init finished in 3 msecs
1951 12:09:09.940740 PCI: 00:0a.0 init
1952 12:09:09.944161 PCI: 00:0a.0 init finished in 0 msecs
1953 12:09:09.947307 PCI: 00:14.0 init
1954 12:09:09.950845 PCI: 00:14.0 init finished in 0 msecs
1955 12:09:09.950917 PCI: 00:14.2 init
1956 12:09:09.957483 PCI: 00:14.2 init finished in 0 msecs
1957 12:09:09.957584 PCI: 00:15.0 init
1958 12:09:09.960508 I2C bus 0 version 0x3230302a
1959 12:09:09.964136 DW I2C bus 0 at 0x80655000 (400 KHz)
1960 12:09:09.967139 PCI: 00:15.0 init finished in 6 msecs
1961 12:09:09.970764 PCI: 00:15.1 init
1962 12:09:09.973717 I2C bus 1 version 0x3230302a
1963 12:09:09.977357 DW I2C bus 1 at 0x80656000 (400 KHz)
1964 12:09:09.980382 PCI: 00:15.1 init finished in 6 msecs
1965 12:09:09.983968 PCI: 00:15.3 init
1966 12:09:09.984040 I2C bus 3 version 0x3230302a
1967 12:09:09.990653 DW I2C bus 3 at 0x80657000 (400 KHz)
1968 12:09:09.994244 PCI: 00:15.3 init finished in 6 msecs
1969 12:09:09.994326 PCI: 00:16.0 init
1970 12:09:09.997125 PCI: 00:16.0 init finished in 0 msecs
1971 12:09:10.000785 PCI: 00:19.1 init
1972 12:09:10.003725 I2C bus 5 version 0x3230302a
1973 12:09:10.007317 DW I2C bus 5 at 0x80659000 (400 KHz)
1974 12:09:10.010648 PCI: 00:19.1 init finished in 6 msecs
1975 12:09:10.013767 PCI: 00:1f.0 init
1976 12:09:10.017050 IOAPIC: Initializing IOAPIC at 0xfec00000
1977 12:09:10.020294 IOAPIC: ID = 0x02
1978 12:09:10.020395 IOAPIC: Dumping registers
1979 12:09:10.023651 reg 0x0000: 0x02000000
1980 12:09:10.027208 reg 0x0001: 0x00770020
1981 12:09:10.030634 reg 0x0002: 0x00000000
1982 12:09:10.030720 IOAPIC: 120 interrupts
1983 12:09:10.037099 IOAPIC: Clearing IOAPIC at 0xfec00000
1984 12:09:10.040545 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1985 12:09:10.043841 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1986 12:09:10.050645 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1987 12:09:10.053619 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1988 12:09:10.060262 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1989 12:09:10.063769 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1990 12:09:10.070380 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1991 12:09:10.074045 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1992 12:09:10.080187 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1993 12:09:10.083729 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1994 12:09:10.086802 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1995 12:09:10.093794 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1996 12:09:10.097360 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1997 12:09:10.103751 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1998 12:09:10.106794 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1999 12:09:10.113810 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2000 12:09:10.116866 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2001 12:09:10.120465 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2002 12:09:10.126881 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2003 12:09:10.130142 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2004 12:09:10.136836 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2005 12:09:10.140267 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2006 12:09:10.147081 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2007 12:09:10.150549 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2008 12:09:10.157003 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2009 12:09:10.160130 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2010 12:09:10.163785 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2011 12:09:10.169972 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2012 12:09:10.173573 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2013 12:09:10.180143 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2014 12:09:10.183659 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2015 12:09:10.190299 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2016 12:09:10.193395 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2017 12:09:10.200284 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2018 12:09:10.203427 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2019 12:09:10.206903 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2020 12:09:10.213542 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2021 12:09:10.216654 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2022 12:09:10.223153 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2023 12:09:10.226757 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2024 12:09:10.233588 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2025 12:09:10.236619 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2026 12:09:10.243354 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2027 12:09:10.246869 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2028 12:09:10.249978 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2029 12:09:10.256706 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2030 12:09:10.260269 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2031 12:09:10.266644 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2032 12:09:10.270161 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2033 12:09:10.276829 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2034 12:09:10.279935 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2035 12:09:10.283466 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2036 12:09:10.289964 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2037 12:09:10.293059 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2038 12:09:10.299668 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2039 12:09:10.303365 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2040 12:09:10.310190 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2041 12:09:10.314054 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2042 12:09:10.320558 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2043 12:09:10.323908 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2044 12:09:10.326876 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2045 12:09:10.333802 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2046 12:09:10.336942 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2047 12:09:10.344016 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2048 12:09:10.346725 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2049 12:09:10.353355 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2050 12:09:10.356928 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2051 12:09:10.363481 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2052 12:09:10.367024 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2053 12:09:10.370783 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2054 12:09:10.377358 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2055 12:09:10.380907 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2056 12:09:10.387567 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2057 12:09:10.390735 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2058 12:09:10.394372 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2059 12:09:10.400551 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2060 12:09:10.404127 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2061 12:09:10.410662 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2062 12:09:10.414351 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2063 12:09:10.421066 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2064 12:09:10.424152 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2065 12:09:10.427279 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2066 12:09:10.434137 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2067 12:09:10.437525 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2068 12:09:10.443887 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2069 12:09:10.447139 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2070 12:09:10.454207 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2071 12:09:10.457036 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2072 12:09:10.463934 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2073 12:09:10.467203 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2074 12:09:10.470531 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2075 12:09:10.477087 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2076 12:09:10.480740 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2077 12:09:10.487120 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2078 12:09:10.490293 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2079 12:09:10.497391 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2080 12:09:10.500527 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2081 12:09:10.507349 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2082 12:09:10.510599 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2083 12:09:10.513869 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2084 12:09:10.520355 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2085 12:09:10.523551 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2086 12:09:10.530408 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2087 12:09:10.534065 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2088 12:09:10.540521 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2089 12:09:10.543880 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2090 12:09:10.550248 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2091 12:09:10.553436 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2092 12:09:10.557277 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2093 12:09:10.563624 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2094 12:09:10.567071 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2095 12:09:10.573997 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2096 12:09:10.576960 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2097 12:09:10.583229 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2098 12:09:10.586905 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2099 12:09:10.593604 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2100 12:09:10.597184 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2101 12:09:10.600264 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2102 12:09:10.606572 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2103 12:09:10.610192 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2104 12:09:10.616543 IOAPIC: Bootstrap Processor Local APIC = 0x00
2105 12:09:10.619791 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2106 12:09:10.623125 PCI: 00:1f.0 init finished in 607 msecs
2107 12:09:10.626853 PCI: 00:1f.2 init
2108 12:09:10.629890 apm_control: Disabling ACPI.
2109 12:09:10.635106 APMC done.
2110 12:09:10.638367 PCI: 00:1f.2 init finished in 7 msecs
2111 12:09:10.641574 PCI: 00:1f.3 init
2112 12:09:10.645128 PCI: 00:1f.3 init finished in 0 msecs
2113 12:09:10.645569 PCI: 01:00.0 init
2114 12:09:10.648380 PCI: 01:00.0 init finished in 0 msecs
2115 12:09:10.651423 PNP: 0c09.0 init
2116 12:09:10.655081 Google Chrome EC uptime: 12.116 seconds
2117 12:09:10.661987 Google Chrome AP resets since EC boot: 1
2118 12:09:10.664787 Google Chrome most recent AP reset causes:
2119 12:09:10.668361 0.342: 32775 shutdown: entering G3
2120 12:09:10.675203 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2121 12:09:10.678301 PNP: 0c09.0 init finished in 23 msecs
2122 12:09:10.682070 GENERIC: 0.0 init
2123 12:09:10.684845 GENERIC: 0.0 init finished in 0 msecs
2124 12:09:10.685403 GENERIC: 1.0 init
2125 12:09:10.691532 GENERIC: 1.0 init finished in 0 msecs
2126 12:09:10.692000 Devices initialized
2127 12:09:10.694495 Show all devs... After init.
2128 12:09:10.698402 Root Device: enabled 1
2129 12:09:10.701411 CPU_CLUSTER: 0: enabled 1
2130 12:09:10.702000 DOMAIN: 0000: enabled 1
2131 12:09:10.705137 GPIO: 0: enabled 1
2132 12:09:10.708300 PCI: 00:00.0: enabled 1
2133 12:09:10.708872 PCI: 00:01.0: enabled 0
2134 12:09:10.711526 PCI: 00:01.1: enabled 0
2135 12:09:10.714835 PCI: 00:02.0: enabled 1
2136 12:09:10.718052 PCI: 00:04.0: enabled 1
2137 12:09:10.718558 PCI: 00:05.0: enabled 0
2138 12:09:10.721406 PCI: 00:06.0: enabled 1
2139 12:09:10.724799 PCI: 00:06.2: enabled 0
2140 12:09:10.728199 PCI: 00:07.0: enabled 0
2141 12:09:10.728660 PCI: 00:07.1: enabled 0
2142 12:09:10.731192 PCI: 00:07.2: enabled 0
2143 12:09:10.734554 PCI: 00:07.3: enabled 0
2144 12:09:10.735019 PCI: 00:08.0: enabled 0
2145 12:09:10.738161 PCI: 00:09.0: enabled 0
2146 12:09:10.741259 PCI: 00:0a.0: enabled 1
2147 12:09:10.744551 PCI: 00:0d.0: enabled 1
2148 12:09:10.745231 PCI: 00:0d.1: enabled 0
2149 12:09:10.747996 PCI: 00:0d.2: enabled 0
2150 12:09:10.751084 PCI: 00:0d.3: enabled 0
2151 12:09:10.754785 PCI: 00:0e.0: enabled 0
2152 12:09:10.755599 PCI: 00:10.0: enabled 0
2153 12:09:10.757773 PCI: 00:10.1: enabled 0
2154 12:09:10.760686 PCI: 00:10.6: enabled 0
2155 12:09:10.764277 PCI: 00:10.7: enabled 0
2156 12:09:10.764698 PCI: 00:12.0: enabled 0
2157 12:09:10.767683 PCI: 00:12.6: enabled 0
2158 12:09:10.771183 PCI: 00:12.7: enabled 0
2159 12:09:10.774278 PCI: 00:13.0: enabled 0
2160 12:09:10.774699 PCI: 00:14.0: enabled 1
2161 12:09:10.777608 PCI: 00:14.1: enabled 0
2162 12:09:10.781465 PCI: 00:14.2: enabled 1
2163 12:09:10.782020 PCI: 00:14.3: enabled 1
2164 12:09:10.784660 PCI: 00:15.0: enabled 1
2165 12:09:10.787591 PCI: 00:15.1: enabled 1
2166 12:09:10.791170 PCI: 00:15.2: enabled 0
2167 12:09:10.791608 PCI: 00:15.3: enabled 1
2168 12:09:10.794622 PCI: 00:16.0: enabled 1
2169 12:09:10.797481 PCI: 00:16.1: enabled 0
2170 12:09:10.801257 PCI: 00:16.2: enabled 0
2171 12:09:10.801680 PCI: 00:16.3: enabled 0
2172 12:09:10.804319 PCI: 00:16.4: enabled 0
2173 12:09:10.807867 PCI: 00:16.5: enabled 0
2174 12:09:10.810549 PCI: 00:17.0: enabled 0
2175 12:09:10.810978 PCI: 00:19.0: enabled 0
2176 12:09:10.814129 PCI: 00:19.1: enabled 1
2177 12:09:10.817582 PCI: 00:19.2: enabled 0
2178 12:09:10.820908 PCI: 00:1a.0: enabled 0
2179 12:09:10.821330 PCI: 00:1c.0: enabled 0
2180 12:09:10.823763 PCI: 00:1c.1: enabled 0
2181 12:09:10.827717 PCI: 00:1c.2: enabled 0
2182 12:09:10.828252 PCI: 00:1c.3: enabled 0
2183 12:09:10.830364 PCI: 00:1c.4: enabled 0
2184 12:09:10.833905 PCI: 00:1c.5: enabled 0
2185 12:09:10.837133 PCI: 00:1c.6: enabled 0
2186 12:09:10.837555 PCI: 00:1c.7: enabled 0
2187 12:09:10.840871 PCI: 00:1d.0: enabled 0
2188 12:09:10.843761 PCI: 00:1d.1: enabled 0
2189 12:09:10.847333 PCI: 00:1d.2: enabled 0
2190 12:09:10.847755 PCI: 00:1d.3: enabled 0
2191 12:09:10.850718 PCI: 00:1e.0: enabled 1
2192 12:09:10.853920 PCI: 00:1e.1: enabled 0
2193 12:09:10.857188 PCI: 00:1e.2: enabled 0
2194 12:09:10.857613 PCI: 00:1e.3: enabled 1
2195 12:09:10.860600 PCI: 00:1f.0: enabled 1
2196 12:09:10.864129 PCI: 00:1f.1: enabled 0
2197 12:09:10.867189 PCI: 00:1f.2: enabled 1
2198 12:09:10.867705 PCI: 00:1f.3: enabled 1
2199 12:09:10.870573 PCI: 00:1f.4: enabled 0
2200 12:09:10.873515 PCI: 00:1f.5: enabled 1
2201 12:09:10.873967 PCI: 00:1f.6: enabled 0
2202 12:09:10.876982 PCI: 00:1f.7: enabled 0
2203 12:09:10.880372 GENERIC: 0.0: enabled 1
2204 12:09:10.883864 GENERIC: 0.0: enabled 1
2205 12:09:10.884285 GENERIC: 1.0: enabled 1
2206 12:09:10.886795 GENERIC: 0.0: enabled 1
2207 12:09:10.890372 GENERIC: 1.0: enabled 1
2208 12:09:10.893920 USB0 port 0: enabled 1
2209 12:09:10.894343 USB0 port 0: enabled 1
2210 12:09:10.897077 GENERIC: 0.0: enabled 1
2211 12:09:10.900189 I2C: 00:1a: enabled 1
2212 12:09:10.900614 I2C: 00:31: enabled 1
2213 12:09:10.903856 I2C: 00:32: enabled 1
2214 12:09:10.906853 I2C: 00:50: enabled 1
2215 12:09:10.907272 I2C: 00:10: enabled 1
2216 12:09:10.910070 I2C: 00:15: enabled 1
2217 12:09:10.913671 I2C: 00:2c: enabled 1
2218 12:09:10.917097 GENERIC: 0.0: enabled 1
2219 12:09:10.917611 SPI: 00: enabled 1
2220 12:09:10.920003 PNP: 0c09.0: enabled 1
2221 12:09:10.923538 GENERIC: 0.0: enabled 1
2222 12:09:10.923960 USB3 port 0: enabled 1
2223 12:09:10.927222 USB3 port 1: enabled 0
2224 12:09:10.930404 USB3 port 2: enabled 1
2225 12:09:10.930828 USB3 port 3: enabled 0
2226 12:09:10.933793 USB2 port 0: enabled 1
2227 12:09:10.937249 USB2 port 1: enabled 0
2228 12:09:10.937765 USB2 port 2: enabled 1
2229 12:09:10.940243 USB2 port 3: enabled 0
2230 12:09:10.943965 USB2 port 4: enabled 0
2231 12:09:10.946577 USB2 port 5: enabled 1
2232 12:09:10.947004 USB2 port 6: enabled 0
2233 12:09:10.950054 USB2 port 7: enabled 0
2234 12:09:10.953302 USB2 port 8: enabled 1
2235 12:09:10.953725 USB2 port 9: enabled 1
2236 12:09:10.956874 USB3 port 0: enabled 1
2237 12:09:10.960300 USB3 port 1: enabled 0
2238 12:09:10.963558 USB3 port 2: enabled 0
2239 12:09:10.963979 USB3 port 3: enabled 0
2240 12:09:10.966696 GENERIC: 0.0: enabled 1
2241 12:09:10.970279 GENERIC: 1.0: enabled 1
2242 12:09:10.970712 APIC: 00: enabled 1
2243 12:09:10.973268 APIC: 14: enabled 1
2244 12:09:10.976827 APIC: 16: enabled 1
2245 12:09:10.977250 APIC: 10: enabled 1
2246 12:09:10.980338 APIC: 12: enabled 1
2247 12:09:10.980850 APIC: 09: enabled 1
2248 12:09:10.983574 APIC: 01: enabled 1
2249 12:09:10.987078 APIC: 08: enabled 1
2250 12:09:10.987591 PCI: 01:00.0: enabled 1
2251 12:09:10.993665 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2252 12:09:10.999910 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2253 12:09:11.003375 ELOG: NV offset 0xf20000 size 0x4000
2254 12:09:11.010055 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2255 12:09:11.016372 ELOG: Event(17) added with size 13 at 2023-12-14 12:09:11 UTC
2256 12:09:11.023383 ELOG: Event(9E) added with size 10 at 2023-12-14 12:09:11 UTC
2257 12:09:11.029589 ELOG: Event(9F) added with size 14 at 2023-12-14 12:09:11 UTC
2258 12:09:11.036381 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2259 12:09:11.043182 ELOG: Event(A0) added with size 9 at 2023-12-14 12:09:11 UTC
2260 12:09:11.046311 elog_add_boot_reason: Logged dev mode boot
2261 12:09:11.052982 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2262 12:09:11.053408 Finalize devices...
2263 12:09:11.056252 PCI: 00:16.0 final
2264 12:09:11.056674 PCI: 00:1f.2 final
2265 12:09:11.059711 GENERIC: 0.0 final
2266 12:09:11.066350 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2267 12:09:11.066777 GENERIC: 1.0 final
2268 12:09:11.072921 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2269 12:09:11.075934 Devices finalized
2270 12:09:11.082988 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2271 12:09:11.086216 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2272 12:09:11.092749 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2273 12:09:11.096470 ME: HFSTS1 : 0x90000245
2274 12:09:11.102466 ME: HFSTS2 : 0x82100116
2275 12:09:11.106421 ME: HFSTS3 : 0x00000050
2276 12:09:11.109552 ME: HFSTS4 : 0x00004000
2277 12:09:11.116066 ME: HFSTS5 : 0x00000000
2278 12:09:11.119465 ME: HFSTS6 : 0x40600006
2279 12:09:11.122582 ME: Manufacturing Mode : NO
2280 12:09:11.125963 ME: SPI Protection Mode Enabled : YES
2281 12:09:11.132574 ME: FPFs Committed : YES
2282 12:09:11.135819 ME: Manufacturing Vars Locked : YES
2283 12:09:11.139430 ME: FW Partition Table : OK
2284 12:09:11.142527 ME: Bringup Loader Failure : NO
2285 12:09:11.146398 ME: Firmware Init Complete : YES
2286 12:09:11.149427 ME: Boot Options Present : NO
2287 12:09:11.152388 ME: Update In Progress : NO
2288 12:09:11.156013 ME: D0i3 Support : YES
2289 12:09:11.162441 ME: Low Power State Enabled : NO
2290 12:09:11.165766 ME: CPU Replaced : YES
2291 12:09:11.168981 ME: CPU Replacement Valid : YES
2292 12:09:11.172416 ME: Current Working State : 5
2293 12:09:11.175799 ME: Current Operation State : 1
2294 12:09:11.178931 ME: Current Operation Mode : 0
2295 12:09:11.182218 ME: Error Code : 0
2296 12:09:11.185726 ME: Enhanced Debug Mode : NO
2297 12:09:11.188722 ME: CPU Debug Disabled : YES
2298 12:09:11.195639 ME: TXT Support : NO
2299 12:09:11.198671 ME: WP for RO is enabled : YES
2300 12:09:11.205795 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2301 12:09:11.208843 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2302 12:09:11.215411 Ramoops buffer: 0x100000@0x76899000.
2303 12:09:11.218491 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2304 12:09:11.229011 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2305 12:09:11.231999 CBFS: 'fallback/slic' not found.
2306 12:09:11.235534 ACPI: Writing ACPI tables at 7686d000.
2307 12:09:11.235964 ACPI: * FACS
2308 12:09:11.238612 ACPI: * DSDT
2309 12:09:11.245381 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2310 12:09:11.248756 ACPI: * FADT
2311 12:09:11.249177 SCI is IRQ9
2312 12:09:11.252053 ACPI: added table 1/32, length now 40
2313 12:09:11.255458 ACPI: * SSDT
2314 12:09:11.258486 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2315 12:09:11.266091 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2316 12:09:11.269313 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2317 12:09:11.273236 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2318 12:09:11.279458 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2319 12:09:11.286293 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2320 12:09:11.292442 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2321 12:09:11.296026 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2322 12:09:11.302844 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2323 12:09:11.306076 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2324 12:09:11.312407 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2325 12:09:11.316221 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2326 12:09:11.322814 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2327 12:09:11.325759 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2328 12:09:11.333605 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2329 12:09:11.337328 PS2K: Passing 80 keymaps to kernel
2330 12:09:11.343506 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2331 12:09:11.350149 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2332 12:09:11.357344 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2333 12:09:11.363859 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2334 12:09:11.370147 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2335 12:09:11.376616 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2336 12:09:11.380436 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2337 12:09:11.386594 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2338 12:09:11.393714 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2339 12:09:11.400054 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2340 12:09:11.403492 ACPI: added table 2/32, length now 44
2341 12:09:11.407010 ACPI: * MCFG
2342 12:09:11.409740 ACPI: added table 3/32, length now 48
2343 12:09:11.410258 ACPI: * TPM2
2344 12:09:11.413122 TPM2 log created at 0x7685d000
2345 12:09:11.419901 ACPI: added table 4/32, length now 52
2346 12:09:11.420449 ACPI: * LPIT
2347 12:09:11.423306 ACPI: added table 5/32, length now 56
2348 12:09:11.426496 ACPI: * MADT
2349 12:09:11.426968 SCI is IRQ9
2350 12:09:11.429832 ACPI: added table 6/32, length now 60
2351 12:09:11.433044 cmd_reg from pmc_make_ipc_cmd 1052838
2352 12:09:11.439661 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2353 12:09:11.446637 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2354 12:09:11.453320 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2355 12:09:11.456337 PMC CrashLog size in discovery mode: 0xC00
2356 12:09:11.459749 cpu crashlog bar addr: 0x80640000
2357 12:09:11.462934 cpu discovery table offset: 0x6030
2358 12:09:11.469871 cpu_crashlog_discovery_table buffer count: 0x3
2359 12:09:11.476113 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2360 12:09:11.483294 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2361 12:09:11.489652 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2362 12:09:11.492679 PMC crashLog size in discovery mode : 0xC00
2363 12:09:11.499352 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2364 12:09:11.506046 discover mode PMC crashlog size adjusted to: 0x200
2365 12:09:11.512462 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2366 12:09:11.516039 discover mode PMC crashlog size adjusted to: 0x0
2367 12:09:11.519154 m_cpu_crashLog_size : 0x3480 bytes
2368 12:09:11.522767 CPU crashLog present.
2369 12:09:11.525867 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2370 12:09:11.535775 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2371 12:09:11.536197 current = 76876550
2372 12:09:11.538853 ACPI: * DMAR
2373 12:09:11.542546 ACPI: added table 7/32, length now 64
2374 12:09:11.545774 ACPI: added table 8/32, length now 68
2375 12:09:11.546232 ACPI: * HPET
2376 12:09:11.552220 ACPI: added table 9/32, length now 72
2377 12:09:11.552640 ACPI: done.
2378 12:09:11.555528 ACPI tables: 38528 bytes.
2379 12:09:11.559213 smbios_write_tables: 76857000
2380 12:09:11.562768 EC returned error result code 3
2381 12:09:11.565933 Couldn't obtain OEM name from CBI
2382 12:09:11.569107 Create SMBIOS type 16
2383 12:09:11.569524 Create SMBIOS type 17
2384 12:09:11.572359 Create SMBIOS type 20
2385 12:09:11.576025 GENERIC: 0.0 (WIFI Device)
2386 12:09:11.579110 SMBIOS tables: 2156 bytes.
2387 12:09:11.582522 Writing table forward entry at 0x00000500
2388 12:09:11.589138 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2389 12:09:11.592981 Writing coreboot table at 0x76891000
2390 12:09:11.599393 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2391 12:09:11.602398 1. 0000000000001000-000000000009ffff: RAM
2392 12:09:11.609189 2. 00000000000a0000-00000000000fffff: RESERVED
2393 12:09:11.612617 3. 0000000000100000-0000000076856fff: RAM
2394 12:09:11.618999 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2395 12:09:11.622563 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2396 12:09:11.629114 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2397 12:09:11.632477 7. 0000000077000000-00000000803fffff: RESERVED
2398 12:09:11.639088 8. 00000000c0000000-00000000cfffffff: RESERVED
2399 12:09:11.642473 9. 00000000f8000000-00000000f9ffffff: RESERVED
2400 12:09:11.649058 10. 00000000fb000000-00000000fb000fff: RESERVED
2401 12:09:11.652528 11. 00000000fc800000-00000000fe7fffff: RESERVED
2402 12:09:11.658961 12. 00000000feb00000-00000000feb7ffff: RESERVED
2403 12:09:11.662366 13. 00000000fec00000-00000000fecfffff: RESERVED
2404 12:09:11.665689 14. 00000000fed40000-00000000fed6ffff: RESERVED
2405 12:09:11.672052 15. 00000000fed80000-00000000fed87fff: RESERVED
2406 12:09:11.675475 16. 00000000fed90000-00000000fed92fff: RESERVED
2407 12:09:11.682468 17. 00000000feda0000-00000000feda1fff: RESERVED
2408 12:09:11.685561 18. 00000000fedc0000-00000000feddffff: RESERVED
2409 12:09:11.691816 19. 0000000100000000-000000027fbfffff: RAM
2410 12:09:11.692390 Passing 4 GPIOs to payload:
2411 12:09:11.698946 NAME | PORT | POLARITY | VALUE
2412 12:09:11.704954 lid | undefined | high | high
2413 12:09:11.708535 power | undefined | high | low
2414 12:09:11.715164 oprom | undefined | high | low
2415 12:09:11.718223 EC in RW | 0x00000151 | high | high
2416 12:09:11.721679 Board ID: 3
2417 12:09:11.722135 FW config: 0x131
2418 12:09:11.728249 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum e946
2419 12:09:11.731736 coreboot table: 1788 bytes.
2420 12:09:11.734939 IMD ROOT 0. 0x76fff000 0x00001000
2421 12:09:11.738174 IMD SMALL 1. 0x76ffe000 0x00001000
2422 12:09:11.741450 FSP MEMORY 2. 0x76afe000 0x00500000
2423 12:09:11.745135 CONSOLE 3. 0x76ade000 0x00020000
2424 12:09:11.751616 RW MCACHE 4. 0x76add000 0x0000043c
2425 12:09:11.755102 RO MCACHE 5. 0x76adc000 0x00000fd8
2426 12:09:11.758235 FMAP 6. 0x76adb000 0x0000064a
2427 12:09:11.761741 TIME STAMP 7. 0x76ada000 0x00000910
2428 12:09:11.764752 VBOOT WORK 8. 0x76ac6000 0x00014000
2429 12:09:11.768825 MEM INFO 9. 0x76ac5000 0x000003b8
2430 12:09:11.771540 ROMSTG STCK10. 0x76ac4000 0x00001000
2431 12:09:11.774946 AFTER CAR 11. 0x76ab8000 0x0000c000
2432 12:09:11.781640 RAMSTAGE 12. 0x76a2e000 0x0008a000
2433 12:09:11.784998 ACPI BERT 13. 0x76a1e000 0x00010000
2434 12:09:11.788289 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2435 12:09:11.791583 REFCODE 15. 0x769ae000 0x0006f000
2436 12:09:11.795041 SMM BACKUP 16. 0x7699e000 0x00010000
2437 12:09:11.798284 IGD OPREGION17. 0x76999000 0x00004203
2438 12:09:11.801584 RAMOOPS 18. 0x76899000 0x00100000
2439 12:09:11.804861 COREBOOT 19. 0x76891000 0x00008000
2440 12:09:11.811561 ACPI 20. 0x7686d000 0x00024000
2441 12:09:11.814713 TPM2 TCGLOG21. 0x7685d000 0x00010000
2442 12:09:11.818259 PMC CRASHLOG22. 0x7685c000 0x00000c00
2443 12:09:11.821345 CPU CRASHLOG23. 0x76858000 0x00003480
2444 12:09:11.824822 SMBIOS 24. 0x76857000 0x00001000
2445 12:09:11.828352 IMD small region:
2446 12:09:11.831443 IMD ROOT 0. 0x76ffec00 0x00000400
2447 12:09:11.835100 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2448 12:09:11.838140 VPD 2. 0x76ffeb60 0x0000006c
2449 12:09:11.841996 POWER STATE 3. 0x76ffeb00 0x00000044
2450 12:09:11.848478 ROMSTAGE 4. 0x76ffeae0 0x00000004
2451 12:09:11.851706 ACPI GNVS 5. 0x76ffea80 0x00000048
2452 12:09:11.855095 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2453 12:09:11.861450 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2454 12:09:11.865093 MTRR: Physical address space:
2455 12:09:11.871543 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2456 12:09:11.875010 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2457 12:09:11.881523 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2458 12:09:11.888333 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2459 12:09:11.894873 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2460 12:09:11.901442 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2461 12:09:11.908300 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2462 12:09:11.911478 MTRR: Fixed MSR 0x250 0x0606060606060606
2463 12:09:11.914599 MTRR: Fixed MSR 0x258 0x0606060606060606
2464 12:09:11.921197 MTRR: Fixed MSR 0x259 0x0000000000000000
2465 12:09:11.924808 MTRR: Fixed MSR 0x268 0x0606060606060606
2466 12:09:11.928391 MTRR: Fixed MSR 0x269 0x0606060606060606
2467 12:09:11.931216 MTRR: Fixed MSR 0x26a 0x0606060606060606
2468 12:09:11.934704 MTRR: Fixed MSR 0x26b 0x0606060606060606
2469 12:09:11.941418 MTRR: Fixed MSR 0x26c 0x0606060606060606
2470 12:09:11.944410 MTRR: Fixed MSR 0x26d 0x0606060606060606
2471 12:09:11.947874 MTRR: Fixed MSR 0x26e 0x0606060606060606
2472 12:09:11.951324 MTRR: Fixed MSR 0x26f 0x0606060606060606
2473 12:09:11.956146 call enable_fixed_mtrr()
2474 12:09:11.959008 CPU physical address size: 39 bits
2475 12:09:11.966328 MTRR: default type WB/UC MTRR counts: 6/6.
2476 12:09:11.969295 MTRR: UC selected as default type.
2477 12:09:11.975671 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2478 12:09:11.979206 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2479 12:09:11.985996 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2480 12:09:11.992173 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2481 12:09:11.999103 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2482 12:09:12.005607 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2483 12:09:12.012029 MTRR: Fixed MSR 0x250 0x0606060606060606
2484 12:09:12.015563 MTRR: Fixed MSR 0x258 0x0606060606060606
2485 12:09:12.018918 MTRR: Fixed MSR 0x259 0x0000000000000000
2486 12:09:12.022295 MTRR: Fixed MSR 0x268 0x0606060606060606
2487 12:09:12.028599 MTRR: Fixed MSR 0x269 0x0606060606060606
2488 12:09:12.032056 MTRR: Fixed MSR 0x26a 0x0606060606060606
2489 12:09:12.035477 MTRR: Fixed MSR 0x26b 0x0606060606060606
2490 12:09:12.038482 MTRR: Fixed MSR 0x26c 0x0606060606060606
2491 12:09:12.045180 MTRR: Fixed MSR 0x26d 0x0606060606060606
2492 12:09:12.048828 MTRR: Fixed MSR 0x26e 0x0606060606060606
2493 12:09:12.052375 MTRR: Fixed MSR 0x26f 0x0606060606060606
2494 12:09:12.055580 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 12:09:12.058509 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 12:09:12.065356 MTRR: Fixed MSR 0x250 0x0606060606060606
2497 12:09:12.068646 MTRR: Fixed MSR 0x250 0x0606060606060606
2498 12:09:12.071958 MTRR: Fixed MSR 0x250 0x0606060606060606
2499 12:09:12.075009 MTRR: Fixed MSR 0x258 0x0606060606060606
2500 12:09:12.081641 MTRR: Fixed MSR 0x259 0x0000000000000000
2501 12:09:12.085102 MTRR: Fixed MSR 0x268 0x0606060606060606
2502 12:09:12.088439 MTRR: Fixed MSR 0x269 0x0606060606060606
2503 12:09:12.091864 MTRR: Fixed MSR 0x26a 0x0606060606060606
2504 12:09:12.098466 MTRR: Fixed MSR 0x26b 0x0606060606060606
2505 12:09:12.101378 MTRR: Fixed MSR 0x26c 0x0606060606060606
2506 12:09:12.105097 MTRR: Fixed MSR 0x26d 0x0606060606060606
2507 12:09:12.108497 MTRR: Fixed MSR 0x26e 0x0606060606060606
2508 12:09:12.114718 MTRR: Fixed MSR 0x26f 0x0606060606060606
2509 12:09:12.118227 MTRR: Fixed MSR 0x258 0x0606060606060606
2510 12:09:12.121438 call enable_fixed_mtrr()
2511 12:09:12.124708 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 12:09:12.127982 CPU physical address size: 39 bits
2513 12:09:12.131518 MTRR: Fixed MSR 0x258 0x0606060606060606
2514 12:09:12.134843 MTRR: Fixed MSR 0x259 0x0000000000000000
2515 12:09:12.141336 MTRR: Fixed MSR 0x258 0x0606060606060606
2516 12:09:12.144963 MTRR: Fixed MSR 0x268 0x0606060606060606
2517 12:09:12.148054 MTRR: Fixed MSR 0x269 0x0606060606060606
2518 12:09:12.151778 MTRR: Fixed MSR 0x26a 0x0606060606060606
2519 12:09:12.154752 MTRR: Fixed MSR 0x26b 0x0606060606060606
2520 12:09:12.161637 MTRR: Fixed MSR 0x26c 0x0606060606060606
2521 12:09:12.165325 MTRR: Fixed MSR 0x26d 0x0606060606060606
2522 12:09:12.168311 MTRR: Fixed MSR 0x26e 0x0606060606060606
2523 12:09:12.171559 MTRR: Fixed MSR 0x26f 0x0606060606060606
2524 12:09:12.174784 call enable_fixed_mtrr()
2525 12:09:12.178695 call enable_fixed_mtrr()
2526 12:09:12.181781 MTRR: Fixed MSR 0x259 0x0000000000000000
2527 12:09:12.184735 CPU physical address size: 39 bits
2528 12:09:12.188411 CPU physical address size: 39 bits
2529 12:09:12.194827 MTRR: Fixed MSR 0x259 0x0000000000000000
2530 12:09:12.197973 MTRR: Fixed MSR 0x268 0x0606060606060606
2531 12:09:12.201006 MTRR: Fixed MSR 0x268 0x0606060606060606
2532 12:09:12.204737 MTRR: Fixed MSR 0x269 0x0606060606060606
2533 12:09:12.208100 MTRR: Fixed MSR 0x269 0x0606060606060606
2534 12:09:12.214585 MTRR: Fixed MSR 0x26a 0x0606060606060606
2535 12:09:12.217999 MTRR: Fixed MSR 0x26b 0x0606060606060606
2536 12:09:12.221249 MTRR: Fixed MSR 0x26c 0x0606060606060606
2537 12:09:12.224975 MTRR: Fixed MSR 0x26d 0x0606060606060606
2538 12:09:12.231006 MTRR: Fixed MSR 0x26e 0x0606060606060606
2539 12:09:12.234489 MTRR: Fixed MSR 0x26f 0x0606060606060606
2540 12:09:12.237651 MTRR: Fixed MSR 0x26a 0x0606060606060606
2541 12:09:12.241276 call enable_fixed_mtrr()
2542 12:09:12.244294 MTRR: Fixed MSR 0x26b 0x0606060606060606
2543 12:09:12.247834 MTRR: Fixed MSR 0x26c 0x0606060606060606
2544 12:09:12.254340 MTRR: Fixed MSR 0x26d 0x0606060606060606
2545 12:09:12.257562 MTRR: Fixed MSR 0x26e 0x0606060606060606
2546 12:09:12.261359 MTRR: Fixed MSR 0x26f 0x0606060606060606
2547 12:09:12.264066 CPU physical address size: 39 bits
2548 12:09:12.267671 call enable_fixed_mtrr()
2549 12:09:12.271450 MTRR: Fixed MSR 0x250 0x0606060606060606
2550 12:09:12.274025 CPU physical address size: 39 bits
2551 12:09:12.277470 MTRR: Fixed MSR 0x258 0x0606060606060606
2552 12:09:12.284729 MTRR: Fixed MSR 0x259 0x0000000000000000
2553 12:09:12.287721 MTRR: Fixed MSR 0x259 0x0000000000000000
2554 12:09:12.290586 MTRR: Fixed MSR 0x268 0x0606060606060606
2555 12:09:12.294226 MTRR: Fixed MSR 0x269 0x0606060606060606
2556 12:09:12.300992 MTRR: Fixed MSR 0x268 0x0606060606060606
2557 12:09:12.304327 MTRR: Fixed MSR 0x269 0x0606060606060606
2558 12:09:12.307876 MTRR: Fixed MSR 0x26a 0x0606060606060606
2559 12:09:12.310706 MTRR: Fixed MSR 0x26b 0x0606060606060606
2560 12:09:12.317764 MTRR: Fixed MSR 0x26c 0x0606060606060606
2561 12:09:12.320908 MTRR: Fixed MSR 0x26d 0x0606060606060606
2562 12:09:12.324529 MTRR: Fixed MSR 0x26e 0x0606060606060606
2563 12:09:12.327433 MTRR: Fixed MSR 0x26f 0x0606060606060606
2564 12:09:12.331636 MTRR: Fixed MSR 0x26a 0x0606060606060606
2565 12:09:12.334622 call enable_fixed_mtrr()
2566 12:09:12.338039 MTRR: Fixed MSR 0x26b 0x0606060606060606
2567 12:09:12.344632 MTRR: Fixed MSR 0x26c 0x0606060606060606
2568 12:09:12.347626 MTRR: Fixed MSR 0x26d 0x0606060606060606
2569 12:09:12.351175 MTRR: Fixed MSR 0x26e 0x0606060606060606
2570 12:09:12.354474 MTRR: Fixed MSR 0x26f 0x0606060606060606
2571 12:09:12.361567 CPU physical address size: 39 bits
2572 12:09:12.364567 call enable_fixed_mtrr()
2573 12:09:12.367903 CPU physical address size: 39 bits
2574 12:09:12.368463
2575 12:09:12.371268 MTRR check
2576 12:09:12.371825 Fixed MTRRs : Enabled
2577 12:09:12.374770 Variable MTRRs: Enabled
2578 12:09:12.375324
2579 12:09:12.381160 BS: BS_WRITE_TABLES exit times (exec / console): 254 / 150 ms
2580 12:09:12.384631 Checking cr50 for pending updates
2581 12:09:12.395773 Reading cr50 TPM mode
2582 12:09:12.410745 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2583 12:09:12.420676 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2584 12:09:12.424100 Checking segment from ROM address 0xf96cbe6c
2585 12:09:12.427658 Checking segment from ROM address 0xf96cbe88
2586 12:09:12.433777 Loading segment from ROM address 0xf96cbe6c
2587 12:09:12.434296 code (compression=1)
2588 12:09:12.444209 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2589 12:09:12.450661 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2590 12:09:12.453752 using LZMA
2591 12:09:12.475914 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2592 12:09:12.482247 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2593 12:09:12.490047 Loading segment from ROM address 0xf96cbe88
2594 12:09:12.493877 Entry Point 0x30000000
2595 12:09:12.494453 Loaded segments
2596 12:09:12.500568 BS: BS_PAYLOAD_LOAD run times (exec / console): 20 / 62 ms
2597 12:09:12.507244 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2598 12:09:12.510241 Finalizing chipset.
2599 12:09:12.513718 apm_control: Finalizing SMM.
2600 12:09:12.514243 APMC done.
2601 12:09:12.517117 HECI: CSE device 16.1 is disabled
2602 12:09:12.520563 HECI: CSE device 16.2 is disabled
2603 12:09:12.523394 HECI: CSE device 16.3 is disabled
2604 12:09:12.526940 HECI: CSE device 16.4 is disabled
2605 12:09:12.529957 HECI: CSE device 16.5 is disabled
2606 12:09:12.533107 HECI: Sending End-of-Post
2607 12:09:12.541643 CSE: EOP requested action: continue boot
2608 12:09:12.545505 CSE EOP successful, continuing boot
2609 12:09:12.552102 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2610 12:09:12.555125 mp_park_aps done after 0 msecs.
2611 12:09:12.558570 Jumping to boot code at 0x30000000(0x76891000)
2612 12:09:12.568561 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2613 12:09:12.572652
2614 12:09:12.573111
2615 12:09:12.573443
2616 12:09:12.576100 Starting depthcharge on Volmar...
2617 12:09:12.576645
2618 12:09:12.577921 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2619 12:09:12.578425 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2620 12:09:12.578846 Setting prompt string to ['brya:']
2621 12:09:12.579256 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2622 12:09:12.582609 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2623 12:09:12.583056
2624 12:09:12.588969 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2625 12:09:12.589397
2626 12:09:12.595564 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2627 12:09:12.595987
2628 12:09:12.598869 configure_storage: Failed to remap 1C:2
2629 12:09:12.599294
2630 12:09:12.602093 Wipe memory regions:
2631 12:09:12.602524
2632 12:09:12.605573 [0x00000000001000, 0x000000000a0000)
2633 12:09:12.606030
2634 12:09:12.609029 [0x00000000100000, 0x00000030000000)
2635 12:09:12.711594
2636 12:09:12.714744 [0x00000032668e60, 0x00000076857000)
2637 12:09:12.859169
2638 12:09:12.862331 [0x00000100000000, 0x0000027fc00000)
2639 12:09:13.672289
2640 12:09:13.675661 ec_init: CrosEC protocol v3 supported (256, 256)
2641 12:09:14.285413
2642 12:09:14.285570 R8152: Initializing
2643 12:09:14.285640
2644 12:09:14.288265 Version 9 (ocp_data = 6010)
2645 12:09:14.288353
2646 12:09:14.291544 R8152: Done initializing
2647 12:09:14.291630
2648 12:09:14.295056 Adding net device
2649 12:09:14.595932
2650 12:09:14.599368 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2651 12:09:14.599458
2652 12:09:14.599523
2653 12:09:14.599585
2654 12:09:14.599864 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2656 12:09:14.700232 brya: tftpboot 192.168.201.1 12269264/tftp-deploy-9wi4np1l/kernel/bzImage 12269264/tftp-deploy-9wi4np1l/kernel/cmdline 12269264/tftp-deploy-9wi4np1l/ramdisk/ramdisk.cpio.gz
2657 12:09:14.700424 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2658 12:09:14.700521 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2659 12:09:14.704489 tftpboot 192.168.201.1 12269264/tftp-deploy-9wi4np1l/kernel/bzIploy-9wi4np1l/kernel/cmdline 12269264/tftp-deploy-9wi4np1l/ramdisk/ramdisk.cpio.gz
2660 12:09:14.704577
2661 12:09:14.704642 Waiting for link
2662 12:09:14.907104
2663 12:09:14.907260 done.
2664 12:09:14.907329
2665 12:09:14.907390 MAC: 00:e0:4c:68:01:74
2666 12:09:14.907449
2667 12:09:14.910572 Sending DHCP discover... done.
2668 12:09:14.910656
2669 12:09:14.913671 Waiting for reply... done.
2670 12:09:14.913754
2671 12:09:14.918873 Sending DHCP request... done.
2672 12:09:14.918956
2673 12:09:14.923886 Waiting for reply... done.
2674 12:09:14.923968
2675 12:09:14.924033 My ip is 192.168.201.16
2676 12:09:14.924093
2677 12:09:14.926901 The DHCP server ip is 192.168.201.1
2678 12:09:14.926984
2679 12:09:14.933660 TFTP server IP predefined by user: 192.168.201.1
2680 12:09:14.933744
2681 12:09:14.940711 Bootfile predefined by user: 12269264/tftp-deploy-9wi4np1l/kernel/bzImage
2682 12:09:14.940820
2683 12:09:14.943718 Sending tftp read request... done.
2684 12:09:14.943800
2685 12:09:14.947183 Waiting for the transfer...
2686 12:09:14.947270
2687 12:09:15.209215 00000000 ################################################################
2688 12:09:15.209365
2689 12:09:15.463194 00080000 ################################################################
2690 12:09:15.463339
2691 12:09:15.716824 00100000 ################################################################
2692 12:09:15.716983
2693 12:09:15.964806 00180000 ################################################################
2694 12:09:15.964950
2695 12:09:16.215181 00200000 ################################################################
2696 12:09:16.215354
2697 12:09:16.470879 00280000 ################################################################
2698 12:09:16.471018
2699 12:09:16.726207 00300000 ################################################################
2700 12:09:16.726344
2701 12:09:16.981612 00380000 ################################################################
2702 12:09:16.981774
2703 12:09:17.230623 00400000 ################################################################
2704 12:09:17.230757
2705 12:09:17.477757 00480000 ################################################################
2706 12:09:17.477925
2707 12:09:17.734751 00500000 ################################################################
2708 12:09:17.734886
2709 12:09:17.993527 00580000 ################################################################
2710 12:09:17.993673
2711 12:09:18.273169 00600000 ################################################################
2712 12:09:18.273336
2713 12:09:18.554543 00680000 ################################################################
2714 12:09:18.554691
2715 12:09:18.806834 00700000 ################################################################
2716 12:09:18.806976
2717 12:09:19.054971 00780000 ################################################################
2718 12:09:19.055111
2719 12:09:19.336002 00800000 ################################################################
2720 12:09:19.336145
2721 12:09:19.602770 00880000 ################################################################
2722 12:09:19.602906
2723 12:09:19.860927 00900000 ################################################################
2724 12:09:19.861072
2725 12:09:20.101265 00980000 ################################################################
2726 12:09:20.101423
2727 12:09:20.342104 00a00000 ################################################################
2728 12:09:20.342262
2729 12:09:20.583616 00a80000 ################################################################
2730 12:09:20.583803
2731 12:09:20.823900 00b00000 ################################################################
2732 12:09:20.824075
2733 12:09:21.063461 00b80000 ################################################################
2734 12:09:21.063633
2735 12:09:21.320076 00c00000 ################################################################
2736 12:09:21.320220
2737 12:09:21.568759 00c80000 ################################################################
2738 12:09:21.568913
2739 12:09:21.816944 00d00000 ################################################################
2740 12:09:21.817068
2741 12:09:22.072544 00d80000 ################################################################
2742 12:09:22.072682
2743 12:09:22.332894 00e00000 ################################################################
2744 12:09:22.333037
2745 12:09:22.582204 00e80000 ################################################################
2746 12:09:22.582353
2747 12:09:22.839476 00f00000 ################################################################
2748 12:09:22.839632
2749 12:09:23.109675 00f80000 ################################################################
2750 12:09:23.109813
2751 12:09:23.347583 01000000 ############################################################# done.
2752 12:09:23.347716
2753 12:09:23.351020 The bootfile was 17275200 bytes long.
2754 12:09:23.351111
2755 12:09:23.353966 Sending tftp read request... done.
2756 12:09:23.354070
2757 12:09:23.357568 Waiting for the transfer...
2758 12:09:23.357663
2759 12:09:23.618806 00000000 ################################################################
2760 12:09:23.618946
2761 12:09:23.884749 00080000 ################################################################
2762 12:09:23.884893
2763 12:09:24.130539 00100000 ################################################################
2764 12:09:24.130674
2765 12:09:24.375923 00180000 ################################################################
2766 12:09:24.376059
2767 12:09:24.622670 00200000 ################################################################
2768 12:09:24.622808
2769 12:09:24.870198 00280000 ################################################################
2770 12:09:24.870338
2771 12:09:25.116407 00300000 ################################################################
2772 12:09:25.116539
2773 12:09:25.363445 00380000 ################################################################
2774 12:09:25.363582
2775 12:09:25.613814 00400000 ################################################################
2776 12:09:25.613988
2777 12:09:25.867304 00480000 ################################################################
2778 12:09:25.867452
2779 12:09:26.114529 00500000 ################################################################
2780 12:09:26.114661
2781 12:09:26.361285 00580000 ################################################################
2782 12:09:26.361413
2783 12:09:26.607836 00600000 ################################################################
2784 12:09:26.607975
2785 12:09:26.855472 00680000 ################################################################
2786 12:09:26.855611
2787 12:09:27.118233 00700000 ################################################################
2788 12:09:27.118371
2789 12:09:27.365079 00780000 ################################################################
2790 12:09:27.365208
2791 12:09:27.622300 00800000 ################################################################
2792 12:09:27.622442
2793 12:09:27.913016 00880000 ################################################################
2794 12:09:27.913165
2795 12:09:28.163017 00900000 ################################################################
2796 12:09:28.163169
2797 12:09:28.430422 00980000 ################################################################
2798 12:09:28.430595
2799 12:09:28.684671 00a00000 ################################################################
2800 12:09:28.684815
2801 12:09:28.961766 00a80000 ################################################################
2802 12:09:28.961910
2803 12:09:29.209648 00b00000 ################################################################
2804 12:09:29.209783
2805 12:09:29.457941 00b80000 ################################################################
2806 12:09:29.458141
2807 12:09:29.714948 00c00000 ################################################################
2808 12:09:29.715090
2809 12:09:29.937696 00c80000 ######################################################### done.
2810 12:09:29.937865
2811 12:09:29.940856 Sending tftp read request... done.
2812 12:09:29.940946
2813 12:09:29.943885 Waiting for the transfer...
2814 12:09:29.943974
2815 12:09:29.947555 00000000 # done.
2816 12:09:29.947653
2817 12:09:29.953961 Command line loaded dynamically from TFTP file: 12269264/tftp-deploy-9wi4np1l/kernel/cmdline
2818 12:09:29.954147
2819 12:09:29.970514 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2820 12:09:29.978682
2821 12:09:29.981655 Shutting down all USB controllers.
2822 12:09:29.981772
2823 12:09:29.981875 Removing current net device
2824 12:09:29.981943
2825 12:09:29.985270 Finalizing coreboot
2826 12:09:29.985387
2827 12:09:29.991566 Exiting depthcharge with code 4 at timestamp: 27661647
2828 12:09:29.991649
2829 12:09:29.991714
2830 12:09:29.991775 Starting kernel ...
2831 12:09:29.991833
2832 12:09:29.991890
2833 12:09:29.992301 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2834 12:09:29.992402 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2835 12:09:29.992478 Setting prompt string to ['Linux version [0-9]']
2836 12:09:29.992546 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2837 12:09:29.992615 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2839 12:13:52.992670 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2841 12:13:52.992872 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2843 12:13:52.993031 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2846 12:13:52.993280 end: 2 depthcharge-action (duration 00:05:00) [common]
2848 12:13:52.993551 Cleaning after the job
2849 12:13:52.993639 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12269264/tftp-deploy-9wi4np1l/ramdisk
2850 12:13:52.995644 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12269264/tftp-deploy-9wi4np1l/kernel
2851 12:13:52.998407 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12269264/tftp-deploy-9wi4np1l/modules
2852 12:13:53.001852 start: 5.1 power-off (timeout 00:00:30) [common]
2853 12:13:53.002051 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-8' '--port=1' '--command=off'
2854 12:13:53.077510 >> Command sent successfully.
2855 12:13:53.080084 Returned 0 in 0 seconds
2856 12:13:53.180451 end: 5.1 power-off (duration 00:00:00) [common]
2858 12:13:53.180780 start: 5.2 read-feedback (timeout 00:10:00) [common]
2859 12:13:53.181036 Listened to connection for namespace 'common' for up to 1s
2861 12:13:53.181436 Listened to connection for namespace 'common' for up to 1s
2862 12:13:54.181902 Finalising connection for namespace 'common'
2863 12:13:54.182099 Disconnecting from shell: Finalise
2864 12:13:54.182210
2865 12:13:54.282550 end: 5.2 read-feedback (duration 00:00:01) [common]
2866 12:13:54.282709 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12269264
2867 12:13:54.310848 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12269264
2868 12:13:54.311057 JobError: Your job cannot terminate cleanly.