Boot log: acer-cbv514-1h-34uz-brya
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:31:58.134594 lava-dispatcher, installed at version: 2023.10
2 12:31:58.134803 start: 0 validate
3 12:31:58.134942 Start time: 2023-12-14 12:31:58.134932+00:00 (UTC)
4 12:31:58.135076 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:31:58.135212 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:31:58.394742 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:31:58.394947 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.201-cip41-69-g8f7b450fc28ed%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:31:58.661317 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:31:58.661581 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.201-cip41-69-g8f7b450fc28ed%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:31:58.929201 validate duration: 0.79
12 12:31:58.929502 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:31:58.929621 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:31:58.929718 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:31:58.929852 Not decompressing ramdisk as can be used compressed.
16 12:31:58.929944 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:31:58.930017 saving as /var/lib/lava/dispatcher/tmp/12269827/tftp-deploy-ghuz9_yg/ramdisk/rootfs.cpio.gz
18 12:31:58.930083 total size: 8418130 (8 MB)
19 12:31:58.931167 progress 0 % (0 MB)
20 12:31:58.933589 progress 5 % (0 MB)
21 12:31:58.935897 progress 10 % (0 MB)
22 12:31:58.938245 progress 15 % (1 MB)
23 12:31:58.940580 progress 20 % (1 MB)
24 12:31:58.942856 progress 25 % (2 MB)
25 12:31:58.945351 progress 30 % (2 MB)
26 12:31:58.947569 progress 35 % (2 MB)
27 12:31:58.949833 progress 40 % (3 MB)
28 12:31:58.952178 progress 45 % (3 MB)
29 12:31:58.954450 progress 50 % (4 MB)
30 12:31:58.956737 progress 55 % (4 MB)
31 12:31:58.959004 progress 60 % (4 MB)
32 12:31:58.961090 progress 65 % (5 MB)
33 12:31:58.963352 progress 70 % (5 MB)
34 12:31:58.965700 progress 75 % (6 MB)
35 12:31:58.967952 progress 80 % (6 MB)
36 12:31:58.970164 progress 85 % (6 MB)
37 12:31:58.972391 progress 90 % (7 MB)
38 12:31:58.974666 progress 95 % (7 MB)
39 12:31:58.976814 progress 100 % (8 MB)
40 12:31:58.977052 8 MB downloaded in 0.05 s (170.93 MB/s)
41 12:31:58.977206 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:31:58.977446 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:31:58.977537 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:31:58.977623 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:31:58.977765 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.201-cip41-69-g8f7b450fc28ed/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:31:58.977837 saving as /var/lib/lava/dispatcher/tmp/12269827/tftp-deploy-ghuz9_yg/kernel/bzImage
48 12:31:58.977900 total size: 14129248 (13 MB)
49 12:31:58.977961 No compression specified
50 12:31:58.979130 progress 0 % (0 MB)
51 12:31:58.982839 progress 5 % (0 MB)
52 12:31:58.986626 progress 10 % (1 MB)
53 12:31:58.990254 progress 15 % (2 MB)
54 12:31:58.994057 progress 20 % (2 MB)
55 12:31:58.997662 progress 25 % (3 MB)
56 12:31:59.001500 progress 30 % (4 MB)
57 12:31:59.005126 progress 35 % (4 MB)
58 12:31:59.008917 progress 40 % (5 MB)
59 12:31:59.012718 progress 45 % (6 MB)
60 12:31:59.016299 progress 50 % (6 MB)
61 12:31:59.020136 progress 55 % (7 MB)
62 12:31:59.023768 progress 60 % (8 MB)
63 12:31:59.027602 progress 65 % (8 MB)
64 12:31:59.031188 progress 70 % (9 MB)
65 12:31:59.034970 progress 75 % (10 MB)
66 12:31:59.038532 progress 80 % (10 MB)
67 12:31:59.042233 progress 85 % (11 MB)
68 12:31:59.045963 progress 90 % (12 MB)
69 12:31:59.049523 progress 95 % (12 MB)
70 12:31:59.053259 progress 100 % (13 MB)
71 12:31:59.053389 13 MB downloaded in 0.08 s (178.51 MB/s)
72 12:31:59.053536 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:31:59.053770 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:31:59.053861 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:31:59.053946 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:31:59.054093 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.201-cip41-69-g8f7b450fc28ed/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:31:59.054167 saving as /var/lib/lava/dispatcher/tmp/12269827/tftp-deploy-ghuz9_yg/modules/modules.tar
79 12:31:59.054229 total size: 527392 (0 MB)
80 12:31:59.054291 Using unxz to decompress xz
81 12:31:59.058307 progress 6 % (0 MB)
82 12:31:59.058708 progress 12 % (0 MB)
83 12:31:59.058946 progress 18 % (0 MB)
84 12:31:59.060541 progress 24 % (0 MB)
85 12:31:59.062459 progress 31 % (0 MB)
86 12:31:59.064508 progress 37 % (0 MB)
87 12:31:59.066585 progress 43 % (0 MB)
88 12:31:59.068592 progress 49 % (0 MB)
89 12:31:59.070612 progress 55 % (0 MB)
90 12:31:59.072531 progress 62 % (0 MB)
91 12:31:59.074609 progress 68 % (0 MB)
92 12:31:59.076663 progress 74 % (0 MB)
93 12:31:59.078701 progress 80 % (0 MB)
94 12:31:59.080989 progress 86 % (0 MB)
95 12:31:59.082823 progress 93 % (0 MB)
96 12:31:59.084841 progress 99 % (0 MB)
97 12:31:59.092334 0 MB downloaded in 0.04 s (13.20 MB/s)
98 12:31:59.092576 end: 1.3.1 http-download (duration 00:00:00) [common]
100 12:31:59.092838 end: 1.3 download-retry (duration 00:00:00) [common]
101 12:31:59.092931 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
102 12:31:59.093026 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
103 12:31:59.093108 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
104 12:31:59.093193 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
105 12:31:59.093423 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229
106 12:31:59.093563 makedir: /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin
107 12:31:59.093672 makedir: /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/tests
108 12:31:59.093774 makedir: /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/results
109 12:31:59.093890 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-add-keys
110 12:31:59.094039 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-add-sources
111 12:31:59.094170 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-background-process-start
112 12:31:59.094304 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-background-process-stop
113 12:31:59.094432 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-common-functions
114 12:31:59.094558 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-echo-ipv4
115 12:31:59.094682 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-install-packages
116 12:31:59.094807 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-installed-packages
117 12:31:59.094931 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-os-build
118 12:31:59.095056 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-probe-channel
119 12:31:59.095185 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-probe-ip
120 12:31:59.095310 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-target-ip
121 12:31:59.095471 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-target-mac
122 12:31:59.095650 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-target-storage
123 12:31:59.095812 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-test-case
124 12:31:59.095942 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-test-event
125 12:31:59.096067 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-test-feedback
126 12:31:59.096194 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-test-raise
127 12:31:59.096320 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-test-reference
128 12:31:59.096446 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-test-runner
129 12:31:59.096570 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-test-set
130 12:31:59.096696 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-test-shell
131 12:31:59.096824 Updating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-install-packages (oe)
132 12:31:59.096977 Updating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/bin/lava-installed-packages (oe)
133 12:31:59.097100 Creating /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/environment
134 12:31:59.097201 LAVA metadata
135 12:31:59.097275 - LAVA_JOB_ID=12269827
136 12:31:59.097343 - LAVA_DISPATCHER_IP=192.168.201.1
137 12:31:59.097448 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
138 12:31:59.097518 skipped lava-vland-overlay
139 12:31:59.097592 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
140 12:31:59.097676 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
141 12:31:59.097739 skipped lava-multinode-overlay
142 12:31:59.097812 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
143 12:31:59.097891 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
144 12:31:59.097967 Loading test definitions
145 12:31:59.098062 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
146 12:31:59.098138 Using /lava-12269827 at stage 0
147 12:31:59.098483 uuid=12269827_1.4.2.3.1 testdef=None
148 12:31:59.098573 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
149 12:31:59.098663 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
150 12:31:59.099198 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
152 12:31:59.099465 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
153 12:31:59.100165 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
155 12:31:59.100396 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
156 12:31:59.101018 runner path: /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/0/tests/0_dmesg test_uuid 12269827_1.4.2.3.1
157 12:31:59.101173 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
159 12:31:59.101402 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
160 12:31:59.101475 Using /lava-12269827 at stage 1
161 12:31:59.101783 uuid=12269827_1.4.2.3.5 testdef=None
162 12:31:59.101872 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
163 12:31:59.101956 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
164 12:31:59.102437 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
166 12:31:59.102659 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
167 12:31:59.103328 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
169 12:31:59.103576 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
170 12:31:59.104199 runner path: /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/1/tests/1_bootrr test_uuid 12269827_1.4.2.3.5
171 12:31:59.104351 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
173 12:31:59.104559 Creating lava-test-runner.conf files
174 12:31:59.104623 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/0 for stage 0
175 12:31:59.104716 - 0_dmesg
176 12:31:59.104795 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12269827/lava-overlay-s7k10229/lava-12269827/1 for stage 1
177 12:31:59.104885 - 1_bootrr
178 12:31:59.104979 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
179 12:31:59.105067 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
180 12:31:59.113615 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
181 12:31:59.113722 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
182 12:31:59.113809 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
183 12:31:59.113895 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
184 12:31:59.113981 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
185 12:31:59.369113 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
186 12:31:59.369509 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
187 12:31:59.369662 extracting modules file /var/lib/lava/dispatcher/tmp/12269827/tftp-deploy-ghuz9_yg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12269827/extract-overlay-ramdisk-uqmhag96/ramdisk
188 12:31:59.395191 end: 1.4.4 extract-modules (duration 00:00:00) [common]
189 12:31:59.395341 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
190 12:31:59.395487 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12269827/compress-overlay-lpyrw2lx/overlay-1.4.2.4.tar.gz to ramdisk
191 12:31:59.395561 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12269827/compress-overlay-lpyrw2lx/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12269827/extract-overlay-ramdisk-uqmhag96/ramdisk
192 12:31:59.403735 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
193 12:31:59.403843 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
194 12:31:59.403933 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
195 12:31:59.404027 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
196 12:31:59.404104 Building ramdisk /var/lib/lava/dispatcher/tmp/12269827/extract-overlay-ramdisk-uqmhag96/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12269827/extract-overlay-ramdisk-uqmhag96/ramdisk
197 12:31:59.549314 >> 54150 blocks
198 12:32:00.463606 rename /var/lib/lava/dispatcher/tmp/12269827/extract-overlay-ramdisk-uqmhag96/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12269827/tftp-deploy-ghuz9_yg/ramdisk/ramdisk.cpio.gz
199 12:32:00.464025 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
200 12:32:00.464152 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
201 12:32:00.464257 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
202 12:32:00.464360 No mkimage arch provided, not using FIT.
203 12:32:00.464456 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
204 12:32:00.464544 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
205 12:32:00.464653 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
206 12:32:00.464744 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
207 12:32:00.464821 No LXC device requested
208 12:32:00.464901 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
209 12:32:00.464988 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
210 12:32:00.465070 end: 1.6 deploy-device-env (duration 00:00:00) [common]
211 12:32:00.465149 Checking files for TFTP limit of 4294967296 bytes.
212 12:32:00.465632 end: 1 tftp-deploy (duration 00:00:02) [common]
213 12:32:00.465739 start: 2 depthcharge-action (timeout 00:05:00) [common]
214 12:32:00.465831 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
215 12:32:00.465952 substitutions:
216 12:32:00.466019 - {DTB}: None
217 12:32:00.466084 - {INITRD}: 12269827/tftp-deploy-ghuz9_yg/ramdisk/ramdisk.cpio.gz
218 12:32:00.466144 - {KERNEL}: 12269827/tftp-deploy-ghuz9_yg/kernel/bzImage
219 12:32:00.466202 - {LAVA_MAC}: None
220 12:32:00.466259 - {PRESEED_CONFIG}: None
221 12:32:00.466314 - {PRESEED_LOCAL}: None
222 12:32:00.466369 - {RAMDISK}: 12269827/tftp-deploy-ghuz9_yg/ramdisk/ramdisk.cpio.gz
223 12:32:00.466424 - {ROOT_PART}: None
224 12:32:00.466478 - {ROOT}: None
225 12:32:00.466531 - {SERVER_IP}: 192.168.201.1
226 12:32:00.466585 - {TEE}: None
227 12:32:00.466639 Parsed boot commands:
228 12:32:00.466700 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
229 12:32:00.466911 Parsed boot commands: tftpboot 192.168.201.1 12269827/tftp-deploy-ghuz9_yg/kernel/bzImage 12269827/tftp-deploy-ghuz9_yg/kernel/cmdline 12269827/tftp-deploy-ghuz9_yg/ramdisk/ramdisk.cpio.gz
230 12:32:00.466999 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
231 12:32:00.467083 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
232 12:32:00.467174 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
233 12:32:00.467262 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
234 12:32:00.467381 Not connected, no need to disconnect.
235 12:32:00.467511 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
236 12:32:00.467600 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
237 12:32:00.467672 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-6'
238 12:32:00.471261 Setting prompt string to ['lava-test: # ']
239 12:32:00.471655 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
240 12:32:00.471764 end: 2.2.1 reset-connection (duration 00:00:00) [common]
241 12:32:00.471863 start: 2.2.2 reset-device (timeout 00:05:00) [common]
242 12:32:00.471956 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
243 12:32:00.472192 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-6' '--port=1' '--command=reboot'
244 12:32:05.608098 >> Command sent successfully.
245 12:32:05.610474 Returned 0 in 5 seconds
246 12:32:05.711326 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
248 12:32:05.712878 end: 2.2.2 reset-device (duration 00:00:05) [common]
249 12:32:05.713413 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
250 12:32:05.713909 Setting prompt string to 'Starting depthcharge on Volmar...'
251 12:32:05.714299 Changing prompt to 'Starting depthcharge on Volmar...'
252 12:32:05.714672 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
253 12:32:05.715977 [Enter `^Ec?' for help]
254 12:32:07.490592
255 12:32:07.490905
256 12:32:07.497360 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
257 12:32:07.500946 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
258 12:32:07.508575 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
259 12:32:07.511811 CPU: AES supported, TXT NOT supported, VT supported
260 12:32:07.518900 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
261 12:32:07.523184 Cache size = 10 MiB
262 12:32:07.526780 MCH: device id 4609 (rev 04) is Alderlake-P
263 12:32:07.533440 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
264 12:32:07.537073 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
265 12:32:07.540555 VBOOT: Loading verstage.
266 12:32:07.544049 FMAP: Found "FLASH" version 1.1 at 0x1804000.
267 12:32:07.547541 FMAP: base = 0x0 size = 0x2000000 #areas = 37
268 12:32:07.553912 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 12:32:07.560879 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
270 12:32:07.570278 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
271 12:32:07.570550
272 12:32:07.570782
273 12:32:07.580803 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
274 12:32:07.584198 Probing TPM I2C: I2C bus 1 version 0x3230302a
275 12:32:07.590444 DW I2C bus 1 at 0xfe022000 (400 KHz)
276 12:32:07.590653 done! DID_VID 0x00281ae0
277 12:32:07.594335 TPM ready after 0 ms
278 12:32:07.597258 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
279 12:32:07.610806 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
280 12:32:07.617569 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
281 12:32:07.664299 tlcl_send_startup: Startup return code is 0
282 12:32:07.664559 TPM: setup succeeded
283 12:32:07.685662 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
284 12:32:07.707543 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
285 12:32:07.711375 Chrome EC: UHEPI supported
286 12:32:07.714588 Reading cr50 boot mode
287 12:32:07.729364 Cr50 says boot_mode is VERIFIED_RW(0x00).
288 12:32:07.729483 Phase 1
289 12:32:07.736026 FMAP: area GBB found @ 1805000 (458752 bytes)
290 12:32:07.742745 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
291 12:32:07.749588 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
292 12:32:07.756008 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
293 12:32:07.759331 Phase 2
294 12:32:07.759489 Phase 3
295 12:32:07.763268 FMAP: area GBB found @ 1805000 (458752 bytes)
296 12:32:07.767302 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 12:32:07.774137 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 12:32:07.780541 VB2:vb2_verify_keyblock() Checking keyblock signature...
299 12:32:07.787243 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
300 12:32:07.790632 VB2:vb2_verify_digest() HW RSA forbidden, using SW
301 12:32:07.797557 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
302 12:32:07.810138 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
303 12:32:07.813348 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 12:32:07.820354 VB2:vb2_verify_fw_preamble() Verifying preamble.
305 12:32:07.827408 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
306 12:32:07.830756 VB2:vb2_verify_digest() HW RSA forbidden, using SW
307 12:32:07.837317 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
308 12:32:07.841278 Phase 4
309 12:32:07.844490 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
310 12:32:07.851040 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
311 12:32:08.076670 VB2:vb2_verify_digest() HW RSA forbidden, using SW
312 12:32:08.083077 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
313 12:32:08.086481 Saving vboot hash.
314 12:32:08.093277 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
315 12:32:08.109823 tlcl_extend: response is 0
316 12:32:08.116753 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
317 12:32:08.123117 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
318 12:32:08.138233 tlcl_extend: response is 0
319 12:32:08.144797 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
320 12:32:08.164364 tlcl_lock_nv_write: response is 0
321 12:32:08.183240 tlcl_lock_nv_write: response is 0
322 12:32:08.183360 Slot A is selected
323 12:32:08.190188 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
324 12:32:08.196477 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
325 12:32:08.203565 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
326 12:32:08.209693 BS: verstage times (exec / console): total (unknown) / 246 ms
327 12:32:08.209799
328 12:32:08.209905
329 12:32:08.216709 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
330 12:32:08.221029 Google Chrome EC: version:
331 12:32:08.223720 ro: volmar_v2.0.14126-e605144e9c
332 12:32:08.227125 rw: volmar_v0.0.55-22d1557
333 12:32:08.230436 running image: 2
334 12:32:08.233547 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
335 12:32:08.243824 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
336 12:32:08.250166 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
337 12:32:08.257317 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
338 12:32:08.267363 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
339 12:32:08.277356 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
340 12:32:08.280651 EC took 941us to calculate image hash
341 12:32:08.290092 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
342 12:32:08.293514 VB2:sync_ec() select_rw=RW(active)
343 12:32:08.306306 Waited 275us to clear limit power flag.
344 12:32:08.309488 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 12:32:08.312890 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 12:32:08.316146 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
347 12:32:08.323332 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
348 12:32:08.326699 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
349 12:32:08.329666 TCO_STS: 0000 0000
350 12:32:08.333113 GEN_PMCON: d0015038 00002200
351 12:32:08.336268 GBLRST_CAUSE: 00000000 00000000
352 12:32:08.336371 HPR_CAUSE0: 00000000
353 12:32:08.339925 prev_sleep_state 5
354 12:32:08.343586 Abort disabling TXT, as CPU is not TXT capable.
355 12:32:08.348380 cse_lite: Number of partitions = 3
356 12:32:08.351818 cse_lite: Current partition = RO
357 12:32:08.355168 cse_lite: Next partition = RO
358 12:32:08.358778 cse_lite: Flags = 0x7
359 12:32:08.365450 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
360 12:32:08.374858 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
361 12:32:08.378449 FMAP: area SI_ME found @ 1000 (5238784 bytes)
362 12:32:08.384753 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
363 12:32:08.391504 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
364 12:32:08.398396 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
365 12:32:08.401638 cse_lite: CSE CBFS RW version : 16.1.25.2049
366 12:32:08.408150 cse_lite: Set Boot Partition Info Command (RW)
367 12:32:08.411584 HECI: Global Reset(Type:1) Command
368 12:32:09.838092 ��h�U: ID 906a4, Alderlake R0 Platform, ucode: 00000423
369 12:32:09.844957 CPU: AES supported, TXT NOT supported, VT supported
370 12:32:09.851224 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
371 12:32:09.854613 Cache size = 10 MiB
372 12:32:09.858218 MCH: device id 4609 (rev 04) is Alderlake-P
373 12:32:09.861732 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
374 12:32:09.868002 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
375 12:32:09.872014 VBOOT: Loading verstage.
376 12:32:09.876047 FMAP: Found "FLASH" version 1.1 at 0x1804000.
377 12:32:09.879222 FMAP: base = 0x0 size = 0x2000000 #areas = 37
378 12:32:09.885778 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
379 12:32:09.893321 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
380 12:32:09.899953 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
381 12:32:09.900117
382 12:32:09.903410
383 12:32:09.909871 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
384 12:32:09.916863 Probing TPM I2C: I2C bus 1 version 0x3230302a
385 12:32:09.920287 DW I2C bus 1 at 0xfe022000 (400 KHz)
386 12:32:09.923305 done! DID_VID 0x00281ae0
387 12:32:09.926755 TPM ready after 0 ms
388 12:32:09.930494 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
389 12:32:09.942812 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
390 12:32:09.946342 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
391 12:32:09.999034 tlcl_send_startup: Startup return code is 0
392 12:32:09.999606 TPM: setup succeeded
393 12:32:10.019399 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
394 12:32:10.041418 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
395 12:32:10.045375 Chrome EC: UHEPI supported
396 12:32:10.048415 Reading cr50 boot mode
397 12:32:10.063215 Cr50 says boot_mode is VERIFIED_RW(0x00).
398 12:32:10.063308 Phase 1
399 12:32:10.069958 FMAP: area GBB found @ 1805000 (458752 bytes)
400 12:32:10.076455 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
401 12:32:10.083491 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
402 12:32:10.090073 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
403 12:32:10.090191 Phase 2
404 12:32:10.093881 Phase 3
405 12:32:10.097039 FMAP: area GBB found @ 1805000 (458752 bytes)
406 12:32:10.103772 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
407 12:32:10.107205 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
408 12:32:10.113197 VB2:vb2_verify_keyblock() Checking keyblock signature...
409 12:32:10.120316 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
410 12:32:10.126893 VB2:vb2_verify_digest() HW RSA forbidden, using SW
411 12:32:10.129870 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
412 12:32:10.144699 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
413 12:32:10.148074 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
414 12:32:10.154977 VB2:vb2_verify_fw_preamble() Verifying preamble.
415 12:32:10.161473 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
416 12:32:10.164851 VB2:vb2_verify_digest() HW RSA forbidden, using SW
417 12:32:10.171085 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
418 12:32:10.175793 Phase 4
419 12:32:10.178816 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
420 12:32:10.185497 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
421 12:32:10.410841 VB2:vb2_verify_digest() HW RSA forbidden, using SW
422 12:32:10.417740 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
423 12:32:10.421210 Saving vboot hash.
424 12:32:10.428092 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
425 12:32:10.443740 tlcl_extend: response is 0
426 12:32:10.450527 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
427 12:32:10.456493 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
428 12:32:10.470844 tlcl_extend: response is 0
429 12:32:10.477953 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
430 12:32:10.497589 tlcl_lock_nv_write: response is 0
431 12:32:10.517215 tlcl_lock_nv_write: response is 0
432 12:32:10.517779 Slot A is selected
433 12:32:10.523546 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
434 12:32:10.530409 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
435 12:32:10.537165 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
436 12:32:10.543137 BS: verstage times (exec / console): total (unknown) / 246 ms
437 12:32:10.543743
438 12:32:10.544115
439 12:32:10.549815 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
440 12:32:10.553776 Google Chrome EC: version:
441 12:32:10.557315 ro: volmar_v2.0.14126-e605144e9c
442 12:32:10.561013 rw: volmar_v0.0.55-22d1557
443 12:32:10.564171 running image: 2
444 12:32:10.567506 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
445 12:32:10.577725 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
446 12:32:10.583728 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
447 12:32:10.590995 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
448 12:32:10.600822 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
449 12:32:10.610543 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
450 12:32:10.614246 EC took 940us to calculate image hash
451 12:32:10.624283 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 12:32:10.627296 VB2:sync_ec() select_rw=RW(active)
453 12:32:10.640009 Waited 1545us to clear limit power flag.
454 12:32:10.642771 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
455 12:32:10.646398 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
456 12:32:10.649817 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
457 12:32:10.656498 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
458 12:32:10.659895 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
459 12:32:10.663382 TCO_STS: 0000 0000
460 12:32:10.666516 GEN_PMCON: d1001038 00002200
461 12:32:10.669701 GBLRST_CAUSE: 00000040 00000000
462 12:32:10.670172 HPR_CAUSE0: 00000000
463 12:32:10.672782 prev_sleep_state 5
464 12:32:10.675666 Abort disabling TXT, as CPU is not TXT capable.
465 12:32:10.684395 cse_lite: Number of partitions = 3
466 12:32:10.687360 cse_lite: Current partition = RW
467 12:32:10.687498 cse_lite: Next partition = RW
468 12:32:10.690969 cse_lite: Flags = 0x7
469 12:32:10.698074 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
470 12:32:10.707943 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
471 12:32:10.711058 FMAP: area SI_ME found @ 1000 (5238784 bytes)
472 12:32:10.717988 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
473 12:32:10.724564 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
474 12:32:10.730995 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
475 12:32:10.734755 cse_lite: CSE CBFS RW version : 16.1.25.2049
476 12:32:10.737595 Boot Count incremented to 4344
477 12:32:10.744655 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
478 12:32:10.751593 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
479 12:32:10.764067 Probing TPM I2C: done! DID_VID 0x00281ae0
480 12:32:10.767459 Locality already claimed
481 12:32:10.770938 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
482 12:32:10.790631 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
483 12:32:10.796430 MRC: Hash idx 0x100d comparison successful.
484 12:32:10.800174 MRC cache found, size f6c8
485 12:32:10.800648 bootmode is set to: 2
486 12:32:10.803910 EC returned error result code 3
487 12:32:10.807108 FW_CONFIG value from CBI is 0x131
488 12:32:10.814052 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
489 12:32:10.817464 SPD index = 0
490 12:32:10.824000 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
491 12:32:10.824574 SPD: module type is LPDDR4X
492 12:32:10.831583 SPD: module part number is K4U6E3S4AB-MGCL
493 12:32:10.834955 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
494 12:32:10.841385 SPD: device width 16 bits, bus width 16 bits
495 12:32:10.844946 SPD: module size is 1024 MB (per channel)
496 12:32:10.913708 CBMEM:
497 12:32:10.917176 IMD: root @ 0x76fff000 254 entries.
498 12:32:10.920101 IMD: root @ 0x76ffec00 62 entries.
499 12:32:10.927746 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
500 12:32:10.931114 RO_VPD is uninitialized or empty.
501 12:32:10.934161 FMAP: area RW_VPD found @ f29000 (8192 bytes)
502 12:32:10.941387 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
503 12:32:10.944108 External stage cache:
504 12:32:10.948294 IMD: root @ 0x7bbff000 254 entries.
505 12:32:10.951496 IMD: root @ 0x7bbfec00 62 entries.
506 12:32:10.957717 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
507 12:32:10.964504 MRC: Checking cached data update for 'RW_MRC_CACHE'.
508 12:32:10.967857 MRC: 'RW_MRC_CACHE' does not need update.
509 12:32:10.968332 8 DIMMs found
510 12:32:10.970965 SMM Memory Map
511 12:32:10.974774 SMRAM : 0x7b800000 0x800000
512 12:32:10.978262 Subregion 0: 0x7b800000 0x200000
513 12:32:10.981371 Subregion 1: 0x7ba00000 0x200000
514 12:32:10.984438 Subregion 2: 0x7bc00000 0x400000
515 12:32:10.987898 top_of_ram = 0x77000000
516 12:32:10.991243 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
517 12:32:10.997955 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
518 12:32:11.004387 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
519 12:32:11.007416 MTRR Range: Start=ff000000 End=0 (Size 1000000)
520 12:32:11.007896 Normal boot
521 12:32:11.017430 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
522 12:32:11.024297 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
523 12:32:11.031055 Processing 237 relocs. Offset value of 0x74ab9000
524 12:32:11.039134 BS: romstage times (exec / console): total (unknown) / 377 ms
525 12:32:11.046678
526 12:32:11.047261
527 12:32:11.052717 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
528 12:32:11.053234 Normal boot
529 12:32:11.059830 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
530 12:32:11.066370 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
531 12:32:11.073318 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
532 12:32:11.083055 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
533 12:32:11.131752 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
534 12:32:11.138678 Processing 5931 relocs. Offset value of 0x72a2f000
535 12:32:11.141607 BS: postcar times (exec / console): total (unknown) / 51 ms
536 12:32:11.145024
537 12:32:11.145490
538 12:32:11.151434 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
539 12:32:11.155468 Reserving BERT start 76a1e000, size 10000
540 12:32:11.158486 Normal boot
541 12:32:11.161782 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
542 12:32:11.168171 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
543 12:32:11.178411 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
544 12:32:11.181852 FMAP: area RW_VPD found @ f29000 (8192 bytes)
545 12:32:11.184809 Google Chrome EC: version:
546 12:32:11.188416 ro: volmar_v2.0.14126-e605144e9c
547 12:32:11.191864 rw: volmar_v0.0.55-22d1557
548 12:32:11.192336 running image: 2
549 12:32:11.198172 ACPI _SWS is PM1 Index 8 GPE Index -1
550 12:32:11.201407 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
551 12:32:11.206846 EC returned error result code 3
552 12:32:11.209751 FW_CONFIG value from CBI is 0x131
553 12:32:11.216516 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
554 12:32:11.219583 PCI: 00:1c.2 disabled by fw_config
555 12:32:11.226360 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
556 12:32:11.229705 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
557 12:32:11.236122 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 12:32:11.239825 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
559 12:32:11.245819 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
560 12:32:11.252900 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
561 12:32:11.259591 microcode: sig=0x906a4 pf=0x80 revision=0x423
562 12:32:11.262395 microcode: Update skipped, already up-to-date
563 12:32:11.269005 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
564 12:32:11.302390 Detected 6 core, 8 thread CPU.
565 12:32:11.305360 Setting up SMI for CPU
566 12:32:11.309019 IED base = 0x7bc00000
567 12:32:11.309596 IED size = 0x00400000
568 12:32:11.312011 Will perform SMM setup.
569 12:32:11.315649 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
570 12:32:11.318938 LAPIC 0x0 in XAPIC mode.
571 12:32:11.328603 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
572 12:32:11.332056 Processing 18 relocs. Offset value of 0x00030000
573 12:32:11.336964 Attempting to start 7 APs
574 12:32:11.340082 Waiting for 10ms after sending INIT.
575 12:32:11.353138 Waiting for SIPI to complete...
576 12:32:11.356189 LAPIC 0x1 in XAPIC mode.
577 12:32:11.360065 LAPIC 0x12 in XAPIC mode.
578 12:32:11.363581 LAPIC 0x16 in XAPIC mode.
579 12:32:11.367115 LAPIC 0x9 in XAPIC mode.
580 12:32:11.367749 LAPIC 0x10 in XAPIC mode.
581 12:32:11.373047 AP: slot 6 apic_id 9, MCU rev: 0x00000423
582 12:32:11.373609 LAPIC 0x14 in XAPIC mode.
583 12:32:11.379815 AP: slot 4 apic_id 12, MCU rev: 0x00000423
584 12:32:11.383126 AP: slot 2 apic_id 16, MCU rev: 0x00000423
585 12:32:11.386619 AP: slot 1 apic_id 14, MCU rev: 0x00000423
586 12:32:11.392739 AP: slot 3 apic_id 10, MCU rev: 0x00000423
587 12:32:11.393430 LAPIC 0x8 in XAPIC mode.
588 12:32:11.399737 AP: slot 5 apic_id 1, MCU rev: 0x00000423
589 12:32:11.400224 done.
590 12:32:11.402692 Waiting for SIPI to complete...
591 12:32:11.403193 done.
592 12:32:11.406542 AP: slot 7 apic_id 8, MCU rev: 0x00000423
593 12:32:11.409838 smm_setup_relocation_handler: enter
594 12:32:11.413005 smm_setup_relocation_handler: exit
595 12:32:11.422845 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
596 12:32:11.426220 Processing 11 relocs. Offset value of 0x00038000
597 12:32:11.432899 smm_module_setup_stub: stack_top = 0x7b804000
598 12:32:11.435996 smm_module_setup_stub: per cpu stack_size = 0x800
599 12:32:11.442950 smm_module_setup_stub: runtime.start32_offset = 0x4c
600 12:32:11.445971 smm_module_setup_stub: runtime.smm_size = 0x10000
601 12:32:11.452553 SMM Module: stub loaded at 38000. Will call 0x76a52094
602 12:32:11.456407 Installing permanent SMM handler to 0x7b800000
603 12:32:11.462834 smm_load_module: total_smm_space_needed e468, available -> 200000
604 12:32:11.472813 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
605 12:32:11.476175 Processing 255 relocs. Offset value of 0x7b9f6000
606 12:32:11.482709 smm_load_module: smram_start: 0x7b800000
607 12:32:11.486150 smm_load_module: smram_end: 7ba00000
608 12:32:11.489321 smm_load_module: handler start 0x7b9f6d5f
609 12:32:11.492435 smm_load_module: handler_size 98d0
610 12:32:11.496285 smm_load_module: fxsave_area 0x7b9ff000
611 12:32:11.499452 smm_load_module: fxsave_size 1000
612 12:32:11.502641 smm_load_module: CONFIG_MSEG_SIZE 0x0
613 12:32:11.509207 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
614 12:32:11.516063 smm_load_module: handler_mod_params.smbase = 0x7b800000
615 12:32:11.519026 smm_load_module: per_cpu_save_state_size = 0x400
616 12:32:11.522916 smm_load_module: num_cpus = 0x8
617 12:32:11.529005 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
618 12:32:11.532705 smm_load_module: total_save_state_size = 0x2000
619 12:32:11.535619 smm_load_module: cpu0 entry: 7b9e6000
620 12:32:11.542622 smm_create_map: cpus allowed in one segment 30
621 12:32:11.545766 smm_create_map: min # of segments needed 1
622 12:32:11.546239 CPU 0x0
623 12:32:11.552414 smbase 7b9e6000 entry 7b9ee000
624 12:32:11.555721 ss_start 7b9f5c00 code_end 7b9ee208
625 12:32:11.556389 CPU 0x1
626 12:32:11.559255 smbase 7b9e5c00 entry 7b9edc00
627 12:32:11.565583 ss_start 7b9f5800 code_end 7b9ede08
628 12:32:11.566059 CPU 0x2
629 12:32:11.569018 smbase 7b9e5800 entry 7b9ed800
630 12:32:11.575756 ss_start 7b9f5400 code_end 7b9eda08
631 12:32:11.576329 CPU 0x3
632 12:32:11.579067 smbase 7b9e5400 entry 7b9ed400
633 12:32:11.582426 ss_start 7b9f5000 code_end 7b9ed608
634 12:32:11.585707 CPU 0x4
635 12:32:11.588916 smbase 7b9e5000 entry 7b9ed000
636 12:32:11.592352 ss_start 7b9f4c00 code_end 7b9ed208
637 12:32:11.592826 CPU 0x5
638 12:32:11.595796 smbase 7b9e4c00 entry 7b9ecc00
639 12:32:11.602774 ss_start 7b9f4800 code_end 7b9ece08
640 12:32:11.603393 CPU 0x6
641 12:32:11.605668 smbase 7b9e4800 entry 7b9ec800
642 12:32:11.612070 ss_start 7b9f4400 code_end 7b9eca08
643 12:32:11.612703 CPU 0x7
644 12:32:11.615453 smbase 7b9e4400 entry 7b9ec400
645 12:32:11.622166 ss_start 7b9f4000 code_end 7b9ec608
646 12:32:11.628692 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
647 12:32:11.631780 Processing 11 relocs. Offset value of 0x7b9ee000
648 12:32:11.638508 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
649 12:32:11.645294 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
650 12:32:11.652101 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
651 12:32:11.658646 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
652 12:32:11.665139 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
653 12:32:11.671540 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
654 12:32:11.678542 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
655 12:32:11.681876 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
656 12:32:11.688440 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
657 12:32:11.695310 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
658 12:32:11.701615 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
659 12:32:11.708308 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
660 12:32:11.715004 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
661 12:32:11.721247 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
662 12:32:11.728124 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
663 12:32:11.731403 smm_module_setup_stub: stack_top = 0x7b804000
664 12:32:11.738457 smm_module_setup_stub: per cpu stack_size = 0x800
665 12:32:11.741546 smm_module_setup_stub: runtime.start32_offset = 0x4c
666 12:32:11.748116 smm_module_setup_stub: runtime.smm_size = 0x200000
667 12:32:11.751583 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
668 12:32:11.756901 Clearing SMI status registers
669 12:32:11.760004 SMI_STS: PM1
670 12:32:11.760436 PM1_STS: WAK PWRBTN
671 12:32:11.770429 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
672 12:32:11.773696 In relocation handler: CPU 0
673 12:32:11.777471 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
674 12:32:11.780525 Writing SMRR. base = 0x7b800006, mask=0xff800c00
675 12:32:11.783513 Relocation complete.
676 12:32:11.790149 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
677 12:32:11.793488 In relocation handler: CPU 5
678 12:32:11.796851 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
679 12:32:11.799905 Relocation complete.
680 12:32:11.806853 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
681 12:32:11.810207 In relocation handler: CPU 3
682 12:32:11.813132 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
683 12:32:11.820511 Writing SMRR. base = 0x7b800006, mask=0xff800c00
684 12:32:11.821089 Relocation complete.
685 12:32:11.826920 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
686 12:32:11.830120 In relocation handler: CPU 4
687 12:32:11.833639 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
688 12:32:11.839927 Writing SMRR. base = 0x7b800006, mask=0xff800c00
689 12:32:11.843818 Relocation complete.
690 12:32:11.850592 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
691 12:32:11.853216 In relocation handler: CPU 2
692 12:32:11.856600 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
693 12:32:11.859701 Writing SMRR. base = 0x7b800006, mask=0xff800c00
694 12:32:11.863192 Relocation complete.
695 12:32:11.870001 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
696 12:32:11.872930 In relocation handler: CPU 1
697 12:32:11.876693 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
698 12:32:11.883102 Writing SMRR. base = 0x7b800006, mask=0xff800c00
699 12:32:11.883628 Relocation complete.
700 12:32:11.893136 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
701 12:32:11.893698 In relocation handler: CPU 7
702 12:32:11.899897 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
703 12:32:11.902829 Writing SMRR. base = 0x7b800006, mask=0xff800c00
704 12:32:11.906620 Relocation complete.
705 12:32:11.913080 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
706 12:32:11.916258 In relocation handler: CPU 6
707 12:32:11.919733 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
708 12:32:11.923255 Relocation complete.
709 12:32:11.923856 Initializing CPU #0
710 12:32:11.926496 CPU: vendor Intel device 906a4
711 12:32:11.929795 CPU: family 06, model 9a, stepping 04
712 12:32:11.932885 Clearing out pending MCEs
713 12:32:11.936099 cpu: energy policy set to 7
714 12:32:11.939220 Turbo is available but hidden
715 12:32:11.942725 Turbo is available and visible
716 12:32:11.946102 microcode: Update skipped, already up-to-date
717 12:32:11.950050 CPU #0 initialized
718 12:32:11.952618 Initializing CPU #5
719 12:32:11.953090 Initializing CPU #4
720 12:32:11.956679 Initializing CPU #1
721 12:32:11.960313 CPU: vendor Intel device 906a4
722 12:32:11.962631 CPU: family 06, model 9a, stepping 04
723 12:32:11.966262 Initializing CPU #6
724 12:32:11.966835 Initializing CPU #2
725 12:32:11.969247 Initializing CPU #3
726 12:32:11.972639 CPU: vendor Intel device 906a4
727 12:32:11.976172 CPU: family 06, model 9a, stepping 04
728 12:32:11.979864 CPU: vendor Intel device 906a4
729 12:32:11.983069 CPU: family 06, model 9a, stepping 04
730 12:32:11.986325 CPU: vendor Intel device 906a4
731 12:32:11.989628 CPU: family 06, model 9a, stepping 04
732 12:32:11.993043 Clearing out pending MCEs
733 12:32:11.996105 Clearing out pending MCEs
734 12:32:11.996590 Clearing out pending MCEs
735 12:32:11.999552 CPU: vendor Intel device 906a4
736 12:32:12.002538 CPU: family 06, model 9a, stepping 04
737 12:32:12.006185 cpu: energy policy set to 7
738 12:32:12.009417 Clearing out pending MCEs
739 12:32:12.012687 cpu: energy policy set to 7
740 12:32:12.016054 cpu: energy policy set to 7
741 12:32:12.019634 microcode: Update skipped, already up-to-date
742 12:32:12.023293 CPU #3 initialized
743 12:32:12.026023 cpu: energy policy set to 7
744 12:32:12.029417 microcode: Update skipped, already up-to-date
745 12:32:12.032693 CPU #4 initialized
746 12:32:12.035938 microcode: Update skipped, already up-to-date
747 12:32:12.039269 CPU #2 initialized
748 12:32:12.042765 microcode: Update skipped, already up-to-date
749 12:32:12.046040 CPU #1 initialized
750 12:32:12.046589 Clearing out pending MCEs
751 12:32:12.049357 Initializing CPU #7
752 12:32:12.052644 CPU: vendor Intel device 906a4
753 12:32:12.056014 CPU: family 06, model 9a, stepping 04
754 12:32:12.059480 CPU: vendor Intel device 906a4
755 12:32:12.062696 CPU: family 06, model 9a, stepping 04
756 12:32:12.066786 Clearing out pending MCEs
757 12:32:12.069211 cpu: energy policy set to 7
758 12:32:12.069685 Clearing out pending MCEs
759 12:32:12.072769 cpu: energy policy set to 7
760 12:32:12.075944 cpu: energy policy set to 7
761 12:32:12.082560 microcode: Update skipped, already up-to-date
762 12:32:12.083176 CPU #5 initialized
763 12:32:12.089370 microcode: Update skipped, already up-to-date
764 12:32:12.089934 CPU #7 initialized
765 12:32:12.092460 microcode: Update skipped, already up-to-date
766 12:32:12.095937 CPU #6 initialized
767 12:32:12.099216 bsp_do_flight_plan done after 693 msecs.
768 12:32:12.102950 CPU: frequency set to 4400 MHz
769 12:32:12.106174 Enabling SMIs.
770 12:32:12.112751 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
771 12:32:12.127987 Probing TPM I2C: done! DID_VID 0x00281ae0
772 12:32:12.131103 Locality already claimed
773 12:32:12.134288 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
774 12:32:12.145659 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
775 12:32:12.148939 Enabling GPIO PM b/c CR50 has long IRQ pulse support
776 12:32:12.156206 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
777 12:32:12.162564 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
778 12:32:12.165355 Found a VBT of 9216 bytes after decompression
779 12:32:12.169341 PCI 1.0, PIN A, using IRQ #16
780 12:32:12.171970 PCI 2.0, PIN A, using IRQ #17
781 12:32:12.175483 PCI 4.0, PIN A, using IRQ #18
782 12:32:12.178717 PCI 5.0, PIN A, using IRQ #16
783 12:32:12.182113 PCI 6.0, PIN A, using IRQ #16
784 12:32:12.185356 PCI 6.2, PIN C, using IRQ #18
785 12:32:12.188446 PCI 7.0, PIN A, using IRQ #19
786 12:32:12.191949 PCI 7.1, PIN B, using IRQ #20
787 12:32:12.195391 PCI 7.2, PIN C, using IRQ #21
788 12:32:12.198537 PCI 7.3, PIN D, using IRQ #22
789 12:32:12.201704 PCI 8.0, PIN A, using IRQ #23
790 12:32:12.205078 PCI D.0, PIN A, using IRQ #17
791 12:32:12.209016 PCI D.1, PIN B, using IRQ #19
792 12:32:12.211539 PCI 10.0, PIN A, using IRQ #24
793 12:32:12.214877 PCI 10.1, PIN B, using IRQ #25
794 12:32:12.215384 PCI 10.6, PIN C, using IRQ #20
795 12:32:12.218635 PCI 10.7, PIN D, using IRQ #21
796 12:32:12.222133 PCI 11.0, PIN A, using IRQ #26
797 12:32:12.225129 PCI 11.1, PIN B, using IRQ #27
798 12:32:12.228060 PCI 11.2, PIN C, using IRQ #28
799 12:32:12.231585 PCI 11.3, PIN D, using IRQ #29
800 12:32:12.235280 PCI 12.0, PIN A, using IRQ #30
801 12:32:12.238470 PCI 12.6, PIN B, using IRQ #31
802 12:32:12.241443 PCI 12.7, PIN C, using IRQ #22
803 12:32:12.244811 PCI 13.0, PIN A, using IRQ #32
804 12:32:12.248128 PCI 13.1, PIN B, using IRQ #33
805 12:32:12.251584 PCI 13.2, PIN C, using IRQ #34
806 12:32:12.254836 PCI 13.3, PIN D, using IRQ #35
807 12:32:12.257917 PCI 14.0, PIN B, using IRQ #23
808 12:32:12.261303 PCI 14.1, PIN A, using IRQ #36
809 12:32:12.264524 PCI 14.3, PIN C, using IRQ #17
810 12:32:12.268283 PCI 15.0, PIN A, using IRQ #37
811 12:32:12.271097 PCI 15.1, PIN B, using IRQ #38
812 12:32:12.271693 PCI 15.2, PIN C, using IRQ #39
813 12:32:12.274822 PCI 15.3, PIN D, using IRQ #40
814 12:32:12.278282 PCI 16.0, PIN A, using IRQ #18
815 12:32:12.281607 PCI 16.1, PIN B, using IRQ #19
816 12:32:12.284764 PCI 16.2, PIN C, using IRQ #20
817 12:32:12.288178 PCI 16.3, PIN D, using IRQ #21
818 12:32:12.291476 PCI 16.4, PIN A, using IRQ #18
819 12:32:12.294730 PCI 16.5, PIN B, using IRQ #19
820 12:32:12.297963 PCI 17.0, PIN A, using IRQ #22
821 12:32:12.301371 PCI 19.0, PIN A, using IRQ #41
822 12:32:12.304515 PCI 19.1, PIN B, using IRQ #42
823 12:32:12.308015 PCI 19.2, PIN C, using IRQ #43
824 12:32:12.311237 PCI 1C.0, PIN A, using IRQ #16
825 12:32:12.314254 PCI 1C.1, PIN B, using IRQ #17
826 12:32:12.317310 PCI 1C.2, PIN C, using IRQ #18
827 12:32:12.320838 PCI 1C.3, PIN D, using IRQ #19
828 12:32:12.324074 PCI 1C.4, PIN A, using IRQ #16
829 12:32:12.327381 PCI 1C.5, PIN B, using IRQ #17
830 12:32:12.327868 PCI 1C.6, PIN C, using IRQ #18
831 12:32:12.330826 PCI 1C.7, PIN D, using IRQ #19
832 12:32:12.334256 PCI 1D.0, PIN A, using IRQ #16
833 12:32:12.337733 PCI 1D.1, PIN B, using IRQ #17
834 12:32:12.341191 PCI 1D.2, PIN C, using IRQ #18
835 12:32:12.344682 PCI 1D.3, PIN D, using IRQ #19
836 12:32:12.347706 PCI 1E.0, PIN A, using IRQ #23
837 12:32:12.350898 PCI 1E.1, PIN B, using IRQ #20
838 12:32:12.354456 PCI 1E.2, PIN C, using IRQ #44
839 12:32:12.357890 PCI 1E.3, PIN D, using IRQ #45
840 12:32:12.361258 PCI 1F.3, PIN B, using IRQ #22
841 12:32:12.364468 PCI 1F.4, PIN C, using IRQ #23
842 12:32:12.367672 PCI 1F.6, PIN D, using IRQ #20
843 12:32:12.370697 PCI 1F.7, PIN A, using IRQ #21
844 12:32:12.374378 IRQ: Using dynamically assigned PCI IO-APIC IRQs
845 12:32:12.380884 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
846 12:32:12.565179 FSPS returned 0
847 12:32:12.568544 Executing Phase 1 of FspMultiPhaseSiInit
848 12:32:12.578618 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
849 12:32:12.582097 port C0 DISC req: usage 1 usb3 1 usb2 1
850 12:32:12.585375 Raw Buffer output 0 00000111
851 12:32:12.588596 Raw Buffer output 1 00000000
852 12:32:12.592376 pmc_send_ipc_cmd succeeded
853 12:32:12.599061 port C1 DISC req: usage 1 usb3 3 usb2 3
854 12:32:12.599695 Raw Buffer output 0 00000331
855 12:32:12.602742 Raw Buffer output 1 00000000
856 12:32:12.606709 pmc_send_ipc_cmd succeeded
857 12:32:12.610187 Detected 6 core, 8 thread CPU.
858 12:32:12.613322 Detected 6 core, 8 thread CPU.
859 12:32:12.618747 Detected 6 core, 8 thread CPU.
860 12:32:12.622269 Detected 6 core, 8 thread CPU.
861 12:32:12.625540 Detected 6 core, 8 thread CPU.
862 12:32:12.628859 Detected 6 core, 8 thread CPU.
863 12:32:12.632271 Detected 6 core, 8 thread CPU.
864 12:32:12.635845 Detected 6 core, 8 thread CPU.
865 12:32:12.638730 Detected 6 core, 8 thread CPU.
866 12:32:12.642438 Detected 6 core, 8 thread CPU.
867 12:32:12.645601 Detected 6 core, 8 thread CPU.
868 12:32:12.648744 Detected 6 core, 8 thread CPU.
869 12:32:12.652193 Detected 6 core, 8 thread CPU.
870 12:32:12.655897 Detected 6 core, 8 thread CPU.
871 12:32:12.658858 Detected 6 core, 8 thread CPU.
872 12:32:12.662208 Detected 6 core, 8 thread CPU.
873 12:32:12.665471 Detected 6 core, 8 thread CPU.
874 12:32:12.668966 Detected 6 core, 8 thread CPU.
875 12:32:12.672003 Detected 6 core, 8 thread CPU.
876 12:32:12.675510 Detected 6 core, 8 thread CPU.
877 12:32:12.678825 Detected 6 core, 8 thread CPU.
878 12:32:12.679437 Detected 6 core, 8 thread CPU.
879 12:32:12.961869 Detected 6 core, 8 thread CPU.
880 12:32:12.964905 Detected 6 core, 8 thread CPU.
881 12:32:12.968100 Detected 6 core, 8 thread CPU.
882 12:32:12.971697 Detected 6 core, 8 thread CPU.
883 12:32:12.975302 Detected 6 core, 8 thread CPU.
884 12:32:12.978491 Detected 6 core, 8 thread CPU.
885 12:32:12.981745 Detected 6 core, 8 thread CPU.
886 12:32:12.985247 Detected 6 core, 8 thread CPU.
887 12:32:12.988276 Detected 6 core, 8 thread CPU.
888 12:32:12.991681 Detected 6 core, 8 thread CPU.
889 12:32:12.994815 Detected 6 core, 8 thread CPU.
890 12:32:12.998690 Detected 6 core, 8 thread CPU.
891 12:32:13.001496 Detected 6 core, 8 thread CPU.
892 12:32:13.005586 Detected 6 core, 8 thread CPU.
893 12:32:13.008773 Detected 6 core, 8 thread CPU.
894 12:32:13.011993 Detected 6 core, 8 thread CPU.
895 12:32:13.015223 Detected 6 core, 8 thread CPU.
896 12:32:13.018488 Detected 6 core, 8 thread CPU.
897 12:32:13.019064 Detected 6 core, 8 thread CPU.
898 12:32:13.022444 Detected 6 core, 8 thread CPU.
899 12:32:13.025646 Display FSP Version Info HOB
900 12:32:13.028909 Reference Code - CPU = c.0.65.70
901 12:32:13.032032 uCode Version = 0.0.4.23
902 12:32:13.035547 TXT ACM version = ff.ff.ff.ffff
903 12:32:13.038842 Reference Code - ME = c.0.65.70
904 12:32:13.042036 MEBx version = 0.0.0.0
905 12:32:13.045463 ME Firmware Version = Lite SKU
906 12:32:13.048411 Reference Code - PCH = c.0.65.70
907 12:32:13.052066 PCH-CRID Status = Disabled
908 12:32:13.055594 PCH-CRID Original Value = ff.ff.ff.ffff
909 12:32:13.059038 PCH-CRID New Value = ff.ff.ff.ffff
910 12:32:13.061983 OPROM - RST - RAID = ff.ff.ff.ffff
911 12:32:13.065339 PCH Hsio Version = 4.0.0.0
912 12:32:13.068981 Reference Code - SA - System Agent = c.0.65.70
913 12:32:13.071933 Reference Code - MRC = 0.0.3.80
914 12:32:13.075473 SA - PCIe Version = c.0.65.70
915 12:32:13.078470 SA-CRID Status = Disabled
916 12:32:13.082225 SA-CRID Original Value = 0.0.0.4
917 12:32:13.085436 SA-CRID New Value = 0.0.0.4
918 12:32:13.088711 OPROM - VBIOS = ff.ff.ff.ffff
919 12:32:13.091715 IO Manageability Engine FW Version = 24.0.4.0
920 12:32:13.095123 PHY Build Version = 0.0.0.2016
921 12:32:13.098696 Thunderbolt(TM) FW Version = 0.0.0.0
922 12:32:13.105464 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
923 12:32:13.111946 BS: BS_DEV_INIT_CHIPS run times (exec / console): 485 / 507 ms
924 12:32:13.112505 Enumerating buses...
925 12:32:13.118617 Show all devs... Before device enumeration.
926 12:32:13.119188 Root Device: enabled 1
927 12:32:13.122271 CPU_CLUSTER: 0: enabled 1
928 12:32:13.125488 DOMAIN: 0000: enabled 1
929 12:32:13.126059 GPIO: 0: enabled 1
930 12:32:13.128900 PCI: 00:00.0: enabled 1
931 12:32:13.132159 PCI: 00:01.0: enabled 0
932 12:32:13.135609 PCI: 00:01.1: enabled 0
933 12:32:13.136351 PCI: 00:02.0: enabled 1
934 12:32:13.138860 PCI: 00:04.0: enabled 1
935 12:32:13.142123 PCI: 00:05.0: enabled 0
936 12:32:13.145130 PCI: 00:06.0: enabled 1
937 12:32:13.145712 PCI: 00:06.2: enabled 0
938 12:32:13.148627 PCI: 00:07.0: enabled 0
939 12:32:13.152022 PCI: 00:07.1: enabled 0
940 12:32:13.155187 PCI: 00:07.2: enabled 0
941 12:32:13.155685 PCI: 00:07.3: enabled 0
942 12:32:13.158365 PCI: 00:08.0: enabled 0
943 12:32:13.161892 PCI: 00:09.0: enabled 0
944 12:32:13.165173 PCI: 00:0a.0: enabled 1
945 12:32:13.165349 PCI: 00:0d.0: enabled 1
946 12:32:13.168284 PCI: 00:0d.1: enabled 0
947 12:32:13.171537 PCI: 00:0d.2: enabled 0
948 12:32:13.171622 PCI: 00:0d.3: enabled 0
949 12:32:13.174852 PCI: 00:0e.0: enabled 0
950 12:32:13.178272 PCI: 00:10.0: enabled 0
951 12:32:13.181550 PCI: 00:10.1: enabled 0
952 12:32:13.181634 PCI: 00:10.6: enabled 0
953 12:32:13.184768 PCI: 00:10.7: enabled 0
954 12:32:13.188409 PCI: 00:12.0: enabled 0
955 12:32:13.191734 PCI: 00:12.6: enabled 0
956 12:32:13.191818 PCI: 00:12.7: enabled 0
957 12:32:13.194685 PCI: 00:13.0: enabled 0
958 12:32:13.198195 PCI: 00:14.0: enabled 1
959 12:32:13.198279 PCI: 00:14.1: enabled 0
960 12:32:13.201797 PCI: 00:14.2: enabled 1
961 12:32:13.204961 PCI: 00:14.3: enabled 1
962 12:32:13.208154 PCI: 00:15.0: enabled 1
963 12:32:13.208237 PCI: 00:15.1: enabled 1
964 12:32:13.211529 PCI: 00:15.2: enabled 0
965 12:32:13.214970 PCI: 00:15.3: enabled 1
966 12:32:13.217907 PCI: 00:16.0: enabled 1
967 12:32:13.217990 PCI: 00:16.1: enabled 0
968 12:32:13.221455 PCI: 00:16.2: enabled 0
969 12:32:13.224631 PCI: 00:16.3: enabled 0
970 12:32:13.228141 PCI: 00:16.4: enabled 0
971 12:32:13.228225 PCI: 00:16.5: enabled 0
972 12:32:13.231146 PCI: 00:17.0: enabled 1
973 12:32:13.234421 PCI: 00:19.0: enabled 0
974 12:32:13.238246 PCI: 00:19.1: enabled 1
975 12:32:13.238329 PCI: 00:19.2: enabled 0
976 12:32:13.241455 PCI: 00:1a.0: enabled 0
977 12:32:13.244624 PCI: 00:1c.0: enabled 0
978 12:32:13.244708 PCI: 00:1c.1: enabled 0
979 12:32:13.247847 PCI: 00:1c.2: enabled 0
980 12:32:13.251277 PCI: 00:1c.3: enabled 0
981 12:32:13.254535 PCI: 00:1c.4: enabled 0
982 12:32:13.254618 PCI: 00:1c.5: enabled 0
983 12:32:13.257972 PCI: 00:1c.6: enabled 0
984 12:32:13.261119 PCI: 00:1c.7: enabled 0
985 12:32:13.264604 PCI: 00:1d.0: enabled 0
986 12:32:13.264688 PCI: 00:1d.1: enabled 0
987 12:32:13.267939 PCI: 00:1d.2: enabled 0
988 12:32:13.271052 PCI: 00:1d.3: enabled 0
989 12:32:13.274551 PCI: 00:1e.0: enabled 1
990 12:32:13.274639 PCI: 00:1e.1: enabled 0
991 12:32:13.277672 PCI: 00:1e.2: enabled 0
992 12:32:13.281264 PCI: 00:1e.3: enabled 1
993 12:32:13.281348 PCI: 00:1f.0: enabled 1
994 12:32:13.284602 PCI: 00:1f.1: enabled 0
995 12:32:13.287825 PCI: 00:1f.2: enabled 1
996 12:32:13.291015 PCI: 00:1f.3: enabled 1
997 12:32:13.291099 PCI: 00:1f.4: enabled 0
998 12:32:13.294443 PCI: 00:1f.5: enabled 1
999 12:32:13.297806 PCI: 00:1f.6: enabled 0
1000 12:32:13.301025 PCI: 00:1f.7: enabled 0
1001 12:32:13.301109 GENERIC: 0.0: enabled 1
1002 12:32:13.304531 GENERIC: 0.0: enabled 1
1003 12:32:13.307927 GENERIC: 1.0: enabled 1
1004 12:32:13.311109 GENERIC: 0.0: enabled 1
1005 12:32:13.311193 GENERIC: 1.0: enabled 1
1006 12:32:13.314293 USB0 port 0: enabled 1
1007 12:32:13.317917 USB0 port 0: enabled 1
1008 12:32:13.318000 GENERIC: 0.0: enabled 1
1009 12:32:13.321120 I2C: 00:1a: enabled 1
1010 12:32:13.324268 I2C: 00:31: enabled 1
1011 12:32:13.324353 I2C: 00:32: enabled 1
1012 12:32:13.327960 I2C: 00:50: enabled 1
1013 12:32:13.330911 I2C: 00:10: enabled 1
1014 12:32:13.334267 I2C: 00:15: enabled 1
1015 12:32:13.334351 I2C: 00:2c: enabled 1
1016 12:32:13.337753 GENERIC: 0.0: enabled 1
1017 12:32:13.340900 SPI: 00: enabled 1
1018 12:32:13.340983 PNP: 0c09.0: enabled 1
1019 12:32:13.344540 GENERIC: 0.0: enabled 1
1020 12:32:13.347822 USB3 port 0: enabled 1
1021 12:32:13.347905 USB3 port 1: enabled 0
1022 12:32:13.350792 USB3 port 2: enabled 1
1023 12:32:13.354416 USB3 port 3: enabled 0
1024 12:32:13.354500 USB2 port 0: enabled 1
1025 12:32:13.357632 USB2 port 1: enabled 0
1026 12:32:13.361273 USB2 port 2: enabled 1
1027 12:32:13.364444 USB2 port 3: enabled 0
1028 12:32:13.364527 USB2 port 4: enabled 0
1029 12:32:13.367893 USB2 port 5: enabled 1
1030 12:32:13.370968 USB2 port 6: enabled 0
1031 12:32:13.371051 USB2 port 7: enabled 0
1032 12:32:13.374163 USB2 port 8: enabled 1
1033 12:32:13.377423 USB2 port 9: enabled 1
1034 12:32:13.380933 USB3 port 0: enabled 1
1035 12:32:13.381016 USB3 port 1: enabled 0
1036 12:32:13.384254 USB3 port 2: enabled 0
1037 12:32:13.387518 USB3 port 3: enabled 0
1038 12:32:13.387600 GENERIC: 0.0: enabled 1
1039 12:32:13.391055 GENERIC: 1.0: enabled 1
1040 12:32:13.394282 APIC: 00: enabled 1
1041 12:32:13.394364 APIC: 14: enabled 1
1042 12:32:13.397447 APIC: 16: enabled 1
1043 12:32:13.401004 APIC: 10: enabled 1
1044 12:32:13.401086 APIC: 12: enabled 1
1045 12:32:13.404222 APIC: 01: enabled 1
1046 12:32:13.404305 APIC: 09: enabled 1
1047 12:32:13.407617 APIC: 08: enabled 1
1048 12:32:13.410902 Compare with tree...
1049 12:32:13.410984 Root Device: enabled 1
1050 12:32:13.414460 CPU_CLUSTER: 0: enabled 1
1051 12:32:13.417755 APIC: 00: enabled 1
1052 12:32:13.420954 APIC: 14: enabled 1
1053 12:32:13.421037 APIC: 16: enabled 1
1054 12:32:13.424381 APIC: 10: enabled 1
1055 12:32:13.427728 APIC: 12: enabled 1
1056 12:32:13.427811 APIC: 01: enabled 1
1057 12:32:13.430970 APIC: 09: enabled 1
1058 12:32:13.434372 APIC: 08: enabled 1
1059 12:32:13.434455 DOMAIN: 0000: enabled 1
1060 12:32:13.437723 GPIO: 0: enabled 1
1061 12:32:13.441119 PCI: 00:00.0: enabled 1
1062 12:32:13.444415 PCI: 00:01.0: enabled 0
1063 12:32:13.444496 PCI: 00:01.1: enabled 0
1064 12:32:13.447605 PCI: 00:02.0: enabled 1
1065 12:32:13.450984 PCI: 00:04.0: enabled 1
1066 12:32:13.454225 GENERIC: 0.0: enabled 1
1067 12:32:13.457425 PCI: 00:05.0: enabled 0
1068 12:32:13.457506 PCI: 00:06.0: enabled 1
1069 12:32:13.460839 PCI: 00:06.2: enabled 0
1070 12:32:13.464263 PCI: 00:08.0: enabled 0
1071 12:32:13.467569 PCI: 00:09.0: enabled 0
1072 12:32:13.470720 PCI: 00:0a.0: enabled 1
1073 12:32:13.470802 PCI: 00:0d.0: enabled 1
1074 12:32:13.474164 USB0 port 0: enabled 1
1075 12:32:13.477532 USB3 port 0: enabled 1
1076 12:32:13.480798 USB3 port 1: enabled 0
1077 12:32:13.484076 USB3 port 2: enabled 1
1078 12:32:13.484159 USB3 port 3: enabled 0
1079 12:32:13.487659 PCI: 00:0d.1: enabled 0
1080 12:32:13.490608 PCI: 00:0d.2: enabled 0
1081 12:32:13.493846 PCI: 00:0d.3: enabled 0
1082 12:32:13.497854 PCI: 00:0e.0: enabled 0
1083 12:32:13.497936 PCI: 00:10.0: enabled 0
1084 12:32:13.500554 PCI: 00:10.1: enabled 0
1085 12:32:13.503784 PCI: 00:10.6: enabled 0
1086 12:32:13.507588 PCI: 00:10.7: enabled 0
1087 12:32:13.510422 PCI: 00:12.0: enabled 0
1088 12:32:13.510503 PCI: 00:12.6: enabled 0
1089 12:32:13.513755 PCI: 00:12.7: enabled 0
1090 12:32:13.517188 PCI: 00:13.0: enabled 0
1091 12:32:13.520318 PCI: 00:14.0: enabled 1
1092 12:32:13.523740 USB0 port 0: enabled 1
1093 12:32:13.523822 USB2 port 0: enabled 1
1094 12:32:13.527159 USB2 port 1: enabled 0
1095 12:32:13.530428 USB2 port 2: enabled 1
1096 12:32:13.533578 USB2 port 3: enabled 0
1097 12:32:13.536926 USB2 port 4: enabled 0
1098 12:32:13.540770 USB2 port 5: enabled 1
1099 12:32:13.540852 USB2 port 6: enabled 0
1100 12:32:13.543613 USB2 port 7: enabled 0
1101 12:32:13.547452 USB2 port 8: enabled 1
1102 12:32:13.550455 USB2 port 9: enabled 1
1103 12:32:13.553499 USB3 port 0: enabled 1
1104 12:32:13.553581 USB3 port 1: enabled 0
1105 12:32:13.556993 USB3 port 2: enabled 0
1106 12:32:13.560443 USB3 port 3: enabled 0
1107 12:32:13.563595 PCI: 00:14.1: enabled 0
1108 12:32:13.566865 PCI: 00:14.2: enabled 1
1109 12:32:13.566947 PCI: 00:14.3: enabled 1
1110 12:32:13.570117 GENERIC: 0.0: enabled 1
1111 12:32:13.573880 PCI: 00:15.0: enabled 1
1112 12:32:13.576691 I2C: 00:1a: enabled 1
1113 12:32:13.580006 I2C: 00:31: enabled 1
1114 12:32:13.580089 I2C: 00:32: enabled 1
1115 12:32:13.583475 PCI: 00:15.1: enabled 1
1116 12:32:13.586880 I2C: 00:50: enabled 1
1117 12:32:13.589909 PCI: 00:15.2: enabled 0
1118 12:32:13.593606 PCI: 00:15.3: enabled 1
1119 12:32:13.593688 I2C: 00:10: enabled 1
1120 12:32:13.596550 PCI: 00:16.0: enabled 1
1121 12:32:13.599989 PCI: 00:16.1: enabled 0
1122 12:32:13.603638 PCI: 00:16.2: enabled 0
1123 12:32:13.606621 PCI: 00:16.3: enabled 0
1124 12:32:13.606702 PCI: 00:16.4: enabled 0
1125 12:32:13.610144 PCI: 00:16.5: enabled 0
1126 12:32:13.613378 PCI: 00:17.0: enabled 1
1127 12:32:13.616374 PCI: 00:19.0: enabled 0
1128 12:32:13.619966 PCI: 00:19.1: enabled 1
1129 12:32:13.620047 I2C: 00:15: enabled 1
1130 12:32:13.623262 I2C: 00:2c: enabled 1
1131 12:32:13.626575 PCI: 00:19.2: enabled 0
1132 12:32:13.629704 PCI: 00:1a.0: enabled 0
1133 12:32:13.629786 PCI: 00:1e.0: enabled 1
1134 12:32:13.633061 PCI: 00:1e.1: enabled 0
1135 12:32:13.636343 PCI: 00:1e.2: enabled 0
1136 12:32:13.639728 PCI: 00:1e.3: enabled 1
1137 12:32:13.639837 SPI: 00: enabled 1
1138 12:32:13.643475 PCI: 00:1f.0: enabled 1
1139 12:32:13.646386 PNP: 0c09.0: enabled 1
1140 12:32:13.649629 PCI: 00:1f.1: enabled 0
1141 12:32:13.653490 PCI: 00:1f.2: enabled 1
1142 12:32:13.653571 GENERIC: 0.0: enabled 1
1143 12:32:13.656328 GENERIC: 0.0: enabled 1
1144 12:32:13.659628 GENERIC: 1.0: enabled 1
1145 12:32:13.662883 PCI: 00:1f.3: enabled 1
1146 12:32:13.666980 PCI: 00:1f.4: enabled 0
1147 12:32:13.669585 PCI: 00:1f.5: enabled 1
1148 12:32:13.669667 PCI: 00:1f.6: enabled 0
1149 12:32:13.672980 PCI: 00:1f.7: enabled 0
1150 12:32:13.676182 Root Device scanning...
1151 12:32:13.679969 scan_static_bus for Root Device
1152 12:32:13.682915 CPU_CLUSTER: 0 enabled
1153 12:32:13.682997 DOMAIN: 0000 enabled
1154 12:32:13.686756 DOMAIN: 0000 scanning...
1155 12:32:13.689841 PCI: pci_scan_bus for bus 00
1156 12:32:13.692766 PCI: 00:00.0 [8086/0000] ops
1157 12:32:13.696479 PCI: 00:00.0 [8086/4609] enabled
1158 12:32:13.699549 PCI: 00:02.0 [8086/0000] bus ops
1159 12:32:13.702941 PCI: 00:02.0 [8086/46b3] enabled
1160 12:32:13.706545 PCI: 00:04.0 [8086/0000] bus ops
1161 12:32:13.709518 PCI: 00:04.0 [8086/461d] enabled
1162 12:32:13.713003 PCI: 00:06.0 [8086/0000] bus ops
1163 12:32:13.716136 PCI: 00:06.0 [8086/464d] enabled
1164 12:32:13.719606 PCI: 00:08.0 [8086/464f] disabled
1165 12:32:13.723015 PCI: 00:0a.0 [8086/467d] enabled
1166 12:32:13.726448 PCI: 00:0d.0 [8086/0000] bus ops
1167 12:32:13.729693 PCI: 00:0d.0 [8086/461e] enabled
1168 12:32:13.733145 PCI: 00:14.0 [8086/0000] bus ops
1169 12:32:13.736585 PCI: 00:14.0 [8086/51ed] enabled
1170 12:32:13.739739 PCI: 00:14.2 [8086/51ef] enabled
1171 12:32:13.743085 PCI: 00:14.3 [8086/0000] bus ops
1172 12:32:13.746195 PCI: 00:14.3 [8086/51f0] enabled
1173 12:32:13.749871 PCI: 00:15.0 [8086/0000] bus ops
1174 12:32:13.752911 PCI: 00:15.0 [8086/51e8] enabled
1175 12:32:13.756442 PCI: 00:15.1 [8086/0000] bus ops
1176 12:32:13.759939 PCI: 00:15.1 [8086/51e9] enabled
1177 12:32:13.763201 PCI: 00:15.2 [8086/0000] bus ops
1178 12:32:13.766427 PCI: 00:15.2 [8086/51ea] disabled
1179 12:32:13.769757 PCI: 00:15.3 [8086/0000] bus ops
1180 12:32:13.773054 PCI: 00:15.3 [8086/51eb] enabled
1181 12:32:13.776255 PCI: 00:16.0 [8086/0000] ops
1182 12:32:13.779776 PCI: 00:16.0 [8086/51e0] enabled
1183 12:32:13.786534 PCI: Static device PCI: 00:17.0 not found, disabling it.
1184 12:32:13.789732 PCI: 00:19.0 [8086/0000] bus ops
1185 12:32:13.792835 PCI: 00:19.0 [8086/51c5] disabled
1186 12:32:13.796011 PCI: 00:19.1 [8086/0000] bus ops
1187 12:32:13.799539 PCI: 00:19.1 [8086/51c6] enabled
1188 12:32:13.803176 PCI: 00:1e.0 [8086/0000] ops
1189 12:32:13.806054 PCI: 00:1e.0 [8086/51a8] enabled
1190 12:32:13.809442 PCI: 00:1e.3 [8086/0000] bus ops
1191 12:32:13.813043 PCI: 00:1e.3 [8086/51ab] enabled
1192 12:32:13.816403 PCI: 00:1f.0 [8086/0000] bus ops
1193 12:32:13.819451 PCI: 00:1f.0 [8086/5182] enabled
1194 12:32:13.819535 RTC Init
1195 12:32:13.822590 Set power on after power failure.
1196 12:32:13.826424 Disabling Deep S3
1197 12:32:13.829853 Disabling Deep S3
1198 12:32:13.829940 Disabling Deep S4
1199 12:32:13.832900 Disabling Deep S4
1200 12:32:13.832986 Disabling Deep S5
1201 12:32:13.836629 Disabling Deep S5
1202 12:32:13.839800 PCI: 00:1f.2 [0000/0000] hidden
1203 12:32:13.842864 PCI: 00:1f.3 [8086/0000] bus ops
1204 12:32:13.846228 PCI: 00:1f.3 [8086/51c8] enabled
1205 12:32:13.849657 PCI: 00:1f.5 [8086/0000] bus ops
1206 12:32:13.853199 PCI: 00:1f.5 [8086/51a4] enabled
1207 12:32:13.853285 GPIO: 0 enabled
1208 12:32:13.856958 PCI: Leftover static devices:
1209 12:32:13.859834 PCI: 00:01.0
1210 12:32:13.859918 PCI: 00:01.1
1211 12:32:13.859984 PCI: 00:05.0
1212 12:32:13.863199 PCI: 00:06.2
1213 12:32:13.863281 PCI: 00:09.0
1214 12:32:13.866103 PCI: 00:0d.1
1215 12:32:13.866186 PCI: 00:0d.2
1216 12:32:13.869395 PCI: 00:0d.3
1217 12:32:13.869479 PCI: 00:0e.0
1218 12:32:13.869544 PCI: 00:10.0
1219 12:32:13.873352 PCI: 00:10.1
1220 12:32:13.873435 PCI: 00:10.6
1221 12:32:13.876077 PCI: 00:10.7
1222 12:32:13.876160 PCI: 00:12.0
1223 12:32:13.876226 PCI: 00:12.6
1224 12:32:13.879781 PCI: 00:12.7
1225 12:32:13.879864 PCI: 00:13.0
1226 12:32:13.883178 PCI: 00:14.1
1227 12:32:13.883261 PCI: 00:16.1
1228 12:32:13.883325 PCI: 00:16.2
1229 12:32:13.886089 PCI: 00:16.3
1230 12:32:13.886172 PCI: 00:16.4
1231 12:32:13.889379 PCI: 00:16.5
1232 12:32:13.889462 PCI: 00:17.0
1233 12:32:13.892737 PCI: 00:19.2
1234 12:32:13.892821 PCI: 00:1a.0
1235 12:32:13.892885 PCI: 00:1e.1
1236 12:32:13.896391 PCI: 00:1e.2
1237 12:32:13.896475 PCI: 00:1f.1
1238 12:32:13.899580 PCI: 00:1f.4
1239 12:32:13.899666 PCI: 00:1f.6
1240 12:32:13.899732 PCI: 00:1f.7
1241 12:32:13.902845 PCI: Check your devicetree.cb.
1242 12:32:13.906782 PCI: 00:02.0 scanning...
1243 12:32:13.909596 scan_generic_bus for PCI: 00:02.0
1244 12:32:13.913024 scan_generic_bus for PCI: 00:02.0 done
1245 12:32:13.919741 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1246 12:32:13.919824 PCI: 00:04.0 scanning...
1247 12:32:13.923017 scan_generic_bus for PCI: 00:04.0
1248 12:32:13.926329 GENERIC: 0.0 enabled
1249 12:32:13.932897 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1250 12:32:13.936713 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1251 12:32:13.939659 PCI: 00:06.0 scanning...
1252 12:32:13.943090 do_pci_scan_bridge for PCI: 00:06.0
1253 12:32:13.946818 PCI: pci_scan_bus for bus 01
1254 12:32:13.950131 PCI: 01:00.0 [15b7/5009] enabled
1255 12:32:13.953439 Enabling Common Clock Configuration
1256 12:32:13.956738 L1 Sub-State supported from root port 6
1257 12:32:13.959826 L1 Sub-State Support = 0x5
1258 12:32:13.963391 CommonModeRestoreTime = 0x6e
1259 12:32:13.966450 Power On Value = 0x5, Power On Scale = 0x2
1260 12:32:13.970020 ASPM: Enabled L1
1261 12:32:13.973389 PCIe: Max_Payload_Size adjusted to 256
1262 12:32:13.976765 PCI: 01:00.0: Enabled LTR
1263 12:32:13.980109 PCI: 01:00.0: Programmed LTR max latencies
1264 12:32:13.986597 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1265 12:32:13.986681 PCI: 00:0d.0 scanning...
1266 12:32:13.989853 scan_static_bus for PCI: 00:0d.0
1267 12:32:13.993187 USB0 port 0 enabled
1268 12:32:13.996488 USB0 port 0 scanning...
1269 12:32:14.000215 scan_static_bus for USB0 port 0
1270 12:32:14.000298 USB3 port 0 enabled
1271 12:32:14.003108 USB3 port 1 disabled
1272 12:32:14.006764 USB3 port 2 enabled
1273 12:32:14.006847 USB3 port 3 disabled
1274 12:32:14.010021 USB3 port 0 scanning...
1275 12:32:14.013583 scan_static_bus for USB3 port 0
1276 12:32:14.016667 scan_static_bus for USB3 port 0 done
1277 12:32:14.019948 scan_bus: bus USB3 port 0 finished in 6 msecs
1278 12:32:14.023190 USB3 port 2 scanning...
1279 12:32:14.026489 scan_static_bus for USB3 port 2
1280 12:32:14.029697 scan_static_bus for USB3 port 2 done
1281 12:32:14.036868 scan_bus: bus USB3 port 2 finished in 6 msecs
1282 12:32:14.040044 scan_static_bus for USB0 port 0 done
1283 12:32:14.043100 scan_bus: bus USB0 port 0 finished in 43 msecs
1284 12:32:14.046221 scan_static_bus for PCI: 00:0d.0 done
1285 12:32:14.052832 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1286 12:32:14.052918 PCI: 00:14.0 scanning...
1287 12:32:14.056698 scan_static_bus for PCI: 00:14.0
1288 12:32:14.059846 USB0 port 0 enabled
1289 12:32:14.063262 USB0 port 0 scanning...
1290 12:32:14.066535 scan_static_bus for USB0 port 0
1291 12:32:14.066621 USB2 port 0 enabled
1292 12:32:14.069703 USB2 port 1 disabled
1293 12:32:14.073460 USB2 port 2 enabled
1294 12:32:14.073546 USB2 port 3 disabled
1295 12:32:14.076317 USB2 port 4 disabled
1296 12:32:14.079576 USB2 port 5 enabled
1297 12:32:14.079662 USB2 port 6 disabled
1298 12:32:14.082936 USB2 port 7 disabled
1299 12:32:14.083023 USB2 port 8 enabled
1300 12:32:14.086318 USB2 port 9 enabled
1301 12:32:14.089582 USB3 port 0 enabled
1302 12:32:14.089668 USB3 port 1 disabled
1303 12:32:14.092895 USB3 port 2 disabled
1304 12:32:14.096345 USB3 port 3 disabled
1305 12:32:14.096431 USB2 port 0 scanning...
1306 12:32:14.099721 scan_static_bus for USB2 port 0
1307 12:32:14.102978 scan_static_bus for USB2 port 0 done
1308 12:32:14.109728 scan_bus: bus USB2 port 0 finished in 6 msecs
1309 12:32:14.113070 USB2 port 2 scanning...
1310 12:32:14.116380 scan_static_bus for USB2 port 2
1311 12:32:14.119653 scan_static_bus for USB2 port 2 done
1312 12:32:14.122993 scan_bus: bus USB2 port 2 finished in 6 msecs
1313 12:32:14.126095 USB2 port 5 scanning...
1314 12:32:14.129553 scan_static_bus for USB2 port 5
1315 12:32:14.132849 scan_static_bus for USB2 port 5 done
1316 12:32:14.136075 scan_bus: bus USB2 port 5 finished in 6 msecs
1317 12:32:14.139595 USB2 port 8 scanning...
1318 12:32:14.142799 scan_static_bus for USB2 port 8
1319 12:32:14.145784 scan_static_bus for USB2 port 8 done
1320 12:32:14.149378 scan_bus: bus USB2 port 8 finished in 6 msecs
1321 12:32:14.152492 USB2 port 9 scanning...
1322 12:32:14.155948 scan_static_bus for USB2 port 9
1323 12:32:14.159281 scan_static_bus for USB2 port 9 done
1324 12:32:14.165821 scan_bus: bus USB2 port 9 finished in 6 msecs
1325 12:32:14.165907 USB3 port 0 scanning...
1326 12:32:14.169395 scan_static_bus for USB3 port 0
1327 12:32:14.176089 scan_static_bus for USB3 port 0 done
1328 12:32:14.179379 scan_bus: bus USB3 port 0 finished in 6 msecs
1329 12:32:14.183208 scan_static_bus for USB0 port 0 done
1330 12:32:14.186123 scan_bus: bus USB0 port 0 finished in 120 msecs
1331 12:32:14.192754 scan_static_bus for PCI: 00:14.0 done
1332 12:32:14.195884 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1333 12:32:14.199284 PCI: 00:14.3 scanning...
1334 12:32:14.202765 scan_static_bus for PCI: 00:14.3
1335 12:32:14.203038 GENERIC: 0.0 enabled
1336 12:32:14.209747 scan_static_bus for PCI: 00:14.3 done
1337 12:32:14.212602 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1338 12:32:14.216138 PCI: 00:15.0 scanning...
1339 12:32:14.219790 scan_static_bus for PCI: 00:15.0
1340 12:32:14.220210 I2C: 00:1a enabled
1341 12:32:14.223205 I2C: 00:31 enabled
1342 12:32:14.226440 I2C: 00:32 enabled
1343 12:32:14.229809 scan_static_bus for PCI: 00:15.0 done
1344 12:32:14.232714 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1345 12:32:14.236263 PCI: 00:15.1 scanning...
1346 12:32:14.239596 scan_static_bus for PCI: 00:15.1
1347 12:32:14.240183 I2C: 00:50 enabled
1348 12:32:14.246210 scan_static_bus for PCI: 00:15.1 done
1349 12:32:14.249326 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1350 12:32:14.252858 PCI: 00:15.3 scanning...
1351 12:32:14.255925 scan_static_bus for PCI: 00:15.3
1352 12:32:14.256414 I2C: 00:10 enabled
1353 12:32:14.262939 scan_static_bus for PCI: 00:15.3 done
1354 12:32:14.266305 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1355 12:32:14.269680 PCI: 00:19.1 scanning...
1356 12:32:14.272563 scan_static_bus for PCI: 00:19.1
1357 12:32:14.273036 I2C: 00:15 enabled
1358 12:32:14.275821 I2C: 00:2c enabled
1359 12:32:14.279224 scan_static_bus for PCI: 00:19.1 done
1360 12:32:14.282792 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1361 12:32:14.285965 PCI: 00:1e.3 scanning...
1362 12:32:14.289571 scan_generic_bus for PCI: 00:1e.3
1363 12:32:14.292874 SPI: 00 enabled
1364 12:32:14.299744 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1365 12:32:14.303086 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1366 12:32:14.306487 PCI: 00:1f.0 scanning...
1367 12:32:14.309475 scan_static_bus for PCI: 00:1f.0
1368 12:32:14.309940 PNP: 0c09.0 enabled
1369 12:32:14.312979 PNP: 0c09.0 scanning...
1370 12:32:14.316017 scan_static_bus for PNP: 0c09.0
1371 12:32:14.319559 scan_static_bus for PNP: 0c09.0 done
1372 12:32:14.326183 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1373 12:32:14.329297 scan_static_bus for PCI: 00:1f.0 done
1374 12:32:14.332466 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1375 12:32:14.336258 PCI: 00:1f.2 scanning...
1376 12:32:14.339768 scan_static_bus for PCI: 00:1f.2
1377 12:32:14.343288 GENERIC: 0.0 enabled
1378 12:32:14.343931 GENERIC: 0.0 scanning...
1379 12:32:14.346596 scan_static_bus for GENERIC: 0.0
1380 12:32:14.349979 GENERIC: 0.0 enabled
1381 12:32:14.352494 GENERIC: 1.0 enabled
1382 12:32:14.356296 scan_static_bus for GENERIC: 0.0 done
1383 12:32:14.359219 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1384 12:32:14.362944 scan_static_bus for PCI: 00:1f.2 done
1385 12:32:14.369707 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1386 12:32:14.372375 PCI: 00:1f.3 scanning...
1387 12:32:14.375752 scan_static_bus for PCI: 00:1f.3
1388 12:32:14.378931 scan_static_bus for PCI: 00:1f.3 done
1389 12:32:14.382374 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1390 12:32:14.386073 PCI: 00:1f.5 scanning...
1391 12:32:14.389043 scan_generic_bus for PCI: 00:1f.5
1392 12:32:14.392664 scan_generic_bus for PCI: 00:1f.5 done
1393 12:32:14.399046 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1394 12:32:14.402735 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1395 12:32:14.405966 scan_static_bus for Root Device done
1396 12:32:14.412418 scan_bus: bus Root Device finished in 729 msecs
1397 12:32:14.412970 done
1398 12:32:14.419320 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1399 12:32:14.422333 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1400 12:32:14.429574 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1401 12:32:14.432913 SPI flash protection: WPSW=1 SRP0=0
1402 12:32:14.439460 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1403 12:32:14.442602 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1404 12:32:14.446047 found VGA at PCI: 00:02.0
1405 12:32:14.449016 Setting up VGA for PCI: 00:02.0
1406 12:32:14.455197 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1407 12:32:14.458917 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1408 12:32:14.461853 Allocating resources...
1409 12:32:14.465089 Reading resources...
1410 12:32:14.468298 Root Device read_resources bus 0 link: 0
1411 12:32:14.471824 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1412 12:32:14.478762 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1413 12:32:14.482269 DOMAIN: 0000 read_resources bus 0 link: 0
1414 12:32:14.488858 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1415 12:32:14.495088 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1416 12:32:14.501954 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1417 12:32:14.505179 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1418 12:32:14.511840 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1419 12:32:14.518768 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1420 12:32:14.525275 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1421 12:32:14.532191 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1422 12:32:14.538629 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1423 12:32:14.545326 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1424 12:32:14.552041 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1425 12:32:14.558293 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1426 12:32:14.565440 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1427 12:32:14.572353 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1428 12:32:14.575604 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1429 12:32:14.581920 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1430 12:32:14.588461 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1431 12:32:14.594994 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1432 12:32:14.602044 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1433 12:32:14.608642 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1434 12:32:14.615022 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1435 12:32:14.618348 PCI: 00:04.0 read_resources bus 1 link: 0
1436 12:32:14.621549 PCI: 00:04.0 read_resources bus 1 link: 0 done
1437 12:32:14.628532 PCI: 00:06.0 read_resources bus 1 link: 0
1438 12:32:14.631765 PCI: 00:06.0 read_resources bus 1 link: 0 done
1439 12:32:14.635134 PCI: 00:0d.0 read_resources bus 0 link: 0
1440 12:32:14.641858 USB0 port 0 read_resources bus 0 link: 0
1441 12:32:14.645384 USB0 port 0 read_resources bus 0 link: 0 done
1442 12:32:14.648108 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1443 12:32:14.654982 PCI: 00:14.0 read_resources bus 0 link: 0
1444 12:32:14.658551 USB0 port 0 read_resources bus 0 link: 0
1445 12:32:14.661800 USB0 port 0 read_resources bus 0 link: 0 done
1446 12:32:14.668689 PCI: 00:14.0 read_resources bus 0 link: 0 done
1447 12:32:14.671984 PCI: 00:14.3 read_resources bus 0 link: 0
1448 12:32:14.674647 PCI: 00:14.3 read_resources bus 0 link: 0 done
1449 12:32:14.681508 PCI: 00:15.0 read_resources bus 0 link: 0
1450 12:32:14.685048 PCI: 00:15.0 read_resources bus 0 link: 0 done
1451 12:32:14.688286 PCI: 00:15.1 read_resources bus 0 link: 0
1452 12:32:14.694885 PCI: 00:15.1 read_resources bus 0 link: 0 done
1453 12:32:14.698196 PCI: 00:15.3 read_resources bus 0 link: 0
1454 12:32:14.704528 PCI: 00:15.3 read_resources bus 0 link: 0 done
1455 12:32:14.708223 PCI: 00:19.1 read_resources bus 0 link: 0
1456 12:32:14.711595 PCI: 00:19.1 read_resources bus 0 link: 0 done
1457 12:32:14.718026 PCI: 00:1e.3 read_resources bus 2 link: 0
1458 12:32:14.721660 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1459 12:32:14.724885 PCI: 00:1f.0 read_resources bus 0 link: 0
1460 12:32:14.731221 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1461 12:32:14.734635 PCI: 00:1f.2 read_resources bus 0 link: 0
1462 12:32:14.737768 GENERIC: 0.0 read_resources bus 0 link: 0
1463 12:32:14.744382 GENERIC: 0.0 read_resources bus 0 link: 0 done
1464 12:32:14.747680 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1465 12:32:14.754642 DOMAIN: 0000 read_resources bus 0 link: 0 done
1466 12:32:14.758082 Root Device read_resources bus 0 link: 0 done
1467 12:32:14.761229 Done reading resources.
1468 12:32:14.767993 Show resources in subtree (Root Device)...After reading.
1469 12:32:14.770946 Root Device child on link 0 CPU_CLUSTER: 0
1470 12:32:14.774217 CPU_CLUSTER: 0 child on link 0 APIC: 00
1471 12:32:14.774603 APIC: 00
1472 12:32:14.777734 APIC: 14
1473 12:32:14.778028 APIC: 16
1474 12:32:14.781112 APIC: 10
1475 12:32:14.781409 APIC: 12
1476 12:32:14.781533 APIC: 01
1477 12:32:14.784087 APIC: 09
1478 12:32:14.784168 APIC: 08
1479 12:32:14.788168 DOMAIN: 0000 child on link 0 GPIO: 0
1480 12:32:14.797478 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1481 12:32:14.807807 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1482 12:32:14.808372 GPIO: 0
1483 12:32:14.811156 PCI: 00:00.0
1484 12:32:14.820874 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 12:32:14.831011 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1486 12:32:14.837679 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1487 12:32:14.847729 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1488 12:32:14.857823 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1489 12:32:14.867555 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1490 12:32:14.877613 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1491 12:32:14.887895 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1492 12:32:14.893898 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1493 12:32:14.903960 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1494 12:32:14.913848 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1495 12:32:14.923917 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1496 12:32:14.933495 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1497 12:32:14.943883 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1498 12:32:14.953458 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1499 12:32:14.960159 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1500 12:32:14.970002 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1501 12:32:14.979959 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1502 12:32:14.990315 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1503 12:32:15.000139 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1504 12:32:15.009826 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1505 12:32:15.020057 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1506 12:32:15.030083 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1507 12:32:15.039476 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1508 12:32:15.049718 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1509 12:32:15.055940 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1510 12:32:15.065904 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1511 12:32:15.075937 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1512 12:32:15.079194 PCI: 00:02.0
1513 12:32:15.089204 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1514 12:32:15.098608 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1515 12:32:15.105545 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1516 12:32:15.112192 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1517 12:32:15.122210 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1518 12:32:15.122320 GENERIC: 0.0
1519 12:32:15.128893 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1520 12:32:15.135072 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1521 12:32:15.145603 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1522 12:32:15.155639 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1523 12:32:15.158752 PCI: 01:00.0
1524 12:32:15.168816 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1525 12:32:15.178837 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1526 12:32:15.179278 PCI: 00:08.0
1527 12:32:15.181990 PCI: 00:0a.0
1528 12:32:15.188574 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1529 12:32:15.195414 PCI: 00:0d.0 child on link 0 USB0 port 0
1530 12:32:15.205859 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1531 12:32:15.209294 USB0 port 0 child on link 0 USB3 port 0
1532 12:32:15.212126 USB3 port 0
1533 12:32:15.212561 USB3 port 1
1534 12:32:15.215805 USB3 port 2
1535 12:32:15.216232 USB3 port 3
1536 12:32:15.222241 PCI: 00:14.0 child on link 0 USB0 port 0
1537 12:32:15.232361 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1538 12:32:15.235805 USB0 port 0 child on link 0 USB2 port 0
1539 12:32:15.236284 USB2 port 0
1540 12:32:15.239140 USB2 port 1
1541 12:32:15.242401 USB2 port 2
1542 12:32:15.242823 USB2 port 3
1543 12:32:15.245704 USB2 port 4
1544 12:32:15.246144 USB2 port 5
1545 12:32:15.249156 USB2 port 6
1546 12:32:15.249579 USB2 port 7
1547 12:32:15.252315 USB2 port 8
1548 12:32:15.252762 USB2 port 9
1549 12:32:15.255273 USB3 port 0
1550 12:32:15.255765 USB3 port 1
1551 12:32:15.258904 USB3 port 2
1552 12:32:15.259332 USB3 port 3
1553 12:32:15.262240 PCI: 00:14.2
1554 12:32:15.272384 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1555 12:32:15.282212 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1556 12:32:15.285058 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1557 12:32:15.295214 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1558 12:32:15.298655 GENERIC: 0.0
1559 12:32:15.301959 PCI: 00:15.0 child on link 0 I2C: 00:1a
1560 12:32:15.312017 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1561 12:32:15.315422 I2C: 00:1a
1562 12:32:15.316001 I2C: 00:31
1563 12:32:15.316393 I2C: 00:32
1564 12:32:15.321879 PCI: 00:15.1 child on link 0 I2C: 00:50
1565 12:32:15.331493 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1566 12:32:15.331933 I2C: 00:50
1567 12:32:15.335228 PCI: 00:15.2
1568 12:32:15.338516 PCI: 00:15.3 child on link 0 I2C: 00:10
1569 12:32:15.348579 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1570 12:32:15.349021 I2C: 00:10
1571 12:32:15.351795 PCI: 00:16.0
1572 12:32:15.361872 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1573 12:32:15.362298 PCI: 00:19.0
1574 12:32:15.368764 PCI: 00:19.1 child on link 0 I2C: 00:15
1575 12:32:15.378449 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1576 12:32:15.379091 I2C: 00:15
1577 12:32:15.381797 I2C: 00:2c
1578 12:32:15.382213 PCI: 00:1e.0
1579 12:32:15.394864 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1580 12:32:15.398104 PCI: 00:1e.3 child on link 0 SPI: 00
1581 12:32:15.408670 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1582 12:32:15.409108 SPI: 00
1583 12:32:15.411750 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1584 12:32:15.421336 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1585 12:32:15.425002 PNP: 0c09.0
1586 12:32:15.431525 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1587 12:32:15.438194 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1588 12:32:15.444828 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1589 12:32:15.454762 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1590 12:32:15.461657 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1591 12:32:15.462230 GENERIC: 0.0
1592 12:32:15.464898 GENERIC: 1.0
1593 12:32:15.465470 PCI: 00:1f.3
1594 12:32:15.475081 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1595 12:32:15.484741 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1596 12:32:15.487907 PCI: 00:1f.5
1597 12:32:15.497760 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1598 12:32:15.504526 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1599 12:32:15.507884 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1600 12:32:15.514643 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1601 12:32:15.521074 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1602 12:32:15.524959 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1603 12:32:15.531093 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1604 12:32:15.537873 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1605 12:32:15.544639 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1606 12:32:15.551144 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1607 12:32:15.561183 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1608 12:32:15.564506 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1609 12:32:15.574506 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1610 12:32:15.581056 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1611 12:32:15.587601 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1612 12:32:15.591335 DOMAIN: 0000: Resource ranges:
1613 12:32:15.594507 * Base: 1000, Size: 800, Tag: 100
1614 12:32:15.597683 * Base: 1900, Size: e700, Tag: 100
1615 12:32:15.604370 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1616 12:32:15.610985 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1617 12:32:15.617643 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1618 12:32:15.624281 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1619 12:32:15.633962 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1620 12:32:15.640987 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1621 12:32:15.647155 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1622 12:32:15.657143 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1623 12:32:15.664154 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1624 12:32:15.670852 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1625 12:32:15.681108 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1626 12:32:15.686910 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1627 12:32:15.694203 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1628 12:32:15.703703 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1629 12:32:15.710413 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1630 12:32:15.717057 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1631 12:32:15.726920 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1632 12:32:15.733858 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1633 12:32:15.740228 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1634 12:32:15.750199 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1635 12:32:15.756798 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1636 12:32:15.763803 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1637 12:32:15.770113 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1638 12:32:15.779865 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1639 12:32:15.786452 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1640 12:32:15.793564 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1641 12:32:15.803001 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1642 12:32:15.809717 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1643 12:32:15.816429 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1644 12:32:15.826202 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1645 12:32:15.833446 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1646 12:32:15.839919 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1647 12:32:15.849678 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1648 12:32:15.853253 DOMAIN: 0000: Resource ranges:
1649 12:32:15.856150 * Base: 80400000, Size: 3fc00000, Tag: 200
1650 12:32:15.859532 * Base: d0000000, Size: 28000000, Tag: 200
1651 12:32:15.866066 * Base: fa000000, Size: 1000000, Tag: 200
1652 12:32:15.869029 * Base: fb001000, Size: 17ff000, Tag: 200
1653 12:32:15.872768 * Base: fe800000, Size: 300000, Tag: 200
1654 12:32:15.876080 * Base: feb80000, Size: 80000, Tag: 200
1655 12:32:15.882192 * Base: fed00000, Size: 40000, Tag: 200
1656 12:32:15.885771 * Base: fed70000, Size: 10000, Tag: 200
1657 12:32:15.889191 * Base: fed88000, Size: 8000, Tag: 200
1658 12:32:15.892445 * Base: fed93000, Size: d000, Tag: 200
1659 12:32:15.898924 * Base: feda2000, Size: 1e000, Tag: 200
1660 12:32:15.902200 * Base: fede0000, Size: 1220000, Tag: 200
1661 12:32:15.905738 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1662 12:32:15.915690 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1663 12:32:15.922397 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1664 12:32:15.928801 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1665 12:32:15.935385 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1666 12:32:15.942529 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1667 12:32:15.948947 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1668 12:32:15.955715 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1669 12:32:15.962197 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1670 12:32:15.968434 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1671 12:32:15.975615 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1672 12:32:15.982173 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1673 12:32:15.988823 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1674 12:32:15.995401 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1675 12:32:16.002199 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1676 12:32:16.008210 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1677 12:32:16.014918 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1678 12:32:16.021525 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1679 12:32:16.028601 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1680 12:32:16.035184 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1681 12:32:16.041766 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1682 12:32:16.048229 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1683 12:32:16.051592 PCI: 00:06.0: Resource ranges:
1684 12:32:16.054818 * Base: 80400000, Size: 100000, Tag: 200
1685 12:32:16.061380 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1686 12:32:16.067979 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1687 12:32:16.077954 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1688 12:32:16.084912 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1689 12:32:16.087872 Root Device assign_resources, bus 0 link: 0
1690 12:32:16.094511 DOMAIN: 0000 assign_resources, bus 0 link: 0
1691 12:32:16.101143 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1692 12:32:16.111628 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1693 12:32:16.118351 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1694 12:32:16.124281 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1695 12:32:16.131286 PCI: 00:04.0 assign_resources, bus 1 link: 0
1696 12:32:16.134447 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1697 12:32:16.144785 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1698 12:32:16.154715 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1699 12:32:16.161344 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1700 12:32:16.167892 PCI: 00:06.0 assign_resources, bus 1 link: 0
1701 12:32:16.174468 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1702 12:32:16.184570 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1703 12:32:16.187787 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1704 12:32:16.194928 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1705 12:32:16.204482 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1706 12:32:16.207772 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1707 12:32:16.214666 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1708 12:32:16.221425 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1709 12:32:16.227486 PCI: 00:14.0 assign_resources, bus 0 link: 0
1710 12:32:16.230909 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1711 12:32:16.237934 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1712 12:32:16.247331 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1713 12:32:16.253862 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1714 12:32:16.260381 PCI: 00:14.3 assign_resources, bus 0 link: 0
1715 12:32:16.264262 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1716 12:32:16.273992 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1717 12:32:16.276902 PCI: 00:15.0 assign_resources, bus 0 link: 0
1718 12:32:16.283827 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1719 12:32:16.290346 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1720 12:32:16.293543 PCI: 00:15.1 assign_resources, bus 0 link: 0
1721 12:32:16.300603 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1722 12:32:16.306895 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1723 12:32:16.313991 PCI: 00:15.3 assign_resources, bus 0 link: 0
1724 12:32:16.316972 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1725 12:32:16.327102 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1726 12:32:16.333662 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1727 12:32:16.337048 PCI: 00:19.1 assign_resources, bus 0 link: 0
1728 12:32:16.342869 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1729 12:32:16.349424 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1730 12:32:16.356013 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1731 12:32:16.359449 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1732 12:32:16.362562 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1733 12:32:16.369060 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1734 12:32:16.372940 LPC: Trying to open IO window from 800 size 1ff
1735 12:32:16.382545 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1736 12:32:16.389041 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1737 12:32:16.399339 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1738 12:32:16.402508 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1739 12:32:16.409115 Root Device assign_resources, bus 0 link: 0 done
1740 12:32:16.409196 Done setting resources.
1741 12:32:16.415870 Show resources in subtree (Root Device)...After assigning values.
1742 12:32:16.422450 Root Device child on link 0 CPU_CLUSTER: 0
1743 12:32:16.425679 CPU_CLUSTER: 0 child on link 0 APIC: 00
1744 12:32:16.425762 APIC: 00
1745 12:32:16.429035 APIC: 14
1746 12:32:16.429151 APIC: 16
1747 12:32:16.429244 APIC: 10
1748 12:32:16.432077 APIC: 12
1749 12:32:16.432177 APIC: 01
1750 12:32:16.435447 APIC: 09
1751 12:32:16.435574 APIC: 08
1752 12:32:16.438844 DOMAIN: 0000 child on link 0 GPIO: 0
1753 12:32:16.449023 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1754 12:32:16.458536 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1755 12:32:16.458694 GPIO: 0
1756 12:32:16.461901 PCI: 00:00.0
1757 12:32:16.471838 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1758 12:32:16.482138 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1759 12:32:16.488939 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1760 12:32:16.498466 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1761 12:32:16.508828 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1762 12:32:16.518718 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1763 12:32:16.528642 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1764 12:32:16.538664 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1765 12:32:16.544773 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1766 12:32:16.555105 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1767 12:32:16.565170 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1768 12:32:16.575048 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1769 12:32:16.584969 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1770 12:32:16.594739 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1771 12:32:16.601216 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1772 12:32:16.611390 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1773 12:32:16.621697 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1774 12:32:16.631635 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1775 12:32:16.641096 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1776 12:32:16.650959 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1777 12:32:16.661007 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1778 12:32:16.667976 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1779 12:32:16.677694 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1780 12:32:16.687432 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1781 12:32:16.697619 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1782 12:32:16.707604 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1783 12:32:16.717756 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1784 12:32:16.727373 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1785 12:32:16.727473 PCI: 00:02.0
1786 12:32:16.740890 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1787 12:32:16.750941 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1788 12:32:16.760614 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1789 12:32:16.763991 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1790 12:32:16.774270 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1791 12:32:16.777716 GENERIC: 0.0
1792 12:32:16.780563 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1793 12:32:16.790322 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1794 12:32:16.800645 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1795 12:32:16.810301 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1796 12:32:16.813643 PCI: 01:00.0
1797 12:32:16.823569 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1798 12:32:16.833731 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1799 12:32:16.836905 PCI: 00:08.0
1800 12:32:16.836989 PCI: 00:0a.0
1801 12:32:16.847179 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1802 12:32:16.853629 PCI: 00:0d.0 child on link 0 USB0 port 0
1803 12:32:16.863381 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1804 12:32:16.866756 USB0 port 0 child on link 0 USB3 port 0
1805 12:32:16.870116 USB3 port 0
1806 12:32:16.870236 USB3 port 1
1807 12:32:16.873553 USB3 port 2
1808 12:32:16.873637 USB3 port 3
1809 12:32:16.880365 PCI: 00:14.0 child on link 0 USB0 port 0
1810 12:32:16.890513 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1811 12:32:16.893410 USB0 port 0 child on link 0 USB2 port 0
1812 12:32:16.896972 USB2 port 0
1813 12:32:16.897060 USB2 port 1
1814 12:32:16.900273 USB2 port 2
1815 12:32:16.900361 USB2 port 3
1816 12:32:16.903878 USB2 port 4
1817 12:32:16.903970 USB2 port 5
1818 12:32:16.907371 USB2 port 6
1819 12:32:16.907495 USB2 port 7
1820 12:32:16.910044 USB2 port 8
1821 12:32:16.910133 USB2 port 9
1822 12:32:16.913447 USB3 port 0
1823 12:32:16.913538 USB3 port 1
1824 12:32:16.916746 USB3 port 2
1825 12:32:16.916868 USB3 port 3
1826 12:32:16.920272 PCI: 00:14.2
1827 12:32:16.929861 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1828 12:32:16.939974 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1829 12:32:16.946305 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1830 12:32:16.956399 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1831 12:32:16.956514 GENERIC: 0.0
1832 12:32:16.962918 PCI: 00:15.0 child on link 0 I2C: 00:1a
1833 12:32:16.973040 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1834 12:32:16.973229 I2C: 00:1a
1835 12:32:16.976346 I2C: 00:31
1836 12:32:16.976483 I2C: 00:32
1837 12:32:16.979574 PCI: 00:15.1 child on link 0 I2C: 00:50
1838 12:32:16.989861 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1839 12:32:16.993117 I2C: 00:50
1840 12:32:16.993250 PCI: 00:15.2
1841 12:32:16.999695 PCI: 00:15.3 child on link 0 I2C: 00:10
1842 12:32:17.009586 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1843 12:32:17.009747 I2C: 00:10
1844 12:32:17.013064 PCI: 00:16.0
1845 12:32:17.022684 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1846 12:32:17.022893 PCI: 00:19.0
1847 12:32:17.029838 PCI: 00:19.1 child on link 0 I2C: 00:15
1848 12:32:17.039708 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1849 12:32:17.039823 I2C: 00:15
1850 12:32:17.042590 I2C: 00:2c
1851 12:32:17.042678 PCI: 00:1e.0
1852 12:32:17.056007 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1853 12:32:17.059331 PCI: 00:1e.3 child on link 0 SPI: 00
1854 12:32:17.069728 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1855 12:32:17.069826 SPI: 00
1856 12:32:17.075811 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1857 12:32:17.082823 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1858 12:32:17.086129 PNP: 0c09.0
1859 12:32:17.092313 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1860 12:32:17.099276 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1861 12:32:17.109377 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1862 12:32:17.115783 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1863 12:32:17.122300 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1864 12:32:17.122433 GENERIC: 0.0
1865 12:32:17.125819 GENERIC: 1.0
1866 12:32:17.125942 PCI: 00:1f.3
1867 12:32:17.139004 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1868 12:32:17.149043 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1869 12:32:17.149130 PCI: 00:1f.5
1870 12:32:17.158637 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1871 12:32:17.162144 Done allocating resources.
1872 12:32:17.168794 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1873 12:32:17.175485 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1874 12:32:17.179230 Configure audio over I2S with MAX98373 NAU88L25B.
1875 12:32:17.183985 Enabling BT offload
1876 12:32:17.191151 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1877 12:32:17.194494 Enabling resources...
1878 12:32:17.198143 PCI: 00:00.0 subsystem <- 8086/4609
1879 12:32:17.201647 PCI: 00:00.0 cmd <- 06
1880 12:32:17.204430 PCI: 00:02.0 subsystem <- 8086/46b3
1881 12:32:17.207889 PCI: 00:02.0 cmd <- 03
1882 12:32:17.211140 PCI: 00:04.0 subsystem <- 8086/461d
1883 12:32:17.211638 PCI: 00:04.0 cmd <- 02
1884 12:32:17.214632 PCI: 00:06.0 bridge ctrl <- 0013
1885 12:32:17.217967 PCI: 00:06.0 subsystem <- 8086/464d
1886 12:32:17.221391 PCI: 00:06.0 cmd <- 106
1887 12:32:17.224555 PCI: 00:0a.0 subsystem <- 8086/467d
1888 12:32:17.227742 PCI: 00:0a.0 cmd <- 02
1889 12:32:17.231230 PCI: 00:0d.0 subsystem <- 8086/461e
1890 12:32:17.234733 PCI: 00:0d.0 cmd <- 02
1891 12:32:17.237555 PCI: 00:14.0 subsystem <- 8086/51ed
1892 12:32:17.241029 PCI: 00:14.0 cmd <- 02
1893 12:32:17.244333 PCI: 00:14.2 subsystem <- 8086/51ef
1894 12:32:17.244490 PCI: 00:14.2 cmd <- 02
1895 12:32:17.247835 PCI: 00:14.3 subsystem <- 8086/51f0
1896 12:32:17.250587 PCI: 00:14.3 cmd <- 02
1897 12:32:17.254426 PCI: 00:15.0 subsystem <- 8086/51e8
1898 12:32:17.257586 PCI: 00:15.0 cmd <- 02
1899 12:32:17.260815 PCI: 00:15.1 subsystem <- 8086/51e9
1900 12:32:17.264015 PCI: 00:15.1 cmd <- 06
1901 12:32:17.267470 PCI: 00:15.3 subsystem <- 8086/51eb
1902 12:32:17.270818 PCI: 00:15.3 cmd <- 02
1903 12:32:17.274250 PCI: 00:16.0 subsystem <- 8086/51e0
1904 12:32:17.274360 PCI: 00:16.0 cmd <- 02
1905 12:32:17.277409 PCI: 00:19.1 subsystem <- 8086/51c6
1906 12:32:17.280668 PCI: 00:19.1 cmd <- 02
1907 12:32:17.284033 PCI: 00:1e.0 subsystem <- 8086/51a8
1908 12:32:17.287430 PCI: 00:1e.0 cmd <- 06
1909 12:32:17.290603 PCI: 00:1e.3 subsystem <- 8086/51ab
1910 12:32:17.293917 PCI: 00:1e.3 cmd <- 02
1911 12:32:17.297145 PCI: 00:1f.0 subsystem <- 8086/5182
1912 12:32:17.300782 PCI: 00:1f.0 cmd <- 407
1913 12:32:17.304353 PCI: 00:1f.3 subsystem <- 8086/51c8
1914 12:32:17.304466 PCI: 00:1f.3 cmd <- 02
1915 12:32:17.310824 PCI: 00:1f.5 subsystem <- 8086/51a4
1916 12:32:17.310935 PCI: 00:1f.5 cmd <- 406
1917 12:32:17.314128 PCI: 01:00.0 cmd <- 02
1918 12:32:17.314236 done.
1919 12:32:17.320470 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1920 12:32:17.323896 ME: Version: Unavailable
1921 12:32:17.327381 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1922 12:32:17.330624 Initializing devices...
1923 12:32:17.334208 Root Device init
1924 12:32:17.334295 mainboard: EC init
1925 12:32:17.340572 Chrome EC: Set SMI mask to 0x0000000000000000
1926 12:32:17.340707 Chrome EC: UHEPI supported
1927 12:32:17.347711 Chrome EC: clear events_b mask to 0x0000000000000000
1928 12:32:17.354305 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1929 12:32:17.360855 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1930 12:32:17.364228 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1931 12:32:17.371146 Chrome EC: Set WAKE mask to 0x0000000000000000
1932 12:32:17.374468 Root Device init finished in 38 msecs
1933 12:32:17.377796 PCI: 00:00.0 init
1934 12:32:17.381105 CPU TDP = 15 Watts
1935 12:32:17.381208 CPU PL1 = 15 Watts
1936 12:32:17.384412 CPU PL2 = 55 Watts
1937 12:32:17.384524 CPU PL4 = 123 Watts
1938 12:32:17.391413 PCI: 00:00.0 init finished in 8 msecs
1939 12:32:17.391552 PCI: 00:02.0 init
1940 12:32:17.394153 GMA: Found VBT in CBFS
1941 12:32:17.397801 GMA: Found valid VBT in CBFS
1942 12:32:17.400964 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1943 12:32:17.411023 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1944 12:32:17.414898 PCI: 00:02.0 init finished in 18 msecs
1945 12:32:17.415236 PCI: 00:06.0 init
1946 12:32:17.417689 Initializing PCH PCIe bridge.
1947 12:32:17.421180 PCI: 00:06.0 init finished in 3 msecs
1948 12:32:17.424320 PCI: 00:0a.0 init
1949 12:32:17.428023 PCI: 00:0a.0 init finished in 0 msecs
1950 12:32:17.431222 PCI: 00:14.0 init
1951 12:32:17.434555 PCI: 00:14.0 init finished in 0 msecs
1952 12:32:17.434799 PCI: 00:14.2 init
1953 12:32:17.441367 PCI: 00:14.2 init finished in 0 msecs
1954 12:32:17.441684 PCI: 00:15.0 init
1955 12:32:17.444768 I2C bus 0 version 0x3230302a
1956 12:32:17.447905 DW I2C bus 0 at 0x80655000 (400 KHz)
1957 12:32:17.451270 PCI: 00:15.0 init finished in 6 msecs
1958 12:32:17.454345 PCI: 00:15.1 init
1959 12:32:17.457932 I2C bus 1 version 0x3230302a
1960 12:32:17.461141 DW I2C bus 1 at 0x80656000 (400 KHz)
1961 12:32:17.464773 PCI: 00:15.1 init finished in 6 msecs
1962 12:32:17.467509 PCI: 00:15.3 init
1963 12:32:17.467751 I2C bus 3 version 0x3230302a
1964 12:32:17.474370 DW I2C bus 3 at 0x80657000 (400 KHz)
1965 12:32:17.477846 PCI: 00:15.3 init finished in 6 msecs
1966 12:32:17.478088 PCI: 00:16.0 init
1967 12:32:17.481091 PCI: 00:16.0 init finished in 0 msecs
1968 12:32:17.484701 PCI: 00:19.1 init
1969 12:32:17.487861 I2C bus 5 version 0x3230302a
1970 12:32:17.491128 DW I2C bus 5 at 0x80659000 (400 KHz)
1971 12:32:17.494625 PCI: 00:19.1 init finished in 6 msecs
1972 12:32:17.498053 PCI: 00:1f.0 init
1973 12:32:17.501074 IOAPIC: Initializing IOAPIC at 0xfec00000
1974 12:32:17.504110 IOAPIC: ID = 0x02
1975 12:32:17.504353 IOAPIC: Dumping registers
1976 12:32:17.507982 reg 0x0000: 0x02000000
1977 12:32:17.511017 reg 0x0001: 0x00770020
1978 12:32:17.514500 reg 0x0002: 0x00000000
1979 12:32:17.514742 IOAPIC: 120 interrupts
1980 12:32:17.520752 IOAPIC: Clearing IOAPIC at 0xfec00000
1981 12:32:17.524571 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1982 12:32:17.528026 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1983 12:32:17.534535 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1984 12:32:17.537398 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1985 12:32:17.543904 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1986 12:32:17.547197 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1987 12:32:17.553823 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1988 12:32:17.557850 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1989 12:32:17.564007 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1990 12:32:17.567226 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1991 12:32:17.570649 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1992 12:32:17.577915 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1993 12:32:17.580745 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1994 12:32:17.587743 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1995 12:32:17.590926 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1996 12:32:17.597774 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1997 12:32:17.600999 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1998 12:32:17.604411 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1999 12:32:17.610915 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2000 12:32:17.614239 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2001 12:32:17.620840 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2002 12:32:17.624157 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2003 12:32:17.630687 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2004 12:32:17.633955 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2005 12:32:17.640533 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2006 12:32:17.644147 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2007 12:32:17.647308 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2008 12:32:17.653949 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2009 12:32:17.657107 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2010 12:32:17.663755 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2011 12:32:17.667157 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2012 12:32:17.673611 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2013 12:32:17.677137 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2014 12:32:17.683874 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2015 12:32:17.687061 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2016 12:32:17.690215 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2017 12:32:17.696899 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2018 12:32:17.700485 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2019 12:32:17.706922 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2020 12:32:17.710226 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2021 12:32:17.717362 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2022 12:32:17.720451 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2023 12:32:17.723481 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2024 12:32:17.730508 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2025 12:32:17.733746 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2026 12:32:17.740353 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2027 12:32:17.743715 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2028 12:32:17.750015 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2029 12:32:17.753902 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2030 12:32:17.760062 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2031 12:32:17.763550 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2032 12:32:17.766569 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2033 12:32:17.773560 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2034 12:32:17.776963 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2035 12:32:17.783678 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2036 12:32:17.786823 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2037 12:32:17.793615 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2038 12:32:17.796987 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2039 12:32:17.803231 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2040 12:32:17.806680 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2041 12:32:17.810220 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2042 12:32:17.816675 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2043 12:32:17.820126 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2044 12:32:17.826826 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2045 12:32:17.829728 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2046 12:32:17.836680 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2047 12:32:17.840017 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2048 12:32:17.846663 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2049 12:32:17.849893 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2050 12:32:17.853388 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2051 12:32:17.860138 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2052 12:32:17.863078 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2053 12:32:17.869831 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2054 12:32:17.873089 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2055 12:32:17.879900 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2056 12:32:17.883075 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2057 12:32:17.886485 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2058 12:32:17.893249 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2059 12:32:17.896620 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2060 12:32:17.902903 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2061 12:32:17.906267 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2062 12:32:17.913171 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2063 12:32:17.916161 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2064 12:32:17.922957 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2065 12:32:17.926065 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2066 12:32:17.930097 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2067 12:32:17.936377 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2068 12:32:17.939647 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2069 12:32:17.946457 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2070 12:32:17.949538 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2071 12:32:17.956514 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2072 12:32:17.959648 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2073 12:32:17.966347 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2074 12:32:17.969256 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2075 12:32:17.972649 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2076 12:32:17.979625 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2077 12:32:17.982818 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2078 12:32:17.989527 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2079 12:32:17.992695 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2080 12:32:17.999389 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2081 12:32:18.002729 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2082 12:32:18.009481 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2083 12:32:18.012864 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2084 12:32:18.016404 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2085 12:32:18.022778 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2086 12:32:18.025857 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2087 12:32:18.032571 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2088 12:32:18.035722 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2089 12:32:18.042915 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2090 12:32:18.045975 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2091 12:32:18.052650 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2092 12:32:18.055952 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2093 12:32:18.059201 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2094 12:32:18.066010 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2095 12:32:18.069341 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2096 12:32:18.075687 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2097 12:32:18.079218 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2098 12:32:18.085655 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2099 12:32:18.089120 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2100 12:32:18.095717 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2101 12:32:18.098966 IOAPIC: Bootstrap Processor Local APIC = 0x00
2102 12:32:18.102306 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2103 12:32:18.108756 PCI: 00:1f.0 init finished in 607 msecs
2104 12:32:18.108841 PCI: 00:1f.2 init
2105 12:32:18.112068 apm_control: Disabling ACPI.
2106 12:32:18.116674 APMC done.
2107 12:32:18.119454 PCI: 00:1f.2 init finished in 6 msecs
2108 12:32:18.122969 PCI: 00:1f.3 init
2109 12:32:18.126194 PCI: 00:1f.3 init finished in 0 msecs
2110 12:32:18.126315 PCI: 01:00.0 init
2111 12:32:18.129983 PCI: 01:00.0 init finished in 0 msecs
2112 12:32:18.132794 PNP: 0c09.0 init
2113 12:32:18.136218 Google Chrome EC uptime: 12.491 seconds
2114 12:32:18.142857 Google Chrome AP resets since EC boot: 1
2115 12:32:18.146433 Google Chrome most recent AP reset causes:
2116 12:32:18.149505 0.341: 32775 shutdown: entering G3
2117 12:32:18.156785 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2118 12:32:18.160024 PNP: 0c09.0 init finished in 23 msecs
2119 12:32:18.162867 GENERIC: 0.0 init
2120 12:32:18.165997 GENERIC: 0.0 init finished in 0 msecs
2121 12:32:18.166079 GENERIC: 1.0 init
2122 12:32:18.172606 GENERIC: 1.0 init finished in 0 msecs
2123 12:32:18.172688 Devices initialized
2124 12:32:18.176403 Show all devs... After init.
2125 12:32:18.179804 Root Device: enabled 1
2126 12:32:18.183029 CPU_CLUSTER: 0: enabled 1
2127 12:32:18.183111 DOMAIN: 0000: enabled 1
2128 12:32:18.186111 GPIO: 0: enabled 1
2129 12:32:18.189347 PCI: 00:00.0: enabled 1
2130 12:32:18.189430 PCI: 00:01.0: enabled 0
2131 12:32:18.192810 PCI: 00:01.1: enabled 0
2132 12:32:18.196014 PCI: 00:02.0: enabled 1
2133 12:32:18.199714 PCI: 00:04.0: enabled 1
2134 12:32:18.199795 PCI: 00:05.0: enabled 0
2135 12:32:18.202651 PCI: 00:06.0: enabled 1
2136 12:32:18.206026 PCI: 00:06.2: enabled 0
2137 12:32:18.209335 PCI: 00:07.0: enabled 0
2138 12:32:18.209417 PCI: 00:07.1: enabled 0
2139 12:32:18.212692 PCI: 00:07.2: enabled 0
2140 12:32:18.216209 PCI: 00:07.3: enabled 0
2141 12:32:18.216294 PCI: 00:08.0: enabled 0
2142 12:32:18.219508 PCI: 00:09.0: enabled 0
2143 12:32:18.222695 PCI: 00:0a.0: enabled 1
2144 12:32:18.225962 PCI: 00:0d.0: enabled 1
2145 12:32:18.226045 PCI: 00:0d.1: enabled 0
2146 12:32:18.229108 PCI: 00:0d.2: enabled 0
2147 12:32:18.232949 PCI: 00:0d.3: enabled 0
2148 12:32:18.235937 PCI: 00:0e.0: enabled 0
2149 12:32:18.236021 PCI: 00:10.0: enabled 0
2150 12:32:18.239559 PCI: 00:10.1: enabled 0
2151 12:32:18.242699 PCI: 00:10.6: enabled 0
2152 12:32:18.245833 PCI: 00:10.7: enabled 0
2153 12:32:18.245915 PCI: 00:12.0: enabled 0
2154 12:32:18.249113 PCI: 00:12.6: enabled 0
2155 12:32:18.252443 PCI: 00:12.7: enabled 0
2156 12:32:18.252528 PCI: 00:13.0: enabled 0
2157 12:32:18.255649 PCI: 00:14.0: enabled 1
2158 12:32:18.258977 PCI: 00:14.1: enabled 0
2159 12:32:18.262848 PCI: 00:14.2: enabled 1
2160 12:32:18.262931 PCI: 00:14.3: enabled 1
2161 12:32:18.266143 PCI: 00:15.0: enabled 1
2162 12:32:18.269502 PCI: 00:15.1: enabled 1
2163 12:32:18.272486 PCI: 00:15.2: enabled 0
2164 12:32:18.272569 PCI: 00:15.3: enabled 1
2165 12:32:18.276129 PCI: 00:16.0: enabled 1
2166 12:32:18.279151 PCI: 00:16.1: enabled 0
2167 12:32:18.282352 PCI: 00:16.2: enabled 0
2168 12:32:18.282435 PCI: 00:16.3: enabled 0
2169 12:32:18.286322 PCI: 00:16.4: enabled 0
2170 12:32:18.289097 PCI: 00:16.5: enabled 0
2171 12:32:18.289180 PCI: 00:17.0: enabled 0
2172 12:32:18.293031 PCI: 00:19.0: enabled 0
2173 12:32:18.295543 PCI: 00:19.1: enabled 1
2174 12:32:18.299066 PCI: 00:19.2: enabled 0
2175 12:32:18.299149 PCI: 00:1a.0: enabled 0
2176 12:32:18.302107 PCI: 00:1c.0: enabled 0
2177 12:32:18.305750 PCI: 00:1c.1: enabled 0
2178 12:32:18.308999 PCI: 00:1c.2: enabled 0
2179 12:32:18.309081 PCI: 00:1c.3: enabled 0
2180 12:32:18.312156 PCI: 00:1c.4: enabled 0
2181 12:32:18.315446 PCI: 00:1c.5: enabled 0
2182 12:32:18.319189 PCI: 00:1c.6: enabled 0
2183 12:32:18.319271 PCI: 00:1c.7: enabled 0
2184 12:32:18.322157 PCI: 00:1d.0: enabled 0
2185 12:32:18.325470 PCI: 00:1d.1: enabled 0
2186 12:32:18.328559 PCI: 00:1d.2: enabled 0
2187 12:32:18.328642 PCI: 00:1d.3: enabled 0
2188 12:32:18.332352 PCI: 00:1e.0: enabled 1
2189 12:32:18.335718 PCI: 00:1e.1: enabled 0
2190 12:32:18.338715 PCI: 00:1e.2: enabled 0
2191 12:32:18.338797 PCI: 00:1e.3: enabled 1
2192 12:32:18.341823 PCI: 00:1f.0: enabled 1
2193 12:32:18.345482 PCI: 00:1f.1: enabled 0
2194 12:32:18.345568 PCI: 00:1f.2: enabled 1
2195 12:32:18.348652 PCI: 00:1f.3: enabled 1
2196 12:32:18.351924 PCI: 00:1f.4: enabled 0
2197 12:32:18.355256 PCI: 00:1f.5: enabled 1
2198 12:32:18.355395 PCI: 00:1f.6: enabled 0
2199 12:32:18.358526 PCI: 00:1f.7: enabled 0
2200 12:32:18.361793 GENERIC: 0.0: enabled 1
2201 12:32:18.365056 GENERIC: 0.0: enabled 1
2202 12:32:18.365144 GENERIC: 1.0: enabled 1
2203 12:32:18.368410 GENERIC: 0.0: enabled 1
2204 12:32:18.371856 GENERIC: 1.0: enabled 1
2205 12:32:18.375681 USB0 port 0: enabled 1
2206 12:32:18.375769 USB0 port 0: enabled 1
2207 12:32:18.378424 GENERIC: 0.0: enabled 1
2208 12:32:18.381973 I2C: 00:1a: enabled 1
2209 12:32:18.382060 I2C: 00:31: enabled 1
2210 12:32:18.385337 I2C: 00:32: enabled 1
2211 12:32:18.388763 I2C: 00:50: enabled 1
2212 12:32:18.388850 I2C: 00:10: enabled 1
2213 12:32:18.392064 I2C: 00:15: enabled 1
2214 12:32:18.395119 I2C: 00:2c: enabled 1
2215 12:32:18.395206 GENERIC: 0.0: enabled 1
2216 12:32:18.399019 SPI: 00: enabled 1
2217 12:32:18.402211 PNP: 0c09.0: enabled 1
2218 12:32:18.402297 GENERIC: 0.0: enabled 1
2219 12:32:18.405471 USB3 port 0: enabled 1
2220 12:32:18.408697 USB3 port 1: enabled 0
2221 12:32:18.411967 USB3 port 2: enabled 1
2222 12:32:18.412053 USB3 port 3: enabled 0
2223 12:32:18.415155 USB2 port 0: enabled 1
2224 12:32:18.418336 USB2 port 1: enabled 0
2225 12:32:18.418422 USB2 port 2: enabled 1
2226 12:32:18.421700 USB2 port 3: enabled 0
2227 12:32:18.424948 USB2 port 4: enabled 0
2228 12:32:18.428345 USB2 port 5: enabled 1
2229 12:32:18.428431 USB2 port 6: enabled 0
2230 12:32:18.431637 USB2 port 7: enabled 0
2231 12:32:18.435025 USB2 port 8: enabled 1
2232 12:32:18.435135 USB2 port 9: enabled 1
2233 12:32:18.438261 USB3 port 0: enabled 1
2234 12:32:18.441852 USB3 port 1: enabled 0
2235 12:32:18.441938 USB3 port 2: enabled 0
2236 12:32:18.445262 USB3 port 3: enabled 0
2237 12:32:18.448151 GENERIC: 0.0: enabled 1
2238 12:32:18.451677 GENERIC: 1.0: enabled 1
2239 12:32:18.451763 APIC: 00: enabled 1
2240 12:32:18.454939 APIC: 14: enabled 1
2241 12:32:18.458599 APIC: 16: enabled 1
2242 12:32:18.458685 APIC: 10: enabled 1
2243 12:32:18.462098 APIC: 12: enabled 1
2244 12:32:18.462184 APIC: 01: enabled 1
2245 12:32:18.465359 APIC: 09: enabled 1
2246 12:32:18.468543 APIC: 08: enabled 1
2247 12:32:18.468626 PCI: 01:00.0: enabled 1
2248 12:32:18.474947 BS: BS_DEV_INIT run times (exec / console): 8 / 1133 ms
2249 12:32:18.478346 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2250 12:32:18.484749 ELOG: NV offset 0xf20000 size 0x4000
2251 12:32:18.491676 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2252 12:32:18.498492 ELOG: Event(17) added with size 13 at 2023-12-14 12:32:18 UTC
2253 12:32:18.504711 ELOG: Event(9E) added with size 10 at 2023-12-14 12:32:18 UTC
2254 12:32:18.511791 ELOG: Event(9F) added with size 14 at 2023-12-14 12:32:18 UTC
2255 12:32:18.517948 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2256 12:32:18.524687 ELOG: Event(A0) added with size 9 at 2023-12-14 12:32:18 UTC
2257 12:32:18.528169 elog_add_boot_reason: Logged dev mode boot
2258 12:32:18.534734 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2259 12:32:18.534826 Finalize devices...
2260 12:32:18.538290 PCI: 00:16.0 final
2261 12:32:18.538369 PCI: 00:1f.2 final
2262 12:32:18.541098 GENERIC: 0.0 final
2263 12:32:18.547910 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2264 12:32:18.547994 GENERIC: 1.0 final
2265 12:32:18.554833 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2266 12:32:18.557890 Devices finalized
2267 12:32:18.561401 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2268 12:32:18.568300 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2269 12:32:18.574850 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2270 12:32:18.578139 ME: HFSTS1 : 0x90000245
2271 12:32:18.581505 ME: HFSTS2 : 0x82100116
2272 12:32:18.588308 ME: HFSTS3 : 0x00000050
2273 12:32:18.591434 ME: HFSTS4 : 0x00004000
2274 12:32:18.594880 ME: HFSTS5 : 0x00000000
2275 12:32:18.601480 ME: HFSTS6 : 0x40600006
2276 12:32:18.604931 ME: Manufacturing Mode : NO
2277 12:32:18.608156 ME: SPI Protection Mode Enabled : YES
2278 12:32:18.611497 ME: FPFs Committed : YES
2279 12:32:18.614739 ME: Manufacturing Vars Locked : YES
2280 12:32:18.621476 ME: FW Partition Table : OK
2281 12:32:18.624740 ME: Bringup Loader Failure : NO
2282 12:32:18.627861 ME: Firmware Init Complete : YES
2283 12:32:18.631299 ME: Boot Options Present : NO
2284 12:32:18.634526 ME: Update In Progress : NO
2285 12:32:18.637743 ME: D0i3 Support : YES
2286 12:32:18.641253 ME: Low Power State Enabled : NO
2287 12:32:18.644690 ME: CPU Replaced : YES
2288 12:32:18.651572 ME: CPU Replacement Valid : YES
2289 12:32:18.654348 ME: Current Working State : 5
2290 12:32:18.657651 ME: Current Operation State : 1
2291 12:32:18.661460 ME: Current Operation Mode : 0
2292 12:32:18.664345 ME: Error Code : 0
2293 12:32:18.667894 ME: Enhanced Debug Mode : NO
2294 12:32:18.671530 ME: CPU Debug Disabled : YES
2295 12:32:18.674293 ME: TXT Support : NO
2296 12:32:18.677606 ME: WP for RO is enabled : YES
2297 12:32:18.684665 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2298 12:32:18.691226 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2299 12:32:18.694737 Ramoops buffer: 0x100000@0x76899000.
2300 12:32:18.700836 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2301 12:32:18.707725 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2302 12:32:18.710826 CBFS: 'fallback/slic' not found.
2303 12:32:18.714077 ACPI: Writing ACPI tables at 7686d000.
2304 12:32:18.717826 ACPI: * FACS
2305 12:32:18.717908 ACPI: * DSDT
2306 12:32:18.724544 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2307 12:32:18.729564 ACPI: * FADT
2308 12:32:18.729651 SCI is IRQ9
2309 12:32:18.735940 ACPI: added table 1/32, length now 40
2310 12:32:18.736053 ACPI: * SSDT
2311 12:32:18.742732 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2312 12:32:18.745666 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2313 12:32:18.752502 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2314 12:32:18.755611 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2315 12:32:18.762576 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2316 12:32:18.765634 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2317 12:32:18.772282 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2318 12:32:18.778750 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2319 12:32:18.782515 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2320 12:32:18.788940 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2321 12:32:18.792382 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2322 12:32:18.798790 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2323 12:32:18.802181 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2324 12:32:18.808532 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2325 12:32:18.815688 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2326 12:32:18.818598 PS2K: Passing 80 keymaps to kernel
2327 12:32:18.825364 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2328 12:32:18.831847 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2329 12:32:18.838386 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2330 12:32:18.845455 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2331 12:32:18.848527 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2332 12:32:18.855242 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2333 12:32:18.861819 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2334 12:32:18.868991 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2335 12:32:18.875044 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2336 12:32:18.882261 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2337 12:32:18.885445 ACPI: added table 2/32, length now 44
2338 12:32:18.885542 ACPI: * MCFG
2339 12:32:18.891900 ACPI: added table 3/32, length now 48
2340 12:32:18.892012 ACPI: * TPM2
2341 12:32:18.895165 TPM2 log created at 0x7685d000
2342 12:32:18.898414 ACPI: added table 4/32, length now 52
2343 12:32:18.901752 ACPI: * LPIT
2344 12:32:18.905262 ACPI: added table 5/32, length now 56
2345 12:32:18.905398 ACPI: * MADT
2346 12:32:18.908282 SCI is IRQ9
2347 12:32:18.911783 ACPI: added table 6/32, length now 60
2348 12:32:18.915147 cmd_reg from pmc_make_ipc_cmd 1052838
2349 12:32:18.922138 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2350 12:32:18.928486 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2351 12:32:18.935566 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2352 12:32:18.938222 PMC CrashLog size in discovery mode: 0xC00
2353 12:32:18.941795 cpu crashlog bar addr: 0x80640000
2354 12:32:18.945129 cpu discovery table offset: 0x6030
2355 12:32:18.948758 cpu_crashlog_discovery_table buffer count: 0x3
2356 12:32:18.954994 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2357 12:32:18.961701 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2358 12:32:18.968614 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2359 12:32:18.974883 PMC crashLog size in discovery mode : 0xC00
2360 12:32:18.981749 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2361 12:32:18.984964 discover mode PMC crashlog size adjusted to: 0x200
2362 12:32:18.991600 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2363 12:32:18.998188 discover mode PMC crashlog size adjusted to: 0x0
2364 12:32:19.001918 m_cpu_crashLog_size : 0x3480 bytes
2365 12:32:19.004763 CPU crashLog present.
2366 12:32:19.008515 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2367 12:32:19.014868 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2368 12:32:19.018200 current = 76876550
2369 12:32:19.018788 ACPI: * DMAR
2370 12:32:19.021567 ACPI: added table 7/32, length now 64
2371 12:32:19.028185 ACPI: added table 8/32, length now 68
2372 12:32:19.028817 ACPI: * HPET
2373 12:32:19.031500 ACPI: added table 9/32, length now 72
2374 12:32:19.034686 ACPI: done.
2375 12:32:19.035335 ACPI tables: 38528 bytes.
2376 12:32:19.037938 smbios_write_tables: 76857000
2377 12:32:19.042137 EC returned error result code 3
2378 12:32:19.045607 Couldn't obtain OEM name from CBI
2379 12:32:19.049222 Create SMBIOS type 16
2380 12:32:19.052569 Create SMBIOS type 17
2381 12:32:19.055752 Create SMBIOS type 20
2382 12:32:19.056178 GENERIC: 0.0 (WIFI Device)
2383 12:32:19.058978 SMBIOS tables: 2156 bytes.
2384 12:32:19.062419 Writing table forward entry at 0x00000500
2385 12:32:19.069091 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2386 12:32:19.072155 Writing coreboot table at 0x76891000
2387 12:32:19.078614 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2388 12:32:19.085570 1. 0000000000001000-000000000009ffff: RAM
2389 12:32:19.089001 2. 00000000000a0000-00000000000fffff: RESERVED
2390 12:32:19.092357 3. 0000000000100000-0000000076856fff: RAM
2391 12:32:19.098714 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2392 12:32:19.101984 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2393 12:32:19.108614 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2394 12:32:19.115271 7. 0000000077000000-00000000803fffff: RESERVED
2395 12:32:19.118919 8. 00000000c0000000-00000000cfffffff: RESERVED
2396 12:32:19.125776 9. 00000000f8000000-00000000f9ffffff: RESERVED
2397 12:32:19.128799 10. 00000000fb000000-00000000fb000fff: RESERVED
2398 12:32:19.132261 11. 00000000fc800000-00000000fe7fffff: RESERVED
2399 12:32:19.139114 12. 00000000feb00000-00000000feb7ffff: RESERVED
2400 12:32:19.141844 13. 00000000fec00000-00000000fecfffff: RESERVED
2401 12:32:19.148597 14. 00000000fed40000-00000000fed6ffff: RESERVED
2402 12:32:19.151822 15. 00000000fed80000-00000000fed87fff: RESERVED
2403 12:32:19.158711 16. 00000000fed90000-00000000fed92fff: RESERVED
2404 12:32:19.161775 17. 00000000feda0000-00000000feda1fff: RESERVED
2405 12:32:19.168597 18. 00000000fedc0000-00000000feddffff: RESERVED
2406 12:32:19.171905 19. 0000000100000000-000000027fbfffff: RAM
2407 12:32:19.175403 Passing 4 GPIOs to payload:
2408 12:32:19.178333 NAME | PORT | POLARITY | VALUE
2409 12:32:19.185086 lid | undefined | high | high
2410 12:32:19.188526 power | undefined | high | low
2411 12:32:19.195159 oprom | undefined | high | low
2412 12:32:19.201346 EC in RW | 0x00000151 | high | high
2413 12:32:19.201535 Board ID: 3
2414 12:32:19.205202 FW config: 0x131
2415 12:32:19.208013 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 5521
2416 12:32:19.211606 coreboot table: 1788 bytes.
2417 12:32:19.214621 IMD ROOT 0. 0x76fff000 0x00001000
2418 12:32:19.221409 IMD SMALL 1. 0x76ffe000 0x00001000
2419 12:32:19.225266 FSP MEMORY 2. 0x76afe000 0x00500000
2420 12:32:19.228247 CONSOLE 3. 0x76ade000 0x00020000
2421 12:32:19.231817 RW MCACHE 4. 0x76add000 0x0000043c
2422 12:32:19.235151 RO MCACHE 5. 0x76adc000 0x00000fd8
2423 12:32:19.238313 FMAP 6. 0x76adb000 0x0000064a
2424 12:32:19.241639 TIME STAMP 7. 0x76ada000 0x00000910
2425 12:32:19.245138 VBOOT WORK 8. 0x76ac6000 0x00014000
2426 12:32:19.251824 MEM INFO 9. 0x76ac5000 0x000003b8
2427 12:32:19.255127 ROMSTG STCK10. 0x76ac4000 0x00001000
2428 12:32:19.258392 AFTER CAR 11. 0x76ab8000 0x0000c000
2429 12:32:19.262164 RAMSTAGE 12. 0x76a2e000 0x0008a000
2430 12:32:19.265301 ACPI BERT 13. 0x76a1e000 0x00010000
2431 12:32:19.268362 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2432 12:32:19.271644 REFCODE 15. 0x769ae000 0x0006f000
2433 12:32:19.275001 SMM BACKUP 16. 0x7699e000 0x00010000
2434 12:32:19.282189 IGD OPREGION17. 0x76999000 0x00004203
2435 12:32:19.285597 RAMOOPS 18. 0x76899000 0x00100000
2436 12:32:19.288354 COREBOOT 19. 0x76891000 0x00008000
2437 12:32:19.291574 ACPI 20. 0x7686d000 0x00024000
2438 12:32:19.294800 TPM2 TCGLOG21. 0x7685d000 0x00010000
2439 12:32:19.298133 PMC CRASHLOG22. 0x7685c000 0x00000c00
2440 12:32:19.301901 CPU CRASHLOG23. 0x76858000 0x00003480
2441 12:32:19.305119 SMBIOS 24. 0x76857000 0x00001000
2442 12:32:19.308172 IMD small region:
2443 12:32:19.311791 IMD ROOT 0. 0x76ffec00 0x00000400
2444 12:32:19.314755 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2445 12:32:19.321475 VPD 2. 0x76ffeb60 0x0000006c
2446 12:32:19.324689 POWER STATE 3. 0x76ffeb00 0x00000044
2447 12:32:19.328534 ROMSTAGE 4. 0x76ffeae0 0x00000004
2448 12:32:19.331909 ACPI GNVS 5. 0x76ffea80 0x00000048
2449 12:32:19.335284 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2450 12:32:19.341751 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2451 12:32:19.345283 MTRR: Physical address space:
2452 12:32:19.351843 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2453 12:32:19.358070 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2454 12:32:19.364589 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2455 12:32:19.367860 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2456 12:32:19.374333 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2457 12:32:19.380973 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2458 12:32:19.387519 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2459 12:32:19.390899 MTRR: Fixed MSR 0x250 0x0606060606060606
2460 12:32:19.397509 MTRR: Fixed MSR 0x258 0x0606060606060606
2461 12:32:19.400762 MTRR: Fixed MSR 0x259 0x0000000000000000
2462 12:32:19.404097 MTRR: Fixed MSR 0x268 0x0606060606060606
2463 12:32:19.407519 MTRR: Fixed MSR 0x269 0x0606060606060606
2464 12:32:19.414539 MTRR: Fixed MSR 0x26a 0x0606060606060606
2465 12:32:19.417751 MTRR: Fixed MSR 0x26b 0x0606060606060606
2466 12:32:19.421021 MTRR: Fixed MSR 0x26c 0x0606060606060606
2467 12:32:19.424378 MTRR: Fixed MSR 0x26d 0x0606060606060606
2468 12:32:19.427677 MTRR: Fixed MSR 0x26e 0x0606060606060606
2469 12:32:19.434087 MTRR: Fixed MSR 0x26f 0x0606060606060606
2470 12:32:19.437237 call enable_fixed_mtrr()
2471 12:32:19.441049 CPU physical address size: 39 bits
2472 12:32:19.444189 MTRR: default type WB/UC MTRR counts: 6/6.
2473 12:32:19.447606 MTRR: UC selected as default type.
2474 12:32:19.454488 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2475 12:32:19.461012 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2476 12:32:19.467232 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2477 12:32:19.474249 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2478 12:32:19.480701 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2479 12:32:19.487309 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2480 12:32:19.490775 MTRR: Fixed MSR 0x250 0x0606060606060606
2481 12:32:19.497096 MTRR: Fixed MSR 0x258 0x0606060606060606
2482 12:32:19.500331 MTRR: Fixed MSR 0x259 0x0000000000000000
2483 12:32:19.503813 MTRR: Fixed MSR 0x268 0x0606060606060606
2484 12:32:19.507224 MTRR: Fixed MSR 0x269 0x0606060606060606
2485 12:32:19.510507 MTRR: Fixed MSR 0x26a 0x0606060606060606
2486 12:32:19.517169 MTRR: Fixed MSR 0x26b 0x0606060606060606
2487 12:32:19.520337 MTRR: Fixed MSR 0x26c 0x0606060606060606
2488 12:32:19.523699 MTRR: Fixed MSR 0x26d 0x0606060606060606
2489 12:32:19.526894 MTRR: Fixed MSR 0x26e 0x0606060606060606
2490 12:32:19.534160 MTRR: Fixed MSR 0x26f 0x0606060606060606
2491 12:32:19.536726 MTRR: Fixed MSR 0x250 0x0606060606060606
2492 12:32:19.540244 MTRR: Fixed MSR 0x250 0x0606060606060606
2493 12:32:19.543430 MTRR: Fixed MSR 0x258 0x0606060606060606
2494 12:32:19.550135 MTRR: Fixed MSR 0x259 0x0000000000000000
2495 12:32:19.553865 MTRR: Fixed MSR 0x268 0x0606060606060606
2496 12:32:19.557010 MTRR: Fixed MSR 0x269 0x0606060606060606
2497 12:32:19.560108 MTRR: Fixed MSR 0x26a 0x0606060606060606
2498 12:32:19.566947 MTRR: Fixed MSR 0x26b 0x0606060606060606
2499 12:32:19.570408 MTRR: Fixed MSR 0x26c 0x0606060606060606
2500 12:32:19.573711 MTRR: Fixed MSR 0x26d 0x0606060606060606
2501 12:32:19.577053 MTRR: Fixed MSR 0x26e 0x0606060606060606
2502 12:32:19.580349 MTRR: Fixed MSR 0x26f 0x0606060606060606
2503 12:32:19.586441 MTRR: Fixed MSR 0x250 0x0606060606060606
2504 12:32:19.590123 call enable_fixed_mtrr()
2505 12:32:19.593367 MTRR: Fixed MSR 0x258 0x0606060606060606
2506 12:32:19.596785 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 12:32:19.599975 MTRR: Fixed MSR 0x259 0x0000000000000000
2508 12:32:19.603435 MTRR: Fixed MSR 0x268 0x0606060606060606
2509 12:32:19.609796 MTRR: Fixed MSR 0x269 0x0606060606060606
2510 12:32:19.609873 call enable_fixed_mtrr()
2511 12:32:19.616523 MTRR: Fixed MSR 0x26a 0x0606060606060606
2512 12:32:19.619807 MTRR: Fixed MSR 0x26b 0x0606060606060606
2513 12:32:19.623080 MTRR: Fixed MSR 0x26c 0x0606060606060606
2514 12:32:19.626300 MTRR: Fixed MSR 0x26d 0x0606060606060606
2515 12:32:19.632905 MTRR: Fixed MSR 0x26e 0x0606060606060606
2516 12:32:19.636350 MTRR: Fixed MSR 0x26f 0x0606060606060606
2517 12:32:19.639650 MTRR: Fixed MSR 0x250 0x0606060606060606
2518 12:32:19.642766 call enable_fixed_mtrr()
2519 12:32:19.646064 MTRR: Fixed MSR 0x250 0x0606060606060606
2520 12:32:19.649514 CPU physical address size: 39 bits
2521 12:32:19.652846 CPU physical address size: 39 bits
2522 12:32:19.659413 MTRR: Fixed MSR 0x258 0x0606060606060606
2523 12:32:19.662648 MTRR: Fixed MSR 0x259 0x0000000000000000
2524 12:32:19.665799 MTRR: Fixed MSR 0x268 0x0606060606060606
2525 12:32:19.669666 MTRR: Fixed MSR 0x269 0x0606060606060606
2526 12:32:19.672584 MTRR: Fixed MSR 0x26a 0x0606060606060606
2527 12:32:19.679481 MTRR: Fixed MSR 0x26b 0x0606060606060606
2528 12:32:19.682360 MTRR: Fixed MSR 0x26c 0x0606060606060606
2529 12:32:19.685784 MTRR: Fixed MSR 0x26d 0x0606060606060606
2530 12:32:19.689052 MTRR: Fixed MSR 0x26e 0x0606060606060606
2531 12:32:19.695666 MTRR: Fixed MSR 0x26f 0x0606060606060606
2532 12:32:19.699680 MTRR: Fixed MSR 0x259 0x0000000000000000
2533 12:32:19.702768 call enable_fixed_mtrr()
2534 12:32:19.705684 MTRR: Fixed MSR 0x268 0x0606060606060606
2535 12:32:19.708982 MTRR: Fixed MSR 0x269 0x0606060606060606
2536 12:32:19.712713 MTRR: Fixed MSR 0x250 0x0606060606060606
2537 12:32:19.715947 CPU physical address size: 39 bits
2538 12:32:19.722394 MTRR: Fixed MSR 0x26a 0x0606060606060606
2539 12:32:19.725609 CPU physical address size: 39 bits
2540 12:32:19.728935 MTRR: Fixed MSR 0x258 0x0606060606060606
2541 12:32:19.732330 MTRR: Fixed MSR 0x26b 0x0606060606060606
2542 12:32:19.735662 MTRR: Fixed MSR 0x259 0x0000000000000000
2543 12:32:19.742414 MTRR: Fixed MSR 0x268 0x0606060606060606
2544 12:32:19.745568 MTRR: Fixed MSR 0x269 0x0606060606060606
2545 12:32:19.749382 MTRR: Fixed MSR 0x26c 0x0606060606060606
2546 12:32:19.752589 MTRR: Fixed MSR 0x26d 0x0606060606060606
2547 12:32:19.759135 MTRR: Fixed MSR 0x26e 0x0606060606060606
2548 12:32:19.762480 MTRR: Fixed MSR 0x26f 0x0606060606060606
2549 12:32:19.765772 MTRR: Fixed MSR 0x258 0x0606060606060606
2550 12:32:19.769114 call enable_fixed_mtrr()
2551 12:32:19.772550 MTRR: Fixed MSR 0x26a 0x0606060606060606
2552 12:32:19.775915 CPU physical address size: 39 bits
2553 12:32:19.778900 MTRR: Fixed MSR 0x26b 0x0606060606060606
2554 12:32:19.785790 MTRR: Fixed MSR 0x259 0x0000000000000000
2555 12:32:19.788986 MTRR: Fixed MSR 0x26c 0x0606060606060606
2556 12:32:19.792295 MTRR: Fixed MSR 0x26d 0x0606060606060606
2557 12:32:19.795471 MTRR: Fixed MSR 0x26e 0x0606060606060606
2558 12:32:19.802144 MTRR: Fixed MSR 0x26f 0x0606060606060606
2559 12:32:19.805546 MTRR: Fixed MSR 0x268 0x0606060606060606
2560 12:32:19.808879 call enable_fixed_mtrr()
2561 12:32:19.812794 MTRR: Fixed MSR 0x269 0x0606060606060606
2562 12:32:19.815673 CPU physical address size: 39 bits
2563 12:32:19.819056 MTRR: Fixed MSR 0x26a 0x0606060606060606
2564 12:32:19.822314 MTRR: Fixed MSR 0x26b 0x0606060606060606
2565 12:32:19.829072 MTRR: Fixed MSR 0x26c 0x0606060606060606
2566 12:32:19.832312 MTRR: Fixed MSR 0x26d 0x0606060606060606
2567 12:32:19.835712 MTRR: Fixed MSR 0x26e 0x0606060606060606
2568 12:32:19.839087 MTRR: Fixed MSR 0x26f 0x0606060606060606
2569 12:32:19.842695 call enable_fixed_mtrr()
2570 12:32:19.846214 CPU physical address size: 39 bits
2571 12:32:19.850651
2572 12:32:19.851082 MTRR check
2573 12:32:19.853611 Fixed MTRRs : Enabled
2574 12:32:19.854044 Variable MTRRs: Enabled
2575 12:32:19.854383
2576 12:32:19.860375 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2577 12:32:19.863632 Checking cr50 for pending updates
2578 12:32:19.876363 Reading cr50 TPM mode
2579 12:32:19.891511 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2580 12:32:19.901500 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2581 12:32:19.904960 Checking segment from ROM address 0xf96cbe6c
2582 12:32:19.908429 Checking segment from ROM address 0xf96cbe88
2583 12:32:19.914493 Loading segment from ROM address 0xf96cbe6c
2584 12:32:19.914972 code (compression=1)
2585 12:32:19.924592 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2586 12:32:19.931256 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2587 12:32:19.934680 using LZMA
2588 12:32:19.956857 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2589 12:32:19.963330 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2590 12:32:19.971476 Loading segment from ROM address 0xf96cbe88
2591 12:32:19.974655 Entry Point 0x30000000
2592 12:32:19.975084 Loaded segments
2593 12:32:19.981477 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2594 12:32:19.987874 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2595 12:32:19.991405 Finalizing chipset.
2596 12:32:19.991834 apm_control: Finalizing SMM.
2597 12:32:19.994834 APMC done.
2598 12:32:19.997856 HECI: CSE device 16.1 is disabled
2599 12:32:20.001357 HECI: CSE device 16.2 is disabled
2600 12:32:20.004686 HECI: CSE device 16.3 is disabled
2601 12:32:20.007915 HECI: CSE device 16.4 is disabled
2602 12:32:20.011568 HECI: CSE device 16.5 is disabled
2603 12:32:20.014702 HECI: Sending End-of-Post
2604 12:32:20.022573 CSE: EOP requested action: continue boot
2605 12:32:20.026163 CSE EOP successful, continuing boot
2606 12:32:20.032821 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2607 12:32:20.036123 mp_park_aps done after 0 msecs.
2608 12:32:20.039722 Jumping to boot code at 0x30000000(0x76891000)
2609 12:32:20.049240 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2610 12:32:20.053219
2611 12:32:20.053539
2612 12:32:20.053807
2613 12:32:20.056399 Starting depthcharge on Volmar...
2614 12:32:20.056585
2615 12:32:20.057435 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2616 12:32:20.057650 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2617 12:32:20.057827 Setting prompt string to ['brya:']
2618 12:32:20.057992 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:40)
2619 12:32:20.063378 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2620 12:32:20.063539
2621 12:32:20.069934 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2622 12:32:20.070149
2623 12:32:20.076472 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2624 12:32:20.076616
2625 12:32:20.079767 configure_storage: Failed to remap 1C:2
2626 12:32:20.079901
2627 12:32:20.083259 Wipe memory regions:
2628 12:32:20.083467
2629 12:32:20.086587 [0x00000000001000, 0x000000000a0000)
2630 12:32:20.086746
2631 12:32:20.089911 [0x00000000100000, 0x00000030000000)
2632 12:32:20.194646
2633 12:32:20.197625 [0x00000032668e60, 0x00000076857000)
2634 12:32:20.345069
2635 12:32:20.348339 [0x00000100000000, 0x0000027fc00000)
2636 12:32:21.168538
2637 12:32:21.171994 ec_init: CrosEC protocol v3 supported (256, 256)
2638 12:32:21.783582
2639 12:32:21.784309 R8152: Initializing
2640 12:32:21.784777
2641 12:32:21.786770 Version 9 (ocp_data = 6010)
2642 12:32:21.787338
2643 12:32:21.790184 R8152: Done initializing
2644 12:32:21.790745
2645 12:32:21.793393 Adding net device
2646 12:32:22.095009
2647 12:32:22.098393 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2648 12:32:22.098957
2649 12:32:22.099326
2650 12:32:22.099741
2651 12:32:22.100551 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2653 12:32:22.201572 brya: tftpboot 192.168.201.1 12269827/tftp-deploy-ghuz9_yg/kernel/bzImage 12269827/tftp-deploy-ghuz9_yg/kernel/cmdline 12269827/tftp-deploy-ghuz9_yg/ramdisk/ramdisk.cpio.gz
2654 12:32:22.201739 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2655 12:32:22.201827 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2656 12:32:22.205606 tftpboot 192.168.201.1 12269827/tftp-deploy-ghuz9_yg/kernel/bzIploy-ghuz9_yg/kernel/cmdline 12269827/tftp-deploy-ghuz9_yg/ramdisk/ramdisk.cpio.gz
2657 12:32:22.205695
2658 12:32:22.205760 Waiting for link
2659 12:32:22.410225
2660 12:32:22.410364 done.
2661 12:32:22.410433
2662 12:32:22.410495 MAC: 00:e0:4c:68:02:be
2663 12:32:22.410555
2664 12:32:22.413117 Sending DHCP discover... done.
2665 12:32:22.413190
2666 12:32:22.416439 Waiting for reply... done.
2667 12:32:22.416510
2668 12:32:22.419786 Sending DHCP request... done.
2669 12:32:22.419857
2670 12:32:22.426326 Waiting for reply... done.
2671 12:32:22.426409
2672 12:32:22.426475 My ip is 192.168.201.17
2673 12:32:22.426536
2674 12:32:22.429755 The DHCP server ip is 192.168.201.1
2675 12:32:22.429840
2676 12:32:22.436436 TFTP server IP predefined by user: 192.168.201.1
2677 12:32:22.436525
2678 12:32:22.442862 Bootfile predefined by user: 12269827/tftp-deploy-ghuz9_yg/kernel/bzImage
2679 12:32:22.442958
2680 12:32:22.446222 Sending tftp read request... done.
2681 12:32:22.446333
2682 12:32:22.449644 Waiting for the transfer...
2683 12:32:22.449747
2684 12:32:22.746723 00000000 ################################################################
2685 12:32:22.746900
2686 12:32:23.015925 00080000 ################################################################
2687 12:32:23.016094
2688 12:32:23.282513 00100000 ################################################################
2689 12:32:23.282680
2690 12:32:23.531322 00180000 ################################################################
2691 12:32:23.531496
2692 12:32:23.779949 00200000 ################################################################
2693 12:32:23.780082
2694 12:32:24.039901 00280000 ################################################################
2695 12:32:24.040036
2696 12:32:24.305734 00300000 ################################################################
2697 12:32:24.305887
2698 12:32:24.573605 00380000 ################################################################
2699 12:32:24.573760
2700 12:32:24.868330 00400000 ################################################################
2701 12:32:24.868532
2702 12:32:25.144966 00480000 ################################################################
2703 12:32:25.145122
2704 12:32:25.393864 00500000 ################################################################
2705 12:32:25.394010
2706 12:32:25.650023 00580000 ################################################################
2707 12:32:25.650165
2708 12:32:25.944209 00600000 ################################################################
2709 12:32:25.944361
2710 12:32:26.198824 00680000 ################################################################
2711 12:32:26.198973
2712 12:32:26.457696 00700000 ################################################################
2713 12:32:26.457844
2714 12:32:26.706231 00780000 ################################################################
2715 12:32:26.706373
2716 12:32:26.960377 00800000 ################################################################
2717 12:32:26.960526
2718 12:32:27.281763 00880000 ################################################################
2719 12:32:27.282290
2720 12:32:27.648585 00900000 ################################################################
2721 12:32:27.648725
2722 12:32:27.927766 00980000 ################################################################
2723 12:32:27.927913
2724 12:32:28.199092 00a00000 ################################################################
2725 12:32:28.199241
2726 12:32:28.502200 00a80000 ################################################################
2727 12:32:28.502371
2728 12:32:28.789185 00b00000 ################################################################
2729 12:32:28.789355
2730 12:32:29.071795 00b80000 ################################################################
2731 12:32:29.071962
2732 12:32:29.425574 00c00000 ################################################################
2733 12:32:29.426130
2734 12:32:29.705969 00c80000 ################################################################
2735 12:32:29.706114
2736 12:32:29.969756 00d00000 ############################################################# done.
2737 12:32:29.969899
2738 12:32:29.973338 The bootfile was 14129248 bytes long.
2739 12:32:29.973514
2740 12:32:29.976416 Sending tftp read request... done.
2741 12:32:29.976549
2742 12:32:29.979304 Waiting for the transfer...
2743 12:32:29.979413
2744 12:32:30.301924 00000000 ################################################################
2745 12:32:30.302073
2746 12:32:30.596768 00080000 ################################################################
2747 12:32:30.596921
2748 12:32:30.874308 00100000 ################################################################
2749 12:32:30.874450
2750 12:32:31.157714 00180000 ################################################################
2751 12:32:31.157863
2752 12:32:31.451850 00200000 ################################################################
2753 12:32:31.452004
2754 12:32:31.730685 00280000 ################################################################
2755 12:32:31.730825
2756 12:32:31.988097 00300000 ################################################################
2757 12:32:31.988242
2758 12:32:32.252991 00380000 ################################################################
2759 12:32:32.253134
2760 12:32:32.539979 00400000 ################################################################
2761 12:32:32.540129
2762 12:32:32.831809 00480000 ################################################################
2763 12:32:32.831954
2764 12:32:33.121024 00500000 ################################################################
2765 12:32:33.121172
2766 12:32:33.418141 00580000 ################################################################
2767 12:32:33.418291
2768 12:32:33.745561 00600000 ################################################################
2769 12:32:33.746137
2770 12:32:34.179699 00680000 ################################################################
2771 12:32:34.180315
2772 12:32:34.550806 00700000 ################################################################
2773 12:32:34.550950
2774 12:32:34.832128 00780000 ################################################################
2775 12:32:34.832278
2776 12:32:35.117235 00800000 ################################################################
2777 12:32:35.117374
2778 12:32:35.309371 00880000 ############################################## done.
2779 12:32:35.309511
2780 12:32:35.312849 Sending tftp read request... done.
2781 12:32:35.313018
2782 12:32:35.316099 Waiting for the transfer...
2783 12:32:35.316281
2784 12:32:35.316363 00000000 # done.
2785 12:32:35.316437
2786 12:32:35.325887 Command line loaded dynamically from TFTP file: 12269827/tftp-deploy-ghuz9_yg/kernel/cmdline
2787 12:32:35.326004
2788 12:32:35.342766 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2789 12:32:35.349958
2790 12:32:35.352817 Shutting down all USB controllers.
2791 12:32:35.353023
2792 12:32:35.353181 Removing current net device
2793 12:32:35.353328
2794 12:32:35.356517 Finalizing coreboot
2795 12:32:35.356857
2796 12:32:35.363282 Exiting depthcharge with code 4 at timestamp: 25551089
2797 12:32:35.363715
2798 12:32:35.363966
2799 12:32:35.364184 Starting kernel ...
2800 12:32:35.364392
2801 12:32:35.364597
2802 12:32:35.365562 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2803 12:32:35.365901 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2804 12:32:35.366160 Setting prompt string to ['Linux version [0-9]']
2805 12:32:35.366473 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2806 12:32:35.366779 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2808 12:37:00.366869 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2810 12:37:00.368034 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2812 12:37:00.368886 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2815 12:37:00.370496 end: 2 depthcharge-action (duration 00:05:00) [common]
2817 12:37:00.371901 Cleaning after the job
2818 12:37:00.372372 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12269827/tftp-deploy-ghuz9_yg/ramdisk
2819 12:37:00.379196 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12269827/tftp-deploy-ghuz9_yg/kernel
2820 12:37:00.389718 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12269827/tftp-deploy-ghuz9_yg/modules
2821 12:37:00.393928 start: 5.1 power-off (timeout 00:00:30) [common]
2822 12:37:00.394752 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-6' '--port=1' '--command=off'
2823 12:37:00.497104 >> Command sent successfully.
2824 12:37:00.501548 Returned 0 in 0 seconds
2825 12:37:00.602526 end: 5.1 power-off (duration 00:00:00) [common]
2827 12:37:00.604170 start: 5.2 read-feedback (timeout 00:10:00) [common]
2828 12:37:00.605470 Listened to connection for namespace 'common' for up to 1s
2830 12:37:00.606864 Listened to connection for namespace 'common' for up to 1s
2831 12:37:01.606118 Finalising connection for namespace 'common'
2832 12:37:01.606795 Disconnecting from shell: Finalise
2833 12:37:01.607204
2834 12:37:01.708343 end: 5.2 read-feedback (duration 00:00:01) [common]
2835 12:37:01.708981 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12269827
2836 12:37:01.762634 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12269827
2837 12:37:01.762832 JobError: Your job cannot terminate cleanly.