Boot log: acer-cbv514-1h-34uz-brya
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 10:48:59.489233 lava-dispatcher, installed at version: 2024.01
2 10:48:59.489427 start: 0 validate
3 10:48:59.489567 Start time: 2024-02-23 10:48:59.489557+00:00 (UTC)
4 10:48:59.489694 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:48:59.489825 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 10:48:59.754190 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:48:59.755398 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.209-cip44-424-g38943e302f8c8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:49:00.019798 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:49:00.020497 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.209-cip44-424-g38943e302f8c8%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
10 10:49:16.203872 validate duration: 16.71
12 10:49:16.205200 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 10:49:16.205792 start: 1.1 download-retry (timeout 00:10:00) [common]
14 10:49:16.206350 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 10:49:16.206992 Not decompressing ramdisk as can be used compressed.
16 10:49:16.207429 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 10:49:16.207762 saving as /var/lib/lava/dispatcher/tmp/12838025/tftp-deploy-q3k0t1hv/ramdisk/rootfs.cpio.gz
18 10:49:16.208137 total size: 8418130 (8 MB)
19 10:49:18.139534 progress 0 % (0 MB)
20 10:49:18.158631 progress 5 % (0 MB)
21 10:49:18.167793 progress 10 % (0 MB)
22 10:49:18.173862 progress 15 % (1 MB)
23 10:49:18.179146 progress 20 % (1 MB)
24 10:49:18.183367 progress 25 % (2 MB)
25 10:49:18.187048 progress 30 % (2 MB)
26 10:49:18.190195 progress 35 % (2 MB)
27 10:49:18.193203 progress 40 % (3 MB)
28 10:49:18.196081 progress 45 % (3 MB)
29 10:49:18.198961 progress 50 % (4 MB)
30 10:49:18.201541 progress 55 % (4 MB)
31 10:49:18.203953 progress 60 % (4 MB)
32 10:49:18.206182 progress 65 % (5 MB)
33 10:49:18.208471 progress 70 % (5 MB)
34 10:49:18.210816 progress 75 % (6 MB)
35 10:49:18.213136 progress 80 % (6 MB)
36 10:49:18.215424 progress 85 % (6 MB)
37 10:49:18.217834 progress 90 % (7 MB)
38 10:49:18.220124 progress 95 % (7 MB)
39 10:49:18.222307 progress 100 % (8 MB)
40 10:49:18.222557 8 MB downloaded in 2.01 s (3.99 MB/s)
41 10:49:18.222721 end: 1.1.1 http-download (duration 00:00:02) [common]
43 10:49:18.222972 end: 1.1 download-retry (duration 00:00:02) [common]
44 10:49:18.223064 start: 1.2 download-retry (timeout 00:09:58) [common]
45 10:49:18.223148 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 10:49:18.223301 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.209-cip44-424-g38943e302f8c8/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/kernel/bzImage
47 10:49:18.223374 saving as /var/lib/lava/dispatcher/tmp/12838025/tftp-deploy-q3k0t1hv/kernel/bzImage
48 10:49:18.223455 total size: 18058304 (17 MB)
49 10:49:18.223518 No compression specified
50 10:49:18.494604 progress 0 % (0 MB)
51 10:49:18.520707 progress 5 % (0 MB)
52 10:49:18.532922 progress 10 % (1 MB)
53 10:49:18.540942 progress 15 % (2 MB)
54 10:49:18.547652 progress 20 % (3 MB)
55 10:49:18.553499 progress 25 % (4 MB)
56 10:49:18.558687 progress 30 % (5 MB)
57 10:49:18.563533 progress 35 % (6 MB)
58 10:49:18.568625 progress 40 % (6 MB)
59 10:49:18.573582 progress 45 % (7 MB)
60 10:49:18.578881 progress 50 % (8 MB)
61 10:49:18.583850 progress 55 % (9 MB)
62 10:49:18.588657 progress 60 % (10 MB)
63 10:49:18.593705 progress 65 % (11 MB)
64 10:49:18.598711 progress 70 % (12 MB)
65 10:49:18.603804 progress 75 % (12 MB)
66 10:49:18.608563 progress 80 % (13 MB)
67 10:49:18.613498 progress 85 % (14 MB)
68 10:49:18.618204 progress 90 % (15 MB)
69 10:49:18.623334 progress 95 % (16 MB)
70 10:49:18.628369 progress 100 % (17 MB)
71 10:49:18.628508 17 MB downloaded in 0.41 s (42.52 MB/s)
72 10:49:18.628659 end: 1.2.1 http-download (duration 00:00:00) [common]
74 10:49:18.628904 end: 1.2 download-retry (duration 00:00:00) [common]
75 10:49:18.629032 start: 1.3 download-retry (timeout 00:09:58) [common]
76 10:49:18.629133 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 10:49:18.629291 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.209-cip44-424-g38943e302f8c8/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/modules.tar.xz
78 10:49:18.629367 saving as /var/lib/lava/dispatcher/tmp/12838025/tftp-deploy-q3k0t1hv/modules/modules.tar
79 10:49:18.629429 total size: 3313344 (3 MB)
80 10:49:18.629503 Using unxz to decompress xz
81 10:49:18.633408 progress 0 % (0 MB)
82 10:49:18.639344 progress 5 % (0 MB)
83 10:49:18.649396 progress 10 % (0 MB)
84 10:49:18.659131 progress 15 % (0 MB)
85 10:49:18.669368 progress 20 % (0 MB)
86 10:49:18.679271 progress 25 % (0 MB)
87 10:49:18.689161 progress 30 % (0 MB)
88 10:49:18.698789 progress 35 % (1 MB)
89 10:49:18.708724 progress 40 % (1 MB)
90 10:49:18.718763 progress 45 % (1 MB)
91 10:49:18.728510 progress 50 % (1 MB)
92 10:49:18.738813 progress 55 % (1 MB)
93 10:49:18.747863 progress 60 % (1 MB)
94 10:49:18.757125 progress 65 % (2 MB)
95 10:49:18.769304 progress 70 % (2 MB)
96 10:49:18.779339 progress 75 % (2 MB)
97 10:49:18.787521 progress 80 % (2 MB)
98 10:49:18.797233 progress 85 % (2 MB)
99 10:49:18.814489 progress 90 % (2 MB)
100 10:49:18.824211 progress 95 % (3 MB)
101 10:49:18.835052 progress 100 % (3 MB)
102 10:49:18.839911 3 MB downloaded in 0.21 s (15.01 MB/s)
103 10:49:18.840154 end: 1.3.1 http-download (duration 00:00:00) [common]
105 10:49:18.840438 end: 1.3 download-retry (duration 00:00:00) [common]
106 10:49:18.840551 start: 1.4 prepare-tftp-overlay (timeout 00:09:57) [common]
107 10:49:18.840647 start: 1.4.1 extract-nfsrootfs (timeout 00:09:57) [common]
108 10:49:18.840729 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
109 10:49:18.840825 start: 1.4.2 lava-overlay (timeout 00:09:57) [common]
110 10:49:18.841101 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33
111 10:49:18.841241 makedir: /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin
112 10:49:18.841357 makedir: /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/tests
113 10:49:18.841460 makedir: /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/results
114 10:49:18.841586 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-add-keys
115 10:49:18.841737 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-add-sources
116 10:49:18.841887 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-background-process-start
117 10:49:18.842028 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-background-process-stop
118 10:49:18.842157 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-common-functions
119 10:49:18.842286 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-echo-ipv4
120 10:49:18.842427 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-install-packages
121 10:49:18.842562 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-installed-packages
122 10:49:18.842689 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-os-build
123 10:49:18.842833 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-probe-channel
124 10:49:18.842960 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-probe-ip
125 10:49:18.843095 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-target-ip
126 10:49:18.843221 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-target-mac
127 10:49:18.843360 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-target-storage
128 10:49:18.843492 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-test-case
129 10:49:18.843635 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-test-event
130 10:49:18.843772 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-test-feedback
131 10:49:18.843899 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-test-raise
132 10:49:18.844026 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-test-reference
133 10:49:18.844166 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-test-runner
134 10:49:18.844295 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-test-set
135 10:49:18.844430 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-test-shell
136 10:49:18.844566 Updating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-install-packages (oe)
137 10:49:18.844737 Updating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/bin/lava-installed-packages (oe)
138 10:49:18.844871 Creating /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/environment
139 10:49:18.844977 LAVA metadata
140 10:49:18.845103 - LAVA_JOB_ID=12838025
141 10:49:18.845170 - LAVA_DISPATCHER_IP=192.168.201.1
142 10:49:18.845276 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:57) [common]
143 10:49:18.845352 skipped lava-vland-overlay
144 10:49:18.845433 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
145 10:49:18.845518 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:57) [common]
146 10:49:18.845598 skipped lava-multinode-overlay
147 10:49:18.845674 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
148 10:49:18.845757 start: 1.4.2.3 test-definition (timeout 00:09:57) [common]
149 10:49:18.845841 Loading test definitions
150 10:49:18.845943 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:57) [common]
151 10:49:18.846032 Using /lava-12838025 at stage 0
152 10:49:18.846366 uuid=12838025_1.4.2.3.1 testdef=None
153 10:49:18.846455 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
154 10:49:18.846541 start: 1.4.2.3.2 test-overlay (timeout 00:09:57) [common]
155 10:49:18.847114 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
157 10:49:18.847355 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:57) [common]
158 10:49:18.848047 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
160 10:49:18.848452 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:57) [common]
161 10:49:18.849456 runner path: /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/0/tests/0_dmesg test_uuid 12838025_1.4.2.3.1
162 10:49:18.849642 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
164 10:49:18.849879 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:57) [common]
165 10:49:18.849953 Using /lava-12838025 at stage 1
166 10:49:18.850272 uuid=12838025_1.4.2.3.5 testdef=None
167 10:49:18.850361 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
168 10:49:18.850454 start: 1.4.2.3.6 test-overlay (timeout 00:09:57) [common]
169 10:49:18.850965 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
171 10:49:18.851191 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:57) [common]
172 10:49:18.851862 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
174 10:49:18.852102 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:57) [common]
175 10:49:18.852763 runner path: /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/1/tests/1_bootrr test_uuid 12838025_1.4.2.3.5
176 10:49:18.852918 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
178 10:49:18.853181 Creating lava-test-runner.conf files
179 10:49:18.853248 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/0 for stage 0
180 10:49:18.853339 - 0_dmesg
181 10:49:18.853425 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12838025/lava-overlay-x1fzrk33/lava-12838025/1 for stage 1
182 10:49:18.853526 - 1_bootrr
183 10:49:18.853621 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
184 10:49:18.853721 start: 1.4.2.4 compress-overlay (timeout 00:09:57) [common]
185 10:49:18.862229 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
186 10:49:18.862333 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:57) [common]
187 10:49:18.862429 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
188 10:49:18.862514 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
189 10:49:18.862617 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 10:49:19.115392 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
191 10:49:19.115773 start: 1.4.4 extract-modules (timeout 00:09:57) [common]
192 10:49:19.115893 extracting modules file /var/lib/lava/dispatcher/tmp/12838025/tftp-deploy-q3k0t1hv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12838025/extract-overlay-ramdisk-6pazbha_/ramdisk
193 10:49:19.202635 end: 1.4.4 extract-modules (duration 00:00:00) [common]
194 10:49:19.202812 start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
195 10:49:19.202913 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12838025/compress-overlay-2b9o75um/overlay-1.4.2.4.tar.gz to ramdisk
196 10:49:19.202987 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12838025/compress-overlay-2b9o75um/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12838025/extract-overlay-ramdisk-6pazbha_/ramdisk
197 10:49:19.211596 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
198 10:49:19.211720 start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
199 10:49:19.211816 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
200 10:49:19.211921 start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
201 10:49:19.212002 Building ramdisk /var/lib/lava/dispatcher/tmp/12838025/extract-overlay-ramdisk-6pazbha_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12838025/extract-overlay-ramdisk-6pazbha_/ramdisk
202 10:49:19.459899 >> 91392 blocks
203 10:49:20.908724 rename /var/lib/lava/dispatcher/tmp/12838025/extract-overlay-ramdisk-6pazbha_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12838025/tftp-deploy-q3k0t1hv/ramdisk/ramdisk.cpio.gz
204 10:49:20.909229 end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
205 10:49:20.909356 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
206 10:49:20.909452 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
207 10:49:20.909549 No mkimage arch provided, not using FIT.
208 10:49:20.909645 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
209 10:49:20.909730 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
210 10:49:20.909845 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
211 10:49:20.910041 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
212 10:49:20.910458 No LXC device requested
213 10:49:20.910723 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
214 10:49:20.910904 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
215 10:49:20.911038 end: 1.6 deploy-device-env (duration 00:00:00) [common]
216 10:49:20.911150 Checking files for TFTP limit of 4294967296 bytes.
217 10:49:20.911687 end: 1 tftp-deploy (duration 00:00:05) [common]
218 10:49:20.911836 start: 2 depthcharge-action (timeout 00:05:00) [common]
219 10:49:20.911968 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
220 10:49:20.912154 substitutions:
221 10:49:20.912257 - {DTB}: None
222 10:49:20.912379 - {INITRD}: 12838025/tftp-deploy-q3k0t1hv/ramdisk/ramdisk.cpio.gz
223 10:49:20.912496 - {KERNEL}: 12838025/tftp-deploy-q3k0t1hv/kernel/bzImage
224 10:49:20.912618 - {LAVA_MAC}: None
225 10:49:20.912706 - {PRESEED_CONFIG}: None
226 10:49:20.912799 - {PRESEED_LOCAL}: None
227 10:49:20.912887 - {RAMDISK}: 12838025/tftp-deploy-q3k0t1hv/ramdisk/ramdisk.cpio.gz
228 10:49:20.912981 - {ROOT_PART}: None
229 10:49:20.913071 - {ROOT}: None
230 10:49:20.913128 - {SERVER_IP}: 192.168.201.1
231 10:49:20.913183 - {TEE}: None
232 10:49:20.913238 Parsed boot commands:
233 10:49:20.913300 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
234 10:49:20.913476 Parsed boot commands: tftpboot 192.168.201.1 12838025/tftp-deploy-q3k0t1hv/kernel/bzImage 12838025/tftp-deploy-q3k0t1hv/kernel/cmdline 12838025/tftp-deploy-q3k0t1hv/ramdisk/ramdisk.cpio.gz
235 10:49:20.913575 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
236 10:49:20.913659 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
237 10:49:20.913750 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
238 10:49:20.913843 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
239 10:49:20.913914 Not connected, no need to disconnect.
240 10:49:20.913990 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
241 10:49:20.914086 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
242 10:49:20.914156 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-10'
243 10:49:20.917774 Setting prompt string to ['lava-test: # ']
244 10:49:20.918143 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
245 10:49:20.918249 end: 2.2.1 reset-connection (duration 00:00:00) [common]
246 10:49:20.918353 start: 2.2.2 reset-device (timeout 00:05:00) [common]
247 10:49:20.918442 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
248 10:49:20.918650 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=reboot'
249 10:49:26.067755 >> Command sent successfully.
250 10:49:26.079293 Returned 0 in 5 seconds
251 10:49:26.180629 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
253 10:49:26.182493 end: 2.2.2 reset-device (duration 00:00:05) [common]
254 10:49:26.183384 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
255 10:49:26.184273 Setting prompt string to 'Starting depthcharge on Volmar...'
256 10:49:26.185160 Changing prompt to 'Starting depthcharge on Volmar...'
257 10:49:26.185695 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
258 10:49:26.187151 [Enter `^Ec?' for help]
259 10:49:27.548954
260 10:49:27.549580
261 10:49:27.556233 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
262 10:49:27.560234 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
263 10:49:27.563718 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
264 10:49:27.571054 CPU: AES supported, TXT NOT supported, VT supported
265 10:49:27.579315 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
266 10:49:27.579755 Cache size = 10 MiB
267 10:49:27.586551 MCH: device id 4609 (rev 04) is Alderlake-P
268 10:49:27.590611 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
269 10:49:27.593614 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
270 10:49:27.597340 VBOOT: Loading verstage.
271 10:49:27.600928 FMAP: Found "FLASH" version 1.1 at 0x1804000.
272 10:49:27.607855 FMAP: base = 0x0 size = 0x2000000 #areas = 37
273 10:49:27.611933 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
274 10:49:27.618508 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
275 10:49:27.628571 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
276 10:49:27.629036
277 10:49:27.629394
278 10:49:27.635323 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
279 10:49:27.644198 Probing TPM I2C: I2C bus 1 version 0x3230302a
280 10:49:27.647631 DW I2C bus 1 at 0xfe022000 (400 KHz)
281 10:49:27.650924 I2C TX abort detected (00000001)
282 10:49:27.654070 cr50_i2c_read: Address write failed
283 10:49:27.665673 .done! DID_VID 0x00281ae0
284 10:49:27.669007 TPM ready after 0 ms
285 10:49:27.671989 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
286 10:49:27.685574 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
287 10:49:27.692343 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
288 10:49:27.744915 tlcl_send_startup: Startup return code is 0
289 10:49:27.745484 TPM: setup succeeded
290 10:49:27.767841 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
291 10:49:27.789546 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
292 10:49:27.793385 Chrome EC: UHEPI supported
293 10:49:27.796338 Reading cr50 boot mode
294 10:49:27.811959 Cr50 says boot_mode is VERIFIED_RW(0x00).
295 10:49:27.812499 Phase 1
296 10:49:27.815644 FMAP: area GBB found @ 1805000 (458752 bytes)
297 10:49:27.823100 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
298 10:49:27.833229 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
299 10:49:27.839962 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
300 10:49:27.840393 Phase 2
301 10:49:27.840734 Phase 3
302 10:49:27.846752 FMAP: area GBB found @ 1805000 (458752 bytes)
303 10:49:27.850292 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 10:49:27.856696 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 10:49:27.860217 VB2:vb2_verify_keyblock() Checking keyblock signature...
306 10:49:27.871225 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
307 10:49:27.874166 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
308 10:49:27.884769 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
309 10:49:27.897568 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
310 10:49:27.900734 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
311 10:49:27.907711 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 10:49:27.910899 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
313 10:49:27.920715 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
314 10:49:27.927205 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
315 10:49:27.930641 Phase 4
316 10:49:27.934243 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
317 10:49:27.940759 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
318 10:49:28.153085 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
319 10:49:28.160311 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
320 10:49:28.162741 Saving vboot hash.
321 10:49:28.169418 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
322 10:49:28.185248 tlcl_extend: response is 0
323 10:49:28.192153 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
324 10:49:28.195682 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
325 10:49:28.213319 tlcl_extend: response is 0
326 10:49:28.219890 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
327 10:49:28.236237 tlcl_lock_nv_write: response is 0
328 10:49:28.257578 tlcl_lock_nv_write: response is 0
329 10:49:28.258229 Slot A is selected
330 10:49:28.264223 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
331 10:49:28.270975 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
332 10:49:28.278091 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
333 10:49:28.284451 BS: verstage times (exec / console): total (unknown) / 264 ms
334 10:49:28.285097
335 10:49:28.285575
336 10:49:28.290932 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
337 10:49:28.294411 Google Chrome EC: version:
338 10:49:28.297959 ro: volmar_v2.0.14126-e605144e9c
339 10:49:28.301353 rw: volmar_v0.0.55-22d1557
340 10:49:28.304777 running image: 2
341 10:49:28.307810 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
342 10:49:28.317845 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 10:49:28.324429 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 10:49:28.331206 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
345 10:49:28.340908 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
346 10:49:28.351711 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
347 10:49:28.358255 EC took 2221us to calculate image hash
348 10:49:28.368335 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
349 10:49:28.371588 VB2:sync_ec() select_rw=RW(active)
350 10:49:28.382106 Waited 329us to clear limit power flag.
351 10:49:28.384916 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 10:49:28.388086 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 10:49:28.391788 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
354 10:49:28.398135 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
355 10:49:28.401454 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
356 10:49:28.404840 TCO_STS: 0000 0000
357 10:49:28.404959 GEN_PMCON: d0015038 00002200
358 10:49:28.408186 GBLRST_CAUSE: 00000000 00000000
359 10:49:28.411680 HPR_CAUSE0: 00000000
360 10:49:28.415147 prev_sleep_state 5
361 10:49:28.418008 Abort disabling TXT, as CPU is not TXT capable.
362 10:49:28.425575 cse_lite: Number of partitions = 3
363 10:49:28.428932 cse_lite: Current partition = RO
364 10:49:28.429062 cse_lite: Next partition = RO
365 10:49:28.432364 cse_lite: Flags = 0x7
366 10:49:28.439303 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
367 10:49:28.449182 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
368 10:49:28.452673 FMAP: area SI_ME found @ 1000 (5238784 bytes)
369 10:49:28.459344 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
370 10:49:28.466180 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
371 10:49:28.472497 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
372 10:49:28.476015 cse_lite: CSE CBFS RW version : 16.1.25.2049
373 10:49:28.482428 cse_lite: Set Boot Partition Info Command (RW)
374 10:49:28.485776 HECI: Global Reset(Type:1) Command
375 10:49:29.908998 +CF�Ze�i3-1215U
376 10:49:29.912424 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
377 10:49:29.919146 CPU: AES supported, TXT NOT supported, VT supported
378 10:49:29.925636 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
379 10:49:29.929258 Cache size = 10 MiB
380 10:49:29.932428 MCH: device id 4609 (rev 04) is Alderlake-P
381 10:49:29.939226 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
382 10:49:29.942403 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
383 10:49:29.945979 VBOOT: Loading verstage.
384 10:49:29.949653 FMAP: Found "FLASH" version 1.1 at 0x1804000.
385 10:49:29.956423 FMAP: base = 0x0 size = 0x2000000 #areas = 37
386 10:49:29.960057 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
387 10:49:29.967140 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
388 10:49:29.977283 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
389 10:49:29.977720
390 10:49:29.978062
391 10:49:29.987344 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
392 10:49:29.990721 Probing TPM I2C: I2C bus 1 version 0x3230302a
393 10:49:29.993837 DW I2C bus 1 at 0xfe022000 (400 KHz)
394 10:49:29.997812 done! DID_VID 0x00281ae0
395 10:49:30.001133 TPM ready after 0 ms
396 10:49:30.004390 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
397 10:49:30.018402 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
398 10:49:30.022106 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
399 10:49:30.072875 tlcl_send_startup: Startup return code is 0
400 10:49:30.073634 TPM: setup succeeded
401 10:49:30.092222 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
402 10:49:30.114395 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
403 10:49:30.117989 Chrome EC: UHEPI supported
404 10:49:30.122231 Reading cr50 boot mode
405 10:49:30.136446 Cr50 says boot_mode is VERIFIED_RW(0x00).
406 10:49:30.137055 Phase 1
407 10:49:30.143031 FMAP: area GBB found @ 1805000 (458752 bytes)
408 10:49:30.149665 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
409 10:49:30.156595 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
410 10:49:30.162977 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
411 10:49:30.163428 Phase 2
412 10:49:30.166070 Phase 3
413 10:49:30.169439 FMAP: area GBB found @ 1805000 (458752 bytes)
414 10:49:30.176416 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
415 10:49:30.180411 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
416 10:49:30.186285 VB2:vb2_verify_keyblock() Checking keyblock signature...
417 10:49:30.193023 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
418 10:49:30.199662 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
419 10:49:30.209563 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
420 10:49:30.221290 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
421 10:49:30.224483 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
422 10:49:30.231402 VB2:vb2_verify_fw_preamble() Verifying preamble.
423 10:49:30.238210 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
424 10:49:30.244558 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
425 10:49:30.251346 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
426 10:49:30.255128 Phase 4
427 10:49:30.258672 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
428 10:49:30.265532 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
429 10:49:30.477968 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
430 10:49:30.484383 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
431 10:49:30.487780 Saving vboot hash.
432 10:49:30.494499 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
433 10:49:30.510092 tlcl_extend: response is 0
434 10:49:30.516658 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
435 10:49:30.523362 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
436 10:49:30.537673 tlcl_extend: response is 0
437 10:49:30.544063 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
438 10:49:30.562753 tlcl_lock_nv_write: response is 0
439 10:49:30.581889 tlcl_lock_nv_write: response is 0
440 10:49:30.582414 Slot A is selected
441 10:49:30.588404 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
442 10:49:30.595506 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
443 10:49:30.602287 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
444 10:49:30.608619 BS: verstage times (exec / console): total (unknown) / 257 ms
445 10:49:30.609112
446 10:49:30.609464
447 10:49:30.614926 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
448 10:49:30.619501 Google Chrome EC: version:
449 10:49:30.623068 ro: volmar_v2.0.14126-e605144e9c
450 10:49:30.626110 rw: volmar_v0.0.55-22d1557
451 10:49:30.629450 running image: 2
452 10:49:30.632959 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
453 10:49:30.642831 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
454 10:49:30.649520 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
455 10:49:30.656198 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
456 10:49:30.666483 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
457 10:49:30.676121 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
458 10:49:30.679264 EC took 940us to calculate image hash
459 10:49:30.689302 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
460 10:49:30.692740 VB2:sync_ec() select_rw=RW(active)
461 10:49:30.703650 Waited 299us to clear limit power flag.
462 10:49:30.706883 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
463 10:49:30.710362 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
464 10:49:30.713621 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
465 10:49:30.720632 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
466 10:49:30.723614 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
467 10:49:30.726976 TCO_STS: 0000 0000
468 10:49:30.727063 GEN_PMCON: d1001038 00002200
469 10:49:30.730455 GBLRST_CAUSE: 00000040 00000000
470 10:49:30.734104 HPR_CAUSE0: 00000000
471 10:49:30.737622 prev_sleep_state 5
472 10:49:30.740856 Abort disabling TXT, as CPU is not TXT capable.
473 10:49:30.748796 cse_lite: Number of partitions = 3
474 10:49:30.752247 cse_lite: Current partition = RW
475 10:49:30.752330 cse_lite: Next partition = RW
476 10:49:30.755053 cse_lite: Flags = 0x7
477 10:49:30.761799 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
478 10:49:30.771822 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
479 10:49:30.775283 FMAP: area SI_ME found @ 1000 (5238784 bytes)
480 10:49:30.782030 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
481 10:49:30.788721 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
482 10:49:30.795369 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
483 10:49:30.798952 cse_lite: CSE CBFS RW version : 16.1.25.2049
484 10:49:30.802012 Boot Count incremented to 7066
485 10:49:30.808761 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
486 10:49:30.815286 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
487 10:49:30.828230 Probing TPM I2C: done! DID_VID 0x00281ae0
488 10:49:30.831437 Locality already claimed
489 10:49:30.834855 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
490 10:49:30.853943 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
491 10:49:30.860866 MRC: Hash idx 0x100d comparison successful.
492 10:49:30.864123 MRC cache found, size f6c8
493 10:49:30.864198 bootmode is set to: 2
494 10:49:30.868233 EC returned error result code 3
495 10:49:30.871291 FW_CONFIG value from CBI is 0x131
496 10:49:30.877664 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
497 10:49:30.881243 SPD index = 0
498 10:49:30.887649 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
499 10:49:30.887757 SPD: module type is LPDDR4X
500 10:49:30.894895 SPD: module part number is K4U6E3S4AB-MGCL
501 10:49:30.901851 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
502 10:49:30.904817 SPD: device width 16 bits, bus width 16 bits
503 10:49:30.908464 SPD: module size is 1024 MB (per channel)
504 10:49:30.978037 CBMEM:
505 10:49:30.981770 IMD: root @ 0x76fff000 254 entries.
506 10:49:30.984927 IMD: root @ 0x76ffec00 62 entries.
507 10:49:30.992792 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
508 10:49:30.996106 RO_VPD is uninitialized or empty.
509 10:49:30.999558 FMAP: area RW_VPD found @ f29000 (8192 bytes)
510 10:49:31.006262 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
511 10:49:31.009332 External stage cache:
512 10:49:31.012751 IMD: root @ 0x7bbff000 254 entries.
513 10:49:31.016079 IMD: root @ 0x7bbfec00 62 entries.
514 10:49:31.022946 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
515 10:49:31.029546 MRC: Checking cached data update for 'RW_MRC_CACHE'.
516 10:49:31.033012 MRC: 'RW_MRC_CACHE' does not need update.
517 10:49:31.033100 8 DIMMs found
518 10:49:31.035992 SMM Memory Map
519 10:49:31.039161 SMRAM : 0x7b800000 0x800000
520 10:49:31.042668 Subregion 0: 0x7b800000 0x200000
521 10:49:31.046192 Subregion 1: 0x7ba00000 0x200000
522 10:49:31.049538 Subregion 2: 0x7bc00000 0x400000
523 10:49:31.052745 top_of_ram = 0x77000000
524 10:49:31.056241 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
525 10:49:31.062815 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
526 10:49:31.069342 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
527 10:49:31.072791 MTRR Range: Start=ff000000 End=0 (Size 1000000)
528 10:49:31.072895 Normal boot
529 10:49:31.082929 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
530 10:49:31.089388 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
531 10:49:31.096186 Processing 237 relocs. Offset value of 0x74ab9000
532 10:49:31.103990 BS: romstage times (exec / console): total (unknown) / 377 ms
533 10:49:31.111550
534 10:49:31.111656
535 10:49:31.118107 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
536 10:49:31.118184 Normal boot
537 10:49:31.124863 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
538 10:49:31.131251 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
539 10:49:31.138212 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
540 10:49:31.147933 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
541 10:49:31.196459 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
542 10:49:31.202893 Processing 5931 relocs. Offset value of 0x72a2f000
543 10:49:31.206554 BS: postcar times (exec / console): total (unknown) / 51 ms
544 10:49:31.209900
545 10:49:31.209974
546 10:49:31.216543 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
547 10:49:31.219710 Reserving BERT start 76a1e000, size 10000
548 10:49:31.223079 Normal boot
549 10:49:31.226475 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
550 10:49:31.232951 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
551 10:49:31.242999 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
552 10:49:31.246160 FMAP: area RW_VPD found @ f29000 (8192 bytes)
553 10:49:31.249591 Google Chrome EC: version:
554 10:49:31.252961 ro: volmar_v2.0.14126-e605144e9c
555 10:49:31.256057 rw: volmar_v0.0.55-22d1557
556 10:49:31.259408 running image: 2
557 10:49:31.262662 ACPI _SWS is PM1 Index 8 GPE Index -1
558 10:49:31.265969 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
559 10:49:31.269729 EC returned error result code 3
560 10:49:31.273200 FW_CONFIG value from CBI is 0x131
561 10:49:31.280092 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
562 10:49:31.283541 PCI: 00:1c.2 disabled by fw_config
563 10:49:31.289787 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
564 10:49:31.293228 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
565 10:49:31.300003 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
566 10:49:31.303362 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
567 10:49:31.309858 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
568 10:49:31.316958 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
569 10:49:31.320732 microcode: sig=0x906a4 pf=0x80 revision=0x423
570 10:49:31.327534 microcode: Update skipped, already up-to-date
571 10:49:31.334161 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
572 10:49:31.365805 Detected 6 core, 8 thread CPU.
573 10:49:31.369212 Setting up SMI for CPU
574 10:49:31.372472 IED base = 0x7bc00000
575 10:49:31.372575 IED size = 0x00400000
576 10:49:31.375827 Will perform SMM setup.
577 10:49:31.379355 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
578 10:49:31.382557 LAPIC 0x0 in XAPIC mode.
579 10:49:31.392810 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
580 10:49:31.395843 Processing 18 relocs. Offset value of 0x00030000
581 10:49:31.400306 Attempting to start 7 APs
582 10:49:31.403592 Waiting for 10ms after sending INIT.
583 10:49:31.416624 Waiting for SIPI to complete...
584 10:49:31.419972 LAPIC 0x1 in XAPIC mode.
585 10:49:31.423491 LAPIC 0x18 in XAPIC mode.
586 10:49:31.426778 LAPIC 0x1a in XAPIC mode.
587 10:49:31.429941 AP: slot 2 apic_id 18, MCU rev: 0x00000423
588 10:49:31.433454 AP: slot 3 apic_id 1a, MCU rev: 0x00000423
589 10:49:31.437075 LAPIC 0x1c in XAPIC mode.
590 10:49:31.440148 AP: slot 6 apic_id 1, MCU rev: 0x00000423
591 10:49:31.443416 LAPIC 0x1e in XAPIC mode.
592 10:49:31.450242 AP: slot 4 apic_id 1c, MCU rev: 0x00000423
593 10:49:31.453472 AP: slot 1 apic_id 1e, MCU rev: 0x00000423
594 10:49:31.453560 done.
595 10:49:31.456598 Waiting for SIPI to complete...
596 10:49:31.456694 done.
597 10:49:31.460120 LAPIC 0x9 in XAPIC mode.
598 10:49:31.463608 LAPIC 0x8 in XAPIC mode.
599 10:49:31.466589 AP: slot 5 apic_id 9, MCU rev: 0x00000423
600 10:49:31.470134 AP: slot 7 apic_id 8, MCU rev: 0x00000423
601 10:49:31.473485 smm_setup_relocation_handler: enter
602 10:49:31.476884 smm_setup_relocation_handler: exit
603 10:49:31.486869 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
604 10:49:31.490281 Processing 11 relocs. Offset value of 0x00038000
605 10:49:31.496914 smm_module_setup_stub: stack_top = 0x7b804000
606 10:49:31.499996 smm_module_setup_stub: per cpu stack_size = 0x800
607 10:49:31.506677 smm_module_setup_stub: runtime.start32_offset = 0x4c
608 10:49:31.509861 smm_module_setup_stub: runtime.smm_size = 0x10000
609 10:49:31.516686 SMM Module: stub loaded at 38000. Will call 0x76a52094
610 10:49:31.520172 Installing permanent SMM handler to 0x7b800000
611 10:49:31.526716 smm_load_module: total_smm_space_needed e468, available -> 200000
612 10:49:31.536443 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
613 10:49:31.539870 Processing 255 relocs. Offset value of 0x7b9f6000
614 10:49:31.546828 smm_load_module: smram_start: 0x7b800000
615 10:49:31.550120 smm_load_module: smram_end: 7ba00000
616 10:49:31.553095 smm_load_module: handler start 0x7b9f6d5f
617 10:49:31.556526 smm_load_module: handler_size 98d0
618 10:49:31.559900 smm_load_module: fxsave_area 0x7b9ff000
619 10:49:31.563450 smm_load_module: fxsave_size 1000
620 10:49:31.566455 smm_load_module: CONFIG_MSEG_SIZE 0x0
621 10:49:31.573600 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
622 10:49:31.580518 smm_load_module: handler_mod_params.smbase = 0x7b800000
623 10:49:31.583538 smm_load_module: per_cpu_save_state_size = 0x400
624 10:49:31.587140 smm_load_module: num_cpus = 0x8
625 10:49:31.593606 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
626 10:49:31.597129 smm_load_module: total_save_state_size = 0x2000
627 10:49:31.600491 smm_load_module: cpu0 entry: 7b9e6000
628 10:49:31.607431 smm_create_map: cpus allowed in one segment 30
629 10:49:31.610306 smm_create_map: min # of segments needed 1
630 10:49:31.610984 CPU 0x0
631 10:49:31.613638 smbase 7b9e6000 entry 7b9ee000
632 10:49:31.620508 ss_start 7b9f5c00 code_end 7b9ee208
633 10:49:31.621143 CPU 0x1
634 10:49:31.623523 smbase 7b9e5c00 entry 7b9edc00
635 10:49:31.630305 ss_start 7b9f5800 code_end 7b9ede08
636 10:49:31.630908 CPU 0x2
637 10:49:31.633806 smbase 7b9e5800 entry 7b9ed800
638 10:49:31.636813 ss_start 7b9f5400 code_end 7b9eda08
639 10:49:31.640450 CPU 0x3
640 10:49:31.643731 smbase 7b9e5400 entry 7b9ed400
641 10:49:31.646770 ss_start 7b9f5000 code_end 7b9ed608
642 10:49:31.647366 CPU 0x4
643 10:49:31.653475 smbase 7b9e5000 entry 7b9ed000
644 10:49:31.657252 ss_start 7b9f4c00 code_end 7b9ed208
645 10:49:31.657887 CPU 0x5
646 10:49:31.660516 smbase 7b9e4c00 entry 7b9ecc00
647 10:49:31.667374 ss_start 7b9f4800 code_end 7b9ece08
648 10:49:31.667799 CPU 0x6
649 10:49:31.670383 smbase 7b9e4800 entry 7b9ec800
650 10:49:31.674020 ss_start 7b9f4400 code_end 7b9eca08
651 10:49:31.677001 CPU 0x7
652 10:49:31.680499 smbase 7b9e4400 entry 7b9ec400
653 10:49:31.683816 ss_start 7b9f4000 code_end 7b9ec608
654 10:49:31.693778 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
655 10:49:31.697017 Processing 11 relocs. Offset value of 0x7b9ee000
656 10:49:31.703680 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
657 10:49:31.710479 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
658 10:49:31.717583 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
659 10:49:31.720406 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
660 10:49:31.726861 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
661 10:49:31.733526 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
662 10:49:31.740434 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
663 10:49:31.746923 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
664 10:49:31.753841 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
665 10:49:31.760728 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
666 10:49:31.767598 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
667 10:49:31.770631 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
668 10:49:31.777030 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
669 10:49:31.784016 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
670 10:49:31.790956 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
671 10:49:31.797382 smm_module_setup_stub: stack_top = 0x7b804000
672 10:49:31.800595 smm_module_setup_stub: per cpu stack_size = 0x800
673 10:49:31.807437 smm_module_setup_stub: runtime.start32_offset = 0x4c
674 10:49:31.810537 smm_module_setup_stub: runtime.smm_size = 0x200000
675 10:49:31.817494 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
676 10:49:31.820946 Clearing SMI status registers
677 10:49:31.824238 SMI_STS: PM1
678 10:49:31.824668 PM1_STS: WAK PWRBTN
679 10:49:31.834352 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
680 10:49:31.837692 In relocation handler: CPU 0
681 10:49:31.840905 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
682 10:49:31.844217 Writing SMRR. base = 0x7b800006, mask=0xff800c00
683 10:49:31.847744 Relocation complete.
684 10:49:31.854328 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
685 10:49:31.857865 In relocation handler: CPU 6
686 10:49:31.861030 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
687 10:49:31.864107 Relocation complete.
688 10:49:31.870696 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
689 10:49:31.874460 In relocation handler: CPU 1
690 10:49:31.877520 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
691 10:49:31.884382 Writing SMRR. base = 0x7b800006, mask=0xff800c00
692 10:49:31.884859 Relocation complete.
693 10:49:31.890843 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
694 10:49:31.894303 In relocation handler: CPU 4
695 10:49:31.900915 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
696 10:49:31.904128 Writing SMRR. base = 0x7b800006, mask=0xff800c00
697 10:49:31.907483 Relocation complete.
698 10:49:31.914019 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
699 10:49:31.917550 In relocation handler: CPU 2
700 10:49:31.920855 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
701 10:49:31.924132 Writing SMRR. base = 0x7b800006, mask=0xff800c00
702 10:49:31.927600 Relocation complete.
703 10:49:31.934180 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
704 10:49:31.937255 In relocation handler: CPU 3
705 10:49:31.940767 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
706 10:49:31.947429 Writing SMRR. base = 0x7b800006, mask=0xff800c00
707 10:49:31.947863 Relocation complete.
708 10:49:31.954267 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
709 10:49:31.957729 In relocation handler: CPU 7
710 10:49:31.964206 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
711 10:49:31.967570 Writing SMRR. base = 0x7b800006, mask=0xff800c00
712 10:49:31.971045 Relocation complete.
713 10:49:31.977660 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
714 10:49:31.980408 In relocation handler: CPU 5
715 10:49:31.983894 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
716 10:49:31.987280 Relocation complete.
717 10:49:31.987709 Initializing CPU #0
718 10:49:31.990901 CPU: vendor Intel device 906a4
719 10:49:31.994162 CPU: family 06, model 9a, stepping 04
720 10:49:31.997311 Clearing out pending MCEs
721 10:49:32.000814 cpu: energy policy set to 7
722 10:49:32.003765 Turbo is available but hidden
723 10:49:32.007171 Turbo is available and visible
724 10:49:32.010650 microcode: Update skipped, already up-to-date
725 10:49:32.014157 CPU #0 initialized
726 10:49:32.014586 Initializing CPU #6
727 10:49:32.017604 Initializing CPU #4
728 10:49:32.020957 Initializing CPU #1
729 10:49:32.021428 Initializing CPU #2
730 10:49:32.023951 CPU: vendor Intel device 906a4
731 10:49:32.027521 CPU: family 06, model 9a, stepping 04
732 10:49:32.030892 CPU: vendor Intel device 906a4
733 10:49:32.034413 CPU: family 06, model 9a, stepping 04
734 10:49:32.037751 CPU: vendor Intel device 906a4
735 10:49:32.040650 CPU: family 06, model 9a, stepping 04
736 10:49:32.044186 Initializing CPU #5
737 10:49:32.047549 Clearing out pending MCEs
738 10:49:32.048155 Initializing CPU #3
739 10:49:32.050982 Clearing out pending MCEs
740 10:49:32.054285 CPU: vendor Intel device 906a4
741 10:49:32.057339 CPU: family 06, model 9a, stepping 04
742 10:49:32.060921 cpu: energy policy set to 7
743 10:49:32.064450 cpu: energy policy set to 7
744 10:49:32.067431 CPU: vendor Intel device 906a4
745 10:49:32.070787 CPU: family 06, model 9a, stepping 04
746 10:49:32.077424 microcode: Update skipped, already up-to-date
747 10:49:32.077854 CPU #1 initialized
748 10:49:32.080871 microcode: Update skipped, already up-to-date
749 10:49:32.084144 CPU #2 initialized
750 10:49:32.087654 CPU: vendor Intel device 906a4
751 10:49:32.090668 CPU: family 06, model 9a, stepping 04
752 10:49:32.094054 Clearing out pending MCEs
753 10:49:32.097234 Clearing out pending MCEs
754 10:49:32.100911 Clearing out pending MCEs
755 10:49:32.101383 cpu: energy policy set to 7
756 10:49:32.104404 cpu: energy policy set to 7
757 10:49:32.110959 microcode: Update skipped, already up-to-date
758 10:49:32.111391 CPU #4 initialized
759 10:49:32.117657 microcode: Update skipped, already up-to-date
760 10:49:32.118088 CPU #3 initialized
761 10:49:32.120652 Clearing out pending MCEs
762 10:49:32.124093 Initializing CPU #7
763 10:49:32.124524 cpu: energy policy set to 7
764 10:49:32.127589 cpu: energy policy set to 7
765 10:49:32.134396 microcode: Update skipped, already up-to-date
766 10:49:32.134826 CPU #6 initialized
767 10:49:32.140793 microcode: Update skipped, already up-to-date
768 10:49:32.141423 CPU #5 initialized
769 10:49:32.143967 CPU: vendor Intel device 906a4
770 10:49:32.147478 CPU: family 06, model 9a, stepping 04
771 10:49:32.150979 Clearing out pending MCEs
772 10:49:32.154426 cpu: energy policy set to 7
773 10:49:32.157164 microcode: Update skipped, already up-to-date
774 10:49:32.160797 CPU #7 initialized
775 10:49:32.164001 bsp_do_flight_plan done after 702 msecs.
776 10:49:32.167475 CPU: frequency set to 4400 MHz
777 10:49:32.170507 Enabling SMIs.
778 10:49:32.174028 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
779 10:49:32.191589 Probing TPM I2C: done! DID_VID 0x00281ae0
780 10:49:32.195242 Locality already claimed
781 10:49:32.198302 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
782 10:49:32.209593 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
783 10:49:32.213346 Enabling GPIO PM b/c CR50 has long IRQ pulse support
784 10:49:32.219856 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
785 10:49:32.226663 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
786 10:49:32.230059 Found a VBT of 9216 bytes after decompression
787 10:49:32.233243 PCI 1.0, PIN A, using IRQ #16
788 10:49:32.236748 PCI 2.0, PIN A, using IRQ #17
789 10:49:32.239745 PCI 4.0, PIN A, using IRQ #18
790 10:49:32.243251 PCI 5.0, PIN A, using IRQ #16
791 10:49:32.246470 PCI 6.0, PIN A, using IRQ #16
792 10:49:32.249787 PCI 6.2, PIN C, using IRQ #18
793 10:49:32.253371 PCI 7.0, PIN A, using IRQ #19
794 10:49:32.257016 PCI 7.1, PIN B, using IRQ #20
795 10:49:32.260072 PCI 7.2, PIN C, using IRQ #21
796 10:49:32.263511 PCI 7.3, PIN D, using IRQ #22
797 10:49:32.266661 PCI 8.0, PIN A, using IRQ #23
798 10:49:32.270054 PCI D.0, PIN A, using IRQ #17
799 10:49:32.270483 PCI D.1, PIN B, using IRQ #19
800 10:49:32.273484 PCI 10.0, PIN A, using IRQ #24
801 10:49:32.276489 PCI 10.1, PIN B, using IRQ #25
802 10:49:32.279824 PCI 10.6, PIN C, using IRQ #20
803 10:49:32.283283 PCI 10.7, PIN D, using IRQ #21
804 10:49:32.286378 PCI 11.0, PIN A, using IRQ #26
805 10:49:32.289962 PCI 11.1, PIN B, using IRQ #27
806 10:49:32.293354 PCI 11.2, PIN C, using IRQ #28
807 10:49:32.296365 PCI 11.3, PIN D, using IRQ #29
808 10:49:32.300010 PCI 12.0, PIN A, using IRQ #30
809 10:49:32.303358 PCI 12.6, PIN B, using IRQ #31
810 10:49:32.306693 PCI 12.7, PIN C, using IRQ #22
811 10:49:32.309873 PCI 13.0, PIN A, using IRQ #32
812 10:49:32.313415 PCI 13.1, PIN B, using IRQ #33
813 10:49:32.316135 PCI 13.2, PIN C, using IRQ #34
814 10:49:32.319588 PCI 13.3, PIN D, using IRQ #35
815 10:49:32.323021 PCI 14.0, PIN B, using IRQ #23
816 10:49:32.323495 PCI 14.1, PIN A, using IRQ #36
817 10:49:32.326348 PCI 14.3, PIN C, using IRQ #17
818 10:49:32.329823 PCI 15.0, PIN A, using IRQ #37
819 10:49:32.332810 PCI 15.1, PIN B, using IRQ #38
820 10:49:32.336083 PCI 15.2, PIN C, using IRQ #39
821 10:49:32.339451 PCI 15.3, PIN D, using IRQ #40
822 10:49:32.342867 PCI 16.0, PIN A, using IRQ #18
823 10:49:32.346344 PCI 16.1, PIN B, using IRQ #19
824 10:49:32.349371 PCI 16.2, PIN C, using IRQ #20
825 10:49:32.352751 PCI 16.3, PIN D, using IRQ #21
826 10:49:32.356299 PCI 16.4, PIN A, using IRQ #18
827 10:49:32.359789 PCI 16.5, PIN B, using IRQ #19
828 10:49:32.362993 PCI 17.0, PIN A, using IRQ #22
829 10:49:32.366168 PCI 19.0, PIN A, using IRQ #41
830 10:49:32.369728 PCI 19.1, PIN B, using IRQ #42
831 10:49:32.373133 PCI 19.2, PIN C, using IRQ #43
832 10:49:32.373565 PCI 1C.0, PIN A, using IRQ #16
833 10:49:32.376005 PCI 1C.1, PIN B, using IRQ #17
834 10:49:32.379513 PCI 1C.2, PIN C, using IRQ #18
835 10:49:32.383046 PCI 1C.3, PIN D, using IRQ #19
836 10:49:32.386478 PCI 1C.4, PIN A, using IRQ #16
837 10:49:32.389435 PCI 1C.5, PIN B, using IRQ #17
838 10:49:32.392901 PCI 1C.6, PIN C, using IRQ #18
839 10:49:32.395938 PCI 1C.7, PIN D, using IRQ #19
840 10:49:32.399488 PCI 1D.0, PIN A, using IRQ #16
841 10:49:32.402853 PCI 1D.1, PIN B, using IRQ #17
842 10:49:32.405974 PCI 1D.2, PIN C, using IRQ #18
843 10:49:32.409612 PCI 1D.3, PIN D, using IRQ #19
844 10:49:32.412814 PCI 1E.0, PIN A, using IRQ #23
845 10:49:32.416217 PCI 1E.1, PIN B, using IRQ #20
846 10:49:32.419222 PCI 1E.2, PIN C, using IRQ #44
847 10:49:32.422935 PCI 1E.3, PIN D, using IRQ #45
848 10:49:32.423412 PCI 1F.3, PIN B, using IRQ #22
849 10:49:32.426236 PCI 1F.4, PIN C, using IRQ #23
850 10:49:32.429798 PCI 1F.6, PIN D, using IRQ #20
851 10:49:32.433028 PCI 1F.7, PIN A, using IRQ #21
852 10:49:32.439261 IRQ: Using dynamically assigned PCI IO-APIC IRQs
853 10:49:32.445971 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
854 10:49:32.628475 FSPS returned 0
855 10:49:32.632195 Executing Phase 1 of FspMultiPhaseSiInit
856 10:49:32.642018 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
857 10:49:32.645410 port C0 DISC req: usage 1 usb3 1 usb2 1
858 10:49:32.648390 Raw Buffer output 0 00000111
859 10:49:32.651661 Raw Buffer output 1 00000000
860 10:49:32.655551 pmc_send_ipc_cmd succeeded
861 10:49:32.661950 port C1 DISC req: usage 1 usb3 3 usb2 3
862 10:49:32.662445 Raw Buffer output 0 00000331
863 10:49:32.665345 Raw Buffer output 1 00000000
864 10:49:32.669191 pmc_send_ipc_cmd succeeded
865 10:49:32.673535 Detected 6 core, 8 thread CPU.
866 10:49:32.677194 Detected 6 core, 8 thread CPU.
867 10:49:32.681902 Detected 6 core, 8 thread CPU.
868 10:49:32.685465 Detected 6 core, 8 thread CPU.
869 10:49:32.688808 Detected 6 core, 8 thread CPU.
870 10:49:32.691645 Detected 6 core, 8 thread CPU.
871 10:49:32.695139 Detected 6 core, 8 thread CPU.
872 10:49:32.698658 Detected 6 core, 8 thread CPU.
873 10:49:32.702033 Detected 6 core, 8 thread CPU.
874 10:49:32.705674 Detected 6 core, 8 thread CPU.
875 10:49:32.708506 Detected 6 core, 8 thread CPU.
876 10:49:32.711739 Detected 6 core, 8 thread CPU.
877 10:49:32.714968 Detected 6 core, 8 thread CPU.
878 10:49:32.718861 Detected 6 core, 8 thread CPU.
879 10:49:32.722342 Detected 6 core, 8 thread CPU.
880 10:49:32.725767 Detected 6 core, 8 thread CPU.
881 10:49:32.729031 Detected 6 core, 8 thread CPU.
882 10:49:32.732547 Detected 6 core, 8 thread CPU.
883 10:49:32.733079 Detected 6 core, 8 thread CPU.
884 10:49:32.735755 Detected 6 core, 8 thread CPU.
885 10:49:32.739001 Detected 6 core, 8 thread CPU.
886 10:49:32.742447 Detected 6 core, 8 thread CPU.
887 10:49:33.035200 Detected 6 core, 8 thread CPU.
888 10:49:33.038868 Detected 6 core, 8 thread CPU.
889 10:49:33.042252 Detected 6 core, 8 thread CPU.
890 10:49:33.045793 Detected 6 core, 8 thread CPU.
891 10:49:33.048843 Detected 6 core, 8 thread CPU.
892 10:49:33.052044 Detected 6 core, 8 thread CPU.
893 10:49:33.055667 Detected 6 core, 8 thread CPU.
894 10:49:33.059089 Detected 6 core, 8 thread CPU.
895 10:49:33.062044 Detected 6 core, 8 thread CPU.
896 10:49:33.065519 Detected 6 core, 8 thread CPU.
897 10:49:33.069030 Detected 6 core, 8 thread CPU.
898 10:49:33.072498 Detected 6 core, 8 thread CPU.
899 10:49:33.075718 Detected 6 core, 8 thread CPU.
900 10:49:33.079132 Detected 6 core, 8 thread CPU.
901 10:49:33.082124 Detected 6 core, 8 thread CPU.
902 10:49:33.085505 Detected 6 core, 8 thread CPU.
903 10:49:33.088958 Detected 6 core, 8 thread CPU.
904 10:49:33.089438 Detected 6 core, 8 thread CPU.
905 10:49:33.092314 Detected 6 core, 8 thread CPU.
906 10:49:33.095494 Detected 6 core, 8 thread CPU.
907 10:49:33.098901 Display FSP Version Info HOB
908 10:49:33.102284 Reference Code - CPU = c.0.65.70
909 10:49:33.105873 uCode Version = 0.0.4.23
910 10:49:33.108997 TXT ACM version = ff.ff.ff.ffff
911 10:49:33.112466 Reference Code - ME = c.0.65.70
912 10:49:33.115420 MEBx version = 0.0.0.0
913 10:49:33.118960 ME Firmware Version = Lite SKU
914 10:49:33.122585 Reference Code - PCH = c.0.65.70
915 10:49:33.125385 PCH-CRID Status = Disabled
916 10:49:33.128908 PCH-CRID Original Value = ff.ff.ff.ffff
917 10:49:33.132576 PCH-CRID New Value = ff.ff.ff.ffff
918 10:49:33.135513 OPROM - RST - RAID = ff.ff.ff.ffff
919 10:49:33.138936 PCH Hsio Version = 4.0.0.0
920 10:49:33.142179 Reference Code - SA - System Agent = c.0.65.70
921 10:49:33.145587 Reference Code - MRC = 0.0.3.80
922 10:49:33.148964 SA - PCIe Version = c.0.65.70
923 10:49:33.152264 SA-CRID Status = Disabled
924 10:49:33.155562 SA-CRID Original Value = 0.0.0.4
925 10:49:33.159307 SA-CRID New Value = 0.0.0.4
926 10:49:33.159737 OPROM - VBIOS = ff.ff.ff.ffff
927 10:49:33.165662 IO Manageability Engine FW Version = 24.0.4.0
928 10:49:33.169045 PHY Build Version = 0.0.0.2016
929 10:49:33.172178 Thunderbolt(TM) FW Version = 0.0.0.0
930 10:49:33.179058 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
931 10:49:33.185738 BS: BS_DEV_INIT_CHIPS run times (exec / console): 494 / 507 ms
932 10:49:33.186204 Enumerating buses...
933 10:49:33.192175 Show all devs... Before device enumeration.
934 10:49:33.193025 Root Device: enabled 1
935 10:49:33.195513 CPU_CLUSTER: 0: enabled 1
936 10:49:33.198970 DOMAIN: 0000: enabled 1
937 10:49:33.202482 GPIO: 0: enabled 1
938 10:49:33.202944 PCI: 00:00.0: enabled 1
939 10:49:33.205376 PCI: 00:01.0: enabled 0
940 10:49:33.209196 PCI: 00:01.1: enabled 0
941 10:49:33.209662 PCI: 00:02.0: enabled 1
942 10:49:33.211996 PCI: 00:04.0: enabled 1
943 10:49:33.215488 PCI: 00:05.0: enabled 0
944 10:49:33.218754 PCI: 00:06.0: enabled 1
945 10:49:33.219169 PCI: 00:06.2: enabled 0
946 10:49:33.222318 PCI: 00:07.0: enabled 0
947 10:49:33.225394 PCI: 00:07.1: enabled 0
948 10:49:33.229012 PCI: 00:07.2: enabled 0
949 10:49:33.229483 PCI: 00:07.3: enabled 0
950 10:49:33.232030 PCI: 00:08.0: enabled 0
951 10:49:33.235424 PCI: 00:09.0: enabled 0
952 10:49:33.238596 PCI: 00:0a.0: enabled 1
953 10:49:33.239056 PCI: 00:0d.0: enabled 1
954 10:49:33.242089 PCI: 00:0d.1: enabled 0
955 10:49:33.245644 PCI: 00:0d.2: enabled 0
956 10:49:33.246082 PCI: 00:0d.3: enabled 0
957 10:49:33.248583 PCI: 00:0e.0: enabled 0
958 10:49:33.252097 PCI: 00:10.0: enabled 0
959 10:49:33.255596 PCI: 00:10.1: enabled 0
960 10:49:33.256075 PCI: 00:10.6: enabled 0
961 10:49:33.258959 PCI: 00:10.7: enabled 0
962 10:49:33.261989 PCI: 00:12.0: enabled 0
963 10:49:33.265315 PCI: 00:12.6: enabled 0
964 10:49:33.265737 PCI: 00:12.7: enabled 0
965 10:49:33.268849 PCI: 00:13.0: enabled 0
966 10:49:33.271873 PCI: 00:14.0: enabled 1
967 10:49:33.275074 PCI: 00:14.1: enabled 0
968 10:49:33.275495 PCI: 00:14.2: enabled 1
969 10:49:33.278426 PCI: 00:14.3: enabled 1
970 10:49:33.281674 PCI: 00:15.0: enabled 1
971 10:49:33.285440 PCI: 00:15.1: enabled 1
972 10:49:33.285860 PCI: 00:15.2: enabled 0
973 10:49:33.288489 PCI: 00:15.3: enabled 1
974 10:49:33.291940 PCI: 00:16.0: enabled 1
975 10:49:33.292363 PCI: 00:16.1: enabled 0
976 10:49:33.294940 PCI: 00:16.2: enabled 0
977 10:49:33.298384 PCI: 00:16.3: enabled 0
978 10:49:33.301815 PCI: 00:16.4: enabled 0
979 10:49:33.302236 PCI: 00:16.5: enabled 0
980 10:49:33.305217 PCI: 00:17.0: enabled 1
981 10:49:33.308545 PCI: 00:19.0: enabled 0
982 10:49:33.311812 PCI: 00:19.1: enabled 1
983 10:49:33.312235 PCI: 00:19.2: enabled 0
984 10:49:33.315243 PCI: 00:1a.0: enabled 0
985 10:49:33.318201 PCI: 00:1c.0: enabled 0
986 10:49:33.321452 PCI: 00:1c.1: enabled 0
987 10:49:33.322051 PCI: 00:1c.2: enabled 0
988 10:49:33.324967 PCI: 00:1c.3: enabled 0
989 10:49:33.328448 PCI: 00:1c.4: enabled 0
990 10:49:33.328897 PCI: 00:1c.5: enabled 0
991 10:49:33.331844 PCI: 00:1c.6: enabled 0
992 10:49:33.335242 PCI: 00:1c.7: enabled 0
993 10:49:33.338118 PCI: 00:1d.0: enabled 0
994 10:49:33.338537 PCI: 00:1d.1: enabled 0
995 10:49:33.341792 PCI: 00:1d.2: enabled 0
996 10:49:33.345066 PCI: 00:1d.3: enabled 0
997 10:49:33.348434 PCI: 00:1e.0: enabled 1
998 10:49:33.348857 PCI: 00:1e.1: enabled 0
999 10:49:33.351849 PCI: 00:1e.2: enabled 0
1000 10:49:33.354787 PCI: 00:1e.3: enabled 1
1001 10:49:33.358276 PCI: 00:1f.0: enabled 1
1002 10:49:33.358699 PCI: 00:1f.1: enabled 0
1003 10:49:33.361613 PCI: 00:1f.2: enabled 1
1004 10:49:33.364937 PCI: 00:1f.3: enabled 1
1005 10:49:33.368369 PCI: 00:1f.4: enabled 0
1006 10:49:33.368787 PCI: 00:1f.5: enabled 1
1007 10:49:33.371664 PCI: 00:1f.6: enabled 0
1008 10:49:33.374950 PCI: 00:1f.7: enabled 0
1009 10:49:33.375475 GENERIC: 0.0: enabled 1
1010 10:49:33.378364 GENERIC: 0.0: enabled 1
1011 10:49:33.381866 GENERIC: 1.0: enabled 1
1012 10:49:33.384827 GENERIC: 0.0: enabled 1
1013 10:49:33.385321 GENERIC: 1.0: enabled 1
1014 10:49:33.388350 USB0 port 0: enabled 1
1015 10:49:33.391797 USB0 port 0: enabled 1
1016 10:49:33.392217 GENERIC: 0.0: enabled 1
1017 10:49:33.394977 I2C: 00:1a: enabled 1
1018 10:49:33.398157 I2C: 00:31: enabled 1
1019 10:49:33.401568 I2C: 00:32: enabled 1
1020 10:49:33.401964 I2C: 00:50: enabled 1
1021 10:49:33.404923 I2C: 00:10: enabled 1
1022 10:49:33.408141 I2C: 00:15: enabled 1
1023 10:49:33.408563 I2C: 00:2c: enabled 1
1024 10:49:33.411444 GENERIC: 0.0: enabled 1
1025 10:49:33.414883 SPI: 00: enabled 1
1026 10:49:33.415310 PNP: 0c09.0: enabled 1
1027 10:49:33.418149 GENERIC: 0.0: enabled 1
1028 10:49:33.421497 USB3 port 0: enabled 1
1029 10:49:33.422143 USB3 port 1: enabled 0
1030 10:49:33.424723 USB3 port 2: enabled 1
1031 10:49:33.428063 USB3 port 3: enabled 0
1032 10:49:33.431571 USB2 port 0: enabled 1
1033 10:49:33.432126 USB2 port 1: enabled 0
1034 10:49:33.434593 USB2 port 2: enabled 1
1035 10:49:33.438127 USB2 port 3: enabled 0
1036 10:49:33.438543 USB2 port 4: enabled 0
1037 10:49:33.441528 USB2 port 5: enabled 1
1038 10:49:33.444833 USB2 port 6: enabled 0
1039 10:49:33.445318 USB2 port 7: enabled 0
1040 10:49:33.448170 USB2 port 8: enabled 1
1041 10:49:33.451795 USB2 port 9: enabled 1
1042 10:49:33.454842 USB3 port 0: enabled 1
1043 10:49:33.455255 USB3 port 1: enabled 0
1044 10:49:33.457970 USB3 port 2: enabled 0
1045 10:49:33.461091 USB3 port 3: enabled 0
1046 10:49:33.461504 GENERIC: 0.0: enabled 1
1047 10:49:33.464503 GENERIC: 1.0: enabled 1
1048 10:49:33.467888 APIC: 00: enabled 1
1049 10:49:33.468469 APIC: 1e: enabled 1
1050 10:49:33.470872 APIC: 18: enabled 1
1051 10:49:33.474437 APIC: 1a: enabled 1
1052 10:49:33.474848 APIC: 1c: enabled 1
1053 10:49:33.477956 APIC: 09: enabled 1
1054 10:49:33.480946 APIC: 01: enabled 1
1055 10:49:33.481399 APIC: 08: enabled 1
1056 10:49:33.484436 Compare with tree...
1057 10:49:33.487903 Root Device: enabled 1
1058 10:49:33.488312 CPU_CLUSTER: 0: enabled 1
1059 10:49:33.490862 APIC: 00: enabled 1
1060 10:49:33.494404 APIC: 1e: enabled 1
1061 10:49:33.494954 APIC: 18: enabled 1
1062 10:49:33.497947 APIC: 1a: enabled 1
1063 10:49:33.501353 APIC: 1c: enabled 1
1064 10:49:33.501778 APIC: 09: enabled 1
1065 10:49:33.504273 APIC: 01: enabled 1
1066 10:49:33.507765 APIC: 08: enabled 1
1067 10:49:33.511243 DOMAIN: 0000: enabled 1
1068 10:49:33.511710 GPIO: 0: enabled 1
1069 10:49:33.514564 PCI: 00:00.0: enabled 1
1070 10:49:33.518079 PCI: 00:01.0: enabled 0
1071 10:49:33.520926 PCI: 00:01.1: enabled 0
1072 10:49:33.521445 PCI: 00:02.0: enabled 1
1073 10:49:33.524387 PCI: 00:04.0: enabled 1
1074 10:49:33.528089 GENERIC: 0.0: enabled 1
1075 10:49:33.530970 PCI: 00:05.0: enabled 0
1076 10:49:33.534337 PCI: 00:06.0: enabled 1
1077 10:49:33.534750 PCI: 00:06.2: enabled 0
1078 10:49:33.537460 PCI: 00:08.0: enabled 0
1079 10:49:33.541494 PCI: 00:09.0: enabled 0
1080 10:49:33.544621 PCI: 00:0a.0: enabled 1
1081 10:49:33.545143 PCI: 00:0d.0: enabled 1
1082 10:49:33.547891 USB0 port 0: enabled 1
1083 10:49:33.551202 USB3 port 0: enabled 1
1084 10:49:33.554326 USB3 port 1: enabled 0
1085 10:49:33.558117 USB3 port 2: enabled 1
1086 10:49:33.560703 USB3 port 3: enabled 0
1087 10:49:33.561264 PCI: 00:0d.1: enabled 0
1088 10:49:33.564212 PCI: 00:0d.2: enabled 0
1089 10:49:33.567753 PCI: 00:0d.3: enabled 0
1090 10:49:33.570580 PCI: 00:0e.0: enabled 0
1091 10:49:33.573992 PCI: 00:10.0: enabled 0
1092 10:49:33.574373 PCI: 00:10.1: enabled 0
1093 10:49:33.577414 PCI: 00:10.6: enabled 0
1094 10:49:33.581001 PCI: 00:10.7: enabled 0
1095 10:49:33.583898 PCI: 00:12.0: enabled 0
1096 10:49:33.587461 PCI: 00:12.6: enabled 0
1097 10:49:33.587846 PCI: 00:12.7: enabled 0
1098 10:49:33.590943 PCI: 00:13.0: enabled 0
1099 10:49:33.593834 PCI: 00:14.0: enabled 1
1100 10:49:33.597445 USB0 port 0: enabled 1
1101 10:49:33.600909 USB2 port 0: enabled 1
1102 10:49:33.601334 USB2 port 1: enabled 0
1103 10:49:33.603838 USB2 port 2: enabled 1
1104 10:49:33.607284 USB2 port 3: enabled 0
1105 10:49:33.610947 USB2 port 4: enabled 0
1106 10:49:33.613949 USB2 port 5: enabled 1
1107 10:49:33.614318 USB2 port 6: enabled 0
1108 10:49:33.617461 USB2 port 7: enabled 0
1109 10:49:33.620456 USB2 port 8: enabled 1
1110 10:49:33.624059 USB2 port 9: enabled 1
1111 10:49:33.627381 USB3 port 0: enabled 1
1112 10:49:33.630556 USB3 port 1: enabled 0
1113 10:49:33.630933 USB3 port 2: enabled 0
1114 10:49:33.634049 USB3 port 3: enabled 0
1115 10:49:33.637263 PCI: 00:14.1: enabled 0
1116 10:49:33.640660 PCI: 00:14.2: enabled 1
1117 10:49:33.643902 PCI: 00:14.3: enabled 1
1118 10:49:33.644334 GENERIC: 0.0: enabled 1
1119 10:49:33.647329 PCI: 00:15.0: enabled 1
1120 10:49:33.650664 I2C: 00:1a: enabled 1
1121 10:49:33.654007 I2C: 00:31: enabled 1
1122 10:49:33.657021 I2C: 00:32: enabled 1
1123 10:49:33.657404 PCI: 00:15.1: enabled 1
1124 10:49:33.660220 I2C: 00:50: enabled 1
1125 10:49:33.663699 PCI: 00:15.2: enabled 0
1126 10:49:33.666913 PCI: 00:15.3: enabled 1
1127 10:49:33.667327 I2C: 00:10: enabled 1
1128 10:49:33.670185 PCI: 00:16.0: enabled 1
1129 10:49:33.673624 PCI: 00:16.1: enabled 0
1130 10:49:33.676876 PCI: 00:16.2: enabled 0
1131 10:49:33.680553 PCI: 00:16.3: enabled 0
1132 10:49:33.680964 PCI: 00:16.4: enabled 0
1133 10:49:33.683707 PCI: 00:16.5: enabled 0
1134 10:49:33.687236 PCI: 00:17.0: enabled 1
1135 10:49:33.690660 PCI: 00:19.0: enabled 0
1136 10:49:33.693684 PCI: 00:19.1: enabled 1
1137 10:49:33.694096 I2C: 00:15: enabled 1
1138 10:49:33.697074 I2C: 00:2c: enabled 1
1139 10:49:33.700563 PCI: 00:19.2: enabled 0
1140 10:49:33.703475 PCI: 00:1a.0: enabled 0
1141 10:49:33.707042 PCI: 00:1e.0: enabled 1
1142 10:49:33.707455 PCI: 00:1e.1: enabled 0
1143 10:49:33.710508 PCI: 00:1e.2: enabled 0
1144 10:49:33.713599 PCI: 00:1e.3: enabled 1
1145 10:49:33.716943 SPI: 00: enabled 1
1146 10:49:33.717400 PCI: 00:1f.0: enabled 1
1147 10:49:33.720314 PNP: 0c09.0: enabled 1
1148 10:49:33.723266 PCI: 00:1f.1: enabled 0
1149 10:49:33.727017 PCI: 00:1f.2: enabled 1
1150 10:49:33.730569 GENERIC: 0.0: enabled 1
1151 10:49:33.730982 GENERIC: 0.0: enabled 1
1152 10:49:33.733488 GENERIC: 1.0: enabled 1
1153 10:49:33.737012 PCI: 00:1f.3: enabled 1
1154 10:49:33.740266 PCI: 00:1f.4: enabled 0
1155 10:49:33.743682 PCI: 00:1f.5: enabled 1
1156 10:49:33.744097 PCI: 00:1f.6: enabled 0
1157 10:49:33.746735 PCI: 00:1f.7: enabled 0
1158 10:49:33.750305 Root Device scanning...
1159 10:49:33.753835 scan_static_bus for Root Device
1160 10:49:33.756676 CPU_CLUSTER: 0 enabled
1161 10:49:33.757134 DOMAIN: 0000 enabled
1162 10:49:33.759959 DOMAIN: 0000 scanning...
1163 10:49:33.763337 PCI: pci_scan_bus for bus 00
1164 10:49:33.766986 PCI: 00:00.0 [8086/0000] ops
1165 10:49:33.769982 PCI: 00:00.0 [8086/4609] enabled
1166 10:49:33.773616 PCI: 00:02.0 [8086/0000] bus ops
1167 10:49:33.776766 PCI: 00:02.0 [8086/46b3] enabled
1168 10:49:33.780154 PCI: 00:04.0 [8086/0000] bus ops
1169 10:49:33.783183 PCI: 00:04.0 [8086/461d] enabled
1170 10:49:33.786606 PCI: 00:06.0 [8086/0000] bus ops
1171 10:49:33.790414 PCI: 00:06.0 [8086/464d] enabled
1172 10:49:33.793741 PCI: 00:08.0 [8086/464f] disabled
1173 10:49:33.796935 PCI: 00:0a.0 [8086/467d] enabled
1174 10:49:33.800563 PCI: 00:0d.0 [8086/0000] bus ops
1175 10:49:33.803484 PCI: 00:0d.0 [8086/461e] enabled
1176 10:49:33.806704 PCI: 00:14.0 [8086/0000] bus ops
1177 10:49:33.810113 PCI: 00:14.0 [8086/51ed] enabled
1178 10:49:33.813622 PCI: 00:14.2 [8086/51ef] enabled
1179 10:49:33.816651 PCI: 00:14.3 [8086/0000] bus ops
1180 10:49:33.820198 PCI: 00:14.3 [8086/51f0] enabled
1181 10:49:33.823714 PCI: 00:15.0 [8086/0000] bus ops
1182 10:49:33.826629 PCI: 00:15.0 [8086/51e8] enabled
1183 10:49:33.830155 PCI: 00:15.1 [8086/0000] bus ops
1184 10:49:33.833443 PCI: 00:15.1 [8086/51e9] enabled
1185 10:49:33.836315 PCI: 00:15.2 [8086/0000] bus ops
1186 10:49:33.839926 PCI: 00:15.2 [8086/51ea] disabled
1187 10:49:33.843393 PCI: 00:15.3 [8086/0000] bus ops
1188 10:49:33.846796 PCI: 00:15.3 [8086/51eb] enabled
1189 10:49:33.849797 PCI: 00:16.0 [8086/0000] ops
1190 10:49:33.853404 PCI: 00:16.0 [8086/51e0] enabled
1191 10:49:33.860070 PCI: Static device PCI: 00:17.0 not found, disabling it.
1192 10:49:33.863110 PCI: 00:19.0 [8086/0000] bus ops
1193 10:49:33.866476 PCI: 00:19.0 [8086/51c5] disabled
1194 10:49:33.869926 PCI: 00:19.1 [8086/0000] bus ops
1195 10:49:33.873400 PCI: 00:19.1 [8086/51c6] enabled
1196 10:49:33.876645 PCI: 00:1e.0 [8086/0000] ops
1197 10:49:33.879639 PCI: 00:1e.0 [8086/51a8] enabled
1198 10:49:33.883107 PCI: 00:1e.3 [8086/0000] bus ops
1199 10:49:33.886495 PCI: 00:1e.3 [8086/51ab] enabled
1200 10:49:33.890082 PCI: 00:1f.0 [8086/0000] bus ops
1201 10:49:33.893098 PCI: 00:1f.0 [8086/5182] enabled
1202 10:49:33.893560 RTC Init
1203 10:49:33.900009 Set power on after power failure.
1204 10:49:33.900471 Disabling Deep S3
1205 10:49:33.903373 Disabling Deep S3
1206 10:49:33.903878 Disabling Deep S4
1207 10:49:33.906327 Disabling Deep S4
1208 10:49:33.906831 Disabling Deep S5
1209 10:49:33.909794 Disabling Deep S5
1210 10:49:33.913410 PCI: 00:1f.2 [0000/0000] hidden
1211 10:49:33.916718 PCI: 00:1f.3 [8086/0000] bus ops
1212 10:49:33.919801 PCI: 00:1f.3 [8086/51c8] enabled
1213 10:49:33.923620 PCI: 00:1f.5 [8086/0000] bus ops
1214 10:49:33.926801 PCI: 00:1f.5 [8086/51a4] enabled
1215 10:49:33.927218 GPIO: 0 enabled
1216 10:49:33.930013 PCI: Leftover static devices:
1217 10:49:33.933438 PCI: 00:01.0
1218 10:49:33.933936 PCI: 00:01.1
1219 10:49:33.936565 PCI: 00:05.0
1220 10:49:33.937011 PCI: 00:06.2
1221 10:49:33.937361 PCI: 00:09.0
1222 10:49:33.940052 PCI: 00:0d.1
1223 10:49:33.940468 PCI: 00:0d.2
1224 10:49:33.943028 PCI: 00:0d.3
1225 10:49:33.943445 PCI: 00:0e.0
1226 10:49:33.943774 PCI: 00:10.0
1227 10:49:33.946576 PCI: 00:10.1
1228 10:49:33.946990 PCI: 00:10.6
1229 10:49:33.949874 PCI: 00:10.7
1230 10:49:33.950290 PCI: 00:12.0
1231 10:49:33.953310 PCI: 00:12.6
1232 10:49:33.953727 PCI: 00:12.7
1233 10:49:33.954094 PCI: 00:13.0
1234 10:49:33.956872 PCI: 00:14.1
1235 10:49:33.957342 PCI: 00:16.1
1236 10:49:33.959992 PCI: 00:16.2
1237 10:49:33.960407 PCI: 00:16.3
1238 10:49:33.960736 PCI: 00:16.4
1239 10:49:33.963456 PCI: 00:16.5
1240 10:49:33.963867 PCI: 00:17.0
1241 10:49:33.966939 PCI: 00:19.2
1242 10:49:33.967350 PCI: 00:1a.0
1243 10:49:33.967808 PCI: 00:1e.1
1244 10:49:33.969797 PCI: 00:1e.2
1245 10:49:33.970418 PCI: 00:1f.1
1246 10:49:33.973105 PCI: 00:1f.4
1247 10:49:33.973628 PCI: 00:1f.6
1248 10:49:33.974091 PCI: 00:1f.7
1249 10:49:33.976771 PCI: Check your devicetree.cb.
1250 10:49:33.979807 PCI: 00:02.0 scanning...
1251 10:49:33.983287 scan_generic_bus for PCI: 00:02.0
1252 10:49:33.986579 scan_generic_bus for PCI: 00:02.0 done
1253 10:49:33.993220 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1254 10:49:33.996211 PCI: 00:04.0 scanning...
1255 10:49:33.999887 scan_generic_bus for PCI: 00:04.0
1256 10:49:34.000301 GENERIC: 0.0 enabled
1257 10:49:34.006763 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1258 10:49:34.013285 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1259 10:49:34.013703 PCI: 00:06.0 scanning...
1260 10:49:34.016657 do_pci_scan_bridge for PCI: 00:06.0
1261 10:49:34.019575 PCI: pci_scan_bus for bus 01
1262 10:49:34.023005 PCI: 01:00.0 [15b7/5009] enabled
1263 10:49:34.026358 Enabling Common Clock Configuration
1264 10:49:34.032916 L1 Sub-State supported from root port 6
1265 10:49:34.033409 L1 Sub-State Support = 0x5
1266 10:49:34.036777 CommonModeRestoreTime = 0x6e
1267 10:49:34.043276 Power On Value = 0x5, Power On Scale = 0x2
1268 10:49:34.043940 ASPM: Enabled L1
1269 10:49:34.046709 PCIe: Max_Payload_Size adjusted to 256
1270 10:49:34.049854 PCI: 01:00.0: Enabled LTR
1271 10:49:34.053398 PCI: 01:00.0: Programmed LTR max latencies
1272 10:49:34.059609 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1273 10:49:34.063206 PCI: 00:0d.0 scanning...
1274 10:49:34.066179 scan_static_bus for PCI: 00:0d.0
1275 10:49:34.066577 USB0 port 0 enabled
1276 10:49:34.069840 USB0 port 0 scanning...
1277 10:49:34.073148 scan_static_bus for USB0 port 0
1278 10:49:34.073570 USB3 port 0 enabled
1279 10:49:34.076754 USB3 port 1 disabled
1280 10:49:34.079734 USB3 port 2 enabled
1281 10:49:34.080163 USB3 port 3 disabled
1282 10:49:34.083150 USB3 port 0 scanning...
1283 10:49:34.086554 scan_static_bus for USB3 port 0
1284 10:49:34.089499 scan_static_bus for USB3 port 0 done
1285 10:49:34.096600 scan_bus: bus USB3 port 0 finished in 6 msecs
1286 10:49:34.097091 USB3 port 2 scanning...
1287 10:49:34.100433 scan_static_bus for USB3 port 2
1288 10:49:34.103403 scan_static_bus for USB3 port 2 done
1289 10:49:34.109928 scan_bus: bus USB3 port 2 finished in 6 msecs
1290 10:49:34.112795 scan_static_bus for USB0 port 0 done
1291 10:49:34.116466 scan_bus: bus USB0 port 0 finished in 43 msecs
1292 10:49:34.119834 scan_static_bus for PCI: 00:0d.0 done
1293 10:49:34.126434 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1294 10:49:34.129670 PCI: 00:14.0 scanning...
1295 10:49:34.133074 scan_static_bus for PCI: 00:14.0
1296 10:49:34.133515 USB0 port 0 enabled
1297 10:49:34.136191 USB0 port 0 scanning...
1298 10:49:34.139609 scan_static_bus for USB0 port 0
1299 10:49:34.143028 USB2 port 0 enabled
1300 10:49:34.143456 USB2 port 1 disabled
1301 10:49:34.146462 USB2 port 2 enabled
1302 10:49:34.146881 USB2 port 3 disabled
1303 10:49:34.149970 USB2 port 4 disabled
1304 10:49:34.153603 USB2 port 5 enabled
1305 10:49:34.154151 USB2 port 6 disabled
1306 10:49:34.156638 USB2 port 7 disabled
1307 10:49:34.159609 USB2 port 8 enabled
1308 10:49:34.160031 USB2 port 9 enabled
1309 10:49:34.163004 USB3 port 0 enabled
1310 10:49:34.166663 USB3 port 1 disabled
1311 10:49:34.167106 USB3 port 2 disabled
1312 10:49:34.169827 USB3 port 3 disabled
1313 10:49:34.173361 USB2 port 0 scanning...
1314 10:49:34.176329 scan_static_bus for USB2 port 0
1315 10:49:34.179473 scan_static_bus for USB2 port 0 done
1316 10:49:34.182849 scan_bus: bus USB2 port 0 finished in 6 msecs
1317 10:49:34.186410 USB2 port 2 scanning...
1318 10:49:34.189383 scan_static_bus for USB2 port 2
1319 10:49:34.193040 scan_static_bus for USB2 port 2 done
1320 10:49:34.196450 scan_bus: bus USB2 port 2 finished in 6 msecs
1321 10:49:34.199697 USB2 port 5 scanning...
1322 10:49:34.203156 scan_static_bus for USB2 port 5
1323 10:49:34.206154 scan_static_bus for USB2 port 5 done
1324 10:49:34.209684 scan_bus: bus USB2 port 5 finished in 6 msecs
1325 10:49:34.213076 USB2 port 8 scanning...
1326 10:49:34.216435 scan_static_bus for USB2 port 8
1327 10:49:34.219420 scan_static_bus for USB2 port 8 done
1328 10:49:34.225978 scan_bus: bus USB2 port 8 finished in 6 msecs
1329 10:49:34.226479 USB2 port 9 scanning...
1330 10:49:34.229460 scan_static_bus for USB2 port 9
1331 10:49:34.232722 scan_static_bus for USB2 port 9 done
1332 10:49:34.239386 scan_bus: bus USB2 port 9 finished in 6 msecs
1333 10:49:34.242648 USB3 port 0 scanning...
1334 10:49:34.246053 scan_static_bus for USB3 port 0
1335 10:49:34.249567 scan_static_bus for USB3 port 0 done
1336 10:49:34.252535 scan_bus: bus USB3 port 0 finished in 6 msecs
1337 10:49:34.256101 scan_static_bus for USB0 port 0 done
1338 10:49:34.262940 scan_bus: bus USB0 port 0 finished in 120 msecs
1339 10:49:34.265940 scan_static_bus for PCI: 00:14.0 done
1340 10:49:34.269318 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1341 10:49:34.272735 PCI: 00:14.3 scanning...
1342 10:49:34.276035 scan_static_bus for PCI: 00:14.3
1343 10:49:34.279446 GENERIC: 0.0 enabled
1344 10:49:34.282682 scan_static_bus for PCI: 00:14.3 done
1345 10:49:34.286254 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1346 10:49:34.289791 PCI: 00:15.0 scanning...
1347 10:49:34.292781 scan_static_bus for PCI: 00:15.0
1348 10:49:34.293342 I2C: 00:1a enabled
1349 10:49:34.296228 I2C: 00:31 enabled
1350 10:49:34.299711 I2C: 00:32 enabled
1351 10:49:34.303131 scan_static_bus for PCI: 00:15.0 done
1352 10:49:34.306485 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1353 10:49:34.309459 PCI: 00:15.1 scanning...
1354 10:49:34.312764 scan_static_bus for PCI: 00:15.1
1355 10:49:34.316002 I2C: 00:50 enabled
1356 10:49:34.319321 scan_static_bus for PCI: 00:15.1 done
1357 10:49:34.322894 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1358 10:49:34.326122 PCI: 00:15.3 scanning...
1359 10:49:34.329633 scan_static_bus for PCI: 00:15.3
1360 10:49:34.330097 I2C: 00:10 enabled
1361 10:49:34.336098 scan_static_bus for PCI: 00:15.3 done
1362 10:49:34.339440 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1363 10:49:34.342995 PCI: 00:19.1 scanning...
1364 10:49:34.346178 scan_static_bus for PCI: 00:19.1
1365 10:49:34.346676 I2C: 00:15 enabled
1366 10:49:34.349523 I2C: 00:2c enabled
1367 10:49:34.352918 scan_static_bus for PCI: 00:19.1 done
1368 10:49:34.356360 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1369 10:49:34.359733 PCI: 00:1e.3 scanning...
1370 10:49:34.362707 scan_generic_bus for PCI: 00:1e.3
1371 10:49:34.366008 SPI: 00 enabled
1372 10:49:34.373020 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1373 10:49:34.376014 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1374 10:49:34.379600 PCI: 00:1f.0 scanning...
1375 10:49:34.382939 scan_static_bus for PCI: 00:1f.0
1376 10:49:34.383606 PNP: 0c09.0 enabled
1377 10:49:34.386211 PNP: 0c09.0 scanning...
1378 10:49:34.389448 scan_static_bus for PNP: 0c09.0
1379 10:49:34.392766 scan_static_bus for PNP: 0c09.0 done
1380 10:49:34.399473 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1381 10:49:34.402765 scan_static_bus for PCI: 00:1f.0 done
1382 10:49:34.406085 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1383 10:49:34.409551 PCI: 00:1f.2 scanning...
1384 10:49:34.412555 scan_static_bus for PCI: 00:1f.2
1385 10:49:34.415998 GENERIC: 0.0 enabled
1386 10:49:34.416416 GENERIC: 0.0 scanning...
1387 10:49:34.419309 scan_static_bus for GENERIC: 0.0
1388 10:49:34.422744 GENERIC: 0.0 enabled
1389 10:49:34.425841 GENERIC: 1.0 enabled
1390 10:49:34.429035 scan_static_bus for GENERIC: 0.0 done
1391 10:49:34.432341 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1392 10:49:34.435796 scan_static_bus for PCI: 00:1f.2 done
1393 10:49:34.442739 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1394 10:49:34.445837 PCI: 00:1f.3 scanning...
1395 10:49:34.449134 scan_static_bus for PCI: 00:1f.3
1396 10:49:34.452627 scan_static_bus for PCI: 00:1f.3 done
1397 10:49:34.455651 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1398 10:49:34.459264 PCI: 00:1f.5 scanning...
1399 10:49:34.462685 scan_generic_bus for PCI: 00:1f.5
1400 10:49:34.465700 scan_generic_bus for PCI: 00:1f.5 done
1401 10:49:34.472533 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1402 10:49:34.475960 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1403 10:49:34.479006 scan_static_bus for Root Device done
1404 10:49:34.485891 scan_bus: bus Root Device finished in 729 msecs
1405 10:49:34.486317 done
1406 10:49:34.492700 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1407 10:49:34.495723 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1408 10:49:34.502526 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1409 10:49:34.505592 SPI flash protection: WPSW=1 SRP0=0
1410 10:49:34.512220 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1411 10:49:34.515706 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1412 10:49:34.519037 found VGA at PCI: 00:02.0
1413 10:49:34.522310 Setting up VGA for PCI: 00:02.0
1414 10:49:34.529327 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1415 10:49:34.532213 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1416 10:49:34.535625 Allocating resources...
1417 10:49:34.539060 Reading resources...
1418 10:49:34.542726 Root Device read_resources bus 0 link: 0
1419 10:49:34.545393 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1420 10:49:34.552556 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1421 10:49:34.556015 DOMAIN: 0000 read_resources bus 0 link: 0
1422 10:49:34.562494 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1423 10:49:34.569009 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1424 10:49:34.575683 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1425 10:49:34.579287 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1426 10:49:34.585780 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1427 10:49:34.592559 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1428 10:49:34.598874 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1429 10:49:34.605502 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1430 10:49:34.612029 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1431 10:49:34.618834 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1432 10:49:34.625440 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1433 10:49:34.632315 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1434 10:49:34.638648 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1435 10:49:34.645344 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1436 10:49:34.651891 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1437 10:49:34.655319 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1438 10:49:34.662150 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1439 10:49:34.668687 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1440 10:49:34.675242 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1441 10:49:34.682042 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1442 10:49:34.688746 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1443 10:49:34.691647 PCI: 00:04.0 read_resources bus 1 link: 0
1444 10:49:34.695141 PCI: 00:04.0 read_resources bus 1 link: 0 done
1445 10:49:34.702060 PCI: 00:06.0 read_resources bus 1 link: 0
1446 10:49:34.704965 PCI: 00:06.0 read_resources bus 1 link: 0 done
1447 10:49:34.708460 PCI: 00:0d.0 read_resources bus 0 link: 0
1448 10:49:34.715228 USB0 port 0 read_resources bus 0 link: 0
1449 10:49:34.718291 USB0 port 0 read_resources bus 0 link: 0 done
1450 10:49:34.721816 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1451 10:49:34.728742 PCI: 00:14.0 read_resources bus 0 link: 0
1452 10:49:34.731854 USB0 port 0 read_resources bus 0 link: 0
1453 10:49:34.735223 USB0 port 0 read_resources bus 0 link: 0 done
1454 10:49:34.741752 PCI: 00:14.0 read_resources bus 0 link: 0 done
1455 10:49:34.745057 PCI: 00:14.3 read_resources bus 0 link: 0
1456 10:49:34.748515 PCI: 00:14.3 read_resources bus 0 link: 0 done
1457 10:49:34.755573 PCI: 00:15.0 read_resources bus 0 link: 0
1458 10:49:34.758709 PCI: 00:15.0 read_resources bus 0 link: 0 done
1459 10:49:34.761956 PCI: 00:15.1 read_resources bus 0 link: 0
1460 10:49:34.768564 PCI: 00:15.1 read_resources bus 0 link: 0 done
1461 10:49:34.772277 PCI: 00:15.3 read_resources bus 0 link: 0
1462 10:49:34.778570 PCI: 00:15.3 read_resources bus 0 link: 0 done
1463 10:49:34.782137 PCI: 00:19.1 read_resources bus 0 link: 0
1464 10:49:34.785261 PCI: 00:19.1 read_resources bus 0 link: 0 done
1465 10:49:34.791940 PCI: 00:1e.3 read_resources bus 2 link: 0
1466 10:49:34.795526 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1467 10:49:34.798824 PCI: 00:1f.0 read_resources bus 0 link: 0
1468 10:49:34.805493 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1469 10:49:34.808501 PCI: 00:1f.2 read_resources bus 0 link: 0
1470 10:49:34.811931 GENERIC: 0.0 read_resources bus 0 link: 0
1471 10:49:34.818789 GENERIC: 0.0 read_resources bus 0 link: 0 done
1472 10:49:34.822306 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1473 10:49:34.828947 DOMAIN: 0000 read_resources bus 0 link: 0 done
1474 10:49:34.832294 Root Device read_resources bus 0 link: 0 done
1475 10:49:34.835343 Done reading resources.
1476 10:49:34.838927 Show resources in subtree (Root Device)...After reading.
1477 10:49:34.845228 Root Device child on link 0 CPU_CLUSTER: 0
1478 10:49:34.848554 CPU_CLUSTER: 0 child on link 0 APIC: 00
1479 10:49:34.849009 APIC: 00
1480 10:49:34.851989 APIC: 1e
1481 10:49:34.852406 APIC: 18
1482 10:49:34.852738 APIC: 1a
1483 10:49:34.855659 APIC: 1c
1484 10:49:34.856077 APIC: 09
1485 10:49:34.858860 APIC: 01
1486 10:49:34.859451 APIC: 08
1487 10:49:34.862345 DOMAIN: 0000 child on link 0 GPIO: 0
1488 10:49:34.872199 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1489 10:49:34.882000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1490 10:49:34.882425 GPIO: 0
1491 10:49:34.885668 PCI: 00:00.0
1492 10:49:34.895624 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1493 10:49:34.901902 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1494 10:49:34.912208 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1495 10:49:34.922159 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1496 10:49:34.931981 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1497 10:49:34.942023 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1498 10:49:34.952113 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1499 10:49:34.958416 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1500 10:49:34.968552 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1501 10:49:34.978527 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1502 10:49:34.988212 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1503 10:49:34.998374 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1504 10:49:35.008216 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1505 10:49:35.018382 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1506 10:49:35.024905 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1507 10:49:35.034965 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1508 10:49:35.044597 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1509 10:49:35.054436 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1510 10:49:35.064194 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1511 10:49:35.074283 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1512 10:49:35.084634 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1513 10:49:35.091153 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1514 10:49:35.101185 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1515 10:49:35.111341 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1516 10:49:35.121101 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1517 10:49:35.131206 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1518 10:49:35.141553 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1519 10:49:35.151417 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1520 10:49:35.151881 PCI: 00:02.0
1521 10:49:35.161098 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1522 10:49:35.171054 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1523 10:49:35.181039 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1524 10:49:35.184320 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1525 10:49:35.194216 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1526 10:49:35.198256 GENERIC: 0.0
1527 10:49:35.201022 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1528 10:49:35.211226 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1529 10:49:35.220924 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1530 10:49:35.231068 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1531 10:49:35.231612 PCI: 01:00.0
1532 10:49:35.241083 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1533 10:49:35.250849 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1534 10:49:35.254211 PCI: 00:08.0
1535 10:49:35.254701 PCI: 00:0a.0
1536 10:49:35.264023 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1537 10:49:35.267468 PCI: 00:0d.0 child on link 0 USB0 port 0
1538 10:49:35.277310 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1539 10:49:35.283972 USB0 port 0 child on link 0 USB3 port 0
1540 10:49:35.284396 USB3 port 0
1541 10:49:35.287503 USB3 port 1
1542 10:49:35.287970 USB3 port 2
1543 10:49:35.290932 USB3 port 3
1544 10:49:35.293925 PCI: 00:14.0 child on link 0 USB0 port 0
1545 10:49:35.304449 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1546 10:49:35.307388 USB0 port 0 child on link 0 USB2 port 0
1547 10:49:35.310966 USB2 port 0
1548 10:49:35.313976 USB2 port 1
1549 10:49:35.314398 USB2 port 2
1550 10:49:35.317402 USB2 port 3
1551 10:49:35.317824 USB2 port 4
1552 10:49:35.320661 USB2 port 5
1553 10:49:35.321112 USB2 port 6
1554 10:49:35.323849 USB2 port 7
1555 10:49:35.324269 USB2 port 8
1556 10:49:35.327343 USB2 port 9
1557 10:49:35.327943 USB3 port 0
1558 10:49:35.330687 USB3 port 1
1559 10:49:35.331107 USB3 port 2
1560 10:49:35.334370 USB3 port 3
1561 10:49:35.334792 PCI: 00:14.2
1562 10:49:35.344304 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1563 10:49:35.354109 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1564 10:49:35.360571 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1565 10:49:35.370582 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1566 10:49:35.371027 GENERIC: 0.0
1567 10:49:35.377271 PCI: 00:15.0 child on link 0 I2C: 00:1a
1568 10:49:35.387544 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1569 10:49:35.387973 I2C: 00:1a
1570 10:49:35.388308 I2C: 00:31
1571 10:49:35.390881 I2C: 00:32
1572 10:49:35.393787 PCI: 00:15.1 child on link 0 I2C: 00:50
1573 10:49:35.403964 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1574 10:49:35.407165 I2C: 00:50
1575 10:49:35.407629 PCI: 00:15.2
1576 10:49:35.410739 PCI: 00:15.3 child on link 0 I2C: 00:10
1577 10:49:35.420499 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1578 10:49:35.423956 I2C: 00:10
1579 10:49:35.424376 PCI: 00:16.0
1580 10:49:35.434074 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1581 10:49:35.437234 PCI: 00:19.0
1582 10:49:35.440359 PCI: 00:19.1 child on link 0 I2C: 00:15
1583 10:49:35.450528 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1584 10:49:35.453892 I2C: 00:15
1585 10:49:35.454373 I2C: 00:2c
1586 10:49:35.457242 PCI: 00:1e.0
1587 10:49:35.467480 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1588 10:49:35.470604 PCI: 00:1e.3 child on link 0 SPI: 00
1589 10:49:35.480656 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1590 10:49:35.484322 SPI: 00
1591 10:49:35.487882 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1592 10:49:35.497286 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1593 10:49:35.497755 PNP: 0c09.0
1594 10:49:35.506940 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1595 10:49:35.510284 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1596 10:49:35.520236 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1597 10:49:35.530475 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1598 10:49:35.533605 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1599 10:49:35.536895 GENERIC: 0.0
1600 10:49:35.537357 GENERIC: 1.0
1601 10:49:35.540476 PCI: 00:1f.3
1602 10:49:35.550452 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1603 10:49:35.560415 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1604 10:49:35.560857 PCI: 00:1f.5
1605 10:49:35.570434 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1606 10:49:35.576869 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1607 10:49:35.583823 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1608 10:49:35.590739 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1609 10:49:35.593828 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1610 10:49:35.600375 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1611 10:49:35.603891 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1612 10:49:35.610526 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1613 10:49:35.617127 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1614 10:49:35.627048 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1615 10:49:35.633800 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1616 10:49:35.640484 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1617 10:49:35.646932 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1618 10:49:35.653551 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1619 10:49:35.663447 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1620 10:49:35.666821 DOMAIN: 0000: Resource ranges:
1621 10:49:35.670104 * Base: 1000, Size: 800, Tag: 100
1622 10:49:35.673465 * Base: 1900, Size: e700, Tag: 100
1623 10:49:35.676636 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1624 10:49:35.683472 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1625 10:49:35.689862 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1626 10:49:35.700377 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1627 10:49:35.706803 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1628 10:49:35.713374 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1629 10:49:35.723235 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1630 10:49:35.730363 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1631 10:49:35.736550 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1632 10:49:35.747092 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1633 10:49:35.753420 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1634 10:49:35.760278 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1635 10:49:35.766773 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1636 10:49:35.777056 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1637 10:49:35.783480 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1638 10:49:35.789955 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1639 10:49:35.800059 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1640 10:49:35.806366 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1641 10:49:35.813256 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1642 10:49:35.823219 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1643 10:49:35.829748 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1644 10:49:35.836549 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1645 10:49:35.846792 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1646 10:49:35.853262 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1647 10:49:35.859886 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1648 10:49:35.869904 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1649 10:49:35.876388 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1650 10:49:35.883103 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1651 10:49:35.892955 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1652 10:49:35.899734 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1653 10:49:35.906453 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1654 10:49:35.916486 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1655 10:49:35.923004 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1656 10:49:35.926515 DOMAIN: 0000: Resource ranges:
1657 10:49:35.929759 * Base: 80400000, Size: 3fc00000, Tag: 200
1658 10:49:35.933128 * Base: d0000000, Size: 28000000, Tag: 200
1659 10:49:35.939860 * Base: fa000000, Size: 1000000, Tag: 200
1660 10:49:35.943042 * Base: fb001000, Size: 17ff000, Tag: 200
1661 10:49:35.946403 * Base: fe800000, Size: 300000, Tag: 200
1662 10:49:35.952835 * Base: feb80000, Size: 80000, Tag: 200
1663 10:49:35.956102 * Base: fed00000, Size: 40000, Tag: 200
1664 10:49:35.959465 * Base: fed70000, Size: 10000, Tag: 200
1665 10:49:35.963050 * Base: fed88000, Size: 8000, Tag: 200
1666 10:49:35.965974 * Base: fed93000, Size: d000, Tag: 200
1667 10:49:35.972953 * Base: feda2000, Size: 1e000, Tag: 200
1668 10:49:35.976300 * Base: fede0000, Size: 1220000, Tag: 200
1669 10:49:35.979489 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1670 10:49:35.989319 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1671 10:49:35.996047 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1672 10:49:36.002607 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1673 10:49:36.009453 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1674 10:49:36.015810 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1675 10:49:36.022870 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1676 10:49:36.029308 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1677 10:49:36.036088 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1678 10:49:36.042377 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1679 10:49:36.049201 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1680 10:49:36.055727 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1681 10:49:36.062402 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1682 10:49:36.069313 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1683 10:49:36.075953 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1684 10:49:36.082174 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1685 10:49:36.089103 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1686 10:49:36.095634 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1687 10:49:36.102398 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1688 10:49:36.108965 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1689 10:49:36.115883 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1690 10:49:36.122028 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1691 10:49:36.125423 PCI: 00:06.0: Resource ranges:
1692 10:49:36.128730 * Base: 80400000, Size: 100000, Tag: 200
1693 10:49:36.135663 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1694 10:49:36.142427 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1695 10:49:36.151949 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1696 10:49:36.158838 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1697 10:49:36.162333 Root Device assign_resources, bus 0 link: 0
1698 10:49:36.169346 DOMAIN: 0000 assign_resources, bus 0 link: 0
1699 10:49:36.176022 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1700 10:49:36.185179 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1701 10:49:36.191936 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1702 10:49:36.198879 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1703 10:49:36.205463 PCI: 00:04.0 assign_resources, bus 1 link: 0
1704 10:49:36.208396 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1705 10:49:36.218480 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1706 10:49:36.228427 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1707 10:49:36.235008 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1708 10:49:36.241923 PCI: 00:06.0 assign_resources, bus 1 link: 0
1709 10:49:36.248314 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1710 10:49:36.258507 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1711 10:49:36.261791 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1712 10:49:36.268582 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1713 10:49:36.278103 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1714 10:49:36.281409 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1715 10:49:36.287947 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1716 10:49:36.294864 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1717 10:49:36.301483 PCI: 00:14.0 assign_resources, bus 0 link: 0
1718 10:49:36.304713 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1719 10:49:36.311260 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1720 10:49:36.321334 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1721 10:49:36.327861 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1722 10:49:36.334416 PCI: 00:14.3 assign_resources, bus 0 link: 0
1723 10:49:36.337803 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1724 10:49:36.348131 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1725 10:49:36.351337 PCI: 00:15.0 assign_resources, bus 0 link: 0
1726 10:49:36.354631 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1727 10:49:36.364579 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1728 10:49:36.367936 PCI: 00:15.1 assign_resources, bus 0 link: 0
1729 10:49:36.374576 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1730 10:49:36.381185 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1731 10:49:36.384212 PCI: 00:15.3 assign_resources, bus 0 link: 0
1732 10:49:36.391038 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1733 10:49:36.397821 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1734 10:49:36.407949 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1735 10:49:36.411080 PCI: 00:19.1 assign_resources, bus 0 link: 0
1736 10:49:36.417797 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1737 10:49:36.424420 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1738 10:49:36.427611 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1739 10:49:36.434499 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1740 10:49:36.437589 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1741 10:49:36.444029 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1742 10:49:36.447345 LPC: Trying to open IO window from 800 size 1ff
1743 10:49:36.457451 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1744 10:49:36.463920 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1745 10:49:36.470726 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1746 10:49:36.477562 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1747 10:49:36.480429 Root Device assign_resources, bus 0 link: 0 done
1748 10:49:36.484219 Done setting resources.
1749 10:49:36.490576 Show resources in subtree (Root Device)...After assigning values.
1750 10:49:36.494360 Root Device child on link 0 CPU_CLUSTER: 0
1751 10:49:36.500346 CPU_CLUSTER: 0 child on link 0 APIC: 00
1752 10:49:36.500821 APIC: 00
1753 10:49:36.501296 APIC: 1e
1754 10:49:36.504059 APIC: 18
1755 10:49:36.504528 APIC: 1a
1756 10:49:36.507536 APIC: 1c
1757 10:49:36.508007 APIC: 09
1758 10:49:36.508482 APIC: 01
1759 10:49:36.510547 APIC: 08
1760 10:49:36.514035 DOMAIN: 0000 child on link 0 GPIO: 0
1761 10:49:36.524101 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1762 10:49:36.533894 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1763 10:49:36.534371 GPIO: 0
1764 10:49:36.534847 PCI: 00:00.0
1765 10:49:36.543969 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1766 10:49:36.554326 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1767 10:49:36.563972 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1768 10:49:36.573875 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1769 10:49:36.583426 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1770 10:49:36.590264 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1771 10:49:36.600141 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1772 10:49:36.610144 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1773 10:49:36.619916 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1774 10:49:36.630087 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1775 10:49:36.640229 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1776 10:49:36.649939 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1777 10:49:36.656956 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1778 10:49:36.666846 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1779 10:49:36.676348 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1780 10:49:36.686620 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1781 10:49:36.696321 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1782 10:49:36.706543 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1783 10:49:36.716693 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1784 10:49:36.726682 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1785 10:49:36.733026 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1786 10:49:36.742762 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1787 10:49:36.752883 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1788 10:49:36.763001 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1789 10:49:36.772934 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1790 10:49:36.782898 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1791 10:49:36.792447 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1792 10:49:36.799476 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1793 10:49:36.802580 PCI: 00:02.0
1794 10:49:36.812624 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1795 10:49:36.822602 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1796 10:49:36.832666 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1797 10:49:36.839060 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1798 10:49:36.848941 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1799 10:49:36.849453 GENERIC: 0.0
1800 10:49:36.855966 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1801 10:49:36.862299 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1802 10:49:36.875508 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1803 10:49:36.885524 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1804 10:49:36.888929 PCI: 01:00.0
1805 10:49:36.898952 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1806 10:49:36.908900 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1807 10:49:36.909433 PCI: 00:08.0
1808 10:49:36.911909 PCI: 00:0a.0
1809 10:49:36.922115 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1810 10:49:36.925546 PCI: 00:0d.0 child on link 0 USB0 port 0
1811 10:49:36.935165 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1812 10:49:36.942288 USB0 port 0 child on link 0 USB3 port 0
1813 10:49:36.942750 USB3 port 0
1814 10:49:36.945401 USB3 port 1
1815 10:49:36.945863 USB3 port 2
1816 10:49:36.948735 USB3 port 3
1817 10:49:36.952216 PCI: 00:14.0 child on link 0 USB0 port 0
1818 10:49:36.961865 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1819 10:49:36.968734 USB0 port 0 child on link 0 USB2 port 0
1820 10:49:36.969246 USB2 port 0
1821 10:49:36.971964 USB2 port 1
1822 10:49:36.972456 USB2 port 2
1823 10:49:36.975355 USB2 port 3
1824 10:49:36.975757 USB2 port 4
1825 10:49:36.979174 USB2 port 5
1826 10:49:36.979657 USB2 port 6
1827 10:49:36.982238 USB2 port 7
1828 10:49:36.982698 USB2 port 8
1829 10:49:36.985612 USB2 port 9
1830 10:49:36.986071 USB3 port 0
1831 10:49:36.988903 USB3 port 1
1832 10:49:36.991996 USB3 port 2
1833 10:49:36.992455 USB3 port 3
1834 10:49:36.995343 PCI: 00:14.2
1835 10:49:37.005635 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1836 10:49:37.015069 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1837 10:49:37.018494 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1838 10:49:37.028324 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1839 10:49:37.031860 GENERIC: 0.0
1840 10:49:37.035239 PCI: 00:15.0 child on link 0 I2C: 00:1a
1841 10:49:37.045117 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1842 10:49:37.048460 I2C: 00:1a
1843 10:49:37.049025 I2C: 00:31
1844 10:49:37.051725 I2C: 00:32
1845 10:49:37.055118 PCI: 00:15.1 child on link 0 I2C: 00:50
1846 10:49:37.064794 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1847 10:49:37.065320 I2C: 00:50
1848 10:49:37.068301 PCI: 00:15.2
1849 10:49:37.071792 PCI: 00:15.3 child on link 0 I2C: 00:10
1850 10:49:37.081830 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1851 10:49:37.085089 I2C: 00:10
1852 10:49:37.085553 PCI: 00:16.0
1853 10:49:37.095207 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1854 10:49:37.098195 PCI: 00:19.0
1855 10:49:37.101545 PCI: 00:19.1 child on link 0 I2C: 00:15
1856 10:49:37.111360 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1857 10:49:37.115044 I2C: 00:15
1858 10:49:37.115602 I2C: 00:2c
1859 10:49:37.118464 PCI: 00:1e.0
1860 10:49:37.128132 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1861 10:49:37.131508 PCI: 00:1e.3 child on link 0 SPI: 00
1862 10:49:37.144504 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1863 10:49:37.145089 SPI: 00
1864 10:49:37.148197 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1865 10:49:37.158063 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1866 10:49:37.158568 PNP: 0c09.0
1867 10:49:37.167808 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1868 10:49:37.171190 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1869 10:49:37.181162 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1870 10:49:37.191431 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1871 10:49:37.194470 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1872 10:49:37.197941 GENERIC: 0.0
1873 10:49:37.198533 GENERIC: 1.0
1874 10:49:37.201241 PCI: 00:1f.3
1875 10:49:37.211050 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1876 10:49:37.221503 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1877 10:49:37.224175 PCI: 00:1f.5
1878 10:49:37.234639 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1879 10:49:37.237559 Done allocating resources.
1880 10:49:37.241036 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1881 10:49:37.248207 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1882 10:49:37.254451 Configure audio over I2S with MAX98373 NAU88L25B.
1883 10:49:37.258178 Enabling BT offload
1884 10:49:37.265187 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1885 10:49:37.268237 Enabling resources...
1886 10:49:37.271461 PCI: 00:00.0 subsystem <- 8086/4609
1887 10:49:37.274908 PCI: 00:00.0 cmd <- 06
1888 10:49:37.278560 PCI: 00:02.0 subsystem <- 8086/46b3
1889 10:49:37.281775 PCI: 00:02.0 cmd <- 03
1890 10:49:37.285266 PCI: 00:04.0 subsystem <- 8086/461d
1891 10:49:37.285687 PCI: 00:04.0 cmd <- 02
1892 10:49:37.288140 PCI: 00:06.0 bridge ctrl <- 0013
1893 10:49:37.291609 PCI: 00:06.0 subsystem <- 8086/464d
1894 10:49:37.294911 PCI: 00:06.0 cmd <- 106
1895 10:49:37.298348 PCI: 00:0a.0 subsystem <- 8086/467d
1896 10:49:37.301632 PCI: 00:0a.0 cmd <- 02
1897 10:49:37.305077 PCI: 00:0d.0 subsystem <- 8086/461e
1898 10:49:37.308501 PCI: 00:0d.0 cmd <- 02
1899 10:49:37.311335 PCI: 00:14.0 subsystem <- 8086/51ed
1900 10:49:37.314721 PCI: 00:14.0 cmd <- 02
1901 10:49:37.318221 PCI: 00:14.2 subsystem <- 8086/51ef
1902 10:49:37.318661 PCI: 00:14.2 cmd <- 02
1903 10:49:37.321733 PCI: 00:14.3 subsystem <- 8086/51f0
1904 10:49:37.324624 PCI: 00:14.3 cmd <- 02
1905 10:49:37.328107 PCI: 00:15.0 subsystem <- 8086/51e8
1906 10:49:37.331623 PCI: 00:15.0 cmd <- 02
1907 10:49:37.334953 PCI: 00:15.1 subsystem <- 8086/51e9
1908 10:49:37.338286 PCI: 00:15.1 cmd <- 06
1909 10:49:37.341339 PCI: 00:15.3 subsystem <- 8086/51eb
1910 10:49:37.344560 PCI: 00:15.3 cmd <- 02
1911 10:49:37.348070 PCI: 00:16.0 subsystem <- 8086/51e0
1912 10:49:37.348489 PCI: 00:16.0 cmd <- 02
1913 10:49:37.351479 PCI: 00:19.1 subsystem <- 8086/51c6
1914 10:49:37.354607 PCI: 00:19.1 cmd <- 02
1915 10:49:37.357870 PCI: 00:1e.0 subsystem <- 8086/51a8
1916 10:49:37.361225 PCI: 00:1e.0 cmd <- 06
1917 10:49:37.364737 PCI: 00:1e.3 subsystem <- 8086/51ab
1918 10:49:37.368225 PCI: 00:1e.3 cmd <- 02
1919 10:49:37.371227 PCI: 00:1f.0 subsystem <- 8086/5182
1920 10:49:37.374764 PCI: 00:1f.0 cmd <- 407
1921 10:49:37.378207 PCI: 00:1f.3 subsystem <- 8086/51c8
1922 10:49:37.378628 PCI: 00:1f.3 cmd <- 02
1923 10:49:37.381482 PCI: 00:1f.5 subsystem <- 8086/51a4
1924 10:49:37.384566 PCI: 00:1f.5 cmd <- 406
1925 10:49:37.387895 PCI: 01:00.0 cmd <- 02
1926 10:49:37.388315 done.
1927 10:49:37.394450 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1928 10:49:37.397769 ME: Version: Unavailable
1929 10:49:37.401193 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1930 10:49:37.405119 Initializing devices...
1931 10:49:37.407781 Root Device init
1932 10:49:37.408436 mainboard: EC init
1933 10:49:37.411381 Chrome EC: Set SMI mask to 0x0000000000000000
1934 10:49:37.414659 Chrome EC: UHEPI supported
1935 10:49:37.421932 Chrome EC: clear events_b mask to 0x0000000000000000
1936 10:49:37.428326 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1937 10:49:37.434732 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1938 10:49:37.438281 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1939 10:49:37.446028 Chrome EC: Set WAKE mask to 0x0000000000000000
1940 10:49:37.452277 Root Device init finished in 40 msecs
1941 10:49:37.453130 PCI: 00:00.0 init
1942 10:49:37.455493 CPU TDP = 15 Watts
1943 10:49:37.459151 CPU PL1 = 15 Watts
1944 10:49:37.459808 CPU PL2 = 55 Watts
1945 10:49:37.462028 CPU PL4 = 123 Watts
1946 10:49:37.465859 PCI: 00:00.0 init finished in 8 msecs
1947 10:49:37.469350 PCI: 00:02.0 init
1948 10:49:37.469973 GMA: Found VBT in CBFS
1949 10:49:37.472098 GMA: Found valid VBT in CBFS
1950 10:49:37.478845 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1951 10:49:37.485568 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1952 10:49:37.489061 PCI: 00:02.0 init finished in 18 msecs
1953 10:49:37.492101 PCI: 00:06.0 init
1954 10:49:37.495202 Initializing PCH PCIe bridge.
1955 10:49:37.498513 PCI: 00:06.0 init finished in 3 msecs
1956 10:49:37.499117 PCI: 00:0a.0 init
1957 10:49:37.505469 PCI: 00:0a.0 init finished in 0 msecs
1958 10:49:37.505894 PCI: 00:14.0 init
1959 10:49:37.509017 PCI: 00:14.0 init finished in 0 msecs
1960 10:49:37.511897 PCI: 00:14.2 init
1961 10:49:37.515614 PCI: 00:14.2 init finished in 0 msecs
1962 10:49:37.518960 PCI: 00:15.0 init
1963 10:49:37.519470 I2C bus 0 version 0x3230302a
1964 10:49:37.525422 DW I2C bus 0 at 0x80655000 (400 KHz)
1965 10:49:37.528858 PCI: 00:15.0 init finished in 6 msecs
1966 10:49:37.529316 PCI: 00:15.1 init
1967 10:49:37.532425 I2C bus 1 version 0x3230302a
1968 10:49:37.535361 DW I2C bus 1 at 0x80656000 (400 KHz)
1969 10:49:37.538688 PCI: 00:15.1 init finished in 6 msecs
1970 10:49:37.542268 PCI: 00:15.3 init
1971 10:49:37.545344 I2C bus 3 version 0x3230302a
1972 10:49:37.548885 DW I2C bus 3 at 0x80657000 (400 KHz)
1973 10:49:37.551908 PCI: 00:15.3 init finished in 6 msecs
1974 10:49:37.555424 PCI: 00:16.0 init
1975 10:49:37.558842 PCI: 00:16.0 init finished in 0 msecs
1976 10:49:37.559303 PCI: 00:19.1 init
1977 10:49:37.562348 I2C bus 5 version 0x3230302a
1978 10:49:37.565232 DW I2C bus 5 at 0x80659000 (400 KHz)
1979 10:49:37.571839 PCI: 00:19.1 init finished in 6 msecs
1980 10:49:37.572383 PCI: 00:1f.0 init
1981 10:49:37.575547 IOAPIC: Initializing IOAPIC at 0xfec00000
1982 10:49:37.578751 IOAPIC: ID = 0x02
1983 10:49:37.582342 IOAPIC: Dumping registers
1984 10:49:37.585427 reg 0x0000: 0x02000000
1985 10:49:37.585828 reg 0x0001: 0x00770020
1986 10:49:37.588811 reg 0x0002: 0x00000000
1987 10:49:37.591779 IOAPIC: 120 interrupts
1988 10:49:37.595309 IOAPIC: Clearing IOAPIC at 0xfec00000
1989 10:49:37.598694 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1990 10:49:37.605132 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1991 10:49:37.608849 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1992 10:49:37.615272 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1993 10:49:37.619033 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1994 10:49:37.625273 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1995 10:49:37.628338 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1996 10:49:37.631751 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1997 10:49:37.638551 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1998 10:49:37.642101 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1999 10:49:37.648435 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2000 10:49:37.651819 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2001 10:49:37.658388 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2002 10:49:37.661601 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2003 10:49:37.668633 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2004 10:49:37.671810 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2005 10:49:37.674909 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2006 10:49:37.681681 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2007 10:49:37.685340 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2008 10:49:37.691503 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2009 10:49:37.694928 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2010 10:49:37.701731 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2011 10:49:37.705063 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2012 10:49:37.711476 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2013 10:49:37.714859 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2014 10:49:37.718097 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2015 10:49:37.724969 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2016 10:49:37.728432 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2017 10:49:37.734964 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2018 10:49:37.738077 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2019 10:49:37.745049 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2020 10:49:37.747998 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2021 10:49:37.754684 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2022 10:49:37.758060 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2023 10:49:37.761513 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2024 10:49:37.767821 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2025 10:49:37.771306 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2026 10:49:37.778450 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2027 10:49:37.781559 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2028 10:49:37.787976 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2029 10:49:37.791302 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2030 10:49:37.794871 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2031 10:49:37.801533 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2032 10:49:37.804484 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2033 10:49:37.811389 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2034 10:49:37.815103 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2035 10:49:37.821297 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2036 10:49:37.824429 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2037 10:49:37.831935 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2038 10:49:37.834641 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2039 10:49:37.837875 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2040 10:49:37.844813 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2041 10:49:37.847895 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2042 10:49:37.854390 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2043 10:49:37.857775 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2044 10:49:37.864610 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2045 10:49:37.867872 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2046 10:49:37.874467 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2047 10:49:37.877980 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2048 10:49:37.881231 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2049 10:49:37.887534 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2050 10:49:37.890870 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2051 10:49:37.897780 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2052 10:49:37.901253 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2053 10:49:37.907849 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2054 10:49:37.911137 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2055 10:49:37.914498 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2056 10:49:37.921042 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2057 10:49:37.924377 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2058 10:49:37.931452 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2059 10:49:37.934334 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2060 10:49:37.941182 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2061 10:49:37.944284 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2062 10:49:37.950993 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2063 10:49:37.954503 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2064 10:49:37.960667 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2065 10:49:37.963957 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2066 10:49:37.967456 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2067 10:49:37.974311 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2068 10:49:37.977308 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2069 10:49:37.983736 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2070 10:49:37.987127 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2071 10:49:37.993999 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2072 10:49:37.997216 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2073 10:49:38.003929 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2074 10:49:38.007372 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2075 10:49:38.010383 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2076 10:49:38.017270 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2077 10:49:38.020708 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2078 10:49:38.027131 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2079 10:49:38.030214 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2080 10:49:38.037119 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2081 10:49:38.040573 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2082 10:49:38.043746 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2083 10:49:38.050770 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2084 10:49:38.053736 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2085 10:49:38.060215 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2086 10:49:38.063490 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2087 10:49:38.070377 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2088 10:49:38.073624 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2089 10:49:38.080498 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2090 10:49:38.083551 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2091 10:49:38.090357 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2092 10:49:38.093295 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2093 10:49:38.096638 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2094 10:49:38.103275 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2095 10:49:38.107058 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2096 10:49:38.113332 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2097 10:49:38.116737 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2098 10:49:38.123566 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2099 10:49:38.126659 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2100 10:49:38.130061 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2101 10:49:38.137063 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2102 10:49:38.139902 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2103 10:49:38.146802 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2104 10:49:38.149876 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2105 10:49:38.156745 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2106 10:49:38.160144 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2107 10:49:38.166763 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2108 10:49:38.170055 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2109 10:49:38.173422 IOAPIC: Bootstrap Processor Local APIC = 0x00
2110 10:49:38.180152 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2111 10:49:38.183414 PCI: 00:1f.0 init finished in 607 msecs
2112 10:49:38.186468 PCI: 00:1f.2 init
2113 10:49:38.189464 apm_control: Disabling ACPI.
2114 10:49:38.192807 APMC done.
2115 10:49:38.196204 PCI: 00:1f.2 init finished in 6 msecs
2116 10:49:38.199929 PCI: 00:1f.3 init
2117 10:49:38.203010 PCI: 00:1f.3 init finished in 0 msecs
2118 10:49:38.203450 PCI: 01:00.0 init
2119 10:49:38.206379 PCI: 01:00.0 init finished in 0 msecs
2120 10:49:38.209877 PNP: 0c09.0 init
2121 10:49:38.213016 Google Chrome EC uptime: 12.037 seconds
2122 10:49:38.219755 Google Chrome AP resets since EC boot: 1
2123 10:49:38.223136 Google Chrome most recent AP reset causes:
2124 10:49:38.226515 0.338: 32775 shutdown: entering G3
2125 10:49:38.232691 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2126 10:49:38.236299 PNP: 0c09.0 init finished in 23 msecs
2127 10:49:38.240100 GENERIC: 0.0 init
2128 10:49:38.242885 GENERIC: 0.0 init finished in 0 msecs
2129 10:49:38.243322 GENERIC: 1.0 init
2130 10:49:38.246277 GENERIC: 1.0 init finished in 0 msecs
2131 10:49:38.249817 Devices initialized
2132 10:49:38.253279 Show all devs... After init.
2133 10:49:38.256831 Root Device: enabled 1
2134 10:49:38.259578 CPU_CLUSTER: 0: enabled 1
2135 10:49:38.260238 DOMAIN: 0000: enabled 1
2136 10:49:38.263019 GPIO: 0: enabled 1
2137 10:49:38.266196 PCI: 00:00.0: enabled 1
2138 10:49:38.266608 PCI: 00:01.0: enabled 0
2139 10:49:38.269290 PCI: 00:01.1: enabled 0
2140 10:49:38.272789 PCI: 00:02.0: enabled 1
2141 10:49:38.275888 PCI: 00:04.0: enabled 1
2142 10:49:38.276301 PCI: 00:05.0: enabled 0
2143 10:49:38.279334 PCI: 00:06.0: enabled 1
2144 10:49:38.282705 PCI: 00:06.2: enabled 0
2145 10:49:38.283160 PCI: 00:07.0: enabled 0
2146 10:49:38.285939 PCI: 00:07.1: enabled 0
2147 10:49:38.289490 PCI: 00:07.2: enabled 0
2148 10:49:38.292618 PCI: 00:07.3: enabled 0
2149 10:49:38.293170 PCI: 00:08.0: enabled 0
2150 10:49:38.296136 PCI: 00:09.0: enabled 0
2151 10:49:38.299194 PCI: 00:0a.0: enabled 1
2152 10:49:38.302559 PCI: 00:0d.0: enabled 1
2153 10:49:38.303117 PCI: 00:0d.1: enabled 0
2154 10:49:38.306068 PCI: 00:0d.2: enabled 0
2155 10:49:38.309589 PCI: 00:0d.3: enabled 0
2156 10:49:38.312760 PCI: 00:0e.0: enabled 0
2157 10:49:38.313274 PCI: 00:10.0: enabled 0
2158 10:49:38.316172 PCI: 00:10.1: enabled 0
2159 10:49:38.318959 PCI: 00:10.6: enabled 0
2160 10:49:38.322461 PCI: 00:10.7: enabled 0
2161 10:49:38.323212 PCI: 00:12.0: enabled 0
2162 10:49:38.325727 PCI: 00:12.6: enabled 0
2163 10:49:38.328919 PCI: 00:12.7: enabled 0
2164 10:49:38.329465 PCI: 00:13.0: enabled 0
2165 10:49:38.332137 PCI: 00:14.0: enabled 1
2166 10:49:38.335706 PCI: 00:14.1: enabled 0
2167 10:49:38.339099 PCI: 00:14.2: enabled 1
2168 10:49:38.339521 PCI: 00:14.3: enabled 1
2169 10:49:38.342552 PCI: 00:15.0: enabled 1
2170 10:49:38.345929 PCI: 00:15.1: enabled 1
2171 10:49:38.348875 PCI: 00:15.2: enabled 0
2172 10:49:38.349344 PCI: 00:15.3: enabled 1
2173 10:49:38.352222 PCI: 00:16.0: enabled 1
2174 10:49:38.355467 PCI: 00:16.1: enabled 0
2175 10:49:38.359275 PCI: 00:16.2: enabled 0
2176 10:49:38.359730 PCI: 00:16.3: enabled 0
2177 10:49:38.362097 PCI: 00:16.4: enabled 0
2178 10:49:38.365522 PCI: 00:16.5: enabled 0
2179 10:49:38.368941 PCI: 00:17.0: enabled 0
2180 10:49:38.369570 PCI: 00:19.0: enabled 0
2181 10:49:38.372024 PCI: 00:19.1: enabled 1
2182 10:49:38.375550 PCI: 00:19.2: enabled 0
2183 10:49:38.375969 PCI: 00:1a.0: enabled 0
2184 10:49:38.379030 PCI: 00:1c.0: enabled 0
2185 10:49:38.382358 PCI: 00:1c.1: enabled 0
2186 10:49:38.385470 PCI: 00:1c.2: enabled 0
2187 10:49:38.385889 PCI: 00:1c.3: enabled 0
2188 10:49:38.389103 PCI: 00:1c.4: enabled 0
2189 10:49:38.391847 PCI: 00:1c.5: enabled 0
2190 10:49:38.395319 PCI: 00:1c.6: enabled 0
2191 10:49:38.395739 PCI: 00:1c.7: enabled 0
2192 10:49:38.398913 PCI: 00:1d.0: enabled 0
2193 10:49:38.402294 PCI: 00:1d.1: enabled 0
2194 10:49:38.405357 PCI: 00:1d.2: enabled 0
2195 10:49:38.405780 PCI: 00:1d.3: enabled 0
2196 10:49:38.408627 PCI: 00:1e.0: enabled 1
2197 10:49:38.412000 PCI: 00:1e.1: enabled 0
2198 10:49:38.412422 PCI: 00:1e.2: enabled 0
2199 10:49:38.415429 PCI: 00:1e.3: enabled 1
2200 10:49:38.418392 PCI: 00:1f.0: enabled 1
2201 10:49:38.421794 PCI: 00:1f.1: enabled 0
2202 10:49:38.422300 PCI: 00:1f.2: enabled 1
2203 10:49:38.425322 PCI: 00:1f.3: enabled 1
2204 10:49:38.428432 PCI: 00:1f.4: enabled 0
2205 10:49:38.431755 PCI: 00:1f.5: enabled 1
2206 10:49:38.432174 PCI: 00:1f.6: enabled 0
2207 10:49:38.435180 PCI: 00:1f.7: enabled 0
2208 10:49:38.438400 GENERIC: 0.0: enabled 1
2209 10:49:38.441654 GENERIC: 0.0: enabled 1
2210 10:49:38.442174 GENERIC: 1.0: enabled 1
2211 10:49:38.444865 GENERIC: 0.0: enabled 1
2212 10:49:38.448412 GENERIC: 1.0: enabled 1
2213 10:49:38.452028 USB0 port 0: enabled 1
2214 10:49:38.452471 USB0 port 0: enabled 1
2215 10:49:38.454961 GENERIC: 0.0: enabled 1
2216 10:49:38.458488 I2C: 00:1a: enabled 1
2217 10:49:38.458907 I2C: 00:31: enabled 1
2218 10:49:38.461554 I2C: 00:32: enabled 1
2219 10:49:38.465414 I2C: 00:50: enabled 1
2220 10:49:38.465834 I2C: 00:10: enabled 1
2221 10:49:38.468375 I2C: 00:15: enabled 1
2222 10:49:38.471851 I2C: 00:2c: enabled 1
2223 10:49:38.472274 GENERIC: 0.0: enabled 1
2224 10:49:38.474943 SPI: 00: enabled 1
2225 10:49:38.478408 PNP: 0c09.0: enabled 1
2226 10:49:38.478828 GENERIC: 0.0: enabled 1
2227 10:49:38.481920 USB3 port 0: enabled 1
2228 10:49:38.484737 USB3 port 1: enabled 0
2229 10:49:38.488302 USB3 port 2: enabled 1
2230 10:49:38.488718 USB3 port 3: enabled 0
2231 10:49:38.491676 USB2 port 0: enabled 1
2232 10:49:38.494867 USB2 port 1: enabled 0
2233 10:49:38.495287 USB2 port 2: enabled 1
2234 10:49:38.498208 USB2 port 3: enabled 0
2235 10:49:38.501784 USB2 port 4: enabled 0
2236 10:49:38.505499 USB2 port 5: enabled 1
2237 10:49:38.505927 USB2 port 6: enabled 0
2238 10:49:38.508274 USB2 port 7: enabled 0
2239 10:49:38.511331 USB2 port 8: enabled 1
2240 10:49:38.511750 USB2 port 9: enabled 1
2241 10:49:38.515122 USB3 port 0: enabled 1
2242 10:49:38.518223 USB3 port 1: enabled 0
2243 10:49:38.518772 USB3 port 2: enabled 0
2244 10:49:38.521590 USB3 port 3: enabled 0
2245 10:49:38.525184 GENERIC: 0.0: enabled 1
2246 10:49:38.528241 GENERIC: 1.0: enabled 1
2247 10:49:38.528661 APIC: 00: enabled 1
2248 10:49:38.531661 APIC: 1e: enabled 1
2249 10:49:38.532079 APIC: 18: enabled 1
2250 10:49:38.535265 APIC: 1a: enabled 1
2251 10:49:38.538266 APIC: 1c: enabled 1
2252 10:49:38.538685 APIC: 09: enabled 1
2253 10:49:38.541588 APIC: 01: enabled 1
2254 10:49:38.544932 APIC: 08: enabled 1
2255 10:49:38.545395 PCI: 01:00.0: enabled 1
2256 10:49:38.551980 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2257 10:49:38.555068 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2258 10:49:38.561151 ELOG: NV offset 0xf20000 size 0x4000
2259 10:49:38.567935 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2260 10:49:38.574764 ELOG: Event(17) added with size 13 at 2024-02-23 10:49:38 UTC
2261 10:49:38.581313 ELOG: Event(9E) added with size 10 at 2024-02-23 10:49:38 UTC
2262 10:49:38.588041 ELOG: Event(9F) added with size 14 at 2024-02-23 10:49:38 UTC
2263 10:49:38.594440 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2264 10:49:38.601231 ELOG: Event(A0) added with size 9 at 2024-02-23 10:49:38 UTC
2265 10:49:38.604483 elog_add_boot_reason: Logged dev mode boot
2266 10:49:38.611871 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2267 10:49:38.612337 Finalize devices...
2268 10:49:38.614623 PCI: 00:16.0 final
2269 10:49:38.615084 PCI: 00:1f.2 final
2270 10:49:38.617597 GENERIC: 0.0 final
2271 10:49:38.624491 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2272 10:49:38.624957 GENERIC: 1.0 final
2273 10:49:38.631123 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2274 10:49:38.634513 Devices finalized
2275 10:49:38.640949 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2276 10:49:38.644432 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2277 10:49:38.651204 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2278 10:49:38.654223 ME: HFSTS1 : 0x90000245
2279 10:49:38.660764 ME: HFSTS2 : 0x82100116
2280 10:49:38.663959 ME: HFSTS3 : 0x00000050
2281 10:49:38.667237 ME: HFSTS4 : 0x00004000
2282 10:49:38.674169 ME: HFSTS5 : 0x00000000
2283 10:49:38.677519 ME: HFSTS6 : 0x40600006
2284 10:49:38.680541 ME: Manufacturing Mode : NO
2285 10:49:38.684066 ME: SPI Protection Mode Enabled : YES
2286 10:49:38.687048 ME: FPFs Committed : YES
2287 10:49:38.694024 ME: Manufacturing Vars Locked : YES
2288 10:49:38.696946 ME: FW Partition Table : OK
2289 10:49:38.700397 ME: Bringup Loader Failure : NO
2290 10:49:38.703767 ME: Firmware Init Complete : YES
2291 10:49:38.707168 ME: Boot Options Present : NO
2292 10:49:38.710564 ME: Update In Progress : NO
2293 10:49:38.713947 ME: D0i3 Support : YES
2294 10:49:38.716918 ME: Low Power State Enabled : NO
2295 10:49:38.723881 ME: CPU Replaced : YES
2296 10:49:38.727265 ME: CPU Replacement Valid : YES
2297 10:49:38.730601 ME: Current Working State : 5
2298 10:49:38.733576 ME: Current Operation State : 1
2299 10:49:38.736967 ME: Current Operation Mode : 0
2300 10:49:38.740803 ME: Error Code : 0
2301 10:49:38.743746 ME: Enhanced Debug Mode : NO
2302 10:49:38.747051 ME: CPU Debug Disabled : YES
2303 10:49:38.753760 ME: TXT Support : NO
2304 10:49:38.756867 ME: WP for RO is enabled : YES
2305 10:49:38.760389 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2306 10:49:38.766901 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2307 10:49:38.770395 Ramoops buffer: 0x100000@0x76899000.
2308 10:49:38.777041 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2309 10:49:38.783289 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2310 10:49:38.786886 CBFS: 'fallback/slic' not found.
2311 10:49:38.793288 ACPI: Writing ACPI tables at 7686d000.
2312 10:49:38.793709 ACPI: * FACS
2313 10:49:38.796820 ACPI: * DSDT
2314 10:49:38.803269 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2315 10:49:38.806694 ACPI: * FADT
2316 10:49:38.807112 SCI is IRQ9
2317 10:49:38.810058 ACPI: added table 1/32, length now 40
2318 10:49:38.813365 ACPI: * SSDT
2319 10:49:38.816377 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2320 10:49:38.823997 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2321 10:49:38.827304 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2322 10:49:38.830675 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2323 10:49:38.837019 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2324 10:49:38.843784 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2325 10:49:38.850604 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2326 10:49:38.853764 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2327 10:49:38.860532 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2328 10:49:38.863979 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2329 10:49:38.870371 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2330 10:49:38.873792 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2331 10:49:38.880835 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2332 10:49:38.883955 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2333 10:49:38.890928 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2334 10:49:38.894422 PS2K: Passing 80 keymaps to kernel
2335 10:49:38.900953 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2336 10:49:38.907383 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2337 10:49:38.914212 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2338 10:49:38.920695 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2339 10:49:38.927363 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2340 10:49:38.934098 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2341 10:49:38.937517 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2342 10:49:38.943889 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2343 10:49:38.950980 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2344 10:49:38.957095 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2345 10:49:38.960813 ACPI: added table 2/32, length now 44
2346 10:49:38.963940 ACPI: * MCFG
2347 10:49:38.967123 ACPI: added table 3/32, length now 48
2348 10:49:38.967588 ACPI: * TPM2
2349 10:49:38.970914 TPM2 log created at 0x7685d000
2350 10:49:38.973776 ACPI: added table 4/32, length now 52
2351 10:49:38.977347 ACPI: * LPIT
2352 10:49:38.980300 ACPI: added table 5/32, length now 56
2353 10:49:38.983799 ACPI: * MADT
2354 10:49:38.984263 SCI is IRQ9
2355 10:49:38.987053 ACPI: added table 6/32, length now 60
2356 10:49:38.990644 cmd_reg from pmc_make_ipc_cmd 1052838
2357 10:49:38.997377 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2358 10:49:39.003979 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2359 10:49:39.010307 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2360 10:49:39.013846 PMC CrashLog size in discovery mode: 0xC00
2361 10:49:39.017195 cpu crashlog bar addr: 0x80640000
2362 10:49:39.020572 cpu discovery table offset: 0x6030
2363 10:49:39.027314 cpu_crashlog_discovery_table buffer count: 0x3
2364 10:49:39.033754 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2365 10:49:39.040547 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2366 10:49:39.047018 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2367 10:49:39.050463 PMC crashLog size in discovery mode : 0xC00
2368 10:49:39.056896 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2369 10:49:39.063762 discover mode PMC crashlog size adjusted to: 0x200
2370 10:49:39.070254 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2371 10:49:39.073512 discover mode PMC crashlog size adjusted to: 0x0
2372 10:49:39.076793 m_cpu_crashLog_size : 0x3480 bytes
2373 10:49:39.080082 CPU crashLog present.
2374 10:49:39.083541 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2375 10:49:39.089842 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2376 10:49:39.093133 current = 76876550
2377 10:49:39.096490 ACPI: * DMAR
2378 10:49:39.100334 ACPI: added table 7/32, length now 64
2379 10:49:39.103445 ACPI: added table 8/32, length now 68
2380 10:49:39.103910 ACPI: * HPET
2381 10:49:39.110270 ACPI: added table 9/32, length now 72
2382 10:49:39.110731 ACPI: done.
2383 10:49:39.113268 ACPI tables: 38528 bytes.
2384 10:49:39.117058 smbios_write_tables: 76857000
2385 10:49:39.120568 EC returned error result code 3
2386 10:49:39.123845 Couldn't obtain OEM name from CBI
2387 10:49:39.127168 Create SMBIOS type 16
2388 10:49:39.127630 Create SMBIOS type 17
2389 10:49:39.130256 Create SMBIOS type 20
2390 10:49:39.133896 GENERIC: 0.0 (WIFI Device)
2391 10:49:39.137208 SMBIOS tables: 2156 bytes.
2392 10:49:39.140513 Writing table forward entry at 0x00000500
2393 10:49:39.146946 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2394 10:49:39.150287 Writing coreboot table at 0x76891000
2395 10:49:39.156932 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2396 10:49:39.160388 1. 0000000000001000-000000000009ffff: RAM
2397 10:49:39.163747 2. 00000000000a0000-00000000000fffff: RESERVED
2398 10:49:39.170108 3. 0000000000100000-0000000076856fff: RAM
2399 10:49:39.173622 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2400 10:49:39.180570 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2401 10:49:39.187233 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2402 10:49:39.190406 7. 0000000077000000-00000000803fffff: RESERVED
2403 10:49:39.196612 8. 00000000c0000000-00000000cfffffff: RESERVED
2404 10:49:39.200483 9. 00000000f8000000-00000000f9ffffff: RESERVED
2405 10:49:39.203285 10. 00000000fb000000-00000000fb000fff: RESERVED
2406 10:49:39.210232 11. 00000000fc800000-00000000fe7fffff: RESERVED
2407 10:49:39.213494 12. 00000000feb00000-00000000feb7ffff: RESERVED
2408 10:49:39.220265 13. 00000000fec00000-00000000fecfffff: RESERVED
2409 10:49:39.223249 14. 00000000fed40000-00000000fed6ffff: RESERVED
2410 10:49:39.230015 15. 00000000fed80000-00000000fed87fff: RESERVED
2411 10:49:39.233433 16. 00000000fed90000-00000000fed92fff: RESERVED
2412 10:49:39.239909 17. 00000000feda0000-00000000feda1fff: RESERVED
2413 10:49:39.243206 18. 00000000fedc0000-00000000feddffff: RESERVED
2414 10:49:39.246708 19. 0000000100000000-000000027fbfffff: RAM
2415 10:49:39.250253 Passing 4 GPIOs to payload:
2416 10:49:39.256620 NAME | PORT | POLARITY | VALUE
2417 10:49:39.260059 lid | undefined | high | high
2418 10:49:39.266757 power | undefined | high | low
2419 10:49:39.270244 oprom | undefined | high | low
2420 10:49:39.276590 EC in RW | 0x00000151 | high | high
2421 10:49:39.277095 Board ID: 3
2422 10:49:39.280008 FW config: 0x131
2423 10:49:39.286326 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 650
2424 10:49:39.289852 coreboot table: 1788 bytes.
2425 10:49:39.293441 IMD ROOT 0. 0x76fff000 0x00001000
2426 10:49:39.296645 IMD SMALL 1. 0x76ffe000 0x00001000
2427 10:49:39.300407 FSP MEMORY 2. 0x76afe000 0x00500000
2428 10:49:39.303667 CONSOLE 3. 0x76ade000 0x00020000
2429 10:49:39.306694 RW MCACHE 4. 0x76add000 0x0000043c
2430 10:49:39.309938 RO MCACHE 5. 0x76adc000 0x00000fd8
2431 10:49:39.313471 FMAP 6. 0x76adb000 0x0000064a
2432 10:49:39.320561 TIME STAMP 7. 0x76ada000 0x00000910
2433 10:49:39.323710 VBOOT WORK 8. 0x76ac6000 0x00014000
2434 10:49:39.326961 MEM INFO 9. 0x76ac5000 0x000003b8
2435 10:49:39.329947 ROMSTG STCK10. 0x76ac4000 0x00001000
2436 10:49:39.333360 AFTER CAR 11. 0x76ab8000 0x0000c000
2437 10:49:39.336641 RAMSTAGE 12. 0x76a2e000 0x0008a000
2438 10:49:39.340038 ACPI BERT 13. 0x76a1e000 0x00010000
2439 10:49:39.343591 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2440 10:49:39.350267 REFCODE 15. 0x769ae000 0x0006f000
2441 10:49:39.353640 SMM BACKUP 16. 0x7699e000 0x00010000
2442 10:49:39.356483 IGD OPREGION17. 0x76999000 0x00004203
2443 10:49:39.359895 RAMOOPS 18. 0x76899000 0x00100000
2444 10:49:39.363425 COREBOOT 19. 0x76891000 0x00008000
2445 10:49:39.367027 ACPI 20. 0x7686d000 0x00024000
2446 10:49:39.370006 TPM2 TCGLOG21. 0x7685d000 0x00010000
2447 10:49:39.373773 PMC CRASHLOG22. 0x7685c000 0x00000c00
2448 10:49:39.379918 CPU CRASHLOG23. 0x76858000 0x00003480
2449 10:49:39.383412 SMBIOS 24. 0x76857000 0x00001000
2450 10:49:39.383927 IMD small region:
2451 10:49:39.386581 IMD ROOT 0. 0x76ffec00 0x00000400
2452 10:49:39.393495 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2453 10:49:39.397005 VPD 2. 0x76ffeb60 0x0000006c
2454 10:49:39.399933 POWER STATE 3. 0x76ffeb00 0x00000044
2455 10:49:39.403220 ROMSTAGE 4. 0x76ffeae0 0x00000004
2456 10:49:39.407087 ACPI GNVS 5. 0x76ffea80 0x00000048
2457 10:49:39.410355 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2458 10:49:39.417108 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2459 10:49:39.420056 MTRR: Physical address space:
2460 10:49:39.426613 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2461 10:49:39.434307 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2462 10:49:39.440377 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2463 10:49:39.446577 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2464 10:49:39.453340 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2465 10:49:39.456724 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2466 10:49:39.463336 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2467 10:49:39.469857 MTRR: Fixed MSR 0x250 0x0606060606060606
2468 10:49:39.473423 MTRR: Fixed MSR 0x258 0x0606060606060606
2469 10:49:39.476651 MTRR: Fixed MSR 0x259 0x0000000000000000
2470 10:49:39.479926 MTRR: Fixed MSR 0x268 0x0606060606060606
2471 10:49:39.483545 MTRR: Fixed MSR 0x269 0x0606060606060606
2472 10:49:39.489924 MTRR: Fixed MSR 0x26a 0x0606060606060606
2473 10:49:39.493356 MTRR: Fixed MSR 0x26b 0x0606060606060606
2474 10:49:39.496376 MTRR: Fixed MSR 0x26c 0x0606060606060606
2475 10:49:39.499786 MTRR: Fixed MSR 0x26d 0x0606060606060606
2476 10:49:39.506860 MTRR: Fixed MSR 0x26e 0x0606060606060606
2477 10:49:39.509841 MTRR: Fixed MSR 0x26f 0x0606060606060606
2478 10:49:39.513254 call enable_fixed_mtrr()
2479 10:49:39.516423 CPU physical address size: 39 bits
2480 10:49:39.519912 MTRR: default type WB/UC MTRR counts: 6/6.
2481 10:49:39.526472 MTRR: UC selected as default type.
2482 10:49:39.530013 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2483 10:49:39.536546 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2484 10:49:39.542841 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2485 10:49:39.549427 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2486 10:49:39.556254 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2487 10:49:39.563068 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2488 10:49:39.569429 MTRR: Fixed MSR 0x250 0x0606060606060606
2489 10:49:39.573010 MTRR: Fixed MSR 0x258 0x0606060606060606
2490 10:49:39.576410 MTRR: Fixed MSR 0x259 0x0000000000000000
2491 10:49:39.579490 MTRR: Fixed MSR 0x268 0x0606060606060606
2492 10:49:39.582604 MTRR: Fixed MSR 0x269 0x0606060606060606
2493 10:49:39.589545 MTRR: Fixed MSR 0x26a 0x0606060606060606
2494 10:49:39.592949 MTRR: Fixed MSR 0x26b 0x0606060606060606
2495 10:49:39.595890 MTRR: Fixed MSR 0x26c 0x0606060606060606
2496 10:49:39.599447 MTRR: Fixed MSR 0x26d 0x0606060606060606
2497 10:49:39.605924 MTRR: Fixed MSR 0x26e 0x0606060606060606
2498 10:49:39.609300 MTRR: Fixed MSR 0x26f 0x0606060606060606
2499 10:49:39.612917 MTRR: Fixed MSR 0x250 0x0606060606060606
2500 10:49:39.615956 MTRR: Fixed MSR 0x250 0x0606060606060606
2501 10:49:39.622740 MTRR: Fixed MSR 0x250 0x0606060606060606
2502 10:49:39.623209 call enable_fixed_mtrr()
2503 10:49:39.629240 MTRR: Fixed MSR 0x250 0x0606060606060606
2504 10:49:39.632734 MTRR: Fixed MSR 0x258 0x0606060606060606
2505 10:49:39.635692 MTRR: Fixed MSR 0x259 0x0000000000000000
2506 10:49:39.639276 MTRR: Fixed MSR 0x268 0x0606060606060606
2507 10:49:39.645861 MTRR: Fixed MSR 0x269 0x0606060606060606
2508 10:49:39.649019 MTRR: Fixed MSR 0x26a 0x0606060606060606
2509 10:49:39.652896 MTRR: Fixed MSR 0x26b 0x0606060606060606
2510 10:49:39.655659 MTRR: Fixed MSR 0x26c 0x0606060606060606
2511 10:49:39.659303 MTRR: Fixed MSR 0x26d 0x0606060606060606
2512 10:49:39.665869 MTRR: Fixed MSR 0x26e 0x0606060606060606
2513 10:49:39.668795 MTRR: Fixed MSR 0x26f 0x0606060606060606
2514 10:49:39.672228 CPU physical address size: 39 bits
2515 10:49:39.675212 MTRR: Fixed MSR 0x250 0x0606060606060606
2516 10:49:39.678677 call enable_fixed_mtrr()
2517 10:49:39.682319 MTRR: Fixed MSR 0x250 0x0606060606060606
2518 10:49:39.688659 MTRR: Fixed MSR 0x258 0x0606060606060606
2519 10:49:39.692034 MTRR: Fixed MSR 0x258 0x0606060606060606
2520 10:49:39.695494 CPU physical address size: 39 bits
2521 10:49:39.699059 MTRR: Fixed MSR 0x258 0x0606060606060606
2522 10:49:39.702077 MTRR: Fixed MSR 0x259 0x0000000000000000
2523 10:49:39.708841 MTRR: Fixed MSR 0x258 0x0606060606060606
2524 10:49:39.712241 MTRR: Fixed MSR 0x259 0x0000000000000000
2525 10:49:39.715756 MTRR: Fixed MSR 0x268 0x0606060606060606
2526 10:49:39.718769 MTRR: Fixed MSR 0x269 0x0606060606060606
2527 10:49:39.725572 MTRR: Fixed MSR 0x259 0x0000000000000000
2528 10:49:39.729018 MTRR: Fixed MSR 0x268 0x0606060606060606
2529 10:49:39.732095 MTRR: Fixed MSR 0x269 0x0606060606060606
2530 10:49:39.735455 MTRR: Fixed MSR 0x26a 0x0606060606060606
2531 10:49:39.742118 MTRR: Fixed MSR 0x26b 0x0606060606060606
2532 10:49:39.745556 MTRR: Fixed MSR 0x26c 0x0606060606060606
2533 10:49:39.748849 MTRR: Fixed MSR 0x26d 0x0606060606060606
2534 10:49:39.752226 MTRR: Fixed MSR 0x26e 0x0606060606060606
2535 10:49:39.758779 MTRR: Fixed MSR 0x26f 0x0606060606060606
2536 10:49:39.762348 MTRR: Fixed MSR 0x268 0x0606060606060606
2537 10:49:39.765488 call enable_fixed_mtrr()
2538 10:49:39.768579 MTRR: Fixed MSR 0x26a 0x0606060606060606
2539 10:49:39.771987 CPU physical address size: 39 bits
2540 10:49:39.775019 MTRR: Fixed MSR 0x26b 0x0606060606060606
2541 10:49:39.778544 MTRR: Fixed MSR 0x269 0x0606060606060606
2542 10:49:39.785228 MTRR: Fixed MSR 0x259 0x0000000000000000
2543 10:49:39.788390 MTRR: Fixed MSR 0x26c 0x0606060606060606
2544 10:49:39.791628 MTRR: Fixed MSR 0x26d 0x0606060606060606
2545 10:49:39.794924 MTRR: Fixed MSR 0x26e 0x0606060606060606
2546 10:49:39.798638 MTRR: Fixed MSR 0x26f 0x0606060606060606
2547 10:49:39.805018 MTRR: Fixed MSR 0x26a 0x0606060606060606
2548 10:49:39.808606 MTRR: Fixed MSR 0x268 0x0606060606060606
2549 10:49:39.812526 MTRR: Fixed MSR 0x26b 0x0606060606060606
2550 10:49:39.815225 MTRR: Fixed MSR 0x26c 0x0606060606060606
2551 10:49:39.821834 MTRR: Fixed MSR 0x26d 0x0606060606060606
2552 10:49:39.824869 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 10:49:39.828422 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 10:49:39.831801 MTRR: Fixed MSR 0x269 0x0606060606060606
2555 10:49:39.834825 call enable_fixed_mtrr()
2556 10:49:39.838409 MTRR: Fixed MSR 0x26a 0x0606060606060606
2557 10:49:39.845006 MTRR: Fixed MSR 0x26b 0x0606060606060606
2558 10:49:39.848085 MTRR: Fixed MSR 0x26c 0x0606060606060606
2559 10:49:39.851360 MTRR: Fixed MSR 0x26d 0x0606060606060606
2560 10:49:39.854998 MTRR: Fixed MSR 0x26e 0x0606060606060606
2561 10:49:39.858184 MTRR: Fixed MSR 0x26f 0x0606060606060606
2562 10:49:39.865284 CPU physical address size: 39 bits
2563 10:49:39.865754 call enable_fixed_mtrr()
2564 10:49:39.868042 call enable_fixed_mtrr()
2565 10:49:39.871632 CPU physical address size: 39 bits
2566 10:49:39.875125 MTRR: Fixed MSR 0x258 0x0606060606060606
2567 10:49:39.878244 CPU physical address size: 39 bits
2568 10:49:39.884568 MTRR: Fixed MSR 0x259 0x0000000000000000
2569 10:49:39.887957 MTRR: Fixed MSR 0x268 0x0606060606060606
2570 10:49:39.891360 MTRR: Fixed MSR 0x269 0x0606060606060606
2571 10:49:39.895055 MTRR: Fixed MSR 0x26a 0x0606060606060606
2572 10:49:39.901577 MTRR: Fixed MSR 0x26b 0x0606060606060606
2573 10:49:39.904661 MTRR: Fixed MSR 0x26c 0x0606060606060606
2574 10:49:39.907899 MTRR: Fixed MSR 0x26d 0x0606060606060606
2575 10:49:39.911369 MTRR: Fixed MSR 0x26e 0x0606060606060606
2576 10:49:39.918276 MTRR: Fixed MSR 0x26f 0x0606060606060606
2577 10:49:39.921374 call enable_fixed_mtrr()
2578 10:49:39.924751 CPU physical address size: 39 bits
2579 10:49:39.925218
2580 10:49:39.928202 MTRR check
2581 10:49:39.928622 Fixed MTRRs : Enabled
2582 10:49:39.931358 Variable MTRRs: Enabled
2583 10:49:39.931779
2584 10:49:39.937913 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2585 10:49:39.940929 Checking cr50 for pending updates
2586 10:49:39.953245 Reading cr50 TPM mode
2587 10:49:39.968284 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2588 10:49:39.978011 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2589 10:49:39.981425 Checking segment from ROM address 0xf96cbe6c
2590 10:49:39.984598 Checking segment from ROM address 0xf96cbe88
2591 10:49:39.991389 Loading segment from ROM address 0xf96cbe6c
2592 10:49:39.991497 code (compression=1)
2593 10:49:40.001239 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2594 10:49:40.007657 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2595 10:49:40.010921 using LZMA
2596 10:49:40.034032 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2597 10:49:40.040712 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2598 10:49:40.048746 Loading segment from ROM address 0xf96cbe88
2599 10:49:40.052180 Entry Point 0x30000000
2600 10:49:40.052258 Loaded segments
2601 10:49:40.058838 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2602 10:49:40.065293 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2603 10:49:40.068617 Finalizing chipset.
2604 10:49:40.068720 apm_control: Finalizing SMM.
2605 10:49:40.071952 APMC done.
2606 10:49:40.075534 HECI: CSE device 16.1 is disabled
2607 10:49:40.078588 HECI: CSE device 16.2 is disabled
2608 10:49:40.081910 HECI: CSE device 16.3 is disabled
2609 10:49:40.085560 HECI: CSE device 16.4 is disabled
2610 10:49:40.088585 HECI: CSE device 16.5 is disabled
2611 10:49:40.092028 HECI: Sending End-of-Post
2612 10:49:40.100042 CSE: EOP requested action: continue boot
2613 10:49:40.103209 CSE EOP successful, continuing boot
2614 10:49:40.109924 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2615 10:49:40.113533 mp_park_aps done after 0 msecs.
2616 10:49:40.116853 Jumping to boot code at 0x30000000(0x76891000)
2617 10:49:40.126727 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2618 10:49:40.130906
2619 10:49:40.130981
2620 10:49:40.131049
2621 10:49:40.134025 Starting depthcharge on Volmar...
2622 10:49:40.134098
2623 10:49:40.134585 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2624 10:49:40.134695 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2625 10:49:40.134778 Setting prompt string to ['brya:']
2626 10:49:40.134861 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2627 10:49:40.140640 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2628 10:49:40.140753
2629 10:49:40.147552 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2630 10:49:40.147655
2631 10:49:40.153965 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2632 10:49:40.154044
2633 10:49:40.157560 configure_storage: Failed to remap 1C:2
2634 10:49:40.157662
2635 10:49:40.160976 Wipe memory regions:
2636 10:49:40.161083
2637 10:49:40.164013 [0x00000000001000, 0x000000000a0000)
2638 10:49:40.164086
2639 10:49:40.167434 [0x00000000100000, 0x00000030000000)
2640 10:49:40.276967
2641 10:49:40.280403 [0x00000032668e60, 0x00000076857000)
2642 10:49:40.431948
2643 10:49:40.435157 [0x00000100000000, 0x0000027fc00000)
2644 10:49:41.290689
2645 10:49:41.293950 ec_init: CrosEC protocol v3 supported (256, 256)
2646 10:49:41.903569
2647 10:49:41.903747 R8152: Initializing
2648 10:49:41.903847
2649 10:49:41.906315 Version 9 (ocp_data = 6010)
2650 10:49:41.906392
2651 10:49:41.909654 R8152: Done initializing
2652 10:49:41.909728
2653 10:49:41.912931 Adding net device
2654 10:49:42.214347
2655 10:49:42.217561 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2656 10:49:42.218194
2657 10:49:42.218724
2658 10:49:42.219235
2659 10:49:42.220220 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2661 10:49:42.321782 brya: tftpboot 192.168.201.1 12838025/tftp-deploy-q3k0t1hv/kernel/bzImage 12838025/tftp-deploy-q3k0t1hv/kernel/cmdline 12838025/tftp-deploy-q3k0t1hv/ramdisk/ramdisk.cpio.gz
2662 10:49:42.322316 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2663 10:49:42.322860 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2664 10:49:42.327469 tftpboot 192.168.201.1 12838025/tftp-deploy-q3k0t1hv/kernel/bzIploy-q3k0t1hv/kernel/cmdline 12838025/tftp-deploy-q3k0t1hv/ramdisk/ramdisk.cpio.gz
2665 10:49:42.327971
2666 10:49:42.328338 Waiting for link
2667 10:49:42.530011
2668 10:49:42.530506 done.
2669 10:49:42.530843
2670 10:49:42.531158 MAC: 00:e0:4c:68:05:c6
2671 10:49:42.531466
2672 10:49:42.533464 Sending DHCP discover... done.
2673 10:49:42.533928
2674 10:49:42.536753 Waiting for reply... done.
2675 10:49:42.537393
2676 10:49:42.540066 Sending DHCP request... done.
2677 10:49:42.540594
2678 10:49:42.546598 Waiting for reply... done.
2679 10:49:42.547062
2680 10:49:42.547430 My ip is 192.168.201.17
2681 10:49:42.547773
2682 10:49:42.550084 The DHCP server ip is 192.168.201.1
2683 10:49:42.550549
2684 10:49:42.556671 TFTP server IP predefined by user: 192.168.201.1
2685 10:49:42.557181
2686 10:49:42.562932 Bootfile predefined by user: 12838025/tftp-deploy-q3k0t1hv/kernel/bzImage
2687 10:49:42.563596
2688 10:49:42.566409 Sending tftp read request... done.
2689 10:49:42.566870
2690 10:49:42.574741 Waiting for the transfer...
2691 10:49:42.575211
2692 10:49:42.860698 00000000 ################################################################
2693 10:49:42.860841
2694 10:49:43.121516 00080000 ################################################################
2695 10:49:43.121658
2696 10:49:43.390082 00100000 ################################################################
2697 10:49:43.390254
2698 10:49:43.657492 00180000 ################################################################
2699 10:49:43.657638
2700 10:49:43.920032 00200000 ################################################################
2701 10:49:43.920176
2702 10:49:44.180239 00280000 ################################################################
2703 10:49:44.180379
2704 10:49:44.438155 00300000 ################################################################
2705 10:49:44.438343
2706 10:49:44.712832 00380000 ################################################################
2707 10:49:44.713043
2708 10:49:44.976225 00400000 ################################################################
2709 10:49:44.976371
2710 10:49:45.237243 00480000 ################################################################
2711 10:49:45.237388
2712 10:49:45.496525 00500000 ################################################################
2713 10:49:45.496670
2714 10:49:45.756221 00580000 ################################################################
2715 10:49:45.756373
2716 10:49:46.017114 00600000 ################################################################
2717 10:49:46.017276
2718 10:49:46.314613 00680000 ################################################################
2719 10:49:46.314789
2720 10:49:46.636493 00700000 ################################################################
2721 10:49:46.636676
2722 10:49:46.958175 00780000 ################################################################
2723 10:49:46.958536
2724 10:49:47.274422 00800000 ################################################################
2725 10:49:47.274578
2726 10:49:47.536786 00880000 ################################################################
2727 10:49:47.536943
2728 10:49:47.812477 00900000 ################################################################
2729 10:49:47.812626
2730 10:49:48.072388 00980000 ################################################################
2731 10:49:48.072536
2732 10:49:48.331570 00a00000 ################################################################
2733 10:49:48.331715
2734 10:49:48.592094 00a80000 ################################################################
2735 10:49:48.592238
2736 10:49:48.852097 00b00000 ################################################################
2737 10:49:48.852244
2738 10:49:49.111070 00b80000 ################################################################
2739 10:49:49.111219
2740 10:49:49.370960 00c00000 ################################################################
2741 10:49:49.371105
2742 10:49:49.632263 00c80000 ################################################################
2743 10:49:49.632406
2744 10:49:49.892045 00d00000 ################################################################
2745 10:49:49.892219
2746 10:49:50.162171 00d80000 ################################################################
2747 10:49:50.162318
2748 10:49:50.423160 00e00000 ################################################################
2749 10:49:50.423322
2750 10:49:50.684416 00e80000 ################################################################
2751 10:49:50.684591
2752 10:49:50.967830 00f00000 ################################################################
2753 10:49:50.967973
2754 10:49:51.232270 00f80000 ################################################################
2755 10:49:51.232416
2756 10:49:51.499377 01000000 ################################################################
2757 10:49:51.499546
2758 10:49:51.761451 01080000 ################################################################
2759 10:49:51.761607
2760 10:49:51.875020 01100000 ############################# done.
2761 10:49:51.875155
2762 10:49:51.878768 The bootfile was 18058304 bytes long.
2763 10:49:51.878858
2764 10:49:51.881636 Sending tftp read request... done.
2765 10:49:51.881719
2766 10:49:51.885020 Waiting for the transfer...
2767 10:49:51.885117
2768 10:49:52.145162 00000000 ################################################################
2769 10:49:52.145307
2770 10:49:52.421458 00080000 ################################################################
2771 10:49:52.421600
2772 10:49:52.672029 00100000 ################################################################
2773 10:49:52.672157
2774 10:49:52.952195 00180000 ################################################################
2775 10:49:52.952328
2776 10:49:53.217189 00200000 ################################################################
2777 10:49:53.217330
2778 10:49:53.478405 00280000 ################################################################
2779 10:49:53.478553
2780 10:49:53.730631 00300000 ################################################################
2781 10:49:53.730774
2782 10:49:53.996895 00380000 ################################################################
2783 10:49:53.997078
2784 10:49:54.254967 00400000 ################################################################
2785 10:49:54.255109
2786 10:49:54.510222 00480000 ################################################################
2787 10:49:54.510369
2788 10:49:54.767412 00500000 ################################################################
2789 10:49:54.767553
2790 10:49:55.030558 00580000 ################################################################
2791 10:49:55.030704
2792 10:49:55.289411 00600000 ################################################################
2793 10:49:55.289571
2794 10:49:55.555741 00680000 ################################################################
2795 10:49:55.555891
2796 10:49:55.813512 00700000 ################################################################
2797 10:49:55.813657
2798 10:49:56.068862 00780000 ################################################################
2799 10:49:56.069013
2800 10:49:56.329819 00800000 ################################################################
2801 10:49:56.329982
2802 10:49:56.587180 00880000 ################################################################
2803 10:49:56.587325
2804 10:49:56.846035 00900000 ################################################################
2805 10:49:56.846181
2806 10:49:57.104628 00980000 ################################################################
2807 10:49:57.104772
2808 10:49:57.361014 00a00000 ################################################################
2809 10:49:57.361287
2810 10:49:57.617920 00a80000 ################################################################
2811 10:49:57.618064
2812 10:49:57.875716 00b00000 ################################################################
2813 10:49:57.875857
2814 10:49:58.132886 00b80000 ################################################################
2815 10:49:58.133062
2816 10:49:58.389791 00c00000 ################################################################
2817 10:49:58.389937
2818 10:49:58.600788 00c80000 ##################################################### done.
2819 10:49:58.600930
2820 10:49:58.604537 Sending tftp read request... done.
2821 10:49:58.604623
2822 10:49:58.607985 Waiting for the transfer...
2823 10:49:58.608068
2824 10:49:58.611076 00000000 # done.
2825 10:49:58.611164
2826 10:49:58.617512 Command line loaded dynamically from TFTP file: 12838025/tftp-deploy-q3k0t1hv/kernel/cmdline
2827 10:49:58.617596
2828 10:49:58.634226 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2829 10:49:58.640586
2830 10:49:58.644008 Shutting down all USB controllers.
2831 10:49:58.644091
2832 10:49:58.644157 Removing current net device
2833 10:49:58.644219
2834 10:49:58.647706 Finalizing coreboot
2835 10:49:58.647789
2836 10:49:58.653856 Exiting depthcharge with code 4 at timestamp: 28767019
2837 10:49:58.653939
2838 10:49:58.654004
2839 10:49:58.654064 Starting kernel ...
2840 10:49:58.654123
2841 10:49:58.654179
2842 10:49:58.654597 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2843 10:49:58.654693 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2844 10:49:58.654770 Setting prompt string to ['Linux version [0-9]']
2845 10:49:58.654839 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2846 10:49:58.654909 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2848 10:54:20.655714 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2850 10:54:20.657220 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2852 10:54:20.658016 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2855 10:54:20.659358 end: 2 depthcharge-action (duration 00:05:00) [common]
2857 10:54:20.659722 Cleaning after the job
2858 10:54:20.659809 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838025/tftp-deploy-q3k0t1hv/ramdisk
2859 10:54:20.661672 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838025/tftp-deploy-q3k0t1hv/kernel
2860 10:54:20.663979 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838025/tftp-deploy-q3k0t1hv/modules
2861 10:54:20.666992 start: 5.1 power-off (timeout 00:00:30) [common]
2862 10:54:20.667279 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=off'
2863 10:54:20.749100 >> Command sent successfully.
2864 10:54:20.759641 Returned 0 in 0 seconds
2865 10:54:20.860902 end: 5.1 power-off (duration 00:00:00) [common]
2867 10:54:20.862373 start: 5.2 read-feedback (timeout 00:10:00) [common]
2868 10:54:20.863543 Listened to connection for namespace 'common' for up to 1s
2870 10:54:20.864833 Listened to connection for namespace 'common' for up to 1s
2871 10:54:21.864178 Finalising connection for namespace 'common'
2872 10:54:21.865028 Disconnecting from shell: Finalise
2873 10:54:21.865428
2874 10:54:21.966465 end: 5.2 read-feedback (duration 00:00:01) [common]
2875 10:54:21.967021 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12838025
2876 10:54:22.030825 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12838025
2877 10:54:22.031008 JobError: Your job cannot terminate cleanly.