Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 20:44:13.072209 lava-dispatcher, installed at version: 2024.01
2 20:44:13.072382 start: 0 validate
3 20:44:13.072483 Start time: 2024-05-07 20:44:13.072476+00:00 (UTC)
4 20:44:13.072592 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:44:13.072713 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 20:44:13.337797 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:44:13.338415 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.214-cip46-486-gce77044aca9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:44:27.602576 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:44:27.602756 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 20:44:27.603623 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:44:27.603718 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.214-cip46-486-gce77044aca9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 20:44:28.606158 validate duration: 15.53
14 20:44:28.606415 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:44:28.606498 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:44:28.606568 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:44:28.606695 Not decompressing ramdisk as can be used compressed.
18 20:44:28.606769 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/initrd.cpio.gz
19 20:44:28.606822 saving as /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/ramdisk/initrd.cpio.gz
20 20:44:28.606874 total size: 6137767 (5 MB)
21 20:44:28.607856 progress 0 % (0 MB)
22 20:44:28.609160 progress 5 % (0 MB)
23 20:44:28.610245 progress 10 % (0 MB)
24 20:44:28.611452 progress 15 % (0 MB)
25 20:44:28.612531 progress 20 % (1 MB)
26 20:44:28.613661 progress 25 % (1 MB)
27 20:44:28.614819 progress 30 % (1 MB)
28 20:44:28.615862 progress 35 % (2 MB)
29 20:44:28.616936 progress 40 % (2 MB)
30 20:44:28.618077 progress 45 % (2 MB)
31 20:44:28.619109 progress 50 % (2 MB)
32 20:44:28.620266 progress 55 % (3 MB)
33 20:44:28.621318 progress 60 % (3 MB)
34 20:44:28.622338 progress 65 % (3 MB)
35 20:44:28.623482 progress 70 % (4 MB)
36 20:44:28.624508 progress 75 % (4 MB)
37 20:44:28.625765 progress 80 % (4 MB)
38 20:44:28.627212 progress 85 % (5 MB)
39 20:44:28.628282 progress 90 % (5 MB)
40 20:44:28.629333 progress 95 % (5 MB)
41 20:44:28.630604 progress 100 % (5 MB)
42 20:44:28.630716 5 MB downloaded in 0.02 s (245.61 MB/s)
43 20:44:28.630865 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:44:28.631060 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:44:28.631124 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:44:28.631212 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:44:28.631324 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.214-cip46-486-gce77044aca9b/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 20:44:28.631376 saving as /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/kernel/bzImage
50 20:44:28.631419 total size: 19679488 (18 MB)
51 20:44:28.631462 No compression specified
52 20:44:28.632484 progress 0 % (0 MB)
53 20:44:28.636348 progress 5 % (0 MB)
54 20:44:28.639871 progress 10 % (1 MB)
55 20:44:28.643449 progress 15 % (2 MB)
56 20:44:28.646857 progress 20 % (3 MB)
57 20:44:28.650474 progress 25 % (4 MB)
58 20:44:28.653933 progress 30 % (5 MB)
59 20:44:28.657491 progress 35 % (6 MB)
60 20:44:28.660914 progress 40 % (7 MB)
61 20:44:28.664301 progress 45 % (8 MB)
62 20:44:28.667668 progress 50 % (9 MB)
63 20:44:28.671129 progress 55 % (10 MB)
64 20:44:28.674571 progress 60 % (11 MB)
65 20:44:28.677971 progress 65 % (12 MB)
66 20:44:28.681401 progress 70 % (13 MB)
67 20:44:28.684928 progress 75 % (14 MB)
68 20:44:28.688488 progress 80 % (15 MB)
69 20:44:28.691852 progress 85 % (15 MB)
70 20:44:28.695222 progress 90 % (16 MB)
71 20:44:28.698778 progress 95 % (17 MB)
72 20:44:28.702152 progress 100 % (18 MB)
73 20:44:28.702292 18 MB downloaded in 0.07 s (264.82 MB/s)
74 20:44:28.702423 end: 1.2.1 http-download (duration 00:00:00) [common]
76 20:44:28.702598 end: 1.2 download-retry (duration 00:00:00) [common]
77 20:44:28.702663 start: 1.3 download-retry (timeout 00:10:00) [common]
78 20:44:28.702749 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 20:44:28.702873 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/full.rootfs.tar.xz
80 20:44:28.702935 saving as /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/nfsrootfs/full.rootfs.tar
81 20:44:28.703003 total size: 116951716 (111 MB)
82 20:44:28.703052 Using unxz to decompress xz
83 20:44:28.704279 progress 0 % (0 MB)
84 20:44:28.955948 progress 5 % (5 MB)
85 20:44:29.239188 progress 10 % (11 MB)
86 20:44:29.513850 progress 15 % (16 MB)
87 20:44:29.790837 progress 20 % (22 MB)
88 20:44:30.038160 progress 25 % (27 MB)
89 20:44:30.309085 progress 30 % (33 MB)
90 20:44:30.554066 progress 35 % (39 MB)
91 20:44:30.697847 progress 40 % (44 MB)
92 20:44:30.917369 progress 45 % (50 MB)
93 20:44:31.200054 progress 50 % (55 MB)
94 20:44:31.444697 progress 55 % (61 MB)
95 20:44:31.732742 progress 60 % (66 MB)
96 20:44:32.018178 progress 65 % (72 MB)
97 20:44:32.305511 progress 70 % (78 MB)
98 20:44:32.592809 progress 75 % (83 MB)
99 20:44:32.858835 progress 80 % (89 MB)
100 20:44:33.133611 progress 85 % (94 MB)
101 20:44:33.404679 progress 90 % (100 MB)
102 20:44:33.674071 progress 95 % (105 MB)
103 20:44:33.958165 progress 100 % (111 MB)
104 20:44:33.962133 111 MB downloaded in 5.26 s (21.21 MB/s)
105 20:44:33.962309 end: 1.3.1 http-download (duration 00:00:05) [common]
107 20:44:33.962532 end: 1.3 download-retry (duration 00:00:05) [common]
108 20:44:33.962596 start: 1.4 download-retry (timeout 00:09:55) [common]
109 20:44:33.962670 start: 1.4.1 http-download (timeout 00:09:55) [common]
110 20:44:33.962812 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.214-cip46-486-gce77044aca9b/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 20:44:33.962873 saving as /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/modules/modules.tar
112 20:44:33.962924 total size: 1157776 (1 MB)
113 20:44:33.962968 Using unxz to decompress xz
114 20:44:33.964288 progress 2 % (0 MB)
115 20:44:33.964607 progress 8 % (0 MB)
116 20:44:33.967974 progress 14 % (0 MB)
117 20:44:33.971230 progress 19 % (0 MB)
118 20:44:33.974845 progress 25 % (0 MB)
119 20:44:33.977823 progress 31 % (0 MB)
120 20:44:33.981321 progress 36 % (0 MB)
121 20:44:33.984252 progress 42 % (0 MB)
122 20:44:33.987818 progress 48 % (0 MB)
123 20:44:33.990788 progress 53 % (0 MB)
124 20:44:33.994014 progress 59 % (0 MB)
125 20:44:33.997019 progress 65 % (0 MB)
126 20:44:34.000660 progress 70 % (0 MB)
127 20:44:34.004240 progress 76 % (0 MB)
128 20:44:34.007568 progress 82 % (0 MB)
129 20:44:34.010832 progress 87 % (0 MB)
130 20:44:34.014028 progress 93 % (1 MB)
131 20:44:34.017527 progress 99 % (1 MB)
132 20:44:34.023155 1 MB downloaded in 0.06 s (18.33 MB/s)
133 20:44:34.023337 end: 1.4.1 http-download (duration 00:00:00) [common]
135 20:44:34.023612 end: 1.4 download-retry (duration 00:00:00) [common]
136 20:44:34.023706 start: 1.5 prepare-tftp-overlay (timeout 00:09:55) [common]
137 20:44:34.023799 start: 1.5.1 extract-nfsrootfs (timeout 00:09:55) [common]
138 20:44:35.331021 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13682994/extract-nfsrootfs-lzdr6a1x
139 20:44:35.331206 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
140 20:44:35.331295 start: 1.5.2 lava-overlay (timeout 00:09:53) [common]
141 20:44:35.331443 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231
142 20:44:35.331545 makedir: /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin
143 20:44:35.331625 makedir: /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/tests
144 20:44:35.331700 makedir: /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/results
145 20:44:35.331777 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-add-keys
146 20:44:35.331886 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-add-sources
147 20:44:35.331985 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-background-process-start
148 20:44:35.332087 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-background-process-stop
149 20:44:35.332189 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-common-functions
150 20:44:35.332283 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-echo-ipv4
151 20:44:35.332379 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-install-packages
152 20:44:35.332469 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-installed-packages
153 20:44:35.332558 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-os-build
154 20:44:35.332648 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-probe-channel
155 20:44:35.332746 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-probe-ip
156 20:44:35.332846 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-target-ip
157 20:44:35.332943 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-target-mac
158 20:44:35.333033 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-target-storage
159 20:44:35.333131 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-test-case
160 20:44:35.333219 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-test-event
161 20:44:35.333305 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-test-feedback
162 20:44:35.333392 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-test-raise
163 20:44:35.333480 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-test-reference
164 20:44:35.333568 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-test-runner
165 20:44:35.333656 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-test-set
166 20:44:35.333745 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-test-shell
167 20:44:35.333834 Updating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-install-packages (oe)
168 20:44:35.333949 Updating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/bin/lava-installed-packages (oe)
169 20:44:35.334037 Creating /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/environment
170 20:44:35.334107 LAVA metadata
171 20:44:35.334163 - LAVA_JOB_ID=13682994
172 20:44:35.334210 - LAVA_DISPATCHER_IP=192.168.201.1
173 20:44:35.334287 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:53) [common]
174 20:44:35.334337 skipped lava-vland-overlay
175 20:44:35.334390 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 20:44:35.334447 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:53) [common]
177 20:44:35.334491 skipped lava-multinode-overlay
178 20:44:35.334541 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 20:44:35.334597 start: 1.5.2.3 test-definition (timeout 00:09:53) [common]
180 20:44:35.334650 Loading test definitions
181 20:44:35.334729 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:53) [common]
182 20:44:35.334779 Using /lava-13682994 at stage 0
183 20:44:35.335016 uuid=13682994_1.5.2.3.1 testdef=None
184 20:44:35.335085 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 20:44:35.335147 start: 1.5.2.3.2 test-overlay (timeout 00:09:53) [common]
186 20:44:35.335520 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 20:44:35.335683 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:53) [common]
189 20:44:35.336147 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 20:44:35.336317 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:53) [common]
192 20:44:35.336757 runner path: /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/0/tests/0_dmesg test_uuid 13682994_1.5.2.3.1
193 20:44:35.336875 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 20:44:35.337042 Creating lava-test-runner.conf files
196 20:44:35.337100 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13682994/lava-overlay-pic7v231/lava-13682994/0 for stage 0
197 20:44:35.337195 - 0_dmesg
198 20:44:35.337300 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 20:44:35.337391 start: 1.5.2.4 compress-overlay (timeout 00:09:53) [common]
200 20:44:35.341750 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 20:44:35.341834 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:53) [common]
202 20:44:35.341897 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 20:44:35.341959 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 20:44:35.342019 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:53) [common]
205 20:44:35.445843 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 20:44:35.445985 start: 1.5.4 extract-modules (timeout 00:09:53) [common]
207 20:44:35.446056 extracting modules file /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13682994/extract-nfsrootfs-lzdr6a1x
208 20:44:35.464677 extracting modules file /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13682994/extract-overlay-ramdisk-6qcugx3f/ramdisk
209 20:44:35.483737 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 20:44:35.483845 start: 1.5.5 apply-overlay-tftp (timeout 00:09:53) [common]
211 20:44:35.483912 [common] Applying overlay to NFS
212 20:44:35.483960 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13682994/compress-overlay-___i0e21/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13682994/extract-nfsrootfs-lzdr6a1x
213 20:44:35.488138 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 20:44:35.488220 start: 1.5.6 configure-preseed-file (timeout 00:09:53) [common]
215 20:44:35.488288 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 20:44:35.488350 start: 1.5.7 compress-ramdisk (timeout 00:09:53) [common]
217 20:44:35.488406 Building ramdisk /var/lib/lava/dispatcher/tmp/13682994/extract-overlay-ramdisk-6qcugx3f/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13682994/extract-overlay-ramdisk-6qcugx3f/ramdisk
218 20:44:35.539508 >> 42075 blocks
219 20:44:36.235937 rename /var/lib/lava/dispatcher/tmp/13682994/extract-overlay-ramdisk-6qcugx3f/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/ramdisk/ramdisk.cpio.gz
220 20:44:36.236138 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 20:44:36.236244 start: 1.5.8 prepare-kernel (timeout 00:09:52) [common]
222 20:44:36.236332 start: 1.5.8.1 prepare-fit (timeout 00:09:52) [common]
223 20:44:36.236401 No mkimage arch provided, not using FIT.
224 20:44:36.236480 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 20:44:36.236547 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 20:44:36.236621 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 20:44:36.236693 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:52) [common]
228 20:44:36.236752 No LXC device requested
229 20:44:36.236829 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 20:44:36.236896 start: 1.7 deploy-device-env (timeout 00:09:52) [common]
231 20:44:36.236965 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 20:44:36.237012 Checking files for TFTP limit of 4294967296 bytes.
233 20:44:36.237253 end: 1 tftp-deploy (duration 00:00:08) [common]
234 20:44:36.237325 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 20:44:36.237387 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 20:44:36.237468 substitutions:
237 20:44:36.237518 - {DTB}: None
238 20:44:36.237563 - {INITRD}: 13682994/tftp-deploy-l6k8nu42/ramdisk/ramdisk.cpio.gz
239 20:44:36.237607 - {KERNEL}: 13682994/tftp-deploy-l6k8nu42/kernel/bzImage
240 20:44:36.237649 - {LAVA_MAC}: None
241 20:44:36.237690 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13682994/extract-nfsrootfs-lzdr6a1x
242 20:44:36.237732 - {NFS_SERVER_IP}: 192.168.201.1
243 20:44:36.237773 - {PRESEED_CONFIG}: None
244 20:44:36.237822 - {PRESEED_LOCAL}: None
245 20:44:36.237865 - {RAMDISK}: 13682994/tftp-deploy-l6k8nu42/ramdisk/ramdisk.cpio.gz
246 20:44:36.237907 - {ROOT_PART}: None
247 20:44:36.237948 - {ROOT}: None
248 20:44:36.237990 - {SERVER_IP}: 192.168.201.1
249 20:44:36.238032 - {TEE}: None
250 20:44:36.238084 Parsed boot commands:
251 20:44:36.238123 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 20:44:36.238249 Parsed boot commands: tftpboot 192.168.201.1 13682994/tftp-deploy-l6k8nu42/kernel/bzImage 13682994/tftp-deploy-l6k8nu42/kernel/cmdline 13682994/tftp-deploy-l6k8nu42/ramdisk/ramdisk.cpio.gz
253 20:44:36.238316 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 20:44:36.238374 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 20:44:36.238431 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 20:44:36.238489 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 20:44:36.238534 Not connected, no need to disconnect.
258 20:44:36.238586 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 20:44:36.238642 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 20:44:36.238686 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
261 20:44:36.241928 Setting prompt string to ['lava-test: # ']
262 20:44:36.242166 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 20:44:36.242244 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 20:44:36.242314 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 20:44:36.242378 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 20:44:36.242515 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=reboot'
267 20:44:41.380395 >> Command sent successfully.
268 20:44:41.390608 Returned 0 in 5 seconds
269 20:44:41.491595 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
271 20:44:41.492657 end: 2.2.2 reset-device (duration 00:00:05) [common]
272 20:44:41.493053 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
273 20:44:41.493393 Setting prompt string to 'Starting depthcharge on Volmar...'
274 20:44:41.493645 Changing prompt to 'Starting depthcharge on Volmar...'
275 20:44:41.493886 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
276 20:44:41.494663 [Enter `^Ec?' for help]
277 20:44:42.859622
278 20:44:42.860033
279 20:44:42.866391 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
280 20:44:42.870349 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
281 20:44:42.877410 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
282 20:44:42.880241 CPU: AES supported, TXT NOT supported, VT supported
283 20:44:42.887483 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
284 20:44:42.890075 Cache size = 10 MiB
285 20:44:42.893451 MCH: device id 4609 (rev 04) is Alderlake-P
286 20:44:42.900472 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
287 20:44:42.903512 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
288 20:44:42.907738 VBOOT: Loading verstage.
289 20:44:42.911204 FMAP: Found "FLASH" version 1.1 at 0x1804000.
290 20:44:42.918252 FMAP: base = 0x0 size = 0x2000000 #areas = 37
291 20:44:42.922124 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
292 20:44:42.928782 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
293 20:44:42.935948 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
294 20:44:42.939932
295 20:44:42.940338
296 20:44:42.946915 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
297 20:44:42.953498 Probing TPM I2C: I2C bus 1 version 0x3230302a
298 20:44:42.956344 DW I2C bus 1 at 0xfe022000 (400 KHz)
299 20:44:42.959911 I2C TX abort detected (00000001)
300 20:44:42.963145 cr50_i2c_read: Address write failed
301 20:44:42.975512 .done! DID_VID 0x00281ae0
302 20:44:42.979302 TPM ready after 0 ms
303 20:44:42.982775 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
304 20:44:42.996253 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
305 20:44:43.003064 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 20:44:43.055092 tlcl_send_startup: Startup return code is 0
307 20:44:43.055482 TPM: setup succeeded
308 20:44:43.077111 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 20:44:43.100861 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 20:44:43.107328 Chrome EC: UHEPI supported
311 20:44:43.110704 Reading cr50 boot mode
312 20:44:43.125720 Cr50 says boot_mode is VERIFIED_RW(0x00).
313 20:44:43.126346 Phase 1
314 20:44:43.131993 FMAP: area GBB found @ 1805000 (458752 bytes)
315 20:44:43.138843 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 20:44:43.145223 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 20:44:43.151900 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
318 20:44:43.155088 Phase 2
319 20:44:43.155450 Phase 3
320 20:44:43.158386 FMAP: area GBB found @ 1805000 (458752 bytes)
321 20:44:43.165213 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
322 20:44:43.168435 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
323 20:44:43.174905 VB2:vb2_verify_keyblock() Checking keyblock signature...
324 20:44:43.181567 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
325 20:44:43.188300 VB2:vb2_verify_digest() HW RSA forbidden, using SW
326 20:44:43.191589 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
327 20:44:43.206185 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
328 20:44:43.209678 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
329 20:44:43.216242 VB2:vb2_verify_fw_preamble() Verifying preamble.
330 20:44:43.222917 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
331 20:44:43.226151 VB2:vb2_verify_digest() HW RSA forbidden, using SW
332 20:44:43.232735 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
333 20:44:43.237261 Phase 4
334 20:44:43.240374 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
335 20:44:43.246984 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
336 20:44:43.473104 VB2:vb2_verify_digest() HW RSA forbidden, using SW
337 20:44:43.480124 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
338 20:44:43.482909 Saving vboot hash.
339 20:44:43.489968 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
340 20:44:43.505416 tlcl_extend: response is 0
341 20:44:43.511879 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
342 20:44:43.516327 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
343 20:44:43.533623 tlcl_extend: response is 0
344 20:44:43.539864 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
345 20:44:43.560007 tlcl_lock_nv_write: response is 0
346 20:44:43.578734 tlcl_lock_nv_write: response is 0
347 20:44:43.579120 Slot A is selected
348 20:44:43.585795 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
349 20:44:43.592547 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
350 20:44:43.598716 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
351 20:44:43.605211 BS: verstage times (exec / console): total (unknown) / 253 ms
352 20:44:43.605663
353 20:44:43.605961
354 20:44:43.612312 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
355 20:44:43.616399 Google Chrome EC: version:
356 20:44:43.619504 ro: volmar_v2.0.14126-e605144e9c
357 20:44:43.622644 rw: volmar_v0.0.55-22d1557
358 20:44:43.626423 running image: 2
359 20:44:43.629816 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
360 20:44:43.639325 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 20:44:43.646179 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 20:44:43.652555 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
363 20:44:43.662355 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
364 20:44:43.672610 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
365 20:44:43.679132 EC took 1669us to calculate image hash
366 20:44:43.689248 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
367 20:44:43.692610 VB2:sync_ec() select_rw=RW(active)
368 20:44:43.702516 Waited 270us to clear limit power flag.
369 20:44:43.706101 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
370 20:44:43.709467 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
371 20:44:43.712736 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
372 20:44:43.719606 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
373 20:44:43.722581 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
374 20:44:43.726288 TCO_STS: 0000 0000
375 20:44:43.726707 GEN_PMCON: d0015038 00002200
376 20:44:43.729450 GBLRST_CAUSE: 00000000 00000000
377 20:44:43.732580 HPR_CAUSE0: 00000000
378 20:44:43.736218 prev_sleep_state 5
379 20:44:43.739282 Abort disabling TXT, as CPU is not TXT capable.
380 20:44:43.747364 cse_lite: Number of partitions = 3
381 20:44:43.750673 cse_lite: Current partition = RO
382 20:44:43.750999 cse_lite: Next partition = RO
383 20:44:43.753658 cse_lite: Flags = 0x7
384 20:44:43.760791 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
385 20:44:43.771167 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
386 20:44:43.774021 FMAP: area SI_ME found @ 1000 (5238784 bytes)
387 20:44:43.780498 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
388 20:44:43.787289 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
389 20:44:43.793970 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
390 20:44:43.797524 cse_lite: CSE CBFS RW version : 16.1.25.2049
391 20:44:43.803808 cse_lite: Set Boot Partition Info Command (RW)
392 20:44:43.807224 HECI: Global Reset(Type:1) Command
393 20:44:45.217329
394 20:44:45.217772
395 20:44:45.223879 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
396 20:44:45.228200 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
397 20:44:45.234569 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
398 20:44:45.238766 CPU: AES supported, TXT NOT supported, VT supported
399 20:44:45.247983 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
400 20:44:45.248367 Cache size = 10 MiB
401 20:44:45.254746 MCH: device id 4609 (rev 04) is Alderlake-P
402 20:44:45.258382 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
403 20:44:45.261662 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
404 20:44:45.264864 VBOOT: Loading verstage.
405 20:44:45.272232 FMAP: Found "FLASH" version 1.1 at 0x1804000.
406 20:44:45.275562 FMAP: base = 0x0 size = 0x2000000 #areas = 37
407 20:44:45.279820 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
408 20:44:45.287078 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
409 20:44:45.296695 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
410 20:44:45.297110
411 20:44:45.297334
412 20:44:45.306751 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
413 20:44:45.313481 Probing TPM I2C: I2C bus 1 version 0x3230302a
414 20:44:45.316846 DW I2C bus 1 at 0xfe022000 (400 KHz)
415 20:44:45.317238 done! DID_VID 0x00281ae0
416 20:44:45.320531 TPM ready after 0 ms
417 20:44:45.323271 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
418 20:44:45.335094 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
419 20:44:45.341988 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
420 20:44:45.398170 tlcl_send_startup: Startup return code is 0
421 20:44:45.398567 TPM: setup succeeded
422 20:44:45.420085 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
423 20:44:45.441068 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
424 20:44:45.445064 Chrome EC: UHEPI supported
425 20:44:45.448550 Reading cr50 boot mode
426 20:44:45.463742 Cr50 says boot_mode is VERIFIED_RW(0x00).
427 20:44:45.464193 Phase 1
428 20:44:45.470291 FMAP: area GBB found @ 1805000 (458752 bytes)
429 20:44:45.476473 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
430 20:44:45.483851 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
431 20:44:45.490199 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
432 20:44:45.493159 Phase 2
433 20:44:45.493530 Phase 3
434 20:44:45.497178 FMAP: area GBB found @ 1805000 (458752 bytes)
435 20:44:45.503477 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
436 20:44:45.506928 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
437 20:44:45.513220 VB2:vb2_verify_keyblock() Checking keyblock signature...
438 20:44:45.520015 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
439 20:44:45.527128 VB2:vb2_verify_digest() HW RSA forbidden, using SW
440 20:44:45.530122 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
441 20:44:45.544269 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
442 20:44:45.547631 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
443 20:44:45.553996 VB2:vb2_verify_fw_preamble() Verifying preamble.
444 20:44:45.560396 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
445 20:44:45.564637 VB2:vb2_verify_digest() HW RSA forbidden, using SW
446 20:44:45.570498 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
447 20:44:45.574592 Phase 4
448 20:44:45.577834 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
449 20:44:45.584700 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
450 20:44:45.811273 VB2:vb2_verify_digest() HW RSA forbidden, using SW
451 20:44:45.817471 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
452 20:44:45.821195 Saving vboot hash.
453 20:44:45.827391 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
454 20:44:45.843130 tlcl_extend: response is 0
455 20:44:45.850074 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
456 20:44:45.856211 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
457 20:44:45.871084 tlcl_extend: response is 0
458 20:44:45.877639 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
459 20:44:45.897574 tlcl_lock_nv_write: response is 0
460 20:44:45.916448 tlcl_lock_nv_write: response is 0
461 20:44:45.916791 Slot A is selected
462 20:44:45.922937 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
463 20:44:45.929517 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
464 20:44:45.936199 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
465 20:44:45.943484 BS: verstage times (exec / console): total (unknown) / 246 ms
466 20:44:45.943582
467 20:44:45.943647
468 20:44:45.949409 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
469 20:44:45.953763 Google Chrome EC: version:
470 20:44:45.956909 ro: volmar_v2.0.14126-e605144e9c
471 20:44:45.960844 rw: volmar_v0.0.55-22d1557
472 20:44:45.964162 running image: 2
473 20:44:45.967447 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
474 20:44:45.977471 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
475 20:44:45.984282 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
476 20:44:45.990794 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
477 20:44:46.001057 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
478 20:44:46.010641 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
479 20:44:46.018075 EC took 2047us to calculate image hash
480 20:44:46.025111 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
481 20:44:46.028312 VB2:sync_ec() select_rw=RW(active)
482 20:44:46.041712 Waited 270us to clear limit power flag.
483 20:44:46.044356 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
484 20:44:46.048286 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
485 20:44:46.051121 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
486 20:44:46.057823 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
487 20:44:46.061303 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
488 20:44:46.064357 TCO_STS: 0000 0000
489 20:44:46.064679 GEN_PMCON: d1001038 00002200
490 20:44:46.067620 GBLRST_CAUSE: 00000040 00000000
491 20:44:46.071294 HPR_CAUSE0: 00000000
492 20:44:46.074712 prev_sleep_state 5
493 20:44:46.077888 Abort disabling TXT, as CPU is not TXT capable.
494 20:44:46.085708 cse_lite: Number of partitions = 3
495 20:44:46.088880 cse_lite: Current partition = RW
496 20:44:46.089173 cse_lite: Next partition = RW
497 20:44:46.092222 cse_lite: Flags = 0x7
498 20:44:46.099089 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
499 20:44:46.109425 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
500 20:44:46.112440 FMAP: area SI_ME found @ 1000 (5238784 bytes)
501 20:44:46.118954 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
502 20:44:46.125427 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
503 20:44:46.131985 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
504 20:44:46.135520 cse_lite: CSE CBFS RW version : 16.1.25.2049
505 20:44:46.139093 Boot Count incremented to 957
506 20:44:46.145799 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
507 20:44:46.152393 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
508 20:44:46.165145 Probing TPM I2C: done! DID_VID 0x00281ae0
509 20:44:46.168384 Locality already claimed
510 20:44:46.172020 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
511 20:44:46.191381 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
512 20:44:46.198076 MRC: Hash idx 0x100d comparison successful.
513 20:44:46.201571 MRC cache found, size f6c8
514 20:44:46.201985 bootmode is set to: 2
515 20:44:46.204763 EC returned error result code 3
516 20:44:46.208127 FW_CONFIG value from CBI is 0x131
517 20:44:46.214741 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
518 20:44:46.218195 SPD index = 0
519 20:44:46.224914 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
520 20:44:46.225358 SPD: module type is LPDDR4X
521 20:44:46.231664 SPD: module part number is K4U6E3S4AB-MGCL
522 20:44:46.238391 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
523 20:44:46.241624 SPD: device width 16 bits, bus width 16 bits
524 20:44:46.245142 SPD: module size is 1024 MB (per channel)
525 20:44:46.315246 CBMEM:
526 20:44:46.318630 IMD: root @ 0x76fff000 254 entries.
527 20:44:46.321526 IMD: root @ 0x76ffec00 62 entries.
528 20:44:46.329279 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
529 20:44:46.333010 RO_VPD is uninitialized or empty.
530 20:44:46.336029 FMAP: area RW_VPD found @ f29000 (8192 bytes)
531 20:44:46.342750 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
532 20:44:46.346446 External stage cache:
533 20:44:46.349779 IMD: root @ 0x7bbff000 254 entries.
534 20:44:46.352440 IMD: root @ 0x7bbfec00 62 entries.
535 20:44:46.359192 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
536 20:44:46.366286 MRC: Checking cached data update for 'RW_MRC_CACHE'.
537 20:44:46.369436 MRC: 'RW_MRC_CACHE' does not need update.
538 20:44:46.369760 8 DIMMs found
539 20:44:46.372690 SMM Memory Map
540 20:44:46.376066 SMRAM : 0x7b800000 0x800000
541 20:44:46.379477 Subregion 0: 0x7b800000 0x200000
542 20:44:46.383029 Subregion 1: 0x7ba00000 0x200000
543 20:44:46.386237 Subregion 2: 0x7bc00000 0x400000
544 20:44:46.389735 top_of_ram = 0x77000000
545 20:44:46.392875 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
546 20:44:46.399391 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
547 20:44:46.406184 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
548 20:44:46.409641 MTRR Range: Start=ff000000 End=0 (Size 1000000)
549 20:44:46.409989 Normal boot
550 20:44:46.419886 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
551 20:44:46.425716 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
552 20:44:46.432772 Processing 237 relocs. Offset value of 0x74ab9000
553 20:44:46.440779 BS: romstage times (exec / console): total (unknown) / 377 ms
554 20:44:46.448120
555 20:44:46.448490
556 20:44:46.454482 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
557 20:44:46.454843 Normal boot
558 20:44:46.461730 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
559 20:44:46.468220 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
560 20:44:46.474992 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
561 20:44:46.485115 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
562 20:44:46.533429 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
563 20:44:46.539467 Processing 5931 relocs. Offset value of 0x72a2f000
564 20:44:46.542574 BS: postcar times (exec / console): total (unknown) / 51 ms
565 20:44:46.542919
566 20:44:46.546131
567 20:44:46.552596 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
568 20:44:46.555724 Reserving BERT start 76a1e000, size 10000
569 20:44:46.559448 Normal boot
570 20:44:46.562454 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
571 20:44:46.569537 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
572 20:44:46.579009 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
573 20:44:46.582683 FMAP: area RW_VPD found @ f29000 (8192 bytes)
574 20:44:46.585905 Google Chrome EC: version:
575 20:44:46.589258 ro: volmar_v2.0.14126-e605144e9c
576 20:44:46.592986 rw: volmar_v0.0.55-22d1557
577 20:44:46.593367 running image: 2
578 20:44:46.599889 ACPI _SWS is PM1 Index 8 GPE Index -1
579 20:44:46.603008 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
580 20:44:46.607157 EC returned error result code 3
581 20:44:46.613898 FW_CONFIG value from CBI is 0x131
582 20:44:46.616558 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
583 20:44:46.620494 PCI: 00:1c.2 disabled by fw_config
584 20:44:46.627175 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
585 20:44:46.630479 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
586 20:44:46.636851 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
587 20:44:46.640143 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
588 20:44:46.647031 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
589 20:44:46.654169 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
590 20:44:46.660170 microcode: sig=0x906a4 pf=0x80 revision=0x423
591 20:44:46.663440 microcode: Update skipped, already up-to-date
592 20:44:46.670499 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
593 20:44:46.702867 Detected 6 core, 8 thread CPU.
594 20:44:46.706796 Setting up SMI for CPU
595 20:44:46.710027 IED base = 0x7bc00000
596 20:44:46.710454 IED size = 0x00400000
597 20:44:46.712877 Will perform SMM setup.
598 20:44:46.716335 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
599 20:44:46.719361 LAPIC 0x0 in XAPIC mode.
600 20:44:46.729925 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
601 20:44:46.732834 Processing 18 relocs. Offset value of 0x00030000
602 20:44:46.737980 Attempting to start 7 APs
603 20:44:46.740917 Waiting for 10ms after sending INIT.
604 20:44:46.753747 Waiting for SIPI to complete...
605 20:44:46.757062 done.
606 20:44:46.757422 LAPIC 0x14 in XAPIC mode.
607 20:44:46.760009 LAPIC 0x12 in XAPIC mode.
608 20:44:46.763747 LAPIC 0x10 in XAPIC mode.
609 20:44:46.767045 AP: slot 1 apic_id 12, MCU rev: 0x00000423
610 20:44:46.774351 AP: slot 4 apic_id 10, MCU rev: 0x00000423
611 20:44:46.774769 LAPIC 0x16 in XAPIC mode.
612 20:44:46.776867 LAPIC 0x1 in XAPIC mode.
613 20:44:46.780405 AP: slot 3 apic_id 16, MCU rev: 0x00000423
614 20:44:46.786922 AP: slot 2 apic_id 14, MCU rev: 0x00000423
615 20:44:46.790132 LAPIC 0x8 in XAPIC mode.
616 20:44:46.790507 LAPIC 0x9 in XAPIC mode.
617 20:44:46.797130 AP: slot 6 apic_id 8, MCU rev: 0x00000423
618 20:44:46.800078 Waiting for SIPI to complete...
619 20:44:46.800465 done.
620 20:44:46.803542 AP: slot 7 apic_id 1, MCU rev: 0x00000423
621 20:44:46.806444 AP: slot 5 apic_id 9, MCU rev: 0x00000423
622 20:44:46.810121 smm_setup_relocation_handler: enter
623 20:44:46.813428 smm_setup_relocation_handler: exit
624 20:44:46.823271 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
625 20:44:46.826432 Processing 11 relocs. Offset value of 0x00038000
626 20:44:46.833270 smm_module_setup_stub: stack_top = 0x7b804000
627 20:44:46.837060 smm_module_setup_stub: per cpu stack_size = 0x800
628 20:44:46.843350 smm_module_setup_stub: runtime.start32_offset = 0x4c
629 20:44:46.846348 smm_module_setup_stub: runtime.smm_size = 0x10000
630 20:44:46.853084 SMM Module: stub loaded at 38000. Will call 0x76a52094
631 20:44:46.856789 Installing permanent SMM handler to 0x7b800000
632 20:44:46.863156 smm_load_module: total_smm_space_needed e468, available -> 200000
633 20:44:46.872939 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
634 20:44:46.876754 Processing 255 relocs. Offset value of 0x7b9f6000
635 20:44:46.883291 smm_load_module: smram_start: 0x7b800000
636 20:44:46.886386 smm_load_module: smram_end: 7ba00000
637 20:44:46.889739 smm_load_module: handler start 0x7b9f6d5f
638 20:44:46.893116 smm_load_module: handler_size 98d0
639 20:44:46.896503 smm_load_module: fxsave_area 0x7b9ff000
640 20:44:46.899903 smm_load_module: fxsave_size 1000
641 20:44:46.903392 smm_load_module: CONFIG_MSEG_SIZE 0x0
642 20:44:46.909399 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
643 20:44:46.916305 smm_load_module: handler_mod_params.smbase = 0x7b800000
644 20:44:46.919498 smm_load_module: per_cpu_save_state_size = 0x400
645 20:44:46.922775 smm_load_module: num_cpus = 0x8
646 20:44:46.929683 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
647 20:44:46.932564 smm_load_module: total_save_state_size = 0x2000
648 20:44:46.936152 smm_load_module: cpu0 entry: 7b9e6000
649 20:44:46.943206 smm_create_map: cpus allowed in one segment 30
650 20:44:46.946116 smm_create_map: min # of segments needed 1
651 20:44:46.946513 CPU 0x0
652 20:44:46.953126 smbase 7b9e6000 entry 7b9ee000
653 20:44:46.955808 ss_start 7b9f5c00 code_end 7b9ee208
654 20:44:46.956172 CPU 0x1
655 20:44:46.959174 smbase 7b9e5c00 entry 7b9edc00
656 20:44:46.966215 ss_start 7b9f5800 code_end 7b9ede08
657 20:44:46.966536 CPU 0x2
658 20:44:46.969226 smbase 7b9e5800 entry 7b9ed800
659 20:44:46.975879 ss_start 7b9f5400 code_end 7b9eda08
660 20:44:46.975956 CPU 0x3
661 20:44:46.979046 smbase 7b9e5400 entry 7b9ed400
662 20:44:46.982654 ss_start 7b9f5000 code_end 7b9ed608
663 20:44:46.985876 CPU 0x4
664 20:44:46.989243 smbase 7b9e5000 entry 7b9ed000
665 20:44:46.992413 ss_start 7b9f4c00 code_end 7b9ed208
666 20:44:46.992467 CPU 0x5
667 20:44:46.999207 smbase 7b9e4c00 entry 7b9ecc00
668 20:44:47.002058 ss_start 7b9f4800 code_end 7b9ece08
669 20:44:47.002156 CPU 0x6
670 20:44:47.006010 smbase 7b9e4800 entry 7b9ec800
671 20:44:47.012509 ss_start 7b9f4400 code_end 7b9eca08
672 20:44:47.012797 CPU 0x7
673 20:44:47.016074 smbase 7b9e4400 entry 7b9ec400
674 20:44:47.022272 ss_start 7b9f4000 code_end 7b9ec608
675 20:44:47.028566 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
676 20:44:47.032130 Processing 11 relocs. Offset value of 0x7b9ee000
677 20:44:47.039177 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
678 20:44:47.045757 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
679 20:44:47.052371 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
680 20:44:47.058746 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
681 20:44:47.065884 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
682 20:44:47.071877 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
683 20:44:47.078951 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
684 20:44:47.082105 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
685 20:44:47.088948 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
686 20:44:47.095257 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
687 20:44:47.101819 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
688 20:44:47.108525 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
689 20:44:47.115389 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
690 20:44:47.122467 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
691 20:44:47.128635 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
692 20:44:47.131771 smm_module_setup_stub: stack_top = 0x7b804000
693 20:44:47.138798 smm_module_setup_stub: per cpu stack_size = 0x800
694 20:44:47.142030 smm_module_setup_stub: runtime.start32_offset = 0x4c
695 20:44:47.148854 smm_module_setup_stub: runtime.smm_size = 0x200000
696 20:44:47.152075 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
697 20:44:47.157408 Clearing SMI status registers
698 20:44:47.160558 SMI_STS: PM1
699 20:44:47.160644 PM1_STS: WAK PWRBTN
700 20:44:47.170712 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
701 20:44:47.174252 In relocation handler: CPU 0
702 20:44:47.177752 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
703 20:44:47.180523 Writing SMRR. base = 0x7b800006, mask=0xff800c00
704 20:44:47.184252 Relocation complete.
705 20:44:47.190940 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
706 20:44:47.193841 In relocation handler: CPU 7
707 20:44:47.197807 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
708 20:44:47.200496 Relocation complete.
709 20:44:47.207467 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
710 20:44:47.210586 In relocation handler: CPU 3
711 20:44:47.214299 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
712 20:44:47.220771 Writing SMRR. base = 0x7b800006, mask=0xff800c00
713 20:44:47.221250 Relocation complete.
714 20:44:47.227177 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
715 20:44:47.231199 In relocation handler: CPU 1
716 20:44:47.237477 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
717 20:44:47.240795 Writing SMRR. base = 0x7b800006, mask=0xff800c00
718 20:44:47.243905 Relocation complete.
719 20:44:47.250892 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
720 20:44:47.254398 In relocation handler: CPU 2
721 20:44:47.257171 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
722 20:44:47.260204 Writing SMRR. base = 0x7b800006, mask=0xff800c00
723 20:44:47.264072 Relocation complete.
724 20:44:47.271008 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
725 20:44:47.273741 In relocation handler: CPU 4
726 20:44:47.277366 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
727 20:44:47.283894 Writing SMRR. base = 0x7b800006, mask=0xff800c00
728 20:44:47.284299 Relocation complete.
729 20:44:47.293842 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
730 20:44:47.294214 In relocation handler: CPU 6
731 20:44:47.300297 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
732 20:44:47.303556 Writing SMRR. base = 0x7b800006, mask=0xff800c00
733 20:44:47.306922 Relocation complete.
734 20:44:47.314153 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
735 20:44:47.317343 In relocation handler: CPU 5
736 20:44:47.320773 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
737 20:44:47.323618 Relocation complete.
738 20:44:47.323931 Initializing CPU #0
739 20:44:47.326621 CPU: vendor Intel device 906a4
740 20:44:47.330598 CPU: family 06, model 9a, stepping 04
741 20:44:47.334100 Clearing out pending MCEs
742 20:44:47.336892 cpu: energy policy set to 7
743 20:44:47.340581 Turbo is available but hidden
744 20:44:47.344368 Turbo is available and visible
745 20:44:47.347385 microcode: Update skipped, already up-to-date
746 20:44:47.350306 CPU #0 initialized
747 20:44:47.350639 Initializing CPU #7
748 20:44:47.354268 Initializing CPU #4
749 20:44:47.356997 Initializing CPU #2
750 20:44:47.357342 Initializing CPU #1
751 20:44:47.360239 Initializing CPU #3
752 20:44:47.363369 CPU: vendor Intel device 906a4
753 20:44:47.367556 CPU: family 06, model 9a, stepping 04
754 20:44:47.370617 CPU: vendor Intel device 906a4
755 20:44:47.373986 CPU: family 06, model 9a, stepping 04
756 20:44:47.376953 CPU: vendor Intel device 906a4
757 20:44:47.380267 CPU: family 06, model 9a, stepping 04
758 20:44:47.383527 CPU: vendor Intel device 906a4
759 20:44:47.387177 CPU: family 06, model 9a, stepping 04
760 20:44:47.390531 CPU: vendor Intel device 906a4
761 20:44:47.394084 CPU: family 06, model 9a, stepping 04
762 20:44:47.396844 Clearing out pending MCEs
763 20:44:47.400441 Clearing out pending MCEs
764 20:44:47.403670 Clearing out pending MCEs
765 20:44:47.407178 Clearing out pending MCEs
766 20:44:47.407503 cpu: energy policy set to 7
767 20:44:47.410321 Clearing out pending MCEs
768 20:44:47.413722 Initializing CPU #5
769 20:44:47.416657 cpu: energy policy set to 7
770 20:44:47.417007 cpu: energy policy set to 7
771 20:44:47.420492 cpu: energy policy set to 7
772 20:44:47.427074 microcode: Update skipped, already up-to-date
773 20:44:47.427446 CPU #4 initialized
774 20:44:47.433580 microcode: Update skipped, already up-to-date
775 20:44:47.433980 CPU #1 initialized
776 20:44:47.436960 cpu: energy policy set to 7
777 20:44:47.443988 microcode: Update skipped, already up-to-date
778 20:44:47.444420 CPU #2 initialized
779 20:44:47.446864 microcode: Update skipped, already up-to-date
780 20:44:47.450169 CPU #3 initialized
781 20:44:47.453344 CPU: vendor Intel device 906a4
782 20:44:47.456779 CPU: family 06, model 9a, stepping 04
783 20:44:47.460242 Initializing CPU #6
784 20:44:47.463532 Clearing out pending MCEs
785 20:44:47.463865 CPU: vendor Intel device 906a4
786 20:44:47.470110 CPU: family 06, model 9a, stepping 04
787 20:44:47.470440 cpu: energy policy set to 7
788 20:44:47.476857 microcode: Update skipped, already up-to-date
789 20:44:47.477264 CPU #7 initialized
790 20:44:47.483485 microcode: Update skipped, already up-to-date
791 20:44:47.483824 CPU #5 initialized
792 20:44:47.486655 Clearing out pending MCEs
793 20:44:47.489907 cpu: energy policy set to 7
794 20:44:47.493825 microcode: Update skipped, already up-to-date
795 20:44:47.496877 CPU #6 initialized
796 20:44:47.500436 bsp_do_flight_plan done after 697 msecs.
797 20:44:47.503688 CPU: frequency set to 4400 MHz
798 20:44:47.506942 Enabling SMIs.
799 20:44:47.513740 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
800 20:44:47.528181 Probing TPM I2C: done! DID_VID 0x00281ae0
801 20:44:47.531856 Locality already claimed
802 20:44:47.535499 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
803 20:44:47.546706 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
804 20:44:47.549744 Enabling GPIO PM b/c CR50 has long IRQ pulse support
805 20:44:47.556296 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
806 20:44:47.562998 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
807 20:44:47.565970 Found a VBT of 9216 bytes after decompression
808 20:44:47.569793 PCI 1.0, PIN A, using IRQ #16
809 20:44:47.572987 PCI 2.0, PIN A, using IRQ #17
810 20:44:47.576147 PCI 4.0, PIN A, using IRQ #18
811 20:44:47.579764 PCI 5.0, PIN A, using IRQ #16
812 20:44:47.582797 PCI 6.0, PIN A, using IRQ #16
813 20:44:47.586255 PCI 6.2, PIN C, using IRQ #18
814 20:44:47.589651 PCI 7.0, PIN A, using IRQ #19
815 20:44:47.592513 PCI 7.1, PIN B, using IRQ #20
816 20:44:47.596390 PCI 7.2, PIN C, using IRQ #21
817 20:44:47.599747 PCI 7.3, PIN D, using IRQ #22
818 20:44:47.602847 PCI 8.0, PIN A, using IRQ #23
819 20:44:47.606032 PCI D.0, PIN A, using IRQ #17
820 20:44:47.609773 PCI D.1, PIN B, using IRQ #19
821 20:44:47.610139 PCI 10.0, PIN A, using IRQ #24
822 20:44:47.612798 PCI 10.1, PIN B, using IRQ #25
823 20:44:47.616458 PCI 10.6, PIN C, using IRQ #20
824 20:44:47.619540 PCI 10.7, PIN D, using IRQ #21
825 20:44:47.622629 PCI 11.0, PIN A, using IRQ #26
826 20:44:47.626031 PCI 11.1, PIN B, using IRQ #27
827 20:44:47.629993 PCI 11.2, PIN C, using IRQ #28
828 20:44:47.632923 PCI 11.3, PIN D, using IRQ #29
829 20:44:47.636501 PCI 12.0, PIN A, using IRQ #30
830 20:44:47.639401 PCI 12.6, PIN B, using IRQ #31
831 20:44:47.642961 PCI 12.7, PIN C, using IRQ #22
832 20:44:47.646018 PCI 13.0, PIN A, using IRQ #32
833 20:44:47.649489 PCI 13.1, PIN B, using IRQ #33
834 20:44:47.653072 PCI 13.2, PIN C, using IRQ #34
835 20:44:47.656497 PCI 13.3, PIN D, using IRQ #35
836 20:44:47.656966 PCI 14.0, PIN B, using IRQ #23
837 20:44:47.660169 PCI 14.1, PIN A, using IRQ #36
838 20:44:47.662788 PCI 14.3, PIN C, using IRQ #17
839 20:44:47.665892 PCI 15.0, PIN A, using IRQ #37
840 20:44:47.669325 PCI 15.1, PIN B, using IRQ #38
841 20:44:47.672601 PCI 15.2, PIN C, using IRQ #39
842 20:44:47.676381 PCI 15.3, PIN D, using IRQ #40
843 20:44:47.679578 PCI 16.0, PIN A, using IRQ #18
844 20:44:47.682791 PCI 16.1, PIN B, using IRQ #19
845 20:44:47.686075 PCI 16.2, PIN C, using IRQ #20
846 20:44:47.689552 PCI 16.3, PIN D, using IRQ #21
847 20:44:47.692611 PCI 16.4, PIN A, using IRQ #18
848 20:44:47.696027 PCI 16.5, PIN B, using IRQ #19
849 20:44:47.699778 PCI 17.0, PIN A, using IRQ #22
850 20:44:47.703061 PCI 19.0, PIN A, using IRQ #41
851 20:44:47.705879 PCI 19.1, PIN B, using IRQ #42
852 20:44:47.709475 PCI 19.2, PIN C, using IRQ #43
853 20:44:47.709803 PCI 1C.0, PIN A, using IRQ #16
854 20:44:47.713091 PCI 1C.1, PIN B, using IRQ #17
855 20:44:47.716474 PCI 1C.2, PIN C, using IRQ #18
856 20:44:47.719690 PCI 1C.3, PIN D, using IRQ #19
857 20:44:47.722671 PCI 1C.4, PIN A, using IRQ #16
858 20:44:47.725828 PCI 1C.5, PIN B, using IRQ #17
859 20:44:47.728887 PCI 1C.6, PIN C, using IRQ #18
860 20:44:47.732677 PCI 1C.7, PIN D, using IRQ #19
861 20:44:47.735860 PCI 1D.0, PIN A, using IRQ #16
862 20:44:47.739523 PCI 1D.1, PIN B, using IRQ #17
863 20:44:47.742645 PCI 1D.2, PIN C, using IRQ #18
864 20:44:47.745969 PCI 1D.3, PIN D, using IRQ #19
865 20:44:47.749426 PCI 1E.0, PIN A, using IRQ #23
866 20:44:47.752742 PCI 1E.1, PIN B, using IRQ #20
867 20:44:47.756544 PCI 1E.2, PIN C, using IRQ #44
868 20:44:47.759329 PCI 1E.3, PIN D, using IRQ #45
869 20:44:47.759726 PCI 1F.3, PIN B, using IRQ #22
870 20:44:47.762414 PCI 1F.4, PIN C, using IRQ #23
871 20:44:47.766204 PCI 1F.6, PIN D, using IRQ #20
872 20:44:47.768856 PCI 1F.7, PIN A, using IRQ #21
873 20:44:47.775810 IRQ: Using dynamically assigned PCI IO-APIC IRQs
874 20:44:47.782490 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
875 20:44:47.964739 FSPS returned 0
876 20:44:47.968422 Executing Phase 1 of FspMultiPhaseSiInit
877 20:44:47.977868 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
878 20:44:47.980909 port C0 DISC req: usage 1 usb3 1 usb2 1
879 20:44:47.984886 Raw Buffer output 0 00000111
880 20:44:47.987711 Raw Buffer output 1 00000000
881 20:44:47.991657 pmc_send_ipc_cmd succeeded
882 20:44:47.998120 port C1 DISC req: usage 1 usb3 3 usb2 3
883 20:44:47.998489 Raw Buffer output 0 00000331
884 20:44:48.001863 Raw Buffer output 1 00000000
885 20:44:48.005576 pmc_send_ipc_cmd succeeded
886 20:44:48.009134 Detected 6 core, 8 thread CPU.
887 20:44:48.012720 Detected 6 core, 8 thread CPU.
888 20:44:48.018125 Detected 6 core, 8 thread CPU.
889 20:44:48.021262 Detected 6 core, 8 thread CPU.
890 20:44:48.024440 Detected 6 core, 8 thread CPU.
891 20:44:48.027876 Detected 6 core, 8 thread CPU.
892 20:44:48.031129 Detected 6 core, 8 thread CPU.
893 20:44:48.034287 Detected 6 core, 8 thread CPU.
894 20:44:48.037766 Detected 6 core, 8 thread CPU.
895 20:44:48.041170 Detected 6 core, 8 thread CPU.
896 20:44:48.044382 Detected 6 core, 8 thread CPU.
897 20:44:48.047861 Detected 6 core, 8 thread CPU.
898 20:44:48.051215 Detected 6 core, 8 thread CPU.
899 20:44:48.054742 Detected 6 core, 8 thread CPU.
900 20:44:48.057975 Detected 6 core, 8 thread CPU.
901 20:44:48.061223 Detected 6 core, 8 thread CPU.
902 20:44:48.063992 Detected 6 core, 8 thread CPU.
903 20:44:48.067325 Detected 6 core, 8 thread CPU.
904 20:44:48.070603 Detected 6 core, 8 thread CPU.
905 20:44:48.074484 Detected 6 core, 8 thread CPU.
906 20:44:48.077227 Detected 6 core, 8 thread CPU.
907 20:44:48.080882 Detected 6 core, 8 thread CPU.
908 20:44:48.369985 Detected 6 core, 8 thread CPU.
909 20:44:48.373375 Detected 6 core, 8 thread CPU.
910 20:44:48.376443 Detected 6 core, 8 thread CPU.
911 20:44:48.379889 Detected 6 core, 8 thread CPU.
912 20:44:48.383046 Detected 6 core, 8 thread CPU.
913 20:44:48.386744 Detected 6 core, 8 thread CPU.
914 20:44:48.390403 Detected 6 core, 8 thread CPU.
915 20:44:48.393759 Detected 6 core, 8 thread CPU.
916 20:44:48.396873 Detected 6 core, 8 thread CPU.
917 20:44:48.400582 Detected 6 core, 8 thread CPU.
918 20:44:48.403613 Detected 6 core, 8 thread CPU.
919 20:44:48.406806 Detected 6 core, 8 thread CPU.
920 20:44:48.410024 Detected 6 core, 8 thread CPU.
921 20:44:48.413507 Detected 6 core, 8 thread CPU.
922 20:44:48.416831 Detected 6 core, 8 thread CPU.
923 20:44:48.419912 Detected 6 core, 8 thread CPU.
924 20:44:48.423270 Detected 6 core, 8 thread CPU.
925 20:44:48.426455 Detected 6 core, 8 thread CPU.
926 20:44:48.429735 Detected 6 core, 8 thread CPU.
927 20:44:48.433333 Detected 6 core, 8 thread CPU.
928 20:44:48.436790 Display FSP Version Info HOB
929 20:44:48.440192 Reference Code - CPU = c.0.65.70
930 20:44:48.440601 uCode Version = 0.0.4.23
931 20:44:48.443249 TXT ACM version = ff.ff.ff.ffff
932 20:44:48.447412 Reference Code - ME = c.0.65.70
933 20:44:48.449827 MEBx version = 0.0.0.0
934 20:44:48.453130 ME Firmware Version = Lite SKU
935 20:44:48.456457 Reference Code - PCH = c.0.65.70
936 20:44:48.460289 PCH-CRID Status = Disabled
937 20:44:48.463073 PCH-CRID Original Value = ff.ff.ff.ffff
938 20:44:48.466492 PCH-CRID New Value = ff.ff.ff.ffff
939 20:44:48.469895 OPROM - RST - RAID = ff.ff.ff.ffff
940 20:44:48.472690 PCH Hsio Version = 4.0.0.0
941 20:44:48.476510 Reference Code - SA - System Agent = c.0.65.70
942 20:44:48.479770 Reference Code - MRC = 0.0.3.80
943 20:44:48.483259 SA - PCIe Version = c.0.65.70
944 20:44:48.486604 SA-CRID Status = Disabled
945 20:44:48.489692 SA-CRID Original Value = 0.0.0.4
946 20:44:48.493423 SA-CRID New Value = 0.0.0.4
947 20:44:48.496688 OPROM - VBIOS = ff.ff.ff.ffff
948 20:44:48.499748 IO Manageability Engine FW Version = 24.0.4.0
949 20:44:48.503316 PHY Build Version = 0.0.0.2016
950 20:44:48.506399 Thunderbolt(TM) FW Version = 0.0.0.0
951 20:44:48.513522 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
952 20:44:48.519676 BS: BS_DEV_INIT_CHIPS run times (exec / console): 493 / 507 ms
953 20:44:48.523233 Enumerating buses...
954 20:44:48.526705 Show all devs... Before device enumeration.
955 20:44:48.529230 Root Device: enabled 1
956 20:44:48.529559 CPU_CLUSTER: 0: enabled 1
957 20:44:48.533346 DOMAIN: 0000: enabled 1
958 20:44:48.536077 GPIO: 0: enabled 1
959 20:44:48.536437 PCI: 00:00.0: enabled 1
960 20:44:48.539946 PCI: 00:01.0: enabled 0
961 20:44:48.542855 PCI: 00:01.1: enabled 0
962 20:44:48.546777 PCI: 00:02.0: enabled 1
963 20:44:48.547227 PCI: 00:04.0: enabled 1
964 20:44:48.549551 PCI: 00:05.0: enabled 0
965 20:44:48.553248 PCI: 00:06.0: enabled 1
966 20:44:48.556545 PCI: 00:06.2: enabled 0
967 20:44:48.557030 PCI: 00:07.0: enabled 0
968 20:44:48.559820 PCI: 00:07.1: enabled 0
969 20:44:48.562780 PCI: 00:07.2: enabled 0
970 20:44:48.566203 PCI: 00:07.3: enabled 0
971 20:44:48.566564 PCI: 00:08.0: enabled 0
972 20:44:48.569822 PCI: 00:09.0: enabled 0
973 20:44:48.572878 PCI: 00:0a.0: enabled 1
974 20:44:48.576243 PCI: 00:0d.0: enabled 1
975 20:44:48.576661 PCI: 00:0d.1: enabled 0
976 20:44:48.579632 PCI: 00:0d.2: enabled 0
977 20:44:48.582886 PCI: 00:0d.3: enabled 0
978 20:44:48.586294 PCI: 00:0e.0: enabled 0
979 20:44:48.586699 PCI: 00:10.0: enabled 0
980 20:44:48.589541 PCI: 00:10.1: enabled 0
981 20:44:48.592537 PCI: 00:10.6: enabled 0
982 20:44:48.592889 PCI: 00:10.7: enabled 0
983 20:44:48.596564 PCI: 00:12.0: enabled 0
984 20:44:48.599410 PCI: 00:12.6: enabled 0
985 20:44:48.602916 PCI: 00:12.7: enabled 0
986 20:44:48.603370 PCI: 00:13.0: enabled 0
987 20:44:48.606706 PCI: 00:14.0: enabled 1
988 20:44:48.609513 PCI: 00:14.1: enabled 0
989 20:44:48.612854 PCI: 00:14.2: enabled 1
990 20:44:48.613217 PCI: 00:14.3: enabled 1
991 20:44:48.616177 PCI: 00:15.0: enabled 1
992 20:44:48.619758 PCI: 00:15.1: enabled 1
993 20:44:48.622814 PCI: 00:15.2: enabled 0
994 20:44:48.623233 PCI: 00:15.3: enabled 1
995 20:44:48.626577 PCI: 00:16.0: enabled 1
996 20:44:48.629537 PCI: 00:16.1: enabled 0
997 20:44:48.629837 PCI: 00:16.2: enabled 0
998 20:44:48.633169 PCI: 00:16.3: enabled 0
999 20:44:48.636539 PCI: 00:16.4: enabled 0
1000 20:44:48.639966 PCI: 00:16.5: enabled 0
1001 20:44:48.640417 PCI: 00:17.0: enabled 1
1002 20:44:48.642921 PCI: 00:19.0: enabled 0
1003 20:44:48.646356 PCI: 00:19.1: enabled 1
1004 20:44:48.649350 PCI: 00:19.2: enabled 0
1005 20:44:48.649721 PCI: 00:1a.0: enabled 0
1006 20:44:48.652629 PCI: 00:1c.0: enabled 0
1007 20:44:48.656200 PCI: 00:1c.1: enabled 0
1008 20:44:48.659451 PCI: 00:1c.2: enabled 0
1009 20:44:48.659906 PCI: 00:1c.3: enabled 0
1010 20:44:48.662827 PCI: 00:1c.4: enabled 0
1011 20:44:48.665938 PCI: 00:1c.5: enabled 0
1012 20:44:48.666299 PCI: 00:1c.6: enabled 0
1013 20:44:48.669497 PCI: 00:1c.7: enabled 0
1014 20:44:48.672631 PCI: 00:1d.0: enabled 0
1015 20:44:48.676367 PCI: 00:1d.1: enabled 0
1016 20:44:48.676786 PCI: 00:1d.2: enabled 0
1017 20:44:48.679735 PCI: 00:1d.3: enabled 0
1018 20:44:48.682440 PCI: 00:1e.0: enabled 1
1019 20:44:48.686239 PCI: 00:1e.1: enabled 0
1020 20:44:48.686658 PCI: 00:1e.2: enabled 0
1021 20:44:48.689522 PCI: 00:1e.3: enabled 1
1022 20:44:48.692777 PCI: 00:1f.0: enabled 1
1023 20:44:48.696028 PCI: 00:1f.1: enabled 0
1024 20:44:48.696483 PCI: 00:1f.2: enabled 1
1025 20:44:48.699956 PCI: 00:1f.3: enabled 1
1026 20:44:48.702816 PCI: 00:1f.4: enabled 0
1027 20:44:48.703264 PCI: 00:1f.5: enabled 1
1028 20:44:48.706173 PCI: 00:1f.6: enabled 0
1029 20:44:48.709214 PCI: 00:1f.7: enabled 0
1030 20:44:48.712448 GENERIC: 0.0: enabled 1
1031 20:44:48.712824 GENERIC: 0.0: enabled 1
1032 20:44:48.716281 GENERIC: 1.0: enabled 1
1033 20:44:48.719630 GENERIC: 0.0: enabled 1
1034 20:44:48.722948 GENERIC: 1.0: enabled 1
1035 20:44:48.723402 USB0 port 0: enabled 1
1036 20:44:48.726026 USB0 port 0: enabled 1
1037 20:44:48.729309 GENERIC: 0.0: enabled 1
1038 20:44:48.729628 I2C: 00:1a: enabled 1
1039 20:44:48.732679 I2C: 00:31: enabled 1
1040 20:44:48.736149 I2C: 00:32: enabled 1
1041 20:44:48.736560 I2C: 00:50: enabled 1
1042 20:44:48.739625 I2C: 00:10: enabled 1
1043 20:44:48.742968 I2C: 00:15: enabled 1
1044 20:44:48.743477 I2C: 00:2c: enabled 1
1045 20:44:48.746105 GENERIC: 0.0: enabled 1
1046 20:44:48.749689 SPI: 00: enabled 1
1047 20:44:48.750134 PNP: 0c09.0: enabled 1
1048 20:44:48.752719 GENERIC: 0.0: enabled 1
1049 20:44:48.756024 USB3 port 0: enabled 1
1050 20:44:48.759490 USB3 port 1: enabled 0
1051 20:44:48.759915 USB3 port 2: enabled 1
1052 20:44:48.763021 USB3 port 3: enabled 0
1053 20:44:48.765740 USB2 port 0: enabled 1
1054 20:44:48.766102 USB2 port 1: enabled 0
1055 20:44:48.769028 USB2 port 2: enabled 1
1056 20:44:48.772958 USB2 port 3: enabled 0
1057 20:44:48.776167 USB2 port 4: enabled 0
1058 20:44:48.776489 USB2 port 5: enabled 1
1059 20:44:48.779454 USB2 port 6: enabled 0
1060 20:44:48.782819 USB2 port 7: enabled 0
1061 20:44:48.783232 USB2 port 8: enabled 1
1062 20:44:48.785847 USB2 port 9: enabled 1
1063 20:44:48.788894 USB3 port 0: enabled 1
1064 20:44:48.792958 USB3 port 1: enabled 0
1065 20:44:48.793365 USB3 port 2: enabled 0
1066 20:44:48.796062 USB3 port 3: enabled 0
1067 20:44:48.799631 GENERIC: 0.0: enabled 1
1068 20:44:48.799958 GENERIC: 1.0: enabled 1
1069 20:44:48.802865 APIC: 00: enabled 1
1070 20:44:48.805931 APIC: 12: enabled 1
1071 20:44:48.806339 APIC: 14: enabled 1
1072 20:44:48.809531 APIC: 16: enabled 1
1073 20:44:48.809939 APIC: 10: enabled 1
1074 20:44:48.812606 APIC: 09: enabled 1
1075 20:44:48.816149 APIC: 08: enabled 1
1076 20:44:48.816575 APIC: 01: enabled 1
1077 20:44:48.819330 Compare with tree...
1078 20:44:48.822689 Root Device: enabled 1
1079 20:44:48.825861 CPU_CLUSTER: 0: enabled 1
1080 20:44:48.826228 APIC: 00: enabled 1
1081 20:44:48.829298 APIC: 12: enabled 1
1082 20:44:48.832617 APIC: 14: enabled 1
1083 20:44:48.832993 APIC: 16: enabled 1
1084 20:44:48.835774 APIC: 10: enabled 1
1085 20:44:48.839329 APIC: 09: enabled 1
1086 20:44:48.839798 APIC: 08: enabled 1
1087 20:44:48.842444 APIC: 01: enabled 1
1088 20:44:48.846106 DOMAIN: 0000: enabled 1
1089 20:44:48.846562 GPIO: 0: enabled 1
1090 20:44:48.849171 PCI: 00:00.0: enabled 1
1091 20:44:48.852944 PCI: 00:01.0: enabled 0
1092 20:44:48.855906 PCI: 00:01.1: enabled 0
1093 20:44:48.859328 PCI: 00:02.0: enabled 1
1094 20:44:48.859825 PCI: 00:04.0: enabled 1
1095 20:44:48.862255 GENERIC: 0.0: enabled 1
1096 20:44:48.865192 PCI: 00:05.0: enabled 0
1097 20:44:48.868880 PCI: 00:06.0: enabled 1
1098 20:44:48.871995 PCI: 00:06.2: enabled 0
1099 20:44:48.872367 PCI: 00:08.0: enabled 0
1100 20:44:48.875694 PCI: 00:09.0: enabled 0
1101 20:44:48.878727 PCI: 00:0a.0: enabled 1
1102 20:44:48.882207 PCI: 00:0d.0: enabled 1
1103 20:44:48.882536 USB0 port 0: enabled 1
1104 20:44:48.885285 USB3 port 0: enabled 1
1105 20:44:48.888934 USB3 port 1: enabled 0
1106 20:44:48.892601 USB3 port 2: enabled 1
1107 20:44:48.895745 USB3 port 3: enabled 0
1108 20:44:48.899508 PCI: 00:0d.1: enabled 0
1109 20:44:48.899930 PCI: 00:0d.2: enabled 0
1110 20:44:48.902216 PCI: 00:0d.3: enabled 0
1111 20:44:48.905556 PCI: 00:0e.0: enabled 0
1112 20:44:48.908896 PCI: 00:10.0: enabled 0
1113 20:44:48.911975 PCI: 00:10.1: enabled 0
1114 20:44:48.912302 PCI: 00:10.6: enabled 0
1115 20:44:48.915451 PCI: 00:10.7: enabled 0
1116 20:44:48.918970 PCI: 00:12.0: enabled 0
1117 20:44:48.922402 PCI: 00:12.6: enabled 0
1118 20:44:48.925725 PCI: 00:12.7: enabled 0
1119 20:44:48.926152 PCI: 00:13.0: enabled 0
1120 20:44:48.928610 PCI: 00:14.0: enabled 1
1121 20:44:48.931912 USB0 port 0: enabled 1
1122 20:44:48.935688 USB2 port 0: enabled 1
1123 20:44:48.938820 USB2 port 1: enabled 0
1124 20:44:48.939257 USB2 port 2: enabled 1
1125 20:44:48.942202 USB2 port 3: enabled 0
1126 20:44:48.945398 USB2 port 4: enabled 0
1127 20:44:48.948695 USB2 port 5: enabled 1
1128 20:44:48.952243 USB2 port 6: enabled 0
1129 20:44:48.952751 USB2 port 7: enabled 0
1130 20:44:48.955912 USB2 port 8: enabled 1
1131 20:44:48.959472 USB2 port 9: enabled 1
1132 20:44:48.961994 USB3 port 0: enabled 1
1133 20:44:48.965084 USB3 port 1: enabled 0
1134 20:44:48.968157 USB3 port 2: enabled 0
1135 20:44:48.968456 USB3 port 3: enabled 0
1136 20:44:48.972134 PCI: 00:14.1: enabled 0
1137 20:44:48.975511 PCI: 00:14.2: enabled 1
1138 20:44:48.978564 PCI: 00:14.3: enabled 1
1139 20:44:48.981877 GENERIC: 0.0: enabled 1
1140 20:44:48.982265 PCI: 00:15.0: enabled 1
1141 20:44:48.985069 I2C: 00:1a: enabled 1
1142 20:44:48.988309 I2C: 00:31: enabled 1
1143 20:44:48.992066 I2C: 00:32: enabled 1
1144 20:44:48.992556 PCI: 00:15.1: enabled 1
1145 20:44:48.995787 I2C: 00:50: enabled 1
1146 20:44:48.998632 PCI: 00:15.2: enabled 0
1147 20:44:58.047062 PCI: 00:15.3: enabled 1
1148 20:44:58.047450 I2C: 00:10: enabled 1
1149 20:44:58.047685 PCI: 00:16.0: enabled 1
1150 20:44:58.047896 PCI: 00:16.1: enabled 0
1151 20:44:58.048098 PCI: 00:16.2: enabled 0
1152 20:44:58.048291 PCI: 00:16.3: enabled 0
1153 20:44:58.048484 PCI: 00:16.4: enabled 0
1154 20:44:58.048680 PCI: 00:16.5: enabled 0
1155 20:44:58.048927 PCI: 00:17.0: enabled 1
1156 20:44:58.049226 PCI: 00:19.0: enabled 0
1157 20:44:58.049540 PCI: 00:19.1: enabled 1
1158 20:44:58.049752 I2C: 00:15: enabled 1
1159 20:44:58.049947 I2C: 00:2c: enabled 1
1160 20:44:58.050074 PCI: 00:19.2: enabled 0
1161 20:44:58.050113 PCI: 00:1a.0: enabled 0
1162 20:44:58.050153 PCI: 00:1e.0: enabled 1
1163 20:44:58.050192 PCI: 00:1e.1: enabled 0
1164 20:44:58.050230 PCI: 00:1e.2: enabled 0
1165 20:44:58.050270 PCI: 00:1e.3: enabled 1
1166 20:44:58.050309 SPI: 00: enabled 1
1167 20:44:58.050348 PCI: 00:1f.0: enabled 1
1168 20:44:58.050387 PNP: 0c09.0: enabled 1
1169 20:44:58.050427 PCI: 00:1f.1: enabled 0
1170 20:44:58.050466 PCI: 00:1f.2: enabled 1
1171 20:44:58.050506 GENERIC: 0.0: enabled 1
1172 20:44:58.050545 GENERIC: 0.0: enabled 1
1173 20:44:58.050584 GENERIC: 1.0: enabled 1
1174 20:44:58.050623 PCI: 00:1f.3: enabled 1
1175 20:44:58.050663 PCI: 00:1f.4: enabled 0
1176 20:44:58.050701 PCI: 00:1f.5: enabled 1
1177 20:44:58.050741 PCI: 00:1f.6: enabled 0
1178 20:44:58.050779 PCI: 00:1f.7: enabled 0
1179 20:44:58.050818 Root Device scanning...
1180 20:44:58.050870 scan_static_bus for Root Device
1181 20:44:58.050907 CPU_CLUSTER: 0 enabled
1182 20:44:58.050943 DOMAIN: 0000 enabled
1183 20:44:58.050980 DOMAIN: 0000 scanning...
1184 20:44:58.051017 PCI: pci_scan_bus for bus 00
1185 20:44:58.051054 PCI: 00:00.0 [8086/0000] ops
1186 20:44:58.051091 PCI: 00:00.0 [8086/4609] enabled
1187 20:44:58.051127 PCI: 00:02.0 [8086/0000] bus ops
1188 20:44:58.051164 PCI: 00:02.0 [8086/46b3] enabled
1189 20:44:58.051201 PCI: 00:04.0 [8086/0000] bus ops
1190 20:44:58.051239 PCI: 00:04.0 [8086/461d] enabled
1191 20:44:58.051276 PCI: 00:06.0 [8086/0000] bus ops
1192 20:44:58.051314 PCI: 00:06.0 [8086/464d] enabled
1193 20:44:58.051350 PCI: 00:08.0 [8086/464f] disabled
1194 20:44:58.051387 PCI: 00:0a.0 [8086/467d] enabled
1195 20:44:58.051423 PCI: 00:0d.0 [8086/0000] bus ops
1196 20:44:58.051460 PCI: 00:0d.0 [8086/461e] enabled
1197 20:44:58.051497 PCI: 00:14.0 [8086/0000] bus ops
1198 20:44:58.051534 PCI: 00:14.0 [8086/51ed] enabled
1199 20:44:58.051571 PCI: 00:14.2 [8086/51ef] enabled
1200 20:44:58.051608 PCI: 00:14.3 [8086/0000] bus ops
1201 20:44:58.051644 PCI: 00:14.3 [8086/51f0] enabled
1202 20:44:58.051681 PCI: 00:15.0 [8086/0000] bus ops
1203 20:44:58.051718 PCI: 00:15.0 [8086/51e8] enabled
1204 20:44:58.051755 PCI: 00:15.1 [8086/0000] bus ops
1205 20:44:58.051793 PCI: 00:15.1 [8086/51e9] enabled
1206 20:44:58.051830 PCI: 00:15.2 [8086/0000] bus ops
1207 20:44:58.051868 PCI: 00:15.2 [8086/51ea] disabled
1208 20:44:58.051905 PCI: 00:15.3 [8086/0000] bus ops
1209 20:44:58.051942 PCI: 00:15.3 [8086/51eb] enabled
1210 20:44:58.051978 PCI: 00:16.0 [8086/0000] ops
1211 20:44:58.052022 PCI: 00:16.0 [8086/51e0] enabled
1212 20:44:58.052064 PCI: Static device PCI: 00:17.0 not found, disabling it.
1213 20:44:58.052103 PCI: 00:19.0 [8086/0000] bus ops
1214 20:44:58.052146 PCI: 00:19.0 [8086/51c5] disabled
1215 20:44:58.052189 PCI: 00:19.1 [8086/0000] bus ops
1216 20:44:58.052227 PCI: 00:19.1 [8086/51c6] enabled
1217 20:44:58.052278 PCI: 00:1e.0 [8086/0000] ops
1218 20:44:58.052348 PCI: 00:1e.0 [8086/51a8] enabled
1219 20:44:58.052390 PCI: 00:1e.3 [8086/0000] bus ops
1220 20:44:58.052428 PCI: 00:1e.3 [8086/51ab] enabled
1221 20:44:58.052466 PCI: 00:1f.0 [8086/0000] bus ops
1222 20:44:58.052503 PCI: 00:1f.0 [8086/5182] enabled
1223 20:44:58.052541 RTC Init
1224 20:44:58.052579 Set power on after power failure.
1225 20:44:58.052617 Disabling Deep S3
1226 20:44:58.052655 Disabling Deep S3
1227 20:44:58.052692 Disabling Deep S4
1228 20:44:58.052729 Disabling Deep S4
1229 20:44:58.052767 Disabling Deep S5
1230 20:44:58.052808 Disabling Deep S5
1231 20:44:58.052878 PCI: 00:1f.2 [0000/0000] hidden
1232 20:44:58.052915 PCI: 00:1f.3 [8086/0000] bus ops
1233 20:44:58.052953 PCI: 00:1f.3 [8086/51c8] enabled
1234 20:44:58.052990 PCI: 00:1f.5 [8086/0000] bus ops
1235 20:44:58.053027 PCI: 00:1f.5 [8086/51a4] enabled
1236 20:44:58.053065 GPIO: 0 enabled
1237 20:44:58.053103 PCI: Leftover static devices:
1238 20:44:58.053141 PCI: 00:01.0
1239 20:44:58.053179 PCI: 00:01.1
1240 20:44:58.053217 PCI: 00:05.0
1241 20:44:58.053254 PCI: 00:06.2
1242 20:44:58.053291 PCI: 00:09.0
1243 20:44:58.053327 PCI: 00:0d.1
1244 20:44:58.053364 PCI: 00:0d.2
1245 20:44:58.053402 PCI: 00:0d.3
1246 20:44:58.053440 PCI: 00:0e.0
1247 20:44:58.053477 PCI: 00:10.0
1248 20:44:58.053514 PCI: 00:10.1
1249 20:44:58.053551 PCI: 00:10.6
1250 20:44:58.053588 PCI: 00:10.7
1251 20:44:58.053627 PCI: 00:12.0
1252 20:44:58.053664 PCI: 00:12.6
1253 20:44:58.053702 PCI: 00:12.7
1254 20:44:58.053739 PCI: 00:13.0
1255 20:44:58.053776 PCI: 00:14.1
1256 20:44:58.053813 PCI: 00:16.1
1257 20:44:58.053849 PCI: 00:16.2
1258 20:44:58.053887 PCI: 00:16.3
1259 20:44:58.053924 PCI: 00:16.4
1260 20:44:58.053961 PCI: 00:16.5
1261 20:44:58.053999 PCI: 00:17.0
1262 20:44:58.054036 PCI: 00:19.2
1263 20:44:58.054073 PCI: 00:1a.0
1264 20:44:58.054110 PCI: 00:1e.1
1265 20:44:58.054147 PCI: 00:1e.2
1266 20:44:58.054183 PCI: 00:1f.1
1267 20:44:58.054219 PCI: 00:1f.4
1268 20:44:58.054257 PCI: 00:1f.6
1269 20:44:58.054294 PCI: 00:1f.7
1270 20:44:58.054331 PCI: Check your devicetree.cb.
1271 20:44:58.054368 PCI: 00:02.0 scanning...
1272 20:44:58.054405 scan_generic_bus for PCI: 00:02.0
1273 20:44:58.054443 scan_generic_bus for PCI: 00:02.0 done
1274 20:44:58.054480 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1275 20:44:58.054517 PCI: 00:04.0 scanning...
1276 20:44:58.054554 scan_generic_bus for PCI: 00:04.0
1277 20:44:58.054592 GENERIC: 0.0 enabled
1278 20:44:58.054630 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1279 20:44:58.054667 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1280 20:44:58.054705 PCI: 00:06.0 scanning...
1281 20:44:58.054742 do_pci_scan_bridge for PCI: 00:06.0
1282 20:44:58.054780 PCI: pci_scan_bus for bus 01
1283 20:44:58.054818 PCI: 01:00.0 [15b7/5009] enabled
1284 20:44:58.054855 Enabling Common Clock Configuration
1285 20:44:58.054893 L1 Sub-State supported from root port 6
1286 20:44:58.054930 L1 Sub-State Support = 0x5
1287 20:44:58.054967 CommonModeRestoreTime = 0x6e
1288 20:44:58.055004 Power On Value = 0x5, Power On Scale = 0x2
1289 20:44:58.055040 ASPM: Enabled L1
1290 20:44:58.055078 PCIe: Max_Payload_Size adjusted to 256
1291 20:44:58.055116 PCI: 01:00.0: Enabled LTR
1292 20:44:58.055153 PCI: 01:00.0: Programmed LTR max latencies
1293 20:44:58.055190 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1294 20:44:58.055229 PCI: 00:0d.0 scanning...
1295 20:44:58.055266 scan_static_bus for PCI: 00:0d.0
1296 20:44:58.055304 USB0 port 0 enabled
1297 20:44:58.055556 USB0 port 0 scanning...
1298 20:44:58.055683 scan_static_bus for USB0 port 0
1299 20:44:58.055769 USB3 port 0 enabled
1300 20:44:58.055849 USB3 port 1 disabled
1301 20:44:58.055929 USB3 port 2 enabled
1302 20:44:58.056006 USB3 port 3 disabled
1303 20:44:58.056086 USB3 port 0 scanning...
1304 20:44:58.056163 scan_static_bus for USB3 port 0
1305 20:44:58.056255 scan_static_bus for USB3 port 0 done
1306 20:44:58.056295 scan_bus: bus USB3 port 0 finished in 6 msecs
1307 20:44:58.056334 USB3 port 2 scanning...
1308 20:44:58.056370 scan_static_bus for USB3 port 2
1309 20:44:58.056408 scan_static_bus for USB3 port 2 done
1310 20:44:58.056446 scan_bus: bus USB3 port 2 finished in 6 msecs
1311 20:44:58.056484 scan_static_bus for USB0 port 0 done
1312 20:44:58.056521 scan_bus: bus USB0 port 0 finished in 43 msecs
1313 20:44:58.056559 scan_static_bus for PCI: 00:0d.0 done
1314 20:44:58.056597 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1315 20:44:58.056636 PCI: 00:14.0 scanning...
1316 20:44:58.056674 scan_static_bus for PCI: 00:14.0
1317 20:44:58.056711 USB0 port 0 enabled
1318 20:44:58.056749 USB0 port 0 scanning...
1319 20:44:58.056787 scan_static_bus for USB0 port 0
1320 20:44:58.056831 USB2 port 0 enabled
1321 20:44:58.056870 USB2 port 1 disabled
1322 20:44:58.056921 USB2 port 2 enabled
1323 20:44:58.056958 USB2 port 3 disabled
1324 20:44:58.056995 USB2 port 4 disabled
1325 20:44:58.057032 USB2 port 5 enabled
1326 20:44:58.057069 USB2 port 6 disabled
1327 20:44:58.057105 USB2 port 7 disabled
1328 20:44:58.057142 USB2 port 8 enabled
1329 20:44:58.057178 USB2 port 9 enabled
1330 20:44:58.057215 USB3 port 0 enabled
1331 20:44:58.057251 USB3 port 1 disabled
1332 20:44:58.057287 USB3 port 2 disabled
1333 20:44:58.057324 USB3 port 3 disabled
1334 20:44:58.057361 USB2 port 0 scanning...
1335 20:44:58.057398 scan_static_bus for USB2 port 0
1336 20:44:58.057435 scan_static_bus for USB2 port 0 done
1337 20:44:58.057472 scan_bus: bus USB2 port 0 finished in 6 msecs
1338 20:44:58.057510 USB2 port 2 scanning...
1339 20:44:58.057547 scan_static_bus for USB2 port 2
1340 20:44:58.057583 scan_static_bus for USB2 port 2 done
1341 20:44:58.057621 scan_bus: bus USB2 port 2 finished in 6 msecs
1342 20:44:58.057657 USB2 port 5 scanning...
1343 20:44:58.057695 scan_static_bus for USB2 port 5
1344 20:44:58.057731 scan_static_bus for USB2 port 5 done
1345 20:44:58.057769 scan_bus: bus USB2 port 5 finished in 6 msecs
1346 20:44:58.057806 USB2 port 8 scanning...
1347 20:44:58.057842 scan_static_bus for USB2 port 8
1348 20:44:58.057879 scan_static_bus for USB2 port 8 done
1349 20:44:58.057915 scan_bus: bus USB2 port 8 finished in 6 msecs
1350 20:44:58.057953 USB2 port 9 scanning...
1351 20:44:58.057990 scan_static_bus for USB2 port 9
1352 20:44:58.058028 scan_static_bus for USB2 port 9 done
1353 20:44:58.058066 scan_bus: bus USB2 port 9 finished in 6 msecs
1354 20:44:58.058103 USB3 port 0 scanning...
1355 20:44:58.058140 scan_static_bus for USB3 port 0
1356 20:44:58.058178 scan_static_bus for USB3 port 0 done
1357 20:44:58.058216 scan_bus: bus USB3 port 0 finished in 6 msecs
1358 20:44:58.058253 scan_static_bus for USB0 port 0 done
1359 20:44:58.058291 scan_bus: bus USB0 port 0 finished in 120 msecs
1360 20:44:58.058329 scan_static_bus for PCI: 00:14.0 done
1361 20:44:58.058367 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1362 20:44:58.058405 PCI: 00:14.3 scanning...
1363 20:44:58.058444 scan_static_bus for PCI: 00:14.3
1364 20:44:58.058481 GENERIC: 0.0 enabled
1365 20:44:58.058518 scan_static_bus for PCI: 00:14.3 done
1366 20:44:58.058556 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1367 20:44:58.058594 PCI: 00:15.0 scanning...
1368 20:44:58.058632 scan_static_bus for PCI: 00:15.0
1369 20:44:58.058669 I2C: 00:1a enabled
1370 20:44:58.058724 I2C: 00:31 enabled
1371 20:44:58.058788 I2C: 00:32 enabled
1372 20:44:58.058828 scan_static_bus for PCI: 00:15.0 done
1373 20:44:58.058866 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1374 20:44:58.058904 PCI: 00:15.1 scanning...
1375 20:44:58.058942 scan_static_bus for PCI: 00:15.1
1376 20:44:58.058980 I2C: 00:50 enabled
1377 20:44:58.059017 scan_static_bus for PCI: 00:15.1 done
1378 20:44:58.059054 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1379 20:44:58.059091 PCI: 00:15.3 scanning...
1380 20:44:58.059129 scan_static_bus for PCI: 00:15.3
1381 20:44:58.059166 I2C: 00:10 enabled
1382 20:44:58.059203 scan_static_bus for PCI: 00:15.3 done
1383 20:44:58.059240 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1384 20:44:58.059277 PCI: 00:19.1 scanning...
1385 20:44:58.059315 scan_static_bus for PCI: 00:19.1
1386 20:44:58.059353 I2C: 00:15 enabled
1387 20:44:58.059391 I2C: 00:2c enabled
1388 20:44:58.059428 scan_static_bus for PCI: 00:19.1 done
1389 20:44:58.059466 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1390 20:44:58.059504 PCI: 00:1e.3 scanning...
1391 20:44:58.059541 scan_generic_bus for PCI: 00:1e.3
1392 20:44:58.059579 SPI: 00 enabled
1393 20:44:58.059616 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1394 20:44:58.059654 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1395 20:44:58.059692 PCI: 00:1f.0 scanning...
1396 20:44:58.059728 scan_static_bus for PCI: 00:1f.0
1397 20:44:58.059765 PNP: 0c09.0 enabled
1398 20:44:58.059803 PNP: 0c09.0 scanning...
1399 20:44:58.059839 scan_static_bus for PNP: 0c09.0
1400 20:44:58.059877 scan_static_bus for PNP: 0c09.0 done
1401 20:44:58.059913 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1402 20:44:58.059949 scan_static_bus for PCI: 00:1f.0 done
1403 20:44:58.059986 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1404 20:44:58.060022 PCI: 00:1f.2 scanning...
1405 20:44:58.060058 scan_static_bus for PCI: 00:1f.2
1406 20:44:58.060095 GENERIC: 0.0 enabled
1407 20:44:58.060132 GENERIC: 0.0 scanning...
1408 20:44:58.060170 scan_static_bus for GENERIC: 0.0
1409 20:44:58.060207 GENERIC: 0.0 enabled
1410 20:44:58.060244 GENERIC: 1.0 enabled
1411 20:44:58.060281 scan_static_bus for GENERIC: 0.0 done
1412 20:44:58.060318 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1413 20:44:58.060355 scan_static_bus for PCI: 00:1f.2 done
1414 20:44:58.060393 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1415 20:44:58.060430 PCI: 00:1f.3 scanning...
1416 20:44:58.060467 scan_static_bus for PCI: 00:1f.3
1417 20:44:58.060505 scan_static_bus for PCI: 00:1f.3 done
1418 20:44:58.060542 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1419 20:44:58.060578 PCI: 00:1f.5 scanning...
1420 20:44:58.060614 scan_generic_bus for PCI: 00:1f.5
1421 20:44:58.060652 scan_generic_bus for PCI: 00:1f.5 done
1422 20:44:58.060830 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1423 20:44:58.060875 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1424 20:44:58.060915 scan_static_bus for Root Device done
1425 20:44:58.060954 scan_bus: bus Root Device finished in 729 msecs
1426 20:44:58.060992 done
1427 20:44:58.061029 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1428 20:44:58.061068 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1429 20:44:58.061108 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1430 20:44:58.061146 SPI flash protection: WPSW=0 SRP0=0
1431 20:44:58.061185 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1432 20:44:58.061223 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1433 20:44:58.061277 found VGA at PCI: 00:02.0
1434 20:44:58.061316 Setting up VGA for PCI: 00:02.0
1435 20:44:58.061354 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1436 20:44:58.061394 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1437 20:44:58.061432 Allocating resources...
1438 20:44:58.061471 Reading resources...
1439 20:44:58.061509 Root Device read_resources bus 0 link: 0
1440 20:44:58.061551 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1441 20:44:58.061590 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1442 20:44:58.061628 DOMAIN: 0000 read_resources bus 0 link: 0
1443 20:44:58.061667 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1444 20:44:58.061707 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1445 20:44:58.061745 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1446 20:44:58.061784 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1447 20:44:58.061822 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1448 20:44:58.061861 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1449 20:44:58.061899 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1450 20:44:58.061939 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1451 20:44:58.061978 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1452 20:44:58.062016 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1453 20:44:58.062055 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1454 20:44:58.062093 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1455 20:44:58.062132 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1456 20:44:58.062184 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1457 20:44:58.062229 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1458 20:44:58.062268 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1459 20:44:58.062307 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1460 20:44:58.062346 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1461 20:44:58.062385 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1462 20:44:58.062423 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1463 20:44:58.062462 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1464 20:44:58.062501 PCI: 00:04.0 read_resources bus 1 link: 0
1465 20:44:58.062540 PCI: 00:04.0 read_resources bus 1 link: 0 done
1466 20:44:58.062578 PCI: 00:06.0 read_resources bus 1 link: 0
1467 20:44:58.062616 PCI: 00:06.0 read_resources bus 1 link: 0 done
1468 20:44:58.062655 PCI: 00:0d.0 read_resources bus 0 link: 0
1469 20:44:58.062694 USB0 port 0 read_resources bus 0 link: 0
1470 20:44:58.062734 USB0 port 0 read_resources bus 0 link: 0 done
1471 20:44:58.062773 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1472 20:44:58.062811 PCI: 00:14.0 read_resources bus 0 link: 0
1473 20:44:58.062849 USB0 port 0 read_resources bus 0 link: 0
1474 20:44:58.062887 USB0 port 0 read_resources bus 0 link: 0 done
1475 20:44:58.062926 PCI: 00:14.0 read_resources bus 0 link: 0 done
1476 20:44:58.062964 PCI: 00:14.3 read_resources bus 0 link: 0
1477 20:44:58.063002 PCI: 00:14.3 read_resources bus 0 link: 0 done
1478 20:44:58.063041 PCI: 00:15.0 read_resources bus 0 link: 0
1479 20:44:58.063080 PCI: 00:15.0 read_resources bus 0 link: 0 done
1480 20:44:58.063118 PCI: 00:15.1 read_resources bus 0 link: 0
1481 20:44:58.063157 PCI: 00:15.1 read_resources bus 0 link: 0 done
1482 20:44:58.063195 PCI: 00:15.3 read_resources bus 0 link: 0
1483 20:44:58.063233 PCI: 00:15.3 read_resources bus 0 link: 0 done
1484 20:44:58.063272 PCI: 00:19.1 read_resources bus 0 link: 0
1485 20:44:58.063311 PCI: 00:19.1 read_resources bus 0 link: 0 done
1486 20:44:58.063348 PCI: 00:1e.3 read_resources bus 2 link: 0
1487 20:44:58.063386 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1488 20:44:58.063424 PCI: 00:1f.0 read_resources bus 0 link: 0
1489 20:44:58.063462 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1490 20:44:58.063499 PCI: 00:1f.2 read_resources bus 0 link: 0
1491 20:44:58.063537 GENERIC: 0.0 read_resources bus 0 link: 0
1492 20:44:58.063575 GENERIC: 0.0 read_resources bus 0 link: 0 done
1493 20:44:58.063614 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1494 20:44:58.063652 DOMAIN: 0000 read_resources bus 0 link: 0 done
1495 20:44:58.063690 Root Device read_resources bus 0 link: 0 done
1496 20:44:58.063728 Done reading resources.
1497 20:44:58.063767 Show resources in subtree (Root Device)...After reading.
1498 20:44:58.063806 Root Device child on link 0 CPU_CLUSTER: 0
1499 20:44:58.063844 CPU_CLUSTER: 0 child on link 0 APIC: 00
1500 20:44:58.063883 APIC: 00
1501 20:44:58.063920 APIC: 12
1502 20:44:58.063957 APIC: 14
1503 20:44:58.063995 APIC: 16
1504 20:44:58.064032 APIC: 10
1505 20:44:58.064070 APIC: 09
1506 20:44:58.064108 APIC: 08
1507 20:44:58.064146 APIC: 01
1508 20:44:58.064184 DOMAIN: 0000 child on link 0 GPIO: 0
1509 20:44:58.064401 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1510 20:44:58.064449 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1511 20:44:58.064490 GPIO: 0
1512 20:44:58.064528 PCI: 00:00.0
1513 20:44:58.064568 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1514 20:44:58.064609 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1515 20:44:58.064648 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1516 20:44:58.064686 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1517 20:44:58.064726 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1518 20:44:58.064764 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1519 20:44:58.064807 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1520 20:44:58.064849 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1521 20:44:58.064888 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1522 20:44:58.064927 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1523 20:44:58.064967 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1524 20:44:58.065006 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1525 20:44:58.065045 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1526 20:44:58.065085 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1527 20:44:58.065124 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1528 20:44:58.065162 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1529 20:44:58.065201 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1530 20:44:58.065239 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1531 20:44:58.065277 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1532 20:44:58.065316 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1533 20:44:58.065371 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1534 20:44:58.065413 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1535 20:44:58.065453 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1536 20:44:58.065492 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1537 20:44:58.065531 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1538 20:44:58.065569 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1539 20:44:58.065607 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1540 20:44:58.065646 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1541 20:44:58.065685 PCI: 00:02.0
1542 20:44:58.065723 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1543 20:44:58.065763 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1544 20:44:58.065801 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1545 20:44:58.065839 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1546 20:44:58.065878 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1547 20:44:58.065916 GENERIC: 0.0
1548 20:44:58.065954 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1549 20:44:58.065992 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1550 20:44:58.066030 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1551 20:44:58.066069 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1552 20:44:58.066109 PCI: 01:00.0
1553 20:44:58.066149 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1554 20:44:58.066189 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1555 20:44:58.066227 PCI: 00:08.0
1556 20:44:58.066265 PCI: 00:0a.0
1557 20:44:58.066303 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1558 20:44:58.066520 PCI: 00:0d.0 child on link 0 USB0 port 0
1559 20:44:58.066565 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1560 20:44:58.066605 USB0 port 0 child on link 0 USB3 port 0
1561 20:44:58.066644 USB3 port 0
1562 20:44:58.066682 USB3 port 1
1563 20:44:58.066720 USB3 port 2
1564 20:44:58.066757 USB3 port 3
1565 20:44:58.066796 PCI: 00:14.0 child on link 0 USB0 port 0
1566 20:44:58.066835 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1567 20:44:58.066873 USB0 port 0 child on link 0 USB2 port 0
1568 20:44:58.066911 USB2 port 0
1569 20:44:58.066949 USB2 port 1
1570 20:44:58.066986 USB2 port 2
1571 20:44:58.067023 USB2 port 3
1572 20:44:58.067060 USB2 port 4
1573 20:44:58.067097 USB2 port 5
1574 20:44:58.067134 USB2 port 6
1575 20:44:58.067171 USB2 port 7
1576 20:44:58.067209 USB2 port 8
1577 20:44:58.067247 USB2 port 9
1578 20:44:58.067283 USB3 port 0
1579 20:44:58.067322 USB3 port 1
1580 20:44:58.067359 USB3 port 2
1581 20:44:58.067397 USB3 port 3
1582 20:44:58.067435 PCI: 00:14.2
1583 20:44:58.067473 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1584 20:44:58.067512 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1585 20:44:58.067550 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1586 20:44:58.067589 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1587 20:44:58.067627 GENERIC: 0.0
1588 20:44:58.067665 PCI: 00:15.0 child on link 0 I2C: 00:1a
1589 20:44:58.067703 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1590 20:44:58.067742 I2C: 00:1a
1591 20:44:58.067780 I2C: 00:31
1592 20:44:58.067817 I2C: 00:32
1593 20:44:58.067855 PCI: 00:15.1 child on link 0 I2C: 00:50
1594 20:44:58.067893 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1595 20:44:58.067931 I2C: 00:50
1596 20:44:58.067968 PCI: 00:15.2
1597 20:44:58.068007 PCI: 00:15.3 child on link 0 I2C: 00:10
1598 20:44:58.068045 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1599 20:44:58.068082 I2C: 00:10
1600 20:44:58.068119 PCI: 00:16.0
1601 20:44:58.068157 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1602 20:44:58.068194 PCI: 00:19.0
1603 20:44:58.068231 PCI: 00:19.1 child on link 0 I2C: 00:15
1604 20:44:58.068269 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1605 20:44:58.068308 I2C: 00:15
1606 20:44:58.068346 I2C: 00:2c
1607 20:44:58.068384 PCI: 00:1e.0
1608 20:44:58.068421 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1609 20:44:58.068460 PCI: 00:1e.3 child on link 0 SPI: 00
1610 20:44:58.068500 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1611 20:44:58.068552 SPI: 00
1612 20:44:58.068592 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1613 20:44:58.068632 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1614 20:44:58.068670 PNP: 0c09.0
1615 20:44:58.068708 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1616 20:44:58.068746 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1617 20:44:58.068784 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1618 20:44:58.068831 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1619 20:44:58.068872 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1620 20:44:58.068911 GENERIC: 0.0
1621 20:44:58.068949 GENERIC: 1.0
1622 20:44:58.068987 PCI: 00:1f.3
1623 20:44:58.069026 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1624 20:44:58.069065 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1625 20:44:58.069104 PCI: 00:1f.5
1626 20:44:58.069142 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1627 20:44:58.069180 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1628 20:44:58.069221 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1629 20:44:58.069260 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1630 20:44:58.069298 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1631 20:44:58.069336 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1632 20:44:58.069375 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1633 20:44:58.069414 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1634 20:44:58.069452 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1635 20:44:58.069490 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1636 20:44:58.069529 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1637 20:44:58.069567 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1638 20:44:58.069605 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1639 20:44:58.069643 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1640 20:44:58.069681 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1641 20:44:58.069719 DOMAIN: 0000: Resource ranges:
1642 20:44:58.069933 * Base: 1000, Size: 800, Tag: 100
1643 20:44:58.069979 * Base: 1900, Size: e700, Tag: 100
1644 20:44:58.070020 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1645 20:44:58.070059 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1646 20:44:58.070098 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1647 20:44:58.070138 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1648 20:44:58.070178 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1649 20:44:58.070218 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1650 20:44:58.070257 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1651 20:44:58.070296 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1652 20:44:58.070337 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1653 20:44:58.070375 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1654 20:44:58.070413 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1655 20:44:58.070452 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1656 20:44:58.070491 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1657 20:44:58.070529 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1658 20:44:58.070568 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1659 20:44:58.070606 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1660 20:44:58.070644 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1661 20:44:58.070683 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1662 20:44:58.070721 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1663 20:44:58.070759 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1664 20:44:58.070796 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1665 20:44:58.070835 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1666 20:44:58.070890 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1667 20:44:58.070931 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1668 20:44:58.070969 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1669 20:44:58.071008 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1670 20:44:58.071046 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1671 20:44:58.071085 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1672 20:44:58.071124 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1673 20:44:58.071162 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1674 20:44:58.071201 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1675 20:44:58.071238 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1676 20:44:58.071277 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1677 20:44:58.071315 DOMAIN: 0000: Resource ranges:
1678 20:44:58.071354 * Base: 80400000, Size: 3fc00000, Tag: 200
1679 20:44:58.071392 * Base: d0000000, Size: 28000000, Tag: 200
1680 20:44:58.071431 * Base: fa000000, Size: 1000000, Tag: 200
1681 20:44:58.071470 * Base: fb001000, Size: 17ff000, Tag: 200
1682 20:44:58.071508 * Base: fe800000, Size: 300000, Tag: 200
1683 20:44:58.071546 * Base: feb80000, Size: 80000, Tag: 200
1684 20:44:58.071585 * Base: fed00000, Size: 40000, Tag: 200
1685 20:44:58.071622 * Base: fed70000, Size: 10000, Tag: 200
1686 20:44:58.071660 * Base: fed88000, Size: 8000, Tag: 200
1687 20:44:58.071698 * Base: fed93000, Size: d000, Tag: 200
1688 20:44:58.071736 * Base: feda2000, Size: 1e000, Tag: 200
1689 20:44:58.071774 * Base: fede0000, Size: 1220000, Tag: 200
1690 20:44:58.071812 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1691 20:44:58.071866 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1692 20:44:58.071908 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1693 20:44:58.071947 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1694 20:44:58.071986 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1695 20:44:58.072024 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1696 20:44:58.072062 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1697 20:44:58.072100 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1698 20:44:58.072140 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1699 20:44:58.072178 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1700 20:44:58.072217 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1701 20:44:58.072255 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1702 20:44:58.072294 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1703 20:44:58.072509 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1704 20:44:58.072556 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1705 20:44:58.072596 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1706 20:44:58.072636 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1707 20:44:58.072675 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1708 20:44:58.072713 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1709 20:44:58.072752 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1710 20:44:58.072790 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1711 20:44:58.072840 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1712 20:44:58.072881 PCI: 00:06.0: Resource ranges:
1713 20:44:58.072921 * Base: 80400000, Size: 100000, Tag: 200
1714 20:44:58.072959 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1715 20:44:58.072997 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1716 20:44:58.073036 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1717 20:44:58.073074 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1718 20:44:58.073112 Root Device assign_resources, bus 0 link: 0
1719 20:44:58.073151 DOMAIN: 0000 assign_resources, bus 0 link: 0
1720 20:44:58.073192 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1721 20:44:58.073231 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1722 20:44:58.073270 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1723 20:44:58.073308 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1724 20:44:58.073347 PCI: 00:04.0 assign_resources, bus 1 link: 0
1725 20:44:58.073385 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1726 20:44:58.073423 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1727 20:44:58.073462 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1728 20:44:58.073500 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1729 20:44:58.073537 PCI: 00:06.0 assign_resources, bus 1 link: 0
1730 20:44:58.073575 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1731 20:44:58.073612 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1732 20:44:58.073650 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1733 20:44:58.073688 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1734 20:44:58.073726 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1735 20:44:58.073765 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1736 20:44:58.073803 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1737 20:44:58.073840 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1738 20:44:58.073878 PCI: 00:14.0 assign_resources, bus 0 link: 0
1739 20:44:58.073915 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1740 20:44:58.073953 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1741 20:44:58.073991 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1742 20:44:58.074030 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1743 20:44:58.074069 PCI: 00:14.3 assign_resources, bus 0 link: 0
1744 20:44:58.074107 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1745 20:44:58.074145 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1746 20:44:58.074183 PCI: 00:15.0 assign_resources, bus 0 link: 0
1747 20:44:58.074220 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1748 20:44:58.074258 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1749 20:44:58.074297 PCI: 00:15.1 assign_resources, bus 0 link: 0
1750 20:44:58.074334 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1751 20:44:58.074373 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1752 20:44:58.074412 PCI: 00:15.3 assign_resources, bus 0 link: 0
1753 20:44:58.074449 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1754 20:44:58.074488 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1755 20:44:58.074526 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1756 20:44:58.074564 PCI: 00:19.1 assign_resources, bus 0 link: 0
1757 20:44:58.074602 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1758 20:44:58.074640 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1759 20:44:58.074679 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1760 20:44:58.074718 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1761 20:44:58.074756 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1762 20:44:58.074794 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1763 20:44:58.074831 LPC: Trying to open IO window from 800 size 1ff
1764 20:44:58.074869 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1765 20:44:58.074908 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1766 20:44:58.075125 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1767 20:44:58.075172 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1768 20:44:58.075213 Root Device assign_resources, bus 0 link: 0 done
1769 20:44:58.075252 Done setting resources.
1770 20:44:58.075290 Show resources in subtree (Root Device)...After assigning values.
1771 20:44:58.075330 Root Device child on link 0 CPU_CLUSTER: 0
1772 20:44:58.075368 CPU_CLUSTER: 0 child on link 0 APIC: 00
1773 20:44:58.075406 APIC: 00
1774 20:44:58.075444 APIC: 12
1775 20:44:58.075482 APIC: 14
1776 20:44:58.075519 APIC: 16
1777 20:44:58.075556 APIC: 10
1778 20:44:58.075594 APIC: 09
1779 20:44:58.075632 APIC: 08
1780 20:44:58.075670 APIC: 01
1781 20:44:58.075708 DOMAIN: 0000 child on link 0 GPIO: 0
1782 20:44:58.075746 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1783 20:44:58.075785 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1784 20:44:58.075826 GPIO: 0
1785 20:44:58.075864 PCI: 00:00.0
1786 20:44:58.075902 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1787 20:44:58.075941 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1788 20:44:58.075980 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1789 20:44:58.076019 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1790 20:44:58.076058 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1791 20:44:58.076096 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1792 20:44:58.076134 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1793 20:44:58.076173 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1794 20:44:58.076211 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1795 20:44:58.076249 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1796 20:44:58.076288 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1797 20:44:58.076327 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1798 20:44:58.076365 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1799 20:44:58.076403 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1800 20:44:58.076441 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1801 20:44:58.076480 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1802 20:44:58.076519 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1803 20:44:58.076557 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1804 20:44:58.076597 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1805 20:44:58.076636 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1806 20:44:58.076674 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1807 20:44:58.076713 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1808 20:44:58.076752 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1809 20:44:58.076790 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1810 20:44:58.076846 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1811 20:44:58.076891 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1812 20:44:58.076932 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1813 20:44:58.076972 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1814 20:44:58.077011 PCI: 00:02.0
1815 20:44:58.077050 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1816 20:44:58.077088 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1817 20:44:58.077128 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1818 20:44:58.077166 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1819 20:44:58.077204 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1820 20:44:58.077242 GENERIC: 0.0
1821 20:44:58.077281 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1822 20:44:58.077320 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1823 20:44:58.077534 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1824 20:44:58.077581 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1825 20:44:58.077621 PCI: 01:00.0
1826 20:44:58.077660 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1827 20:44:58.077699 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1828 20:44:58.077738 PCI: 00:08.0
1829 20:44:58.077776 PCI: 00:0a.0
1830 20:44:58.077814 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1831 20:44:58.077852 PCI: 00:0d.0 child on link 0 USB0 port 0
1832 20:44:58.077890 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1833 20:44:58.077929 USB0 port 0 child on link 0 USB3 port 0
1834 20:44:58.077966 USB3 port 0
1835 20:44:58.078003 USB3 port 1
1836 20:44:58.078040 USB3 port 2
1837 20:44:58.078078 USB3 port 3
1838 20:44:58.078115 PCI: 00:14.0 child on link 0 USB0 port 0
1839 20:44:58.078154 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1840 20:44:58.078193 USB0 port 0 child on link 0 USB2 port 0
1841 20:44:58.078235 USB2 port 0
1842 20:44:58.078273 USB2 port 1
1843 20:44:58.078312 USB2 port 2
1844 20:44:58.078350 USB2 port 3
1845 20:44:58.078388 USB2 port 4
1846 20:44:58.078426 USB2 port 5
1847 20:44:58.078465 USB2 port 6
1848 20:44:58.078503 USB2 port 7
1849 20:44:58.078542 USB2 port 8
1850 20:44:58.078596 USB2 port 9
1851 20:44:58.078637 USB3 port 0
1852 20:44:58.078675 USB3 port 1
1853 20:44:58.078712 USB3 port 2
1854 20:44:58.078750 USB3 port 3
1855 20:44:58.078787 PCI: 00:14.2
1856 20:44:58.078829 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1857 20:44:58.078870 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1858 20:44:58.078910 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1859 20:44:58.078949 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1860 20:44:58.078988 GENERIC: 0.0
1861 20:44:58.079025 PCI: 00:15.0 child on link 0 I2C: 00:1a
1862 20:44:58.079064 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1863 20:44:58.079102 I2C: 00:1a
1864 20:44:58.079141 I2C: 00:31
1865 20:44:58.079179 I2C: 00:32
1866 20:44:58.079217 PCI: 00:15.1 child on link 0 I2C: 00:50
1867 20:44:58.079256 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1868 20:44:58.079295 I2C: 00:50
1869 20:44:58.079334 PCI: 00:15.2
1870 20:44:58.079373 PCI: 00:15.3 child on link 0 I2C: 00:10
1871 20:44:58.079411 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1872 20:44:58.079449 I2C: 00:10
1873 20:44:58.079486 PCI: 00:16.0
1874 20:44:58.079524 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1875 20:44:58.079563 PCI: 00:19.0
1876 20:44:58.079600 PCI: 00:19.1 child on link 0 I2C: 00:15
1877 20:44:58.079681 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1878 20:44:58.079728 I2C: 00:15
1879 20:44:58.079767 I2C: 00:2c
1880 20:44:58.079805 PCI: 00:1e.0
1881 20:44:58.079843 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1882 20:44:58.079882 PCI: 00:1e.3 child on link 0 SPI: 00
1883 20:44:58.079920 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1884 20:44:58.079959 SPI: 00
1885 20:44:58.079998 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1886 20:44:58.080036 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1887 20:44:58.080074 PNP: 0c09.0
1888 20:44:58.080112 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1889 20:44:58.080151 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1890 20:44:58.080190 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1891 20:44:58.080228 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1892 20:44:58.080266 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1893 20:44:58.080304 GENERIC: 0.0
1894 20:44:58.080341 GENERIC: 1.0
1895 20:44:58.080379 PCI: 00:1f.3
1896 20:44:58.080416 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1897 20:44:58.080455 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1898 20:44:58.080495 PCI: 00:1f.5
1899 20:44:58.080533 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1900 20:44:58.080571 Done allocating resources.
1901 20:44:58.080609 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1902 20:44:58.080648 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1903 20:44:58.080687 Configure audio over I2S with MAX98373 NAU88L25B.
1904 20:44:58.080724 Enabling BT offload
1905 20:44:58.080762 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1906 20:44:58.080799 Enabling resources...
1907 20:44:58.081021 PCI: 00:00.0 subsystem <- 8086/4609
1908 20:44:58.081068 PCI: 00:00.0 cmd <- 06
1909 20:44:58.081107 PCI: 00:02.0 subsystem <- 8086/46b3
1910 20:44:58.081145 PCI: 00:02.0 cmd <- 03
1911 20:44:58.081183 PCI: 00:04.0 subsystem <- 8086/461d
1912 20:44:58.081221 PCI: 00:04.0 cmd <- 02
1913 20:44:58.081258 PCI: 00:06.0 bridge ctrl <- 0013
1914 20:44:58.081295 PCI: 00:06.0 subsystem <- 8086/464d
1915 20:44:58.081332 PCI: 00:06.0 cmd <- 106
1916 20:44:58.081369 PCI: 00:0a.0 subsystem <- 8086/467d
1917 20:44:58.081407 PCI: 00:0a.0 cmd <- 02
1918 20:44:58.081445 PCI: 00:0d.0 subsystem <- 8086/461e
1919 20:44:58.081484 PCI: 00:0d.0 cmd <- 02
1920 20:44:58.081521 PCI: 00:14.0 subsystem <- 8086/51ed
1921 20:44:58.081558 PCI: 00:14.0 cmd <- 02
1922 20:44:58.081595 PCI: 00:14.2 subsystem <- 8086/51ef
1923 20:44:58.081633 PCI: 00:14.2 cmd <- 02
1924 20:44:58.081671 PCI: 00:14.3 subsystem <- 8086/51f0
1925 20:44:58.081710 PCI: 00:14.3 cmd <- 02
1926 20:44:58.081748 PCI: 00:15.0 subsystem <- 8086/51e8
1927 20:44:58.081785 PCI: 00:15.0 cmd <- 02
1928 20:44:58.081822 PCI: 00:15.1 subsystem <- 8086/51e9
1929 20:44:58.081861 PCI: 00:15.1 cmd <- 06
1930 20:44:58.081913 PCI: 00:15.3 subsystem <- 8086/51eb
1931 20:44:58.081954 PCI: 00:15.3 cmd <- 02
1932 20:44:58.081993 PCI: 00:16.0 subsystem <- 8086/51e0
1933 20:44:58.082032 PCI: 00:16.0 cmd <- 02
1934 20:44:58.082071 PCI: 00:19.1 subsystem <- 8086/51c6
1935 20:44:58.082109 PCI: 00:19.1 cmd <- 02
1936 20:44:58.082148 PCI: 00:1e.0 subsystem <- 8086/51a8
1937 20:44:58.082187 PCI: 00:1e.0 cmd <- 06
1938 20:44:58.082225 PCI: 00:1e.3 subsystem <- 8086/51ab
1939 20:44:58.082263 PCI: 00:1e.3 cmd <- 02
1940 20:44:58.082301 PCI: 00:1f.0 subsystem <- 8086/5182
1941 20:44:58.082339 PCI: 00:1f.0 cmd <- 407
1942 20:44:58.082378 PCI: 00:1f.3 subsystem <- 8086/51c8
1943 20:44:58.082415 PCI: 00:1f.3 cmd <- 02
1944 20:44:58.082453 PCI: 00:1f.5 subsystem <- 8086/51a4
1945 20:44:58.082491 PCI: 00:1f.5 cmd <- 406
1946 20:44:58.082528 PCI: 01:00.0 cmd <- 02
1947 20:44:58.082565 done.
1948 20:44:58.082602 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1949 20:44:58.082641 ME: Version: Unavailable
1950 20:44:58.082678 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1951 20:44:58.082716 Initializing devices...
1952 20:44:58.082754 Root Device init
1953 20:44:58.082795 mainboard: EC init
1954 20:44:58.082835 Chrome EC: Set SMI mask to 0x0000000000000000
1955 20:44:58.082873 Chrome EC: UHEPI supported
1956 20:44:58.082912 Chrome EC: clear events_b mask to 0x0000000000000000
1957 20:44:58.082949 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1958 20:44:58.082986 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1959 20:44:58.083024 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1960 20:44:58.083062 Chrome EC: Set WAKE mask to 0x0000000000000000
1961 20:44:58.083100 Root Device init finished in 41 msecs
1962 20:44:58.083138 PCI: 00:00.0 init
1963 20:44:58.083175 CPU TDP = 15 Watts
1964 20:44:58.083213 CPU PL1 = 15 Watts
1965 20:44:58.083251 CPU PL2 = 55 Watts
1966 20:44:58.083288 CPU PL4 = 123 Watts
1967 20:44:58.083325 PCI: 00:00.0 init finished in 8 msecs
1968 20:44:58.083362 PCI: 00:02.0 init
1969 20:44:58.083400 GMA: Found VBT in CBFS
1970 20:44:58.083436 GMA: Found valid VBT in CBFS
1971 20:44:58.083474 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1972 20:44:58.083512 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1973 20:44:58.083550 PCI: 00:02.0 init finished in 18 msecs
1974 20:44:58.083588 PCI: 00:06.0 init
1975 20:44:58.083626 Initializing PCH PCIe bridge.
1976 20:44:58.083664 PCI: 00:06.0 init finished in 3 msecs
1977 20:44:58.083702 PCI: 00:0a.0 init
1978 20:44:58.083740 PCI: 00:0a.0 init finished in 0 msecs
1979 20:44:58.083778 PCI: 00:14.0 init
1980 20:44:58.083816 PCI: 00:14.0 init finished in 0 msecs
1981 20:44:58.083853 PCI: 00:14.2 init
1982 20:44:58.083891 PCI: 00:14.2 init finished in 0 msecs
1983 20:44:58.083928 PCI: 00:15.0 init
1984 20:44:58.083966 I2C bus 0 version 0x3230302a
1985 20:44:58.084003 DW I2C bus 0 at 0x80655000 (400 KHz)
1986 20:44:58.084040 PCI: 00:15.0 init finished in 6 msecs
1987 20:44:58.084078 PCI: 00:15.1 init
1988 20:44:58.084116 I2C bus 1 version 0x3230302a
1989 20:44:58.084154 DW I2C bus 1 at 0x80656000 (400 KHz)
1990 20:44:58.084191 PCI: 00:15.1 init finished in 6 msecs
1991 20:44:58.084228 PCI: 00:15.3 init
1992 20:44:58.084266 I2C bus 3 version 0x3230302a
1993 20:44:58.084303 DW I2C bus 3 at 0x80657000 (400 KHz)
1994 20:44:58.084341 PCI: 00:15.3 init finished in 6 msecs
1995 20:44:58.084379 PCI: 00:16.0 init
1996 20:44:58.084417 PCI: 00:16.0 init finished in 0 msecs
1997 20:44:58.084454 PCI: 00:19.1 init
1998 20:44:58.084491 I2C bus 5 version 0x3230302a
1999 20:44:58.084528 DW I2C bus 5 at 0x80659000 (400 KHz)
2000 20:44:58.084565 PCI: 00:19.1 init finished in 6 msecs
2001 20:44:58.084603 PCI: 00:1f.0 init
2002 20:44:58.084640 IOAPIC: Initializing IOAPIC at 0xfec00000
2003 20:44:58.084677 IOAPIC: ID = 0x02
2004 20:44:58.084714 IOAPIC: Dumping registers
2005 20:44:58.084751 reg 0x0000: 0x02000000
2006 20:44:58.084787 reg 0x0001: 0x00770020
2007 20:44:58.084835 reg 0x0002: 0x00000000
2008 20:44:58.084875 IOAPIC: 120 interrupts
2009 20:44:58.084926 IOAPIC: Clearing IOAPIC at 0xfec00000
2010 20:44:58.084969 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2011 20:44:58.085008 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2012 20:44:58.085046 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2013 20:44:58.085086 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2014 20:44:58.085124 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2015 20:44:58.085163 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2016 20:44:58.085202 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2017 20:44:58.085240 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2018 20:44:58.085279 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2019 20:44:58.085317 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2020 20:44:58.085356 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2021 20:44:58.085394 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2022 20:44:58.085432 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2023 20:44:58.085469 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2024 20:44:58.085507 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2025 20:44:58.085545 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2026 20:44:58.085584 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2027 20:44:58.085800 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2028 20:44:58.085845 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2029 20:44:58.085885 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2030 20:44:58.085923 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2031 20:44:58.085961 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2032 20:44:58.085999 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2033 20:44:58.086037 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2034 20:44:58.086075 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2035 20:44:58.086113 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2036 20:44:58.086151 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2037 20:44:58.086190 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2038 20:44:58.086229 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2039 20:44:58.086267 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2040 20:44:58.086305 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2041 20:44:58.086342 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2042 20:44:58.086380 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2043 20:44:58.086419 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2044 20:44:58.086457 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2045 20:44:58.086501 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2046 20:44:58.086539 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2047 20:44:58.501999 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2048 20:44:58.502406 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2049 20:44:58.502658 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2050 20:44:58.502877 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2051 20:44:58.503080 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2052 20:44:58.503281 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2053 20:44:58.503466 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2054 20:44:58.503509 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2055 20:44:58.503551 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2056 20:44:58.503593 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2057 20:44:58.503635 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2058 20:44:58.503677 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2059 20:44:58.503720 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2060 20:44:58.503762 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2061 20:44:58.503806 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2062 20:44:58.503848 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2063 20:44:58.503890 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2064 20:44:58.503932 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2065 20:44:58.503975 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2066 20:44:58.504016 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2067 20:44:58.504057 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2068 20:44:58.504098 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2069 20:44:58.504141 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2070 20:44:58.504186 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2071 20:44:58.504224 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2072 20:44:58.504262 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2073 20:44:58.504299 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2074 20:44:58.504337 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2075 20:44:58.504375 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2076 20:44:58.504412 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2077 20:44:58.504449 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2078 20:44:58.504485 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2079 20:44:58.504521 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2080 20:44:58.504557 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2081 20:44:58.504594 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2082 20:44:58.504631 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2083 20:44:58.504668 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2084 20:44:58.504705 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2085 20:44:58.504742 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2086 20:44:58.504779 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2087 20:44:58.504836 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2088 20:44:58.504875 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2089 20:44:58.504925 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2090 20:44:58.504963 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2091 20:44:58.505000 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2092 20:44:58.505037 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2093 20:44:58.505074 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2094 20:44:58.505112 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2095 20:44:58.505149 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2096 20:44:58.505187 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2097 20:44:58.505224 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2098 20:44:58.505260 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2099 20:44:58.505296 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2100 20:44:58.505333 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2101 20:44:58.505370 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2102 20:44:58.505418 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2103 20:44:58.505455 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2104 20:44:58.505497 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2105 20:44:58.505539 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2106 20:44:58.505577 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2107 20:44:58.505625 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2108 20:44:58.505663 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2109 20:44:58.505705 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2110 20:44:58.505941 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2111 20:44:58.506005 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2112 20:44:58.506088 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2113 20:44:58.506127 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2114 20:44:58.506165 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2115 20:44:58.506203 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2116 20:44:58.506241 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2117 20:44:58.506279 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2118 20:44:58.506317 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2119 20:44:58.506355 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2120 20:44:58.506392 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2121 20:44:58.506429 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2122 20:44:58.506467 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2123 20:44:58.506506 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2124 20:44:58.506543 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2125 20:44:58.506580 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2126 20:44:58.506618 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2127 20:44:58.506656 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2128 20:44:58.506695 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2129 20:44:58.506733 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2130 20:44:58.506770 IOAPIC: Bootstrap Processor Local APIC = 0x00
2131 20:44:58.506808 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2132 20:44:58.506846 PCI: 00:1f.0 init finished in 607 msecs
2133 20:44:58.506912 PCI: 00:1f.2 init
2134 20:44:58.506949 apm_control: Disabling ACPI.
2135 20:44:58.506986 APMC done.
2136 20:44:58.507025 PCI: 00:1f.2 init finished in 6 msecs
2137 20:44:58.507062 PCI: 00:1f.3 init
2138 20:44:58.507099 PCI: 00:1f.3 init finished in 0 msecs
2139 20:44:58.507137 PCI: 01:00.0 init
2140 20:44:58.507173 PCI: 01:00.0 init finished in 0 msecs
2141 20:44:58.507211 PNP: 0c09.0 init
2142 20:44:58.507249 Google Chrome EC uptime: 12.163 seconds
2143 20:44:58.507286 Google Chrome AP resets since EC boot: 1
2144 20:44:58.507324 Google Chrome most recent AP reset causes:
2145 20:44:58.507362 0.341: 32775 shutdown: entering G3
2146 20:44:58.507400 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2147 20:44:58.507437 PNP: 0c09.0 init finished in 23 msecs
2148 20:44:58.507474 GENERIC: 0.0 init
2149 20:44:58.507511 GENERIC: 0.0 init finished in 0 msecs
2150 20:44:58.507547 GENERIC: 1.0 init
2151 20:44:58.507584 GENERIC: 1.0 init finished in 0 msecs
2152 20:44:58.507622 Devices initialized
2153 20:44:58.507741 Show all devs... After init.
2154 20:44:58.507909 Root Device: enabled 1
2155 20:44:58.508070 CPU_CLUSTER: 0: enabled 1
2156 20:44:58.508231 DOMAIN: 0000: enabled 1
2157 20:44:58.508389 GPIO: 0: enabled 1
2158 20:44:58.508545 PCI: 00:00.0: enabled 1
2159 20:44:58.508711 PCI: 00:01.0: enabled 0
2160 20:44:58.509014 PCI: 00:01.1: enabled 0
2161 20:44:58.509278 PCI: 00:02.0: enabled 1
2162 20:44:58.509459 PCI: 00:04.0: enabled 1
2163 20:44:58.509624 PCI: 00:05.0: enabled 0
2164 20:44:58.509786 PCI: 00:06.0: enabled 1
2165 20:44:58.509948 PCI: 00:06.2: enabled 0
2166 20:44:58.510112 PCI: 00:07.0: enabled 0
2167 20:44:58.510273 PCI: 00:07.1: enabled 0
2168 20:44:58.510440 PCI: 00:07.2: enabled 0
2169 20:44:58.510617 PCI: 00:07.3: enabled 0
2170 20:44:58.510734 PCI: 00:08.0: enabled 0
2171 20:44:58.510865 PCI: 00:09.0: enabled 0
2172 20:44:58.510997 PCI: 00:0a.0: enabled 1
2173 20:44:58.511115 PCI: 00:0d.0: enabled 1
2174 20:44:58.511231 PCI: 00:0d.1: enabled 0
2175 20:44:58.511347 PCI: 00:0d.2: enabled 0
2176 20:44:58.511460 PCI: 00:0d.3: enabled 0
2177 20:44:58.511579 PCI: 00:0e.0: enabled 0
2178 20:44:58.511696 PCI: 00:10.0: enabled 0
2179 20:44:58.511813 PCI: 00:10.1: enabled 0
2180 20:44:58.511928 PCI: 00:10.6: enabled 0
2181 20:44:58.512045 PCI: 00:10.7: enabled 0
2182 20:44:58.512163 PCI: 00:12.0: enabled 0
2183 20:44:58.512282 PCI: 00:12.6: enabled 0
2184 20:44:58.512403 PCI: 00:12.7: enabled 0
2185 20:44:58.512522 PCI: 00:13.0: enabled 0
2186 20:44:58.512640 PCI: 00:14.0: enabled 1
2187 20:44:58.512758 PCI: 00:14.1: enabled 0
2188 20:44:58.512916 PCI: 00:14.2: enabled 1
2189 20:44:58.513048 PCI: 00:14.3: enabled 1
2190 20:44:58.513168 PCI: 00:15.0: enabled 1
2191 20:44:58.513287 PCI: 00:15.1: enabled 1
2192 20:44:58.513405 PCI: 00:15.2: enabled 0
2193 20:44:58.513522 PCI: 00:15.3: enabled 1
2194 20:44:58.513635 PCI: 00:16.0: enabled 1
2195 20:44:58.513728 PCI: 00:16.1: enabled 0
2196 20:44:58.513822 PCI: 00:16.2: enabled 0
2197 20:44:58.513914 PCI: 00:16.3: enabled 0
2198 20:44:58.514007 PCI: 00:16.4: enabled 0
2199 20:44:58.514101 PCI: 00:16.5: enabled 0
2200 20:44:58.514192 PCI: 00:17.0: enabled 0
2201 20:44:58.514284 PCI: 00:19.0: enabled 0
2202 20:44:58.514377 PCI: 00:19.1: enabled 1
2203 20:44:58.514470 PCI: 00:19.2: enabled 0
2204 20:44:58.514561 PCI: 00:1a.0: enabled 0
2205 20:44:58.514653 PCI: 00:1c.0: enabled 0
2206 20:44:58.514748 PCI: 00:1c.1: enabled 0
2207 20:44:58.514838 PCI: 00:1c.2: enabled 0
2208 20:44:58.514928 PCI: 00:1c.3: enabled 0
2209 20:44:58.515058 PCI: 00:1c.4: enabled 0
2210 20:44:58.515209 PCI: 00:1c.5: enabled 0
2211 20:44:58.515313 PCI: 00:1c.6: enabled 0
2212 20:44:58.515407 PCI: 00:1c.7: enabled 0
2213 20:44:58.515497 PCI: 00:1d.0: enabled 0
2214 20:44:58.515578 PCI: 00:1d.1: enabled 0
2215 20:44:58.515616 PCI: 00:1d.2: enabled 0
2216 20:44:58.515653 PCI: 00:1d.3: enabled 0
2217 20:44:58.515690 PCI: 00:1e.0: enabled 1
2218 20:44:58.515728 PCI: 00:1e.1: enabled 0
2219 20:44:58.515766 PCI: 00:1e.2: enabled 0
2220 20:44:58.515804 PCI: 00:1e.3: enabled 1
2221 20:44:58.515842 PCI: 00:1f.0: enabled 1
2222 20:44:58.515881 PCI: 00:1f.1: enabled 0
2223 20:44:58.515919 PCI: 00:1f.2: enabled 1
2224 20:44:58.515957 PCI: 00:1f.3: enabled 1
2225 20:44:58.515995 PCI: 00:1f.4: enabled 0
2226 20:44:58.516033 PCI: 00:1f.5: enabled 1
2227 20:44:58.516071 PCI: 00:1f.6: enabled 0
2228 20:44:58.516109 PCI: 00:1f.7: enabled 0
2229 20:44:58.516147 GENERIC: 0.0: enabled 1
2230 20:44:58.516184 GENERIC: 0.0: enabled 1
2231 20:44:58.516222 GENERIC: 1.0: enabled 1
2232 20:44:58.516260 GENERIC: 0.0: enabled 1
2233 20:44:58.516298 GENERIC: 1.0: enabled 1
2234 20:44:58.516337 USB0 port 0: enabled 1
2235 20:44:58.516376 USB0 port 0: enabled 1
2236 20:44:58.516414 GENERIC: 0.0: enabled 1
2237 20:44:58.516452 I2C: 00:1a: enabled 1
2238 20:44:58.516489 I2C: 00:31: enabled 1
2239 20:44:58.516528 I2C: 00:32: enabled 1
2240 20:44:58.516566 I2C: 00:50: enabled 1
2241 20:44:58.516604 I2C: 00:10: enabled 1
2242 20:44:58.516642 I2C: 00:15: enabled 1
2243 20:44:58.516680 I2C: 00:2c: enabled 1
2244 20:44:58.516719 GENERIC: 0.0: enabled 1
2245 20:44:58.516757 SPI: 00: enabled 1
2246 20:44:58.516794 PNP: 0c09.0: enabled 1
2247 20:44:58.516840 GENERIC: 0.0: enabled 1
2248 20:44:58.517072 USB3 port 0: enabled 1
2249 20:44:58.517146 USB3 port 1: enabled 0
2250 20:44:58.517186 USB3 port 2: enabled 1
2251 20:44:58.517224 USB3 port 3: enabled 0
2252 20:44:58.517262 USB2 port 0: enabled 1
2253 20:44:58.517300 USB2 port 1: enabled 0
2254 20:44:58.517338 USB2 port 2: enabled 1
2255 20:44:58.517376 USB2 port 3: enabled 0
2256 20:44:58.517413 USB2 port 4: enabled 0
2257 20:44:58.517451 USB2 port 5: enabled 1
2258 20:44:58.517489 USB2 port 6: enabled 0
2259 20:44:58.517526 USB2 port 7: enabled 0
2260 20:44:58.517562 USB2 port 8: enabled 1
2261 20:44:58.517600 USB2 port 9: enabled 1
2262 20:44:58.517637 USB3 port 0: enabled 1
2263 20:44:58.517674 USB3 port 1: enabled 0
2264 20:44:58.517713 USB3 port 2: enabled 0
2265 20:44:58.517750 USB3 port 3: enabled 0
2266 20:44:58.517791 GENERIC: 0.0: enabled 1
2267 20:44:58.517829 GENERIC: 1.0: enabled 1
2268 20:44:58.517867 APIC: 00: enabled 1
2269 20:44:58.517905 APIC: 12: enabled 1
2270 20:44:58.517943 APIC: 14: enabled 1
2271 20:44:58.517979 APIC: 16: enabled 1
2272 20:44:58.518017 APIC: 10: enabled 1
2273 20:44:58.518054 APIC: 09: enabled 1
2274 20:44:58.518091 APIC: 08: enabled 1
2275 20:44:58.518129 APIC: 01: enabled 1
2276 20:44:58.518166 PCI: 01:00.0: enabled 1
2277 20:44:58.518204 BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms
2278 20:44:58.518243 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2279 20:44:58.518282 ELOG: NV offset 0xf20000 size 0x4000
2280 20:44:58.518320 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2281 20:44:58.518358 ELOG: Event(17) added with size 13 at 2024-05-07 20:44:54 UTC
2282 20:44:58.518397 ELOG: Event(9E) added with size 10 at 2024-05-07 20:44:54 UTC
2283 20:44:58.518435 ELOG: Event(9F) added with size 14 at 2024-05-07 20:44:54 UTC
2284 20:44:58.518474 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2285 20:44:58.518512 ELOG: Event(A0) added with size 9 at 2024-05-07 20:44:54 UTC
2286 20:44:58.518549 elog_add_boot_reason: Logged dev mode boot
2287 20:44:58.518587 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2288 20:44:58.518625 Finalize devices...
2289 20:44:58.518662 PCI: 00:16.0 final
2290 20:44:58.518699 PCI: 00:1f.2 final
2291 20:44:58.518736 GENERIC: 0.0 final
2292 20:44:58.518773 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2293 20:44:58.518811 GENERIC: 1.0 final
2294 20:44:58.518848 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2295 20:44:58.518886 Devices finalized
2296 20:44:58.518923 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2297 20:44:58.518960 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2298 20:44:58.518999 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2299 20:44:58.519036 ME: HFSTS1 : 0x90000245
2300 20:44:58.519075 ME: HFSTS2 : 0x82100116
2301 20:44:58.519112 ME: HFSTS3 : 0x00000050
2302 20:44:58.519150 ME: HFSTS4 : 0x00004000
2303 20:44:58.519187 ME: HFSTS5 : 0x00000000
2304 20:44:58.519224 ME: HFSTS6 : 0x40600006
2305 20:44:58.519261 ME: Manufacturing Mode : NO
2306 20:44:58.519299 ME: SPI Protection Mode Enabled : YES
2307 20:44:58.519337 ME: FPFs Committed : YES
2308 20:44:58.519374 ME: Manufacturing Vars Locked : YES
2309 20:44:58.519412 ME: FW Partition Table : OK
2310 20:44:58.519450 ME: Bringup Loader Failure : NO
2311 20:44:58.519488 ME: Firmware Init Complete : YES
2312 20:44:58.519526 ME: Boot Options Present : NO
2313 20:44:58.519563 ME: Update In Progress : NO
2314 20:44:58.519599 ME: D0i3 Support : YES
2315 20:44:58.519636 ME: Low Power State Enabled : NO
2316 20:44:58.519675 ME: CPU Replaced : YES
2317 20:44:58.519712 ME: CPU Replacement Valid : YES
2318 20:44:58.519751 ME: Current Working State : 5
2319 20:44:58.519804 ME: Current Operation State : 1
2320 20:44:58.519843 ME: Current Operation Mode : 0
2321 20:44:58.519882 ME: Error Code : 0
2322 20:44:58.519933 ME: Enhanced Debug Mode : NO
2323 20:44:58.519970 ME: CPU Debug Disabled : YES
2324 20:44:58.520007 ME: TXT Support : NO
2325 20:44:58.520045 ME: WP for RO is enabled : YES
2326 20:44:58.520083 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2327 20:44:58.520120 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2328 20:44:58.520157 Ramoops buffer: 0x100000@0x76899000.
2329 20:44:58.520195 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2330 20:44:58.520233 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2331 20:44:58.520271 CBFS: 'fallback/slic' not found.
2332 20:44:58.520310 ACPI: Writing ACPI tables at 7686d000.
2333 20:44:58.520347 ACPI: * FACS
2334 20:44:58.520385 ACPI: * DSDT
2335 20:44:58.520422 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2336 20:44:58.520460 ACPI: * FADT
2337 20:44:58.520499 SCI is IRQ9
2338 20:44:58.520536 ACPI: added table 1/32, length now 40
2339 20:44:58.520574 ACPI: * SSDT
2340 20:44:58.520611 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2341 20:44:58.520649 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2342 20:44:58.520686 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2343 20:44:58.520723 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2344 20:44:58.520760 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2345 20:44:58.520798 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2346 20:44:58.520863 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2347 20:44:58.520917 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2348 20:44:58.520955 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2349 20:44:58.520993 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2350 20:44:58.521031 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2351 20:44:58.521069 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2352 20:44:58.521107 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2353 20:44:58.521146 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2354 20:44:58.521360 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2355 20:44:58.521437 PS2K: Passing 80 keymaps to kernel
2356 20:44:58.521478 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2357 20:44:58.521517 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2358 20:44:58.521555 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2359 20:44:58.521592 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2360 20:44:58.521630 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2361 20:44:58.521668 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2362 20:44:58.521706 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2363 20:44:58.521745 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2364 20:44:58.521782 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2365 20:44:58.521820 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2366 20:44:58.521859 ACPI: added table 2/32, length now 44
2367 20:44:58.521896 ACPI: * MCFG
2368 20:44:58.521933 ACPI: added table 3/32, length now 48
2369 20:44:58.521970 ACPI: * TPM2
2370 20:44:58.522008 TPM2 log created at 0x7685d000
2371 20:44:58.522047 ACPI: added table 4/32, length now 52
2372 20:44:58.522087 ACPI: * LPIT
2373 20:44:58.522123 ACPI: added table 5/32, length now 56
2374 20:44:58.522177 ACPI: * MADT
2375 20:44:58.522214 SCI is IRQ9
2376 20:44:58.522253 ACPI: added table 6/32, length now 60
2377 20:44:58.522291 cmd_reg from pmc_make_ipc_cmd 1052838
2378 20:44:58.522329 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2379 20:44:58.522368 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2380 20:44:58.522408 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2381 20:44:58.522446 PMC CrashLog size in discovery mode: 0xC00
2382 20:44:58.522485 cpu crashlog bar addr: 0x80640000
2383 20:44:58.522523 cpu discovery table offset: 0x6030
2384 20:44:58.522560 cpu_crashlog_discovery_table buffer count: 0x3
2385 20:44:58.522598 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2386 20:44:58.522636 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2387 20:44:58.522675 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2388 20:44:58.522714 PMC crashLog size in discovery mode : 0xC00
2389 20:44:58.522752 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2390 20:44:58.522791 discover mode PMC crashlog size adjusted to: 0x200
2391 20:44:58.522829 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2392 20:44:58.522867 discover mode PMC crashlog size adjusted to: 0x0
2393 20:44:58.522905 m_cpu_crashLog_size : 0x3480 bytes
2394 20:44:58.522943 CPU crashLog present.
2395 20:44:58.522980 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2396 20:44:58.523019 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2397 20:44:58.523057 current = 76876550
2398 20:44:58.523094 ACPI: * DMAR
2399 20:44:58.523133 ACPI: added table 7/32, length now 64
2400 20:44:58.523171 ACPI: added table 8/32, length now 68
2401 20:44:58.523209 ACPI: * HPET
2402 20:44:58.523248 ACPI: added table 9/32, length now 72
2403 20:44:58.523285 ACPI: done.
2404 20:44:58.523324 ACPI tables: 38528 bytes.
2405 20:44:58.523363 smbios_write_tables: 76857000
2406 20:44:58.523401 EC returned error result code 3
2407 20:44:58.523440 Couldn't obtain OEM name from CBI
2408 20:44:58.523478 Create SMBIOS type 16
2409 20:44:58.523515 Create SMBIOS type 17
2410 20:44:58.523553 Create SMBIOS type 20
2411 20:44:58.523591 GENERIC: 0.0 (WIFI Device)
2412 20:44:58.523630 SMBIOS tables: 2156 bytes.
2413 20:44:58.523669 Writing table forward entry at 0x00000500
2414 20:44:58.523708 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2415 20:44:58.523746 Writing coreboot table at 0x76891000
2416 20:44:58.523785 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2417 20:44:58.523824 1. 0000000000001000-000000000009ffff: RAM
2418 20:44:58.523862 2. 00000000000a0000-00000000000fffff: RESERVED
2419 20:44:58.523900 3. 0000000000100000-0000000076856fff: RAM
2420 20:44:58.523939 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2421 20:44:58.523978 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2422 20:44:58.524016 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2423 20:44:58.524055 7. 0000000077000000-00000000803fffff: RESERVED
2424 20:44:58.524092 8. 00000000c0000000-00000000cfffffff: RESERVED
2425 20:44:58.524131 9. 00000000f8000000-00000000f9ffffff: RESERVED
2426 20:44:58.524168 10. 00000000fb000000-00000000fb000fff: RESERVED
2427 20:44:58.524206 11. 00000000fc800000-00000000fe7fffff: RESERVED
2428 20:44:58.524245 12. 00000000feb00000-00000000feb7ffff: RESERVED
2429 20:44:58.524285 13. 00000000fec00000-00000000fecfffff: RESERVED
2430 20:44:58.524324 14. 00000000fed40000-00000000fed6ffff: RESERVED
2431 20:44:58.524362 15. 00000000fed80000-00000000fed87fff: RESERVED
2432 20:44:58.524400 16. 00000000fed90000-00000000fed92fff: RESERVED
2433 20:44:58.524440 17. 00000000feda0000-00000000feda1fff: RESERVED
2434 20:44:58.524478 18. 00000000fedc0000-00000000feddffff: RESERVED
2435 20:44:58.524516 19. 0000000100000000-000000027fbfffff: RAM
2436 20:44:58.524555 Passing 4 GPIOs to payload:
2437 20:44:58.524595 NAME | PORT | POLARITY | VALUE
2438 20:44:58.524633 lid | undefined | high | high
2439 20:44:58.524671 power | undefined | high | low
2440 20:44:58.524708 oprom | undefined | high | low
2441 20:44:58.524747 EC in RW | 0x00000151 | high | high
2442 20:44:58.524785 Board ID: 3
2443 20:44:58.524832 FW config: 0x131
2444 20:44:58.524872 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum c641
2445 20:44:58.524925 coreboot table: 1788 bytes.
2446 20:44:58.525140 IMD ROOT 0. 0x76fff000 0x00001000
2447 20:44:58.525202 IMD SMALL 1. 0x76ffe000 0x00001000
2448 20:44:58.525254 FSP MEMORY 2. 0x76afe000 0x00500000
2449 20:44:58.525293 CONSOLE 3. 0x76ade000 0x00020000
2450 20:44:58.525331 RW MCACHE 4. 0x76add000 0x0000043c
2451 20:44:58.525369 RO MCACHE 5. 0x76adc000 0x00000fd8
2452 20:44:58.525406 FMAP 6. 0x76adb000 0x0000064a
2453 20:44:58.525445 TIME STAMP 7. 0x76ada000 0x00000910
2454 20:44:58.525482 VBOOT WORK 8. 0x76ac6000 0x00014000
2455 20:44:58.525519 MEM INFO 9. 0x76ac5000 0x000003b8
2456 20:44:58.525556 ROMSTG STCK10. 0x76ac4000 0x00001000
2457 20:44:58.525594 AFTER CAR 11. 0x76ab8000 0x0000c000
2458 20:44:58.525631 RAMSTAGE 12. 0x76a2e000 0x0008a000
2459 20:44:58.525668 ACPI BERT 13. 0x76a1e000 0x00010000
2460 20:44:58.525704 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2461 20:44:58.525741 REFCODE 15. 0x769ae000 0x0006f000
2462 20:44:58.525779 SMM BACKUP 16. 0x7699e000 0x00010000
2463 20:44:58.525818 IGD OPREGION17. 0x76999000 0x00004203
2464 20:44:58.525858 RAMOOPS 18. 0x76899000 0x00100000
2465 20:44:58.525895 COREBOOT 19. 0x76891000 0x00008000
2466 20:44:58.525932 ACPI 20. 0x7686d000 0x00024000
2467 20:44:58.525969 TPM2 TCGLOG21. 0x7685d000 0x00010000
2468 20:44:58.526006 PMC CRASHLOG22. 0x7685c000 0x00000c00
2469 20:44:58.526044 CPU CRASHLOG23. 0x76858000 0x00003480
2470 20:44:58.526082 SMBIOS 24. 0x76857000 0x00001000
2471 20:44:58.526119 IMD small region:
2472 20:44:58.526156 IMD ROOT 0. 0x76ffec00 0x00000400
2473 20:44:58.526192 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2474 20:44:58.526230 VPD 2. 0x76ffeb80 0x00000058
2475 20:44:58.526267 POWER STATE 3. 0x76ffeb20 0x00000044
2476 20:44:58.526304 ROMSTAGE 4. 0x76ffeb00 0x00000004
2477 20:44:58.526341 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2478 20:44:58.526378 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2479 20:44:58.526416 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2480 20:44:58.526454 MTRR: Physical address space:
2481 20:44:58.526491 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2482 20:44:58.526531 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2483 20:44:58.526586 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2484 20:44:58.526625 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2485 20:44:58.526665 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2486 20:44:58.526705 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2487 20:44:58.526745 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2488 20:44:58.526784 MTRR: Fixed MSR 0x250 0x0606060606060606
2489 20:44:58.526823 MTRR: Fixed MSR 0x258 0x0606060606060606
2490 20:44:58.526860 MTRR: Fixed MSR 0x259 0x0000000000000000
2491 20:44:58.526898 MTRR: Fixed MSR 0x268 0x0606060606060606
2492 20:44:58.526936 MTRR: Fixed MSR 0x269 0x0606060606060606
2493 20:44:58.526975 MTRR: Fixed MSR 0x26a 0x0606060606060606
2494 20:44:58.527014 MTRR: Fixed MSR 0x26b 0x0606060606060606
2495 20:44:58.527052 MTRR: Fixed MSR 0x26c 0x0606060606060606
2496 20:44:58.527090 MTRR: Fixed MSR 0x26d 0x0606060606060606
2497 20:44:58.527128 MTRR: Fixed MSR 0x26e 0x0606060606060606
2498 20:44:58.527166 MTRR: Fixed MSR 0x26f 0x0606060606060606
2499 20:44:58.527203 call enable_fixed_mtrr()
2500 20:44:58.527240 CPU physical address size: 39 bits
2501 20:44:58.527278 MTRR: default type WB/UC MTRR counts: 6/6.
2502 20:44:58.527315 MTRR: UC selected as default type.
2503 20:44:58.527352 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2504 20:44:58.527390 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2505 20:44:58.527429 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2506 20:44:58.527467 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2507 20:44:58.527504 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2508 20:44:58.527543 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2509 20:44:58.527581 MTRR: Fixed MSR 0x250 0x0606060606060606
2510 20:44:58.527619 MTRR: Fixed MSR 0x258 0x0606060606060606
2511 20:44:58.527657 MTRR: Fixed MSR 0x259 0x0000000000000000
2512 20:44:58.527694 MTRR: Fixed MSR 0x268 0x0606060606060606
2513 20:44:58.527732 MTRR: Fixed MSR 0x269 0x0606060606060606
2514 20:44:58.527770 MTRR: Fixed MSR 0x26a 0x0606060606060606
2515 20:44:58.527808 MTRR: Fixed MSR 0x26b 0x0606060606060606
2516 20:44:58.527846 MTRR: Fixed MSR 0x26c 0x0606060606060606
2517 20:44:58.527884 MTRR: Fixed MSR 0x26d 0x0606060606060606
2518 20:44:58.527923 MTRR: Fixed MSR 0x26e 0x0606060606060606
2519 20:44:58.527961 MTRR: Fixed MSR 0x26f 0x0606060606060606
2520 20:44:58.527999 MTRR: Fixed MSR 0x250 0x0606060606060606
2521 20:44:58.528037 call enable_fixed_mtrr()
2522 20:44:58.528076 MTRR: Fixed MSR 0x250 0x0606060606060606
2523 20:44:58.528113 MTRR: Fixed MSR 0x250 0x0606060606060606
2524 20:44:58.528152 MTRR: Fixed MSR 0x258 0x0606060606060606
2525 20:44:58.528189 MTRR: Fixed MSR 0x259 0x0000000000000000
2526 20:44:58.528227 MTRR: Fixed MSR 0x268 0x0606060606060606
2527 20:44:58.528265 MTRR: Fixed MSR 0x269 0x0606060606060606
2528 20:44:58.528303 MTRR: Fixed MSR 0x258 0x0606060606060606
2529 20:44:58.528341 MTRR: Fixed MSR 0x259 0x0000000000000000
2530 20:44:58.528380 MTRR: Fixed MSR 0x268 0x0606060606060606
2531 20:44:58.528418 MTRR: Fixed MSR 0x269 0x0606060606060606
2532 20:44:58.528456 MTRR: Fixed MSR 0x26a 0x0606060606060606
2533 20:44:58.528494 MTRR: Fixed MSR 0x26b 0x0606060606060606
2534 20:44:58.528532 MTRR: Fixed MSR 0x26c 0x0606060606060606
2535 20:44:58.528570 MTRR: Fixed MSR 0x26d 0x0606060606060606
2536 20:44:58.528608 MTRR: Fixed MSR 0x26e 0x0606060606060606
2537 20:44:58.528645 MTRR: Fixed MSR 0x26f 0x0606060606060606
2538 20:44:58.528683 MTRR: Fixed MSR 0x258 0x0606060606060606
2539 20:44:58.528721 MTRR: Fixed MSR 0x250 0x0606060606060606
2540 20:44:58.528758 MTRR: Fixed MSR 0x259 0x0000000000000000
2541 20:44:58.528972 MTRR: Fixed MSR 0x268 0x0606060606060606
2542 20:44:58.529033 MTRR: Fixed MSR 0x269 0x0606060606060606
2543 20:44:58.529072 MTRR: Fixed MSR 0x250 0x0606060606060606
2544 20:44:58.529110 MTRR: Fixed MSR 0x26a 0x0606060606060606
2545 20:44:58.529148 MTRR: Fixed MSR 0x26b 0x0606060606060606
2546 20:44:58.529186 MTRR: Fixed MSR 0x26c 0x0606060606060606
2547 20:44:58.529224 MTRR: Fixed MSR 0x26d 0x0606060606060606
2548 20:44:58.529262 MTRR: Fixed MSR 0x26e 0x0606060606060606
2549 20:44:58.529300 MTRR: Fixed MSR 0x26f 0x0606060606060606
2550 20:44:58.529337 call enable_fixed_mtrr()
2551 20:44:58.529376 MTRR: Fixed MSR 0x258 0x0606060606060606
2552 20:44:58.529414 MTRR: Fixed MSR 0x250 0x0606060606060606
2553 20:44:58.529452 MTRR: Fixed MSR 0x258 0x0606060606060606
2554 20:44:58.529490 MTRR: Fixed MSR 0x259 0x0000000000000000
2555 20:44:58.529528 MTRR: Fixed MSR 0x268 0x0606060606060606
2556 20:44:58.529566 MTRR: Fixed MSR 0x269 0x0606060606060606
2557 20:44:58.529603 MTRR: Fixed MSR 0x258 0x0606060606060606
2558 20:44:58.529643 call enable_fixed_mtrr()
2559 20:44:58.529681 MTRR: Fixed MSR 0x259 0x0000000000000000
2560 20:44:58.529719 MTRR: Fixed MSR 0x268 0x0606060606060606
2561 20:44:58.529756 MTRR: Fixed MSR 0x269 0x0606060606060606
2562 20:44:58.529793 MTRR: Fixed MSR 0x26a 0x0606060606060606
2563 20:44:58.529832 MTRR: Fixed MSR 0x26b 0x0606060606060606
2564 20:44:58.529870 MTRR: Fixed MSR 0x26c 0x0606060606060606
2565 20:44:58.529907 MTRR: Fixed MSR 0x26d 0x0606060606060606
2566 20:44:58.529945 MTRR: Fixed MSR 0x26e 0x0606060606060606
2567 20:44:58.529982 MTRR: Fixed MSR 0x26f 0x0606060606060606
2568 20:44:58.530020 CPU physical address size: 39 bits
2569 20:44:58.530058 call enable_fixed_mtrr()
2570 20:44:58.530096 MTRR: Fixed MSR 0x26a 0x0606060606060606
2571 20:44:58.530134 MTRR: Fixed MSR 0x259 0x0000000000000000
2572 20:44:58.530172 MTRR: Fixed MSR 0x268 0x0606060606060606
2573 20:44:58.530208 MTRR: Fixed MSR 0x269 0x0606060606060606
2574 20:44:58.530246 MTRR: Fixed MSR 0x26a 0x0606060606060606
2575 20:44:58.530283 MTRR: Fixed MSR 0x26b 0x0606060606060606
2576 20:44:58.530321 MTRR: Fixed MSR 0x26c 0x0606060606060606
2577 20:44:58.530358 MTRR: Fixed MSR 0x26d 0x0606060606060606
2578 20:44:58.530395 MTRR: Fixed MSR 0x26e 0x0606060606060606
2579 20:44:58.530432 MTRR: Fixed MSR 0x26f 0x0606060606060606
2580 20:44:58.530470 CPU physical address size: 39 bits
2581 20:44:58.530507 call enable_fixed_mtrr()
2582 20:44:58.530544 MTRR: Fixed MSR 0x26b 0x0606060606060606
2583 20:44:58.530581 CPU physical address size: 39 bits
2584 20:44:58.530618 MTRR: Fixed MSR 0x26c 0x0606060606060606
2585 20:44:58.530655 MTRR: Fixed MSR 0x26a 0x0606060606060606
2586 20:44:58.530693 MTRR: Fixed MSR 0x26d 0x0606060606060606
2587 20:44:58.530730 MTRR: Fixed MSR 0x26e 0x0606060606060606
2588 20:44:58.530767 MTRR: Fixed MSR 0x26f 0x0606060606060606
2589 20:44:58.530804 CPU physical address size: 39 bits
2590 20:44:58.530841 call enable_fixed_mtrr()
2591 20:44:58.530879 MTRR: Fixed MSR 0x26b 0x0606060606060606
2592 20:44:58.530916 CPU physical address size: 39 bits
2593 20:44:58.530954 CPU physical address size: 39 bits
2594 20:44:58.530992 MTRR: Fixed MSR 0x26c 0x0606060606060606
2595 20:44:58.531029 MTRR: Fixed MSR 0x26d 0x0606060606060606
2596 20:44:58.531067 MTRR: Fixed MSR 0x26e 0x0606060606060606
2597 20:44:58.531105 MTRR: Fixed MSR 0x26f 0x0606060606060606
2598 20:44:58.531142 call enable_fixed_mtrr()
2599 20:44:58.531179 CPU physical address size: 39 bits
2600 20:44:58.531217
2601 20:44:58.531255 MTRR check
2602 20:44:58.531292 Fixed MTRRs : Enabled
2603 20:44:58.531330 Variable MTRRs: Enabled
2604 20:44:58.531367
2605 20:44:58.531405 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2606 20:44:58.531443 Checking cr50 for pending updates
2607 20:44:58.531481 Reading cr50 TPM mode
2608 20:44:58.531519 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2609 20:44:58.531558 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2610 20:44:58.531596 Checking segment from ROM address 0xf96cbe6c
2611 20:44:58.531634 Checking segment from ROM address 0xf96cbe88
2612 20:44:58.531672 Loading segment from ROM address 0xf96cbe6c
2613 20:44:58.531710 code (compression=1)
2614 20:44:58.531749 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2615 20:44:58.531788 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2616 20:44:58.531826 using LZMA
2617 20:44:58.531865 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2618 20:44:58.531903 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2619 20:44:58.531941 Loading segment from ROM address 0xf96cbe88
2620 20:44:58.531979 Entry Point 0x30000000
2621 20:44:58.532016 Loaded segments
2622 20:44:58.532053 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2623 20:44:58.532090 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2624 20:44:58.532128 Finalizing chipset.
2625 20:44:58.532166 apm_control: Finalizing SMM.
2626 20:44:58.532205 APMC done.
2627 20:44:58.532242 HECI: CSE device 16.1 is disabled
2628 20:44:58.532280 HECI: CSE device 16.2 is disabled
2629 20:44:58.532318 HECI: CSE device 16.3 is disabled
2630 20:44:58.532355 HECI: CSE device 16.4 is disabled
2631 20:44:58.532392 HECI: CSE device 16.5 is disabled
2632 20:44:58.532429 HECI: Sending End-of-Post
2633 20:44:58.532466 CSE: EOP requested action: continue boot
2634 20:44:58.532504 CSE EOP successful, continuing boot
2635 20:44:58.532542 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2636 20:44:58.532579 mp_park_aps done after 0 msecs.
2637 20:44:58.532617 Jumping to boot code at 0x30000000(0x76891000)
2638 20:44:58.532655 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2639 20:44:58.532693
2640 20:44:58.532730
2641 20:44:58.532769
2642 20:44:58.532813 Starting depthcharge on Volmar...
2643 20:44:58.532854
2644 20:44:58.532922 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2645 20:44:58.532961
2646 20:44:58.533294 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2647 20:44:58.533364 start: 2.2.4 bootloader-commands (timeout 00:04:38) [common]
2648 20:44:58.533422 Setting prompt string to ['brya:']
2649 20:44:58.533476 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:38)
2650 20:44:58.533580 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2651 20:44:58.533628
2652 20:44:58.533667 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2653 20:44:58.533706
2654 20:44:58.533743 configure_storage: Failed to remap 1C:2
2655 20:44:58.533780
2656 20:44:58.533818 Wipe memory regions:
2657 20:44:58.533856
2658 20:44:58.533892 [0x00000000001000, 0x000000000a0000)
2659 20:44:58.533932
2660 20:44:58.533972 [0x00000000100000, 0x00000030000000)
2661 20:44:58.534010
2662 20:44:58.534054 [0x00000032668e60, 0x00000076857000)
2663 20:44:58.534092
2664 20:44:58.534130 [0x00000100000000, 0x0000027fc00000)
2665 20:44:58.534168
2666 20:44:58.534204 ec_init: CrosEC protocol v3 supported (256, 256)
2667 20:44:58.534242
2668 20:44:58.534279 R8152: Initializing
2669 20:44:58.534316
2670 20:44:58.534353 Version 9 (ocp_data = 6010)
2671 20:44:58.534390
2672 20:44:58.534426 R8152: Done initializing
2673 20:44:58.534464
2674 20:44:58.534501 Adding net device
2675 20:44:58.534539
2676 20:44:58.534576 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2677 20:44:58.534615
2678 20:44:58.534653
2679 20:44:58.534690
2680 20:44:58.534930 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2682 20:44:58.635305 brya: tftpboot 192.168.201.1 13682994/tftp-deploy-l6k8nu42/kernel/bzImage 13682994/tftp-deploy-l6k8nu42/kernel/cmdline 13682994/tftp-deploy-l6k8nu42/ramdisk/ramdisk.cpio.gz
2683 20:44:58.635854 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2684 20:44:58.636137 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2685 20:44:58.640584 tftpboot 192.168.201.1 13682994/tftp-deploy-l6k8nu42/kernel/bzImaploy-l6k8nu42/kernel/cmdline 13682994/tftp-deploy-l6k8nu42/ramdisk/ramdisk.cpio.gz
2686 20:44:58.640945
2687 20:44:58.641177 Waiting for link
2688 20:44:58.844687
2689 20:44:58.845177 done.
2690 20:44:58.845449
2691 20:44:58.845665 MAC: 00:e0:4c:68:02:ef
2692 20:44:58.845873
2693 20:44:58.847624 Sending DHCP discover... done.
2694 20:44:58.847978
2695 20:44:58.851065 Waiting for reply... done.
2696 20:44:58.851451
2697 20:44:58.854619 Sending DHCP request... done.
2698 20:44:58.854942
2699 20:44:58.861007 Waiting for reply... done.
2700 20:44:58.861419
2701 20:44:58.861646 My ip is 192.168.201.16
2702 20:44:58.861845
2703 20:44:58.864633 The DHCP server ip is 192.168.201.1
2704 20:44:58.868088
2705 20:44:58.870630 TFTP server IP predefined by user: 192.168.201.1
2706 20:44:58.870961
2707 20:44:58.877592 Bootfile predefined by user: 13682994/tftp-deploy-l6k8nu42/kernel/bzImage
2708 20:44:58.877944
2709 20:44:58.880686 Sending tftp read request... done.
2710 20:44:58.880992
2711 20:44:58.888857 Waiting for the transfer...
2712 20:44:58.889157
2713 20:44:59.119585 00000000 ################################################################
2714 20:44:59.119711
2715 20:44:59.346955 00080000 ################################################################
2716 20:44:59.347064
2717 20:44:59.572948 00100000 ################################################################
2718 20:44:59.573046
2719 20:44:59.801632 00180000 ################################################################
2720 20:44:59.801739
2721 20:45:00.026721 00200000 ################################################################
2722 20:45:00.026836
2723 20:45:00.255106 00280000 ################################################################
2724 20:45:00.255219
2725 20:45:00.484412 00300000 ################################################################
2726 20:45:00.484526
2727 20:45:00.712896 00380000 ################################################################
2728 20:45:00.713005
2729 20:45:00.942465 00400000 ################################################################
2730 20:45:00.942575
2731 20:45:01.169472 00480000 ################################################################
2732 20:45:01.169580
2733 20:45:01.395672 00500000 ################################################################
2734 20:45:01.395782
2735 20:45:01.621679 00580000 ################################################################
2736 20:45:01.621780
2737 20:45:01.850629 00600000 ################################################################
2738 20:45:01.850738
2739 20:45:02.080127 00680000 ################################################################
2740 20:45:02.080236
2741 20:45:02.306529 00700000 ################################################################
2742 20:45:02.306630
2743 20:45:02.535081 00780000 ################################################################
2744 20:45:02.535194
2745 20:45:02.763246 00800000 ################################################################
2746 20:45:02.763344
2747 20:45:02.991947 00880000 ################################################################
2748 20:45:02.992060
2749 20:45:03.219535 00900000 ################################################################
2750 20:45:03.219649
2751 20:45:03.448288 00980000 ################################################################
2752 20:45:03.448393
2753 20:45:03.676031 00a00000 ################################################################
2754 20:45:03.676137
2755 20:45:03.902940 00a80000 ################################################################
2756 20:45:03.903115
2757 20:45:04.131472 00b00000 ################################################################
2758 20:45:04.131570
2759 20:45:04.357926 00b80000 ################################################################
2760 20:45:04.358046
2761 20:45:04.585765 00c00000 ################################################################
2762 20:45:04.585878
2763 20:45:04.813452 00c80000 ################################################################
2764 20:45:04.813557
2765 20:45:05.040493 00d00000 ################################################################
2766 20:45:05.040603
2767 20:45:05.267611 00d80000 ################################################################
2768 20:45:05.267727
2769 20:45:05.493234 00e00000 ################################################################
2770 20:45:05.493343
2771 20:45:05.719700 00e80000 ################################################################
2772 20:45:05.719811
2773 20:45:05.947298 00f00000 ################################################################
2774 20:45:05.947406
2775 20:45:06.175690 00f80000 ################################################################
2776 20:45:06.175798
2777 20:45:06.405196 01000000 ################################################################
2778 20:45:06.405304
2779 20:45:06.634499 01080000 ################################################################
2780 20:45:06.634607
2781 20:45:06.861716 01100000 ################################################################
2782 20:45:06.861837
2783 20:45:07.089588 01180000 ################################################################
2784 20:45:07.089713
2785 20:45:07.317553 01200000 ################################################################
2786 20:45:07.317658
2787 20:45:07.439810 01280000 ################################### done.
2788 20:45:07.439908
2789 20:45:07.442652 The bootfile was 19679488 bytes long.
2790 20:45:07.442708
2791 20:45:07.446715 Sending tftp read request... done.
2792 20:45:07.446771
2793 20:45:07.449199 Waiting for the transfer...
2794 20:45:07.449261
2795 20:45:07.679284 00000000 ################################################################
2796 20:45:07.679386
2797 20:45:07.905411 00080000 ################################################################
2798 20:45:07.905524
2799 20:45:08.132105 00100000 ################################################################
2800 20:45:08.132216
2801 20:45:08.359519 00180000 ################################################################
2802 20:45:08.359630
2803 20:45:08.585770 00200000 ################################################################
2804 20:45:08.585881
2805 20:45:08.812657 00280000 ################################################################
2806 20:45:08.812765
2807 20:45:09.035123 00300000 ################################################################
2808 20:45:09.035241
2809 20:45:09.257763 00380000 ################################################################
2810 20:45:09.257883
2811 20:45:09.485572 00400000 ################################################################
2812 20:45:09.485685
2813 20:45:09.713967 00480000 ################################################################
2814 20:45:09.714082
2815 20:45:09.941280 00500000 ################################################################
2816 20:45:09.941400
2817 20:45:10.166597 00580000 ################################################################
2818 20:45:10.166706
2819 20:45:10.392136 00600000 ################################################################
2820 20:45:10.392246
2821 20:45:10.618101 00680000 ################################################################
2822 20:45:10.618208
2823 20:45:10.831100 00700000 ############################################################# done.
2824 20:45:10.831213
2825 20:45:10.834342 Sending tftp read request... done.
2826 20:45:10.834417
2827 20:45:10.837919 Waiting for the transfer...
2828 20:45:10.838003
2829 20:45:10.838069 00000000 # done.
2830 20:45:10.838146
2831 20:45:10.847925 Command line loaded dynamically from TFTP file: 13682994/tftp-deploy-l6k8nu42/kernel/cmdline
2832 20:45:10.848350
2833 20:45:10.871099 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13682994/extract-nfsrootfs-lzdr6a1x,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2834 20:45:10.880233
2835 20:45:10.883187 Shutting down all USB controllers.
2836 20:45:10.883597
2837 20:45:10.883843 Removing current net device
2838 20:45:10.884037
2839 20:45:10.887211 Finalizing coreboot
2840 20:45:10.887625
2841 20:45:10.892935 Exiting depthcharge with code 4 at timestamp: 25685896
2842 20:45:10.893263
2843 20:45:10.893490
2844 20:45:10.893688 Starting kernel ...
2845 20:45:10.893875
2846 20:45:10.894063
2847 20:45:10.895047 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
2848 20:45:10.895372 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2849 20:45:10.895615 Setting prompt string to ['Linux version [0-9]']
2850 20:45:10.895838 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2851 20:45:10.896059 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2853 20:49:35.896376 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2855 20:49:35.897257 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2857 20:49:35.897873 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2860 20:49:35.898860 end: 2 depthcharge-action (duration 00:05:00) [common]
2862 20:49:35.899664 Cleaning after the job
2863 20:49:35.899970 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/ramdisk
2864 20:49:35.901821 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/kernel
2865 20:49:35.903618 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/nfsrootfs
2866 20:49:35.947362 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13682994/tftp-deploy-l6k8nu42/modules
2867 20:49:35.948155 start: 4.1 power-off (timeout 00:00:30) [common]
2868 20:49:35.948307 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=off'
2869 20:49:36.023589 >> Command sent successfully.
2870 20:49:36.034012 Returned 0 in 0 seconds
2871 20:49:36.134866 end: 4.1 power-off (duration 00:00:00) [common]
2873 20:49:36.135910 start: 4.2 read-feedback (timeout 00:10:00) [common]
2874 20:49:36.136670 Listened to connection for namespace 'common' for up to 1s
2876 20:49:36.137667 Listened to connection for namespace 'common' for up to 1s
2877 20:49:37.137086 Finalising connection for namespace 'common'
2878 20:49:37.137656 Disconnecting from shell: Finalise
2879 20:49:37.138000
2880 20:49:37.238792 end: 4.2 read-feedback (duration 00:00:01) [common]
2881 20:49:37.239266 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13682994
2882 20:49:37.422029 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13682994
2883 20:49:37.422237 JobError: Your job cannot terminate cleanly.