Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 17:55:42.209967 lava-dispatcher, installed at version: 2024.03
2 17:55:42.210171 start: 0 validate
3 17:55:42.210305 Start time: 2024-05-17 17:55:42.210298+00:00 (UTC)
4 17:55:42.210432 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:55:42.210562 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 17:55:42.471532 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:55:42.472188 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.216-cip47-111-gec7251db09977%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:55:47.477388 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:55:47.477549 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.216-cip47-111-gec7251db09977%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
10 17:55:49.478350 validate duration: 7.27
12 17:55:49.478705 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:55:49.478856 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:55:49.478985 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:55:49.479157 Not decompressing ramdisk as can be used compressed.
16 17:55:49.479301 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 17:55:49.479422 saving as /var/lib/lava/dispatcher/tmp/13871405/tftp-deploy-vowyw23d/ramdisk/rootfs.cpio.gz
18 17:55:49.479525 total size: 8417901 (8 MB)
19 17:55:49.481411 progress 0 % (0 MB)
20 17:55:49.484240 progress 5 % (0 MB)
21 17:55:49.486652 progress 10 % (0 MB)
22 17:55:49.489114 progress 15 % (1 MB)
23 17:55:49.491603 progress 20 % (1 MB)
24 17:55:49.494156 progress 25 % (2 MB)
25 17:55:49.496647 progress 30 % (2 MB)
26 17:55:49.498966 progress 35 % (2 MB)
27 17:55:49.501493 progress 40 % (3 MB)
28 17:55:49.503900 progress 45 % (3 MB)
29 17:55:49.506356 progress 50 % (4 MB)
30 17:55:49.508813 progress 55 % (4 MB)
31 17:55:49.511273 progress 60 % (4 MB)
32 17:55:49.513478 progress 65 % (5 MB)
33 17:55:49.515935 progress 70 % (5 MB)
34 17:55:49.518407 progress 75 % (6 MB)
35 17:55:49.520972 progress 80 % (6 MB)
36 17:55:49.523390 progress 85 % (6 MB)
37 17:55:49.525795 progress 90 % (7 MB)
38 17:55:49.528190 progress 95 % (7 MB)
39 17:55:49.530417 progress 100 % (8 MB)
40 17:55:49.530719 8 MB downloaded in 0.05 s (156.82 MB/s)
41 17:55:49.530930 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:55:49.531364 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:55:49.531495 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:55:49.531668 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:55:49.531868 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.216-cip47-111-gec7251db09977/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/kernel/bzImage
47 17:55:49.531977 saving as /var/lib/lava/dispatcher/tmp/13871405/tftp-deploy-vowyw23d/kernel/bzImage
48 17:55:49.532081 total size: 22695360 (21 MB)
49 17:55:49.532200 No compression specified
50 17:55:49.534262 progress 0 % (0 MB)
51 17:55:49.540876 progress 5 % (1 MB)
52 17:55:49.547335 progress 10 % (2 MB)
53 17:55:49.553727 progress 15 % (3 MB)
54 17:55:49.560192 progress 20 % (4 MB)
55 17:55:49.566731 progress 25 % (5 MB)
56 17:55:49.572764 progress 30 % (6 MB)
57 17:55:49.579194 progress 35 % (7 MB)
58 17:55:49.585408 progress 40 % (8 MB)
59 17:55:49.591439 progress 45 % (9 MB)
60 17:55:49.598708 progress 50 % (10 MB)
61 17:55:49.605455 progress 55 % (11 MB)
62 17:55:49.612418 progress 60 % (13 MB)
63 17:55:49.619886 progress 65 % (14 MB)
64 17:55:49.626480 progress 70 % (15 MB)
65 17:55:49.633501 progress 75 % (16 MB)
66 17:55:49.640325 progress 80 % (17 MB)
67 17:55:49.646736 progress 85 % (18 MB)
68 17:55:49.653304 progress 90 % (19 MB)
69 17:55:49.659793 progress 95 % (20 MB)
70 17:55:49.666619 progress 100 % (21 MB)
71 17:55:49.666883 21 MB downloaded in 0.13 s (160.57 MB/s)
72 17:55:49.667085 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:55:49.667328 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:55:49.667417 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:55:49.667566 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:55:49.667712 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.216-cip47-111-gec7251db09977/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/modules.tar.xz
78 17:55:49.667797 saving as /var/lib/lava/dispatcher/tmp/13871405/tftp-deploy-vowyw23d/modules/modules.tar
79 17:55:49.667858 total size: 4141500 (3 MB)
80 17:55:49.667923 Using unxz to decompress xz
81 17:55:49.673264 progress 0 % (0 MB)
82 17:55:49.683261 progress 5 % (0 MB)
83 17:55:49.696888 progress 10 % (0 MB)
84 17:55:49.709086 progress 15 % (0 MB)
85 17:55:49.723564 progress 20 % (0 MB)
86 17:55:49.737895 progress 25 % (1 MB)
87 17:55:49.750927 progress 30 % (1 MB)
88 17:55:49.766332 progress 35 % (1 MB)
89 17:55:49.779271 progress 40 % (1 MB)
90 17:55:49.792022 progress 45 % (1 MB)
91 17:55:49.806944 progress 50 % (2 MB)
92 17:55:49.819880 progress 55 % (2 MB)
93 17:55:49.830391 progress 60 % (2 MB)
94 17:55:49.846109 progress 65 % (2 MB)
95 17:55:49.861843 progress 70 % (2 MB)
96 17:55:49.874166 progress 75 % (2 MB)
97 17:55:49.893771 progress 80 % (3 MB)
98 17:55:49.906630 progress 85 % (3 MB)
99 17:55:49.918992 progress 90 % (3 MB)
100 17:55:49.934646 progress 95 % (3 MB)
101 17:55:49.948884 progress 100 % (3 MB)
102 17:55:49.954852 3 MB downloaded in 0.29 s (13.76 MB/s)
103 17:55:49.955195 end: 1.3.1 http-download (duration 00:00:00) [common]
105 17:55:49.955676 end: 1.3 download-retry (duration 00:00:00) [common]
106 17:55:49.955781 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
107 17:55:49.955891 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
108 17:55:49.956010 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
109 17:55:49.956156 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
110 17:55:49.956433 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc
111 17:55:49.956628 makedir: /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin
112 17:55:49.956781 makedir: /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/tests
113 17:55:49.956928 makedir: /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/results
114 17:55:49.957083 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-add-keys
115 17:55:49.957285 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-add-sources
116 17:55:49.957471 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-background-process-start
117 17:55:49.957649 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-background-process-stop
118 17:55:49.957822 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-common-functions
119 17:55:49.958000 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-echo-ipv4
120 17:55:49.958181 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-install-packages
121 17:55:49.958340 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-installed-packages
122 17:55:49.958495 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-os-build
123 17:55:49.958644 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-probe-channel
124 17:55:49.958819 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-probe-ip
125 17:55:49.959001 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-target-ip
126 17:55:49.959182 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-target-mac
127 17:55:49.959342 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-target-storage
128 17:55:49.959553 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-test-case
129 17:55:49.959731 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-test-event
130 17:55:49.959874 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-test-feedback
131 17:55:49.960011 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-test-raise
132 17:55:49.960144 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-test-reference
133 17:55:49.960279 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-test-runner
134 17:55:49.960415 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-test-set
135 17:55:49.960550 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-test-shell
136 17:55:49.960690 Updating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-install-packages (oe)
137 17:55:49.960860 Updating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/bin/lava-installed-packages (oe)
138 17:55:49.960983 Creating /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/environment
139 17:55:49.961090 LAVA metadata
140 17:55:49.961172 - LAVA_JOB_ID=13871405
141 17:55:49.961236 - LAVA_DISPATCHER_IP=192.168.201.1
142 17:55:49.961374 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
143 17:55:49.961480 skipped lava-vland-overlay
144 17:55:49.961580 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
145 17:55:49.961667 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
146 17:55:49.961730 skipped lava-multinode-overlay
147 17:55:49.961820 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
148 17:55:49.961927 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
149 17:55:49.962016 Loading test definitions
150 17:55:49.962126 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
151 17:55:49.962227 Using /lava-13871405 at stage 0
152 17:55:49.962566 uuid=13871405_1.4.2.3.1 testdef=None
153 17:55:49.962668 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
154 17:55:49.962759 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
155 17:55:49.963456 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
157 17:55:49.963715 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
158 17:55:49.964468 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
160 17:55:49.964707 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
161 17:55:49.965359 runner path: /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/0/tests/0_dmesg test_uuid 13871405_1.4.2.3.1
162 17:55:49.965532 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
164 17:55:49.965773 Creating lava-test-runner.conf files
165 17:55:49.965847 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13871405/lava-overlay-mdpkc6nc/lava-13871405/0 for stage 0
166 17:55:49.965945 - 0_dmesg
167 17:55:49.966044 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
168 17:55:49.966140 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
169 17:55:49.975319 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
170 17:55:49.975531 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
171 17:55:49.975687 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
172 17:55:49.975816 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
173 17:55:49.975951 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
174 17:55:50.243528 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
175 17:55:50.243930 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
176 17:55:50.244081 extracting modules file /var/lib/lava/dispatcher/tmp/13871405/tftp-deploy-vowyw23d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13871405/extract-overlay-ramdisk-rl92f354/ramdisk
177 17:55:50.350685 end: 1.4.4 extract-modules (duration 00:00:00) [common]
178 17:55:50.350867 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
179 17:55:50.350995 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13871405/compress-overlay-6cmhb8ex/overlay-1.4.2.4.tar.gz to ramdisk
180 17:55:50.351101 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13871405/compress-overlay-6cmhb8ex/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13871405/extract-overlay-ramdisk-rl92f354/ramdisk
181 17:55:50.360534 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
182 17:55:50.360675 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
183 17:55:50.360785 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
184 17:55:50.360886 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
185 17:55:50.360972 Building ramdisk /var/lib/lava/dispatcher/tmp/13871405/extract-overlay-ramdisk-rl92f354/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13871405/extract-overlay-ramdisk-rl92f354/ramdisk
186 17:55:50.605513 >> 100934 blocks
187 17:55:52.309415 rename /var/lib/lava/dispatcher/tmp/13871405/extract-overlay-ramdisk-rl92f354/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13871405/tftp-deploy-vowyw23d/ramdisk/ramdisk.cpio.gz
188 17:55:52.309880 end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
189 17:55:52.310015 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
190 17:55:52.310111 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
191 17:55:52.310227 No mkimage arch provided, not using FIT.
192 17:55:52.310327 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
193 17:55:52.310413 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
194 17:55:52.310521 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
195 17:55:52.310616 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
196 17:55:52.310699 No LXC device requested
197 17:55:52.310781 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
198 17:55:52.310889 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
199 17:55:52.310982 end: 1.6 deploy-device-env (duration 00:00:00) [common]
200 17:55:52.311056 Checking files for TFTP limit of 4294967296 bytes.
201 17:55:52.311500 end: 1 tftp-deploy (duration 00:00:03) [common]
202 17:55:52.311615 start: 2 depthcharge-action (timeout 00:05:00) [common]
203 17:55:52.311707 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
204 17:55:52.311828 substitutions:
205 17:55:52.311923 - {DTB}: None
206 17:55:52.311989 - {INITRD}: 13871405/tftp-deploy-vowyw23d/ramdisk/ramdisk.cpio.gz
207 17:55:52.312050 - {KERNEL}: 13871405/tftp-deploy-vowyw23d/kernel/bzImage
208 17:55:52.312110 - {LAVA_MAC}: None
209 17:55:52.312174 - {PRESEED_CONFIG}: None
210 17:55:52.312250 - {PRESEED_LOCAL}: None
211 17:55:52.312309 - {RAMDISK}: 13871405/tftp-deploy-vowyw23d/ramdisk/ramdisk.cpio.gz
212 17:55:52.312366 - {ROOT_PART}: None
213 17:55:52.312421 - {ROOT}: None
214 17:55:52.312476 - {SERVER_IP}: 192.168.201.1
215 17:55:52.312531 - {TEE}: None
216 17:55:52.312585 Parsed boot commands:
217 17:55:52.312639 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
218 17:55:52.312830 Parsed boot commands: tftpboot 192.168.201.1 13871405/tftp-deploy-vowyw23d/kernel/bzImage 13871405/tftp-deploy-vowyw23d/kernel/cmdline 13871405/tftp-deploy-vowyw23d/ramdisk/ramdisk.cpio.gz
219 17:55:52.312944 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
220 17:55:52.313033 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
221 17:55:52.313123 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
222 17:55:52.313211 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
223 17:55:52.313283 Not connected, no need to disconnect.
224 17:55:52.313357 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
225 17:55:52.313443 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
226 17:55:52.313544 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-7'
227 17:55:52.317295 Setting prompt string to ['lava-test: # ']
228 17:55:52.317658 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
229 17:55:52.317768 end: 2.2.1 reset-connection (duration 00:00:00) [common]
230 17:55:52.317895 start: 2.2.2 reset-device (timeout 00:05:00) [common]
231 17:55:52.318031 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
232 17:55:52.318339 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-7', '--port=1', '--command=reboot']
233 17:55:57.454597 >> Command sent successfully.
234 17:55:57.457649 Returned 0 in 5 seconds
235 17:55:57.558068 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
237 17:55:57.558524 end: 2.2.2 reset-device (duration 00:00:05) [common]
238 17:55:57.558643 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
239 17:55:57.558737 Setting prompt string to 'Starting depthcharge on Volmar...'
240 17:55:57.558807 Changing prompt to 'Starting depthcharge on Volmar...'
241 17:55:57.558880 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
242 17:55:57.559528 [Enter `^Ec?' for help]
243 17:55:59.354562
244 17:55:59.354719
245 17:55:59.361289 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
246 17:55:59.364964 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
247 17:55:59.371304 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
248 17:55:59.378379 CPU: AES supported, TXT NOT supported, VT supported
249 17:55:59.384946 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
250 17:55:59.385102 Cache size = 10 MiB
251 17:55:59.391592 MCH: device id 4609 (rev 04) is Alderlake-P
252 17:55:59.394675 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
253 17:55:59.401431 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
254 17:55:59.401588 VBOOT: Loading verstage.
255 17:55:59.408695 FMAP: Found "FLASH" version 1.1 at 0x1804000.
256 17:55:59.412065 FMAP: base = 0x0 size = 0x2000000 #areas = 37
257 17:55:59.418703 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
258 17:55:59.425360 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
259 17:55:59.432036 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
260 17:55:59.436074
261 17:55:59.436219
262 17:55:59.442434 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
263 17:55:59.449881 Probing TPM I2C: I2C bus 1 version 0x3230302a
264 17:55:59.453120 DW I2C bus 1 at 0xfe022000 (400 KHz)
265 17:55:59.456296 done! DID_VID 0x00281ae0
266 17:55:59.459410 TPM ready after 0 ms
267 17:55:59.462613 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
268 17:55:59.474929 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
269 17:55:59.481227 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
270 17:55:59.528356 tlcl_send_startup: Startup return code is 0
271 17:55:59.528523 TPM: setup succeeded
272 17:55:59.549684 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 17:55:59.571035 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 17:55:59.575395 Chrome EC: UHEPI supported
275 17:55:59.578627 Reading cr50 boot mode
276 17:55:59.593713 Cr50 says boot_mode is VERIFIED_RW(0x00).
277 17:55:59.593861 Phase 1
278 17:55:59.597710 FMAP: area GBB found @ 1805000 (458752 bytes)
279 17:55:59.604860 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 17:55:59.614741 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 17:55:59.621502 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
282 17:55:59.621626 Phase 2
283 17:55:59.621695 Phase 3
284 17:55:59.628085 FMAP: area GBB found @ 1805000 (458752 bytes)
285 17:55:59.631617 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
286 17:55:59.638472 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
287 17:55:59.644851 VB2:vb2_verify_keyblock() Checking keyblock signature...
288 17:55:59.651880 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
289 17:55:59.658400 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
290 17:55:59.664862 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
291 17:55:59.678542 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
292 17:55:59.681824 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
293 17:55:59.688204 VB2:vb2_verify_fw_preamble() Verifying preamble.
294 17:55:59.695248 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
295 17:55:59.701944 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
296 17:55:59.708462 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
297 17:55:59.712263 Phase 4
298 17:55:59.715782 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
299 17:55:59.722475 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
300 17:55:59.934389 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
301 17:55:59.941172 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
302 17:55:59.944532 Saving vboot hash.
303 17:55:59.951053 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
304 17:55:59.967183 tlcl_extend: response is 0
305 17:55:59.973229 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
306 17:55:59.976988 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
307 17:55:59.995207 tlcl_extend: response is 0
308 17:56:00.001476 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
309 17:56:00.021183 tlcl_lock_nv_write: response is 0
310 17:56:00.039870 tlcl_lock_nv_write: response is 0
311 17:56:00.040040 Slot A is selected
312 17:56:00.047123 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
313 17:56:00.053701 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
314 17:56:00.060310 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
315 17:56:00.066923 BS: verstage times (exec / console): total (unknown) / 256 ms
316 17:56:00.067069
317 17:56:00.067173
318 17:56:00.073413 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
319 17:56:00.077369 Google Chrome EC: version:
320 17:56:00.080453 ro: volmar_v2.0.14126-e605144e9c
321 17:56:00.083679 rw: volmar_v0.0.55-22d1557
322 17:56:00.087298 running image: 2
323 17:56:00.090919 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
324 17:56:00.100947 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
325 17:56:00.107211 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
326 17:56:00.114327 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
327 17:56:00.124058 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
328 17:56:00.133844 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
329 17:56:00.140508 EC took 2101us to calculate image hash
330 17:56:00.150609 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
331 17:56:00.154048 VB2:sync_ec() select_rw=RW(active)
332 17:56:00.164463 Waited 269us to clear limit power flag.
333 17:56:00.167716 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
334 17:56:00.171634 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
335 17:56:00.175598 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
336 17:56:00.179114 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
337 17:56:00.185394 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
338 17:56:00.185523 TCO_STS: 0000 0000
339 17:56:00.188683 GEN_PMCON: d0015038 00002200
340 17:56:00.191900 GBLRST_CAUSE: 00000000 00000000
341 17:56:00.195530 HPR_CAUSE0: 00000000
342 17:56:00.195631 prev_sleep_state 5
343 17:56:00.202178 Abort disabling TXT, as CPU is not TXT capable.
344 17:56:00.205584 cse_lite: Number of partitions = 3
345 17:56:00.209113 cse_lite: Current partition = RO
346 17:56:00.212588 cse_lite: Next partition = RO
347 17:56:00.215541 cse_lite: Flags = 0x7
348 17:56:00.222020 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
349 17:56:00.232846 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
350 17:56:00.235854 FMAP: area SI_ME found @ 1000 (5238784 bytes)
351 17:56:00.242389 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
352 17:56:00.248821 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
353 17:56:00.256079 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
354 17:56:00.259339 cse_lite: CSE CBFS RW version : 16.1.25.2049
355 17:56:00.262563 cse_lite: Set Boot Partition Info Command (RW)
356 17:56:00.270391 HECI: Global Reset(Type:1) Command
357 17:56:01.700504 , TXT NOT supported, VT supported
358 17:56:01.710319 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
359 17:56:01.710428 Cache size = 10 MiB
360 17:56:01.717137 MCH: device id 4609 (rev 04) is Alderlake-P
361 17:56:01.720286 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
362 17:56:01.726795 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
363 17:56:01.726891 VBOOT: Loading verstage.
364 17:56:01.734029 FMAP: Found "FLASH" version 1.1 at 0x1804000.
365 17:56:01.737988 FMAP: base = 0x0 size = 0x2000000 #areas = 37
366 17:56:01.741374 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 17:56:01.749322 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
368 17:56:01.759123 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
369 17:56:01.759237
370 17:56:01.759308
371 17:56:01.769427 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
372 17:56:01.772494 Probing TPM I2C: I2C bus 1 version 0x3230302a
373 17:56:01.779142 DW I2C bus 1 at 0xfe022000 (400 KHz)
374 17:56:01.779235 done! DID_VID 0x00281ae0
375 17:56:01.783171 TPM ready after 0 ms
376 17:56:01.787158 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
377 17:56:01.800135 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
378 17:56:01.807400 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
379 17:56:01.854790 tlcl_send_startup: Startup return code is 0
380 17:56:01.854957 TPM: setup succeeded
381 17:56:01.876023 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
382 17:56:01.898013 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
383 17:56:01.902124 Chrome EC: UHEPI supported
384 17:56:01.905262 Reading cr50 boot mode
385 17:56:01.919833 Cr50 says boot_mode is VERIFIED_RW(0x00).
386 17:56:01.919988 Phase 1
387 17:56:01.927100 FMAP: area GBB found @ 1805000 (458752 bytes)
388 17:56:01.933626 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
389 17:56:01.939881 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
390 17:56:01.947007 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
391 17:56:01.947136 Phase 2
392 17:56:01.950106 Phase 3
393 17:56:01.953359 FMAP: area GBB found @ 1805000 (458752 bytes)
394 17:56:01.960169 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
395 17:56:01.963836 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
396 17:56:01.970094 VB2:vb2_verify_keyblock() Checking keyblock signature...
397 17:56:01.976726 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
398 17:56:01.983958 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
399 17:56:01.993789 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
400 17:56:02.004795 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
401 17:56:02.008294 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
402 17:56:02.014978 VB2:vb2_verify_fw_preamble() Verifying preamble.
403 17:56:02.022151 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
404 17:56:02.028642 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
405 17:56:02.034967 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
406 17:56:02.039105 Phase 4
407 17:56:02.042266 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
408 17:56:02.048877 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
409 17:56:02.262229 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
410 17:56:02.268344 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
411 17:56:02.271577 Saving vboot hash.
412 17:56:02.279222 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
413 17:56:02.295410 tlcl_extend: response is 0
414 17:56:02.302144 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
415 17:56:02.306041 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
416 17:56:02.322827 tlcl_extend: response is 0
417 17:56:02.330043 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
418 17:56:02.349608 tlcl_lock_nv_write: response is 0
419 17:56:02.368865 tlcl_lock_nv_write: response is 0
420 17:56:02.368996 Slot A is selected
421 17:56:02.375210 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
422 17:56:02.382086 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
423 17:56:02.388869 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
424 17:56:02.395454 BS: verstage times (exec / console): total (unknown) / 256 ms
425 17:56:02.395556
426 17:56:02.395628
427 17:56:02.401970 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
428 17:56:02.405776 Google Chrome EC: version:
429 17:56:02.409209 ro: volmar_v2.0.14126-e605144e9c
430 17:56:02.412902 rw: volmar_v0.0.55-22d1557
431 17:56:02.415998 running image: 2
432 17:56:02.419107 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
433 17:56:02.429037 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
434 17:56:02.435629 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
435 17:56:02.443159 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
436 17:56:02.452892 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
437 17:56:02.463007 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
438 17:56:02.466136 EC took 965us to calculate image hash
439 17:56:02.476319 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
440 17:56:02.479337 VB2:sync_ec() select_rw=RW(active)
441 17:56:02.492374 Waited 270us to clear limit power flag.
442 17:56:02.495606 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
443 17:56:02.499005 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
444 17:56:02.502240 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
445 17:56:02.508884 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
446 17:56:02.512754 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
447 17:56:02.516020 TCO_STS: 0000 0000
448 17:56:02.516131 GEN_PMCON: d1001038 00002200
449 17:56:02.519258 GBLRST_CAUSE: 00000040 00000000
450 17:56:02.522354 HPR_CAUSE0: 00000000
451 17:56:02.525643 prev_sleep_state 5
452 17:56:02.528889 Abort disabling TXT, as CPU is not TXT capable.
453 17:56:02.536628 cse_lite: Number of partitions = 3
454 17:56:02.539433 cse_lite: Current partition = RW
455 17:56:02.539530 cse_lite: Next partition = RW
456 17:56:02.543367 cse_lite: Flags = 0x7
457 17:56:02.549492 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
458 17:56:02.559889 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
459 17:56:02.563250 FMAP: area SI_ME found @ 1000 (5238784 bytes)
460 17:56:02.569751 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
461 17:56:02.576308 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
462 17:56:02.583227 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
463 17:56:02.586119 cse_lite: CSE CBFS RW version : 16.1.25.2049
464 17:56:02.589547 Boot Count incremented to 5824
465 17:56:02.596235 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
466 17:56:02.603250 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
467 17:56:02.616130 Probing TPM I2C: done! DID_VID 0x00281ae0
468 17:56:02.619300 Locality already claimed
469 17:56:02.622446 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
470 17:56:02.641922 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
471 17:56:02.648462 MRC: Hash idx 0x100d comparison successful.
472 17:56:02.651734 MRC cache found, size f6c8
473 17:56:02.651819 bootmode is set to: 2
474 17:56:02.655937 EC returned error result code 3
475 17:56:02.659847 FW_CONFIG value from CBI is 0x131
476 17:56:02.666475 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
477 17:56:02.666594 SPD index = 0
478 17:56:02.673092 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
479 17:56:02.676438 SPD: module type is LPDDR4X
480 17:56:02.682947 SPD: module part number is K4U6E3S4AB-MGCL
481 17:56:02.689968 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
482 17:56:02.693150 SPD: device width 16 bits, bus width 16 bits
483 17:56:02.696118 SPD: module size is 1024 MB (per channel)
484 17:56:02.764682 CBMEM:
485 17:56:02.768092 IMD: root @ 0x76fff000 254 entries.
486 17:56:02.771188 IMD: root @ 0x76ffec00 62 entries.
487 17:56:02.779152 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
488 17:56:02.782513 RO_VPD is uninitialized or empty.
489 17:56:02.785621 FMAP: area RW_VPD found @ f29000 (8192 bytes)
490 17:56:02.792821 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
491 17:56:02.796037 External stage cache:
492 17:56:02.799319 IMD: root @ 0x7bbff000 254 entries.
493 17:56:02.802320 IMD: root @ 0x7bbfec00 62 entries.
494 17:56:02.809487 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
495 17:56:02.815838 MRC: Checking cached data update for 'RW_MRC_CACHE'.
496 17:56:02.819184 MRC: 'RW_MRC_CACHE' does not need update.
497 17:56:02.819287 8 DIMMs found
498 17:56:02.822435 SMM Memory Map
499 17:56:02.826168 SMRAM : 0x7b800000 0x800000
500 17:56:02.829267 Subregion 0: 0x7b800000 0x200000
501 17:56:02.832232 Subregion 1: 0x7ba00000 0x200000
502 17:56:02.835970 Subregion 2: 0x7bc00000 0x400000
503 17:56:02.839218 top_of_ram = 0x77000000
504 17:56:02.842386 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
505 17:56:02.849214 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
506 17:56:02.856101 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
507 17:56:02.859445 MTRR Range: Start=ff000000 End=0 (Size 1000000)
508 17:56:02.859542 Normal boot
509 17:56:02.869467 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
510 17:56:02.876058 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
511 17:56:02.882386 Processing 237 relocs. Offset value of 0x74ab9000
512 17:56:02.890218 BS: romstage times (exec / console): total (unknown) / 377 ms
513 17:56:02.897356
514 17:56:02.897465
515 17:56:02.904264 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
516 17:56:02.904393 Normal boot
517 17:56:02.910912 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
518 17:56:02.918016 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
519 17:56:02.924094 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
520 17:56:02.933918 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
521 17:56:02.981716 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
522 17:56:02.988088 Processing 5931 relocs. Offset value of 0x72a2f000
523 17:56:02.991346 BS: postcar times (exec / console): total (unknown) / 51 ms
524 17:56:02.995128
525 17:56:02.995238
526 17:56:03.001783 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
527 17:56:03.005141 Reserving BERT start 76a1e000, size 10000
528 17:56:03.008421 Normal boot
529 17:56:03.011866 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
530 17:56:03.018420 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
531 17:56:03.028294 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
532 17:56:03.031920 FMAP: area RW_VPD found @ f29000 (8192 bytes)
533 17:56:03.035209 Google Chrome EC: version:
534 17:56:03.038401 ro: volmar_v2.0.14126-e605144e9c
535 17:56:03.041510 rw: volmar_v0.0.55-22d1557
536 17:56:03.041595 running image: 2
537 17:56:03.048653 ACPI _SWS is PM1 Index 8 GPE Index -1
538 17:56:03.051794 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
539 17:56:03.055435 EC returned error result code 3
540 17:56:03.058470 FW_CONFIG value from CBI is 0x131
541 17:56:03.065535 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
542 17:56:03.068537 PCI: 00:1c.2 disabled by fw_config
543 17:56:03.075360 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
544 17:56:03.078796 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
545 17:56:03.085582 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
546 17:56:03.088774 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
547 17:56:03.095441 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
548 17:56:03.101839 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
549 17:56:03.108436 microcode: sig=0x906a4 pf=0x80 revision=0x423
550 17:56:03.112424 microcode: Update skipped, already up-to-date
551 17:56:03.119040 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
552 17:56:03.151044 Detected 6 core, 8 thread CPU.
553 17:56:03.154405 Setting up SMI for CPU
554 17:56:03.158384 IED base = 0x7bc00000
555 17:56:03.158504 IED size = 0x00400000
556 17:56:03.161479 Will perform SMM setup.
557 17:56:03.164728 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
558 17:56:03.168052 LAPIC 0x0 in XAPIC mode.
559 17:56:03.178070 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
560 17:56:03.181215 Processing 18 relocs. Offset value of 0x00030000
561 17:56:03.185579 Attempting to start 7 APs
562 17:56:03.189567 Waiting for 10ms after sending INIT.
563 17:56:03.202152 Waiting for SIPI to complete...
564 17:56:03.205458 LAPIC 0x1 in XAPIC mode.
565 17:56:03.208600 LAPIC 0x10 in XAPIC mode.
566 17:56:03.212025 AP: slot 5 apic_id 1, MCU rev: 0x00000423
567 17:56:03.212110 done.
568 17:56:03.215424 LAPIC 0x12 in XAPIC mode.
569 17:56:03.218691 LAPIC 0x16 in XAPIC mode.
570 17:56:03.222188 LAPIC 0x8 in XAPIC mode.
571 17:56:03.225604 LAPIC 0x14 in XAPIC mode.
572 17:56:03.228865 AP: slot 4 apic_id 10, MCU rev: 0x00000423
573 17:56:03.232274 AP: slot 2 apic_id 14, MCU rev: 0x00000423
574 17:56:03.235640 AP: slot 3 apic_id 16, MCU rev: 0x00000423
575 17:56:03.242027 AP: slot 6 apic_id 8, MCU rev: 0x00000423
576 17:56:03.245660 AP: slot 1 apic_id 12, MCU rev: 0x00000423
577 17:56:03.248945 LAPIC 0x9 in XAPIC mode.
578 17:56:03.252220 Waiting for SIPI to complete...
579 17:56:03.252325 done.
580 17:56:03.255714 AP: slot 7 apic_id 9, MCU rev: 0x00000423
581 17:56:03.259208 smm_setup_relocation_handler: enter
582 17:56:03.261727 smm_setup_relocation_handler: exit
583 17:56:03.272316 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
584 17:56:03.275077 Processing 11 relocs. Offset value of 0x00038000
585 17:56:03.282313 smm_module_setup_stub: stack_top = 0x7b804000
586 17:56:03.285594 smm_module_setup_stub: per cpu stack_size = 0x800
587 17:56:03.292350 smm_module_setup_stub: runtime.start32_offset = 0x4c
588 17:56:03.295580 smm_module_setup_stub: runtime.smm_size = 0x10000
589 17:56:03.302130 SMM Module: stub loaded at 38000. Will call 0x76a52094
590 17:56:03.305195 Installing permanent SMM handler to 0x7b800000
591 17:56:03.312310 smm_load_module: total_smm_space_needed e468, available -> 200000
592 17:56:03.322167 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
593 17:56:03.325590 Processing 255 relocs. Offset value of 0x7b9f6000
594 17:56:03.328889 smm_load_module: smram_start: 0x7b800000
595 17:56:03.335587 smm_load_module: smram_end: 7ba00000
596 17:56:03.339160 smm_load_module: handler start 0x7b9f6d5f
597 17:56:03.342352 smm_load_module: handler_size 98d0
598 17:56:03.345789 smm_load_module: fxsave_area 0x7b9ff000
599 17:56:03.349109 smm_load_module: fxsave_size 1000
600 17:56:03.352121 smm_load_module: CONFIG_MSEG_SIZE 0x0
601 17:56:03.358932 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
602 17:56:03.362487 smm_load_module: handler_mod_params.smbase = 0x7b800000
603 17:56:03.369244 smm_load_module: per_cpu_save_state_size = 0x400
604 17:56:03.371917 smm_load_module: num_cpus = 0x8
605 17:56:03.378549 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
606 17:56:03.382292 smm_load_module: total_save_state_size = 0x2000
607 17:56:03.385786 smm_load_module: cpu0 entry: 7b9e6000
608 17:56:03.392752 smm_create_map: cpus allowed in one segment 30
609 17:56:03.395379 smm_create_map: min # of segments needed 1
610 17:56:03.395515 CPU 0x0
611 17:56:03.398782 smbase 7b9e6000 entry 7b9ee000
612 17:56:03.405640 ss_start 7b9f5c00 code_end 7b9ee208
613 17:56:03.405752 CPU 0x1
614 17:56:03.408757 smbase 7b9e5c00 entry 7b9edc00
615 17:56:03.412058 ss_start 7b9f5800 code_end 7b9ede08
616 17:56:03.415778 CPU 0x2
617 17:56:03.418968 smbase 7b9e5800 entry 7b9ed800
618 17:56:03.422606 ss_start 7b9f5400 code_end 7b9eda08
619 17:56:03.425672 CPU 0x3
620 17:56:03.428698 smbase 7b9e5400 entry 7b9ed400
621 17:56:03.432150 ss_start 7b9f5000 code_end 7b9ed608
622 17:56:03.432243 CPU 0x4
623 17:56:03.435580 smbase 7b9e5000 entry 7b9ed000
624 17:56:03.442513 ss_start 7b9f4c00 code_end 7b9ed208
625 17:56:03.442606 CPU 0x5
626 17:56:03.445633 smbase 7b9e4c00 entry 7b9ecc00
627 17:56:03.452622 ss_start 7b9f4800 code_end 7b9ece08
628 17:56:03.452732 CPU 0x6
629 17:56:03.455589 smbase 7b9e4800 entry 7b9ec800
630 17:56:03.459251 ss_start 7b9f4400 code_end 7b9eca08
631 17:56:03.462254 CPU 0x7
632 17:56:03.465705 smbase 7b9e4400 entry 7b9ec400
633 17:56:03.468893 ss_start 7b9f4000 code_end 7b9ec608
634 17:56:03.479186 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
635 17:56:03.482204 Processing 11 relocs. Offset value of 0x7b9ee000
636 17:56:03.489493 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
637 17:56:03.495585 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
638 17:56:03.502515 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
639 17:56:03.505753 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
640 17:56:03.512626 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
641 17:56:03.519360 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
642 17:56:03.526184 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
643 17:56:03.532818 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
644 17:56:03.539470 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
645 17:56:03.546436 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
646 17:56:03.552661 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
647 17:56:03.555924 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
648 17:56:03.562711 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
649 17:56:03.569457 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
650 17:56:03.575932 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
651 17:56:03.579143 smm_module_setup_stub: stack_top = 0x7b804000
652 17:56:03.585898 smm_module_setup_stub: per cpu stack_size = 0x800
653 17:56:03.592398 smm_module_setup_stub: runtime.start32_offset = 0x4c
654 17:56:03.596000 smm_module_setup_stub: runtime.smm_size = 0x200000
655 17:56:03.602520 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
656 17:56:03.605869 Clearing SMI status registers
657 17:56:03.609430 SMI_STS: PM1
658 17:56:03.609549 PM1_STS: WAK PWRBTN
659 17:56:03.619096 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
660 17:56:03.619218 In relocation handler: CPU 0
661 17:56:03.625772 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
662 17:56:03.629062 Writing SMRR. base = 0x7b800006, mask=0xff800c00
663 17:56:03.633101 Relocation complete.
664 17:56:03.639818 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
665 17:56:03.642967 In relocation handler: CPU 5
666 17:56:03.646053 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
667 17:56:03.649907 Relocation complete.
668 17:56:03.656406 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
669 17:56:03.659862 In relocation handler: CPU 3
670 17:56:03.663107 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
671 17:56:03.666544 Writing SMRR. base = 0x7b800006, mask=0xff800c00
672 17:56:03.669755 Relocation complete.
673 17:56:03.676532 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
674 17:56:03.679871 In relocation handler: CPU 4
675 17:56:03.683294 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
676 17:56:03.689971 Writing SMRR. base = 0x7b800006, mask=0xff800c00
677 17:56:03.690072 Relocation complete.
678 17:56:03.696783 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
679 17:56:03.700112 In relocation handler: CPU 2
680 17:56:03.706560 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
681 17:56:03.709538 Writing SMRR. base = 0x7b800006, mask=0xff800c00
682 17:56:03.713001 Relocation complete.
683 17:56:03.719789 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
684 17:56:03.723222 In relocation handler: CPU 1
685 17:56:03.726548 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
686 17:56:03.729858 Writing SMRR. base = 0x7b800006, mask=0xff800c00
687 17:56:03.733153 Relocation complete.
688 17:56:03.739842 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
689 17:56:03.743320 In relocation handler: CPU 6
690 17:56:03.746104 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
691 17:56:03.752662 Writing SMRR. base = 0x7b800006, mask=0xff800c00
692 17:56:03.756222 Relocation complete.
693 17:56:03.762693 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
694 17:56:03.766031 In relocation handler: CPU 7
695 17:56:03.769437 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
696 17:56:03.769535 Relocation complete.
697 17:56:03.772963 Initializing CPU #0
698 17:56:03.776199 CPU: vendor Intel device 906a4
699 17:56:03.779473 CPU: family 06, model 9a, stepping 04
700 17:56:03.782951 Clearing out pending MCEs
701 17:56:03.786290 cpu: energy policy set to 7
702 17:56:03.789740 Turbo is available but hidden
703 17:56:03.793059 Turbo is available and visible
704 17:56:03.796571 microcode: Update skipped, already up-to-date
705 17:56:03.799683 CPU #0 initialized
706 17:56:03.799768 Initializing CPU #5
707 17:56:03.802760 Initializing CPU #1
708 17:56:03.802847 Initializing CPU #2
709 17:56:03.805961 Initializing CPU #3
710 17:56:03.809931 CPU: vendor Intel device 906a4
711 17:56:03.813203 CPU: family 06, model 9a, stepping 04
712 17:56:03.816337 Initializing CPU #4
713 17:56:03.816427 Initializing CPU #6
714 17:56:03.819440 CPU: vendor Intel device 906a4
715 17:56:03.822649 CPU: family 06, model 9a, stepping 04
716 17:56:03.826125 Clearing out pending MCEs
717 17:56:03.829349 Clearing out pending MCEs
718 17:56:03.832557 CPU: vendor Intel device 906a4
719 17:56:03.836171 CPU: family 06, model 9a, stepping 04
720 17:56:03.839618 CPU: vendor Intel device 906a4
721 17:56:03.843003 CPU: family 06, model 9a, stepping 04
722 17:56:03.846080 cpu: energy policy set to 7
723 17:56:03.849473 cpu: energy policy set to 7
724 17:56:03.852935 Clearing out pending MCEs
725 17:56:03.856163 microcode: Update skipped, already up-to-date
726 17:56:03.859282 CPU #2 initialized
727 17:56:03.859401 Clearing out pending MCEs
728 17:56:03.866071 microcode: Update skipped, already up-to-date
729 17:56:03.866159 CPU #1 initialized
730 17:56:03.869471 CPU: vendor Intel device 906a4
731 17:56:03.876002 CPU: family 06, model 9a, stepping 04
732 17:56:03.876088 cpu: energy policy set to 7
733 17:56:03.879176 cpu: energy policy set to 7
734 17:56:03.886151 microcode: Update skipped, already up-to-date
735 17:56:03.886237 CPU #3 initialized
736 17:56:03.892449 microcode: Update skipped, already up-to-date
737 17:56:03.892562 CPU #4 initialized
738 17:56:03.895921 Initializing CPU #7
739 17:56:03.899348 CPU: vendor Intel device 906a4
740 17:56:03.902900 CPU: family 06, model 9a, stepping 04
741 17:56:03.906337 CPU: vendor Intel device 906a4
742 17:56:03.909442 CPU: family 06, model 9a, stepping 04
743 17:56:03.912629 Clearing out pending MCEs
744 17:56:03.916030 Clearing out pending MCEs
745 17:56:03.916152 cpu: energy policy set to 7
746 17:56:03.919278 Clearing out pending MCEs
747 17:56:03.922760 cpu: energy policy set to 7
748 17:56:03.926309 cpu: energy policy set to 7
749 17:56:03.929431 microcode: Update skipped, already up-to-date
750 17:56:03.932703 CPU #6 initialized
751 17:56:03.936510 microcode: Update skipped, already up-to-date
752 17:56:03.939312 CPU #7 initialized
753 17:56:03.942979 microcode: Update skipped, already up-to-date
754 17:56:03.946144 CPU #5 initialized
755 17:56:03.949646 bsp_do_flight_plan done after 693 msecs.
756 17:56:03.953058 CPU: frequency set to 4400 MHz
757 17:56:03.953154 Enabling SMIs.
758 17:56:03.959145 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
759 17:56:03.976594 Probing TPM I2C: done! DID_VID 0x00281ae0
760 17:56:03.979872 Locality already claimed
761 17:56:03.983269 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
762 17:56:03.995010 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
763 17:56:03.998017 Enabling GPIO PM b/c CR50 has long IRQ pulse support
764 17:56:04.004869 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
765 17:56:04.011655 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
766 17:56:04.015094 Found a VBT of 9216 bytes after decompression
767 17:56:04.017746 PCI 1.0, PIN A, using IRQ #16
768 17:56:04.021703 PCI 2.0, PIN A, using IRQ #17
769 17:56:04.025108 PCI 4.0, PIN A, using IRQ #18
770 17:56:04.027715 PCI 5.0, PIN A, using IRQ #16
771 17:56:04.031267 PCI 6.0, PIN A, using IRQ #16
772 17:56:04.034783 PCI 6.2, PIN C, using IRQ #18
773 17:56:04.038041 PCI 7.0, PIN A, using IRQ #19
774 17:56:04.041472 PCI 7.1, PIN B, using IRQ #20
775 17:56:04.044794 PCI 7.2, PIN C, using IRQ #21
776 17:56:04.048018 PCI 7.3, PIN D, using IRQ #22
777 17:56:04.051243 PCI 8.0, PIN A, using IRQ #23
778 17:56:04.051360 PCI D.0, PIN A, using IRQ #17
779 17:56:04.054770 PCI D.1, PIN B, using IRQ #19
780 17:56:04.058158 PCI 10.0, PIN A, using IRQ #24
781 17:56:04.061202 PCI 10.1, PIN B, using IRQ #25
782 17:56:04.065058 PCI 10.6, PIN C, using IRQ #20
783 17:56:04.067793 PCI 10.7, PIN D, using IRQ #21
784 17:56:04.071129 PCI 11.0, PIN A, using IRQ #26
785 17:56:04.074546 PCI 11.1, PIN B, using IRQ #27
786 17:56:04.078195 PCI 11.2, PIN C, using IRQ #28
787 17:56:04.081512 PCI 11.3, PIN D, using IRQ #29
788 17:56:04.084741 PCI 12.0, PIN A, using IRQ #30
789 17:56:04.088088 PCI 12.6, PIN B, using IRQ #31
790 17:56:04.091397 PCI 12.7, PIN C, using IRQ #22
791 17:56:04.094773 PCI 13.0, PIN A, using IRQ #32
792 17:56:04.098068 PCI 13.1, PIN B, using IRQ #33
793 17:56:04.101318 PCI 13.2, PIN C, using IRQ #34
794 17:56:04.104415 PCI 13.3, PIN D, using IRQ #35
795 17:56:04.104502 PCI 14.0, PIN B, using IRQ #23
796 17:56:04.108116 PCI 14.1, PIN A, using IRQ #36
797 17:56:04.111412 PCI 14.3, PIN C, using IRQ #17
798 17:56:04.114724 PCI 15.0, PIN A, using IRQ #37
799 17:56:04.118206 PCI 15.1, PIN B, using IRQ #38
800 17:56:04.121574 PCI 15.2, PIN C, using IRQ #39
801 17:56:04.124443 PCI 15.3, PIN D, using IRQ #40
802 17:56:04.128026 PCI 16.0, PIN A, using IRQ #18
803 17:56:04.131342 PCI 16.1, PIN B, using IRQ #19
804 17:56:04.134822 PCI 16.2, PIN C, using IRQ #20
805 17:56:04.138041 PCI 16.3, PIN D, using IRQ #21
806 17:56:04.141467 PCI 16.4, PIN A, using IRQ #18
807 17:56:04.144959 PCI 16.5, PIN B, using IRQ #19
808 17:56:04.148391 PCI 17.0, PIN A, using IRQ #22
809 17:56:04.151132 PCI 19.0, PIN A, using IRQ #41
810 17:56:04.151261 PCI 19.1, PIN B, using IRQ #42
811 17:56:04.154454 PCI 19.2, PIN C, using IRQ #43
812 17:56:04.158119 PCI 1C.0, PIN A, using IRQ #16
813 17:56:04.161742 PCI 1C.1, PIN B, using IRQ #17
814 17:56:04.165016 PCI 1C.2, PIN C, using IRQ #18
815 17:56:04.168155 PCI 1C.3, PIN D, using IRQ #19
816 17:56:04.171193 PCI 1C.4, PIN A, using IRQ #16
817 17:56:04.174804 PCI 1C.5, PIN B, using IRQ #17
818 17:56:04.177889 PCI 1C.6, PIN C, using IRQ #18
819 17:56:04.181651 PCI 1C.7, PIN D, using IRQ #19
820 17:56:04.185015 PCI 1D.0, PIN A, using IRQ #16
821 17:56:04.188447 PCI 1D.1, PIN B, using IRQ #17
822 17:56:04.191730 PCI 1D.2, PIN C, using IRQ #18
823 17:56:04.195068 PCI 1D.3, PIN D, using IRQ #19
824 17:56:04.197877 PCI 1E.0, PIN A, using IRQ #23
825 17:56:04.197983 PCI 1E.1, PIN B, using IRQ #20
826 17:56:04.201201 PCI 1E.2, PIN C, using IRQ #44
827 17:56:04.205137 PCI 1E.3, PIN D, using IRQ #45
828 17:56:04.208250 PCI 1F.3, PIN B, using IRQ #22
829 17:56:04.211509 PCI 1F.4, PIN C, using IRQ #23
830 17:56:04.214941 PCI 1F.6, PIN D, using IRQ #20
831 17:56:04.218485 PCI 1F.7, PIN A, using IRQ #21
832 17:56:04.225065 IRQ: Using dynamically assigned PCI IO-APIC IRQs
833 17:56:04.231288 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
834 17:56:04.405533 FSPS returned 0
835 17:56:04.408903 Executing Phase 1 of FspMultiPhaseSiInit
836 17:56:04.419344 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
837 17:56:04.422452 port C0 DISC req: usage 1 usb3 1 usb2 1
838 17:56:04.425566 Raw Buffer output 0 00000111
839 17:56:04.429324 Raw Buffer output 1 00000000
840 17:56:04.432454 pmc_send_ipc_cmd succeeded
841 17:56:04.438899 port C1 DISC req: usage 1 usb3 3 usb2 3
842 17:56:04.439011 Raw Buffer output 0 00000331
843 17:56:04.442423 Raw Buffer output 1 00000000
844 17:56:04.446718 pmc_send_ipc_cmd succeeded
845 17:56:04.450336 Detected 6 core, 8 thread CPU.
846 17:56:04.453838 Detected 6 core, 8 thread CPU.
847 17:56:04.458595 Detected 6 core, 8 thread CPU.
848 17:56:04.462150 Detected 6 core, 8 thread CPU.
849 17:56:04.465671 Detected 6 core, 8 thread CPU.
850 17:56:04.469285 Detected 6 core, 8 thread CPU.
851 17:56:04.472920 Detected 6 core, 8 thread CPU.
852 17:56:04.475371 Detected 6 core, 8 thread CPU.
853 17:56:04.478874 Detected 6 core, 8 thread CPU.
854 17:56:04.482392 Detected 6 core, 8 thread CPU.
855 17:56:04.485774 Detected 6 core, 8 thread CPU.
856 17:56:04.489160 Detected 6 core, 8 thread CPU.
857 17:56:04.492281 Detected 6 core, 8 thread CPU.
858 17:56:04.495677 Detected 6 core, 8 thread CPU.
859 17:56:04.499112 Detected 6 core, 8 thread CPU.
860 17:56:04.502472 Detected 6 core, 8 thread CPU.
861 17:56:04.505856 Detected 6 core, 8 thread CPU.
862 17:56:04.509122 Detected 6 core, 8 thread CPU.
863 17:56:04.512333 Detected 6 core, 8 thread CPU.
864 17:56:04.516004 Detected 6 core, 8 thread CPU.
865 17:56:04.516087 Detected 6 core, 8 thread CPU.
866 17:56:04.519108 Detected 6 core, 8 thread CPU.
867 17:56:04.801521 Detected 6 core, 8 thread CPU.
868 17:56:04.804799 Detected 6 core, 8 thread CPU.
869 17:56:04.808079 Detected 6 core, 8 thread CPU.
870 17:56:04.811462 Detected 6 core, 8 thread CPU.
871 17:56:04.814936 Detected 6 core, 8 thread CPU.
872 17:56:04.818144 Detected 6 core, 8 thread CPU.
873 17:56:04.821679 Detected 6 core, 8 thread CPU.
874 17:56:04.824572 Detected 6 core, 8 thread CPU.
875 17:56:04.827994 Detected 6 core, 8 thread CPU.
876 17:56:04.831376 Detected 6 core, 8 thread CPU.
877 17:56:04.834876 Detected 6 core, 8 thread CPU.
878 17:56:04.837901 Detected 6 core, 8 thread CPU.
879 17:56:04.841639 Detected 6 core, 8 thread CPU.
880 17:56:04.844888 Detected 6 core, 8 thread CPU.
881 17:56:04.847956 Detected 6 core, 8 thread CPU.
882 17:56:04.851645 Detected 6 core, 8 thread CPU.
883 17:56:04.854866 Detected 6 core, 8 thread CPU.
884 17:56:04.855471 Detected 6 core, 8 thread CPU.
885 17:56:04.858327 Detected 6 core, 8 thread CPU.
886 17:56:04.861733 Detected 6 core, 8 thread CPU.
887 17:56:04.865184 Display FSP Version Info HOB
888 17:56:04.868160 Reference Code - CPU = c.0.65.70
889 17:56:04.871735 uCode Version = 0.0.4.23
890 17:56:04.875316 TXT ACM version = ff.ff.ff.ffff
891 17:56:04.878743 Reference Code - ME = c.0.65.70
892 17:56:04.881556 MEBx version = 0.0.0.0
893 17:56:04.884639 ME Firmware Version = Lite SKU
894 17:56:04.888595 Reference Code - PCH = c.0.65.70
895 17:56:04.891346 PCH-CRID Status = Disabled
896 17:56:04.894981 PCH-CRID Original Value = ff.ff.ff.ffff
897 17:56:04.898153 PCH-CRID New Value = ff.ff.ff.ffff
898 17:56:04.901478 OPROM - RST - RAID = ff.ff.ff.ffff
899 17:56:04.905100 PCH Hsio Version = 4.0.0.0
900 17:56:04.907968 Reference Code - SA - System Agent = c.0.65.70
901 17:56:04.911361 Reference Code - MRC = 0.0.3.80
902 17:56:04.914656 SA - PCIe Version = c.0.65.70
903 17:56:04.917844 SA-CRID Status = Disabled
904 17:56:04.921731 SA-CRID Original Value = 0.0.0.4
905 17:56:04.924517 SA-CRID New Value = 0.0.0.4
906 17:56:04.927989 OPROM - VBIOS = ff.ff.ff.ffff
907 17:56:04.931482 IO Manageability Engine FW Version = 24.0.4.0
908 17:56:04.934760 PHY Build Version = 0.0.0.2016
909 17:56:04.938108 Thunderbolt(TM) FW Version = 0.0.0.0
910 17:56:04.945177 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
911 17:56:04.951059 BS: BS_DEV_INIT_CHIPS run times (exec / console): 475 / 507 ms
912 17:56:04.951273 Enumerating buses...
913 17:56:04.958081 Show all devs... Before device enumeration.
914 17:56:04.958298 Root Device: enabled 1
915 17:56:04.961078 CPU_CLUSTER: 0: enabled 1
916 17:56:04.965052 DOMAIN: 0000: enabled 1
917 17:56:04.968406 GPIO: 0: enabled 1
918 17:56:04.968620 PCI: 00:00.0: enabled 1
919 17:56:04.971352 PCI: 00:01.0: enabled 0
920 17:56:04.974822 PCI: 00:01.1: enabled 0
921 17:56:04.975034 PCI: 00:02.0: enabled 1
922 17:56:04.978207 PCI: 00:04.0: enabled 1
923 17:56:04.981644 PCI: 00:05.0: enabled 0
924 17:56:04.985063 PCI: 00:06.0: enabled 1
925 17:56:04.985277 PCI: 00:06.2: enabled 0
926 17:56:04.988624 PCI: 00:07.0: enabled 0
927 17:56:04.991324 PCI: 00:07.1: enabled 0
928 17:56:04.994752 PCI: 00:07.2: enabled 0
929 17:56:04.995077 PCI: 00:07.3: enabled 0
930 17:56:04.998197 PCI: 00:08.0: enabled 0
931 17:56:05.001680 PCI: 00:09.0: enabled 0
932 17:56:05.004539 PCI: 00:0a.0: enabled 1
933 17:56:05.004972 PCI: 00:0d.0: enabled 1
934 17:56:05.007888 PCI: 00:0d.1: enabled 0
935 17:56:05.011326 PCI: 00:0d.2: enabled 0
936 17:56:05.014613 PCI: 00:0d.3: enabled 0
937 17:56:05.015079 PCI: 00:0e.0: enabled 0
938 17:56:05.017827 PCI: 00:10.0: enabled 0
939 17:56:05.021312 PCI: 00:10.1: enabled 0
940 17:56:05.021736 PCI: 00:10.6: enabled 0
941 17:56:05.025222 PCI: 00:10.7: enabled 0
942 17:56:05.028302 PCI: 00:12.0: enabled 0
943 17:56:05.031371 PCI: 00:12.6: enabled 0
944 17:56:05.031884 PCI: 00:12.7: enabled 0
945 17:56:05.034986 PCI: 00:13.0: enabled 0
946 17:56:05.038545 PCI: 00:14.0: enabled 1
947 17:56:05.041484 PCI: 00:14.1: enabled 0
948 17:56:05.042190 PCI: 00:14.2: enabled 1
949 17:56:05.044720 PCI: 00:14.3: enabled 1
950 17:56:05.048142 PCI: 00:15.0: enabled 1
951 17:56:05.051720 PCI: 00:15.1: enabled 1
952 17:56:05.052175 PCI: 00:15.2: enabled 0
953 17:56:05.055020 PCI: 00:15.3: enabled 1
954 17:56:05.057949 PCI: 00:16.0: enabled 1
955 17:56:05.058415 PCI: 00:16.1: enabled 0
956 17:56:05.061343 PCI: 00:16.2: enabled 0
957 17:56:05.064437 PCI: 00:16.3: enabled 0
958 17:56:05.067955 PCI: 00:16.4: enabled 0
959 17:56:05.068525 PCI: 00:16.5: enabled 0
960 17:56:05.071147 PCI: 00:17.0: enabled 1
961 17:56:05.074720 PCI: 00:19.0: enabled 0
962 17:56:05.078027 PCI: 00:19.1: enabled 1
963 17:56:05.078473 PCI: 00:19.2: enabled 0
964 17:56:05.081568 PCI: 00:1a.0: enabled 0
965 17:56:05.084735 PCI: 00:1c.0: enabled 0
966 17:56:05.087954 PCI: 00:1c.1: enabled 0
967 17:56:05.088378 PCI: 00:1c.2: enabled 0
968 17:56:05.091726 PCI: 00:1c.3: enabled 0
969 17:56:05.094383 PCI: 00:1c.4: enabled 0
970 17:56:05.094839 PCI: 00:1c.5: enabled 0
971 17:56:05.097556 PCI: 00:1c.6: enabled 0
972 17:56:05.101237 PCI: 00:1c.7: enabled 0
973 17:56:05.104697 PCI: 00:1d.0: enabled 0
974 17:56:05.105201 PCI: 00:1d.1: enabled 0
975 17:56:05.107955 PCI: 00:1d.2: enabled 0
976 17:56:05.111359 PCI: 00:1d.3: enabled 0
977 17:56:05.114592 PCI: 00:1e.0: enabled 1
978 17:56:05.115083 PCI: 00:1e.1: enabled 0
979 17:56:05.118282 PCI: 00:1e.2: enabled 0
980 17:56:05.121625 PCI: 00:1e.3: enabled 1
981 17:56:05.125073 PCI: 00:1f.0: enabled 1
982 17:56:05.125721 PCI: 00:1f.1: enabled 0
983 17:56:05.127807 PCI: 00:1f.2: enabled 1
984 17:56:05.131344 PCI: 00:1f.3: enabled 1
985 17:56:05.132000 PCI: 00:1f.4: enabled 0
986 17:56:05.134669 PCI: 00:1f.5: enabled 1
987 17:56:05.138311 PCI: 00:1f.6: enabled 0
988 17:56:05.141837 PCI: 00:1f.7: enabled 0
989 17:56:05.142496 GENERIC: 0.0: enabled 1
990 17:56:05.145252 GENERIC: 0.0: enabled 1
991 17:56:05.148470 GENERIC: 1.0: enabled 1
992 17:56:05.151496 GENERIC: 0.0: enabled 1
993 17:56:05.152182 GENERIC: 1.0: enabled 1
994 17:56:05.155280 USB0 port 0: enabled 1
995 17:56:05.158220 USB0 port 0: enabled 1
996 17:56:05.158548 GENERIC: 0.0: enabled 1
997 17:56:05.161657 I2C: 00:1a: enabled 1
998 17:56:05.164503 I2C: 00:31: enabled 1
999 17:56:05.164798 I2C: 00:32: enabled 1
1000 17:56:05.167949 I2C: 00:50: enabled 1
1001 17:56:05.171610 I2C: 00:10: enabled 1
1002 17:56:05.172018 I2C: 00:15: enabled 1
1003 17:56:05.174366 I2C: 00:2c: enabled 1
1004 17:56:05.178334 GENERIC: 0.0: enabled 1
1005 17:56:05.178651 SPI: 00: enabled 1
1006 17:56:05.181317 PNP: 0c09.0: enabled 1
1007 17:56:05.184568 GENERIC: 0.0: enabled 1
1008 17:56:05.188159 USB3 port 0: enabled 1
1009 17:56:05.188478 USB3 port 1: enabled 0
1010 17:56:05.191288 USB3 port 2: enabled 1
1011 17:56:05.194821 USB3 port 3: enabled 0
1012 17:56:05.195171 USB2 port 0: enabled 1
1013 17:56:05.198123 USB2 port 1: enabled 0
1014 17:56:05.201496 USB2 port 2: enabled 1
1015 17:56:05.204649 USB2 port 3: enabled 0
1016 17:56:05.204944 USB2 port 4: enabled 0
1017 17:56:05.208088 USB2 port 5: enabled 1
1018 17:56:05.211464 USB2 port 6: enabled 0
1019 17:56:05.211773 USB2 port 7: enabled 0
1020 17:56:05.214704 USB2 port 8: enabled 1
1021 17:56:05.218135 USB2 port 9: enabled 1
1022 17:56:05.218425 USB3 port 0: enabled 1
1023 17:56:05.221730 USB3 port 1: enabled 0
1024 17:56:05.224569 USB3 port 2: enabled 0
1025 17:56:05.227799 USB3 port 3: enabled 0
1026 17:56:05.228204 GENERIC: 0.0: enabled 1
1027 17:56:05.231238 GENERIC: 1.0: enabled 1
1028 17:56:05.234708 APIC: 00: enabled 1
1029 17:56:05.235048 APIC: 12: enabled 1
1030 17:56:05.238029 APIC: 14: enabled 1
1031 17:56:05.238419 APIC: 16: enabled 1
1032 17:56:05.241355 APIC: 10: enabled 1
1033 17:56:05.244868 APIC: 01: enabled 1
1034 17:56:05.245169 APIC: 08: enabled 1
1035 17:56:05.248406 APIC: 09: enabled 1
1036 17:56:05.251808 Compare with tree...
1037 17:56:05.252194 Root Device: enabled 1
1038 17:56:05.254565 CPU_CLUSTER: 0: enabled 1
1039 17:56:05.258212 APIC: 00: enabled 1
1040 17:56:05.258618 APIC: 12: enabled 1
1041 17:56:05.261594 APIC: 14: enabled 1
1042 17:56:05.265008 APIC: 16: enabled 1
1043 17:56:05.265297 APIC: 10: enabled 1
1044 17:56:05.268383 APIC: 01: enabled 1
1045 17:56:05.271544 APIC: 08: enabled 1
1046 17:56:05.271923 APIC: 09: enabled 1
1047 17:56:05.275166 DOMAIN: 0000: enabled 1
1048 17:56:05.278343 GPIO: 0: enabled 1
1049 17:56:05.281782 PCI: 00:00.0: enabled 1
1050 17:56:05.282086 PCI: 00:01.0: enabled 0
1051 17:56:05.284667 PCI: 00:01.1: enabled 0
1052 17:56:05.288020 PCI: 00:02.0: enabled 1
1053 17:56:05.291808 PCI: 00:04.0: enabled 1
1054 17:56:05.294762 GENERIC: 0.0: enabled 1
1055 17:56:05.295053 PCI: 00:05.0: enabled 0
1056 17:56:05.298503 PCI: 00:06.0: enabled 1
1057 17:56:05.301613 PCI: 00:06.2: enabled 0
1058 17:56:05.305156 PCI: 00:08.0: enabled 0
1059 17:56:05.308614 PCI: 00:09.0: enabled 0
1060 17:56:05.308911 PCI: 00:0a.0: enabled 1
1061 17:56:05.311820 PCI: 00:0d.0: enabled 1
1062 17:56:05.314922 USB0 port 0: enabled 1
1063 17:56:05.318458 USB3 port 0: enabled 1
1064 17:56:05.321703 USB3 port 1: enabled 0
1065 17:56:05.322097 USB3 port 2: enabled 1
1066 17:56:05.325220 USB3 port 3: enabled 0
1067 17:56:05.328388 PCI: 00:0d.1: enabled 0
1068 17:56:05.332084 PCI: 00:0d.2: enabled 0
1069 17:56:05.334835 PCI: 00:0d.3: enabled 0
1070 17:56:05.335130 PCI: 00:0e.0: enabled 0
1071 17:56:05.338474 PCI: 00:10.0: enabled 0
1072 17:56:05.342036 PCI: 00:10.1: enabled 0
1073 17:56:05.345428 PCI: 00:10.6: enabled 0
1074 17:56:05.348258 PCI: 00:10.7: enabled 0
1075 17:56:05.348601 PCI: 00:12.0: enabled 0
1076 17:56:05.351683 PCI: 00:12.6: enabled 0
1077 17:56:05.355190 PCI: 00:12.7: enabled 0
1078 17:56:05.358675 PCI: 00:13.0: enabled 0
1079 17:56:05.359032 PCI: 00:14.0: enabled 1
1080 17:56:05.362198 USB0 port 0: enabled 1
1081 17:56:05.365751 USB2 port 0: enabled 1
1082 17:56:05.368448 USB2 port 1: enabled 0
1083 17:56:05.371802 USB2 port 2: enabled 1
1084 17:56:05.375101 USB2 port 3: enabled 0
1085 17:56:05.375393 USB2 port 4: enabled 0
1086 17:56:05.378445 USB2 port 5: enabled 1
1087 17:56:05.381907 USB2 port 6: enabled 0
1088 17:56:05.385252 USB2 port 7: enabled 0
1089 17:56:05.388680 USB2 port 8: enabled 1
1090 17:56:05.388974 USB2 port 9: enabled 1
1091 17:56:05.392088 USB3 port 0: enabled 1
1092 17:56:05.395649 USB3 port 1: enabled 0
1093 17:56:05.398304 USB3 port 2: enabled 0
1094 17:56:05.401738 USB3 port 3: enabled 0
1095 17:56:05.405146 PCI: 00:14.1: enabled 0
1096 17:56:05.405440 PCI: 00:14.2: enabled 1
1097 17:56:05.408585 PCI: 00:14.3: enabled 1
1098 17:56:05.411306 GENERIC: 0.0: enabled 1
1099 17:56:05.414841 PCI: 00:15.0: enabled 1
1100 17:56:05.417981 I2C: 00:1a: enabled 1
1101 17:56:05.418062 I2C: 00:31: enabled 1
1102 17:56:05.421640 I2C: 00:32: enabled 1
1103 17:56:05.425070 PCI: 00:15.1: enabled 1
1104 17:56:05.428389 I2C: 00:50: enabled 1
1105 17:56:05.428487 PCI: 00:15.2: enabled 0
1106 17:56:05.431381 PCI: 00:15.3: enabled 1
1107 17:56:05.435096 I2C: 00:10: enabled 1
1108 17:56:05.438442 PCI: 00:16.0: enabled 1
1109 17:56:05.441677 PCI: 00:16.1: enabled 0
1110 17:56:05.441789 PCI: 00:16.2: enabled 0
1111 17:56:05.444778 PCI: 00:16.3: enabled 0
1112 17:56:05.448312 PCI: 00:16.4: enabled 0
1113 17:56:05.451718 PCI: 00:16.5: enabled 0
1114 17:56:05.451799 PCI: 00:17.0: enabled 1
1115 17:56:05.454949 PCI: 00:19.0: enabled 0
1116 17:56:05.458448 PCI: 00:19.1: enabled 1
1117 17:56:05.461557 I2C: 00:15: enabled 1
1118 17:56:05.464939 I2C: 00:2c: enabled 1
1119 17:56:05.465064 PCI: 00:19.2: enabled 0
1120 17:56:05.468440 PCI: 00:1a.0: enabled 0
1121 17:56:05.471420 PCI: 00:1e.0: enabled 1
1122 17:56:05.474852 PCI: 00:1e.1: enabled 0
1123 17:56:05.478200 PCI: 00:1e.2: enabled 0
1124 17:56:05.478326 PCI: 00:1e.3: enabled 1
1125 17:56:05.481529 SPI: 00: enabled 1
1126 17:56:05.485313 PCI: 00:1f.0: enabled 1
1127 17:56:05.488006 PNP: 0c09.0: enabled 1
1128 17:56:05.488181 PCI: 00:1f.1: enabled 0
1129 17:56:05.491448 PCI: 00:1f.2: enabled 1
1130 17:56:05.495017 GENERIC: 0.0: enabled 1
1131 17:56:05.498366 GENERIC: 0.0: enabled 1
1132 17:56:05.501900 GENERIC: 1.0: enabled 1
1133 17:56:05.504838 PCI: 00:1f.3: enabled 1
1134 17:56:05.505070 PCI: 00:1f.4: enabled 0
1135 17:56:05.508235 PCI: 00:1f.5: enabled 1
1136 17:56:05.511695 PCI: 00:1f.6: enabled 0
1137 17:56:05.515240 PCI: 00:1f.7: enabled 0
1138 17:56:05.515678 Root Device scanning...
1139 17:56:05.518467 scan_static_bus for Root Device
1140 17:56:05.521958 CPU_CLUSTER: 0 enabled
1141 17:56:05.525401 DOMAIN: 0000 enabled
1142 17:56:05.525803 DOMAIN: 0000 scanning...
1143 17:56:05.528934 PCI: pci_scan_bus for bus 00
1144 17:56:05.531842 PCI: 00:00.0 [8086/0000] ops
1145 17:56:05.535331 PCI: 00:00.0 [8086/4609] enabled
1146 17:56:05.538538 PCI: 00:02.0 [8086/0000] bus ops
1147 17:56:05.541756 PCI: 00:02.0 [8086/46b3] enabled
1148 17:56:05.545042 PCI: 00:04.0 [8086/0000] bus ops
1149 17:56:05.548719 PCI: 00:04.0 [8086/461d] enabled
1150 17:56:05.551834 PCI: 00:06.0 [8086/0000] bus ops
1151 17:56:05.555066 PCI: 00:06.0 [8086/464d] enabled
1152 17:56:05.558440 PCI: 00:08.0 [8086/464f] disabled
1153 17:56:05.561650 PCI: 00:0a.0 [8086/467d] enabled
1154 17:56:05.565466 PCI: 00:0d.0 [8086/0000] bus ops
1155 17:56:05.568401 PCI: 00:0d.0 [8086/461e] enabled
1156 17:56:05.572001 PCI: 00:14.0 [8086/0000] bus ops
1157 17:56:05.575189 PCI: 00:14.0 [8086/51ed] enabled
1158 17:56:05.578555 PCI: 00:14.2 [8086/51ef] enabled
1159 17:56:05.582163 PCI: 00:14.3 [8086/0000] bus ops
1160 17:56:05.585324 PCI: 00:14.3 [8086/51f0] enabled
1161 17:56:05.588712 PCI: 00:15.0 [8086/0000] bus ops
1162 17:56:05.591987 PCI: 00:15.0 [8086/51e8] enabled
1163 17:56:05.595248 PCI: 00:15.1 [8086/0000] bus ops
1164 17:56:05.598514 PCI: 00:15.1 [8086/51e9] enabled
1165 17:56:05.601768 PCI: 00:15.2 [8086/0000] bus ops
1166 17:56:05.605896 PCI: 00:15.2 [8086/51ea] disabled
1167 17:56:05.608715 PCI: 00:15.3 [8086/0000] bus ops
1168 17:56:05.612042 PCI: 00:15.3 [8086/51eb] enabled
1169 17:56:05.615484 PCI: 00:16.0 [8086/0000] ops
1170 17:56:05.618919 PCI: 00:16.0 [8086/51e0] enabled
1171 17:56:05.625701 PCI: Static device PCI: 00:17.0 not found, disabling it.
1172 17:56:05.629024 PCI: 00:19.0 [8086/0000] bus ops
1173 17:56:05.631839 PCI: 00:19.0 [8086/51c5] disabled
1174 17:56:05.635361 PCI: 00:19.1 [8086/0000] bus ops
1175 17:56:05.638694 PCI: 00:19.1 [8086/51c6] enabled
1176 17:56:05.642128 PCI: 00:1e.0 [8086/0000] ops
1177 17:56:05.645619 PCI: 00:1e.0 [8086/51a8] enabled
1178 17:56:05.649311 PCI: 00:1e.3 [8086/0000] bus ops
1179 17:56:05.651963 PCI: 00:1e.3 [8086/51ab] enabled
1180 17:56:05.655744 PCI: 00:1f.0 [8086/0000] bus ops
1181 17:56:05.659039 PCI: 00:1f.0 [8086/5182] enabled
1182 17:56:05.662507 RTC Init
1183 17:56:05.665919 Set power on after power failure.
1184 17:56:05.666337 Disabling Deep S3
1185 17:56:05.668783 Disabling Deep S3
1186 17:56:05.672081 Disabling Deep S4
1187 17:56:05.672496 Disabling Deep S4
1188 17:56:05.675537 Disabling Deep S5
1189 17:56:05.675948 Disabling Deep S5
1190 17:56:05.678912 PCI: 00:1f.2 [0000/0000] hidden
1191 17:56:05.682388 PCI: 00:1f.3 [8086/0000] bus ops
1192 17:56:05.685843 PCI: 00:1f.3 [8086/51c8] enabled
1193 17:56:05.689105 PCI: 00:1f.5 [8086/0000] bus ops
1194 17:56:05.692351 PCI: 00:1f.5 [8086/51a4] enabled
1195 17:56:05.695945 GPIO: 0 enabled
1196 17:56:05.698851 PCI: Leftover static devices:
1197 17:56:05.699271 PCI: 00:01.0
1198 17:56:05.699688 PCI: 00:01.1
1199 17:56:05.702313 PCI: 00:05.0
1200 17:56:05.702722 PCI: 00:06.2
1201 17:56:05.705642 PCI: 00:09.0
1202 17:56:05.706112 PCI: 00:0d.1
1203 17:56:05.706442 PCI: 00:0d.2
1204 17:56:05.708731 PCI: 00:0d.3
1205 17:56:05.709117 PCI: 00:0e.0
1206 17:56:05.712326 PCI: 00:10.0
1207 17:56:05.712737 PCI: 00:10.1
1208 17:56:05.713062 PCI: 00:10.6
1209 17:56:05.715920 PCI: 00:10.7
1210 17:56:05.716330 PCI: 00:12.0
1211 17:56:05.718820 PCI: 00:12.6
1212 17:56:05.719226 PCI: 00:12.7
1213 17:56:05.719666 PCI: 00:13.0
1214 17:56:05.722217 PCI: 00:14.1
1215 17:56:05.722643 PCI: 00:16.1
1216 17:56:05.725679 PCI: 00:16.2
1217 17:56:05.726361 PCI: 00:16.3
1218 17:56:05.728770 PCI: 00:16.4
1219 17:56:05.729291 PCI: 00:16.5
1220 17:56:05.729834 PCI: 00:17.0
1221 17:56:05.732259 PCI: 00:19.2
1222 17:56:05.732821 PCI: 00:1a.0
1223 17:56:05.735648 PCI: 00:1e.1
1224 17:56:05.736145 PCI: 00:1e.2
1225 17:56:05.736657 PCI: 00:1f.1
1226 17:56:05.739282 PCI: 00:1f.4
1227 17:56:05.739884 PCI: 00:1f.6
1228 17:56:05.742813 PCI: 00:1f.7
1229 17:56:05.745582 PCI: Check your devicetree.cb.
1230 17:56:05.746019 PCI: 00:02.0 scanning...
1231 17:56:05.748858 scan_generic_bus for PCI: 00:02.0
1232 17:56:05.755729 scan_generic_bus for PCI: 00:02.0 done
1233 17:56:05.759248 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1234 17:56:05.762597 PCI: 00:04.0 scanning...
1235 17:56:05.765980 scan_generic_bus for PCI: 00:04.0
1236 17:56:05.766407 GENERIC: 0.0 enabled
1237 17:56:05.772483 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1238 17:56:05.779283 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1239 17:56:05.779785 PCI: 00:06.0 scanning...
1240 17:56:05.782214 do_pci_scan_bridge for PCI: 00:06.0
1241 17:56:05.785719 PCI: pci_scan_bus for bus 01
1242 17:56:05.789085 PCI: 01:00.0 [15b7/5009] enabled
1243 17:56:05.792591 Enabling Common Clock Configuration
1244 17:56:05.799402 L1 Sub-State supported from root port 6
1245 17:56:05.802190 L1 Sub-State Support = 0x5
1246 17:56:05.802618 CommonModeRestoreTime = 0x6e
1247 17:56:05.808992 Power On Value = 0x5, Power On Scale = 0x2
1248 17:56:05.809411 ASPM: Enabled L1
1249 17:56:05.812324 PCIe: Max_Payload_Size adjusted to 256
1250 17:56:05.815831 PCI: 01:00.0: Enabled LTR
1251 17:56:05.819491 PCI: 01:00.0: Programmed LTR max latencies
1252 17:56:05.825937 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1253 17:56:05.828827 PCI: 00:0d.0 scanning...
1254 17:56:05.831937 scan_static_bus for PCI: 00:0d.0
1255 17:56:05.832360 USB0 port 0 enabled
1256 17:56:05.835955 USB0 port 0 scanning...
1257 17:56:05.839077 scan_static_bus for USB0 port 0
1258 17:56:05.842377 USB3 port 0 enabled
1259 17:56:05.842958 USB3 port 1 disabled
1260 17:56:05.845712 USB3 port 2 enabled
1261 17:56:05.849144 USB3 port 3 disabled
1262 17:56:05.849596 USB3 port 0 scanning...
1263 17:56:05.852773 scan_static_bus for USB3 port 0
1264 17:56:05.855761 scan_static_bus for USB3 port 0 done
1265 17:56:05.862544 scan_bus: bus USB3 port 0 finished in 6 msecs
1266 17:56:05.863103 USB3 port 2 scanning...
1267 17:56:05.865449 scan_static_bus for USB3 port 2
1268 17:56:05.872401 scan_static_bus for USB3 port 2 done
1269 17:56:05.875808 scan_bus: bus USB3 port 2 finished in 6 msecs
1270 17:56:05.879122 scan_static_bus for USB0 port 0 done
1271 17:56:05.882321 scan_bus: bus USB0 port 0 finished in 43 msecs
1272 17:56:05.889304 scan_static_bus for PCI: 00:0d.0 done
1273 17:56:05.892872 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1274 17:56:05.895574 PCI: 00:14.0 scanning...
1275 17:56:05.899128 scan_static_bus for PCI: 00:14.0
1276 17:56:05.899722 USB0 port 0 enabled
1277 17:56:05.902573 USB0 port 0 scanning...
1278 17:56:05.905499 scan_static_bus for USB0 port 0
1279 17:56:05.909070 USB2 port 0 enabled
1280 17:56:05.909536 USB2 port 1 disabled
1281 17:56:05.912614 USB2 port 2 enabled
1282 17:56:05.915339 USB2 port 3 disabled
1283 17:56:05.915835 USB2 port 4 disabled
1284 17:56:05.918693 USB2 port 5 enabled
1285 17:56:05.922095 USB2 port 6 disabled
1286 17:56:05.922690 USB2 port 7 disabled
1287 17:56:05.925507 USB2 port 8 enabled
1288 17:56:05.926017 USB2 port 9 enabled
1289 17:56:05.929088 USB3 port 0 enabled
1290 17:56:05.931926 USB3 port 1 disabled
1291 17:56:05.932355 USB3 port 2 disabled
1292 17:56:05.935498 USB3 port 3 disabled
1293 17:56:05.938991 USB2 port 0 scanning...
1294 17:56:05.942428 scan_static_bus for USB2 port 0
1295 17:56:05.945934 scan_static_bus for USB2 port 0 done
1296 17:56:05.948904 scan_bus: bus USB2 port 0 finished in 6 msecs
1297 17:56:05.951934 USB2 port 2 scanning...
1298 17:56:05.955063 scan_static_bus for USB2 port 2
1299 17:56:05.958671 scan_static_bus for USB2 port 2 done
1300 17:56:05.962286 scan_bus: bus USB2 port 2 finished in 6 msecs
1301 17:56:05.965221 USB2 port 5 scanning...
1302 17:56:05.968801 scan_static_bus for USB2 port 5
1303 17:56:05.972443 scan_static_bus for USB2 port 5 done
1304 17:56:05.978685 scan_bus: bus USB2 port 5 finished in 6 msecs
1305 17:56:05.979244 USB2 port 8 scanning...
1306 17:56:05.982104 scan_static_bus for USB2 port 8
1307 17:56:05.985468 scan_static_bus for USB2 port 8 done
1308 17:56:05.992435 scan_bus: bus USB2 port 8 finished in 6 msecs
1309 17:56:05.995572 USB2 port 9 scanning...
1310 17:56:05.995984 scan_static_bus for USB2 port 9
1311 17:56:06.001932 scan_static_bus for USB2 port 9 done
1312 17:56:06.005540 scan_bus: bus USB2 port 9 finished in 6 msecs
1313 17:56:06.008324 USB3 port 0 scanning...
1314 17:56:06.011655 scan_static_bus for USB3 port 0
1315 17:56:06.015407 scan_static_bus for USB3 port 0 done
1316 17:56:06.018482 scan_bus: bus USB3 port 0 finished in 6 msecs
1317 17:56:06.021797 scan_static_bus for USB0 port 0 done
1318 17:56:06.028768 scan_bus: bus USB0 port 0 finished in 120 msecs
1319 17:56:06.031621 scan_static_bus for PCI: 00:14.0 done
1320 17:56:06.035243 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1321 17:56:06.038610 PCI: 00:14.3 scanning...
1322 17:56:06.041552 scan_static_bus for PCI: 00:14.3
1323 17:56:06.045173 GENERIC: 0.0 enabled
1324 17:56:06.048849 scan_static_bus for PCI: 00:14.3 done
1325 17:56:06.051707 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1326 17:56:06.055279 PCI: 00:15.0 scanning...
1327 17:56:06.058494 scan_static_bus for PCI: 00:15.0
1328 17:56:06.062047 I2C: 00:1a enabled
1329 17:56:06.062273 I2C: 00:31 enabled
1330 17:56:06.064847 I2C: 00:32 enabled
1331 17:56:06.068533 scan_static_bus for PCI: 00:15.0 done
1332 17:56:06.071675 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1333 17:56:06.075580 PCI: 00:15.1 scanning...
1334 17:56:06.078975 scan_static_bus for PCI: 00:15.1
1335 17:56:06.082127 I2C: 00:50 enabled
1336 17:56:06.085205 scan_static_bus for PCI: 00:15.1 done
1337 17:56:06.088497 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1338 17:56:06.091994 PCI: 00:15.3 scanning...
1339 17:56:06.095358 scan_static_bus for PCI: 00:15.3
1340 17:56:06.098218 I2C: 00:10 enabled
1341 17:56:06.101666 scan_static_bus for PCI: 00:15.3 done
1342 17:56:06.104894 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1343 17:56:06.108411 PCI: 00:19.1 scanning...
1344 17:56:06.112157 scan_static_bus for PCI: 00:19.1
1345 17:56:06.112368 I2C: 00:15 enabled
1346 17:56:06.115383 I2C: 00:2c enabled
1347 17:56:06.118434 scan_static_bus for PCI: 00:19.1 done
1348 17:56:06.125332 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1349 17:56:06.125635 PCI: 00:1e.3 scanning...
1350 17:56:06.129036 scan_generic_bus for PCI: 00:1e.3
1351 17:56:06.131676 SPI: 00 enabled
1352 17:56:06.138882 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1353 17:56:06.142297 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1354 17:56:06.145232 PCI: 00:1f.0 scanning...
1355 17:56:06.148732 scan_static_bus for PCI: 00:1f.0
1356 17:56:06.152234 PNP: 0c09.0 enabled
1357 17:56:06.152455 PNP: 0c09.0 scanning...
1358 17:56:06.155608 scan_static_bus for PNP: 0c09.0
1359 17:56:06.158584 scan_static_bus for PNP: 0c09.0 done
1360 17:56:06.165296 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1361 17:56:06.168270 scan_static_bus for PCI: 00:1f.0 done
1362 17:56:06.171822 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1363 17:56:06.175193 PCI: 00:1f.2 scanning...
1364 17:56:06.178437 scan_static_bus for PCI: 00:1f.2
1365 17:56:06.181572 GENERIC: 0.0 enabled
1366 17:56:06.181861 GENERIC: 0.0 scanning...
1367 17:56:06.185153 scan_static_bus for GENERIC: 0.0
1368 17:56:06.188530 GENERIC: 0.0 enabled
1369 17:56:06.192150 GENERIC: 1.0 enabled
1370 17:56:06.195522 scan_static_bus for GENERIC: 0.0 done
1371 17:56:06.198169 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1372 17:56:06.202166 scan_static_bus for PCI: 00:1f.2 done
1373 17:56:06.208534 scan_bus: bus PCI: 00:1f.2 finished in 27 msecs
1374 17:56:06.211788 PCI: 00:1f.3 scanning...
1375 17:56:06.215358 scan_static_bus for PCI: 00:1f.3
1376 17:56:06.218595 scan_static_bus for PCI: 00:1f.3 done
1377 17:56:06.221976 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1378 17:56:06.225447 PCI: 00:1f.5 scanning...
1379 17:56:06.228723 scan_generic_bus for PCI: 00:1f.5
1380 17:56:06.231886 scan_generic_bus for PCI: 00:1f.5 done
1381 17:56:06.238832 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1382 17:56:06.241925 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1383 17:56:06.245425 scan_static_bus for Root Device done
1384 17:56:06.251784 scan_bus: bus Root Device finished in 729 msecs
1385 17:56:06.252010 done
1386 17:56:06.258590 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1387 17:56:06.261851 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1388 17:56:06.268142 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1389 17:56:06.271587 SPI flash protection: WPSW=0 SRP0=0
1390 17:56:06.278624 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1391 17:56:06.281663 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1392 17:56:06.285096 found VGA at PCI: 00:02.0
1393 17:56:06.288143 Setting up VGA for PCI: 00:02.0
1394 17:56:06.295470 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1395 17:56:06.298396 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1396 17:56:06.302100 Allocating resources...
1397 17:56:06.305754 Reading resources...
1398 17:56:06.308295 Root Device read_resources bus 0 link: 0
1399 17:56:06.321882 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1400 17:56:06.322196 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1401 17:56:06.322712 DOMAIN: 0000 read_resources bus 0 link: 0
1402 17:56:06.328616 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1403 17:56:06.335320 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1404 17:56:06.338804 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1405 17:56:06.345421 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1406 17:56:06.351715 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1407 17:56:06.358630 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1408 17:56:06.365673 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1409 17:56:06.371939 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1410 17:56:06.378643 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1411 17:56:06.385236 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1412 17:56:06.392338 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1413 17:56:06.398329 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1414 17:56:06.405215 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1415 17:56:06.411562 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1416 17:56:06.415254 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1417 17:56:06.421577 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1418 17:56:06.428905 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1419 17:56:06.435178 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1420 17:56:06.441740 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1421 17:56:06.448153 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1422 17:56:06.454882 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1423 17:56:06.458478 PCI: 00:04.0 read_resources bus 1 link: 0
1424 17:56:06.462019 PCI: 00:04.0 read_resources bus 1 link: 0 done
1425 17:56:06.468283 PCI: 00:06.0 read_resources bus 1 link: 0
1426 17:56:06.471680 PCI: 00:06.0 read_resources bus 1 link: 0 done
1427 17:56:06.474826 PCI: 00:0d.0 read_resources bus 0 link: 0
1428 17:56:06.481807 USB0 port 0 read_resources bus 0 link: 0
1429 17:56:06.485045 USB0 port 0 read_resources bus 0 link: 0 done
1430 17:56:06.488692 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1431 17:56:06.495158 PCI: 00:14.0 read_resources bus 0 link: 0
1432 17:56:06.498131 USB0 port 0 read_resources bus 0 link: 0
1433 17:56:06.501538 USB0 port 0 read_resources bus 0 link: 0 done
1434 17:56:06.508084 PCI: 00:14.0 read_resources bus 0 link: 0 done
1435 17:56:06.511575 PCI: 00:14.3 read_resources bus 0 link: 0
1436 17:56:06.515141 PCI: 00:14.3 read_resources bus 0 link: 0 done
1437 17:56:06.521900 PCI: 00:15.0 read_resources bus 0 link: 0
1438 17:56:06.525257 PCI: 00:15.0 read_resources bus 0 link: 0 done
1439 17:56:06.528038 PCI: 00:15.1 read_resources bus 0 link: 0
1440 17:56:06.535235 PCI: 00:15.1 read_resources bus 0 link: 0 done
1441 17:56:06.538076 PCI: 00:15.3 read_resources bus 0 link: 0
1442 17:56:06.541623 PCI: 00:15.3 read_resources bus 0 link: 0 done
1443 17:56:06.548508 PCI: 00:19.1 read_resources bus 0 link: 0
1444 17:56:06.551745 PCI: 00:19.1 read_resources bus 0 link: 0 done
1445 17:56:06.555390 PCI: 00:1e.3 read_resources bus 2 link: 0
1446 17:56:06.562140 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1447 17:56:06.565193 PCI: 00:1f.0 read_resources bus 0 link: 0
1448 17:56:06.571893 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1449 17:56:06.575361 PCI: 00:1f.2 read_resources bus 0 link: 0
1450 17:56:06.578450 GENERIC: 0.0 read_resources bus 0 link: 0
1451 17:56:06.581910 GENERIC: 0.0 read_resources bus 0 link: 0 done
1452 17:56:06.588320 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1453 17:56:06.591666 DOMAIN: 0000 read_resources bus 0 link: 0 done
1454 17:56:06.598550 Root Device read_resources bus 0 link: 0 done
1455 17:56:06.601775 Done reading resources.
1456 17:56:06.605680 Show resources in subtree (Root Device)...After reading.
1457 17:56:06.611894 Root Device child on link 0 CPU_CLUSTER: 0
1458 17:56:06.615304 CPU_CLUSTER: 0 child on link 0 APIC: 00
1459 17:56:06.615578 APIC: 00
1460 17:56:06.618443 APIC: 12
1461 17:56:06.618677 APIC: 14
1462 17:56:06.618888 APIC: 16
1463 17:56:06.621833 APIC: 10
1464 17:56:06.622012 APIC: 01
1465 17:56:06.625371 APIC: 08
1466 17:56:06.625548 APIC: 09
1467 17:56:06.628383 DOMAIN: 0000 child on link 0 GPIO: 0
1468 17:56:06.638845 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1469 17:56:06.648775 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1470 17:56:06.648870 GPIO: 0
1471 17:56:06.651537 PCI: 00:00.0
1472 17:56:06.661544 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1473 17:56:06.668301 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1474 17:56:06.678476 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1475 17:56:06.688603 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1476 17:56:06.698580 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1477 17:56:06.708025 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1478 17:56:06.715256 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1479 17:56:06.724782 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1480 17:56:06.734814 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1481 17:56:06.745120 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1482 17:56:06.755366 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1483 17:56:06.765170 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1484 17:56:06.772027 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1485 17:56:06.781972 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1486 17:56:06.791700 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1487 17:56:06.801822 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1488 17:56:06.811748 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1489 17:56:06.821740 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1490 17:56:06.832131 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1491 17:56:06.838468 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1492 17:56:06.848739 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1493 17:56:06.858366 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1494 17:56:06.868840 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1495 17:56:06.878511 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1496 17:56:06.888330 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1497 17:56:06.898289 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1498 17:56:06.904807 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1499 17:56:06.915011 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1500 17:56:06.918411 PCI: 00:02.0
1501 17:56:06.928276 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1502 17:56:06.938860 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1503 17:56:06.948243 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1504 17:56:06.951844 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1505 17:56:06.961787 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1506 17:56:06.961913 GENERIC: 0.0
1507 17:56:06.968270 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1508 17:56:06.975192 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1509 17:56:06.985537 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1510 17:56:06.995168 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1511 17:56:06.998552 PCI: 01:00.0
1512 17:56:07.008329 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1513 17:56:07.018727 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1514 17:56:07.018869 PCI: 00:08.0
1515 17:56:07.021842 PCI: 00:0a.0
1516 17:56:07.031510 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1517 17:56:07.034968 PCI: 00:0d.0 child on link 0 USB0 port 0
1518 17:56:07.045506 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1519 17:56:07.048347 USB0 port 0 child on link 0 USB3 port 0
1520 17:56:07.051854 USB3 port 0
1521 17:56:07.051968 USB3 port 1
1522 17:56:07.055248 USB3 port 2
1523 17:56:07.055362 USB3 port 3
1524 17:56:07.061593 PCI: 00:14.0 child on link 0 USB0 port 0
1525 17:56:07.071706 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1526 17:56:07.075095 USB0 port 0 child on link 0 USB2 port 0
1527 17:56:07.075216 USB2 port 0
1528 17:56:07.078534 USB2 port 1
1529 17:56:07.081609 USB2 port 2
1530 17:56:07.081719 USB2 port 3
1531 17:56:07.085149 USB2 port 4
1532 17:56:07.085261 USB2 port 5
1533 17:56:07.088478 USB2 port 6
1534 17:56:07.088562 USB2 port 7
1535 17:56:07.091697 USB2 port 8
1536 17:56:07.091809 USB2 port 9
1537 17:56:07.094808 USB3 port 0
1538 17:56:07.094919 USB3 port 1
1539 17:56:07.098125 USB3 port 2
1540 17:56:07.098236 USB3 port 3
1541 17:56:07.101517 PCI: 00:14.2
1542 17:56:07.112141 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1543 17:56:07.121936 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1544 17:56:07.124875 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1545 17:56:07.135226 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1546 17:56:07.138429 GENERIC: 0.0
1547 17:56:07.141658 PCI: 00:15.0 child on link 0 I2C: 00:1a
1548 17:56:07.152244 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1549 17:56:07.152364 I2C: 00:1a
1550 17:56:07.155155 I2C: 00:31
1551 17:56:07.155264 I2C: 00:32
1552 17:56:07.162191 PCI: 00:15.1 child on link 0 I2C: 00:50
1553 17:56:07.172143 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1554 17:56:07.172260 I2C: 00:50
1555 17:56:07.175441 PCI: 00:15.2
1556 17:56:07.178217 PCI: 00:15.3 child on link 0 I2C: 00:10
1557 17:56:07.188626 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1558 17:56:07.188713 I2C: 00:10
1559 17:56:07.192003 PCI: 00:16.0
1560 17:56:07.201990 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1561 17:56:07.202110 PCI: 00:19.0
1562 17:56:07.208489 PCI: 00:19.1 child on link 0 I2C: 00:15
1563 17:56:07.218628 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1564 17:56:07.218724 I2C: 00:15
1565 17:56:07.221508 I2C: 00:2c
1566 17:56:07.221594 PCI: 00:1e.0
1567 17:56:07.231973 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1568 17:56:07.238293 PCI: 00:1e.3 child on link 0 SPI: 00
1569 17:56:07.248183 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1570 17:56:07.248305 SPI: 00
1571 17:56:07.252000 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1572 17:56:07.261849 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1573 17:56:07.261942 PNP: 0c09.0
1574 17:56:07.271712 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1575 17:56:07.275177 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1576 17:56:07.285168 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1577 17:56:07.295424 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1578 17:56:07.298117 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1579 17:56:07.301826 GENERIC: 0.0
1580 17:56:07.304771 GENERIC: 1.0
1581 17:56:07.304855 PCI: 00:1f.3
1582 17:56:07.314703 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1583 17:56:07.324867 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1584 17:56:07.328358 PCI: 00:1f.5
1585 17:56:07.334711 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1586 17:56:07.344630 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1587 17:56:07.348291 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1588 17:56:07.355005 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1589 17:56:07.361101 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1590 17:56:07.365255 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1591 17:56:07.368004 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1592 17:56:07.378288 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1593 17:56:07.385126 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1594 17:56:07.391594 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1595 17:56:07.398045 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1596 17:56:07.404499 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1597 17:56:07.411587 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1598 17:56:07.421210 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1599 17:56:07.428280 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1600 17:56:07.431193 DOMAIN: 0000: Resource ranges:
1601 17:56:07.434989 * Base: 1000, Size: 800, Tag: 100
1602 17:56:07.438475 * Base: 1900, Size: e700, Tag: 100
1603 17:56:07.444926 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1604 17:56:07.451361 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1605 17:56:07.457711 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1606 17:56:07.464276 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1607 17:56:07.470947 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1608 17:56:07.481438 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1609 17:56:07.487917 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1610 17:56:07.494590 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1611 17:56:07.504330 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1612 17:56:07.510688 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1613 17:56:07.517692 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1614 17:56:07.527763 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1615 17:56:07.533856 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1616 17:56:07.540762 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1617 17:56:07.550732 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1618 17:56:07.557047 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1619 17:56:07.563651 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1620 17:56:07.573639 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1621 17:56:07.580673 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1622 17:56:07.586865 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1623 17:56:07.597398 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1624 17:56:07.603542 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1625 17:56:07.610176 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1626 17:56:07.620283 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1627 17:56:07.626445 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1628 17:56:07.633347 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1629 17:56:07.643390 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1630 17:56:07.649857 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1631 17:56:07.656854 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1632 17:56:07.666246 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1633 17:56:07.672905 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1634 17:56:07.679929 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1635 17:56:07.689851 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1636 17:56:07.692682 DOMAIN: 0000: Resource ranges:
1637 17:56:07.696312 * Base: 80400000, Size: 3fc00000, Tag: 200
1638 17:56:07.699186 * Base: d0000000, Size: 28000000, Tag: 200
1639 17:56:07.706287 * Base: fa000000, Size: 1000000, Tag: 200
1640 17:56:07.709889 * Base: fb001000, Size: 17ff000, Tag: 200
1641 17:56:07.712758 * Base: fe800000, Size: 300000, Tag: 200
1642 17:56:07.716103 * Base: feb80000, Size: 80000, Tag: 200
1643 17:56:07.722982 * Base: fed00000, Size: 40000, Tag: 200
1644 17:56:07.725969 * Base: fed70000, Size: 10000, Tag: 200
1645 17:56:07.729536 * Base: fed88000, Size: 8000, Tag: 200
1646 17:56:07.733077 * Base: fed93000, Size: d000, Tag: 200
1647 17:56:07.736193 * Base: feda2000, Size: 1e000, Tag: 200
1648 17:56:07.743196 * Base: fede0000, Size: 1220000, Tag: 200
1649 17:56:07.746427 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1650 17:56:07.752456 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1651 17:56:07.759631 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1652 17:56:07.765947 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1653 17:56:07.772943 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1654 17:56:07.779612 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1655 17:56:07.785903 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1656 17:56:07.792118 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1657 17:56:07.799207 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1658 17:56:07.806094 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1659 17:56:07.812409 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1660 17:56:07.819037 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1661 17:56:07.825555 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1662 17:56:07.832558 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1663 17:56:07.838833 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1664 17:56:07.845567 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1665 17:56:07.851935 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1666 17:56:07.858679 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1667 17:56:07.865562 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1668 17:56:07.872455 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1669 17:56:07.882268 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1670 17:56:07.888625 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1671 17:56:07.892251 PCI: 00:06.0: Resource ranges:
1672 17:56:07.895196 * Base: 80400000, Size: 100000, Tag: 200
1673 17:56:07.902096 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1674 17:56:07.908736 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1675 17:56:07.918479 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1676 17:56:07.925200 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1677 17:56:07.928714 Root Device assign_resources, bus 0 link: 0
1678 17:56:07.934843 DOMAIN: 0000 assign_resources, bus 0 link: 0
1679 17:56:07.941850 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1680 17:56:07.951647 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1681 17:56:07.958386 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1682 17:56:07.965139 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1683 17:56:07.971813 PCI: 00:04.0 assign_resources, bus 1 link: 0
1684 17:56:07.975017 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1685 17:56:07.985144 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1686 17:56:07.995349 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1687 17:56:08.001626 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1688 17:56:08.005260 PCI: 00:06.0 assign_resources, bus 1 link: 0
1689 17:56:08.015202 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1690 17:56:08.021443 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1691 17:56:08.028386 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1692 17:56:08.035232 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1693 17:56:08.045194 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1694 17:56:08.048527 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1695 17:56:08.051326 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1696 17:56:08.061473 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1697 17:56:08.065097 PCI: 00:14.0 assign_resources, bus 0 link: 0
1698 17:56:08.071651 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1699 17:56:08.078471 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1700 17:56:08.088464 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1701 17:56:08.094777 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1702 17:56:08.098257 PCI: 00:14.3 assign_resources, bus 0 link: 0
1703 17:56:08.105010 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1704 17:56:08.111463 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1705 17:56:08.118323 PCI: 00:15.0 assign_resources, bus 0 link: 0
1706 17:56:08.121893 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1707 17:56:08.128257 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1708 17:56:08.134721 PCI: 00:15.1 assign_resources, bus 0 link: 0
1709 17:56:08.138055 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1710 17:56:08.148365 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1711 17:56:08.151335 PCI: 00:15.3 assign_resources, bus 0 link: 0
1712 17:56:08.158201 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1713 17:56:08.164419 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1714 17:56:08.171174 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1715 17:56:08.178220 PCI: 00:19.1 assign_resources, bus 0 link: 0
1716 17:56:08.181406 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1717 17:56:08.191340 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1718 17:56:08.194739 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1719 17:56:08.201159 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1720 17:56:08.204610 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1721 17:56:08.208171 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1722 17:56:08.214356 LPC: Trying to open IO window from 800 size 1ff
1723 17:56:08.220723 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1724 17:56:08.231162 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1725 17:56:08.237639 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1726 17:56:08.244545 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1727 17:56:08.248162 Root Device assign_resources, bus 0 link: 0 done
1728 17:56:08.251107 Done setting resources.
1729 17:56:08.257351 Show resources in subtree (Root Device)...After assigning values.
1730 17:56:08.260793 Root Device child on link 0 CPU_CLUSTER: 0
1731 17:56:08.264317 CPU_CLUSTER: 0 child on link 0 APIC: 00
1732 17:56:08.267863 APIC: 00
1733 17:56:08.267975 APIC: 12
1734 17:56:08.268069 APIC: 14
1735 17:56:08.270732 APIC: 16
1736 17:56:08.270830 APIC: 10
1737 17:56:08.274012 APIC: 01
1738 17:56:08.274124 APIC: 08
1739 17:56:08.274218 APIC: 09
1740 17:56:08.280705 DOMAIN: 0000 child on link 0 GPIO: 0
1741 17:56:08.287432 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1742 17:56:08.297254 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1743 17:56:08.300667 GPIO: 0
1744 17:56:08.300752 PCI: 00:00.0
1745 17:56:08.310857 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1746 17:56:08.321033 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1747 17:56:08.330803 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1748 17:56:08.337786 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1749 17:56:08.347335 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1750 17:56:08.357241 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1751 17:56:08.367849 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1752 17:56:08.377113 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1753 17:56:08.387028 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1754 17:56:08.397094 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1755 17:56:08.403951 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1756 17:56:08.414032 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1757 17:56:08.423694 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1758 17:56:08.433556 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1759 17:56:08.443624 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1760 17:56:08.450417 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1761 17:56:08.460350 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1762 17:56:08.470054 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1763 17:56:08.480239 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1764 17:56:08.490017 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1765 17:56:08.500439 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1766 17:56:08.510120 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1767 17:56:08.520193 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1768 17:56:08.529905 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1769 17:56:08.539671 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1770 17:56:08.546625 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1771 17:56:08.556647 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1772 17:56:08.566412 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1773 17:56:08.570300 PCI: 00:02.0
1774 17:56:08.579854 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1775 17:56:08.589831 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1776 17:56:08.599775 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1777 17:56:08.603162 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1778 17:56:08.612770 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1779 17:56:08.616181 GENERIC: 0.0
1780 17:56:08.619459 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1781 17:56:08.629288 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1782 17:56:08.639635 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1783 17:56:08.652741 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1784 17:56:08.652867 PCI: 01:00.0
1785 17:56:08.662865 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1786 17:56:08.672524 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1787 17:56:08.676086 PCI: 00:08.0
1788 17:56:08.676195 PCI: 00:0a.0
1789 17:56:08.689347 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1790 17:56:08.692804 PCI: 00:0d.0 child on link 0 USB0 port 0
1791 17:56:08.702873 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1792 17:56:08.705717 USB0 port 0 child on link 0 USB3 port 0
1793 17:56:08.709344 USB3 port 0
1794 17:56:08.709463 USB3 port 1
1795 17:56:08.712695 USB3 port 2
1796 17:56:08.712815 USB3 port 3
1797 17:56:08.719290 PCI: 00:14.0 child on link 0 USB0 port 0
1798 17:56:08.729552 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1799 17:56:08.732556 USB0 port 0 child on link 0 USB2 port 0
1800 17:56:08.735959 USB2 port 0
1801 17:56:08.736155 USB2 port 1
1802 17:56:08.739245 USB2 port 2
1803 17:56:08.739393 USB2 port 3
1804 17:56:08.742967 USB2 port 4
1805 17:56:08.743163 USB2 port 5
1806 17:56:08.746197 USB2 port 6
1807 17:56:08.746372 USB2 port 7
1808 17:56:08.749135 USB2 port 8
1809 17:56:08.749285 USB2 port 9
1810 17:56:08.752887 USB3 port 0
1811 17:56:08.756055 USB3 port 1
1812 17:56:08.756204 USB3 port 2
1813 17:56:08.759609 USB3 port 3
1814 17:56:08.759758 PCI: 00:14.2
1815 17:56:08.769443 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1816 17:56:08.779220 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1817 17:56:08.786195 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1818 17:56:08.795696 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1819 17:56:08.795849 GENERIC: 0.0
1820 17:56:08.802739 PCI: 00:15.0 child on link 0 I2C: 00:1a
1821 17:56:08.812733 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1822 17:56:08.812939 I2C: 00:1a
1823 17:56:08.815564 I2C: 00:31
1824 17:56:08.815747 I2C: 00:32
1825 17:56:08.819057 PCI: 00:15.1 child on link 0 I2C: 00:50
1826 17:56:08.832610 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1827 17:56:08.832925 I2C: 00:50
1828 17:56:08.836105 PCI: 00:15.2
1829 17:56:08.838975 PCI: 00:15.3 child on link 0 I2C: 00:10
1830 17:56:08.849243 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1831 17:56:08.849545 I2C: 00:10
1832 17:56:08.852398 PCI: 00:16.0
1833 17:56:08.862178 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1834 17:56:08.865940 PCI: 00:19.0
1835 17:56:08.869083 PCI: 00:19.1 child on link 0 I2C: 00:15
1836 17:56:08.878866 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1837 17:56:08.879249 I2C: 00:15
1838 17:56:08.882241 I2C: 00:2c
1839 17:56:08.882628 PCI: 00:1e.0
1840 17:56:08.895872 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1841 17:56:08.899375 PCI: 00:1e.3 child on link 0 SPI: 00
1842 17:56:08.908938 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1843 17:56:08.909237 SPI: 00
1844 17:56:08.915996 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1845 17:56:08.922300 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1846 17:56:08.926042 PNP: 0c09.0
1847 17:56:08.932317 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1848 17:56:08.939258 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1849 17:56:08.949124 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1850 17:56:08.955841 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1851 17:56:08.962390 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1852 17:56:08.962569 GENERIC: 0.0
1853 17:56:08.965915 GENERIC: 1.0
1854 17:56:08.966090 PCI: 00:1f.3
1855 17:56:08.975499 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1856 17:56:08.989232 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1857 17:56:08.989422 PCI: 00:1f.5
1858 17:56:08.998651 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1859 17:56:09.002313 Done allocating resources.
1860 17:56:09.009261 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1861 17:56:09.015532 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1862 17:56:09.019202 Configure audio over I2S with MAX98373 NAU88L25B.
1863 17:56:09.023790 Enabling BT offload
1864 17:56:09.030837 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1865 17:56:09.034002 Enabling resources...
1866 17:56:09.037517 PCI: 00:00.0 subsystem <- 8086/4609
1867 17:56:09.040984 PCI: 00:00.0 cmd <- 06
1868 17:56:09.044488 PCI: 00:02.0 subsystem <- 8086/46b3
1869 17:56:09.047794 PCI: 00:02.0 cmd <- 03
1870 17:56:09.050744 PCI: 00:04.0 subsystem <- 8086/461d
1871 17:56:09.050922 PCI: 00:04.0 cmd <- 02
1872 17:56:09.053744 PCI: 00:06.0 bridge ctrl <- 0013
1873 17:56:09.057923 PCI: 00:06.0 subsystem <- 8086/464d
1874 17:56:09.060743 PCI: 00:06.0 cmd <- 106
1875 17:56:09.063919 PCI: 00:0a.0 subsystem <- 8086/467d
1876 17:56:09.067260 PCI: 00:0a.0 cmd <- 02
1877 17:56:09.070534 PCI: 00:0d.0 subsystem <- 8086/461e
1878 17:56:09.073911 PCI: 00:0d.0 cmd <- 02
1879 17:56:09.077385 PCI: 00:14.0 subsystem <- 8086/51ed
1880 17:56:09.080460 PCI: 00:14.0 cmd <- 02
1881 17:56:09.083786 PCI: 00:14.2 subsystem <- 8086/51ef
1882 17:56:09.083926 PCI: 00:14.2 cmd <- 02
1883 17:56:09.087255 PCI: 00:14.3 subsystem <- 8086/51f0
1884 17:56:09.090569 PCI: 00:14.3 cmd <- 02
1885 17:56:09.093691 PCI: 00:15.0 subsystem <- 8086/51e8
1886 17:56:09.097084 PCI: 00:15.0 cmd <- 02
1887 17:56:09.100445 PCI: 00:15.1 subsystem <- 8086/51e9
1888 17:56:09.104089 PCI: 00:15.1 cmd <- 06
1889 17:56:09.107416 PCI: 00:15.3 subsystem <- 8086/51eb
1890 17:56:09.110707 PCI: 00:15.3 cmd <- 02
1891 17:56:09.114347 PCI: 00:16.0 subsystem <- 8086/51e0
1892 17:56:09.114447 PCI: 00:16.0 cmd <- 02
1893 17:56:09.117167 PCI: 00:19.1 subsystem <- 8086/51c6
1894 17:56:09.120413 PCI: 00:19.1 cmd <- 02
1895 17:56:09.123758 PCI: 00:1e.0 subsystem <- 8086/51a8
1896 17:56:09.127256 PCI: 00:1e.0 cmd <- 06
1897 17:56:09.130893 PCI: 00:1e.3 subsystem <- 8086/51ab
1898 17:56:09.134177 PCI: 00:1e.3 cmd <- 02
1899 17:56:09.137641 PCI: 00:1f.0 subsystem <- 8086/5182
1900 17:56:09.140302 PCI: 00:1f.0 cmd <- 407
1901 17:56:09.144113 PCI: 00:1f.3 subsystem <- 8086/51c8
1902 17:56:09.144214 PCI: 00:1f.3 cmd <- 02
1903 17:56:09.147480 PCI: 00:1f.5 subsystem <- 8086/51a4
1904 17:56:09.150431 PCI: 00:1f.5 cmd <- 406
1905 17:56:09.153932 PCI: 01:00.0 cmd <- 02
1906 17:56:09.154077 done.
1907 17:56:09.160681 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1908 17:56:09.163802 ME: Version: Unavailable
1909 17:56:09.167488 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1910 17:56:09.170701 Initializing devices...
1911 17:56:09.170801 Root Device init
1912 17:56:09.174070 mainboard: EC init
1913 17:56:09.177491 Chrome EC: Set SMI mask to 0x0000000000000000
1914 17:56:09.181428 Chrome EC: UHEPI supported
1915 17:56:09.188472 Chrome EC: clear events_b mask to 0x0000000000000000
1916 17:56:09.194821 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1917 17:56:09.201698 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1918 17:56:09.208401 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1919 17:56:09.211977 Chrome EC: Set WAKE mask to 0x0000000000000000
1920 17:56:09.215299 Root Device init finished in 39 msecs
1921 17:56:09.218584 PCI: 00:00.0 init
1922 17:56:09.221545 CPU TDP = 15 Watts
1923 17:56:09.221663 CPU PL1 = 15 Watts
1924 17:56:09.225446 CPU PL2 = 55 Watts
1925 17:56:09.228168 CPU PL4 = 123 Watts
1926 17:56:09.231677 PCI: 00:00.0 init finished in 8 msecs
1927 17:56:09.231801 PCI: 00:02.0 init
1928 17:56:09.234947 GMA: Found VBT in CBFS
1929 17:56:09.238394 GMA: Found valid VBT in CBFS
1930 17:56:09.245273 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1931 17:56:09.252060 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1932 17:56:09.255151 PCI: 00:02.0 init finished in 18 msecs
1933 17:56:09.258540 PCI: 00:06.0 init
1934 17:56:09.261486 Initializing PCH PCIe bridge.
1935 17:56:09.264890 PCI: 00:06.0 init finished in 3 msecs
1936 17:56:09.264998 PCI: 00:0a.0 init
1937 17:56:09.268492 PCI: 00:0a.0 init finished in 0 msecs
1938 17:56:09.271667 PCI: 00:14.0 init
1939 17:56:09.274938 PCI: 00:14.0 init finished in 0 msecs
1940 17:56:09.278070 PCI: 00:14.2 init
1941 17:56:09.281425 PCI: 00:14.2 init finished in 0 msecs
1942 17:56:09.281519 PCI: 00:15.0 init
1943 17:56:09.284933 I2C bus 0 version 0x3230302a
1944 17:56:09.288054 DW I2C bus 0 at 0x80655000 (400 KHz)
1945 17:56:09.291403 PCI: 00:15.0 init finished in 6 msecs
1946 17:56:09.295175 PCI: 00:15.1 init
1947 17:56:09.298562 I2C bus 1 version 0x3230302a
1948 17:56:09.301868 DW I2C bus 1 at 0x80656000 (400 KHz)
1949 17:56:09.304759 PCI: 00:15.1 init finished in 6 msecs
1950 17:56:09.308121 PCI: 00:15.3 init
1951 17:56:09.311314 I2C bus 3 version 0x3230302a
1952 17:56:09.314668 DW I2C bus 3 at 0x80657000 (400 KHz)
1953 17:56:09.317948 PCI: 00:15.3 init finished in 6 msecs
1954 17:56:09.318069 PCI: 00:16.0 init
1955 17:56:09.325380 PCI: 00:16.0 init finished in 0 msecs
1956 17:56:09.325488 PCI: 00:19.1 init
1957 17:56:09.328059 I2C bus 5 version 0x3230302a
1958 17:56:09.331590 DW I2C bus 5 at 0x80659000 (400 KHz)
1959 17:56:09.335007 PCI: 00:19.1 init finished in 6 msecs
1960 17:56:09.338039 PCI: 00:1f.0 init
1961 17:56:09.341579 IOAPIC: Initializing IOAPIC at 0xfec00000
1962 17:56:09.345073 IOAPIC: ID = 0x02
1963 17:56:09.348451 IOAPIC: Dumping registers
1964 17:56:09.348539 reg 0x0000: 0x02000000
1965 17:56:09.351347 reg 0x0001: 0x00770020
1966 17:56:09.354858 reg 0x0002: 0x00000000
1967 17:56:09.358183 IOAPIC: 120 interrupts
1968 17:56:09.361352 IOAPIC: Clearing IOAPIC at 0xfec00000
1969 17:56:09.364590 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1970 17:56:09.371432 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1971 17:56:09.375143 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1972 17:56:09.378452 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1973 17:56:09.385123 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1974 17:56:09.388402 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1975 17:56:09.395085 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1976 17:56:09.398225 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1977 17:56:09.404692 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1978 17:56:09.408137 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1979 17:56:09.415021 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1980 17:56:09.418458 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1981 17:56:09.421889 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1982 17:56:09.428051 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1983 17:56:09.431380 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1984 17:56:09.438058 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1985 17:56:09.441555 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1986 17:56:09.447936 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1987 17:56:09.451218 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1988 17:56:09.454660 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1989 17:56:09.461061 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1990 17:56:09.464318 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1991 17:56:09.471573 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1992 17:56:09.475010 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1993 17:56:09.481441 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1994 17:56:09.484908 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1995 17:56:09.490976 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1996 17:56:09.494527 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1997 17:56:09.497960 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1998 17:56:09.504431 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1999 17:56:09.507886 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2000 17:56:09.514437 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2001 17:56:09.517795 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2002 17:56:09.524167 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2003 17:56:09.528168 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2004 17:56:09.534404 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2005 17:56:09.537688 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2006 17:56:09.540909 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2007 17:56:09.547414 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2008 17:56:09.550954 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2009 17:56:09.557867 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2010 17:56:09.561234 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2011 17:56:09.568084 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2012 17:56:09.571344 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2013 17:56:09.574020 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2014 17:56:09.581180 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2015 17:56:09.584614 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2016 17:56:09.590785 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2017 17:56:09.594084 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2018 17:56:09.601028 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2019 17:56:09.604392 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2020 17:56:09.611292 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2021 17:56:09.614303 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2022 17:56:09.617786 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2023 17:56:09.624007 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2024 17:56:09.627398 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2025 17:56:09.634527 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2026 17:56:09.637340 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2027 17:56:09.644621 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2028 17:56:09.648053 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2029 17:56:09.654492 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2030 17:56:09.657556 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2031 17:56:09.660719 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2032 17:56:09.667599 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2033 17:56:09.671128 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2034 17:56:09.677602 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2035 17:56:09.680832 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2036 17:56:09.687905 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2037 17:56:09.690516 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2038 17:56:09.694088 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2039 17:56:09.700513 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2040 17:56:09.704506 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2041 17:56:09.711178 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2042 17:56:09.713913 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2043 17:56:09.720793 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2044 17:56:09.724201 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2045 17:56:09.731027 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2046 17:56:09.734276 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2047 17:56:09.737703 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2048 17:56:09.744273 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2049 17:56:09.747900 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2050 17:56:09.754451 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2051 17:56:09.757201 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2052 17:56:09.764131 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2053 17:56:09.767591 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2054 17:56:09.773998 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2055 17:56:09.777678 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2056 17:56:09.780754 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2057 17:56:09.787159 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2058 17:56:09.790743 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2059 17:56:09.797337 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2060 17:56:09.800291 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2061 17:56:09.807328 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2062 17:56:09.810491 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2063 17:56:09.814175 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2064 17:56:09.821156 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2065 17:56:09.823822 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2066 17:56:09.830500 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2067 17:56:09.834061 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2068 17:56:09.840820 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2069 17:56:09.843747 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2070 17:56:09.850419 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2071 17:56:09.853892 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2072 17:56:09.856684 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2073 17:56:09.863910 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2074 17:56:09.867203 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2075 17:56:09.873517 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2076 17:56:09.877129 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2077 17:56:09.883647 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2078 17:56:09.886775 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2079 17:56:09.893712 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2080 17:56:09.897046 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2081 17:56:09.900448 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2082 17:56:09.906957 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2083 17:56:09.909713 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2084 17:56:09.916450 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2085 17:56:09.919884 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2086 17:56:09.926360 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2087 17:56:09.929855 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2088 17:56:09.936557 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2089 17:56:09.940285 IOAPIC: Bootstrap Processor Local APIC = 0x00
2090 17:56:09.943131 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2091 17:56:09.950097 PCI: 00:1f.0 init finished in 607 msecs
2092 17:56:09.950185 PCI: 00:1f.2 init
2093 17:56:09.953533 apm_control: Disabling ACPI.
2094 17:56:09.957601 APMC done.
2095 17:56:09.960968 PCI: 00:1f.2 init finished in 6 msecs
2096 17:56:09.964233 PCI: 00:1f.3 init
2097 17:56:09.967520 PCI: 00:1f.3 init finished in 0 msecs
2098 17:56:09.967594 PCI: 01:00.0 init
2099 17:56:09.970974 PCI: 01:00.0 init finished in 0 msecs
2100 17:56:09.974293 PNP: 0c09.0 init
2101 17:56:09.977699 Google Chrome EC uptime: 12.492 seconds
2102 17:56:09.984526 Google Chrome AP resets since EC boot: 1
2103 17:56:09.987648 Google Chrome most recent AP reset causes:
2104 17:56:09.991056 0.342: 32775 shutdown: entering G3
2105 17:56:09.997928 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2106 17:56:10.000720 PNP: 0c09.0 init finished in 23 msecs
2107 17:56:10.004127 GENERIC: 0.0 init
2108 17:56:10.007345 GENERIC: 0.0 init finished in 0 msecs
2109 17:56:10.007457 GENERIC: 1.0 init
2110 17:56:10.011244 GENERIC: 1.0 init finished in 0 msecs
2111 17:56:10.013945 Devices initialized
2112 17:56:10.017249 Show all devs... After init.
2113 17:56:10.020723 Root Device: enabled 1
2114 17:56:10.020798 CPU_CLUSTER: 0: enabled 1
2115 17:56:10.024554 DOMAIN: 0000: enabled 1
2116 17:56:10.027715 GPIO: 0: enabled 1
2117 17:56:10.031154 PCI: 00:00.0: enabled 1
2118 17:56:10.031237 PCI: 00:01.0: enabled 0
2119 17:56:10.034412 PCI: 00:01.1: enabled 0
2120 17:56:10.037701 PCI: 00:02.0: enabled 1
2121 17:56:10.037779 PCI: 00:04.0: enabled 1
2122 17:56:10.041013 PCI: 00:05.0: enabled 0
2123 17:56:10.044423 PCI: 00:06.0: enabled 1
2124 17:56:10.047182 PCI: 00:06.2: enabled 0
2125 17:56:10.047253 PCI: 00:07.0: enabled 0
2126 17:56:10.050634 PCI: 00:07.1: enabled 0
2127 17:56:10.054291 PCI: 00:07.2: enabled 0
2128 17:56:10.057811 PCI: 00:07.3: enabled 0
2129 17:56:10.057923 PCI: 00:08.0: enabled 0
2130 17:56:10.060552 PCI: 00:09.0: enabled 0
2131 17:56:10.063885 PCI: 00:0a.0: enabled 1
2132 17:56:10.067073 PCI: 00:0d.0: enabled 1
2133 17:56:10.067179 PCI: 00:0d.1: enabled 0
2134 17:56:10.070485 PCI: 00:0d.2: enabled 0
2135 17:56:10.073828 PCI: 00:0d.3: enabled 0
2136 17:56:10.077554 PCI: 00:0e.0: enabled 0
2137 17:56:10.077672 PCI: 00:10.0: enabled 0
2138 17:56:10.081165 PCI: 00:10.1: enabled 0
2139 17:56:10.083914 PCI: 00:10.6: enabled 0
2140 17:56:10.084026 PCI: 00:10.7: enabled 0
2141 17:56:10.087284 PCI: 00:12.0: enabled 0
2142 17:56:10.090305 PCI: 00:12.6: enabled 0
2143 17:56:10.093857 PCI: 00:12.7: enabled 0
2144 17:56:10.093962 PCI: 00:13.0: enabled 0
2145 17:56:10.097487 PCI: 00:14.0: enabled 1
2146 17:56:10.100268 PCI: 00:14.1: enabled 0
2147 17:56:10.103487 PCI: 00:14.2: enabled 1
2148 17:56:10.103598 PCI: 00:14.3: enabled 1
2149 17:56:10.106868 PCI: 00:15.0: enabled 1
2150 17:56:10.110461 PCI: 00:15.1: enabled 1
2151 17:56:10.114139 PCI: 00:15.2: enabled 0
2152 17:56:10.114229 PCI: 00:15.3: enabled 1
2153 17:56:10.117163 PCI: 00:16.0: enabled 1
2154 17:56:10.120776 PCI: 00:16.1: enabled 0
2155 17:56:10.124021 PCI: 00:16.2: enabled 0
2156 17:56:10.124114 PCI: 00:16.3: enabled 0
2157 17:56:10.126846 PCI: 00:16.4: enabled 0
2158 17:56:10.130413 PCI: 00:16.5: enabled 0
2159 17:56:10.130497 PCI: 00:17.0: enabled 0
2160 17:56:10.133569 PCI: 00:19.0: enabled 0
2161 17:56:10.137590 PCI: 00:19.1: enabled 1
2162 17:56:10.140856 PCI: 00:19.2: enabled 0
2163 17:56:10.140941 PCI: 00:1a.0: enabled 0
2164 17:56:10.143609 PCI: 00:1c.0: enabled 0
2165 17:56:10.147044 PCI: 00:1c.1: enabled 0
2166 17:56:10.150501 PCI: 00:1c.2: enabled 0
2167 17:56:10.150572 PCI: 00:1c.3: enabled 0
2168 17:56:10.153871 PCI: 00:1c.4: enabled 0
2169 17:56:10.157486 PCI: 00:1c.5: enabled 0
2170 17:56:10.157569 PCI: 00:1c.6: enabled 0
2171 17:56:10.160715 PCI: 00:1c.7: enabled 0
2172 17:56:10.164172 PCI: 00:1d.0: enabled 0
2173 17:56:10.167015 PCI: 00:1d.1: enabled 0
2174 17:56:10.167137 PCI: 00:1d.2: enabled 0
2175 17:56:10.170670 PCI: 00:1d.3: enabled 0
2176 17:56:10.173532 PCI: 00:1e.0: enabled 1
2177 17:56:10.177019 PCI: 00:1e.1: enabled 0
2178 17:56:10.177102 PCI: 00:1e.2: enabled 0
2179 17:56:10.180306 PCI: 00:1e.3: enabled 1
2180 17:56:10.183556 PCI: 00:1f.0: enabled 1
2181 17:56:10.187130 PCI: 00:1f.1: enabled 0
2182 17:56:10.187206 PCI: 00:1f.2: enabled 1
2183 17:56:10.190286 PCI: 00:1f.3: enabled 1
2184 17:56:10.193761 PCI: 00:1f.4: enabled 0
2185 17:56:10.193842 PCI: 00:1f.5: enabled 1
2186 17:56:10.197248 PCI: 00:1f.6: enabled 0
2187 17:56:10.200507 PCI: 00:1f.7: enabled 0
2188 17:56:10.203904 GENERIC: 0.0: enabled 1
2189 17:56:10.203985 GENERIC: 0.0: enabled 1
2190 17:56:10.207276 GENERIC: 1.0: enabled 1
2191 17:56:10.210693 GENERIC: 0.0: enabled 1
2192 17:56:10.213966 GENERIC: 1.0: enabled 1
2193 17:56:10.214047 USB0 port 0: enabled 1
2194 17:56:10.217236 USB0 port 0: enabled 1
2195 17:56:10.220349 GENERIC: 0.0: enabled 1
2196 17:56:10.220431 I2C: 00:1a: enabled 1
2197 17:56:10.223424 I2C: 00:31: enabled 1
2198 17:56:10.227082 I2C: 00:32: enabled 1
2199 17:56:10.227163 I2C: 00:50: enabled 1
2200 17:56:10.230082 I2C: 00:10: enabled 1
2201 17:56:10.234024 I2C: 00:15: enabled 1
2202 17:56:10.236834 I2C: 00:2c: enabled 1
2203 17:56:10.236915 GENERIC: 0.0: enabled 1
2204 17:56:10.240287 SPI: 00: enabled 1
2205 17:56:10.243780 PNP: 0c09.0: enabled 1
2206 17:56:10.243887 GENERIC: 0.0: enabled 1
2207 17:56:10.247308 USB3 port 0: enabled 1
2208 17:56:10.250283 USB3 port 1: enabled 0
2209 17:56:10.250359 USB3 port 2: enabled 1
2210 17:56:10.253472 USB3 port 3: enabled 0
2211 17:56:10.256876 USB2 port 0: enabled 1
2212 17:56:10.256958 USB2 port 1: enabled 0
2213 17:56:10.260128 USB2 port 2: enabled 1
2214 17:56:10.263999 USB2 port 3: enabled 0
2215 17:56:10.267303 USB2 port 4: enabled 0
2216 17:56:10.267372 USB2 port 5: enabled 1
2217 17:56:10.270104 USB2 port 6: enabled 0
2218 17:56:10.273460 USB2 port 7: enabled 0
2219 17:56:10.273541 USB2 port 8: enabled 1
2220 17:56:10.277380 USB2 port 9: enabled 1
2221 17:56:10.280685 USB3 port 0: enabled 1
2222 17:56:10.283585 USB3 port 1: enabled 0
2223 17:56:10.283666 USB3 port 2: enabled 0
2224 17:56:10.286741 USB3 port 3: enabled 0
2225 17:56:10.290084 GENERIC: 0.0: enabled 1
2226 17:56:10.290166 GENERIC: 1.0: enabled 1
2227 17:56:10.293485 APIC: 00: enabled 1
2228 17:56:10.296729 APIC: 12: enabled 1
2229 17:56:10.296818 APIC: 14: enabled 1
2230 17:56:10.300243 APIC: 16: enabled 1
2231 17:56:10.300322 APIC: 10: enabled 1
2232 17:56:10.303609 APIC: 01: enabled 1
2233 17:56:10.307083 APIC: 08: enabled 1
2234 17:56:10.307162 APIC: 09: enabled 1
2235 17:56:10.310427 PCI: 01:00.0: enabled 1
2236 17:56:10.316774 BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms
2237 17:56:10.320075 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2238 17:56:10.323747 ELOG: NV offset 0xf20000 size 0x4000
2239 17:56:10.331356 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2240 17:56:10.337967 ELOG: Event(17) added with size 13 at 2024-05-17 17:56:10 UTC
2241 17:56:10.344996 ELOG: Event(9E) added with size 10 at 2024-05-17 17:56:10 UTC
2242 17:56:10.351813 ELOG: Event(9F) added with size 14 at 2024-05-17 17:56:10 UTC
2243 17:56:10.358137 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2244 17:56:10.365203 ELOG: Event(A0) added with size 9 at 2024-05-17 17:56:10 UTC
2245 17:56:10.367992 elog_add_boot_reason: Logged dev mode boot
2246 17:56:10.374891 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2247 17:56:10.375006 Finalize devices...
2248 17:56:10.377961 PCI: 00:16.0 final
2249 17:56:10.381956 PCI: 00:1f.2 final
2250 17:56:10.382032 GENERIC: 0.0 final
2251 17:56:10.388122 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2252 17:56:10.391365 GENERIC: 1.0 final
2253 17:56:10.394661 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2254 17:56:10.398017 Devices finalized
2255 17:56:10.405154 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2256 17:56:10.407896 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2257 17:56:10.414777 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2258 17:56:10.418208 ME: HFSTS1 : 0x90000245
2259 17:56:10.425090 ME: HFSTS2 : 0x82100116
2260 17:56:10.428524 ME: HFSTS3 : 0x00000050
2261 17:56:10.431199 ME: HFSTS4 : 0x00004000
2262 17:56:10.438112 ME: HFSTS5 : 0x00000000
2263 17:56:10.441134 ME: HFSTS6 : 0x40600006
2264 17:56:10.445111 ME: Manufacturing Mode : NO
2265 17:56:10.448225 ME: SPI Protection Mode Enabled : YES
2266 17:56:10.454896 ME: FPFs Committed : YES
2267 17:56:10.458256 ME: Manufacturing Vars Locked : YES
2268 17:56:10.461004 ME: FW Partition Table : OK
2269 17:56:10.464362 ME: Bringup Loader Failure : NO
2270 17:56:10.468038 ME: Firmware Init Complete : YES
2271 17:56:10.471301 ME: Boot Options Present : NO
2272 17:56:10.474814 ME: Update In Progress : NO
2273 17:56:10.478135 ME: D0i3 Support : YES
2274 17:56:10.484505 ME: Low Power State Enabled : NO
2275 17:56:10.487602 ME: CPU Replaced : YES
2276 17:56:10.491409 ME: CPU Replacement Valid : YES
2277 17:56:10.494513 ME: Current Working State : 5
2278 17:56:10.498056 ME: Current Operation State : 1
2279 17:56:10.501613 ME: Current Operation Mode : 0
2280 17:56:10.504263 ME: Error Code : 0
2281 17:56:10.508180 ME: Enhanced Debug Mode : NO
2282 17:56:10.511618 ME: CPU Debug Disabled : YES
2283 17:56:10.517582 ME: TXT Support : NO
2284 17:56:10.520999 ME: WP for RO is enabled : YES
2285 17:56:10.524491 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2286 17:56:10.531390 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2287 17:56:10.534908 Ramoops buffer: 0x100000@0x76899000.
2288 17:56:10.541175 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2289 17:56:10.547463 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2290 17:56:10.551478 CBFS: 'fallback/slic' not found.
2291 17:56:10.558269 ACPI: Writing ACPI tables at 7686d000.
2292 17:56:10.558388 ACPI: * FACS
2293 17:56:10.561020 ACPI: * DSDT
2294 17:56:10.568037 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2295 17:56:10.571268 ACPI: * FADT
2296 17:56:10.571374 SCI is IRQ9
2297 17:56:10.574808 ACPI: added table 1/32, length now 40
2298 17:56:10.577572 ACPI: * SSDT
2299 17:56:10.581024 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2300 17:56:10.588684 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2301 17:56:10.591544 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2302 17:56:10.595174 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2303 17:56:10.601279 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2304 17:56:10.608402 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2305 17:56:10.615043 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2306 17:56:10.617951 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2307 17:56:10.624722 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2308 17:56:10.628266 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2309 17:56:10.635041 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2310 17:56:10.638607 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2311 17:56:10.645050 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2312 17:56:10.647926 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2313 17:56:10.655461 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2314 17:56:10.658875 PS2K: Passing 80 keymaps to kernel
2315 17:56:10.666028 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2316 17:56:10.672251 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2317 17:56:10.679136 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2318 17:56:10.685865 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2319 17:56:10.692442 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2320 17:56:10.699338 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2321 17:56:10.702064 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2322 17:56:10.708677 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2323 17:56:10.715467 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2324 17:56:10.722310 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2325 17:56:10.725608 ACPI: added table 2/32, length now 44
2326 17:56:10.728685 ACPI: * MCFG
2327 17:56:10.732348 ACPI: added table 3/32, length now 48
2328 17:56:10.732451 ACPI: * TPM2
2329 17:56:10.735278 TPM2 log created at 0x7685d000
2330 17:56:10.741947 ACPI: added table 4/32, length now 52
2331 17:56:10.742023 ACPI: * LPIT
2332 17:56:10.745339 ACPI: added table 5/32, length now 56
2333 17:56:10.748837 ACPI: * MADT
2334 17:56:10.748912 SCI is IRQ9
2335 17:56:10.752165 ACPI: added table 6/32, length now 60
2336 17:56:10.755371 cmd_reg from pmc_make_ipc_cmd 1052838
2337 17:56:10.761998 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2338 17:56:10.768491 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2339 17:56:10.775344 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2340 17:56:10.778843 PMC CrashLog size in discovery mode: 0xC00
2341 17:56:10.782057 cpu crashlog bar addr: 0x80640000
2342 17:56:10.785310 cpu discovery table offset: 0x6030
2343 17:56:10.791979 cpu_crashlog_discovery_table buffer count: 0x3
2344 17:56:10.798097 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2345 17:56:10.804763 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2346 17:56:10.812230 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2347 17:56:10.815333 PMC crashLog size in discovery mode : 0xC00
2348 17:56:10.821351 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2349 17:56:10.828151 discover mode PMC crashlog size adjusted to: 0x200
2350 17:56:10.834927 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2351 17:56:10.838384 discover mode PMC crashlog size adjusted to: 0x0
2352 17:56:10.841847 m_cpu_crashLog_size : 0x3480 bytes
2353 17:56:10.845189 CPU crashLog present.
2354 17:56:10.848282 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2355 17:56:10.858018 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2356 17:56:10.858123 current = 76876550
2357 17:56:10.861467 ACPI: * DMAR
2358 17:56:10.864878 ACPI: added table 7/32, length now 64
2359 17:56:10.868422 ACPI: added table 8/32, length now 68
2360 17:56:10.868524 ACPI: * HPET
2361 17:56:10.874875 ACPI: added table 9/32, length now 72
2362 17:56:10.875006 ACPI: done.
2363 17:56:10.878103 ACPI tables: 38528 bytes.
2364 17:56:10.881661 smbios_write_tables: 76857000
2365 17:56:10.885217 EC returned error result code 3
2366 17:56:10.888136 Couldn't obtain OEM name from CBI
2367 17:56:10.891578 Create SMBIOS type 16
2368 17:56:10.891669 Create SMBIOS type 17
2369 17:56:10.895080 Create SMBIOS type 20
2370 17:56:10.898527 GENERIC: 0.0 (WIFI Device)
2371 17:56:10.901417 SMBIOS tables: 2156 bytes.
2372 17:56:10.904973 Writing table forward entry at 0x00000500
2373 17:56:10.911147 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2374 17:56:10.914599 Writing coreboot table at 0x76891000
2375 17:56:10.921102 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2376 17:56:10.924409 1. 0000000000001000-000000000009ffff: RAM
2377 17:56:10.931157 2. 00000000000a0000-00000000000fffff: RESERVED
2378 17:56:10.934987 3. 0000000000100000-0000000076856fff: RAM
2379 17:56:10.941138 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2380 17:56:10.944489 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2381 17:56:10.950794 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2382 17:56:10.954230 7. 0000000077000000-00000000803fffff: RESERVED
2383 17:56:10.961131 8. 00000000c0000000-00000000cfffffff: RESERVED
2384 17:56:10.964476 9. 00000000f8000000-00000000f9ffffff: RESERVED
2385 17:56:10.970934 10. 00000000fb000000-00000000fb000fff: RESERVED
2386 17:56:10.974329 11. 00000000fc800000-00000000fe7fffff: RESERVED
2387 17:56:10.980835 12. 00000000feb00000-00000000feb7ffff: RESERVED
2388 17:56:10.984456 13. 00000000fec00000-00000000fecfffff: RESERVED
2389 17:56:10.987396 14. 00000000fed40000-00000000fed6ffff: RESERVED
2390 17:56:10.994051 15. 00000000fed80000-00000000fed87fff: RESERVED
2391 17:56:10.997763 16. 00000000fed90000-00000000fed92fff: RESERVED
2392 17:56:11.004137 17. 00000000feda0000-00000000feda1fff: RESERVED
2393 17:56:11.007299 18. 00000000fedc0000-00000000feddffff: RESERVED
2394 17:56:11.014054 19. 0000000100000000-000000027fbfffff: RAM
2395 17:56:11.014139 Passing 4 GPIOs to payload:
2396 17:56:11.021060 NAME | PORT | POLARITY | VALUE
2397 17:56:11.027299 lid | undefined | high | high
2398 17:56:11.030863 power | undefined | high | low
2399 17:56:11.037141 oprom | undefined | high | low
2400 17:56:11.040459 EC in RW | 0x00000151 | high | high
2401 17:56:11.044053 Board ID: 3
2402 17:56:11.044154 FW config: 0x131
2403 17:56:11.050168 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 2007
2404 17:56:11.053618 coreboot table: 1788 bytes.
2405 17:56:11.057242 IMD ROOT 0. 0x76fff000 0x00001000
2406 17:56:11.060770 IMD SMALL 1. 0x76ffe000 0x00001000
2407 17:56:11.063453 FSP MEMORY 2. 0x76afe000 0x00500000
2408 17:56:11.066897 CONSOLE 3. 0x76ade000 0x00020000
2409 17:56:11.073295 RW MCACHE 4. 0x76add000 0x0000043c
2410 17:56:11.077179 RO MCACHE 5. 0x76adc000 0x00000fd8
2411 17:56:11.079971 FMAP 6. 0x76adb000 0x0000064a
2412 17:56:11.083259 TIME STAMP 7. 0x76ada000 0x00000910
2413 17:56:11.086894 VBOOT WORK 8. 0x76ac6000 0x00014000
2414 17:56:11.090163 MEM INFO 9. 0x76ac5000 0x000003b8
2415 17:56:11.093382 ROMSTG STCK10. 0x76ac4000 0x00001000
2416 17:56:11.096867 AFTER CAR 11. 0x76ab8000 0x0000c000
2417 17:56:11.103960 RAMSTAGE 12. 0x76a2e000 0x0008a000
2418 17:56:11.107188 ACPI BERT 13. 0x76a1e000 0x00010000
2419 17:56:11.110333 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2420 17:56:11.113438 REFCODE 15. 0x769ae000 0x0006f000
2421 17:56:11.117293 SMM BACKUP 16. 0x7699e000 0x00010000
2422 17:56:11.120413 IGD OPREGION17. 0x76999000 0x00004203
2423 17:56:11.123665 RAMOOPS 18. 0x76899000 0x00100000
2424 17:56:11.127307 COREBOOT 19. 0x76891000 0x00008000
2425 17:56:11.133936 ACPI 20. 0x7686d000 0x00024000
2426 17:56:11.137195 TPM2 TCGLOG21. 0x7685d000 0x00010000
2427 17:56:11.140640 PMC CRASHLOG22. 0x7685c000 0x00000c00
2428 17:56:11.144134 CPU CRASHLOG23. 0x76858000 0x00003480
2429 17:56:11.146896 SMBIOS 24. 0x76857000 0x00001000
2430 17:56:11.150379 IMD small region:
2431 17:56:11.153674 IMD ROOT 0. 0x76ffec00 0x00000400
2432 17:56:11.157204 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2433 17:56:11.160815 VPD 2. 0x76ffeb60 0x0000006c
2434 17:56:11.163475 POWER STATE 3. 0x76ffeb00 0x00000044
2435 17:56:11.170617 ROMSTAGE 4. 0x76ffeae0 0x00000004
2436 17:56:11.174096 ACPI GNVS 5. 0x76ffea80 0x00000048
2437 17:56:11.177446 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2438 17:56:11.183414 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2439 17:56:11.186893 MTRR: Physical address space:
2440 17:56:11.190388 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2441 17:56:11.197111 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2442 17:56:11.203697 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2443 17:56:11.210340 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2444 17:56:11.216919 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2445 17:56:11.223650 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2446 17:56:11.230964 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2447 17:56:11.233310 MTRR: Fixed MSR 0x250 0x0606060606060606
2448 17:56:11.236684 MTRR: Fixed MSR 0x258 0x0606060606060606
2449 17:56:11.240371 MTRR: Fixed MSR 0x259 0x0000000000000000
2450 17:56:11.246424 MTRR: Fixed MSR 0x268 0x0606060606060606
2451 17:56:11.249836 MTRR: Fixed MSR 0x269 0x0606060606060606
2452 17:56:11.253301 MTRR: Fixed MSR 0x26a 0x0606060606060606
2453 17:56:11.256519 MTRR: Fixed MSR 0x26b 0x0606060606060606
2454 17:56:11.263174 MTRR: Fixed MSR 0x26c 0x0606060606060606
2455 17:56:11.266747 MTRR: Fixed MSR 0x26d 0x0606060606060606
2456 17:56:11.270184 MTRR: Fixed MSR 0x26e 0x0606060606060606
2457 17:56:11.273582 MTRR: Fixed MSR 0x26f 0x0606060606060606
2458 17:56:11.277747 call enable_fixed_mtrr()
2459 17:56:11.281174 CPU physical address size: 39 bits
2460 17:56:11.287886 MTRR: default type WB/UC MTRR counts: 6/6.
2461 17:56:11.291247 MTRR: UC selected as default type.
2462 17:56:11.297384 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2463 17:56:11.301356 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2464 17:56:11.307523 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2465 17:56:11.314647 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2466 17:56:11.320646 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2467 17:56:11.327815 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2468 17:56:11.334359 MTRR: Fixed MSR 0x250 0x0606060606060606
2469 17:56:11.337726 MTRR: Fixed MSR 0x258 0x0606060606060606
2470 17:56:11.340611 MTRR: Fixed MSR 0x259 0x0000000000000000
2471 17:56:11.344038 MTRR: Fixed MSR 0x268 0x0606060606060606
2472 17:56:11.351026 MTRR: Fixed MSR 0x269 0x0606060606060606
2473 17:56:11.354200 MTRR: Fixed MSR 0x26a 0x0606060606060606
2474 17:56:11.357499 MTRR: Fixed MSR 0x26b 0x0606060606060606
2475 17:56:11.360886 MTRR: Fixed MSR 0x26c 0x0606060606060606
2476 17:56:11.367432 MTRR: Fixed MSR 0x26d 0x0606060606060606
2477 17:56:11.371018 MTRR: Fixed MSR 0x26e 0x0606060606060606
2478 17:56:11.374360 MTRR: Fixed MSR 0x26f 0x0606060606060606
2479 17:56:11.377039 MTRR: Fixed MSR 0x250 0x0606060606060606
2480 17:56:11.380347 call enable_fixed_mtrr()
2481 17:56:11.383692 MTRR: Fixed MSR 0x250 0x0606060606060606
2482 17:56:11.387179 MTRR: Fixed MSR 0x250 0x0606060606060606
2483 17:56:11.393953 CPU physical address size: 39 bits
2484 17:56:11.397207 MTRR: Fixed MSR 0x258 0x0606060606060606
2485 17:56:11.400495 MTRR: Fixed MSR 0x258 0x0606060606060606
2486 17:56:11.403577 MTRR: Fixed MSR 0x250 0x0606060606060606
2487 17:56:11.407241 MTRR: Fixed MSR 0x258 0x0606060606060606
2488 17:56:11.413672 MTRR: Fixed MSR 0x259 0x0000000000000000
2489 17:56:11.416800 MTRR: Fixed MSR 0x268 0x0606060606060606
2490 17:56:11.420635 MTRR: Fixed MSR 0x269 0x0606060606060606
2491 17:56:11.423896 MTRR: Fixed MSR 0x259 0x0000000000000000
2492 17:56:11.430160 MTRR: Fixed MSR 0x268 0x0606060606060606
2493 17:56:11.433979 MTRR: Fixed MSR 0x269 0x0606060606060606
2494 17:56:11.437141 MTRR: Fixed MSR 0x26a 0x0606060606060606
2495 17:56:11.440385 MTRR: Fixed MSR 0x26b 0x0606060606060606
2496 17:56:11.447026 MTRR: Fixed MSR 0x26c 0x0606060606060606
2497 17:56:11.450365 MTRR: Fixed MSR 0x26d 0x0606060606060606
2498 17:56:11.453914 MTRR: Fixed MSR 0x26e 0x0606060606060606
2499 17:56:11.457091 MTRR: Fixed MSR 0x26f 0x0606060606060606
2500 17:56:11.463297 MTRR: Fixed MSR 0x259 0x0000000000000000
2501 17:56:11.463387 call enable_fixed_mtrr()
2502 17:56:11.470152 MTRR: Fixed MSR 0x250 0x0606060606060606
2503 17:56:11.473400 MTRR: Fixed MSR 0x26a 0x0606060606060606
2504 17:56:11.476686 MTRR: Fixed MSR 0x268 0x0606060606060606
2505 17:56:11.480136 MTRR: Fixed MSR 0x269 0x0606060606060606
2506 17:56:11.483370 CPU physical address size: 39 bits
2507 17:56:11.490052 MTRR: Fixed MSR 0x26b 0x0606060606060606
2508 17:56:11.493362 MTRR: Fixed MSR 0x26a 0x0606060606060606
2509 17:56:11.497127 MTRR: Fixed MSR 0x250 0x0606060606060606
2510 17:56:11.499719 MTRR: Fixed MSR 0x258 0x0606060606060606
2511 17:56:11.503195 MTRR: Fixed MSR 0x259 0x0000000000000000
2512 17:56:11.510005 MTRR: Fixed MSR 0x268 0x0606060606060606
2513 17:56:11.513443 MTRR: Fixed MSR 0x269 0x0606060606060606
2514 17:56:11.516570 MTRR: Fixed MSR 0x26a 0x0606060606060606
2515 17:56:11.520296 MTRR: Fixed MSR 0x26b 0x0606060606060606
2516 17:56:11.526929 MTRR: Fixed MSR 0x26c 0x0606060606060606
2517 17:56:11.530007 MTRR: Fixed MSR 0x26d 0x0606060606060606
2518 17:56:11.533082 MTRR: Fixed MSR 0x26e 0x0606060606060606
2519 17:56:11.536703 MTRR: Fixed MSR 0x26f 0x0606060606060606
2520 17:56:11.543247 MTRR: Fixed MSR 0x26c 0x0606060606060606
2521 17:56:11.543345 call enable_fixed_mtrr()
2522 17:56:11.549603 MTRR: Fixed MSR 0x26b 0x0606060606060606
2523 17:56:11.553361 MTRR: Fixed MSR 0x258 0x0606060606060606
2524 17:56:11.556401 MTRR: Fixed MSR 0x26c 0x0606060606060606
2525 17:56:11.559894 MTRR: Fixed MSR 0x26d 0x0606060606060606
2526 17:56:11.566175 MTRR: Fixed MSR 0x26e 0x0606060606060606
2527 17:56:11.569507 MTRR: Fixed MSR 0x26f 0x0606060606060606
2528 17:56:11.572802 MTRR: Fixed MSR 0x26d 0x0606060606060606
2529 17:56:11.576232 call enable_fixed_mtrr()
2530 17:56:11.579941 CPU physical address size: 39 bits
2531 17:56:11.583285 MTRR: Fixed MSR 0x26e 0x0606060606060606
2532 17:56:11.586181 CPU physical address size: 39 bits
2533 17:56:11.589423 MTRR: Fixed MSR 0x26f 0x0606060606060606
2534 17:56:11.596085 MTRR: Fixed MSR 0x259 0x0000000000000000
2535 17:56:11.596171 call enable_fixed_mtrr()
2536 17:56:11.602647 MTRR: Fixed MSR 0x268 0x0606060606060606
2537 17:56:11.606095 MTRR: Fixed MSR 0x269 0x0606060606060606
2538 17:56:11.609643 CPU physical address size: 39 bits
2539 17:56:11.612874 MTRR: Fixed MSR 0x26a 0x0606060606060606
2540 17:56:11.616192 MTRR: Fixed MSR 0x258 0x0606060606060606
2541 17:56:11.623041 MTRR: Fixed MSR 0x26b 0x0606060606060606
2542 17:56:11.626186 MTRR: Fixed MSR 0x26c 0x0606060606060606
2543 17:56:11.629483 MTRR: Fixed MSR 0x26d 0x0606060606060606
2544 17:56:11.632659 MTRR: Fixed MSR 0x26e 0x0606060606060606
2545 17:56:11.636390 MTRR: Fixed MSR 0x26f 0x0606060606060606
2546 17:56:11.642949 MTRR: Fixed MSR 0x259 0x0000000000000000
2547 17:56:11.645967 call enable_fixed_mtrr()
2548 17:56:11.649156 MTRR: Fixed MSR 0x268 0x0606060606060606
2549 17:56:11.652704 MTRR: Fixed MSR 0x269 0x0606060606060606
2550 17:56:11.656103 CPU physical address size: 39 bits
2551 17:56:11.660048 MTRR: Fixed MSR 0x26a 0x0606060606060606
2552 17:56:11.666883 MTRR: Fixed MSR 0x26b 0x0606060606060606
2553 17:56:11.670096 MTRR: Fixed MSR 0x26c 0x0606060606060606
2554 17:56:11.673312 MTRR: Fixed MSR 0x26d 0x0606060606060606
2555 17:56:11.676481 MTRR: Fixed MSR 0x26e 0x0606060606060606
2556 17:56:11.683432 MTRR: Fixed MSR 0x26f 0x0606060606060606
2557 17:56:11.686754 call enable_fixed_mtrr()
2558 17:56:11.690183 CPU physical address size: 39 bits
2559 17:56:11.690284
2560 17:56:11.693538 MTRR check
2561 17:56:11.696955 Fixed MTRRs : Enabled
2562 17:56:11.697053 Variable MTRRs: Enabled
2563 17:56:11.697141
2564 17:56:11.703633 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2565 17:56:11.706378 Checking cr50 for pending updates
2566 17:56:11.718518 Reading cr50 TPM mode
2567 17:56:11.733630 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2568 17:56:11.743406 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2569 17:56:11.747327 Checking segment from ROM address 0xf96cbe6c
2570 17:56:11.749987 Checking segment from ROM address 0xf96cbe88
2571 17:56:11.756915 Loading segment from ROM address 0xf96cbe6c
2572 17:56:11.757032 code (compression=1)
2573 17:56:11.766959 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2574 17:56:11.773779 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2575 17:56:11.776981 using LZMA
2576 17:56:11.800024 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2577 17:56:11.806164 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2578 17:56:11.814572 Loading segment from ROM address 0xf96cbe88
2579 17:56:11.817984 Entry Point 0x30000000
2580 17:56:11.818088 Loaded segments
2581 17:56:11.824893 BS: BS_PAYLOAD_LOAD run times (exec / console): 22 / 62 ms
2582 17:56:11.831357 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2583 17:56:11.834711 Finalizing chipset.
2584 17:56:11.834786 apm_control: Finalizing SMM.
2585 17:56:11.838058 APMC done.
2586 17:56:11.841472 HECI: CSE device 16.1 is disabled
2587 17:56:11.844820 HECI: CSE device 16.2 is disabled
2588 17:56:11.848037 HECI: CSE device 16.3 is disabled
2589 17:56:11.851247 HECI: CSE device 16.4 is disabled
2590 17:56:11.855182 HECI: CSE device 16.5 is disabled
2591 17:56:11.857839 HECI: Sending End-of-Post
2592 17:56:11.866323 CSE: EOP requested action: continue boot
2593 17:56:11.869290 CSE EOP successful, continuing boot
2594 17:56:11.875881 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2595 17:56:11.879275 mp_park_aps done after 0 msecs.
2596 17:56:11.883322 Jumping to boot code at 0x30000000(0x76891000)
2597 17:56:11.892634 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2598 17:56:11.897187
2599 17:56:11.897273
2600 17:56:11.897337
2601 17:56:11.900180 Starting depthcharge on Volmar...
2602 17:56:11.900295
2603 17:56:11.900741 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2604 17:56:11.900854 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2605 17:56:11.900948 Setting prompt string to ['brya:']
2606 17:56:11.901025 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:40)
2607 17:56:11.906765 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2608 17:56:11.906847
2609 17:56:11.913942 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2610 17:56:11.914024
2611 17:56:11.920037 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2612 17:56:11.920117
2613 17:56:11.923424 configure_storage: Failed to remap 1C:2
2614 17:56:11.923510
2615 17:56:11.923573 Wipe memory regions:
2616 17:56:11.926775
2617 17:56:11.930201 [0x00000000001000, 0x000000000a0000)
2618 17:56:11.930280
2619 17:56:11.933615 [0x00000000100000, 0x00000030000000)
2620 17:56:12.043145
2621 17:56:12.046654 [0x00000032668e60, 0x00000076857000)
2622 17:56:12.198526
2623 17:56:12.201423 [0x00000100000000, 0x0000027fc00000)
2624 17:56:13.058535
2625 17:56:13.062067 ec_init: CrosEC protocol v3 supported (256, 256)
2626 17:56:13.671103
2627 17:56:13.671240 R8152: Initializing
2628 17:56:13.671316
2629 17:56:13.674459 Version 9 (ocp_data = 6010)
2630 17:56:13.674546
2631 17:56:13.677674 R8152: Done initializing
2632 17:56:13.677801
2633 17:56:13.681114 Adding net device
2634 17:56:13.982363
2635 17:56:13.985390 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2636 17:56:13.985521
2637 17:56:13.985589
2638 17:56:13.985865 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2640 17:56:14.086337 brya: tftpboot 192.168.201.1 13871405/tftp-deploy-vowyw23d/kernel/bzImage 13871405/tftp-deploy-vowyw23d/kernel/cmdline 13871405/tftp-deploy-vowyw23d/ramdisk/ramdisk.cpio.gz
2641 17:56:14.086527 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2642 17:56:14.086654 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2643 17:56:14.091607 tftpboot 192.168.201.1 13871405/tftp-deploy-vowyw23d/kernel/bzImploy-vowyw23d/kernel/cmdline 13871405/tftp-deploy-vowyw23d/ramdisk/ramdisk.cpio.gz
2644 17:56:14.091707
2645 17:56:14.091774 Waiting for link
2646 17:56:14.294207
2647 17:56:14.294369 done.
2648 17:56:14.294467
2649 17:56:14.294538 MAC: 00:e0:4c:68:02:37
2650 17:56:14.294598
2651 17:56:14.297447 Sending DHCP discover... done.
2652 17:56:14.297542
2653 17:56:14.300234 Waiting for reply... done.
2654 17:56:14.300318
2655 17:56:14.303620 Sending DHCP request... done.
2656 17:56:14.303706
2657 17:56:14.307015 Waiting for reply... done.
2658 17:56:14.307129
2659 17:56:14.310490 My ip is 192.168.201.15
2660 17:56:14.310662
2661 17:56:14.313803 The DHCP server ip is 192.168.201.1
2662 17:56:14.313943
2663 17:56:14.317167 TFTP server IP predefined by user: 192.168.201.1
2664 17:56:14.317305
2665 17:56:14.323356 Bootfile predefined by user: 13871405/tftp-deploy-vowyw23d/kernel/bzImage
2666 17:56:14.323469
2667 17:56:14.327068 Sending tftp read request... done.
2668 17:56:14.327178
2669 17:56:14.334096 Waiting for the transfer...
2670 17:56:14.334187
2671 17:56:14.583393 00000000 ################################################################
2672 17:56:14.583535
2673 17:56:14.835663 00080000 ################################################################
2674 17:56:14.835825
2675 17:56:15.099095 00100000 ################################################################
2676 17:56:15.099225
2677 17:56:15.365127 00180000 ################################################################
2678 17:56:15.365290
2679 17:56:15.632528 00200000 ################################################################
2680 17:56:15.632662
2681 17:56:15.903202 00280000 ################################################################
2682 17:56:15.903338
2683 17:56:16.164648 00300000 ################################################################
2684 17:56:16.164785
2685 17:56:16.419043 00380000 ################################################################
2686 17:56:16.419203
2687 17:56:16.675407 00400000 ################################################################
2688 17:56:16.675547
2689 17:56:16.932466 00480000 ################################################################
2690 17:56:16.932598
2691 17:56:17.190399 00500000 ################################################################
2692 17:56:17.190533
2693 17:56:17.451985 00580000 ################################################################
2694 17:56:17.452115
2695 17:56:17.726394 00600000 ################################################################
2696 17:56:17.726561
2697 17:56:17.989091 00680000 ################################################################
2698 17:56:17.989255
2699 17:56:18.253234 00700000 ################################################################
2700 17:56:18.253396
2701 17:56:18.519016 00780000 ################################################################
2702 17:56:18.519178
2703 17:56:18.792291 00800000 ################################################################
2704 17:56:18.792427
2705 17:56:19.060011 00880000 ################################################################
2706 17:56:19.060150
2707 17:56:19.324679 00900000 ################################################################
2708 17:56:19.324824
2709 17:56:19.582146 00980000 ################################################################
2710 17:56:19.582336
2711 17:56:19.849791 00a00000 ################################################################
2712 17:56:19.849930
2713 17:56:20.114026 00a80000 ################################################################
2714 17:56:20.114228
2715 17:56:20.376867 00b00000 ################################################################
2716 17:56:20.377012
2717 17:56:20.648788 00b80000 ################################################################
2718 17:56:20.648953
2719 17:56:20.905437 00c00000 ################################################################
2720 17:56:20.905609
2721 17:56:21.166650 00c80000 ################################################################
2722 17:56:21.166818
2723 17:56:21.420571 00d00000 ################################################################
2724 17:56:21.420713
2725 17:56:21.677784 00d80000 ################################################################
2726 17:56:21.677933
2727 17:56:21.932910 00e00000 ################################################################
2728 17:56:21.933051
2729 17:56:22.180014 00e80000 ################################################################
2730 17:56:22.180175
2731 17:56:22.429584 00f00000 ################################################################
2732 17:56:22.429747
2733 17:56:22.677666 00f80000 ################################################################
2734 17:56:22.677835
2735 17:56:22.925736 01000000 ################################################################
2736 17:56:22.925916
2737 17:56:23.178533 01080000 ################################################################
2738 17:56:23.178703
2739 17:56:23.427380 01100000 ################################################################
2740 17:56:23.427537
2741 17:56:23.675987 01180000 ################################################################
2742 17:56:23.676163
2743 17:56:23.930046 01200000 ################################################################
2744 17:56:23.930209
2745 17:56:24.178334 01280000 ################################################################
2746 17:56:24.178500
2747 17:56:24.434452 01300000 ################################################################
2748 17:56:24.434603
2749 17:56:24.692222 01380000 ################################################################
2750 17:56:24.692372
2751 17:56:24.944602 01400000 ################################################################
2752 17:56:24.944759
2753 17:56:25.194554 01480000 ################################################################
2754 17:56:25.194716
2755 17:56:25.441184 01500000 ################################################################
2756 17:56:25.441356
2757 17:56:25.511562 01580000 ################### done.
2758 17:56:25.511690
2759 17:56:25.514769 The bootfile was 22695360 bytes long.
2760 17:56:25.514848
2761 17:56:25.517950 Sending tftp read request... done.
2762 17:56:25.518030
2763 17:56:25.521387 Waiting for the transfer...
2764 17:56:25.521493
2765 17:56:25.773634 00000000 ################################################################
2766 17:56:25.773797
2767 17:56:26.021935 00080000 ################################################################
2768 17:56:26.022069
2769 17:56:26.271679 00100000 ################################################################
2770 17:56:26.271844
2771 17:56:26.521215 00180000 ################################################################
2772 17:56:26.521411
2773 17:56:26.770103 00200000 ################################################################
2774 17:56:26.770259
2775 17:56:27.017643 00280000 ################################################################
2776 17:56:27.017819
2777 17:56:27.265483 00300000 ################################################################
2778 17:56:27.265634
2779 17:56:27.514222 00380000 ################################################################
2780 17:56:27.514409
2781 17:56:27.764529 00400000 ################################################################
2782 17:56:27.764690
2783 17:56:28.013400 00480000 ################################################################
2784 17:56:28.013573
2785 17:56:28.262989 00500000 ################################################################
2786 17:56:28.263165
2787 17:56:28.517881 00580000 ################################################################
2788 17:56:28.518012
2789 17:56:28.764135 00600000 ################################################################
2790 17:56:28.764281
2791 17:56:29.014326 00680000 ################################################################
2792 17:56:29.014497
2793 17:56:29.270798 00700000 ################################################################
2794 17:56:29.270973
2795 17:56:29.526716 00780000 ################################################################
2796 17:56:29.526849
2797 17:56:29.778477 00800000 ################################################################
2798 17:56:29.778641
2799 17:56:30.031640 00880000 ################################################################
2800 17:56:30.031770
2801 17:56:30.283495 00900000 ################################################################
2802 17:56:30.283627
2803 17:56:30.534652 00980000 ################################################################
2804 17:56:30.534784
2805 17:56:30.785094 00a00000 ################################################################
2806 17:56:30.785234
2807 17:56:31.033071 00a80000 ################################################################
2808 17:56:31.033232
2809 17:56:31.285688 00b00000 ################################################################
2810 17:56:31.285846
2811 17:56:31.538540 00b80000 ################################################################
2812 17:56:31.538674
2813 17:56:31.788747 00c00000 ################################################################
2814 17:56:31.788913
2815 17:56:32.036558 00c80000 ################################################################
2816 17:56:32.036721
2817 17:56:32.286702 00d00000 ################################################################
2818 17:56:32.286863
2819 17:56:32.534518 00d80000 ################################################################
2820 17:56:32.534659
2821 17:56:32.578449 00e00000 ############ done.
2822 17:56:32.578567
2823 17:56:32.582048 Sending tftp read request... done.
2824 17:56:32.582149
2825 17:56:32.585272 Waiting for the transfer...
2826 17:56:32.585353
2827 17:56:32.588468 00000000 # done.
2828 17:56:32.588568
2829 17:56:32.595435 Command line loaded dynamically from TFTP file: 13871405/tftp-deploy-vowyw23d/kernel/cmdline
2830 17:56:32.595526
2831 17:56:32.611810 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2832 17:56:32.619439
2833 17:56:32.622762 Shutting down all USB controllers.
2834 17:56:32.622867
2835 17:56:32.622934 Removing current net device
2836 17:56:32.622996
2837 17:56:32.625723 Finalizing coreboot
2838 17:56:32.625807
2839 17:56:32.632701 Exiting depthcharge with code 4 at timestamp: 30962719
2840 17:56:32.632798
2841 17:56:32.632891
2842 17:56:32.632971 Starting kernel ...
2843 17:56:32.633047
2844 17:56:32.633123
2845 17:56:32.634021 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2846 17:56:32.634153 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2847 17:56:32.634269 Setting prompt string to ['Linux version [0-9]']
2848 17:56:32.634375 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2849 17:56:32.634487 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2851 18:00:52.635060 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2853 18:00:52.636786 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2855 18:00:52.638227 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2858 18:00:52.640374 end: 2 depthcharge-action (duration 00:05:00) [common]
2860 18:00:52.641614 Cleaning after the job
2861 18:00:52.642099 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13871405/tftp-deploy-vowyw23d/ramdisk
2862 18:00:52.649893 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13871405/tftp-deploy-vowyw23d/kernel
2863 18:00:52.660784 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13871405/tftp-deploy-vowyw23d/modules
2864 18:00:52.670471 start: 4.1 power-off (timeout 00:00:30) [common]
2865 18:00:52.670888 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-7', '--port=1', '--command=off']
2866 18:00:52.768203 >> Command sent successfully.
2867 18:00:52.771802 Returned 0 in 0 seconds
2868 18:00:52.872606 end: 4.1 power-off (duration 00:00:00) [common]
2870 18:00:52.874061 start: 4.2 read-feedback (timeout 00:10:00) [common]
2871 18:00:52.875346 Listened to connection for namespace 'common' for up to 1s
2873 18:00:52.876775 Listened to connection for namespace 'common' for up to 1s
2874 18:00:53.875722 Finalising connection for namespace 'common'
2875 18:00:53.876345 Disconnecting from shell: Finalise
2876 18:00:53.876737
2877 18:00:53.977742 end: 4.2 read-feedback (duration 00:00:01) [common]
2878 18:00:53.978334 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13871405
2879 18:00:54.038917 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13871405
2880 18:00:54.039112 JobError: Your job cannot terminate cleanly.