Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 17:37:01.359036 lava-dispatcher, installed at version: 2024.03
2 17:37:01.359259 start: 0 validate
3 17:37:01.359435 Start time: 2024-05-17 17:37:01.359419+00:00 (UTC)
4 17:37:01.359629 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:37:01.359783 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 17:37:01.619464 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:37:01.619650 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.216-cip47-111-gec7251db09977%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:37:01.880549 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:37:01.880737 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:37:10.276787 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:37:10.276961 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.216-cip47-111-gec7251db09977%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 17:37:10.536218 validate duration: 9.18
14 17:37:10.536483 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:37:10.536591 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:37:10.536688 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:37:10.536815 Not decompressing ramdisk as can be used compressed.
18 17:37:10.536914 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/initrd.cpio.gz
19 17:37:10.537011 saving as /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/ramdisk/initrd.cpio.gz
20 17:37:10.537077 total size: 6137763 (5 MB)
21 17:37:11.441632 progress 0 % (0 MB)
22 17:37:11.444494 progress 5 % (0 MB)
23 17:37:11.446936 progress 10 % (0 MB)
24 17:37:11.449760 progress 15 % (0 MB)
25 17:37:11.452270 progress 20 % (1 MB)
26 17:37:11.454771 progress 25 % (1 MB)
27 17:37:11.457641 progress 30 % (1 MB)
28 17:37:11.460180 progress 35 % (2 MB)
29 17:37:11.462647 progress 40 % (2 MB)
30 17:37:11.465462 progress 45 % (2 MB)
31 17:37:11.467984 progress 50 % (2 MB)
32 17:37:11.470724 progress 55 % (3 MB)
33 17:37:11.473292 progress 60 % (3 MB)
34 17:37:11.475881 progress 65 % (3 MB)
35 17:37:11.478548 progress 70 % (4 MB)
36 17:37:11.480474 progress 75 % (4 MB)
37 17:37:11.482110 progress 80 % (4 MB)
38 17:37:11.484074 progress 85 % (5 MB)
39 17:37:11.485700 progress 90 % (5 MB)
40 17:37:11.487283 progress 95 % (5 MB)
41 17:37:11.489038 progress 100 % (5 MB)
42 17:37:11.489182 5 MB downloaded in 0.95 s (6.15 MB/s)
43 17:37:11.489333 end: 1.1.1 http-download (duration 00:00:01) [common]
45 17:37:11.489580 end: 1.1 download-retry (duration 00:00:01) [common]
46 17:37:11.489847 start: 1.2 download-retry (timeout 00:09:59) [common]
47 17:37:11.489975 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 17:37:11.490117 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.216-cip47-111-gec7251db09977/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 17:37:11.490188 saving as /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/kernel/bzImage
50 17:37:11.490268 total size: 19680224 (18 MB)
51 17:37:11.490333 No compression specified
52 17:37:11.491893 progress 0 % (0 MB)
53 17:37:11.497280 progress 5 % (0 MB)
54 17:37:11.502667 progress 10 % (1 MB)
55 17:37:11.508014 progress 15 % (2 MB)
56 17:37:11.513166 progress 20 % (3 MB)
57 17:37:11.518917 progress 25 % (4 MB)
58 17:37:11.524306 progress 30 % (5 MB)
59 17:37:11.529739 progress 35 % (6 MB)
60 17:37:11.535352 progress 40 % (7 MB)
61 17:37:11.540715 progress 45 % (8 MB)
62 17:37:11.546184 progress 50 % (9 MB)
63 17:37:11.551688 progress 55 % (10 MB)
64 17:37:11.557205 progress 60 % (11 MB)
65 17:37:11.562453 progress 65 % (12 MB)
66 17:37:11.567654 progress 70 % (13 MB)
67 17:37:11.572781 progress 75 % (14 MB)
68 17:37:11.578205 progress 80 % (15 MB)
69 17:37:11.583682 progress 85 % (15 MB)
70 17:37:11.589148 progress 90 % (16 MB)
71 17:37:11.594590 progress 95 % (17 MB)
72 17:37:11.599986 progress 100 % (18 MB)
73 17:37:11.600220 18 MB downloaded in 0.11 s (170.71 MB/s)
74 17:37:11.600394 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:37:11.600645 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:37:11.600737 start: 1.3 download-retry (timeout 00:09:59) [common]
78 17:37:11.600824 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 17:37:11.600984 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/full.rootfs.tar.xz
80 17:37:11.601055 saving as /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/nfsrootfs/full.rootfs.tar
81 17:37:11.601133 total size: 58462052 (55 MB)
82 17:37:11.601200 Using unxz to decompress xz
83 17:37:11.606405 progress 0 % (0 MB)
84 17:37:11.771120 progress 5 % (2 MB)
85 17:37:11.944620 progress 10 % (5 MB)
86 17:37:12.116181 progress 15 % (8 MB)
87 17:37:12.254285 progress 20 % (11 MB)
88 17:37:12.415468 progress 25 % (13 MB)
89 17:37:12.589298 progress 30 % (16 MB)
90 17:37:12.714031 progress 35 % (19 MB)
91 17:37:12.782072 progress 40 % (22 MB)
92 17:37:12.942761 progress 45 % (25 MB)
93 17:37:13.123518 progress 50 % (27 MB)
94 17:37:13.279872 progress 55 % (30 MB)
95 17:37:13.442657 progress 60 % (33 MB)
96 17:37:13.605578 progress 65 % (36 MB)
97 17:37:13.774739 progress 70 % (39 MB)
98 17:37:13.985927 progress 75 % (41 MB)
99 17:37:14.142692 progress 80 % (44 MB)
100 17:37:14.298485 progress 85 % (47 MB)
101 17:37:14.478096 progress 90 % (50 MB)
102 17:37:14.656488 progress 95 % (52 MB)
103 17:37:14.834104 progress 100 % (55 MB)
104 17:37:14.839001 55 MB downloaded in 3.24 s (17.22 MB/s)
105 17:37:14.839348 end: 1.3.1 http-download (duration 00:00:03) [common]
107 17:37:14.839762 end: 1.3 download-retry (duration 00:00:03) [common]
108 17:37:14.839897 start: 1.4 download-retry (timeout 00:09:56) [common]
109 17:37:14.840027 start: 1.4.1 http-download (timeout 00:09:56) [common]
110 17:37:14.840243 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.216-cip47-111-gec7251db09977/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 17:37:14.840357 saving as /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/modules/modules.tar
112 17:37:14.840455 total size: 1158952 (1 MB)
113 17:37:14.840556 Using unxz to decompress xz
114 17:37:14.845945 progress 2 % (0 MB)
115 17:37:14.846806 progress 8 % (0 MB)
116 17:37:14.850583 progress 14 % (0 MB)
117 17:37:14.854629 progress 19 % (0 MB)
118 17:37:14.858564 progress 25 % (0 MB)
119 17:37:14.862321 progress 31 % (0 MB)
120 17:37:14.866692 progress 36 % (0 MB)
121 17:37:14.870190 progress 42 % (0 MB)
122 17:37:14.875027 progress 48 % (0 MB)
123 17:37:14.878624 progress 53 % (0 MB)
124 17:37:14.882640 progress 59 % (0 MB)
125 17:37:14.886560 progress 65 % (0 MB)
126 17:37:14.891344 progress 70 % (0 MB)
127 17:37:14.895845 progress 76 % (0 MB)
128 17:37:14.900251 progress 81 % (0 MB)
129 17:37:14.904378 progress 87 % (0 MB)
130 17:37:14.908766 progress 93 % (1 MB)
131 17:37:14.913261 progress 98 % (1 MB)
132 17:37:14.920520 1 MB downloaded in 0.08 s (13.81 MB/s)
133 17:37:14.920993 end: 1.4.1 http-download (duration 00:00:00) [common]
135 17:37:14.921423 end: 1.4 download-retry (duration 00:00:00) [common]
136 17:37:14.921563 start: 1.5 prepare-tftp-overlay (timeout 00:09:56) [common]
137 17:37:14.921702 start: 1.5.1 extract-nfsrootfs (timeout 00:09:56) [common]
138 17:37:16.189426 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13870248/extract-nfsrootfs-smnfhotz
139 17:37:16.189631 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
140 17:37:16.189737 start: 1.5.2 lava-overlay (timeout 00:09:54) [common]
141 17:37:16.189917 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1
142 17:37:16.190068 makedir: /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin
143 17:37:16.190179 makedir: /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/tests
144 17:37:16.190281 makedir: /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/results
145 17:37:16.190386 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-add-keys
146 17:37:16.190536 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-add-sources
147 17:37:16.190672 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-background-process-start
148 17:37:16.190801 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-background-process-stop
149 17:37:16.190933 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-common-functions
150 17:37:16.191059 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-echo-ipv4
151 17:37:16.191190 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-install-packages
152 17:37:16.191361 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-installed-packages
153 17:37:16.191629 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-os-build
154 17:37:16.191826 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-probe-channel
155 17:37:16.191998 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-probe-ip
156 17:37:16.192170 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-target-ip
157 17:37:16.192339 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-target-mac
158 17:37:16.192498 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-target-storage
159 17:37:16.192665 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-test-case
160 17:37:16.192832 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-test-event
161 17:37:16.192991 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-test-feedback
162 17:37:16.193154 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-test-raise
163 17:37:16.193282 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-test-reference
164 17:37:16.193408 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-test-runner
165 17:37:16.193533 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-test-set
166 17:37:16.193657 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-test-shell
167 17:37:16.193783 Updating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-install-packages (oe)
168 17:37:16.193938 Updating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/bin/lava-installed-packages (oe)
169 17:37:16.194062 Creating /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/environment
170 17:37:16.194159 LAVA metadata
171 17:37:16.194232 - LAVA_JOB_ID=13870248
172 17:37:16.194296 - LAVA_DISPATCHER_IP=192.168.201.1
173 17:37:16.194408 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:54) [common]
174 17:37:16.194477 skipped lava-vland-overlay
175 17:37:16.194553 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 17:37:16.194649 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:54) [common]
177 17:37:16.194728 skipped lava-multinode-overlay
178 17:37:16.194822 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 17:37:16.194933 start: 1.5.2.3 test-definition (timeout 00:09:54) [common]
180 17:37:16.195037 Loading test definitions
181 17:37:16.195162 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:54) [common]
182 17:37:16.195293 Using /lava-13870248 at stage 0
183 17:37:16.195650 uuid=13870248_1.5.2.3.1 testdef=None
184 17:37:16.195741 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 17:37:16.195858 start: 1.5.2.3.2 test-overlay (timeout 00:09:54) [common]
186 17:37:16.196467 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 17:37:16.196738 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:54) [common]
189 17:37:16.197385 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 17:37:16.197612 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:54) [common]
192 17:37:16.198190 runner path: /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/0/tests/0_wifi-basic test_uuid 13870248_1.5.2.3.1
193 17:37:16.198349 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 17:37:16.198551 Creating lava-test-runner.conf files
196 17:37:16.198613 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13870248/lava-overlay-5a9xwhb1/lava-13870248/0 for stage 0
197 17:37:16.198718 - 0_wifi-basic
198 17:37:16.198830 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 17:37:16.198915 start: 1.5.2.4 compress-overlay (timeout 00:09:54) [common]
200 17:37:16.205739 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 17:37:16.205871 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:54) [common]
202 17:37:16.205958 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 17:37:16.206065 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 17:37:16.206152 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:54) [common]
205 17:37:16.360128 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 17:37:16.360490 start: 1.5.4 extract-modules (timeout 00:09:54) [common]
207 17:37:16.360606 extracting modules file /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13870248/extract-nfsrootfs-smnfhotz
208 17:37:16.389951 extracting modules file /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13870248/extract-overlay-ramdisk-0a0rn6ys/ramdisk
209 17:37:16.419903 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 17:37:16.420065 start: 1.5.5 apply-overlay-tftp (timeout 00:09:54) [common]
211 17:37:16.420162 [common] Applying overlay to NFS
212 17:37:16.420230 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13870248/compress-overlay-pd9pb_e1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13870248/extract-nfsrootfs-smnfhotz
213 17:37:16.427154 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 17:37:16.427302 start: 1.5.6 configure-preseed-file (timeout 00:09:54) [common]
215 17:37:16.427399 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 17:37:16.427529 start: 1.5.7 compress-ramdisk (timeout 00:09:54) [common]
217 17:37:16.427611 Building ramdisk /var/lib/lava/dispatcher/tmp/13870248/extract-overlay-ramdisk-0a0rn6ys/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13870248/extract-overlay-ramdisk-0a0rn6ys/ramdisk
218 17:37:16.524694 >> 42075 blocks
219 17:37:17.329195 rename /var/lib/lava/dispatcher/tmp/13870248/extract-overlay-ramdisk-0a0rn6ys/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/ramdisk/ramdisk.cpio.gz
220 17:37:17.329614 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 17:37:17.329737 start: 1.5.8 prepare-kernel (timeout 00:09:53) [common]
222 17:37:17.329834 start: 1.5.8.1 prepare-fit (timeout 00:09:53) [common]
223 17:37:17.329927 No mkimage arch provided, not using FIT.
224 17:37:17.330015 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 17:37:17.330100 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 17:37:17.330201 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 17:37:17.330297 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:53) [common]
228 17:37:17.330380 No LXC device requested
229 17:37:17.330474 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 17:37:17.330574 start: 1.7 deploy-device-env (timeout 00:09:53) [common]
231 17:37:17.330658 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 17:37:17.330728 Checking files for TFTP limit of 4294967296 bytes.
233 17:37:17.331219 end: 1 tftp-deploy (duration 00:00:07) [common]
234 17:37:17.331353 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 17:37:17.331486 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 17:37:17.331653 substitutions:
237 17:37:17.331748 - {DTB}: None
238 17:37:17.331838 - {INITRD}: 13870248/tftp-deploy-f_zmn6zu/ramdisk/ramdisk.cpio.gz
239 17:37:17.331926 - {KERNEL}: 13870248/tftp-deploy-f_zmn6zu/kernel/bzImage
240 17:37:17.332012 - {LAVA_MAC}: None
241 17:37:17.332096 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13870248/extract-nfsrootfs-smnfhotz
242 17:37:17.332181 - {NFS_SERVER_IP}: 192.168.201.1
243 17:37:17.332264 - {PRESEED_CONFIG}: None
244 17:37:17.332347 - {PRESEED_LOCAL}: None
245 17:37:17.332430 - {RAMDISK}: 13870248/tftp-deploy-f_zmn6zu/ramdisk/ramdisk.cpio.gz
246 17:37:17.332513 - {ROOT_PART}: None
247 17:37:17.332597 - {ROOT}: None
248 17:37:17.332680 - {SERVER_IP}: 192.168.201.1
249 17:37:17.332763 - {TEE}: None
250 17:37:17.332846 Parsed boot commands:
251 17:37:17.332930 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 17:37:17.333152 Parsed boot commands: tftpboot 192.168.201.1 13870248/tftp-deploy-f_zmn6zu/kernel/bzImage 13870248/tftp-deploy-f_zmn6zu/kernel/cmdline 13870248/tftp-deploy-f_zmn6zu/ramdisk/ramdisk.cpio.gz
253 17:37:17.333270 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 17:37:17.333385 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 17:37:17.333507 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 17:37:17.333625 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 17:37:17.333722 Not connected, no need to disconnect.
258 17:37:17.333827 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 17:37:17.333938 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 17:37:17.334035 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-7'
261 17:37:17.337764 Setting prompt string to ['lava-test: # ']
262 17:37:17.338122 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 17:37:17.338245 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 17:37:17.338400 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 17:37:17.338549 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 17:37:17.338888 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-7', '--port=1', '--command=reboot']
267 17:37:22.474203 >> Command sent successfully.
268 17:37:22.476671 Returned 0 in 5 seconds
269 17:37:22.577053 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
271 17:37:22.577408 end: 2.2.2 reset-device (duration 00:00:05) [common]
272 17:37:22.577552 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
273 17:37:22.577641 Setting prompt string to 'Starting depthcharge on Volmar...'
274 17:37:22.577719 Changing prompt to 'Starting depthcharge on Volmar...'
275 17:37:22.577788 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
276 17:37:22.578171 [Enter `^Ec?' for help]
277 17:37:23.955801
278 17:37:23.955946
279 17:37:23.962705 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
280 17:37:23.965680 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
281 17:37:23.972503 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
282 17:37:23.975717 CPU: AES supported, TXT NOT supported, VT supported
283 17:37:23.986721 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
284 17:37:23.986872 Cache size = 10 MiB
285 17:37:23.990542 MCH: device id 4609 (rev 04) is Alderlake-P
286 17:37:23.998008 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
287 17:37:24.001101 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
288 17:37:24.004858 VBOOT: Loading verstage.
289 17:37:24.008810 FMAP: Found "FLASH" version 1.1 at 0x1804000.
290 17:37:24.012009 FMAP: base = 0x0 size = 0x2000000 #areas = 37
291 17:37:24.018773 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
292 17:37:24.025483 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
293 17:37:24.035010 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
294 17:37:24.035155
295 17:37:24.035260
296 17:37:24.042638 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
297 17:37:24.050741 Probing TPM I2C: I2C bus 1 version 0x3230302a
298 17:37:24.053752 DW I2C bus 1 at 0xfe022000 (400 KHz)
299 17:37:24.057486 I2C TX abort detected (00000001)
300 17:37:24.060762 cr50_i2c_read: Address write failed
301 17:37:24.071937 .done! DID_VID 0x00281ae0
302 17:37:24.075613 TPM ready after 0 ms
303 17:37:24.078864 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
304 17:37:24.092117 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
305 17:37:24.096210 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 17:37:24.150159 tlcl_send_startup: Startup return code is 0
307 17:37:24.150333 TPM: setup succeeded
308 17:37:24.172293 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 17:37:24.193586 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 17:37:24.197888 Chrome EC: UHEPI supported
311 17:37:24.200778 Reading cr50 boot mode
312 17:37:24.215778 Cr50 says boot_mode is VERIFIED_RW(0x00).
313 17:37:24.215879 Phase 1
314 17:37:24.222503 FMAP: area GBB found @ 1805000 (458752 bytes)
315 17:37:24.228987 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 17:37:24.235866 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 17:37:24.242337 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
318 17:37:24.242430 Phase 2
319 17:37:24.245794 Phase 3
320 17:37:24.249345 FMAP: area GBB found @ 1805000 (458752 bytes)
321 17:37:24.255679 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
322 17:37:24.258910 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
323 17:37:24.266041 VB2:vb2_verify_keyblock() Checking keyblock signature...
324 17:37:24.272274 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
325 17:37:24.279274 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
326 17:37:24.288965 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
327 17:37:24.300590 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
328 17:37:24.304205 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
329 17:37:24.311156 VB2:vb2_verify_fw_preamble() Verifying preamble.
330 17:37:24.317422 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
331 17:37:24.324251 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
332 17:37:24.330942 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
333 17:37:24.334722 Phase 4
334 17:37:24.337935 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
335 17:37:24.344792 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
336 17:37:24.557010 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
337 17:37:24.564365 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
338 17:37:24.567264 Saving vboot hash.
339 17:37:24.574222 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
340 17:37:24.590032 tlcl_extend: response is 0
341 17:37:24.596532 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
342 17:37:24.599842 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
343 17:37:24.618175 tlcl_extend: response is 0
344 17:37:24.624894 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
345 17:37:24.643842 tlcl_lock_nv_write: response is 0
346 17:37:24.663306 tlcl_lock_nv_write: response is 0
347 17:37:24.663533 Slot A is selected
348 17:37:24.670050 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
349 17:37:24.676469 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
350 17:37:24.683155 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
351 17:37:24.689976 BS: verstage times (exec / console): total (unknown) / 264 ms
352 17:37:24.690069
353 17:37:24.690141
354 17:37:24.696382 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
355 17:37:24.701513 Google Chrome EC: version:
356 17:37:24.705074 ro: volmar_v2.0.14126-e605144e9c
357 17:37:24.707920 rw: volmar_v0.0.55-22d1557
358 17:37:24.711666 running image: 2
359 17:37:24.714709 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
360 17:37:24.724674 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 17:37:24.731189 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 17:37:24.738428 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
363 17:37:24.748172 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
364 17:37:24.758130 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
365 17:37:24.761288 EC took 941us to calculate image hash
366 17:37:24.771325 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
367 17:37:24.775043 VB2:sync_ec() select_rw=RW(active)
368 17:37:24.786656 Waited 270us to clear limit power flag.
369 17:37:24.789736 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
370 17:37:24.792936 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
371 17:37:24.796429 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
372 17:37:24.803388 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
373 17:37:24.806593 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
374 17:37:24.809666 TCO_STS: 0000 0000
375 17:37:24.809752 GEN_PMCON: d0015038 00002200
376 17:37:24.813211 GBLRST_CAUSE: 00000000 00000000
377 17:37:24.816521 HPR_CAUSE0: 00000000
378 17:37:24.820074 prev_sleep_state 5
379 17:37:24.823054 Abort disabling TXT, as CPU is not TXT capable.
380 17:37:24.830537 cse_lite: Number of partitions = 3
381 17:37:24.834306 cse_lite: Current partition = RO
382 17:37:24.834421 cse_lite: Next partition = RO
383 17:37:24.837478 cse_lite: Flags = 0x7
384 17:37:24.844491 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
385 17:37:24.854511 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
386 17:37:24.857702 FMAP: area SI_ME found @ 1000 (5238784 bytes)
387 17:37:24.863940 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
388 17:37:24.870724 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
389 17:37:24.877885 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
390 17:37:24.881173 cse_lite: CSE CBFS RW version : 16.1.25.2049
391 17:37:24.887934 cse_lite: Set Boot Partition Info Command (RW)
392 17:37:24.890996 HECI: Global Reset(Type:1) Command
393 17:37:26.319873 V{#+�s�000423
394 17:37:26.326381 CPU: AES supported, TXT NOT supported, VT supported
395 17:37:26.333253 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
396 17:37:26.333360 Cache size = 10 MiB
397 17:37:26.340168 MCH: device id 4609 (rev 04) is Alderlake-P
398 17:37:26.343083 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
399 17:37:26.350015 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
400 17:37:26.353190 VBOOT: Loading verstage.
401 17:37:26.357211 FMAP: Found "FLASH" version 1.1 at 0x1804000.
402 17:37:26.360373 FMAP: base = 0x0 size = 0x2000000 #areas = 37
403 17:37:26.368051 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 17:37:26.374268 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
405 17:37:26.381138 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
406 17:37:26.384671
407 17:37:26.384756
408 17:37:26.391059 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
409 17:37:26.398054 Probing TPM I2C: I2C bus 1 version 0x3230302a
410 17:37:26.401315 DW I2C bus 1 at 0xfe022000 (400 KHz)
411 17:37:26.404930 done! DID_VID 0x00281ae0
412 17:37:26.408266 TPM ready after 0 ms
413 17:37:26.412456 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
414 17:37:26.420293 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
415 17:37:26.427472 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
416 17:37:26.484468 tlcl_send_startup: Startup return code is 0
417 17:37:26.484633 TPM: setup succeeded
418 17:37:26.504960 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
419 17:37:26.527352 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
420 17:37:26.531267 Chrome EC: UHEPI supported
421 17:37:26.534548 Reading cr50 boot mode
422 17:37:26.549155 Cr50 says boot_mode is VERIFIED_RW(0x00).
423 17:37:26.549313 Phase 1
424 17:37:26.555968 FMAP: area GBB found @ 1805000 (458752 bytes)
425 17:37:26.562991 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
426 17:37:26.569070 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
427 17:37:26.575978 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 17:37:26.576070 Phase 2
429 17:37:26.579157 Phase 3
430 17:37:26.582867 FMAP: area GBB found @ 1805000 (458752 bytes)
431 17:37:26.589311 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
432 17:37:26.592407 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
433 17:37:26.599754 VB2:vb2_verify_keyblock() Checking keyblock signature...
434 17:37:26.605984 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
435 17:37:26.613005 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
436 17:37:26.622565 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
437 17:37:26.634474 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
438 17:37:26.637370 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
439 17:37:26.644216 VB2:vb2_verify_fw_preamble() Verifying preamble.
440 17:37:26.650542 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
441 17:37:26.657997 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
442 17:37:26.664323 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
443 17:37:26.668130 Phase 4
444 17:37:26.672106 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
445 17:37:26.678301 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
446 17:37:26.890783 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
447 17:37:26.897578 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
448 17:37:26.900866 Saving vboot hash.
449 17:37:26.907575 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
450 17:37:26.923596 tlcl_extend: response is 0
451 17:37:26.929957 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
452 17:37:26.936732 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
453 17:37:26.951349 tlcl_extend: response is 0
454 17:37:26.957748 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
455 17:37:26.977695 tlcl_lock_nv_write: response is 0
456 17:37:26.997267 tlcl_lock_nv_write: response is 0
457 17:37:26.997384 Slot A is selected
458 17:37:27.003448 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
459 17:37:27.010259 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
460 17:37:27.017287 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
461 17:37:27.023724 BS: verstage times (exec / console): total (unknown) / 256 ms
462 17:37:27.023811
463 17:37:27.023878
464 17:37:27.030184 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
465 17:37:27.033727 Google Chrome EC: version:
466 17:37:27.037377 ro: volmar_v2.0.14126-e605144e9c
467 17:37:27.040634 rw: volmar_v0.0.55-22d1557
468 17:37:27.044383 running image: 2
469 17:37:27.047579 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
470 17:37:27.057248 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
471 17:37:27.064367 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
472 17:37:27.070601 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
473 17:37:27.080496 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
474 17:37:27.090522 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
475 17:37:27.094254 EC took 1018us to calculate image hash
476 17:37:27.103892 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
477 17:37:27.107705 VB2:sync_ec() select_rw=RW(active)
478 17:37:27.120892 Waited 325us to clear limit power flag.
479 17:37:27.124787 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
480 17:37:27.128611 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
481 17:37:27.131806 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
482 17:37:27.135354 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
483 17:37:27.141955 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
484 17:37:27.142132 TCO_STS: 0000 0000
485 17:37:27.145283 GEN_PMCON: d1001038 00002200
486 17:37:27.148580 GBLRST_CAUSE: 00000040 00000000
487 17:37:27.152025 HPR_CAUSE0: 00000000
488 17:37:27.152128 prev_sleep_state 5
489 17:37:27.158909 Abort disabling TXT, as CPU is not TXT capable.
490 17:37:27.162129 cse_lite: Number of partitions = 3
491 17:37:27.165569 cse_lite: Current partition = RW
492 17:37:27.168497 cse_lite: Next partition = RW
493 17:37:27.172117 cse_lite: Flags = 0x7
494 17:37:27.178398 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
495 17:37:27.188460 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
496 17:37:27.192304 FMAP: area SI_ME found @ 1000 (5238784 bytes)
497 17:37:27.198782 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
498 17:37:27.205682 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
499 17:37:27.212007 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
500 17:37:27.214987 cse_lite: CSE CBFS RW version : 16.1.25.2049
501 17:37:27.218705 Boot Count incremented to 5820
502 17:37:27.224937 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
503 17:37:27.231839 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
504 17:37:27.244361 Probing TPM I2C: done! DID_VID 0x00281ae0
505 17:37:27.247609 Locality already claimed
506 17:37:27.250505 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
507 17:37:27.270098 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
508 17:37:27.277219 MRC: Hash idx 0x100d comparison successful.
509 17:37:27.280086 MRC cache found, size f6c8
510 17:37:27.280229 bootmode is set to: 2
511 17:37:27.283525 EC returned error result code 3
512 17:37:27.287338 FW_CONFIG value from CBI is 0x131
513 17:37:27.293568 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
514 17:37:27.297302 SPD index = 0
515 17:37:27.303585 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
516 17:37:27.303709 SPD: module type is LPDDR4X
517 17:37:27.310783 SPD: module part number is K4U6E3S4AB-MGCL
518 17:37:27.317552 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
519 17:37:27.320958 SPD: device width 16 bits, bus width 16 bits
520 17:37:27.324066 SPD: module size is 1024 MB (per channel)
521 17:37:27.394450 CBMEM:
522 17:37:27.397887 IMD: root @ 0x76fff000 254 entries.
523 17:37:27.400660 IMD: root @ 0x76ffec00 62 entries.
524 17:37:27.408503 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
525 17:37:27.411637 RO_VPD is uninitialized or empty.
526 17:37:27.415400 FMAP: area RW_VPD found @ f29000 (8192 bytes)
527 17:37:27.421778 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
528 17:37:27.425655 External stage cache:
529 17:37:27.428592 IMD: root @ 0x7bbff000 254 entries.
530 17:37:27.432057 IMD: root @ 0x7bbfec00 62 entries.
531 17:37:27.438835 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
532 17:37:27.445230 MRC: Checking cached data update for 'RW_MRC_CACHE'.
533 17:37:27.448936 MRC: 'RW_MRC_CACHE' does not need update.
534 17:37:27.449032 8 DIMMs found
535 17:37:27.451917 SMM Memory Map
536 17:37:27.455716 SMRAM : 0x7b800000 0x800000
537 17:37:27.458742 Subregion 0: 0x7b800000 0x200000
538 17:37:27.461889 Subregion 1: 0x7ba00000 0x200000
539 17:37:27.465343 Subregion 2: 0x7bc00000 0x400000
540 17:37:27.468597 top_of_ram = 0x77000000
541 17:37:27.472482 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
542 17:37:27.478929 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
543 17:37:27.482111 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
544 17:37:27.488661 MTRR Range: Start=ff000000 End=0 (Size 1000000)
545 17:37:27.488804 Normal boot
546 17:37:27.498523 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
547 17:37:27.505240 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
548 17:37:27.512194 Processing 237 relocs. Offset value of 0x74ab9000
549 17:37:27.519375 BS: romstage times (exec / console): total (unknown) / 377 ms
550 17:37:27.527306
551 17:37:27.527451
552 17:37:27.533478 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
553 17:37:27.533606 Normal boot
554 17:37:27.540448 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
555 17:37:27.546862 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
556 17:37:27.556844 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
557 17:37:27.563642 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
558 17:37:27.611351 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
559 17:37:27.618339 Processing 5931 relocs. Offset value of 0x72a2f000
560 17:37:27.621137 BS: postcar times (exec / console): total (unknown) / 51 ms
561 17:37:27.621251
562 17:37:27.624768
563 17:37:27.631678 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
564 17:37:27.634913 Reserving BERT start 76a1e000, size 10000
565 17:37:27.638258 Normal boot
566 17:37:27.641140 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
567 17:37:27.647884 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
568 17:37:27.655145 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
569 17:37:27.661908 FMAP: area RW_VPD found @ f29000 (8192 bytes)
570 17:37:27.665014 Google Chrome EC: version:
571 17:37:27.668123 ro: volmar_v2.0.14126-e605144e9c
572 17:37:27.671764 rw: volmar_v0.0.55-22d1557
573 17:37:27.671850 running image: 2
574 17:37:27.674826 ACPI _SWS is PM1 Index 8 GPE Index -1
575 17:37:27.681774 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
576 17:37:27.685017 EC returned error result code 3
577 17:37:27.688203 FW_CONFIG value from CBI is 0x131
578 17:37:27.695240 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
579 17:37:27.698412 PCI: 00:1c.2 disabled by fw_config
580 17:37:27.705459 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
581 17:37:27.709314 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
582 17:37:27.715587 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
583 17:37:27.719122 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
584 17:37:27.726041 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
585 17:37:27.732162 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
586 17:37:27.735700 microcode: sig=0x906a4 pf=0x80 revision=0x423
587 17:37:27.742468 microcode: Update skipped, already up-to-date
588 17:37:27.748585 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
589 17:37:27.781269 Detected 6 core, 8 thread CPU.
590 17:37:27.784561 Setting up SMI for CPU
591 17:37:27.787573 IED base = 0x7bc00000
592 17:37:27.787674 IED size = 0x00400000
593 17:37:27.791373 Will perform SMM setup.
594 17:37:27.794617 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
595 17:37:27.797780 LAPIC 0x0 in XAPIC mode.
596 17:37:27.807985 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
597 17:37:27.811021 Processing 18 relocs. Offset value of 0x00030000
598 17:37:27.815468 Attempting to start 7 APs
599 17:37:27.818709 Waiting for 10ms after sending INIT.
600 17:37:27.831623 Waiting for SIPI to complete...
601 17:37:27.835343 LAPIC 0x16 in XAPIC mode.
602 17:37:27.838550 LAPIC 0x14 in XAPIC mode.
603 17:37:27.841780 LAPIC 0x12 in XAPIC mode.
604 17:37:27.844948 LAPIC 0x1 in XAPIC mode.
605 17:37:27.848797 AP: slot 1 apic_id 16, MCU rev: 0x00000423
606 17:37:27.851937 AP: slot 3 apic_id 12, MCU rev: 0x00000423
607 17:37:27.855019 LAPIC 0x10 in XAPIC mode.
608 17:37:27.858813 LAPIC 0x8 in XAPIC mode.
609 17:37:27.858906 LAPIC 0x9 in XAPIC mode.
610 17:37:27.864968 AP: slot 2 apic_id 10, MCU rev: 0x00000423
611 17:37:27.868723 AP: slot 4 apic_id 14, MCU rev: 0x00000423
612 17:37:27.871624 AP: slot 7 apic_id 8, MCU rev: 0x00000423
613 17:37:27.878719 AP: slot 6 apic_id 9, MCU rev: 0x00000423
614 17:37:27.878819 done.
615 17:37:27.882086 AP: slot 5 apic_id 1, MCU rev: 0x00000423
616 17:37:27.884981 Waiting for SIPI to complete...
617 17:37:27.885070 done.
618 17:37:27.888358 smm_setup_relocation_handler: enter
619 17:37:27.891554 smm_setup_relocation_handler: exit
620 17:37:27.901958 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
621 17:37:27.905792 Processing 11 relocs. Offset value of 0x00038000
622 17:37:27.912349 smm_module_setup_stub: stack_top = 0x7b804000
623 17:37:27.915349 smm_module_setup_stub: per cpu stack_size = 0x800
624 17:37:27.922320 smm_module_setup_stub: runtime.start32_offset = 0x4c
625 17:37:27.925390 smm_module_setup_stub: runtime.smm_size = 0x10000
626 17:37:27.932250 SMM Module: stub loaded at 38000. Will call 0x76a52094
627 17:37:27.935335 Installing permanent SMM handler to 0x7b800000
628 17:37:27.942382 smm_load_module: total_smm_space_needed e468, available -> 200000
629 17:37:27.952250 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
630 17:37:27.955594 Processing 255 relocs. Offset value of 0x7b9f6000
631 17:37:27.959292 smm_load_module: smram_start: 0x7b800000
632 17:37:27.962377 smm_load_module: smram_end: 7ba00000
633 17:37:27.969197 smm_load_module: handler start 0x7b9f6d5f
634 17:37:27.972115 smm_load_module: handler_size 98d0
635 17:37:27.975885 smm_load_module: fxsave_area 0x7b9ff000
636 17:37:27.979019 smm_load_module: fxsave_size 1000
637 17:37:27.982148 smm_load_module: CONFIG_MSEG_SIZE 0x0
638 17:37:27.988749 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
639 17:37:27.992051 smm_load_module: handler_mod_params.smbase = 0x7b800000
640 17:37:27.998688 smm_load_module: per_cpu_save_state_size = 0x400
641 17:37:28.002179 smm_load_module: num_cpus = 0x8
642 17:37:28.009017 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
643 17:37:28.012388 smm_load_module: total_save_state_size = 0x2000
644 17:37:28.016016 smm_load_module: cpu0 entry: 7b9e6000
645 17:37:28.019162 smm_create_map: cpus allowed in one segment 30
646 17:37:28.026014 smm_create_map: min # of segments needed 1
647 17:37:28.026115 CPU 0x0
648 17:37:28.029147 smbase 7b9e6000 entry 7b9ee000
649 17:37:28.035693 ss_start 7b9f5c00 code_end 7b9ee208
650 17:37:28.035783 CPU 0x1
651 17:37:28.039094 smbase 7b9e5c00 entry 7b9edc00
652 17:37:28.042729 ss_start 7b9f5800 code_end 7b9ede08
653 17:37:28.045954 CPU 0x2
654 17:37:28.049125 smbase 7b9e5800 entry 7b9ed800
655 17:37:28.052185 ss_start 7b9f5400 code_end 7b9eda08
656 17:37:28.052271 CPU 0x3
657 17:37:28.056017 smbase 7b9e5400 entry 7b9ed400
658 17:37:28.062680 ss_start 7b9f5000 code_end 7b9ed608
659 17:37:28.062771 CPU 0x4
660 17:37:28.065771 smbase 7b9e5000 entry 7b9ed000
661 17:37:28.072603 ss_start 7b9f4c00 code_end 7b9ed208
662 17:37:28.072730 CPU 0x5
663 17:37:28.075742 smbase 7b9e4c00 entry 7b9ecc00
664 17:37:28.079395 ss_start 7b9f4800 code_end 7b9ece08
665 17:37:28.082528 CPU 0x6
666 17:37:28.086301 smbase 7b9e4800 entry 7b9ec800
667 17:37:28.089590 ss_start 7b9f4400 code_end 7b9eca08
668 17:37:28.089678 CPU 0x7
669 17:37:28.092538 smbase 7b9e4400 entry 7b9ec400
670 17:37:28.099214 ss_start 7b9f4000 code_end 7b9ec608
671 17:37:28.105968 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
672 17:37:28.112662 Processing 11 relocs. Offset value of 0x7b9ee000
673 17:37:28.119849 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
674 17:37:28.122635 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
675 17:37:28.129753 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
676 17:37:28.136533 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
677 17:37:28.143321 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
678 17:37:28.149760 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
679 17:37:28.156527 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
680 17:37:28.162910 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
681 17:37:28.169657 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
682 17:37:28.172901 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
683 17:37:28.179744 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
684 17:37:28.186242 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
685 17:37:28.192911 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
686 17:37:28.199699 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
687 17:37:28.206600 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
688 17:37:28.209664 smm_module_setup_stub: stack_top = 0x7b804000
689 17:37:28.216379 smm_module_setup_stub: per cpu stack_size = 0x800
690 17:37:28.220053 smm_module_setup_stub: runtime.start32_offset = 0x4c
691 17:37:28.226817 smm_module_setup_stub: runtime.smm_size = 0x200000
692 17:37:28.229801 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
693 17:37:28.235442 Clearing SMI status registers
694 17:37:28.238714 SMI_STS: PM1
695 17:37:28.238828 PM1_STS: WAK PWRBTN
696 17:37:28.249017 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
697 17:37:28.252047 In relocation handler: CPU 0
698 17:37:28.255311 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
699 17:37:28.259159 Writing SMRR. base = 0x7b800006, mask=0xff800c00
700 17:37:28.262275 Relocation complete.
701 17:37:28.269384 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
702 17:37:28.272439 In relocation handler: CPU 5
703 17:37:28.275558 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
704 17:37:28.279253 Relocation complete.
705 17:37:28.285485 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
706 17:37:28.289365 In relocation handler: CPU 4
707 17:37:28.292309 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
708 17:37:28.295532 Writing SMRR. base = 0x7b800006, mask=0xff800c00
709 17:37:28.299093 Relocation complete.
710 17:37:28.306053 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
711 17:37:28.308986 In relocation handler: CPU 3
712 17:37:28.312467 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
713 17:37:28.319098 Writing SMRR. base = 0x7b800006, mask=0xff800c00
714 17:37:28.319221 Relocation complete.
715 17:37:28.329473 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
716 17:37:28.329592 In relocation handler: CPU 2
717 17:37:28.336247 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
718 17:37:28.339405 Writing SMRR. base = 0x7b800006, mask=0xff800c00
719 17:37:28.342539 Relocation complete.
720 17:37:28.349406 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
721 17:37:28.352602 In relocation handler: CPU 1
722 17:37:28.355963 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
723 17:37:28.358981 Writing SMRR. base = 0x7b800006, mask=0xff800c00
724 17:37:28.362855 Relocation complete.
725 17:37:28.368981 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
726 17:37:28.372829 In relocation handler: CPU 7
727 17:37:28.375929 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
728 17:37:28.382939 Writing SMRR. base = 0x7b800006, mask=0xff800c00
729 17:37:28.383052 Relocation complete.
730 17:37:28.392959 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
731 17:37:28.393081 In relocation handler: CPU 6
732 17:37:28.399245 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
733 17:37:28.399357 Relocation complete.
734 17:37:28.402806 Initializing CPU #0
735 17:37:28.405902 CPU: vendor Intel device 906a4
736 17:37:28.409217 CPU: family 06, model 9a, stepping 04
737 17:37:28.412410 Clearing out pending MCEs
738 17:37:28.416152 cpu: energy policy set to 7
739 17:37:28.419181 Turbo is available but hidden
740 17:37:28.422890 Turbo is available and visible
741 17:37:28.425638 microcode: Update skipped, already up-to-date
742 17:37:28.429417 CPU #0 initialized
743 17:37:28.429516 Initializing CPU #5
744 17:37:28.432399 Initializing CPU #4
745 17:37:28.432511 Initializing CPU #1
746 17:37:28.435836 Initializing CPU #2
747 17:37:28.439535 CPU: vendor Intel device 906a4
748 17:37:28.442539 CPU: family 06, model 9a, stepping 04
749 17:37:28.446268 CPU: vendor Intel device 906a4
750 17:37:28.449417 CPU: family 06, model 9a, stepping 04
751 17:37:28.452613 Initializing CPU #3
752 17:37:28.455843 CPU: vendor Intel device 906a4
753 17:37:28.459444 CPU: family 06, model 9a, stepping 04
754 17:37:28.462870 CPU: vendor Intel device 906a4
755 17:37:28.466222 CPU: family 06, model 9a, stepping 04
756 17:37:28.469292 Clearing out pending MCEs
757 17:37:28.469409 Clearing out pending MCEs
758 17:37:28.472981 cpu: energy policy set to 7
759 17:37:28.476048 Initializing CPU #7
760 17:37:28.479277 Initializing CPU #6
761 17:37:28.479392 CPU: vendor Intel device 906a4
762 17:37:28.485857 CPU: family 06, model 9a, stepping 04
763 17:37:28.485976 cpu: energy policy set to 7
764 17:37:28.489685 Clearing out pending MCEs
765 17:37:28.492968 Clearing out pending MCEs
766 17:37:28.496077 microcode: Update skipped, already up-to-date
767 17:37:28.499911 CPU #3 initialized
768 17:37:28.503131 cpu: energy policy set to 7
769 17:37:28.506368 microcode: Update skipped, already up-to-date
770 17:37:28.509314 CPU #2 initialized
771 17:37:28.512939 CPU: vendor Intel device 906a4
772 17:37:28.516671 CPU: family 06, model 9a, stepping 04
773 17:37:28.519697 microcode: Update skipped, already up-to-date
774 17:37:28.522914 CPU #4 initialized
775 17:37:28.526457 cpu: energy policy set to 7
776 17:37:28.526543 Clearing out pending MCEs
777 17:37:28.533059 microcode: Update skipped, already up-to-date
778 17:37:28.533153 CPU #1 initialized
779 17:37:28.536612 CPU: vendor Intel device 906a4
780 17:37:28.540128 CPU: family 06, model 9a, stepping 04
781 17:37:28.543067 Clearing out pending MCEs
782 17:37:28.546528 cpu: energy policy set to 7
783 17:37:28.549850 Clearing out pending MCEs
784 17:37:28.553507 microcode: Update skipped, already up-to-date
785 17:37:28.556747 CPU #7 initialized
786 17:37:28.559984 cpu: energy policy set to 7
787 17:37:28.560105 cpu: energy policy set to 7
788 17:37:28.567053 microcode: Update skipped, already up-to-date
789 17:37:28.567175 CPU #6 initialized
790 17:37:28.573474 microcode: Update skipped, already up-to-date
791 17:37:28.573563 CPU #5 initialized
792 17:37:28.580232 bsp_do_flight_plan done after 688 msecs.
793 17:37:28.583304 CPU: frequency set to 4400 MHz
794 17:37:28.583387 Enabling SMIs.
795 17:37:28.589961 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
796 17:37:28.605702 Probing TPM I2C: done! DID_VID 0x00281ae0
797 17:37:28.609514 Locality already claimed
798 17:37:28.612660 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
799 17:37:28.624390 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
800 17:37:28.627511 Enabling GPIO PM b/c CR50 has long IRQ pulse support
801 17:37:28.633830 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
802 17:37:28.640788 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
803 17:37:28.643836 Found a VBT of 9216 bytes after decompression
804 17:37:28.647523 PCI 1.0, PIN A, using IRQ #16
805 17:37:28.650824 PCI 2.0, PIN A, using IRQ #17
806 17:37:28.654197 PCI 4.0, PIN A, using IRQ #18
807 17:37:28.657729 PCI 5.0, PIN A, using IRQ #16
808 17:37:28.661150 PCI 6.0, PIN A, using IRQ #16
809 17:37:28.664264 PCI 6.2, PIN C, using IRQ #18
810 17:37:28.667275 PCI 7.0, PIN A, using IRQ #19
811 17:37:28.671074 PCI 7.1, PIN B, using IRQ #20
812 17:37:28.674359 PCI 7.2, PIN C, using IRQ #21
813 17:37:28.677649 PCI 7.3, PIN D, using IRQ #22
814 17:37:28.680616 PCI 8.0, PIN A, using IRQ #23
815 17:37:28.684149 PCI D.0, PIN A, using IRQ #17
816 17:37:28.684262 PCI D.1, PIN B, using IRQ #19
817 17:37:28.687664 PCI 10.0, PIN A, using IRQ #24
818 17:37:28.690476 PCI 10.1, PIN B, using IRQ #25
819 17:37:28.694067 PCI 10.6, PIN C, using IRQ #20
820 17:37:28.697208 PCI 10.7, PIN D, using IRQ #21
821 17:37:28.701020 PCI 11.0, PIN A, using IRQ #26
822 17:37:28.704154 PCI 11.1, PIN B, using IRQ #27
823 17:37:28.707314 PCI 11.2, PIN C, using IRQ #28
824 17:37:28.711047 PCI 11.3, PIN D, using IRQ #29
825 17:37:28.714284 PCI 12.0, PIN A, using IRQ #30
826 17:37:28.717502 PCI 12.6, PIN B, using IRQ #31
827 17:37:28.720730 PCI 12.7, PIN C, using IRQ #22
828 17:37:28.724818 PCI 13.0, PIN A, using IRQ #32
829 17:37:28.727267 PCI 13.1, PIN B, using IRQ #33
830 17:37:28.730839 PCI 13.2, PIN C, using IRQ #34
831 17:37:28.733892 PCI 13.3, PIN D, using IRQ #35
832 17:37:28.734002 PCI 14.0, PIN B, using IRQ #23
833 17:37:28.737579 PCI 14.1, PIN A, using IRQ #36
834 17:37:28.740656 PCI 14.3, PIN C, using IRQ #17
835 17:37:28.743761 PCI 15.0, PIN A, using IRQ #37
836 17:37:28.747623 PCI 15.1, PIN B, using IRQ #38
837 17:37:28.750650 PCI 15.2, PIN C, using IRQ #39
838 17:37:28.754341 PCI 15.3, PIN D, using IRQ #40
839 17:37:28.757264 PCI 16.0, PIN A, using IRQ #18
840 17:37:28.760854 PCI 16.1, PIN B, using IRQ #19
841 17:37:28.763958 PCI 16.2, PIN C, using IRQ #20
842 17:37:28.767275 PCI 16.3, PIN D, using IRQ #21
843 17:37:28.771110 PCI 16.4, PIN A, using IRQ #18
844 17:37:28.774218 PCI 16.5, PIN B, using IRQ #19
845 17:37:28.777237 PCI 17.0, PIN A, using IRQ #22
846 17:37:28.781077 PCI 19.0, PIN A, using IRQ #41
847 17:37:28.781189 PCI 19.1, PIN B, using IRQ #42
848 17:37:28.784252 PCI 19.2, PIN C, using IRQ #43
849 17:37:28.787382 PCI 1C.0, PIN A, using IRQ #16
850 17:37:28.791192 PCI 1C.1, PIN B, using IRQ #17
851 17:37:28.794296 PCI 1C.2, PIN C, using IRQ #18
852 17:37:28.797420 PCI 1C.3, PIN D, using IRQ #19
853 17:37:28.800811 PCI 1C.4, PIN A, using IRQ #16
854 17:37:28.804254 PCI 1C.5, PIN B, using IRQ #17
855 17:37:28.807691 PCI 1C.6, PIN C, using IRQ #18
856 17:37:28.810932 PCI 1C.7, PIN D, using IRQ #19
857 17:37:28.814020 PCI 1D.0, PIN A, using IRQ #16
858 17:37:28.817653 PCI 1D.1, PIN B, using IRQ #17
859 17:37:28.820874 PCI 1D.2, PIN C, using IRQ #18
860 17:37:28.824395 PCI 1D.3, PIN D, using IRQ #19
861 17:37:28.827535 PCI 1E.0, PIN A, using IRQ #23
862 17:37:28.827631 PCI 1E.1, PIN B, using IRQ #20
863 17:37:28.830760 PCI 1E.2, PIN C, using IRQ #44
864 17:37:28.834534 PCI 1E.3, PIN D, using IRQ #45
865 17:37:28.837457 PCI 1F.3, PIN B, using IRQ #22
866 17:37:28.840654 PCI 1F.4, PIN C, using IRQ #23
867 17:37:28.844279 PCI 1F.6, PIN D, using IRQ #20
868 17:37:28.847409 PCI 1F.7, PIN A, using IRQ #21
869 17:37:28.854197 IRQ: Using dynamically assigned PCI IO-APIC IRQs
870 17:37:28.861066 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
871 17:37:29.039421 FSPS returned 0
872 17:37:29.043148 Executing Phase 1 of FspMultiPhaseSiInit
873 17:37:29.052858 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
874 17:37:29.056546 port C0 DISC req: usage 1 usb3 1 usb2 1
875 17:37:29.059525 Raw Buffer output 0 00000111
876 17:37:29.063238 Raw Buffer output 1 00000000
877 17:37:29.066243 pmc_send_ipc_cmd succeeded
878 17:37:29.073254 port C1 DISC req: usage 1 usb3 3 usb2 3
879 17:37:29.073377 Raw Buffer output 0 00000331
880 17:37:29.076344 Raw Buffer output 1 00000000
881 17:37:29.080586 pmc_send_ipc_cmd succeeded
882 17:37:29.084398 Detected 6 core, 8 thread CPU.
883 17:37:29.087480 Detected 6 core, 8 thread CPU.
884 17:37:29.092846 Detected 6 core, 8 thread CPU.
885 17:37:29.096384 Detected 6 core, 8 thread CPU.
886 17:37:29.099470 Detected 6 core, 8 thread CPU.
887 17:37:29.102777 Detected 6 core, 8 thread CPU.
888 17:37:29.106393 Detected 6 core, 8 thread CPU.
889 17:37:29.109523 Detected 6 core, 8 thread CPU.
890 17:37:29.112777 Detected 6 core, 8 thread CPU.
891 17:37:29.116502 Detected 6 core, 8 thread CPU.
892 17:37:29.119594 Detected 6 core, 8 thread CPU.
893 17:37:29.123032 Detected 6 core, 8 thread CPU.
894 17:37:29.126583 Detected 6 core, 8 thread CPU.
895 17:37:29.129961 Detected 6 core, 8 thread CPU.
896 17:37:29.132915 Detected 6 core, 8 thread CPU.
897 17:37:29.136420 Detected 6 core, 8 thread CPU.
898 17:37:29.139938 Detected 6 core, 8 thread CPU.
899 17:37:29.143070 Detected 6 core, 8 thread CPU.
900 17:37:29.146341 Detected 6 core, 8 thread CPU.
901 17:37:29.146461 Detected 6 core, 8 thread CPU.
902 17:37:29.150032 Detected 6 core, 8 thread CPU.
903 17:37:29.153097 Detected 6 core, 8 thread CPU.
904 17:37:29.435796 Detected 6 core, 8 thread CPU.
905 17:37:29.439545 Detected 6 core, 8 thread CPU.
906 17:37:29.442573 Detected 6 core, 8 thread CPU.
907 17:37:29.446238 Detected 6 core, 8 thread CPU.
908 17:37:29.448984 Detected 6 core, 8 thread CPU.
909 17:37:29.452753 Detected 6 core, 8 thread CPU.
910 17:37:29.455982 Detected 6 core, 8 thread CPU.
911 17:37:29.459627 Detected 6 core, 8 thread CPU.
912 17:37:29.462596 Detected 6 core, 8 thread CPU.
913 17:37:29.466150 Detected 6 core, 8 thread CPU.
914 17:37:29.469208 Detected 6 core, 8 thread CPU.
915 17:37:29.473023 Detected 6 core, 8 thread CPU.
916 17:37:29.476036 Detected 6 core, 8 thread CPU.
917 17:37:29.479848 Detected 6 core, 8 thread CPU.
918 17:37:29.483064 Detected 6 core, 8 thread CPU.
919 17:37:29.486175 Detected 6 core, 8 thread CPU.
920 17:37:29.489887 Detected 6 core, 8 thread CPU.
921 17:37:29.489969 Detected 6 core, 8 thread CPU.
922 17:37:29.493043 Detected 6 core, 8 thread CPU.
923 17:37:29.496397 Detected 6 core, 8 thread CPU.
924 17:37:29.499571 Display FSP Version Info HOB
925 17:37:29.503069 Reference Code - CPU = c.0.65.70
926 17:37:29.506593 uCode Version = 0.0.4.23
927 17:37:29.509699 TXT ACM version = ff.ff.ff.ffff
928 17:37:29.512930 Reference Code - ME = c.0.65.70
929 17:37:29.516062 MEBx version = 0.0.0.0
930 17:37:29.519824 ME Firmware Version = Lite SKU
931 17:37:29.523038 Reference Code - PCH = c.0.65.70
932 17:37:29.526114 PCH-CRID Status = Disabled
933 17:37:29.529808 PCH-CRID Original Value = ff.ff.ff.ffff
934 17:37:29.532692 PCH-CRID New Value = ff.ff.ff.ffff
935 17:37:29.536292 OPROM - RST - RAID = ff.ff.ff.ffff
936 17:37:29.539727 PCH Hsio Version = 4.0.0.0
937 17:37:29.542858 Reference Code - SA - System Agent = c.0.65.70
938 17:37:29.546622 Reference Code - MRC = 0.0.3.80
939 17:37:29.549779 SA - PCIe Version = c.0.65.70
940 17:37:29.552894 SA-CRID Status = Disabled
941 17:37:29.556259 SA-CRID Original Value = 0.0.0.4
942 17:37:29.560049 SA-CRID New Value = 0.0.0.4
943 17:37:29.560147 OPROM - VBIOS = ff.ff.ff.ffff
944 17:37:29.566105 IO Manageability Engine FW Version = 24.0.4.0
945 17:37:29.569612 PHY Build Version = 0.0.0.2016
946 17:37:29.573161 Thunderbolt(TM) FW Version = 0.0.0.0
947 17:37:29.579816 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
948 17:37:29.586773 BS: BS_DEV_INIT_CHIPS run times (exec / console): 481 / 507 ms
949 17:37:29.586867 Enumerating buses...
950 17:37:29.593155 Show all devs... Before device enumeration.
951 17:37:29.593273 Root Device: enabled 1
952 17:37:29.596372 CPU_CLUSTER: 0: enabled 1
953 17:37:29.599859 DOMAIN: 0000: enabled 1
954 17:37:29.599938 GPIO: 0: enabled 1
955 17:37:29.603548 PCI: 00:00.0: enabled 1
956 17:37:29.606570 PCI: 00:01.0: enabled 0
957 17:37:29.610019 PCI: 00:01.1: enabled 0
958 17:37:29.610130 PCI: 00:02.0: enabled 1
959 17:37:29.612883 PCI: 00:04.0: enabled 1
960 17:37:29.616843 PCI: 00:05.0: enabled 0
961 17:37:29.619783 PCI: 00:06.0: enabled 1
962 17:37:29.619898 PCI: 00:06.2: enabled 0
963 17:37:29.622997 PCI: 00:07.0: enabled 0
964 17:37:29.626716 PCI: 00:07.1: enabled 0
965 17:37:29.629845 PCI: 00:07.2: enabled 0
966 17:37:29.629940 PCI: 00:07.3: enabled 0
967 17:37:29.632957 PCI: 00:08.0: enabled 0
968 17:37:29.636658 PCI: 00:09.0: enabled 0
969 17:37:29.636748 PCI: 00:0a.0: enabled 1
970 17:37:29.639642 PCI: 00:0d.0: enabled 1
971 17:37:29.643269 PCI: 00:0d.1: enabled 0
972 17:37:29.646744 PCI: 00:0d.2: enabled 0
973 17:37:29.646845 PCI: 00:0d.3: enabled 0
974 17:37:29.649784 PCI: 00:0e.0: enabled 0
975 17:37:29.653660 PCI: 00:10.0: enabled 0
976 17:37:29.656947 PCI: 00:10.1: enabled 0
977 17:37:29.657035 PCI: 00:10.6: enabled 0
978 17:37:29.660056 PCI: 00:10.7: enabled 0
979 17:37:29.663126 PCI: 00:12.0: enabled 0
980 17:37:29.663243 PCI: 00:12.6: enabled 0
981 17:37:29.667123 PCI: 00:12.7: enabled 0
982 17:37:29.669912 PCI: 00:13.0: enabled 0
983 17:37:29.673628 PCI: 00:14.0: enabled 1
984 17:37:29.673737 PCI: 00:14.1: enabled 0
985 17:37:29.676715 PCI: 00:14.2: enabled 1
986 17:37:29.680143 PCI: 00:14.3: enabled 1
987 17:37:29.683444 PCI: 00:15.0: enabled 1
988 17:37:29.683529 PCI: 00:15.1: enabled 1
989 17:37:29.686533 PCI: 00:15.2: enabled 0
990 17:37:29.689806 PCI: 00:15.3: enabled 1
991 17:37:29.693442 PCI: 00:16.0: enabled 1
992 17:37:29.693520 PCI: 00:16.1: enabled 0
993 17:37:29.696582 PCI: 00:16.2: enabled 0
994 17:37:29.699734 PCI: 00:16.3: enabled 0
995 17:37:29.699814 PCI: 00:16.4: enabled 0
996 17:37:29.703403 PCI: 00:16.5: enabled 0
997 17:37:29.706536 PCI: 00:17.0: enabled 1
998 17:37:29.710184 PCI: 00:19.0: enabled 0
999 17:37:29.710298 PCI: 00:19.1: enabled 1
1000 17:37:29.713414 PCI: 00:19.2: enabled 0
1001 17:37:29.717141 PCI: 00:1a.0: enabled 0
1002 17:37:29.720280 PCI: 00:1c.0: enabled 0
1003 17:37:29.720390 PCI: 00:1c.1: enabled 0
1004 17:37:29.723276 PCI: 00:1c.2: enabled 0
1005 17:37:29.726777 PCI: 00:1c.3: enabled 0
1006 17:37:29.726863 PCI: 00:1c.4: enabled 0
1007 17:37:29.729988 PCI: 00:1c.5: enabled 0
1008 17:37:29.733543 PCI: 00:1c.6: enabled 0
1009 17:37:29.736683 PCI: 00:1c.7: enabled 0
1010 17:37:29.736765 PCI: 00:1d.0: enabled 0
1011 17:37:29.740461 PCI: 00:1d.1: enabled 0
1012 17:37:29.743365 PCI: 00:1d.2: enabled 0
1013 17:37:29.747005 PCI: 00:1d.3: enabled 0
1014 17:37:29.747091 PCI: 00:1e.0: enabled 1
1015 17:37:29.750656 PCI: 00:1e.1: enabled 0
1016 17:37:29.753555 PCI: 00:1e.2: enabled 0
1017 17:37:29.753634 PCI: 00:1e.3: enabled 1
1018 17:37:29.756771 PCI: 00:1f.0: enabled 1
1019 17:37:29.759983 PCI: 00:1f.1: enabled 0
1020 17:37:29.763720 PCI: 00:1f.2: enabled 1
1021 17:37:29.763797 PCI: 00:1f.3: enabled 1
1022 17:37:29.766926 PCI: 00:1f.4: enabled 0
1023 17:37:29.770089 PCI: 00:1f.5: enabled 1
1024 17:37:29.773822 PCI: 00:1f.6: enabled 0
1025 17:37:29.773943 PCI: 00:1f.7: enabled 0
1026 17:37:29.776812 GENERIC: 0.0: enabled 1
1027 17:37:29.780262 GENERIC: 0.0: enabled 1
1028 17:37:29.783529 GENERIC: 1.0: enabled 1
1029 17:37:29.783612 GENERIC: 0.0: enabled 1
1030 17:37:29.786699 GENERIC: 1.0: enabled 1
1031 17:37:29.789743 USB0 port 0: enabled 1
1032 17:37:29.793278 USB0 port 0: enabled 1
1033 17:37:29.793360 GENERIC: 0.0: enabled 1
1034 17:37:29.796798 I2C: 00:1a: enabled 1
1035 17:37:29.799890 I2C: 00:31: enabled 1
1036 17:37:29.799983 I2C: 00:32: enabled 1
1037 17:37:29.803687 I2C: 00:50: enabled 1
1038 17:37:29.806778 I2C: 00:10: enabled 1
1039 17:37:29.806889 I2C: 00:15: enabled 1
1040 17:37:29.809995 I2C: 00:2c: enabled 1
1041 17:37:29.813662 GENERIC: 0.0: enabled 1
1042 17:37:29.813750 SPI: 00: enabled 1
1043 17:37:29.816696 PNP: 0c09.0: enabled 1
1044 17:37:29.819889 GENERIC: 0.0: enabled 1
1045 17:37:29.819994 USB3 port 0: enabled 1
1046 17:37:29.823793 USB3 port 1: enabled 0
1047 17:37:29.826876 USB3 port 2: enabled 1
1048 17:37:29.829933 USB3 port 3: enabled 0
1049 17:37:29.830014 USB2 port 0: enabled 1
1050 17:37:29.833752 USB2 port 1: enabled 0
1051 17:37:29.836727 USB2 port 2: enabled 1
1052 17:37:29.836802 USB2 port 3: enabled 0
1053 17:37:29.840206 USB2 port 4: enabled 0
1054 17:37:29.843621 USB2 port 5: enabled 1
1055 17:37:29.843732 USB2 port 6: enabled 0
1056 17:37:29.846781 USB2 port 7: enabled 0
1057 17:37:29.850330 USB2 port 8: enabled 1
1058 17:37:29.853524 USB2 port 9: enabled 1
1059 17:37:29.853604 USB3 port 0: enabled 1
1060 17:37:29.857022 USB3 port 1: enabled 0
1061 17:37:29.859962 USB3 port 2: enabled 0
1062 17:37:29.860048 USB3 port 3: enabled 0
1063 17:37:29.863135 GENERIC: 0.0: enabled 1
1064 17:37:29.866976 GENERIC: 1.0: enabled 1
1065 17:37:29.867058 APIC: 00: enabled 1
1066 17:37:29.870050 APIC: 16: enabled 1
1067 17:37:29.873280 APIC: 10: enabled 1
1068 17:37:29.873364 APIC: 12: enabled 1
1069 17:37:29.877184 APIC: 14: enabled 1
1070 17:37:29.880224 APIC: 01: enabled 1
1071 17:37:29.880300 APIC: 09: enabled 1
1072 17:37:29.883370 APIC: 08: enabled 1
1073 17:37:29.883472 Compare with tree...
1074 17:37:29.886450 Root Device: enabled 1
1075 17:37:29.889787 CPU_CLUSTER: 0: enabled 1
1076 17:37:29.893435 APIC: 00: enabled 1
1077 17:37:29.893541 APIC: 16: enabled 1
1078 17:37:29.896792 APIC: 10: enabled 1
1079 17:37:29.899798 APIC: 12: enabled 1
1080 17:37:29.899876 APIC: 14: enabled 1
1081 17:37:29.903258 APIC: 01: enabled 1
1082 17:37:29.906814 APIC: 09: enabled 1
1083 17:37:29.906921 APIC: 08: enabled 1
1084 17:37:29.909902 DOMAIN: 0000: enabled 1
1085 17:37:29.913001 GPIO: 0: enabled 1
1086 17:37:29.916595 PCI: 00:00.0: enabled 1
1087 17:37:29.916685 PCI: 00:01.0: enabled 0
1088 17:37:29.919776 PCI: 00:01.1: enabled 0
1089 17:37:29.922889 PCI: 00:02.0: enabled 1
1090 17:37:29.926740 PCI: 00:04.0: enabled 1
1091 17:37:29.929748 GENERIC: 0.0: enabled 1
1092 17:37:29.929837 PCI: 00:05.0: enabled 0
1093 17:37:29.932994 PCI: 00:06.0: enabled 1
1094 17:37:29.936718 PCI: 00:06.2: enabled 0
1095 17:37:29.939877 PCI: 00:08.0: enabled 0
1096 17:37:29.943518 PCI: 00:09.0: enabled 0
1097 17:37:29.943628 PCI: 00:0a.0: enabled 1
1098 17:37:29.946656 PCI: 00:0d.0: enabled 1
1099 17:37:29.949982 USB0 port 0: enabled 1
1100 17:37:29.953433 USB3 port 0: enabled 1
1101 17:37:29.956619 USB3 port 1: enabled 0
1102 17:37:29.956732 USB3 port 2: enabled 1
1103 17:37:29.959964 USB3 port 3: enabled 0
1104 17:37:29.963403 PCI: 00:0d.1: enabled 0
1105 17:37:29.966445 PCI: 00:0d.2: enabled 0
1106 17:37:29.970224 PCI: 00:0d.3: enabled 0
1107 17:37:29.970334 PCI: 00:0e.0: enabled 0
1108 17:37:29.973387 PCI: 00:10.0: enabled 0
1109 17:37:29.976593 PCI: 00:10.1: enabled 0
1110 17:37:29.980380 PCI: 00:10.6: enabled 0
1111 17:37:29.983531 PCI: 00:10.7: enabled 0
1112 17:37:29.983609 PCI: 00:12.0: enabled 0
1113 17:37:29.986691 PCI: 00:12.6: enabled 0
1114 17:37:29.989900 PCI: 00:12.7: enabled 0
1115 17:37:29.993425 PCI: 00:13.0: enabled 0
1116 17:37:29.993504 PCI: 00:14.0: enabled 1
1117 17:37:29.996384 USB0 port 0: enabled 1
1118 17:37:30.000057 USB2 port 0: enabled 1
1119 17:37:30.003075 USB2 port 1: enabled 0
1120 17:37:30.006807 USB2 port 2: enabled 1
1121 17:37:30.009697 USB2 port 3: enabled 0
1122 17:37:30.009777 USB2 port 4: enabled 0
1123 17:37:30.013357 USB2 port 5: enabled 1
1124 17:37:30.016401 USB2 port 6: enabled 0
1125 17:37:30.019647 USB2 port 7: enabled 0
1126 17:37:30.023241 USB2 port 8: enabled 1
1127 17:37:30.023350 USB2 port 9: enabled 1
1128 17:37:30.026439 USB3 port 0: enabled 1
1129 17:37:30.030239 USB3 port 1: enabled 0
1130 17:37:30.033410 USB3 port 2: enabled 0
1131 17:37:30.036496 USB3 port 3: enabled 0
1132 17:37:30.040285 PCI: 00:14.1: enabled 0
1133 17:37:30.040404 PCI: 00:14.2: enabled 1
1134 17:37:30.043312 PCI: 00:14.3: enabled 1
1135 17:37:30.046519 GENERIC: 0.0: enabled 1
1136 17:37:30.049709 PCI: 00:15.0: enabled 1
1137 17:37:30.049796 I2C: 00:1a: enabled 1
1138 17:37:30.053495 I2C: 00:31: enabled 1
1139 17:37:30.056683 I2C: 00:32: enabled 1
1140 17:37:30.059788 PCI: 00:15.1: enabled 1
1141 17:37:30.063343 I2C: 00:50: enabled 1
1142 17:37:30.063458 PCI: 00:15.2: enabled 0
1143 17:37:30.066900 PCI: 00:15.3: enabled 1
1144 17:37:30.070112 I2C: 00:10: enabled 1
1145 17:37:30.073342 PCI: 00:16.0: enabled 1
1146 17:37:30.076708 PCI: 00:16.1: enabled 0
1147 17:37:30.076819 PCI: 00:16.2: enabled 0
1148 17:37:30.079736 PCI: 00:16.3: enabled 0
1149 17:37:30.083583 PCI: 00:16.4: enabled 0
1150 17:37:30.086704 PCI: 00:16.5: enabled 0
1151 17:37:30.086782 PCI: 00:17.0: enabled 1
1152 17:37:30.089873 PCI: 00:19.0: enabled 0
1153 17:37:30.093020 PCI: 00:19.1: enabled 1
1154 17:37:30.096583 I2C: 00:15: enabled 1
1155 17:37:30.100209 I2C: 00:2c: enabled 1
1156 17:37:30.100287 PCI: 00:19.2: enabled 0
1157 17:37:30.103361 PCI: 00:1a.0: enabled 0
1158 17:37:30.106890 PCI: 00:1e.0: enabled 1
1159 17:37:30.110069 PCI: 00:1e.1: enabled 0
1160 17:37:30.110148 PCI: 00:1e.2: enabled 0
1161 17:37:30.113161 PCI: 00:1e.3: enabled 1
1162 17:37:30.116847 SPI: 00: enabled 1
1163 17:37:30.119986 PCI: 00:1f.0: enabled 1
1164 17:37:30.120076 PNP: 0c09.0: enabled 1
1165 17:37:30.123770 PCI: 00:1f.1: enabled 0
1166 17:37:30.126590 PCI: 00:1f.2: enabled 1
1167 17:37:30.130195 GENERIC: 0.0: enabled 1
1168 17:37:30.133629 GENERIC: 0.0: enabled 1
1169 17:37:30.136695 GENERIC: 1.0: enabled 1
1170 17:37:30.136772 PCI: 00:1f.3: enabled 1
1171 17:37:30.139871 PCI: 00:1f.4: enabled 0
1172 17:37:30.143661 PCI: 00:1f.5: enabled 1
1173 17:37:30.146755 PCI: 00:1f.6: enabled 0
1174 17:37:30.150082 PCI: 00:1f.7: enabled 0
1175 17:37:30.150170 Root Device scanning...
1176 17:37:30.153822 scan_static_bus for Root Device
1177 17:37:30.157018 CPU_CLUSTER: 0 enabled
1178 17:37:30.160164 DOMAIN: 0000 enabled
1179 17:37:30.160274 DOMAIN: 0000 scanning...
1180 17:37:30.163939 PCI: pci_scan_bus for bus 00
1181 17:37:30.166967 PCI: 00:00.0 [8086/0000] ops
1182 17:37:30.170099 PCI: 00:00.0 [8086/4609] enabled
1183 17:37:30.173701 PCI: 00:02.0 [8086/0000] bus ops
1184 17:37:30.176850 PCI: 00:02.0 [8086/46b3] enabled
1185 17:37:30.180361 PCI: 00:04.0 [8086/0000] bus ops
1186 17:37:30.183892 PCI: 00:04.0 [8086/461d] enabled
1187 17:37:30.186897 PCI: 00:06.0 [8086/0000] bus ops
1188 17:37:30.190122 PCI: 00:06.0 [8086/464d] enabled
1189 17:37:30.193863 PCI: 00:08.0 [8086/464f] disabled
1190 17:37:30.196985 PCI: 00:0a.0 [8086/467d] enabled
1191 17:37:30.200117 PCI: 00:0d.0 [8086/0000] bus ops
1192 17:37:30.203735 PCI: 00:0d.0 [8086/461e] enabled
1193 17:37:30.206661 PCI: 00:14.0 [8086/0000] bus ops
1194 17:37:30.210141 PCI: 00:14.0 [8086/51ed] enabled
1195 17:37:30.213928 PCI: 00:14.2 [8086/51ef] enabled
1196 17:37:30.216897 PCI: 00:14.3 [8086/0000] bus ops
1197 17:37:30.220518 PCI: 00:14.3 [8086/51f0] enabled
1198 17:37:30.223553 PCI: 00:15.0 [8086/0000] bus ops
1199 17:37:30.227325 PCI: 00:15.0 [8086/51e8] enabled
1200 17:37:30.230406 PCI: 00:15.1 [8086/0000] bus ops
1201 17:37:30.233564 PCI: 00:15.1 [8086/51e9] enabled
1202 17:37:30.237318 PCI: 00:15.2 [8086/0000] bus ops
1203 17:37:30.240165 PCI: 00:15.2 [8086/51ea] disabled
1204 17:37:30.243744 PCI: 00:15.3 [8086/0000] bus ops
1205 17:37:30.246867 PCI: 00:15.3 [8086/51eb] enabled
1206 17:37:30.250668 PCI: 00:16.0 [8086/0000] ops
1207 17:37:30.253834 PCI: 00:16.0 [8086/51e0] enabled
1208 17:37:30.260624 PCI: Static device PCI: 00:17.0 not found, disabling it.
1209 17:37:30.263790 PCI: 00:19.0 [8086/0000] bus ops
1210 17:37:30.266887 PCI: 00:19.0 [8086/51c5] disabled
1211 17:37:30.270612 PCI: 00:19.1 [8086/0000] bus ops
1212 17:37:30.273763 PCI: 00:19.1 [8086/51c6] enabled
1213 17:37:30.277401 PCI: 00:1e.0 [8086/0000] ops
1214 17:37:30.281077 PCI: 00:1e.0 [8086/51a8] enabled
1215 17:37:30.284198 PCI: 00:1e.3 [8086/0000] bus ops
1216 17:37:30.287356 PCI: 00:1e.3 [8086/51ab] enabled
1217 17:37:30.290618 PCI: 00:1f.0 [8086/0000] bus ops
1218 17:37:30.294360 PCI: 00:1f.0 [8086/5182] enabled
1219 17:37:30.294443 RTC Init
1220 17:37:30.300742 Set power on after power failure.
1221 17:37:30.300840 Disabling Deep S3
1222 17:37:30.304023 Disabling Deep S3
1223 17:37:30.304104 Disabling Deep S4
1224 17:37:30.307439 Disabling Deep S4
1225 17:37:30.307595 Disabling Deep S5
1226 17:37:30.310849 Disabling Deep S5
1227 17:37:30.314118 PCI: 00:1f.2 [0000/0000] hidden
1228 17:37:30.317556 PCI: 00:1f.3 [8086/0000] bus ops
1229 17:37:30.320897 PCI: 00:1f.3 [8086/51c8] enabled
1230 17:37:30.324367 PCI: 00:1f.5 [8086/0000] bus ops
1231 17:37:30.328051 PCI: 00:1f.5 [8086/51a4] enabled
1232 17:37:30.328167 GPIO: 0 enabled
1233 17:37:30.331274 PCI: Leftover static devices:
1234 17:37:30.334238 PCI: 00:01.0
1235 17:37:30.334319 PCI: 00:01.1
1236 17:37:30.337990 PCI: 00:05.0
1237 17:37:30.338072 PCI: 00:06.2
1238 17:37:30.338164 PCI: 00:09.0
1239 17:37:30.341188 PCI: 00:0d.1
1240 17:37:30.341294 PCI: 00:0d.2
1241 17:37:30.344255 PCI: 00:0d.3
1242 17:37:30.344336 PCI: 00:0e.0
1243 17:37:30.344438 PCI: 00:10.0
1244 17:37:30.347679 PCI: 00:10.1
1245 17:37:30.347771 PCI: 00:10.6
1246 17:37:30.351346 PCI: 00:10.7
1247 17:37:30.351480 PCI: 00:12.0
1248 17:37:30.351555 PCI: 00:12.6
1249 17:37:30.354423 PCI: 00:12.7
1250 17:37:30.354531 PCI: 00:13.0
1251 17:37:30.358162 PCI: 00:14.1
1252 17:37:30.358324 PCI: 00:16.1
1253 17:37:30.358445 PCI: 00:16.2
1254 17:37:30.361183 PCI: 00:16.3
1255 17:37:30.361278 PCI: 00:16.4
1256 17:37:30.364357 PCI: 00:16.5
1257 17:37:30.364438 PCI: 00:17.0
1258 17:37:30.368282 PCI: 00:19.2
1259 17:37:30.368362 PCI: 00:1a.0
1260 17:37:30.368425 PCI: 00:1e.1
1261 17:37:30.371345 PCI: 00:1e.2
1262 17:37:30.371489 PCI: 00:1f.1
1263 17:37:30.374559 PCI: 00:1f.4
1264 17:37:30.374640 PCI: 00:1f.6
1265 17:37:30.374744 PCI: 00:1f.7
1266 17:37:30.377742 PCI: Check your devicetree.cb.
1267 17:37:30.381499 PCI: 00:02.0 scanning...
1268 17:37:30.384663 scan_generic_bus for PCI: 00:02.0
1269 17:37:30.387746 scan_generic_bus for PCI: 00:02.0 done
1270 17:37:30.394690 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1271 17:37:30.394773 PCI: 00:04.0 scanning...
1272 17:37:30.401003 scan_generic_bus for PCI: 00:04.0
1273 17:37:30.401087 GENERIC: 0.0 enabled
1274 17:37:30.408053 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1275 17:37:30.411182 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1276 17:37:30.414191 PCI: 00:06.0 scanning...
1277 17:37:30.417476 do_pci_scan_bridge for PCI: 00:06.0
1278 17:37:30.421148 PCI: pci_scan_bus for bus 01
1279 17:37:30.424561 PCI: 01:00.0 [15b7/5009] enabled
1280 17:37:30.427891 Enabling Common Clock Configuration
1281 17:37:30.431205 L1 Sub-State supported from root port 6
1282 17:37:30.434284 L1 Sub-State Support = 0x5
1283 17:37:30.437665 CommonModeRestoreTime = 0x6e
1284 17:37:30.441311 Power On Value = 0x5, Power On Scale = 0x2
1285 17:37:30.444483 ASPM: Enabled L1
1286 17:37:30.447627 PCIe: Max_Payload_Size adjusted to 256
1287 17:37:30.451348 PCI: 01:00.0: Enabled LTR
1288 17:37:30.454699 PCI: 01:00.0: Programmed LTR max latencies
1289 17:37:30.461054 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1290 17:37:30.461142 PCI: 00:0d.0 scanning...
1291 17:37:30.464592 scan_static_bus for PCI: 00:0d.0
1292 17:37:30.467654 USB0 port 0 enabled
1293 17:37:30.471403 USB0 port 0 scanning...
1294 17:37:30.474626 scan_static_bus for USB0 port 0
1295 17:37:30.474734 USB3 port 0 enabled
1296 17:37:30.477845 USB3 port 1 disabled
1297 17:37:30.481064 USB3 port 2 enabled
1298 17:37:30.481152 USB3 port 3 disabled
1299 17:37:30.484936 USB3 port 0 scanning...
1300 17:37:30.487926 scan_static_bus for USB3 port 0
1301 17:37:30.490931 scan_static_bus for USB3 port 0 done
1302 17:37:30.494658 scan_bus: bus USB3 port 0 finished in 6 msecs
1303 17:37:30.497760 USB3 port 2 scanning...
1304 17:37:30.500958 scan_static_bus for USB3 port 2
1305 17:37:30.504700 scan_static_bus for USB3 port 2 done
1306 17:37:30.510973 scan_bus: bus USB3 port 2 finished in 6 msecs
1307 17:37:30.514670 scan_static_bus for USB0 port 0 done
1308 17:37:30.517621 scan_bus: bus USB0 port 0 finished in 43 msecs
1309 17:37:30.521420 scan_static_bus for PCI: 00:0d.0 done
1310 17:37:30.527697 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1311 17:37:30.527815 PCI: 00:14.0 scanning...
1312 17:37:30.530894 scan_static_bus for PCI: 00:14.0
1313 17:37:30.534678 USB0 port 0 enabled
1314 17:37:30.537859 USB0 port 0 scanning...
1315 17:37:30.541569 scan_static_bus for USB0 port 0
1316 17:37:30.541672 USB2 port 0 enabled
1317 17:37:30.544498 USB2 port 1 disabled
1318 17:37:30.547976 USB2 port 2 enabled
1319 17:37:30.548072 USB2 port 3 disabled
1320 17:37:30.551279 USB2 port 4 disabled
1321 17:37:30.554407 USB2 port 5 enabled
1322 17:37:30.554541 USB2 port 6 disabled
1323 17:37:30.557866 USB2 port 7 disabled
1324 17:37:30.557983 USB2 port 8 enabled
1325 17:37:30.561112 USB2 port 9 enabled
1326 17:37:30.564618 USB3 port 0 enabled
1327 17:37:30.564721 USB3 port 1 disabled
1328 17:37:30.567774 USB3 port 2 disabled
1329 17:37:30.571288 USB3 port 3 disabled
1330 17:37:30.571392 USB2 port 0 scanning...
1331 17:37:30.574632 scan_static_bus for USB2 port 0
1332 17:37:30.577652 scan_static_bus for USB2 port 0 done
1333 17:37:30.584462 scan_bus: bus USB2 port 0 finished in 6 msecs
1334 17:37:30.587983 USB2 port 2 scanning...
1335 17:37:30.591072 scan_static_bus for USB2 port 2
1336 17:37:30.594873 scan_static_bus for USB2 port 2 done
1337 17:37:30.597822 scan_bus: bus USB2 port 2 finished in 6 msecs
1338 17:37:30.601596 USB2 port 5 scanning...
1339 17:37:30.604941 scan_static_bus for USB2 port 5
1340 17:37:30.608013 scan_static_bus for USB2 port 5 done
1341 17:37:30.611271 scan_bus: bus USB2 port 5 finished in 6 msecs
1342 17:37:30.614866 USB2 port 8 scanning...
1343 17:37:30.618470 scan_static_bus for USB2 port 8
1344 17:37:30.621459 scan_static_bus for USB2 port 8 done
1345 17:37:30.624664 scan_bus: bus USB2 port 8 finished in 6 msecs
1346 17:37:30.627884 USB2 port 9 scanning...
1347 17:37:30.631629 scan_static_bus for USB2 port 9
1348 17:37:30.634623 scan_static_bus for USB2 port 9 done
1349 17:37:30.638398 scan_bus: bus USB2 port 9 finished in 6 msecs
1350 17:37:30.641477 USB3 port 0 scanning...
1351 17:37:30.644614 scan_static_bus for USB3 port 0
1352 17:37:30.648338 scan_static_bus for USB3 port 0 done
1353 17:37:30.654918 scan_bus: bus USB3 port 0 finished in 6 msecs
1354 17:37:30.658481 scan_static_bus for USB0 port 0 done
1355 17:37:30.661495 scan_bus: bus USB0 port 0 finished in 120 msecs
1356 17:37:30.664793 scan_static_bus for PCI: 00:14.0 done
1357 17:37:30.671654 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1358 17:37:30.674625 PCI: 00:14.3 scanning...
1359 17:37:30.678194 scan_static_bus for PCI: 00:14.3
1360 17:37:30.678303 GENERIC: 0.0 enabled
1361 17:37:30.681522 scan_static_bus for PCI: 00:14.3 done
1362 17:37:30.687948 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1363 17:37:30.691354 PCI: 00:15.0 scanning...
1364 17:37:30.694411 scan_static_bus for PCI: 00:15.0
1365 17:37:30.694518 I2C: 00:1a enabled
1366 17:37:30.698000 I2C: 00:31 enabled
1367 17:37:30.698087 I2C: 00:32 enabled
1368 17:37:30.701237 scan_static_bus for PCI: 00:15.0 done
1369 17:37:30.708011 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1370 17:37:30.711330 PCI: 00:15.1 scanning...
1371 17:37:30.714944 scan_static_bus for PCI: 00:15.1
1372 17:37:30.715062 I2C: 00:50 enabled
1373 17:37:30.718397 scan_static_bus for PCI: 00:15.1 done
1374 17:37:30.724630 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1375 17:37:30.728184 PCI: 00:15.3 scanning...
1376 17:37:30.731452 scan_static_bus for PCI: 00:15.3
1377 17:37:30.731539 I2C: 00:10 enabled
1378 17:37:30.734483 scan_static_bus for PCI: 00:15.3 done
1379 17:37:30.741401 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1380 17:37:30.741514 PCI: 00:19.1 scanning...
1381 17:37:30.745142 scan_static_bus for PCI: 00:19.1
1382 17:37:30.748253 I2C: 00:15 enabled
1383 17:37:30.751448 I2C: 00:2c enabled
1384 17:37:30.754541 scan_static_bus for PCI: 00:19.1 done
1385 17:37:30.758313 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1386 17:37:30.761640 PCI: 00:1e.3 scanning...
1387 17:37:30.764666 scan_generic_bus for PCI: 00:1e.3
1388 17:37:30.764834 SPI: 00 enabled
1389 17:37:30.771613 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1390 17:37:30.777998 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1391 17:37:30.778114 PCI: 00:1f.0 scanning...
1392 17:37:30.781669 scan_static_bus for PCI: 00:1f.0
1393 17:37:30.784669 PNP: 0c09.0 enabled
1394 17:37:30.788305 PNP: 0c09.0 scanning...
1395 17:37:30.791340 scan_static_bus for PNP: 0c09.0
1396 17:37:30.794564 scan_static_bus for PNP: 0c09.0 done
1397 17:37:30.798346 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1398 17:37:30.801627 scan_static_bus for PCI: 00:1f.0 done
1399 17:37:30.808278 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1400 17:37:30.811229 PCI: 00:1f.2 scanning...
1401 17:37:30.814675 scan_static_bus for PCI: 00:1f.2
1402 17:37:30.814783 GENERIC: 0.0 enabled
1403 17:37:30.818291 GENERIC: 0.0 scanning...
1404 17:37:30.821959 scan_static_bus for GENERIC: 0.0
1405 17:37:30.825192 GENERIC: 0.0 enabled
1406 17:37:30.825270 GENERIC: 1.0 enabled
1407 17:37:30.828041 scan_static_bus for GENERIC: 0.0 done
1408 17:37:30.834882 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1409 17:37:30.838193 scan_static_bus for PCI: 00:1f.2 done
1410 17:37:30.841691 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1411 17:37:30.844783 PCI: 00:1f.3 scanning...
1412 17:37:30.848258 scan_static_bus for PCI: 00:1f.3
1413 17:37:30.851890 scan_static_bus for PCI: 00:1f.3 done
1414 17:37:30.858137 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1415 17:37:30.858256 PCI: 00:1f.5 scanning...
1416 17:37:30.865024 scan_generic_bus for PCI: 00:1f.5
1417 17:37:30.868153 scan_generic_bus for PCI: 00:1f.5 done
1418 17:37:30.871268 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1419 17:37:30.878225 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1420 17:37:30.881430 scan_static_bus for Root Device done
1421 17:37:30.885182 scan_bus: bus Root Device finished in 729 msecs
1422 17:37:30.885267 done
1423 17:37:30.891362 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1424 17:37:30.897990 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1425 17:37:30.905097 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1426 17:37:30.908230 SPI flash protection: WPSW=0 SRP0=0
1427 17:37:30.911330 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1428 17:37:30.918412 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1429 17:37:30.921509 found VGA at PCI: 00:02.0
1430 17:37:30.924711 Setting up VGA for PCI: 00:02.0
1431 17:37:30.928254 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1432 17:37:30.935147 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1433 17:37:30.938099 Allocating resources...
1434 17:37:30.938202 Reading resources...
1435 17:37:30.941474 Root Device read_resources bus 0 link: 0
1436 17:37:30.947967 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1437 17:37:30.951448 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1438 17:37:30.955224 DOMAIN: 0000 read_resources bus 0 link: 0
1439 17:37:30.961486 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1440 17:37:30.968330 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1441 17:37:30.974699 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1442 17:37:30.981501 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1443 17:37:30.988418 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1444 17:37:30.994732 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1445 17:37:31.001643 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1446 17:37:31.008502 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1447 17:37:31.011625 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1448 17:37:31.021775 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1449 17:37:31.024950 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1450 17:37:31.031887 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1451 17:37:31.038149 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1452 17:37:31.044815 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1453 17:37:31.051595 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1454 17:37:31.058309 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1455 17:37:31.064615 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1456 17:37:31.071150 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1457 17:37:31.078160 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1458 17:37:31.081313 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1459 17:37:31.088296 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1460 17:37:31.091373 PCI: 00:04.0 read_resources bus 1 link: 0
1461 17:37:31.097913 PCI: 00:04.0 read_resources bus 1 link: 0 done
1462 17:37:31.101353 PCI: 00:06.0 read_resources bus 1 link: 0
1463 17:37:31.107818 PCI: 00:06.0 read_resources bus 1 link: 0 done
1464 17:37:31.111405 PCI: 00:0d.0 read_resources bus 0 link: 0
1465 17:37:31.114652 USB0 port 0 read_resources bus 0 link: 0
1466 17:37:31.118433 USB0 port 0 read_resources bus 0 link: 0 done
1467 17:37:31.124663 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1468 17:37:31.127851 PCI: 00:14.0 read_resources bus 0 link: 0
1469 17:37:31.131596 USB0 port 0 read_resources bus 0 link: 0
1470 17:37:31.137883 USB0 port 0 read_resources bus 0 link: 0 done
1471 17:37:31.141620 PCI: 00:14.0 read_resources bus 0 link: 0 done
1472 17:37:31.144810 PCI: 00:14.3 read_resources bus 0 link: 0
1473 17:37:31.151521 PCI: 00:14.3 read_resources bus 0 link: 0 done
1474 17:37:31.154548 PCI: 00:15.0 read_resources bus 0 link: 0
1475 17:37:31.161255 PCI: 00:15.0 read_resources bus 0 link: 0 done
1476 17:37:31.164961 PCI: 00:15.1 read_resources bus 0 link: 0
1477 17:37:31.168110 PCI: 00:15.1 read_resources bus 0 link: 0 done
1478 17:37:31.174804 PCI: 00:15.3 read_resources bus 0 link: 0
1479 17:37:31.178580 PCI: 00:15.3 read_resources bus 0 link: 0 done
1480 17:37:31.181619 PCI: 00:19.1 read_resources bus 0 link: 0
1481 17:37:31.188464 PCI: 00:19.1 read_resources bus 0 link: 0 done
1482 17:37:31.191568 PCI: 00:1e.3 read_resources bus 2 link: 0
1483 17:37:31.194734 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1484 17:37:31.201848 PCI: 00:1f.0 read_resources bus 0 link: 0
1485 17:37:31.204857 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1486 17:37:31.208372 PCI: 00:1f.2 read_resources bus 0 link: 0
1487 17:37:31.214895 GENERIC: 0.0 read_resources bus 0 link: 0
1488 17:37:31.218101 GENERIC: 0.0 read_resources bus 0 link: 0 done
1489 17:37:31.222045 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1490 17:37:31.228445 DOMAIN: 0000 read_resources bus 0 link: 0 done
1491 17:37:31.231577 Root Device read_resources bus 0 link: 0 done
1492 17:37:31.235302 Done reading resources.
1493 17:37:31.242068 Show resources in subtree (Root Device)...After reading.
1494 17:37:31.245169 Root Device child on link 0 CPU_CLUSTER: 0
1495 17:37:31.248903 CPU_CLUSTER: 0 child on link 0 APIC: 00
1496 17:37:31.251955 APIC: 00
1497 17:37:31.252039 APIC: 16
1498 17:37:31.252105 APIC: 10
1499 17:37:31.255566 APIC: 12
1500 17:37:31.255650 APIC: 14
1501 17:37:31.258527 APIC: 01
1502 17:37:31.258655 APIC: 09
1503 17:37:31.258752 APIC: 08
1504 17:37:31.261697 DOMAIN: 0000 child on link 0 GPIO: 0
1505 17:37:31.271831 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1506 17:37:31.282285 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1507 17:37:31.285345 GPIO: 0
1508 17:37:31.285470 PCI: 00:00.0
1509 17:37:31.295325 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1510 17:37:31.305326 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1511 17:37:31.315503 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1512 17:37:31.322274 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1513 17:37:31.331808 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1514 17:37:31.342053 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1515 17:37:31.352086 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1516 17:37:31.361896 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1517 17:37:31.372373 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1518 17:37:31.378468 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1519 17:37:31.388491 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1520 17:37:31.399024 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1521 17:37:31.409143 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1522 17:37:31.418443 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1523 17:37:31.425363 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1524 17:37:31.435262 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1525 17:37:31.445107 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1526 17:37:31.454978 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1527 17:37:31.465429 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1528 17:37:31.475537 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1529 17:37:31.485108 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1530 17:37:31.492064 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1531 17:37:31.501949 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1532 17:37:31.512005 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1533 17:37:31.521908 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1534 17:37:31.531894 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1535 17:37:31.541838 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1536 17:37:31.551886 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1537 17:37:31.551991 PCI: 00:02.0
1538 17:37:31.561954 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1539 17:37:31.572034 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1540 17:37:31.582264 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1541 17:37:31.585277 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1542 17:37:31.595441 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1543 17:37:31.599121 GENERIC: 0.0
1544 17:37:31.602025 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1545 17:37:31.612444 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1546 17:37:31.622406 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1547 17:37:31.629146 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1548 17:37:31.632331 PCI: 01:00.0
1549 17:37:31.642090 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1550 17:37:31.652187 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1551 17:37:31.652292 PCI: 00:08.0
1552 17:37:31.655297 PCI: 00:0a.0
1553 17:37:31.665214 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1554 17:37:31.668925 PCI: 00:0d.0 child on link 0 USB0 port 0
1555 17:37:31.679042 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1556 17:37:31.685735 USB0 port 0 child on link 0 USB3 port 0
1557 17:37:31.685832 USB3 port 0
1558 17:37:31.688874 USB3 port 1
1559 17:37:31.688959 USB3 port 2
1560 17:37:31.691992 USB3 port 3
1561 17:37:31.695435 PCI: 00:14.0 child on link 0 USB0 port 0
1562 17:37:31.705649 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1563 17:37:31.708891 USB0 port 0 child on link 0 USB2 port 0
1564 17:37:31.712243 USB2 port 0
1565 17:37:31.712352 USB2 port 1
1566 17:37:31.715373 USB2 port 2
1567 17:37:31.715484 USB2 port 3
1568 17:37:31.718693 USB2 port 4
1569 17:37:31.722343 USB2 port 5
1570 17:37:31.722427 USB2 port 6
1571 17:37:31.725545 USB2 port 7
1572 17:37:31.725629 USB2 port 8
1573 17:37:31.728988 USB2 port 9
1574 17:37:31.729095 USB3 port 0
1575 17:37:31.732090 USB3 port 1
1576 17:37:31.732169 USB3 port 2
1577 17:37:31.735218 USB3 port 3
1578 17:37:31.735294 PCI: 00:14.2
1579 17:37:31.745811 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1580 17:37:31.755205 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1581 17:37:31.762105 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1582 17:37:31.772232 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1583 17:37:31.772325 GENERIC: 0.0
1584 17:37:31.775308 PCI: 00:15.0 child on link 0 I2C: 00:1a
1585 17:37:31.785242 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1586 17:37:31.788932 I2C: 00:1a
1587 17:37:31.789046 I2C: 00:31
1588 17:37:31.791886 I2C: 00:32
1589 17:37:31.795041 PCI: 00:15.1 child on link 0 I2C: 00:50
1590 17:37:31.805692 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1591 17:37:31.808638 I2C: 00:50
1592 17:37:31.808717 PCI: 00:15.2
1593 17:37:31.812044 PCI: 00:15.3 child on link 0 I2C: 00:10
1594 17:37:31.822309 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1595 17:37:31.825389 I2C: 00:10
1596 17:37:31.825475 PCI: 00:16.0
1597 17:37:31.835195 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1598 17:37:31.838901 PCI: 00:19.0
1599 17:37:31.842365 PCI: 00:19.1 child on link 0 I2C: 00:15
1600 17:37:31.852598 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1601 17:37:31.852703 I2C: 00:15
1602 17:37:31.855500 I2C: 00:2c
1603 17:37:31.855584 PCI: 00:1e.0
1604 17:37:31.868604 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1605 17:37:31.872310 PCI: 00:1e.3 child on link 0 SPI: 00
1606 17:37:31.882475 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1607 17:37:31.882568 SPI: 00
1608 17:37:31.889363 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1609 17:37:31.895422 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1610 17:37:31.899149 PNP: 0c09.0
1611 17:37:31.906093 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1612 17:37:31.912374 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1613 17:37:31.922452 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1614 17:37:31.929233 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1615 17:37:31.935452 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1616 17:37:31.935562 GENERIC: 0.0
1617 17:37:31.938909 GENERIC: 1.0
1618 17:37:31.939013 PCI: 00:1f.3
1619 17:37:31.949422 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1620 17:37:31.959391 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1621 17:37:31.962706 PCI: 00:1f.5
1622 17:37:31.972650 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1623 17:37:31.979072 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1624 17:37:31.982795 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1625 17:37:31.989059 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1626 17:37:31.996444 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1627 17:37:31.999439 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1628 17:37:32.006009 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1629 17:37:32.012783 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1630 17:37:32.019645 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1631 17:37:32.025876 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1632 17:37:32.032762 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1633 17:37:32.039495 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1634 17:37:32.049185 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1635 17:37:32.056482 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1636 17:37:32.062663 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1637 17:37:32.066256 DOMAIN: 0000: Resource ranges:
1638 17:37:32.069326 * Base: 1000, Size: 800, Tag: 100
1639 17:37:32.072747 * Base: 1900, Size: e700, Tag: 100
1640 17:37:32.079198 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1641 17:37:32.086142 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1642 17:37:32.092552 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1643 17:37:32.099574 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1644 17:37:32.106438 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1645 17:37:32.116204 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1646 17:37:32.123034 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1647 17:37:32.129122 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1648 17:37:32.139320 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1649 17:37:32.146308 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1650 17:37:32.153029 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1651 17:37:32.162442 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1652 17:37:32.169229 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1653 17:37:32.175926 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1654 17:37:32.186252 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1655 17:37:32.192506 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1656 17:37:32.199319 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1657 17:37:32.206406 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1658 17:37:32.215920 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1659 17:37:32.223356 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1660 17:37:32.229586 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1661 17:37:32.239704 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1662 17:37:32.246021 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1663 17:37:32.252753 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1664 17:37:32.263027 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1665 17:37:32.269258 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1666 17:37:32.276205 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1667 17:37:32.286166 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1668 17:37:32.292531 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1669 17:37:32.299610 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1670 17:37:32.309264 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1671 17:37:32.316152 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1672 17:37:32.323111 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1673 17:37:32.326215 DOMAIN: 0000: Resource ranges:
1674 17:37:32.329710 * Base: 80400000, Size: 3fc00000, Tag: 200
1675 17:37:32.336304 * Base: d0000000, Size: 28000000, Tag: 200
1676 17:37:32.339314 * Base: fa000000, Size: 1000000, Tag: 200
1677 17:37:32.343065 * Base: fb001000, Size: 17ff000, Tag: 200
1678 17:37:32.349343 * Base: fe800000, Size: 300000, Tag: 200
1679 17:37:32.352951 * Base: feb80000, Size: 80000, Tag: 200
1680 17:37:32.356130 * Base: fed00000, Size: 40000, Tag: 200
1681 17:37:32.359922 * Base: fed70000, Size: 10000, Tag: 200
1682 17:37:32.363140 * Base: fed88000, Size: 8000, Tag: 200
1683 17:37:32.369775 * Base: fed93000, Size: d000, Tag: 200
1684 17:37:32.372912 * Base: feda2000, Size: 1e000, Tag: 200
1685 17:37:32.376159 * Base: fede0000, Size: 1220000, Tag: 200
1686 17:37:32.382817 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1687 17:37:32.389230 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1688 17:37:32.396425 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1689 17:37:32.403054 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1690 17:37:32.409711 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1691 17:37:32.416525 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1692 17:37:32.422756 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1693 17:37:32.429588 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1694 17:37:32.436240 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1695 17:37:32.443057 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1696 17:37:32.449962 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1697 17:37:32.456694 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1698 17:37:32.462806 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1699 17:37:32.469873 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1700 17:37:32.476513 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1701 17:37:32.482892 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1702 17:37:32.489638 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1703 17:37:32.496597 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1704 17:37:32.503000 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1705 17:37:32.509673 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1706 17:37:32.516339 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1707 17:37:32.522887 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1708 17:37:32.526017 PCI: 00:06.0: Resource ranges:
1709 17:37:32.529713 * Base: 80400000, Size: 100000, Tag: 200
1710 17:37:32.536184 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1711 17:37:32.542870 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1712 17:37:32.553218 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1713 17:37:32.559347 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1714 17:37:32.563099 Root Device assign_resources, bus 0 link: 0
1715 17:37:32.569161 DOMAIN: 0000 assign_resources, bus 0 link: 0
1716 17:37:32.576186 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1717 17:37:32.586372 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1718 17:37:32.592764 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1719 17:37:32.599725 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1720 17:37:32.605913 PCI: 00:04.0 assign_resources, bus 1 link: 0
1721 17:37:32.609277 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1722 17:37:32.619255 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1723 17:37:32.629354 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1724 17:37:32.636078 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1725 17:37:32.642932 PCI: 00:06.0 assign_resources, bus 1 link: 0
1726 17:37:32.649099 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1727 17:37:32.659068 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1728 17:37:32.662825 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1729 17:37:32.669552 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1730 17:37:32.679635 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1731 17:37:32.682693 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1732 17:37:32.689282 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1733 17:37:32.695569 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1734 17:37:32.699209 PCI: 00:14.0 assign_resources, bus 0 link: 0
1735 17:37:32.705517 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1736 17:37:32.712196 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1737 17:37:32.722448 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1738 17:37:32.729333 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1739 17:37:32.735616 PCI: 00:14.3 assign_resources, bus 0 link: 0
1740 17:37:32.738840 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1741 17:37:32.745534 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1742 17:37:32.752346 PCI: 00:15.0 assign_resources, bus 0 link: 0
1743 17:37:32.755380 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1744 17:37:32.765695 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1745 17:37:32.769257 PCI: 00:15.1 assign_resources, bus 0 link: 0
1746 17:37:32.776027 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1747 17:37:32.782324 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1748 17:37:32.785672 PCI: 00:15.3 assign_resources, bus 0 link: 0
1749 17:37:32.792421 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1750 17:37:32.799180 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1751 17:37:32.809173 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1752 17:37:32.812254 PCI: 00:19.1 assign_resources, bus 0 link: 0
1753 17:37:32.815335 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1754 17:37:32.825824 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1755 17:37:32.829322 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1756 17:37:32.835580 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1757 17:37:32.838748 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1758 17:37:32.845843 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1759 17:37:32.848927 LPC: Trying to open IO window from 800 size 1ff
1760 17:37:32.855415 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1761 17:37:32.865900 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1762 17:37:32.872185 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1763 17:37:32.879201 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1764 17:37:32.881967 Root Device assign_resources, bus 0 link: 0 done
1765 17:37:32.885661 Done setting resources.
1766 17:37:32.892636 Show resources in subtree (Root Device)...After assigning values.
1767 17:37:32.895868 Root Device child on link 0 CPU_CLUSTER: 0
1768 17:37:32.898920 CPU_CLUSTER: 0 child on link 0 APIC: 00
1769 17:37:32.902433 APIC: 00
1770 17:37:32.902517 APIC: 16
1771 17:37:32.905528 APIC: 10
1772 17:37:32.905612 APIC: 12
1773 17:37:32.905697 APIC: 14
1774 17:37:32.908781 APIC: 01
1775 17:37:32.908864 APIC: 09
1776 17:37:32.908948 APIC: 08
1777 17:37:32.915672 DOMAIN: 0000 child on link 0 GPIO: 0
1778 17:37:32.922256 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1779 17:37:32.932099 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1780 17:37:32.935395 GPIO: 0
1781 17:37:32.935534 PCI: 00:00.0
1782 17:37:32.945885 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1783 17:37:32.955859 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1784 17:37:32.965626 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1785 17:37:32.975272 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1786 17:37:32.982000 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1787 17:37:32.992000 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1788 17:37:33.001967 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1789 17:37:33.011640 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1790 17:37:33.021832 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1791 17:37:33.031627 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1792 17:37:33.041841 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1793 17:37:33.048460 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1794 17:37:33.058352 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1795 17:37:33.068443 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1796 17:37:33.078204 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1797 17:37:33.088068 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1798 17:37:33.095328 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1799 17:37:33.104656 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1800 17:37:33.115222 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1801 17:37:33.125056 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1802 17:37:33.134892 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1803 17:37:33.144789 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1804 17:37:33.154555 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1805 17:37:33.164549 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1806 17:37:33.174793 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1807 17:37:33.181624 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1808 17:37:33.191357 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1809 17:37:33.201146 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1810 17:37:33.204680 PCI: 00:02.0
1811 17:37:33.214598 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1812 17:37:33.225030 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1813 17:37:33.235132 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1814 17:37:33.238280 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1815 17:37:33.248065 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1816 17:37:33.251257 GENERIC: 0.0
1817 17:37:33.254909 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1818 17:37:33.264464 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1819 17:37:33.274516 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1820 17:37:33.287614 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1821 17:37:33.287709 PCI: 01:00.0
1822 17:37:33.298150 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1823 17:37:33.307897 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1824 17:37:33.311029 PCI: 00:08.0
1825 17:37:33.311137 PCI: 00:0a.0
1826 17:37:33.321238 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1827 17:37:33.327683 PCI: 00:0d.0 child on link 0 USB0 port 0
1828 17:37:33.337897 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1829 17:37:33.341074 USB0 port 0 child on link 0 USB3 port 0
1830 17:37:33.344330 USB3 port 0
1831 17:37:33.344417 USB3 port 1
1832 17:37:33.347949 USB3 port 2
1833 17:37:33.348035 USB3 port 3
1834 17:37:33.354132 PCI: 00:14.0 child on link 0 USB0 port 0
1835 17:37:33.364187 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1836 17:37:33.367593 USB0 port 0 child on link 0 USB2 port 0
1837 17:37:33.371129 USB2 port 0
1838 17:37:33.371243 USB2 port 1
1839 17:37:33.374590 USB2 port 2
1840 17:37:33.374673 USB2 port 3
1841 17:37:33.377520 USB2 port 4
1842 17:37:33.377631 USB2 port 5
1843 17:37:33.381398 USB2 port 6
1844 17:37:33.381485 USB2 port 7
1845 17:37:33.384488 USB2 port 8
1846 17:37:33.384574 USB2 port 9
1847 17:37:33.387594 USB3 port 0
1848 17:37:33.387683 USB3 port 1
1849 17:37:33.391351 USB3 port 2
1850 17:37:33.394559 USB3 port 3
1851 17:37:33.394642 PCI: 00:14.2
1852 17:37:33.404374 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1853 17:37:33.414314 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1854 17:37:33.421206 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1855 17:37:33.431327 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1856 17:37:33.431490 GENERIC: 0.0
1857 17:37:33.437540 PCI: 00:15.0 child on link 0 I2C: 00:1a
1858 17:37:33.448057 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1859 17:37:33.448198 I2C: 00:1a
1860 17:37:33.451064 I2C: 00:31
1861 17:37:33.451152 I2C: 00:32
1862 17:37:33.454630 PCI: 00:15.1 child on link 0 I2C: 00:50
1863 17:37:33.464634 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1864 17:37:33.467755 I2C: 00:50
1865 17:37:33.467879 PCI: 00:15.2
1866 17:37:33.474694 PCI: 00:15.3 child on link 0 I2C: 00:10
1867 17:37:33.484261 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1868 17:37:33.484396 I2C: 00:10
1869 17:37:33.487583 PCI: 00:16.0
1870 17:37:33.497495 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1871 17:37:33.497622 PCI: 00:19.0
1872 17:37:33.504237 PCI: 00:19.1 child on link 0 I2C: 00:15
1873 17:37:33.514009 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1874 17:37:33.514142 I2C: 00:15
1875 17:37:33.517623 I2C: 00:2c
1876 17:37:33.517712 PCI: 00:1e.0
1877 17:37:33.530853 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1878 17:37:33.533885 PCI: 00:1e.3 child on link 0 SPI: 00
1879 17:37:33.544414 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1880 17:37:33.544540 SPI: 00
1881 17:37:33.551185 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1882 17:37:33.557351 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1883 17:37:33.560900 PNP: 0c09.0
1884 17:37:33.567721 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1885 17:37:33.574062 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1886 17:37:33.584084 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1887 17:37:33.590729 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1888 17:37:33.597246 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1889 17:37:33.597336 GENERIC: 0.0
1890 17:37:33.600560 GENERIC: 1.0
1891 17:37:33.600646 PCI: 00:1f.3
1892 17:37:33.610866 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1893 17:37:33.623974 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1894 17:37:33.624093 PCI: 00:1f.5
1895 17:37:33.634122 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1896 17:37:33.637335 Done allocating resources.
1897 17:37:33.643554 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1898 17:37:33.650698 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1899 17:37:33.653606 Configure audio over I2S with MAX98373 NAU88L25B.
1900 17:37:33.657974 Enabling BT offload
1901 17:37:33.666040 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1902 17:37:33.668941 Enabling resources...
1903 17:37:33.672438 PCI: 00:00.0 subsystem <- 8086/4609
1904 17:37:33.675603 PCI: 00:00.0 cmd <- 06
1905 17:37:33.678878 PCI: 00:02.0 subsystem <- 8086/46b3
1906 17:37:33.682276 PCI: 00:02.0 cmd <- 03
1907 17:37:33.686090 PCI: 00:04.0 subsystem <- 8086/461d
1908 17:37:33.686173 PCI: 00:04.0 cmd <- 02
1909 17:37:33.689174 PCI: 00:06.0 bridge ctrl <- 0013
1910 17:37:33.692346 PCI: 00:06.0 subsystem <- 8086/464d
1911 17:37:33.696036 PCI: 00:06.0 cmd <- 106
1912 17:37:33.699101 PCI: 00:0a.0 subsystem <- 8086/467d
1913 17:37:33.702239 PCI: 00:0a.0 cmd <- 02
1914 17:37:33.705868 PCI: 00:0d.0 subsystem <- 8086/461e
1915 17:37:33.708859 PCI: 00:0d.0 cmd <- 02
1916 17:37:33.712206 PCI: 00:14.0 subsystem <- 8086/51ed
1917 17:37:33.715935 PCI: 00:14.0 cmd <- 02
1918 17:37:33.719261 PCI: 00:14.2 subsystem <- 8086/51ef
1919 17:37:33.719371 PCI: 00:14.2 cmd <- 02
1920 17:37:33.722341 PCI: 00:14.3 subsystem <- 8086/51f0
1921 17:37:33.725806 PCI: 00:14.3 cmd <- 02
1922 17:37:33.729210 PCI: 00:15.0 subsystem <- 8086/51e8
1923 17:37:33.732076 PCI: 00:15.0 cmd <- 02
1924 17:37:33.736038 PCI: 00:15.1 subsystem <- 8086/51e9
1925 17:37:33.739131 PCI: 00:15.1 cmd <- 06
1926 17:37:33.742297 PCI: 00:15.3 subsystem <- 8086/51eb
1927 17:37:33.746027 PCI: 00:15.3 cmd <- 02
1928 17:37:33.749168 PCI: 00:16.0 subsystem <- 8086/51e0
1929 17:37:33.749252 PCI: 00:16.0 cmd <- 02
1930 17:37:33.752290 PCI: 00:19.1 subsystem <- 8086/51c6
1931 17:37:33.755437 PCI: 00:19.1 cmd <- 02
1932 17:37:33.759115 PCI: 00:1e.0 subsystem <- 8086/51a8
1933 17:37:33.762565 PCI: 00:1e.0 cmd <- 06
1934 17:37:33.765734 PCI: 00:1e.3 subsystem <- 8086/51ab
1935 17:37:33.768908 PCI: 00:1e.3 cmd <- 02
1936 17:37:33.772035 PCI: 00:1f.0 subsystem <- 8086/5182
1937 17:37:33.775781 PCI: 00:1f.0 cmd <- 407
1938 17:37:33.779162 PCI: 00:1f.3 subsystem <- 8086/51c8
1939 17:37:33.779246 PCI: 00:1f.3 cmd <- 02
1940 17:37:33.782166 PCI: 00:1f.5 subsystem <- 8086/51a4
1941 17:37:33.785727 PCI: 00:1f.5 cmd <- 406
1942 17:37:33.789206 PCI: 01:00.0 cmd <- 02
1943 17:37:33.789289 done.
1944 17:37:33.795372 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1945 17:37:33.799224 ME: Version: Unavailable
1946 17:37:33.802321 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1947 17:37:33.806078 Initializing devices...
1948 17:37:33.806175 Root Device init
1949 17:37:33.809252 mainboard: EC init
1950 17:37:33.812433 Chrome EC: Set SMI mask to 0x0000000000000000
1951 17:37:33.815625 Chrome EC: UHEPI supported
1952 17:37:33.823945 Chrome EC: clear events_b mask to 0x0000000000000000
1953 17:37:33.830416 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1954 17:37:33.837408 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1955 17:37:33.843648 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1956 17:37:33.846971 Chrome EC: Set WAKE mask to 0x0000000000000000
1957 17:37:33.855756 Root Device init finished in 42 msecs
1958 17:37:33.855922 PCI: 00:00.0 init
1959 17:37:33.858954 CPU TDP = 15 Watts
1960 17:37:33.862136 CPU PL1 = 15 Watts
1961 17:37:33.862210 CPU PL2 = 55 Watts
1962 17:37:33.865758 CPU PL4 = 123 Watts
1963 17:37:33.869286 PCI: 00:00.0 init finished in 8 msecs
1964 17:37:33.872452 PCI: 00:02.0 init
1965 17:37:33.872536 GMA: Found VBT in CBFS
1966 17:37:33.875652 GMA: Found valid VBT in CBFS
1967 17:37:33.882561 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1968 17:37:33.889137 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1969 17:37:33.892244 PCI: 00:02.0 init finished in 18 msecs
1970 17:37:33.895932 PCI: 00:06.0 init
1971 17:37:33.898987 Initializing PCH PCIe bridge.
1972 17:37:33.902419 PCI: 00:06.0 init finished in 3 msecs
1973 17:37:33.902523 PCI: 00:0a.0 init
1974 17:37:33.909038 PCI: 00:0a.0 init finished in 0 msecs
1975 17:37:33.909133 PCI: 00:14.0 init
1976 17:37:33.912534 PCI: 00:14.0 init finished in 0 msecs
1977 17:37:33.915699 PCI: 00:14.2 init
1978 17:37:33.918865 PCI: 00:14.2 init finished in 0 msecs
1979 17:37:33.921999 PCI: 00:15.0 init
1980 17:37:33.922076 I2C bus 0 version 0x3230302a
1981 17:37:33.928995 DW I2C bus 0 at 0x80655000 (400 KHz)
1982 17:37:33.932004 PCI: 00:15.0 init finished in 6 msecs
1983 17:37:33.932121 PCI: 00:15.1 init
1984 17:37:33.935849 I2C bus 1 version 0x3230302a
1985 17:37:33.939022 DW I2C bus 1 at 0x80656000 (400 KHz)
1986 17:37:33.942173 PCI: 00:15.1 init finished in 6 msecs
1987 17:37:33.945522 PCI: 00:15.3 init
1988 17:37:33.949159 I2C bus 3 version 0x3230302a
1989 17:37:33.952642 DW I2C bus 3 at 0x80657000 (400 KHz)
1990 17:37:33.955464 PCI: 00:15.3 init finished in 6 msecs
1991 17:37:33.958749 PCI: 00:16.0 init
1992 17:37:33.962158 PCI: 00:16.0 init finished in 0 msecs
1993 17:37:33.962253 PCI: 00:19.1 init
1994 17:37:33.965461 I2C bus 5 version 0x3230302a
1995 17:37:33.968872 DW I2C bus 5 at 0x80659000 (400 KHz)
1996 17:37:33.975424 PCI: 00:19.1 init finished in 6 msecs
1997 17:37:33.975550 PCI: 00:1f.0 init
1998 17:37:33.978613 IOAPIC: Initializing IOAPIC at 0xfec00000
1999 17:37:33.982360 IOAPIC: ID = 0x02
2000 17:37:33.985480 IOAPIC: Dumping registers
2001 17:37:33.988575 reg 0x0000: 0x02000000
2002 17:37:33.988666 reg 0x0001: 0x00770020
2003 17:37:33.992341 reg 0x0002: 0x00000000
2004 17:37:33.995377 IOAPIC: 120 interrupts
2005 17:37:33.999124 IOAPIC: Clearing IOAPIC at 0xfec00000
2006 17:37:34.002221 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2007 17:37:34.008482 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2008 17:37:34.012159 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2009 17:37:34.018613 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2010 17:37:34.021908 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2011 17:37:34.028844 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2012 17:37:34.032069 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2013 17:37:34.035141 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2014 17:37:34.041502 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2015 17:37:34.045360 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2016 17:37:34.051988 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2017 17:37:34.054836 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2018 17:37:34.061856 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2019 17:37:34.065019 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2020 17:37:34.071854 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2021 17:37:34.075175 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2022 17:37:34.081611 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2023 17:37:34.084905 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2024 17:37:34.088285 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2025 17:37:34.094854 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2026 17:37:34.098317 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2027 17:37:34.105153 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2028 17:37:34.108313 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2029 17:37:34.115142 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2030 17:37:34.118294 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2031 17:37:34.121597 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2032 17:37:34.128530 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2033 17:37:34.131362 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2034 17:37:34.138538 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2035 17:37:34.141781 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2036 17:37:34.147966 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2037 17:37:34.151745 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2038 17:37:34.158555 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2039 17:37:34.161376 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2040 17:37:34.165156 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2041 17:37:34.171356 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2042 17:37:34.174658 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2043 17:37:34.181616 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2044 17:37:34.184763 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2045 17:37:34.191142 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2046 17:37:34.194591 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2047 17:37:34.201220 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2048 17:37:34.204374 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2049 17:37:34.207994 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2050 17:37:34.214316 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2051 17:37:34.218211 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2052 17:37:34.224490 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2053 17:37:34.228286 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2054 17:37:34.234682 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2055 17:37:34.237823 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2056 17:37:34.244349 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2057 17:37:34.247864 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2058 17:37:34.251098 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2059 17:37:34.258138 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2060 17:37:34.261360 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2061 17:37:34.267304 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2062 17:37:34.270868 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2063 17:37:34.277795 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2064 17:37:34.281003 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2065 17:37:34.287691 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2066 17:37:34.290764 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2067 17:37:34.294552 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2068 17:37:34.301310 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2069 17:37:34.304223 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2070 17:37:34.310882 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2071 17:37:34.313869 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2072 17:37:34.320882 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2073 17:37:34.323972 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2074 17:37:34.330542 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2075 17:37:34.334333 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2076 17:37:34.337457 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2077 17:37:34.344416 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2078 17:37:34.347639 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2079 17:37:34.353918 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2080 17:37:34.357610 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2081 17:37:34.363848 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2082 17:37:34.367040 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2083 17:37:34.373855 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2084 17:37:34.377201 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2085 17:37:34.380817 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2086 17:37:34.387212 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2087 17:37:34.390302 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2088 17:37:34.397286 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2089 17:37:34.400264 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2090 17:37:34.407062 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2091 17:37:34.410042 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2092 17:37:34.417002 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2093 17:37:34.420152 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2094 17:37:34.423860 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2095 17:37:34.430013 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2096 17:37:34.433368 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2097 17:37:34.439957 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2098 17:37:34.443241 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2099 17:37:34.450317 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2100 17:37:34.453520 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2101 17:37:34.460384 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2102 17:37:34.463443 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2103 17:37:34.466675 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2104 17:37:34.473491 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2105 17:37:34.477046 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2106 17:37:34.483586 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2107 17:37:34.486840 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2108 17:37:34.493746 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2109 17:37:34.496797 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2110 17:37:34.503123 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2111 17:37:34.506297 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2112 17:37:34.510007 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2113 17:37:34.516770 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2114 17:37:34.519878 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2115 17:37:34.526172 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2116 17:37:34.529929 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2117 17:37:34.536269 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2118 17:37:34.539727 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2119 17:37:34.546505 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2120 17:37:34.549622 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2121 17:37:34.553085 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2122 17:37:34.560027 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2123 17:37:34.563547 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2124 17:37:34.569802 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2125 17:37:34.573077 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2126 17:37:34.576803 IOAPIC: Bootstrap Processor Local APIC = 0x00
2127 17:37:34.583225 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2128 17:37:34.586642 PCI: 00:1f.0 init finished in 607 msecs
2129 17:37:34.589504 PCI: 00:1f.2 init
2130 17:37:34.593660 apm_control: Disabling ACPI.
2131 17:37:34.596701 APMC done.
2132 17:37:34.600104 PCI: 00:1f.2 init finished in 6 msecs
2133 17:37:34.600212 PCI: 00:1f.3 init
2134 17:37:34.606972 PCI: 00:1f.3 init finished in 0 msecs
2135 17:37:34.607090 PCI: 01:00.0 init
2136 17:37:34.609975 PCI: 01:00.0 init finished in 0 msecs
2137 17:37:34.613527 PNP: 0c09.0 init
2138 17:37:34.616602 Google Chrome EC uptime: 12.048 seconds
2139 17:37:34.620352 Google Chrome AP resets since EC boot: 1
2140 17:37:34.626711 Google Chrome most recent AP reset causes:
2141 17:37:34.629844 0.340: 32775 shutdown: entering G3
2142 17:37:34.636771 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2143 17:37:34.639971 PNP: 0c09.0 init finished in 23 msecs
2144 17:37:34.640057 GENERIC: 0.0 init
2145 17:37:34.646668 GENERIC: 0.0 init finished in 0 msecs
2146 17:37:34.646756 GENERIC: 1.0 init
2147 17:37:34.650211 GENERIC: 1.0 init finished in 0 msecs
2148 17:37:34.653369 Devices initialized
2149 17:37:34.656586 Show all devs... After init.
2150 17:37:34.660226 Root Device: enabled 1
2151 17:37:34.660309 CPU_CLUSTER: 0: enabled 1
2152 17:37:34.663162 DOMAIN: 0000: enabled 1
2153 17:37:34.666686 GPIO: 0: enabled 1
2154 17:37:34.666767 PCI: 00:00.0: enabled 1
2155 17:37:34.670411 PCI: 00:01.0: enabled 0
2156 17:37:34.673122 PCI: 00:01.1: enabled 0
2157 17:37:34.676352 PCI: 00:02.0: enabled 1
2158 17:37:34.676458 PCI: 00:04.0: enabled 1
2159 17:37:34.680146 PCI: 00:05.0: enabled 0
2160 17:37:34.683300 PCI: 00:06.0: enabled 1
2161 17:37:34.686604 PCI: 00:06.2: enabled 0
2162 17:37:34.686759 PCI: 00:07.0: enabled 0
2163 17:37:34.690248 PCI: 00:07.1: enabled 0
2164 17:37:34.693336 PCI: 00:07.2: enabled 0
2165 17:37:34.693417 PCI: 00:07.3: enabled 0
2166 17:37:34.696679 PCI: 00:08.0: enabled 0
2167 17:37:34.699961 PCI: 00:09.0: enabled 0
2168 17:37:34.703301 PCI: 00:0a.0: enabled 1
2169 17:37:34.703410 PCI: 00:0d.0: enabled 1
2170 17:37:34.706978 PCI: 00:0d.1: enabled 0
2171 17:37:34.709808 PCI: 00:0d.2: enabled 0
2172 17:37:34.713619 PCI: 00:0d.3: enabled 0
2173 17:37:34.713727 PCI: 00:0e.0: enabled 0
2174 17:37:34.716318 PCI: 00:10.0: enabled 0
2175 17:37:34.719928 PCI: 00:10.1: enabled 0
2176 17:37:34.723335 PCI: 00:10.6: enabled 0
2177 17:37:34.723497 PCI: 00:10.7: enabled 0
2178 17:37:34.726532 PCI: 00:12.0: enabled 0
2179 17:37:34.730449 PCI: 00:12.6: enabled 0
2180 17:37:34.730536 PCI: 00:12.7: enabled 0
2181 17:37:34.732932 PCI: 00:13.0: enabled 0
2182 17:37:34.736765 PCI: 00:14.0: enabled 1
2183 17:37:34.739894 PCI: 00:14.1: enabled 0
2184 17:37:34.739978 PCI: 00:14.2: enabled 1
2185 17:37:34.742962 PCI: 00:14.3: enabled 1
2186 17:37:34.746665 PCI: 00:15.0: enabled 1
2187 17:37:34.749782 PCI: 00:15.1: enabled 1
2188 17:37:34.749866 PCI: 00:15.2: enabled 0
2189 17:37:34.753326 PCI: 00:15.3: enabled 1
2190 17:37:34.756409 PCI: 00:16.0: enabled 1
2191 17:37:34.759440 PCI: 00:16.1: enabled 0
2192 17:37:34.759539 PCI: 00:16.2: enabled 0
2193 17:37:34.763336 PCI: 00:16.3: enabled 0
2194 17:37:34.766406 PCI: 00:16.4: enabled 0
2195 17:37:34.769550 PCI: 00:16.5: enabled 0
2196 17:37:34.769666 PCI: 00:17.0: enabled 0
2197 17:37:34.772871 PCI: 00:19.0: enabled 0
2198 17:37:34.776493 PCI: 00:19.1: enabled 1
2199 17:37:34.776577 PCI: 00:19.2: enabled 0
2200 17:37:34.779380 PCI: 00:1a.0: enabled 0
2201 17:37:34.782667 PCI: 00:1c.0: enabled 0
2202 17:37:34.786166 PCI: 00:1c.1: enabled 0
2203 17:37:34.786252 PCI: 00:1c.2: enabled 0
2204 17:37:34.790028 PCI: 00:1c.3: enabled 0
2205 17:37:34.793135 PCI: 00:1c.4: enabled 0
2206 17:37:34.796281 PCI: 00:1c.5: enabled 0
2207 17:37:34.796365 PCI: 00:1c.6: enabled 0
2208 17:37:34.799492 PCI: 00:1c.7: enabled 0
2209 17:37:34.802759 PCI: 00:1d.0: enabled 0
2210 17:37:34.806317 PCI: 00:1d.1: enabled 0
2211 17:37:34.806425 PCI: 00:1d.2: enabled 0
2212 17:37:34.809622 PCI: 00:1d.3: enabled 0
2213 17:37:34.812976 PCI: 00:1e.0: enabled 1
2214 17:37:34.813087 PCI: 00:1e.1: enabled 0
2215 17:37:34.816290 PCI: 00:1e.2: enabled 0
2216 17:37:34.819631 PCI: 00:1e.3: enabled 1
2217 17:37:34.823160 PCI: 00:1f.0: enabled 1
2218 17:37:34.823268 PCI: 00:1f.1: enabled 0
2219 17:37:34.826213 PCI: 00:1f.2: enabled 1
2220 17:37:34.829865 PCI: 00:1f.3: enabled 1
2221 17:37:34.832773 PCI: 00:1f.4: enabled 0
2222 17:37:34.832922 PCI: 00:1f.5: enabled 1
2223 17:37:34.836098 PCI: 00:1f.6: enabled 0
2224 17:37:34.839757 PCI: 00:1f.7: enabled 0
2225 17:37:34.842979 GENERIC: 0.0: enabled 1
2226 17:37:34.843087 GENERIC: 0.0: enabled 1
2227 17:37:34.846114 GENERIC: 1.0: enabled 1
2228 17:37:34.849327 GENERIC: 0.0: enabled 1
2229 17:37:34.853118 GENERIC: 1.0: enabled 1
2230 17:37:34.853238 USB0 port 0: enabled 1
2231 17:37:34.856253 USB0 port 0: enabled 1
2232 17:37:34.859230 GENERIC: 0.0: enabled 1
2233 17:37:34.859324 I2C: 00:1a: enabled 1
2234 17:37:34.863011 I2C: 00:31: enabled 1
2235 17:37:34.866182 I2C: 00:32: enabled 1
2236 17:37:34.866274 I2C: 00:50: enabled 1
2237 17:37:34.869258 I2C: 00:10: enabled 1
2238 17:37:34.872521 I2C: 00:15: enabled 1
2239 17:37:34.872608 I2C: 00:2c: enabled 1
2240 17:37:34.876226 GENERIC: 0.0: enabled 1
2241 17:37:34.879291 SPI: 00: enabled 1
2242 17:37:34.879396 PNP: 0c09.0: enabled 1
2243 17:37:34.882509 GENERIC: 0.0: enabled 1
2244 17:37:34.886183 USB3 port 0: enabled 1
2245 17:37:34.889020 USB3 port 1: enabled 0
2246 17:37:34.889137 USB3 port 2: enabled 1
2247 17:37:34.892620 USB3 port 3: enabled 0
2248 17:37:34.895839 USB2 port 0: enabled 1
2249 17:37:34.895950 USB2 port 1: enabled 0
2250 17:37:34.899139 USB2 port 2: enabled 1
2251 17:37:34.902952 USB2 port 3: enabled 0
2252 17:37:34.906152 USB2 port 4: enabled 0
2253 17:37:34.906236 USB2 port 5: enabled 1
2254 17:37:34.909330 USB2 port 6: enabled 0
2255 17:37:34.912487 USB2 port 7: enabled 0
2256 17:37:34.912571 USB2 port 8: enabled 1
2257 17:37:34.915590 USB2 port 9: enabled 1
2258 17:37:34.919242 USB3 port 0: enabled 1
2259 17:37:34.919355 USB3 port 1: enabled 0
2260 17:37:34.922829 USB3 port 2: enabled 0
2261 17:37:34.925668 USB3 port 3: enabled 0
2262 17:37:34.929260 GENERIC: 0.0: enabled 1
2263 17:37:34.929371 GENERIC: 1.0: enabled 1
2264 17:37:34.932400 APIC: 00: enabled 1
2265 17:37:34.935601 APIC: 16: enabled 1
2266 17:37:34.935684 APIC: 10: enabled 1
2267 17:37:34.939002 APIC: 12: enabled 1
2268 17:37:34.939125 APIC: 14: enabled 1
2269 17:37:34.942599 APIC: 01: enabled 1
2270 17:37:34.945743 APIC: 09: enabled 1
2271 17:37:34.945823 APIC: 08: enabled 1
2272 17:37:34.949003 PCI: 01:00.0: enabled 1
2273 17:37:34.955399 BS: BS_DEV_INIT run times (exec / console): 13 / 1133 ms
2274 17:37:34.958931 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2275 17:37:34.962260 ELOG: NV offset 0xf20000 size 0x4000
2276 17:37:34.970298 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2277 17:37:34.977200 ELOG: Event(17) added with size 13 at 2024-05-17 17:37:35 UTC
2278 17:37:34.983603 ELOG: Event(9E) added with size 10 at 2024-05-17 17:37:35 UTC
2279 17:37:34.990447 ELOG: Event(9F) added with size 14 at 2024-05-17 17:37:35 UTC
2280 17:37:34.996754 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2281 17:37:35.003972 ELOG: Event(A0) added with size 9 at 2024-05-17 17:37:35 UTC
2282 17:37:35.007183 elog_add_boot_reason: Logged dev mode boot
2283 17:37:35.013491 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2284 17:37:35.013621 Finalize devices...
2285 17:37:35.017316 PCI: 00:16.0 final
2286 17:37:35.020514 PCI: 00:1f.2 final
2287 17:37:35.020597 GENERIC: 0.0 final
2288 17:37:35.026959 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2289 17:37:35.030454 GENERIC: 1.0 final
2290 17:37:35.033840 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2291 17:37:35.037226 Devices finalized
2292 17:37:35.043484 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2293 17:37:35.047391 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2294 17:37:35.053574 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2295 17:37:35.056985 ME: HFSTS1 : 0x90000245
2296 17:37:35.063791 ME: HFSTS2 : 0x82100116
2297 17:37:35.067079 ME: HFSTS3 : 0x00000050
2298 17:37:35.070095 ME: HFSTS4 : 0x00004000
2299 17:37:35.076849 ME: HFSTS5 : 0x00000000
2300 17:37:35.080182 ME: HFSTS6 : 0x40600006
2301 17:37:35.083719 ME: Manufacturing Mode : NO
2302 17:37:35.087183 ME: SPI Protection Mode Enabled : YES
2303 17:37:35.093844 ME: FPFs Committed : YES
2304 17:37:35.097015 ME: Manufacturing Vars Locked : YES
2305 17:37:35.100035 ME: FW Partition Table : OK
2306 17:37:35.103781 ME: Bringup Loader Failure : NO
2307 17:37:35.106960 ME: Firmware Init Complete : YES
2308 17:37:35.110119 ME: Boot Options Present : NO
2309 17:37:35.113891 ME: Update In Progress : NO
2310 17:37:35.116740 ME: D0i3 Support : YES
2311 17:37:35.123629 ME: Low Power State Enabled : NO
2312 17:37:35.126842 ME: CPU Replaced : YES
2313 17:37:35.130051 ME: CPU Replacement Valid : YES
2314 17:37:35.133215 ME: Current Working State : 5
2315 17:37:35.136905 ME: Current Operation State : 1
2316 17:37:35.140053 ME: Current Operation Mode : 0
2317 17:37:35.143400 ME: Error Code : 0
2318 17:37:35.146892 ME: Enhanced Debug Mode : NO
2319 17:37:35.149988 ME: CPU Debug Disabled : YES
2320 17:37:35.156392 ME: TXT Support : NO
2321 17:37:35.160086 ME: WP for RO is enabled : YES
2322 17:37:35.166856 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2323 17:37:35.169896 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2324 17:37:35.176687 Ramoops buffer: 0x100000@0x76899000.
2325 17:37:35.179683 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2326 17:37:35.186305 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2327 17:37:35.189867 CBFS: 'fallback/slic' not found.
2328 17:37:35.196727 ACPI: Writing ACPI tables at 7686d000.
2329 17:37:35.196830 ACPI: * FACS
2330 17:37:35.200199 ACPI: * DSDT
2331 17:37:35.206877 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2332 17:37:35.209954 ACPI: * FADT
2333 17:37:35.210053 SCI is IRQ9
2334 17:37:35.213881 ACPI: added table 1/32, length now 40
2335 17:37:35.216936 ACPI: * SSDT
2336 17:37:35.219848 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2337 17:37:35.227314 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2338 17:37:35.230202 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2339 17:37:35.233521 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2340 17:37:35.240402 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2341 17:37:35.247352 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2342 17:37:35.253977 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2343 17:37:35.257435 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2344 17:37:35.263832 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2345 17:37:35.266881 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2346 17:37:35.273646 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2347 17:37:35.276811 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2348 17:37:35.283558 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2349 17:37:35.287046 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2350 17:37:35.294337 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2351 17:37:35.297512 PS2K: Passing 80 keymaps to kernel
2352 17:37:35.304311 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2353 17:37:35.310686 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2354 17:37:35.317733 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2355 17:37:35.323878 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2356 17:37:35.327823 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2357 17:37:35.334053 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2358 17:37:35.340558 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2359 17:37:35.347631 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2360 17:37:35.354175 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2361 17:37:35.360924 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2362 17:37:35.363964 ACPI: added table 2/32, length now 44
2363 17:37:35.367369 ACPI: * MCFG
2364 17:37:35.370894 ACPI: added table 3/32, length now 48
2365 17:37:35.370997 ACPI: * TPM2
2366 17:37:35.373781 TPM2 log created at 0x7685d000
2367 17:37:35.377491 ACPI: added table 4/32, length now 52
2368 17:37:35.380671 ACPI: * LPIT
2369 17:37:35.383876 ACPI: added table 5/32, length now 56
2370 17:37:35.387490 ACPI: * MADT
2371 17:37:35.387593 SCI is IRQ9
2372 17:37:35.413983 ACPI: added table 6/32, length now 60
2373 17:37:35.414189 cmd_reg from pmc_make_ipc_cmd 1052838
2374 17:37:35.414339 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2375 17:37:35.414455 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2376 17:37:35.414567 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2377 17:37:35.416831 PMC CrashLog size in discovery mode: 0xC00
2378 17:37:35.420473 cpu crashlog bar addr: 0x80640000
2379 17:37:35.423763 cpu discovery table offset: 0x6030
2380 17:37:35.430304 cpu_crashlog_discovery_table buffer count: 0x3
2381 17:37:35.437191 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2382 17:37:35.443565 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2383 17:37:35.450565 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2384 17:37:35.453745 PMC crashLog size in discovery mode : 0xC00
2385 17:37:35.460368 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2386 17:37:35.463604 discover mode PMC crashlog size adjusted to: 0x200
2387 17:37:35.473512 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2388 17:37:35.477017 discover mode PMC crashlog size adjusted to: 0x0
2389 17:37:35.479997 m_cpu_crashLog_size : 0x3480 bytes
2390 17:37:35.483600 CPU crashLog present.
2391 17:37:35.487240 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2392 17:37:35.493549 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2393 17:37:35.496720 current = 76876550
2394 17:37:35.496825 ACPI: * DMAR
2395 17:37:35.503927 ACPI: added table 7/32, length now 64
2396 17:37:35.506706 ACPI: added table 8/32, length now 68
2397 17:37:35.506811 ACPI: * HPET
2398 17:37:35.510411 ACPI: added table 9/32, length now 72
2399 17:37:35.513601 ACPI: done.
2400 17:37:35.516696 ACPI tables: 38528 bytes.
2401 17:37:35.520402 smbios_write_tables: 76857000
2402 17:37:35.524274 EC returned error result code 3
2403 17:37:35.527319 Couldn't obtain OEM name from CBI
2404 17:37:35.530434 Create SMBIOS type 16
2405 17:37:35.534121 Create SMBIOS type 17
2406 17:37:35.534204 Create SMBIOS type 20
2407 17:37:35.537296 GENERIC: 0.0 (WIFI Device)
2408 17:37:35.540758 SMBIOS tables: 2156 bytes.
2409 17:37:35.543649 Writing table forward entry at 0x00000500
2410 17:37:35.550706 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2411 17:37:35.553878 Writing coreboot table at 0x76891000
2412 17:37:35.560721 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2413 17:37:35.563813 1. 0000000000001000-000000000009ffff: RAM
2414 17:37:35.570630 2. 00000000000a0000-00000000000fffff: RESERVED
2415 17:37:35.574015 3. 0000000000100000-0000000076856fff: RAM
2416 17:37:35.580189 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2417 17:37:35.583596 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2418 17:37:35.590535 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2419 17:37:35.596806 7. 0000000077000000-00000000803fffff: RESERVED
2420 17:37:35.600546 8. 00000000c0000000-00000000cfffffff: RESERVED
2421 17:37:35.603751 9. 00000000f8000000-00000000f9ffffff: RESERVED
2422 17:37:35.610051 10. 00000000fb000000-00000000fb000fff: RESERVED
2423 17:37:35.613478 11. 00000000fc800000-00000000fe7fffff: RESERVED
2424 17:37:35.620186 12. 00000000feb00000-00000000feb7ffff: RESERVED
2425 17:37:35.623276 13. 00000000fec00000-00000000fecfffff: RESERVED
2426 17:37:35.630065 14. 00000000fed40000-00000000fed6ffff: RESERVED
2427 17:37:35.633924 15. 00000000fed80000-00000000fed87fff: RESERVED
2428 17:37:35.637082 16. 00000000fed90000-00000000fed92fff: RESERVED
2429 17:37:35.643709 17. 00000000feda0000-00000000feda1fff: RESERVED
2430 17:37:35.647092 18. 00000000fedc0000-00000000feddffff: RESERVED
2431 17:37:35.653252 19. 0000000100000000-000000027fbfffff: RAM
2432 17:37:35.653337 Passing 4 GPIOs to payload:
2433 17:37:35.659957 NAME | PORT | POLARITY | VALUE
2434 17:37:35.666866 lid | undefined | high | high
2435 17:37:35.669991 power | undefined | high | low
2436 17:37:35.676954 oprom | undefined | high | low
2437 17:37:35.680002 EC in RW | 0x00000151 | high | high
2438 17:37:35.683495 Board ID: 3
2439 17:37:35.683606 FW config: 0x131
2440 17:37:35.690142 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 2007
2441 17:37:35.693460 coreboot table: 1788 bytes.
2442 17:37:35.696913 IMD ROOT 0. 0x76fff000 0x00001000
2443 17:37:35.700273 IMD SMALL 1. 0x76ffe000 0x00001000
2444 17:37:35.703389 FSP MEMORY 2. 0x76afe000 0x00500000
2445 17:37:35.710390 CONSOLE 3. 0x76ade000 0x00020000
2446 17:37:35.713545 RW MCACHE 4. 0x76add000 0x0000043c
2447 17:37:35.717255 RO MCACHE 5. 0x76adc000 0x00000fd8
2448 17:37:35.720200 FMAP 6. 0x76adb000 0x0000064a
2449 17:37:35.723720 TIME STAMP 7. 0x76ada000 0x00000910
2450 17:37:35.726683 VBOOT WORK 8. 0x76ac6000 0x00014000
2451 17:37:35.730317 MEM INFO 9. 0x76ac5000 0x000003b8
2452 17:37:35.733397 ROMSTG STCK10. 0x76ac4000 0x00001000
2453 17:37:35.737028 AFTER CAR 11. 0x76ab8000 0x0000c000
2454 17:37:35.743936 RAMSTAGE 12. 0x76a2e000 0x0008a000
2455 17:37:35.747067 ACPI BERT 13. 0x76a1e000 0x00010000
2456 17:37:35.750317 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2457 17:37:35.753937 REFCODE 15. 0x769ae000 0x0006f000
2458 17:37:35.756900 SMM BACKUP 16. 0x7699e000 0x00010000
2459 17:37:35.760431 IGD OPREGION17. 0x76999000 0x00004203
2460 17:37:35.763747 RAMOOPS 18. 0x76899000 0x00100000
2461 17:37:35.767352 COREBOOT 19. 0x76891000 0x00008000
2462 17:37:35.773628 ACPI 20. 0x7686d000 0x00024000
2463 17:37:35.776827 TPM2 TCGLOG21. 0x7685d000 0x00010000
2464 17:37:35.780623 PMC CRASHLOG22. 0x7685c000 0x00000c00
2465 17:37:35.783787 CPU CRASHLOG23. 0x76858000 0x00003480
2466 17:37:35.787069 SMBIOS 24. 0x76857000 0x00001000
2467 17:37:35.790106 IMD small region:
2468 17:37:35.793838 IMD ROOT 0. 0x76ffec00 0x00000400
2469 17:37:35.796897 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2470 17:37:35.800470 VPD 2. 0x76ffeb60 0x0000006c
2471 17:37:35.803957 POWER STATE 3. 0x76ffeb00 0x00000044
2472 17:37:35.810444 ROMSTAGE 4. 0x76ffeae0 0x00000004
2473 17:37:35.813748 ACPI GNVS 5. 0x76ffea80 0x00000048
2474 17:37:35.816695 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2475 17:37:35.823989 BS: BS_WRITE_TABLES run times (exec / console): 8 / 628 ms
2476 17:37:35.827003 MTRR: Physical address space:
2477 17:37:35.833566 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2478 17:37:35.836875 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2479 17:37:35.843138 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2480 17:37:35.849972 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2481 17:37:35.856639 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2482 17:37:35.863564 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2483 17:37:35.870002 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2484 17:37:35.873482 MTRR: Fixed MSR 0x250 0x0606060606060606
2485 17:37:35.876598 MTRR: Fixed MSR 0x258 0x0606060606060606
2486 17:37:35.883403 MTRR: Fixed MSR 0x259 0x0000000000000000
2487 17:37:35.886433 MTRR: Fixed MSR 0x268 0x0606060606060606
2488 17:37:35.890261 MTRR: Fixed MSR 0x269 0x0606060606060606
2489 17:37:35.893366 MTRR: Fixed MSR 0x26a 0x0606060606060606
2490 17:37:35.896472 MTRR: Fixed MSR 0x26b 0x0606060606060606
2491 17:37:35.903353 MTRR: Fixed MSR 0x26c 0x0606060606060606
2492 17:37:35.906290 MTRR: Fixed MSR 0x26d 0x0606060606060606
2493 17:37:35.909806 MTRR: Fixed MSR 0x26e 0x0606060606060606
2494 17:37:35.913382 MTRR: Fixed MSR 0x26f 0x0606060606060606
2495 17:37:35.917702 call enable_fixed_mtrr()
2496 17:37:35.920811 CPU physical address size: 39 bits
2497 17:37:35.927691 MTRR: default type WB/UC MTRR counts: 6/6.
2498 17:37:35.931058 MTRR: UC selected as default type.
2499 17:37:35.937946 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2500 17:37:35.940963 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2501 17:37:35.947725 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2502 17:37:35.954597 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2503 17:37:35.961293 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2504 17:37:35.967654 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2505 17:37:35.974447 MTRR: Fixed MSR 0x250 0x0606060606060606
2506 17:37:35.977345 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 17:37:35.980677 MTRR: Fixed MSR 0x259 0x0000000000000000
2508 17:37:35.984455 MTRR: Fixed MSR 0x268 0x0606060606060606
2509 17:37:35.990658 MTRR: Fixed MSR 0x269 0x0606060606060606
2510 17:37:35.994340 MTRR: Fixed MSR 0x26a 0x0606060606060606
2511 17:37:35.997559 MTRR: Fixed MSR 0x26b 0x0606060606060606
2512 17:37:36.000710 MTRR: Fixed MSR 0x26c 0x0606060606060606
2513 17:37:36.003954 MTRR: Fixed MSR 0x26d 0x0606060606060606
2514 17:37:36.010881 MTRR: Fixed MSR 0x26e 0x0606060606060606
2515 17:37:36.014039 MTRR: Fixed MSR 0x26f 0x0606060606060606
2516 17:37:36.017471 MTRR: Fixed MSR 0x250 0x0606060606060606
2517 17:37:36.021001 call enable_fixed_mtrr()
2518 17:37:36.023888 MTRR: Fixed MSR 0x250 0x0606060606060606
2519 17:37:36.030907 MTRR: Fixed MSR 0x250 0x0606060606060606
2520 17:37:36.034340 MTRR: Fixed MSR 0x250 0x0606060606060606
2521 17:37:36.037387 MTRR: Fixed MSR 0x258 0x0606060606060606
2522 17:37:36.040913 MTRR: Fixed MSR 0x259 0x0000000000000000
2523 17:37:36.047414 MTRR: Fixed MSR 0x268 0x0606060606060606
2524 17:37:36.050604 MTRR: Fixed MSR 0x269 0x0606060606060606
2525 17:37:36.053892 MTRR: Fixed MSR 0x26a 0x0606060606060606
2526 17:37:36.057582 MTRR: Fixed MSR 0x26b 0x0606060606060606
2527 17:37:36.060608 MTRR: Fixed MSR 0x26c 0x0606060606060606
2528 17:37:36.067235 MTRR: Fixed MSR 0x26d 0x0606060606060606
2529 17:37:36.071057 MTRR: Fixed MSR 0x26e 0x0606060606060606
2530 17:37:36.074296 MTRR: Fixed MSR 0x26f 0x0606060606060606
2531 17:37:36.077389 MTRR: Fixed MSR 0x250 0x0606060606060606
2532 17:37:36.080551 call enable_fixed_mtrr()
2533 17:37:36.084205 MTRR: Fixed MSR 0x258 0x0606060606060606
2534 17:37:36.087489 CPU physical address size: 39 bits
2535 17:37:36.094144 MTRR: Fixed MSR 0x258 0x0606060606060606
2536 17:37:36.097248 MTRR: Fixed MSR 0x258 0x0606060606060606
2537 17:37:36.100392 MTRR: Fixed MSR 0x250 0x0606060606060606
2538 17:37:36.104263 MTRR: Fixed MSR 0x259 0x0000000000000000
2539 17:37:36.110494 MTRR: Fixed MSR 0x268 0x0606060606060606
2540 17:37:36.113825 MTRR: Fixed MSR 0x269 0x0606060606060606
2541 17:37:36.117481 MTRR: Fixed MSR 0x258 0x0606060606060606
2542 17:37:36.120825 MTRR: Fixed MSR 0x259 0x0000000000000000
2543 17:37:36.123800 MTRR: Fixed MSR 0x268 0x0606060606060606
2544 17:37:36.130855 MTRR: Fixed MSR 0x269 0x0606060606060606
2545 17:37:36.133780 MTRR: Fixed MSR 0x26a 0x0606060606060606
2546 17:37:36.137411 MTRR: Fixed MSR 0x26b 0x0606060606060606
2547 17:37:36.140318 MTRR: Fixed MSR 0x26c 0x0606060606060606
2548 17:37:36.146917 MTRR: Fixed MSR 0x26d 0x0606060606060606
2549 17:37:36.150550 MTRR: Fixed MSR 0x26e 0x0606060606060606
2550 17:37:36.153710 MTRR: Fixed MSR 0x26f 0x0606060606060606
2551 17:37:36.156896 CPU physical address size: 39 bits
2552 17:37:36.160680 call enable_fixed_mtrr()
2553 17:37:36.163650 MTRR: Fixed MSR 0x259 0x0000000000000000
2554 17:37:36.166925 CPU physical address size: 39 bits
2555 17:37:36.170489 MTRR: Fixed MSR 0x26a 0x0606060606060606
2556 17:37:36.176949 MTRR: Fixed MSR 0x259 0x0000000000000000
2557 17:37:36.180239 MTRR: Fixed MSR 0x268 0x0606060606060606
2558 17:37:36.183871 MTRR: Fixed MSR 0x269 0x0606060606060606
2559 17:37:36.186960 MTRR: Fixed MSR 0x26a 0x0606060606060606
2560 17:37:36.193984 MTRR: Fixed MSR 0x26b 0x0606060606060606
2561 17:37:36.196814 MTRR: Fixed MSR 0x26c 0x0606060606060606
2562 17:37:36.200204 MTRR: Fixed MSR 0x26d 0x0606060606060606
2563 17:37:36.203909 MTRR: Fixed MSR 0x26e 0x0606060606060606
2564 17:37:36.210252 MTRR: Fixed MSR 0x26f 0x0606060606060606
2565 17:37:36.213873 MTRR: Fixed MSR 0x268 0x0606060606060606
2566 17:37:36.217041 call enable_fixed_mtrr()
2567 17:37:36.220181 MTRR: Fixed MSR 0x269 0x0606060606060606
2568 17:37:36.224031 CPU physical address size: 39 bits
2569 17:37:36.227161 MTRR: Fixed MSR 0x26a 0x0606060606060606
2570 17:37:36.230299 MTRR: Fixed MSR 0x258 0x0606060606060606
2571 17:37:36.236706 MTRR: Fixed MSR 0x26b 0x0606060606060606
2572 17:37:36.240072 MTRR: Fixed MSR 0x26c 0x0606060606060606
2573 17:37:36.243869 MTRR: Fixed MSR 0x26d 0x0606060606060606
2574 17:37:36.246745 MTRR: Fixed MSR 0x26e 0x0606060606060606
2575 17:37:36.250083 MTRR: Fixed MSR 0x26f 0x0606060606060606
2576 17:37:36.257015 MTRR: Fixed MSR 0x26b 0x0606060606060606
2577 17:37:36.257129 call enable_fixed_mtrr()
2578 17:37:36.263345 MTRR: Fixed MSR 0x259 0x0000000000000000
2579 17:37:36.267109 CPU physical address size: 39 bits
2580 17:37:36.270143 MTRR: Fixed MSR 0x268 0x0606060606060606
2581 17:37:36.273827 MTRR: Fixed MSR 0x26c 0x0606060606060606
2582 17:37:36.276785 MTRR: Fixed MSR 0x269 0x0606060606060606
2583 17:37:36.283805 MTRR: Fixed MSR 0x26d 0x0606060606060606
2584 17:37:36.286594 MTRR: Fixed MSR 0x26e 0x0606060606060606
2585 17:37:36.290134 MTRR: Fixed MSR 0x26f 0x0606060606060606
2586 17:37:36.293298 MTRR: Fixed MSR 0x26a 0x0606060606060606
2587 17:37:36.297074 call enable_fixed_mtrr()
2588 17:37:36.300331 MTRR: Fixed MSR 0x26b 0x0606060606060606
2589 17:37:36.306649 MTRR: Fixed MSR 0x26c 0x0606060606060606
2590 17:37:36.310338 MTRR: Fixed MSR 0x26d 0x0606060606060606
2591 17:37:36.313932 MTRR: Fixed MSR 0x26e 0x0606060606060606
2592 17:37:36.317139 MTRR: Fixed MSR 0x26f 0x0606060606060606
2593 17:37:36.320443 CPU physical address size: 39 bits
2594 17:37:36.323555 call enable_fixed_mtrr()
2595 17:37:36.326805 CPU physical address size: 39 bits
2596 17:37:36.330563
2597 17:37:36.330637 MTRR check
2598 17:37:36.334340 Fixed MTRRs : Enabled
2599 17:37:36.334414 Variable MTRRs: Enabled
2600 17:37:36.334474
2601 17:37:36.340486 BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms
2602 17:37:36.344295 Checking cr50 for pending updates
2603 17:37:36.356275 Reading cr50 TPM mode
2604 17:37:36.371703 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2605 17:37:36.381807 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2606 17:37:36.384942 Checking segment from ROM address 0xf96cbe6c
2607 17:37:36.388407 Checking segment from ROM address 0xf96cbe88
2608 17:37:36.394873 Loading segment from ROM address 0xf96cbe6c
2609 17:37:36.394960 code (compression=1)
2610 17:37:36.404555 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2611 17:37:36.411409 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2612 17:37:36.414415 using LZMA
2613 17:37:36.437518 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2614 17:37:36.444399 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2615 17:37:36.452082 Loading segment from ROM address 0xf96cbe88
2616 17:37:36.455884 Entry Point 0x30000000
2617 17:37:36.455995 Loaded segments
2618 17:37:36.462044 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2619 17:37:36.468871 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2620 17:37:36.472306 Finalizing chipset.
2621 17:37:36.472398 apm_control: Finalizing SMM.
2622 17:37:36.475700 APMC done.
2623 17:37:36.479035 HECI: CSE device 16.1 is disabled
2624 17:37:36.482267 HECI: CSE device 16.2 is disabled
2625 17:37:36.485458 HECI: CSE device 16.3 is disabled
2626 17:37:36.488888 HECI: CSE device 16.4 is disabled
2627 17:37:36.492429 HECI: CSE device 16.5 is disabled
2628 17:37:36.495382 HECI: Sending End-of-Post
2629 17:37:36.503964 CSE: EOP requested action: continue boot
2630 17:37:36.506845 CSE EOP successful, continuing boot
2631 17:37:36.513611 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2632 17:37:36.517449 mp_park_aps done after 0 msecs.
2633 17:37:36.520565 Jumping to boot code at 0x30000000(0x76891000)
2634 17:37:36.530928 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2635 17:37:36.534768
2636 17:37:36.534883
2637 17:37:36.534961
2638 17:37:36.538002 Starting depthcharge on Volmar...
2639 17:37:36.538080
2640 17:37:36.538539 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2641 17:37:36.538715 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2642 17:37:36.538869 Setting prompt string to ['brya:']
2643 17:37:36.538954 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2644 17:37:36.544742 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2645 17:37:36.544818
2646 17:37:36.551057 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2647 17:37:36.551129
2648 17:37:36.558005 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2649 17:37:36.558090
2650 17:37:36.561082 configure_storage: Failed to remap 1C:2
2651 17:37:36.561164
2652 17:37:36.561228 Wipe memory regions:
2653 17:37:36.564808
2654 17:37:36.567935 [0x00000000001000, 0x000000000a0000)
2655 17:37:36.568031
2656 17:37:36.570959 [0x00000000100000, 0x00000030000000)
2657 17:37:36.678896
2658 17:37:36.681848 [0x00000032668e60, 0x00000076857000)
2659 17:37:36.833787
2660 17:37:36.836777 [0x00000100000000, 0x0000027fc00000)
2661 17:37:37.684263
2662 17:37:37.687409 ec_init: CrosEC protocol v3 supported (256, 256)
2663 17:37:38.294603
2664 17:37:38.294733 R8152: Initializing
2665 17:37:38.294802
2666 17:37:38.298488 Version 9 (ocp_data = 6010)
2667 17:37:38.298589
2668 17:37:38.301434 R8152: Done initializing
2669 17:37:38.301508
2670 17:37:38.304773 Adding net device
2671 17:37:38.607494
2672 17:37:38.611036 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2673 17:37:38.611141
2674 17:37:38.611271
2675 17:37:38.611598 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2677 17:37:38.711929 brya: tftpboot 192.168.201.1 13870248/tftp-deploy-f_zmn6zu/kernel/bzImage 13870248/tftp-deploy-f_zmn6zu/kernel/cmdline 13870248/tftp-deploy-f_zmn6zu/ramdisk/ramdisk.cpio.gz
2678 17:37:38.712180 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2679 17:37:38.712401 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2680 17:37:38.716901 tftpboot 192.168.201.1 13870248/tftp-deploy-f_zmn6zu/kernel/bzImploy-f_zmn6zu/kernel/cmdline 13870248/tftp-deploy-f_zmn6zu/ramdisk/ramdisk.cpio.gz
2681 17:37:38.717023
2682 17:37:38.717120 Waiting for link
2683 17:37:38.919689
2684 17:37:38.919853 done.
2685 17:37:38.919949
2686 17:37:38.920041 MAC: 00:e0:4c:68:02:37
2687 17:37:38.920131
2688 17:37:38.923403 Sending DHCP discover... done.
2689 17:37:38.923531
2690 17:37:38.926676 Waiting for reply... done.
2691 17:37:38.926754
2692 17:37:38.930026 Sending DHCP request... done.
2693 17:37:38.930127
2694 17:37:38.937250 Waiting for reply... done.
2695 17:37:38.937354
2696 17:37:38.937446 My ip is 192.168.201.15
2697 17:37:38.937535
2698 17:37:38.940829 The DHCP server ip is 192.168.201.1
2699 17:37:38.943862
2700 17:37:38.947707 TFTP server IP predefined by user: 192.168.201.1
2701 17:37:38.947809
2702 17:37:38.954154 Bootfile predefined by user: 13870248/tftp-deploy-f_zmn6zu/kernel/bzImage
2703 17:37:38.954260
2704 17:37:38.957283 Sending tftp read request... done.
2705 17:37:38.957385
2706 17:37:38.961138 Waiting for the transfer...
2707 17:37:38.961242
2708 17:37:39.214900 00000000 ################################################################
2709 17:37:39.215030
2710 17:37:39.459968 00080000 ################################################################
2711 17:37:39.460129
2712 17:37:39.704426 00100000 ################################################################
2713 17:37:39.704585
2714 17:37:39.947293 00180000 ################################################################
2715 17:37:39.947465
2716 17:37:40.193471 00200000 ################################################################
2717 17:37:40.193633
2718 17:37:40.445505 00280000 ################################################################
2719 17:37:40.445659
2720 17:37:40.696100 00300000 ################################################################
2721 17:37:40.696282
2722 17:37:40.944642 00380000 ################################################################
2723 17:37:40.944827
2724 17:37:41.188113 00400000 ################################################################
2725 17:37:41.188247
2726 17:37:41.435329 00480000 ################################################################
2727 17:37:41.435499
2728 17:37:41.689157 00500000 ################################################################
2729 17:37:41.689345
2730 17:37:41.957901 00580000 ################################################################
2731 17:37:41.958039
2732 17:37:42.208210 00600000 ################################################################
2733 17:37:42.208365
2734 17:37:42.455950 00680000 ################################################################
2735 17:37:42.456081
2736 17:37:42.723351 00700000 ################################################################
2737 17:37:42.723514
2738 17:37:42.969310 00780000 ################################################################
2739 17:37:42.969484
2740 17:37:43.207817 00800000 ################################################################
2741 17:37:43.207972
2742 17:37:43.440413 00880000 ################################################################
2743 17:37:43.440575
2744 17:37:43.670948 00900000 ################################################################
2745 17:37:43.671118
2746 17:37:43.909919 00980000 ################################################################
2747 17:37:43.910061
2748 17:37:44.147977 00a00000 ################################################################
2749 17:37:44.148139
2750 17:37:44.392574 00a80000 ################################################################
2751 17:37:44.392721
2752 17:37:44.624988 00b00000 ################################################################
2753 17:37:44.625161
2754 17:37:44.866693 00b80000 ################################################################
2755 17:37:44.866839
2756 17:37:45.121045 00c00000 ################################################################
2757 17:37:45.121189
2758 17:37:45.391103 00c80000 ################################################################
2759 17:37:45.391243
2760 17:37:45.641948 00d00000 ################################################################
2761 17:37:45.642112
2762 17:37:45.914335 00d80000 ################################################################
2763 17:37:45.914504
2764 17:37:46.175078 00e00000 ################################################################
2765 17:37:46.175237
2766 17:37:46.432782 00e80000 ################################################################
2767 17:37:46.432914
2768 17:37:46.692125 00f00000 ################################################################
2769 17:37:46.692282
2770 17:37:46.955179 00f80000 ################################################################
2771 17:37:46.955362
2772 17:37:47.214067 01000000 ################################################################
2773 17:37:47.214255
2774 17:37:47.475501 01080000 ################################################################
2775 17:37:47.475660
2776 17:37:47.731067 01100000 ################################################################
2777 17:37:47.731229
2778 17:37:47.984174 01180000 ################################################################
2779 17:37:47.984349
2780 17:37:48.250028 01200000 ################################################################
2781 17:37:48.250197
2782 17:37:48.391831 01280000 ################################### done.
2783 17:37:48.391986
2784 17:37:48.394926 The bootfile was 19680224 bytes long.
2785 17:37:48.395010
2786 17:37:48.398656 Sending tftp read request... done.
2787 17:37:48.398740
2788 17:37:48.401886 Waiting for the transfer...
2789 17:37:48.401969
2790 17:37:48.657777 00000000 ################################################################
2791 17:37:48.657908
2792 17:37:48.906536 00080000 ################################################################
2793 17:37:48.906676
2794 17:37:49.157459 00100000 ################################################################
2795 17:37:49.157596
2796 17:37:49.401740 00180000 ################################################################
2797 17:37:49.401874
2798 17:37:49.664703 00200000 ################################################################
2799 17:37:49.664838
2800 17:37:49.915557 00280000 ################################################################
2801 17:37:49.915690
2802 17:37:50.173468 00300000 ################################################################
2803 17:37:50.173631
2804 17:37:50.436119 00380000 ################################################################
2805 17:37:50.436261
2806 17:37:50.682976 00400000 ################################################################
2807 17:37:50.683115
2808 17:37:50.938347 00480000 ################################################################
2809 17:37:50.938503
2810 17:37:51.200199 00500000 ################################################################
2811 17:37:51.200332
2812 17:37:51.460139 00580000 ################################################################
2813 17:37:51.460280
2814 17:37:51.725860 00600000 ################################################################
2815 17:37:51.726037
2816 17:37:51.990725 00680000 ################################################################
2817 17:37:51.990858
2818 17:37:52.227364 00700000 ############################################################# done.
2819 17:37:52.227528
2820 17:37:52.230903 Sending tftp read request... done.
2821 17:37:52.231015
2822 17:37:52.234188 Waiting for the transfer...
2823 17:37:52.234287
2824 17:37:52.234360 00000000 # done.
2825 17:37:52.234460
2826 17:37:52.244118 Command line loaded dynamically from TFTP file: 13870248/tftp-deploy-f_zmn6zu/kernel/cmdline
2827 17:37:52.244243
2828 17:37:52.270910 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13870248/extract-nfsrootfs-smnfhotz,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
2829 17:37:52.276254
2830 17:37:52.279722 Shutting down all USB controllers.
2831 17:37:52.279817
2832 17:37:52.279890 Removing current net device
2833 17:37:52.279953
2834 17:37:52.283135 Finalizing coreboot
2835 17:37:52.283248
2836 17:37:52.289840 Exiting depthcharge with code 4 at timestamp: 25996445
2837 17:37:52.289928
2838 17:37:52.289993
2839 17:37:52.290073 Starting kernel ...
2840 17:37:52.290135
2841 17:37:52.290193
2842 17:37:52.290620 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2843 17:37:52.290719 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2844 17:37:52.290795 Setting prompt string to ['Linux version [0-9]']
2845 17:37:52.290863 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2846 17:37:52.290931 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2848 17:42:17.290975 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2850 17:42:17.291286 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2852 17:42:17.291545 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2855 17:42:17.291965 end: 2 depthcharge-action (duration 00:05:00) [common]
2857 17:42:17.292321 Cleaning after the job
2858 17:42:17.292444 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/ramdisk
2859 17:42:17.293421 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/kernel
2860 17:42:17.295781 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/nfsrootfs
2861 17:42:17.326024 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13870248/tftp-deploy-f_zmn6zu/modules
2862 17:42:17.327298 start: 4.1 power-off (timeout 00:00:30) [common]
2863 17:42:17.327643 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-7', '--port=1', '--command=off']
2864 17:42:17.405917 >> Command sent successfully.
2865 17:42:17.408420 Returned 0 in 0 seconds
2866 17:42:17.508810 end: 4.1 power-off (duration 00:00:00) [common]
2868 17:42:17.509257 start: 4.2 read-feedback (timeout 00:10:00) [common]
2869 17:42:17.509566 Listened to connection for namespace 'common' for up to 1s
2871 17:42:17.510014 Listened to connection for namespace 'common' for up to 1s
2872 17:42:18.510298 Finalising connection for namespace 'common'
2873 17:42:18.510464 Disconnecting from shell: Finalise
2874 17:42:18.510543
2875 17:42:18.610869 end: 4.2 read-feedback (duration 00:00:01) [common]
2876 17:42:18.611017 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13870248
2877 17:42:18.788683 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13870248
2878 17:42:18.788861 JobError: Your job cannot terminate cleanly.