Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 07:56:48.928625 lava-dispatcher, installed at version: 2024.03
2 07:56:48.928830 start: 0 validate
3 07:56:48.928931 Start time: 2024-05-30 07:56:48.928925+00:00 (UTC)
4 07:56:48.929036 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:56:48.929167 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 07:56:49.195714 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:56:49.195890 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.216-cip47-47-g42df769f88c3%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:56:49.197004 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:56:49.197132 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.216-cip47-47-g42df769f88c3%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
10 07:56:49.455066 validate duration: 0.53
12 07:56:49.455333 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:56:49.455441 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:56:49.455524 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:56:49.455678 Not decompressing ramdisk as can be used compressed.
16 07:56:49.455757 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 07:56:49.455813 saving as /var/lib/lava/dispatcher/tmp/14090905/tftp-deploy-d5eege8a/ramdisk/rootfs.cpio.gz
18 07:56:49.455866 total size: 8417901 (8 MB)
19 07:56:49.456893 progress 0 % (0 MB)
20 07:56:49.458639 progress 5 % (0 MB)
21 07:56:49.460265 progress 10 % (0 MB)
22 07:56:49.461800 progress 15 % (1 MB)
23 07:56:49.463367 progress 20 % (1 MB)
24 07:56:49.464915 progress 25 % (2 MB)
25 07:56:49.466443 progress 30 % (2 MB)
26 07:56:49.468032 progress 35 % (2 MB)
27 07:56:49.469566 progress 40 % (3 MB)
28 07:56:49.471102 progress 45 % (3 MB)
29 07:56:49.472705 progress 50 % (4 MB)
30 07:56:49.474312 progress 55 % (4 MB)
31 07:56:49.475924 progress 60 % (4 MB)
32 07:56:49.477332 progress 65 % (5 MB)
33 07:56:49.478942 progress 70 % (5 MB)
34 07:56:49.480470 progress 75 % (6 MB)
35 07:56:49.481912 progress 80 % (6 MB)
36 07:56:49.483379 progress 85 % (6 MB)
37 07:56:49.484807 progress 90 % (7 MB)
38 07:56:49.486247 progress 95 % (7 MB)
39 07:56:49.487638 progress 100 % (8 MB)
40 07:56:49.487807 8 MB downloaded in 0.03 s (251.40 MB/s)
41 07:56:49.487947 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:56:49.488142 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:56:49.488213 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:56:49.488281 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:56:49.488408 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.216-cip47-47-g42df769f88c3/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/kernel/bzImage
47 07:56:49.488463 saving as /var/lib/lava/dispatcher/tmp/14090905/tftp-deploy-d5eege8a/kernel/bzImage
48 07:56:49.488519 total size: 22859904 (21 MB)
49 07:56:49.488572 No compression specified
50 07:56:49.489475 progress 0 % (0 MB)
51 07:56:49.493436 progress 5 % (1 MB)
52 07:56:49.497450 progress 10 % (2 MB)
53 07:56:49.501547 progress 15 % (3 MB)
54 07:56:49.505621 progress 20 % (4 MB)
55 07:56:49.509487 progress 25 % (5 MB)
56 07:56:49.513377 progress 30 % (6 MB)
57 07:56:49.517397 progress 35 % (7 MB)
58 07:56:49.521270 progress 40 % (8 MB)
59 07:56:49.525114 progress 45 % (9 MB)
60 07:56:49.529074 progress 50 % (10 MB)
61 07:56:49.532943 progress 55 % (12 MB)
62 07:56:49.536781 progress 60 % (13 MB)
63 07:56:49.540628 progress 65 % (14 MB)
64 07:56:49.544495 progress 70 % (15 MB)
65 07:56:49.548374 progress 75 % (16 MB)
66 07:56:49.552254 progress 80 % (17 MB)
67 07:56:49.556088 progress 85 % (18 MB)
68 07:56:49.560000 progress 90 % (19 MB)
69 07:56:49.563891 progress 95 % (20 MB)
70 07:56:49.567818 progress 100 % (21 MB)
71 07:56:49.567965 21 MB downloaded in 0.08 s (274.42 MB/s)
72 07:56:49.568152 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:56:49.568425 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:56:49.568499 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:56:49.568568 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:56:49.568691 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.216-cip47-47-g42df769f88c3/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/modules.tar.xz
78 07:56:49.568743 saving as /var/lib/lava/dispatcher/tmp/14090905/tftp-deploy-d5eege8a/modules/modules.tar
79 07:56:49.568796 total size: 4530424 (4 MB)
80 07:56:49.568849 Using unxz to decompress xz
81 07:56:49.570052 progress 0 % (0 MB)
82 07:56:49.576429 progress 5 % (0 MB)
83 07:56:49.587103 progress 10 % (0 MB)
84 07:56:49.600691 progress 15 % (0 MB)
85 07:56:49.610481 progress 20 % (0 MB)
86 07:56:49.621096 progress 25 % (1 MB)
87 07:56:49.633918 progress 30 % (1 MB)
88 07:56:49.645105 progress 35 % (1 MB)
89 07:56:49.656065 progress 40 % (1 MB)
90 07:56:49.667394 progress 45 % (1 MB)
91 07:56:49.678847 progress 50 % (2 MB)
92 07:56:49.690026 progress 55 % (2 MB)
93 07:56:49.699955 progress 60 % (2 MB)
94 07:56:49.710683 progress 65 % (2 MB)
95 07:56:49.722702 progress 70 % (3 MB)
96 07:56:49.734658 progress 75 % (3 MB)
97 07:56:49.745351 progress 80 % (3 MB)
98 07:56:49.757582 progress 85 % (3 MB)
99 07:56:49.768755 progress 90 % (3 MB)
100 07:56:49.779955 progress 95 % (4 MB)
101 07:56:49.791731 progress 100 % (4 MB)
102 07:56:49.795792 4 MB downloaded in 0.23 s (19.03 MB/s)
103 07:56:49.795988 end: 1.3.1 http-download (duration 00:00:00) [common]
105 07:56:49.796227 end: 1.3 download-retry (duration 00:00:00) [common]
106 07:56:49.796316 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
107 07:56:49.796391 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
108 07:56:49.796457 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
109 07:56:49.796523 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
110 07:56:49.796682 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9
111 07:56:49.796782 makedir: /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin
112 07:56:49.796863 makedir: /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/tests
113 07:56:49.796936 makedir: /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/results
114 07:56:49.797012 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-add-keys
115 07:56:49.797120 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-add-sources
116 07:56:49.797213 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-background-process-start
117 07:56:49.797305 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-background-process-stop
118 07:56:49.797405 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-common-functions
119 07:56:49.797502 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-echo-ipv4
120 07:56:49.797597 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-install-packages
121 07:56:49.797683 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-installed-packages
122 07:56:49.797769 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-os-build
123 07:56:49.797855 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-probe-channel
124 07:56:49.797941 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-probe-ip
125 07:56:49.798028 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-target-ip
126 07:56:49.798114 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-target-mac
127 07:56:49.798209 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-target-storage
128 07:56:49.798299 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-test-case
129 07:56:49.798388 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-test-event
130 07:56:49.798475 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-test-feedback
131 07:56:49.798561 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-test-raise
132 07:56:49.798645 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-test-reference
133 07:56:49.798731 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-test-runner
134 07:56:49.798816 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-test-set
135 07:56:49.798903 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-test-shell
136 07:56:49.798993 Updating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-install-packages (oe)
137 07:56:49.799106 Updating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/bin/lava-installed-packages (oe)
138 07:56:49.799206 Creating /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/environment
139 07:56:49.799293 LAVA metadata
140 07:56:49.799346 - LAVA_JOB_ID=14090905
141 07:56:49.799392 - LAVA_DISPATCHER_IP=192.168.201.1
142 07:56:49.799463 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
143 07:56:49.799512 skipped lava-vland-overlay
144 07:56:49.799566 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
145 07:56:49.799621 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
146 07:56:49.799663 skipped lava-multinode-overlay
147 07:56:49.799713 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
148 07:56:49.799767 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
149 07:56:49.799816 Loading test definitions
150 07:56:49.799873 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
151 07:56:49.799922 Using /lava-14090905 at stage 0
152 07:56:49.800155 uuid=14090905_1.4.2.3.1 testdef=None
153 07:56:49.800223 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
154 07:56:49.800308 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
155 07:56:49.800712 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
157 07:56:49.800865 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
158 07:56:49.801329 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
160 07:56:49.801497 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
161 07:56:49.801963 runner path: /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/0/tests/0_dmesg test_uuid 14090905_1.4.2.3.1
162 07:56:49.802079 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
164 07:56:49.802246 Creating lava-test-runner.conf files
165 07:56:49.802291 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14090905/lava-overlay-12seioq9/lava-14090905/0 for stage 0
166 07:56:49.802352 - 0_dmesg
167 07:56:49.802423 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
168 07:56:49.802484 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
169 07:56:49.807379 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
170 07:56:49.807472 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
171 07:56:49.807536 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
172 07:56:49.807596 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
173 07:56:49.807655 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
174 07:56:49.957930 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
175 07:56:49.958100 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
176 07:56:49.958177 extracting modules file /var/lib/lava/dispatcher/tmp/14090905/tftp-deploy-d5eege8a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14090905/extract-overlay-ramdisk-wujw69ql/ramdisk
177 07:56:50.019635 end: 1.4.4 extract-modules (duration 00:00:00) [common]
178 07:56:50.019773 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
179 07:56:50.019840 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14090905/compress-overlay-fsp4pvp7/overlay-1.4.2.4.tar.gz to ramdisk
180 07:56:50.019888 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14090905/compress-overlay-fsp4pvp7/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14090905/extract-overlay-ramdisk-wujw69ql/ramdisk
181 07:56:50.024396 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
182 07:56:50.024484 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
183 07:56:50.024551 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
184 07:56:50.024612 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
185 07:56:50.024668 Building ramdisk /var/lib/lava/dispatcher/tmp/14090905/extract-overlay-ramdisk-wujw69ql/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14090905/extract-overlay-ramdisk-wujw69ql/ramdisk
186 07:56:50.120316 >> 106540 blocks
187 07:56:51.583926 rename /var/lib/lava/dispatcher/tmp/14090905/extract-overlay-ramdisk-wujw69ql/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14090905/tftp-deploy-d5eege8a/ramdisk/ramdisk.cpio.gz
188 07:56:51.584210 end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
189 07:56:51.584380 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
190 07:56:51.584470 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
191 07:56:51.584534 No mkimage arch provided, not using FIT.
192 07:56:51.584599 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
193 07:56:51.584661 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
194 07:56:51.584741 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
195 07:56:51.584880 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
196 07:56:51.584980 No LXC device requested
197 07:56:51.585074 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
198 07:56:51.585139 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
199 07:56:51.585195 end: 1.6 deploy-device-env (duration 00:00:00) [common]
200 07:56:51.585243 Checking files for TFTP limit of 4294967296 bytes.
201 07:56:51.585488 end: 1 tftp-deploy (duration 00:00:02) [common]
202 07:56:51.585562 start: 2 depthcharge-action (timeout 00:05:00) [common]
203 07:56:51.585624 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
204 07:56:51.585698 substitutions:
205 07:56:51.585747 - {DTB}: None
206 07:56:51.585790 - {INITRD}: 14090905/tftp-deploy-d5eege8a/ramdisk/ramdisk.cpio.gz
207 07:56:51.585831 - {KERNEL}: 14090905/tftp-deploy-d5eege8a/kernel/bzImage
208 07:56:51.585871 - {LAVA_MAC}: None
209 07:56:51.585911 - {PRESEED_CONFIG}: None
210 07:56:51.585950 - {PRESEED_LOCAL}: None
211 07:56:51.585989 - {RAMDISK}: 14090905/tftp-deploy-d5eege8a/ramdisk/ramdisk.cpio.gz
212 07:56:51.586034 - {ROOT_PART}: None
213 07:56:51.586075 - {ROOT}: None
214 07:56:51.586115 - {SERVER_IP}: 192.168.201.1
215 07:56:51.586155 - {TEE}: None
216 07:56:51.586193 Parsed boot commands:
217 07:56:51.586231 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
218 07:56:51.586341 Parsed boot commands: tftpboot 192.168.201.1 14090905/tftp-deploy-d5eege8a/kernel/bzImage 14090905/tftp-deploy-d5eege8a/kernel/cmdline 14090905/tftp-deploy-d5eege8a/ramdisk/ramdisk.cpio.gz
219 07:56:51.586410 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
220 07:56:51.586470 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
221 07:56:51.586529 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
222 07:56:51.586586 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
223 07:56:51.586631 Not connected, no need to disconnect.
224 07:56:51.586684 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
225 07:56:51.586739 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
226 07:56:51.586787 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-1'
227 07:56:51.589859 Setting prompt string to ['lava-test: # ']
228 07:56:51.590097 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
229 07:56:51.590182 end: 2.2.1 reset-connection (duration 00:00:00) [common]
230 07:56:51.590255 start: 2.2.2 reset-device (timeout 00:05:00) [common]
231 07:56:51.590322 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
232 07:56:51.590459 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-1']
233 07:57:05.099596 Returned 0 in 13 seconds
234 07:57:05.200337 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
236 07:57:05.201361 end: 2.2.2 reset-device (duration 00:00:14) [common]
237 07:57:05.201720 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
238 07:57:05.202025 Setting prompt string to 'Starting depthcharge on Volmar...'
239 07:57:05.202261 Changing prompt to 'Starting depthcharge on Volmar...'
240 07:57:05.202492 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
241 07:57:05.203824 [Enter `^Ec?' for help]
242 07:57:05.204261
243 07:57:05.204588
244 07:57:05.204809 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
245 07:57:05.205034 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
246 07:57:05.205270 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
247 07:57:05.205493 CPU: AES supported, TXT NOT supported, VT supported
248 07:57:05.205727 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
249 07:57:05.205944 Cache size = 10 MiB
250 07:57:05.206157 MCH: device id 4609 (rev 04) is Alderlake-P
251 07:57:05.206410 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
252 07:57:05.206623 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
253 07:57:05.206822 VBOOT: Loading verstage.
254 07:57:05.207032 FMAP: Found "FLASH" version 1.1 at 0x1804000.
255 07:57:05.207281 FMAP: base = 0x0 size = 0x2000000 #areas = 37
256 07:57:05.207503 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
257 07:57:05.207703 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
258 07:57:05.207905 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
259 07:57:05.208106
260 07:57:05.208302
261 07:57:05.208522 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
262 07:57:05.208727 Probing TPM I2C: I2C bus 1 version 0x3230302a
263 07:57:05.208925 DW I2C bus 1 at 0xfe022000 (400 KHz)
264 07:57:05.209124 done! DID_VID 0x00281ae0
265 07:57:05.209320 TPM ready after 0 ms
266 07:57:05.209516 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
267 07:57:05.209696 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
268 07:57:05.209874 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 07:57:05.210054 tlcl_send_startup: Startup return code is 0
270 07:57:05.210232 TPM: setup succeeded
271 07:57:05.210431 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 07:57:05.210628 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 07:57:05.210809 Chrome EC: UHEPI supported
274 07:57:05.210988 Reading cr50 boot mode
275 07:57:05.211162 Cr50 says boot_mode is VERIFIED_RW(0x00).
276 07:57:05.211367 Phase 1
277 07:57:05.211603 FMAP: area GBB found @ 1805000 (458752 bytes)
278 07:57:05.211798 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
279 07:57:05.211978 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
280 07:57:05.212162 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
281 07:57:05.212352 VB2:vb2_check_recovery() Recovery was requested manually
282 07:57:05.212547 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
283 07:57:05.212734 Recovery requested (1009000e)
284 07:57:05.212911 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
285 07:57:05.213090 tlcl_extend: response is 0
286 07:57:05.213269 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
287 07:57:05.213469 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
288 07:57:05.213647 tlcl_extend: response is 0
289 07:57:05.213828 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
290 07:57:05.214006 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 07:57:05.214184 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
292 07:57:05.214381 BS: verstage times (exec / console): total (unknown) / 149 ms
293 07:57:05.214559
294 07:57:05.214739
295 07:57:05.214879 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
296 07:57:05.215014 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
297 07:57:05.215148 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
298 07:57:05.215298 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
299 07:57:05.215435 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
300 07:57:05.215573 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
301 07:57:05.215711 gpe0_sts[3]: 00000000 gpe0_en[3]: 00080000
302 07:57:05.215843 TCO_STS: 0000 0000
303 07:57:05.215978 GEN_PMCON: d0015038 00002200
304 07:57:05.216111 GBLRST_CAUSE: 00000000 00000000
305 07:57:05.216250 HPR_CAUSE0: 00000000
306 07:57:05.216384 prev_sleep_state 5
307 07:57:05.216524 Abort disabling TXT, as CPU is not TXT capable.
308 07:57:05.216661 cse_lite: Skip switching to RW in the recovery path
309 07:57:05.216798 Boot Count incremented to 8486
310 07:57:05.216930 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
311 07:57:05.217064 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
312 07:57:05.217199 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
313 07:57:05.217347 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
314 07:57:05.217482 Chrome EC: UHEPI supported
315 07:57:05.217618 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
316 07:57:05.217756 Probing TPM I2C: done! DID_VID 0x00281ae0
317 07:57:05.217890 Locality already claimed
318 07:57:05.218024 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
319 07:57:05.218153 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
320 07:57:05.218251 MRC: Hash idx 0x100b comparison successful.
321 07:57:05.218345 MRC cache found, size f6c8
322 07:57:05.218442 bootmode is set to: 2
323 07:57:05.218540 EC returned error result code 3
324 07:57:05.218636 FW_CONFIG value from CBI is 0x131
325 07:57:05.218734 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
326 07:57:05.218832 SPD index = 0
327 07:57:05.218929 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
328 07:57:05.219027 SPD: module type is LPDDR4X
329 07:57:05.219123 SPD: module part number is K4U6E3S4AB-MGCL
330 07:57:05.219233 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
331 07:57:05.219333 SPD: device width 16 bits, bus width 16 bits
332 07:57:05.219663 SPD: module size is 1024 MB (per channel)
333 07:57:05.219790 CBMEM:
334 07:57:05.219921 IMD: root @ 0x76fff000 254 entries.
335 07:57:05.220025 IMD: root @ 0x76ffec00 62 entries.
336 07:57:05.220122 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
337 07:57:05.220233 RO_VPD is uninitialized or empty.
338 07:57:05.220269 FMAP: area RW_VPD found @ f29000 (8192 bytes)
339 07:57:05.220308 External stage cache:
340 07:57:05.220346 IMD: root @ 0x7bbff000 254 entries.
341 07:57:05.220382 IMD: root @ 0x7bbfec00 62 entries.
342 07:57:05.220419 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 07:57:05.220486 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 07:57:05.220524 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 07:57:05.220561 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 07:57:05.220599 8 DIMMs found
347 07:57:05.220639 SMM Memory Map
348 07:57:05.220676 SMRAM : 0x7b800000 0x800000
349 07:57:05.220715 Subregion 0: 0x7b800000 0x200000
350 07:57:05.220752 Subregion 1: 0x7ba00000 0x200000
351 07:57:05.220789 Subregion 2: 0x7bc00000 0x400000
352 07:57:05.220826 top_of_ram = 0x77000000
353 07:57:05.220864 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
354 07:57:05.220902 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
355 07:57:05.220939 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
356 07:57:05.220976 MTRR Range: Start=ff000000 End=0 (Size 1000000)
357 07:57:05.221013 Normal boot
358 07:57:05.221051 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
359 07:57:05.221090 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
360 07:57:05.221128 Processing 237 relocs. Offset value of 0x74aba000
361 07:57:05.221167 BS: romstage times (exec / console): total (unknown) / 280 ms
362 07:57:05.221204
363 07:57:05.221242
364 07:57:05.221279 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
365 07:57:05.221317 Normal boot
366 07:57:05.221371 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 07:57:05.221410 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 07:57:05.221449 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 07:57:05.221501 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
370 07:57:05.221539 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
371 07:57:05.221577 Processing 5931 relocs. Offset value of 0x72a30000
372 07:57:05.221614 BS: postcar times (exec / console): total (unknown) / 51 ms
373 07:57:05.221651
374 07:57:05.221689
375 07:57:05.221726 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
376 07:57:05.221765 Reserving BERT start 76a1f000, size 10000
377 07:57:05.221803 Normal boot
378 07:57:05.221840 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
379 07:57:05.221879 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
380 07:57:05.221916 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
381 07:57:05.221954 FMAP: area RW_VPD found @ f29000 (8192 bytes)
382 07:57:05.221992 Google Chrome EC: version:
383 07:57:05.222029 ro: volmar_v2.0.14126-e605144e9c
384 07:57:05.222065 rw: volmar_v0.0.55-22d1557
385 07:57:05.222101 running image: 1
386 07:57:05.222139 ACPI _SWS is PM1 Index 8 GPE Index -1
387 07:57:05.222177 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
388 07:57:05.222214 EC returned error result code 3
389 07:57:05.222251 FW_CONFIG value from CBI is 0x131
390 07:57:05.222289 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
391 07:57:05.222327 PCI: 00:1c.2 disabled by fw_config
392 07:57:05.222364 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
393 07:57:05.222402 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
394 07:57:05.222439 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
395 07:57:05.222477 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
396 07:57:05.222514 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 07:57:05.222552 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
398 07:57:05.222590 microcode: sig=0x906a4 pf=0x80 revision=0x423
399 07:57:05.222628 microcode: Update skipped, already up-to-date
400 07:57:05.222664 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
401 07:57:05.222701 Detected 6 core, 8 thread CPU.
402 07:57:05.222737 Setting up SMI for CPU
403 07:57:05.222774 IED base = 0x7bc00000
404 07:57:05.222811 IED size = 0x00400000
405 07:57:05.222848 Will perform SMM setup.
406 07:57:05.222884 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
407 07:57:05.222921 LAPIC 0x0 in XAPIC mode.
408 07:57:05.222957 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
409 07:57:05.222995 Processing 18 relocs. Offset value of 0x00030000
410 07:57:05.223032 Attempting to start 7 APs
411 07:57:05.223070 Waiting for 10ms after sending INIT.
412 07:57:05.223107 Waiting for SIPI to complete...
413 07:57:05.223145 LAPIC 0x14 in XAPIC mode.
414 07:57:05.223212 LAPIC 0x8 in XAPIC mode.
415 07:57:05.223273 LAPIC 0x10 in XAPIC mode.
416 07:57:05.223312 LAPIC 0x16 in XAPIC mode.
417 07:57:05.223351 AP: slot 4 apic_id 14, MCU rev: 0x00000423
418 07:57:05.223390 AP: slot 2 apic_id 10, MCU rev: 0x00000423
419 07:57:05.223428 AP: slot 1 apic_id 16, MCU rev: 0x00000423
420 07:57:05.223467 LAPIC 0x12 in XAPIC mode.
421 07:57:05.223505 LAPIC 0x1 in XAPIC mode.
422 07:57:05.223542 done.
423 07:57:05.223581 AP: slot 3 apic_id 12, MCU rev: 0x00000423
424 07:57:05.223619 AP: slot 7 apic_id 8, MCU rev: 0x00000423
425 07:57:05.223657 LAPIC 0x9 in XAPIC mode.
426 07:57:05.223695 Waiting for SIPI to complete...
427 07:57:05.223733 done.
428 07:57:05.223771 AP: slot 6 apic_id 1, MCU rev: 0x00000423
429 07:57:05.223809 AP: slot 5 apic_id 9, MCU rev: 0x00000423
430 07:57:05.224030 smm_setup_relocation_handler: enter
431 07:57:05.224089 smm_setup_relocation_handler: exit
432 07:57:05.224140 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
433 07:57:05.224199 Processing 11 relocs. Offset value of 0x00038000
434 07:57:05.224249 smm_module_setup_stub: stack_top = 0x7b804000
435 07:57:05.224289 smm_module_setup_stub: per cpu stack_size = 0x800
436 07:57:05.224331 smm_module_setup_stub: runtime.start32_offset = 0x4c
437 07:57:05.224370 smm_module_setup_stub: runtime.smm_size = 0x10000
438 07:57:05.224409 SMM Module: stub loaded at 38000. Will call 0x76a53094
439 07:57:05.224448 Installing permanent SMM handler to 0x7b800000
440 07:57:05.224500 smm_load_module: total_smm_space_needed e468, available -> 200000
441 07:57:05.224544 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
442 07:57:05.224584 Processing 255 relocs. Offset value of 0x7b9f6000
443 07:57:05.224622 smm_load_module: smram_start: 0x7b800000
444 07:57:05.224660 smm_load_module: smram_end: 7ba00000
445 07:57:05.224699 smm_load_module: handler start 0x7b9f6d5f
446 07:57:05.224739 smm_load_module: handler_size 98d0
447 07:57:05.224777 smm_load_module: fxsave_area 0x7b9ff000
448 07:57:05.224814 smm_load_module: fxsave_size 1000
449 07:57:05.224851 smm_load_module: CONFIG_MSEG_SIZE 0x0
450 07:57:05.224890 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
451 07:57:05.224929 smm_load_module: handler_mod_params.smbase = 0x7b800000
452 07:57:05.224967 smm_load_module: per_cpu_save_state_size = 0x400
453 07:57:05.225005 smm_load_module: num_cpus = 0x8
454 07:57:05.225043 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
455 07:57:05.225080 smm_load_module: total_save_state_size = 0x2000
456 07:57:05.225118 smm_load_module: cpu0 entry: 7b9e6000
457 07:57:05.225156 smm_create_map: cpus allowed in one segment 30
458 07:57:05.225195 smm_create_map: min # of segments needed 1
459 07:57:05.225233 CPU 0x0
460 07:57:05.225270 smbase 7b9e6000 entry 7b9ee000
461 07:57:05.225308 ss_start 7b9f5c00 code_end 7b9ee208
462 07:57:05.225347 CPU 0x1
463 07:57:05.225385 smbase 7b9e5c00 entry 7b9edc00
464 07:57:05.225424 ss_start 7b9f5800 code_end 7b9ede08
465 07:57:05.225462 CPU 0x2
466 07:57:05.225499 smbase 7b9e5800 entry 7b9ed800
467 07:57:05.225537 ss_start 7b9f5400 code_end 7b9eda08
468 07:57:05.225575 CPU 0x3
469 07:57:05.225613 smbase 7b9e5400 entry 7b9ed400
470 07:57:05.225652 ss_start 7b9f5000 code_end 7b9ed608
471 07:57:05.225690 CPU 0x4
472 07:57:05.225727 smbase 7b9e5000 entry 7b9ed000
473 07:57:05.225765 ss_start 7b9f4c00 code_end 7b9ed208
474 07:57:05.225803 CPU 0x5
475 07:57:05.225841 smbase 7b9e4c00 entry 7b9ecc00
476 07:57:05.225879 ss_start 7b9f4800 code_end 7b9ece08
477 07:57:05.225918 CPU 0x6
478 07:57:05.225956 smbase 7b9e4800 entry 7b9ec800
479 07:57:05.225995 ss_start 7b9f4400 code_end 7b9eca08
480 07:57:05.226033 CPU 0x7
481 07:57:05.226081 smbase 7b9e4400 entry 7b9ec400
482 07:57:05.226122 ss_start 7b9f4000 code_end 7b9ec608
483 07:57:05.226160 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
484 07:57:05.226199 Processing 11 relocs. Offset value of 0x7b9ee000
485 07:57:05.226236 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
486 07:57:05.226275 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
487 07:57:05.226313 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
488 07:57:05.226351 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
489 07:57:05.226390 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
490 07:57:05.226427 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
491 07:57:05.226465 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
492 07:57:05.226503 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
493 07:57:05.226541 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
494 07:57:05.226580 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
495 07:57:05.226622 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
496 07:57:05.226677 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
497 07:57:05.226739 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
498 07:57:05.226789 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
499 07:57:05.226828 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
500 07:57:05.226868 smm_module_setup_stub: stack_top = 0x7b804000
501 07:57:05.226909 smm_module_setup_stub: per cpu stack_size = 0x800
502 07:57:05.226949 smm_module_setup_stub: runtime.start32_offset = 0x4c
503 07:57:05.226988 smm_module_setup_stub: runtime.smm_size = 0x200000
504 07:57:05.227028 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
505 07:57:05.227066 Clearing SMI status registers
506 07:57:05.227106 SMI_STS: PM1
507 07:57:05.227147 PM1_STS: PWRBTN
508 07:57:05.227194 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
509 07:57:05.227235 In relocation handler: CPU 0
510 07:57:05.227274 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
511 07:57:05.227316 Writing SMRR. base = 0x7b800006, mask=0xff800c00
512 07:57:05.227356 Relocation complete.
513 07:57:05.227394 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
514 07:57:05.227433 In relocation handler: CPU 6
515 07:57:05.227471 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
516 07:57:05.227509 Relocation complete.
517 07:57:05.227547 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
518 07:57:05.227585 In relocation handler: CPU 4
519 07:57:05.227817 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
520 07:57:05.227868 Writing SMRR. base = 0x7b800006, mask=0xff800c00
521 07:57:05.227913 Relocation complete.
522 07:57:05.227967 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
523 07:57:05.228028 In relocation handler: CPU 2
524 07:57:05.228083 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
525 07:57:05.228138 Writing SMRR. base = 0x7b800006, mask=0xff800c00
526 07:57:05.228177 Relocation complete.
527 07:57:05.228217 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
528 07:57:05.228255 In relocation handler: CPU 3
529 07:57:05.228294 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
530 07:57:05.228332 Writing SMRR. base = 0x7b800006, mask=0xff800c00
531 07:57:05.228371 Relocation complete.
532 07:57:05.228409 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
533 07:57:05.228448 In relocation handler: CPU 1
534 07:57:05.228485 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
535 07:57:05.228524 Writing SMRR. base = 0x7b800006, mask=0xff800c00
536 07:57:05.228562 Relocation complete.
537 07:57:05.228601 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
538 07:57:05.228640 In relocation handler: CPU 5
539 07:57:05.228678 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
540 07:57:05.228717 Relocation complete.
541 07:57:05.228755 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
542 07:57:05.228794 In relocation handler: CPU 7
543 07:57:05.228832 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
544 07:57:05.228870 Writing SMRR. base = 0x7b800006, mask=0xff800c00
545 07:57:05.228908 Relocation complete.
546 07:57:05.228946 Initializing CPU #0
547 07:57:05.228984 CPU: vendor Intel device 906a4
548 07:57:05.229022 CPU: family 06, model 9a, stepping 04
549 07:57:05.229060 Clearing out pending MCEs
550 07:57:05.229098 cpu: energy policy set to 7
551 07:57:05.229135 Turbo is available but hidden
552 07:57:05.229173 Turbo is available and visible
553 07:57:05.229211 microcode: Update skipped, already up-to-date
554 07:57:05.229250 CPU #0 initialized
555 07:57:05.229288 Initializing CPU #6
556 07:57:05.229327 Initializing CPU #4
557 07:57:05.229365 Initializing CPU #1
558 07:57:05.229403 Initializing CPU #3
559 07:57:05.229440 CPU: vendor Intel device 906a4
560 07:57:05.229480 CPU: family 06, model 9a, stepping 04
561 07:57:05.229518 CPU: vendor Intel device 906a4
562 07:57:05.229556 CPU: family 06, model 9a, stepping 04
563 07:57:05.229595 Clearing out pending MCEs
564 07:57:05.229633 Initializing CPU #2
565 07:57:05.229670 CPU: vendor Intel device 906a4
566 07:57:05.229708 CPU: family 06, model 9a, stepping 04
567 07:57:05.229746 CPU: vendor Intel device 906a4
568 07:57:05.229784 CPU: family 06, model 9a, stepping 04
569 07:57:05.229821 Clearing out pending MCEs
570 07:57:05.229862 Clearing out pending MCEs
571 07:57:05.229901 cpu: energy policy set to 7
572 07:57:05.229939 cpu: energy policy set to 7
573 07:57:05.229978 microcode: Update skipped, already up-to-date
574 07:57:05.230016 CPU #1 initialized
575 07:57:05.230053 Clearing out pending MCEs
576 07:57:05.230091 microcode: Update skipped, already up-to-date
577 07:57:05.230131 CPU #2 initialized
578 07:57:05.230168 cpu: energy policy set to 7
579 07:57:05.230206 cpu: energy policy set to 7
580 07:57:05.230243 microcode: Update skipped, already up-to-date
581 07:57:05.230281 CPU #3 initialized
582 07:57:05.230319 microcode: Update skipped, already up-to-date
583 07:57:05.230357 CPU #4 initialized
584 07:57:05.230395 Initializing CPU #7
585 07:57:05.230432 CPU: vendor Intel device 906a4
586 07:57:05.230470 CPU: family 06, model 9a, stepping 04
587 07:57:05.230507 Initializing CPU #5
588 07:57:05.230545 CPU: vendor Intel device 906a4
589 07:57:05.230583 CPU: family 06, model 9a, stepping 04
590 07:57:05.230621 CPU: vendor Intel device 906a4
591 07:57:05.230663 CPU: family 06, model 9a, stepping 04
592 07:57:05.230700 Clearing out pending MCEs
593 07:57:05.230738 Clearing out pending MCEs
594 07:57:05.230776 cpu: energy policy set to 7
595 07:57:05.230814 cpu: energy policy set to 7
596 07:57:05.230853 microcode: Update skipped, already up-to-date
597 07:57:05.230890 CPU #7 initialized
598 07:57:05.230929 microcode: Update skipped, already up-to-date
599 07:57:05.230967 CPU #5 initialized
600 07:57:05.231005 Clearing out pending MCEs
601 07:57:05.231043 cpu: energy policy set to 7
602 07:57:05.231081 microcode: Update skipped, already up-to-date
603 07:57:05.231118 CPU #6 initialized
604 07:57:05.231157 bsp_do_flight_plan done after 697 msecs.
605 07:57:05.231213 CPU: frequency set to 4400 MHz
606 07:57:05.231255 Enabling SMIs.
607 07:57:05.231295 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
608 07:57:05.231335 Probing TPM I2C: done! DID_VID 0x00281ae0
609 07:57:05.231374 Locality already claimed
610 07:57:05.231413 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
611 07:57:05.231452 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
612 07:57:05.231491 Enabling GPIO PM b/c CR50 has long IRQ pulse support
613 07:57:05.231531 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
614 07:57:05.231571 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
615 07:57:05.231610 Found a VBT of 9216 bytes after decompression
616 07:57:05.231648 PCI 1.0, PIN A, using IRQ #16
617 07:57:05.231686 PCI 2.0, PIN A, using IRQ #17
618 07:57:05.231724 PCI 4.0, PIN A, using IRQ #18
619 07:57:05.231763 PCI 5.0, PIN A, using IRQ #16
620 07:57:05.231800 PCI 6.0, PIN A, using IRQ #16
621 07:57:05.231838 PCI 6.2, PIN C, using IRQ #18
622 07:57:05.231877 PCI 7.0, PIN A, using IRQ #19
623 07:57:05.231915 PCI 7.1, PIN B, using IRQ #20
624 07:57:05.231953 PCI 7.2, PIN C, using IRQ #21
625 07:57:05.231992 PCI 7.3, PIN D, using IRQ #22
626 07:57:05.232030 PCI 8.0, PIN A, using IRQ #23
627 07:57:05.232069 PCI D.0, PIN A, using IRQ #17
628 07:57:05.232107 PCI D.1, PIN B, using IRQ #19
629 07:57:05.232145 PCI 10.0, PIN A, using IRQ #24
630 07:57:05.232183 PCI 10.1, PIN B, using IRQ #25
631 07:57:05.232220 PCI 10.6, PIN C, using IRQ #20
632 07:57:05.232258 PCI 10.7, PIN D, using IRQ #21
633 07:57:05.232297 PCI 11.0, PIN A, using IRQ #26
634 07:57:05.232335 PCI 11.1, PIN B, using IRQ #27
635 07:57:05.232558 PCI 11.2, PIN C, using IRQ #28
636 07:57:05.232617 PCI 11.3, PIN D, using IRQ #29
637 07:57:05.232659 PCI 12.0, PIN A, using IRQ #30
638 07:57:05.232697 PCI 12.6, PIN B, using IRQ #31
639 07:57:05.232736 PCI 12.7, PIN C, using IRQ #22
640 07:57:05.232774 PCI 13.0, PIN A, using IRQ #32
641 07:57:05.232813 PCI 13.1, PIN B, using IRQ #33
642 07:57:05.232851 PCI 13.2, PIN C, using IRQ #34
643 07:57:05.232889 PCI 13.3, PIN D, using IRQ #35
644 07:57:05.232927 PCI 14.0, PIN B, using IRQ #23
645 07:57:05.232964 PCI 14.1, PIN A, using IRQ #36
646 07:57:05.233002 PCI 14.3, PIN C, using IRQ #17
647 07:57:05.233040 PCI 15.0, PIN A, using IRQ #37
648 07:57:05.233078 PCI 15.1, PIN B, using IRQ #38
649 07:57:05.233116 PCI 15.2, PIN C, using IRQ #39
650 07:57:05.233153 PCI 15.3, PIN D, using IRQ #40
651 07:57:05.233190 PCI 16.0, PIN A, using IRQ #18
652 07:57:05.233231 PCI 16.1, PIN B, using IRQ #19
653 07:57:05.233268 PCI 16.2, PIN C, using IRQ #20
654 07:57:05.233306 PCI 16.3, PIN D, using IRQ #21
655 07:57:05.233344 PCI 16.4, PIN A, using IRQ #18
656 07:57:05.233381 PCI 16.5, PIN B, using IRQ #19
657 07:57:05.233418 PCI 17.0, PIN A, using IRQ #22
658 07:57:05.233457 PCI 19.0, PIN A, using IRQ #41
659 07:57:05.233494 PCI 19.1, PIN B, using IRQ #42
660 07:57:05.233532 PCI 19.2, PIN C, using IRQ #43
661 07:57:05.233570 PCI 1C.0, PIN A, using IRQ #16
662 07:57:05.233607 PCI 1C.1, PIN B, using IRQ #17
663 07:57:05.233645 PCI 1C.2, PIN C, using IRQ #18
664 07:57:05.233683 PCI 1C.3, PIN D, using IRQ #19
665 07:57:05.233720 PCI 1C.4, PIN A, using IRQ #16
666 07:57:05.233758 PCI 1C.5, PIN B, using IRQ #17
667 07:57:05.233796 PCI 1C.6, PIN C, using IRQ #18
668 07:57:05.233834 PCI 1C.7, PIN D, using IRQ #19
669 07:57:05.233871 PCI 1D.0, PIN A, using IRQ #16
670 07:57:05.233909 PCI 1D.1, PIN B, using IRQ #17
671 07:57:05.233946 PCI 1D.2, PIN C, using IRQ #18
672 07:57:05.233984 PCI 1D.3, PIN D, using IRQ #19
673 07:57:05.234022 PCI 1E.0, PIN A, using IRQ #23
674 07:57:05.234061 PCI 1E.1, PIN B, using IRQ #20
675 07:57:05.234100 PCI 1E.2, PIN C, using IRQ #44
676 07:57:05.234138 PCI 1E.3, PIN D, using IRQ #45
677 07:57:05.234176 PCI 1F.3, PIN B, using IRQ #22
678 07:57:05.234213 PCI 1F.4, PIN C, using IRQ #23
679 07:57:05.234250 PCI 1F.6, PIN D, using IRQ #20
680 07:57:05.234288 PCI 1F.7, PIN A, using IRQ #21
681 07:57:05.234326 IRQ: Using dynamically assigned PCI IO-APIC IRQs
682 07:57:05.234364 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
683 07:57:05.234402 FSPS returned 0
684 07:57:05.234440 Executing Phase 1 of FspMultiPhaseSiInit
685 07:57:05.234479 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
686 07:57:05.234518 port C0 DISC req: usage 1 usb3 1 usb2 1
687 07:57:05.234555 Raw Buffer output 0 00000111
688 07:57:05.234593 Raw Buffer output 1 00000000
689 07:57:05.234632 pmc_send_ipc_cmd succeeded
690 07:57:05.234669 port C1 DISC req: usage 1 usb3 3 usb2 3
691 07:57:05.234708 Raw Buffer output 0 00000331
692 07:57:05.234745 Raw Buffer output 1 00000000
693 07:57:05.234781 pmc_send_ipc_cmd succeeded
694 07:57:05.234819 Detected 6 core, 8 thread CPU.
695 07:57:05.234856 Detected 6 core, 8 thread CPU.
696 07:57:05.234894 Detected 6 core, 8 thread CPU.
697 07:57:05.234932 Detected 6 core, 8 thread CPU.
698 07:57:05.234970 Detected 6 core, 8 thread CPU.
699 07:57:05.235007 Detected 6 core, 8 thread CPU.
700 07:57:05.235045 Detected 6 core, 8 thread CPU.
701 07:57:05.235082 Detected 6 core, 8 thread CPU.
702 07:57:05.235119 Detected 6 core, 8 thread CPU.
703 07:57:05.235158 Detected 6 core, 8 thread CPU.
704 07:57:05.235203 Detected 6 core, 8 thread CPU.
705 07:57:05.235242 Detected 6 core, 8 thread CPU.
706 07:57:05.235280 Detected 6 core, 8 thread CPU.
707 07:57:05.235318 Detected 6 core, 8 thread CPU.
708 07:57:05.235356 Detected 6 core, 8 thread CPU.
709 07:57:05.235394 Detected 6 core, 8 thread CPU.
710 07:57:05.235432 Detected 6 core, 8 thread CPU.
711 07:57:05.235471 Detected 6 core, 8 thread CPU.
712 07:57:05.235508 Detected 6 core, 8 thread CPU.
713 07:57:05.235546 Detected 6 core, 8 thread CPU.
714 07:57:05.235583 Detected 6 core, 8 thread CPU.
715 07:57:05.235621 Detected 6 core, 8 thread CPU.
716 07:57:05.235659 Detected 6 core, 8 thread CPU.
717 07:57:05.235698 Detected 6 core, 8 thread CPU.
718 07:57:05.235736 Detected 6 core, 8 thread CPU.
719 07:57:05.235773 Detected 6 core, 8 thread CPU.
720 07:57:05.235812 Detected 6 core, 8 thread CPU.
721 07:57:05.235849 Detected 6 core, 8 thread CPU.
722 07:57:05.235886 Detected 6 core, 8 thread CPU.
723 07:57:05.235924 Detected 6 core, 8 thread CPU.
724 07:57:05.235962 Detected 6 core, 8 thread CPU.
725 07:57:05.236000 Detected 6 core, 8 thread CPU.
726 07:57:05.236038 Detected 6 core, 8 thread CPU.
727 07:57:05.236076 Detected 6 core, 8 thread CPU.
728 07:57:05.236113 Detected 6 core, 8 thread CPU.
729 07:57:05.236151 Detected 6 core, 8 thread CPU.
730 07:57:05.236188 Detected 6 core, 8 thread CPU.
731 07:57:05.236225 Detected 6 core, 8 thread CPU.
732 07:57:05.236263 Detected 6 core, 8 thread CPU.
733 07:57:05.236301 Detected 6 core, 8 thread CPU.
734 07:57:05.236338 Detected 6 core, 8 thread CPU.
735 07:57:05.236375 Detected 6 core, 8 thread CPU.
736 07:57:05.236412 Display FSP Version Info HOB
737 07:57:05.236450 Reference Code - CPU = c.0.65.70
738 07:57:05.236487 uCode Version = 0.0.4.23
739 07:57:05.236524 TXT ACM version = ff.ff.ff.ffff
740 07:57:05.236562 Reference Code - ME = c.0.65.70
741 07:57:05.236600 MEBx version = 0.0.0.0
742 07:57:05.236638 ME Firmware Version = Consumer SKU
743 07:57:05.236676 Reference Code - PCH = c.0.65.70
744 07:57:05.236715 PCH-CRID Status = Disabled
745 07:57:05.236752 PCH-CRID Original Value = ff.ff.ff.ffff
746 07:57:05.236790 PCH-CRID New Value = ff.ff.ff.ffff
747 07:57:05.236828 OPROM - RST - RAID = ff.ff.ff.ffff
748 07:57:05.236867 PCH Hsio Version = 4.0.0.0
749 07:57:05.236905 Reference Code - SA - System Agent = c.0.65.70
750 07:57:05.236945 Reference Code - MRC = 0.0.3.80
751 07:57:05.236983 SA - PCIe Version = c.0.65.70
752 07:57:05.237021 SA-CRID Status = Disabled
753 07:57:05.237060 SA-CRID Original Value = 0.0.0.4
754 07:57:05.237098 SA-CRID New Value = 0.0.0.4
755 07:57:05.237136 OPROM - VBIOS = ff.ff.ff.ffff
756 07:57:05.237174 IO Manageability Engine FW Version = 24.0.4.0
757 07:57:05.237212 PHY Build Version = 0.0.0.2016
758 07:57:05.237433 Thunderbolt(TM) FW Version = 0.0.0.0
759 07:57:05.237485 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
760 07:57:05.237526 BS: BS_DEV_INIT_CHIPS run times (exec / console): 463 / 507 ms
761 07:57:05.237564 Enumerating buses...
762 07:57:05.237602 Show all devs... Before device enumeration.
763 07:57:05.237640 Root Device: enabled 1
764 07:57:05.237678 CPU_CLUSTER: 0: enabled 1
765 07:57:05.237715 DOMAIN: 0000: enabled 1
766 07:57:05.237754 GPIO: 0: enabled 1
767 07:57:05.237792 PCI: 00:00.0: enabled 1
768 07:57:05.237830 PCI: 00:01.0: enabled 0
769 07:57:05.237868 PCI: 00:01.1: enabled 0
770 07:57:05.237906 PCI: 00:02.0: enabled 1
771 07:57:05.237945 PCI: 00:04.0: enabled 1
772 07:57:05.237983 PCI: 00:05.0: enabled 0
773 07:57:05.238021 PCI: 00:06.0: enabled 1
774 07:57:05.238058 PCI: 00:06.2: enabled 0
775 07:57:05.238095 PCI: 00:07.0: enabled 0
776 07:57:05.238135 PCI: 00:07.1: enabled 0
777 07:57:05.238172 PCI: 00:07.2: enabled 0
778 07:57:05.238210 PCI: 00:07.3: enabled 0
779 07:57:05.238248 PCI: 00:08.0: enabled 0
780 07:57:05.238286 PCI: 00:09.0: enabled 0
781 07:57:05.238324 PCI: 00:0a.0: enabled 1
782 07:57:05.238362 PCI: 00:0d.0: enabled 1
783 07:57:05.238400 PCI: 00:0d.1: enabled 0
784 07:57:05.238438 PCI: 00:0d.2: enabled 0
785 07:57:05.238476 PCI: 00:0d.3: enabled 0
786 07:57:05.238513 PCI: 00:0e.0: enabled 0
787 07:57:05.238551 PCI: 00:10.0: enabled 0
788 07:57:05.238588 PCI: 00:10.1: enabled 0
789 07:57:05.238626 PCI: 00:10.6: enabled 0
790 07:57:05.238664 PCI: 00:10.7: enabled 0
791 07:57:05.238702 PCI: 00:12.0: enabled 0
792 07:57:05.238740 PCI: 00:12.6: enabled 0
793 07:57:05.238777 PCI: 00:12.7: enabled 0
794 07:57:05.238814 PCI: 00:13.0: enabled 0
795 07:57:05.238852 PCI: 00:14.0: enabled 1
796 07:57:05.238890 PCI: 00:14.1: enabled 0
797 07:57:05.238929 PCI: 00:14.2: enabled 1
798 07:57:05.238966 PCI: 00:14.3: enabled 1
799 07:57:05.239003 PCI: 00:15.0: enabled 1
800 07:57:05.239040 PCI: 00:15.1: enabled 1
801 07:57:05.239078 PCI: 00:15.2: enabled 0
802 07:57:05.239117 PCI: 00:15.3: enabled 1
803 07:57:05.239155 PCI: 00:16.0: enabled 1
804 07:57:05.239199 PCI: 00:16.1: enabled 0
805 07:57:05.239237 PCI: 00:16.2: enabled 0
806 07:57:05.239276 PCI: 00:16.3: enabled 0
807 07:57:05.239314 PCI: 00:16.4: enabled 0
808 07:57:05.239359 PCI: 00:16.5: enabled 0
809 07:57:05.239399 PCI: 00:17.0: enabled 1
810 07:57:05.239437 PCI: 00:19.0: enabled 0
811 07:57:05.239474 PCI: 00:19.1: enabled 1
812 07:57:05.239512 PCI: 00:19.2: enabled 0
813 07:57:05.239549 PCI: 00:1a.0: enabled 0
814 07:57:05.239586 PCI: 00:1c.0: enabled 0
815 07:57:05.239624 PCI: 00:1c.1: enabled 0
816 07:57:05.239662 PCI: 00:1c.2: enabled 0
817 07:57:05.239700 PCI: 00:1c.3: enabled 0
818 07:57:05.239738 PCI: 00:1c.4: enabled 0
819 07:57:05.239776 PCI: 00:1c.5: enabled 0
820 07:57:05.239814 PCI: 00:1c.6: enabled 0
821 07:57:05.239853 PCI: 00:1c.7: enabled 0
822 07:57:05.239890 PCI: 00:1d.0: enabled 0
823 07:57:05.239929 PCI: 00:1d.1: enabled 0
824 07:57:05.239966 PCI: 00:1d.2: enabled 0
825 07:57:05.240003 PCI: 00:1d.3: enabled 0
826 07:57:05.240039 PCI: 00:1e.0: enabled 1
827 07:57:05.240076 PCI: 00:1e.1: enabled 0
828 07:57:05.240113 PCI: 00:1e.2: enabled 0
829 07:57:05.240150 PCI: 00:1e.3: enabled 1
830 07:57:05.240187 PCI: 00:1f.0: enabled 1
831 07:57:05.240225 PCI: 00:1f.1: enabled 0
832 07:57:05.240263 PCI: 00:1f.2: enabled 1
833 07:57:05.240300 PCI: 00:1f.3: enabled 1
834 07:57:05.240338 PCI: 00:1f.4: enabled 0
835 07:57:05.240375 PCI: 00:1f.5: enabled 1
836 07:57:05.240413 PCI: 00:1f.6: enabled 0
837 07:57:05.240450 PCI: 00:1f.7: enabled 0
838 07:57:05.240487 GENERIC: 0.0: enabled 1
839 07:57:05.240524 GENERIC: 0.0: enabled 1
840 07:57:05.240561 GENERIC: 1.0: enabled 1
841 07:57:05.240599 GENERIC: 0.0: enabled 1
842 07:57:05.240637 GENERIC: 1.0: enabled 1
843 07:57:05.240675 USB0 port 0: enabled 1
844 07:57:05.240714 USB0 port 0: enabled 1
845 07:57:05.240752 GENERIC: 0.0: enabled 1
846 07:57:05.240790 I2C: 00:1a: enabled 1
847 07:57:05.240827 I2C: 00:31: enabled 1
848 07:57:05.240866 I2C: 00:32: enabled 1
849 07:57:05.240904 I2C: 00:50: enabled 1
850 07:57:05.240941 I2C: 00:10: enabled 1
851 07:57:05.240978 I2C: 00:15: enabled 1
852 07:57:05.241016 I2C: 00:2c: enabled 1
853 07:57:05.241054 GENERIC: 0.0: enabled 1
854 07:57:05.241091 SPI: 00: enabled 1
855 07:57:05.241128 PNP: 0c09.0: enabled 1
856 07:57:05.241165 GENERIC: 0.0: enabled 1
857 07:57:05.241204 USB3 port 0: enabled 1
858 07:57:05.241241 USB3 port 1: enabled 0
859 07:57:05.241278 USB3 port 2: enabled 1
860 07:57:05.241315 USB3 port 3: enabled 0
861 07:57:05.241352 USB2 port 0: enabled 1
862 07:57:05.241390 USB2 port 1: enabled 0
863 07:57:05.241429 USB2 port 2: enabled 1
864 07:57:05.241467 USB2 port 3: enabled 0
865 07:57:05.241505 USB2 port 4: enabled 0
866 07:57:05.241543 USB2 port 5: enabled 1
867 07:57:05.241580 USB2 port 6: enabled 0
868 07:57:05.241618 USB2 port 7: enabled 0
869 07:57:05.241655 USB2 port 8: enabled 1
870 07:57:05.241691 USB2 port 9: enabled 1
871 07:57:05.241729 USB3 port 0: enabled 1
872 07:57:05.241766 USB3 port 1: enabled 0
873 07:57:05.241804 USB3 port 2: enabled 0
874 07:57:05.241842 USB3 port 3: enabled 0
875 07:57:05.241879 GENERIC: 0.0: enabled 1
876 07:57:05.241917 GENERIC: 1.0: enabled 1
877 07:57:05.241955 APIC: 00: enabled 1
878 07:57:05.241993 APIC: 16: enabled 1
879 07:57:05.242032 APIC: 10: enabled 1
880 07:57:05.242069 APIC: 12: enabled 1
881 07:57:05.242107 APIC: 14: enabled 1
882 07:57:05.242144 APIC: 09: enabled 1
883 07:57:05.242182 APIC: 01: enabled 1
884 07:57:05.242220 APIC: 08: enabled 1
885 07:57:05.242258 Compare with tree...
886 07:57:05.242295 Root Device: enabled 1
887 07:57:05.242333 CPU_CLUSTER: 0: enabled 1
888 07:57:05.242372 APIC: 00: enabled 1
889 07:57:05.242410 APIC: 16: enabled 1
890 07:57:05.242448 APIC: 10: enabled 1
891 07:57:05.242485 APIC: 12: enabled 1
892 07:57:05.242523 APIC: 14: enabled 1
893 07:57:05.242562 APIC: 09: enabled 1
894 07:57:05.242600 APIC: 01: enabled 1
895 07:57:05.242638 APIC: 08: enabled 1
896 07:57:05.242676 DOMAIN: 0000: enabled 1
897 07:57:05.242713 GPIO: 0: enabled 1
898 07:57:05.242751 PCI: 00:00.0: enabled 1
899 07:57:05.242789 PCI: 00:01.0: enabled 0
900 07:57:05.242827 PCI: 00:01.1: enabled 0
901 07:57:05.242865 PCI: 00:02.0: enabled 1
902 07:57:05.242902 PCI: 00:04.0: enabled 1
903 07:57:05.242940 GENERIC: 0.0: enabled 1
904 07:57:05.242978 PCI: 00:05.0: enabled 0
905 07:57:05.243016 PCI: 00:06.0: enabled 1
906 07:57:05.243054 PCI: 00:06.2: enabled 0
907 07:57:05.243092 PCI: 00:08.0: enabled 0
908 07:57:05.243129 PCI: 00:09.0: enabled 0
909 07:57:05.243167 PCI: 00:0a.0: enabled 1
910 07:57:05.243213 PCI: 00:0d.0: enabled 1
911 07:57:05.243251 USB0 port 0: enabled 1
912 07:57:05.243289 USB3 port 0: enabled 1
913 07:57:05.243329 USB3 port 1: enabled 0
914 07:57:05.243367 USB3 port 2: enabled 1
915 07:57:05.243404 USB3 port 3: enabled 0
916 07:57:05.243442 PCI: 00:0d.1: enabled 0
917 07:57:05.243480 PCI: 00:0d.2: enabled 0
918 07:57:05.243518 PCI: 00:0d.3: enabled 0
919 07:57:05.243555 PCI: 00:0e.0: enabled 0
920 07:57:05.243778 PCI: 00:10.0: enabled 0
921 07:57:05.243824 PCI: 00:10.1: enabled 0
922 07:57:05.243866 PCI: 00:10.6: enabled 0
923 07:57:05.243904 PCI: 00:10.7: enabled 0
924 07:57:05.243943 PCI: 00:12.0: enabled 0
925 07:57:05.243981 PCI: 00:12.6: enabled 0
926 07:57:05.244020 PCI: 00:12.7: enabled 0
927 07:57:05.244058 PCI: 00:13.0: enabled 0
928 07:57:05.244097 PCI: 00:14.0: enabled 1
929 07:57:05.244135 USB0 port 0: enabled 1
930 07:57:05.244173 USB2 port 0: enabled 1
931 07:57:05.244211 USB2 port 1: enabled 0
932 07:57:05.244248 USB2 port 2: enabled 1
933 07:57:05.244286 USB2 port 3: enabled 0
934 07:57:05.244324 USB2 port 4: enabled 0
935 07:57:05.244362 USB2 port 5: enabled 1
936 07:57:05.244399 USB2 port 6: enabled 0
937 07:57:05.244437 USB2 port 7: enabled 0
938 07:57:05.244478 USB2 port 8: enabled 1
939 07:57:05.244515 USB2 port 9: enabled 1
940 07:57:05.244553 USB3 port 0: enabled 1
941 07:57:05.244591 USB3 port 1: enabled 0
942 07:57:05.244629 USB3 port 2: enabled 0
943 07:57:05.244667 USB3 port 3: enabled 0
944 07:57:05.244705 PCI: 00:14.1: enabled 0
945 07:57:05.244742 PCI: 00:14.2: enabled 1
946 07:57:05.244780 PCI: 00:14.3: enabled 1
947 07:57:05.244817 GENERIC: 0.0: enabled 1
948 07:57:05.244856 PCI: 00:15.0: enabled 1
949 07:57:05.244894 I2C: 00:1a: enabled 1
950 07:57:05.244933 I2C: 00:31: enabled 1
951 07:57:05.244971 I2C: 00:32: enabled 1
952 07:57:05.245009 PCI: 00:15.1: enabled 1
953 07:57:05.245047 I2C: 00:50: enabled 1
954 07:57:05.245084 PCI: 00:15.2: enabled 0
955 07:57:05.245123 PCI: 00:15.3: enabled 1
956 07:57:05.245160 I2C: 00:10: enabled 1
957 07:57:05.245198 PCI: 00:16.0: enabled 1
958 07:57:05.245235 PCI: 00:16.1: enabled 0
959 07:57:05.245274 PCI: 00:16.2: enabled 0
960 07:57:05.245311 PCI: 00:16.3: enabled 0
961 07:57:05.245350 PCI: 00:16.4: enabled 0
962 07:57:05.245387 PCI: 00:16.5: enabled 0
963 07:57:05.245424 PCI: 00:17.0: enabled 1
964 07:57:05.245462 PCI: 00:19.0: enabled 0
965 07:57:05.245499 PCI: 00:19.1: enabled 1
966 07:57:05.245537 I2C: 00:15: enabled 1
967 07:57:05.245575 I2C: 00:2c: enabled 1
968 07:57:05.245612 PCI: 00:19.2: enabled 0
969 07:57:05.245651 PCI: 00:1a.0: enabled 0
970 07:57:05.245689 PCI: 00:1e.0: enabled 1
971 07:57:05.245727 PCI: 00:1e.1: enabled 0
972 07:57:05.245764 PCI: 00:1e.2: enabled 0
973 07:57:05.245803 PCI: 00:1e.3: enabled 1
974 07:57:05.245840 SPI: 00: enabled 1
975 07:57:05.245878 PCI: 00:1f.0: enabled 1
976 07:57:05.245915 PNP: 0c09.0: enabled 1
977 07:57:05.245952 PCI: 00:1f.1: enabled 0
978 07:57:05.245990 PCI: 00:1f.2: enabled 1
979 07:57:05.246027 GENERIC: 0.0: enabled 1
980 07:57:05.246065 GENERIC: 0.0: enabled 1
981 07:57:05.246102 GENERIC: 1.0: enabled 1
982 07:57:05.246140 PCI: 00:1f.3: enabled 1
983 07:57:05.246179 PCI: 00:1f.4: enabled 0
984 07:57:05.246216 PCI: 00:1f.5: enabled 1
985 07:57:05.246254 PCI: 00:1f.6: enabled 0
986 07:57:05.246291 PCI: 00:1f.7: enabled 0
987 07:57:05.246329 Root Device scanning...
988 07:57:05.246367 scan_static_bus for Root Device
989 07:57:05.246404 CPU_CLUSTER: 0 enabled
990 07:57:05.246441 DOMAIN: 0000 enabled
991 07:57:05.246478 DOMAIN: 0000 scanning...
992 07:57:05.246517 PCI: pci_scan_bus for bus 00
993 07:57:05.246554 PCI: 00:00.0 [8086/0000] ops
994 07:57:05.246593 PCI: 00:00.0 [8086/4609] enabled
995 07:57:05.246630 PCI: 00:02.0 [8086/0000] bus ops
996 07:57:05.246668 PCI: 00:02.0 [8086/46b3] enabled
997 07:57:05.246705 PCI: 00:04.0 [8086/0000] bus ops
998 07:57:05.246742 PCI: 00:04.0 [8086/461d] enabled
999 07:57:05.246780 PCI: 00:06.0 [8086/0000] bus ops
1000 07:57:05.246817 PCI: 00:06.0 [8086/464d] enabled
1001 07:57:05.246854 PCI: 00:08.0 [8086/464f] disabled
1002 07:57:05.246891 PCI: 00:0a.0 [8086/467d] enabled
1003 07:57:05.246929 PCI: 00:0d.0 [8086/0000] bus ops
1004 07:57:05.246966 PCI: 00:0d.0 [8086/461e] enabled
1005 07:57:05.247003 PCI: 00:14.0 [8086/0000] bus ops
1006 07:57:05.247040 PCI: 00:14.0 [8086/51ed] enabled
1007 07:57:05.247078 PCI: 00:14.2 [8086/51ef] enabled
1008 07:57:05.247116 PCI: 00:14.3 [8086/0000] bus ops
1009 07:57:05.247153 PCI: 00:14.3 [8086/51f0] enabled
1010 07:57:05.247198 PCI: 00:15.0 [8086/0000] bus ops
1011 07:57:05.247238 PCI: 00:15.0 [8086/51e8] enabled
1012 07:57:05.247289 PCI: 00:15.1 [8086/0000] bus ops
1013 07:57:05.247326 PCI: 00:15.1 [8086/51e9] enabled
1014 07:57:05.247363 PCI: 00:15.2 [8086/0000] bus ops
1015 07:57:05.247401 PCI: 00:15.2 [8086/51ea] disabled
1016 07:57:05.247438 PCI: 00:15.3 [8086/0000] bus ops
1017 07:57:05.247491 PCI: 00:15.3 [8086/51eb] enabled
1018 07:57:05.247529 PCI: 00:16.0 [8086/0000] ops
1019 07:57:05.247567 PCI: 00:16.0 [8086/51e0] enabled
1020 07:57:05.247619 PCI: Static device PCI: 00:17.0 not found, disabling it.
1021 07:57:05.247657 PCI: 00:19.0 [8086/0000] bus ops
1022 07:57:05.247696 PCI: 00:19.0 [8086/51c5] disabled
1023 07:57:05.247733 PCI: 00:19.1 [8086/0000] bus ops
1024 07:57:05.247770 PCI: 00:19.1 [8086/51c6] enabled
1025 07:57:05.247807 PCI: 00:1e.0 [8086/0000] ops
1026 07:57:05.247844 PCI: 00:1e.0 [8086/51a8] enabled
1027 07:57:05.247881 PCI: 00:1e.3 [8086/0000] bus ops
1028 07:57:05.247918 PCI: 00:1e.3 [8086/51ab] enabled
1029 07:57:05.247954 PCI: 00:1f.0 [8086/0000] bus ops
1030 07:57:05.247990 PCI: 00:1f.0 [8086/5182] enabled
1031 07:57:05.248028 RTC Init
1032 07:57:05.248065 Set power on after power failure.
1033 07:57:05.248103 Disabling Deep S3
1034 07:57:05.248139 Disabling Deep S3
1035 07:57:05.248177 Disabling Deep S4
1036 07:57:05.248215 Disabling Deep S4
1037 07:57:05.248251 Disabling Deep S5
1038 07:57:05.248288 Disabling Deep S5
1039 07:57:05.248325 PCI: 00:1f.2 [0000/0000] hidden
1040 07:57:05.248363 PCI: 00:1f.3 [8086/0000] bus ops
1041 07:57:05.248400 PCI: 00:1f.3 [8086/51c8] enabled
1042 07:57:05.248438 PCI: 00:1f.5 [8086/0000] bus ops
1043 07:57:05.248476 PCI: 00:1f.5 [8086/51a4] enabled
1044 07:57:05.248512 GPIO: 0 enabled
1045 07:57:05.248566 PCI: Leftover static devices:
1046 07:57:05.248634 PCI: 00:01.0
1047 07:57:05.248686 PCI: 00:01.1
1048 07:57:05.248722 PCI: 00:05.0
1049 07:57:05.248758 PCI: 00:06.2
1050 07:57:05.248794 PCI: 00:09.0
1051 07:57:05.248830 PCI: 00:0d.1
1052 07:57:05.248867 PCI: 00:0d.2
1053 07:57:05.248905 PCI: 00:0d.3
1054 07:57:05.248940 PCI: 00:0e.0
1055 07:57:05.248978 PCI: 00:10.0
1056 07:57:05.249014 PCI: 00:10.1
1057 07:57:05.249050 PCI: 00:10.6
1058 07:57:05.249087 PCI: 00:10.7
1059 07:57:05.249124 PCI: 00:12.0
1060 07:57:05.249160 PCI: 00:12.6
1061 07:57:05.249198 PCI: 00:12.7
1062 07:57:05.249235 PCI: 00:13.0
1063 07:57:05.249271 PCI: 00:14.1
1064 07:57:05.249307 PCI: 00:16.1
1065 07:57:05.249344 PCI: 00:16.2
1066 07:57:05.249381 PCI: 00:16.3
1067 07:57:05.249419 PCI: 00:16.4
1068 07:57:05.249455 PCI: 00:16.5
1069 07:57:05.249492 PCI: 00:17.0
1070 07:57:05.249528 PCI: 00:19.2
1071 07:57:05.249565 PCI: 00:1a.0
1072 07:57:05.249619 PCI: 00:1e.1
1073 07:57:05.249656 PCI: 00:1e.2
1074 07:57:05.249706 PCI: 00:1f.1
1075 07:57:05.249742 PCI: 00:1f.4
1076 07:57:05.249779 PCI: 00:1f.6
1077 07:57:05.249996 PCI: 00:1f.7
1078 07:57:05.250062 PCI: Check your devicetree.cb.
1079 07:57:05.250103 PCI: 00:02.0 scanning...
1080 07:57:05.250142 scan_generic_bus for PCI: 00:02.0
1081 07:57:05.250181 scan_generic_bus for PCI: 00:02.0 done
1082 07:57:05.250220 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1083 07:57:05.250259 PCI: 00:04.0 scanning...
1084 07:57:05.250297 scan_generic_bus for PCI: 00:04.0
1085 07:57:05.250335 GENERIC: 0.0 enabled
1086 07:57:05.250375 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1087 07:57:05.250417 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1088 07:57:05.250456 PCI: 00:06.0 scanning...
1089 07:57:05.250494 do_pci_scan_bridge for PCI: 00:06.0
1090 07:57:05.250532 PCI: pci_scan_bus for bus 01
1091 07:57:05.250571 PCI: 01:00.0 [15b7/5009] enabled
1092 07:57:05.250610 Enabling Common Clock Configuration
1093 07:57:05.250648 L1 Sub-State supported from root port 6
1094 07:57:05.250689 L1 Sub-State Support = 0x5
1095 07:57:05.250729 CommonModeRestoreTime = 0x6e
1096 07:57:05.250767 Power On Value = 0x5, Power On Scale = 0x2
1097 07:57:05.250806 ASPM: Enabled L1
1098 07:57:05.250844 PCIe: Max_Payload_Size adjusted to 256
1099 07:57:05.250882 PCI: 01:00.0: Enabled LTR
1100 07:57:05.250921 PCI: 01:00.0: Programmed LTR max latencies
1101 07:57:05.250960 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1102 07:57:05.250997 PCI: 00:0d.0 scanning...
1103 07:57:05.251034 scan_static_bus for PCI: 00:0d.0
1104 07:57:05.251072 USB0 port 0 enabled
1105 07:57:05.251111 USB0 port 0 scanning...
1106 07:57:05.251149 scan_static_bus for USB0 port 0
1107 07:57:05.251192 USB3 port 0 enabled
1108 07:57:05.251232 USB3 port 1 disabled
1109 07:57:05.251271 USB3 port 2 enabled
1110 07:57:05.251310 USB3 port 3 disabled
1111 07:57:05.251348 USB3 port 0 scanning...
1112 07:57:05.251386 scan_static_bus for USB3 port 0
1113 07:57:05.251425 scan_static_bus for USB3 port 0 done
1114 07:57:05.251463 scan_bus: bus USB3 port 0 finished in 6 msecs
1115 07:57:05.251502 USB3 port 2 scanning...
1116 07:57:05.251540 scan_static_bus for USB3 port 2
1117 07:57:05.251577 scan_static_bus for USB3 port 2 done
1118 07:57:05.251616 scan_bus: bus USB3 port 2 finished in 6 msecs
1119 07:57:05.251655 scan_static_bus for USB0 port 0 done
1120 07:57:05.251692 scan_bus: bus USB0 port 0 finished in 43 msecs
1121 07:57:05.251729 scan_static_bus for PCI: 00:0d.0 done
1122 07:57:05.251766 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1123 07:57:05.251804 PCI: 00:14.0 scanning...
1124 07:57:05.251843 scan_static_bus for PCI: 00:14.0
1125 07:57:05.251880 USB0 port 0 enabled
1126 07:57:05.251918 USB0 port 0 scanning...
1127 07:57:05.251956 scan_static_bus for USB0 port 0
1128 07:57:05.251993 USB2 port 0 enabled
1129 07:57:05.252031 USB2 port 1 disabled
1130 07:57:05.252070 USB2 port 2 enabled
1131 07:57:05.252108 USB2 port 3 disabled
1132 07:57:05.252145 USB2 port 4 disabled
1133 07:57:05.252182 USB2 port 5 enabled
1134 07:57:05.252220 USB2 port 6 disabled
1135 07:57:05.252258 USB2 port 7 disabled
1136 07:57:05.252296 USB2 port 8 enabled
1137 07:57:05.252334 USB2 port 9 enabled
1138 07:57:05.252372 USB3 port 0 enabled
1139 07:57:05.252416 USB3 port 1 disabled
1140 07:57:05.252453 USB3 port 2 disabled
1141 07:57:05.252489 USB3 port 3 disabled
1142 07:57:05.252526 USB2 port 0 scanning...
1143 07:57:05.252563 scan_static_bus for USB2 port 0
1144 07:57:05.252601 scan_static_bus for USB2 port 0 done
1145 07:57:05.252638 scan_bus: bus USB2 port 0 finished in 6 msecs
1146 07:57:05.252675 USB2 port 2 scanning...
1147 07:57:05.252712 scan_static_bus for USB2 port 2
1148 07:57:05.252749 scan_static_bus for USB2 port 2 done
1149 07:57:05.252786 scan_bus: bus USB2 port 2 finished in 6 msecs
1150 07:57:05.252822 USB2 port 5 scanning...
1151 07:57:05.252860 scan_static_bus for USB2 port 5
1152 07:57:05.252897 scan_static_bus for USB2 port 5 done
1153 07:57:05.252934 scan_bus: bus USB2 port 5 finished in 6 msecs
1154 07:57:05.252971 USB2 port 8 scanning...
1155 07:57:05.253009 scan_static_bus for USB2 port 8
1156 07:57:05.253046 scan_static_bus for USB2 port 8 done
1157 07:57:05.253083 scan_bus: bus USB2 port 8 finished in 6 msecs
1158 07:57:05.253120 USB2 port 9 scanning...
1159 07:57:05.253157 scan_static_bus for USB2 port 9
1160 07:57:05.253194 scan_static_bus for USB2 port 9 done
1161 07:57:05.253231 scan_bus: bus USB2 port 9 finished in 6 msecs
1162 07:57:05.253268 USB3 port 0 scanning...
1163 07:57:05.253304 scan_static_bus for USB3 port 0
1164 07:57:05.253351 scan_static_bus for USB3 port 0 done
1165 07:57:05.253390 scan_bus: bus USB3 port 0 finished in 6 msecs
1166 07:57:05.253428 scan_static_bus for USB0 port 0 done
1167 07:57:05.253466 scan_bus: bus USB0 port 0 finished in 120 msecs
1168 07:57:05.253505 scan_static_bus for PCI: 00:14.0 done
1169 07:57:05.253543 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1170 07:57:05.253583 PCI: 00:14.3 scanning...
1171 07:57:05.253621 scan_static_bus for PCI: 00:14.3
1172 07:57:05.253659 GENERIC: 0.0 enabled
1173 07:57:05.253698 scan_static_bus for PCI: 00:14.3 done
1174 07:57:05.253736 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1175 07:57:05.253774 PCI: 00:15.0 scanning...
1176 07:57:05.253811 scan_static_bus for PCI: 00:15.0
1177 07:57:05.253849 I2C: 00:1a enabled
1178 07:57:05.253887 I2C: 00:31 enabled
1179 07:57:05.253925 I2C: 00:32 enabled
1180 07:57:05.253963 scan_static_bus for PCI: 00:15.0 done
1181 07:57:05.254000 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1182 07:57:05.254038 PCI: 00:15.1 scanning...
1183 07:57:05.254075 scan_static_bus for PCI: 00:15.1
1184 07:57:05.254113 I2C: 00:50 enabled
1185 07:57:05.254150 scan_static_bus for PCI: 00:15.1 done
1186 07:57:05.254188 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1187 07:57:05.254226 PCI: 00:15.3 scanning...
1188 07:57:05.254264 scan_static_bus for PCI: 00:15.3
1189 07:57:05.254303 I2C: 00:10 enabled
1190 07:57:05.254341 scan_static_bus for PCI: 00:15.3 done
1191 07:57:05.254379 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1192 07:57:05.254417 PCI: 00:19.1 scanning...
1193 07:57:05.254455 scan_static_bus for PCI: 00:19.1
1194 07:57:05.254493 I2C: 00:15 enabled
1195 07:57:05.254531 I2C: 00:2c enabled
1196 07:57:05.254569 scan_static_bus for PCI: 00:19.1 done
1197 07:57:05.254608 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1198 07:57:05.254645 PCI: 00:1e.3 scanning...
1199 07:57:05.254683 scan_generic_bus for PCI: 00:1e.3
1200 07:57:05.254721 SPI: 00 enabled
1201 07:57:05.254759 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1202 07:57:05.254981 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1203 07:57:05.255029 PCI: 00:1f.0 scanning...
1204 07:57:05.255076 scan_static_bus for PCI: 00:1f.0
1205 07:57:05.255120 PNP: 0c09.0 enabled
1206 07:57:05.255159 PNP: 0c09.0 scanning...
1207 07:57:05.255202 scan_static_bus for PNP: 0c09.0
1208 07:57:05.255248 scan_static_bus for PNP: 0c09.0 done
1209 07:57:05.255286 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1210 07:57:05.255330 scan_static_bus for PCI: 00:1f.0 done
1211 07:57:05.255367 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1212 07:57:05.255404 PCI: 00:1f.2 scanning...
1213 07:57:05.255441 scan_static_bus for PCI: 00:1f.2
1214 07:57:05.255478 GENERIC: 0.0 enabled
1215 07:57:05.255515 GENERIC: 0.0 scanning...
1216 07:57:05.255553 scan_static_bus for GENERIC: 0.0
1217 07:57:05.255590 GENERIC: 0.0 enabled
1218 07:57:05.255626 GENERIC: 1.0 enabled
1219 07:57:05.255663 scan_static_bus for GENERIC: 0.0 done
1220 07:57:05.255699 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1221 07:57:05.255736 scan_static_bus for PCI: 00:1f.2 done
1222 07:57:05.255773 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1223 07:57:05.255809 PCI: 00:1f.3 scanning...
1224 07:57:05.255846 scan_static_bus for PCI: 00:1f.3
1225 07:57:05.255883 scan_static_bus for PCI: 00:1f.3 done
1226 07:57:05.255919 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1227 07:57:05.255956 PCI: 00:1f.5 scanning...
1228 07:57:05.255993 scan_generic_bus for PCI: 00:1f.5
1229 07:57:05.256030 scan_generic_bus for PCI: 00:1f.5 done
1230 07:57:05.256067 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1231 07:57:05.256104 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1232 07:57:05.256141 scan_static_bus for Root Device done
1233 07:57:05.256177 scan_bus: bus Root Device finished in 729 msecs
1234 07:57:05.256215 done
1235 07:57:05.256251 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1236 07:57:05.256290 Chrome EC: UHEPI supported
1237 07:57:05.256327 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1238 07:57:05.256364 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1239 07:57:05.256401 SPI flash protection: WPSW=0 SRP0=0
1240 07:57:05.256438 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1241 07:57:05.256475 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1242 07:57:05.256511 found VGA at PCI: 00:02.0
1243 07:57:05.256548 Setting up VGA for PCI: 00:02.0
1244 07:57:05.256585 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1245 07:57:05.256623 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1246 07:57:05.256659 Allocating resources...
1247 07:57:05.256705 Reading resources...
1248 07:57:05.256742 Root Device read_resources bus 0 link: 0
1249 07:57:05.256781 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1250 07:57:05.256818 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1251 07:57:05.256856 DOMAIN: 0000 read_resources bus 0 link: 0
1252 07:57:05.256894 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1253 07:57:05.256932 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1254 07:57:05.256970 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1255 07:57:05.257008 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1256 07:57:05.257046 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1257 07:57:05.257084 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1258 07:57:05.257122 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1259 07:57:05.257159 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1260 07:57:05.257196 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1261 07:57:05.257233 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1262 07:57:05.257271 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1263 07:57:05.257308 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1264 07:57:05.257346 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1265 07:57:05.257385 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1266 07:57:05.257421 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1267 07:57:05.257459 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1268 07:57:05.257498 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1269 07:57:05.257536 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1270 07:57:05.257574 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1271 07:57:05.257611 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1272 07:57:05.257649 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1273 07:57:05.257686 PCI: 00:04.0 read_resources bus 1 link: 0
1274 07:57:05.257723 PCI: 00:04.0 read_resources bus 1 link: 0 done
1275 07:57:05.257761 PCI: 00:06.0 read_resources bus 1 link: 0
1276 07:57:05.257799 PCI: 00:06.0 read_resources bus 1 link: 0 done
1277 07:57:05.257836 PCI: 00:0d.0 read_resources bus 0 link: 0
1278 07:57:05.257873 USB0 port 0 read_resources bus 0 link: 0
1279 07:57:05.257910 USB0 port 0 read_resources bus 0 link: 0 done
1280 07:57:05.257948 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1281 07:57:05.257986 PCI: 00:14.0 read_resources bus 0 link: 0
1282 07:57:05.258023 USB0 port 0 read_resources bus 0 link: 0
1283 07:57:05.258060 USB0 port 0 read_resources bus 0 link: 0 done
1284 07:57:05.258096 PCI: 00:14.0 read_resources bus 0 link: 0 done
1285 07:57:05.258134 PCI: 00:14.3 read_resources bus 0 link: 0
1286 07:57:05.258171 PCI: 00:14.3 read_resources bus 0 link: 0 done
1287 07:57:05.258209 PCI: 00:15.0 read_resources bus 0 link: 0
1288 07:57:05.258247 PCI: 00:15.0 read_resources bus 0 link: 0 done
1289 07:57:05.258283 PCI: 00:15.1 read_resources bus 0 link: 0
1290 07:57:05.258320 PCI: 00:15.1 read_resources bus 0 link: 0 done
1291 07:57:05.258540 PCI: 00:15.3 read_resources bus 0 link: 0
1292 07:57:05.258586 PCI: 00:15.3 read_resources bus 0 link: 0 done
1293 07:57:05.258646 PCI: 00:19.1 read_resources bus 0 link: 0
1294 07:57:05.258698 PCI: 00:19.1 read_resources bus 0 link: 0 done
1295 07:57:05.258759 PCI: 00:1e.3 read_resources bus 2 link: 0
1296 07:57:05.258817 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1297 07:57:05.258858 PCI: 00:1f.0 read_resources bus 0 link: 0
1298 07:57:05.258896 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1299 07:57:05.258935 PCI: 00:1f.2 read_resources bus 0 link: 0
1300 07:57:05.258973 GENERIC: 0.0 read_resources bus 0 link: 0
1301 07:57:05.259010 GENERIC: 0.0 read_resources bus 0 link: 0 done
1302 07:57:05.259049 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1303 07:57:05.259086 DOMAIN: 0000 read_resources bus 0 link: 0 done
1304 07:57:05.259122 Root Device read_resources bus 0 link: 0 done
1305 07:57:05.259161 Done reading resources.
1306 07:57:05.259208 Show resources in subtree (Root Device)...After reading.
1307 07:57:05.259251 Root Device child on link 0 CPU_CLUSTER: 0
1308 07:57:05.259296 CPU_CLUSTER: 0 child on link 0 APIC: 00
1309 07:57:05.259331 APIC: 00
1310 07:57:05.259369 APIC: 16
1311 07:57:05.259406 APIC: 10
1312 07:57:05.259443 APIC: 12
1313 07:57:05.259480 APIC: 14
1314 07:57:05.259517 APIC: 09
1315 07:57:05.259554 APIC: 01
1316 07:57:05.259590 APIC: 08
1317 07:57:05.259626 DOMAIN: 0000 child on link 0 GPIO: 0
1318 07:57:05.259663 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1319 07:57:05.259702 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1320 07:57:05.259740 GPIO: 0
1321 07:57:05.259777 PCI: 00:00.0
1322 07:57:05.259815 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1323 07:57:05.259866 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1324 07:57:05.259912 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1325 07:57:05.259950 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1326 07:57:05.259988 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1327 07:57:05.260024 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1328 07:57:05.260062 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1329 07:57:05.260100 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1330 07:57:05.260137 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1331 07:57:05.260175 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1332 07:57:05.260212 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1333 07:57:05.260252 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1334 07:57:05.260290 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1335 07:57:05.260327 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1336 07:57:05.260365 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1337 07:57:05.260402 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1338 07:57:05.260439 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1339 07:57:05.260476 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1340 07:57:05.260513 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1341 07:57:05.260550 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1342 07:57:05.260588 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1343 07:57:05.260625 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1344 07:57:05.260677 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1345 07:57:05.260716 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1346 07:57:05.260756 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1347 07:57:05.260795 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1348 07:57:05.260833 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1349 07:57:05.260871 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1350 07:57:05.260909 PCI: 00:02.0
1351 07:57:05.260948 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1352 07:57:05.261168 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1353 07:57:05.261224 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1354 07:57:05.261285 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1355 07:57:05.261337 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1356 07:57:05.261378 GENERIC: 0.0
1357 07:57:05.261416 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1358 07:57:05.261455 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1359 07:57:05.261494 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1360 07:57:05.261534 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1361 07:57:05.261573 PCI: 01:00.0
1362 07:57:05.261611 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1363 07:57:05.261650 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1364 07:57:05.261688 PCI: 00:08.0
1365 07:57:05.261725 PCI: 00:0a.0
1366 07:57:05.261763 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1367 07:57:05.261800 PCI: 00:0d.0 child on link 0 USB0 port 0
1368 07:57:05.261842 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1369 07:57:05.261880 USB0 port 0 child on link 0 USB3 port 0
1370 07:57:05.261917 USB3 port 0
1371 07:57:05.261955 USB3 port 1
1372 07:57:05.261992 USB3 port 2
1373 07:57:05.262030 USB3 port 3
1374 07:57:05.262068 PCI: 00:14.0 child on link 0 USB0 port 0
1375 07:57:05.262107 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1376 07:57:05.262145 USB0 port 0 child on link 0 USB2 port 0
1377 07:57:05.262182 USB2 port 0
1378 07:57:05.262220 USB2 port 1
1379 07:57:05.262257 USB2 port 2
1380 07:57:05.262294 USB2 port 3
1381 07:57:05.262331 USB2 port 4
1382 07:57:05.262368 USB2 port 5
1383 07:57:05.262404 USB2 port 6
1384 07:57:05.262441 USB2 port 7
1385 07:57:05.262479 USB2 port 8
1386 07:57:05.262523 USB2 port 9
1387 07:57:05.262561 USB3 port 0
1388 07:57:05.262599 USB3 port 1
1389 07:57:05.262636 USB3 port 2
1390 07:57:05.262672 USB3 port 3
1391 07:57:05.262709 PCI: 00:14.2
1392 07:57:05.262747 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1393 07:57:05.262786 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1394 07:57:05.262824 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1395 07:57:05.262861 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1396 07:57:05.262900 GENERIC: 0.0
1397 07:57:05.262938 PCI: 00:15.0 child on link 0 I2C: 00:1a
1398 07:57:05.262976 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1399 07:57:05.263013 I2C: 00:1a
1400 07:57:05.263052 I2C: 00:31
1401 07:57:05.263089 I2C: 00:32
1402 07:57:05.263126 PCI: 00:15.1 child on link 0 I2C: 00:50
1403 07:57:05.263164 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1404 07:57:05.263211 I2C: 00:50
1405 07:57:05.263250 PCI: 00:15.2
1406 07:57:05.263293 PCI: 00:15.3 child on link 0 I2C: 00:10
1407 07:57:05.263330 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1408 07:57:05.263367 I2C: 00:10
1409 07:57:05.263403 PCI: 00:16.0
1410 07:57:05.263439 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1411 07:57:05.263476 PCI: 00:19.0
1412 07:57:05.263513 PCI: 00:19.1 child on link 0 I2C: 00:15
1413 07:57:05.263549 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1414 07:57:05.263586 I2C: 00:15
1415 07:57:05.263623 I2C: 00:2c
1416 07:57:05.263659 PCI: 00:1e.0
1417 07:57:05.263696 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1418 07:57:05.263734 PCI: 00:1e.3 child on link 0 SPI: 00
1419 07:57:05.263771 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1420 07:57:05.263808 SPI: 00
1421 07:57:05.263846 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 07:57:05.263882 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 07:57:05.263919 PNP: 0c09.0
1424 07:57:05.263957 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1425 07:57:05.263994 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1426 07:57:05.264031 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1427 07:57:05.264069 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1428 07:57:05.264106 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1429 07:57:05.264144 GENERIC: 0.0
1430 07:57:05.264180 GENERIC: 1.0
1431 07:57:05.264217 PCI: 00:1f.3
1432 07:57:05.264254 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1433 07:57:05.264292 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1434 07:57:05.264329 PCI: 00:1f.5
1435 07:57:05.264365 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1436 07:57:05.264581 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1437 07:57:05.264641 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1438 07:57:05.264681 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1439 07:57:05.264719 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1440 07:57:05.264763 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1441 07:57:05.264803 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1442 07:57:05.264842 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1443 07:57:05.264887 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1444 07:57:05.264939 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1445 07:57:05.264985 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1446 07:57:05.265023 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1447 07:57:05.265061 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1448 07:57:05.265099 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1449 07:57:05.265136 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1450 07:57:05.265173 DOMAIN: 0000: Resource ranges:
1451 07:57:05.265211 * Base: 1000, Size: 800, Tag: 100
1452 07:57:05.265248 * Base: 1900, Size: e700, Tag: 100
1453 07:57:05.265288 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1454 07:57:05.265325 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1455 07:57:05.265363 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1456 07:57:05.265400 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1457 07:57:05.265438 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1458 07:57:05.265475 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1459 07:57:05.265512 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1460 07:57:05.265549 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1461 07:57:05.265586 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1462 07:57:05.265624 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1463 07:57:05.265661 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1464 07:57:05.265698 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1465 07:57:05.265734 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1466 07:57:05.265771 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1467 07:57:05.265808 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1468 07:57:05.265845 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1469 07:57:05.265882 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1470 07:57:05.265919 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1471 07:57:05.265956 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1472 07:57:05.265994 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1473 07:57:05.266031 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1474 07:57:05.266069 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1475 07:57:05.266106 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1476 07:57:05.266142 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1477 07:57:05.266179 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1478 07:57:05.266225 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1479 07:57:05.266266 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1480 07:57:05.266310 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1481 07:57:05.266348 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1482 07:57:05.266386 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1483 07:57:05.266423 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1484 07:57:05.266460 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1485 07:57:05.266497 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1486 07:57:05.266533 DOMAIN: 0000: Resource ranges:
1487 07:57:05.266571 * Base: 80400000, Size: 3fc00000, Tag: 200
1488 07:57:05.266608 * Base: d0000000, Size: 28000000, Tag: 200
1489 07:57:05.266645 * Base: fa000000, Size: 1000000, Tag: 200
1490 07:57:05.266691 * Base: fb001000, Size: 17ff000, Tag: 200
1491 07:57:05.266728 * Base: fe800000, Size: 300000, Tag: 200
1492 07:57:05.266765 * Base: feb80000, Size: 80000, Tag: 200
1493 07:57:05.266803 * Base: fed00000, Size: 40000, Tag: 200
1494 07:57:05.266841 * Base: fed70000, Size: 10000, Tag: 200
1495 07:57:05.266879 * Base: fed88000, Size: 8000, Tag: 200
1496 07:57:05.266917 * Base: fed93000, Size: d000, Tag: 200
1497 07:57:05.267133 * Base: feda2000, Size: 1e000, Tag: 200
1498 07:57:05.267188 * Base: fede0000, Size: 1220000, Tag: 200
1499 07:57:05.267234 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1500 07:57:05.267276 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1501 07:57:05.267316 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1502 07:57:05.267354 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1503 07:57:05.267398 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1504 07:57:05.267437 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1505 07:57:05.267476 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1506 07:57:05.267515 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1507 07:57:05.267553 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1508 07:57:05.267591 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1509 07:57:05.267629 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1510 07:57:05.267666 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1511 07:57:05.267703 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1512 07:57:05.267740 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1513 07:57:05.267778 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1514 07:57:05.267817 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1515 07:57:05.267855 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1516 07:57:05.267893 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1517 07:57:05.267931 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1518 07:57:05.267969 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1519 07:57:05.268007 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1520 07:57:05.268045 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1521 07:57:05.268083 PCI: 00:06.0: Resource ranges:
1522 07:57:05.268121 * Base: 80400000, Size: 100000, Tag: 200
1523 07:57:05.268158 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1524 07:57:05.268196 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1525 07:57:05.268233 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1526 07:57:05.268270 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1527 07:57:05.268308 Root Device assign_resources, bus 0 link: 0
1528 07:57:05.268345 DOMAIN: 0000 assign_resources, bus 0 link: 0
1529 07:57:05.268382 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1530 07:57:05.268420 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1531 07:57:05.268458 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1532 07:57:05.268495 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1533 07:57:05.268532 PCI: 00:04.0 assign_resources, bus 1 link: 0
1534 07:57:05.268569 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1535 07:57:05.268607 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1536 07:57:05.268645 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1537 07:57:05.268684 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1538 07:57:05.268722 PCI: 00:06.0 assign_resources, bus 1 link: 0
1539 07:57:05.268759 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1540 07:57:05.268796 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1541 07:57:05.268834 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1542 07:57:05.268871 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1543 07:57:05.268909 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1544 07:57:05.268947 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1545 07:57:05.268985 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1546 07:57:05.269023 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1547 07:57:05.269061 PCI: 00:14.0 assign_resources, bus 0 link: 0
1548 07:57:05.269099 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1549 07:57:05.269137 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1550 07:57:05.269174 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1551 07:57:05.269211 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1552 07:57:05.269249 PCI: 00:14.3 assign_resources, bus 0 link: 0
1553 07:57:05.269286 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1554 07:57:05.269324 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1555 07:57:05.269362 PCI: 00:15.0 assign_resources, bus 0 link: 0
1556 07:57:05.269399 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1557 07:57:05.269437 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1558 07:57:05.269475 PCI: 00:15.1 assign_resources, bus 0 link: 0
1559 07:57:05.269693 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1560 07:57:05.269743 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1561 07:57:05.269805 PCI: 00:15.3 assign_resources, bus 0 link: 0
1562 07:57:05.269854 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1563 07:57:05.269893 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1564 07:57:05.269935 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1565 07:57:05.269974 PCI: 00:19.1 assign_resources, bus 0 link: 0
1566 07:57:05.270013 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1567 07:57:05.270051 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1568 07:57:05.270089 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1569 07:57:05.270126 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1570 07:57:05.270163 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1571 07:57:05.270201 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1572 07:57:05.270238 LPC: Trying to open IO window from 800 size 1ff
1573 07:57:05.270276 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1574 07:57:05.270314 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1575 07:57:05.270352 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1576 07:57:05.270389 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1577 07:57:05.270426 Root Device assign_resources, bus 0 link: 0 done
1578 07:57:05.270464 Done setting resources.
1579 07:57:05.270503 Show resources in subtree (Root Device)...After assigning values.
1580 07:57:05.270541 Root Device child on link 0 CPU_CLUSTER: 0
1581 07:57:05.270578 CPU_CLUSTER: 0 child on link 0 APIC: 00
1582 07:57:05.270615 APIC: 00
1583 07:57:05.270652 APIC: 16
1584 07:57:05.270689 APIC: 10
1585 07:57:05.270727 APIC: 12
1586 07:57:05.270764 APIC: 14
1587 07:57:05.270802 APIC: 09
1588 07:57:05.270838 APIC: 01
1589 07:57:05.270875 APIC: 08
1590 07:57:05.270912 DOMAIN: 0000 child on link 0 GPIO: 0
1591 07:57:05.270949 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1592 07:57:05.270988 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1593 07:57:05.271026 GPIO: 0
1594 07:57:05.271064 PCI: 00:00.0
1595 07:57:05.271102 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1596 07:57:05.271139 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1597 07:57:05.271198 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1598 07:57:05.271244 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1599 07:57:05.271283 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1600 07:57:05.271321 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1601 07:57:05.271358 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1602 07:57:05.271397 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1603 07:57:05.271435 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1604 07:57:05.271474 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1605 07:57:05.271512 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1606 07:57:05.271550 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1607 07:57:05.271589 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1608 07:57:05.271628 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1609 07:57:05.271667 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1610 07:57:05.271706 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1611 07:57:05.271745 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1612 07:57:05.271783 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1613 07:57:05.271823 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1614 07:57:05.271861 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1615 07:57:05.271899 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1616 07:57:05.271938 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1617 07:57:05.271976 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1618 07:57:05.272013 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1619 07:57:05.272230 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1620 07:57:05.272276 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1621 07:57:05.272317 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1622 07:57:05.272355 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1623 07:57:05.272393 PCI: 00:02.0
1624 07:57:05.272430 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1625 07:57:05.272468 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1626 07:57:05.272506 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1627 07:57:05.272544 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1628 07:57:05.272582 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1629 07:57:05.272620 GENERIC: 0.0
1630 07:57:05.272659 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1631 07:57:05.272701 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1632 07:57:05.272743 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1633 07:57:05.272782 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1634 07:57:05.272822 PCI: 01:00.0
1635 07:57:05.272861 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1636 07:57:05.272901 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1637 07:57:05.272939 PCI: 00:08.0
1638 07:57:05.272977 PCI: 00:0a.0
1639 07:57:05.273014 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1640 07:57:05.273052 PCI: 00:0d.0 child on link 0 USB0 port 0
1641 07:57:05.273091 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1642 07:57:05.273129 USB0 port 0 child on link 0 USB3 port 0
1643 07:57:05.273166 USB3 port 0
1644 07:57:05.273204 USB3 port 1
1645 07:57:05.273241 USB3 port 2
1646 07:57:05.273279 USB3 port 3
1647 07:57:05.273316 PCI: 00:14.0 child on link 0 USB0 port 0
1648 07:57:05.273353 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1649 07:57:05.273392 USB0 port 0 child on link 0 USB2 port 0
1650 07:57:05.273429 USB2 port 0
1651 07:57:05.273467 USB2 port 1
1652 07:57:05.273505 USB2 port 2
1653 07:57:05.273542 USB2 port 3
1654 07:57:05.273579 USB2 port 4
1655 07:57:05.273616 USB2 port 5
1656 07:57:05.273653 USB2 port 6
1657 07:57:05.273690 USB2 port 7
1658 07:57:05.273728 USB2 port 8
1659 07:57:05.273765 USB2 port 9
1660 07:57:05.273803 USB3 port 0
1661 07:57:05.273840 USB3 port 1
1662 07:57:05.273878 USB3 port 2
1663 07:57:05.273915 USB3 port 3
1664 07:57:05.273953 PCI: 00:14.2
1665 07:57:05.273991 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1666 07:57:05.274029 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1667 07:57:05.274066 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1668 07:57:05.274103 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1669 07:57:05.274141 GENERIC: 0.0
1670 07:57:05.274178 PCI: 00:15.0 child on link 0 I2C: 00:1a
1671 07:57:05.274216 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1672 07:57:05.274255 I2C: 00:1a
1673 07:57:05.274292 I2C: 00:31
1674 07:57:05.274330 I2C: 00:32
1675 07:57:05.274367 PCI: 00:15.1 child on link 0 I2C: 00:50
1676 07:57:05.274418 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1677 07:57:05.274457 I2C: 00:50
1678 07:57:05.274495 PCI: 00:15.2
1679 07:57:05.274533 PCI: 00:15.3 child on link 0 I2C: 00:10
1680 07:57:05.274570 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1681 07:57:05.274608 I2C: 00:10
1682 07:57:05.274646 PCI: 00:16.0
1683 07:57:05.274684 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1684 07:57:05.274721 PCI: 00:19.0
1685 07:57:05.274759 PCI: 00:19.1 child on link 0 I2C: 00:15
1686 07:57:05.274797 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1687 07:57:05.274835 I2C: 00:15
1688 07:57:05.274872 I2C: 00:2c
1689 07:57:05.274910 PCI: 00:1e.0
1690 07:57:05.274948 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1691 07:57:05.274986 PCI: 00:1e.3 child on link 0 SPI: 00
1692 07:57:05.275024 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1693 07:57:05.275062 SPI: 00
1694 07:57:05.275099 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1695 07:57:05.275137 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1696 07:57:05.275179 PNP: 0c09.0
1697 07:57:05.275220 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1698 07:57:05.275436 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1699 07:57:05.275490 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1700 07:57:05.275530 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1701 07:57:05.275570 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1702 07:57:05.275608 GENERIC: 0.0
1703 07:57:05.275646 GENERIC: 1.0
1704 07:57:05.275683 PCI: 00:1f.3
1705 07:57:05.275721 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1706 07:57:05.275765 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1707 07:57:05.275802 PCI: 00:1f.5
1708 07:57:05.275839 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1709 07:57:05.275877 Done allocating resources.
1710 07:57:05.275914 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1711 07:57:05.275951 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1712 07:57:05.275988 Configure audio over I2S with MAX98373 NAU88L25B.
1713 07:57:05.276025 Enabling BT offload
1714 07:57:05.276063 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1715 07:57:05.276100 Enabling resources...
1716 07:57:05.276135 PCI: 00:00.0 subsystem <- 8086/4609
1717 07:57:05.276172 PCI: 00:00.0 cmd <- 06
1718 07:57:05.276208 PCI: 00:02.0 subsystem <- 8086/46b3
1719 07:57:05.276245 PCI: 00:02.0 cmd <- 03
1720 07:57:05.276283 PCI: 00:04.0 subsystem <- 8086/461d
1721 07:57:05.276320 PCI: 00:04.0 cmd <- 02
1722 07:57:05.276356 PCI: 00:06.0 bridge ctrl <- 0013
1723 07:57:05.276394 PCI: 00:06.0 subsystem <- 8086/464d
1724 07:57:05.276431 PCI: 00:06.0 cmd <- 106
1725 07:57:05.276477 PCI: 00:0a.0 subsystem <- 8086/467d
1726 07:57:05.276515 PCI: 00:0a.0 cmd <- 02
1727 07:57:05.276558 PCI: 00:0d.0 subsystem <- 8086/461e
1728 07:57:05.276594 PCI: 00:0d.0 cmd <- 02
1729 07:57:05.276631 PCI: 00:14.0 subsystem <- 8086/51ed
1730 07:57:05.276677 PCI: 00:14.0 cmd <- 02
1731 07:57:05.276735 PCI: 00:14.2 subsystem <- 8086/51ef
1732 07:57:05.276799 PCI: 00:14.2 cmd <- 02
1733 07:57:05.276842 PCI: 00:14.3 subsystem <- 8086/51f0
1734 07:57:05.276881 PCI: 00:14.3 cmd <- 02
1735 07:57:05.276926 PCI: 00:15.0 subsystem <- 8086/51e8
1736 07:57:05.276963 PCI: 00:15.0 cmd <- 02
1737 07:57:05.276999 PCI: 00:15.1 subsystem <- 8086/51e9
1738 07:57:05.277036 PCI: 00:15.1 cmd <- 06
1739 07:57:05.277073 PCI: 00:15.3 subsystem <- 8086/51eb
1740 07:57:05.277110 PCI: 00:15.3 cmd <- 02
1741 07:57:05.277147 PCI: 00:16.0 subsystem <- 8086/51e0
1742 07:57:05.277184 PCI: 00:16.0 cmd <- 02
1743 07:57:05.450548 PCI: 00:19.1 subsystem <- 8086/51c6
1744 07:57:05.450951 PCI: 00:19.1 cmd <- 02
1745 07:57:05.451232 PCI: 00:1e.0 subsystem <- 8086/51a8
1746 07:57:05.451455 PCI: 00:1e.0 cmd <- 06
1747 07:57:05.451659 PCI: 00:1e.3 subsystem <- 8086/51ab
1748 07:57:05.451853 PCI: 00:1e.3 cmd <- 02
1749 07:57:05.452046 PCI: 00:1f.0 subsystem <- 8086/5182
1750 07:57:05.452235 PCI: 00:1f.0 cmd <- 407
1751 07:57:05.452428 PCI: 00:1f.3 subsystem <- 8086/51c8
1752 07:57:05.452617 PCI: 00:1f.3 cmd <- 02
1753 07:57:05.452813 PCI: 00:1f.5 subsystem <- 8086/51a4
1754 07:57:05.453004 PCI: 00:1f.5 cmd <- 406
1755 07:57:05.453194 PCI: 01:00.0 cmd <- 02
1756 07:57:05.453388 done.
1757 07:57:05.453583 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1758 07:57:05.453743 ME: Version: Unavailable
1759 07:57:05.453780 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1760 07:57:05.453818 Initializing devices...
1761 07:57:05.453856 Root Device init
1762 07:57:05.453893 mainboard: EC init
1763 07:57:05.453929 Chrome EC: Set SMI mask to 0x0000000000000000
1764 07:57:05.453968 Chrome EC: clear events_b mask to 0x0000000000000000
1765 07:57:05.454007 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1766 07:57:05.454044 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1767 07:57:05.454082 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1768 07:57:05.454118 Chrome EC: Set WAKE mask to 0x0000000000000000
1769 07:57:05.454155 Root Device init finished in 35 msecs
1770 07:57:05.454193 PCI: 00:00.0 init
1771 07:57:05.454231 CPU TDP = 15 Watts
1772 07:57:05.454268 CPU PL1 = 15 Watts
1773 07:57:05.454305 CPU PL2 = 55 Watts
1774 07:57:05.454341 CPU PL4 = 123 Watts
1775 07:57:05.454393 PCI: 00:00.0 init finished in 8 msecs
1776 07:57:05.454441 PCI: 00:02.0 init
1777 07:57:05.454479 GMA: Found VBT in CBFS
1778 07:57:05.454517 GMA: Found valid VBT in CBFS
1779 07:57:05.454555 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1780 07:57:05.454594 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1781 07:57:05.454633 PCI: 00:02.0 init finished in 18 msecs
1782 07:57:05.454672 PCI: 00:06.0 init
1783 07:57:05.454710 Initializing PCH PCIe bridge.
1784 07:57:05.454748 PCI: 00:06.0 init finished in 3 msecs
1785 07:57:05.454784 PCI: 00:0a.0 init
1786 07:57:05.454821 PCI: 00:0a.0 init finished in 0 msecs
1787 07:57:05.454859 PCI: 00:14.0 init
1788 07:57:05.454897 PCI: 00:14.0 init finished in 0 msecs
1789 07:57:05.454934 PCI: 00:14.2 init
1790 07:57:05.454972 PCI: 00:14.2 init finished in 0 msecs
1791 07:57:05.455009 PCI: 00:15.0 init
1792 07:57:05.455047 I2C bus 0 version 0x3230302a
1793 07:57:05.455083 DW I2C bus 0 at 0x80655000 (400 KHz)
1794 07:57:05.455120 PCI: 00:15.0 init finished in 6 msecs
1795 07:57:05.455158 PCI: 00:15.1 init
1796 07:57:05.455200 I2C bus 1 version 0x3230302a
1797 07:57:05.455247 DW I2C bus 1 at 0x80656000 (400 KHz)
1798 07:57:05.455284 PCI: 00:15.1 init finished in 6 msecs
1799 07:57:05.455321 PCI: 00:15.3 init
1800 07:57:05.455358 I2C bus 3 version 0x3230302a
1801 07:57:05.455396 DW I2C bus 3 at 0x80657000 (400 KHz)
1802 07:57:05.455432 PCI: 00:15.3 init finished in 6 msecs
1803 07:57:05.455468 PCI: 00:16.0 init
1804 07:57:05.455506 PCI: 00:16.0 init finished in 0 msecs
1805 07:57:05.455542 PCI: 00:19.1 init
1806 07:57:05.455579 I2C bus 5 version 0x3230302a
1807 07:57:05.455616 DW I2C bus 5 at 0x80659000 (400 KHz)
1808 07:57:05.455654 PCI: 00:19.1 init finished in 6 msecs
1809 07:57:05.455691 PCI: 00:1f.0 init
1810 07:57:05.455729 IOAPIC: Initializing IOAPIC at 0xfec00000
1811 07:57:05.455765 IOAPIC: ID = 0x02
1812 07:57:05.455802 IOAPIC: Dumping registers
1813 07:57:05.456033 reg 0x0000: 0x02000000
1814 07:57:05.456088 reg 0x0001: 0x00770020
1815 07:57:05.456133 reg 0x0002: 0x00000000
1816 07:57:05.456172 IOAPIC: 120 interrupts
1817 07:57:05.456210 IOAPIC: Clearing IOAPIC at 0xfec00000
1818 07:57:05.456248 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1819 07:57:05.456286 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1820 07:57:05.456323 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1821 07:57:05.456360 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1822 07:57:05.456397 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1823 07:57:05.456434 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1824 07:57:05.456471 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1825 07:57:05.456507 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1826 07:57:05.456545 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1827 07:57:05.456581 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1828 07:57:05.456618 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1829 07:57:05.456654 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1830 07:57:05.456691 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1831 07:57:05.456729 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1832 07:57:05.456767 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1833 07:57:05.456805 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1834 07:57:05.456842 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1835 07:57:05.456879 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1836 07:57:05.456916 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1837 07:57:05.456953 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1838 07:57:05.456989 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1839 07:57:05.457026 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1840 07:57:05.457064 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1841 07:57:05.457102 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1842 07:57:05.457138 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1843 07:57:05.457174 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1844 07:57:05.457211 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1845 07:57:05.457248 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1846 07:57:05.457285 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1847 07:57:05.457322 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1848 07:57:05.457358 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1849 07:57:05.457411 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1850 07:57:05.457447 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1851 07:57:05.457486 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1852 07:57:05.457523 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1853 07:57:05.457560 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1854 07:57:05.457597 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1855 07:57:05.457634 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1856 07:57:05.457671 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1857 07:57:05.457709 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1858 07:57:05.457746 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1859 07:57:05.457783 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1860 07:57:05.457820 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1861 07:57:05.457857 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1862 07:57:05.457894 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1863 07:57:05.457931 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1864 07:57:05.457968 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1865 07:57:05.458005 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1866 07:57:05.458041 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1867 07:57:05.458077 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1868 07:57:05.458114 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1869 07:57:05.458151 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1870 07:57:05.458277 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1871 07:57:05.458459 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1872 07:57:05.458636 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1873 07:57:05.458811 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1874 07:57:05.458992 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1875 07:57:05.459078 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1876 07:57:05.459163 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1877 07:57:05.459261 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1878 07:57:05.459352 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1879 07:57:05.459456 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1880 07:57:05.459515 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1881 07:57:05.459552 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1882 07:57:05.459591 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1883 07:57:05.459628 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1884 07:57:05.459666 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1885 07:57:05.459704 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1886 07:57:05.459741 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1887 07:57:05.459779 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1888 07:57:05.459816 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1889 07:57:05.459854 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1890 07:57:05.459892 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1891 07:57:05.459930 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1892 07:57:05.459967 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1893 07:57:05.460005 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1894 07:57:05.460043 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1895 07:57:05.460081 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1896 07:57:05.460118 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1897 07:57:05.460156 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1898 07:57:05.460374 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1899 07:57:05.460421 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1900 07:57:05.460460 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1901 07:57:05.460500 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1902 07:57:05.460537 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1903 07:57:05.460575 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1904 07:57:05.460612 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1905 07:57:05.460650 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1906 07:57:05.460687 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1907 07:57:05.460725 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1908 07:57:05.460764 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1909 07:57:05.460802 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1910 07:57:05.460839 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1911 07:57:05.460878 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1912 07:57:05.460915 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1913 07:57:05.460952 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1914 07:57:05.460990 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1915 07:57:05.461028 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1916 07:57:05.461068 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1917 07:57:05.461118 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1918 07:57:05.461157 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1919 07:57:05.461195 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1920 07:57:05.461233 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1921 07:57:05.461271 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1922 07:57:05.461308 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1923 07:57:05.461346 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1924 07:57:05.461383 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1925 07:57:05.461421 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1926 07:57:05.461458 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1927 07:57:05.461495 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1928 07:57:05.461532 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1929 07:57:05.461569 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1930 07:57:05.461606 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1931 07:57:05.461643 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1932 07:57:05.461680 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1933 07:57:05.461717 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1934 07:57:05.461754 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1935 07:57:05.461792 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1936 07:57:05.461829 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1937 07:57:05.461865 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1938 07:57:05.461902 IOAPIC: Bootstrap Processor Local APIC = 0x00
1939 07:57:05.461939 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1940 07:57:05.461977 PCI: 00:1f.0 init finished in 607 msecs
1941 07:57:05.462014 PCI: 00:1f.2 init
1942 07:57:05.462051 apm_control: Disabling ACPI.
1943 07:57:05.462088 APMC done.
1944 07:57:05.462126 PCI: 00:1f.2 init finished in 6 msecs
1945 07:57:05.462162 PCI: 00:1f.3 init
1946 07:57:05.462199 PCI: 00:1f.3 init finished in 0 msecs
1947 07:57:05.462235 PCI: 01:00.0 init
1948 07:57:05.462272 PCI: 01:00.0 init finished in 0 msecs
1949 07:57:05.462308 PNP: 0c09.0 init
1950 07:57:05.462346 Google Chrome EC uptime: 10.989 seconds
1951 07:57:05.462384 Google Chrome AP resets since EC boot: 0
1952 07:57:05.462421 Google Chrome most recent AP reset causes:
1953 07:57:05.462458 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1954 07:57:05.462495 PNP: 0c09.0 init finished in 19 msecs
1955 07:57:05.462532 GENERIC: 0.0 init
1956 07:57:05.462570 GENERIC: 0.0 init finished in 0 msecs
1957 07:57:05.462607 GENERIC: 1.0 init
1958 07:57:05.462644 GENERIC: 1.0 init finished in 0 msecs
1959 07:57:05.462691 Devices initialized
1960 07:57:05.462727 Show all devs... After init.
1961 07:57:05.462765 Root Device: enabled 1
1962 07:57:05.462803 CPU_CLUSTER: 0: enabled 1
1963 07:57:05.462841 DOMAIN: 0000: enabled 1
1964 07:57:05.462879 GPIO: 0: enabled 1
1965 07:57:05.462916 PCI: 00:00.0: enabled 1
1966 07:57:05.462954 PCI: 00:01.0: enabled 0
1967 07:57:05.462991 PCI: 00:01.1: enabled 0
1968 07:57:05.463028 PCI: 00:02.0: enabled 1
1969 07:57:05.463066 PCI: 00:04.0: enabled 1
1970 07:57:05.463102 PCI: 00:05.0: enabled 0
1971 07:57:05.463140 PCI: 00:06.0: enabled 1
1972 07:57:05.463182 PCI: 00:06.2: enabled 0
1973 07:57:05.463222 PCI: 00:07.0: enabled 0
1974 07:57:05.463265 PCI: 00:07.1: enabled 0
1975 07:57:05.463302 PCI: 00:07.2: enabled 0
1976 07:57:05.463338 PCI: 00:07.3: enabled 0
1977 07:57:05.463374 PCI: 00:08.0: enabled 0
1978 07:57:05.463410 PCI: 00:09.0: enabled 0
1979 07:57:05.463446 PCI: 00:0a.0: enabled 1
1980 07:57:05.463483 PCI: 00:0d.0: enabled 1
1981 07:57:05.463519 PCI: 00:0d.1: enabled 0
1982 07:57:05.463555 PCI: 00:0d.2: enabled 0
1983 07:57:05.463592 PCI: 00:0d.3: enabled 0
1984 07:57:05.463628 PCI: 00:0e.0: enabled 0
1985 07:57:05.463671 PCI: 00:10.0: enabled 0
1986 07:57:05.463707 PCI: 00:10.1: enabled 0
1987 07:57:05.463749 PCI: 00:10.6: enabled 0
1988 07:57:05.463785 PCI: 00:10.7: enabled 0
1989 07:57:05.463821 PCI: 00:12.0: enabled 0
1990 07:57:05.463858 PCI: 00:12.6: enabled 0
1991 07:57:05.463894 PCI: 00:12.7: enabled 0
1992 07:57:05.463931 PCI: 00:13.0: enabled 0
1993 07:57:05.463967 PCI: 00:14.0: enabled 1
1994 07:57:05.464004 PCI: 00:14.1: enabled 0
1995 07:57:05.464041 PCI: 00:14.2: enabled 1
1996 07:57:05.464078 PCI: 00:14.3: enabled 1
1997 07:57:05.464115 PCI: 00:15.0: enabled 1
1998 07:57:05.464152 PCI: 00:15.1: enabled 1
1999 07:57:05.464189 PCI: 00:15.2: enabled 0
2000 07:57:05.464227 PCI: 00:15.3: enabled 1
2001 07:57:05.464263 PCI: 00:16.0: enabled 1
2002 07:57:05.464300 PCI: 00:16.1: enabled 0
2003 07:57:05.464335 PCI: 00:16.2: enabled 0
2004 07:57:05.464372 PCI: 00:16.3: enabled 0
2005 07:57:05.464409 PCI: 00:16.4: enabled 0
2006 07:57:05.464445 PCI: 00:16.5: enabled 0
2007 07:57:05.464482 PCI: 00:17.0: enabled 0
2008 07:57:05.464519 PCI: 00:19.0: enabled 0
2009 07:57:05.464556 PCI: 00:19.1: enabled 1
2010 07:57:05.464592 PCI: 00:19.2: enabled 0
2011 07:57:05.464628 PCI: 00:1a.0: enabled 0
2012 07:57:05.464665 PCI: 00:1c.0: enabled 0
2013 07:57:05.464702 PCI: 00:1c.1: enabled 0
2014 07:57:05.464738 PCI: 00:1c.2: enabled 0
2015 07:57:05.464774 PCI: 00:1c.3: enabled 0
2016 07:57:05.464811 PCI: 00:1c.4: enabled 0
2017 07:57:05.465025 PCI: 00:1c.5: enabled 0
2018 07:57:05.465070 PCI: 00:1c.6: enabled 0
2019 07:57:05.465109 PCI: 00:1c.7: enabled 0
2020 07:57:05.465146 PCI: 00:1d.0: enabled 0
2021 07:57:05.465183 PCI: 00:1d.1: enabled 0
2022 07:57:05.465221 PCI: 00:1d.2: enabled 0
2023 07:57:05.465258 PCI: 00:1d.3: enabled 0
2024 07:57:05.465296 PCI: 00:1e.0: enabled 1
2025 07:57:05.465334 PCI: 00:1e.1: enabled 0
2026 07:57:05.465371 PCI: 00:1e.2: enabled 0
2027 07:57:05.465408 PCI: 00:1e.3: enabled 1
2028 07:57:05.465445 PCI: 00:1f.0: enabled 1
2029 07:57:05.465482 PCI: 00:1f.1: enabled 0
2030 07:57:05.465519 PCI: 00:1f.2: enabled 1
2031 07:57:05.465555 PCI: 00:1f.3: enabled 1
2032 07:57:05.465593 PCI: 00:1f.4: enabled 0
2033 07:57:05.465630 PCI: 00:1f.5: enabled 1
2034 07:57:05.465666 PCI: 00:1f.6: enabled 0
2035 07:57:05.465704 PCI: 00:1f.7: enabled 0
2036 07:57:05.465741 GENERIC: 0.0: enabled 1
2037 07:57:05.465778 GENERIC: 0.0: enabled 1
2038 07:57:05.465815 GENERIC: 1.0: enabled 1
2039 07:57:05.465857 GENERIC: 0.0: enabled 1
2040 07:57:05.465894 GENERIC: 1.0: enabled 1
2041 07:57:05.465931 USB0 port 0: enabled 1
2042 07:57:05.465974 USB0 port 0: enabled 1
2043 07:57:05.466011 GENERIC: 0.0: enabled 1
2044 07:57:05.466048 I2C: 00:1a: enabled 1
2045 07:57:05.466087 I2C: 00:31: enabled 1
2046 07:57:05.466124 I2C: 00:32: enabled 1
2047 07:57:05.466162 I2C: 00:50: enabled 1
2048 07:57:05.466199 I2C: 00:10: enabled 1
2049 07:57:05.466236 I2C: 00:15: enabled 1
2050 07:57:05.466272 I2C: 00:2c: enabled 1
2051 07:57:05.466308 GENERIC: 0.0: enabled 1
2052 07:57:05.466345 SPI: 00: enabled 1
2053 07:57:05.466383 PNP: 0c09.0: enabled 1
2054 07:57:05.466420 GENERIC: 0.0: enabled 1
2055 07:57:05.466456 USB3 port 0: enabled 1
2056 07:57:05.466493 USB3 port 1: enabled 0
2057 07:57:05.466530 USB3 port 2: enabled 1
2058 07:57:05.466566 USB3 port 3: enabled 0
2059 07:57:05.466603 USB2 port 0: enabled 1
2060 07:57:05.466641 USB2 port 1: enabled 0
2061 07:57:05.466684 USB2 port 2: enabled 1
2062 07:57:05.466720 USB2 port 3: enabled 0
2063 07:57:05.466757 USB2 port 4: enabled 0
2064 07:57:05.466793 USB2 port 5: enabled 1
2065 07:57:05.466830 USB2 port 6: enabled 0
2066 07:57:05.466866 USB2 port 7: enabled 0
2067 07:57:05.466902 USB2 port 8: enabled 1
2068 07:57:05.466938 USB2 port 9: enabled 1
2069 07:57:05.466981 USB3 port 0: enabled 1
2070 07:57:05.467018 USB3 port 1: enabled 0
2071 07:57:05.467054 USB3 port 2: enabled 0
2072 07:57:05.467091 USB3 port 3: enabled 0
2073 07:57:05.467127 GENERIC: 0.0: enabled 1
2074 07:57:05.467164 GENERIC: 1.0: enabled 1
2075 07:57:05.467205 APIC: 00: enabled 1
2076 07:57:05.467273 APIC: 16: enabled 1
2077 07:57:05.467315 APIC: 10: enabled 1
2078 07:57:05.467380 APIC: 12: enabled 1
2079 07:57:05.467433 APIC: 14: enabled 1
2080 07:57:05.467489 APIC: 09: enabled 1
2081 07:57:05.467526 APIC: 01: enabled 1
2082 07:57:05.467563 APIC: 08: enabled 1
2083 07:57:05.467600 PCI: 01:00.0: enabled 1
2084 07:57:05.467636 BS: BS_DEV_INIT run times (exec / console): 8 / 1127 ms
2085 07:57:05.467674 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2086 07:57:05.467711 ELOG: NV offset 0xf20000 size 0x4000
2087 07:57:05.467747 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2088 07:57:05.467784 ELOG: Event(17) added with size 13 at 2024-05-30 07:57:03 UTC
2089 07:57:05.467822 ELOG: Event(92) added with size 9 at 2024-05-30 07:57:03 UTC
2090 07:57:05.467860 ELOG: Event(93) added with size 9 at 2024-05-30 07:57:03 UTC
2091 07:57:05.467898 ELOG: Event(9E) added with size 10 at 2024-05-30 07:57:03 UTC
2092 07:57:05.467936 ELOG: Event(9F) added with size 14 at 2024-05-30 07:57:03 UTC
2093 07:57:05.467973 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2094 07:57:05.468010 ELOG: Event(A1) added with size 10 at 2024-05-30 07:57:03 UTC
2095 07:57:05.468048 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2096 07:57:05.468084 ELOG: Event(A0) added with size 9 at 2024-05-30 07:57:03 UTC
2097 07:57:05.468122 elog_add_boot_reason: Logged dev mode boot
2098 07:57:05.468159 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2099 07:57:05.468197 Finalize devices...
2100 07:57:05.468235 PCI: 00:16.0 final
2101 07:57:05.468273 PCI: 00:1f.2 final
2102 07:57:05.468311 GENERIC: 0.0 final
2103 07:57:05.468348 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2104 07:57:05.468386 GENERIC: 1.0 final
2105 07:57:05.468423 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2106 07:57:05.468461 Devices finalized
2107 07:57:05.468497 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2108 07:57:05.468534 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2109 07:57:05.468571 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2110 07:57:05.468609 ME: HFSTS1 : 0x80030045
2111 07:57:05.468646 ME: HFSTS2 : 0x30280116
2112 07:57:05.468688 ME: HFSTS3 : 0x00000050
2113 07:57:05.468750 ME: HFSTS4 : 0x00004000
2114 07:57:05.468788 ME: HFSTS5 : 0x00000000
2115 07:57:05.468843 ME: HFSTS6 : 0x40400006
2116 07:57:05.468880 ME: Manufacturing Mode : YES
2117 07:57:05.468917 ME: SPI Protection Mode Enabled : YES
2118 07:57:05.468954 ME: FPFs Committed : YES
2119 07:57:05.468992 ME: Manufacturing Vars Locked : NO
2120 07:57:05.469029 ME: FW Partition Table : OK
2121 07:57:05.469067 ME: Bringup Loader Failure : NO
2122 07:57:05.469104 ME: Firmware Init Complete : NO
2123 07:57:05.469141 ME: Boot Options Present : NO
2124 07:57:05.469178 ME: Update In Progress : NO
2125 07:57:05.469216 ME: D0i3 Support : YES
2126 07:57:05.469254 ME: Low Power State Enabled : NO
2127 07:57:05.469291 ME: CPU Replaced : YES
2128 07:57:05.469328 ME: CPU Replacement Valid : YES
2129 07:57:05.469365 ME: Current Working State : 5
2130 07:57:05.469407 ME: Current Operation State : 1
2131 07:57:05.469451 ME: Current Operation Mode : 3
2132 07:57:05.469488 ME: Error Code : 0
2133 07:57:05.469525 ME: Enhanced Debug Mode : NO
2134 07:57:05.469561 ME: CPU Debug Disabled : YES
2135 07:57:05.469597 ME: TXT Support : NO
2136 07:57:05.469634 ME: WP for RO is enabled : YES
2137 07:57:05.469671 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2138 07:57:05.469708 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2139 07:57:05.469925 ELOG: Event(91) added with size 10 at 2024-05-30 07:57:04 UTC
2140 07:57:05.469970 Chrome EC: clear events_b mask to 0x0000000020004000
2141 07:57:05.470009 Ramoops buffer: 0x100000@0x7689a000.
2142 07:57:05.470046 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 15 ms
2143 07:57:05.470084 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2144 07:57:05.470121 CBFS: 'fallback/slic' not found.
2145 07:57:05.470159 ACPI: Writing ACPI tables at 7686e000.
2146 07:57:05.470196 ACPI: * FACS
2147 07:57:05.470233 ACPI: * DSDT
2148 07:57:05.470270 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2149 07:57:05.470307 ACPI: * FADT
2150 07:57:05.470344 SCI is IRQ9
2151 07:57:05.470381 ACPI: added table 1/32, length now 40
2152 07:57:05.470419 ACPI: * SSDT
2153 07:57:05.470456 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2154 07:57:05.470493 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2155 07:57:05.470531 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2156 07:57:05.470568 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2157 07:57:05.470608 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2158 07:57:05.470646 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2159 07:57:05.470689 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2160 07:57:05.470727 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2161 07:57:05.470764 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2162 07:57:05.470801 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2163 07:57:05.470839 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2164 07:57:05.470875 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2165 07:57:05.470912 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2166 07:57:05.470950 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2167 07:57:05.470992 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2168 07:57:05.471029 PS2K: Passing 80 keymaps to kernel
2169 07:57:05.471066 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2170 07:57:05.471104 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2171 07:57:05.471142 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2172 07:57:05.471211 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2173 07:57:05.471250 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2174 07:57:05.471301 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2175 07:57:05.471339 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2176 07:57:05.471376 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2177 07:57:05.471414 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2178 07:57:05.471451 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2179 07:57:05.471493 ACPI: added table 2/32, length now 44
2180 07:57:05.471530 ACPI: * MCFG
2181 07:57:05.471568 ACPI: added table 3/32, length now 48
2182 07:57:05.471605 ACPI: * TPM2
2183 07:57:05.471643 TPM2 log created at 0x7685e000
2184 07:57:05.471681 ACPI: added table 4/32, length now 52
2185 07:57:05.471718 ACPI: * LPIT
2186 07:57:05.471756 ACPI: added table 5/32, length now 56
2187 07:57:05.471794 ACPI: * MADT
2188 07:57:05.471832 SCI is IRQ9
2189 07:57:05.471869 ACPI: added table 6/32, length now 60
2190 07:57:05.471907 cmd_reg from pmc_make_ipc_cmd 1052838
2191 07:57:05.471944 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2192 07:57:05.471982 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2193 07:57:05.472020 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2194 07:57:05.472056 PMC CrashLog size in discovery mode: 0xC00
2195 07:57:05.472093 cpu crashlog bar addr: 0x80640000
2196 07:57:05.472130 cpu discovery table offset: 0x6030
2197 07:57:05.472167 cpu_crashlog_discovery_table buffer count: 0x3
2198 07:57:05.472204 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2199 07:57:05.472242 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2200 07:57:05.472278 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2201 07:57:05.472316 PMC crashLog size in discovery mode : 0xC00
2202 07:57:05.472353 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2203 07:57:05.472390 discover mode PMC crashlog size adjusted to: 0x200
2204 07:57:05.472427 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2205 07:57:05.472465 discover mode PMC crashlog size adjusted to: 0x0
2206 07:57:05.472502 m_cpu_crashLog_size : 0x3480 bytes
2207 07:57:05.472539 CPU crashLog present.
2208 07:57:05.472576 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2209 07:57:05.472614 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2210 07:57:05.472652 current = 76877550
2211 07:57:05.472696 ACPI: * DMAR
2212 07:57:05.472734 ACPI: added table 7/32, length now 64
2213 07:57:05.472788 ACPI: added table 8/32, length now 68
2214 07:57:05.472840 ACPI: * HPET
2215 07:57:05.472876 ACPI: added table 9/32, length now 72
2216 07:57:05.472913 ACPI: done.
2217 07:57:05.472950 ACPI tables: 38528 bytes.
2218 07:57:05.472987 smbios_write_tables: 76858000
2219 07:57:05.473028 EC returned error result code 3
2220 07:57:05.473065 Couldn't obtain OEM name from CBI
2221 07:57:05.473102 Create SMBIOS type 16
2222 07:57:05.473139 Create SMBIOS type 17
2223 07:57:05.473176 Create SMBIOS type 20
2224 07:57:05.473218 GENERIC: 0.0 (WIFI Device)
2225 07:57:05.473260 SMBIOS tables: 2156 bytes.
2226 07:57:05.473297 Writing table forward entry at 0x00000500
2227 07:57:05.473334 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2228 07:57:05.473371 Writing coreboot table at 0x76892000
2229 07:57:05.473408 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2230 07:57:05.473447 1. 0000000000001000-000000000009ffff: RAM
2231 07:57:05.473662 2. 00000000000a0000-00000000000fffff: RESERVED
2232 07:57:05.473707 3. 0000000000100000-0000000076857fff: RAM
2233 07:57:05.473747 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2234 07:57:05.473785 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2235 07:57:05.473824 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2236 07:57:05.473861 7. 0000000077000000-00000000803fffff: RESERVED
2237 07:57:05.473899 8. 00000000c0000000-00000000cfffffff: RESERVED
2238 07:57:05.473936 9. 00000000f8000000-00000000f9ffffff: RESERVED
2239 07:57:05.473973 10. 00000000fb000000-00000000fb000fff: RESERVED
2240 07:57:05.474011 11. 00000000fc800000-00000000fe7fffff: RESERVED
2241 07:57:05.474049 12. 00000000feb00000-00000000feb7ffff: RESERVED
2242 07:57:05.474087 13. 00000000fec00000-00000000fecfffff: RESERVED
2243 07:57:05.474125 14. 00000000fed40000-00000000fed6ffff: RESERVED
2244 07:57:05.474163 15. 00000000fed80000-00000000fed87fff: RESERVED
2245 07:57:05.474200 16. 00000000fed90000-00000000fed92fff: RESERVED
2246 07:57:05.474237 17. 00000000feda0000-00000000feda1fff: RESERVED
2247 07:57:05.474275 18. 00000000fedc0000-00000000feddffff: RESERVED
2248 07:57:05.474314 19. 0000000100000000-000000027fbfffff: RAM
2249 07:57:05.474354 Passing 4 GPIOs to payload:
2250 07:57:05.474391 NAME | PORT | POLARITY | VALUE
2251 07:57:05.474429 lid | undefined | high | high
2252 07:57:05.474465 power | undefined | high | low
2253 07:57:05.474502 oprom | undefined | high | low
2254 07:57:05.474539 EC in RW | 0x00000151 | high | low
2255 07:57:05.474575 Board ID: 3
2256 07:57:05.474621 FW config: 0x131
2257 07:57:05.474659 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum 925d
2258 07:57:05.474697 coreboot table: 1764 bytes.
2259 07:57:05.474735 IMD ROOT 0. 0x76fff000 0x00001000
2260 07:57:05.474772 IMD SMALL 1. 0x76ffe000 0x00001000
2261 07:57:05.474810 FSP MEMORY 2. 0x76afe000 0x00500000
2262 07:57:05.474848 CONSOLE 3. 0x76ade000 0x00020000
2263 07:57:05.474885 RO MCACHE 4. 0x76add000 0x00000fd8
2264 07:57:05.474922 FMAP 5. 0x76adc000 0x0000064a
2265 07:57:05.474959 TIME STAMP 6. 0x76adb000 0x00000910
2266 07:57:05.474997 VBOOT WORK 7. 0x76ac7000 0x00014000
2267 07:57:05.475034 MEM INFO 8. 0x76ac6000 0x000003b8
2268 07:57:05.475071 ROMSTG STCK 9. 0x76ac5000 0x00001000
2269 07:57:05.475107 AFTER CAR 10. 0x76ab9000 0x0000c000
2270 07:57:05.475146 RAMSTAGE 11. 0x76a2f000 0x0008a000
2271 07:57:05.475188 ACPI BERT 12. 0x76a1f000 0x00010000
2272 07:57:05.475227 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2273 07:57:05.475283 REFCODE 14. 0x769af000 0x0006f000
2274 07:57:05.475319 SMM BACKUP 15. 0x7699f000 0x00010000
2275 07:57:05.475355 IGD OPREGION16. 0x7699a000 0x00004203
2276 07:57:05.475391 RAMOOPS 17. 0x7689a000 0x00100000
2277 07:57:05.475427 COREBOOT 18. 0x76892000 0x00008000
2278 07:57:05.475464 ACPI 19. 0x7686e000 0x00024000
2279 07:57:05.475500 TPM2 TCGLOG20. 0x7685e000 0x00010000
2280 07:57:05.475536 PMC CRASHLOG21. 0x7685d000 0x00000c00
2281 07:57:05.475572 CPU CRASHLOG22. 0x76859000 0x00003480
2282 07:57:05.475610 SMBIOS 23. 0x76858000 0x00001000
2283 07:57:05.475647 IMD small region:
2284 07:57:05.475683 IMD ROOT 0. 0x76ffec00 0x00000400
2285 07:57:05.475720 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2286 07:57:05.475756 VPD 2. 0x76ffeb60 0x0000006c
2287 07:57:05.475792 POWER STATE 3. 0x76ffeb00 0x00000044
2288 07:57:05.475829 ROMSTAGE 4. 0x76ffeae0 0x00000004
2289 07:57:05.475865 ACPI GNVS 5. 0x76ffea80 0x00000048
2290 07:57:05.475901 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2291 07:57:05.475938 BS: BS_WRITE_TABLES run times (exec / console): 8 / 624 ms
2292 07:57:05.475976 MTRR: Physical address space:
2293 07:57:05.476012 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2294 07:57:05.476051 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2295 07:57:05.476090 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2296 07:57:05.476129 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2297 07:57:05.476167 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2298 07:57:05.476205 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2299 07:57:05.476267 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2300 07:57:05.476310 MTRR: Fixed MSR 0x250 0x0606060606060606
2301 07:57:05.476347 MTRR: Fixed MSR 0x258 0x0606060606060606
2302 07:57:05.476384 MTRR: Fixed MSR 0x259 0x0000000000000000
2303 07:57:05.476420 MTRR: Fixed MSR 0x268 0x0606060606060606
2304 07:57:05.476456 MTRR: Fixed MSR 0x269 0x0606060606060606
2305 07:57:05.476500 MTRR: Fixed MSR 0x26a 0x0606060606060606
2306 07:57:05.476538 MTRR: Fixed MSR 0x26b 0x0606060606060606
2307 07:57:05.476574 MTRR: Fixed MSR 0x26c 0x0606060606060606
2308 07:57:05.476611 MTRR: Fixed MSR 0x26d 0x0606060606060606
2309 07:57:05.476648 MTRR: Fixed MSR 0x26e 0x0606060606060606
2310 07:57:05.476689 MTRR: Fixed MSR 0x26f 0x0606060606060606
2311 07:57:05.476731 call enable_fixed_mtrr()
2312 07:57:05.476767 CPU physical address size: 39 bits
2313 07:57:05.476804 MTRR: default type WB/UC MTRR counts: 6/6.
2314 07:57:05.476841 MTRR: UC selected as default type.
2315 07:57:05.476878 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2316 07:57:05.476915 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2317 07:57:05.476958 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2318 07:57:05.477011 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2319 07:57:05.477049 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2320 07:57:05.477099 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2321 07:57:05.477136 MTRR: Fixed MSR 0x250 0x0606060606060606
2322 07:57:05.477352 MTRR: Fixed MSR 0x258 0x0606060606060606
2323 07:57:05.477397 MTRR: Fixed MSR 0x259 0x0000000000000000
2324 07:57:05.477436 MTRR: Fixed MSR 0x268 0x0606060606060606
2325 07:57:05.477474 MTRR: Fixed MSR 0x269 0x0606060606060606
2326 07:57:05.477510 MTRR: Fixed MSR 0x26a 0x0606060606060606
2327 07:57:05.477548 MTRR: Fixed MSR 0x26b 0x0606060606060606
2328 07:57:05.477585 MTRR: Fixed MSR 0x26c 0x0606060606060606
2329 07:57:05.477621 MTRR: Fixed MSR 0x26d 0x0606060606060606
2330 07:57:05.477657 MTRR: Fixed MSR 0x26e 0x0606060606060606
2331 07:57:05.477693 MTRR: Fixed MSR 0x26f 0x0606060606060606
2332 07:57:05.477729 MTRR: Fixed MSR 0x250 0x0606060606060606
2333 07:57:05.477775 MTRR: Fixed MSR 0x250 0x0606060606060606
2334 07:57:05.477827 MTRR: Fixed MSR 0x250 0x0606060606060606
2335 07:57:05.477880 MTRR: Fixed MSR 0x258 0x0606060606060606
2336 07:57:05.477933 MTRR: Fixed MSR 0x259 0x0000000000000000
2337 07:57:05.477985 MTRR: Fixed MSR 0x268 0x0606060606060606
2338 07:57:05.478037 MTRR: Fixed MSR 0x269 0x0606060606060606
2339 07:57:05.478079 MTRR: Fixed MSR 0x258 0x0606060606060606
2340 07:57:05.478117 MTRR: Fixed MSR 0x259 0x0000000000000000
2341 07:57:05.478157 MTRR: Fixed MSR 0x268 0x0606060606060606
2342 07:57:05.478203 MTRR: Fixed MSR 0x269 0x0606060606060606
2343 07:57:05.478240 MTRR: Fixed MSR 0x26a 0x0606060606060606
2344 07:57:05.478283 MTRR: Fixed MSR 0x26b 0x0606060606060606
2345 07:57:05.478318 MTRR: Fixed MSR 0x26c 0x0606060606060606
2346 07:57:05.478354 MTRR: Fixed MSR 0x26d 0x0606060606060606
2347 07:57:05.478400 MTRR: Fixed MSR 0x26e 0x0606060606060606
2348 07:57:05.478443 MTRR: Fixed MSR 0x26f 0x0606060606060606
2349 07:57:05.478480 MTRR: Fixed MSR 0x26a 0x0606060606060606
2350 07:57:05.478517 MTRR: Fixed MSR 0x258 0x0606060606060606
2351 07:57:05.478552 MTRR: Fixed MSR 0x250 0x0606060606060606
2352 07:57:05.478598 call enable_fixed_mtrr()
2353 07:57:05.478641 MTRR: Fixed MSR 0x26b 0x0606060606060606
2354 07:57:05.478702 MTRR: Fixed MSR 0x26c 0x0606060606060606
2355 07:57:05.478740 MTRR: Fixed MSR 0x26d 0x0606060606060606
2356 07:57:05.478778 MTRR: Fixed MSR 0x26e 0x0606060606060606
2357 07:57:05.478815 MTRR: Fixed MSR 0x26f 0x0606060606060606
2358 07:57:05.478853 MTRR: Fixed MSR 0x258 0x0606060606060606
2359 07:57:05.478891 MTRR: Fixed MSR 0x259 0x0000000000000000
2360 07:57:05.478929 MTRR: Fixed MSR 0x250 0x0606060606060606
2361 07:57:05.478966 MTRR: Fixed MSR 0x268 0x0606060606060606
2362 07:57:05.479002 MTRR: Fixed MSR 0x269 0x0606060606060606
2363 07:57:05.479040 MTRR: Fixed MSR 0x26a 0x0606060606060606
2364 07:57:05.479078 MTRR: Fixed MSR 0x26b 0x0606060606060606
2365 07:57:05.479115 MTRR: Fixed MSR 0x26c 0x0606060606060606
2366 07:57:05.479153 MTRR: Fixed MSR 0x26d 0x0606060606060606
2367 07:57:05.479195 MTRR: Fixed MSR 0x26e 0x0606060606060606
2368 07:57:05.479234 MTRR: Fixed MSR 0x26f 0x0606060606060606
2369 07:57:05.479272 call enable_fixed_mtrr()
2370 07:57:05.479310 call enable_fixed_mtrr()
2371 07:57:05.479348 CPU physical address size: 39 bits
2372 07:57:05.479385 CPU physical address size: 39 bits
2373 07:57:05.479423 CPU physical address size: 39 bits
2374 07:57:05.479461 MTRR: Fixed MSR 0x259 0x0000000000000000
2375 07:57:05.479499 MTRR: Fixed MSR 0x250 0x0606060606060606
2376 07:57:05.479536 MTRR: Fixed MSR 0x268 0x0606060606060606
2377 07:57:05.479573 MTRR: Fixed MSR 0x269 0x0606060606060606
2378 07:57:05.479611 MTRR: Fixed MSR 0x258 0x0606060606060606
2379 07:57:05.479648 MTRR: Fixed MSR 0x259 0x0000000000000000
2380 07:57:05.479685 MTRR: Fixed MSR 0x268 0x0606060606060606
2381 07:57:05.479722 MTRR: Fixed MSR 0x269 0x0606060606060606
2382 07:57:05.479760 MTRR: Fixed MSR 0x26a 0x0606060606060606
2383 07:57:05.479798 MTRR: Fixed MSR 0x26b 0x0606060606060606
2384 07:57:05.479834 MTRR: Fixed MSR 0x26c 0x0606060606060606
2385 07:57:05.479871 MTRR: Fixed MSR 0x26d 0x0606060606060606
2386 07:57:05.479909 MTRR: Fixed MSR 0x26e 0x0606060606060606
2387 07:57:05.479946 MTRR: Fixed MSR 0x26f 0x0606060606060606
2388 07:57:05.479983 MTRR: Fixed MSR 0x26a 0x0606060606060606
2389 07:57:05.480020 call enable_fixed_mtrr()
2390 07:57:05.480057 MTRR: Fixed MSR 0x258 0x0606060606060606
2391 07:57:05.480094 CPU physical address size: 39 bits
2392 07:57:05.480132 MTRR: Fixed MSR 0x26b 0x0606060606060606
2393 07:57:05.480169 call enable_fixed_mtrr()
2394 07:57:05.480213 MTRR: Fixed MSR 0x26c 0x0606060606060606
2395 07:57:05.480250 MTRR: Fixed MSR 0x26d 0x0606060606060606
2396 07:57:05.480288 MTRR: Fixed MSR 0x26e 0x0606060606060606
2397 07:57:05.480325 MTRR: Fixed MSR 0x26f 0x0606060606060606
2398 07:57:05.480361 CPU physical address size: 39 bits
2399 07:57:05.480398 call enable_fixed_mtrr()
2400 07:57:05.480434 MTRR: Fixed MSR 0x259 0x0000000000000000
2401 07:57:05.480471 CPU physical address size: 39 bits
2402 07:57:05.480508 MTRR: Fixed MSR 0x268 0x0606060606060606
2403 07:57:05.480544 MTRR: Fixed MSR 0x269 0x0606060606060606
2404 07:57:05.480582 MTRR: Fixed MSR 0x26a 0x0606060606060606
2405 07:57:05.480634 MTRR: Fixed MSR 0x26b 0x0606060606060606
2406 07:57:05.480671 MTRR: Fixed MSR 0x26c 0x0606060606060606
2407 07:57:05.480707 MTRR: Fixed MSR 0x26d 0x0606060606060606
2408 07:57:05.480745 MTRR: Fixed MSR 0x26e 0x0606060606060606
2409 07:57:05.480781 MTRR: Fixed MSR 0x26f 0x0606060606060606
2410 07:57:05.480817 call enable_fixed_mtrr()
2411 07:57:05.480853 CPU physical address size: 39 bits
2412 07:57:05.480889
2413 07:57:05.480926 MTRR check
2414 07:57:05.480964 Fixed MTRRs : Enabled
2415 07:57:05.481002 Variable MTRRs: Enabled
2416 07:57:05.481038
2417 07:57:05.481075 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2418 07:57:05.481111 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2419 07:57:05.481148 Checking segment from ROM address 0xffc26dac
2420 07:57:05.481184 Checking segment from ROM address 0xffc26dc8
2421 07:57:05.481220 Loading segment from ROM address 0xffc26dac
2422 07:57:05.481256 code (compression=1)
2423 07:57:05.481292 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2424 07:57:05.481506 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2425 07:57:05.481551 using LZMA
2426 07:57:05.481589 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2427 07:57:05.481626 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2428 07:57:05.481664 Loading segment from ROM address 0xffc26dc8
2429 07:57:05.481702 Entry Point 0x30000000
2430 07:57:05.481739 Loaded segments
2431 07:57:05.481776 BS: BS_PAYLOAD_LOAD run times (exec / console): 87 / 62 ms
2432 07:57:05.481813 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2433 07:57:05.481850 Finalizing chipset.
2434 07:57:05.481887 apm_control: Finalizing SMM.
2435 07:57:05.481923 APMC done.
2436 07:57:05.481960 HECI: CSE device 16.0 is hidden
2437 07:57:05.481998 HECI: CSE device 16.1 is disabled
2438 07:57:05.482035 HECI: CSE device 16.2 is disabled
2439 07:57:05.482072 HECI: CSE device 16.3 is disabled
2440 07:57:05.482109 HECI: CSE device 16.4 is disabled
2441 07:57:05.482145 HECI: CSE device 16.5 is disabled
2442 07:57:05.482182 HECI: CSE device 16.0 is hidden
2443 07:57:05.487243 CSE is disabled, cannot send End-of-Post (EOP) message
2444 07:57:05.490713 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2445 07:57:05.494012 mp_park_aps done after 0 msecs.
2446 07:57:05.500898 Jumping to boot code at 0x30000000(0x76892000)
2447 07:57:05.510155 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2448 07:57:05.514537
2449 07:57:05.514605
2450 07:57:05.514651
2451 07:57:05.517852 Starting depthcharge on Volmar...
2452 07:57:05.517921
2453 07:57:05.518209 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
2454 07:57:05.518281 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2455 07:57:05.518339 Setting prompt string to ['brya:']
2456 07:57:05.518392 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2457 07:57:05.524241 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2458 07:57:05.524324
2459 07:57:05.530848 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2460 07:57:05.531142
2461 07:57:05.537515 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2462 07:57:05.537814
2463 07:57:05.540938 configure_storage: Failed to remap 1C:2
2464 07:57:05.541317
2465 07:57:05.544178 Wipe memory regions:
2466 07:57:05.544492
2467 07:57:05.547454 [0x00000000001000, 0x000000000a0000)
2468 07:57:05.547740
2469 07:57:05.551122 [0x00000000100000, 0x00000030000000)
2470 07:57:05.656830
2471 07:57:05.661370 [0x00000032668e60, 0x00000076858000)
2472 07:57:05.809055
2473 07:57:05.811976 [0x00000100000000, 0x0000027fc00000)
2474 07:57:06.654338
2475 07:57:06.657291 ec_init: CrosEC protocol v3 supported (256, 256)
2476 07:57:07.267799
2477 07:57:07.268247 R8152: Initializing
2478 07:57:07.268529
2479 07:57:07.270607 Version 9 (ocp_data = 6010)
2480 07:57:07.271076
2481 07:57:07.274637 R8152: Done initializing
2482 07:57:07.275084
2483 07:57:07.277221 Adding net device
2484 07:57:07.578280
2485 07:57:07.581443 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2486 07:57:07.581957
2487 07:57:07.582244
2488 07:57:07.582813 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2490 07:57:07.683780 brya: tftpboot 192.168.201.1 14090905/tftp-deploy-d5eege8a/kernel/bzImage 14090905/tftp-deploy-d5eege8a/kernel/cmdline 14090905/tftp-deploy-d5eege8a/ramdisk/ramdisk.cpio.gz
2491 07:57:07.684352 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2492 07:57:07.684681 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2493 07:57:07.688948 tftpboot 192.168.201.1 14090905/tftp-deploy-d5eege8a/kernel/bzIploy-d5eege8a/kernel/cmdline 14090905/tftp-deploy-d5eege8a/ramdisk/ramdisk.cpio.gz
2494 07:57:07.689349
2495 07:57:07.689609 Waiting for link
2496 07:57:07.891682
2497 07:57:07.892110 done.
2498 07:57:07.892353
2499 07:57:07.892565 MAC: 00:e0:4c:68:03:d9
2500 07:57:07.892771
2501 07:57:07.895260 Sending DHCP discover... done.
2502 07:57:07.895571
2503 07:57:07.898395 Waiting for reply... done.
2504 07:57:07.898926
2505 07:57:07.901458 Sending DHCP request... done.
2506 07:57:07.901779
2507 07:57:07.908663 Waiting for reply... done.
2508 07:57:07.908990
2509 07:57:07.909212 My ip is 192.168.201.14
2510 07:57:07.909401
2511 07:57:07.912086 The DHCP server ip is 192.168.201.1
2512 07:57:07.915140
2513 07:57:07.919051 TFTP server IP predefined by user: 192.168.201.1
2514 07:57:07.919518
2515 07:57:07.925092 Bootfile predefined by user: 14090905/tftp-deploy-d5eege8a/kernel/bzImage
2516 07:57:07.925490
2517 07:57:07.928656 Sending tftp read request... done.
2518 07:57:07.929073
2519 07:57:07.936306 Waiting for the transfer...
2520 07:57:07.936637
2521 07:57:08.167502 00000000 ################################################################
2522 07:57:08.167631
2523 07:57:08.397245 00080000 ################################################################
2524 07:57:08.397361
2525 07:57:08.626152 00100000 ################################################################
2526 07:57:08.626286
2527 07:57:08.856132 00180000 ################################################################
2528 07:57:08.856275
2529 07:57:09.083572 00200000 ################################################################
2530 07:57:09.083683
2531 07:57:09.312762 00280000 ################################################################
2532 07:57:09.312887
2533 07:57:09.542735 00300000 ################################################################
2534 07:57:09.542847
2535 07:57:09.771261 00380000 ################################################################
2536 07:57:09.771372
2537 07:57:09.998802 00400000 ################################################################
2538 07:57:09.998937
2539 07:57:10.224709 00480000 ################################################################
2540 07:57:10.224832
2541 07:57:10.452043 00500000 ################################################################
2542 07:57:10.452168
2543 07:57:10.680842 00580000 ################################################################
2544 07:57:10.680994
2545 07:57:10.905229 00600000 ################################################################
2546 07:57:10.905341
2547 07:57:11.130552 00680000 ################################################################
2548 07:57:11.130660
2549 07:57:11.357645 00700000 ################################################################
2550 07:57:11.357754
2551 07:57:11.583677 00780000 ################################################################
2552 07:57:11.583791
2553 07:57:11.810552 00800000 ################################################################
2554 07:57:11.810661
2555 07:57:12.036506 00880000 ################################################################
2556 07:57:12.036622
2557 07:57:12.262587 00900000 ################################################################
2558 07:57:12.262698
2559 07:57:12.489467 00980000 ################################################################
2560 07:57:12.489585
2561 07:57:12.715609 00a00000 ################################################################
2562 07:57:12.715717
2563 07:57:12.941739 00a80000 ################################################################
2564 07:57:12.941853
2565 07:57:13.168418 00b00000 ################################################################
2566 07:57:13.168529
2567 07:57:13.392244 00b80000 ################################################################
2568 07:57:13.392353
2569 07:57:13.618501 00c00000 ################################################################
2570 07:57:13.618611
2571 07:57:13.846344 00c80000 ################################################################
2572 07:57:13.846462
2573 07:57:14.072651 00d00000 ################################################################
2574 07:57:14.072761
2575 07:57:14.297959 00d80000 ################################################################
2576 07:57:14.298082
2577 07:57:14.523542 00e00000 ################################################################
2578 07:57:14.523650
2579 07:57:14.749533 00e80000 ################################################################
2580 07:57:14.749659
2581 07:57:14.976062 00f00000 ################################################################
2582 07:57:14.976168
2583 07:57:15.203878 00f80000 ################################################################
2584 07:57:15.203995
2585 07:57:15.431875 01000000 ################################################################
2586 07:57:15.431983
2587 07:57:15.658615 01080000 ################################################################
2588 07:57:15.658727
2589 07:57:15.884587 01100000 ################################################################
2590 07:57:15.884696
2591 07:57:16.110467 01180000 ################################################################
2592 07:57:16.110578
2593 07:57:16.336542 01200000 ################################################################
2594 07:57:16.336654
2595 07:57:16.562174 01280000 ################################################################
2596 07:57:16.562285
2597 07:57:16.788144 01300000 ################################################################
2598 07:57:16.788263
2599 07:57:17.014319 01380000 ################################################################
2600 07:57:17.014432
2601 07:57:17.241347 01400000 ################################################################
2602 07:57:17.241464
2603 07:57:17.470041 01480000 ################################################################
2604 07:57:17.470158
2605 07:57:17.697992 01500000 ################################################################
2606 07:57:17.698103
2607 07:57:17.832314 01580000 ####################################### done.
2608 07:57:17.832429
2609 07:57:17.835774 The bootfile was 22859904 bytes long.
2610 07:57:17.835848
2611 07:57:17.839185 Sending tftp read request... done.
2612 07:57:17.842311
2613 07:57:17.842383 Waiting for the transfer...
2614 07:57:17.842433
2615 07:57:18.072525 00000000 ################################################################
2616 07:57:18.072654
2617 07:57:18.298625 00080000 ################################################################
2618 07:57:18.298757
2619 07:57:18.525805 00100000 ################################################################
2620 07:57:18.525931
2621 07:57:18.753637 00180000 ################################################################
2622 07:57:18.753773
2623 07:57:18.981431 00200000 ################################################################
2624 07:57:18.981564
2625 07:57:19.207637 00280000 ################################################################
2626 07:57:19.207774
2627 07:57:19.433651 00300000 ################################################################
2628 07:57:19.433793
2629 07:57:19.659643 00380000 ################################################################
2630 07:57:19.659767
2631 07:57:19.885332 00400000 ################################################################
2632 07:57:19.885454
2633 07:57:20.113438 00480000 ################################################################
2634 07:57:20.113553
2635 07:57:20.340154 00500000 ################################################################
2636 07:57:20.340272
2637 07:57:20.569074 00580000 ################################################################
2638 07:57:20.569187
2639 07:57:20.797001 00600000 ################################################################
2640 07:57:20.797111
2641 07:57:21.024163 00680000 ################################################################
2642 07:57:21.024297
2643 07:57:21.250508 00700000 ################################################################
2644 07:57:21.250625
2645 07:57:21.478023 00780000 ################################################################
2646 07:57:21.478137
2647 07:57:21.704380 00800000 ################################################################
2648 07:57:21.704492
2649 07:57:21.929905 00880000 ################################################################
2650 07:57:21.930017
2651 07:57:22.157641 00900000 ################################################################
2652 07:57:22.157769
2653 07:57:22.386005 00980000 ################################################################
2654 07:57:22.386119
2655 07:57:22.611326 00a00000 ################################################################
2656 07:57:22.611432
2657 07:57:22.838218 00a80000 ################################################################
2658 07:57:22.838341
2659 07:57:23.064276 00b00000 ################################################################
2660 07:57:23.064389
2661 07:57:23.289682 00b80000 ################################################################
2662 07:57:23.289792
2663 07:57:23.516433 00c00000 ################################################################
2664 07:57:23.516559
2665 07:57:23.743578 00c80000 ################################################################
2666 07:57:23.743692
2667 07:57:23.969196 00d00000 ################################################################
2668 07:57:23.969307
2669 07:57:24.196162 00d80000 ################################################################
2670 07:57:24.196291
2671 07:57:24.423345 00e00000 ################################################################
2672 07:57:24.423461
2673 07:57:24.503695 00e80000 ####################### done.
2674 07:57:24.503829
2675 07:57:24.505919 Sending tftp read request... done.
2676 07:57:24.505980
2677 07:57:24.509710 Waiting for the transfer...
2678 07:57:24.509788
2679 07:57:24.509836 00000000 # done.
2680 07:57:24.512182
2681 07:57:24.518843 Command line loaded dynamically from TFTP file: 14090905/tftp-deploy-d5eege8a/kernel/cmdline
2682 07:57:24.518904
2683 07:57:24.535171 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2684 07:57:24.543044
2685 07:57:24.547102 Shutting down all USB controllers.
2686 07:57:24.547158
2687 07:57:24.547212 Removing current net device
2688 07:57:24.547255
2689 07:57:24.549739 Finalizing coreboot
2690 07:57:24.549798
2691 07:57:24.556606 Exiting depthcharge with code 4 at timestamp: 28884441
2692 07:57:24.556674
2693 07:57:24.556716
2694 07:57:24.556756 Starting kernel ...
2695 07:57:24.556795
2696 07:57:24.556843
2697 07:57:24.557245 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2698 07:57:24.557327 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2699 07:57:24.557382 Setting prompt string to ['Linux version [0-9]']
2700 07:57:24.557432 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2701 07:57:24.557481 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2703 08:01:51.558078 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2705 08:01:51.558758 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2707 08:01:51.559333 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2710 08:01:51.560102 end: 2 depthcharge-action (duration 00:05:00) [common]
2712 08:01:51.560771 Cleaning after the job
2713 08:01:51.561038 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14090905/tftp-deploy-d5eege8a/ramdisk
2714 08:01:51.565491 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14090905/tftp-deploy-d5eege8a/kernel
2715 08:01:51.572511 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14090905/tftp-deploy-d5eege8a/modules
2716 08:01:51.578201 start: 4.1 power-off (timeout 00:00:30) [common]
2717 08:01:51.578446 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-1', '--port=1', '--command=off']
2718 08:01:52.494530 >> Command sent successfully.
2719 08:01:52.497383 Returned 0 in 0 seconds
2720 08:01:52.597938 end: 4.1 power-off (duration 00:00:01) [common]
2722 08:01:52.598862 start: 4.2 read-feedback (timeout 00:09:59) [common]
2723 08:01:52.599559 Listened to connection for namespace 'common' for up to 1s
2725 08:01:52.600457 Listened to connection for namespace 'common' for up to 1s
2726 08:01:53.600317 Finalising connection for namespace 'common'
2727 08:01:53.600465 Disconnecting from shell: Finalise
2728 08:01:53.600529
2729 08:01:53.700806 end: 4.2 read-feedback (duration 00:00:01) [common]
2730 08:01:53.700934 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14090905
2731 08:01:53.716034 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14090905
2732 08:01:53.716201 JobError: Your job cannot terminate cleanly.