Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 07:56:28.789813 lava-dispatcher, installed at version: 2024.03
2 07:56:28.789995 start: 0 validate
3 07:56:28.790095 Start time: 2024-05-30 07:56:28.790090+00:00 (UTC)
4 07:56:28.790207 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:56:28.790321 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 07:56:29.065022 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:56:29.065629 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.216-cip47-47-g42df769f88c3%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:56:29.334629 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:56:29.335322 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:56:36.900682 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:56:36.901226 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.216-cip47-47-g42df769f88c3%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
12 07:56:37.166176 validate duration: 8.38
14 07:56:37.166937 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:56:37.167026 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:56:37.167109 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:56:37.167262 Not decompressing ramdisk as can be used compressed.
18 07:56:37.167344 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/initrd.cpio.gz
19 07:56:37.167403 saving as /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/ramdisk/initrd.cpio.gz
20 07:56:37.167462 total size: 6137767 (5 MB)
21 07:56:44.758346 progress 0 % (0 MB)
22 07:56:44.763486 progress 5 % (0 MB)
23 07:56:44.764592 progress 10 % (0 MB)
24 07:56:44.765737 progress 15 % (0 MB)
25 07:56:44.766803 progress 20 % (1 MB)
26 07:56:44.767881 progress 25 % (1 MB)
27 07:56:44.769077 progress 30 % (1 MB)
28 07:56:44.770112 progress 35 % (2 MB)
29 07:56:44.771147 progress 40 % (2 MB)
30 07:56:44.772308 progress 45 % (2 MB)
31 07:56:44.773342 progress 50 % (2 MB)
32 07:56:44.774495 progress 55 % (3 MB)
33 07:56:44.775542 progress 60 % (3 MB)
34 07:56:44.776586 progress 65 % (3 MB)
35 07:56:44.777713 progress 70 % (4 MB)
36 07:56:44.778723 progress 75 % (4 MB)
37 07:56:44.779759 progress 80 % (4 MB)
38 07:56:44.780864 progress 85 % (5 MB)
39 07:56:44.781882 progress 90 % (5 MB)
40 07:56:44.782903 progress 95 % (5 MB)
41 07:56:44.784046 progress 100 % (5 MB)
42 07:56:44.784153 5 MB downloaded in 7.62 s (0.77 MB/s)
43 07:56:44.784307 end: 1.1.1 http-download (duration 00:00:08) [common]
45 07:56:44.784509 end: 1.1 download-retry (duration 00:00:08) [common]
46 07:56:44.784572 start: 1.2 download-retry (timeout 00:09:52) [common]
47 07:56:44.784629 start: 1.2.1 http-download (timeout 00:09:52) [common]
48 07:56:44.784745 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.216-cip47-47-g42df769f88c3/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/kernel/bzImage
49 07:56:44.784795 saving as /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/kernel/bzImage
50 07:56:44.784843 total size: 22859904 (21 MB)
51 07:56:44.784887 No compression specified
52 07:56:45.051062 progress 0 % (0 MB)
53 07:56:45.068867 progress 5 % (1 MB)
54 07:56:45.076164 progress 10 % (2 MB)
55 07:56:45.080308 progress 15 % (3 MB)
56 07:56:45.084150 progress 20 % (4 MB)
57 07:56:45.088101 progress 25 % (5 MB)
58 07:56:45.091961 progress 30 % (6 MB)
59 07:56:45.095875 progress 35 % (7 MB)
60 07:56:45.099749 progress 40 % (8 MB)
61 07:56:45.103545 progress 45 % (9 MB)
62 07:56:45.107435 progress 50 % (10 MB)
63 07:56:45.111357 progress 55 % (12 MB)
64 07:56:45.115299 progress 60 % (13 MB)
65 07:56:45.119110 progress 65 % (14 MB)
66 07:56:45.122969 progress 70 % (15 MB)
67 07:56:45.126785 progress 75 % (16 MB)
68 07:56:45.130669 progress 80 % (17 MB)
69 07:56:45.134422 progress 85 % (18 MB)
70 07:56:45.138262 progress 90 % (19 MB)
71 07:56:45.142035 progress 95 % (20 MB)
72 07:56:45.145822 progress 100 % (21 MB)
73 07:56:45.145967 21 MB downloaded in 0.36 s (60.37 MB/s)
74 07:56:45.146098 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:56:45.146269 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:56:45.146331 start: 1.3 download-retry (timeout 00:09:52) [common]
78 07:56:45.146395 start: 1.3.1 http-download (timeout 00:09:52) [common]
79 07:56:45.146515 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/full.rootfs.tar.xz
80 07:56:45.146565 saving as /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/nfsrootfs/full.rootfs.tar
81 07:56:45.146607 total size: 116951716 (111 MB)
82 07:56:45.146649 Using unxz to decompress xz
83 07:56:45.147915 progress 0 % (0 MB)
84 07:56:45.392303 progress 5 % (5 MB)
85 07:56:45.665629 progress 10 % (11 MB)
86 07:56:45.930517 progress 15 % (16 MB)
87 07:56:46.197691 progress 20 % (22 MB)
88 07:56:46.441223 progress 25 % (27 MB)
89 07:56:46.705872 progress 30 % (33 MB)
90 07:56:46.948255 progress 35 % (39 MB)
91 07:56:47.090466 progress 40 % (44 MB)
92 07:56:47.307232 progress 45 % (50 MB)
93 07:56:47.583075 progress 50 % (55 MB)
94 07:56:47.819538 progress 55 % (61 MB)
95 07:56:48.105073 progress 60 % (66 MB)
96 07:56:48.389032 progress 65 % (72 MB)
97 07:56:48.665204 progress 70 % (78 MB)
98 07:56:48.944295 progress 75 % (83 MB)
99 07:56:49.203774 progress 80 % (89 MB)
100 07:56:49.467602 progress 85 % (94 MB)
101 07:56:49.737909 progress 90 % (100 MB)
102 07:56:50.002130 progress 95 % (105 MB)
103 07:56:50.285154 progress 100 % (111 MB)
104 07:56:50.289095 111 MB downloaded in 5.14 s (21.69 MB/s)
105 07:56:50.289320 end: 1.3.1 http-download (duration 00:00:05) [common]
107 07:56:50.289526 end: 1.3 download-retry (duration 00:00:05) [common]
108 07:56:50.289591 start: 1.4 download-retry (timeout 00:09:47) [common]
109 07:56:50.289652 start: 1.4.1 http-download (timeout 00:09:47) [common]
110 07:56:50.289771 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.216-cip47-47-g42df769f88c3/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/modules.tar.xz
111 07:56:50.289824 saving as /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/modules/modules.tar
112 07:56:50.289866 total size: 4530424 (4 MB)
113 07:56:50.289910 Using unxz to decompress xz
114 07:56:50.291129 progress 0 % (0 MB)
115 07:56:50.297425 progress 5 % (0 MB)
116 07:56:50.308199 progress 10 % (0 MB)
117 07:56:50.321810 progress 15 % (0 MB)
118 07:56:50.331594 progress 20 % (0 MB)
119 07:56:50.342154 progress 25 % (1 MB)
120 07:56:50.354837 progress 30 % (1 MB)
121 07:56:50.365943 progress 35 % (1 MB)
122 07:56:50.376998 progress 40 % (1 MB)
123 07:56:50.388280 progress 45 % (1 MB)
124 07:56:50.399514 progress 50 % (2 MB)
125 07:56:50.410672 progress 55 % (2 MB)
126 07:56:50.420867 progress 60 % (2 MB)
127 07:56:50.431723 progress 65 % (2 MB)
128 07:56:50.443782 progress 70 % (3 MB)
129 07:56:50.455991 progress 75 % (3 MB)
130 07:56:50.466744 progress 80 % (3 MB)
131 07:56:50.479303 progress 85 % (3 MB)
132 07:56:50.490834 progress 90 % (3 MB)
133 07:56:50.502126 progress 95 % (4 MB)
134 07:56:50.513901 progress 100 % (4 MB)
135 07:56:50.517936 4 MB downloaded in 0.23 s (18.94 MB/s)
136 07:56:50.518099 end: 1.4.1 http-download (duration 00:00:00) [common]
138 07:56:50.518298 end: 1.4 download-retry (duration 00:00:00) [common]
139 07:56:50.518371 start: 1.5 prepare-tftp-overlay (timeout 00:09:47) [common]
140 07:56:50.518449 start: 1.5.1 extract-nfsrootfs (timeout 00:09:47) [common]
141 07:56:51.776059 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14090874/extract-nfsrootfs-c9lje7gu
142 07:56:51.776251 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
143 07:56:51.776342 start: 1.5.2 lava-overlay (timeout 00:09:45) [common]
144 07:56:51.776502 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374
145 07:56:51.776608 makedir: /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin
146 07:56:51.776691 makedir: /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/tests
147 07:56:51.776769 makedir: /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/results
148 07:56:51.776847 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-add-keys
149 07:56:51.776956 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-add-sources
150 07:56:51.777054 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-background-process-start
151 07:56:51.777149 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-background-process-stop
152 07:56:51.777253 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-common-functions
153 07:56:51.777387 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-echo-ipv4
154 07:56:51.777481 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-install-packages
155 07:56:51.777570 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-installed-packages
156 07:56:51.777661 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-os-build
157 07:56:51.777750 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-probe-channel
158 07:56:51.777840 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-probe-ip
159 07:56:51.777929 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-target-ip
160 07:56:51.778017 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-target-mac
161 07:56:51.778105 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-target-storage
162 07:56:51.778229 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-test-case
163 07:56:51.778353 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-test-event
164 07:56:51.778443 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-test-feedback
165 07:56:51.778531 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-test-raise
166 07:56:51.778618 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-test-reference
167 07:56:51.778704 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-test-runner
168 07:56:51.778791 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-test-set
169 07:56:51.778879 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-test-shell
170 07:56:51.778967 Updating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-install-packages (oe)
171 07:56:51.779081 Updating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/bin/lava-installed-packages (oe)
172 07:56:51.779171 Creating /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/environment
173 07:56:51.779265 LAVA metadata
174 07:56:51.779323 - LAVA_JOB_ID=14090874
175 07:56:51.779369 - LAVA_DISPATCHER_IP=192.168.201.1
176 07:56:51.779449 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:45) [common]
177 07:56:51.779499 skipped lava-vland-overlay
178 07:56:51.779567 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
179 07:56:51.779625 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:45) [common]
180 07:56:51.779671 skipped lava-multinode-overlay
181 07:56:51.779723 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
182 07:56:51.779780 start: 1.5.2.3 test-definition (timeout 00:09:45) [common]
183 07:56:51.779831 Loading test definitions
184 07:56:51.779910 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:45) [common]
185 07:56:51.779959 Using /lava-14090874 at stage 0
186 07:56:51.780208 uuid=14090874_1.5.2.3.1 testdef=None
187 07:56:51.780275 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
188 07:56:51.780334 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
189 07:56:51.780696 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
191 07:56:51.780858 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
192 07:56:51.781390 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
194 07:56:51.781559 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
195 07:56:51.781998 runner path: /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/0/tests/0_dmesg test_uuid 14090874_1.5.2.3.1
196 07:56:51.782111 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
198 07:56:51.782258 Creating lava-test-runner.conf files
199 07:56:51.782300 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14090874/lava-overlay-6tnga374/lava-14090874/0 for stage 0
200 07:56:51.782362 - 0_dmesg
201 07:56:51.782433 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
202 07:56:51.782495 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
203 07:56:51.786755 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
204 07:56:51.786840 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:45) [common]
205 07:56:51.786906 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
206 07:56:51.786970 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
207 07:56:51.787035 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:45) [common]
208 07:56:51.884570 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
209 07:56:51.884710 start: 1.5.4 extract-modules (timeout 00:09:45) [common]
210 07:56:51.884783 extracting modules file /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14090874/extract-nfsrootfs-c9lje7gu
211 07:56:51.952572 extracting modules file /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14090874/extract-overlay-ramdisk-svfcwfph/ramdisk
212 07:56:52.018094 end: 1.5.4 extract-modules (duration 00:00:00) [common]
213 07:56:52.018237 start: 1.5.5 apply-overlay-tftp (timeout 00:09:45) [common]
214 07:56:52.018313 [common] Applying overlay to NFS
215 07:56:52.018363 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14090874/compress-overlay-jgn87a0m/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14090874/extract-nfsrootfs-c9lje7gu
216 07:56:52.022762 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
217 07:56:52.022871 start: 1.5.6 configure-preseed-file (timeout 00:09:45) [common]
218 07:56:52.022942 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
219 07:56:52.023007 start: 1.5.7 compress-ramdisk (timeout 00:09:45) [common]
220 07:56:52.023064 Building ramdisk /var/lib/lava/dispatcher/tmp/14090874/extract-overlay-ramdisk-svfcwfph/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14090874/extract-overlay-ramdisk-svfcwfph/ramdisk
221 07:56:52.100404 >> 87449 blocks
222 07:56:53.373890 rename /var/lib/lava/dispatcher/tmp/14090874/extract-overlay-ramdisk-svfcwfph/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/ramdisk/ramdisk.cpio.gz
223 07:56:53.374072 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
224 07:56:53.374156 start: 1.5.8 prepare-kernel (timeout 00:09:44) [common]
225 07:56:53.374222 start: 1.5.8.1 prepare-fit (timeout 00:09:44) [common]
226 07:56:53.374279 No mkimage arch provided, not using FIT.
227 07:56:53.374339 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
228 07:56:53.374399 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
229 07:56:53.374460 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
230 07:56:53.374535 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:44) [common]
231 07:56:53.374586 No LXC device requested
232 07:56:53.374644 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
233 07:56:53.374706 start: 1.7 deploy-device-env (timeout 00:09:44) [common]
234 07:56:53.374765 end: 1.7 deploy-device-env (duration 00:00:00) [common]
235 07:56:53.374814 Checking files for TFTP limit of 4294967296 bytes.
236 07:56:53.375067 end: 1 tftp-deploy (duration 00:00:16) [common]
237 07:56:53.375141 start: 2 depthcharge-action (timeout 00:05:00) [common]
238 07:56:53.375226 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
239 07:56:53.375314 substitutions:
240 07:56:53.375375 - {DTB}: None
241 07:56:53.375433 - {INITRD}: 14090874/tftp-deploy-h7wl0aww/ramdisk/ramdisk.cpio.gz
242 07:56:53.375479 - {KERNEL}: 14090874/tftp-deploy-h7wl0aww/kernel/bzImage
243 07:56:53.375525 - {LAVA_MAC}: None
244 07:56:53.375569 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14090874/extract-nfsrootfs-c9lje7gu
245 07:56:53.375614 - {NFS_SERVER_IP}: 192.168.201.1
246 07:56:53.375653 - {PRESEED_CONFIG}: None
247 07:56:53.375699 - {PRESEED_LOCAL}: None
248 07:56:53.375746 - {RAMDISK}: 14090874/tftp-deploy-h7wl0aww/ramdisk/ramdisk.cpio.gz
249 07:56:53.375792 - {ROOT_PART}: None
250 07:56:53.375832 - {ROOT}: None
251 07:56:53.375870 - {SERVER_IP}: 192.168.201.1
252 07:56:53.375909 - {TEE}: None
253 07:56:53.375953 Parsed boot commands:
254 07:56:53.375997 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
255 07:56:53.376116 Parsed boot commands: tftpboot 192.168.201.1 14090874/tftp-deploy-h7wl0aww/kernel/bzImage 14090874/tftp-deploy-h7wl0aww/kernel/cmdline 14090874/tftp-deploy-h7wl0aww/ramdisk/ramdisk.cpio.gz
256 07:56:53.376186 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
257 07:56:53.376247 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
258 07:56:53.376307 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
259 07:56:53.376364 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
260 07:56:53.376410 Not connected, no need to disconnect.
261 07:56:53.376461 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
262 07:56:53.376528 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
263 07:56:53.376573 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
264 07:56:53.379673 Setting prompt string to ['lava-test: # ']
265 07:56:53.379934 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
266 07:56:53.380032 end: 2.2.1 reset-connection (duration 00:00:00) [common]
267 07:56:53.380146 start: 2.2.2 reset-device (timeout 00:05:00) [common]
268 07:56:53.380219 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
269 07:56:53.380367 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-3']
270 07:57:06.842924 Returned 0 in 13 seconds
271 07:57:06.943571 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
273 07:57:06.944536 end: 2.2.2 reset-device (duration 00:00:14) [common]
274 07:57:06.944870 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
275 07:57:06.945168 Setting prompt string to 'Starting depthcharge on Volmar...'
276 07:57:06.945385 Changing prompt to 'Starting depthcharge on Volmar...'
277 07:57:06.945619 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
278 07:57:06.946778 [Enter `^Ec?' for help]
279 07:57:06.947055
280 07:57:06.947295
281 07:57:06.947496 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
282 07:57:06.947687 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
283 07:57:06.947878 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
284 07:57:06.948078 CPU: AES supported, TXT NOT supported, VT supported
285 07:57:06.948288 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
286 07:57:06.948428 Cache size = 10 MiB
287 07:57:06.948468 MCH: device id 4609 (rev 04) is Alderlake-P
288 07:57:06.948507 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
289 07:57:06.948545 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
290 07:57:06.948585 VBOOT: Loading verstage.
291 07:57:06.948626 FMAP: Found "FLASH" version 1.1 at 0x1804000.
292 07:57:06.948668 FMAP: base = 0x0 size = 0x2000000 #areas = 37
293 07:57:06.948711 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
294 07:57:06.948753 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
295 07:57:06.948793 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
296 07:57:06.948836
297 07:57:06.948874
298 07:57:06.948913 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
299 07:57:06.948952 Probing TPM I2C: I2C bus 1 version 0x3230302a
300 07:57:06.948991 DW I2C bus 1 at 0xfe022000 (400 KHz)
301 07:57:06.949029 I2C TX abort detected (00000001)
302 07:57:06.949067 cr50_i2c_read: Address write failed
303 07:57:06.949105 .done! DID_VID 0x00281ae0
304 07:57:06.949144 TPM ready after 0 ms
305 07:57:06.949183 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
306 07:57:06.949222 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
307 07:57:06.949261 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
308 07:57:06.949299 tlcl_send_startup: Startup return code is 0
309 07:57:06.949337 TPM: setup succeeded
310 07:57:06.949375 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
311 07:57:06.949413 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 07:57:06.949451 Chrome EC: UHEPI supported
313 07:57:06.949488 Reading cr50 boot mode
314 07:57:06.949526 Cr50 says boot_mode is VERIFIED_RW(0x00).
315 07:57:06.949563 Phase 1
316 07:57:06.949601 FMAP: area GBB found @ 1805000 (458752 bytes)
317 07:57:06.949638 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
318 07:57:06.949676 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
319 07:57:06.949715 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
320 07:57:06.949753 VB2:vb2_check_recovery() Recovery was requested manually
321 07:57:06.949791 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
322 07:57:06.949828 Recovery requested (1009000e)
323 07:57:06.949866 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
324 07:57:06.949903 tlcl_extend: response is 0
325 07:57:06.949941 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
326 07:57:06.949978 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
327 07:57:06.950015 tlcl_extend: response is 0
328 07:57:06.950053 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
329 07:57:06.950092 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
330 07:57:06.950130 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
331 07:57:06.950168 BS: verstage times (exec / console): total (unknown) / 156 ms
332 07:57:06.950205
333 07:57:06.950242
334 07:57:06.950280 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
335 07:57:06.950319 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
336 07:57:06.950358 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
337 07:57:06.950399 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
338 07:57:06.950436 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
339 07:57:06.950474 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
340 07:57:06.950512 gpe0_sts[3]: 00000000 gpe0_en[3]: 00080000
341 07:57:06.950568 TCO_STS: 0000 0000
342 07:57:06.950609 GEN_PMCON: d0015038 00002200
343 07:57:06.950647 GBLRST_CAUSE: 00000000 00000000
344 07:57:06.950685 HPR_CAUSE0: 00000000
345 07:57:06.950723 prev_sleep_state 5
346 07:57:06.950761 Abort disabling TXT, as CPU is not TXT capable.
347 07:57:06.950798 cse_lite: Skip switching to RW in the recovery path
348 07:57:06.950837 Boot Count incremented to 2861
349 07:57:06.950875 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
350 07:57:06.950913 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
351 07:57:06.950952 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
352 07:57:06.950990 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
353 07:57:06.951028 Chrome EC: UHEPI supported
354 07:57:06.951066 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
355 07:57:06.951104 Probing TPM I2C: done! DID_VID 0x00281ae0
356 07:57:06.951141 Locality already claimed
357 07:57:06.951187 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
358 07:57:06.951228 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
359 07:57:06.951267 MRC: Hash idx 0x100b comparison successful.
360 07:57:06.951305 MRC cache found, size f6c8
361 07:57:06.951343 bootmode is set to: 2
362 07:57:06.951381 EC returned error result code 3
363 07:57:06.951419 FW_CONFIG value from CBI is 0x131
364 07:57:06.951457 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
365 07:57:06.951494 SPD index = 0
366 07:57:06.951532 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
367 07:57:06.951571 SPD: module type is LPDDR4X
368 07:57:06.951608 SPD: module part number is K4U6E3S4AB-MGCL
369 07:57:06.951668 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
370 07:57:06.951895 SPD: device width 16 bits, bus width 16 bits
371 07:57:06.951946 SPD: module size is 1024 MB (per channel)
372 07:57:06.951987 CBMEM:
373 07:57:06.952026 IMD: root @ 0x76fff000 254 entries.
374 07:57:06.952067 IMD: root @ 0x76ffec00 62 entries.
375 07:57:06.952127 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
376 07:57:06.952171 RO_VPD is uninitialized or empty.
377 07:57:06.952211 FMAP: area RW_VPD found @ f29000 (8192 bytes)
378 07:57:06.952250 External stage cache:
379 07:57:06.952289 IMD: root @ 0x7bbff000 254 entries.
380 07:57:06.952327 IMD: root @ 0x7bbfec00 62 entries.
381 07:57:06.952366 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
382 07:57:06.952405 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
383 07:57:06.952444 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
384 07:57:06.952483 MRC: 'RECOVERY_MRC_CACHE' does not need update.
385 07:57:06.952521 8 DIMMs found
386 07:57:06.952563 SMM Memory Map
387 07:57:06.952602 SMRAM : 0x7b800000 0x800000
388 07:57:06.952641 Subregion 0: 0x7b800000 0x200000
389 07:57:06.952679 Subregion 1: 0x7ba00000 0x200000
390 07:57:06.952718 Subregion 2: 0x7bc00000 0x400000
391 07:57:06.952757 top_of_ram = 0x77000000
392 07:57:06.952795 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
393 07:57:06.952833 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
394 07:57:06.952871 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
395 07:57:06.952909 MTRR Range: Start=ff000000 End=0 (Size 1000000)
396 07:57:06.952946 Normal boot
397 07:57:06.952985 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
398 07:57:06.953023 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
399 07:57:06.953062 Processing 237 relocs. Offset value of 0x74aba000
400 07:57:06.953101 BS: romstage times (exec / console): total (unknown) / 280 ms
401 07:57:06.953141
402 07:57:06.953178
403 07:57:06.953217 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
404 07:57:06.953255 Normal boot
405 07:57:06.953293 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
406 07:57:06.953334 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
407 07:57:06.953374 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
408 07:57:06.953413 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
409 07:57:06.953453 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
410 07:57:06.953495 Processing 5931 relocs. Offset value of 0x72a30000
411 07:57:06.953534 BS: postcar times (exec / console): total (unknown) / 51 ms
412 07:57:06.953572
413 07:57:06.953610
414 07:57:06.953648 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
415 07:57:06.953686 Reserving BERT start 76a1f000, size 10000
416 07:57:06.953727 Normal boot
417 07:57:06.953767 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
418 07:57:06.953808 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
419 07:57:06.953852 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
420 07:57:06.953892 FMAP: area RW_VPD found @ f29000 (8192 bytes)
421 07:57:06.953931 Google Chrome EC: version:
422 07:57:06.953968 ro: volmar_v2.0.14126-e605144e9c
423 07:57:06.954005 rw: volmar_v0.0.55-22d1557
424 07:57:06.954043 running image: 1
425 07:57:06.954081 ACPI _SWS is PM1 Index 8 GPE Index -1
426 07:57:06.954119 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
427 07:57:06.954157 EC returned error result code 3
428 07:57:06.954195 FW_CONFIG value from CBI is 0x131
429 07:57:06.954234 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
430 07:57:06.954272 PCI: 00:1c.2 disabled by fw_config
431 07:57:06.954310 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
432 07:57:06.954349 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
433 07:57:06.954388 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
434 07:57:06.954426 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
435 07:57:06.954465 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
436 07:57:06.954503 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
437 07:57:06.954543 microcode: sig=0x906a4 pf=0x80 revision=0x423
438 07:57:06.954580 microcode: Update skipped, already up-to-date
439 07:57:06.954618 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
440 07:57:06.954656 Detected 6 core, 8 thread CPU.
441 07:57:06.954693 Setting up SMI for CPU
442 07:57:06.954731 IED base = 0x7bc00000
443 07:57:06.954769 IED size = 0x00400000
444 07:57:06.954807 Will perform SMM setup.
445 07:57:06.954845 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
446 07:57:06.954884 LAPIC 0x0 in XAPIC mode.
447 07:57:06.954921 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
448 07:57:06.954960 Processing 18 relocs. Offset value of 0x00030000
449 07:57:06.954998 Attempting to start 7 APs
450 07:57:06.955036 Waiting for 10ms after sending INIT.
451 07:57:06.955075 Waiting for SIPI to complete...
452 07:57:06.955113 done.
453 07:57:06.955152 LAPIC 0x1 in XAPIC mode.
454 07:57:06.955196 LAPIC 0x16 in XAPIC mode.
455 07:57:06.955235 LAPIC 0x9 in XAPIC mode.
456 07:57:06.955287 LAPIC 0x8 in XAPIC mode.
457 07:57:06.955324 LAPIC 0x10 in XAPIC mode.
458 07:57:06.955361 AP: slot 3 apic_id 16, MCU rev: 0x00000423
459 07:57:06.955399 AP: slot 4 apic_id 10, MCU rev: 0x00000423
460 07:57:06.955436 LAPIC 0x12 in XAPIC mode.
461 07:57:06.955473 LAPIC 0x14 in XAPIC mode.
462 07:57:06.955510 AP: slot 1 apic_id 12, MCU rev: 0x00000423
463 07:57:06.955548 AP: slot 2 apic_id 14, MCU rev: 0x00000423
464 07:57:06.955585 AP: slot 6 apic_id 9, MCU rev: 0x00000423
465 07:57:06.955622 Waiting for SIPI to complete...
466 07:57:06.955659 done.
467 07:57:06.955874 AP: slot 5 apic_id 1, MCU rev: 0x00000423
468 07:57:06.955938 AP: slot 7 apic_id 8, MCU rev: 0x00000423
469 07:57:06.955979 smm_setup_relocation_handler: enter
470 07:57:06.956018 smm_setup_relocation_handler: exit
471 07:57:06.956057 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
472 07:57:06.956097 Processing 11 relocs. Offset value of 0x00038000
473 07:57:06.956136 smm_module_setup_stub: stack_top = 0x7b804000
474 07:57:06.956177 smm_module_setup_stub: per cpu stack_size = 0x800
475 07:57:06.956266 smm_module_setup_stub: runtime.start32_offset = 0x4c
476 07:57:06.956322 smm_module_setup_stub: runtime.smm_size = 0x10000
477 07:57:06.956375 SMM Module: stub loaded at 38000. Will call 0x76a53094
478 07:57:06.956427 Installing permanent SMM handler to 0x7b800000
479 07:57:06.956479 smm_load_module: total_smm_space_needed e468, available -> 200000
480 07:57:06.956542 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
481 07:57:06.956599 Processing 255 relocs. Offset value of 0x7b9f6000
482 07:57:06.956649 smm_load_module: smram_start: 0x7b800000
483 07:57:06.956697 smm_load_module: smram_end: 7ba00000
484 07:57:06.956746 smm_load_module: handler start 0x7b9f6d5f
485 07:57:06.956794 smm_load_module: handler_size 98d0
486 07:57:06.956842 smm_load_module: fxsave_area 0x7b9ff000
487 07:57:06.956890 smm_load_module: fxsave_size 1000
488 07:57:06.956938 smm_load_module: CONFIG_MSEG_SIZE 0x0
489 07:57:06.956989 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
490 07:57:06.957038 smm_load_module: handler_mod_params.smbase = 0x7b800000
491 07:57:06.957086 smm_load_module: per_cpu_save_state_size = 0x400
492 07:57:06.957135 smm_load_module: num_cpus = 0x8
493 07:57:06.957183 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
494 07:57:06.957231 smm_load_module: total_save_state_size = 0x2000
495 07:57:06.957280 smm_load_module: cpu0 entry: 7b9e6000
496 07:57:06.957328 smm_create_map: cpus allowed in one segment 30
497 07:57:06.957376 smm_create_map: min # of segments needed 1
498 07:57:06.957425 CPU 0x0
499 07:57:06.957474 smbase 7b9e6000 entry 7b9ee000
500 07:57:06.957522 ss_start 7b9f5c00 code_end 7b9ee208
501 07:57:06.957571 CPU 0x1
502 07:57:06.957619 smbase 7b9e5c00 entry 7b9edc00
503 07:57:06.957668 ss_start 7b9f5800 code_end 7b9ede08
504 07:57:06.957717 CPU 0x2
505 07:57:06.957766 smbase 7b9e5800 entry 7b9ed800
506 07:57:06.957815 ss_start 7b9f5400 code_end 7b9eda08
507 07:57:06.957862 CPU 0x3
508 07:57:06.957910 smbase 7b9e5400 entry 7b9ed400
509 07:57:06.957959 ss_start 7b9f5000 code_end 7b9ed608
510 07:57:06.958008 CPU 0x4
511 07:57:06.958060 smbase 7b9e5000 entry 7b9ed000
512 07:57:06.958109 ss_start 7b9f4c00 code_end 7b9ed208
513 07:57:06.958158 CPU 0x5
514 07:57:06.958216 smbase 7b9e4c00 entry 7b9ecc00
515 07:57:06.958266 ss_start 7b9f4800 code_end 7b9ece08
516 07:57:06.958315 CPU 0x6
517 07:57:06.958366 smbase 7b9e4800 entry 7b9ec800
518 07:57:06.958415 ss_start 7b9f4400 code_end 7b9eca08
519 07:57:06.958464 CPU 0x7
520 07:57:06.958513 smbase 7b9e4400 entry 7b9ec400
521 07:57:06.958562 ss_start 7b9f4000 code_end 7b9ec608
522 07:57:06.958613 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
523 07:57:06.958662 Processing 11 relocs. Offset value of 0x7b9ee000
524 07:57:06.958713 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
525 07:57:06.958762 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
526 07:57:06.958812 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
527 07:57:06.958862 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
528 07:57:06.958912 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
529 07:57:06.958961 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
530 07:57:06.959011 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
531 07:57:06.959060 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
532 07:57:06.959109 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
533 07:57:06.959158 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
534 07:57:06.959214 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
535 07:57:06.959265 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
536 07:57:06.959315 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
537 07:57:06.959365 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
538 07:57:06.959415 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
539 07:57:06.959464 smm_module_setup_stub: stack_top = 0x7b804000
540 07:57:06.959515 smm_module_setup_stub: per cpu stack_size = 0x800
541 07:57:06.959565 smm_module_setup_stub: runtime.start32_offset = 0x4c
542 07:57:06.959614 smm_module_setup_stub: runtime.smm_size = 0x200000
543 07:57:06.959664 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
544 07:57:06.959714 Clearing SMI status registers
545 07:57:06.959764 SMI_STS: PM1
546 07:57:06.959813 PM1_STS: PWRBTN
547 07:57:06.959862 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
548 07:57:06.959912 In relocation handler: CPU 0
549 07:57:06.959961 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
550 07:57:06.960011 Writing SMRR. base = 0x7b800006, mask=0xff800c00
551 07:57:06.960059 Relocation complete.
552 07:57:06.960109 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
553 07:57:06.960159 In relocation handler: CPU 5
554 07:57:06.960208 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
555 07:57:06.960258 Relocation complete.
556 07:57:06.960502 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
557 07:57:06.960552 In relocation handler: CPU 3
558 07:57:06.960604 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
559 07:57:06.960654 Writing SMRR. base = 0x7b800006, mask=0xff800c00
560 07:57:06.960705 Relocation complete.
561 07:57:06.960754 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
562 07:57:06.960804 In relocation handler: CPU 4
563 07:57:06.960855 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
564 07:57:06.960905 Writing SMRR. base = 0x7b800006, mask=0xff800c00
565 07:57:06.960955 Relocation complete.
566 07:57:06.961004 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
567 07:57:06.961054 In relocation handler: CPU 1
568 07:57:06.961103 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
569 07:57:06.961153 Writing SMRR. base = 0x7b800006, mask=0xff800c00
570 07:57:06.961202 Relocation complete.
571 07:57:06.961251 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
572 07:57:06.961302 In relocation handler: CPU 2
573 07:57:06.961351 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
574 07:57:06.961401 Writing SMRR. base = 0x7b800006, mask=0xff800c00
575 07:57:06.961451 Relocation complete.
576 07:57:06.961499 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
577 07:57:06.961549 In relocation handler: CPU 6
578 07:57:06.961599 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
579 07:57:06.961648 Relocation complete.
580 07:57:06.961697 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
581 07:57:06.961746 In relocation handler: CPU 7
582 07:57:06.961795 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
583 07:57:06.961844 Writing SMRR. base = 0x7b800006, mask=0xff800c00
584 07:57:06.961893 Relocation complete.
585 07:57:06.961942 Initializing CPU #0
586 07:57:06.961991 CPU: vendor Intel device 906a4
587 07:57:06.962039 CPU: family 06, model 9a, stepping 04
588 07:57:06.962088 Clearing out pending MCEs
589 07:57:06.962137 cpu: energy policy set to 7
590 07:57:06.962187 Turbo is available but hidden
591 07:57:06.962236 Turbo is available and visible
592 07:57:06.962285 microcode: Update skipped, already up-to-date
593 07:57:06.962334 CPU #0 initialized
594 07:57:06.962383 Initializing CPU #5
595 07:57:06.962432 Initializing CPU #4
596 07:57:06.962481 Initializing CPU #2
597 07:57:06.962530 Initializing CPU #1
598 07:57:06.962579 CPU: vendor Intel device 906a4
599 07:57:06.962629 CPU: family 06, model 9a, stepping 04
600 07:57:06.962678 Initializing CPU #3
601 07:57:06.962727 CPU: vendor Intel device 906a4
602 07:57:06.962777 CPU: family 06, model 9a, stepping 04
603 07:57:06.962825 CPU: vendor Intel device 906a4
604 07:57:06.962874 CPU: family 06, model 9a, stepping 04
605 07:57:06.962924 Clearing out pending MCEs
606 07:57:06.962973 Clearing out pending MCEs
607 07:57:06.963022 CPU: vendor Intel device 906a4
608 07:57:06.963071 CPU: family 06, model 9a, stepping 04
609 07:57:06.963120 cpu: energy policy set to 7
610 07:57:06.963170 cpu: energy policy set to 7
611 07:57:06.963227 Clearing out pending MCEs
612 07:57:06.963276 microcode: Update skipped, already up-to-date
613 07:57:06.963326 CPU #2 initialized
614 07:57:06.963375 cpu: energy policy set to 7
615 07:57:06.963425 Clearing out pending MCEs
616 07:57:06.963474 Initializing CPU #7
617 07:57:06.963523 microcode: Update skipped, already up-to-date
618 07:57:06.963572 CPU #3 initialized
619 07:57:06.963621 microcode: Update skipped, already up-to-date
620 07:57:06.963670 CPU #4 initialized
621 07:57:06.963719 cpu: energy policy set to 7
622 07:57:06.963769 CPU: vendor Intel device 906a4
623 07:57:06.963818 CPU: family 06, model 9a, stepping 04
624 07:57:06.963867 microcode: Update skipped, already up-to-date
625 07:57:06.963917 CPU #1 initialized
626 07:57:06.963967 Clearing out pending MCEs
627 07:57:06.964015 Initializing CPU #6
628 07:57:06.964064 cpu: energy policy set to 7
629 07:57:06.964113 CPU: vendor Intel device 906a4
630 07:57:06.964162 CPU: family 06, model 9a, stepping 04
631 07:57:06.964212 microcode: Update skipped, already up-to-date
632 07:57:06.964261 CPU #7 initialized
633 07:57:06.964310 Clearing out pending MCEs
634 07:57:06.964359 CPU: vendor Intel device 906a4
635 07:57:06.964409 CPU: family 06, model 9a, stepping 04
636 07:57:06.964459 cpu: energy policy set to 7
637 07:57:06.964509 Clearing out pending MCEs
638 07:57:06.964558 microcode: Update skipped, already up-to-date
639 07:57:06.964608 CPU #6 initialized
640 07:57:06.964657 cpu: energy policy set to 7
641 07:57:06.964707 microcode: Update skipped, already up-to-date
642 07:57:06.964759 CPU #5 initialized
643 07:57:06.964809 bsp_do_flight_plan done after 696 msecs.
644 07:57:06.964859 CPU: frequency set to 4400 MHz
645 07:57:06.964908 Enabling SMIs.
646 07:57:06.964957 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
647 07:57:06.965007 Probing TPM I2C: done! DID_VID 0x00281ae0
648 07:57:06.965057 Locality already claimed
649 07:57:06.965105 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
650 07:57:06.965157 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
651 07:57:06.965206 Enabling GPIO PM b/c CR50 has long IRQ pulse support
652 07:57:06.965256 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
653 07:57:06.965305 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
654 07:57:06.965355 Found a VBT of 9216 bytes after decompression
655 07:57:06.965404 PCI 1.0, PIN A, using IRQ #16
656 07:57:06.965453 PCI 2.0, PIN A, using IRQ #17
657 07:57:06.965502 PCI 4.0, PIN A, using IRQ #18
658 07:57:06.965551 PCI 5.0, PIN A, using IRQ #16
659 07:57:06.965600 PCI 6.0, PIN A, using IRQ #16
660 07:57:06.965649 PCI 6.2, PIN C, using IRQ #18
661 07:57:06.965698 PCI 7.0, PIN A, using IRQ #19
662 07:57:06.965747 PCI 7.1, PIN B, using IRQ #20
663 07:57:06.965796 PCI 7.2, PIN C, using IRQ #21
664 07:57:06.965845 PCI 7.3, PIN D, using IRQ #22
665 07:57:06.965894 PCI 8.0, PIN A, using IRQ #23
666 07:57:06.965943 PCI D.0, PIN A, using IRQ #17
667 07:57:06.965992 PCI D.1, PIN B, using IRQ #19
668 07:57:06.966041 PCI 10.0, PIN A, using IRQ #24
669 07:57:06.966090 PCI 10.1, PIN B, using IRQ #25
670 07:57:06.966138 PCI 10.6, PIN C, using IRQ #20
671 07:57:06.966188 PCI 10.7, PIN D, using IRQ #21
672 07:57:06.966420 PCI 11.0, PIN A, using IRQ #26
673 07:57:06.966469 PCI 11.1, PIN B, using IRQ #27
674 07:57:06.966522 PCI 11.2, PIN C, using IRQ #28
675 07:57:06.966572 PCI 11.3, PIN D, using IRQ #29
676 07:57:06.966621 PCI 12.0, PIN A, using IRQ #30
677 07:57:06.966671 PCI 12.6, PIN B, using IRQ #31
678 07:57:06.966720 PCI 12.7, PIN C, using IRQ #22
679 07:57:06.966770 PCI 13.0, PIN A, using IRQ #32
680 07:57:06.966819 PCI 13.1, PIN B, using IRQ #33
681 07:57:06.966869 PCI 13.2, PIN C, using IRQ #34
682 07:57:06.966921 PCI 13.3, PIN D, using IRQ #35
683 07:57:06.966972 PCI 14.0, PIN B, using IRQ #23
684 07:57:06.967021 PCI 14.1, PIN A, using IRQ #36
685 07:57:06.967071 PCI 14.3, PIN C, using IRQ #17
686 07:57:06.967124 PCI 15.0, PIN A, using IRQ #37
687 07:57:06.967176 PCI 15.1, PIN B, using IRQ #38
688 07:57:06.967230 PCI 15.2, PIN C, using IRQ #39
689 07:57:06.967280 PCI 15.3, PIN D, using IRQ #40
690 07:57:06.967330 PCI 16.0, PIN A, using IRQ #18
691 07:57:06.967380 PCI 16.1, PIN B, using IRQ #19
692 07:57:06.967430 PCI 16.2, PIN C, using IRQ #20
693 07:57:06.967480 PCI 16.3, PIN D, using IRQ #21
694 07:57:06.967530 PCI 16.4, PIN A, using IRQ #18
695 07:57:06.967579 PCI 16.5, PIN B, using IRQ #19
696 07:57:06.967628 PCI 17.0, PIN A, using IRQ #22
697 07:57:06.967678 PCI 19.0, PIN A, using IRQ #41
698 07:57:06.967727 PCI 19.1, PIN B, using IRQ #42
699 07:57:06.967776 PCI 19.2, PIN C, using IRQ #43
700 07:57:06.967826 PCI 1C.0, PIN A, using IRQ #16
701 07:57:06.967875 PCI 1C.1, PIN B, using IRQ #17
702 07:57:06.967924 PCI 1C.2, PIN C, using IRQ #18
703 07:57:06.967972 PCI 1C.3, PIN D, using IRQ #19
704 07:57:06.968021 PCI 1C.4, PIN A, using IRQ #16
705 07:57:06.968071 PCI 1C.5, PIN B, using IRQ #17
706 07:57:06.968121 PCI 1C.6, PIN C, using IRQ #18
707 07:57:06.968172 PCI 1C.7, PIN D, using IRQ #19
708 07:57:06.968222 PCI 1D.0, PIN A, using IRQ #16
709 07:57:06.968271 PCI 1D.1, PIN B, using IRQ #17
710 07:57:06.968320 PCI 1D.2, PIN C, using IRQ #18
711 07:57:06.968369 PCI 1D.3, PIN D, using IRQ #19
712 07:57:06.968419 PCI 1E.0, PIN A, using IRQ #23
713 07:57:06.968469 PCI 1E.1, PIN B, using IRQ #20
714 07:57:06.968518 PCI 1E.2, PIN C, using IRQ #44
715 07:57:06.968568 PCI 1E.3, PIN D, using IRQ #45
716 07:57:06.968617 PCI 1F.3, PIN B, using IRQ #22
717 07:57:06.968666 PCI 1F.4, PIN C, using IRQ #23
718 07:57:06.968716 PCI 1F.6, PIN D, using IRQ #20
719 07:57:06.968765 PCI 1F.7, PIN A, using IRQ #21
720 07:57:06.968814 IRQ: Using dynamically assigned PCI IO-APIC IRQs
721 07:57:06.968865 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
722 07:57:06.968914 FSPS returned 0
723 07:57:06.968963 Executing Phase 1 of FspMultiPhaseSiInit
724 07:57:06.969013 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
725 07:57:06.969066 port C0 DISC req: usage 1 usb3 1 usb2 1
726 07:57:06.969117 Raw Buffer output 0 00000111
727 07:57:06.969166 Raw Buffer output 1 00000000
728 07:57:06.969215 pmc_send_ipc_cmd succeeded
729 07:57:06.969265 port C1 DISC req: usage 1 usb3 3 usb2 3
730 07:57:06.969314 Raw Buffer output 0 00000331
731 07:57:06.969363 Raw Buffer output 1 00000000
732 07:57:06.969412 pmc_send_ipc_cmd succeeded
733 07:57:06.969480 Detected 6 core, 8 thread CPU.
734 07:57:06.969542 Detected 6 core, 8 thread CPU.
735 07:57:06.969605 Detected 6 core, 8 thread CPU.
736 07:57:06.969656 Detected 6 core, 8 thread CPU.
737 07:57:06.969706 Detected 6 core, 8 thread CPU.
738 07:57:06.969757 Detected 6 core, 8 thread CPU.
739 07:57:06.969805 Detected 6 core, 8 thread CPU.
740 07:57:06.969854 Detected 6 core, 8 thread CPU.
741 07:57:06.969902 Detected 6 core, 8 thread CPU.
742 07:57:06.969951 Detected 6 core, 8 thread CPU.
743 07:57:06.970001 Detected 6 core, 8 thread CPU.
744 07:57:06.970057 Detected 6 core, 8 thread CPU.
745 07:57:06.970119 Detected 6 core, 8 thread CPU.
746 07:57:06.970169 Detected 6 core, 8 thread CPU.
747 07:57:06.970219 Detected 6 core, 8 thread CPU.
748 07:57:06.970268 Detected 6 core, 8 thread CPU.
749 07:57:06.970317 Detected 6 core, 8 thread CPU.
750 07:57:06.970366 Detected 6 core, 8 thread CPU.
751 07:57:06.970416 Detected 6 core, 8 thread CPU.
752 07:57:06.970465 Detected 6 core, 8 thread CPU.
753 07:57:06.970515 Detected 6 core, 8 thread CPU.
754 07:57:06.970564 Detected 6 core, 8 thread CPU.
755 07:57:06.970614 Detected 6 core, 8 thread CPU.
756 07:57:06.970663 Detected 6 core, 8 thread CPU.
757 07:57:06.970712 Detected 6 core, 8 thread CPU.
758 07:57:06.970762 Detected 6 core, 8 thread CPU.
759 07:57:06.970811 Detected 6 core, 8 thread CPU.
760 07:57:06.970861 Detected 6 core, 8 thread CPU.
761 07:57:06.970911 Detected 6 core, 8 thread CPU.
762 07:57:06.970961 Detected 6 core, 8 thread CPU.
763 07:57:06.971009 Detected 6 core, 8 thread CPU.
764 07:57:06.971060 Detected 6 core, 8 thread CPU.
765 07:57:06.971110 Detected 6 core, 8 thread CPU.
766 07:57:06.971158 Detected 6 core, 8 thread CPU.
767 07:57:06.971217 Detected 6 core, 8 thread CPU.
768 07:57:06.971268 Detected 6 core, 8 thread CPU.
769 07:57:06.971323 Detected 6 core, 8 thread CPU.
770 07:57:06.971373 Detected 6 core, 8 thread CPU.
771 07:57:06.971422 Detected 6 core, 8 thread CPU.
772 07:57:06.971470 Detected 6 core, 8 thread CPU.
773 07:57:06.971518 Detected 6 core, 8 thread CPU.
774 07:57:06.971566 Detected 6 core, 8 thread CPU.
775 07:57:06.971614 Display FSP Version Info HOB
776 07:57:06.971663 Reference Code - CPU = c.0.65.70
777 07:57:06.971711 uCode Version = 0.0.4.23
778 07:57:06.971760 TXT ACM version = ff.ff.ff.ffff
779 07:57:06.971809 Reference Code - ME = c.0.65.70
780 07:57:06.971866 MEBx version = 0.0.0.0
781 07:57:06.971935 ME Firmware Version = Consumer SKU
782 07:57:06.971993 Reference Code - PCH = c.0.65.70
783 07:57:06.972059 PCH-CRID Status = Disabled
784 07:57:06.972108 PCH-CRID Original Value = ff.ff.ff.ffff
785 07:57:06.972157 PCH-CRID New Value = ff.ff.ff.ffff
786 07:57:06.972208 OPROM - RST - RAID = ff.ff.ff.ffff
787 07:57:06.972258 PCH Hsio Version = 4.0.0.0
788 07:57:06.972308 Reference Code - SA - System Agent = c.0.65.70
789 07:57:06.972357 Reference Code - MRC = 0.0.3.80
790 07:57:06.972406 SA - PCIe Version = c.0.65.70
791 07:57:06.972456 SA-CRID Status = Disabled
792 07:57:06.972506 SA-CRID Original Value = 0.0.0.4
793 07:57:06.972556 SA-CRID New Value = 0.0.0.4
794 07:57:06.972605 OPROM - VBIOS = ff.ff.ff.ffff
795 07:57:06.972840 IO Manageability Engine FW Version = 24.0.4.0
796 07:57:06.972890 PHY Build Version = 0.0.0.2016
797 07:57:06.972943 Thunderbolt(TM) FW Version = 0.0.0.0
798 07:57:06.972994 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
799 07:57:06.973044 BS: BS_DEV_INIT_CHIPS run times (exec / console): 473 / 507 ms
800 07:57:06.973093 Enumerating buses...
801 07:57:06.973142 Show all devs... Before device enumeration.
802 07:57:06.973191 Root Device: enabled 1
803 07:57:06.973241 CPU_CLUSTER: 0: enabled 1
804 07:57:06.973290 DOMAIN: 0000: enabled 1
805 07:57:06.973339 GPIO: 0: enabled 1
806 07:57:06.973388 PCI: 00:00.0: enabled 1
807 07:57:06.973438 PCI: 00:01.0: enabled 0
808 07:57:06.973487 PCI: 00:01.1: enabled 0
809 07:57:06.973535 PCI: 00:02.0: enabled 1
810 07:57:06.973584 PCI: 00:04.0: enabled 1
811 07:57:06.973633 PCI: 00:05.0: enabled 0
812 07:57:06.973683 PCI: 00:06.0: enabled 1
813 07:57:06.973731 PCI: 00:06.2: enabled 0
814 07:57:06.973781 PCI: 00:07.0: enabled 0
815 07:57:06.973831 PCI: 00:07.1: enabled 0
816 07:57:06.973880 PCI: 00:07.2: enabled 0
817 07:57:06.973929 PCI: 00:07.3: enabled 0
818 07:57:06.973980 PCI: 00:08.0: enabled 0
819 07:57:06.974030 PCI: 00:09.0: enabled 0
820 07:57:06.974079 PCI: 00:0a.0: enabled 1
821 07:57:06.974128 PCI: 00:0d.0: enabled 1
822 07:57:06.974177 PCI: 00:0d.1: enabled 0
823 07:57:06.974226 PCI: 00:0d.2: enabled 0
824 07:57:06.974275 PCI: 00:0d.3: enabled 0
825 07:57:06.974325 PCI: 00:0e.0: enabled 0
826 07:57:06.974374 PCI: 00:10.0: enabled 0
827 07:57:06.974423 PCI: 00:10.1: enabled 0
828 07:57:06.974471 PCI: 00:10.6: enabled 0
829 07:57:06.974520 PCI: 00:10.7: enabled 0
830 07:57:06.974569 PCI: 00:12.0: enabled 0
831 07:57:06.974619 PCI: 00:12.6: enabled 0
832 07:57:06.974667 PCI: 00:12.7: enabled 0
833 07:57:06.974717 PCI: 00:13.0: enabled 0
834 07:57:06.974766 PCI: 00:14.0: enabled 1
835 07:57:06.974814 PCI: 00:14.1: enabled 0
836 07:57:06.974863 PCI: 00:14.2: enabled 1
837 07:57:06.974910 PCI: 00:14.3: enabled 1
838 07:57:06.974958 PCI: 00:15.0: enabled 1
839 07:57:06.975007 PCI: 00:15.1: enabled 1
840 07:57:06.975055 PCI: 00:15.2: enabled 0
841 07:57:06.975104 PCI: 00:15.3: enabled 1
842 07:57:06.975172 PCI: 00:16.0: enabled 1
843 07:57:06.975237 PCI: 00:16.1: enabled 0
844 07:57:06.975288 PCI: 00:16.2: enabled 0
845 07:57:06.975337 PCI: 00:16.3: enabled 0
846 07:57:06.975386 PCI: 00:16.4: enabled 0
847 07:57:06.975448 PCI: 00:16.5: enabled 0
848 07:57:06.975525 PCI: 00:17.0: enabled 1
849 07:57:06.975576 PCI: 00:19.0: enabled 0
850 07:57:06.975625 PCI: 00:19.1: enabled 1
851 07:57:06.975675 PCI: 00:19.2: enabled 0
852 07:57:06.975724 PCI: 00:1a.0: enabled 0
853 07:57:06.975774 PCI: 00:1c.0: enabled 0
854 07:57:06.975825 PCI: 00:1c.1: enabled 0
855 07:57:06.975874 PCI: 00:1c.2: enabled 0
856 07:57:06.975923 PCI: 00:1c.3: enabled 0
857 07:57:06.975972 PCI: 00:1c.4: enabled 0
858 07:57:06.976022 PCI: 00:1c.5: enabled 0
859 07:57:06.976071 PCI: 00:1c.6: enabled 0
860 07:57:06.976120 PCI: 00:1c.7: enabled 0
861 07:57:06.976169 PCI: 00:1d.0: enabled 0
862 07:57:06.976218 PCI: 00:1d.1: enabled 0
863 07:57:06.976269 PCI: 00:1d.2: enabled 0
864 07:57:06.976318 PCI: 00:1d.3: enabled 0
865 07:57:06.976368 PCI: 00:1e.0: enabled 1
866 07:57:06.976417 PCI: 00:1e.1: enabled 0
867 07:57:06.976466 PCI: 00:1e.2: enabled 0
868 07:57:06.976517 PCI: 00:1e.3: enabled 1
869 07:57:06.976571 PCI: 00:1f.0: enabled 1
870 07:57:06.976622 PCI: 00:1f.1: enabled 0
871 07:57:06.976673 PCI: 00:1f.2: enabled 1
872 07:57:06.976724 PCI: 00:1f.3: enabled 1
873 07:57:06.976774 PCI: 00:1f.4: enabled 0
874 07:57:06.976828 PCI: 00:1f.5: enabled 1
875 07:57:06.976881 PCI: 00:1f.6: enabled 0
876 07:57:06.976931 PCI: 00:1f.7: enabled 0
877 07:57:06.976981 GENERIC: 0.0: enabled 1
878 07:57:06.977031 GENERIC: 0.0: enabled 1
879 07:57:06.977084 GENERIC: 1.0: enabled 1
880 07:57:06.977136 GENERIC: 0.0: enabled 1
881 07:57:06.977188 GENERIC: 1.0: enabled 1
882 07:57:06.977239 USB0 port 0: enabled 1
883 07:57:06.977288 USB0 port 0: enabled 1
884 07:57:06.977338 GENERIC: 0.0: enabled 1
885 07:57:06.977391 I2C: 00:1a: enabled 1
886 07:57:06.977441 I2C: 00:31: enabled 1
887 07:57:06.977498 I2C: 00:32: enabled 1
888 07:57:06.977559 I2C: 00:50: enabled 1
889 07:57:06.977612 I2C: 00:10: enabled 1
890 07:57:06.977662 I2C: 00:15: enabled 1
891 07:57:06.977712 I2C: 00:2c: enabled 1
892 07:57:06.977761 GENERIC: 0.0: enabled 1
893 07:57:06.977811 SPI: 00: enabled 1
894 07:57:06.977861 PNP: 0c09.0: enabled 1
895 07:57:06.977910 GENERIC: 0.0: enabled 1
896 07:57:06.977960 USB3 port 0: enabled 1
897 07:57:06.978009 USB3 port 1: enabled 0
898 07:57:06.978058 USB3 port 2: enabled 1
899 07:57:06.978106 USB3 port 3: enabled 0
900 07:57:06.978155 USB2 port 0: enabled 1
901 07:57:06.978205 USB2 port 1: enabled 0
902 07:57:06.978255 USB2 port 2: enabled 1
903 07:57:06.978307 USB2 port 3: enabled 0
904 07:57:06.978357 USB2 port 4: enabled 0
905 07:57:06.978420 USB2 port 5: enabled 1
906 07:57:06.978473 USB2 port 6: enabled 0
907 07:57:06.978523 USB2 port 7: enabled 0
908 07:57:06.978583 USB2 port 8: enabled 1
909 07:57:06.978642 USB2 port 9: enabled 1
910 07:57:06.978693 USB3 port 0: enabled 1
911 07:57:06.978743 USB3 port 1: enabled 0
912 07:57:06.978792 USB3 port 2: enabled 0
913 07:57:06.978841 USB3 port 3: enabled 0
914 07:57:06.978890 GENERIC: 0.0: enabled 1
915 07:57:06.978938 GENERIC: 1.0: enabled 1
916 07:57:06.978995 APIC: 00: enabled 1
917 07:57:06.979057 APIC: 12: enabled 1
918 07:57:06.979109 APIC: 14: enabled 1
919 07:57:06.979158 APIC: 16: enabled 1
920 07:57:06.979214 APIC: 10: enabled 1
921 07:57:06.979270 APIC: 01: enabled 1
922 07:57:06.979319 APIC: 09: enabled 1
923 07:57:06.979367 APIC: 08: enabled 1
924 07:57:06.979415 Compare with tree...
925 07:57:06.979465 Root Device: enabled 1
926 07:57:06.979514 CPU_CLUSTER: 0: enabled 1
927 07:57:06.979563 APIC: 00: enabled 1
928 07:57:06.979612 APIC: 12: enabled 1
929 07:57:06.979669 APIC: 14: enabled 1
930 07:57:06.979724 APIC: 16: enabled 1
931 07:57:06.979775 APIC: 10: enabled 1
932 07:57:06.979823 APIC: 01: enabled 1
933 07:57:06.979872 APIC: 09: enabled 1
934 07:57:06.979919 APIC: 08: enabled 1
935 07:57:06.979968 DOMAIN: 0000: enabled 1
936 07:57:06.980017 GPIO: 0: enabled 1
937 07:57:06.980065 PCI: 00:00.0: enabled 1
938 07:57:06.980114 PCI: 00:01.0: enabled 0
939 07:57:06.980162 PCI: 00:01.1: enabled 0
940 07:57:06.980210 PCI: 00:02.0: enabled 1
941 07:57:06.980258 PCI: 00:04.0: enabled 1
942 07:57:06.980306 GENERIC: 0.0: enabled 1
943 07:57:06.980354 PCI: 00:05.0: enabled 0
944 07:57:06.980403 PCI: 00:06.0: enabled 1
945 07:57:06.980451 PCI: 00:06.2: enabled 0
946 07:57:06.980500 PCI: 00:08.0: enabled 0
947 07:57:06.980548 PCI: 00:09.0: enabled 0
948 07:57:06.980597 PCI: 00:0a.0: enabled 1
949 07:57:06.980645 PCI: 00:0d.0: enabled 1
950 07:57:06.980693 USB0 port 0: enabled 1
951 07:57:06.980741 USB3 port 0: enabled 1
952 07:57:06.980790 USB3 port 1: enabled 0
953 07:57:06.980838 USB3 port 2: enabled 1
954 07:57:06.980887 USB3 port 3: enabled 0
955 07:57:06.980935 PCI: 00:0d.1: enabled 0
956 07:57:06.981180 PCI: 00:0d.2: enabled 0
957 07:57:06.981244 PCI: 00:0d.3: enabled 0
958 07:57:06.981298 PCI: 00:0e.0: enabled 0
959 07:57:06.981350 PCI: 00:10.0: enabled 0
960 07:57:06.981402 PCI: 00:10.1: enabled 0
961 07:57:06.981452 PCI: 00:10.6: enabled 0
962 07:57:06.981501 PCI: 00:10.7: enabled 0
963 07:57:06.981550 PCI: 00:12.0: enabled 0
964 07:57:06.981599 PCI: 00:12.6: enabled 0
965 07:57:06.981649 PCI: 00:12.7: enabled 0
966 07:57:06.981698 PCI: 00:13.0: enabled 0
967 07:57:06.981748 PCI: 00:14.0: enabled 1
968 07:57:06.981798 USB0 port 0: enabled 1
969 07:57:06.981848 USB2 port 0: enabled 1
970 07:57:06.981903 USB2 port 1: enabled 0
971 07:57:06.981951 USB2 port 2: enabled 1
972 07:57:06.982000 USB2 port 3: enabled 0
973 07:57:06.982048 USB2 port 4: enabled 0
974 07:57:06.982098 USB2 port 5: enabled 1
975 07:57:06.982146 USB2 port 6: enabled 0
976 07:57:06.982194 USB2 port 7: enabled 0
977 07:57:06.982243 USB2 port 8: enabled 1
978 07:57:06.982292 USB2 port 9: enabled 1
979 07:57:06.982340 USB3 port 0: enabled 1
980 07:57:06.982389 USB3 port 1: enabled 0
981 07:57:06.982437 USB3 port 2: enabled 0
982 07:57:06.982486 USB3 port 3: enabled 0
983 07:57:06.982534 PCI: 00:14.1: enabled 0
984 07:57:06.982582 PCI: 00:14.2: enabled 1
985 07:57:06.982630 PCI: 00:14.3: enabled 1
986 07:57:06.982677 GENERIC: 0.0: enabled 1
987 07:57:06.982726 PCI: 00:15.0: enabled 1
988 07:57:06.982776 I2C: 00:1a: enabled 1
989 07:57:06.982824 I2C: 00:31: enabled 1
990 07:57:06.982882 I2C: 00:32: enabled 1
991 07:57:06.982931 PCI: 00:15.1: enabled 1
992 07:57:06.982980 I2C: 00:50: enabled 1
993 07:57:06.983029 PCI: 00:15.2: enabled 0
994 07:57:06.983078 PCI: 00:15.3: enabled 1
995 07:57:06.983127 I2C: 00:10: enabled 1
996 07:57:06.983182 PCI: 00:16.0: enabled 1
997 07:57:06.983234 PCI: 00:16.1: enabled 0
998 07:57:06.983291 PCI: 00:16.2: enabled 0
999 07:57:06.983339 PCI: 00:16.3: enabled 0
1000 07:57:06.983387 PCI: 00:16.4: enabled 0
1001 07:57:06.983436 PCI: 00:16.5: enabled 0
1002 07:57:06.983484 PCI: 00:17.0: enabled 1
1003 07:57:06.983532 PCI: 00:19.0: enabled 0
1004 07:57:06.983580 PCI: 00:19.1: enabled 1
1005 07:57:06.983629 I2C: 00:15: enabled 1
1006 07:57:06.983677 I2C: 00:2c: enabled 1
1007 07:57:06.983726 PCI: 00:19.2: enabled 0
1008 07:57:06.983777 PCI: 00:1a.0: enabled 0
1009 07:57:06.983826 PCI: 00:1e.0: enabled 1
1010 07:57:06.983875 PCI: 00:1e.1: enabled 0
1011 07:57:06.983924 PCI: 00:1e.2: enabled 0
1012 07:57:06.983973 PCI: 00:1e.3: enabled 1
1013 07:57:06.984021 SPI: 00: enabled 1
1014 07:57:06.984070 PCI: 00:1f.0: enabled 1
1015 07:57:06.984118 PNP: 0c09.0: enabled 1
1016 07:57:06.984169 PCI: 00:1f.1: enabled 0
1017 07:57:06.984217 PCI: 00:1f.2: enabled 1
1018 07:57:06.984267 GENERIC: 0.0: enabled 1
1019 07:57:06.984315 GENERIC: 0.0: enabled 1
1020 07:57:06.984363 GENERIC: 1.0: enabled 1
1021 07:57:06.984412 PCI: 00:1f.3: enabled 1
1022 07:57:06.984462 PCI: 00:1f.4: enabled 0
1023 07:57:06.984511 PCI: 00:1f.5: enabled 1
1024 07:57:06.984560 PCI: 00:1f.6: enabled 0
1025 07:57:06.984608 PCI: 00:1f.7: enabled 0
1026 07:57:06.984656 Root Device scanning...
1027 07:57:06.984706 scan_static_bus for Root Device
1028 07:57:06.984754 CPU_CLUSTER: 0 enabled
1029 07:57:06.984803 DOMAIN: 0000 enabled
1030 07:57:06.984852 DOMAIN: 0000 scanning...
1031 07:57:06.984901 PCI: pci_scan_bus for bus 00
1032 07:57:06.984949 PCI: 00:00.0 [8086/0000] ops
1033 07:57:06.984999 PCI: 00:00.0 [8086/4609] enabled
1034 07:57:06.985047 PCI: 00:02.0 [8086/0000] bus ops
1035 07:57:06.985096 PCI: 00:02.0 [8086/46b3] enabled
1036 07:57:06.985145 PCI: 00:04.0 [8086/0000] bus ops
1037 07:57:06.985194 PCI: 00:04.0 [8086/461d] enabled
1038 07:57:06.985242 PCI: 00:06.0 [8086/0000] bus ops
1039 07:57:06.985291 PCI: 00:06.0 [8086/464d] enabled
1040 07:57:06.985339 PCI: 00:08.0 [8086/464f] disabled
1041 07:57:06.985388 PCI: 00:0a.0 [8086/467d] enabled
1042 07:57:06.985437 PCI: 00:0d.0 [8086/0000] bus ops
1043 07:57:06.985485 PCI: 00:0d.0 [8086/461e] enabled
1044 07:57:06.985532 PCI: 00:14.0 [8086/0000] bus ops
1045 07:57:06.985580 PCI: 00:14.0 [8086/51ed] enabled
1046 07:57:06.985628 PCI: 00:14.2 [8086/51ef] enabled
1047 07:57:06.985677 PCI: 00:14.3 [8086/0000] bus ops
1048 07:57:06.985725 PCI: 00:14.3 [8086/51f0] enabled
1049 07:57:06.985773 PCI: 00:15.0 [8086/0000] bus ops
1050 07:57:06.985823 PCI: 00:15.0 [8086/51e8] enabled
1051 07:57:06.985871 PCI: 00:15.1 [8086/0000] bus ops
1052 07:57:06.985920 PCI: 00:15.1 [8086/51e9] enabled
1053 07:57:06.985968 PCI: 00:15.2 [8086/0000] bus ops
1054 07:57:06.986020 PCI: 00:15.2 [8086/51ea] disabled
1055 07:57:06.986078 PCI: 00:15.3 [8086/0000] bus ops
1056 07:57:06.986131 PCI: 00:15.3 [8086/51eb] enabled
1057 07:57:06.986183 PCI: 00:16.0 [8086/0000] ops
1058 07:57:06.986223 PCI: 00:16.0 [8086/51e0] enabled
1059 07:57:06.986265 PCI: Static device PCI: 00:17.0 not found, disabling it.
1060 07:57:06.986304 PCI: 00:19.0 [8086/0000] bus ops
1061 07:57:06.986343 PCI: 00:19.0 [8086/51c5] disabled
1062 07:57:06.986396 PCI: 00:19.1 [8086/0000] bus ops
1063 07:57:06.986454 PCI: 00:19.1 [8086/51c6] enabled
1064 07:57:06.986505 PCI: 00:1e.0 [8086/0000] ops
1065 07:57:06.986554 PCI: 00:1e.0 [8086/51a8] enabled
1066 07:57:06.986604 PCI: 00:1e.3 [8086/0000] bus ops
1067 07:57:06.986654 PCI: 00:1e.3 [8086/51ab] enabled
1068 07:57:06.986703 PCI: 00:1f.0 [8086/0000] bus ops
1069 07:57:06.986752 PCI: 00:1f.0 [8086/5182] enabled
1070 07:57:06.986803 RTC Init
1071 07:57:06.986853 Set power on after power failure.
1072 07:57:06.986903 Disabling Deep S3
1073 07:57:06.986952 Disabling Deep S3
1074 07:57:06.987001 Disabling Deep S4
1075 07:57:06.987050 Disabling Deep S4
1076 07:57:06.987098 Disabling Deep S5
1077 07:57:06.987147 Disabling Deep S5
1078 07:57:06.987207 PCI: 00:1f.2 [0000/0000] hidden
1079 07:57:06.987263 PCI: 00:1f.3 [8086/0000] bus ops
1080 07:57:06.987311 PCI: 00:1f.3 [8086/51c8] enabled
1081 07:57:06.987360 PCI: 00:1f.5 [8086/0000] bus ops
1082 07:57:06.987408 PCI: 00:1f.5 [8086/51a4] enabled
1083 07:57:06.987455 GPIO: 0 enabled
1084 07:57:06.987503 PCI: Leftover static devices:
1085 07:57:06.987552 PCI: 00:01.0
1086 07:57:06.987600 PCI: 00:01.1
1087 07:57:06.987648 PCI: 00:05.0
1088 07:57:06.987697 PCI: 00:06.2
1089 07:57:06.987745 PCI: 00:09.0
1090 07:57:06.987793 PCI: 00:0d.1
1091 07:57:06.987841 PCI: 00:0d.2
1092 07:57:06.987891 PCI: 00:0d.3
1093 07:57:06.987941 PCI: 00:0e.0
1094 07:57:06.987989 PCI: 00:10.0
1095 07:57:06.988037 PCI: 00:10.1
1096 07:57:06.988086 PCI: 00:10.6
1097 07:57:06.988134 PCI: 00:10.7
1098 07:57:06.988182 PCI: 00:12.0
1099 07:57:06.988230 PCI: 00:12.6
1100 07:57:06.988278 PCI: 00:12.7
1101 07:57:06.988326 PCI: 00:13.0
1102 07:57:06.988375 PCI: 00:14.1
1103 07:57:06.988423 PCI: 00:16.1
1104 07:57:06.988471 PCI: 00:16.2
1105 07:57:06.988519 PCI: 00:16.3
1106 07:57:06.988566 PCI: 00:16.4
1107 07:57:06.988613 PCI: 00:16.5
1108 07:57:06.988662 PCI: 00:17.0
1109 07:57:06.988710 PCI: 00:19.2
1110 07:57:06.988944 PCI: 00:1a.0
1111 07:57:06.989002 PCI: 00:1e.1
1112 07:57:06.989068 PCI: 00:1e.2
1113 07:57:06.989123 PCI: 00:1f.1
1114 07:57:06.989171 PCI: 00:1f.4
1115 07:57:06.989220 PCI: 00:1f.6
1116 07:57:06.989268 PCI: 00:1f.7
1117 07:57:06.989316 PCI: Check your devicetree.cb.
1118 07:57:06.989365 PCI: 00:02.0 scanning...
1119 07:57:06.989413 scan_generic_bus for PCI: 00:02.0
1120 07:57:06.989464 scan_generic_bus for PCI: 00:02.0 done
1121 07:57:06.989515 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1122 07:57:06.989564 PCI: 00:04.0 scanning...
1123 07:57:06.989613 scan_generic_bus for PCI: 00:04.0
1124 07:57:06.989670 GENERIC: 0.0 enabled
1125 07:57:06.989719 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1126 07:57:06.989772 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1127 07:57:06.989822 PCI: 00:06.0 scanning...
1128 07:57:06.989871 do_pci_scan_bridge for PCI: 00:06.0
1129 07:57:06.989920 PCI: pci_scan_bus for bus 01
1130 07:57:06.989967 PCI: 01:00.0 [15b7/5009] enabled
1131 07:57:06.990015 Enabling Common Clock Configuration
1132 07:57:06.990064 L1 Sub-State supported from root port 6
1133 07:57:06.990113 L1 Sub-State Support = 0x5
1134 07:57:06.990161 CommonModeRestoreTime = 0x6e
1135 07:57:06.990209 Power On Value = 0x5, Power On Scale = 0x2
1136 07:57:06.990258 ASPM: Enabled L1
1137 07:57:06.990306 PCIe: Max_Payload_Size adjusted to 256
1138 07:57:06.990354 PCI: 01:00.0: Enabled LTR
1139 07:57:06.990403 PCI: 01:00.0: Programmed LTR max latencies
1140 07:57:06.990451 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1141 07:57:06.990499 PCI: 00:0d.0 scanning...
1142 07:57:06.990548 scan_static_bus for PCI: 00:0d.0
1143 07:57:06.990597 USB0 port 0 enabled
1144 07:57:06.990644 USB0 port 0 scanning...
1145 07:57:06.990693 scan_static_bus for USB0 port 0
1146 07:57:06.990741 USB3 port 0 enabled
1147 07:57:06.990790 USB3 port 1 disabled
1148 07:57:06.990837 USB3 port 2 enabled
1149 07:57:06.990886 USB3 port 3 disabled
1150 07:57:06.990934 USB3 port 0 scanning...
1151 07:57:06.990982 scan_static_bus for USB3 port 0
1152 07:57:06.991030 scan_static_bus for USB3 port 0 done
1153 07:57:06.991078 scan_bus: bus USB3 port 0 finished in 6 msecs
1154 07:57:06.991126 USB3 port 2 scanning...
1155 07:57:06.991183 scan_static_bus for USB3 port 2
1156 07:57:06.991244 scan_static_bus for USB3 port 2 done
1157 07:57:06.991299 scan_bus: bus USB3 port 2 finished in 6 msecs
1158 07:57:06.991347 scan_static_bus for USB0 port 0 done
1159 07:57:06.991395 scan_bus: bus USB0 port 0 finished in 43 msecs
1160 07:57:06.991444 scan_static_bus for PCI: 00:0d.0 done
1161 07:57:06.991493 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1162 07:57:06.991541 PCI: 00:14.0 scanning...
1163 07:57:06.991591 scan_static_bus for PCI: 00:14.0
1164 07:57:06.991639 USB0 port 0 enabled
1165 07:57:06.991687 USB0 port 0 scanning...
1166 07:57:06.991736 scan_static_bus for USB0 port 0
1167 07:57:06.991784 USB2 port 0 enabled
1168 07:57:06.991832 USB2 port 1 disabled
1169 07:57:06.991880 USB2 port 2 enabled
1170 07:57:06.991929 USB2 port 3 disabled
1171 07:57:06.991977 USB2 port 4 disabled
1172 07:57:06.992024 USB2 port 5 enabled
1173 07:57:06.992073 USB2 port 6 disabled
1174 07:57:06.992120 USB2 port 7 disabled
1175 07:57:06.992169 USB2 port 8 enabled
1176 07:57:06.992217 USB2 port 9 enabled
1177 07:57:06.992266 USB3 port 0 enabled
1178 07:57:06.992314 USB3 port 1 disabled
1179 07:57:06.992363 USB3 port 2 disabled
1180 07:57:06.992412 USB3 port 3 disabled
1181 07:57:06.992460 USB2 port 0 scanning...
1182 07:57:06.992509 scan_static_bus for USB2 port 0
1183 07:57:06.992557 scan_static_bus for USB2 port 0 done
1184 07:57:06.992606 scan_bus: bus USB2 port 0 finished in 6 msecs
1185 07:57:06.992654 USB2 port 2 scanning...
1186 07:57:06.992702 scan_static_bus for USB2 port 2
1187 07:57:06.992751 scan_static_bus for USB2 port 2 done
1188 07:57:06.992799 scan_bus: bus USB2 port 2 finished in 6 msecs
1189 07:57:06.992847 USB2 port 5 scanning...
1190 07:57:06.992897 scan_static_bus for USB2 port 5
1191 07:57:06.992946 scan_static_bus for USB2 port 5 done
1192 07:57:06.992995 scan_bus: bus USB2 port 5 finished in 6 msecs
1193 07:57:06.993052 USB2 port 8 scanning...
1194 07:57:06.993101 scan_static_bus for USB2 port 8
1195 07:57:06.993149 scan_static_bus for USB2 port 8 done
1196 07:57:06.993199 scan_bus: bus USB2 port 8 finished in 6 msecs
1197 07:57:06.993249 USB2 port 9 scanning...
1198 07:57:06.993298 scan_static_bus for USB2 port 9
1199 07:57:06.993348 scan_static_bus for USB2 port 9 done
1200 07:57:06.993398 scan_bus: bus USB2 port 9 finished in 6 msecs
1201 07:57:06.993448 USB3 port 0 scanning...
1202 07:57:06.993502 scan_static_bus for USB3 port 0
1203 07:57:06.993550 scan_static_bus for USB3 port 0 done
1204 07:57:06.993598 scan_bus: bus USB3 port 0 finished in 6 msecs
1205 07:57:06.993647 scan_static_bus for USB0 port 0 done
1206 07:57:06.993696 scan_bus: bus USB0 port 0 finished in 120 msecs
1207 07:57:06.993744 scan_static_bus for PCI: 00:14.0 done
1208 07:57:06.993792 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1209 07:57:06.993841 PCI: 00:14.3 scanning...
1210 07:57:06.993889 scan_static_bus for PCI: 00:14.3
1211 07:57:06.993938 GENERIC: 0.0 enabled
1212 07:57:06.993986 scan_static_bus for PCI: 00:14.3 done
1213 07:57:06.994035 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1214 07:57:06.994083 PCI: 00:15.0 scanning...
1215 07:57:06.994131 scan_static_bus for PCI: 00:15.0
1216 07:57:06.994180 I2C: 00:1a enabled
1217 07:57:06.994228 I2C: 00:31 enabled
1218 07:57:06.994275 I2C: 00:32 enabled
1219 07:57:06.994323 scan_static_bus for PCI: 00:15.0 done
1220 07:57:06.994372 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1221 07:57:06.994421 PCI: 00:15.1 scanning...
1222 07:57:06.994469 scan_static_bus for PCI: 00:15.1
1223 07:57:06.994526 I2C: 00:50 enabled
1224 07:57:06.994577 scan_static_bus for PCI: 00:15.1 done
1225 07:57:06.994626 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1226 07:57:06.994676 PCI: 00:15.3 scanning...
1227 07:57:06.994726 scan_static_bus for PCI: 00:15.3
1228 07:57:06.994775 I2C: 00:10 enabled
1229 07:57:06.994825 scan_static_bus for PCI: 00:15.3 done
1230 07:57:06.994874 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1231 07:57:06.994923 PCI: 00:19.1 scanning...
1232 07:57:06.994973 scan_static_bus for PCI: 00:19.1
1233 07:57:06.995022 I2C: 00:15 enabled
1234 07:57:06.995070 I2C: 00:2c enabled
1235 07:57:06.995119 scan_static_bus for PCI: 00:19.1 done
1236 07:57:06.995168 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1237 07:57:06.995222 PCI: 00:1e.3 scanning...
1238 07:57:06.995290 scan_generic_bus for PCI: 00:1e.3
1239 07:57:06.995338 SPI: 00 enabled
1240 07:57:06.995569 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1241 07:57:06.995623 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1242 07:57:06.995679 PCI: 00:1f.0 scanning...
1243 07:57:06.995729 scan_static_bus for PCI: 00:1f.0
1244 07:57:06.995777 PNP: 0c09.0 enabled
1245 07:57:06.995825 PNP: 0c09.0 scanning...
1246 07:57:06.995873 scan_static_bus for PNP: 0c09.0
1247 07:57:06.995921 scan_static_bus for PNP: 0c09.0 done
1248 07:57:06.995972 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1249 07:57:06.996020 scan_static_bus for PCI: 00:1f.0 done
1250 07:57:06.996069 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1251 07:57:06.996117 PCI: 00:1f.2 scanning...
1252 07:57:06.996165 scan_static_bus for PCI: 00:1f.2
1253 07:57:06.996215 GENERIC: 0.0 enabled
1254 07:57:06.996272 GENERIC: 0.0 scanning...
1255 07:57:06.996320 scan_static_bus for GENERIC: 0.0
1256 07:57:06.996374 GENERIC: 0.0 enabled
1257 07:57:06.996422 GENERIC: 1.0 enabled
1258 07:57:06.996470 scan_static_bus for GENERIC: 0.0 done
1259 07:57:06.996518 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1260 07:57:06.996567 scan_static_bus for PCI: 00:1f.2 done
1261 07:57:06.996617 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1262 07:57:06.996666 PCI: 00:1f.3 scanning...
1263 07:57:06.996714 scan_static_bus for PCI: 00:1f.3
1264 07:57:06.996763 scan_static_bus for PCI: 00:1f.3 done
1265 07:57:06.996811 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1266 07:57:06.996859 PCI: 00:1f.5 scanning...
1267 07:57:06.996908 scan_generic_bus for PCI: 00:1f.5
1268 07:57:06.996956 scan_generic_bus for PCI: 00:1f.5 done
1269 07:57:06.997004 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1270 07:57:06.997053 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1271 07:57:06.997101 scan_static_bus for Root Device done
1272 07:57:06.997164 scan_bus: bus Root Device finished in 729 msecs
1273 07:57:06.997225 done
1274 07:57:06.997287 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1275 07:57:06.997348 Chrome EC: UHEPI supported
1276 07:57:06.997409 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1277 07:57:06.997474 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1278 07:57:06.997531 SPI flash protection: WPSW=0 SRP0=0
1279 07:57:06.997586 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1280 07:57:06.997641 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1281 07:57:06.997696 found VGA at PCI: 00:02.0
1282 07:57:06.997752 Setting up VGA for PCI: 00:02.0
1283 07:57:06.997807 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1284 07:57:06.997861 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1285 07:57:06.997923 Allocating resources...
1286 07:57:06.997979 Reading resources...
1287 07:57:06.998033 Root Device read_resources bus 0 link: 0
1288 07:57:06.998087 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1289 07:57:06.998142 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1290 07:57:06.998195 DOMAIN: 0000 read_resources bus 0 link: 0
1291 07:57:06.998248 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1292 07:57:06.998303 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1293 07:57:06.998357 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1294 07:57:06.998411 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1295 07:57:06.998465 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1296 07:57:06.998520 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1297 07:57:06.998575 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1298 07:57:06.998637 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1299 07:57:06.998697 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1300 07:57:06.998751 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1301 07:57:06.998806 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1302 07:57:06.998861 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1303 07:57:06.998915 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1304 07:57:06.998969 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1305 07:57:06.999024 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1306 07:57:06.999079 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1307 07:57:06.999134 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1308 07:57:06.999194 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1309 07:57:06.999267 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1310 07:57:06.999322 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1311 07:57:06.999375 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1312 07:57:06.999429 PCI: 00:04.0 read_resources bus 1 link: 0
1313 07:57:06.999484 PCI: 00:04.0 read_resources bus 1 link: 0 done
1314 07:57:06.999539 PCI: 00:06.0 read_resources bus 1 link: 0
1315 07:57:06.999594 PCI: 00:06.0 read_resources bus 1 link: 0 done
1316 07:57:06.999648 PCI: 00:0d.0 read_resources bus 0 link: 0
1317 07:57:06.999702 USB0 port 0 read_resources bus 0 link: 0
1318 07:57:06.999755 USB0 port 0 read_resources bus 0 link: 0 done
1319 07:57:06.999809 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1320 07:57:06.999864 PCI: 00:14.0 read_resources bus 0 link: 0
1321 07:57:06.999918 USB0 port 0 read_resources bus 0 link: 0
1322 07:57:06.999971 USB0 port 0 read_resources bus 0 link: 0 done
1323 07:57:07.000025 PCI: 00:14.0 read_resources bus 0 link: 0 done
1324 07:57:07.000079 PCI: 00:14.3 read_resources bus 0 link: 0
1325 07:57:07.000132 PCI: 00:14.3 read_resources bus 0 link: 0 done
1326 07:57:07.000186 PCI: 00:15.0 read_resources bus 0 link: 0
1327 07:57:07.000239 PCI: 00:15.0 read_resources bus 0 link: 0 done
1328 07:57:07.000292 PCI: 00:15.1 read_resources bus 0 link: 0
1329 07:57:07.000540 PCI: 00:15.1 read_resources bus 0 link: 0 done
1330 07:57:07.000606 PCI: 00:15.3 read_resources bus 0 link: 0
1331 07:57:07.000675 PCI: 00:15.3 read_resources bus 0 link: 0 done
1332 07:57:07.000730 PCI: 00:19.1 read_resources bus 0 link: 0
1333 07:57:07.000785 PCI: 00:19.1 read_resources bus 0 link: 0 done
1334 07:57:07.000839 PCI: 00:1e.3 read_resources bus 2 link: 0
1335 07:57:07.000893 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1336 07:57:07.000961 PCI: 00:1f.0 read_resources bus 0 link: 0
1337 07:57:07.001030 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1338 07:57:07.001103 PCI: 00:1f.2 read_resources bus 0 link: 0
1339 07:57:07.001163 GENERIC: 0.0 read_resources bus 0 link: 0
1340 07:57:07.001217 GENERIC: 0.0 read_resources bus 0 link: 0 done
1341 07:57:07.001272 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1342 07:57:07.001326 DOMAIN: 0000 read_resources bus 0 link: 0 done
1343 07:57:07.001380 Root Device read_resources bus 0 link: 0 done
1344 07:57:07.001448 Done reading resources.
1345 07:57:07.001505 Show resources in subtree (Root Device)...After reading.
1346 07:57:07.001560 Root Device child on link 0 CPU_CLUSTER: 0
1347 07:57:07.001616 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 07:57:07.001675 APIC: 00
1349 07:57:07.001729 APIC: 12
1350 07:57:07.001784 APIC: 14
1351 07:57:07.001838 APIC: 16
1352 07:57:07.001892 APIC: 10
1353 07:57:07.001947 APIC: 01
1354 07:57:07.002001 APIC: 09
1355 07:57:07.002055 APIC: 08
1356 07:57:07.002108 DOMAIN: 0000 child on link 0 GPIO: 0
1357 07:57:07.002167 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1358 07:57:07.002224 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1359 07:57:07.002281 GPIO: 0
1360 07:57:07.002335 PCI: 00:00.0
1361 07:57:07.002389 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1362 07:57:07.002445 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1363 07:57:07.002502 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1364 07:57:07.002558 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1365 07:57:07.002614 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1366 07:57:07.002673 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1367 07:57:07.002734 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1368 07:57:07.002791 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1369 07:57:07.002847 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1370 07:57:07.002902 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1371 07:57:07.002959 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1372 07:57:07.003017 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1373 07:57:07.003075 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1374 07:57:07.003132 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1375 07:57:07.003203 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1376 07:57:07.003276 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1377 07:57:07.003332 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1378 07:57:07.003388 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1379 07:57:07.003443 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1380 07:57:07.003504 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1381 07:57:07.003559 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1382 07:57:07.003616 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1383 07:57:07.003675 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1384 07:57:07.003737 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1385 07:57:07.003802 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1386 07:57:07.003866 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1387 07:57:07.003931 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1388 07:57:07.003993 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1389 07:57:07.004054 PCI: 00:02.0
1390 07:57:07.004117 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1391 07:57:07.004369 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1392 07:57:07.004432 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1393 07:57:07.004480 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1394 07:57:07.004519 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1395 07:57:07.004557 GENERIC: 0.0
1396 07:57:07.004594 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1397 07:57:07.004640 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1398 07:57:07.004680 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1399 07:57:07.004719 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1400 07:57:07.004758 PCI: 01:00.0
1401 07:57:07.004796 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1402 07:57:07.004834 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1403 07:57:07.004873 PCI: 00:08.0
1404 07:57:07.004910 PCI: 00:0a.0
1405 07:57:07.004947 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1406 07:57:07.004985 PCI: 00:0d.0 child on link 0 USB0 port 0
1407 07:57:07.005023 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1408 07:57:07.005062 USB0 port 0 child on link 0 USB3 port 0
1409 07:57:07.005099 USB3 port 0
1410 07:57:07.005136 USB3 port 1
1411 07:57:07.005172 USB3 port 2
1412 07:57:07.005208 USB3 port 3
1413 07:57:07.005247 PCI: 00:14.0 child on link 0 USB0 port 0
1414 07:57:07.005284 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1415 07:57:07.005322 USB0 port 0 child on link 0 USB2 port 0
1416 07:57:07.005360 USB2 port 0
1417 07:57:07.005397 USB2 port 1
1418 07:57:07.005434 USB2 port 2
1419 07:57:07.005472 USB2 port 3
1420 07:57:07.005509 USB2 port 4
1421 07:57:07.005547 USB2 port 5
1422 07:57:07.005584 USB2 port 6
1423 07:57:07.005621 USB2 port 7
1424 07:57:07.005658 USB2 port 8
1425 07:57:07.005694 USB2 port 9
1426 07:57:07.005734 USB3 port 0
1427 07:57:07.005777 USB3 port 1
1428 07:57:07.005813 USB3 port 2
1429 07:57:07.005850 USB3 port 3
1430 07:57:07.005887 PCI: 00:14.2
1431 07:57:07.005924 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1432 07:57:07.005962 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1433 07:57:07.006001 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1434 07:57:07.006039 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1435 07:57:07.006076 GENERIC: 0.0
1436 07:57:07.006113 PCI: 00:15.0 child on link 0 I2C: 00:1a
1437 07:57:07.006150 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1438 07:57:07.006186 I2C: 00:1a
1439 07:57:07.006222 I2C: 00:31
1440 07:57:07.006258 I2C: 00:32
1441 07:57:07.006295 PCI: 00:15.1 child on link 0 I2C: 00:50
1442 07:57:07.006331 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1443 07:57:07.006368 I2C: 00:50
1444 07:57:07.006404 PCI: 00:15.2
1445 07:57:07.006440 PCI: 00:15.3 child on link 0 I2C: 00:10
1446 07:57:07.006478 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1447 07:57:07.006516 I2C: 00:10
1448 07:57:07.006552 PCI: 00:16.0
1449 07:57:07.006589 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1450 07:57:07.006626 PCI: 00:19.0
1451 07:57:07.006662 PCI: 00:19.1 child on link 0 I2C: 00:15
1452 07:57:07.006709 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1453 07:57:07.006747 I2C: 00:15
1454 07:57:07.006783 I2C: 00:2c
1455 07:57:07.006820 PCI: 00:1e.0
1456 07:57:07.006858 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1457 07:57:07.006896 PCI: 00:1e.3 child on link 0 SPI: 00
1458 07:57:07.006934 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1459 07:57:07.006972 SPI: 00
1460 07:57:07.007009 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1461 07:57:07.007046 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1462 07:57:07.007085 PNP: 0c09.0
1463 07:57:07.007122 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1464 07:57:07.007161 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1465 07:57:07.007209 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1466 07:57:07.007251 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1467 07:57:07.007298 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1468 07:57:07.007335 GENERIC: 0.0
1469 07:57:07.007372 GENERIC: 1.0
1470 07:57:07.007409 PCI: 00:1f.3
1471 07:57:07.007446 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1472 07:57:07.007483 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1473 07:57:07.007520 PCI: 00:1f.5
1474 07:57:07.007736 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1475 07:57:07.007794 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1476 07:57:07.007837 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1477 07:57:07.007876 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1478 07:57:07.007913 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1479 07:57:07.007951 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1480 07:57:07.007988 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1481 07:57:07.008026 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1482 07:57:07.008064 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1483 07:57:07.008102 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1484 07:57:07.008139 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1485 07:57:07.008177 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1486 07:57:07.008214 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1487 07:57:07.008252 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1488 07:57:07.008289 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1489 07:57:07.008326 DOMAIN: 0000: Resource ranges:
1490 07:57:07.008362 * Base: 1000, Size: 800, Tag: 100
1491 07:57:07.008399 * Base: 1900, Size: e700, Tag: 100
1492 07:57:07.008436 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1493 07:57:07.008474 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1494 07:57:07.008510 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1495 07:57:07.008546 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1496 07:57:07.008584 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1497 07:57:07.008622 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1498 07:57:07.008664 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1499 07:57:07.008718 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1500 07:57:07.008755 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1501 07:57:07.008792 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1502 07:57:07.008829 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1503 07:57:07.008873 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1504 07:57:07.008910 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1505 07:57:07.008947 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1506 07:57:07.008985 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1507 07:57:07.009021 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1508 07:57:07.009057 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1509 07:57:07.009093 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1510 07:57:07.009129 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1511 07:57:07.009175 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1512 07:57:07.009212 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1513 07:57:07.009250 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1514 07:57:07.009292 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1515 07:57:07.009329 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1516 07:57:07.009366 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1517 07:57:07.009403 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1518 07:57:07.009439 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1519 07:57:07.009476 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1520 07:57:07.009513 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1521 07:57:07.009550 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1522 07:57:07.009587 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1523 07:57:07.009624 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1524 07:57:07.009660 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1525 07:57:07.009697 DOMAIN: 0000: Resource ranges:
1526 07:57:07.009734 * Base: 80400000, Size: 3fc00000, Tag: 200
1527 07:57:07.009771 * Base: d0000000, Size: 28000000, Tag: 200
1528 07:57:07.009808 * Base: fa000000, Size: 1000000, Tag: 200
1529 07:57:07.009845 * Base: fb001000, Size: 17ff000, Tag: 200
1530 07:57:07.009881 * Base: fe800000, Size: 300000, Tag: 200
1531 07:57:07.009918 * Base: feb80000, Size: 80000, Tag: 200
1532 07:57:07.009955 * Base: fed00000, Size: 40000, Tag: 200
1533 07:57:07.009991 * Base: fed70000, Size: 10000, Tag: 200
1534 07:57:07.010206 * Base: fed88000, Size: 8000, Tag: 200
1535 07:57:07.010260 * Base: fed93000, Size: d000, Tag: 200
1536 07:57:07.010300 * Base: feda2000, Size: 1e000, Tag: 200
1537 07:57:07.010338 * Base: fede0000, Size: 1220000, Tag: 200
1538 07:57:07.010377 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1539 07:57:07.010414 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1540 07:57:07.010453 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1541 07:57:07.010491 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1542 07:57:07.010529 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1543 07:57:07.010567 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1544 07:57:07.010605 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1545 07:57:07.010642 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1546 07:57:07.010680 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1547 07:57:07.010718 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1548 07:57:07.010755 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1549 07:57:07.010793 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1550 07:57:07.010830 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1551 07:57:07.010869 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1552 07:57:07.010909 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1553 07:57:07.010946 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1554 07:57:07.010984 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1555 07:57:07.011022 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1556 07:57:07.011061 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1557 07:57:07.011099 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1558 07:57:07.011136 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1559 07:57:07.011181 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1560 07:57:07.011222 PCI: 00:06.0: Resource ranges:
1561 07:57:07.011260 * Base: 80400000, Size: 100000, Tag: 200
1562 07:57:07.011298 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1563 07:57:07.011335 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1564 07:57:07.011373 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1565 07:57:07.011412 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1566 07:57:07.011449 Root Device assign_resources, bus 0 link: 0
1567 07:57:07.011488 DOMAIN: 0000 assign_resources, bus 0 link: 0
1568 07:57:07.011527 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1569 07:57:07.011564 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1570 07:57:07.011602 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1571 07:57:07.011639 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1572 07:57:07.011677 PCI: 00:04.0 assign_resources, bus 1 link: 0
1573 07:57:07.011714 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1574 07:57:07.011752 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1575 07:57:07.011791 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1576 07:57:07.011829 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1577 07:57:07.011867 PCI: 00:06.0 assign_resources, bus 1 link: 0
1578 07:57:07.011905 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1579 07:57:07.011943 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1580 07:57:07.011980 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1581 07:57:07.012018 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1582 07:57:07.012056 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1583 07:57:07.012095 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1584 07:57:07.012132 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1585 07:57:07.012170 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1586 07:57:07.012208 PCI: 00:14.0 assign_resources, bus 0 link: 0
1587 07:57:07.012245 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1588 07:57:07.012283 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1589 07:57:07.012320 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1590 07:57:07.012359 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1591 07:57:07.012396 PCI: 00:14.3 assign_resources, bus 0 link: 0
1592 07:57:07.012433 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1593 07:57:07.012471 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1594 07:57:07.012509 PCI: 00:15.0 assign_resources, bus 0 link: 0
1595 07:57:07.012546 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1596 07:57:07.012763 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1597 07:57:07.012810 PCI: 00:15.1 assign_resources, bus 0 link: 0
1598 07:57:07.012850 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1599 07:57:07.012901 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1600 07:57:07.012939 PCI: 00:15.3 assign_resources, bus 0 link: 0
1601 07:57:07.012976 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1602 07:57:07.013015 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1603 07:57:07.013052 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1604 07:57:07.013090 PCI: 00:19.1 assign_resources, bus 0 link: 0
1605 07:57:07.013128 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1606 07:57:07.013171 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1607 07:57:07.013208 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1608 07:57:07.013245 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1609 07:57:07.013282 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1610 07:57:07.013319 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1611 07:57:07.013357 LPC: Trying to open IO window from 800 size 1ff
1612 07:57:07.013394 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1613 07:57:07.013432 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1614 07:57:07.013470 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1615 07:57:07.013507 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1616 07:57:07.013545 Root Device assign_resources, bus 0 link: 0 done
1617 07:57:07.013582 Done setting resources.
1618 07:57:07.013619 Show resources in subtree (Root Device)...After assigning values.
1619 07:57:07.013656 Root Device child on link 0 CPU_CLUSTER: 0
1620 07:57:07.013693 CPU_CLUSTER: 0 child on link 0 APIC: 00
1621 07:57:07.013729 APIC: 00
1622 07:57:07.013766 APIC: 12
1623 07:57:07.013803 APIC: 14
1624 07:57:07.013840 APIC: 16
1625 07:57:07.013876 APIC: 10
1626 07:57:07.013912 APIC: 01
1627 07:57:07.013949 APIC: 09
1628 07:57:07.013985 APIC: 08
1629 07:57:07.014020 DOMAIN: 0000 child on link 0 GPIO: 0
1630 07:57:07.014058 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1631 07:57:07.014096 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1632 07:57:07.014134 GPIO: 0
1633 07:57:07.014171 PCI: 00:00.0
1634 07:57:07.014208 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1635 07:57:07.014245 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1636 07:57:07.014282 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1637 07:57:07.014320 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1638 07:57:07.014358 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1639 07:57:07.014396 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1640 07:57:07.014434 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1641 07:57:07.014471 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1642 07:57:07.014508 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1643 07:57:07.014546 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1644 07:57:07.014582 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1645 07:57:07.014620 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1646 07:57:07.014658 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1647 07:57:07.014695 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1648 07:57:07.014732 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1649 07:57:07.014778 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1650 07:57:07.014821 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1651 07:57:07.014858 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1652 07:57:07.014895 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1653 07:57:07.014931 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1654 07:57:07.014969 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1655 07:57:07.015006 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1656 07:57:07.015043 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1657 07:57:07.015260 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1658 07:57:07.015306 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1659 07:57:07.015347 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1660 07:57:07.015386 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1661 07:57:07.015424 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1662 07:57:07.015462 PCI: 00:02.0
1663 07:57:07.015500 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1664 07:57:07.015539 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1665 07:57:07.015577 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1666 07:57:07.015615 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1667 07:57:07.015654 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1668 07:57:07.015692 GENERIC: 0.0
1669 07:57:07.015729 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1670 07:57:07.015767 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1671 07:57:07.015806 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1672 07:57:07.015844 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1673 07:57:07.015882 PCI: 01:00.0
1674 07:57:07.015920 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1675 07:57:07.015957 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1676 07:57:07.015995 PCI: 00:08.0
1677 07:57:07.016032 PCI: 00:0a.0
1678 07:57:07.016070 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1679 07:57:07.016109 PCI: 00:0d.0 child on link 0 USB0 port 0
1680 07:57:07.016146 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1681 07:57:07.016185 USB0 port 0 child on link 0 USB3 port 0
1682 07:57:07.016222 USB3 port 0
1683 07:57:07.016259 USB3 port 1
1684 07:57:07.016296 USB3 port 2
1685 07:57:07.016333 USB3 port 3
1686 07:57:07.016373 PCI: 00:14.0 child on link 0 USB0 port 0
1687 07:57:07.016429 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1688 07:57:07.016473 USB0 port 0 child on link 0 USB2 port 0
1689 07:57:07.016516 USB2 port 0
1690 07:57:07.016557 USB2 port 1
1691 07:57:07.016597 USB2 port 2
1692 07:57:07.016634 USB2 port 3
1693 07:57:07.016674 USB2 port 4
1694 07:57:07.016713 USB2 port 5
1695 07:57:07.016750 USB2 port 6
1696 07:57:07.016788 USB2 port 7
1697 07:57:07.016826 USB2 port 8
1698 07:57:07.016863 USB2 port 9
1699 07:57:07.016900 USB3 port 0
1700 07:57:07.016937 USB3 port 1
1701 07:57:07.016975 USB3 port 2
1702 07:57:07.017012 USB3 port 3
1703 07:57:07.017049 PCI: 00:14.2
1704 07:57:07.017087 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1705 07:57:07.017126 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1706 07:57:07.017165 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1707 07:57:07.017203 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1708 07:57:07.017241 GENERIC: 0.0
1709 07:57:07.017278 PCI: 00:15.0 child on link 0 I2C: 00:1a
1710 07:57:07.017316 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1711 07:57:07.017354 I2C: 00:1a
1712 07:57:07.017392 I2C: 00:31
1713 07:57:07.017429 I2C: 00:32
1714 07:57:07.017466 PCI: 00:15.1 child on link 0 I2C: 00:50
1715 07:57:07.017504 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1716 07:57:07.017542 I2C: 00:50
1717 07:57:07.017580 PCI: 00:15.2
1718 07:57:07.017617 PCI: 00:15.3 child on link 0 I2C: 00:10
1719 07:57:07.017655 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1720 07:57:07.017693 I2C: 00:10
1721 07:57:07.017730 PCI: 00:16.0
1722 07:57:07.017768 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1723 07:57:07.017806 PCI: 00:19.0
1724 07:57:07.017842 PCI: 00:19.1 child on link 0 I2C: 00:15
1725 07:57:07.017880 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1726 07:57:07.017917 I2C: 00:15
1727 07:57:07.017954 I2C: 00:2c
1728 07:57:07.017991 PCI: 00:1e.0
1729 07:57:07.018028 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1730 07:57:07.018066 PCI: 00:1e.3 child on link 0 SPI: 00
1731 07:57:07.018105 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1732 07:57:07.018143 SPI: 00
1733 07:57:07.018180 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1734 07:57:07.018218 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1735 07:57:07.018256 PNP: 0c09.0
1736 07:57:07.018472 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1737 07:57:07.018518 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1738 07:57:07.018559 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1739 07:57:07.018599 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1740 07:57:07.018638 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1741 07:57:07.018676 GENERIC: 0.0
1742 07:57:07.018714 GENERIC: 1.0
1743 07:57:07.018751 PCI: 00:1f.3
1744 07:57:07.018789 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1745 07:57:07.018828 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1746 07:57:07.018865 PCI: 00:1f.5
1747 07:57:07.018904 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1748 07:57:07.018942 Done allocating resources.
1749 07:57:07.018981 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1750 07:57:07.019019 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1751 07:57:07.019058 Configure audio over I2S with MAX98373 NAU88L25B.
1752 07:57:07.019096 Enabling BT offload
1753 07:57:07.019135 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1754 07:57:07.019172 Enabling resources...
1755 07:57:07.019223 PCI: 00:00.0 subsystem <- 8086/4609
1756 07:57:07.019262 PCI: 00:00.0 cmd <- 06
1757 07:57:07.019300 PCI: 00:02.0 subsystem <- 8086/46b3
1758 07:57:07.019338 PCI: 00:02.0 cmd <- 03
1759 07:57:07.019376 PCI: 00:04.0 subsystem <- 8086/461d
1760 07:57:07.019414 PCI: 00:04.0 cmd <- 02
1761 07:57:07.019451 PCI: 00:06.0 bridge ctrl <- 0013
1762 07:57:07.019489 PCI: 00:06.0 subsystem <- 8086/464d
1763 07:57:07.019527 PCI: 00:06.0 cmd <- 106
1764 07:57:07.019564 PCI: 00:0a.0 subsystem <- 8086/467d
1765 07:57:07.019602 PCI: 00:0a.0 cmd <- 02
1766 07:57:07.019640 PCI: 00:0d.0 subsystem <- 8086/461e
1767 07:57:07.019677 PCI: 00:0d.0 cmd <- 02
1768 07:57:07.019714 PCI: 00:14.0 subsystem <- 8086/51ed
1769 07:57:07.019751 PCI: 00:14.0 cmd <- 02
1770 07:57:07.019789 PCI: 00:14.2 subsystem <- 8086/51ef
1771 07:57:07.019827 PCI: 00:14.2 cmd <- 02
1772 07:57:07.019865 PCI: 00:14.3 subsystem <- 8086/51f0
1773 07:57:07.019903 PCI: 00:14.3 cmd <- 02
1774 07:57:07.366126 PCI: 00:15.0 subsystem <- 8086/51e8
1775 07:57:07.366647 PCI: 00:15.0 cmd <- 02
1776 07:57:07.366984 PCI: 00:15.1 subsystem <- 8086/51e9
1777 07:57:07.367325 PCI: 00:15.1 cmd <- 06
1778 07:57:07.367635 PCI: 00:15.3 subsystem <- 8086/51eb
1779 07:57:07.367939 PCI: 00:15.3 cmd <- 02
1780 07:57:07.368268 PCI: 00:16.0 subsystem <- 8086/51e0
1781 07:57:07.368646 PCI: 00:16.0 cmd <- 02
1782 07:57:07.368964 PCI: 00:19.1 subsystem <- 8086/51c6
1783 07:57:07.369263 PCI: 00:19.1 cmd <- 02
1784 07:57:07.369561 PCI: 00:1e.0 subsystem <- 8086/51a8
1785 07:57:07.369862 PCI: 00:1e.0 cmd <- 06
1786 07:57:07.370168 PCI: 00:1e.3 subsystem <- 8086/51ab
1787 07:57:07.370470 PCI: 00:1e.3 cmd <- 02
1788 07:57:07.370765 PCI: 00:1f.0 subsystem <- 8086/5182
1789 07:57:07.371060 PCI: 00:1f.0 cmd <- 407
1790 07:57:07.371386 PCI: 00:1f.3 subsystem <- 8086/51c8
1791 07:57:07.371689 PCI: 00:1f.3 cmd <- 02
1792 07:57:07.371989 PCI: 00:1f.5 subsystem <- 8086/51a4
1793 07:57:07.372288 PCI: 00:1f.5 cmd <- 406
1794 07:57:07.372580 PCI: 01:00.0 cmd <- 02
1795 07:57:07.372874 done.
1796 07:57:07.373172 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1797 07:57:07.373473 ME: Version: Unavailable
1798 07:57:07.373774 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1799 07:57:07.374072 Initializing devices...
1800 07:57:07.374368 Root Device init
1801 07:57:07.374662 mainboard: EC init
1802 07:57:07.374955 Chrome EC: Set SMI mask to 0x0000000000000000
1803 07:57:07.375268 Chrome EC: clear events_b mask to 0x0000000000000000
1804 07:57:07.375573 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1805 07:57:07.375874 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1806 07:57:07.376170 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1807 07:57:07.376469 Chrome EC: Set WAKE mask to 0x0000000000000000
1808 07:57:07.376764 Root Device init finished in 36 msecs
1809 07:57:07.377060 PCI: 00:00.0 init
1810 07:57:07.377355 CPU TDP = 15 Watts
1811 07:57:07.377652 CPU PL1 = 15 Watts
1812 07:57:07.377945 CPU PL2 = 55 Watts
1813 07:57:07.378239 CPU PL4 = 123 Watts
1814 07:57:07.378531 PCI: 00:00.0 init finished in 8 msecs
1815 07:57:07.378778 PCI: 00:02.0 init
1816 07:57:07.379022 GMA: Found VBT in CBFS
1817 07:57:07.379280 GMA: Found valid VBT in CBFS
1818 07:57:07.379528 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1819 07:57:07.379779 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1820 07:57:07.380027 PCI: 00:02.0 init finished in 18 msecs
1821 07:57:07.380276 PCI: 00:06.0 init
1822 07:57:07.380521 Initializing PCH PCIe bridge.
1823 07:57:07.380767 PCI: 00:06.0 init finished in 3 msecs
1824 07:57:07.381012 PCI: 00:0a.0 init
1825 07:57:07.381255 PCI: 00:0a.0 init finished in 0 msecs
1826 07:57:07.381460 PCI: 00:14.0 init
1827 07:57:07.381629 PCI: 00:14.0 init finished in 0 msecs
1828 07:57:07.381802 PCI: 00:14.2 init
1829 07:57:07.381974 PCI: 00:14.2 init finished in 0 msecs
1830 07:57:07.382146 PCI: 00:15.0 init
1831 07:57:07.382317 I2C bus 0 version 0x3230302a
1832 07:57:07.382490 DW I2C bus 0 at 0x80655000 (400 KHz)
1833 07:57:07.382663 PCI: 00:15.0 init finished in 6 msecs
1834 07:57:07.382834 PCI: 00:15.1 init
1835 07:57:07.383004 I2C bus 1 version 0x3230302a
1836 07:57:07.383185 DW I2C bus 1 at 0x80656000 (400 KHz)
1837 07:57:07.383361 PCI: 00:15.1 init finished in 6 msecs
1838 07:57:07.383534 PCI: 00:15.3 init
1839 07:57:07.383707 I2C bus 3 version 0x3230302a
1840 07:57:07.383880 DW I2C bus 3 at 0x80657000 (400 KHz)
1841 07:57:07.384053 PCI: 00:15.3 init finished in 6 msecs
1842 07:57:07.384225 PCI: 00:16.0 init
1843 07:57:07.384395 PCI: 00:16.0 init finished in 0 msecs
1844 07:57:07.384541 PCI: 00:19.1 init
1845 07:57:07.384647 I2C bus 5 version 0x3230302a
1846 07:57:07.384745 DW I2C bus 5 at 0x80659000 (400 KHz)
1847 07:57:07.384846 PCI: 00:19.1 init finished in 6 msecs
1848 07:57:07.384946 PCI: 00:1f.0 init
1849 07:57:07.385276 IOAPIC: Initializing IOAPIC at 0xfec00000
1850 07:57:07.385372 IOAPIC: ID = 0x02
1851 07:57:07.385472 IOAPIC: Dumping registers
1852 07:57:07.385568 reg 0x0000: 0x02000000
1853 07:57:07.385664 reg 0x0001: 0x00770020
1854 07:57:07.385759 reg 0x0002: 0x00000000
1855 07:57:07.385854 IOAPIC: 120 interrupts
1856 07:57:07.385951 IOAPIC: Clearing IOAPIC at 0xfec00000
1857 07:57:07.386046 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1858 07:57:07.386141 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1859 07:57:07.386235 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1860 07:57:07.386329 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1861 07:57:07.386423 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1862 07:57:07.386516 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1863 07:57:07.386609 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1864 07:57:07.386703 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1865 07:57:07.386798 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1866 07:57:07.386891 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1867 07:57:07.386993 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1868 07:57:07.387088 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1869 07:57:07.387193 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1870 07:57:07.387283 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1871 07:57:07.387369 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1872 07:57:07.387451 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1873 07:57:07.387533 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1874 07:57:07.387617 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1875 07:57:07.387701 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1876 07:57:07.387799 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1877 07:57:07.387858 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1878 07:57:07.387912 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1879 07:57:07.387964 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1880 07:57:07.388014 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1881 07:57:07.388070 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1882 07:57:07.388119 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1883 07:57:07.388167 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1884 07:57:07.388218 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1885 07:57:07.388268 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1886 07:57:07.388317 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1887 07:57:07.388365 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1888 07:57:07.388415 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1889 07:57:07.388464 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1890 07:57:07.388511 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1891 07:57:07.388558 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1892 07:57:07.388605 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1893 07:57:07.388652 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1894 07:57:07.388700 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1895 07:57:07.388747 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1896 07:57:07.388794 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1897 07:57:07.388842 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1898 07:57:07.388889 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1899 07:57:07.388937 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1900 07:57:07.388984 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1901 07:57:07.389031 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1902 07:57:07.389078 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1903 07:57:07.389127 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1904 07:57:07.389174 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1905 07:57:07.389221 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1906 07:57:07.389268 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1907 07:57:07.389316 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1908 07:57:07.389363 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1909 07:57:07.389409 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1910 07:57:07.389456 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1911 07:57:07.389502 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1912 07:57:07.389549 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1913 07:57:07.389597 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1914 07:57:07.389644 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1915 07:57:07.389691 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1916 07:57:07.389736 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1917 07:57:07.389783 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1918 07:57:07.389830 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1919 07:57:07.389878 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1920 07:57:07.389925 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1921 07:57:07.389972 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1922 07:57:07.390019 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1923 07:57:07.390066 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1924 07:57:07.390113 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1925 07:57:07.390159 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1926 07:57:07.390205 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1927 07:57:07.390253 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1928 07:57:07.390301 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1929 07:57:07.390348 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1930 07:57:07.390396 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1931 07:57:07.390443 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1932 07:57:07.390489 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1933 07:57:07.390537 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1934 07:57:07.390584 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1935 07:57:07.390633 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1936 07:57:07.390862 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1937 07:57:07.390925 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1938 07:57:07.390966 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1939 07:57:07.391005 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1940 07:57:07.391044 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1941 07:57:07.391083 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1942 07:57:07.391121 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1943 07:57:07.391159 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1944 07:57:07.391204 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1945 07:57:07.391258 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1946 07:57:07.391295 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1947 07:57:07.391332 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1948 07:57:07.391369 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1949 07:57:07.391407 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1950 07:57:07.391444 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1951 07:57:07.391480 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1952 07:57:07.391518 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1953 07:57:07.391555 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1954 07:57:07.391593 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1955 07:57:07.391631 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1956 07:57:07.391668 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1957 07:57:07.391705 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1958 07:57:07.391743 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1959 07:57:07.391781 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1960 07:57:07.391818 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1961 07:57:07.391855 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1962 07:57:07.391893 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1963 07:57:07.391930 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1964 07:57:07.391968 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1965 07:57:07.392006 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1966 07:57:07.392043 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1967 07:57:07.392080 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1968 07:57:07.392116 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1969 07:57:07.392152 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1970 07:57:07.392189 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1971 07:57:07.392226 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1972 07:57:07.392263 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1973 07:57:07.392300 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1974 07:57:07.392337 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1975 07:57:07.392375 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1976 07:57:07.392413 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1977 07:57:07.392450 IOAPIC: Bootstrap Processor Local APIC = 0x00
1978 07:57:07.392487 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1979 07:57:07.392524 PCI: 00:1f.0 init finished in 607 msecs
1980 07:57:07.392561 PCI: 00:1f.2 init
1981 07:57:07.392598 apm_control: Disabling ACPI.
1982 07:57:07.392635 APMC done.
1983 07:57:07.392673 PCI: 00:1f.2 init finished in 7 msecs
1984 07:57:07.392712 PCI: 00:1f.3 init
1985 07:57:07.392748 PCI: 00:1f.3 init finished in 0 msecs
1986 07:57:07.392785 PCI: 01:00.0 init
1987 07:57:07.392822 PCI: 01:00.0 init finished in 0 msecs
1988 07:57:07.392858 PNP: 0c09.0 init
1989 07:57:07.392895 Google Chrome EC uptime: 10.933 seconds
1990 07:57:07.392933 Google Chrome AP resets since EC boot: 0
1991 07:57:07.392970 Google Chrome most recent AP reset causes:
1992 07:57:07.393007 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1993 07:57:07.393045 PNP: 0c09.0 init finished in 19 msecs
1994 07:57:07.393082 GENERIC: 0.0 init
1995 07:57:07.393118 GENERIC: 0.0 init finished in 0 msecs
1996 07:57:07.393156 GENERIC: 1.0 init
1997 07:57:07.393192 GENERIC: 1.0 init finished in 0 msecs
1998 07:57:07.393229 Devices initialized
1999 07:57:07.393266 Show all devs... After init.
2000 07:57:07.393303 Root Device: enabled 1
2001 07:57:07.393340 CPU_CLUSTER: 0: enabled 1
2002 07:57:07.393378 DOMAIN: 0000: enabled 1
2003 07:57:07.393415 GPIO: 0: enabled 1
2004 07:57:07.393452 PCI: 00:00.0: enabled 1
2005 07:57:07.393488 PCI: 00:01.0: enabled 0
2006 07:57:07.393525 PCI: 00:01.1: enabled 0
2007 07:57:07.393562 PCI: 00:02.0: enabled 1
2008 07:57:07.393599 PCI: 00:04.0: enabled 1
2009 07:57:07.393635 PCI: 00:05.0: enabled 0
2010 07:57:07.393672 PCI: 00:06.0: enabled 1
2011 07:57:07.393708 PCI: 00:06.2: enabled 0
2012 07:57:07.393745 PCI: 00:07.0: enabled 0
2013 07:57:07.393781 PCI: 00:07.1: enabled 0
2014 07:57:07.393817 PCI: 00:07.2: enabled 0
2015 07:57:07.393854 PCI: 00:07.3: enabled 0
2016 07:57:07.393891 PCI: 00:08.0: enabled 0
2017 07:57:07.393928 PCI: 00:09.0: enabled 0
2018 07:57:07.393965 PCI: 00:0a.0: enabled 1
2019 07:57:07.394001 PCI: 00:0d.0: enabled 1
2020 07:57:07.394038 PCI: 00:0d.1: enabled 0
2021 07:57:07.394074 PCI: 00:0d.2: enabled 0
2022 07:57:07.394110 PCI: 00:0d.3: enabled 0
2023 07:57:07.394162 PCI: 00:0e.0: enabled 0
2024 07:57:07.394213 PCI: 00:10.0: enabled 0
2025 07:57:07.394249 PCI: 00:10.1: enabled 0
2026 07:57:07.394286 PCI: 00:10.6: enabled 0
2027 07:57:07.394323 PCI: 00:10.7: enabled 0
2028 07:57:07.394361 PCI: 00:12.0: enabled 0
2029 07:57:07.394398 PCI: 00:12.6: enabled 0
2030 07:57:07.394435 PCI: 00:12.7: enabled 0
2031 07:57:07.394472 PCI: 00:13.0: enabled 0
2032 07:57:07.394509 PCI: 00:14.0: enabled 1
2033 07:57:07.394558 PCI: 00:14.1: enabled 0
2034 07:57:07.394600 PCI: 00:14.2: enabled 1
2035 07:57:07.394637 PCI: 00:14.3: enabled 1
2036 07:57:07.394674 PCI: 00:15.0: enabled 1
2037 07:57:07.394712 PCI: 00:15.1: enabled 1
2038 07:57:07.394749 PCI: 00:15.2: enabled 0
2039 07:57:07.394785 PCI: 00:15.3: enabled 1
2040 07:57:07.394821 PCI: 00:16.0: enabled 1
2041 07:57:07.394857 PCI: 00:16.1: enabled 0
2042 07:57:07.394894 PCI: 00:16.2: enabled 0
2043 07:57:07.394931 PCI: 00:16.3: enabled 0
2044 07:57:07.394969 PCI: 00:16.4: enabled 0
2045 07:57:07.395009 PCI: 00:16.5: enabled 0
2046 07:57:07.395046 PCI: 00:17.0: enabled 0
2047 07:57:07.395082 PCI: 00:19.0: enabled 0
2048 07:57:07.395119 PCI: 00:19.1: enabled 1
2049 07:57:07.395156 PCI: 00:19.2: enabled 0
2050 07:57:07.395201 PCI: 00:1a.0: enabled 0
2051 07:57:07.395256 PCI: 00:1c.0: enabled 0
2052 07:57:07.395295 PCI: 00:1c.1: enabled 0
2053 07:57:07.395511 PCI: 00:1c.2: enabled 0
2054 07:57:07.395556 PCI: 00:1c.3: enabled 0
2055 07:57:07.395595 PCI: 00:1c.4: enabled 0
2056 07:57:07.395632 PCI: 00:1c.5: enabled 0
2057 07:57:07.395669 PCI: 00:1c.6: enabled 0
2058 07:57:07.395707 PCI: 00:1c.7: enabled 0
2059 07:57:07.395745 PCI: 00:1d.0: enabled 0
2060 07:57:07.395782 PCI: 00:1d.1: enabled 0
2061 07:57:07.395821 PCI: 00:1d.2: enabled 0
2062 07:57:07.395858 PCI: 00:1d.3: enabled 0
2063 07:57:07.395896 PCI: 00:1e.0: enabled 1
2064 07:57:07.395933 PCI: 00:1e.1: enabled 0
2065 07:57:07.395970 PCI: 00:1e.2: enabled 0
2066 07:57:07.396006 PCI: 00:1e.3: enabled 1
2067 07:57:07.396043 PCI: 00:1f.0: enabled 1
2068 07:57:07.396080 PCI: 00:1f.1: enabled 0
2069 07:57:07.396117 PCI: 00:1f.2: enabled 1
2070 07:57:07.396155 PCI: 00:1f.3: enabled 1
2071 07:57:07.396194 PCI: 00:1f.4: enabled 0
2072 07:57:07.396231 PCI: 00:1f.5: enabled 1
2073 07:57:07.396269 PCI: 00:1f.6: enabled 0
2074 07:57:07.396306 PCI: 00:1f.7: enabled 0
2075 07:57:07.396343 GENERIC: 0.0: enabled 1
2076 07:57:07.396379 GENERIC: 0.0: enabled 1
2077 07:57:07.396416 GENERIC: 1.0: enabled 1
2078 07:57:07.396453 GENERIC: 0.0: enabled 1
2079 07:57:07.396490 GENERIC: 1.0: enabled 1
2080 07:57:07.396527 USB0 port 0: enabled 1
2081 07:57:07.396563 USB0 port 0: enabled 1
2082 07:57:07.396600 GENERIC: 0.0: enabled 1
2083 07:57:07.396637 I2C: 00:1a: enabled 1
2084 07:57:07.396674 I2C: 00:31: enabled 1
2085 07:57:07.396711 I2C: 00:32: enabled 1
2086 07:57:07.396748 I2C: 00:50: enabled 1
2087 07:57:07.396785 I2C: 00:10: enabled 1
2088 07:57:07.396821 I2C: 00:15: enabled 1
2089 07:57:07.396858 I2C: 00:2c: enabled 1
2090 07:57:07.396895 GENERIC: 0.0: enabled 1
2091 07:57:07.396932 SPI: 00: enabled 1
2092 07:57:07.396968 PNP: 0c09.0: enabled 1
2093 07:57:07.397006 GENERIC: 0.0: enabled 1
2094 07:57:07.397044 USB3 port 0: enabled 1
2095 07:57:07.397080 USB3 port 1: enabled 0
2096 07:57:07.397116 USB3 port 2: enabled 1
2097 07:57:07.397152 USB3 port 3: enabled 0
2098 07:57:07.397189 USB2 port 0: enabled 1
2099 07:57:07.397226 USB2 port 1: enabled 0
2100 07:57:07.397263 USB2 port 2: enabled 1
2101 07:57:07.397300 USB2 port 3: enabled 0
2102 07:57:07.397337 USB2 port 4: enabled 0
2103 07:57:07.397374 USB2 port 5: enabled 1
2104 07:57:07.397411 USB2 port 6: enabled 0
2105 07:57:07.397448 USB2 port 7: enabled 0
2106 07:57:07.397484 USB2 port 8: enabled 1
2107 07:57:07.397521 USB2 port 9: enabled 1
2108 07:57:07.397557 USB3 port 0: enabled 1
2109 07:57:07.397593 USB3 port 1: enabled 0
2110 07:57:07.397630 USB3 port 2: enabled 0
2111 07:57:07.397667 USB3 port 3: enabled 0
2112 07:57:07.397704 GENERIC: 0.0: enabled 1
2113 07:57:07.397741 GENERIC: 1.0: enabled 1
2114 07:57:07.397778 APIC: 00: enabled 1
2115 07:57:07.397815 APIC: 12: enabled 1
2116 07:57:07.397853 APIC: 14: enabled 1
2117 07:57:07.397890 APIC: 16: enabled 1
2118 07:57:07.397926 APIC: 10: enabled 1
2119 07:57:07.397964 APIC: 01: enabled 1
2120 07:57:07.398002 APIC: 09: enabled 1
2121 07:57:07.398040 APIC: 08: enabled 1
2122 07:57:07.398077 PCI: 01:00.0: enabled 1
2123 07:57:07.398113 BS: BS_DEV_INIT run times (exec / console): 10 / 1126 ms
2124 07:57:07.398150 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2125 07:57:07.398188 ELOG: NV offset 0xf20000 size 0x4000
2126 07:57:07.398226 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2127 07:57:07.398264 ELOG: Event(17) added with size 13 at 2024-05-30 07:57:05 UTC
2128 07:57:07.398302 ELOG: Event(92) added with size 9 at 2024-05-30 07:57:05 UTC
2129 07:57:07.398339 ELOG: Event(93) added with size 9 at 2024-05-30 07:57:05 UTC
2130 07:57:07.398376 ELOG: Event(9E) added with size 10 at 2024-05-30 07:57:05 UTC
2131 07:57:07.398414 ELOG: Event(9F) added with size 14 at 2024-05-30 07:57:05 UTC
2132 07:57:07.398451 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2133 07:57:07.398488 ELOG: Event(A1) added with size 10 at 2024-05-30 07:57:05 UTC
2134 07:57:07.398526 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2135 07:57:07.398565 ELOG: Event(A0) added with size 9 at 2024-05-30 07:57:05 UTC
2136 07:57:07.398602 elog_add_boot_reason: Logged dev mode boot
2137 07:57:07.398638 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2138 07:57:07.398676 Finalize devices...
2139 07:57:07.398712 PCI: 00:16.0 final
2140 07:57:07.398750 PCI: 00:1f.2 final
2141 07:57:07.398787 GENERIC: 0.0 final
2142 07:57:07.398825 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2143 07:57:07.398862 GENERIC: 1.0 final
2144 07:57:07.398899 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2145 07:57:07.398936 Devices finalized
2146 07:57:07.398973 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2147 07:57:07.399010 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2148 07:57:07.399048 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2149 07:57:07.399085 ME: HFSTS1 : 0x80030045
2150 07:57:07.399121 ME: HFSTS2 : 0x30280116
2151 07:57:07.399158 ME: HFSTS3 : 0x00000050
2152 07:57:07.399200 ME: HFSTS4 : 0x00004000
2153 07:57:07.399238 ME: HFSTS5 : 0x00000000
2154 07:57:07.399275 ME: HFSTS6 : 0x40400006
2155 07:57:07.399312 ME: Manufacturing Mode : YES
2156 07:57:07.399349 ME: SPI Protection Mode Enabled : YES
2157 07:57:07.399387 ME: FPFs Committed : YES
2158 07:57:07.399424 ME: Manufacturing Vars Locked : NO
2159 07:57:07.399461 ME: FW Partition Table : OK
2160 07:57:07.399498 ME: Bringup Loader Failure : NO
2161 07:57:07.399536 ME: Firmware Init Complete : NO
2162 07:57:07.399573 ME: Boot Options Present : NO
2163 07:57:07.399610 ME: Update In Progress : NO
2164 07:57:07.399648 ME: D0i3 Support : YES
2165 07:57:07.399684 ME: Low Power State Enabled : NO
2166 07:57:07.399721 ME: CPU Replaced : YES
2167 07:57:07.399758 ME: CPU Replacement Valid : YES
2168 07:57:07.399795 ME: Current Working State : 5
2169 07:57:07.399832 ME: Current Operation State : 1
2170 07:57:07.399869 ME: Current Operation Mode : 3
2171 07:57:07.399906 ME: Error Code : 0
2172 07:57:07.399942 ME: Enhanced Debug Mode : NO
2173 07:57:07.399979 ME: CPU Debug Disabled : YES
2174 07:57:07.400017 ME: TXT Support : NO
2175 07:57:07.400054 ME: WP for RO is enabled : YES
2176 07:57:07.400268 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2177 07:57:07.400314 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2178 07:57:07.400353 ELOG: Event(91) added with size 10 at 2024-05-30 07:57:05 UTC
2179 07:57:07.400391 Chrome EC: clear events_b mask to 0x0000000020004000
2180 07:57:07.400429 Ramoops buffer: 0x100000@0x7689a000.
2181 07:57:07.400466 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 15 ms
2182 07:57:07.400504 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2183 07:57:07.400543 CBFS: 'fallback/slic' not found.
2184 07:57:07.400581 ACPI: Writing ACPI tables at 7686e000.
2185 07:57:07.400619 ACPI: * FACS
2186 07:57:07.400657 ACPI: * DSDT
2187 07:57:07.400694 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2188 07:57:07.400733 ACPI: * FADT
2189 07:57:07.400769 SCI is IRQ9
2190 07:57:07.400806 ACPI: added table 1/32, length now 40
2191 07:57:07.400844 ACPI: * SSDT
2192 07:57:07.400881 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2193 07:57:07.400920 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2194 07:57:07.400960 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2195 07:57:07.400996 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2196 07:57:07.401034 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2197 07:57:07.401072 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2198 07:57:07.401109 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2199 07:57:07.401147 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2200 07:57:07.401185 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2201 07:57:07.401222 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2202 07:57:07.401259 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2203 07:57:07.401296 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2204 07:57:07.401334 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2205 07:57:07.401371 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2206 07:57:07.401408 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2207 07:57:07.401445 PS2K: Passing 80 keymaps to kernel
2208 07:57:07.401482 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2209 07:57:07.401519 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2210 07:57:07.401556 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2211 07:57:07.401593 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2212 07:57:07.401631 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2213 07:57:07.401668 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2214 07:57:07.401706 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2215 07:57:07.401743 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2216 07:57:07.401781 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2217 07:57:07.401820 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2218 07:57:07.401858 ACPI: added table 2/32, length now 44
2219 07:57:07.401895 ACPI: * MCFG
2220 07:57:07.401932 ACPI: added table 3/32, length now 48
2221 07:57:07.401970 ACPI: * TPM2
2222 07:57:07.402007 TPM2 log created at 0x7685e000
2223 07:57:07.402045 ACPI: added table 4/32, length now 52
2224 07:57:07.402082 ACPI: * LPIT
2225 07:57:07.402119 ACPI: added table 5/32, length now 56
2226 07:57:07.402157 ACPI: * MADT
2227 07:57:07.402194 SCI is IRQ9
2228 07:57:07.402232 ACPI: added table 6/32, length now 60
2229 07:57:07.402269 cmd_reg from pmc_make_ipc_cmd 1052838
2230 07:57:07.402306 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2231 07:57:07.402343 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2232 07:57:07.402382 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2233 07:57:07.402419 PMC CrashLog size in discovery mode: 0xC00
2234 07:57:07.402456 cpu crashlog bar addr: 0x80640000
2235 07:57:07.402492 cpu discovery table offset: 0x6030
2236 07:57:07.402530 cpu_crashlog_discovery_table buffer count: 0x3
2237 07:57:07.402567 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2238 07:57:07.402605 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2239 07:57:07.402642 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2240 07:57:07.402680 PMC crashLog size in discovery mode : 0xC00
2241 07:57:07.402717 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2242 07:57:07.402755 discover mode PMC crashlog size adjusted to: 0x200
2243 07:57:07.402793 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2244 07:57:07.402831 discover mode PMC crashlog size adjusted to: 0x0
2245 07:57:07.402868 m_cpu_crashLog_size : 0x3480 bytes
2246 07:57:07.402904 CPU crashLog present.
2247 07:57:07.402941 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2248 07:57:07.402978 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2249 07:57:07.403015 current = 76877550
2250 07:57:07.403052 ACPI: * DMAR
2251 07:57:07.403089 ACPI: added table 7/32, length now 64
2252 07:57:07.403126 ACPI: added table 8/32, length now 68
2253 07:57:07.403163 ACPI: * HPET
2254 07:57:07.403208 ACPI: added table 9/32, length now 72
2255 07:57:07.403247 ACPI: done.
2256 07:57:07.403284 ACPI tables: 38528 bytes.
2257 07:57:07.403321 smbios_write_tables: 76858000
2258 07:57:07.403359 EC returned error result code 3
2259 07:57:07.403396 Couldn't obtain OEM name from CBI
2260 07:57:07.403433 Create SMBIOS type 16
2261 07:57:07.403469 Create SMBIOS type 17
2262 07:57:07.403506 Create SMBIOS type 20
2263 07:57:07.403542 GENERIC: 0.0 (WIFI Device)
2264 07:57:07.403579 SMBIOS tables: 2156 bytes.
2265 07:57:07.403616 Writing table forward entry at 0x00000500
2266 07:57:07.403653 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2267 07:57:07.403690 Writing coreboot table at 0x76892000
2268 07:57:07.403726 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2269 07:57:07.403942 1. 0000000000001000-000000000009ffff: RAM
2270 07:57:07.403988 2. 00000000000a0000-00000000000fffff: RESERVED
2271 07:57:07.404028 3. 0000000000100000-0000000076857fff: RAM
2272 07:57:07.404067 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2273 07:57:07.404104 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2274 07:57:07.404141 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2275 07:57:07.404179 7. 0000000077000000-00000000803fffff: RESERVED
2276 07:57:07.404216 8. 00000000c0000000-00000000cfffffff: RESERVED
2277 07:57:07.404258 9. 00000000f8000000-00000000f9ffffff: RESERVED
2278 07:57:07.404294 10. 00000000fb000000-00000000fb000fff: RESERVED
2279 07:57:07.404333 11. 00000000fc800000-00000000fe7fffff: RESERVED
2280 07:57:07.404370 12. 00000000feb00000-00000000feb7ffff: RESERVED
2281 07:57:07.404409 13. 00000000fec00000-00000000fecfffff: RESERVED
2282 07:57:07.404446 14. 00000000fed40000-00000000fed6ffff: RESERVED
2283 07:57:07.404485 15. 00000000fed80000-00000000fed87fff: RESERVED
2284 07:57:07.404523 16. 00000000fed90000-00000000fed92fff: RESERVED
2285 07:57:07.404561 17. 00000000feda0000-00000000feda1fff: RESERVED
2286 07:57:07.404601 18. 00000000fedc0000-00000000feddffff: RESERVED
2287 07:57:07.404639 19. 0000000100000000-000000027fbfffff: RAM
2288 07:57:07.404677 Passing 4 GPIOs to payload:
2289 07:57:07.404713 NAME | PORT | POLARITY | VALUE
2290 07:57:07.404750 lid | undefined | high | high
2291 07:57:07.404787 power | undefined | high | low
2292 07:57:07.404823 oprom | undefined | high | low
2293 07:57:07.404860 EC in RW | 0x00000151 | high | low
2294 07:57:07.404896 Board ID: 3
2295 07:57:07.404933 FW config: 0x131
2296 07:57:07.404972 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum 3291
2297 07:57:07.405009 coreboot table: 1764 bytes.
2298 07:57:07.405048 IMD ROOT 0. 0x76fff000 0x00001000
2299 07:57:07.405084 IMD SMALL 1. 0x76ffe000 0x00001000
2300 07:57:07.405121 FSP MEMORY 2. 0x76afe000 0x00500000
2301 07:57:07.405158 CONSOLE 3. 0x76ade000 0x00020000
2302 07:57:07.405194 RO MCACHE 4. 0x76add000 0x00000fd8
2303 07:57:07.405230 FMAP 5. 0x76adc000 0x0000064a
2304 07:57:07.405272 TIME STAMP 6. 0x76adb000 0x00000910
2305 07:57:07.405309 VBOOT WORK 7. 0x76ac7000 0x00014000
2306 07:57:07.405346 MEM INFO 8. 0x76ac6000 0x000003b8
2307 07:57:07.405385 ROMSTG STCK 9. 0x76ac5000 0x00001000
2308 07:57:07.405422 AFTER CAR 10. 0x76ab9000 0x0000c000
2309 07:57:07.405459 RAMSTAGE 11. 0x76a2f000 0x0008a000
2310 07:57:07.405495 ACPI BERT 12. 0x76a1f000 0x00010000
2311 07:57:07.405532 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2312 07:57:07.405569 REFCODE 14. 0x769af000 0x0006f000
2313 07:57:07.405606 SMM BACKUP 15. 0x7699f000 0x00010000
2314 07:57:07.405643 IGD OPREGION16. 0x7699a000 0x00004203
2315 07:57:07.405680 RAMOOPS 17. 0x7689a000 0x00100000
2316 07:57:07.405717 COREBOOT 18. 0x76892000 0x00008000
2317 07:57:07.405754 ACPI 19. 0x7686e000 0x00024000
2318 07:57:07.405792 TPM2 TCGLOG20. 0x7685e000 0x00010000
2319 07:57:07.405828 PMC CRASHLOG21. 0x7685d000 0x00000c00
2320 07:57:07.405864 CPU CRASHLOG22. 0x76859000 0x00003480
2321 07:57:07.405901 SMBIOS 23. 0x76858000 0x00001000
2322 07:57:07.405937 IMD small region:
2323 07:57:07.405974 IMD ROOT 0. 0x76ffec00 0x00000400
2324 07:57:07.406012 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2325 07:57:07.406049 VPD 2. 0x76ffeb80 0x00000058
2326 07:57:07.406087 POWER STATE 3. 0x76ffeb20 0x00000044
2327 07:57:07.406123 ROMSTAGE 4. 0x76ffeb00 0x00000004
2328 07:57:07.406159 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2329 07:57:07.406195 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2330 07:57:07.406232 BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms
2331 07:57:07.406270 MTRR: Physical address space:
2332 07:57:07.406307 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2333 07:57:07.406346 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2334 07:57:07.406386 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2335 07:57:07.406425 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2336 07:57:07.406463 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2337 07:57:07.406501 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2338 07:57:07.406554 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2339 07:57:07.406605 MTRR: Fixed MSR 0x250 0x0606060606060606
2340 07:57:07.406642 MTRR: Fixed MSR 0x258 0x0606060606060606
2341 07:57:07.406679 MTRR: Fixed MSR 0x259 0x0000000000000000
2342 07:57:07.406716 MTRR: Fixed MSR 0x268 0x0606060606060606
2343 07:57:07.406754 MTRR: Fixed MSR 0x269 0x0606060606060606
2344 07:57:07.406790 MTRR: Fixed MSR 0x26a 0x0606060606060606
2345 07:57:07.406826 MTRR: Fixed MSR 0x26b 0x0606060606060606
2346 07:57:07.406863 MTRR: Fixed MSR 0x26c 0x0606060606060606
2347 07:57:07.406899 MTRR: Fixed MSR 0x26d 0x0606060606060606
2348 07:57:07.406936 MTRR: Fixed MSR 0x26e 0x0606060606060606
2349 07:57:07.406973 MTRR: Fixed MSR 0x26f 0x0606060606060606
2350 07:57:07.407009 call enable_fixed_mtrr()
2351 07:57:07.407046 CPU physical address size: 39 bits
2352 07:57:07.407084 MTRR: default type WB/UC MTRR counts: 6/6.
2353 07:57:07.407121 MTRR: UC selected as default type.
2354 07:57:07.407183 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2355 07:57:07.407239 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2356 07:57:07.407277 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2357 07:57:07.407314 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2358 07:57:07.407351 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2359 07:57:07.407567 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2360 07:57:07.407628 MTRR: Fixed MSR 0x250 0x0606060606060606
2361 07:57:07.407679 MTRR: Fixed MSR 0x258 0x0606060606060606
2362 07:57:07.407728 MTRR: Fixed MSR 0x259 0x0000000000000000
2363 07:57:07.407768 MTRR: Fixed MSR 0x268 0x0606060606060606
2364 07:57:07.407804 MTRR: Fixed MSR 0x269 0x0606060606060606
2365 07:57:07.407842 MTRR: Fixed MSR 0x26a 0x0606060606060606
2366 07:57:07.407882 MTRR: Fixed MSR 0x26b 0x0606060606060606
2367 07:57:07.407919 MTRR: Fixed MSR 0x26c 0x0606060606060606
2368 07:57:07.407957 MTRR: Fixed MSR 0x26d 0x0606060606060606
2369 07:57:07.407994 MTRR: Fixed MSR 0x26e 0x0606060606060606
2370 07:57:07.408032 MTRR: Fixed MSR 0x26f 0x0606060606060606
2371 07:57:07.408071 MTRR: Fixed MSR 0x250 0x0606060606060606
2372 07:57:07.408108 MTRR: Fixed MSR 0x250 0x0606060606060606
2373 07:57:07.408145 MTRR: Fixed MSR 0x258 0x0606060606060606
2374 07:57:07.408182 MTRR: Fixed MSR 0x259 0x0000000000000000
2375 07:57:07.408218 MTRR: Fixed MSR 0x268 0x0606060606060606
2376 07:57:07.408256 MTRR: Fixed MSR 0x269 0x0606060606060606
2377 07:57:07.408296 MTRR: Fixed MSR 0x250 0x0606060606060606
2378 07:57:07.408333 MTRR: Fixed MSR 0x258 0x0606060606060606
2379 07:57:07.408369 MTRR: Fixed MSR 0x259 0x0000000000000000
2380 07:57:07.408406 MTRR: Fixed MSR 0x268 0x0606060606060606
2381 07:57:07.408442 MTRR: Fixed MSR 0x269 0x0606060606060606
2382 07:57:07.408478 MTRR: Fixed MSR 0x26a 0x0606060606060606
2383 07:57:07.408527 MTRR: Fixed MSR 0x26b 0x0606060606060606
2384 07:57:07.408568 MTRR: Fixed MSR 0x26c 0x0606060606060606
2385 07:57:07.408606 MTRR: Fixed MSR 0x26d 0x0606060606060606
2386 07:57:07.408644 MTRR: Fixed MSR 0x26e 0x0606060606060606
2387 07:57:07.408680 MTRR: Fixed MSR 0x26f 0x0606060606060606
2388 07:57:07.408718 MTRR: Fixed MSR 0x250 0x0606060606060606
2389 07:57:07.408755 MTRR: Fixed MSR 0x258 0x0606060606060606
2390 07:57:07.408792 MTRR: Fixed MSR 0x250 0x0606060606060606
2391 07:57:07.408829 MTRR: Fixed MSR 0x259 0x0000000000000000
2392 07:57:07.408866 MTRR: Fixed MSR 0x268 0x0606060606060606
2393 07:57:07.408913 MTRR: Fixed MSR 0x269 0x0606060606060606
2394 07:57:07.408957 MTRR: Fixed MSR 0x258 0x0606060606060606
2395 07:57:07.408995 MTRR: Fixed MSR 0x259 0x0000000000000000
2396 07:57:07.409032 MTRR: Fixed MSR 0x268 0x0606060606060606
2397 07:57:07.409069 MTRR: Fixed MSR 0x269 0x0606060606060606
2398 07:57:07.409106 MTRR: Fixed MSR 0x26a 0x0606060606060606
2399 07:57:07.409143 MTRR: Fixed MSR 0x26b 0x0606060606060606
2400 07:57:07.409180 MTRR: Fixed MSR 0x26c 0x0606060606060606
2401 07:57:07.409223 MTRR: Fixed MSR 0x26d 0x0606060606060606
2402 07:57:07.409260 MTRR: Fixed MSR 0x26e 0x0606060606060606
2403 07:57:07.409297 MTRR: Fixed MSR 0x26f 0x0606060606060606
2404 07:57:07.409334 MTRR: Fixed MSR 0x258 0x0606060606060606
2405 07:57:07.409371 call enable_fixed_mtrr()
2406 07:57:07.409407 call enable_fixed_mtrr()
2407 07:57:07.409444 CPU physical address size: 39 bits
2408 07:57:07.409481 MTRR: Fixed MSR 0x26a 0x0606060606060606
2409 07:57:07.409517 MTRR: Fixed MSR 0x259 0x0000000000000000
2410 07:57:07.409552 CPU physical address size: 39 bits
2411 07:57:07.409589 MTRR: Fixed MSR 0x250 0x0606060606060606
2412 07:57:07.409624 MTRR: Fixed MSR 0x26a 0x0606060606060606
2413 07:57:07.409662 MTRR: Fixed MSR 0x268 0x0606060606060606
2414 07:57:07.409699 MTRR: Fixed MSR 0x26b 0x0606060606060606
2415 07:57:07.409735 MTRR: Fixed MSR 0x26c 0x0606060606060606
2416 07:57:07.409773 MTRR: Fixed MSR 0x26d 0x0606060606060606
2417 07:57:07.409810 MTRR: Fixed MSR 0x26e 0x0606060606060606
2418 07:57:07.409846 MTRR: Fixed MSR 0x26f 0x0606060606060606
2419 07:57:07.409883 MTRR: Fixed MSR 0x258 0x0606060606060606
2420 07:57:07.409920 call enable_fixed_mtrr()
2421 07:57:07.409956 MTRR: Fixed MSR 0x259 0x0000000000000000
2422 07:57:07.409993 MTRR: Fixed MSR 0x268 0x0606060606060606
2423 07:57:07.410029 MTRR: Fixed MSR 0x269 0x0606060606060606
2424 07:57:07.410066 CPU physical address size: 39 bits
2425 07:57:07.410103 MTRR: Fixed MSR 0x26b 0x0606060606060606
2426 07:57:07.410140 MTRR: Fixed MSR 0x269 0x0606060606060606
2427 07:57:07.410176 MTRR: Fixed MSR 0x26c 0x0606060606060606
2428 07:57:07.410213 MTRR: Fixed MSR 0x26d 0x0606060606060606
2429 07:57:07.410250 MTRR: Fixed MSR 0x26e 0x0606060606060606
2430 07:57:07.410287 MTRR: Fixed MSR 0x26f 0x0606060606060606
2431 07:57:07.410324 MTRR: Fixed MSR 0x26a 0x0606060606060606
2432 07:57:07.410361 call enable_fixed_mtrr()
2433 07:57:07.410397 MTRR: Fixed MSR 0x26a 0x0606060606060606
2434 07:57:07.410434 MTRR: Fixed MSR 0x26b 0x0606060606060606
2435 07:57:07.410470 MTRR: Fixed MSR 0x26c 0x0606060606060606
2436 07:57:07.410507 MTRR: Fixed MSR 0x26d 0x0606060606060606
2437 07:57:07.410545 MTRR: Fixed MSR 0x26e 0x0606060606060606
2438 07:57:07.410582 MTRR: Fixed MSR 0x26f 0x0606060606060606
2439 07:57:07.410620 MTRR: Fixed MSR 0x26b 0x0606060606060606
2440 07:57:07.410656 CPU physical address size: 39 bits
2441 07:57:07.410693 MTRR: Fixed MSR 0x26c 0x0606060606060606
2442 07:57:07.410729 call enable_fixed_mtrr()
2443 07:57:07.410765 MTRR: Fixed MSR 0x26d 0x0606060606060606
2444 07:57:07.410803 MTRR: Fixed MSR 0x26e 0x0606060606060606
2445 07:57:07.410840 MTRR: Fixed MSR 0x26f 0x0606060606060606
2446 07:57:07.410877 call enable_fixed_mtrr()
2447 07:57:07.410914 call enable_fixed_mtrr()
2448 07:57:07.410951 CPU physical address size: 39 bits
2449 07:57:07.410989 CPU physical address size: 39 bits
2450 07:57:07.411027 CPU physical address size: 39 bits
2451 07:57:07.411064
2452 07:57:07.411101 MTRR check
2453 07:57:07.411138 Fixed MTRRs : Enabled
2454 07:57:07.411179 Variable MTRRs: Enabled
2455 07:57:07.411217
2456 07:57:07.411255 BS: BS_WRITE_TABLES exit times (exec / console): 247 / 150 ms
2457 07:57:07.411292 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2458 07:57:07.411330 Checking segment from ROM address 0xffc26dac
2459 07:57:07.411366 Checking segment from ROM address 0xffc26dc8
2460 07:57:07.411402 Loading segment from ROM address 0xffc26dac
2461 07:57:07.411439 code (compression=1)
2462 07:57:07.411651 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2463 07:57:07.411699 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2464 07:57:07.411739 using LZMA
2465 07:57:07.411777 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2466 07:57:07.411816 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2467 07:57:07.411863 Loading segment from ROM address 0xffc26dc8
2468 07:57:07.411906 Entry Point 0x30000000
2469 07:57:07.411944 Loaded segments
2470 07:57:07.411982 BS: BS_PAYLOAD_LOAD run times (exec / console): 87 / 62 ms
2471 07:57:07.412021 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 0 ms
2472 07:57:07.412059 Finalizing chipset.
2473 07:57:07.412095 apm_control: Finalizing SMM.
2474 07:57:07.412133 APMC done.
2475 07:57:07.412170 HECI: CSE device 16.0 is hidden
2476 07:57:07.412207 HECI: CSE device 16.1 is disabled
2477 07:57:07.412244 HECI: CSE device 16.2 is disabled
2478 07:57:07.412281 HECI: CSE device 16.3 is disabled
2479 07:57:07.412318 HECI: CSE device 16.4 is disabled
2480 07:57:07.412355 HECI: CSE device 16.5 is disabled
2481 07:57:07.412393 HECI: CSE device 16.0 is hidden
2482 07:57:07.412429 CSE is disabled, cannot send End-of-Post (EOP) message
2483 07:57:07.412466 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2484 07:57:07.412504 mp_park_aps done after 0 msecs.
2485 07:57:07.412541 Jumping to boot code at 0x30000000(0x76892000)
2486 07:57:07.412578 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2487 07:57:07.412617
2488 07:57:07.412654
2489 07:57:07.412691
2490 07:57:07.412728 Starting depthcharge on Volmar...
2491 07:57:07.412766
2492 07:57:07.412804 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2493 07:57:07.412842
2494 07:57:07.412880 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2495 07:57:07.412918
2496 07:57:07.412955 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2497 07:57:07.412993
2498 07:57:07.413030 configure_storage: Failed to remap 1C:2
2499 07:57:07.413067
2500 07:57:07.413105 Wipe memory regions:
2501 07:57:07.413142
2502 07:57:07.413178 [0x00000000001000, 0x000000000a0000)
2503 07:57:07.413216
2504 07:57:07.413253 [0x00000000100000, 0x00000030000000)
2505 07:57:07.413534 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
2506 07:57:07.413608 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2507 07:57:07.413663 Setting prompt string to ['brya:']
2508 07:57:07.413715 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2509 07:57:07.431401
2510 07:57:07.434636 [0x00000032668e60, 0x00000076858000)
2511 07:57:07.591355
2512 07:57:07.594182 [0x00000100000000, 0x0000027fc00000)
2513 07:57:08.466120
2514 07:57:08.469355 ec_init: CrosEC protocol v3 supported (256, 256)
2515 07:57:09.080592
2516 07:57:09.080727 R8152: Initializing
2517 07:57:09.080786
2518 07:57:09.083414 Version 9 (ocp_data = 6010)
2519 07:57:09.083485
2520 07:57:09.086863 R8152: Done initializing
2521 07:57:09.086937
2522 07:57:09.090166 Adding net device
2523 07:57:09.392053
2524 07:57:09.395571 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2525 07:57:09.395646
2526 07:57:09.395695
2527 07:57:09.395946 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2529 07:57:09.496248 brya: tftpboot 192.168.201.1 14090874/tftp-deploy-h7wl0aww/kernel/bzImage 14090874/tftp-deploy-h7wl0aww/kernel/cmdline 14090874/tftp-deploy-h7wl0aww/ramdisk/ramdisk.cpio.gz
2530 07:57:09.496484 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2531 07:57:09.496569 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2532 07:57:09.501165 tftpboot 192.168.201.1 14090874/tftp-deploy-h7wl0aww/kernel/bzImploy-h7wl0aww/kernel/cmdline 14090874/tftp-deploy-h7wl0aww/ramdisk/ramdisk.cpio.gz
2533 07:57:09.501236
2534 07:57:09.501282 Waiting for link
2535 07:57:09.703739
2536 07:57:09.703878 done.
2537 07:57:09.703939
2538 07:57:09.703988 MAC: 00:e0:4c:68:02:ef
2539 07:57:09.704030
2540 07:57:09.706867 Sending DHCP discover... done.
2541 07:57:09.706928
2542 07:57:09.710432 Waiting for reply... done.
2543 07:57:09.710489
2544 07:57:09.713522 Sending DHCP request... done.
2545 07:57:09.713580
2546 07:57:09.719963 Waiting for reply... done.
2547 07:57:09.720041
2548 07:57:09.720086 My ip is 192.168.201.16
2549 07:57:09.720127
2550 07:57:09.723232 The DHCP server ip is 192.168.201.1
2551 07:57:09.723301
2552 07:57:09.729938 TFTP server IP predefined by user: 192.168.201.1
2553 07:57:09.729994
2554 07:57:09.736530 Bootfile predefined by user: 14090874/tftp-deploy-h7wl0aww/kernel/bzImage
2555 07:57:09.736600
2556 07:57:09.739917 Sending tftp read request... done.
2557 07:57:09.739976
2558 07:57:09.743181 Waiting for the transfer...
2559 07:57:09.743241
2560 07:57:09.971866 00000000 ################################################################
2561 07:57:09.971994
2562 07:57:10.198500 00080000 ################################################################
2563 07:57:10.198627
2564 07:57:10.424941 00100000 ################################################################
2565 07:57:10.425074
2566 07:57:10.651836 00180000 ################################################################
2567 07:57:10.651979
2568 07:57:10.878631 00200000 ################################################################
2569 07:57:10.878754
2570 07:57:11.105316 00280000 ################################################################
2571 07:57:11.105447
2572 07:57:11.331111 00300000 ################################################################
2573 07:57:11.331245
2574 07:57:11.557918 00380000 ################################################################
2575 07:57:11.558043
2576 07:57:11.785054 00400000 ################################################################
2577 07:57:11.785195
2578 07:57:12.011047 00480000 ################################################################
2579 07:57:12.011179
2580 07:57:12.236363 00500000 ################################################################
2581 07:57:12.236496
2582 07:57:12.462190 00580000 ################################################################
2583 07:57:12.462320
2584 07:57:12.689365 00600000 ################################################################
2585 07:57:12.689488
2586 07:57:12.916183 00680000 ################################################################
2587 07:57:12.916319
2588 07:57:13.141655 00700000 ################################################################
2589 07:57:13.141785
2590 07:57:13.366807 00780000 ################################################################
2591 07:57:13.366934
2592 07:57:13.593472 00800000 ################################################################
2593 07:57:13.593600
2594 07:57:13.819836 00880000 ################################################################
2595 07:57:13.819971
2596 07:57:14.046683 00900000 ################################################################
2597 07:57:14.046825
2598 07:57:14.272602 00980000 ################################################################
2599 07:57:14.272737
2600 07:57:14.499636 00a00000 ################################################################
2601 07:57:14.499775
2602 07:57:14.724826 00a80000 ################################################################
2603 07:57:14.724950
2604 07:57:14.951437 00b00000 ################################################################
2605 07:57:14.951578
2606 07:57:15.176963 00b80000 ################################################################
2607 07:57:15.177095
2608 07:57:15.405221 00c00000 ################################################################
2609 07:57:15.405348
2610 07:57:15.631597 00c80000 ################################################################
2611 07:57:15.631735
2612 07:57:15.857690 00d00000 ################################################################
2613 07:57:15.857816
2614 07:57:16.084064 00d80000 ################################################################
2615 07:57:16.084207
2616 07:57:16.310070 00e00000 ################################################################
2617 07:57:16.310192
2618 07:57:16.536306 00e80000 ################################################################
2619 07:57:16.536432
2620 07:57:16.762054 00f00000 ################################################################
2621 07:57:16.762201
2622 07:57:16.988719 00f80000 ################################################################
2623 07:57:16.988860
2624 07:57:17.214723 01000000 ################################################################
2625 07:57:17.214843
2626 07:57:17.443144 01080000 ################################################################
2627 07:57:17.443276
2628 07:57:17.672686 01100000 ################################################################
2629 07:57:17.672826
2630 07:57:17.898897 01180000 ################################################################
2631 07:57:17.899016
2632 07:57:18.125516 01200000 ################################################################
2633 07:57:18.125635
2634 07:57:18.351120 01280000 ################################################################
2635 07:57:18.351246
2636 07:57:18.577618 01300000 ################################################################
2637 07:57:18.577738
2638 07:57:18.806826 01380000 ################################################################
2639 07:57:18.806947
2640 07:57:19.034343 01400000 ################################################################
2641 07:57:19.034461
2642 07:57:19.261086 01480000 ################################################################
2643 07:57:19.261221
2644 07:57:19.487486 01500000 ################################################################
2645 07:57:19.487604
2646 07:57:19.623358 01580000 ####################################### done.
2647 07:57:19.623488
2648 07:57:19.626580 The bootfile was 22859904 bytes long.
2649 07:57:19.626642
2650 07:57:19.629851 Sending tftp read request... done.
2651 07:57:19.632849
2652 07:57:19.632907 Waiting for the transfer...
2653 07:57:19.632953
2654 07:57:19.862779 00000000 ################################################################
2655 07:57:19.862919
2656 07:57:20.088627 00080000 ################################################################
2657 07:57:20.088762
2658 07:57:20.314912 00100000 ################################################################
2659 07:57:20.315038
2660 07:57:20.544357 00180000 ################################################################
2661 07:57:20.544486
2662 07:57:20.771869 00200000 ################################################################
2663 07:57:20.772008
2664 07:57:20.998366 00280000 ################################################################
2665 07:57:20.998485
2666 07:57:21.224448 00300000 ################################################################
2667 07:57:21.224573
2668 07:57:21.450711 00380000 ################################################################
2669 07:57:21.450843
2670 07:57:21.677325 00400000 ################################################################
2671 07:57:21.677456
2672 07:57:21.905082 00480000 ################################################################
2673 07:57:21.905209
2674 07:57:22.132406 00500000 ################################################################
2675 07:57:22.132529
2676 07:57:22.359490 00580000 ################################################################
2677 07:57:22.359621
2678 07:57:22.584993 00600000 ################################################################
2679 07:57:22.585135
2680 07:57:22.810928 00680000 ################################################################
2681 07:57:22.811048
2682 07:57:23.037293 00700000 ################################################################
2683 07:57:23.037429
2684 07:57:23.263566 00780000 ################################################################
2685 07:57:23.263694
2686 07:57:23.490267 00800000 ################################################################
2687 07:57:23.490407
2688 07:57:23.716655 00880000 ################################################################
2689 07:57:23.716783
2690 07:57:23.943953 00900000 ################################################################
2691 07:57:23.944084
2692 07:57:24.169626 00980000 ################################################################
2693 07:57:24.169750
2694 07:57:24.396010 00a00000 ################################################################
2695 07:57:24.396139
2696 07:57:24.623647 00a80000 ################################################################
2697 07:57:24.623770
2698 07:57:24.851310 00b00000 ################################################################
2699 07:57:24.851429
2700 07:57:25.078577 00b80000 ################################################################
2701 07:57:25.078722
2702 07:57:25.267603 00c00000 ####################################################### done.
2703 07:57:25.267728
2704 07:57:25.270817 Sending tftp read request... done.
2705 07:57:25.270895
2706 07:57:25.274151 Waiting for the transfer...
2707 07:57:25.274223
2708 07:57:25.277516 00000000 # done.
2709 07:57:25.277592
2710 07:57:25.284491 Command line loaded dynamically from TFTP file: 14090874/tftp-deploy-h7wl0aww/kernel/cmdline
2711 07:57:25.287777
2712 07:57:25.310700 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14090874/extract-nfsrootfs-c9lje7gu,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
2713 07:57:25.319479
2714 07:57:25.322528 Shutting down all USB controllers.
2715 07:57:25.322947
2716 07:57:25.323221 Removing current net device
2717 07:57:25.323429
2718 07:57:25.325491 Finalizing coreboot
2719 07:57:25.325814
2720 07:57:25.332333 Exiting depthcharge with code 4 at timestamp: 27924901
2721 07:57:25.332833
2722 07:57:25.333090
2723 07:57:25.333289 Starting kernel ...
2724 07:57:25.333480
2725 07:57:25.333664
2726 07:57:25.334761 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2727 07:57:25.335100 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2728 07:57:25.335383 Setting prompt string to ['Linux version [0-9]']
2729 07:57:25.335614 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2730 07:57:25.335847 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2732 08:01:53.335355 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2734 08:01:53.335527 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2736 08:01:53.335657 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2739 08:01:53.335878 end: 2 depthcharge-action (duration 00:05:00) [common]
2741 08:01:53.336101 Cleaning after the job
2742 08:01:53.336251 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/ramdisk
2743 08:01:53.337485 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/kernel
2744 08:01:53.339764 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/nfsrootfs
2745 08:01:53.385807 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14090874/tftp-deploy-h7wl0aww/modules
2746 08:01:53.388794 start: 4.1 power-off (timeout 00:00:30) [common]
2747 08:01:53.388955 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-3', '--port=1', '--command=off']
2748 08:01:54.294038 >> Command sent successfully.
2749 08:01:54.297019 Returned 0 in 0 seconds
2750 08:01:54.397566 end: 4.1 power-off (duration 00:00:01) [common]
2752 08:01:54.398415 start: 4.2 read-feedback (timeout 00:09:59) [common]
2753 08:01:54.399032 Listened to connection for namespace 'common' for up to 1s
2755 08:01:54.399885 Listened to connection for namespace 'common' for up to 1s
2756 08:01:55.399933 Finalising connection for namespace 'common'
2757 08:01:55.400405 Disconnecting from shell: Finalise
2758 08:01:55.400667
2759 08:01:55.501305 end: 4.2 read-feedback (duration 00:00:01) [common]
2760 08:01:55.501682 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14090874
2761 08:01:55.684637 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14090874
2762 08:01:55.684828 JobError: Your job cannot terminate cleanly.