Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 11:50:33.600662 lava-dispatcher, installed at version: 2024.03
2 11:50:33.600902 start: 0 validate
3 11:50:33.601052 Start time: 2024-06-25 11:50:33.601026+00:00 (UTC)
4 11:50:33.601246 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:50:33.601387 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 11:50:33.860996 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:50:33.861217 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.218-cip49-41-ga1157ad99348c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:50:34.118054 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:50:34.118249 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.218-cip49-41-ga1157ad99348c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Bkselftest%2Fgcc-10%2Fmodules.tar.xz exists
10 11:51:01.203770 validate duration: 27.60
12 11:51:01.204097 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:51:01.204232 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:51:01.204345 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:51:01.204525 Not decompressing ramdisk as can be used compressed.
16 11:51:01.204639 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 11:51:01.204743 saving as /var/lib/lava/dispatcher/tmp/14570589/tftp-deploy-nq46uglg/ramdisk/rootfs.cpio.gz
18 11:51:01.204835 total size: 8417901 (8 MB)
19 11:51:12.180420 progress 0 % (0 MB)
20 11:51:12.183205 progress 5 % (0 MB)
21 11:51:12.185655 progress 10 % (0 MB)
22 11:51:12.187910 progress 15 % (1 MB)
23 11:51:12.190293 progress 20 % (1 MB)
24 11:51:12.192585 progress 25 % (2 MB)
25 11:51:12.194842 progress 30 % (2 MB)
26 11:51:12.196909 progress 35 % (2 MB)
27 11:51:12.199255 progress 40 % (3 MB)
28 11:51:12.201514 progress 45 % (3 MB)
29 11:51:12.203703 progress 50 % (4 MB)
30 11:51:12.205980 progress 55 % (4 MB)
31 11:51:12.208125 progress 60 % (4 MB)
32 11:51:12.210263 progress 65 % (5 MB)
33 11:51:12.212482 progress 70 % (5 MB)
34 11:51:12.214816 progress 75 % (6 MB)
35 11:51:12.217208 progress 80 % (6 MB)
36 11:51:12.219569 progress 85 % (6 MB)
37 11:51:12.221942 progress 90 % (7 MB)
38 11:51:12.224281 progress 95 % (7 MB)
39 11:51:12.226463 progress 100 % (8 MB)
40 11:51:12.226700 8 MB downloaded in 11.02 s (0.73 MB/s)
41 11:51:12.226852 end: 1.1.1 http-download (duration 00:00:11) [common]
43 11:51:12.227066 end: 1.1 download-retry (duration 00:00:11) [common]
44 11:51:12.227147 start: 1.2 download-retry (timeout 00:09:49) [common]
45 11:51:12.227224 start: 1.2.1 http-download (timeout 00:09:49) [common]
46 11:51:12.227359 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.218-cip49-41-ga1157ad99348c/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/kernel/bzImage
47 11:51:12.227421 saving as /var/lib/lava/dispatcher/tmp/14570589/tftp-deploy-nq46uglg/kernel/bzImage
48 11:51:12.227474 total size: 22849664 (21 MB)
49 11:51:12.227528 No compression specified
50 11:51:12.485136 progress 0 % (0 MB)
51 11:51:12.490968 progress 5 % (1 MB)
52 11:51:12.496833 progress 10 % (2 MB)
53 11:51:12.502602 progress 15 % (3 MB)
54 11:51:12.508632 progress 20 % (4 MB)
55 11:51:12.514646 progress 25 % (5 MB)
56 11:51:12.520859 progress 30 % (6 MB)
57 11:51:12.526855 progress 35 % (7 MB)
58 11:51:12.532591 progress 40 % (8 MB)
59 11:51:12.538664 progress 45 % (9 MB)
60 11:51:12.544620 progress 50 % (10 MB)
61 11:51:12.550688 progress 55 % (12 MB)
62 11:51:12.556770 progress 60 % (13 MB)
63 11:51:12.562844 progress 65 % (14 MB)
64 11:51:12.568641 progress 70 % (15 MB)
65 11:51:12.574542 progress 75 % (16 MB)
66 11:51:12.580738 progress 80 % (17 MB)
67 11:51:12.586864 progress 85 % (18 MB)
68 11:51:12.592701 progress 90 % (19 MB)
69 11:51:12.598489 progress 95 % (20 MB)
70 11:51:12.604200 progress 100 % (21 MB)
71 11:51:12.604344 21 MB downloaded in 0.38 s (57.82 MB/s)
72 11:51:12.604491 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:51:12.604710 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:51:12.604792 start: 1.3 download-retry (timeout 00:09:49) [common]
76 11:51:12.604869 start: 1.3.1 http-download (timeout 00:09:49) [common]
77 11:51:12.604995 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.218-cip49-41-ga1157ad99348c/x86_64/x86_64_defconfig+x86-board+kselftest/gcc-10/modules.tar.xz
78 11:51:12.605104 saving as /var/lib/lava/dispatcher/tmp/14570589/tftp-deploy-nq46uglg/modules/modules.tar
79 11:51:12.605159 total size: 4555716 (4 MB)
80 11:51:12.605214 Using unxz to decompress xz
81 11:51:12.855898 progress 0 % (0 MB)
82 11:51:12.865823 progress 5 % (0 MB)
83 11:51:12.880509 progress 10 % (0 MB)
84 11:51:12.894963 progress 15 % (0 MB)
85 11:51:12.908966 progress 20 % (0 MB)
86 11:51:12.923196 progress 25 % (1 MB)
87 11:51:12.939596 progress 30 % (1 MB)
88 11:51:12.954427 progress 35 % (1 MB)
89 11:51:12.969391 progress 40 % (1 MB)
90 11:51:12.983665 progress 45 % (1 MB)
91 11:51:12.997552 progress 50 % (2 MB)
92 11:51:13.010462 progress 55 % (2 MB)
93 11:51:13.025339 progress 60 % (2 MB)
94 11:51:13.039106 progress 65 % (2 MB)
95 11:51:13.053443 progress 70 % (3 MB)
96 11:51:13.067966 progress 75 % (3 MB)
97 11:51:13.079614 progress 80 % (3 MB)
98 11:51:13.093035 progress 85 % (3 MB)
99 11:51:13.109476 progress 90 % (3 MB)
100 11:51:13.123141 progress 95 % (4 MB)
101 11:51:13.139488 progress 100 % (4 MB)
102 11:51:13.143802 4 MB downloaded in 0.54 s (8.07 MB/s)
103 11:51:13.143972 end: 1.3.1 http-download (duration 00:00:01) [common]
105 11:51:13.144188 end: 1.3 download-retry (duration 00:00:01) [common]
106 11:51:13.144267 start: 1.4 prepare-tftp-overlay (timeout 00:09:48) [common]
107 11:51:13.144346 start: 1.4.1 extract-nfsrootfs (timeout 00:09:48) [common]
108 11:51:13.144422 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
109 11:51:13.144502 start: 1.4.2 lava-overlay (timeout 00:09:48) [common]
110 11:51:13.144664 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj
111 11:51:13.144779 makedir: /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin
112 11:51:13.144870 makedir: /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/tests
113 11:51:13.144956 makedir: /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/results
114 11:51:13.145042 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-add-keys
115 11:51:13.145169 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-add-sources
116 11:51:13.145284 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-background-process-start
117 11:51:13.145397 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-background-process-stop
118 11:51:13.145518 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-common-functions
119 11:51:13.145666 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-echo-ipv4
120 11:51:13.145783 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-install-packages
121 11:51:13.145895 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-installed-packages
122 11:51:13.146004 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-os-build
123 11:51:13.146115 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-probe-channel
124 11:51:13.146227 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-probe-ip
125 11:51:13.146339 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-target-ip
126 11:51:13.146449 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-target-mac
127 11:51:13.146559 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-target-storage
128 11:51:13.146671 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-test-case
129 11:51:13.146799 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-test-event
130 11:51:13.146945 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-test-feedback
131 11:51:13.147058 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-test-raise
132 11:51:13.147170 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-test-reference
133 11:51:13.147279 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-test-runner
134 11:51:13.147389 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-test-set
135 11:51:13.147501 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-test-shell
136 11:51:13.147613 Updating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-install-packages (oe)
137 11:51:13.147749 Updating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/bin/lava-installed-packages (oe)
138 11:51:13.147860 Creating /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/environment
139 11:51:13.147944 LAVA metadata
140 11:51:13.148010 - LAVA_JOB_ID=14570589
141 11:51:13.148066 - LAVA_DISPATCHER_IP=192.168.201.1
142 11:51:13.148157 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:48) [common]
143 11:51:13.148214 skipped lava-vland-overlay
144 11:51:13.148281 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
145 11:51:13.148354 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
146 11:51:13.148410 skipped lava-multinode-overlay
147 11:51:13.148476 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
148 11:51:13.148545 start: 1.4.2.3 test-definition (timeout 00:09:48) [common]
149 11:51:13.148605 Loading test definitions
150 11:51:13.148678 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:48) [common]
151 11:51:13.148737 Using /lava-14570589 at stage 0
152 11:51:13.149040 uuid=14570589_1.4.2.3.1 testdef=None
153 11:51:13.149130 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
154 11:51:13.149209 start: 1.4.2.3.2 test-overlay (timeout 00:09:48) [common]
155 11:51:13.149659 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
157 11:51:13.149900 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:48) [common]
158 11:51:13.150514 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
160 11:51:13.150726 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
161 11:51:13.151292 runner path: /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/0/tests/0_dmesg test_uuid 14570589_1.4.2.3.1
162 11:51:13.151437 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
164 11:51:13.151627 Creating lava-test-runner.conf files
165 11:51:13.151684 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14570589/lava-overlay-b302wxlj/lava-14570589/0 for stage 0
166 11:51:13.151764 - 0_dmesg
167 11:51:13.151855 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
168 11:51:13.151933 start: 1.4.2.4 compress-overlay (timeout 00:09:48) [common]
169 11:51:13.158016 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
170 11:51:13.158113 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:48) [common]
171 11:51:13.158193 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
172 11:51:13.158270 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
173 11:51:13.158347 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:48) [common]
174 11:51:13.403710 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
175 11:51:13.403847 start: 1.4.4 extract-modules (timeout 00:09:48) [common]
176 11:51:13.403925 extracting modules file /var/lib/lava/dispatcher/tmp/14570589/tftp-deploy-nq46uglg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14570589/extract-overlay-ramdisk-m_ye92nv/ramdisk
177 11:51:13.513383 end: 1.4.4 extract-modules (duration 00:00:00) [common]
178 11:51:13.513513 start: 1.4.5 apply-overlay-tftp (timeout 00:09:48) [common]
179 11:51:13.513632 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14570589/compress-overlay-jqwl_nfv/overlay-1.4.2.4.tar.gz to ramdisk
180 11:51:13.513692 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14570589/compress-overlay-jqwl_nfv/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14570589/extract-overlay-ramdisk-m_ye92nv/ramdisk
181 11:51:13.520299 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
182 11:51:13.520445 start: 1.4.6 configure-preseed-file (timeout 00:09:48) [common]
183 11:51:13.520539 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
184 11:51:13.520615 start: 1.4.7 compress-ramdisk (timeout 00:09:48) [common]
185 11:51:13.520684 Building ramdisk /var/lib/lava/dispatcher/tmp/14570589/extract-overlay-ramdisk-m_ye92nv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14570589/extract-overlay-ramdisk-m_ye92nv/ramdisk
186 11:51:13.769260 >> 106816 blocks
187 11:51:15.480352 rename /var/lib/lava/dispatcher/tmp/14570589/extract-overlay-ramdisk-m_ye92nv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14570589/tftp-deploy-nq46uglg/ramdisk/ramdisk.cpio.gz
188 11:51:15.480559 end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
189 11:51:15.480657 start: 1.4.8 prepare-kernel (timeout 00:09:46) [common]
190 11:51:15.480735 start: 1.4.8.1 prepare-fit (timeout 00:09:46) [common]
191 11:51:15.480840 No mkimage arch provided, not using FIT.
192 11:51:15.480942 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
193 11:51:15.481054 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
194 11:51:15.481132 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
195 11:51:15.481207 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:46) [common]
196 11:51:15.481279 No LXC device requested
197 11:51:15.481350 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
198 11:51:15.481422 start: 1.6 deploy-device-env (timeout 00:09:46) [common]
199 11:51:15.481492 end: 1.6 deploy-device-env (duration 00:00:00) [common]
200 11:51:15.481557 Checking files for TFTP limit of 4294967296 bytes.
201 11:51:15.481857 end: 1 tftp-deploy (duration 00:00:14) [common]
202 11:51:15.481945 start: 2 depthcharge-action (timeout 00:05:00) [common]
203 11:51:15.482036 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
204 11:51:15.482136 substitutions:
205 11:51:15.482197 - {DTB}: None
206 11:51:15.482265 - {INITRD}: 14570589/tftp-deploy-nq46uglg/ramdisk/ramdisk.cpio.gz
207 11:51:15.482320 - {KERNEL}: 14570589/tftp-deploy-nq46uglg/kernel/bzImage
208 11:51:15.482372 - {LAVA_MAC}: None
209 11:51:15.482424 - {PRESEED_CONFIG}: None
210 11:51:15.482475 - {PRESEED_LOCAL}: None
211 11:51:15.482543 - {RAMDISK}: 14570589/tftp-deploy-nq46uglg/ramdisk/ramdisk.cpio.gz
212 11:51:15.482602 - {ROOT_PART}: None
213 11:51:15.482654 - {ROOT}: None
214 11:51:15.482704 - {SERVER_IP}: 192.168.201.1
215 11:51:15.482765 - {TEE}: None
216 11:51:15.482818 Parsed boot commands:
217 11:51:15.482866 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
218 11:51:15.483016 Parsed boot commands: tftpboot 192.168.201.1 14570589/tftp-deploy-nq46uglg/kernel/bzImage 14570589/tftp-deploy-nq46uglg/kernel/cmdline 14570589/tftp-deploy-nq46uglg/ramdisk/ramdisk.cpio.gz
219 11:51:15.483134 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
220 11:51:15.483244 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
221 11:51:15.483356 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
222 11:51:15.483467 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
223 11:51:15.483553 Not connected, no need to disconnect.
224 11:51:15.483648 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
225 11:51:15.483745 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
226 11:51:15.483830 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-5'
227 11:51:15.487321 Setting prompt string to ['lava-test: # ']
228 11:51:15.487620 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
229 11:51:15.487716 end: 2.2.1 reset-connection (duration 00:00:00) [common]
230 11:51:15.487808 start: 2.2.2 reset-device (timeout 00:05:00) [common]
231 11:51:15.487893 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
232 11:51:15.488059 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-5']
233 11:51:29.037189 Returned 0 in 13 seconds
234 11:51:29.138120 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
236 11:51:29.139422 end: 2.2.2 reset-device (duration 00:00:14) [common]
237 11:51:29.139886 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
238 11:51:29.140314 Setting prompt string to 'Starting depthcharge on Volmar...'
239 11:51:29.140629 Changing prompt to 'Starting depthcharge on Volmar...'
240 11:51:29.140957 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
241 11:51:29.142628 [Enter `^Ec?' for help]
242 11:51:29.143018
243 11:51:29.143421
244 11:51:29.143795 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
245 11:51:29.144177 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
246 11:51:29.144556 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
247 11:51:29.144918 CPU: AES supported, TXT NOT supported, VT supported
248 11:51:29.145334 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
249 11:51:29.145692 Cache size = 10 MiB
250 11:51:29.146139 MCH: device id 4609 (rev 04) is Alderlake-P
251 11:51:29.146585 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
252 11:51:29.147046 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
253 11:51:29.147410 VBOOT: Loading verstage.
254 11:51:29.147772 FMAP: Found "FLASH" version 1.1 at 0x1804000.
255 11:51:29.148136 FMAP: base = 0x0 size = 0x2000000 #areas = 37
256 11:51:29.148526 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
257 11:51:29.148915 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
258 11:51:29.149360 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
259 11:51:29.149850
260 11:51:29.150316
261 11:51:29.150756 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
262 11:51:29.151111 Probing TPM I2C: I2C bus 1 version 0x3230302a
263 11:51:29.151459 DW I2C bus 1 at 0xfe022000 (400 KHz)
264 11:51:29.151803 I2C TX abort detected (00000001)
265 11:51:29.152148 cr50_i2c_read: Address write failed
266 11:51:29.152488 .done! DID_VID 0x00281ae0
267 11:51:29.152834 TPM ready after 0 ms
268 11:51:29.153307 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
269 11:51:29.153749 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
270 11:51:29.154193 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
271 11:51:29.154543 tlcl_send_startup: Startup return code is 0
272 11:51:29.154887 TPM: setup succeeded
273 11:51:29.155230 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
274 11:51:29.155578 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 11:51:29.155922 Chrome EC: UHEPI supported
276 11:51:29.156266 Reading cr50 boot mode
277 11:51:29.156704 Cr50 says boot_mode is VERIFIED_RW(0x00).
278 11:51:29.157166 Phase 1
279 11:51:29.157517 FMAP: area GBB found @ 1805000 (458752 bytes)
280 11:51:29.157866 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
281 11:51:29.158213 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
282 11:51:29.158568 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
283 11:51:29.158917 VB2:vb2_check_recovery() Recovery was requested manually
284 11:51:29.159261 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
285 11:51:29.159603 Recovery requested (1009000e)
286 11:51:29.159943 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
287 11:51:29.160386 tlcl_extend: response is 0
288 11:51:29.160825 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
289 11:51:29.161235 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
290 11:51:29.161587 tlcl_extend: response is 0
291 11:51:29.161929 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
292 11:51:29.162274 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
293 11:51:29.162620 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
294 11:51:29.162965 BS: verstage times (exec / console): total (unknown) / 156 ms
295 11:51:29.163376
296 11:51:29.163719
297 11:51:29.164060 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
298 11:51:29.164406 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 11:51:29.164751 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 11:51:29.165219 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
301 11:51:29.165567 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 11:51:29.166001 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 11:51:29.166445 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
304 11:51:29.166824 TCO_STS: 0000 0000
305 11:51:29.167198 GEN_PMCON: d0015038 00002200
306 11:51:29.167514 GBLRST_CAUSE: 00000000 00000000
307 11:51:29.167702 HPR_CAUSE0: 00000000
308 11:51:29.167884 prev_sleep_state 5
309 11:51:29.168063 Abort disabling TXT, as CPU is not TXT capable.
310 11:51:29.168242 cse_lite: Skip switching to RW in the recovery path
311 11:51:29.168426 Boot Count incremented to 11917
312 11:51:29.168603 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
313 11:51:29.168785 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
314 11:51:29.168969 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
315 11:51:29.169178 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
316 11:51:29.169363 Chrome EC: UHEPI supported
317 11:51:29.169544 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
318 11:51:29.169727 Probing TPM I2C: done! DID_VID 0x00281ae0
319 11:51:29.169910 Locality already claimed
320 11:51:29.170089 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
321 11:51:29.170268 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
322 11:51:29.170450 MRC: Hash idx 0x100b comparison successful.
323 11:51:29.170630 MRC cache found, size f6c8
324 11:51:29.170856 bootmode is set to: 2
325 11:51:29.171039 EC returned error result code 3
326 11:51:29.171218 FW_CONFIG value from CBI is 0x131
327 11:51:29.171397 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
328 11:51:29.171576 SPD index = 0
329 11:51:29.171757 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
330 11:51:29.171938 SPD: module type is LPDDR4X
331 11:51:29.172236 SPD: module part number is K4U6E3S4AB-MGCL
332 11:51:29.172514 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
333 11:51:29.173073 SPD: device width 16 bits, bus width 16 bits
334 11:51:29.173240 SPD: module size is 1024 MB (per channel)
335 11:51:29.173383 CBMEM:
336 11:51:29.173520 IMD: root @ 0x76fff000 254 entries.
337 11:51:29.173658 IMD: root @ 0x76ffec00 62 entries.
338 11:51:29.173795 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
339 11:51:29.173934 RO_VPD is uninitialized or empty.
340 11:51:29.174072 FMAP: area RW_VPD found @ f29000 (8192 bytes)
341 11:51:29.174209 External stage cache:
342 11:51:29.174344 IMD: root @ 0x7bbff000 254 entries.
343 11:51:29.174479 IMD: root @ 0x7bbfec00 62 entries.
344 11:51:29.174615 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
345 11:51:29.174752 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
346 11:51:29.174889 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
347 11:51:29.175026 MRC: 'RECOVERY_MRC_CACHE' does not need update.
348 11:51:29.175164 8 DIMMs found
349 11:51:29.175310 SMM Memory Map
350 11:51:29.175445 SMRAM : 0x7b800000 0x800000
351 11:51:29.175580 Subregion 0: 0x7b800000 0x200000
352 11:51:29.175715 Subregion 1: 0x7ba00000 0x200000
353 11:51:29.175913 Subregion 2: 0x7bc00000 0x400000
354 11:51:29.176053 top_of_ram = 0x77000000
355 11:51:29.176240 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
356 11:51:29.176442 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
357 11:51:29.176634 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
358 11:51:29.176849 MTRR Range: Start=ff000000 End=0 (Size 1000000)
359 11:51:29.177113 Normal boot
360 11:51:29.177274 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
361 11:51:29.177417 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
362 11:51:29.177530 Processing 237 relocs. Offset value of 0x74aba000
363 11:51:29.177640 BS: romstage times (exec / console): total (unknown) / 280 ms
364 11:51:29.177750
365 11:51:29.177858
366 11:51:29.177965 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
367 11:51:29.178076 Normal boot
368 11:51:29.178187 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
369 11:51:29.178297 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
370 11:51:29.178407 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
371 11:51:29.178516 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
372 11:51:29.178626 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
373 11:51:29.178742 Processing 5931 relocs. Offset value of 0x72a30000
374 11:51:29.178851 BS: postcar times (exec / console): total (unknown) / 51 ms
375 11:51:29.178959
376 11:51:29.179067
377 11:51:29.179174 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
378 11:51:29.179283 Reserving BERT start 76a1f000, size 10000
379 11:51:29.179390 Normal boot
380 11:51:29.179499 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
381 11:51:29.179610 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
382 11:51:29.179720 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
383 11:51:29.179828 FMAP: area RW_VPD found @ f29000 (8192 bytes)
384 11:51:29.179937 Google Chrome EC: version:
385 11:51:29.180045 ro: volmar_v2.0.14126-e605144e9c
386 11:51:29.180150 rw: volmar_v0.0.55-22d1557
387 11:51:29.180257 running image: 1
388 11:51:29.180364 ACPI _SWS is PM1 Index 8 GPE Index -1
389 11:51:29.180471 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
390 11:51:29.180579 EC returned error result code 3
391 11:51:29.180686 FW_CONFIG value from CBI is 0x131
392 11:51:29.180794 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
393 11:51:29.180903 PCI: 00:1c.2 disabled by fw_config
394 11:51:29.181020 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
395 11:51:29.181136 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
396 11:51:29.181245 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
397 11:51:29.181354 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
398 11:51:29.181464 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
399 11:51:29.181573 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
400 11:51:29.181682 microcode: sig=0x906a4 pf=0x80 revision=0x423
401 11:51:29.181792 microcode: Update skipped, already up-to-date
402 11:51:29.181900 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
403 11:51:29.182010 Detected 6 core, 8 thread CPU.
404 11:51:29.182119 Setting up SMI for CPU
405 11:51:29.182227 IED base = 0x7bc00000
406 11:51:29.182344 IED size = 0x00400000
407 11:51:29.182433 Will perform SMM setup.
408 11:51:29.182522 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
409 11:51:29.182614 LAPIC 0x0 in XAPIC mode.
410 11:51:29.182704 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
411 11:51:29.182796 Processing 18 relocs. Offset value of 0x00030000
412 11:51:29.182887 Attempting to start 7 APs
413 11:51:29.182977 Waiting for 10ms after sending INIT.
414 11:51:29.183067 Waiting for SIPI to complete...
415 11:51:29.183158 done.
416 11:51:29.183249 LAPIC 0x14 in XAPIC mode.
417 11:51:29.183341 LAPIC 0x10 in XAPIC mode.
418 11:51:29.183431 LAPIC 0x12 in XAPIC mode.
419 11:51:29.183519 LAPIC 0x16 in XAPIC mode.
420 11:51:29.183608 AP: slot 2 apic_id 14, MCU rev: 0x00000423
421 11:51:29.183699 AP: slot 3 apic_id 16, MCU rev: 0x00000423
422 11:51:29.183794 AP: slot 4 apic_id 10, MCU rev: 0x00000423
423 11:51:29.183886 AP: slot 1 apic_id 12, MCU rev: 0x00000423
424 11:51:29.183979 Waiting for SIPI to complete...
425 11:51:29.184070 done.
426 11:51:29.184160 LAPIC 0x9 in XAPIC mode.
427 11:51:29.184251 LAPIC 0x8 in XAPIC mode.
428 11:51:29.184341 AP: slot 5 apic_id 9, MCU rev: 0x00000423
429 11:51:29.184432 LAPIC 0x1 in XAPIC mode.
430 11:51:29.184740 AP: slot 7 apic_id 8, MCU rev: 0x00000423
431 11:51:29.184845 AP: slot 6 apic_id 1, MCU rev: 0x00000423
432 11:51:29.184939 smm_setup_relocation_handler: enter
433 11:51:29.185049 smm_setup_relocation_handler: exit
434 11:51:29.185143 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
435 11:51:29.185235 Processing 11 relocs. Offset value of 0x00038000
436 11:51:29.185327 smm_module_setup_stub: stack_top = 0x7b804000
437 11:51:29.185419 smm_module_setup_stub: per cpu stack_size = 0x800
438 11:51:29.185511 smm_module_setup_stub: runtime.start32_offset = 0x4c
439 11:51:29.185602 smm_module_setup_stub: runtime.smm_size = 0x10000
440 11:51:29.185692 SMM Module: stub loaded at 38000. Will call 0x76a53094
441 11:51:29.185783 Installing permanent SMM handler to 0x7b800000
442 11:51:29.185874 smm_load_module: total_smm_space_needed e468, available -> 200000
443 11:51:29.185965 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
444 11:51:29.186058 Processing 255 relocs. Offset value of 0x7b9f6000
445 11:51:29.186148 smm_load_module: smram_start: 0x7b800000
446 11:51:29.186239 smm_load_module: smram_end: 7ba00000
447 11:51:29.186329 smm_load_module: handler start 0x7b9f6d5f
448 11:51:29.186420 smm_load_module: handler_size 98d0
449 11:51:29.186510 smm_load_module: fxsave_area 0x7b9ff000
450 11:51:29.186600 smm_load_module: fxsave_size 1000
451 11:51:29.186689 smm_load_module: CONFIG_MSEG_SIZE 0x0
452 11:51:29.186779 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
453 11:51:29.186869 smm_load_module: handler_mod_params.smbase = 0x7b800000
454 11:51:29.186960 smm_load_module: per_cpu_save_state_size = 0x400
455 11:51:29.187051 smm_load_module: num_cpus = 0x8
456 11:51:29.187142 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
457 11:51:29.187232 smm_load_module: total_save_state_size = 0x2000
458 11:51:29.187322 smm_load_module: cpu0 entry: 7b9e6000
459 11:51:29.187419 smm_create_map: cpus allowed in one segment 30
460 11:51:29.187497 smm_create_map: min # of segments needed 1
461 11:51:29.187609 CPU 0x0
462 11:51:29.187688 smbase 7b9e6000 entry 7b9ee000
463 11:51:29.187767 ss_start 7b9f5c00 code_end 7b9ee208
464 11:51:29.187846 CPU 0x1
465 11:51:29.187925 smbase 7b9e5c00 entry 7b9edc00
466 11:51:29.188004 ss_start 7b9f5800 code_end 7b9ede08
467 11:51:29.188083 CPU 0x2
468 11:51:29.188161 smbase 7b9e5800 entry 7b9ed800
469 11:51:29.188240 ss_start 7b9f5400 code_end 7b9eda08
470 11:51:29.188319 CPU 0x3
471 11:51:29.188397 smbase 7b9e5400 entry 7b9ed400
472 11:51:29.188476 ss_start 7b9f5000 code_end 7b9ed608
473 11:51:29.188555 CPU 0x4
474 11:51:29.188633 smbase 7b9e5000 entry 7b9ed000
475 11:51:29.188712 ss_start 7b9f4c00 code_end 7b9ed208
476 11:51:29.188789 CPU 0x5
477 11:51:29.188915 smbase 7b9e4c00 entry 7b9ecc00
478 11:51:29.189042 ss_start 7b9f4800 code_end 7b9ece08
479 11:51:29.189128 CPU 0x6
480 11:51:29.189206 smbase 7b9e4800 entry 7b9ec800
481 11:51:29.189290 ss_start 7b9f4400 code_end 7b9eca08
482 11:51:29.189369 CPU 0x7
483 11:51:29.189447 smbase 7b9e4400 entry 7b9ec400
484 11:51:29.189526 ss_start 7b9f4000 code_end 7b9ec608
485 11:51:29.189605 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
486 11:51:29.189685 Processing 11 relocs. Offset value of 0x7b9ee000
487 11:51:29.189764 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
488 11:51:29.189842 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
489 11:51:29.189920 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
490 11:51:29.189998 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
491 11:51:29.190076 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
492 11:51:29.190155 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
493 11:51:29.190234 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
494 11:51:29.190311 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
495 11:51:29.190390 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
496 11:51:29.190468 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
497 11:51:29.190545 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
498 11:51:29.190623 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
499 11:51:29.190703 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
500 11:51:29.190781 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
501 11:51:29.190859 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
502 11:51:29.190938 smm_module_setup_stub: stack_top = 0x7b804000
503 11:51:29.191017 smm_module_setup_stub: per cpu stack_size = 0x800
504 11:51:29.191096 smm_module_setup_stub: runtime.start32_offset = 0x4c
505 11:51:29.191175 smm_module_setup_stub: runtime.smm_size = 0x200000
506 11:51:29.191252 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
507 11:51:29.191333 Clearing SMI status registers
508 11:51:29.191411 SMI_STS: PM1
509 11:51:29.191489 PM1_STS: PWRBTN
510 11:51:29.191568 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
511 11:51:29.191651 In relocation handler: CPU 0
512 11:51:29.191729 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
513 11:51:29.191809 Writing SMRR. base = 0x7b800006, mask=0xff800c00
514 11:51:29.191887 Relocation complete.
515 11:51:29.191965 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
516 11:51:29.192044 In relocation handler: CPU 6
517 11:51:29.192122 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
518 11:51:29.192201 Relocation complete.
519 11:51:29.192506 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
520 11:51:29.192587 In relocation handler: CPU 3
521 11:51:29.192657 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
522 11:51:29.192727 Writing SMRR. base = 0x7b800006, mask=0xff800c00
523 11:51:29.192796 Relocation complete.
524 11:51:29.192864 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
525 11:51:29.192933 In relocation handler: CPU 2
526 11:51:29.193001 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
527 11:51:29.193086 Writing SMRR. base = 0x7b800006, mask=0xff800c00
528 11:51:29.193155 Relocation complete.
529 11:51:29.193225 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
530 11:51:29.193294 In relocation handler: CPU 1
531 11:51:29.193363 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
532 11:51:29.193431 Writing SMRR. base = 0x7b800006, mask=0xff800c00
533 11:51:29.193501 Relocation complete.
534 11:51:29.193568 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
535 11:51:29.193638 In relocation handler: CPU 4
536 11:51:29.193706 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
537 11:51:29.193774 Writing SMRR. base = 0x7b800006, mask=0xff800c00
538 11:51:29.193843 Relocation complete.
539 11:51:29.193912 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
540 11:51:29.193984 In relocation handler: CPU 7
541 11:51:29.194114 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
542 11:51:29.194240 Writing SMRR. base = 0x7b800006, mask=0xff800c00
543 11:51:29.194315 Relocation complete.
544 11:51:29.194386 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
545 11:51:29.194456 In relocation handler: CPU 5
546 11:51:29.194525 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
547 11:51:29.194595 Relocation complete.
548 11:51:29.194663 Initializing CPU #0
549 11:51:29.194731 CPU: vendor Intel device 906a4
550 11:51:29.194799 CPU: family 06, model 9a, stepping 04
551 11:51:29.194868 Clearing out pending MCEs
552 11:51:29.194936 cpu: energy policy set to 7
553 11:51:29.195005 Turbo is available but hidden
554 11:51:29.195074 Turbo is available and visible
555 11:51:29.195143 microcode: Update skipped, already up-to-date
556 11:51:29.195211 CPU #0 initialized
557 11:51:29.195278 Initializing CPU #6
558 11:51:29.195345 Initializing CPU #3
559 11:51:29.195413 Initializing CPU #1
560 11:51:29.195479 Initializing CPU #4
561 11:51:29.195547 CPU: vendor Intel device 906a4
562 11:51:29.195614 CPU: family 06, model 9a, stepping 04
563 11:51:29.195683 CPU: vendor Intel device 906a4
564 11:51:29.195751 CPU: family 06, model 9a, stepping 04
565 11:51:29.195818 Clearing out pending MCEs
566 11:51:29.195885 Clearing out pending MCEs
567 11:51:29.195953 CPU: vendor Intel device 906a4
568 11:51:29.196020 CPU: family 06, model 9a, stepping 04
569 11:51:29.196087 Initializing CPU #7
570 11:51:29.196153 Initializing CPU #2
571 11:51:29.196221 cpu: energy policy set to 7
572 11:51:29.196288 Clearing out pending MCEs
573 11:51:29.196356 microcode: Update skipped, already up-to-date
574 11:51:29.196424 CPU #4 initialized
575 11:51:29.196491 cpu: energy policy set to 7
576 11:51:29.196559 cpu: energy policy set to 7
577 11:51:29.196627 CPU: vendor Intel device 906a4
578 11:51:29.196694 CPU: family 06, model 9a, stepping 04
579 11:51:29.196761 microcode: Update skipped, already up-to-date
580 11:51:29.196830 CPU #3 initialized
581 11:51:29.196898 Clearing out pending MCEs
582 11:51:29.196966 microcode: Update skipped, already up-to-date
583 11:51:29.197053 CPU #1 initialized
584 11:51:29.197123 cpu: energy policy set to 7
585 11:51:29.197192 CPU: vendor Intel device 906a4
586 11:51:29.197263 CPU: family 06, model 9a, stepping 04
587 11:51:29.197330 Initializing CPU #5
588 11:51:29.197403 microcode: Update skipped, already up-to-date
589 11:51:29.197464 CPU #2 initialized
590 11:51:29.197525 Clearing out pending MCEs
591 11:51:29.197586 CPU: vendor Intel device 906a4
592 11:51:29.197647 CPU: family 06, model 9a, stepping 04
593 11:51:29.197708 cpu: energy policy set to 7
594 11:51:29.197769 Clearing out pending MCEs
595 11:51:29.197829 microcode: Update skipped, already up-to-date
596 11:51:29.197890 CPU #7 initialized
597 11:51:29.197950 cpu: energy policy set to 7
598 11:51:29.198009 CPU: vendor Intel device 906a4
599 11:51:29.198069 CPU: family 06, model 9a, stepping 04
600 11:51:29.198130 microcode: Update skipped, already up-to-date
601 11:51:29.198191 CPU #5 initialized
602 11:51:29.198251 Clearing out pending MCEs
603 11:51:29.198311 cpu: energy policy set to 7
604 11:51:29.198371 microcode: Update skipped, already up-to-date
605 11:51:29.198432 CPU #6 initialized
606 11:51:29.198493 bsp_do_flight_plan done after 708 msecs.
607 11:51:29.198553 CPU: frequency set to 4400 MHz
608 11:51:29.198614 Enabling SMIs.
609 11:51:29.198675 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
610 11:51:29.198737 Probing TPM I2C: done! DID_VID 0x00281ae0
611 11:51:29.198798 Locality already claimed
612 11:51:29.198859 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
613 11:51:29.198920 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
614 11:51:29.198983 Enabling GPIO PM b/c CR50 has long IRQ pulse support
615 11:51:29.199045 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
616 11:51:29.199106 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
617 11:51:29.199167 Found a VBT of 9216 bytes after decompression
618 11:51:29.199229 PCI 1.0, PIN A, using IRQ #16
619 11:51:29.199290 PCI 2.0, PIN A, using IRQ #17
620 11:51:29.199351 PCI 4.0, PIN A, using IRQ #18
621 11:51:29.199411 PCI 5.0, PIN A, using IRQ #16
622 11:51:29.199472 PCI 6.0, PIN A, using IRQ #16
623 11:51:29.199533 PCI 6.2, PIN C, using IRQ #18
624 11:51:29.199593 PCI 7.0, PIN A, using IRQ #19
625 11:51:29.199653 PCI 7.1, PIN B, using IRQ #20
626 11:51:29.199713 PCI 7.2, PIN C, using IRQ #21
627 11:51:29.199774 PCI 7.3, PIN D, using IRQ #22
628 11:51:29.199835 PCI 8.0, PIN A, using IRQ #23
629 11:51:29.199896 PCI D.0, PIN A, using IRQ #17
630 11:51:29.199956 PCI D.1, PIN B, using IRQ #19
631 11:51:29.200017 PCI 10.0, PIN A, using IRQ #24
632 11:51:29.200077 PCI 10.1, PIN B, using IRQ #25
633 11:51:29.200138 PCI 10.6, PIN C, using IRQ #20
634 11:51:29.200199 PCI 10.7, PIN D, using IRQ #21
635 11:51:29.200464 PCI 11.0, PIN A, using IRQ #26
636 11:51:29.200533 PCI 11.1, PIN B, using IRQ #27
637 11:51:29.200595 PCI 11.2, PIN C, using IRQ #28
638 11:51:29.200657 PCI 11.3, PIN D, using IRQ #29
639 11:51:29.200718 PCI 12.0, PIN A, using IRQ #30
640 11:51:29.200780 PCI 12.6, PIN B, using IRQ #31
641 11:51:29.200841 PCI 12.7, PIN C, using IRQ #22
642 11:51:29.200903 PCI 13.0, PIN A, using IRQ #32
643 11:51:29.200963 PCI 13.1, PIN B, using IRQ #33
644 11:51:29.201035 PCI 13.2, PIN C, using IRQ #34
645 11:51:29.201098 PCI 13.3, PIN D, using IRQ #35
646 11:51:29.201159 PCI 14.0, PIN B, using IRQ #23
647 11:51:29.201220 PCI 14.1, PIN A, using IRQ #36
648 11:51:29.201279 PCI 14.3, PIN C, using IRQ #17
649 11:51:29.201339 PCI 15.0, PIN A, using IRQ #37
650 11:51:29.201400 PCI 15.1, PIN B, using IRQ #38
651 11:51:29.201461 PCI 15.2, PIN C, using IRQ #39
652 11:51:29.201521 PCI 15.3, PIN D, using IRQ #40
653 11:51:29.201582 PCI 16.0, PIN A, using IRQ #18
654 11:51:29.201642 PCI 16.1, PIN B, using IRQ #19
655 11:51:29.201703 PCI 16.2, PIN C, using IRQ #20
656 11:51:29.201764 PCI 16.3, PIN D, using IRQ #21
657 11:51:29.201824 PCI 16.4, PIN A, using IRQ #18
658 11:51:29.201885 PCI 16.5, PIN B, using IRQ #19
659 11:51:29.201945 PCI 17.0, PIN A, using IRQ #22
660 11:51:29.202005 PCI 19.0, PIN A, using IRQ #41
661 11:51:29.202066 PCI 19.1, PIN B, using IRQ #42
662 11:51:29.202126 PCI 19.2, PIN C, using IRQ #43
663 11:51:29.202187 PCI 1C.0, PIN A, using IRQ #16
664 11:51:29.202247 PCI 1C.1, PIN B, using IRQ #17
665 11:51:29.202308 PCI 1C.2, PIN C, using IRQ #18
666 11:51:29.202377 PCI 1C.3, PIN D, using IRQ #19
667 11:51:29.202431 PCI 1C.4, PIN A, using IRQ #16
668 11:51:29.202486 PCI 1C.5, PIN B, using IRQ #17
669 11:51:29.202541 PCI 1C.6, PIN C, using IRQ #18
670 11:51:29.202595 PCI 1C.7, PIN D, using IRQ #19
671 11:51:29.202649 PCI 1D.0, PIN A, using IRQ #16
672 11:51:29.202703 PCI 1D.1, PIN B, using IRQ #17
673 11:51:29.202759 PCI 1D.2, PIN C, using IRQ #18
674 11:51:29.202814 PCI 1D.3, PIN D, using IRQ #19
675 11:51:29.202870 PCI 1E.0, PIN A, using IRQ #23
676 11:51:29.202924 PCI 1E.1, PIN B, using IRQ #20
677 11:51:29.202979 PCI 1E.2, PIN C, using IRQ #44
678 11:51:29.203033 PCI 1E.3, PIN D, using IRQ #45
679 11:51:29.203089 PCI 1F.3, PIN B, using IRQ #22
680 11:51:29.203147 PCI 1F.4, PIN C, using IRQ #23
681 11:51:29.203208 PCI 1F.6, PIN D, using IRQ #20
682 11:51:29.203264 PCI 1F.7, PIN A, using IRQ #21
683 11:51:29.203318 IRQ: Using dynamically assigned PCI IO-APIC IRQs
684 11:51:29.203375 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
685 11:51:29.203430 FSPS returned 0
686 11:51:29.203485 Executing Phase 1 of FspMultiPhaseSiInit
687 11:51:29.203541 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
688 11:51:29.203598 port C0 DISC req: usage 1 usb3 1 usb2 1
689 11:51:29.203654 Raw Buffer output 0 00000111
690 11:51:29.203709 Raw Buffer output 1 00000000
691 11:51:29.203764 pmc_send_ipc_cmd succeeded
692 11:51:29.203818 port C1 DISC req: usage 1 usb3 3 usb2 3
693 11:51:29.203873 Raw Buffer output 0 00000331
694 11:51:29.203928 Raw Buffer output 1 00000000
695 11:51:29.203982 pmc_send_ipc_cmd succeeded
696 11:51:29.204037 Detected 6 core, 8 thread CPU.
697 11:51:29.204093 Detected 6 core, 8 thread CPU.
698 11:51:29.204148 Detected 6 core, 8 thread CPU.
699 11:51:29.204223 Detected 6 core, 8 thread CPU.
700 11:51:29.204304 Detected 6 core, 8 thread CPU.
701 11:51:29.204381 Detected 6 core, 8 thread CPU.
702 11:51:29.204465 Detected 6 core, 8 thread CPU.
703 11:51:29.204523 Detected 6 core, 8 thread CPU.
704 11:51:29.204579 Detected 6 core, 8 thread CPU.
705 11:51:29.204634 Detected 6 core, 8 thread CPU.
706 11:51:29.204690 Detected 6 core, 8 thread CPU.
707 11:51:29.204744 Detected 6 core, 8 thread CPU.
708 11:51:29.204798 Detected 6 core, 8 thread CPU.
709 11:51:29.204852 Detected 6 core, 8 thread CPU.
710 11:51:29.204907 Detected 6 core, 8 thread CPU.
711 11:51:29.204962 Detected 6 core, 8 thread CPU.
712 11:51:29.205024 Detected 6 core, 8 thread CPU.
713 11:51:29.205082 Detected 6 core, 8 thread CPU.
714 11:51:29.205137 Detected 6 core, 8 thread CPU.
715 11:51:29.205191 Detected 6 core, 8 thread CPU.
716 11:51:29.205245 Detected 6 core, 8 thread CPU.
717 11:51:29.205300 Detected 6 core, 8 thread CPU.
718 11:51:29.205354 Detected 6 core, 8 thread CPU.
719 11:51:29.205409 Detected 6 core, 8 thread CPU.
720 11:51:29.205464 Detected 6 core, 8 thread CPU.
721 11:51:29.205519 Detected 6 core, 8 thread CPU.
722 11:51:29.205573 Detected 6 core, 8 thread CPU.
723 11:51:29.205628 Detected 6 core, 8 thread CPU.
724 11:51:29.205683 Detected 6 core, 8 thread CPU.
725 11:51:29.205738 Detected 6 core, 8 thread CPU.
726 11:51:29.205792 Detected 6 core, 8 thread CPU.
727 11:51:29.205847 Detected 6 core, 8 thread CPU.
728 11:51:29.205902 Detected 6 core, 8 thread CPU.
729 11:51:29.205956 Detected 6 core, 8 thread CPU.
730 11:51:29.206011 Detected 6 core, 8 thread CPU.
731 11:51:29.206066 Detected 6 core, 8 thread CPU.
732 11:51:29.206120 Detected 6 core, 8 thread CPU.
733 11:51:29.206174 Detected 6 core, 8 thread CPU.
734 11:51:29.206229 Detected 6 core, 8 thread CPU.
735 11:51:29.206283 Detected 6 core, 8 thread CPU.
736 11:51:29.206337 Detected 6 core, 8 thread CPU.
737 11:51:29.206390 Detected 6 core, 8 thread CPU.
738 11:51:29.206444 Display FSP Version Info HOB
739 11:51:29.206500 Reference Code - CPU = c.0.65.70
740 11:51:29.206554 uCode Version = 0.0.4.23
741 11:51:29.206609 TXT ACM version = ff.ff.ff.ffff
742 11:51:29.206663 Reference Code - ME = c.0.65.70
743 11:51:29.206718 MEBx version = 0.0.0.0
744 11:51:29.206773 ME Firmware Version = Consumer SKU
745 11:51:29.206828 Reference Code - PCH = c.0.65.70
746 11:51:29.206882 PCH-CRID Status = Disabled
747 11:51:29.206937 PCH-CRID Original Value = ff.ff.ff.ffff
748 11:51:29.206992 PCH-CRID New Value = ff.ff.ff.ffff
749 11:51:29.207047 OPROM - RST - RAID = ff.ff.ff.ffff
750 11:51:29.207102 PCH Hsio Version = 4.0.0.0
751 11:51:29.207156 Reference Code - SA - System Agent = c.0.65.70
752 11:51:29.207211 Reference Code - MRC = 0.0.3.80
753 11:51:29.207267 SA - PCIe Version = c.0.65.70
754 11:51:29.207321 SA-CRID Status = Disabled
755 11:51:29.207387 SA-CRID Original Value = 0.0.0.4
756 11:51:29.207437 SA-CRID New Value = 0.0.0.4
757 11:51:29.207487 OPROM - VBIOS = ff.ff.ff.ffff
758 11:51:29.207735 IO Manageability Engine FW Version = 24.0.4.0
759 11:51:29.207794 PHY Build Version = 0.0.0.2016
760 11:51:29.207845 Thunderbolt(TM) FW Version = 0.0.0.0
761 11:51:29.207896 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
762 11:51:29.207946 BS: BS_DEV_INIT_CHIPS run times (exec / console): 474 / 507 ms
763 11:51:29.207996 Enumerating buses...
764 11:51:29.208046 Show all devs... Before device enumeration.
765 11:51:29.208096 Root Device: enabled 1
766 11:51:29.208145 CPU_CLUSTER: 0: enabled 1
767 11:51:29.208195 DOMAIN: 0000: enabled 1
768 11:51:29.208245 GPIO: 0: enabled 1
769 11:51:29.208295 PCI: 00:00.0: enabled 1
770 11:51:29.208344 PCI: 00:01.0: enabled 0
771 11:51:29.208392 PCI: 00:01.1: enabled 0
772 11:51:29.208441 PCI: 00:02.0: enabled 1
773 11:51:29.208491 PCI: 00:04.0: enabled 1
774 11:51:29.208540 PCI: 00:05.0: enabled 0
775 11:51:29.208589 PCI: 00:06.0: enabled 1
776 11:51:29.208639 PCI: 00:06.2: enabled 0
777 11:51:29.208688 PCI: 00:07.0: enabled 0
778 11:51:29.208737 PCI: 00:07.1: enabled 0
779 11:51:29.208786 PCI: 00:07.2: enabled 0
780 11:51:29.208835 PCI: 00:07.3: enabled 0
781 11:51:29.208884 PCI: 00:08.0: enabled 0
782 11:51:29.208933 PCI: 00:09.0: enabled 0
783 11:51:29.208982 PCI: 00:0a.0: enabled 1
784 11:51:29.209041 PCI: 00:0d.0: enabled 1
785 11:51:29.209092 PCI: 00:0d.1: enabled 0
786 11:51:29.209142 PCI: 00:0d.2: enabled 0
787 11:51:29.209192 PCI: 00:0d.3: enabled 0
788 11:51:29.209241 PCI: 00:0e.0: enabled 0
789 11:51:29.209290 PCI: 00:10.0: enabled 0
790 11:51:29.209339 PCI: 00:10.1: enabled 0
791 11:51:29.209388 PCI: 00:10.6: enabled 0
792 11:51:29.209437 PCI: 00:10.7: enabled 0
793 11:51:29.209486 PCI: 00:12.0: enabled 0
794 11:51:29.209535 PCI: 00:12.6: enabled 0
795 11:51:29.209585 PCI: 00:12.7: enabled 0
796 11:51:29.209635 PCI: 00:13.0: enabled 0
797 11:51:29.209684 PCI: 00:14.0: enabled 1
798 11:51:29.209734 PCI: 00:14.1: enabled 0
799 11:51:29.209782 PCI: 00:14.2: enabled 1
800 11:51:29.209831 PCI: 00:14.3: enabled 1
801 11:51:29.209880 PCI: 00:15.0: enabled 1
802 11:51:29.209929 PCI: 00:15.1: enabled 1
803 11:51:29.209979 PCI: 00:15.2: enabled 0
804 11:51:29.210028 PCI: 00:15.3: enabled 1
805 11:51:29.210078 PCI: 00:16.0: enabled 1
806 11:51:29.210127 PCI: 00:16.1: enabled 0
807 11:51:29.210176 PCI: 00:16.2: enabled 0
808 11:51:29.210225 PCI: 00:16.3: enabled 0
809 11:51:29.210275 PCI: 00:16.4: enabled 0
810 11:51:29.210324 PCI: 00:16.5: enabled 0
811 11:51:29.210374 PCI: 00:17.0: enabled 1
812 11:51:29.210423 PCI: 00:19.0: enabled 0
813 11:51:29.210472 PCI: 00:19.1: enabled 1
814 11:51:29.210520 PCI: 00:19.2: enabled 0
815 11:51:29.210570 PCI: 00:1a.0: enabled 0
816 11:51:29.210619 PCI: 00:1c.0: enabled 0
817 11:51:29.210669 PCI: 00:1c.1: enabled 0
818 11:51:29.210718 PCI: 00:1c.2: enabled 0
819 11:51:29.210767 PCI: 00:1c.3: enabled 0
820 11:51:29.210817 PCI: 00:1c.4: enabled 0
821 11:51:29.210866 PCI: 00:1c.5: enabled 0
822 11:51:29.210915 PCI: 00:1c.6: enabled 0
823 11:51:29.210964 PCI: 00:1c.7: enabled 0
824 11:51:29.211014 PCI: 00:1d.0: enabled 0
825 11:51:29.211064 PCI: 00:1d.1: enabled 0
826 11:51:29.211113 PCI: 00:1d.2: enabled 0
827 11:51:29.211162 PCI: 00:1d.3: enabled 0
828 11:51:29.211211 PCI: 00:1e.0: enabled 1
829 11:51:29.211261 PCI: 00:1e.1: enabled 0
830 11:51:29.211310 PCI: 00:1e.2: enabled 0
831 11:51:29.211359 PCI: 00:1e.3: enabled 1
832 11:51:29.211408 PCI: 00:1f.0: enabled 1
833 11:51:29.211457 PCI: 00:1f.1: enabled 0
834 11:51:29.211506 PCI: 00:1f.2: enabled 1
835 11:51:29.211556 PCI: 00:1f.3: enabled 1
836 11:51:29.211605 PCI: 00:1f.4: enabled 0
837 11:51:29.211655 PCI: 00:1f.5: enabled 1
838 11:51:29.211705 PCI: 00:1f.6: enabled 0
839 11:51:29.211754 PCI: 00:1f.7: enabled 0
840 11:51:29.211803 GENERIC: 0.0: enabled 1
841 11:51:29.211853 GENERIC: 0.0: enabled 1
842 11:51:29.211908 GENERIC: 1.0: enabled 1
843 11:51:29.211965 GENERIC: 0.0: enabled 1
844 11:51:29.212015 GENERIC: 1.0: enabled 1
845 11:51:29.212064 USB0 port 0: enabled 1
846 11:51:29.212113 USB0 port 0: enabled 1
847 11:51:29.212162 GENERIC: 0.0: enabled 1
848 11:51:29.212212 I2C: 00:1a: enabled 1
849 11:51:29.212262 I2C: 00:31: enabled 1
850 11:51:29.212311 I2C: 00:32: enabled 1
851 11:51:29.212372 I2C: 00:50: enabled 1
852 11:51:29.212420 I2C: 00:10: enabled 1
853 11:51:29.212468 I2C: 00:15: enabled 1
854 11:51:29.212516 I2C: 00:2c: enabled 1
855 11:51:29.212565 GENERIC: 0.0: enabled 1
856 11:51:29.212614 SPI: 00: enabled 1
857 11:51:29.212662 PNP: 0c09.0: enabled 1
858 11:51:29.212710 GENERIC: 0.0: enabled 1
859 11:51:29.212758 USB3 port 0: enabled 1
860 11:51:29.212806 USB3 port 1: enabled 0
861 11:51:29.212854 USB3 port 2: enabled 1
862 11:51:29.212901 USB3 port 3: enabled 0
863 11:51:29.212949 USB2 port 0: enabled 1
864 11:51:29.213026 USB2 port 1: enabled 0
865 11:51:29.213092 USB2 port 2: enabled 1
866 11:51:29.213141 USB2 port 3: enabled 0
867 11:51:29.213189 USB2 port 4: enabled 0
868 11:51:29.213237 USB2 port 5: enabled 1
869 11:51:29.213285 USB2 port 6: enabled 0
870 11:51:29.213333 USB2 port 7: enabled 0
871 11:51:29.213381 USB2 port 8: enabled 1
872 11:51:29.213430 USB2 port 9: enabled 1
873 11:51:29.213477 USB3 port 0: enabled 1
874 11:51:29.213547 USB3 port 1: enabled 0
875 11:51:29.213598 USB3 port 2: enabled 0
876 11:51:29.213646 USB3 port 3: enabled 0
877 11:51:29.213694 GENERIC: 0.0: enabled 1
878 11:51:29.213743 GENERIC: 1.0: enabled 1
879 11:51:29.213793 APIC: 00: enabled 1
880 11:51:29.213841 APIC: 12: enabled 1
881 11:51:29.213889 APIC: 14: enabled 1
882 11:51:29.213937 APIC: 16: enabled 1
883 11:51:29.213986 APIC: 10: enabled 1
884 11:51:29.214034 APIC: 09: enabled 1
885 11:51:29.214083 APIC: 01: enabled 1
886 11:51:29.214132 APIC: 08: enabled 1
887 11:51:29.214180 Compare with tree...
888 11:51:29.214229 Root Device: enabled 1
889 11:51:29.214277 CPU_CLUSTER: 0: enabled 1
890 11:51:29.214325 APIC: 00: enabled 1
891 11:51:29.214373 APIC: 12: enabled 1
892 11:51:29.214421 APIC: 14: enabled 1
893 11:51:29.214469 APIC: 16: enabled 1
894 11:51:29.214518 APIC: 10: enabled 1
895 11:51:29.214566 APIC: 09: enabled 1
896 11:51:29.214614 APIC: 01: enabled 1
897 11:51:29.214661 APIC: 08: enabled 1
898 11:51:29.214709 DOMAIN: 0000: enabled 1
899 11:51:29.214758 GPIO: 0: enabled 1
900 11:51:29.214806 PCI: 00:00.0: enabled 1
901 11:51:29.214854 PCI: 00:01.0: enabled 0
902 11:51:29.214902 PCI: 00:01.1: enabled 0
903 11:51:29.214950 PCI: 00:02.0: enabled 1
904 11:51:29.214998 PCI: 00:04.0: enabled 1
905 11:51:29.215047 GENERIC: 0.0: enabled 1
906 11:51:29.215095 PCI: 00:05.0: enabled 0
907 11:51:29.215143 PCI: 00:06.0: enabled 1
908 11:51:29.215191 PCI: 00:06.2: enabled 0
909 11:51:29.215239 PCI: 00:08.0: enabled 0
910 11:51:29.215288 PCI: 00:09.0: enabled 0
911 11:51:29.215336 PCI: 00:0a.0: enabled 1
912 11:51:29.215384 PCI: 00:0d.0: enabled 1
913 11:51:29.215432 USB0 port 0: enabled 1
914 11:51:29.215481 USB3 port 0: enabled 1
915 11:51:29.215530 USB3 port 1: enabled 0
916 11:51:29.215578 USB3 port 2: enabled 1
917 11:51:29.215627 USB3 port 3: enabled 0
918 11:51:29.215675 PCI: 00:0d.1: enabled 0
919 11:51:29.215928 PCI: 00:0d.2: enabled 0
920 11:51:29.215988 PCI: 00:0d.3: enabled 0
921 11:51:29.216038 PCI: 00:0e.0: enabled 0
922 11:51:29.216087 PCI: 00:10.0: enabled 0
923 11:51:29.216136 PCI: 00:10.1: enabled 0
924 11:51:29.216184 PCI: 00:10.6: enabled 0
925 11:51:29.216233 PCI: 00:10.7: enabled 0
926 11:51:29.216281 PCI: 00:12.0: enabled 0
927 11:51:29.216330 PCI: 00:12.6: enabled 0
928 11:51:29.216379 PCI: 00:12.7: enabled 0
929 11:51:29.216428 PCI: 00:13.0: enabled 0
930 11:51:29.216476 PCI: 00:14.0: enabled 1
931 11:51:29.216525 USB0 port 0: enabled 1
932 11:51:29.216573 USB2 port 0: enabled 1
933 11:51:29.216622 USB2 port 1: enabled 0
934 11:51:29.216670 USB2 port 2: enabled 1
935 11:51:29.216719 USB2 port 3: enabled 0
936 11:51:29.216767 USB2 port 4: enabled 0
937 11:51:29.216815 USB2 port 5: enabled 1
938 11:51:29.216862 USB2 port 6: enabled 0
939 11:51:29.216911 USB2 port 7: enabled 0
940 11:51:29.216959 USB2 port 8: enabled 1
941 11:51:29.217010 USB2 port 9: enabled 1
942 11:51:29.217112 USB3 port 0: enabled 1
943 11:51:29.217161 USB3 port 1: enabled 0
944 11:51:29.217209 USB3 port 2: enabled 0
945 11:51:29.217256 USB3 port 3: enabled 0
946 11:51:29.217304 PCI: 00:14.1: enabled 0
947 11:51:29.217351 PCI: 00:14.2: enabled 1
948 11:51:29.217400 PCI: 00:14.3: enabled 1
949 11:51:29.217448 GENERIC: 0.0: enabled 1
950 11:51:29.217496 PCI: 00:15.0: enabled 1
951 11:51:29.217544 I2C: 00:1a: enabled 1
952 11:51:29.217592 I2C: 00:31: enabled 1
953 11:51:29.217639 I2C: 00:32: enabled 1
954 11:51:29.217687 PCI: 00:15.1: enabled 1
955 11:51:29.217735 I2C: 00:50: enabled 1
956 11:51:29.217786 PCI: 00:15.2: enabled 0
957 11:51:29.217848 PCI: 00:15.3: enabled 1
958 11:51:29.217897 I2C: 00:10: enabled 1
959 11:51:29.217946 PCI: 00:16.0: enabled 1
960 11:51:29.217994 PCI: 00:16.1: enabled 0
961 11:51:29.218043 PCI: 00:16.2: enabled 0
962 11:51:29.218091 PCI: 00:16.3: enabled 0
963 11:51:29.218140 PCI: 00:16.4: enabled 0
964 11:51:29.218188 PCI: 00:16.5: enabled 0
965 11:51:29.218236 PCI: 00:17.0: enabled 1
966 11:51:29.218285 PCI: 00:19.0: enabled 0
967 11:51:29.218333 PCI: 00:19.1: enabled 1
968 11:51:29.218380 I2C: 00:15: enabled 1
969 11:51:29.218429 I2C: 00:2c: enabled 1
970 11:51:29.218477 PCI: 00:19.2: enabled 0
971 11:51:29.218526 PCI: 00:1a.0: enabled 0
972 11:51:29.218574 PCI: 00:1e.0: enabled 1
973 11:51:29.218622 PCI: 00:1e.1: enabled 0
974 11:51:29.218670 PCI: 00:1e.2: enabled 0
975 11:51:29.218752 PCI: 00:1e.3: enabled 1
976 11:51:29.218800 SPI: 00: enabled 1
977 11:51:29.218848 PCI: 00:1f.0: enabled 1
978 11:51:29.218896 PNP: 0c09.0: enabled 1
979 11:51:29.218945 PCI: 00:1f.1: enabled 0
980 11:51:29.218993 PCI: 00:1f.2: enabled 1
981 11:51:29.219042 GENERIC: 0.0: enabled 1
982 11:51:29.219090 GENERIC: 0.0: enabled 1
983 11:51:29.219138 GENERIC: 1.0: enabled 1
984 11:51:29.219186 PCI: 00:1f.3: enabled 1
985 11:51:29.219235 PCI: 00:1f.4: enabled 0
986 11:51:29.219284 PCI: 00:1f.5: enabled 1
987 11:51:29.219332 PCI: 00:1f.6: enabled 0
988 11:51:29.219380 PCI: 00:1f.7: enabled 0
989 11:51:29.219428 Root Device scanning...
990 11:51:29.219476 scan_static_bus for Root Device
991 11:51:29.219525 CPU_CLUSTER: 0 enabled
992 11:51:29.219573 DOMAIN: 0000 enabled
993 11:51:29.219653 DOMAIN: 0000 scanning...
994 11:51:29.219701 PCI: pci_scan_bus for bus 00
995 11:51:29.219748 PCI: 00:00.0 [8086/0000] ops
996 11:51:29.219821 PCI: 00:00.0 [8086/4609] enabled
997 11:51:29.219885 PCI: 00:02.0 [8086/0000] bus ops
998 11:51:29.219933 PCI: 00:02.0 [8086/46b3] enabled
999 11:51:29.219982 PCI: 00:04.0 [8086/0000] bus ops
1000 11:51:29.220030 PCI: 00:04.0 [8086/461d] enabled
1001 11:51:29.220079 PCI: 00:06.0 [8086/0000] bus ops
1002 11:51:29.220127 PCI: 00:06.0 [8086/464d] enabled
1003 11:51:29.220175 PCI: 00:08.0 [8086/464f] disabled
1004 11:51:29.220223 PCI: 00:0a.0 [8086/467d] enabled
1005 11:51:29.220271 PCI: 00:0d.0 [8086/0000] bus ops
1006 11:51:29.220319 PCI: 00:0d.0 [8086/461e] enabled
1007 11:51:29.220367 PCI: 00:14.0 [8086/0000] bus ops
1008 11:51:29.220415 PCI: 00:14.0 [8086/51ed] enabled
1009 11:51:29.220464 PCI: 00:14.2 [8086/51ef] enabled
1010 11:51:29.220514 PCI: 00:14.3 [8086/0000] bus ops
1011 11:51:29.220563 PCI: 00:14.3 [8086/51f0] enabled
1012 11:51:29.220611 PCI: 00:15.0 [8086/0000] bus ops
1013 11:51:29.220659 PCI: 00:15.0 [8086/51e8] enabled
1014 11:51:29.220708 PCI: 00:15.1 [8086/0000] bus ops
1015 11:51:29.220756 PCI: 00:15.1 [8086/51e9] enabled
1016 11:51:29.220804 PCI: 00:15.2 [8086/0000] bus ops
1017 11:51:29.220853 PCI: 00:15.2 [8086/51ea] disabled
1018 11:51:29.220901 PCI: 00:15.3 [8086/0000] bus ops
1019 11:51:29.220949 PCI: 00:15.3 [8086/51eb] enabled
1020 11:51:29.220998 PCI: 00:16.0 [8086/0000] ops
1021 11:51:29.221087 PCI: 00:16.0 [8086/51e0] enabled
1022 11:51:29.221139 PCI: Static device PCI: 00:17.0 not found, disabling it.
1023 11:51:29.221189 PCI: 00:19.0 [8086/0000] bus ops
1024 11:51:29.221237 PCI: 00:19.0 [8086/51c5] disabled
1025 11:51:29.221286 PCI: 00:19.1 [8086/0000] bus ops
1026 11:51:29.221334 PCI: 00:19.1 [8086/51c6] enabled
1027 11:51:29.221382 PCI: 00:1e.0 [8086/0000] ops
1028 11:51:29.221431 PCI: 00:1e.0 [8086/51a8] enabled
1029 11:51:29.221479 PCI: 00:1e.3 [8086/0000] bus ops
1030 11:51:29.221527 PCI: 00:1e.3 [8086/51ab] enabled
1031 11:51:29.221575 PCI: 00:1f.0 [8086/0000] bus ops
1032 11:51:29.221624 PCI: 00:1f.0 [8086/5182] enabled
1033 11:51:29.221673 RTC Init
1034 11:51:29.221722 Set power on after power failure.
1035 11:51:29.221770 Disabling Deep S3
1036 11:51:29.221822 Disabling Deep S3
1037 11:51:29.221872 Disabling Deep S4
1038 11:51:29.221921 Disabling Deep S4
1039 11:51:29.221969 Disabling Deep S5
1040 11:51:29.222017 Disabling Deep S5
1041 11:51:29.222065 PCI: 00:1f.2 [0000/0000] hidden
1042 11:51:29.222114 PCI: 00:1f.3 [8086/0000] bus ops
1043 11:51:29.222162 PCI: 00:1f.3 [8086/51c8] enabled
1044 11:51:29.222210 PCI: 00:1f.5 [8086/0000] bus ops
1045 11:51:29.222258 PCI: 00:1f.5 [8086/51a4] enabled
1046 11:51:29.222306 GPIO: 0 enabled
1047 11:51:29.222354 PCI: Leftover static devices:
1048 11:51:29.222403 PCI: 00:01.0
1049 11:51:29.222451 PCI: 00:01.1
1050 11:51:29.222499 PCI: 00:05.0
1051 11:51:29.222546 PCI: 00:06.2
1052 11:51:29.222594 PCI: 00:09.0
1053 11:51:29.222642 PCI: 00:0d.1
1054 11:51:29.222690 PCI: 00:0d.2
1055 11:51:29.222737 PCI: 00:0d.3
1056 11:51:29.222785 PCI: 00:0e.0
1057 11:51:29.222833 PCI: 00:10.0
1058 11:51:29.222881 PCI: 00:10.1
1059 11:51:29.222929 PCI: 00:10.6
1060 11:51:29.222977 PCI: 00:10.7
1061 11:51:29.223025 PCI: 00:12.0
1062 11:51:29.223073 PCI: 00:12.6
1063 11:51:29.223121 PCI: 00:12.7
1064 11:51:29.223169 PCI: 00:13.0
1065 11:51:29.223217 PCI: 00:14.1
1066 11:51:29.223264 PCI: 00:16.1
1067 11:51:29.223312 PCI: 00:16.2
1068 11:51:29.223359 PCI: 00:16.3
1069 11:51:29.223407 PCI: 00:16.4
1070 11:51:29.223455 PCI: 00:16.5
1071 11:51:29.223503 PCI: 00:17.0
1072 11:51:29.223550 PCI: 00:19.2
1073 11:51:29.223789 PCI: 00:1a.0
1074 11:51:29.223843 PCI: 00:1e.1
1075 11:51:29.223891 PCI: 00:1e.2
1076 11:51:29.223940 PCI: 00:1f.1
1077 11:51:29.223988 PCI: 00:1f.4
1078 11:51:29.224036 PCI: 00:1f.6
1079 11:51:29.224084 PCI: 00:1f.7
1080 11:51:29.224132 PCI: Check your devicetree.cb.
1081 11:51:29.224182 PCI: 00:02.0 scanning...
1082 11:51:29.224231 scan_generic_bus for PCI: 00:02.0
1083 11:51:29.224280 scan_generic_bus for PCI: 00:02.0 done
1084 11:51:29.224329 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1085 11:51:29.224378 PCI: 00:04.0 scanning...
1086 11:51:29.224426 scan_generic_bus for PCI: 00:04.0
1087 11:51:29.224475 GENERIC: 0.0 enabled
1088 11:51:29.224524 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1089 11:51:29.224574 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1090 11:51:29.224623 PCI: 00:06.0 scanning...
1091 11:51:29.224671 do_pci_scan_bridge for PCI: 00:06.0
1092 11:51:29.224720 PCI: pci_scan_bus for bus 01
1093 11:51:29.224769 PCI: 01:00.0 [15b7/5009] enabled
1094 11:51:29.224818 Enabling Common Clock Configuration
1095 11:51:29.224867 L1 Sub-State supported from root port 6
1096 11:51:29.224917 L1 Sub-State Support = 0x5
1097 11:51:29.224966 CommonModeRestoreTime = 0x6e
1098 11:51:29.225022 Power On Value = 0x5, Power On Scale = 0x2
1099 11:51:29.225107 ASPM: Enabled L1
1100 11:51:29.225156 PCIe: Max_Payload_Size adjusted to 256
1101 11:51:29.225206 PCI: 01:00.0: Enabled LTR
1102 11:51:29.225254 PCI: 01:00.0: Programmed LTR max latencies
1103 11:51:29.225303 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1104 11:51:29.225352 PCI: 00:0d.0 scanning...
1105 11:51:29.225400 scan_static_bus for PCI: 00:0d.0
1106 11:51:29.225449 USB0 port 0 enabled
1107 11:51:29.225497 USB0 port 0 scanning...
1108 11:51:29.225546 scan_static_bus for USB0 port 0
1109 11:51:29.225595 USB3 port 0 enabled
1110 11:51:29.225643 USB3 port 1 disabled
1111 11:51:29.225691 USB3 port 2 enabled
1112 11:51:29.225739 USB3 port 3 disabled
1113 11:51:29.225787 USB3 port 0 scanning...
1114 11:51:29.225852 scan_static_bus for USB3 port 0
1115 11:51:29.225903 scan_static_bus for USB3 port 0 done
1116 11:51:29.225953 scan_bus: bus USB3 port 0 finished in 6 msecs
1117 11:51:29.226002 USB3 port 2 scanning...
1118 11:51:29.226050 scan_static_bus for USB3 port 2
1119 11:51:29.226099 scan_static_bus for USB3 port 2 done
1120 11:51:29.226147 scan_bus: bus USB3 port 2 finished in 6 msecs
1121 11:51:29.226196 scan_static_bus for USB0 port 0 done
1122 11:51:29.226244 scan_bus: bus USB0 port 0 finished in 43 msecs
1123 11:51:29.226293 scan_static_bus for PCI: 00:0d.0 done
1124 11:51:29.226341 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1125 11:51:29.226390 PCI: 00:14.0 scanning...
1126 11:51:29.226438 scan_static_bus for PCI: 00:14.0
1127 11:51:29.226486 USB0 port 0 enabled
1128 11:51:29.226534 USB0 port 0 scanning...
1129 11:51:29.226582 scan_static_bus for USB0 port 0
1130 11:51:29.226631 USB2 port 0 enabled
1131 11:51:29.226679 USB2 port 1 disabled
1132 11:51:29.226727 USB2 port 2 enabled
1133 11:51:29.226775 USB2 port 3 disabled
1134 11:51:29.226823 USB2 port 4 disabled
1135 11:51:29.226871 USB2 port 5 enabled
1136 11:51:29.226919 USB2 port 6 disabled
1137 11:51:29.226967 USB2 port 7 disabled
1138 11:51:29.227016 USB2 port 8 enabled
1139 11:51:29.227064 USB2 port 9 enabled
1140 11:51:29.227112 USB3 port 0 enabled
1141 11:51:29.227160 USB3 port 1 disabled
1142 11:51:29.227208 USB3 port 2 disabled
1143 11:51:29.227257 USB3 port 3 disabled
1144 11:51:29.227305 USB2 port 0 scanning...
1145 11:51:29.227353 scan_static_bus for USB2 port 0
1146 11:51:29.227402 scan_static_bus for USB2 port 0 done
1147 11:51:29.227450 scan_bus: bus USB2 port 0 finished in 6 msecs
1148 11:51:29.227499 USB2 port 2 scanning...
1149 11:51:29.227547 scan_static_bus for USB2 port 2
1150 11:51:29.227595 scan_static_bus for USB2 port 2 done
1151 11:51:29.227644 scan_bus: bus USB2 port 2 finished in 6 msecs
1152 11:51:29.227692 USB2 port 5 scanning...
1153 11:51:29.227741 scan_static_bus for USB2 port 5
1154 11:51:29.227790 scan_static_bus for USB2 port 5 done
1155 11:51:29.227853 scan_bus: bus USB2 port 5 finished in 6 msecs
1156 11:51:29.227903 USB2 port 8 scanning...
1157 11:51:29.227953 scan_static_bus for USB2 port 8
1158 11:51:29.228002 scan_static_bus for USB2 port 8 done
1159 11:51:29.228052 scan_bus: bus USB2 port 8 finished in 6 msecs
1160 11:51:29.228100 USB2 port 9 scanning...
1161 11:51:29.228149 scan_static_bus for USB2 port 9
1162 11:51:29.228197 scan_static_bus for USB2 port 9 done
1163 11:51:29.228245 scan_bus: bus USB2 port 9 finished in 6 msecs
1164 11:51:29.228295 USB3 port 0 scanning...
1165 11:51:29.228343 scan_static_bus for USB3 port 0
1166 11:51:29.228392 scan_static_bus for USB3 port 0 done
1167 11:51:29.228441 scan_bus: bus USB3 port 0 finished in 6 msecs
1168 11:51:29.228490 scan_static_bus for USB0 port 0 done
1169 11:51:29.228538 scan_bus: bus USB0 port 0 finished in 120 msecs
1170 11:51:29.228586 scan_static_bus for PCI: 00:14.0 done
1171 11:51:29.228635 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1172 11:51:29.228684 PCI: 00:14.3 scanning...
1173 11:51:29.228732 scan_static_bus for PCI: 00:14.3
1174 11:51:29.228781 GENERIC: 0.0 enabled
1175 11:51:29.228830 scan_static_bus for PCI: 00:14.3 done
1176 11:51:29.228878 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1177 11:51:29.228928 PCI: 00:15.0 scanning...
1178 11:51:29.228976 scan_static_bus for PCI: 00:15.0
1179 11:51:29.229051 I2C: 00:1a enabled
1180 11:51:29.229115 I2C: 00:31 enabled
1181 11:51:29.229163 I2C: 00:32 enabled
1182 11:51:29.229212 scan_static_bus for PCI: 00:15.0 done
1183 11:51:29.229261 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1184 11:51:29.229310 PCI: 00:15.1 scanning...
1185 11:51:29.229359 scan_static_bus for PCI: 00:15.1
1186 11:51:29.229408 I2C: 00:50 enabled
1187 11:51:29.229456 scan_static_bus for PCI: 00:15.1 done
1188 11:51:29.229505 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1189 11:51:29.229553 PCI: 00:15.3 scanning...
1190 11:51:29.229602 scan_static_bus for PCI: 00:15.3
1191 11:51:29.229650 I2C: 00:10 enabled
1192 11:51:29.229698 scan_static_bus for PCI: 00:15.3 done
1193 11:51:29.229747 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1194 11:51:29.229796 PCI: 00:19.1 scanning...
1195 11:51:29.229850 scan_static_bus for PCI: 00:19.1
1196 11:51:29.229900 I2C: 00:15 enabled
1197 11:51:29.229948 I2C: 00:2c enabled
1198 11:51:29.229997 scan_static_bus for PCI: 00:19.1 done
1199 11:51:29.230046 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1200 11:51:29.230095 PCI: 00:1e.3 scanning...
1201 11:51:29.230144 scan_generic_bus for PCI: 00:1e.3
1202 11:51:29.230193 SPI: 00 enabled
1203 11:51:29.230434 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1204 11:51:29.230488 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1205 11:51:29.230553 PCI: 00:1f.0 scanning...
1206 11:51:29.230603 scan_static_bus for PCI: 00:1f.0
1207 11:51:29.230654 PNP: 0c09.0 enabled
1208 11:51:29.230704 PNP: 0c09.0 scanning...
1209 11:51:29.230754 scan_static_bus for PNP: 0c09.0
1210 11:51:29.230805 scan_static_bus for PNP: 0c09.0 done
1211 11:51:29.230855 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1212 11:51:29.230905 scan_static_bus for PCI: 00:1f.0 done
1213 11:51:29.230954 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1214 11:51:29.231004 PCI: 00:1f.2 scanning...
1215 11:51:29.231054 scan_static_bus for PCI: 00:1f.2
1216 11:51:29.231103 GENERIC: 0.0 enabled
1217 11:51:29.231153 GENERIC: 0.0 scanning...
1218 11:51:29.231202 scan_static_bus for GENERIC: 0.0
1219 11:51:29.231251 GENERIC: 0.0 enabled
1220 11:51:29.231300 GENERIC: 1.0 enabled
1221 11:51:29.231349 scan_static_bus for GENERIC: 0.0 done
1222 11:51:29.231399 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1223 11:51:29.231449 scan_static_bus for PCI: 00:1f.2 done
1224 11:51:29.231498 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1225 11:51:29.231548 PCI: 00:1f.3 scanning...
1226 11:51:29.231597 scan_static_bus for PCI: 00:1f.3
1227 11:51:29.231646 scan_static_bus for PCI: 00:1f.3 done
1228 11:51:29.231696 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1229 11:51:29.231745 PCI: 00:1f.5 scanning...
1230 11:51:29.231795 scan_generic_bus for PCI: 00:1f.5
1231 11:51:29.231845 scan_generic_bus for PCI: 00:1f.5 done
1232 11:51:29.231894 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1233 11:51:29.231943 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1234 11:51:29.231993 scan_static_bus for Root Device done
1235 11:51:29.232042 scan_bus: bus Root Device finished in 729 msecs
1236 11:51:29.232091 done
1237 11:51:29.232140 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1238 11:51:29.232190 Chrome EC: UHEPI supported
1239 11:51:29.232239 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1240 11:51:29.232289 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1241 11:51:29.232338 SPI flash protection: WPSW=0 SRP0=0
1242 11:51:29.232386 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1243 11:51:29.232435 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1244 11:51:29.232485 found VGA at PCI: 00:02.0
1245 11:51:29.232535 Setting up VGA for PCI: 00:02.0
1246 11:51:29.232584 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1247 11:51:29.232633 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1248 11:51:29.232682 Allocating resources...
1249 11:51:29.232731 Reading resources...
1250 11:51:29.232779 Root Device read_resources bus 0 link: 0
1251 11:51:29.232828 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1252 11:51:29.232876 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1253 11:51:29.232926 DOMAIN: 0000 read_resources bus 0 link: 0
1254 11:51:29.232975 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1255 11:51:29.233037 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1256 11:51:29.233088 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1257 11:51:29.233138 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1258 11:51:29.233188 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1259 11:51:29.233237 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1260 11:51:29.233286 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1261 11:51:29.233337 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1262 11:51:29.233387 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1263 11:51:29.233437 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1264 11:51:29.233487 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1265 11:51:29.233536 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1266 11:51:29.233585 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1267 11:51:29.233634 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1268 11:51:29.233684 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1269 11:51:29.233734 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1270 11:51:29.233783 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1271 11:51:29.233866 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1272 11:51:29.233936 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1273 11:51:29.234015 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1274 11:51:29.234066 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1275 11:51:29.234116 PCI: 00:04.0 read_resources bus 1 link: 0
1276 11:51:29.234166 PCI: 00:04.0 read_resources bus 1 link: 0 done
1277 11:51:29.234216 PCI: 00:06.0 read_resources bus 1 link: 0
1278 11:51:29.234265 PCI: 00:06.0 read_resources bus 1 link: 0 done
1279 11:51:29.234315 PCI: 00:0d.0 read_resources bus 0 link: 0
1280 11:51:29.234364 USB0 port 0 read_resources bus 0 link: 0
1281 11:51:29.234414 USB0 port 0 read_resources bus 0 link: 0 done
1282 11:51:29.234464 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1283 11:51:29.234514 PCI: 00:14.0 read_resources bus 0 link: 0
1284 11:51:29.234563 USB0 port 0 read_resources bus 0 link: 0
1285 11:51:29.234613 USB0 port 0 read_resources bus 0 link: 0 done
1286 11:51:29.234663 PCI: 00:14.0 read_resources bus 0 link: 0 done
1287 11:51:29.234712 PCI: 00:14.3 read_resources bus 0 link: 0
1288 11:51:29.234761 PCI: 00:14.3 read_resources bus 0 link: 0 done
1289 11:51:29.234810 PCI: 00:15.0 read_resources bus 0 link: 0
1290 11:51:29.234859 PCI: 00:15.0 read_resources bus 0 link: 0 done
1291 11:51:29.234910 PCI: 00:15.1 read_resources bus 0 link: 0
1292 11:51:29.235149 PCI: 00:15.1 read_resources bus 0 link: 0 done
1293 11:51:29.235208 PCI: 00:15.3 read_resources bus 0 link: 0
1294 11:51:29.235258 PCI: 00:15.3 read_resources bus 0 link: 0 done
1295 11:51:29.235308 PCI: 00:19.1 read_resources bus 0 link: 0
1296 11:51:29.235357 PCI: 00:19.1 read_resources bus 0 link: 0 done
1297 11:51:29.235406 PCI: 00:1e.3 read_resources bus 2 link: 0
1298 11:51:29.235456 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1299 11:51:29.235505 PCI: 00:1f.0 read_resources bus 0 link: 0
1300 11:51:29.235554 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1301 11:51:29.235603 PCI: 00:1f.2 read_resources bus 0 link: 0
1302 11:51:29.235653 GENERIC: 0.0 read_resources bus 0 link: 0
1303 11:51:29.235702 GENERIC: 0.0 read_resources bus 0 link: 0 done
1304 11:51:29.235750 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1305 11:51:29.235800 DOMAIN: 0000 read_resources bus 0 link: 0 done
1306 11:51:29.235850 Root Device read_resources bus 0 link: 0 done
1307 11:51:29.235899 Done reading resources.
1308 11:51:29.235948 Show resources in subtree (Root Device)...After reading.
1309 11:51:29.235998 Root Device child on link 0 CPU_CLUSTER: 0
1310 11:51:29.236048 CPU_CLUSTER: 0 child on link 0 APIC: 00
1311 11:51:29.236097 APIC: 00
1312 11:51:29.236146 APIC: 12
1313 11:51:29.236194 APIC: 14
1314 11:51:29.236243 APIC: 16
1315 11:51:29.236293 APIC: 10
1316 11:51:29.236341 APIC: 09
1317 11:51:29.236389 APIC: 01
1318 11:51:29.236437 APIC: 08
1319 11:51:29.236486 DOMAIN: 0000 child on link 0 GPIO: 0
1320 11:51:29.236535 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1321 11:51:29.236586 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1322 11:51:29.236635 GPIO: 0
1323 11:51:29.236683 PCI: 00:00.0
1324 11:51:29.236732 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1325 11:51:29.236782 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1326 11:51:29.236832 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1327 11:51:29.236882 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1328 11:51:29.236931 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1329 11:51:29.236980 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1330 11:51:29.237038 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1331 11:51:29.237089 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1332 11:51:29.237139 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1333 11:51:29.237189 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1334 11:51:29.237239 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1335 11:51:29.237290 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1336 11:51:29.237339 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1337 11:51:29.237389 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1338 11:51:29.237438 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1339 11:51:29.237488 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1340 11:51:29.237538 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1341 11:51:29.237588 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1342 11:51:29.237637 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1343 11:51:29.237687 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1344 11:51:29.237737 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1345 11:51:29.237787 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1346 11:51:29.237861 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1347 11:51:29.237943 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1348 11:51:29.237997 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1349 11:51:29.238049 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1350 11:51:29.238099 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1351 11:51:29.238150 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1352 11:51:29.238200 PCI: 00:02.0
1353 11:51:29.238249 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1354 11:51:29.238491 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1355 11:51:29.238548 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1356 11:51:29.238599 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1357 11:51:29.238648 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1358 11:51:29.238698 GENERIC: 0.0
1359 11:51:29.238747 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1360 11:51:29.238798 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1361 11:51:29.238849 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1362 11:51:29.238899 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1363 11:51:29.238949 PCI: 01:00.0
1364 11:51:29.238999 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1365 11:51:29.239049 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1366 11:51:29.239098 PCI: 00:08.0
1367 11:51:29.239146 PCI: 00:0a.0
1368 11:51:29.239195 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1369 11:51:29.239245 PCI: 00:0d.0 child on link 0 USB0 port 0
1370 11:51:29.239295 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1371 11:51:29.239345 USB0 port 0 child on link 0 USB3 port 0
1372 11:51:29.239394 USB3 port 0
1373 11:51:29.239443 USB3 port 1
1374 11:51:29.239492 USB3 port 2
1375 11:51:29.239540 USB3 port 3
1376 11:51:29.239589 PCI: 00:14.0 child on link 0 USB0 port 0
1377 11:51:29.239638 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1378 11:51:29.239688 USB0 port 0 child on link 0 USB2 port 0
1379 11:51:29.239737 USB2 port 0
1380 11:51:29.239785 USB2 port 1
1381 11:51:29.239834 USB2 port 2
1382 11:51:29.239882 USB2 port 3
1383 11:51:29.239930 USB2 port 4
1384 11:51:29.239978 USB2 port 5
1385 11:51:29.240026 USB2 port 6
1386 11:51:29.240074 USB2 port 7
1387 11:51:29.240122 USB2 port 8
1388 11:51:29.240170 USB2 port 9
1389 11:51:29.240218 USB3 port 0
1390 11:51:29.240267 USB3 port 1
1391 11:51:29.240315 USB3 port 2
1392 11:51:29.240363 USB3 port 3
1393 11:51:29.240412 PCI: 00:14.2
1394 11:51:29.240461 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1395 11:51:29.240511 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1396 11:51:29.240562 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1397 11:51:29.240611 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1398 11:51:29.240661 GENERIC: 0.0
1399 11:51:29.240709 PCI: 00:15.0 child on link 0 I2C: 00:1a
1400 11:51:29.240759 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1401 11:51:29.240809 I2C: 00:1a
1402 11:51:29.240857 I2C: 00:31
1403 11:51:29.240906 I2C: 00:32
1404 11:51:29.240953 PCI: 00:15.1 child on link 0 I2C: 00:50
1405 11:51:29.241003 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1406 11:51:29.241064 I2C: 00:50
1407 11:51:29.241113 PCI: 00:15.2
1408 11:51:29.241162 PCI: 00:15.3 child on link 0 I2C: 00:10
1409 11:51:29.241211 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1410 11:51:29.241261 I2C: 00:10
1411 11:51:29.241309 PCI: 00:16.0
1412 11:51:29.241358 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1413 11:51:29.241407 PCI: 00:19.0
1414 11:51:29.241455 PCI: 00:19.1 child on link 0 I2C: 00:15
1415 11:51:29.241504 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1416 11:51:29.241553 I2C: 00:15
1417 11:51:29.241601 I2C: 00:2c
1418 11:51:29.241650 PCI: 00:1e.0
1419 11:51:29.241699 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1420 11:51:29.241749 PCI: 00:1e.3 child on link 0 SPI: 00
1421 11:51:29.241798 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1422 11:51:29.241848 SPI: 00
1423 11:51:29.241897 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1424 11:51:29.241946 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1425 11:51:29.241997 PNP: 0c09.0
1426 11:51:29.242046 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1427 11:51:29.242097 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1428 11:51:29.242147 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1429 11:51:29.242198 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1430 11:51:29.242249 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1431 11:51:29.242299 GENERIC: 0.0
1432 11:51:29.242348 GENERIC: 1.0
1433 11:51:29.242397 PCI: 00:1f.3
1434 11:51:29.242446 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1435 11:51:29.242496 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1436 11:51:29.242546 PCI: 00:1f.5
1437 11:51:29.242785 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1438 11:51:29.242841 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1439 11:51:29.242897 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1440 11:51:29.242948 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1441 11:51:29.242997 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1442 11:51:29.243047 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1443 11:51:29.243097 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1444 11:51:29.243146 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1445 11:51:29.243196 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1446 11:51:29.243246 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1447 11:51:29.243296 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1448 11:51:29.243346 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1449 11:51:29.243396 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1450 11:51:29.243446 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1451 11:51:29.243496 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1452 11:51:29.243545 DOMAIN: 0000: Resource ranges:
1453 11:51:29.243594 * Base: 1000, Size: 800, Tag: 100
1454 11:51:29.243644 * Base: 1900, Size: e700, Tag: 100
1455 11:51:29.243694 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1456 11:51:29.243743 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1457 11:51:29.243793 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1458 11:51:29.243843 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1459 11:51:29.243894 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1460 11:51:29.243945 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1461 11:51:29.243995 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1462 11:51:29.244045 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1463 11:51:29.244094 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1464 11:51:29.244144 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1465 11:51:29.244193 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1466 11:51:29.244242 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1467 11:51:29.244292 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1468 11:51:29.244342 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1469 11:51:29.244392 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1470 11:51:29.244442 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1471 11:51:29.244491 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1472 11:51:29.244541 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1473 11:51:29.244591 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1474 11:51:29.244640 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1475 11:51:29.244689 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1476 11:51:29.244739 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1477 11:51:29.244788 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1478 11:51:29.244838 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1479 11:51:29.244888 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1480 11:51:29.244937 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1481 11:51:29.244986 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1482 11:51:29.245054 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1483 11:51:29.245106 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1484 11:51:29.245155 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1485 11:51:29.245205 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1486 11:51:29.245255 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1487 11:51:29.245305 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1488 11:51:29.245354 DOMAIN: 0000: Resource ranges:
1489 11:51:29.245403 * Base: 80400000, Size: 3fc00000, Tag: 200
1490 11:51:29.245453 * Base: d0000000, Size: 28000000, Tag: 200
1491 11:51:29.245502 * Base: fa000000, Size: 1000000, Tag: 200
1492 11:51:29.245551 * Base: fb001000, Size: 17ff000, Tag: 200
1493 11:51:29.245600 * Base: fe800000, Size: 300000, Tag: 200
1494 11:51:29.245650 * Base: feb80000, Size: 80000, Tag: 200
1495 11:51:29.245699 * Base: fed00000, Size: 40000, Tag: 200
1496 11:51:29.245747 * Base: fed70000, Size: 10000, Tag: 200
1497 11:51:29.245985 * Base: fed88000, Size: 8000, Tag: 200
1498 11:51:29.246043 * Base: fed93000, Size: d000, Tag: 200
1499 11:51:29.246094 * Base: feda2000, Size: 1e000, Tag: 200
1500 11:51:29.246144 * Base: fede0000, Size: 1220000, Tag: 200
1501 11:51:29.246195 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1502 11:51:29.246244 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1503 11:51:29.246294 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1504 11:51:29.246344 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1505 11:51:29.246394 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1506 11:51:29.246445 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1507 11:51:29.246495 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1508 11:51:29.246545 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1509 11:51:29.246594 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1510 11:51:29.246644 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1511 11:51:29.246694 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1512 11:51:29.246743 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1513 11:51:29.246793 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1514 11:51:29.246843 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1515 11:51:29.246893 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1516 11:51:29.246943 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1517 11:51:29.246993 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1518 11:51:29.247042 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1519 11:51:29.247091 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1520 11:51:29.247141 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1521 11:51:29.247191 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1522 11:51:29.247241 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1523 11:51:29.247291 PCI: 00:06.0: Resource ranges:
1524 11:51:29.247340 * Base: 80400000, Size: 100000, Tag: 200
1525 11:51:29.247389 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1526 11:51:29.247438 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1527 11:51:29.247487 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1528 11:51:29.247537 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1529 11:51:29.247587 Root Device assign_resources, bus 0 link: 0
1530 11:51:29.247637 DOMAIN: 0000 assign_resources, bus 0 link: 0
1531 11:51:29.247687 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1532 11:51:29.247737 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1533 11:51:29.247787 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1534 11:51:29.247837 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1535 11:51:29.247886 PCI: 00:04.0 assign_resources, bus 1 link: 0
1536 11:51:29.247936 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1537 11:51:29.247986 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1538 11:51:29.248036 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1539 11:51:29.248087 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1540 11:51:29.248136 PCI: 00:06.0 assign_resources, bus 1 link: 0
1541 11:51:29.248185 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1542 11:51:29.248234 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1543 11:51:29.248284 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1544 11:51:29.248334 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1545 11:51:29.248385 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1546 11:51:29.248436 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1547 11:51:29.248485 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1548 11:51:29.248534 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1549 11:51:29.248583 PCI: 00:14.0 assign_resources, bus 0 link: 0
1550 11:51:29.248632 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1551 11:51:29.248682 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1552 11:51:29.248732 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1553 11:51:29.248781 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1554 11:51:29.248831 PCI: 00:14.3 assign_resources, bus 0 link: 0
1555 11:51:29.248880 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1556 11:51:29.248929 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1557 11:51:29.248979 PCI: 00:15.0 assign_resources, bus 0 link: 0
1558 11:51:29.249041 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1559 11:51:29.249283 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1560 11:51:29.249339 PCI: 00:15.1 assign_resources, bus 0 link: 0
1561 11:51:29.249389 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1562 11:51:29.249438 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1563 11:51:29.249488 PCI: 00:15.3 assign_resources, bus 0 link: 0
1564 11:51:29.249538 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1565 11:51:29.249588 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1566 11:51:29.249638 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1567 11:51:29.249688 PCI: 00:19.1 assign_resources, bus 0 link: 0
1568 11:51:29.249738 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1569 11:51:29.249787 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1570 11:51:29.249836 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1571 11:51:29.249885 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1572 11:51:29.249935 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1573 11:51:29.249984 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1574 11:51:29.250033 LPC: Trying to open IO window from 800 size 1ff
1575 11:51:29.250083 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1576 11:51:29.250133 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1577 11:51:29.250184 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1578 11:51:29.250234 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1579 11:51:29.250284 Root Device assign_resources, bus 0 link: 0 done
1580 11:51:29.250333 Done setting resources.
1581 11:51:29.250383 Show resources in subtree (Root Device)...After assigning values.
1582 11:51:29.250433 Root Device child on link 0 CPU_CLUSTER: 0
1583 11:51:29.250482 CPU_CLUSTER: 0 child on link 0 APIC: 00
1584 11:51:29.250555 APIC: 00
1585 11:51:29.250606 APIC: 12
1586 11:51:29.250655 APIC: 14
1587 11:51:29.250703 APIC: 16
1588 11:51:29.250752 APIC: 10
1589 11:51:29.250800 APIC: 09
1590 11:51:29.250849 APIC: 01
1591 11:51:29.250898 APIC: 08
1592 11:51:29.250946 DOMAIN: 0000 child on link 0 GPIO: 0
1593 11:51:29.250996 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1594 11:51:29.251047 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1595 11:51:29.251097 GPIO: 0
1596 11:51:29.251146 PCI: 00:00.0
1597 11:51:29.251196 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1598 11:51:29.251247 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1599 11:51:29.251298 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1600 11:51:29.251349 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1601 11:51:29.251399 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1602 11:51:29.251448 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1603 11:51:29.251498 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1604 11:51:29.251547 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1605 11:51:29.251597 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1606 11:51:29.251647 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1607 11:51:29.251698 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1608 11:51:29.251749 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1609 11:51:29.251799 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1610 11:51:29.251849 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1611 11:51:29.251898 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1612 11:51:29.251948 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1613 11:51:29.251999 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1614 11:51:29.252049 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1615 11:51:29.252100 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1616 11:51:29.252149 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1617 11:51:29.252200 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1618 11:51:29.252249 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1619 11:51:29.252299 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1620 11:51:29.252537 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1621 11:51:29.252593 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1622 11:51:29.252644 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1623 11:51:29.252694 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1624 11:51:29.252745 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1625 11:51:29.252795 PCI: 00:02.0
1626 11:51:29.252845 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1627 11:51:29.252895 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1628 11:51:29.252946 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1629 11:51:29.252995 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1630 11:51:29.253060 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1631 11:51:29.253111 GENERIC: 0.0
1632 11:51:29.253160 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1633 11:51:29.253210 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1634 11:51:29.253261 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1635 11:51:29.253311 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1636 11:51:29.253361 PCI: 01:00.0
1637 11:51:29.253411 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1638 11:51:29.253461 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1639 11:51:29.253512 PCI: 00:08.0
1640 11:51:29.253560 PCI: 00:0a.0
1641 11:51:29.253610 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1642 11:51:29.253661 PCI: 00:0d.0 child on link 0 USB0 port 0
1643 11:51:29.253710 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1644 11:51:29.253760 USB0 port 0 child on link 0 USB3 port 0
1645 11:51:29.253810 USB3 port 0
1646 11:51:29.253859 USB3 port 1
1647 11:51:29.253908 USB3 port 2
1648 11:51:29.253956 USB3 port 3
1649 11:51:29.254005 PCI: 00:14.0 child on link 0 USB0 port 0
1650 11:51:29.254055 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1651 11:51:29.254105 USB0 port 0 child on link 0 USB2 port 0
1652 11:51:29.254154 USB2 port 0
1653 11:51:29.254202 USB2 port 1
1654 11:51:29.254251 USB2 port 2
1655 11:51:29.254300 USB2 port 3
1656 11:51:29.254348 USB2 port 4
1657 11:51:29.254396 USB2 port 5
1658 11:51:29.254446 USB2 port 6
1659 11:51:29.254495 USB2 port 7
1660 11:51:29.254543 USB2 port 8
1661 11:51:29.254592 USB2 port 9
1662 11:51:29.254640 USB3 port 0
1663 11:51:29.254688 USB3 port 1
1664 11:51:29.254736 USB3 port 2
1665 11:51:29.254785 USB3 port 3
1666 11:51:29.254833 PCI: 00:14.2
1667 11:51:29.254882 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1668 11:51:29.254933 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1669 11:51:29.254983 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1670 11:51:29.255033 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1671 11:51:29.255082 GENERIC: 0.0
1672 11:51:29.255131 PCI: 00:15.0 child on link 0 I2C: 00:1a
1673 11:51:29.255180 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1674 11:51:29.255230 I2C: 00:1a
1675 11:51:29.255279 I2C: 00:31
1676 11:51:29.255328 I2C: 00:32
1677 11:51:29.255377 PCI: 00:15.1 child on link 0 I2C: 00:50
1678 11:51:29.255427 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1679 11:51:29.255477 I2C: 00:50
1680 11:51:29.255525 PCI: 00:15.2
1681 11:51:29.255574 PCI: 00:15.3 child on link 0 I2C: 00:10
1682 11:51:29.255623 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1683 11:51:29.255673 I2C: 00:10
1684 11:51:29.255722 PCI: 00:16.0
1685 11:51:29.255771 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1686 11:51:29.255820 PCI: 00:19.0
1687 11:51:29.255882 PCI: 00:19.1 child on link 0 I2C: 00:15
1688 11:51:29.255934 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1689 11:51:29.255984 I2C: 00:15
1690 11:51:29.256033 I2C: 00:2c
1691 11:51:29.256081 PCI: 00:1e.0
1692 11:51:29.256130 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1693 11:51:29.256181 PCI: 00:1e.3 child on link 0 SPI: 00
1694 11:51:29.256230 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1695 11:51:29.256280 SPI: 00
1696 11:51:29.256330 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1697 11:51:29.256379 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1698 11:51:29.256429 PNP: 0c09.0
1699 11:51:29.256667 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1700 11:51:29.256725 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1701 11:51:29.256777 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1702 11:51:29.256828 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1703 11:51:29.256878 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1704 11:51:29.256928 GENERIC: 0.0
1705 11:51:29.256977 GENERIC: 1.0
1706 11:51:29.257035 PCI: 00:1f.3
1707 11:51:29.257087 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1708 11:51:29.257137 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1709 11:51:29.257187 PCI: 00:1f.5
1710 11:51:29.257236 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1711 11:51:29.257286 Done allocating resources.
1712 11:51:29.257335 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1713 11:51:29.257385 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1714 11:51:29.257435 Configure audio over I2S with MAX98373 NAU88L25B.
1715 11:51:29.257485 Enabling BT offload
1716 11:51:29.257534 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1717 11:51:29.257583 Enabling resources...
1718 11:51:29.257632 PCI: 00:00.0 subsystem <- 8086/4609
1719 11:51:29.257682 PCI: 00:00.0 cmd <- 06
1720 11:51:29.257731 PCI: 00:02.0 subsystem <- 8086/46b3
1721 11:51:29.257780 PCI: 00:02.0 cmd <- 03
1722 11:51:29.257829 PCI: 00:04.0 subsystem <- 8086/461d
1723 11:51:29.257878 PCI: 00:04.0 cmd <- 02
1724 11:51:29.257927 PCI: 00:06.0 bridge ctrl <- 0013
1725 11:51:29.257977 PCI: 00:06.0 subsystem <- 8086/464d
1726 11:51:29.258027 PCI: 00:06.0 cmd <- 106
1727 11:51:29.258076 PCI: 00:0a.0 subsystem <- 8086/467d
1728 11:51:29.258125 PCI: 00:0a.0 cmd <- 02
1729 11:51:29.258174 PCI: 00:0d.0 subsystem <- 8086/461e
1730 11:51:29.258222 PCI: 00:0d.0 cmd <- 02
1731 11:51:29.258271 PCI: 00:14.0 subsystem <- 8086/51ed
1732 11:51:29.258320 PCI: 00:14.0 cmd <- 02
1733 11:51:29.258369 PCI: 00:14.2 subsystem <- 8086/51ef
1734 11:51:29.258419 PCI: 00:14.2 cmd <- 02
1735 11:51:29.258467 PCI: 00:14.3 subsystem <- 8086/51f0
1736 11:51:29.258517 PCI: 00:14.3 cmd <- 02
1737 11:51:29.403468 PCI: 00:15.0 subsystem <- 8086/51e8
1738 11:51:29.403711 PCI: 00:15.0 cmd <- 02
1739 11:51:29.403876 PCI: 00:15.1 subsystem <- 8086/51e9
1740 11:51:29.404028 PCI: 00:15.1 cmd <- 06
1741 11:51:29.404173 PCI: 00:15.3 subsystem <- 8086/51eb
1742 11:51:29.404313 PCI: 00:15.3 cmd <- 02
1743 11:51:29.404451 PCI: 00:16.0 subsystem <- 8086/51e0
1744 11:51:29.404589 PCI: 00:16.0 cmd <- 02
1745 11:51:29.404723 PCI: 00:19.1 subsystem <- 8086/51c6
1746 11:51:29.404858 PCI: 00:19.1 cmd <- 02
1747 11:51:29.404993 PCI: 00:1e.0 subsystem <- 8086/51a8
1748 11:51:29.405163 PCI: 00:1e.0 cmd <- 06
1749 11:51:29.405298 PCI: 00:1e.3 subsystem <- 8086/51ab
1750 11:51:29.405433 PCI: 00:1e.3 cmd <- 02
1751 11:51:29.405566 PCI: 00:1f.0 subsystem <- 8086/5182
1752 11:51:29.405698 PCI: 00:1f.0 cmd <- 407
1753 11:51:29.405831 PCI: 00:1f.3 subsystem <- 8086/51c8
1754 11:51:29.405994 PCI: 00:1f.3 cmd <- 02
1755 11:51:29.406173 PCI: 00:1f.5 subsystem <- 8086/51a4
1756 11:51:29.406311 PCI: 00:1f.5 cmd <- 406
1757 11:51:29.406446 PCI: 01:00.0 cmd <- 02
1758 11:51:29.406580 done.
1759 11:51:29.406715 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1760 11:51:29.406850 ME: Version: Unavailable
1761 11:51:29.406984 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1762 11:51:29.407117 Initializing devices...
1763 11:51:29.407250 Root Device init
1764 11:51:29.407384 mainboard: EC init
1765 11:51:29.407518 Chrome EC: Set SMI mask to 0x0000000000000000
1766 11:51:29.407651 Chrome EC: clear events_b mask to 0x0000000000000000
1767 11:51:29.407786 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1768 11:51:29.407919 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1769 11:51:29.408051 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1770 11:51:29.408185 Chrome EC: Set WAKE mask to 0x0000000000000000
1771 11:51:29.408319 Root Device init finished in 37 msecs
1772 11:51:29.408453 PCI: 00:00.0 init
1773 11:51:29.408586 CPU TDP = 15 Watts
1774 11:51:29.408718 CPU PL1 = 15 Watts
1775 11:51:29.408850 CPU PL2 = 55 Watts
1776 11:51:29.408983 CPU PL4 = 123 Watts
1777 11:51:29.409144 PCI: 00:00.0 init finished in 8 msecs
1778 11:51:29.409279 PCI: 00:02.0 init
1779 11:51:29.409434 GMA: Found VBT in CBFS
1780 11:51:29.409625 GMA: Found valid VBT in CBFS
1781 11:51:29.409766 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1782 11:51:29.409903 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1783 11:51:29.410038 PCI: 00:02.0 init finished in 18 msecs
1784 11:51:29.410172 PCI: 00:06.0 init
1785 11:51:29.410306 Initializing PCH PCIe bridge.
1786 11:51:29.410439 PCI: 00:06.0 init finished in 3 msecs
1787 11:51:29.410571 PCI: 00:0a.0 init
1788 11:51:29.410706 PCI: 00:0a.0 init finished in 0 msecs
1789 11:51:29.410838 PCI: 00:14.0 init
1790 11:51:29.410970 PCI: 00:14.0 init finished in 0 msecs
1791 11:51:29.411103 PCI: 00:14.2 init
1792 11:51:29.411235 PCI: 00:14.2 init finished in 0 msecs
1793 11:51:29.411367 PCI: 00:15.0 init
1794 11:51:29.411498 I2C bus 0 version 0x3230302a
1795 11:51:29.411633 DW I2C bus 0 at 0x80655000 (400 KHz)
1796 11:51:29.411765 PCI: 00:15.0 init finished in 6 msecs
1797 11:51:29.411896 PCI: 00:15.1 init
1798 11:51:29.412028 I2C bus 1 version 0x3230302a
1799 11:51:29.412161 DW I2C bus 1 at 0x80656000 (400 KHz)
1800 11:51:29.412294 PCI: 00:15.1 init finished in 6 msecs
1801 11:51:29.412426 PCI: 00:15.3 init
1802 11:51:29.412557 I2C bus 3 version 0x3230302a
1803 11:51:29.412688 DW I2C bus 3 at 0x80657000 (400 KHz)
1804 11:51:29.412820 PCI: 00:15.3 init finished in 6 msecs
1805 11:51:29.412959 PCI: 00:16.0 init
1806 11:51:29.413183 PCI: 00:16.0 init finished in 0 msecs
1807 11:51:29.413325 PCI: 00:19.1 init
1808 11:51:29.413459 I2C bus 5 version 0x3230302a
1809 11:51:29.413595 DW I2C bus 5 at 0x80659000 (400 KHz)
1810 11:51:29.413730 PCI: 00:19.1 init finished in 6 msecs
1811 11:51:29.413871 PCI: 00:1f.0 init
1812 11:51:29.414305 IOAPIC: Initializing IOAPIC at 0xfec00000
1813 11:51:29.414458 IOAPIC: ID = 0x02
1814 11:51:29.414596 IOAPIC: Dumping registers
1815 11:51:29.414756 reg 0x0000: 0x02000000
1816 11:51:29.414952 reg 0x0001: 0x00770020
1817 11:51:29.415092 reg 0x0002: 0x00000000
1818 11:51:29.415228 IOAPIC: 120 interrupts
1819 11:51:29.415362 IOAPIC: Clearing IOAPIC at 0xfec00000
1820 11:51:29.415497 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1821 11:51:29.415634 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1822 11:51:29.415817 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1823 11:51:29.415960 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1824 11:51:29.416095 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1825 11:51:29.416236 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1826 11:51:29.416373 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1827 11:51:29.416592 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1828 11:51:29.416738 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1829 11:51:29.416874 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1830 11:51:29.417009 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1831 11:51:29.417176 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1832 11:51:29.417312 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1833 11:51:29.417445 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1834 11:51:29.417601 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1835 11:51:29.417776 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1836 11:51:29.417914 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1837 11:51:29.418052 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1838 11:51:29.418186 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1839 11:51:29.418320 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1840 11:51:29.418480 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1841 11:51:29.418620 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1842 11:51:29.418756 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1843 11:51:29.418890 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1844 11:51:29.419024 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1845 11:51:29.419161 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1846 11:51:29.419298 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1847 11:51:29.419462 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1848 11:51:29.419636 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1849 11:51:29.419775 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1850 11:51:29.419910 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1851 11:51:29.420047 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1852 11:51:29.420182 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1853 11:51:29.420319 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1854 11:51:29.420454 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1855 11:51:29.420632 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1856 11:51:29.420772 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1857 11:51:29.420910 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1858 11:51:29.421093 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1859 11:51:29.421261 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1860 11:51:29.421402 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1861 11:51:29.421538 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1862 11:51:29.421673 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1863 11:51:29.421809 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1864 11:51:29.421945 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1865 11:51:29.422080 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1866 11:51:29.422215 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1867 11:51:29.422350 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1868 11:51:29.422486 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1869 11:51:29.422621 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1870 11:51:29.422757 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1871 11:51:29.422892 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1872 11:51:29.423108 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1873 11:51:29.423255 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1874 11:51:29.423394 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1875 11:51:29.423530 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1876 11:51:29.423664 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1877 11:51:29.423799 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1878 11:51:29.423935 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1879 11:51:29.424071 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1880 11:51:29.424204 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1881 11:51:29.424337 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1882 11:51:29.424472 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1883 11:51:29.424609 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1884 11:51:29.424811 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1885 11:51:29.425044 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1886 11:51:29.425234 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1887 11:51:29.425444 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1888 11:51:29.425616 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1889 11:51:29.425775 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1890 11:51:29.425980 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1891 11:51:29.426122 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1892 11:51:29.426259 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1893 11:51:29.426397 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1894 11:51:29.426534 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1895 11:51:29.426670 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1896 11:51:29.426804 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1897 11:51:29.426940 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1898 11:51:29.427076 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1899 11:51:29.427472 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1900 11:51:29.427624 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1901 11:51:29.427761 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1902 11:51:29.427898 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1903 11:51:29.428033 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1904 11:51:29.428169 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1905 11:51:29.428305 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1906 11:51:29.428437 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1907 11:51:29.428572 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1908 11:51:29.428706 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1909 11:51:29.428839 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1910 11:51:29.429068 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1911 11:51:29.429220 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1912 11:51:29.429419 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1913 11:51:29.429575 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1914 11:51:29.429712 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1915 11:51:29.429848 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1916 11:51:29.429983 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1917 11:51:29.430118 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1918 11:51:29.430252 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1919 11:51:29.430387 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1920 11:51:29.430521 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1921 11:51:29.430656 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1922 11:51:29.430791 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1923 11:51:29.430927 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1924 11:51:29.431062 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1925 11:51:29.431196 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1926 11:51:29.431329 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1927 11:51:29.431465 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1928 11:51:29.431599 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1929 11:51:29.431733 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1930 11:51:29.431867 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1931 11:51:29.432003 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1932 11:51:29.432138 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1933 11:51:29.432275 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1934 11:51:29.432406 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1935 11:51:29.432515 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1936 11:51:29.432697 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1937 11:51:29.432813 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1938 11:51:29.432932 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1939 11:51:29.433130 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1940 11:51:29.433245 IOAPIC: Bootstrap Processor Local APIC = 0x00
1941 11:51:29.433356 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1942 11:51:29.433466 PCI: 00:1f.0 init finished in 607 msecs
1943 11:51:29.433575 PCI: 00:1f.2 init
1944 11:51:29.433683 apm_control: Disabling ACPI.
1945 11:51:29.433791 APMC done.
1946 11:51:29.433900 PCI: 00:1f.2 init finished in 6 msecs
1947 11:51:29.434007 PCI: 00:1f.3 init
1948 11:51:29.434114 PCI: 00:1f.3 init finished in 0 msecs
1949 11:51:29.434223 PCI: 01:00.0 init
1950 11:51:29.434331 PCI: 01:00.0 init finished in 0 msecs
1951 11:51:29.434440 PNP: 0c09.0 init
1952 11:51:29.434547 Google Chrome EC uptime: 10.960 seconds
1953 11:51:29.434655 Google Chrome AP resets since EC boot: 0
1954 11:51:29.434763 Google Chrome most recent AP reset causes:
1955 11:51:29.434872 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1956 11:51:29.434981 PNP: 0c09.0 init finished in 19 msecs
1957 11:51:29.435089 GENERIC: 0.0 init
1958 11:51:29.435196 GENERIC: 0.0 init finished in 0 msecs
1959 11:51:29.435302 GENERIC: 1.0 init
1960 11:51:29.435410 GENERIC: 1.0 init finished in 0 msecs
1961 11:51:29.435518 Devices initialized
1962 11:51:29.435626 Show all devs... After init.
1963 11:51:29.435734 Root Device: enabled 1
1964 11:51:29.435876 CPU_CLUSTER: 0: enabled 1
1965 11:51:29.436010 DOMAIN: 0000: enabled 1
1966 11:51:29.436141 GPIO: 0: enabled 1
1967 11:51:29.436287 PCI: 00:00.0: enabled 1
1968 11:51:29.436397 PCI: 00:01.0: enabled 0
1969 11:51:29.436506 PCI: 00:01.1: enabled 0
1970 11:51:29.436615 PCI: 00:02.0: enabled 1
1971 11:51:29.436723 PCI: 00:04.0: enabled 1
1972 11:51:29.436831 PCI: 00:05.0: enabled 0
1973 11:51:29.436938 PCI: 00:06.0: enabled 1
1974 11:51:29.437077 PCI: 00:06.2: enabled 0
1975 11:51:29.437194 PCI: 00:07.0: enabled 0
1976 11:51:29.437303 PCI: 00:07.1: enabled 0
1977 11:51:29.437413 PCI: 00:07.2: enabled 0
1978 11:51:29.437504 PCI: 00:07.3: enabled 0
1979 11:51:29.437594 PCI: 00:08.0: enabled 0
1980 11:51:29.437684 PCI: 00:09.0: enabled 0
1981 11:51:29.437775 PCI: 00:0a.0: enabled 1
1982 11:51:29.437866 PCI: 00:0d.0: enabled 1
1983 11:51:29.437956 PCI: 00:0d.1: enabled 0
1984 11:51:29.438045 PCI: 00:0d.2: enabled 0
1985 11:51:29.438135 PCI: 00:0d.3: enabled 0
1986 11:51:29.438226 PCI: 00:0e.0: enabled 0
1987 11:51:29.438316 PCI: 00:10.0: enabled 0
1988 11:51:29.438410 PCI: 00:10.1: enabled 0
1989 11:51:29.438498 PCI: 00:10.6: enabled 0
1990 11:51:29.438587 PCI: 00:10.7: enabled 0
1991 11:51:29.438677 PCI: 00:12.0: enabled 0
1992 11:51:29.438768 PCI: 00:12.6: enabled 0
1993 11:51:29.438858 PCI: 00:12.7: enabled 0
1994 11:51:29.438947 PCI: 00:13.0: enabled 0
1995 11:51:29.439049 PCI: 00:14.0: enabled 1
1996 11:51:29.439182 PCI: 00:14.1: enabled 0
1997 11:51:29.439275 PCI: 00:14.2: enabled 1
1998 11:51:29.439365 PCI: 00:14.3: enabled 1
1999 11:51:29.439514 PCI: 00:15.0: enabled 1
2000 11:51:29.439611 PCI: 00:15.1: enabled 1
2001 11:51:29.439702 PCI: 00:15.2: enabled 0
2002 11:51:29.439793 PCI: 00:15.3: enabled 1
2003 11:51:29.439884 PCI: 00:16.0: enabled 1
2004 11:51:29.439974 PCI: 00:16.1: enabled 0
2005 11:51:29.440065 PCI: 00:16.2: enabled 0
2006 11:51:29.440155 PCI: 00:16.3: enabled 0
2007 11:51:29.440245 PCI: 00:16.4: enabled 0
2008 11:51:29.440335 PCI: 00:16.5: enabled 0
2009 11:51:29.440426 PCI: 00:17.0: enabled 0
2010 11:51:29.440515 PCI: 00:19.0: enabled 0
2011 11:51:29.440605 PCI: 00:19.1: enabled 1
2012 11:51:29.440694 PCI: 00:19.2: enabled 0
2013 11:51:29.440784 PCI: 00:1a.0: enabled 0
2014 11:51:29.440874 PCI: 00:1c.0: enabled 0
2015 11:51:29.440963 PCI: 00:1c.1: enabled 0
2016 11:51:29.441301 PCI: 00:1c.2: enabled 0
2017 11:51:29.441403 PCI: 00:1c.3: enabled 0
2018 11:51:29.441493 PCI: 00:1c.4: enabled 0
2019 11:51:29.441583 PCI: 00:1c.5: enabled 0
2020 11:51:29.441673 PCI: 00:1c.6: enabled 0
2021 11:51:29.441762 PCI: 00:1c.7: enabled 0
2022 11:51:29.441852 PCI: 00:1d.0: enabled 0
2023 11:51:29.441942 PCI: 00:1d.1: enabled 0
2024 11:51:29.442031 PCI: 00:1d.2: enabled 0
2025 11:51:29.442121 PCI: 00:1d.3: enabled 0
2026 11:51:29.442217 PCI: 00:1e.0: enabled 1
2027 11:51:29.442372 PCI: 00:1e.1: enabled 0
2028 11:51:29.442453 PCI: 00:1e.2: enabled 0
2029 11:51:29.442532 PCI: 00:1e.3: enabled 1
2030 11:51:29.442662 PCI: 00:1f.0: enabled 1
2031 11:51:29.442745 PCI: 00:1f.1: enabled 0
2032 11:51:29.442824 PCI: 00:1f.2: enabled 1
2033 11:51:29.442903 PCI: 00:1f.3: enabled 1
2034 11:51:29.442981 PCI: 00:1f.4: enabled 0
2035 11:51:29.443059 PCI: 00:1f.5: enabled 1
2036 11:51:29.443137 PCI: 00:1f.6: enabled 0
2037 11:51:29.443216 PCI: 00:1f.7: enabled 0
2038 11:51:29.443295 GENERIC: 0.0: enabled 1
2039 11:51:29.443373 GENERIC: 0.0: enabled 1
2040 11:51:29.443451 GENERIC: 1.0: enabled 1
2041 11:51:29.443529 GENERIC: 0.0: enabled 1
2042 11:51:29.443607 GENERIC: 1.0: enabled 1
2043 11:51:29.443684 USB0 port 0: enabled 1
2044 11:51:29.443762 USB0 port 0: enabled 1
2045 11:51:29.443844 GENERIC: 0.0: enabled 1
2046 11:51:29.443921 I2C: 00:1a: enabled 1
2047 11:51:29.444000 I2C: 00:31: enabled 1
2048 11:51:29.444078 I2C: 00:32: enabled 1
2049 11:51:29.444155 I2C: 00:50: enabled 1
2050 11:51:29.444233 I2C: 00:10: enabled 1
2051 11:51:29.444310 I2C: 00:15: enabled 1
2052 11:51:29.444388 I2C: 00:2c: enabled 1
2053 11:51:29.444465 GENERIC: 0.0: enabled 1
2054 11:51:29.444542 SPI: 00: enabled 1
2055 11:51:29.444618 PNP: 0c09.0: enabled 1
2056 11:51:29.444695 GENERIC: 0.0: enabled 1
2057 11:51:29.444772 USB3 port 0: enabled 1
2058 11:51:29.444849 USB3 port 1: enabled 0
2059 11:51:29.444926 USB3 port 2: enabled 1
2060 11:51:29.445003 USB3 port 3: enabled 0
2061 11:51:29.445099 USB2 port 0: enabled 1
2062 11:51:29.445177 USB2 port 1: enabled 0
2063 11:51:29.445254 USB2 port 2: enabled 1
2064 11:51:29.445331 USB2 port 3: enabled 0
2065 11:51:29.445420 USB2 port 4: enabled 0
2066 11:51:29.445530 USB2 port 5: enabled 1
2067 11:51:29.445610 USB2 port 6: enabled 0
2068 11:51:29.445688 USB2 port 7: enabled 0
2069 11:51:29.445767 USB2 port 8: enabled 1
2070 11:51:29.445847 USB2 port 9: enabled 1
2071 11:51:29.445968 USB3 port 0: enabled 1
2072 11:51:29.446050 USB3 port 1: enabled 0
2073 11:51:29.446128 USB3 port 2: enabled 0
2074 11:51:29.446205 USB3 port 3: enabled 0
2075 11:51:29.446283 GENERIC: 0.0: enabled 1
2076 11:51:29.446360 GENERIC: 1.0: enabled 1
2077 11:51:29.446438 APIC: 00: enabled 1
2078 11:51:29.446486 APIC: 12: enabled 1
2079 11:51:29.446534 APIC: 14: enabled 1
2080 11:51:29.446582 APIC: 16: enabled 1
2081 11:51:29.446630 APIC: 10: enabled 1
2082 11:51:29.446678 APIC: 09: enabled 1
2083 11:51:29.446726 APIC: 01: enabled 1
2084 11:51:29.446775 APIC: 08: enabled 1
2085 11:51:29.446823 PCI: 01:00.0: enabled 1
2086 11:51:29.446871 BS: BS_DEV_INIT run times (exec / console): 9 / 1127 ms
2087 11:51:29.446921 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2088 11:51:29.446970 ELOG: NV offset 0xf20000 size 0x4000
2089 11:51:29.447019 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2090 11:51:29.447069 ELOG: Event(17) added with size 13 at 2024-06-25 11:51:27 UTC
2091 11:51:29.447118 ELOG: Event(92) added with size 9 at 2024-06-25 11:51:27 UTC
2092 11:51:29.447167 ELOG: Event(93) added with size 9 at 2024-06-25 11:51:27 UTC
2093 11:51:29.447215 ELOG: Event(9E) added with size 10 at 2024-06-25 11:51:27 UTC
2094 11:51:29.447265 ELOG: Event(9F) added with size 14 at 2024-06-25 11:51:27 UTC
2095 11:51:29.447314 ELOG: Event(16) added with size 11 at 2024-06-25 11:51:27 UTC
2096 11:51:29.447362 Erasing flash addr f20000 + 4 KiB
2097 11:51:29.447410 BS: BS_DEV_INIT exit times (exec / console): 48 / 55 ms
2098 11:51:29.447460 ELOG: Event(A1) added with size 10 at 2024-06-25 11:51:27 UTC
2099 11:51:29.447509 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2100 11:51:29.447559 ELOG: Event(A0) added with size 9 at 2024-06-25 11:51:27 UTC
2101 11:51:29.447608 elog_add_boot_reason: Logged dev mode boot
2102 11:51:29.447657 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2103 11:51:29.447706 Finalize devices...
2104 11:51:29.447755 PCI: 00:16.0 final
2105 11:51:29.447803 PCI: 00:1f.2 final
2106 11:51:29.447851 GENERIC: 0.0 final
2107 11:51:29.447899 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2108 11:51:29.447948 GENERIC: 1.0 final
2109 11:51:29.447997 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2110 11:51:29.448045 Devices finalized
2111 11:51:29.448093 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2112 11:51:29.448143 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2113 11:51:29.448191 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2114 11:51:29.448241 ME: HFSTS1 : 0x80030045
2115 11:51:29.448290 ME: HFSTS2 : 0x30280116
2116 11:51:29.448338 ME: HFSTS3 : 0x00000050
2117 11:51:29.448388 ME: HFSTS4 : 0x00004000
2118 11:51:29.448437 ME: HFSTS5 : 0x00000000
2119 11:51:29.448486 ME: HFSTS6 : 0x40400006
2120 11:51:29.448534 ME: Manufacturing Mode : YES
2121 11:51:29.448583 ME: SPI Protection Mode Enabled : YES
2122 11:51:29.448632 ME: FPFs Committed : YES
2123 11:51:29.448680 ME: Manufacturing Vars Locked : NO
2124 11:51:29.448764 ME: FW Partition Table : OK
2125 11:51:29.448813 ME: Bringup Loader Failure : NO
2126 11:51:29.448861 ME: Firmware Init Complete : NO
2127 11:51:29.448910 ME: Boot Options Present : NO
2128 11:51:29.448974 ME: Update In Progress : NO
2129 11:51:29.449083 ME: D0i3 Support : YES
2130 11:51:29.449162 ME: Low Power State Enabled : NO
2131 11:51:29.449226 ME: CPU Replaced : YES
2132 11:51:29.449276 ME: CPU Replacement Valid : YES
2133 11:51:29.449377 ME: Current Working State : 5
2134 11:51:29.449446 ME: Current Operation State : 1
2135 11:51:29.449496 ME: Current Operation Mode : 3
2136 11:51:29.449545 ME: Error Code : 0
2137 11:51:29.449594 ME: Enhanced Debug Mode : NO
2138 11:51:29.449644 ME: CPU Debug Disabled : YES
2139 11:51:29.449882 ME: TXT Support : NO
2140 11:51:29.449938 ME: WP for RO is enabled : YES
2141 11:51:29.449988 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2142 11:51:29.450038 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2143 11:51:29.450088 ELOG: Event(91) added with size 10 at 2024-06-25 11:51:28 UTC
2144 11:51:29.450138 Chrome EC: clear events_b mask to 0x0000000020004000
2145 11:51:29.450188 Ramoops buffer: 0x100000@0x7689a000.
2146 11:51:29.450237 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 15 ms
2147 11:51:29.450286 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2148 11:51:29.450335 CBFS: 'fallback/slic' not found.
2149 11:51:29.450385 ACPI: Writing ACPI tables at 7686e000.
2150 11:51:29.450434 ACPI: * FACS
2151 11:51:29.450482 ACPI: * DSDT
2152 11:51:29.450530 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2153 11:51:29.450579 ACPI: * FADT
2154 11:51:29.450627 SCI is IRQ9
2155 11:51:29.450675 ACPI: added table 1/32, length now 40
2156 11:51:29.450724 ACPI: * SSDT
2157 11:51:29.450772 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2158 11:51:29.450821 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2159 11:51:29.450871 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2160 11:51:29.450920 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2161 11:51:29.450968 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2162 11:51:29.451042 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2163 11:51:29.451106 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2164 11:51:29.451154 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2165 11:51:29.451202 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2166 11:51:29.451251 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2167 11:51:29.451300 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2168 11:51:29.451349 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2169 11:51:29.451398 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2170 11:51:29.451446 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2171 11:51:29.451495 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2172 11:51:29.451543 PS2K: Passing 80 keymaps to kernel
2173 11:51:29.451592 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2174 11:51:29.451641 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2175 11:51:29.451708 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2176 11:51:29.451772 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2177 11:51:29.451822 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2178 11:51:29.451871 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2179 11:51:29.451920 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2180 11:51:29.451969 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2181 11:51:29.452034 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2182 11:51:29.452124 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2183 11:51:29.452217 ACPI: added table 2/32, length now 44
2184 11:51:29.452267 ACPI: * MCFG
2185 11:51:29.452332 ACPI: added table 3/32, length now 48
2186 11:51:29.452396 ACPI: * TPM2
2187 11:51:29.452487 TPM2 log created at 0x7685e000
2188 11:51:29.452558 ACPI: added table 4/32, length now 52
2189 11:51:29.452608 ACPI: * LPIT
2190 11:51:29.452672 ACPI: added table 5/32, length now 56
2191 11:51:29.452721 ACPI: * MADT
2192 11:51:29.452771 SCI is IRQ9
2193 11:51:29.452842 ACPI: added table 6/32, length now 60
2194 11:51:29.452893 cmd_reg from pmc_make_ipc_cmd 1052838
2195 11:51:29.452943 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2196 11:51:29.452993 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2197 11:51:29.453068 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2198 11:51:29.453118 PMC CrashLog size in discovery mode: 0xC00
2199 11:51:29.453168 cpu crashlog bar addr: 0x80640000
2200 11:51:29.453216 cpu discovery table offset: 0x6030
2201 11:51:29.453266 cpu_crashlog_discovery_table buffer count: 0x3
2202 11:51:29.453316 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2203 11:51:29.453365 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2204 11:51:29.453414 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2205 11:51:29.453463 PMC crashLog size in discovery mode : 0xC00
2206 11:51:29.453512 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2207 11:51:29.453561 discover mode PMC crashlog size adjusted to: 0x200
2208 11:51:29.453611 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2209 11:51:29.453660 discover mode PMC crashlog size adjusted to: 0x0
2210 11:51:29.453747 m_cpu_crashLog_size : 0x3480 bytes
2211 11:51:29.453796 CPU crashLog present.
2212 11:51:29.453844 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2213 11:51:29.453893 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2214 11:51:29.453941 current = 76877550
2215 11:51:29.453991 ACPI: * DMAR
2216 11:51:29.454039 ACPI: added table 7/32, length now 64
2217 11:51:29.454096 ACPI: added table 8/32, length now 68
2218 11:51:29.454147 ACPI: * HPET
2219 11:51:29.454195 ACPI: added table 9/32, length now 72
2220 11:51:29.454244 ACPI: done.
2221 11:51:29.454292 ACPI tables: 38528 bytes.
2222 11:51:29.454341 smbios_write_tables: 76858000
2223 11:51:29.454389 EC returned error result code 3
2224 11:51:29.454439 Couldn't obtain OEM name from CBI
2225 11:51:29.454487 Create SMBIOS type 16
2226 11:51:29.454535 Create SMBIOS type 17
2227 11:51:29.454583 Create SMBIOS type 20
2228 11:51:29.454631 GENERIC: 0.0 (WIFI Device)
2229 11:51:29.454680 SMBIOS tables: 2156 bytes.
2230 11:51:29.454728 Writing table forward entry at 0x00000500
2231 11:51:29.454777 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2232 11:51:29.455015 Writing coreboot table at 0x76892000
2233 11:51:29.455100 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2234 11:51:29.455150 1. 0000000000001000-000000000009ffff: RAM
2235 11:51:29.455214 2. 00000000000a0000-00000000000fffff: RESERVED
2236 11:51:29.455313 3. 0000000000100000-0000000076857fff: RAM
2237 11:51:29.455422 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2238 11:51:29.455473 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2239 11:51:29.455576 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2240 11:51:29.455640 7. 0000000077000000-00000000803fffff: RESERVED
2241 11:51:29.455697 8. 00000000c0000000-00000000cfffffff: RESERVED
2242 11:51:29.455765 9. 00000000f8000000-00000000f9ffffff: RESERVED
2243 11:51:29.455815 10. 00000000fb000000-00000000fb000fff: RESERVED
2244 11:51:29.455866 11. 00000000fc800000-00000000fe7fffff: RESERVED
2245 11:51:29.455916 12. 00000000feb00000-00000000feb7ffff: RESERVED
2246 11:51:29.455966 13. 00000000fec00000-00000000fecfffff: RESERVED
2247 11:51:29.456016 14. 00000000fed40000-00000000fed6ffff: RESERVED
2248 11:51:29.456080 15. 00000000fed80000-00000000fed87fff: RESERVED
2249 11:51:29.456130 16. 00000000fed90000-00000000fed92fff: RESERVED
2250 11:51:29.456195 17. 00000000feda0000-00000000feda1fff: RESERVED
2251 11:51:29.456245 18. 00000000fedc0000-00000000feddffff: RESERVED
2252 11:51:29.456295 19. 0000000100000000-000000027fbfffff: RAM
2253 11:51:29.456345 Passing 4 GPIOs to payload:
2254 11:51:29.456393 NAME | PORT | POLARITY | VALUE
2255 11:51:29.456442 lid | undefined | high | high
2256 11:51:29.456491 power | undefined | high | low
2257 11:51:29.456539 oprom | undefined | high | low
2258 11:51:29.456587 EC in RW | 0x00000151 | high | low
2259 11:51:29.456636 Board ID: 3
2260 11:51:29.456684 FW config: 0x131
2261 11:51:29.456733 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum 5c24
2262 11:51:29.456781 coreboot table: 1764 bytes.
2263 11:51:29.456830 IMD ROOT 0. 0x76fff000 0x00001000
2264 11:51:29.456901 IMD SMALL 1. 0x76ffe000 0x00001000
2265 11:51:29.456951 FSP MEMORY 2. 0x76afe000 0x00500000
2266 11:51:29.457000 CONSOLE 3. 0x76ade000 0x00020000
2267 11:51:29.457080 RO MCACHE 4. 0x76add000 0x00000fd8
2268 11:51:29.457130 FMAP 5. 0x76adc000 0x0000064a
2269 11:51:29.457179 TIME STAMP 6. 0x76adb000 0x00000910
2270 11:51:29.457229 VBOOT WORK 7. 0x76ac7000 0x00014000
2271 11:51:29.457278 MEM INFO 8. 0x76ac6000 0x000003b8
2272 11:51:29.457327 ROMSTG STCK 9. 0x76ac5000 0x00001000
2273 11:51:29.457376 AFTER CAR 10. 0x76ab9000 0x0000c000
2274 11:51:29.457424 RAMSTAGE 11. 0x76a2f000 0x0008a000
2275 11:51:29.457472 ACPI BERT 12. 0x76a1f000 0x00010000
2276 11:51:29.457520 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2277 11:51:29.457569 REFCODE 14. 0x769af000 0x0006f000
2278 11:51:29.457617 SMM BACKUP 15. 0x7699f000 0x00010000
2279 11:51:29.457665 IGD OPREGION16. 0x7699a000 0x00004203
2280 11:51:29.457713 RAMOOPS 17. 0x7689a000 0x00100000
2281 11:51:29.457761 COREBOOT 18. 0x76892000 0x00008000
2282 11:51:29.457809 ACPI 19. 0x7686e000 0x00024000
2283 11:51:29.457857 TPM2 TCGLOG20. 0x7685e000 0x00010000
2284 11:51:29.457905 PMC CRASHLOG21. 0x7685d000 0x00000c00
2285 11:51:29.457954 CPU CRASHLOG22. 0x76859000 0x00003480
2286 11:51:29.458002 SMBIOS 23. 0x76858000 0x00001000
2287 11:51:29.458051 IMD small region:
2288 11:51:29.458099 IMD ROOT 0. 0x76ffec00 0x00000400
2289 11:51:29.458176 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2290 11:51:29.458224 VPD 2. 0x76ffeb80 0x00000058
2291 11:51:29.458271 POWER STATE 3. 0x76ffeb20 0x00000044
2292 11:51:29.458342 ROMSTAGE 4. 0x76ffeb00 0x00000004
2293 11:51:29.458404 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2294 11:51:29.458452 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2295 11:51:29.458500 BS: BS_WRITE_TABLES run times (exec / console): 8 / 624 ms
2296 11:51:29.458568 MTRR: Physical address space:
2297 11:51:29.458657 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2298 11:51:29.458714 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2299 11:51:29.458765 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2300 11:51:29.458816 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2301 11:51:29.458866 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2302 11:51:29.458947 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2303 11:51:29.459000 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2304 11:51:29.459050 MTRR: Fixed MSR 0x250 0x0606060606060606
2305 11:51:29.459099 MTRR: Fixed MSR 0x258 0x0606060606060606
2306 11:51:29.459148 MTRR: Fixed MSR 0x259 0x0000000000000000
2307 11:51:29.459198 MTRR: Fixed MSR 0x268 0x0606060606060606
2308 11:51:29.459246 MTRR: Fixed MSR 0x269 0x0606060606060606
2309 11:51:29.459294 MTRR: Fixed MSR 0x26a 0x0606060606060606
2310 11:51:29.459342 MTRR: Fixed MSR 0x26b 0x0606060606060606
2311 11:51:29.459390 MTRR: Fixed MSR 0x26c 0x0606060606060606
2312 11:51:29.459437 MTRR: Fixed MSR 0x26d 0x0606060606060606
2313 11:51:29.459486 MTRR: Fixed MSR 0x26e 0x0606060606060606
2314 11:51:29.459549 MTRR: Fixed MSR 0x26f 0x0606060606060606
2315 11:51:29.459627 call enable_fixed_mtrr()
2316 11:51:29.459690 CPU physical address size: 39 bits
2317 11:51:29.459753 MTRR: default type WB/UC MTRR counts: 6/6.
2318 11:51:29.459816 MTRR: UC selected as default type.
2319 11:51:29.459865 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2320 11:51:29.459929 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2321 11:51:29.459994 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2322 11:51:29.460058 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2323 11:51:29.460314 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2324 11:51:29.460371 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2325 11:51:29.460421 MTRR: Fixed MSR 0x250 0x0606060606060606
2326 11:51:29.460469 MTRR: Fixed MSR 0x258 0x0606060606060606
2327 11:51:29.460517 MTRR: Fixed MSR 0x259 0x0000000000000000
2328 11:51:29.460565 MTRR: Fixed MSR 0x268 0x0606060606060606
2329 11:51:29.460613 MTRR: Fixed MSR 0x269 0x0606060606060606
2330 11:51:29.460661 MTRR: Fixed MSR 0x26a 0x0606060606060606
2331 11:51:29.460710 MTRR: Fixed MSR 0x26b 0x0606060606060606
2332 11:51:29.460757 MTRR: Fixed MSR 0x26c 0x0606060606060606
2333 11:51:29.460805 MTRR: Fixed MSR 0x26d 0x0606060606060606
2334 11:51:29.460853 MTRR: Fixed MSR 0x26e 0x0606060606060606
2335 11:51:29.460901 MTRR: Fixed MSR 0x26f 0x0606060606060606
2336 11:51:29.460949 MTRR: Fixed MSR 0x250 0x0606060606060606
2337 11:51:29.460996 MTRR: Fixed MSR 0x250 0x0606060606060606
2338 11:51:29.461081 MTRR: Fixed MSR 0x250 0x0606060606060606
2339 11:51:29.461131 MTRR: Fixed MSR 0x250 0x0606060606060606
2340 11:51:29.461179 MTRR: Fixed MSR 0x258 0x0606060606060606
2341 11:51:29.461228 MTRR: Fixed MSR 0x259 0x0000000000000000
2342 11:51:29.461276 MTRR: Fixed MSR 0x268 0x0606060606060606
2343 11:51:29.461324 MTRR: Fixed MSR 0x269 0x0606060606060606
2344 11:51:29.461372 MTRR: Fixed MSR 0x250 0x0606060606060606
2345 11:51:29.461420 call enable_fixed_mtrr()
2346 11:51:29.461467 MTRR: Fixed MSR 0x258 0x0606060606060606
2347 11:51:29.461515 MTRR: Fixed MSR 0x259 0x0000000000000000
2348 11:51:29.461564 MTRR: Fixed MSR 0x268 0x0606060606060606
2349 11:51:29.461612 MTRR: Fixed MSR 0x269 0x0606060606060606
2350 11:51:29.461660 MTRR: Fixed MSR 0x26a 0x0606060606060606
2351 11:51:29.461708 MTRR: Fixed MSR 0x26b 0x0606060606060606
2352 11:51:29.461757 MTRR: Fixed MSR 0x26c 0x0606060606060606
2353 11:51:29.461805 MTRR: Fixed MSR 0x26d 0x0606060606060606
2354 11:51:29.461853 MTRR: Fixed MSR 0x26e 0x0606060606060606
2355 11:51:29.461901 MTRR: Fixed MSR 0x26f 0x0606060606060606
2356 11:51:29.461949 MTRR: Fixed MSR 0x250 0x0606060606060606
2357 11:51:29.462033 call enable_fixed_mtrr()
2358 11:51:29.462111 MTRR: Fixed MSR 0x258 0x0606060606060606
2359 11:51:29.462187 CPU physical address size: 39 bits
2360 11:51:29.462266 MTRR: Fixed MSR 0x259 0x0000000000000000
2361 11:51:29.462323 MTRR: Fixed MSR 0x26a 0x0606060606060606
2362 11:51:29.462397 MTRR: Fixed MSR 0x258 0x0606060606060606
2363 11:51:29.462447 MTRR: Fixed MSR 0x258 0x0606060606060606
2364 11:51:29.462520 MTRR: Fixed MSR 0x268 0x0606060606060606
2365 11:51:29.462582 MTRR: Fixed MSR 0x269 0x0606060606060606
2366 11:51:29.462630 MTRR: Fixed MSR 0x26b 0x0606060606060606
2367 11:51:29.462695 MTRR: Fixed MSR 0x26c 0x0606060606060606
2368 11:51:29.462758 MTRR: Fixed MSR 0x26d 0x0606060606060606
2369 11:51:29.462807 MTRR: Fixed MSR 0x26e 0x0606060606060606
2370 11:51:29.462855 MTRR: Fixed MSR 0x26f 0x0606060606060606
2371 11:51:29.462919 CPU physical address size: 39 bits
2372 11:51:29.462968 call enable_fixed_mtrr()
2373 11:51:29.463018 MTRR: Fixed MSR 0x258 0x0606060606060606
2374 11:51:29.463096 MTRR: Fixed MSR 0x259 0x0000000000000000
2375 11:51:29.463158 MTRR: Fixed MSR 0x259 0x0000000000000000
2376 11:51:29.463206 MTRR: Fixed MSR 0x268 0x0606060606060606
2377 11:51:29.463254 MTRR: Fixed MSR 0x269 0x0606060606060606
2378 11:51:29.463304 MTRR: Fixed MSR 0x26a 0x0606060606060606
2379 11:51:29.463352 CPU physical address size: 39 bits
2380 11:51:29.463400 MTRR: Fixed MSR 0x26b 0x0606060606060606
2381 11:51:29.463447 MTRR: Fixed MSR 0x268 0x0606060606060606
2382 11:51:29.463496 MTRR: Fixed MSR 0x269 0x0606060606060606
2383 11:51:29.463544 MTRR: Fixed MSR 0x26a 0x0606060606060606
2384 11:51:29.463592 MTRR: Fixed MSR 0x26b 0x0606060606060606
2385 11:51:29.463639 MTRR: Fixed MSR 0x26c 0x0606060606060606
2386 11:51:29.463688 MTRR: Fixed MSR 0x26d 0x0606060606060606
2387 11:51:29.463737 MTRR: Fixed MSR 0x26e 0x0606060606060606
2388 11:51:29.463805 MTRR: Fixed MSR 0x26f 0x0606060606060606
2389 11:51:29.463856 MTRR: Fixed MSR 0x26c 0x0606060606060606
2390 11:51:29.463905 call enable_fixed_mtrr()
2391 11:51:29.463953 MTRR: Fixed MSR 0x26d 0x0606060606060606
2392 11:51:29.464002 MTRR: Fixed MSR 0x26e 0x0606060606060606
2393 11:51:29.464049 MTRR: Fixed MSR 0x26f 0x0606060606060606
2394 11:51:29.464113 CPU physical address size: 39 bits
2395 11:51:29.464163 call enable_fixed_mtrr()
2396 11:51:29.464226 MTRR: Fixed MSR 0x259 0x0000000000000000
2397 11:51:29.464275 CPU physical address size: 39 bits
2398 11:51:29.464323 MTRR: Fixed MSR 0x268 0x0606060606060606
2399 11:51:29.464371 MTRR: Fixed MSR 0x26a 0x0606060606060606
2400 11:51:29.464448 MTRR: Fixed MSR 0x269 0x0606060606060606
2401 11:51:29.464496 MTRR: Fixed MSR 0x26b 0x0606060606060606
2402 11:51:29.464543 MTRR: Fixed MSR 0x26c 0x0606060606060606
2403 11:51:29.464591 MTRR: Fixed MSR 0x26d 0x0606060606060606
2404 11:51:29.464640 MTRR: Fixed MSR 0x26e 0x0606060606060606
2405 11:51:29.464689 MTRR: Fixed MSR 0x26f 0x0606060606060606
2406 11:51:29.464737 MTRR: Fixed MSR 0x26a 0x0606060606060606
2407 11:51:29.464785 call enable_fixed_mtrr()
2408 11:51:29.464834 MTRR: Fixed MSR 0x26b 0x0606060606060606
2409 11:51:29.464882 MTRR: Fixed MSR 0x26c 0x0606060606060606
2410 11:51:29.464929 MTRR: Fixed MSR 0x26d 0x0606060606060606
2411 11:51:29.464977 MTRR: Fixed MSR 0x26e 0x0606060606060606
2412 11:51:29.465050 MTRR: Fixed MSR 0x26f 0x0606060606060606
2413 11:51:29.465114 CPU physical address size: 39 bits
2414 11:51:29.465163 call enable_fixed_mtrr()
2415 11:51:29.465212 CPU physical address size: 39 bits
2416 11:51:29.465260
2417 11:51:29.465308 MTRR check
2418 11:51:29.465356 Fixed MTRRs : Enabled
2419 11:51:29.465404 Variable MTRRs: Enabled
2420 11:51:29.465452
2421 11:51:29.465499 BS: BS_WRITE_TABLES exit times (exec / console): 246 / 150 ms
2422 11:51:29.465547 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2423 11:51:29.465601 Checking segment from ROM address 0xffc26dac
2424 11:51:29.465675 Checking segment from ROM address 0xffc26dc8
2425 11:51:29.465930 Loading segment from ROM address 0xffc26dac
2426 11:51:29.465987 code (compression=1)
2427 11:51:29.466037 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2428 11:51:29.466087 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2429 11:51:29.466137 using LZMA
2430 11:51:29.466185 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2431 11:51:29.466234 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2432 11:51:29.466283 Loading segment from ROM address 0xffc26dc8
2433 11:51:29.466331 Entry Point 0x30000000
2434 11:51:29.466379 Loaded segments
2435 11:51:29.466427 BS: BS_PAYLOAD_LOAD run times (exec / console): 87 / 62 ms
2436 11:51:29.466476 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 0 ms
2437 11:51:29.466525 Finalizing chipset.
2438 11:51:29.466574 apm_control: Finalizing SMM.
2439 11:51:29.466622 APMC done.
2440 11:51:29.466671 HECI: CSE device 16.0 is hidden
2441 11:51:29.466719 HECI: CSE device 16.1 is disabled
2442 11:51:29.466767 HECI: CSE device 16.2 is disabled
2443 11:51:29.469251 HECI: CSE device 16.3 is disabled
2444 11:51:29.472514 HECI: CSE device 16.4 is disabled
2445 11:51:29.475765 HECI: CSE device 16.5 is disabled
2446 11:51:29.479093 HECI: CSE device 16.0 is hidden
2447 11:51:29.485631 CSE is disabled, cannot send End-of-Post (EOP) message
2448 11:51:29.492574 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2449 11:51:29.495951 mp_park_aps done after 0 msecs.
2450 11:51:29.498685 Jumping to boot code at 0x30000000(0x76892000)
2451 11:51:29.508818 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2452 11:51:29.512877
2453 11:51:29.512982
2454 11:51:29.513091
2455 11:51:29.516503 Starting depthcharge on Volmar...
2456 11:51:29.516579
2457 11:51:29.516900 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
2458 11:51:29.516990 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2459 11:51:29.517108 Setting prompt string to ['brya:']
2460 11:51:29.517182 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2461 11:51:29.523067 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2462 11:51:29.523149
2463 11:51:29.530637 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2464 11:51:29.530788
2465 11:51:29.536825 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2466 11:51:29.536981
2467 11:51:29.539809 configure_storage: Failed to remap 1C:2
2468 11:51:29.539913
2469 11:51:29.543133 Wipe memory regions:
2470 11:51:29.543237
2471 11:51:29.547180 [0x00000000001000, 0x000000000a0000)
2472 11:51:29.547399
2473 11:51:29.549641 [0x00000000100000, 0x00000030000000)
2474 11:51:29.660456
2475 11:51:29.663403 [0x00000032668e60, 0x00000076858000)
2476 11:51:29.819346
2477 11:51:29.822957 [0x00000100000000, 0x0000027fc00000)
2478 11:51:30.694104
2479 11:51:30.697437 ec_init: CrosEC protocol v3 supported (256, 256)
2480 11:51:31.306123
2481 11:51:31.306242 R8152: Initializing
2482 11:51:31.306304
2483 11:51:31.309647 Version 9 (ocp_data = 6010)
2484 11:51:31.309727
2485 11:51:31.312899 R8152: Done initializing
2486 11:51:31.313023
2487 11:51:31.316493 Adding net device
2488 11:51:31.617881
2489 11:51:31.620659 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2490 11:51:31.620740
2491 11:51:31.620800
2492 11:51:31.621108 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2494 11:51:31.721525 brya: tftpboot 192.168.201.1 14570589/tftp-deploy-nq46uglg/kernel/bzImage 14570589/tftp-deploy-nq46uglg/kernel/cmdline 14570589/tftp-deploy-nq46uglg/ramdisk/ramdisk.cpio.gz
2495 11:51:31.721746 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2496 11:51:31.721840 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2497 11:51:31.725879 tftpboot 192.168.201.1 14570589/tftp-deploy-nq46uglg/kernel/bzIploy-nq46uglg/kernel/cmdline 14570589/tftp-deploy-nq46uglg/ramdisk/ramdisk.cpio.gz
2498 11:51:31.725980
2499 11:51:31.726055 Waiting for link
2500 11:51:31.928771
2501 11:51:31.928889 done.
2502 11:51:31.928949
2503 11:51:31.929005 MAC: 00:e0:4c:68:00:8b
2504 11:51:31.929247
2505 11:51:31.932099 Sending DHCP discover... done.
2506 11:51:31.932176
2507 11:51:31.935372 Waiting for reply... done.
2508 11:51:31.935450
2509 11:51:31.940418 Sending DHCP request... done.
2510 11:51:31.940514
2511 11:51:31.944944 Waiting for reply... done.
2512 11:51:31.945069
2513 11:51:31.945130 My ip is 192.168.201.16
2514 11:51:31.945195
2515 11:51:31.948379 The DHCP server ip is 192.168.201.1
2516 11:51:31.948455
2517 11:51:31.955174 TFTP server IP predefined by user: 192.168.201.1
2518 11:51:31.955277
2519 11:51:31.962083 Bootfile predefined by user: 14570589/tftp-deploy-nq46uglg/kernel/bzImage
2520 11:51:31.962181
2521 11:51:31.964904 Sending tftp read request... done.
2522 11:51:31.964973
2523 11:51:31.968444 Waiting for the transfer...
2524 11:51:31.968523
2525 11:51:32.233900 00000000 ################################################################
2526 11:51:32.234016
2527 11:51:32.488602 00080000 ################################################################
2528 11:51:32.488715
2529 11:51:32.752328 00100000 ################################################################
2530 11:51:32.752466
2531 11:51:33.012910 00180000 ################################################################
2532 11:51:33.013071
2533 11:51:33.277724 00200000 ################################################################
2534 11:51:33.277854
2535 11:51:33.538550 00280000 ################################################################
2536 11:51:33.538661
2537 11:51:33.812431 00300000 ################################################################
2538 11:51:33.812540
2539 11:51:34.112051 00380000 ################################################################
2540 11:51:34.112196
2541 11:51:34.387965 00400000 ################################################################
2542 11:51:34.388084
2543 11:51:34.647137 00480000 ################################################################
2544 11:51:34.647252
2545 11:51:34.918930 00500000 ################################################################
2546 11:51:34.919039
2547 11:51:35.183235 00580000 ################################################################
2548 11:51:35.183347
2549 11:51:35.454873 00600000 ################################################################
2550 11:51:35.455019
2551 11:51:35.719962 00680000 ################################################################
2552 11:51:35.720102
2553 11:51:35.989488 00700000 ################################################################
2554 11:51:35.989596
2555 11:51:36.258405 00780000 ################################################################
2556 11:51:36.258519
2557 11:51:36.526707 00800000 ################################################################
2558 11:51:36.526826
2559 11:51:36.788580 00880000 ################################################################
2560 11:51:36.788698
2561 11:51:37.060385 00900000 ################################################################
2562 11:51:37.060500
2563 11:51:37.334846 00980000 ################################################################
2564 11:51:37.334958
2565 11:51:37.617151 00a00000 ################################################################
2566 11:51:37.617266
2567 11:51:37.895476 00a80000 ################################################################
2568 11:51:37.895590
2569 11:51:38.174894 00b00000 ################################################################
2570 11:51:38.175007
2571 11:51:38.457541 00b80000 ################################################################
2572 11:51:38.457655
2573 11:51:38.731535 00c00000 ################################################################
2574 11:51:38.731650
2575 11:51:39.011952 00c80000 ################################################################
2576 11:51:39.012086
2577 11:51:39.298207 00d00000 ################################################################
2578 11:51:39.298321
2579 11:51:39.594051 00d80000 ################################################################
2580 11:51:39.594160
2581 11:51:39.884024 00e00000 ################################################################
2582 11:51:39.884160
2583 11:51:40.171409 00e80000 ################################################################
2584 11:51:40.171551
2585 11:51:40.429728 00f00000 ################################################################
2586 11:51:40.429839
2587 11:51:40.686186 00f80000 ################################################################
2588 11:51:40.686299
2589 11:51:40.942357 01000000 ################################################################
2590 11:51:40.942470
2591 11:51:41.207172 01080000 ################################################################
2592 11:51:41.207325
2593 11:51:41.473525 01100000 ################################################################
2594 11:51:41.473639
2595 11:51:41.737139 01180000 ################################################################
2596 11:51:41.737255
2597 11:51:42.005857 01200000 ################################################################
2598 11:51:42.005971
2599 11:51:42.267280 01280000 ################################################################
2600 11:51:42.267415
2601 11:51:42.533393 01300000 ################################################################
2602 11:51:42.533530
2603 11:51:42.799209 01380000 ################################################################
2604 11:51:42.799321
2605 11:51:43.074537 01400000 ################################################################
2606 11:51:43.074673
2607 11:51:43.348424 01480000 ################################################################
2608 11:51:43.348540
2609 11:51:43.614433 01500000 ################################################################
2610 11:51:43.614569
2611 11:51:43.772148 01580000 ###################################### done.
2612 11:51:43.772291
2613 11:51:43.775789 The bootfile was 22849664 bytes long.
2614 11:51:43.775870
2615 11:51:43.779133 Sending tftp read request... done.
2616 11:51:43.779213
2617 11:51:43.781859 Waiting for the transfer...
2618 11:51:43.781937
2619 11:51:44.036005 00000000 ################################################################
2620 11:51:44.036119
2621 11:51:44.292860 00080000 ################################################################
2622 11:51:44.293003
2623 11:51:44.546977 00100000 ################################################################
2624 11:51:44.547087
2625 11:51:44.800162 00180000 ################################################################
2626 11:51:44.800277
2627 11:51:45.053372 00200000 ################################################################
2628 11:51:45.053489
2629 11:51:45.308849 00280000 ################################################################
2630 11:51:45.309004
2631 11:51:45.564609 00300000 ################################################################
2632 11:51:45.564731
2633 11:51:45.820374 00380000 ################################################################
2634 11:51:45.820503
2635 11:51:46.086037 00400000 ################################################################
2636 11:51:46.086153
2637 11:51:46.352418 00480000 ################################################################
2638 11:51:46.352533
2639 11:51:46.614946 00500000 ################################################################
2640 11:51:46.615069
2641 11:51:46.875935 00580000 ################################################################
2642 11:51:46.876057
2643 11:51:47.126955 00600000 ################################################################
2644 11:51:47.127120
2645 11:51:47.379931 00680000 ################################################################
2646 11:51:47.380067
2647 11:51:47.632304 00700000 ################################################################
2648 11:51:47.632429
2649 11:51:47.880468 00780000 ################################################################
2650 11:51:47.880590
2651 11:51:48.130700 00800000 ################################################################
2652 11:51:48.130849
2653 11:51:48.383550 00880000 ################################################################
2654 11:51:48.383677
2655 11:51:48.634538 00900000 ################################################################
2656 11:51:48.634676
2657 11:51:48.887971 00980000 ################################################################
2658 11:51:48.888092
2659 11:51:49.138730 00a00000 ################################################################
2660 11:51:49.138874
2661 11:51:49.391037 00a80000 ################################################################
2662 11:51:49.391184
2663 11:51:49.642206 00b00000 ################################################################
2664 11:51:49.642328
2665 11:51:49.894918 00b80000 ################################################################
2666 11:51:49.895060
2667 11:51:50.145801 00c00000 ################################################################
2668 11:51:50.145924
2669 11:51:50.394333 00c80000 ################################################################
2670 11:51:50.394455
2671 11:51:50.646389 00d00000 ################################################################
2672 11:51:50.646525
2673 11:51:50.899317 00d80000 ################################################################
2674 11:51:50.899446
2675 11:51:51.153629 00e00000 ################################################################
2676 11:51:51.153794
2677 11:51:51.263275 00e80000 ############################ done.
2678 11:51:51.263431
2679 11:51:51.266953 Sending tftp read request... done.
2680 11:51:51.267053
2681 11:51:51.269738 Waiting for the transfer...
2682 11:51:51.269839
2683 11:51:51.273324 00000000 # done.
2684 11:51:51.273396
2685 11:51:51.279834 Command line loaded dynamically from TFTP file: 14570589/tftp-deploy-nq46uglg/kernel/cmdline
2686 11:51:51.279934
2687 11:51:51.296181 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2688 11:51:51.305761
2689 11:51:51.309444 Shutting down all USB controllers.
2690 11:51:51.309558
2691 11:51:51.309658 Removing current net device
2692 11:51:51.309749
2693 11:51:51.312228 Finalizing coreboot
2694 11:51:51.312296
2695 11:51:51.319052 Exiting depthcharge with code 4 at timestamp: 31736548
2696 11:51:51.319133
2697 11:51:51.319194
2698 11:51:51.319250 Starting kernel ...
2699 11:51:51.319304
2700 11:51:51.319357
2701 11:51:51.319821 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2702 11:51:51.319932 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2703 11:51:51.320006 Setting prompt string to ['Linux version [0-9]']
2704 11:51:51.320097 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2705 11:51:51.320173 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2707 11:56:15.320467 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2709 11:56:15.321483 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2711 11:56:15.322163 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2714 11:56:15.323152 end: 2 depthcharge-action (duration 00:05:00) [common]
2716 11:56:15.323664 Cleaning after the job
2717 11:56:15.323865 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14570589/tftp-deploy-nq46uglg/ramdisk
2718 11:56:15.327924 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14570589/tftp-deploy-nq46uglg/kernel
2719 11:56:15.332866 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14570589/tftp-deploy-nq46uglg/modules
2720 11:56:15.338201 start: 4.1 power-off (timeout 00:00:30) [common]
2721 11:56:15.338421 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-5', '--port=1', '--command=off']
2722 11:56:16.261431 >> Command sent successfully.
2723 11:56:16.264605 Returned 0 in 0 seconds
2724 11:56:16.364955 end: 4.1 power-off (duration 00:00:01) [common]
2726 11:56:16.365335 start: 4.2 read-feedback (timeout 00:09:59) [common]
2727 11:56:16.365646 Listened to connection for namespace 'common' for up to 1s
2729 11:56:16.366049 Listened to connection for namespace 'common' for up to 1s
2730 11:56:17.366718 Finalising connection for namespace 'common'
2731 11:56:17.367325 Disconnecting from shell: Finalise
2732 11:56:17.367766
2733 11:56:17.468597 end: 4.2 read-feedback (duration 00:00:01) [common]
2734 11:56:17.469180 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14570589
2735 11:56:17.527624 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14570589
2736 11:56:17.527830 JobError: Your job cannot terminate cleanly.