Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 12:31:24.337123 lava-dispatcher, installed at version: 2024.03
2 12:31:24.337350 start: 0 validate
3 12:31:24.337468 Start time: 2024-06-25 12:31:24.337460+00:00 (UTC)
4 12:31:24.337599 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:31:24.337751 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 12:31:24.608005 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:31:24.608717 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.218-cip49-41-ga1157ad99348c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:31:24.879139 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:31:24.879988 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:31:25.142667 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:31:25.143311 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.218-cip49-41-ga1157ad99348c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:31:25.413450 validate duration: 1.08
14 12:31:25.414660 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:31:25.415241 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:31:25.415781 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:31:25.416611 Not decompressing ramdisk as can be used compressed.
18 12:31:25.417147 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/initrd.cpio.gz
19 12:31:25.417589 saving as /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/ramdisk/initrd.cpio.gz
20 12:31:25.417955 total size: 6137763 (5 MB)
21 12:31:25.422809 progress 0 % (0 MB)
22 12:31:25.432209 progress 5 % (0 MB)
23 12:31:25.437574 progress 10 % (0 MB)
24 12:31:25.442252 progress 15 % (0 MB)
25 12:31:25.445647 progress 20 % (1 MB)
26 12:31:25.448736 progress 25 % (1 MB)
27 12:31:25.451918 progress 30 % (1 MB)
28 12:31:25.454467 progress 35 % (2 MB)
29 12:31:25.456947 progress 40 % (2 MB)
30 12:31:25.459397 progress 45 % (2 MB)
31 12:31:25.461571 progress 50 % (2 MB)
32 12:31:25.463760 progress 55 % (3 MB)
33 12:31:25.465683 progress 60 % (3 MB)
34 12:31:25.467569 progress 65 % (3 MB)
35 12:31:25.469553 progress 70 % (4 MB)
36 12:31:25.471281 progress 75 % (4 MB)
37 12:31:25.472950 progress 80 % (4 MB)
38 12:31:25.474707 progress 85 % (5 MB)
39 12:31:25.476285 progress 90 % (5 MB)
40 12:31:25.477846 progress 95 % (5 MB)
41 12:31:25.479554 progress 100 % (5 MB)
42 12:31:25.479695 5 MB downloaded in 0.06 s (94.81 MB/s)
43 12:31:25.479869 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:31:25.480130 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:31:25.480212 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:31:25.480290 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:31:25.480432 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.218-cip49-41-ga1157ad99348c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:31:25.480497 saving as /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/kernel/bzImage
50 12:31:25.480551 total size: 19688512 (18 MB)
51 12:31:25.480606 No compression specified
52 12:31:25.481646 progress 0 % (0 MB)
53 12:31:25.486777 progress 5 % (0 MB)
54 12:31:25.491900 progress 10 % (1 MB)
55 12:31:25.496978 progress 15 % (2 MB)
56 12:31:25.502087 progress 20 % (3 MB)
57 12:31:25.507196 progress 25 % (4 MB)
58 12:31:25.512283 progress 30 % (5 MB)
59 12:31:25.517310 progress 35 % (6 MB)
60 12:31:25.522461 progress 40 % (7 MB)
61 12:31:25.527531 progress 45 % (8 MB)
62 12:31:25.532607 progress 50 % (9 MB)
63 12:31:25.537620 progress 55 % (10 MB)
64 12:31:25.542681 progress 60 % (11 MB)
65 12:31:25.547726 progress 65 % (12 MB)
66 12:31:25.552885 progress 70 % (13 MB)
67 12:31:25.557948 progress 75 % (14 MB)
68 12:31:25.563014 progress 80 % (15 MB)
69 12:31:25.568033 progress 85 % (15 MB)
70 12:31:25.573023 progress 90 % (16 MB)
71 12:31:25.577989 progress 95 % (17 MB)
72 12:31:25.582979 progress 100 % (18 MB)
73 12:31:25.583206 18 MB downloaded in 0.10 s (182.92 MB/s)
74 12:31:25.583353 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:31:25.583563 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:31:25.583644 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:31:25.583732 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:31:25.583930 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/full.rootfs.tar.xz
80 12:31:25.583993 saving as /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/nfsrootfs/full.rootfs.tar
81 12:31:25.584048 total size: 58462052 (55 MB)
82 12:31:25.584104 Using unxz to decompress xz
83 12:31:25.585494 progress 0 % (0 MB)
84 12:31:25.736527 progress 5 % (2 MB)
85 12:31:25.894068 progress 10 % (5 MB)
86 12:31:26.051173 progress 15 % (8 MB)
87 12:31:26.191047 progress 20 % (11 MB)
88 12:31:26.350684 progress 25 % (13 MB)
89 12:31:26.512133 progress 30 % (16 MB)
90 12:31:26.637025 progress 35 % (19 MB)
91 12:31:26.704974 progress 40 % (22 MB)
92 12:31:26.853713 progress 45 % (25 MB)
93 12:31:27.015429 progress 50 % (27 MB)
94 12:31:27.163368 progress 55 % (30 MB)
95 12:31:27.319681 progress 60 % (33 MB)
96 12:31:27.478275 progress 65 % (36 MB)
97 12:31:27.630277 progress 70 % (39 MB)
98 12:31:27.800470 progress 75 % (41 MB)
99 12:31:27.943476 progress 80 % (44 MB)
100 12:31:28.085887 progress 85 % (47 MB)
101 12:31:28.255687 progress 90 % (50 MB)
102 12:31:28.425182 progress 95 % (52 MB)
103 12:31:28.597023 progress 100 % (55 MB)
104 12:31:28.601838 55 MB downloaded in 3.02 s (18.48 MB/s)
105 12:31:28.602011 end: 1.3.1 http-download (duration 00:00:03) [common]
107 12:31:28.602305 end: 1.3 download-retry (duration 00:00:03) [common]
108 12:31:28.602384 start: 1.4 download-retry (timeout 00:09:57) [common]
109 12:31:28.602461 start: 1.4.1 http-download (timeout 00:09:57) [common]
110 12:31:28.602600 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.218-cip49-41-ga1157ad99348c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:31:28.602663 saving as /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/modules/modules.tar
112 12:31:28.602715 total size: 1635652 (1 MB)
113 12:31:28.602769 Using unxz to decompress xz
114 12:31:28.604614 progress 2 % (0 MB)
115 12:31:28.606519 progress 8 % (0 MB)
116 12:31:28.612248 progress 14 % (0 MB)
117 12:31:28.617875 progress 20 % (0 MB)
118 12:31:28.623683 progress 26 % (0 MB)
119 12:31:28.629277 progress 32 % (0 MB)
120 12:31:28.635370 progress 38 % (0 MB)
121 12:31:28.640940 progress 44 % (0 MB)
122 12:31:28.646920 progress 50 % (0 MB)
123 12:31:28.651900 progress 56 % (0 MB)
124 12:31:28.657812 progress 62 % (0 MB)
125 12:31:28.663842 progress 68 % (1 MB)
126 12:31:28.669577 progress 74 % (1 MB)
127 12:31:28.674597 progress 80 % (1 MB)
128 12:31:28.681101 progress 86 % (1 MB)
129 12:31:28.686725 progress 92 % (1 MB)
130 12:31:28.692616 progress 98 % (1 MB)
131 12:31:28.700754 1 MB downloaded in 0.10 s (15.91 MB/s)
132 12:31:28.700894 end: 1.4.1 http-download (duration 00:00:00) [common]
134 12:31:28.701103 end: 1.4 download-retry (duration 00:00:00) [common]
135 12:31:28.701182 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
136 12:31:28.701262 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
137 12:31:29.960642 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14571243/extract-nfsrootfs-lcz_zmy7
138 12:31:29.960816 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
139 12:31:29.960909 start: 1.5.2 lava-overlay (timeout 00:09:55) [common]
140 12:31:29.961065 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e
141 12:31:29.961185 makedir: /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin
142 12:31:29.961278 makedir: /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/tests
143 12:31:29.961369 makedir: /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/results
144 12:31:29.961451 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-add-keys
145 12:31:29.961574 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-add-sources
146 12:31:29.961692 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-background-process-start
147 12:31:29.961811 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-background-process-stop
148 12:31:29.961936 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-common-functions
149 12:31:29.962053 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-echo-ipv4
150 12:31:29.962207 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-install-packages
151 12:31:29.962322 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-installed-packages
152 12:31:29.962436 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-os-build
153 12:31:29.962549 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-probe-channel
154 12:31:29.962662 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-probe-ip
155 12:31:29.962775 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-target-ip
156 12:31:29.962889 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-target-mac
157 12:31:29.963002 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-target-storage
158 12:31:29.963118 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-test-case
159 12:31:29.963231 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-test-event
160 12:31:29.963344 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-test-feedback
161 12:31:29.963457 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-test-raise
162 12:31:29.963570 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-test-reference
163 12:31:29.963684 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-test-runner
164 12:31:29.963798 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-test-set
165 12:31:29.963950 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-test-shell
166 12:31:29.964064 Updating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-install-packages (oe)
167 12:31:29.964203 Updating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/bin/lava-installed-packages (oe)
168 12:31:29.964317 Creating /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/environment
169 12:31:29.964403 LAVA metadata
170 12:31:29.964469 - LAVA_JOB_ID=14571243
171 12:31:29.964525 - LAVA_DISPATCHER_IP=192.168.201.1
172 12:31:29.964617 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:55) [common]
173 12:31:29.964674 skipped lava-vland-overlay
174 12:31:29.964740 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
175 12:31:29.964812 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
176 12:31:29.964870 skipped lava-multinode-overlay
177 12:31:29.964938 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
178 12:31:29.965008 start: 1.5.2.3 test-definition (timeout 00:09:55) [common]
179 12:31:29.965070 Loading test definitions
180 12:31:29.965144 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:55) [common]
181 12:31:29.965202 Using /lava-14571243 at stage 0
182 12:31:29.965495 uuid=14571243_1.5.2.3.1 testdef=None
183 12:31:29.965577 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
184 12:31:29.965652 start: 1.5.2.3.2 test-overlay (timeout 00:09:55) [common]
185 12:31:29.966077 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
187 12:31:29.966278 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:55) [common]
188 12:31:29.966837 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
190 12:31:29.967047 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
191 12:31:29.967587 runner path: /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/0/tests/0_wifi-basic test_uuid 14571243_1.5.2.3.1
192 12:31:29.967734 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 12:31:29.968040 Creating lava-test-runner.conf files
195 12:31:29.968098 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14571243/lava-overlay-v1ibem3e/lava-14571243/0 for stage 0
196 12:31:29.968179 - 0_wifi-basic
197 12:31:29.968270 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
198 12:31:29.968346 start: 1.5.2.4 compress-overlay (timeout 00:09:55) [common]
199 12:31:29.973741 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
200 12:31:29.973834 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
201 12:31:29.973912 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 12:31:29.973988 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
203 12:31:29.974063 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
204 12:31:30.123031 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 12:31:30.123172 start: 1.5.4 extract-modules (timeout 00:09:55) [common]
206 12:31:30.123249 extracting modules file /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14571243/extract-nfsrootfs-lcz_zmy7
207 12:31:30.166509 extracting modules file /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14571243/extract-overlay-ramdisk-cj6k40ww/ramdisk
208 12:31:30.210630 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 12:31:30.210766 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
210 12:31:30.210847 [common] Applying overlay to NFS
211 12:31:30.210906 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14571243/compress-overlay-ubmy3ywz/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14571243/extract-nfsrootfs-lcz_zmy7
212 12:31:30.217022 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
213 12:31:30.217122 start: 1.5.6 configure-preseed-file (timeout 00:09:55) [common]
214 12:31:30.217203 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 12:31:30.217282 start: 1.5.7 compress-ramdisk (timeout 00:09:55) [common]
216 12:31:30.217350 Building ramdisk /var/lib/lava/dispatcher/tmp/14571243/extract-overlay-ramdisk-cj6k40ww/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14571243/extract-overlay-ramdisk-cj6k40ww/ramdisk
217 12:31:30.328887 >> 48201 blocks
218 12:31:31.222375 rename /var/lib/lava/dispatcher/tmp/14571243/extract-overlay-ramdisk-cj6k40ww/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/ramdisk/ramdisk.cpio.gz
219 12:31:31.222544 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 12:31:31.222634 start: 1.5.8 prepare-kernel (timeout 00:09:54) [common]
221 12:31:31.222721 start: 1.5.8.1 prepare-fit (timeout 00:09:54) [common]
222 12:31:31.222790 No mkimage arch provided, not using FIT.
223 12:31:31.222862 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 12:31:31.222933 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 12:31:31.223008 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
226 12:31:31.223082 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:54) [common]
227 12:31:31.223140 No LXC device requested
228 12:31:31.223208 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 12:31:31.223280 start: 1.7 deploy-device-env (timeout 00:09:54) [common]
230 12:31:31.223348 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 12:31:31.223402 Checking files for TFTP limit of 4294967296 bytes.
232 12:31:31.223688 end: 1 tftp-deploy (duration 00:00:06) [common]
233 12:31:31.223775 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 12:31:31.223890 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 12:31:31.223982 substitutions:
236 12:31:31.224041 - {DTB}: None
237 12:31:31.224096 - {INITRD}: 14571243/tftp-deploy-wsxpq82t/ramdisk/ramdisk.cpio.gz
238 12:31:31.224148 - {KERNEL}: 14571243/tftp-deploy-wsxpq82t/kernel/bzImage
239 12:31:31.224199 - {LAVA_MAC}: None
240 12:31:31.224249 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14571243/extract-nfsrootfs-lcz_zmy7
241 12:31:31.224299 - {NFS_SERVER_IP}: 192.168.201.1
242 12:31:31.224348 - {PRESEED_CONFIG}: None
243 12:31:31.224405 - {PRESEED_LOCAL}: None
244 12:31:31.224455 - {RAMDISK}: 14571243/tftp-deploy-wsxpq82t/ramdisk/ramdisk.cpio.gz
245 12:31:31.224506 - {ROOT_PART}: None
246 12:31:31.224554 - {ROOT}: None
247 12:31:31.224601 - {SERVER_IP}: 192.168.201.1
248 12:31:31.224650 - {TEE}: None
249 12:31:31.224699 Parsed boot commands:
250 12:31:31.224747 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 12:31:31.224878 Parsed boot commands: tftpboot 192.168.201.1 14571243/tftp-deploy-wsxpq82t/kernel/bzImage 14571243/tftp-deploy-wsxpq82t/kernel/cmdline 14571243/tftp-deploy-wsxpq82t/ramdisk/ramdisk.cpio.gz
252 12:31:31.224959 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 12:31:31.225033 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 12:31:31.225104 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 12:31:31.225175 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 12:31:31.225233 Not connected, no need to disconnect.
257 12:31:31.225299 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 12:31:31.225368 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 12:31:31.225422 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-10'
260 12:31:31.228874 Setting prompt string to ['lava-test: # ']
261 12:31:31.229185 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 12:31:31.229280 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 12:31:31.229378 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 12:31:31.229463 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 12:31:31.229642 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-10', '--port=1', '--command=reboot']
266 12:31:40.411594 >> Command sent successfully.
267 12:31:40.425050 Returned 0 in 9 seconds
268 12:31:40.526315 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
270 12:31:40.527993 end: 2.2.2 reset-device (duration 00:00:09) [common]
271 12:31:40.528541 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
272 12:31:40.528981 Setting prompt string to 'Starting depthcharge on Volmar...'
273 12:31:40.529314 Changing prompt to 'Starting depthcharge on Volmar...'
274 12:31:40.529666 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
275 12:31:40.531754 [Enter `^Ec?' for help]
276 12:31:42.147609
277 12:31:42.148125
278 12:31:42.157890 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 bootblock starting (log level: 8)...
279 12:31:42.161305 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
280 12:31:42.167784 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000432
281 12:31:42.170777 CPU: AES supported, TXT NOT supported, VT supported
282 12:31:42.181144 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
283 12:31:42.181595 Cache size = 10 MiB
284 12:31:42.187982 MCH: device id 4609 (rev 04) is Alderlake-P
285 12:31:42.191384 PCH: device id 5182 (rev 01) is Alderlake-P SKU
286 12:31:42.198039 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
287 12:31:42.198493 VBOOT: Loading verstage.
288 12:31:42.203899 FMAP: Found "FLASH" version 1.1 at 0x1804000.
289 12:31:42.207251 FMAP: base = 0x0 size = 0x2000000 #areas = 37
290 12:31:42.214582 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 12:31:42.220702 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
292 12:31:42.227314 CBFS: Found 'fallback/verstage' @0x18df00 size 0x17368 in mcache @0xfef8597c
293 12:31:42.231717
294 12:31:42.232248
295 12:31:42.241400 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 verstage starting (log level: 8)...
296 12:31:42.248306 Probing TPM I2C: I2C bus 1 version 0x3230302a
297 12:31:42.251956 DW I2C bus 1 at 0xfe022000 (400 KHz)
298 12:31:42.255530 I2C TX abort detected (00000001)
299 12:31:42.258228 cr50_i2c_read: Address write failed
300 12:31:42.269833 .done! DID_VID 0x00281ae0
301 12:31:42.273271 TPM ready after 0 ms
302 12:31:42.276990 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
303 12:31:42.290655 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
304 12:31:42.297097 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 12:31:42.341035 tlcl_send_startup: Startup return code is 0
306 12:31:42.341489 TPM: setup succeeded
307 12:31:42.362404 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
308 12:31:42.384242 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
309 12:31:42.388008 Chrome EC: UHEPI supported
310 12:31:42.391577 Reading cr50 boot mode
311 12:31:42.405854 Cr50 says boot_mode is VERIFIED_RW(0x00).
312 12:31:42.406374 Phase 1
313 12:31:42.412382 FMAP: area GBB found @ 1805000 (458752 bytes)
314 12:31:42.419573 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 12:31:42.426055 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 12:31:42.432491 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
317 12:31:42.439590 VB2:vb2_check_recovery() Recovery was requested manually
318 12:31:42.445995 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
319 12:31:42.449000 Recovery requested (1009000e)
320 12:31:42.455703 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
321 12:31:42.470247 tlcl_extend: response is 0
322 12:31:42.476895 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
323 12:31:42.483551 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
324 12:31:42.497749 tlcl_extend: response is 0
325 12:31:42.504324 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
326 12:31:42.508192 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
327 12:31:42.518358 CBFS: Found 'fallback/romstage' @0x80 size 0x1e770 in mcache @0xfef8562c
328 12:31:42.521171 BS: verstage times (exec / console): total (unknown) / 159 ms
329 12:31:42.525758
330 12:31:42.526151
331 12:31:42.535800 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 romstage starting (log level: 8)...
332 12:31:42.542487 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
333 12:31:42.545980 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
334 12:31:42.552131 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
335 12:31:42.555576 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
336 12:31:42.559146 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
337 12:31:42.562071 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
338 12:31:42.565414 TCO_STS: 0000 0000
339 12:31:42.569522 GEN_PMCON: d0015038 00002200
340 12:31:42.572327 GBLRST_CAUSE: 00000000 00000000
341 12:31:42.575882 HPR_CAUSE0: 00000000
342 12:31:42.576280 prev_sleep_state 5
343 12:31:42.583220 Abort disabling TXT, as CPU is not TXT capable.
344 12:31:42.589277 cse_lite: Skip switching to RW in the recovery path
345 12:31:42.592691 Boot Count incremented to 14158
346 12:31:42.599404 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
347 12:31:42.606286 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
348 12:31:42.613000 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
349 12:31:42.619445 CBFS: Found 'fspm.bin' @0x80fc0 size 0xc0000 in mcache @0xfef858c4
350 12:31:42.625390 Chrome EC: UHEPI supported
351 12:31:42.631694 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
352 12:31:42.646028 Probing TPM I2C: done! DID_VID 0x00281ae0
353 12:31:42.649645 Locality already claimed
354 12:31:42.652487 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
355 12:31:42.673171 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
356 12:31:42.679566 MRC: Hash idx 0x100b comparison successful.
357 12:31:42.683138 MRC cache found, size f6c8
358 12:31:42.683530 bootmode is set to: 2
359 12:31:42.686824 EC returned error result code 3
360 12:31:42.690670 FW_CONFIG value from CBI is 0x131
361 12:31:42.696799 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
362 12:31:42.700469 SPD index = 0
363 12:31:42.706709 CBFS: Found 'spd.bin' @0x7ae00 size 0x600 in mcache @0xfef857c8
364 12:31:42.710420 SPD: module type is LPDDR4X
365 12:31:42.713831 SPD: module part number is K4U6E3S4AB-MGCL
366 12:31:42.721666 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
367 12:31:42.724662 SPD: device width 16 bits, bus width 16 bits
368 12:31:42.728105 SPD: module size is 1024 MB (per channel)
369 12:31:42.822469 CBMEM:
370 12:31:42.825336 IMD: root @ 0x76fff000 254 entries.
371 12:31:42.828845 IMD: root @ 0x76ffec00 62 entries.
372 12:31:42.835826 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
373 12:31:42.838668 RO_VPD is uninitialized or empty.
374 12:31:42.841875 FMAP: area RW_VPD found @ f29000 (8192 bytes)
375 12:31:42.845475 External stage cache:
376 12:31:42.848707 IMD: root @ 0x7bbff000 254 entries.
377 12:31:42.852367 IMD: root @ 0x7bbfec00 62 entries.
378 12:31:42.860589 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
379 12:31:42.867139 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
380 12:31:42.873665 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
381 12:31:42.877209 MRC: 'RECOVERY_MRC_CACHE' does not need update.
382 12:31:42.880108 8 DIMMs found
383 12:31:42.880768 SMM Memory Map
384 12:31:42.883608 SMRAM : 0x7b800000 0x800000
385 12:31:42.887242 Subregion 0: 0x7b800000 0x200000
386 12:31:42.890324 Subregion 1: 0x7ba00000 0x200000
387 12:31:42.893932 Subregion 2: 0x7bc00000 0x400000
388 12:31:42.897092 top_of_ram = 0x77000000
389 12:31:42.903722 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
390 12:31:42.907140 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
391 12:31:42.913518 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
392 12:31:42.917271 MTRR Range: Start=ff000000 End=0 (Size 1000000)
393 12:31:42.920826 Normal boot
394 12:31:42.927018 CBFS: Found 'fallback/postcar' @0x188000 size 0x5e9c in mcache @0xfef85938
395 12:31:42.937643 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x5aa8 memsize: 0xae60
396 12:31:42.944773 Processing 237 relocs. Offset value of 0x74aba000
397 12:31:42.947810 CLFLUSH [0x76aba000, 0x76ac4e60]
398 12:31:42.951063 CLFLUSH [0x76abfa80, 0x76abfa84]
399 12:31:42.958402 BS: romstage times (exec / console): total (unknown) / 289 ms
400 12:31:42.961661 CLFLUSH [0x76ab9000, 0x77000000]
401 12:31:42.969725 CLFLUSH [0x7ba00000, 0x7bc00000]
402 12:31:42.979149
403 12:31:42.979533
404 12:31:42.989446 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 postcar starting (log level: 8)...
405 12:31:42.989841 Normal boot
406 12:31:42.996231 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
407 12:31:43.002988 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
408 12:31:43.009504 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
409 12:31:43.018977 CBFS: Found 'fallback/ramstage' @0x54d40 size 0x25544 in mcache @0x76add10c
410 12:31:43.063741 Loading module at 0x76a2d000 with entry 0x76a2d000. filesize: 0x540c8 memsize: 0x8b290
411 12:31:43.070964 Processing 5947 relocs. Offset value of 0x72a2d000
412 12:31:43.074103 BS: postcar times (exec / console): total (unknown) / 54 ms
413 12:31:43.077734
414 12:31:43.078292
415 12:31:43.087412 coreboot-v1.9308_26_0.0.22-27210-g9739fafca10 Fri May 10 17:50:58 UTC 2024 ramstage starting (log level: 8)...
416 12:31:43.090694 Reserving BERT start 76a1c000, size 10000
417 12:31:43.093791 Normal boot
418 12:31:43.097303 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
419 12:31:43.104046 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
420 12:31:43.110590 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
421 12:31:43.117183 FMAP: area RW_VPD found @ f29000 (8192 bytes)
422 12:31:43.120799 Google Chrome EC: version:
423 12:31:43.123679 ro: volmar_v2.0.14126-e605144e9c
424 12:31:43.127242 rw: volmar_v2.0.25064-969857a660
425 12:31:43.130197 running image: 1
426 12:31:43.134132 ACPI _SWS is PM1 Index 8 GPE Index -1
427 12:31:43.136844 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
428 12:31:43.140744 EC returned error result code 3
429 12:31:43.144549 FW_CONFIG value from CBI is 0x131
430 12:31:43.150870 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
431 12:31:43.154028 PCI: 00:1c.2 disabled by fw_config
432 12:31:43.160530 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
433 12:31:43.164251 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
434 12:31:43.170893 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
435 12:31:43.174770 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
436 12:31:43.180875 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
437 12:31:43.187359 CBFS: Found 'cpu_microcode_blob.bin' @0x1e880 size 0x36400 in mcache @0x76add0ac
438 12:31:43.193950 microcode: sig=0x906a4 pf=0x80 revision=0x432
439 12:31:43.197323 microcode: Update skipped, already up-to-date
440 12:31:43.203658 CBFS: Found 'fsps.bin' @0x141000 size 0x46fc8 in mcache @0x76add304
441 12:31:43.235128 Detected 6 core, 8 thread CPU.
442 12:31:43.238129 Setting up SMI for CPU
443 12:31:43.241633 IED base = 0x7bc00000
444 12:31:43.242025 IED size = 0x00400000
445 12:31:43.244963 Will perform SMM setup.
446 12:31:43.248149 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
447 12:31:43.251443 LAPIC 0x0 in XAPIC mode.
448 12:31:43.261345 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
449 12:31:43.264409 Processing 18 relocs. Offset value of 0x00030000
450 12:31:43.269539 Attempting to start 7 APs
451 12:31:43.272492 Waiting for 10ms after sending INIT.
452 12:31:43.286131 Waiting for SIPI to complete...
453 12:31:43.288889 done.
454 12:31:43.289275 LAPIC 0x1 in XAPIC mode.
455 12:31:43.292263 LAPIC 0x1e in XAPIC mode.
456 12:31:43.295489 LAPIC 0x8 in XAPIC mode.
457 12:31:43.298970 LAPIC 0x9 in XAPIC mode.
458 12:31:43.302425 AP: slot 3 apic_id 1e, MCU rev: 0x00000432
459 12:31:43.305652 AP: slot 7 apic_id 8, MCU rev: 0x00000432
460 12:31:43.312300 AP: slot 6 apic_id 9, MCU rev: 0x00000432
461 12:31:43.312754 LAPIC 0x1c in XAPIC mode.
462 12:31:43.315702 Waiting for SIPI to complete...
463 12:31:43.318744 done.
464 12:31:43.322434 AP: slot 2 apic_id 1c, MCU rev: 0x00000432
465 12:31:43.325407 LAPIC 0x1a in XAPIC mode.
466 12:31:43.325794 LAPIC 0x18 in XAPIC mode.
467 12:31:43.331900 AP: slot 1 apic_id 1a, MCU rev: 0x00000432
468 12:31:43.335489 AP: slot 4 apic_id 18, MCU rev: 0x00000432
469 12:31:43.339171 AP: slot 5 apic_id 1, MCU rev: 0x00000432
470 12:31:43.342156 smm_setup_relocation_handler: enter
471 12:31:43.345424 smm_setup_relocation_handler: exit
472 12:31:43.355409 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
473 12:31:43.358987 Processing 11 relocs. Offset value of 0x00038000
474 12:31:43.365538 smm_module_setup_stub: stack_top = 0x7b804000
475 12:31:43.368821 smm_module_setup_stub: per cpu stack_size = 0x800
476 12:31:43.375308 smm_module_setup_stub: runtime.start32_offset = 0x4c
477 12:31:43.378828 smm_module_setup_stub: runtime.smm_size = 0x10000
478 12:31:43.386591 SMM Module: stub loaded at 38000. Will call 0x76a510e0
479 12:31:43.389766 Installing permanent SMM handler to 0x7b800000
480 12:31:43.393418 FX_SAVE [0x7b9ff000-0x7ba00000]
481 12:31:43.396270 HANDLER [0x7b9f5000-0x7b9fe568]
482 12:31:43.396659
483 12:31:43.399522 CPU 0
484 12:31:43.403473 ss0 [0x7b9f4c00-0x7b9f5000]
485 12:31:43.406230 stub0 [0x7b9ed000-0x7b9ed208]
486 12:31:43.406621
487 12:31:43.406920 CPU 1
488 12:31:43.409778 ss1 [0x7b9f4800-0x7b9f4c00]
489 12:31:43.413547 stub1 [0x7b9ecc00-0x7b9ece08]
490 12:31:43.414021
491 12:31:43.416202 CPU 2
492 12:31:43.419493 ss2 [0x7b9f4400-0x7b9f4800]
493 12:31:43.423002 stub2 [0x7b9ec800-0x7b9eca08]
494 12:31:43.423452
495 12:31:43.423894 CPU 3
496 12:31:43.426627 ss3 [0x7b9f4000-0x7b9f4400]
497 12:31:43.429533 stub3 [0x7b9ec400-0x7b9ec608]
498 12:31:43.429922
499 12:31:43.433270 CPU 4
500 12:31:43.436100 ss4 [0x7b9f3c00-0x7b9f4000]
501 12:31:43.439752 stub4 [0x7b9ec000-0x7b9ec208]
502 12:31:43.440174
503 12:31:43.440474 CPU 5
504 12:31:43.443191 ss5 [0x7b9f3800-0x7b9f3c00]
505 12:31:43.446339 stub5 [0x7b9ebc00-0x7b9ebe08]
506 12:31:43.446800
507 12:31:43.449363 CPU 6
508 12:31:43.452984 ss6 [0x7b9f3400-0x7b9f3800]
509 12:31:43.456697 stub6 [0x7b9eb800-0x7b9eba08]
510 12:31:43.457089
511 12:31:43.457403 CPU 7
512 12:31:43.459595 ss7 [0x7b9f3000-0x7b9f3400]
513 12:31:43.462582 stub7 [0x7b9eb400-0x7b9eb608]
514 12:31:43.462975
515 12:31:43.466156 stacks [0x7b800000-0x7b804000]
516 12:31:43.476304 Loading module at 0x7b9f5000 with entry 0x7b9f5d5f. filesize: 0x4448 memsize: 0x9568
517 12:31:43.479261 Processing 255 relocs. Offset value of 0x7b9f5000
518 12:31:43.489496 Loading module at 0x7b9ed000 with entry 0x7b9ed000. filesize: 0x208 memsize: 0x208
519 12:31:43.492755 Processing 11 relocs. Offset value of 0x7b9ed000
520 12:31:43.499251 smm_module_setup_stub: stack_top = 0x7b804000
521 12:31:43.502971 smm_module_setup_stub: per cpu stack_size = 0x800
522 12:31:43.509454 smm_module_setup_stub: runtime.start32_offset = 0x4c
523 12:31:43.512700 smm_module_setup_stub: runtime.smm_size = 0x200000
524 12:31:43.519442 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x1
525 12:31:43.526273 smm_place_entry_code: copying from 7b9ed000 to 7b9ecc00 0x208 bytes
526 12:31:43.532683 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x2
527 12:31:43.539549 smm_place_entry_code: copying from 7b9ed000 to 7b9ec800 0x208 bytes
528 12:31:43.546012 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x3
529 12:31:43.552492 smm_place_entry_code: copying from 7b9ed000 to 7b9ec400 0x208 bytes
530 12:31:43.556138 SMM Module: placing smm entry code at 7b9ec000, cpu # 0x4
531 12:31:43.562929 smm_place_entry_code: copying from 7b9ed000 to 7b9ec000 0x208 bytes
532 12:31:43.569517 SMM Module: placing smm entry code at 7b9ebc00, cpu # 0x5
533 12:31:43.576151 smm_place_entry_code: copying from 7b9ed000 to 7b9ebc00 0x208 bytes
534 12:31:43.582548 SMM Module: placing smm entry code at 7b9eb800, cpu # 0x6
535 12:31:43.589207 smm_place_entry_code: copying from 7b9ed000 to 7b9eb800 0x208 bytes
536 12:31:43.596199 SMM Module: placing smm entry code at 7b9eb400, cpu # 0x7
537 12:31:43.602669 smm_place_entry_code: copying from 7b9ed000 to 7b9eb400 0x208 bytes
538 12:31:43.609313 SMM Module: stub loaded at 7b9ed000. Will call 0x7b9f5d5f
539 12:31:43.612727 Clearing SMI status registers
540 12:31:43.615750 SMI_STS: PM1
541 12:31:43.616140 PM1_STS: PWRBTN
542 12:31:43.622688 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 0
543 12:31:43.625999 In relocation handler: CPU 0
544 12:31:43.629728 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
545 12:31:43.635897 Writing SMRR. base = 0x7b800006, mask=0xff800c00
546 12:31:43.636289 Relocation complete.
547 12:31:43.645726 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e3c00, cpu = 5
548 12:31:43.649398 In relocation handler: CPU 5
549 12:31:43.652932 New SMBASE=0x7b9e3c00 IEDBASE=0x7bc00000
550 12:31:43.653323 Relocation complete.
551 12:31:43.662542 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 2
552 12:31:43.662933 In relocation handler: CPU 2
553 12:31:43.669203 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
554 12:31:43.672697 Writing SMRR. base = 0x7b800006, mask=0xff800c00
555 12:31:43.676190 Relocation complete.
556 12:31:43.682753 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 1
557 12:31:43.686421 In relocation handler: CPU 1
558 12:31:43.689436 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
559 12:31:43.692773 Writing SMRR. base = 0x7b800006, mask=0xff800c00
560 12:31:43.695975 Relocation complete.
561 12:31:43.702750 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e3400, cpu = 7
562 12:31:43.705783 In relocation handler: CPU 7
563 12:31:43.709493 New SMBASE=0x7b9e3400 IEDBASE=0x7bc00000
564 12:31:43.715923 Writing SMRR. base = 0x7b800006, mask=0xff800c00
565 12:31:43.719357 Relocation complete.
566 12:31:43.726200 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 3
567 12:31:43.729061 In relocation handler: CPU 3
568 12:31:43.732416 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
569 12:31:43.735888 Writing SMRR. base = 0x7b800006, mask=0xff800c00
570 12:31:43.739154 Relocation complete.
571 12:31:43.745817 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4000, cpu = 4
572 12:31:43.748962 In relocation handler: CPU 4
573 12:31:43.752370 New SMBASE=0x7b9e4000 IEDBASE=0x7bc00000
574 12:31:43.758811 Writing SMRR. base = 0x7b800006, mask=0xff800c00
575 12:31:43.759218 Relocation complete.
576 12:31:43.765523 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e3800, cpu = 6
577 12:31:43.769179 In relocation handler: CPU 6
578 12:31:43.775466 New SMBASE=0x7b9e3800 IEDBASE=0x7bc00000
579 12:31:43.775904 Relocation complete.
580 12:31:43.779012 Initializing CPU #0
581 12:31:43.782553 CPU: vendor Intel device 906a4
582 12:31:43.785595 CPU: family 06, model 9a, stepping 04
583 12:31:43.789164 Clearing out pending MCEs
584 12:31:43.792385 cpu: energy policy set to 7
585 12:31:43.792866 Turbo is available but hidden
586 12:31:43.795817 Turbo is available and visible
587 12:31:43.802561 microcode: Update skipped, already up-to-date
588 12:31:43.803021 CPU #0 initialized
589 12:31:43.805674 Initializing CPU #5
590 12:31:43.808822 Initializing CPU #4
591 12:31:43.809208 Initializing CPU #6
592 12:31:43.812199 Initializing CPU #1
593 12:31:43.812602 Initializing CPU #7
594 12:31:43.815504 CPU: vendor Intel device 906a4
595 12:31:43.822367 CPU: family 06, model 9a, stepping 04
596 12:31:43.825550 CPU: vendor Intel device 906a4
597 12:31:43.828819 CPU: family 06, model 9a, stepping 04
598 12:31:43.829228 Initializing CPU #3
599 12:31:43.832546 CPU: vendor Intel device 906a4
600 12:31:43.835542 CPU: family 06, model 9a, stepping 04
601 12:31:43.838831 CPU: vendor Intel device 906a4
602 12:31:43.842293 CPU: family 06, model 9a, stepping 04
603 12:31:43.845580 CPU: vendor Intel device 906a4
604 12:31:43.852393 CPU: family 06, model 9a, stepping 04
605 12:31:43.852865 Clearing out pending MCEs
606 12:31:43.855528 Clearing out pending MCEs
607 12:31:43.858933 CPU: vendor Intel device 906a4
608 12:31:43.862137 CPU: family 06, model 9a, stepping 04
609 12:31:43.865375 cpu: energy policy set to 7
610 12:31:43.868794 cpu: energy policy set to 7
611 12:31:43.872282 microcode: Update skipped, already up-to-date
612 12:31:43.875643 CPU #6 initialized
613 12:31:43.879073 Initializing CPU #2
614 12:31:43.879545 Clearing out pending MCEs
615 12:31:43.881833 Clearing out pending MCEs
616 12:31:43.885320 Clearing out pending MCEs
617 12:31:43.888950 Clearing out pending MCEs
618 12:31:43.892174 cpu: energy policy set to 7
619 12:31:43.892725 cpu: energy policy set to 7
620 12:31:43.898619 microcode: Update skipped, already up-to-date
621 12:31:43.899087 CPU #7 initialized
622 12:31:43.902146 CPU: vendor Intel device 906a4
623 12:31:43.905297 CPU: family 06, model 9a, stepping 04
624 12:31:43.908543 cpu: energy policy set to 7
625 12:31:43.915314 microcode: Update skipped, already up-to-date
626 12:31:43.915722 CPU #4 initialized
627 12:31:43.922368 microcode: Update skipped, already up-to-date
628 12:31:43.922837 CPU #5 initialized
629 12:31:43.928737 microcode: Update skipped, already up-to-date
630 12:31:43.929139 CPU #3 initialized
631 12:31:43.931974 Clearing out pending MCEs
632 12:31:43.935302 cpu: energy policy set to 7
633 12:31:43.938463 cpu: energy policy set to 7
634 12:31:43.941772 microcode: Update skipped, already up-to-date
635 12:31:43.945525 CPU #1 initialized
636 12:31:43.948778 microcode: Update skipped, already up-to-date
637 12:31:43.951833 CPU #2 initialized
638 12:31:43.955470 bsp_do_flight_plan done after 633 msecs.
639 12:31:43.958272 CPU: frequency set to 4400 MHz
640 12:31:43.958695 Enabling SMIs.
641 12:31:43.961746 Ramoops buffer: 0x100000@0x7689c000.
642 12:31:43.968889 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 446 ms
643 12:31:43.984219 Probing TPM I2C: done! DID_VID 0x00281ae0
644 12:31:43.987723 Locality already claimed
645 12:31:43.990626 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
646 12:31:44.002221 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
647 12:31:44.005599 Enabling GPIO PM b/c CR50 has long IRQ pulse support
648 12:31:44.012173 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
649 12:31:44.019177 CBFS: Found 'vbt.bin' @0x80540 size 0x4ee in mcache @0x76add214
650 12:31:44.022436 Found a VBT of 9216 bytes after decompression
651 12:31:44.025866 PCI 1.0, PIN A, using IRQ #16
652 12:31:44.029336 PCI 2.0, PIN A, using IRQ #17
653 12:31:44.032065 PCI 4.0, PIN A, using IRQ #18
654 12:31:44.035887 PCI 5.0, PIN A, using IRQ #16
655 12:31:44.038711 PCI 6.0, PIN A, using IRQ #16
656 12:31:44.042415 PCI 6.2, PIN C, using IRQ #18
657 12:31:44.045814 PCI 7.0, PIN A, using IRQ #19
658 12:31:44.049189 PCI 7.1, PIN B, using IRQ #20
659 12:31:44.052280 PCI 7.2, PIN C, using IRQ #21
660 12:31:44.055732 PCI 7.3, PIN D, using IRQ #22
661 12:31:44.058541 PCI 8.0, PIN A, using IRQ #23
662 12:31:44.062156 PCI D.0, PIN A, using IRQ #17
663 12:31:44.062545 PCI D.1, PIN B, using IRQ #19
664 12:31:44.065326 PCI 10.0, PIN A, using IRQ #24
665 12:31:44.068671 PCI 10.1, PIN B, using IRQ #25
666 12:31:44.072143 PCI 10.6, PIN C, using IRQ #20
667 12:31:44.075641 PCI 10.7, PIN D, using IRQ #21
668 12:31:44.078921 PCI 11.0, PIN A, using IRQ #26
669 12:31:44.082279 PCI 11.1, PIN B, using IRQ #27
670 12:31:44.085612 PCI 11.2, PIN C, using IRQ #28
671 12:31:44.088474 PCI 11.3, PIN D, using IRQ #29
672 12:31:44.092070 PCI 12.0, PIN A, using IRQ #30
673 12:31:44.095102 PCI 12.6, PIN B, using IRQ #31
674 12:31:44.098688 PCI 12.7, PIN C, using IRQ #22
675 12:31:44.102343 PCI 13.0, PIN A, using IRQ #32
676 12:31:44.105113 PCI 13.1, PIN B, using IRQ #33
677 12:31:44.108831 PCI 13.2, PIN C, using IRQ #34
678 12:31:44.111624 PCI 13.3, PIN D, using IRQ #35
679 12:31:44.115369 PCI 14.0, PIN B, using IRQ #23
680 12:31:44.115759 PCI 14.1, PIN A, using IRQ #36
681 12:31:44.118428 PCI 14.3, PIN C, using IRQ #17
682 12:31:44.121882 PCI 15.0, PIN A, using IRQ #37
683 12:31:44.125565 PCI 15.1, PIN B, using IRQ #38
684 12:31:44.128593 PCI 15.2, PIN C, using IRQ #39
685 12:31:44.132176 PCI 15.3, PIN D, using IRQ #40
686 12:31:44.135670 PCI 16.0, PIN A, using IRQ #18
687 12:31:44.138588 PCI 16.1, PIN B, using IRQ #19
688 12:31:44.142114 PCI 16.2, PIN C, using IRQ #20
689 12:31:44.145159 PCI 16.3, PIN D, using IRQ #21
690 12:31:44.148628 PCI 16.4, PIN A, using IRQ #18
691 12:31:44.151684 PCI 16.5, PIN B, using IRQ #19
692 12:31:44.154963 PCI 17.0, PIN A, using IRQ #22
693 12:31:44.158217 PCI 19.0, PIN A, using IRQ #41
694 12:31:44.161724 PCI 19.1, PIN B, using IRQ #42
695 12:31:44.164890 PCI 19.2, PIN C, using IRQ #43
696 12:31:44.168158 PCI 1C.0, PIN A, using IRQ #16
697 12:31:44.168546 PCI 1C.1, PIN B, using IRQ #17
698 12:31:44.171718 PCI 1C.2, PIN C, using IRQ #18
699 12:31:44.174862 PCI 1C.3, PIN D, using IRQ #19
700 12:31:44.178302 PCI 1C.4, PIN A, using IRQ #16
701 12:31:44.181852 PCI 1C.5, PIN B, using IRQ #17
702 12:31:44.185225 PCI 1C.6, PIN C, using IRQ #18
703 12:31:44.188115 PCI 1C.7, PIN D, using IRQ #19
704 12:31:44.191643 PCI 1D.0, PIN A, using IRQ #16
705 12:31:44.194992 PCI 1D.1, PIN B, using IRQ #17
706 12:31:44.198187 PCI 1D.2, PIN C, using IRQ #18
707 12:31:44.201480 PCI 1D.3, PIN D, using IRQ #19
708 12:31:44.205257 PCI 1E.0, PIN A, using IRQ #23
709 12:31:44.208088 PCI 1E.1, PIN B, using IRQ #20
710 12:31:44.211645 PCI 1E.2, PIN C, using IRQ #44
711 12:31:44.215079 PCI 1E.3, PIN D, using IRQ #45
712 12:31:44.218087 PCI 1F.3, PIN B, using IRQ #22
713 12:31:44.221740 PCI 1F.4, PIN C, using IRQ #23
714 12:31:44.224743 PCI 1F.6, PIN D, using IRQ #20
715 12:31:44.225150 PCI 1F.7, PIN A, using IRQ #21
716 12:31:44.231307 IRQ: Using dynamically assigned PCI IO-APIC IRQs
717 12:31:44.238414 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
718 12:31:44.405692 FSPS returned 0
719 12:31:44.409146 Executing Phase 1 of FspMultiPhaseSiInit
720 12:31:44.419128 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
721 12:31:44.422139 port C0 DISC req: usage 1 usb3 1 usb2 1
722 12:31:44.426000 Raw Buffer output 0 00000111
723 12:31:44.428945 Raw Buffer output 1 00000000
724 12:31:44.432790 pmc_send_ipc_cmd succeeded
725 12:31:44.439300 port C1 DISC req: usage 1 usb3 3 usb2 3
726 12:31:44.439693 Raw Buffer output 0 00000331
727 12:31:44.442992 Raw Buffer output 1 00000000
728 12:31:44.446582 pmc_send_ipc_cmd succeeded
729 12:31:44.450627 Detected 6 core, 8 thread CPU.
730 12:31:44.453850 Detected 6 core, 8 thread CPU.
731 12:31:44.459448 Detected 6 core, 8 thread CPU.
732 12:31:44.462573 Detected 6 core, 8 thread CPU.
733 12:31:44.465700 Detected 6 core, 8 thread CPU.
734 12:31:44.469255 Detected 6 core, 8 thread CPU.
735 12:31:44.472355 Detected 6 core, 8 thread CPU.
736 12:31:44.475963 Detected 6 core, 8 thread CPU.
737 12:31:44.479078 Detected 6 core, 8 thread CPU.
738 12:31:44.482539 Detected 6 core, 8 thread CPU.
739 12:31:44.486392 Detected 6 core, 8 thread CPU.
740 12:31:44.489185 Detected 6 core, 8 thread CPU.
741 12:31:44.492593 Detected 6 core, 8 thread CPU.
742 12:31:44.495816 Detected 6 core, 8 thread CPU.
743 12:31:44.499280 Detected 6 core, 8 thread CPU.
744 12:31:44.502751 Detected 6 core, 8 thread CPU.
745 12:31:44.506502 Detected 6 core, 8 thread CPU.
746 12:31:44.509471 Detected 6 core, 8 thread CPU.
747 12:31:44.512432 Detected 6 core, 8 thread CPU.
748 12:31:44.516052 Detected 6 core, 8 thread CPU.
749 12:31:44.516603 Detected 6 core, 8 thread CPU.
750 12:31:44.519283 Detected 6 core, 8 thread CPU.
751 12:31:44.998184 Detected 6 core, 8 thread CPU.
752 12:31:45.001108 Detected 6 core, 8 thread CPU.
753 12:31:45.004893 Detected 6 core, 8 thread CPU.
754 12:31:45.007802 Detected 6 core, 8 thread CPU.
755 12:31:45.010952 Detected 6 core, 8 thread CPU.
756 12:31:45.014550 Detected 6 core, 8 thread CPU.
757 12:31:45.017734 Detected 6 core, 8 thread CPU.
758 12:31:45.021236 Detected 6 core, 8 thread CPU.
759 12:31:45.024736 Detected 6 core, 8 thread CPU.
760 12:31:45.027574 Detected 6 core, 8 thread CPU.
761 12:31:45.031188 Detected 6 core, 8 thread CPU.
762 12:31:45.034783 Detected 6 core, 8 thread CPU.
763 12:31:45.037860 Detected 6 core, 8 thread CPU.
764 12:31:45.041365 Detected 6 core, 8 thread CPU.
765 12:31:45.044373 Detected 6 core, 8 thread CPU.
766 12:31:45.047894 Detected 6 core, 8 thread CPU.
767 12:31:45.051340 Detected 6 core, 8 thread CPU.
768 12:31:45.054844 Detected 6 core, 8 thread CPU.
769 12:31:45.057914 Detected 6 core, 8 thread CPU.
770 12:31:45.058310 Detected 6 core, 8 thread CPU.
771 12:31:45.061438 Display FSP Version Info HOB
772 12:31:45.064955 Reference Code - CPU = c.0.65.70
773 12:31:45.068435 uCode Version = 0.0.4.32
774 12:31:45.071435 TXT ACM version = ff.ff.ff.ffff
775 12:31:45.075054 Reference Code - ME = c.0.65.70
776 12:31:45.077985 MEBx version = 0.0.0.0
777 12:31:45.120979 ME Firmware Version = Consumer SKU
778 12:31:45.121541 Reference Code - PCH = c.0.65.70
779 12:31:45.121955 PCH-CRID Status = Disabled
780 12:31:45.122261 PCH-CRID Original Value = ff.ff.ff.ffff
781 12:31:45.122851 PCH-CRID New Value = ff.ff.ff.ffff
782 12:31:45.123165 OPROM - RST - RAID = ff.ff.ff.ffff
783 12:31:45.123623 PCH Hsio Version = 4.0.0.0
784 12:31:45.123979 Reference Code - SA - System Agent = c.0.65.70
785 12:31:45.124264 Reference Code - MRC = 0.0.3.80
786 12:31:45.124529 SA - PCIe Version = c.0.65.70
787 12:31:45.124832 SA-CRID Status = Disabled
788 12:31:45.125199 SA-CRID Original Value = 0.0.0.4
789 12:31:45.125475 SA-CRID New Value = 0.0.0.4
790 12:31:45.125734 OPROM - VBIOS = ff.ff.ff.ffff
791 12:31:45.128199 IO Manageability Engine FW Version = 24.0.6.0
792 12:31:45.131454 PHY Build Version = 0.0.0.2041
793 12:31:45.134548 Thunderbolt(TM) FW Version = 0.0.0.0
794 12:31:45.141854 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
795 12:31:45.144757 Sending EOP early from SoC
796 12:31:45.154954 HECI: coreboot in recovery mode; found CSE in expected SOFT TEMP DISABLE state, skipping EOP
797 12:31:45.157882 BS: BS_DEV_INIT_CHIPS run times (exec / console): 663 / 519 ms
798 12:31:45.161314 Enumerating buses...
799 12:31:45.164763 Show all devs... Before device enumeration.
800 12:31:45.168005 Root Device: enabled 1
801 12:31:45.171731 CPU_CLUSTER: 0: enabled 1
802 12:31:45.174547 DOMAIN: 0000: enabled 1
803 12:31:45.174944 GPIO: 0: enabled 1
804 12:31:45.177733 PCI: 00:00.0: enabled 1
805 12:31:45.181688 PCI: 00:01.0: enabled 0
806 12:31:45.182168 PCI: 00:01.1: enabled 0
807 12:31:45.184874 PCI: 00:02.0: enabled 1
808 12:31:45.187933 PCI: 00:04.0: enabled 1
809 12:31:45.191556 PCI: 00:05.0: enabled 0
810 12:31:45.191987 PCI: 00:06.0: enabled 1
811 12:31:45.195221 PCI: 00:06.2: enabled 0
812 12:31:45.198373 PCI: 00:07.0: enabled 0
813 12:31:45.201680 PCI: 00:07.1: enabled 0
814 12:31:45.202158 PCI: 00:07.2: enabled 0
815 12:31:45.204745 PCI: 00:07.3: enabled 0
816 12:31:45.207763 PCI: 00:08.0: enabled 0
817 12:31:45.211409 PCI: 00:09.0: enabled 0
818 12:31:45.211831 PCI: 00:0a.0: enabled 1
819 12:31:45.214956 PCI: 00:0d.0: enabled 1
820 12:31:45.217890 PCI: 00:0d.1: enabled 0
821 12:31:45.218286 PCI: 00:0d.2: enabled 0
822 12:31:45.221448 PCI: 00:0d.3: enabled 0
823 12:31:45.224377 PCI: 00:0e.0: enabled 0
824 12:31:45.227915 PCI: 00:10.0: enabled 0
825 12:31:45.228374 PCI: 00:10.1: enabled 0
826 12:31:45.231315 PCI: 00:10.6: enabled 0
827 12:31:45.234461 PCI: 00:10.7: enabled 0
828 12:31:45.237784 PCI: 00:12.0: enabled 0
829 12:31:45.238176 PCI: 00:12.6: enabled 0
830 12:31:45.241028 PCI: 00:12.7: enabled 0
831 12:31:45.244253 PCI: 00:13.0: enabled 0
832 12:31:45.247875 PCI: 00:14.0: enabled 1
833 12:31:45.248283 PCI: 00:14.1: enabled 0
834 12:31:45.251238 PCI: 00:14.2: enabled 1
835 12:31:45.254524 PCI: 00:14.3: enabled 1
836 12:31:45.257972 PCI: 00:15.0: enabled 1
837 12:31:45.258365 PCI: 00:15.1: enabled 1
838 12:31:45.261505 PCI: 00:15.2: enabled 0
839 12:31:45.264332 PCI: 00:15.3: enabled 1
840 12:31:45.264726 PCI: 00:16.0: enabled 1
841 12:31:45.267947 PCI: 00:16.1: enabled 0
842 12:31:45.271261 PCI: 00:16.2: enabled 0
843 12:31:45.274444 PCI: 00:16.3: enabled 0
844 12:31:45.274837 PCI: 00:16.4: enabled 0
845 12:31:45.277825 PCI: 00:16.5: enabled 0
846 12:31:45.280937 PCI: 00:17.0: enabled 1
847 12:31:45.284325 PCI: 00:19.0: enabled 0
848 12:31:45.284718 PCI: 00:19.1: enabled 1
849 12:31:45.287700 PCI: 00:19.2: enabled 0
850 12:31:45.291273 PCI: 00:1a.0: enabled 0
851 12:31:45.294264 PCI: 00:1c.0: enabled 0
852 12:31:45.294659 PCI: 00:1c.1: enabled 0
853 12:31:45.297684 PCI: 00:1c.2: enabled 0
854 12:31:45.300761 PCI: 00:1c.3: enabled 0
855 12:31:45.301156 PCI: 00:1c.4: enabled 0
856 12:31:45.304382 PCI: 00:1c.5: enabled 0
857 12:31:45.307785 PCI: 00:1c.6: enabled 0
858 12:31:45.311342 PCI: 00:1c.7: enabled 0
859 12:31:45.311735 PCI: 00:1d.0: enabled 0
860 12:31:45.314395 PCI: 00:1d.1: enabled 0
861 12:31:45.317821 PCI: 00:1d.2: enabled 0
862 12:31:45.321331 PCI: 00:1d.3: enabled 0
863 12:31:45.321723 PCI: 00:1e.0: enabled 1
864 12:31:45.324146 PCI: 00:1e.1: enabled 0
865 12:31:45.327736 PCI: 00:1e.2: enabled 0
866 12:31:45.331201 PCI: 00:1e.3: enabled 1
867 12:31:45.331595 PCI: 00:1f.0: enabled 1
868 12:31:45.334415 PCI: 00:1f.1: enabled 0
869 12:31:45.337336 PCI: 00:1f.2: enabled 1
870 12:31:45.340798 PCI: 00:1f.3: enabled 1
871 12:31:45.341207 PCI: 00:1f.4: enabled 0
872 12:31:45.344208 PCI: 00:1f.5: enabled 1
873 12:31:45.347784 PCI: 00:1f.6: enabled 0
874 12:31:45.348233 PCI: 00:1f.7: enabled 0
875 12:31:45.351148 GENERIC: 0.0: enabled 1
876 12:31:45.354655 GENERIC: 0.0: enabled 1
877 12:31:45.357610 GENERIC: 0.0: enabled 1
878 12:31:45.358111 GENERIC: 1.0: enabled 1
879 12:31:45.360962 GENERIC: 0.0: enabled 1
880 12:31:45.363975 GENERIC: 1.0: enabled 1
881 12:31:45.367713 USB0 port 0: enabled 1
882 12:31:45.368170 USB0 port 0: enabled 1
883 12:31:45.370823 GENERIC: 0.0: enabled 1
884 12:31:45.373947 I2C: 00:1a: enabled 1
885 12:31:45.374338 I2C: 00:31: enabled 1
886 12:31:45.377533 I2C: 00:32: enabled 1
887 12:31:45.380644 I2C: 00:50: enabled 1
888 12:31:45.381035 I2C: 00:10: enabled 1
889 12:31:45.384163 I2C: 00:15: enabled 1
890 12:31:45.387831 I2C: 00:2c: enabled 1
891 12:31:45.388250 GENERIC: 0.0: enabled 1
892 12:31:45.390704 SPI: 00: enabled 1
893 12:31:45.394099 PNP: 0c09.0: enabled 1
894 12:31:45.397248 GENERIC: 0.0: enabled 1
895 12:31:45.397640 USB3 port 0: enabled 1
896 12:31:45.400811 USB3 port 1: enabled 0
897 12:31:45.404406 USB3 port 2: enabled 1
898 12:31:45.404798 USB3 port 3: enabled 0
899 12:31:45.407435 USB2 port 0: enabled 1
900 12:31:45.411006 USB2 port 1: enabled 0
901 12:31:45.411398 USB2 port 2: enabled 1
902 12:31:45.413898 USB2 port 3: enabled 0
903 12:31:45.417436 USB2 port 4: enabled 0
904 12:31:45.420807 USB2 port 5: enabled 1
905 12:31:45.421200 USB2 port 6: enabled 0
906 12:31:45.424293 USB2 port 7: enabled 0
907 12:31:45.427387 USB2 port 8: enabled 1
908 12:31:45.427778 USB2 port 9: enabled 1
909 12:31:45.430828 USB3 port 0: enabled 1
910 12:31:45.434035 USB3 port 1: enabled 0
911 12:31:45.434433 USB3 port 2: enabled 0
912 12:31:45.437254 USB3 port 3: enabled 0
913 12:31:45.440823 GENERIC: 0.0: enabled 1
914 12:31:45.443799 GENERIC: 1.0: enabled 1
915 12:31:45.444211 APIC: 00: enabled 1
916 12:31:45.447406 APIC: 1a: enabled 1
917 12:31:45.450702 APIC: 1c: enabled 1
918 12:31:45.451150 APIC: 1e: enabled 1
919 12:31:45.454048 APIC: 18: enabled 1
920 12:31:45.454440 APIC: 01: enabled 1
921 12:31:45.457423 APIC: 09: enabled 1
922 12:31:45.460426 APIC: 08: enabled 1
923 12:31:45.460821 Compare with tree...
924 12:31:45.463989 Root Device: enabled 1
925 12:31:45.467362 CPU_CLUSTER: 0: enabled 1
926 12:31:45.467894 APIC: 00: enabled 1
927 12:31:45.470792 APIC: 1a: enabled 1
928 12:31:45.473967 APIC: 1c: enabled 1
929 12:31:45.474456 APIC: 1e: enabled 1
930 12:31:45.477336 APIC: 18: enabled 1
931 12:31:45.480738 APIC: 01: enabled 1
932 12:31:45.484038 APIC: 09: enabled 1
933 12:31:45.484433 APIC: 08: enabled 1
934 12:31:45.487194 DOMAIN: 0000: enabled 1
935 12:31:45.490604 GPIO: 0: enabled 1
936 12:31:45.491060 PCI: 00:00.0: enabled 1
937 12:31:45.493744 PCI: 00:01.0: enabled 0
938 12:31:45.497121 PCI: 00:01.1: enabled 0
939 12:31:45.500740 PCI: 00:02.0: enabled 1
940 12:31:45.504348 GENERIC: 0.0: enabled 1
941 12:31:45.504743 PCI: 00:04.0: enabled 1
942 12:31:45.507295 GENERIC: 0.0: enabled 1
943 12:31:45.510362 PCI: 00:05.0: enabled 0
944 12:31:45.513989 PCI: 00:06.0: enabled 1
945 12:31:45.517501 PCI: 00:06.2: enabled 0
946 12:31:45.517894 PCI: 00:08.0: enabled 0
947 12:31:45.520515 PCI: 00:09.0: enabled 0
948 12:31:45.524075 PCI: 00:0a.0: enabled 1
949 12:31:45.527148 PCI: 00:0d.0: enabled 1
950 12:31:45.530478 USB0 port 0: enabled 1
951 12:31:45.530873 USB3 port 0: enabled 1
952 12:31:45.534089 USB3 port 1: enabled 0
953 12:31:45.537460 USB3 port 2: enabled 1
954 12:31:45.540887 USB3 port 3: enabled 0
955 12:31:45.543587 PCI: 00:0d.1: enabled 0
956 12:31:45.544014 PCI: 00:0d.2: enabled 0
957 12:31:45.547269 PCI: 00:0d.3: enabled 0
958 12:31:45.550551 PCI: 00:0e.0: enabled 0
959 12:31:45.553529 PCI: 00:10.0: enabled 0
960 12:31:45.556969 PCI: 00:10.1: enabled 0
961 12:31:45.557363 PCI: 00:10.6: enabled 0
962 12:31:45.560499 PCI: 00:10.7: enabled 0
963 12:31:45.563467 PCI: 00:12.0: enabled 0
964 12:31:45.567251 PCI: 00:12.6: enabled 0
965 12:31:45.570072 PCI: 00:12.7: enabled 0
966 12:31:45.570466 PCI: 00:13.0: enabled 0
967 12:31:45.573431 PCI: 00:14.0: enabled 1
968 12:31:45.577452 USB0 port 0: enabled 1
969 12:31:45.580665 USB2 port 0: enabled 1
970 12:31:45.583757 USB2 port 1: enabled 0
971 12:31:45.584195 USB2 port 2: enabled 1
972 12:31:45.586832 USB2 port 3: enabled 0
973 12:31:45.590740 USB2 port 4: enabled 0
974 12:31:45.593439 USB2 port 5: enabled 1
975 12:31:45.596915 USB2 port 6: enabled 0
976 12:31:45.600249 USB2 port 7: enabled 0
977 12:31:45.600641 USB2 port 8: enabled 1
978 12:31:45.603466 USB2 port 9: enabled 1
979 12:31:45.606819 USB3 port 0: enabled 1
980 12:31:45.610553 USB3 port 1: enabled 0
981 12:31:45.613548 USB3 port 2: enabled 0
982 12:31:45.616366 USB3 port 3: enabled 0
983 12:31:45.616759 PCI: 00:14.1: enabled 0
984 12:31:45.619947 PCI: 00:14.2: enabled 1
985 12:31:45.623574 PCI: 00:14.3: enabled 1
986 12:31:45.626787 GENERIC: 0.0: enabled 1
987 12:31:45.630050 PCI: 00:15.0: enabled 1
988 12:31:45.630640 I2C: 00:1a: enabled 1
989 12:31:45.633093 I2C: 00:31: enabled 1
990 12:31:45.636782 I2C: 00:32: enabled 1
991 12:31:45.639789 PCI: 00:15.1: enabled 1
992 12:31:45.640222 I2C: 00:50: enabled 1
993 12:31:45.643244 PCI: 00:15.2: enabled 0
994 12:31:45.646234 PCI: 00:15.3: enabled 1
995 12:31:45.649642 I2C: 00:10: enabled 1
996 12:31:45.653114 PCI: 00:16.0: enabled 1
997 12:31:45.653559 PCI: 00:16.1: enabled 0
998 12:31:45.656430 PCI: 00:16.2: enabled 0
999 12:31:45.659453 PCI: 00:16.3: enabled 0
1000 12:31:45.663462 PCI: 00:16.4: enabled 0
1001 12:31:45.666303 PCI: 00:16.5: enabled 0
1002 12:31:45.666695 PCI: 00:17.0: enabled 1
1003 12:31:45.669780 PCI: 00:19.0: enabled 0
1004 12:31:45.672971 PCI: 00:19.1: enabled 1
1005 12:31:45.676110 I2C: 00:15: enabled 1
1006 12:31:45.676503 I2C: 00:2c: enabled 1
1007 12:31:45.679328 PCI: 00:19.2: enabled 0
1008 12:31:45.682548 PCI: 00:1a.0: enabled 0
1009 12:31:45.685925 PCI: 00:1e.0: enabled 1
1010 12:31:45.689199 PCI: 00:1e.1: enabled 0
1011 12:31:45.689592 PCI: 00:1e.2: enabled 0
1012 12:31:45.692624 PCI: 00:1e.3: enabled 1
1013 12:31:45.696213 SPI: 00: enabled 1
1014 12:31:45.699040 PCI: 00:1f.0: enabled 1
1015 12:31:45.702697 PNP: 0c09.0: enabled 1
1016 12:31:45.703124 PCI: 00:1f.1: enabled 0
1017 12:31:45.706221 PCI: 00:1f.2: enabled 1
1018 12:31:45.709298 GENERIC: 0.0: enabled 1
1019 12:31:45.712805 GENERIC: 0.0: enabled 1
1020 12:31:45.715695 GENERIC: 1.0: enabled 1
1021 12:31:45.716111 PCI: 00:1f.3: enabled 1
1022 12:31:45.719312 PCI: 00:1f.4: enabled 0
1023 12:31:45.722438 PCI: 00:1f.5: enabled 1
1024 12:31:45.725828 PCI: 00:1f.6: enabled 0
1025 12:31:45.729467 PCI: 00:1f.7: enabled 0
1026 12:31:45.729862 Root Device scanning...
1027 12:31:45.732433 scan_static_bus for Root Device
1028 12:31:45.736228 CPU_CLUSTER: 0 enabled
1029 12:31:45.738968 DOMAIN: 0000 enabled
1030 12:31:45.739361 DOMAIN: 0000 scanning...
1031 12:31:45.742571 PCI: pci_scan_bus for bus 00
1032 12:31:45.745608 PCI: 00:00.0 [8086/0000] ops
1033 12:31:45.748696 PCI: 00:00.0 [8086/4609] enabled
1034 12:31:45.752369 PCI: 00:02.0 [8086/0000] bus ops
1035 12:31:45.755930 PCI: 00:02.0 [8086/46b3] enabled
1036 12:31:45.758879 PCI: 00:04.0 [8086/0000] bus ops
1037 12:31:45.762299 PCI: 00:04.0 [8086/461d] enabled
1038 12:31:45.765665 PCI: 00:06.0 [8086/0000] bus ops
1039 12:31:45.769193 PCI: 00:06.0 [8086/464d] enabled
1040 12:31:45.772176 PCI: 00:08.0 [8086/464f] disabled
1041 12:31:45.775923 PCI: 00:0a.0 [8086/467d] enabled
1042 12:31:45.778683 PCI: 00:0d.0 [8086/0000] bus ops
1043 12:31:45.785226 PCI: 00:0d.0 [8086/461e] enabled
1044 12:31:45.788871 PCI: 00:14.0 [8086/0000] bus ops
1045 12:31:45.791992 PCI: 00:14.0 [8086/51ed] enabled
1046 12:31:45.795344 PCI: 00:14.2 [8086/51ef] enabled
1047 12:31:45.799098 PCI: 00:14.3 [8086/0000] bus ops
1048 12:31:45.802082 PCI: 00:14.3 [8086/51f0] enabled
1049 12:31:45.805097 PCI: 00:15.0 [8086/0000] bus ops
1050 12:31:45.808587 PCI: 00:15.0 [8086/51e8] enabled
1051 12:31:45.811934 PCI: 00:15.1 [8086/0000] bus ops
1052 12:31:45.815367 PCI: 00:15.1 [8086/51e9] enabled
1053 12:31:45.819041 PCI: 00:15.2 [8086/0000] bus ops
1054 12:31:45.822524 PCI: 00:15.2 [8086/51ea] disabled
1055 12:31:45.825328 PCI: 00:15.3 [8086/0000] bus ops
1056 12:31:45.828793 PCI: 00:15.3 [8086/51eb] enabled
1057 12:31:45.831767 PCI: 00:16.0 [8086/0000] ops
1058 12:31:45.835375 PCI: 00:16.0 [8086/51e0] enabled
1059 12:31:45.838880 PCI: Static device PCI: 00:17.0 not found, disabling it.
1060 12:31:45.841718 PCI: 00:19.0 [8086/0000] bus ops
1061 12:31:45.845305 PCI: 00:19.0 [8086/51c5] disabled
1062 12:31:45.848336 PCI: 00:19.1 [8086/0000] bus ops
1063 12:31:45.852345 PCI: 00:19.1 [8086/51c6] enabled
1064 12:31:45.855454 PCI: 00:1e.0 [8086/0000] ops
1065 12:31:45.858419 PCI: 00:1e.0 [8086/51a8] enabled
1066 12:31:45.861994 PCI: 00:1e.3 [8086/0000] bus ops
1067 12:31:45.865694 PCI: 00:1e.3 [8086/51ab] enabled
1068 12:31:45.868591 PCI: 00:1f.0 [8086/0000] bus ops
1069 12:31:45.872082 PCI: 00:1f.0 [8086/5182] enabled
1070 12:31:45.876506 RTC Init
1071 12:31:45.879170 Set power on after power failure.
1072 12:31:45.882523 Disabling Deep S3
1073 12:31:45.883166 Disabling Deep S3
1074 12:31:45.885710 Disabling Deep S4
1075 12:31:45.886118 Disabling Deep S4
1076 12:31:45.889421 Disabling Deep S5
1077 12:31:45.889810 Disabling Deep S5
1078 12:31:45.892554 PCI: 00:1f.2 [0000/0000] hidden
1079 12:31:45.895699 PCI: 00:1f.3 [8086/0000] bus ops
1080 12:31:45.899244 PCI: 00:1f.3 [8086/51c8] enabled
1081 12:31:45.902419 PCI: 00:1f.5 [8086/0000] bus ops
1082 12:31:45.905854 PCI: 00:1f.5 [8086/51a4] enabled
1083 12:31:45.908926 GPIO: 0 enabled
1084 12:31:45.912409 PCI: Leftover static devices:
1085 12:31:45.912844 PCI: 00:01.0
1086 12:31:45.915628 PCI: 00:01.1
1087 12:31:45.916083 PCI: 00:05.0
1088 12:31:45.916394 PCI: 00:06.2
1089 12:31:45.918880 PCI: 00:09.0
1090 12:31:45.919266 PCI: 00:0d.1
1091 12:31:45.922158 PCI: 00:0d.2
1092 12:31:45.922555 PCI: 00:0d.3
1093 12:31:45.922876 PCI: 00:0e.0
1094 12:31:45.927147 PCI: 00:10.0
1095 12:31:45.927609 PCI: 00:10.1
1096 12:31:45.928802 PCI: 00:10.6
1097 12:31:45.929216 PCI: 00:10.7
1098 12:31:45.932685 PCI: 00:12.0
1099 12:31:45.933074 PCI: 00:12.6
1100 12:31:45.933405 PCI: 00:12.7
1101 12:31:45.935721 PCI: 00:13.0
1102 12:31:45.936183 PCI: 00:14.1
1103 12:31:45.938751 PCI: 00:16.1
1104 12:31:45.939163 PCI: 00:16.2
1105 12:31:45.939468 PCI: 00:16.3
1106 12:31:45.942351 PCI: 00:16.4
1107 12:31:45.942762 PCI: 00:16.5
1108 12:31:45.945338 PCI: 00:17.0
1109 12:31:45.945742 PCI: 00:19.2
1110 12:31:45.946048 PCI: 00:1a.0
1111 12:31:45.948830 PCI: 00:1e.1
1112 12:31:45.949245 PCI: 00:1e.2
1113 12:31:45.952335 PCI: 00:1f.1
1114 12:31:45.952739 PCI: 00:1f.4
1115 12:31:45.955617 PCI: 00:1f.6
1116 12:31:45.956054 PCI: 00:1f.7
1117 12:31:45.958806 PCI: Check your devicetree.cb.
1118 12:31:45.962464 PCI: 00:02.0 scanning...
1119 12:31:45.965475 scan_generic_bus for PCI: 00:02.0
1120 12:31:45.965883 GENERIC: 0.0 enabled
1121 12:31:45.972037 bus: PCI: 00:02.0[0]->scan_generic_bus for PCI: 00:02.0 done
1122 12:31:45.978824 scan_bus: bus PCI: 00:02.0 finished in 11 msecs
1123 12:31:45.979218 PCI: 00:04.0 scanning...
1124 12:31:45.981904 scan_generic_bus for PCI: 00:04.0
1125 12:31:45.985646 GENERIC: 0.0 enabled
1126 12:31:45.991883 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1127 12:31:45.995323 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1128 12:31:45.998689 PCI: 00:06.0 scanning...
1129 12:31:46.002176 do_pci_scan_bridge for PCI: 00:06.0
1130 12:31:46.005718 PCI: pci_scan_bus for bus 01
1131 12:31:46.008500 PCI: 01:00.0 [15b7/5009] enabled
1132 12:31:46.012199 Enabling Common Clock Configuration
1133 12:31:46.015565 L1 Sub-State supported from root port 6
1134 12:31:46.018557 L1 Sub-State Support = 0x5
1135 12:31:46.021952 CommonModeRestoreTime = 0x6e
1136 12:31:46.025146 Power On Value = 0x5, Power On Scale = 0x2
1137 12:31:46.029041 ASPM: Enabled L1
1138 12:31:46.032184 PCIe: Max_Payload_Size adjusted to 256
1139 12:31:46.035494 PCI: 01:00.0: Enabled LTR
1140 12:31:46.038636 PCI: 01:00.0: Programmed LTR max latencies
1141 12:31:46.045592 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1142 12:31:46.046015 PCI: 00:0d.0 scanning...
1143 12:31:46.048562 scan_static_bus for PCI: 00:0d.0
1144 12:31:46.051732 USB0 port 0 enabled
1145 12:31:46.055380 USB0 port 0 scanning...
1146 12:31:46.058415 scan_static_bus for USB0 port 0
1147 12:31:46.058817 USB3 port 0 enabled
1148 12:31:46.061900 USB3 port 1 disabled
1149 12:31:46.064991 USB3 port 2 enabled
1150 12:31:46.065398 USB3 port 3 disabled
1151 12:31:46.068448 USB3 port 0 scanning...
1152 12:31:46.071909 scan_static_bus for USB3 port 0
1153 12:31:46.075706 scan_static_bus for USB3 port 0 done
1154 12:31:46.078679 scan_bus: bus USB3 port 0 finished in 6 msecs
1155 12:31:46.081981 USB3 port 2 scanning...
1156 12:31:46.085413 scan_static_bus for USB3 port 2
1157 12:31:46.088724 scan_static_bus for USB3 port 2 done
1158 12:31:46.095016 scan_bus: bus USB3 port 2 finished in 6 msecs
1159 12:31:46.098583 scan_static_bus for USB0 port 0 done
1160 12:31:46.102174 scan_bus: bus USB0 port 0 finished in 43 msecs
1161 12:31:46.105237 scan_static_bus for PCI: 00:0d.0 done
1162 12:31:46.112280 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1163 12:31:46.112678 PCI: 00:14.0 scanning...
1164 12:31:46.115405 scan_static_bus for PCI: 00:14.0
1165 12:31:46.118691 USB0 port 0 enabled
1166 12:31:46.121542 USB0 port 0 scanning...
1167 12:31:46.125200 scan_static_bus for USB0 port 0
1168 12:31:46.125672 USB2 port 0 enabled
1169 12:31:46.128658 USB2 port 1 disabled
1170 12:31:46.131948 USB2 port 2 enabled
1171 12:31:46.132358 USB2 port 3 disabled
1172 12:31:46.134881 USB2 port 4 disabled
1173 12:31:46.138472 USB2 port 5 enabled
1174 12:31:46.138864 USB2 port 6 disabled
1175 12:31:46.142005 USB2 port 7 disabled
1176 12:31:46.142400 USB2 port 8 enabled
1177 12:31:46.145344 USB2 port 9 enabled
1178 12:31:46.148515 USB3 port 0 enabled
1179 12:31:46.148906 USB3 port 1 disabled
1180 12:31:46.151722 USB3 port 2 disabled
1181 12:31:46.155015 USB3 port 3 disabled
1182 12:31:46.155409 USB2 port 0 scanning...
1183 12:31:46.158392 scan_static_bus for USB2 port 0
1184 12:31:46.161849 scan_static_bus for USB2 port 0 done
1185 12:31:46.168756 scan_bus: bus USB2 port 0 finished in 6 msecs
1186 12:31:46.171769 USB2 port 2 scanning...
1187 12:31:46.175360 scan_static_bus for USB2 port 2
1188 12:31:46.178235 scan_static_bus for USB2 port 2 done
1189 12:31:46.181872 scan_bus: bus USB2 port 2 finished in 6 msecs
1190 12:31:46.185287 USB2 port 5 scanning...
1191 12:31:46.188363 scan_static_bus for USB2 port 5
1192 12:31:46.191902 scan_static_bus for USB2 port 5 done
1193 12:31:46.194837 scan_bus: bus USB2 port 5 finished in 6 msecs
1194 12:31:46.198248 USB2 port 8 scanning...
1195 12:31:46.201470 scan_static_bus for USB2 port 8
1196 12:31:46.204982 scan_static_bus for USB2 port 8 done
1197 12:31:46.208560 scan_bus: bus USB2 port 8 finished in 6 msecs
1198 12:31:46.211455 USB2 port 9 scanning...
1199 12:31:46.215019 scan_static_bus for USB2 port 9
1200 12:31:46.218238 scan_static_bus for USB2 port 9 done
1201 12:31:46.225100 scan_bus: bus USB2 port 9 finished in 6 msecs
1202 12:31:46.225517 USB3 port 0 scanning...
1203 12:31:46.228086 scan_static_bus for USB3 port 0
1204 12:31:46.231698 scan_static_bus for USB3 port 0 done
1205 12:31:46.237924 scan_bus: bus USB3 port 0 finished in 6 msecs
1206 12:31:46.241585 scan_static_bus for USB0 port 0 done
1207 12:31:46.244512 scan_bus: bus USB0 port 0 finished in 120 msecs
1208 12:31:46.251662 scan_static_bus for PCI: 00:14.0 done
1209 12:31:46.254539 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1210 12:31:46.258181 PCI: 00:14.3 scanning...
1211 12:31:46.261598 scan_static_bus for PCI: 00:14.3
1212 12:31:46.262137 GENERIC: 0.0 enabled
1213 12:31:46.268330 scan_static_bus for PCI: 00:14.3 done
1214 12:31:46.271781 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1215 12:31:46.274633 PCI: 00:15.0 scanning...
1216 12:31:46.278314 scan_static_bus for PCI: 00:15.0
1217 12:31:46.278807 I2C: 00:1a enabled
1218 12:31:46.281258 I2C: 00:31 enabled
1219 12:31:46.284523 I2C: 00:32 enabled
1220 12:31:46.287890 scan_static_bus for PCI: 00:15.0 done
1221 12:31:46.291048 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1222 12:31:46.294678 PCI: 00:15.1 scanning...
1223 12:31:46.298190 scan_static_bus for PCI: 00:15.1
1224 12:31:46.301303 I2C: 00:50 enabled
1225 12:31:46.305158 scan_static_bus for PCI: 00:15.1 done
1226 12:31:46.307995 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1227 12:31:46.311291 PCI: 00:15.3 scanning...
1228 12:31:46.314481 scan_static_bus for PCI: 00:15.3
1229 12:31:46.314958 I2C: 00:10 enabled
1230 12:31:46.321437 scan_static_bus for PCI: 00:15.3 done
1231 12:31:46.324310 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1232 12:31:46.327571 PCI: 00:19.1 scanning...
1233 12:31:46.331104 scan_static_bus for PCI: 00:19.1
1234 12:31:46.331582 I2C: 00:15 enabled
1235 12:31:46.334190 I2C: 00:2c enabled
1236 12:31:46.337414 scan_static_bus for PCI: 00:19.1 done
1237 12:31:46.341272 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1238 12:31:46.344179 PCI: 00:1e.3 scanning...
1239 12:31:46.347693 scan_generic_bus for PCI: 00:1e.3
1240 12:31:46.351373 SPI: 00 enabled
1241 12:31:46.357658 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1242 12:31:46.361270 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1243 12:31:46.364363 PCI: 00:1f.0 scanning...
1244 12:31:46.367986 scan_static_bus for PCI: 00:1f.0
1245 12:31:46.368464 PNP: 0c09.0 enabled
1246 12:31:46.371176 PNP: 0c09.0 scanning...
1247 12:31:46.374690 scan_static_bus for PNP: 0c09.0
1248 12:31:46.377703 scan_static_bus for PNP: 0c09.0 done
1249 12:31:46.384282 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1250 12:31:46.387519 scan_static_bus for PCI: 00:1f.0 done
1251 12:31:46.390621 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1252 12:31:46.393851 PCI: 00:1f.2 scanning...
1253 12:31:46.397631 scan_static_bus for PCI: 00:1f.2
1254 12:31:46.400540 GENERIC: 0.0 enabled
1255 12:31:46.400941 GENERIC: 0.0 scanning...
1256 12:31:46.404142 scan_static_bus for GENERIC: 0.0
1257 12:31:46.407329 GENERIC: 0.0 enabled
1258 12:31:46.410910 GENERIC: 1.0 enabled
1259 12:31:46.414424 scan_static_bus for GENERIC: 0.0 done
1260 12:31:46.417587 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1261 12:31:46.420517 scan_static_bus for PCI: 00:1f.2 done
1262 12:31:46.427626 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1263 12:31:46.430726 PCI: 00:1f.3 scanning...
1264 12:31:46.434145 scan_static_bus for PCI: 00:1f.3
1265 12:31:46.436858 scan_static_bus for PCI: 00:1f.3 done
1266 12:31:46.440450 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1267 12:31:46.443641 PCI: 00:1f.5 scanning...
1268 12:31:46.447089 scan_generic_bus for PCI: 00:1f.5
1269 12:31:46.450576 scan_generic_bus for PCI: 00:1f.5 done
1270 12:31:46.456829 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1271 12:31:46.460250 scan_bus: bus DOMAIN: 0000 finished in 714 msecs
1272 12:31:46.463769 scan_static_bus for Root Device done
1273 12:31:46.470399 scan_bus: bus Root Device finished in 733 msecs
1274 12:31:46.470796 done
1275 12:31:46.477348 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1306 ms
1276 12:31:46.480368 Chrome EC: UHEPI supported
1277 12:31:46.486960 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1278 12:31:46.493810 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1279 12:31:46.497222 SPI flash protection: WPSW=1 SRP0=0
1280 12:31:46.500337 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1281 12:31:46.506758 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1282 12:31:46.510170 found VGA at PCI: 00:02.0
1283 12:31:46.513832 Setting up VGA for PCI: 00:02.0
1284 12:31:46.516921 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1285 12:31:46.523821 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1286 12:31:46.524253 Allocating resources...
1287 12:31:46.526721 Reading resources...
1288 12:31:46.530272 Root Device read_resources bus 0 link: 0
1289 12:31:46.536837 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1290 12:31:46.540352 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1291 12:31:46.543484 DOMAIN: 0000 read_resources bus 0 link: 0
1292 12:31:46.550009 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1293 12:31:46.556936 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1294 12:31:46.563240 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1295 12:31:46.569854 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1296 12:31:46.576832 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1297 12:31:46.583439 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1298 12:31:46.586694 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1299 12:31:46.593189 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1300 12:31:46.599705 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1301 12:31:46.606391 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1302 12:31:46.613159 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1303 12:31:46.619670 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1304 12:31:46.626340 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1305 12:31:46.632977 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1306 12:31:46.639933 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1307 12:31:46.646440 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1308 12:31:46.653018 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1309 12:31:46.659976 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1310 12:31:46.663013 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1311 12:31:46.670125 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1312 12:31:46.676592 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1313 12:31:46.679763 PCI: 00:02.0 read_resources bus 1 link: 0
1314 12:31:46.686358 GENERIC: 0.0 missing read_resources
1315 12:31:46.689794 PCI: 00:02.0 read_resources bus 1 link: 0 done
1316 12:31:46.693080 PCI: 00:04.0 read_resources bus 2 link: 0
1317 12:31:46.699378 PCI: 00:04.0 read_resources bus 2 link: 0 done
1318 12:31:46.702803 PCI: 00:06.0 read_resources bus 1 link: 0
1319 12:31:46.706404 PCI: 00:06.0 read_resources bus 1 link: 0 done
1320 12:31:46.712938 PCI: 00:0d.0 read_resources bus 0 link: 0
1321 12:31:46.716152 USB0 port 0 read_resources bus 0 link: 0
1322 12:31:46.719385 USB0 port 0 read_resources bus 0 link: 0 done
1323 12:31:46.726337 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1324 12:31:46.729436 PCI: 00:14.0 read_resources bus 0 link: 0
1325 12:31:46.732912 USB0 port 0 read_resources bus 0 link: 0
1326 12:31:46.739411 USB0 port 0 read_resources bus 0 link: 0 done
1327 12:31:46.742521 PCI: 00:14.0 read_resources bus 0 link: 0 done
1328 12:31:46.745927 PCI: 00:14.3 read_resources bus 0 link: 0
1329 12:31:46.752471 PCI: 00:14.3 read_resources bus 0 link: 0 done
1330 12:31:46.755968 PCI: 00:15.0 read_resources bus 0 link: 0
1331 12:31:46.759480 PCI: 00:15.0 read_resources bus 0 link: 0 done
1332 12:31:46.765967 PCI: 00:15.1 read_resources bus 0 link: 0
1333 12:31:46.769555 PCI: 00:15.1 read_resources bus 0 link: 0 done
1334 12:31:46.772496 PCI: 00:15.3 read_resources bus 0 link: 0
1335 12:31:46.779868 PCI: 00:15.3 read_resources bus 0 link: 0 done
1336 12:31:46.782729 PCI: 00:19.1 read_resources bus 0 link: 0
1337 12:31:46.789133 PCI: 00:19.1 read_resources bus 0 link: 0 done
1338 12:31:46.792620 PCI: 00:1e.3 read_resources bus 3 link: 0
1339 12:31:46.795956 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1340 12:31:46.803064 PCI: 00:1f.0 read_resources bus 0 link: 0
1341 12:31:46.806157 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1342 12:31:46.809565 PCI: 00:1f.2 read_resources bus 0 link: 0
1343 12:31:46.815896 GENERIC: 0.0 read_resources bus 0 link: 0
1344 12:31:46.819028 GENERIC: 0.0 read_resources bus 0 link: 0 done
1345 12:31:46.822661 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1346 12:31:46.829602 DOMAIN: 0000 read_resources bus 0 link: 0 done
1347 12:31:46.832647 Root Device read_resources bus 0 link: 0 done
1348 12:31:46.836007 Done reading resources.
1349 12:31:46.842636 Show resources in subtree (Root Device)...After reading.
1350 12:31:46.846013 Root Device child on link 0 CPU_CLUSTER: 0
1351 12:31:46.849294 CPU_CLUSTER: 0 child on link 0 APIC: 00
1352 12:31:46.852338 APIC: 00
1353 12:31:46.852729 APIC: 1a
1354 12:31:46.853035 APIC: 1c
1355 12:31:46.855887 APIC: 1e
1356 12:31:46.856284 APIC: 18
1357 12:31:46.859671 APIC: 01
1358 12:31:46.860108 APIC: 09
1359 12:31:46.860420 APIC: 08
1360 12:31:46.865818 DOMAIN: 0000 child on link 0 GPIO: 0
1361 12:31:46.872742 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1362 12:31:46.882765 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1363 12:31:46.885670 GPIO: 0
1364 12:31:46.886063 PCI: 00:00.0
1365 12:31:46.896091 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1366 12:31:46.905564 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1367 12:31:46.915872 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1368 12:31:46.922065 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1369 12:31:46.932436 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1370 12:31:46.942576 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1371 12:31:46.952307 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1372 12:31:46.962338 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1373 12:31:46.971793 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1374 12:31:46.982019 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1375 12:31:46.988427 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1376 12:31:46.998767 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1377 12:31:47.008851 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1378 12:31:47.018997 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1379 12:31:47.028576 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1380 12:31:47.038736 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1381 12:31:47.045182 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1382 12:31:47.054968 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1383 12:31:47.064999 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1384 12:31:47.075126 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1385 12:31:47.084968 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1386 12:31:47.095030 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1387 12:31:47.104550 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1388 12:31:47.114694 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1389 12:31:47.124637 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1390 12:31:47.131296 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1391 12:31:47.141155 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1392 12:31:47.151310 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1393 12:31:47.157665 PCI: 00:02.0 child on link 0 GENERIC: 0.0
1394 12:31:47.167931 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1395 12:31:47.177586 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1396 12:31:47.183898 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1397 12:31:47.187809 GENERIC: 0.0
1398 12:31:47.190948 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1399 12:31:47.201037 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1400 12:31:47.203814 GENERIC: 0.0
1401 12:31:47.207558 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1402 12:31:47.217019 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1403 12:31:47.227302 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1404 12:31:47.233835 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1405 12:31:47.237310 PCI: 01:00.0
1406 12:31:47.247271 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1407 12:31:47.257134 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1408 12:31:47.260541 PCI: 00:08.0
1409 12:31:47.260933 PCI: 00:0a.0
1410 12:31:47.270251 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1411 12:31:47.273815 PCI: 00:0d.0 child on link 0 USB0 port 0
1412 12:31:47.283937 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1413 12:31:47.290315 USB0 port 0 child on link 0 USB3 port 0
1414 12:31:47.290781 USB3 port 0
1415 12:31:47.293801 USB3 port 1
1416 12:31:47.294195 USB3 port 2
1417 12:31:47.297706 USB3 port 3
1418 12:31:47.300569 PCI: 00:14.0 child on link 0 USB0 port 0
1419 12:31:47.310312 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1420 12:31:47.313737 USB0 port 0 child on link 0 USB2 port 0
1421 12:31:47.317197 USB2 port 0
1422 12:31:47.320214 USB2 port 1
1423 12:31:47.320605 USB2 port 2
1424 12:31:47.323748 USB2 port 3
1425 12:31:47.324185 USB2 port 4
1426 12:31:47.327369 USB2 port 5
1427 12:31:47.327761 USB2 port 6
1428 12:31:47.330703 USB2 port 7
1429 12:31:47.331186 USB2 port 8
1430 12:31:47.333375 USB2 port 9
1431 12:31:47.333768 USB3 port 0
1432 12:31:47.336871 USB3 port 1
1433 12:31:47.337264 USB3 port 2
1434 12:31:47.340368 USB3 port 3
1435 12:31:47.340760 PCI: 00:14.2
1436 12:31:47.350601 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1437 12:31:47.360175 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1438 12:31:47.367356 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1439 12:31:47.376935 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1440 12:31:47.377399 GENERIC: 0.0
1441 12:31:47.383378 PCI: 00:15.0 child on link 0 I2C: 00:1a
1442 12:31:47.393564 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1443 12:31:47.393968 I2C: 00:1a
1444 12:31:47.394282 I2C: 00:31
1445 12:31:47.396890 I2C: 00:32
1446 12:31:47.400149 PCI: 00:15.1 child on link 0 I2C: 00:50
1447 12:31:47.410276 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1448 12:31:47.413577 I2C: 00:50
1449 12:31:47.413969 PCI: 00:15.2
1450 12:31:47.419906 PCI: 00:15.3 child on link 0 I2C: 00:10
1451 12:31:47.430274 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1452 12:31:47.430672 I2C: 00:10
1453 12:31:47.430982 PCI: 00:16.0
1454 12:31:47.440294 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1455 12:31:47.443132 PCI: 00:19.0
1456 12:31:47.446681 PCI: 00:19.1 child on link 0 I2C: 00:15
1457 12:31:47.456865 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1458 12:31:47.459810 I2C: 00:15
1459 12:31:47.460223 I2C: 00:2c
1460 12:31:47.463701 PCI: 00:1e.0
1461 12:31:47.473292 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1462 12:31:47.476542 PCI: 00:1e.3 child on link 0 SPI: 00
1463 12:31:47.486582 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1464 12:31:47.489815 SPI: 00
1465 12:31:47.493466 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 12:31:47.503327 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 12:31:47.503726 PNP: 0c09.0
1468 12:31:47.513267 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1469 12:31:47.516266 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1470 12:31:47.526857 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1471 12:31:47.536113 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1472 12:31:47.539552 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1473 12:31:47.543108 GENERIC: 0.0
1474 12:31:47.543577 GENERIC: 1.0
1475 12:31:47.546148 PCI: 00:1f.3
1476 12:31:47.556566 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1477 12:31:47.566328 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1478 12:31:47.566731 PCI: 00:1f.5
1479 12:31:47.576351 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1480 12:31:47.583249 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1481 12:31:47.589513 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1482 12:31:47.596238 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1483 12:31:47.602697 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1484 12:31:47.606232 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1485 12:31:47.609611 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1486 12:31:47.616172 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1487 12:31:47.622797 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1488 12:31:47.632525 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1489 12:31:47.639484 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1490 12:31:47.646077 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1491 12:31:47.652859 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1492 12:31:47.659274 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1493 12:31:47.669678 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1494 12:31:47.672366 DOMAIN: 0000: Resource ranges:
1495 12:31:47.676362 * Base: 1000, Size: 800, Tag: 100
1496 12:31:47.678986 * Base: 1900, Size: e700, Tag: 100
1497 12:31:47.682630 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1498 12:31:47.689040 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1499 12:31:47.699138 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1500 12:31:47.705731 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1501 12:31:47.712498 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1502 12:31:47.719116 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1503 12:31:47.729047 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1504 12:31:47.735461 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1505 12:31:47.741956 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1506 12:31:47.751882 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1507 12:31:47.758790 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1508 12:31:47.765345 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1509 12:31:47.775503 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1510 12:31:47.781762 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1511 12:31:47.789018 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1512 12:31:47.798924 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1513 12:31:47.805155 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1514 12:31:47.811760 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1515 12:31:47.821792 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1516 12:31:47.828298 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1517 12:31:47.835309 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1518 12:31:47.844839 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1519 12:31:47.851786 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1520 12:31:47.858196 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1521 12:31:47.868767 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1522 12:31:47.875200 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1523 12:31:47.881834 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1524 12:31:47.891463 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1525 12:31:47.897921 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1526 12:31:47.905078 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1527 12:31:47.914437 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1528 12:31:47.922040 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1529 12:31:47.927778 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1530 12:31:47.931367 DOMAIN: 0000: Resource ranges:
1531 12:31:47.937677 * Base: 80400000, Size: 3fc00000, Tag: 200
1532 12:31:47.941096 * Base: d0000000, Size: 28000000, Tag: 200
1533 12:31:47.944350 * Base: fa000000, Size: 1000000, Tag: 200
1534 12:31:47.947912 * Base: fb001000, Size: 17ff000, Tag: 200
1535 12:31:47.954309 * Base: fe800000, Size: 300000, Tag: 200
1536 12:31:47.957662 * Base: feb80000, Size: 80000, Tag: 200
1537 12:31:47.961061 * Base: fed00000, Size: 40000, Tag: 200
1538 12:31:47.964563 * Base: fed70000, Size: 10000, Tag: 200
1539 12:31:47.971162 * Base: fed88000, Size: 8000, Tag: 200
1540 12:31:47.974696 * Base: fed93000, Size: d000, Tag: 200
1541 12:31:47.977920 * Base: feda2000, Size: 1e000, Tag: 200
1542 12:31:47.981331 * Base: fede0000, Size: 1220000, Tag: 200
1543 12:31:47.988271 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1544 12:31:47.994490 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1545 12:31:48.001483 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1546 12:31:48.007816 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1547 12:31:48.014487 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1548 12:31:48.020874 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1549 12:31:48.028163 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1550 12:31:48.034471 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1551 12:31:48.041074 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1552 12:31:48.047899 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1553 12:31:48.054270 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1554 12:31:48.061319 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1555 12:31:48.068042 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1556 12:31:48.074447 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1557 12:31:48.080997 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1558 12:31:48.088008 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1559 12:31:48.094328 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1560 12:31:48.100857 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1561 12:31:48.107318 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1562 12:31:48.114275 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1563 12:31:48.120921 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1564 12:31:48.127473 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1565 12:31:48.130807 PCI: 00:06.0: Resource ranges:
1566 12:31:48.137388 * Base: 80400000, Size: 100000, Tag: 200
1567 12:31:48.143579 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1568 12:31:48.150490 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1569 12:31:48.156920 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1570 12:31:48.163522 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1571 12:31:48.170251 Root Device assign_resources, bus 0 link: 0
1572 12:31:48.173474 DOMAIN: 0000 assign_resources, bus 0 link: 0
1573 12:31:48.183550 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1574 12:31:48.190471 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1575 12:31:48.196790 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1576 12:31:48.203425 PCI: 00:02.0 assign_resources, bus 1 link: 0
1577 12:31:48.206978 PCI: 00:02.0 assign_resources, bus 1 link: 0 done
1578 12:31:48.216598 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1579 12:31:48.219785 PCI: 00:04.0 assign_resources, bus 2 link: 0
1580 12:31:48.226743 PCI: 00:04.0 assign_resources, bus 2 link: 0 done
1581 12:31:48.233606 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1582 12:31:48.243082 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1583 12:31:48.253011 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1584 12:31:48.257148 PCI: 00:06.0 assign_resources, bus 1 link: 0
1585 12:31:48.263087 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1586 12:31:48.273444 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1587 12:31:48.276455 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1588 12:31:48.286696 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1589 12:31:48.293451 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1590 12:31:48.299755 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1591 12:31:48.302939 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1592 12:31:48.309502 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1593 12:31:48.316310 PCI: 00:14.0 assign_resources, bus 0 link: 0
1594 12:31:48.319688 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1595 12:31:48.329462 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1596 12:31:48.336141 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1597 12:31:48.346182 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1598 12:31:48.349641 PCI: 00:14.3 assign_resources, bus 0 link: 0
1599 12:31:48.352681 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1600 12:31:48.362645 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1601 12:31:48.366790 PCI: 00:15.0 assign_resources, bus 0 link: 0
1602 12:31:48.372905 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1603 12:31:48.379187 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1604 12:31:48.382816 PCI: 00:15.1 assign_resources, bus 0 link: 0
1605 12:31:48.389413 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1606 12:31:48.396018 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1607 12:31:48.402678 PCI: 00:15.3 assign_resources, bus 0 link: 0
1608 12:31:48.406237 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1609 12:31:48.416268 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1610 12:31:48.422975 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1611 12:31:48.426126 PCI: 00:19.1 assign_resources, bus 0 link: 0
1612 12:31:48.432672 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1613 12:31:48.439149 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1614 12:31:48.445805 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1615 12:31:48.449590 PCI: 00:1e.3 assign_resources, bus 3 link: 0 done
1616 12:31:48.452540 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1617 12:31:48.459203 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1618 12:31:48.462432 LPC: Trying to open IO window from 800 size 1ff
1619 12:31:48.472391 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1620 12:31:48.479177 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1621 12:31:48.489182 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1622 12:31:48.492088 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1623 12:31:48.498756 Root Device assign_resources, bus 0 link: 0 done
1624 12:31:48.499151 Done setting resources.
1625 12:31:48.505417 Show resources in subtree (Root Device)...After assigning values.
1626 12:31:48.512374 Root Device child on link 0 CPU_CLUSTER: 0
1627 12:31:48.515985 CPU_CLUSTER: 0 child on link 0 APIC: 00
1628 12:31:48.516382 APIC: 00
1629 12:31:48.518955 APIC: 1a
1630 12:31:48.519359 APIC: 1c
1631 12:31:48.519669 APIC: 1e
1632 12:31:48.522533 APIC: 18
1633 12:31:48.522927 APIC: 01
1634 12:31:48.523240 APIC: 09
1635 12:31:48.526306 APIC: 08
1636 12:31:48.529179 DOMAIN: 0000 child on link 0 GPIO: 0
1637 12:31:48.538928 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1638 12:31:48.549051 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1639 12:31:48.549453 GPIO: 0
1640 12:31:48.551991 PCI: 00:00.0
1641 12:31:48.562215 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1642 12:31:48.569002 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1643 12:31:48.578842 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1644 12:31:48.588933 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1645 12:31:48.599050 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1646 12:31:48.609410 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1647 12:31:48.615389 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1648 12:31:48.625532 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1649 12:31:48.635294 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1650 12:31:48.645353 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1651 12:31:48.654904 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1652 12:31:48.665144 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1653 12:31:48.675178 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1654 12:31:48.681721 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1655 12:31:48.692054 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1656 12:31:48.701447 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1657 12:31:48.711400 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1658 12:31:48.721793 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1659 12:31:48.731810 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1660 12:31:48.741962 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1661 12:31:48.751715 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1662 12:31:48.758142 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1663 12:31:48.767642 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1664 12:31:48.778078 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1665 12:31:48.787728 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1666 12:31:48.797542 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1667 12:31:48.807626 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1668 12:31:48.817924 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1669 12:31:48.821197 PCI: 00:02.0 child on link 0 GENERIC: 0.0
1670 12:31:48.831629 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1671 12:31:48.841425 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1672 12:31:48.851095 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1673 12:31:48.854628 GENERIC: 0.0
1674 12:31:48.857548 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1675 12:31:48.867558 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1676 12:31:48.870719 GENERIC: 0.0
1677 12:31:48.874269 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1678 12:31:48.884402 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1679 12:31:48.894369 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1680 12:31:48.907770 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1681 12:31:48.908225 PCI: 01:00.0
1682 12:31:48.917073 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1683 12:31:48.927098 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1684 12:31:48.930298 PCI: 00:08.0
1685 12:31:48.930692 PCI: 00:0a.0
1686 12:31:48.940568 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1687 12:31:48.947142 PCI: 00:0d.0 child on link 0 USB0 port 0
1688 12:31:48.957190 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1689 12:31:48.960245 USB0 port 0 child on link 0 USB3 port 0
1690 12:31:48.963918 USB3 port 0
1691 12:31:48.964309 USB3 port 1
1692 12:31:48.967010 USB3 port 2
1693 12:31:48.967459 USB3 port 3
1694 12:31:48.973335 PCI: 00:14.0 child on link 0 USB0 port 0
1695 12:31:48.983546 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1696 12:31:48.987048 USB0 port 0 child on link 0 USB2 port 0
1697 12:31:48.990264 USB2 port 0
1698 12:31:48.990655 USB2 port 1
1699 12:31:48.993061 USB2 port 2
1700 12:31:48.993462 USB2 port 3
1701 12:31:48.996647 USB2 port 4
1702 12:31:48.997058 USB2 port 5
1703 12:31:49.000092 USB2 port 6
1704 12:31:49.003556 USB2 port 7
1705 12:31:49.003984 USB2 port 8
1706 12:31:49.006708 USB2 port 9
1707 12:31:49.007225 USB3 port 0
1708 12:31:49.009808 USB3 port 1
1709 12:31:49.010226 USB3 port 2
1710 12:31:49.013338 USB3 port 3
1711 12:31:49.013761 PCI: 00:14.2
1712 12:31:49.023542 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1713 12:31:49.033225 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1714 12:31:49.039568 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1715 12:31:49.049355 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1716 12:31:49.049772 GENERIC: 0.0
1717 12:31:49.056277 PCI: 00:15.0 child on link 0 I2C: 00:1a
1718 12:31:49.066313 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1719 12:31:49.066833 I2C: 00:1a
1720 12:31:49.069963 I2C: 00:31
1721 12:31:49.070471 I2C: 00:32
1722 12:31:49.076761 PCI: 00:15.1 child on link 0 I2C: 00:50
1723 12:31:49.086302 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1724 12:31:49.086842 I2C: 00:50
1725 12:31:49.089549 PCI: 00:15.2
1726 12:31:49.092671 PCI: 00:15.3 child on link 0 I2C: 00:10
1727 12:31:49.102832 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1728 12:31:49.106387 I2C: 00:10
1729 12:31:49.106791 PCI: 00:16.0
1730 12:31:49.116025 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1731 12:31:49.119685 PCI: 00:19.0
1732 12:31:49.122658 PCI: 00:19.1 child on link 0 I2C: 00:15
1733 12:31:49.132514 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1734 12:31:49.136229 I2C: 00:15
1735 12:31:49.136632 I2C: 00:2c
1736 12:31:49.139247 PCI: 00:1e.0
1737 12:31:49.149332 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1738 12:31:49.152632 PCI: 00:1e.3 child on link 0 SPI: 00
1739 12:31:49.162391 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1740 12:31:49.165521 SPI: 00
1741 12:31:49.168987 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1742 12:31:49.179357 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1743 12:31:49.179752 PNP: 0c09.0
1744 12:31:49.188592 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1745 12:31:49.192501 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1746 12:31:49.202021 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1747 12:31:49.212295 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1748 12:31:49.215305 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1749 12:31:49.218774 GENERIC: 0.0
1750 12:31:49.219242 GENERIC: 1.0
1751 12:31:49.222183 PCI: 00:1f.3
1752 12:31:49.231685 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1753 12:31:49.241725 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1754 12:31:49.245485 PCI: 00:1f.5
1755 12:31:49.254992 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1756 12:31:49.258896 Done allocating resources.
1757 12:31:49.261689 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2747 ms
1758 12:31:49.268274 coreboot skipped calling FSP notify phase: 00000020.
1759 12:31:49.275226 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1760 12:31:49.278174 Configure audio over I2S with MAX98373 NAU88L25B.
1761 12:31:49.282978 Enabling BT offload
1762 12:31:49.290477 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 17 ms
1763 12:31:49.293970 Enabling resources...
1764 12:31:49.297092 PCI: 00:00.0 subsystem <- 8086/4609
1765 12:31:49.300550 PCI: 00:00.0 cmd <- 06
1766 12:31:49.303309 PCI: 00:02.0 subsystem <- 8086/46b3
1767 12:31:49.307081 PCI: 00:02.0 cmd <- 03
1768 12:31:49.309992 PCI: 00:04.0 subsystem <- 8086/461d
1769 12:31:49.310464 PCI: 00:04.0 cmd <- 02
1770 12:31:49.313487 PCI: 00:06.0 bridge ctrl <- 0013
1771 12:31:49.317127 PCI: 00:06.0 subsystem <- 8086/464d
1772 12:31:49.320244 PCI: 00:06.0 cmd <- 106
1773 12:31:49.323745 PCI: 00:0a.0 subsystem <- 8086/467d
1774 12:31:49.326958 PCI: 00:0a.0 cmd <- 02
1775 12:31:49.330226 PCI: 00:0d.0 subsystem <- 8086/461e
1776 12:31:49.333737 PCI: 00:0d.0 cmd <- 02
1777 12:31:49.336678 PCI: 00:14.0 subsystem <- 8086/51ed
1778 12:31:49.340249 PCI: 00:14.0 cmd <- 02
1779 12:31:49.343381 PCI: 00:14.2 subsystem <- 8086/51ef
1780 12:31:49.343792 PCI: 00:14.2 cmd <- 02
1781 12:31:49.347017 PCI: 00:14.3 subsystem <- 8086/51f0
1782 12:31:49.349990 PCI: 00:14.3 cmd <- 02
1783 12:31:49.353485 PCI: 00:15.0 subsystem <- 8086/51e8
1784 12:31:49.357022 PCI: 00:15.0 cmd <- 02
1785 12:31:49.360267 PCI: 00:15.1 subsystem <- 8086/51e9
1786 12:31:49.363362 PCI: 00:15.1 cmd <- 06
1787 12:31:49.366819 PCI: 00:15.3 subsystem <- 8086/51eb
1788 12:31:49.369612 PCI: 00:15.3 cmd <- 02
1789 12:31:49.373248 PCI: 00:16.0 subsystem <- 8086/51e0
1790 12:31:49.373636 PCI: 00:16.0 cmd <- 02
1791 12:31:49.379972 PCI: 00:19.1 subsystem <- 8086/51c6
1792 12:31:49.380485 PCI: 00:19.1 cmd <- 02
1793 12:31:49.383480 PCI: 00:1e.0 subsystem <- 8086/51a8
1794 12:31:49.386412 PCI: 00:1e.0 cmd <- 06
1795 12:31:49.390087 PCI: 00:1e.3 subsystem <- 8086/51ab
1796 12:31:49.393476 PCI: 00:1e.3 cmd <- 02
1797 12:31:49.396458 PCI: 00:1f.0 subsystem <- 8086/5182
1798 12:31:49.400136 PCI: 00:1f.0 cmd <- 407
1799 12:31:49.403519 PCI: 00:1f.3 subsystem <- 8086/51c8
1800 12:31:49.404033 PCI: 00:1f.3 cmd <- 02
1801 12:31:49.406423 PCI: 00:1f.5 subsystem <- 8086/51a4
1802 12:31:49.409929 PCI: 00:1f.5 cmd <- 406
1803 12:31:49.413058 PCI: 01:00.0 cmd <- 02
1804 12:31:49.413482 done.
1805 12:31:49.419559 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1806 12:31:49.423044 ME: Version: Unavailable
1807 12:31:49.426703 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1808 12:31:49.429840 Initializing devices...
1809 12:31:49.432928 Root Device init
1810 12:31:49.433406 mainboard: EC init
1811 12:31:49.439437 Chrome EC: Set SMI mask to 0x0000000000000000
1812 12:31:49.442821 Chrome EC: clear events_b mask to 0x0000000000000000
1813 12:31:49.449735 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1814 12:31:49.456329 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001001105e
1815 12:31:49.462780 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001809105e
1816 12:31:49.466226 Chrome EC: Set WAKE mask to 0x0000000000000000
1817 12:31:49.473934 Root Device init finished in 36 msecs
1818 12:31:49.474460 PCI: 00:00.0 init
1819 12:31:49.477488 CPU TDP = 15 Watts
1820 12:31:49.477979 CPU PL1 = 15 Watts
1821 12:31:49.480341 CPU PL2 = 55 Watts
1822 12:31:49.483829 CPU PL4 = 123 Watts
1823 12:31:49.487201 PCI: 00:00.0 init finished in 7 msecs
1824 12:31:49.487591 PCI: 00:02.0 init
1825 12:31:49.490338 GMA: Found VBT in CBFS
1826 12:31:49.493846 GMA: Found valid VBT in CBFS
1827 12:31:49.500329 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1828 12:31:49.506908 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1829 12:31:49.510848 PCI: 00:02.0 init finished in 18 msecs
1830 12:31:49.513567 PCI: 00:06.0 init
1831 12:31:49.517315 Initializing PCH PCIe bridge.
1832 12:31:49.520208 PCI: 00:06.0 init finished in 3 msecs
1833 12:31:49.520601 PCI: 00:0a.0 init
1834 12:31:49.523751 PCI: 00:0a.0 init finished in 0 msecs
1835 12:31:49.526911 PCI: 00:14.0 init
1836 12:31:49.530589 PCI: 00:14.0 init finished in 0 msecs
1837 12:31:49.533791 PCI: 00:14.2 init
1838 12:31:49.537234 PCI: 00:14.2 init finished in 0 msecs
1839 12:31:49.537727 PCI: 00:15.0 init
1840 12:31:49.540412 I2C bus 0 version 0x3230302a
1841 12:31:49.543622 DW I2C bus 0 at 0x80655000 (400 KHz)
1842 12:31:49.549913 PCI: 00:15.0 init finished in 6 msecs
1843 12:31:49.550351 PCI: 00:15.1 init
1844 12:31:49.553468 I2C bus 1 version 0x3230302a
1845 12:31:49.556482 DW I2C bus 1 at 0x80656000 (400 KHz)
1846 12:31:49.560093 PCI: 00:15.1 init finished in 6 msecs
1847 12:31:49.563294 PCI: 00:15.3 init
1848 12:31:49.566559 I2C bus 3 version 0x3230302a
1849 12:31:49.570437 DW I2C bus 3 at 0x80657000 (400 KHz)
1850 12:31:49.573425 PCI: 00:15.3 init finished in 6 msecs
1851 12:31:49.576711 PCI: 00:16.0 init
1852 12:31:49.579960 PCI: 00:16.0 init finished in 0 msecs
1853 12:31:49.580438 PCI: 00:19.1 init
1854 12:31:49.583540 I2C bus 5 version 0x3230302a
1855 12:31:49.586847 DW I2C bus 5 at 0x80659000 (400 KHz)
1856 12:31:49.590365 PCI: 00:19.1 init finished in 6 msecs
1857 12:31:49.593666 PCI: 00:1f.0 init
1858 12:31:49.596558 IOAPIC: Initializing IOAPIC at 0xfec00000
1859 12:31:49.599877 IOAPIC: ID = 0x02
1860 12:31:49.603938 IOAPIC: Dumping registers
1861 12:31:49.604349 reg 0x0000: 0x02000000
1862 12:31:49.606617 reg 0x0001: 0x00770020
1863 12:31:49.610386 reg 0x0002: 0x00000000
1864 12:31:49.613734 IOAPIC: 120 interrupts
1865 12:31:49.616894 IOAPIC: Clearing IOAPIC at 0xfec00000
1866 12:31:49.620415 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1867 12:31:49.627037 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1868 12:31:49.630089 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1869 12:31:49.633822 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1870 12:31:49.640318 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1871 12:31:49.643212 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1872 12:31:49.649856 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1873 12:31:49.653350 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1874 12:31:49.660088 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1875 12:31:49.663697 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1876 12:31:49.669903 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1877 12:31:49.673156 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1878 12:31:49.676470 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1879 12:31:49.683043 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1880 12:31:49.686548 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1881 12:31:49.692930 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1882 12:31:49.696599 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1883 12:31:49.703552 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1884 12:31:49.706938 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1885 12:31:49.713019 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1886 12:31:49.716598 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1887 12:31:49.719830 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1888 12:31:49.726229 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1889 12:31:49.729991 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1890 12:31:49.736472 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1891 12:31:49.740081 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1892 12:31:49.746580 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1893 12:31:49.749629 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1894 12:31:49.756241 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1895 12:31:49.760135 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1896 12:31:49.763284 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1897 12:31:49.769875 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1898 12:31:49.772805 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1899 12:31:49.779918 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1900 12:31:49.783231 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1901 12:31:49.789967 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1902 12:31:49.792761 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1903 12:31:49.796170 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1904 12:31:49.803085 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1905 12:31:49.806555 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1906 12:31:49.812788 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1907 12:31:49.816319 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1908 12:31:49.822891 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1909 12:31:49.826961 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1910 12:31:49.832841 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1911 12:31:49.835974 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1912 12:31:49.839757 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1913 12:31:49.845783 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1914 12:31:49.849345 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1915 12:31:49.856238 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1916 12:31:49.859355 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1917 12:31:49.865768 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1918 12:31:49.869077 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1919 12:31:49.875712 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1920 12:31:49.879271 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1921 12:31:49.882721 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1922 12:31:49.889026 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1923 12:31:49.892584 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1924 12:31:49.899177 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1925 12:31:49.902502 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1926 12:31:49.908970 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1927 12:31:49.912514 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1928 12:31:49.919202 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1929 12:31:49.922402 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1930 12:31:49.925889 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1931 12:31:49.932399 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1932 12:31:49.935552 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1933 12:31:49.942123 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1934 12:31:49.945237 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1935 12:31:49.952116 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1936 12:31:49.955162 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1937 12:31:49.962358 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1938 12:31:49.965358 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1939 12:31:49.969115 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1940 12:31:49.974980 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1941 12:31:49.978863 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1942 12:31:49.985532 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1943 12:31:49.988339 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1944 12:31:49.995285 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1945 12:31:49.998754 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1946 12:31:50.005358 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1947 12:31:50.008148 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1948 12:31:50.011664 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1949 12:31:50.018300 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1950 12:31:50.021876 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1951 12:31:50.028321 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1952 12:31:50.031827 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1953 12:31:50.038200 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1954 12:31:50.041840 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1955 12:31:50.048300 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1956 12:31:50.051556 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1957 12:31:50.055322 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1958 12:31:50.061431 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1959 12:31:50.065271 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1960 12:31:50.071361 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1961 12:31:50.074969 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1962 12:31:50.081808 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1963 12:31:50.085025 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1964 12:31:50.091742 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1965 12:31:50.094987 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1966 12:31:50.098630 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1967 12:31:50.105380 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1968 12:31:50.108221 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1969 12:31:50.115386 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1970 12:31:50.118230 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1971 12:31:50.124689 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1972 12:31:50.128177 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1973 12:31:50.134765 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1974 12:31:50.137866 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1975 12:31:50.141243 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1976 12:31:50.148306 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1977 12:31:50.151223 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1978 12:31:50.158213 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1979 12:31:50.161206 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1980 12:31:50.167706 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1981 12:31:50.171412 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1982 12:31:50.174720 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1983 12:31:50.181261 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1984 12:31:50.184671 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1985 12:31:50.190998 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1986 12:31:50.194323 IOAPIC: Bootstrap Processor Local APIC = 0x00
1987 12:31:50.201115 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1988 12:31:50.204583 PCI: 00:1f.0 init finished in 607 msecs
1989 12:31:50.208165 PCI: 00:1f.2 init
1990 12:31:50.208553 apm_control: Disabling ACPI.
1991 12:31:50.213317 APMC done.
1992 12:31:50.216811 PCI: 00:1f.2 init finished in 6 msecs
1993 12:31:50.220383 PCI: 00:1f.3 init
1994 12:31:50.223881 PCI: 00:1f.3 init finished in 0 msecs
1995 12:31:50.224292 PCI: 01:00.0 init
1996 12:31:50.226912 PCI: 01:00.0 init finished in 0 msecs
1997 12:31:50.230068 PNP: 0c09.0 init
1998 12:31:50.233651 Google Chrome EC uptime: 11.065 seconds
1999 12:31:50.240026 Google Chrome AP resets since EC boot: 0
2000 12:31:50.243621 Google Chrome most recent AP reset causes:
2001 12:31:50.250544 Google Chrome EC reset flags at last EC boot: reset-pin | hard
2002 12:31:50.253224 PNP: 0c09.0 init finished in 19 msecs
2003 12:31:50.253623 GENERIC: 0.0 init
2004 12:31:50.260026 GENERIC: 0.0 init finished in 0 msecs
2005 12:31:50.260415 GENERIC: 1.0 init
2006 12:31:50.263600 GENERIC: 1.0 init finished in 0 msecs
2007 12:31:50.266652 Devices initialized
2008 12:31:50.270414 Show all devs... After init.
2009 12:31:50.273242 Root Device: enabled 1
2010 12:31:50.273643 CPU_CLUSTER: 0: enabled 1
2011 12:31:50.276683 DOMAIN: 0000: enabled 1
2012 12:31:50.280282 GPIO: 0: enabled 1
2013 12:31:50.280751 PCI: 00:00.0: enabled 1
2014 12:31:50.283098 PCI: 00:01.0: enabled 0
2015 12:31:50.286505 PCI: 00:01.1: enabled 0
2016 12:31:50.289887 PCI: 00:02.0: enabled 1
2017 12:31:50.290340 PCI: 00:04.0: enabled 1
2018 12:31:50.293115 PCI: 00:05.0: enabled 0
2019 12:31:50.296550 PCI: 00:06.0: enabled 1
2020 12:31:50.299986 PCI: 00:06.2: enabled 0
2021 12:31:50.300389 PCI: 00:07.0: enabled 0
2022 12:31:50.303565 PCI: 00:07.1: enabled 0
2023 12:31:50.306282 PCI: 00:07.2: enabled 0
2024 12:31:50.306696 PCI: 00:07.3: enabled 0
2025 12:31:50.309919 PCI: 00:08.0: enabled 0
2026 12:31:50.313231 PCI: 00:09.0: enabled 0
2027 12:31:50.316435 PCI: 00:0a.0: enabled 1
2028 12:31:50.316821 PCI: 00:0d.0: enabled 1
2029 12:31:50.319827 PCI: 00:0d.1: enabled 0
2030 12:31:50.323080 PCI: 00:0d.2: enabled 0
2031 12:31:50.326633 PCI: 00:0d.3: enabled 0
2032 12:31:50.327109 PCI: 00:0e.0: enabled 0
2033 12:31:50.329603 PCI: 00:10.0: enabled 0
2034 12:31:50.333179 PCI: 00:10.1: enabled 0
2035 12:31:50.336778 PCI: 00:10.6: enabled 0
2036 12:31:50.337164 PCI: 00:10.7: enabled 0
2037 12:31:50.339871 PCI: 00:12.0: enabled 0
2038 12:31:50.343267 PCI: 00:12.6: enabled 0
2039 12:31:50.346417 PCI: 00:12.7: enabled 0
2040 12:31:50.346801 PCI: 00:13.0: enabled 0
2041 12:31:50.349865 PCI: 00:14.0: enabled 1
2042 12:31:50.352816 PCI: 00:14.1: enabled 0
2043 12:31:50.353217 PCI: 00:14.2: enabled 1
2044 12:31:50.356416 PCI: 00:14.3: enabled 1
2045 12:31:50.359927 PCI: 00:15.0: enabled 1
2046 12:31:50.363204 PCI: 00:15.1: enabled 1
2047 12:31:50.363667 PCI: 00:15.2: enabled 0
2048 12:31:50.366386 PCI: 00:15.3: enabled 1
2049 12:31:50.369750 PCI: 00:16.0: enabled 1
2050 12:31:50.372864 PCI: 00:16.1: enabled 0
2051 12:31:50.373329 PCI: 00:16.2: enabled 0
2052 12:31:50.376481 PCI: 00:16.3: enabled 0
2053 12:31:50.379995 PCI: 00:16.4: enabled 0
2054 12:31:50.382900 PCI: 00:16.5: enabled 0
2055 12:31:50.383314 PCI: 00:17.0: enabled 0
2056 12:31:50.386275 PCI: 00:19.0: enabled 0
2057 12:31:50.390073 PCI: 00:19.1: enabled 1
2058 12:31:50.390479 PCI: 00:19.2: enabled 0
2059 12:31:50.393064 PCI: 00:1a.0: enabled 0
2060 12:31:50.396425 PCI: 00:1c.0: enabled 0
2061 12:31:50.399417 PCI: 00:1c.1: enabled 0
2062 12:31:50.399832 PCI: 00:1c.2: enabled 0
2063 12:31:50.402829 PCI: 00:1c.3: enabled 0
2064 12:31:50.406524 PCI: 00:1c.4: enabled 0
2065 12:31:50.409656 PCI: 00:1c.5: enabled 0
2066 12:31:50.410063 PCI: 00:1c.6: enabled 0
2067 12:31:50.412786 PCI: 00:1c.7: enabled 0
2068 12:31:50.416403 PCI: 00:1d.0: enabled 0
2069 12:31:50.420417 PCI: 00:1d.1: enabled 0
2070 12:31:50.420808 PCI: 00:1d.2: enabled 0
2071 12:31:50.422967 PCI: 00:1d.3: enabled 0
2072 12:31:50.426280 PCI: 00:1e.0: enabled 1
2073 12:31:50.430446 PCI: 00:1e.1: enabled 0
2074 12:31:50.430994 PCI: 00:1e.2: enabled 0
2075 12:31:50.432918 PCI: 00:1e.3: enabled 1
2076 12:31:50.436432 PCI: 00:1f.0: enabled 1
2077 12:31:50.436966 PCI: 00:1f.1: enabled 0
2078 12:31:50.439536 PCI: 00:1f.2: enabled 1
2079 12:31:50.442662 PCI: 00:1f.3: enabled 1
2080 12:31:50.446177 PCI: 00:1f.4: enabled 0
2081 12:31:50.446671 PCI: 00:1f.5: enabled 1
2082 12:31:50.449282 PCI: 00:1f.6: enabled 0
2083 12:31:50.452521 PCI: 00:1f.7: enabled 0
2084 12:31:50.455729 GENERIC: 0.0: enabled 1
2085 12:31:50.456205 GENERIC: 0.0: enabled 1
2086 12:31:50.459379 GENERIC: 0.0: enabled 1
2087 12:31:50.462365 GENERIC: 1.0: enabled 1
2088 12:31:50.466213 GENERIC: 0.0: enabled 1
2089 12:31:50.466603 GENERIC: 1.0: enabled 1
2090 12:31:50.469385 USB0 port 0: enabled 1
2091 12:31:50.472773 USB0 port 0: enabled 1
2092 12:31:50.473273 GENERIC: 0.0: enabled 1
2093 12:31:50.475622 I2C: 00:1a: enabled 1
2094 12:31:50.479298 I2C: 00:31: enabled 1
2095 12:31:50.482890 I2C: 00:32: enabled 1
2096 12:31:50.483313 I2C: 00:50: enabled 1
2097 12:31:50.485784 I2C: 00:10: enabled 1
2098 12:31:50.489270 I2C: 00:15: enabled 1
2099 12:31:50.489776 I2C: 00:2c: enabled 1
2100 12:31:50.492894 GENERIC: 0.0: enabled 1
2101 12:31:50.495596 SPI: 00: enabled 1
2102 12:31:50.496053 PNP: 0c09.0: enabled 1
2103 12:31:50.499162 GENERIC: 0.0: enabled 1
2104 12:31:50.502212 USB3 port 0: enabled 1
2105 12:31:50.502614 USB3 port 1: enabled 0
2106 12:31:50.505587 USB3 port 2: enabled 1
2107 12:31:50.509016 USB3 port 3: enabled 0
2108 12:31:50.512383 USB2 port 0: enabled 1
2109 12:31:50.512789 USB2 port 1: enabled 0
2110 12:31:50.516119 USB2 port 2: enabled 1
2111 12:31:50.519007 USB2 port 3: enabled 0
2112 12:31:50.519397 USB2 port 4: enabled 0
2113 12:31:50.522684 USB2 port 5: enabled 1
2114 12:31:50.525703 USB2 port 6: enabled 0
2115 12:31:50.526112 USB2 port 7: enabled 0
2116 12:31:50.529145 USB2 port 8: enabled 1
2117 12:31:50.532457 USB2 port 9: enabled 1
2118 12:31:50.535903 USB3 port 0: enabled 1
2119 12:31:50.536296 USB3 port 1: enabled 0
2120 12:31:50.539288 USB3 port 2: enabled 0
2121 12:31:50.542488 USB3 port 3: enabled 0
2122 12:31:50.542888 GENERIC: 0.0: enabled 1
2123 12:31:50.545758 GENERIC: 1.0: enabled 1
2124 12:31:50.549240 APIC: 00: enabled 1
2125 12:31:50.549626 APIC: 1a: enabled 1
2126 12:31:50.552444 APIC: 1c: enabled 1
2127 12:31:50.555479 APIC: 1e: enabled 1
2128 12:31:50.556027 APIC: 18: enabled 1
2129 12:31:50.558869 APIC: 01: enabled 1
2130 12:31:50.559318 APIC: 09: enabled 1
2131 12:31:50.562063 APIC: 08: enabled 1
2132 12:31:50.565476 PCI: 01:00.0: enabled 1
2133 12:31:50.572365 BS: BS_DEV_INIT run times (exec / console): 8 / 1129 ms
2134 12:31:50.575374 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2135 12:31:50.578769 ELOG: NV offset 0xf20000 size 0x4000
2136 12:31:50.586278 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2137 12:31:50.592682 ELOG: Event(17) added with size 13 at 2024-06-25 12:31:50 UTC
2138 12:31:50.599397 ELOG: Event(92) added with size 9 at 2024-06-25 12:31:50 UTC
2139 12:31:50.606027 ELOG: Event(93) added with size 9 at 2024-06-25 12:31:50 UTC
2140 12:31:50.612884 ELOG: Event(9E) added with size 10 at 2024-06-25 12:31:50 UTC
2141 12:31:50.619486 ELOG: Event(9F) added with size 14 at 2024-06-25 12:31:50 UTC
2142 12:31:50.626138 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2143 12:31:50.633155 ELOG: Event(A1) added with size 10 at 2024-06-25 12:31:50 UTC
2144 12:31:50.639557 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2145 12:31:50.646229 ELOG: Event(A0) added with size 9 at 2024-06-25 12:31:50 UTC
2146 12:31:50.649541 elog_add_boot_reason: Logged dev mode boot
2147 12:31:50.655735 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2148 12:31:50.659075 Finalize devices...
2149 12:31:50.659591 PCI: 00:02.0 final
2150 12:31:50.663306 PCI: 00:16.0 final
2151 12:31:50.663712 PCI: 00:1f.2 final
2152 12:31:50.666316 GENERIC: 0.0 final
2153 12:31:50.672762 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2154 12:31:50.673333 GENERIC: 1.0 final
2155 12:31:50.678894 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2156 12:31:50.682362 Devices finalized
2157 12:31:50.685942 BS: BS_POST_DEVICE run times (exec / console): 0 / 26 ms
2158 12:31:50.692983 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2159 12:31:50.699614 BS: BS_POST_DEVICE exit times (exec / console): 1 / 5 ms
2160 12:31:50.702794 ME: HFSTS1 : 0x80030045
2161 12:31:50.706214 ME: HFSTS2 : 0x30280116
2162 12:31:50.712770 ME: HFSTS3 : 0x00000050
2163 12:31:50.716230 ME: HFSTS4 : 0x00004000
2164 12:31:50.719605 ME: HFSTS5 : 0x00000000
2165 12:31:50.726131 ME: HFSTS6 : 0x40400006
2166 12:31:50.729844 ME: Manufacturing Mode : YES
2167 12:31:50.733288 ME: SPI Protection Mode Enabled : YES
2168 12:31:50.736351 ME: FPFs Committed : YES
2169 12:31:50.739149 ME: Manufacturing Vars Locked : NO
2170 12:31:50.745804 ME: FW Partition Table : OK
2171 12:31:50.749231 ME: Bringup Loader Failure : NO
2172 12:31:50.752802 ME: Firmware Init Complete : NO
2173 12:31:50.756226 ME: Boot Options Present : NO
2174 12:31:50.759612 ME: Update In Progress : NO
2175 12:31:50.762974 ME: D0i3 Support : YES
2176 12:31:50.766007 ME: Low Power State Enabled : NO
2177 12:31:50.768979 ME: CPU Replaced : YES
2178 12:31:50.775739 ME: CPU Replacement Valid : YES
2179 12:31:50.779357 ME: Current Working State : 5
2180 12:31:50.782889 ME: Current Operation State : 1
2181 12:31:50.785654 ME: Current Operation Mode : 3
2182 12:31:50.789211 ME: Error Code : 0
2183 12:31:50.792170 ME: Enhanced Debug Mode : NO
2184 12:31:50.795792 ME: CPU Debug Disabled : YES
2185 12:31:50.799166 ME: TXT Support : NO
2186 12:31:50.802456 ME: WP for RO is enabled : YES
2187 12:31:50.808719 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2188 12:31:50.815476 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2189 12:31:50.822384 ELOG: Event(91) added with size 10 at 2024-06-25 12:31:50 UTC
2190 12:31:50.829017 Chrome EC: clear events_b mask to 0x0000000020004000
2191 12:31:50.835325 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 11 ms
2192 12:31:50.842167 CBFS: Found 'fallback/dsdt.aml' @0x7b440 size 0x5097 in mcache @0x76add1e8
2193 12:31:50.845547 CBFS: 'fallback/slic' not found.
2194 12:31:50.849138 ACPI: Writing ACPI tables at 7686b000.
2195 12:31:50.851982 ACPI: * FACS
2196 12:31:50.852522 ACPI: * DSDT
2197 12:31:50.858304 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2198 12:31:50.862521 ACPI: * FADT
2199 12:31:50.862970 SCI is IRQ9
2200 12:31:50.869269 ACPI: added table 1/32, length now 40
2201 12:31:50.869667 ACPI: * SSDT
2202 12:31:50.875783 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2203 12:31:50.879404 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2204 12:31:50.886094 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2205 12:31:50.889024 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2206 12:31:50.896144 CBFS: Found 'wifi_sar_0.hex' @0x80c00 size 0xe6 in mcache @0x76add29c
2207 12:31:50.899149 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2208 12:31:50.905684 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2209 12:31:50.912419 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2210 12:31:50.915939 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2211 12:31:50.922572 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2212 12:31:50.927409 I2C TX abort detected (00000001)
2213 12:31:50.932274 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10 -- NOT FOUND, skipping
2214 12:31:50.935815 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2215 12:31:50.938953 I2C TX abort detected (00000001)
2216 12:31:50.948966 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c -- NOT FOUND, skipping
2217 12:31:50.951785 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2218 12:31:50.959603 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2219 12:31:50.963094 PS2K: Passing 80 keymaps to kernel
2220 12:31:50.969454 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2221 12:31:50.975948 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2222 12:31:50.982616 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2223 12:31:50.989615 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2224 12:31:50.996403 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2225 12:31:51.002695 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2226 12:31:51.006280 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2227 12:31:51.012866 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2228 12:31:51.019525 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2229 12:31:51.026170 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2230 12:31:51.029058 ACPI: added table 2/32, length now 44
2231 12:31:51.032596 ACPI: * MCFG
2232 12:31:51.036307 ACPI: added table 3/32, length now 48
2233 12:31:51.036701 ACPI: * TPM2
2234 12:31:51.039114 TPM2 log created at 0x7685b000
2235 12:31:51.042851 ACPI: added table 4/32, length now 52
2236 12:31:51.045712 ACPI: * LPIT
2237 12:31:51.049190 ACPI: added table 5/32, length now 56
2238 12:31:51.052620 ACPI: * MADT
2239 12:31:51.053150 SCI is IRQ9
2240 12:31:51.056036 ACPI: added table 6/32, length now 60
2241 12:31:51.058800 cmd_reg from pmc_make_ipc_cmd 1052838
2242 12:31:51.065391 CL PMC desc table: numb of regions is 0x2 at addr 0x8064a1bc
2243 12:31:51.072700 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2244 12:31:51.078853 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2245 12:31:51.082577 PMC CrashLog size in discovery mode: 0xC00
2246 12:31:51.085626 cpu crashlog bar addr: 0x80640000
2247 12:31:51.089205 cpu discovery table offset: 0x6030
2248 12:31:51.096086 cpu_crashlog_discovery_table buffer count: 0x3
2249 12:31:51.102359 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2250 12:31:51.108813 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2251 12:31:51.115671 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2252 12:31:51.119043 PMC crashLog size in discovery mode : 0xC00
2253 12:31:51.125523 Invalid data 0x0 at offset 0x2200 from addr 0x80648000 of PMC SRAM.
2254 12:31:51.132128 discover mode PMC crashlog size adjusted to: 0x200
2255 12:31:51.138998 Invalid data 0x0 at offset 0x3e00 from addr 0x80648000 of PMC SRAM.
2256 12:31:51.142513 discover mode PMC crashlog size adjusted to: 0x0
2257 12:31:51.145766 m_cpu_crashLog_size : 0x3480 bytes
2258 12:31:51.149014 CPU crashLog present.
2259 12:31:51.152275 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2260 12:31:51.162266 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2261 12:31:51.162681 current = 76874430
2262 12:31:51.165624 ACPI: * DMAR
2263 12:31:51.168848 ACPI: added table 7/32, length now 64
2264 12:31:51.171876 ACPI: added table 8/32, length now 68
2265 12:31:51.172278 ACPI: * HPET
2266 12:31:51.178708 ACPI: added table 9/32, length now 72
2267 12:31:51.179128 ACPI: done.
2268 12:31:51.182456 ACPI tables: 38240 bytes.
2269 12:31:51.185768 smbios_write_tables: 76855000
2270 12:31:51.189045 EC returned error result code 3
2271 12:31:51.191951 Couldn't obtain OEM name from CBI
2272 12:31:51.195195 Create SMBIOS type 16
2273 12:31:51.195596 Create SMBIOS type 17
2274 12:31:51.198987 Create SMBIOS type 20
2275 12:31:51.202332 GENERIC: 0.0 (WIFI Device)
2276 12:31:51.205291 SMBIOS tables: 2156 bytes.
2277 12:31:51.209342 Writing table forward entry at 0x00000500
2278 12:31:51.215226 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 9955
2279 12:31:51.219114 Writing coreboot table at 0x7688f000
2280 12:31:51.225191 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2281 12:31:51.228580 1. 0000000000001000-000000000009ffff: RAM
2282 12:31:51.232131 2. 00000000000a0000-00000000000fffff: RESERVED
2283 12:31:51.238422 3. 0000000000100000-0000000076854fff: RAM
2284 12:31:51.245133 4. 0000000076855000-0000000076a2cfff: CONFIGURATION TABLES
2285 12:31:51.248171 5. 0000000076a2d000-0000000076ab8fff: RAMSTAGE
2286 12:31:51.255297 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2287 12:31:51.258195 7. 0000000077000000-00000000803fffff: RESERVED
2288 12:31:51.265476 8. 00000000c0000000-00000000cfffffff: RESERVED
2289 12:31:51.268174 9. 00000000f8000000-00000000f9ffffff: RESERVED
2290 12:31:51.275185 10. 00000000fb000000-00000000fb000fff: RESERVED
2291 12:31:51.278559 11. 00000000fc800000-00000000fe7fffff: RESERVED
2292 12:31:51.282000 12. 00000000feb00000-00000000feb7ffff: RESERVED
2293 12:31:51.288282 13. 00000000fec00000-00000000fecfffff: RESERVED
2294 12:31:51.291523 14. 00000000fed40000-00000000fed6ffff: RESERVED
2295 12:31:51.298760 15. 00000000fed80000-00000000fed87fff: RESERVED
2296 12:31:51.301505 16. 00000000fed90000-00000000fed92fff: RESERVED
2297 12:31:51.308580 17. 00000000feda0000-00000000feda1fff: RESERVED
2298 12:31:51.311565 18. 00000000fedc0000-00000000feddffff: RESERVED
2299 12:31:51.315126 19. 0000000100000000-000000027fbfffff: RAM
2300 12:31:51.318583 Passing 4 GPIOs to payload:
2301 12:31:51.325306 NAME | PORT | POLARITY | VALUE
2302 12:31:51.328304 lid | undefined | high | high
2303 12:31:51.335270 power | undefined | high | low
2304 12:31:51.341140 oprom | undefined | high | low
2305 12:31:51.344529 EC in RW | 0x00000151 | high | low
2306 12:31:51.348072 Board ID: 3
2307 12:31:51.348473 FW config: 0x131
2308 12:31:51.354741 Wrote coreboot table at: 0x7688f000, 0x6e4 bytes, checksum 66c3
2309 12:31:51.358192 coreboot table: 1788 bytes.
2310 12:31:51.360968 IMD ROOT 0. 0x76fff000 0x00001000
2311 12:31:51.364593 IMD SMALL 1. 0x76ffe000 0x00001000
2312 12:31:51.368126 FSP MEMORY 2. 0x76afe000 0x00500000
2313 12:31:51.371086 CONSOLE 3. 0x76ade000 0x00020000
2314 12:31:51.374831 RO MCACHE 4. 0x76add000 0x00000fd8
2315 12:31:51.381167 FMAP 5. 0x76adc000 0x0000064a
2316 12:31:51.384705 TIME STAMP 6. 0x76adb000 0x00000910
2317 12:31:51.387935 VBOOT WORK 7. 0x76ac7000 0x00014000
2318 12:31:51.391427 MEM INFO 8. 0x76ac6000 0x000003b8
2319 12:31:51.394534 ROMSTG STCK 9. 0x76ac5000 0x00001000
2320 12:31:51.397986 AFTER CAR 10. 0x76ab9000 0x0000c000
2321 12:31:51.401379 RAMSTAGE 11. 0x76a2c000 0x0008d000
2322 12:31:51.404865 ACPI BERT 12. 0x76a1c000 0x00010000
2323 12:31:51.411368 CHROMEOS NVS13. 0x76a1b000 0x00000f00
2324 12:31:51.414667 REFCODE 14. 0x769ac000 0x0006f000
2325 12:31:51.418057 SMM BACKUP 15. 0x7699c000 0x00010000
2326 12:31:51.421151 RAMOOPS 16. 0x7689c000 0x00100000
2327 12:31:51.424570 IGD OPREGION17. 0x76897000 0x00004203
2328 12:31:51.428329 COREBOOT 18. 0x7688f000 0x00008000
2329 12:31:51.431203 ACPI 19. 0x7686b000 0x00024000
2330 12:31:51.438131 TPM2 TCGLOG20. 0x7685b000 0x00010000
2331 12:31:51.440921 PMC CRASHLOG21. 0x7685a000 0x00000c00
2332 12:31:51.444275 CPU CRASHLOG22. 0x76856000 0x00003480
2333 12:31:51.447638 SMBIOS 23. 0x76855000 0x00001000
2334 12:31:51.451182 IMD small region:
2335 12:31:51.454318 IMD ROOT 0. 0x76ffec00 0x00000400
2336 12:31:51.458094 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2337 12:31:51.461372 VPD 2. 0x76ffeba0 0x00000027
2338 12:31:51.464535 POWER STATE 3. 0x76ffeb40 0x00000044
2339 12:31:51.468279 ROMSTAGE 4. 0x76ffeb20 0x00000004
2340 12:31:51.474199 ACPI GNVS 5. 0x76ffeac0 0x00000048
2341 12:31:51.477904 TYPE_C INFO 6. 0x76ffeaa0 0x0000000c
2342 12:31:51.484314 BS: BS_WRITE_TABLES run times (exec / console): 7 / 635 ms
2343 12:31:51.484894 MTRR: Physical address space:
2344 12:31:51.490684 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2345 12:31:51.497514 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2346 12:31:51.504315 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2347 12:31:51.510693 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2348 12:31:51.517515 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2349 12:31:51.524315 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2350 12:31:51.530394 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2351 12:31:51.533855 MTRR: Fixed MSR 0x250 0x0606060606060606
2352 12:31:51.537472 MTRR: Fixed MSR 0x258 0x0606060606060606
2353 12:31:51.540955 MTRR: Fixed MSR 0x259 0x0000000000000000
2354 12:31:51.547078 MTRR: Fixed MSR 0x268 0x0606060606060606
2355 12:31:51.550910 MTRR: Fixed MSR 0x269 0x0606060606060606
2356 12:31:51.554064 MTRR: Fixed MSR 0x26a 0x0606060606060606
2357 12:31:51.557178 MTRR: Fixed MSR 0x26b 0x0606060606060606
2358 12:31:51.563891 MTRR: Fixed MSR 0x26c 0x0606060606060606
2359 12:31:51.567311 MTRR: Fixed MSR 0x26d 0x0606060606060606
2360 12:31:51.570355 MTRR: Fixed MSR 0x26e 0x0606060606060606
2361 12:31:51.573751 MTRR: Fixed MSR 0x26f 0x0606060606060606
2362 12:31:51.576774 call enable_fixed_mtrr()
2363 12:31:51.580417 CPU physical address size: 39 bits
2364 12:31:51.583494 MTRR: default type WB/UC MTRR counts: 6/6.
2365 12:31:51.587036 MTRR: UC selected as default type.
2366 12:31:51.593240 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2367 12:31:51.600224 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2368 12:31:51.606795 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2369 12:31:51.613402 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2370 12:31:51.619895 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2371 12:31:51.626620 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2372 12:31:51.630148 MTRR: Fixed MSR 0x250 0x0606060606060606
2373 12:31:51.633308 MTRR: Fixed MSR 0x258 0x0606060606060606
2374 12:31:51.637148 MTRR: Fixed MSR 0x259 0x0000000000000000
2375 12:31:51.643381 MTRR: Fixed MSR 0x268 0x0606060606060606
2376 12:31:51.646808 MTRR: Fixed MSR 0x269 0x0606060606060606
2377 12:31:51.649877 MTRR: Fixed MSR 0x26a 0x0606060606060606
2378 12:31:51.653480 MTRR: Fixed MSR 0x26b 0x0606060606060606
2379 12:31:51.660283 MTRR: Fixed MSR 0x26c 0x0606060606060606
2380 12:31:51.663132 MTRR: Fixed MSR 0x26d 0x0606060606060606
2381 12:31:51.666803 MTRR: Fixed MSR 0x26e 0x0606060606060606
2382 12:31:51.670296 MTRR: Fixed MSR 0x26f 0x0606060606060606
2383 12:31:51.676463 MTRR: Fixed MSR 0x250 0x0606060606060606
2384 12:31:51.676857 call enable_fixed_mtrr()
2385 12:31:51.683487 MTRR: Fixed MSR 0x250 0x0606060606060606
2386 12:31:51.687060 MTRR: Fixed MSR 0x258 0x0606060606060606
2387 12:31:51.690005 MTRR: Fixed MSR 0x259 0x0000000000000000
2388 12:31:51.693722 MTRR: Fixed MSR 0x268 0x0606060606060606
2389 12:31:51.700230 MTRR: Fixed MSR 0x269 0x0606060606060606
2390 12:31:51.702984 MTRR: Fixed MSR 0x26a 0x0606060606060606
2391 12:31:51.706761 MTRR: Fixed MSR 0x26b 0x0606060606060606
2392 12:31:51.709731 MTRR: Fixed MSR 0x26c 0x0606060606060606
2393 12:31:51.713386 MTRR: Fixed MSR 0x26d 0x0606060606060606
2394 12:31:51.719828 MTRR: Fixed MSR 0x26e 0x0606060606060606
2395 12:31:51.723109 MTRR: Fixed MSR 0x26f 0x0606060606060606
2396 12:31:51.726218 MTRR: Fixed MSR 0x258 0x0606060606060606
2397 12:31:51.729848 MTRR: Fixed MSR 0x250 0x0606060606060606
2398 12:31:51.736205 MTRR: Fixed MSR 0x258 0x0606060606060606
2399 12:31:51.739826 MTRR: Fixed MSR 0x259 0x0000000000000000
2400 12:31:51.742986 MTRR: Fixed MSR 0x268 0x0606060606060606
2401 12:31:51.746645 MTRR: Fixed MSR 0x269 0x0606060606060606
2402 12:31:51.753459 MTRR: Fixed MSR 0x26a 0x0606060606060606
2403 12:31:51.756308 MTRR: Fixed MSR 0x26b 0x0606060606060606
2404 12:31:51.759289 MTRR: Fixed MSR 0x26c 0x0606060606060606
2405 12:31:51.763127 MTRR: Fixed MSR 0x26d 0x0606060606060606
2406 12:31:51.769728 MTRR: Fixed MSR 0x26e 0x0606060606060606
2407 12:31:51.772930 MTRR: Fixed MSR 0x26f 0x0606060606060606
2408 12:31:51.776433 call enable_fixed_mtrr()
2409 12:31:51.779223 CPU physical address size: 39 bits
2410 12:31:51.782828 MTRR: Fixed MSR 0x259 0x0000000000000000
2411 12:31:51.786234 CPU physical address size: 39 bits
2412 12:31:51.789625 MTRR: Fixed MSR 0x250 0x0606060606060606
2413 12:31:51.792691 MTRR: Fixed MSR 0x258 0x0606060606060606
2414 12:31:51.799552 MTRR: Fixed MSR 0x259 0x0000000000000000
2415 12:31:51.802611 MTRR: Fixed MSR 0x268 0x0606060606060606
2416 12:31:51.806408 MTRR: Fixed MSR 0x269 0x0606060606060606
2417 12:31:51.809960 MTRR: Fixed MSR 0x26a 0x0606060606060606
2418 12:31:51.816249 MTRR: Fixed MSR 0x26b 0x0606060606060606
2419 12:31:51.819646 MTRR: Fixed MSR 0x26c 0x0606060606060606
2420 12:31:51.823117 MTRR: Fixed MSR 0x26d 0x0606060606060606
2421 12:31:51.825991 MTRR: Fixed MSR 0x26e 0x0606060606060606
2422 12:31:51.829512 MTRR: Fixed MSR 0x26f 0x0606060606060606
2423 12:31:51.835885 MTRR: Fixed MSR 0x268 0x0606060606060606
2424 12:31:51.839455 MTRR: Fixed MSR 0x269 0x0606060606060606
2425 12:31:51.842683 MTRR: Fixed MSR 0x26a 0x0606060606060606
2426 12:31:51.845989 MTRR: Fixed MSR 0x26b 0x0606060606060606
2427 12:31:51.852722 MTRR: Fixed MSR 0x26c 0x0606060606060606
2428 12:31:51.856144 MTRR: Fixed MSR 0x26d 0x0606060606060606
2429 12:31:51.859058 MTRR: Fixed MSR 0x26e 0x0606060606060606
2430 12:31:51.862613 MTRR: Fixed MSR 0x26f 0x0606060606060606
2431 12:31:51.869199 MTRR: Fixed MSR 0x250 0x0606060606060606
2432 12:31:51.869592 call enable_fixed_mtrr()
2433 12:31:51.875828 MTRR: Fixed MSR 0x258 0x0606060606060606
2434 12:31:51.879105 MTRR: Fixed MSR 0x259 0x0000000000000000
2435 12:31:51.882472 MTRR: Fixed MSR 0x268 0x0606060606060606
2436 12:31:51.885991 MTRR: Fixed MSR 0x269 0x0606060606060606
2437 12:31:51.892643 MTRR: Fixed MSR 0x26a 0x0606060606060606
2438 12:31:51.895468 MTRR: Fixed MSR 0x26b 0x0606060606060606
2439 12:31:51.898999 MTRR: Fixed MSR 0x26c 0x0606060606060606
2440 12:31:51.901936 MTRR: Fixed MSR 0x26d 0x0606060606060606
2441 12:31:51.908534 MTRR: Fixed MSR 0x26e 0x0606060606060606
2442 12:31:51.912052 MTRR: Fixed MSR 0x26f 0x0606060606060606
2443 12:31:51.915413 call enable_fixed_mtrr()
2444 12:31:51.918369 MTRR: Fixed MSR 0x250 0x0606060606060606
2445 12:31:51.921989 CPU physical address size: 39 bits
2446 12:31:51.925504 MTRR: Fixed MSR 0x258 0x0606060606060606
2447 12:31:51.928863 MTRR: Fixed MSR 0x259 0x0000000000000000
2448 12:31:51.935467 MTRR: Fixed MSR 0x268 0x0606060606060606
2449 12:31:51.938837 MTRR: Fixed MSR 0x269 0x0606060606060606
2450 12:31:51.942234 MTRR: Fixed MSR 0x26a 0x0606060606060606
2451 12:31:51.945144 MTRR: Fixed MSR 0x26b 0x0606060606060606
2452 12:31:51.948621 MTRR: Fixed MSR 0x26c 0x0606060606060606
2453 12:31:51.955157 MTRR: Fixed MSR 0x26d 0x0606060606060606
2454 12:31:51.958316 MTRR: Fixed MSR 0x26e 0x0606060606060606
2455 12:31:51.961668 MTRR: Fixed MSR 0x26f 0x0606060606060606
2456 12:31:51.965057 call enable_fixed_mtrr()
2457 12:31:51.968632 call enable_fixed_mtrr()
2458 12:31:51.971477 CPU physical address size: 39 bits
2459 12:31:51.975125 CPU physical address size: 39 bits
2460 12:31:51.978312 call enable_fixed_mtrr()
2461 12:31:51.981885 CPU physical address size: 39 bits
2462 12:31:51.984640 CPU physical address size: 39 bits
2463 12:31:51.985035
2464 12:31:51.985343 MTRR check
2465 12:31:51.988208 Fixed MTRRs : Enabled
2466 12:31:51.991742 Variable MTRRs: Enabled
2467 12:31:51.992184
2468 12:31:51.998040 BS: BS_WRITE_TABLES exit times (exec / console): 241 / 150 ms
2469 12:31:52.004919 CBFS: Found 'fallback/payload' @0x3b5e80 size 0x25905 in mcache @0x76addf68
2470 12:31:52.007968 Checking segment from ROM address 0xffc2aeac
2471 12:31:52.014654 Checking segment from ROM address 0xffc2aec8
2472 12:31:52.017993 Loading segment from ROM address 0xffc2aeac
2473 12:31:52.021027 code (compression=1)
2474 12:31:52.028153 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc2aee4 filesize 0x258cd
2475 12:31:52.037535 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258cd
2476 12:31:52.037931 using LZMA
2477 12:31:52.061141 [ 0x30000000, 30051214, 0x32668e60) <- ffc2aee4
2478 12:31:52.067345 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2479 12:31:52.075648 Loading segment from ROM address 0xffc2aec8
2480 12:31:52.078779 Entry Point 0x30000000
2481 12:31:52.079175 Loaded segments
2482 12:31:52.085779 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2483 12:31:52.088849 coreboot skipped calling FSP notify phase: 00000040.
2484 12:31:52.095560 coreboot skipped calling FSP notify phase: 000000f0.
2485 12:31:52.101933 BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms
2486 12:31:52.102329 Finalizing chipset.
2487 12:31:52.105225 apm_control: Finalizing SMM.
2488 12:31:52.109329 APMC done.
2489 12:31:52.115094 HECI: coreboot in recovery mode; found CSE in expected SOFT TEMP DISABLE state, skipping EOP
2490 12:31:52.118701 Disabling Heci using PMC IPC
2491 12:31:52.121778 HECI: CSE device 16.0 is hidden
2492 12:31:52.125281 HECI: CSE device 16.1 is disabled
2493 12:31:52.128829 HECI: CSE device 16.2 is disabled
2494 12:31:52.132221 HECI: CSE device 16.3 is disabled
2495 12:31:52.135263 HECI: CSE device 16.4 is disabled
2496 12:31:52.142279 HECI: CSE device 16.5 is disabled
2497 12:31:52.145002 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 39 ms
2498 12:31:52.148842 mp_park_aps done after 0 msecs.
2499 12:31:52.155288 Jumping to boot code at 0x30000000(0x7688f000)
2500 12:31:52.161858 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2501 12:31:52.168544
2502 12:31:52.168934
2503 12:31:52.169240
2504 12:31:52.172028 Starting depthcharge on Volmar...
2505 12:31:52.172418
2506 12:31:52.173519 end: 2.2.3 depthcharge-start (duration 00:00:12) [common]
2507 12:31:52.173995 start: 2.2.4 bootloader-commands (timeout 00:04:39) [common]
2508 12:31:52.174358 Setting prompt string to ['brya:']
2509 12:31:52.174749 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:39)
2510 12:31:52.178581 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2511 12:31:52.178981
2512 12:31:52.184939 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2513 12:31:52.185342
2514 12:31:52.191895 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2515 12:31:52.192355
2516 12:31:52.195364 configure_storage: Failed to remap 1C:2
2517 12:31:52.195829
2518 12:31:52.198418 Wipe memory regions:
2519 12:31:52.198886
2520 12:31:52.201766 [0x00000000001000, 0x000000000a0000)
2521 12:31:52.202172
2522 12:31:52.204820 [0x00000000100000, 0x00000030000000)
2523 12:31:52.318242
2524 12:31:52.321595 [0x00000032668e60, 0x00000076855000)
2525 12:31:52.481125
2526 12:31:52.484429 [0x00000100000000, 0x0000027fc00000)
2527 12:31:53.371237
2528 12:31:53.374125 ec_init: CrosEC protocol v3 supported (256, 256)
2529 12:31:53.982958
2530 12:31:53.983416 R8152: Initializing
2531 12:31:53.983727
2532 12:31:53.986391 Version 9 (ocp_data = 6010)
2533 12:31:53.986786
2534 12:31:53.989442 R8152: Done initializing
2535 12:31:53.989838
2536 12:31:53.993189 Adding net device
2537 12:31:54.295113
2538 12:31:54.298706 [firmware-brya-14505.B-collabora] May 21 2024 15:13:27
2539 12:31:54.299103
2540 12:31:54.299417
2541 12:31:54.300120 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2543 12:31:54.401240 brya: tftpboot 192.168.201.1 14571243/tftp-deploy-wsxpq82t/kernel/bzImage 14571243/tftp-deploy-wsxpq82t/kernel/cmdline 14571243/tftp-deploy-wsxpq82t/ramdisk/ramdisk.cpio.gz
2544 12:31:54.401861 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2545 12:31:54.402237 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2546 12:31:54.406964 tftpboot 192.168.201.1 14571243/tftp-deploy-wsxpq82t/kernel/bzIploy-wsxpq82t/kernel/cmdline 14571243/tftp-deploy-wsxpq82t/ramdisk/ramdisk.cpio.gz
2547 12:31:54.407383
2548 12:31:54.407703 Waiting for link
2549 12:31:54.609936
2550 12:31:54.610394 done.
2551 12:31:54.610698
2552 12:31:54.610972 MAC: 00:e0:4c:68:05:c6
2553 12:31:54.611239
2554 12:31:54.613420 Sending DHCP discover... done.
2555 12:31:54.613811
2556 12:31:54.616446 Waiting for reply... done.
2557 12:31:54.616834
2558 12:31:54.620241 Sending DHCP request... done.
2559 12:31:54.620629
2560 12:31:54.626435 Waiting for reply... done.
2561 12:31:54.626838
2562 12:31:54.627147 My ip is 192.168.201.17
2563 12:31:54.627431
2564 12:31:54.630035 The DHCP server ip is 192.168.201.1
2565 12:31:54.630424
2566 12:31:54.636632 TFTP server IP predefined by user: 192.168.201.1
2567 12:31:54.637027
2568 12:31:54.642985 Bootfile predefined by user: 14571243/tftp-deploy-wsxpq82t/kernel/bzImage
2569 12:31:54.643378
2570 12:31:54.646429 Sending tftp read request... done.
2571 12:31:54.646853
2572 12:31:54.655556 Waiting for the transfer...
2573 12:31:54.656035
2574 12:31:54.921258 00000000 ################################################################
2575 12:31:54.921373
2576 12:31:55.182048 00080000 ################################################################
2577 12:31:55.182178
2578 12:31:55.438380 00100000 ################################################################
2579 12:31:55.438497
2580 12:31:55.710114 00180000 ################################################################
2581 12:31:55.710239
2582 12:31:55.959266 00200000 ################################################################
2583 12:31:55.959378
2584 12:31:56.226524 00280000 ################################################################
2585 12:31:56.226650
2586 12:31:56.511399 00300000 ################################################################
2587 12:31:56.511514
2588 12:31:56.809230 00380000 ################################################################
2589 12:31:56.809351
2590 12:31:57.088226 00400000 ################################################################
2591 12:31:57.088341
2592 12:31:57.339679 00480000 ################################################################
2593 12:31:57.339790
2594 12:31:57.597151 00500000 ################################################################
2595 12:31:57.597264
2596 12:31:57.855720 00580000 ################################################################
2597 12:31:57.855833
2598 12:31:58.150390 00600000 ################################################################
2599 12:31:58.150501
2600 12:31:58.401687 00680000 ################################################################
2601 12:31:58.401797
2602 12:31:58.652967 00700000 ################################################################
2603 12:31:58.653079
2604 12:31:58.935427 00780000 ################################################################
2605 12:31:58.935539
2606 12:31:59.201128 00800000 ################################################################
2607 12:31:59.201240
2608 12:31:59.487181 00880000 ################################################################
2609 12:31:59.487290
2610 12:31:59.736960 00900000 ################################################################
2611 12:31:59.737074
2612 12:31:59.988073 00980000 ################################################################
2613 12:31:59.988213
2614 12:32:00.230408 00a00000 ################################################################
2615 12:32:00.230521
2616 12:32:00.484508 00a80000 ################################################################
2617 12:32:00.484620
2618 12:32:00.762953 00b00000 ################################################################
2619 12:32:00.763069
2620 12:32:01.035647 00b80000 ################################################################
2621 12:32:01.035757
2622 12:32:01.304955 00c00000 ################################################################
2623 12:32:01.305069
2624 12:32:01.582092 00c80000 ################################################################
2625 12:32:01.582207
2626 12:32:01.862620 00d00000 ################################################################
2627 12:32:01.862734
2628 12:32:02.143875 00d80000 ################################################################
2629 12:32:02.144002
2630 12:32:02.426128 00e00000 ################################################################
2631 12:32:02.426243
2632 12:32:02.692243 00e80000 ################################################################
2633 12:32:02.692363
2634 12:32:02.955857 00f00000 ################################################################
2635 12:32:02.955977
2636 12:32:03.246511 00f80000 ################################################################
2637 12:32:03.246643
2638 12:32:03.541699 01000000 ################################################################
2639 12:32:03.541825
2640 12:32:03.834096 01080000 ################################################################
2641 12:32:03.834224
2642 12:32:04.130714 01100000 ################################################################
2643 12:32:04.130841
2644 12:32:04.427757 01180000 ################################################################
2645 12:32:04.427925
2646 12:32:04.720778 01200000 ################################################################
2647 12:32:04.720904
2648 12:32:04.882715 01280000 #################################### done.
2649 12:32:04.882839
2650 12:32:04.886080 The bootfile was 19688512 bytes long.
2651 12:32:04.886155
2652 12:32:04.889489 Sending tftp read request... done.
2653 12:32:04.889588
2654 12:32:04.892631 Waiting for the transfer...
2655 12:32:04.892727
2656 12:32:05.187658 00000000 ################################################################
2657 12:32:05.187788
2658 12:32:05.461155 00080000 ################################################################
2659 12:32:05.461315
2660 12:32:05.736414 00100000 ################################################################
2661 12:32:05.736545
2662 12:32:06.025204 00180000 ################################################################
2663 12:32:06.025327
2664 12:32:06.315689 00200000 ################################################################
2665 12:32:06.315821
2666 12:32:06.591980 00280000 ################################################################
2667 12:32:06.592108
2668 12:32:06.860744 00300000 ################################################################
2669 12:32:06.860872
2670 12:32:07.158600 00380000 ################################################################
2671 12:32:07.158738
2672 12:32:07.445517 00400000 ################################################################
2673 12:32:07.445648
2674 12:32:07.722632 00480000 ################################################################
2675 12:32:07.722759
2676 12:32:07.981221 00500000 ################################################################
2677 12:32:07.981343
2678 12:32:08.257930 00580000 ################################################################
2679 12:32:08.258061
2680 12:32:08.534243 00600000 ################################################################
2681 12:32:08.534383
2682 12:32:08.836501 00680000 ################################################################
2683 12:32:08.836650
2684 12:32:09.131663 00700000 ################################################################
2685 12:32:09.131816
2686 12:32:09.421640 00780000 ################################################################
2687 12:32:09.421765
2688 12:32:09.516591 00800000 ###################### done.
2689 12:32:09.516719
2690 12:32:09.519931 Sending tftp read request... done.
2691 12:32:09.520028
2692 12:32:09.523382 Waiting for the transfer...
2693 12:32:09.523535
2694 12:32:09.526981 00000000 # done.
2695 12:32:09.527081
2696 12:32:09.533512 Command line loaded dynamically from TFTP file: 14571243/tftp-deploy-wsxpq82t/kernel/cmdline
2697 12:32:09.533609
2698 12:32:09.560038 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14571243/extract-nfsrootfs-lcz_zmy7,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
2699 12:32:09.566678
2700 12:32:09.570142 Shutting down all USB controllers.
2701 12:32:09.570219
2702 12:32:09.570295 Removing current net device
2703 12:32:09.570367
2704 12:32:09.572825 Finalizing coreboot
2705 12:32:09.572903
2706 12:32:09.579359 Exiting depthcharge with code 4 at timestamp: 27442197
2707 12:32:09.579438
2708 12:32:09.579515
2709 12:32:09.579587 Starting kernel ...
2710 12:32:09.579657
2711 12:32:09.579744
2712 12:32:09.580176 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2713 12:32:09.580275 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2714 12:32:09.580356 Setting prompt string to ['Linux version [0-9]']
2715 12:32:09.580453 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2716 12:32:09.580551 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2718 12:36:31.580536 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2720 12:36:31.580805 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2722 12:36:31.581033 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2725 12:36:31.581400 end: 2 depthcharge-action (duration 00:05:00) [common]
2727 12:36:31.581621 Cleaning after the job
2728 12:36:31.581704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/ramdisk
2729 12:36:31.582712 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/kernel
2730 12:36:31.585202 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/nfsrootfs
2731 12:36:31.623565 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14571243/tftp-deploy-wsxpq82t/modules
2732 12:36:31.625638 start: 4.1 power-off (timeout 00:00:30) [common]
2733 12:36:31.625850 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-10', '--port=1', '--command=off']
2734 12:36:33.697275 >> Command sent successfully.
2735 12:36:33.700400 Returned 0 in 2 seconds
2736 12:36:33.800749 end: 4.1 power-off (duration 00:00:02) [common]
2738 12:36:33.801057 start: 4.2 read-feedback (timeout 00:09:58) [common]
2739 12:36:33.801295 Listened to connection for namespace 'common' for up to 1s
2741 12:36:33.801673 Listened to connection for namespace 'common' for up to 1s
2742 12:36:34.802287 Finalising connection for namespace 'common'
2743 12:36:34.802459 Disconnecting from shell: Finalise
2744 12:36:34.802550
2745 12:36:34.902840 end: 4.2 read-feedback (duration 00:00:01) [common]
2746 12:36:34.902967 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14571243
2747 12:36:35.069019 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14571243
2748 12:36:35.069202 JobError: Your job cannot terminate cleanly.