Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 03:16:10.350062 lava-dispatcher, installed at version: 2022.11
2 03:16:10.350281 start: 0 validate
3 03:16:10.350425 Start time: 2023-01-19 03:16:10.350418+00:00 (UTC)
4 03:16:10.350566 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:16:10.350710 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230114.0%2Fx86%2Frootfs.cpio.gz exists
6 03:16:10.354319 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:16:10.354464 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.269-cip88-rt28-rebase%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:16:10.856754 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:16:10.857470 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.269-cip88-rt28-rebase%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 03:16:10.869012 validate duration: 0.52
12 03:16:10.870289 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:16:10.870849 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:16:10.871356 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:16:10.871863 Not decompressing ramdisk as can be used compressed.
16 03:16:10.872287 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230114.0/x86/rootfs.cpio.gz
17 03:16:10.872643 saving as /var/lib/lava/dispatcher/tmp/8789682/tftp-deploy-uv9nj5r2/ramdisk/rootfs.cpio.gz
18 03:16:10.872972 total size: 8423555 (8MB)
19 03:16:10.878800 progress 0% (0MB)
20 03:16:10.890122 progress 5% (0MB)
21 03:16:10.900576 progress 10% (0MB)
22 03:16:10.911008 progress 15% (1MB)
23 03:16:10.922265 progress 20% (1MB)
24 03:16:10.933280 progress 25% (2MB)
25 03:16:10.942667 progress 30% (2MB)
26 03:16:10.953161 progress 35% (2MB)
27 03:16:10.963526 progress 40% (3MB)
28 03:16:10.976771 progress 45% (3MB)
29 03:16:10.990378 progress 50% (4MB)
30 03:16:11.006919 progress 55% (4MB)
31 03:16:11.019604 progress 60% (4MB)
32 03:16:11.034502 progress 65% (5MB)
33 03:16:11.047316 progress 70% (5MB)
34 03:16:11.062526 progress 75% (6MB)
35 03:16:11.076320 progress 80% (6MB)
36 03:16:11.092833 progress 85% (6MB)
37 03:16:11.107659 progress 90% (7MB)
38 03:16:11.127626 progress 95% (7MB)
39 03:16:11.144807 progress 100% (8MB)
40 03:16:11.145008 8MB downloaded in 0.27s (29.53MB/s)
41 03:16:11.145186 end: 1.1.1 http-download (duration 00:00:00) [common]
43 03:16:11.145469 end: 1.1 download-retry (duration 00:00:00) [common]
44 03:16:11.145569 start: 1.2 download-retry (timeout 00:10:00) [common]
45 03:16:11.145668 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 03:16:11.145785 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.269-cip88-rt28-rebase/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 03:16:11.145863 saving as /var/lib/lava/dispatcher/tmp/8789682/tftp-deploy-uv9nj5r2/kernel/bzImage
48 03:16:11.145940 total size: 9711616 (9MB)
49 03:16:11.146010 No compression specified
50 03:16:11.177815 progress 0% (0MB)
51 03:16:11.273310 progress 5% (0MB)
52 03:16:11.352708 progress 10% (0MB)
53 03:16:11.436350 progress 15% (1MB)
54 03:16:11.529758 progress 20% (1MB)
55 03:16:11.613452 progress 25% (2MB)
56 03:16:11.695282 progress 30% (2MB)
57 03:16:11.789447 progress 35% (3MB)
58 03:16:11.882390 progress 40% (3MB)
59 03:16:11.967745 progress 45% (4MB)
60 03:16:12.063607 progress 50% (4MB)
61 03:16:12.146059 progress 55% (5MB)
62 03:16:12.223790 progress 60% (5MB)
63 03:16:12.306577 progress 65% (6MB)
64 03:16:12.379485 progress 70% (6MB)
65 03:16:12.475133 progress 75% (6MB)
66 03:16:12.559258 progress 80% (7MB)
67 03:16:12.644817 progress 85% (7MB)
68 03:16:12.728580 progress 90% (8MB)
69 03:16:12.800405 progress 95% (8MB)
70 03:16:12.878570 progress 100% (9MB)
71 03:16:12.879645 9MB downloaded in 1.73s (5.34MB/s)
72 03:16:12.880349 end: 1.2.1 http-download (duration 00:00:02) [common]
74 03:16:12.881814 end: 1.2 download-retry (duration 00:00:02) [common]
75 03:16:12.882346 start: 1.3 download-retry (timeout 00:09:58) [common]
76 03:16:12.882803 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 03:16:12.883318 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.269-cip88-rt28-rebase/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 03:16:12.883672 saving as /var/lib/lava/dispatcher/tmp/8789682/tftp-deploy-uv9nj5r2/modules/modules.tar
79 03:16:12.884000 total size: 64648 (0MB)
80 03:16:12.884316 Using unxz to decompress xz
81 03:16:12.950439 progress 50% (0MB)
82 03:16:12.970484 progress 100% (0MB)
83 03:16:12.973843 0MB downloaded in 0.09s (0.69MB/s)
84 03:16:12.974259 end: 1.3.1 http-download (duration 00:00:00) [common]
86 03:16:12.974632 end: 1.3 download-retry (duration 00:00:00) [common]
87 03:16:12.974778 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 03:16:12.974920 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 03:16:12.975045 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 03:16:12.975170 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 03:16:12.975417 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_
92 03:16:12.975573 makedir: /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin
93 03:16:12.975696 makedir: /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/tests
94 03:16:12.975814 makedir: /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/results
95 03:16:12.975965 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-add-keys
96 03:16:12.976163 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-add-sources
97 03:16:12.976334 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-background-process-start
98 03:16:12.976499 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-background-process-stop
99 03:16:12.976663 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-common-functions
100 03:16:12.976823 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-echo-ipv4
101 03:16:12.976986 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-install-packages
102 03:16:12.977147 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-installed-packages
103 03:16:12.977305 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-os-build
104 03:16:12.977464 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-probe-channel
105 03:16:12.977625 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-probe-ip
106 03:16:12.977783 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-target-ip
107 03:16:12.977953 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-target-mac
108 03:16:12.978113 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-target-storage
109 03:16:12.978278 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-test-case
110 03:16:12.978453 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-test-event
111 03:16:12.978641 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-test-feedback
112 03:16:12.978821 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-test-raise
113 03:16:12.979005 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-test-reference
114 03:16:12.979180 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-test-runner
115 03:16:12.979353 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-test-set
116 03:16:12.979525 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-test-shell
117 03:16:12.979704 Updating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-install-packages (oe)
118 03:16:12.979885 Updating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/bin/lava-installed-packages (oe)
119 03:16:12.980046 Creating /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/environment
120 03:16:12.980187 LAVA metadata
121 03:16:12.980301 - LAVA_JOB_ID=8789682
122 03:16:12.980413 - LAVA_DISPATCHER_IP=192.168.201.1
123 03:16:12.980577 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 03:16:12.980687 skipped lava-vland-overlay
125 03:16:12.980809 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 03:16:12.980946 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 03:16:12.981049 skipped lava-multinode-overlay
128 03:16:12.981171 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 03:16:12.981304 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 03:16:12.981427 Loading test definitions
131 03:16:12.981599 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 03:16:12.981725 Using /lava-8789682 at stage 0
133 03:16:12.982165 uuid=8789682_1.4.2.3.1 testdef=None
134 03:16:12.982318 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 03:16:12.982464 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 03:16:12.983243 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 03:16:12.983612 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 03:16:12.984582 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 03:16:12.984978 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 03:16:12.985842 runner path: /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/0/tests/0_dmesg test_uuid 8789682_1.4.2.3.1
143 03:16:12.986092 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 03:16:12.986470 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 03:16:12.986589 Using /lava-8789682 at stage 1
147 03:16:12.986991 uuid=8789682_1.4.2.3.5 testdef=None
148 03:16:12.987139 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 03:16:12.987282 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 03:16:12.987993 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 03:16:12.988360 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 03:16:12.989301 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 03:16:12.989694 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 03:16:12.990600 runner path: /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/1/tests/1_bootrr test_uuid 8789682_1.4.2.3.5
157 03:16:12.990833 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 03:16:12.991180 Creating lava-test-runner.conf files
160 03:16:12.991283 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/0 for stage 0
161 03:16:12.991414 - 0_dmesg
162 03:16:12.991539 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8789682/lava-overlay-n9r7cue_/lava-8789682/1 for stage 1
163 03:16:12.991672 - 1_bootrr
164 03:16:12.991821 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 03:16:12.991960 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 03:16:13.001503 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 03:16:13.001675 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 03:16:13.001821 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 03:16:13.001973 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 03:16:13.002118 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 03:16:13.207778 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 03:16:13.208172 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 03:16:13.208296 extracting modules file /var/lib/lava/dispatcher/tmp/8789682/tftp-deploy-uv9nj5r2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8789682/extract-overlay-ramdisk-of7orwj6/ramdisk
174 03:16:13.212903 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 03:16:13.213035 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 03:16:13.213143 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8789682/compress-overlay-8oiytr3v/overlay-1.4.2.4.tar.gz to ramdisk
177 03:16:13.213229 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8789682/compress-overlay-8oiytr3v/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8789682/extract-overlay-ramdisk-of7orwj6/ramdisk
178 03:16:13.217578 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 03:16:13.217705 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 03:16:13.217814 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 03:16:13.217926 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 03:16:13.218018 Building ramdisk /var/lib/lava/dispatcher/tmp/8789682/extract-overlay-ramdisk-of7orwj6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8789682/extract-overlay-ramdisk-of7orwj6/ramdisk
183 03:16:13.289176 >> 48351 blocks
184 03:16:14.126087 rename /var/lib/lava/dispatcher/tmp/8789682/extract-overlay-ramdisk-of7orwj6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8789682/tftp-deploy-uv9nj5r2/ramdisk/ramdisk.cpio.gz
185 03:16:14.126537 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 03:16:14.126678 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 03:16:14.126795 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 03:16:14.126902 No mkimage arch provided, not using FIT.
189 03:16:14.127007 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 03:16:14.127104 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 03:16:14.127218 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 03:16:14.127327 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 03:16:14.127417 No LXC device requested
194 03:16:14.127509 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 03:16:14.127611 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 03:16:14.127713 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 03:16:14.127797 Checking files for TFTP limit of 4294967296 bytes.
198 03:16:14.128245 end: 1 tftp-deploy (duration 00:00:03) [common]
199 03:16:14.128384 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 03:16:14.128506 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 03:16:14.128659 substitutions:
202 03:16:14.128742 - {DTB}: None
203 03:16:14.128818 - {INITRD}: 8789682/tftp-deploy-uv9nj5r2/ramdisk/ramdisk.cpio.gz
204 03:16:14.128901 - {KERNEL}: 8789682/tftp-deploy-uv9nj5r2/kernel/bzImage
205 03:16:14.128972 - {LAVA_MAC}: None
206 03:16:14.129049 - {PRESEED_CONFIG}: None
207 03:16:14.129121 - {PRESEED_LOCAL}: None
208 03:16:14.129185 - {RAMDISK}: 8789682/tftp-deploy-uv9nj5r2/ramdisk/ramdisk.cpio.gz
209 03:16:14.129261 - {ROOT_PART}: None
210 03:16:14.129325 - {ROOT}: None
211 03:16:14.129396 - {SERVER_IP}: 192.168.201.1
212 03:16:14.129469 - {TEE}: None
213 03:16:14.129533 Parsed boot commands:
214 03:16:14.129605 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 03:16:14.129777 Parsed boot commands: tftpboot 192.168.201.1 8789682/tftp-deploy-uv9nj5r2/kernel/bzImage 8789682/tftp-deploy-uv9nj5r2/kernel/cmdline 8789682/tftp-deploy-uv9nj5r2/ramdisk/ramdisk.cpio.gz
216 03:16:14.129906 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 03:16:14.130022 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 03:16:14.130140 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 03:16:14.130240 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 03:16:14.130320 Not connected, no need to disconnect.
221 03:16:14.130409 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 03:16:14.130503 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 03:16:14.130581 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
224 03:16:14.133506 Setting prompt string to ['lava-test: # ']
225 03:16:14.133829 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 03:16:14.133957 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 03:16:14.134073 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 03:16:14.134177 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 03:16:14.134380 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
230 03:16:14.154949 >> Command sent successfully.
231 03:16:14.157060 Returned 0 in 0 seconds
232 03:16:14.258193 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 03:16:14.260611 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 03:16:14.261123 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 03:16:14.261571 Setting prompt string to 'Starting depthcharge on Voema...'
237 03:16:14.261939 Changing prompt to 'Starting depthcharge on Voema...'
238 03:16:14.262303 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 03:16:14.263434 [Enter `^Ec?' for help]
240 03:16:22.527604
241 03:16:22.528212
242 03:16:22.536797 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 03:16:22.540367 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 03:16:22.543602
245 03:16:22.546876 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
246 03:16:22.550464 CPU: AES supported, TXT NOT supported, VT supported
247 03:16:22.556694 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
248 03:16:22.560484 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
249 03:16:22.567039 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
250 03:16:22.570057 VBOOT: Loading verstage.
251 03:16:22.573784 FMAP: Found "FLASH" version 1.1 at 0x1804000.
252 03:16:22.580311 FMAP: base = 0x0 size = 0x2000000 #areas = 32
253 03:16:22.583088 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
254 03:16:22.594018 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
255 03:16:22.600990 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 03:16:22.601535
257 03:16:22.601884
258 03:16:22.611110 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 03:16:22.627369 Probing TPM: . done!
260 03:16:22.630888 TPM ready after 0 ms
261 03:16:22.634475 Connected to device vid:did:rid of 1ae0:0028:00
262 03:16:22.646119 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
263 03:16:22.652408 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 03:16:22.655551 Initialized TPM device CR50 revision 0
265 03:16:22.712621 tlcl_send_startup: Startup return code is 0
266 03:16:22.713143 TPM: setup succeeded
267 03:16:22.728409 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 03:16:22.742830 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 03:16:22.755400 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 03:16:22.765008 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 03:16:22.769165 Chrome EC: UHEPI supported
272 03:16:22.772479 Phase 1
273 03:16:22.775617 FMAP: area GBB found @ 1805000 (458752 bytes)
274 03:16:22.785431 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 03:16:22.792606 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
276 03:16:22.798925 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
277 03:16:22.805826 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
278 03:16:22.809146 Recovery requested (1009000e)
279 03:16:22.811815 TPM: Extending digest for VBOOT: boot mode into PCR 0
280 03:16:22.823865 tlcl_extend: response is 0
281 03:16:22.830484 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
282 03:16:22.840317 tlcl_extend: response is 0
283 03:16:22.847303 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 03:16:22.854019 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
285 03:16:22.860609 BS: verstage times (exec / console): total (unknown) / 142 ms
286 03:16:22.861151
287 03:16:22.861544
288 03:16:22.873286 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
289 03:16:22.879966 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 03:16:22.883614 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 03:16:22.886659 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
292 03:16:22.893081 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 03:16:22.896774 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
294 03:16:22.899659 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
295 03:16:22.903287 TCO_STS: 0000 0000
296 03:16:22.906410 GEN_PMCON: d0015038 00002200
297 03:16:22.909786 GBLRST_CAUSE: 00000000 00000000
298 03:16:22.913031 HPR_CAUSE0: 00000000
299 03:16:22.913471 prev_sleep_state 5
300 03:16:22.915905 Boot Count incremented to 12549
301 03:16:22.922382 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 03:16:22.930024 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 03:16:22.939489 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 03:16:22.945884 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
305 03:16:22.949302 Chrome EC: UHEPI supported
306 03:16:22.955750 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
307 03:16:22.967109 Probing TPM: done!
308 03:16:22.973793 Connected to device vid:did:rid of 1ae0:0028:00
309 03:16:22.983392 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
310 03:16:22.986964 Initialized TPM device CR50 revision 0
311 03:16:23.002346 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
312 03:16:23.007941 MRC: Hash idx 0x100b comparison successful.
313 03:16:23.011270 MRC cache found, size faa8
314 03:16:23.011711 bootmode is set to: 2
315 03:16:23.015346 SPD index = 2
316 03:16:23.021700 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
317 03:16:23.024704 SPD: module type is LPDDR4X
318 03:16:23.027819 SPD: module part number is MT53D1G64D4NW-046
319 03:16:23.034401 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
320 03:16:23.041017 SPD: device width 16 bits, bus width 16 bits
321 03:16:23.045175 SPD: module size is 2048 MB (per channel)
322 03:16:23.475307 CBMEM:
323 03:16:23.478673 IMD: root @ 0x76fff000 254 entries.
324 03:16:23.481855 IMD: root @ 0x76ffec00 62 entries.
325 03:16:23.484958 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
326 03:16:23.491585 FMAP: area RW_VPD found @ f35000 (8192 bytes)
327 03:16:23.494900 External stage cache:
328 03:16:23.498761 IMD: root @ 0x7b3ff000 254 entries.
329 03:16:23.501419 IMD: root @ 0x7b3fec00 62 entries.
330 03:16:23.517250 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
331 03:16:23.523228 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
332 03:16:23.529969 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
333 03:16:23.543195 MRC: 'RECOVERY_MRC_CACHE' does not need update.
334 03:16:23.550052 cse_lite: Skip switching to RW in the recovery path
335 03:16:23.550637 8 DIMMs found
336 03:16:23.551041 SMM Memory Map
337 03:16:23.553068 SMRAM : 0x7b000000 0x800000
338 03:16:23.556281
339 03:16:23.559640 Subregion 0: 0x7b000000 0x200000
340 03:16:23.563217 Subregion 1: 0x7b200000 0x200000
341 03:16:23.566695 Subregion 2: 0x7b400000 0x400000
342 03:16:23.567138 top_of_ram = 0x77000000
343 03:16:23.573278 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 03:16:23.580276 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 03:16:23.583326 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
346 03:16:23.589477 MTRR Range: Start=ff000000 End=0 (Size 1000000)
347 03:16:23.596242 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
348 03:16:23.602871 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
349 03:16:23.613005 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
350 03:16:23.616055 Processing 211 relocs. Offset value of 0x74c0b000
351 03:16:23.619583
352 03:16:23.626739 BS: romstage times (exec / console): total (unknown) / 277 ms
353 03:16:23.632423
354 03:16:23.632997
355 03:16:23.642446 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
356 03:16:23.645624 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
357 03:16:23.655448 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
358 03:16:23.661651 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
359 03:16:23.668669 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
360 03:16:23.675075 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
361 03:16:23.718394 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
362 03:16:23.725622 Processing 5008 relocs. Offset value of 0x75d98000
363 03:16:23.728765 BS: postcar times (exec / console): total (unknown) / 59 ms
364 03:16:23.731875
365 03:16:23.732457
366 03:16:23.741643 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
367 03:16:23.742295 Normal boot
368 03:16:23.744883 FW_CONFIG value is 0x804c02
369 03:16:23.748430 PCI: 00:07.0 disabled by fw_config
370 03:16:23.751928 PCI: 00:07.1 disabled by fw_config
371 03:16:23.755466 PCI: 00:0d.2 disabled by fw_config
372 03:16:23.758481 PCI: 00:1c.7 disabled by fw_config
373 03:16:23.761359
374 03:16:23.764887 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 03:16:23.771478 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
376 03:16:23.775426 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 03:16:23.778122 GENERIC: 0.0 disabled by fw_config
378 03:16:23.781840
379 03:16:23.785210 GENERIC: 1.0 disabled by fw_config
380 03:16:23.788324 fw_config match found: DB_USB=USB3_ACTIVE
381 03:16:23.791648 fw_config match found: DB_USB=USB3_ACTIVE
382 03:16:23.795062 fw_config match found: DB_USB=USB3_ACTIVE
383 03:16:23.801222 fw_config match found: DB_USB=USB3_ACTIVE
384 03:16:23.805072 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
385 03:16:23.811762 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
386 03:16:23.821958 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
387 03:16:23.828079 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
388 03:16:23.830946 microcode: sig=0x806c1 pf=0x80 revision=0x86
389 03:16:23.838084 microcode: Update skipped, already up-to-date
390 03:16:23.844370 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
391 03:16:23.872247 Detected 4 core, 8 thread CPU.
392 03:16:23.875940 Setting up SMI for CPU
393 03:16:23.879007 IED base = 0x7b400000
394 03:16:23.879499 IED size = 0x00400000
395 03:16:23.882089 Will perform SMM setup.
396 03:16:23.888803 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
397 03:16:23.895506 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
398 03:16:23.901843 Processing 16 relocs. Offset value of 0x00030000
399 03:16:23.905258 Attempting to start 7 APs
400 03:16:23.909053 Waiting for 10ms after sending INIT.
401 03:16:23.924289 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
402 03:16:23.924883 done.
403 03:16:23.927706 AP: slot 3 apic_id 3.
404 03:16:23.930832 AP: slot 6 apic_id 2.
405 03:16:23.934254 Waiting for 2nd SIPI to complete...done.
406 03:16:23.937230 AP: slot 7 apic_id 5.
407 03:16:23.937719 AP: slot 4 apic_id 4.
408 03:16:23.940686 AP: slot 2 apic_id 7.
409 03:16:23.943987 AP: slot 5 apic_id 6.
410 03:16:23.950516 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
411 03:16:23.957325 Processing 13 relocs. Offset value of 0x00038000
412 03:16:23.957876 Unable to locate Global NVS
413 03:16:23.960419
414 03:16:23.966852 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 03:16:23.970425 Installing permanent SMM handler to 0x7b000000
416 03:16:23.980834 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 03:16:23.983425 Processing 794 relocs. Offset value of 0x7b010000
418 03:16:23.993719 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 03:16:23.996971 Processing 13 relocs. Offset value of 0x7b008000
420 03:16:24.003459 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 03:16:24.010035 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 03:16:24.013298 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 03:16:24.020131 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 03:16:24.026847 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 03:16:24.033609 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 03:16:24.040586 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 03:16:24.041136 Unable to locate Global NVS
428 03:16:24.050261 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 03:16:24.053209 Clearing SMI status registers
430 03:16:24.053699 SMI_STS: PM1
431 03:16:24.056895 PM1_STS: PWRBTN
432 03:16:24.063234 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 03:16:24.066378 In relocation handler: CPU 0
434 03:16:24.069892 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 03:16:24.076546 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 03:16:24.077095 Relocation complete.
437 03:16:24.086657 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 03:16:24.087205 In relocation handler: CPU 1
439 03:16:24.089785
440 03:16:24.093318 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
441 03:16:24.093868 Relocation complete.
442 03:16:24.103111 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
443 03:16:24.103656 In relocation handler: CPU 5
444 03:16:24.109618 New SMBASE=0x7affec00 IEDBASE=0x7b400000
445 03:16:24.113185 Writing SMRR. base = 0x7b000006, mask=0xff800c00
446 03:16:24.116047 Relocation complete.
447 03:16:24.122681 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
448 03:16:24.126023 In relocation handler: CPU 2
449 03:16:24.129720 New SMBASE=0x7afff800 IEDBASE=0x7b400000
450 03:16:24.132875 Relocation complete.
451 03:16:24.139539 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
452 03:16:24.142559 In relocation handler: CPU 4
453 03:16:24.146169 New SMBASE=0x7afff000 IEDBASE=0x7b400000
454 03:16:24.152658 Writing SMRR. base = 0x7b000006, mask=0xff800c00
455 03:16:24.153241 Relocation complete.
456 03:16:24.159113 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
457 03:16:24.162334 In relocation handler: CPU 7
458 03:16:24.169145 New SMBASE=0x7affe400 IEDBASE=0x7b400000
459 03:16:24.169714 Relocation complete.
460 03:16:24.175667 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
461 03:16:24.178873 In relocation handler: CPU 3
462 03:16:24.185511 New SMBASE=0x7afff400 IEDBASE=0x7b400000
463 03:16:24.186094 Relocation complete.
464 03:16:24.192033 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
465 03:16:24.195224 In relocation handler: CPU 6
466 03:16:24.202229 New SMBASE=0x7affe800 IEDBASE=0x7b400000
467 03:16:24.205598 Writing SMRR. base = 0x7b000006, mask=0xff800c00
468 03:16:24.208909 Relocation complete.
469 03:16:24.209448 Initializing CPU #0
470 03:16:24.212436 CPU: vendor Intel device 806c1
471 03:16:24.215245 CPU: family 06, model 8c, stepping 01
472 03:16:24.218676
473 03:16:24.219220 Clearing out pending MCEs
474 03:16:24.222308 Setting up local APIC...
475 03:16:24.225273 apic_id: 0x00 done.
476 03:16:24.228701 Turbo is available but hidden
477 03:16:24.232281 Turbo is available and visible
478 03:16:24.235446 microcode: Update skipped, already up-to-date
479 03:16:24.238472 CPU #0 initialized
480 03:16:24.239014 Initializing CPU #7
481 03:16:24.242162 Initializing CPU #1
482 03:16:24.245001 Initializing CPU #3
483 03:16:24.245488 Initializing CPU #6
484 03:16:24.248452 Initializing CPU #2
485 03:16:24.248996 Initializing CPU #5
486 03:16:24.251999 CPU: vendor Intel device 806c1
487 03:16:24.255440 CPU: family 06, model 8c, stepping 01
488 03:16:24.258458 CPU: vendor Intel device 806c1
489 03:16:24.264785 CPU: family 06, model 8c, stepping 01
490 03:16:24.265234 Initializing CPU #4
491 03:16:24.268134 Clearing out pending MCEs
492 03:16:24.271756 CPU: vendor Intel device 806c1
493 03:16:24.274956 CPU: family 06, model 8c, stepping 01
494 03:16:24.277988 Setting up local APIC...
495 03:16:24.282150 CPU: vendor Intel device 806c1
496 03:16:24.285425 CPU: family 06, model 8c, stepping 01
497 03:16:24.288237 CPU: vendor Intel device 806c1
498 03:16:24.291897 CPU: family 06, model 8c, stepping 01
499 03:16:24.295914 CPU: vendor Intel device 806c1
500 03:16:24.299329 CPU: family 06, model 8c, stepping 01
501 03:16:24.302626 Clearing out pending MCEs
502 03:16:24.303061 Clearing out pending MCEs
503 03:16:24.305759 Setting up local APIC...
504 03:16:24.309502 Clearing out pending MCEs
505 03:16:24.312907 apic_id: 0x05 done.
506 03:16:24.313345 Clearing out pending MCEs
507 03:16:24.319233 microcode: Update skipped, already up-to-date
508 03:16:24.322090 CPU: vendor Intel device 806c1
509 03:16:24.325795 CPU: family 06, model 8c, stepping 01
510 03:16:24.329069 Clearing out pending MCEs
511 03:16:24.329505 Clearing out pending MCEs
512 03:16:24.332355 Setting up local APIC...
513 03:16:24.335849 apic_id: 0x02 done.
514 03:16:24.338802 Setting up local APIC...
515 03:16:24.339233 apic_id: 0x07 done.
516 03:16:24.342826 Setting up local APIC...
517 03:16:24.345681 microcode: Update skipped, already up-to-date
518 03:16:24.348942 apic_id: 0x03 done.
519 03:16:24.352484 CPU #6 initialized
520 03:16:24.356148 microcode: Update skipped, already up-to-date
521 03:16:24.358724 apic_id: 0x06 done.
522 03:16:24.362039 microcode: Update skipped, already up-to-date
523 03:16:24.365330 microcode: Update skipped, already up-to-date
524 03:16:24.368537 CPU #2 initialized
525 03:16:24.372128 CPU #5 initialized
526 03:16:24.372638 Setting up local APIC...
527 03:16:24.375582 CPU #3 initialized
528 03:16:24.378540 CPU #7 initialized
529 03:16:24.378987 apic_id: 0x04 done.
530 03:16:24.381936 Setting up local APIC...
531 03:16:24.385769 microcode: Update skipped, already up-to-date
532 03:16:24.388467 apic_id: 0x01 done.
533 03:16:24.391887 CPU #4 initialized
534 03:16:24.395504 microcode: Update skipped, already up-to-date
535 03:16:24.398451 CPU #1 initialized
536 03:16:24.402046 bsp_do_flight_plan done after 463 msecs.
537 03:16:24.405420 CPU: frequency set to 4400 MHz
538 03:16:24.406001 Enabling SMIs.
539 03:16:24.411363 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
540 03:16:24.429167 SATAXPCIE1 indicates PCIe NVMe is present
541 03:16:24.432175 Probing TPM: done!
542 03:16:24.436163 Connected to device vid:did:rid of 1ae0:0028:00
543 03:16:24.446263 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
544 03:16:24.449748 Initialized TPM device CR50 revision 0
545 03:16:24.452594 Enabling S0i3.4
546 03:16:24.459508 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
547 03:16:24.462795 Found a VBT of 8704 bytes after decompression
548 03:16:24.469242 cse_lite: CSE RO boot. HybridStorageMode disabled
549 03:16:24.476172 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
550 03:16:24.550894 FSPS returned 0
551 03:16:24.554292 Executing Phase 1 of FspMultiPhaseSiInit
552 03:16:24.564059 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
553 03:16:24.567189 port C0 DISC req: usage 1 usb3 1 usb2 5
554 03:16:24.570491 Raw Buffer output 0 00000511
555 03:16:24.573738 Raw Buffer output 1 00000000
556 03:16:24.577557 pmc_send_ipc_cmd succeeded
557 03:16:24.581063 port C1 DISC req: usage 1 usb3 2 usb2 3
558 03:16:24.584648
559 03:16:24.585189 Raw Buffer output 0 00000321
560 03:16:24.587847 Raw Buffer output 1 00000000
561 03:16:24.591681 pmc_send_ipc_cmd succeeded
562 03:16:24.597095 Detected 4 core, 8 thread CPU.
563 03:16:24.600263 Detected 4 core, 8 thread CPU.
564 03:16:24.800278 Display FSP Version Info HOB
565 03:16:24.803809 Reference Code - CPU = a.0.4c.31
566 03:16:24.806908 uCode Version = 0.0.0.86
567 03:16:24.810697 TXT ACM version = ff.ff.ff.ffff
568 03:16:24.813764 Reference Code - ME = a.0.4c.31
569 03:16:24.817160 MEBx version = 0.0.0.0
570 03:16:24.820459 ME Firmware Version = Consumer SKU
571 03:16:24.823485 Reference Code - PCH = a.0.4c.31
572 03:16:24.827042 PCH-CRID Status = Disabled
573 03:16:24.830079 PCH-CRID Original Value = ff.ff.ff.ffff
574 03:16:24.833940 PCH-CRID New Value = ff.ff.ff.ffff
575 03:16:24.837271 OPROM - RST - RAID = ff.ff.ff.ffff
576 03:16:24.840529 PCH Hsio Version = 4.0.0.0
577 03:16:24.843295 Reference Code - SA - System Agent = a.0.4c.31
578 03:16:24.847145 Reference Code - MRC = 2.0.0.1
579 03:16:24.850517 SA - PCIe Version = a.0.4c.31
580 03:16:24.853492 SA-CRID Status = Disabled
581 03:16:24.857070 SA-CRID Original Value = 0.0.0.1
582 03:16:24.860669 SA-CRID New Value = 0.0.0.1
583 03:16:24.863876 OPROM - VBIOS = ff.ff.ff.ffff
584 03:16:24.866485 IO Manageability Engine FW Version = 11.1.4.0
585 03:16:24.869704 PHY Build Version = 0.0.0.e0
586 03:16:24.873824 Thunderbolt(TM) FW Version = 0.0.0.0
587 03:16:24.880839 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
588 03:16:24.881286 ITSS IRQ Polarities Before:
589 03:16:24.884932 IPC0: 0xffffffff
590 03:16:24.885582 IPC1: 0xffffffff
591 03:16:24.887721 IPC2: 0xffffffff
592 03:16:24.888158 IPC3: 0xffffffff
593 03:16:24.890682
594 03:16:24.891132 ITSS IRQ Polarities After:
595 03:16:24.893997 IPC0: 0xffffffff
596 03:16:24.894444 IPC1: 0xffffffff
597 03:16:24.897713 IPC2: 0xffffffff
598 03:16:24.898294 IPC3: 0xffffffff
599 03:16:24.904443 Found PCIe Root Port #9 at PCI: 00:1d.0.
600 03:16:24.914514 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
601 03:16:24.927639 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
602 03:16:24.937858 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
603 03:16:24.941211
604 03:16:24.944283 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
605 03:16:24.947650 Enumerating buses...
606 03:16:24.951103 Show all devs... Before device enumeration.
607 03:16:24.954347 Root Device: enabled 1
608 03:16:24.957568 DOMAIN: 0000: enabled 1
609 03:16:24.961024 CPU_CLUSTER: 0: enabled 1
610 03:16:24.961623 PCI: 00:00.0: enabled 1
611 03:16:24.964071 PCI: 00:02.0: enabled 1
612 03:16:24.967373 PCI: 00:04.0: enabled 1
613 03:16:24.970608 PCI: 00:05.0: enabled 1
614 03:16:24.971149 PCI: 00:06.0: enabled 0
615 03:16:24.974016 PCI: 00:07.0: enabled 0
616 03:16:24.977628 PCI: 00:07.1: enabled 0
617 03:16:24.980684 PCI: 00:07.2: enabled 0
618 03:16:24.981224 PCI: 00:07.3: enabled 0
619 03:16:24.983854 PCI: 00:08.0: enabled 1
620 03:16:24.987072 PCI: 00:09.0: enabled 0
621 03:16:24.990459 PCI: 00:0a.0: enabled 0
622 03:16:24.991057 PCI: 00:0d.0: enabled 1
623 03:16:24.994171 PCI: 00:0d.1: enabled 0
624 03:16:24.997639 PCI: 00:0d.2: enabled 0
625 03:16:24.998202 PCI: 00:0d.3: enabled 0
626 03:16:25.000438 PCI: 00:0e.0: enabled 0
627 03:16:25.004167 PCI: 00:10.2: enabled 1
628 03:16:25.007526 PCI: 00:10.6: enabled 0
629 03:16:25.008062 PCI: 00:10.7: enabled 0
630 03:16:25.010155 PCI: 00:12.0: enabled 0
631 03:16:25.014064 PCI: 00:12.6: enabled 0
632 03:16:25.017595 PCI: 00:13.0: enabled 0
633 03:16:25.018213 PCI: 00:14.0: enabled 1
634 03:16:25.020956 PCI: 00:14.1: enabled 0
635 03:16:25.023811 PCI: 00:14.2: enabled 1
636 03:16:25.027211 PCI: 00:14.3: enabled 1
637 03:16:25.027653 PCI: 00:15.0: enabled 1
638 03:16:25.030609 PCI: 00:15.1: enabled 1
639 03:16:25.033440 PCI: 00:15.2: enabled 1
640 03:16:25.033883 PCI: 00:15.3: enabled 1
641 03:16:25.037202
642 03:16:25.037745 PCI: 00:16.0: enabled 1
643 03:16:25.040708 PCI: 00:16.1: enabled 0
644 03:16:25.043696 PCI: 00:16.2: enabled 0
645 03:16:25.044256 PCI: 00:16.3: enabled 0
646 03:16:25.047434 PCI: 00:16.4: enabled 0
647 03:16:25.050454 PCI: 00:16.5: enabled 0
648 03:16:25.053447 PCI: 00:17.0: enabled 1
649 03:16:25.053936 PCI: 00:19.0: enabled 0
650 03:16:25.056822 PCI: 00:19.1: enabled 1
651 03:16:25.060422 PCI: 00:19.2: enabled 0
652 03:16:25.063257 PCI: 00:1c.0: enabled 1
653 03:16:25.063701 PCI: 00:1c.1: enabled 0
654 03:16:25.066535 PCI: 00:1c.2: enabled 0
655 03:16:25.070577 PCI: 00:1c.3: enabled 0
656 03:16:25.073275 PCI: 00:1c.4: enabled 0
657 03:16:25.073740 PCI: 00:1c.5: enabled 0
658 03:16:25.076550 PCI: 00:1c.6: enabled 1
659 03:16:25.080292 PCI: 00:1c.7: enabled 0
660 03:16:25.080733 PCI: 00:1d.0: enabled 1
661 03:16:25.083410 PCI: 00:1d.1: enabled 0
662 03:16:25.086749 PCI: 00:1d.2: enabled 1
663 03:16:25.089778 PCI: 00:1d.3: enabled 0
664 03:16:25.090110 PCI: 00:1e.0: enabled 1
665 03:16:25.093154 PCI: 00:1e.1: enabled 0
666 03:16:25.096503 PCI: 00:1e.2: enabled 1
667 03:16:25.099601 PCI: 00:1e.3: enabled 1
668 03:16:25.099791 PCI: 00:1f.0: enabled 1
669 03:16:25.103182 PCI: 00:1f.1: enabled 0
670 03:16:25.106079 PCI: 00:1f.2: enabled 1
671 03:16:25.109822 PCI: 00:1f.3: enabled 1
672 03:16:25.109974 PCI: 00:1f.4: enabled 0
673 03:16:25.112673 PCI: 00:1f.5: enabled 1
674 03:16:25.116253 PCI: 00:1f.6: enabled 0
675 03:16:25.116375 PCI: 00:1f.7: enabled 0
676 03:16:25.119675
677 03:16:25.119782 APIC: 00: enabled 1
678 03:16:25.123042 GENERIC: 0.0: enabled 1
679 03:16:25.126105 GENERIC: 0.0: enabled 1
680 03:16:25.126201 GENERIC: 1.0: enabled 1
681 03:16:25.129843 GENERIC: 0.0: enabled 1
682 03:16:25.132979 GENERIC: 1.0: enabled 1
683 03:16:25.133077 USB0 port 0: enabled 1
684 03:16:25.136217
685 03:16:25.136314 GENERIC: 0.0: enabled 1
686 03:16:25.139409 USB0 port 0: enabled 1
687 03:16:25.143150 GENERIC: 0.0: enabled 1
688 03:16:25.143246 I2C: 00:1a: enabled 1
689 03:16:25.146097 I2C: 00:31: enabled 1
690 03:16:25.149399 I2C: 00:32: enabled 1
691 03:16:25.149495 I2C: 00:10: enabled 1
692 03:16:25.152707 I2C: 00:15: enabled 1
693 03:16:25.155872 GENERIC: 0.0: enabled 0
694 03:16:25.159469 GENERIC: 1.0: enabled 0
695 03:16:25.159576 GENERIC: 0.0: enabled 1
696 03:16:25.162793 SPI: 00: enabled 1
697 03:16:25.162892 SPI: 00: enabled 1
698 03:16:25.166108 PNP: 0c09.0: enabled 1
699 03:16:25.169310 GENERIC: 0.0: enabled 1
700 03:16:25.172588 USB3 port 0: enabled 1
701 03:16:25.172706 USB3 port 1: enabled 1
702 03:16:25.176365 USB3 port 2: enabled 0
703 03:16:25.179171 USB3 port 3: enabled 0
704 03:16:25.179274 USB2 port 0: enabled 0
705 03:16:25.182475 USB2 port 1: enabled 1
706 03:16:25.185906 USB2 port 2: enabled 1
707 03:16:25.189337 USB2 port 3: enabled 0
708 03:16:25.189439 USB2 port 4: enabled 1
709 03:16:25.192588 USB2 port 5: enabled 0
710 03:16:25.195640 USB2 port 6: enabled 0
711 03:16:25.195737 USB2 port 7: enabled 0
712 03:16:25.199444 USB2 port 8: enabled 0
713 03:16:25.202228 USB2 port 9: enabled 0
714 03:16:25.202326 USB3 port 0: enabled 0
715 03:16:25.205701
716 03:16:25.205798 USB3 port 1: enabled 1
717 03:16:25.209099 USB3 port 2: enabled 0
718 03:16:25.212835 USB3 port 3: enabled 0
719 03:16:25.212931 GENERIC: 0.0: enabled 1
720 03:16:25.215923 GENERIC: 1.0: enabled 1
721 03:16:25.218958 APIC: 01: enabled 1
722 03:16:25.219054 APIC: 07: enabled 1
723 03:16:25.222424 APIC: 03: enabled 1
724 03:16:25.226031 APIC: 04: enabled 1
725 03:16:25.226127 APIC: 06: enabled 1
726 03:16:25.229162 APIC: 02: enabled 1
727 03:16:25.229311 APIC: 05: enabled 1
728 03:16:25.232368 Compare with tree...
729 03:16:25.235725 Root Device: enabled 1
730 03:16:25.239353 DOMAIN: 0000: enabled 1
731 03:16:25.239526 PCI: 00:00.0: enabled 1
732 03:16:25.242469 PCI: 00:02.0: enabled 1
733 03:16:25.245794 PCI: 00:04.0: enabled 1
734 03:16:25.249514 GENERIC: 0.0: enabled 1
735 03:16:25.252648 PCI: 00:05.0: enabled 1
736 03:16:25.252827 PCI: 00:06.0: enabled 0
737 03:16:25.255895 PCI: 00:07.0: enabled 0
738 03:16:25.259037 GENERIC: 0.0: enabled 1
739 03:16:25.262186 PCI: 00:07.1: enabled 0
740 03:16:25.265996 GENERIC: 1.0: enabled 1
741 03:16:25.266199 PCI: 00:07.2: enabled 0
742 03:16:25.269072 GENERIC: 0.0: enabled 1
743 03:16:25.272201 PCI: 00:07.3: enabled 0
744 03:16:25.275509 GENERIC: 1.0: enabled 1
745 03:16:25.278806 PCI: 00:08.0: enabled 1
746 03:16:25.278960 PCI: 00:09.0: enabled 0
747 03:16:25.282378 PCI: 00:0a.0: enabled 0
748 03:16:25.285434 PCI: 00:0d.0: enabled 1
749 03:16:25.289347 USB0 port 0: enabled 1
750 03:16:25.292322 USB3 port 0: enabled 1
751 03:16:25.292643 USB3 port 1: enabled 1
752 03:16:25.295940 USB3 port 2: enabled 0
753 03:16:25.299067 USB3 port 3: enabled 0
754 03:16:25.302501 PCI: 00:0d.1: enabled 0
755 03:16:25.306106 PCI: 00:0d.2: enabled 0
756 03:16:25.306642 GENERIC: 0.0: enabled 1
757 03:16:25.309319 PCI: 00:0d.3: enabled 0
758 03:16:25.312455 PCI: 00:0e.0: enabled 0
759 03:16:25.315697 PCI: 00:10.2: enabled 1
760 03:16:25.319041 PCI: 00:10.6: enabled 0
761 03:16:25.319581 PCI: 00:10.7: enabled 0
762 03:16:25.322819 PCI: 00:12.0: enabled 0
763 03:16:25.325801 PCI: 00:12.6: enabled 0
764 03:16:25.328992 PCI: 00:13.0: enabled 0
765 03:16:25.332331 PCI: 00:14.0: enabled 1
766 03:16:25.332816 USB0 port 0: enabled 1
767 03:16:25.335632 USB2 port 0: enabled 0
768 03:16:25.338928 USB2 port 1: enabled 1
769 03:16:25.342360 USB2 port 2: enabled 1
770 03:16:25.345462 USB2 port 3: enabled 0
771 03:16:25.349098 USB2 port 4: enabled 1
772 03:16:25.349531 USB2 port 5: enabled 0
773 03:16:25.352450 USB2 port 6: enabled 0
774 03:16:25.355283 USB2 port 7: enabled 0
775 03:16:25.358710 USB2 port 8: enabled 0
776 03:16:25.362089 USB2 port 9: enabled 0
777 03:16:25.362400 USB3 port 0: enabled 0
778 03:16:25.365131 USB3 port 1: enabled 1
779 03:16:25.368686 USB3 port 2: enabled 0
780 03:16:25.371746 USB3 port 3: enabled 0
781 03:16:25.375341 PCI: 00:14.1: enabled 0
782 03:16:25.378530 PCI: 00:14.2: enabled 1
783 03:16:25.378698 PCI: 00:14.3: enabled 1
784 03:16:25.381706 GENERIC: 0.0: enabled 1
785 03:16:25.385146 PCI: 00:15.0: enabled 1
786 03:16:25.388628 I2C: 00:1a: enabled 1
787 03:16:25.388750 I2C: 00:31: enabled 1
788 03:16:25.391609 I2C: 00:32: enabled 1
789 03:16:25.395233 PCI: 00:15.1: enabled 1
790 03:16:25.398042 I2C: 00:10: enabled 1
791 03:16:25.401540 PCI: 00:15.2: enabled 1
792 03:16:25.401637 PCI: 00:15.3: enabled 1
793 03:16:25.404963 PCI: 00:16.0: enabled 1
794 03:16:25.408429 PCI: 00:16.1: enabled 0
795 03:16:25.411678 PCI: 00:16.2: enabled 0
796 03:16:25.415213 PCI: 00:16.3: enabled 0
797 03:16:25.415388 PCI: 00:16.4: enabled 0
798 03:16:25.418482 PCI: 00:16.5: enabled 0
799 03:16:25.422399 PCI: 00:17.0: enabled 1
800 03:16:25.425379 PCI: 00:19.0: enabled 0
801 03:16:25.428524 PCI: 00:19.1: enabled 1
802 03:16:25.428705 I2C: 00:15: enabled 1
803 03:16:25.431538 PCI: 00:19.2: enabled 0
804 03:16:25.435563 PCI: 00:1d.0: enabled 1
805 03:16:25.438485 GENERIC: 0.0: enabled 1
806 03:16:25.438690 PCI: 00:1e.0: enabled 1
807 03:16:25.441457
808 03:16:25.441674 PCI: 00:1e.1: enabled 0
809 03:16:25.444857 PCI: 00:1e.2: enabled 1
810 03:16:25.448376 SPI: 00: enabled 1
811 03:16:25.452113 PCI: 00:1e.3: enabled 1
812 03:16:25.452369 SPI: 00: enabled 1
813 03:16:25.455143 PCI: 00:1f.0: enabled 1
814 03:16:25.458009 PNP: 0c09.0: enabled 1
815 03:16:25.461690 PCI: 00:1f.1: enabled 0
816 03:16:25.462040 PCI: 00:1f.2: enabled 1
817 03:16:25.464788 GENERIC: 0.0: enabled 1
818 03:16:25.468573 GENERIC: 0.0: enabled 1
819 03:16:25.471646 GENERIC: 1.0: enabled 1
820 03:16:25.475259 PCI: 00:1f.3: enabled 1
821 03:16:25.478336 PCI: 00:1f.4: enabled 0
822 03:16:25.478775 PCI: 00:1f.5: enabled 1
823 03:16:25.481810 PCI: 00:1f.6: enabled 0
824 03:16:25.485002 PCI: 00:1f.7: enabled 0
825 03:16:25.487981 CPU_CLUSTER: 0: enabled 1
826 03:16:25.488425 APIC: 00: enabled 1
827 03:16:25.539982 APIC: 01: enabled 1
828 03:16:25.540515 APIC: 07: enabled 1
829 03:16:25.540864 APIC: 03: enabled 1
830 03:16:25.541231 APIC: 04: enabled 1
831 03:16:25.541552 APIC: 06: enabled 1
832 03:16:25.541854 APIC: 02: enabled 1
833 03:16:25.542185 APIC: 05: enabled 1
834 03:16:25.542481 Root Device scanning...
835 03:16:25.543160 scan_static_bus for Root Device
836 03:16:25.543680 DOMAIN: 0000 enabled
837 03:16:25.544026 CPU_CLUSTER: 0 enabled
838 03:16:25.544332 DOMAIN: 0000 scanning...
839 03:16:25.544630 PCI: pci_scan_bus for bus 00
840 03:16:25.544920 PCI: 00:00.0 [8086/0000] ops
841 03:16:25.545213 PCI: 00:00.0 [8086/9a12] enabled
842 03:16:25.545506 PCI: 00:02.0 [8086/0000] bus ops
843 03:16:25.545791 PCI: 00:02.0 [8086/9a40] enabled
844 03:16:25.546106 PCI: 00:04.0 [8086/0000] bus ops
845 03:16:25.590344 PCI: 00:04.0 [8086/9a03] enabled
846 03:16:25.590939 PCI: 00:05.0 [8086/9a19] enabled
847 03:16:25.591726 PCI: 00:07.0 [0000/0000] hidden
848 03:16:25.592157 PCI: 00:08.0 [8086/9a11] enabled
849 03:16:25.592518 PCI: 00:0a.0 [8086/9a0d] disabled
850 03:16:25.592866 PCI: 00:0d.0 [8086/0000] bus ops
851 03:16:25.593202 PCI: 00:0d.0 [8086/9a13] enabled
852 03:16:25.593527 PCI: 00:14.0 [8086/0000] bus ops
853 03:16:25.593868 PCI: 00:14.0 [8086/a0ed] enabled
854 03:16:25.594264 PCI: 00:14.2 [8086/a0ef] enabled
855 03:16:25.594590 PCI: 00:14.3 [8086/0000] bus ops
856 03:16:25.594909 PCI: 00:14.3 [8086/a0f0] enabled
857 03:16:25.595570 PCI: 00:15.0 [8086/0000] bus ops
858 03:16:25.596005 PCI: 00:15.0 [8086/a0e8] enabled
859 03:16:25.596451 PCI: 00:15.1 [8086/0000] bus ops
860 03:16:25.640247 PCI: 00:15.1 [8086/a0e9] enabled
861 03:16:25.640839 PCI: 00:15.2 [8086/0000] bus ops
862 03:16:25.641230 PCI: 00:15.2 [8086/a0ea] enabled
863 03:16:25.641588 PCI: 00:15.3 [8086/0000] bus ops
864 03:16:25.641952 PCI: 00:15.3 [8086/a0eb] enabled
865 03:16:25.642294 PCI: 00:16.0 [8086/0000] ops
866 03:16:25.643004 PCI: 00:16.0 [8086/a0e0] enabled
867 03:16:25.643385 PCI: Static device PCI: 00:17.0 not found, disabling it.
868 03:16:25.643760 PCI: 00:19.0 [8086/0000] bus ops
869 03:16:25.644106 PCI: 00:19.0 [8086/a0c5] disabled
870 03:16:25.644442 PCI: 00:19.1 [8086/0000] bus ops
871 03:16:25.644919 PCI: 00:19.1 [8086/a0c6] enabled
872 03:16:25.645449 PCI: 00:1d.0 [8086/0000] bus ops
873 03:16:25.646015 PCI: 00:1d.0 [8086/a0b0] enabled
874 03:16:25.646371 PCI: 00:1e.0 [8086/0000] ops
875 03:16:25.647031 PCI: 00:1e.0 [8086/a0a8] enabled
876 03:16:25.648768 PCI: 00:1e.2 [8086/0000] bus ops
877 03:16:25.651909 PCI: 00:1e.2 [8086/a0aa] enabled
878 03:16:25.654839 PCI: 00:1e.3 [8086/0000] bus ops
879 03:16:25.658529 PCI: 00:1e.3 [8086/a0ab] enabled
880 03:16:25.661436 PCI: 00:1f.0 [8086/0000] bus ops
881 03:16:25.664994 PCI: 00:1f.0 [8086/a087] enabled
882 03:16:25.665533 RTC Init
883 03:16:25.668555 Set power on after power failure.
884 03:16:25.671524 Disabling Deep S3
885 03:16:25.672067 Disabling Deep S3
886 03:16:25.674953 Disabling Deep S4
887 03:16:25.675397 Disabling Deep S4
888 03:16:25.678059
889 03:16:25.678653 Disabling Deep S5
890 03:16:25.681356 Disabling Deep S5
891 03:16:25.684985 PCI: 00:1f.2 [0000/0000] hidden
892 03:16:25.688586 PCI: 00:1f.3 [8086/0000] bus ops
893 03:16:25.691673 PCI: 00:1f.3 [8086/a0c8] enabled
894 03:16:25.694634 PCI: 00:1f.5 [8086/0000] bus ops
895 03:16:25.697783 PCI: 00:1f.5 [8086/a0a4] enabled
896 03:16:25.701264 PCI: Leftover static devices:
897 03:16:25.701797 PCI: 00:10.2
898 03:16:25.702222 PCI: 00:10.6
899 03:16:25.704518 PCI: 00:10.7
900 03:16:25.704960 PCI: 00:06.0
901 03:16:25.708096 PCI: 00:07.1
902 03:16:25.708640 PCI: 00:07.2
903 03:16:25.708991 PCI: 00:07.3
904 03:16:25.711090 PCI: 00:09.0
905 03:16:25.711531 PCI: 00:0d.1
906 03:16:25.714748 PCI: 00:0d.2
907 03:16:25.715193 PCI: 00:0d.3
908 03:16:25.717822 PCI: 00:0e.0
909 03:16:25.718388 PCI: 00:12.0
910 03:16:25.718737 PCI: 00:12.6
911 03:16:25.721422 PCI: 00:13.0
912 03:16:25.722007 PCI: 00:14.1
913 03:16:25.724408 PCI: 00:16.1
914 03:16:25.724848 PCI: 00:16.2
915 03:16:25.725192 PCI: 00:16.3
916 03:16:25.727900 PCI: 00:16.4
917 03:16:25.728440 PCI: 00:16.5
918 03:16:25.731195 PCI: 00:17.0
919 03:16:25.731732 PCI: 00:19.2
920 03:16:25.732082 PCI: 00:1e.1
921 03:16:25.734795 PCI: 00:1f.1
922 03:16:25.735355 PCI: 00:1f.4
923 03:16:25.737625 PCI: 00:1f.6
924 03:16:25.738091 PCI: 00:1f.7
925 03:16:25.740645 PCI: Check your devicetree.cb.
926 03:16:25.744276 PCI: 00:02.0 scanning...
927 03:16:25.747415 scan_generic_bus for PCI: 00:02.0
928 03:16:25.750790 scan_generic_bus for PCI: 00:02.0 done
929 03:16:25.757325 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
930 03:16:25.757773 PCI: 00:04.0 scanning...
931 03:16:25.760749 scan_generic_bus for PCI: 00:04.0
932 03:16:25.764550 GENERIC: 0.0 enabled
933 03:16:25.770351 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
934 03:16:25.774028 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
935 03:16:25.777559 PCI: 00:0d.0 scanning...
936 03:16:25.780729 scan_static_bus for PCI: 00:0d.0
937 03:16:25.783592 USB0 port 0 enabled
938 03:16:25.786951 USB0 port 0 scanning...
939 03:16:25.790812 scan_static_bus for USB0 port 0
940 03:16:25.791265 USB3 port 0 enabled
941 03:16:25.794019 USB3 port 1 enabled
942 03:16:25.794457 USB3 port 2 disabled
943 03:16:25.797058
944 03:16:25.797493 USB3 port 3 disabled
945 03:16:25.800579 USB3 port 0 scanning...
946 03:16:25.803612 scan_static_bus for USB3 port 0
947 03:16:25.807410 scan_static_bus for USB3 port 0 done
948 03:16:25.810223 scan_bus: bus USB3 port 0 finished in 6 msecs
949 03:16:25.813362 USB3 port 1 scanning...
950 03:16:25.816752 scan_static_bus for USB3 port 1
951 03:16:25.819972 scan_static_bus for USB3 port 1 done
952 03:16:25.826740 scan_bus: bus USB3 port 1 finished in 6 msecs
953 03:16:25.830286 scan_static_bus for USB0 port 0 done
954 03:16:25.833736 scan_bus: bus USB0 port 0 finished in 43 msecs
955 03:16:25.836965 scan_static_bus for PCI: 00:0d.0 done
956 03:16:25.843641 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
957 03:16:25.846869 PCI: 00:14.0 scanning...
958 03:16:25.850185 scan_static_bus for PCI: 00:14.0
959 03:16:25.850772 USB0 port 0 enabled
960 03:16:25.853360 USB0 port 0 scanning...
961 03:16:25.856486 scan_static_bus for USB0 port 0
962 03:16:25.859727 USB2 port 0 disabled
963 03:16:25.860159 USB2 port 1 enabled
964 03:16:25.863556 USB2 port 2 enabled
965 03:16:25.866509 USB2 port 3 disabled
966 03:16:25.867047 USB2 port 4 enabled
967 03:16:25.870258 USB2 port 5 disabled
968 03:16:25.873106 USB2 port 6 disabled
969 03:16:25.873545 USB2 port 7 disabled
970 03:16:25.876319 USB2 port 8 disabled
971 03:16:25.876757 USB2 port 9 disabled
972 03:16:25.879751
973 03:16:25.880207 USB3 port 0 disabled
974 03:16:25.883365 USB3 port 1 enabled
975 03:16:25.883905 USB3 port 2 disabled
976 03:16:25.886459 USB3 port 3 disabled
977 03:16:25.890155 USB2 port 1 scanning...
978 03:16:25.893434 scan_static_bus for USB2 port 1
979 03:16:25.896879 scan_static_bus for USB2 port 1 done
980 03:16:25.900048 scan_bus: bus USB2 port 1 finished in 6 msecs
981 03:16:25.903078 USB2 port 2 scanning...
982 03:16:25.905999 scan_static_bus for USB2 port 2
983 03:16:25.909297 scan_static_bus for USB2 port 2 done
984 03:16:25.916767 scan_bus: bus USB2 port 2 finished in 6 msecs
985 03:16:25.917310 USB2 port 4 scanning...
986 03:16:25.919561 scan_static_bus for USB2 port 4
987 03:16:25.926494 scan_static_bus for USB2 port 4 done
988 03:16:25.929810 scan_bus: bus USB2 port 4 finished in 6 msecs
989 03:16:25.932971 USB3 port 1 scanning...
990 03:16:25.936418 scan_static_bus for USB3 port 1
991 03:16:25.939453 scan_static_bus for USB3 port 1 done
992 03:16:25.942752 scan_bus: bus USB3 port 1 finished in 6 msecs
993 03:16:25.945868 scan_static_bus for USB0 port 0 done
994 03:16:25.953086 scan_bus: bus USB0 port 0 finished in 93 msecs
995 03:16:25.956112 scan_static_bus for PCI: 00:14.0 done
996 03:16:25.959307 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
997 03:16:25.962985 PCI: 00:14.3 scanning...
998 03:16:25.966227 scan_static_bus for PCI: 00:14.3
999 03:16:25.969541 GENERIC: 0.0 enabled
1000 03:16:25.972249 scan_static_bus for PCI: 00:14.3 done
1001 03:16:25.975850 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1002 03:16:25.979057 PCI: 00:15.0 scanning...
1003 03:16:25.982537 scan_static_bus for PCI: 00:15.0
1004 03:16:25.985956 I2C: 00:1a enabled
1005 03:16:25.986498 I2C: 00:31 enabled
1006 03:16:25.988979 I2C: 00:32 enabled
1007 03:16:25.992561 scan_static_bus for PCI: 00:15.0 done
1008 03:16:25.998696 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1009 03:16:25.999145 PCI: 00:15.1 scanning...
1010 03:16:26.002761 scan_static_bus for PCI: 00:15.1
1011 03:16:26.005563 I2C: 00:10 enabled
1012 03:16:26.008700 scan_static_bus for PCI: 00:15.1 done
1013 03:16:26.015558 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1014 03:16:26.016101 PCI: 00:15.2 scanning...
1015 03:16:26.018920 scan_static_bus for PCI: 00:15.2
1016 03:16:26.025292 scan_static_bus for PCI: 00:15.2 done
1017 03:16:26.028653 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1018 03:16:26.032568 PCI: 00:15.3 scanning...
1019 03:16:26.035536 scan_static_bus for PCI: 00:15.3
1020 03:16:26.039033 scan_static_bus for PCI: 00:15.3 done
1021 03:16:26.042229 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1022 03:16:26.045296 PCI: 00:19.1 scanning...
1023 03:16:26.048337 scan_static_bus for PCI: 00:19.1
1024 03:16:26.052152 I2C: 00:15 enabled
1025 03:16:26.055195 scan_static_bus for PCI: 00:19.1 done
1026 03:16:26.058374 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1027 03:16:26.061797 PCI: 00:1d.0 scanning...
1028 03:16:26.065400 do_pci_scan_bridge for PCI: 00:1d.0
1029 03:16:26.068930 PCI: pci_scan_bus for bus 01
1030 03:16:26.071945 PCI: 01:00.0 [15b7/5009] enabled
1031 03:16:26.075044 GENERIC: 0.0 enabled
1032 03:16:26.078569 Enabling Common Clock Configuration
1033 03:16:26.081545 L1 Sub-State supported from root port 29
1034 03:16:26.085234 L1 Sub-State Support = 0x5
1035 03:16:26.088587 CommonModeRestoreTime = 0x28
1036 03:16:26.091957 Power On Value = 0x16, Power On Scale = 0x0
1037 03:16:26.094794 ASPM: Enabled L1
1038 03:16:26.098268 PCIe: Max_Payload_Size adjusted to 128
1039 03:16:26.104737 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1040 03:16:26.105283 PCI: 00:1e.2 scanning...
1041 03:16:26.108244 scan_generic_bus for PCI: 00:1e.2
1042 03:16:26.111421 SPI: 00 enabled
1043 03:16:26.118582 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1044 03:16:26.121987 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1045 03:16:26.125516 PCI: 00:1e.3 scanning...
1046 03:16:26.128862 scan_generic_bus for PCI: 00:1e.3
1047 03:16:26.129398 SPI: 00 enabled
1048 03:16:26.135644 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1049 03:16:26.142020 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1050 03:16:26.142567 PCI: 00:1f.0 scanning...
1051 03:16:26.145629 scan_static_bus for PCI: 00:1f.0
1052 03:16:26.148892 PNP: 0c09.0 enabled
1053 03:16:26.152674 PNP: 0c09.0 scanning...
1054 03:16:26.155174 scan_static_bus for PNP: 0c09.0
1055 03:16:26.158792 scan_static_bus for PNP: 0c09.0 done
1056 03:16:26.162284 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1057 03:16:26.168655 scan_static_bus for PCI: 00:1f.0 done
1058 03:16:26.172115 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1059 03:16:26.175076 PCI: 00:1f.2 scanning...
1060 03:16:26.178400 scan_static_bus for PCI: 00:1f.2
1061 03:16:26.178837 GENERIC: 0.0 enabled
1062 03:16:26.181571 GENERIC: 0.0 scanning...
1063 03:16:26.185631 scan_static_bus for GENERIC: 0.0
1064 03:16:26.188585 GENERIC: 0.0 enabled
1065 03:16:26.191845 GENERIC: 1.0 enabled
1066 03:16:26.195252 scan_static_bus for GENERIC: 0.0 done
1067 03:16:26.198830 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1068 03:16:26.201576 scan_static_bus for PCI: 00:1f.2 done
1069 03:16:26.208650 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1070 03:16:26.211724 PCI: 00:1f.3 scanning...
1071 03:16:26.214827 scan_static_bus for PCI: 00:1f.3
1072 03:16:26.218074 scan_static_bus for PCI: 00:1f.3 done
1073 03:16:26.221444 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1074 03:16:26.224774 PCI: 00:1f.5 scanning...
1075 03:16:26.228169 scan_generic_bus for PCI: 00:1f.5
1076 03:16:26.231433 scan_generic_bus for PCI: 00:1f.5 done
1077 03:16:26.238005 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1078 03:16:26.242069 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1079 03:16:26.244946 scan_static_bus for Root Device done
1080 03:16:26.251598 scan_bus: bus Root Device finished in 735 msecs
1081 03:16:26.252135 done
1082 03:16:26.257743 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1083 03:16:26.261639 Chrome EC: UHEPI supported
1084 03:16:26.267969 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1085 03:16:26.270977 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1086 03:16:26.277594 SPI flash protection: WPSW=0 SRP0=1
1087 03:16:26.281303 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1088 03:16:26.287959 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1089 03:16:26.290867 found VGA at PCI: 00:02.0
1090 03:16:26.294453 Setting up VGA for PCI: 00:02.0
1091 03:16:26.297657 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1092 03:16:26.304804 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1093 03:16:26.305376 Allocating resources...
1094 03:16:26.307810 Reading resources...
1095 03:16:26.311084 Root Device read_resources bus 0 link: 0
1096 03:16:26.317566 DOMAIN: 0000 read_resources bus 0 link: 0
1097 03:16:26.321169 PCI: 00:04.0 read_resources bus 1 link: 0
1098 03:16:26.327188 PCI: 00:04.0 read_resources bus 1 link: 0 done
1099 03:16:26.330959 PCI: 00:0d.0 read_resources bus 0 link: 0
1100 03:16:26.333986 USB0 port 0 read_resources bus 0 link: 0
1101 03:16:26.341507 USB0 port 0 read_resources bus 0 link: 0 done
1102 03:16:26.344566 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1103 03:16:26.351322 PCI: 00:14.0 read_resources bus 0 link: 0
1104 03:16:26.354834 USB0 port 0 read_resources bus 0 link: 0
1105 03:16:26.361134 USB0 port 0 read_resources bus 0 link: 0 done
1106 03:16:26.364445 PCI: 00:14.0 read_resources bus 0 link: 0 done
1107 03:16:26.370920 PCI: 00:14.3 read_resources bus 0 link: 0
1108 03:16:26.374665 PCI: 00:14.3 read_resources bus 0 link: 0 done
1109 03:16:26.380914 PCI: 00:15.0 read_resources bus 0 link: 0
1110 03:16:26.384201 PCI: 00:15.0 read_resources bus 0 link: 0 done
1111 03:16:26.390786 PCI: 00:15.1 read_resources bus 0 link: 0
1112 03:16:26.394423 PCI: 00:15.1 read_resources bus 0 link: 0 done
1113 03:16:26.401738 PCI: 00:19.1 read_resources bus 0 link: 0
1114 03:16:26.404739 PCI: 00:19.1 read_resources bus 0 link: 0 done
1115 03:16:26.411488 PCI: 00:1d.0 read_resources bus 1 link: 0
1116 03:16:26.414387 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1117 03:16:26.421300 PCI: 00:1e.2 read_resources bus 2 link: 0
1118 03:16:26.424391 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1119 03:16:26.431175 PCI: 00:1e.3 read_resources bus 3 link: 0
1120 03:16:26.434560 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1121 03:16:26.441373 PCI: 00:1f.0 read_resources bus 0 link: 0
1122 03:16:26.444298 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1123 03:16:26.447827 PCI: 00:1f.2 read_resources bus 0 link: 0
1124 03:16:26.454752 GENERIC: 0.0 read_resources bus 0 link: 0
1125 03:16:26.457972 GENERIC: 0.0 read_resources bus 0 link: 0 done
1126 03:16:26.464273 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1127 03:16:26.470915 DOMAIN: 0000 read_resources bus 0 link: 0 done
1128 03:16:26.474460 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1129 03:16:26.477555 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1130 03:16:26.480869
1131 03:16:26.484427 Root Device read_resources bus 0 link: 0 done
1132 03:16:26.487701 Done reading resources.
1133 03:16:26.491235 Show resources in subtree (Root Device)...After reading.
1134 03:16:26.497591 Root Device child on link 0 DOMAIN: 0000
1135 03:16:26.500912 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1136 03:16:26.510751 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1137 03:16:26.521045 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1138 03:16:26.521654 PCI: 00:00.0
1139 03:16:26.530652 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1140 03:16:26.540820 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1141 03:16:26.550858 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1142 03:16:26.560605 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1143 03:16:26.570527 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1144 03:16:26.577293 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1145 03:16:26.587100 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1146 03:16:26.597041 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1147 03:16:26.606841 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1148 03:16:26.616768 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1149 03:16:26.623419 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1150 03:16:26.633623 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1151 03:16:26.643328 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1152 03:16:26.654066 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1153 03:16:26.663454 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1154 03:16:26.673166 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1155 03:16:26.683267 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1156 03:16:26.690066 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1157 03:16:26.699679 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1158 03:16:26.710141 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1159 03:16:26.713268 PCI: 00:02.0
1160 03:16:26.723087 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 03:16:26.733402 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1162 03:16:26.739739 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1163 03:16:26.746449 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1164 03:16:26.756126 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1165 03:16:26.756725 GENERIC: 0.0
1166 03:16:26.759323 PCI: 00:05.0
1167 03:16:26.770099 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1168 03:16:26.772976 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1169 03:16:26.775895 GENERIC: 0.0
1170 03:16:26.776367 PCI: 00:08.0
1171 03:16:26.786061 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 03:16:26.789288 PCI: 00:0a.0
1173 03:16:26.792296 PCI: 00:0d.0 child on link 0 USB0 port 0
1174 03:16:26.802481 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 03:16:26.805655 USB0 port 0 child on link 0 USB3 port 0
1176 03:16:26.809396 USB3 port 0
1177 03:16:26.812829 USB3 port 1
1178 03:16:26.813369 USB3 port 2
1179 03:16:26.815478 USB3 port 3
1180 03:16:26.819122 PCI: 00:14.0 child on link 0 USB0 port 0
1181 03:16:26.829082 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1182 03:16:26.832272 USB0 port 0 child on link 0 USB2 port 0
1183 03:16:26.835530 USB2 port 0
1184 03:16:26.836019 USB2 port 1
1185 03:16:26.838960 USB2 port 2
1186 03:16:26.839404 USB2 port 3
1187 03:16:26.842014 USB2 port 4
1188 03:16:26.842462 USB2 port 5
1189 03:16:26.845404 USB2 port 6
1190 03:16:26.848934 USB2 port 7
1191 03:16:26.849471 USB2 port 8
1192 03:16:26.852369 USB2 port 9
1193 03:16:26.852904 USB3 port 0
1194 03:16:26.855409 USB3 port 1
1195 03:16:26.855951 USB3 port 2
1196 03:16:26.858760 USB3 port 3
1197 03:16:26.859299 PCI: 00:14.2
1198 03:16:26.868880 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 03:16:26.879051 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1200 03:16:26.885354 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1201 03:16:26.895190 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1202 03:16:26.895738 GENERIC: 0.0
1203 03:16:26.898580 PCI: 00:15.0 child on link 0 I2C: 00:1a
1204 03:16:26.908838 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 03:16:26.912182 I2C: 00:1a
1206 03:16:26.912719 I2C: 00:31
1207 03:16:26.914945 I2C: 00:32
1208 03:16:26.918535 PCI: 00:15.1 child on link 0 I2C: 00:10
1209 03:16:26.928448 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 03:16:26.931677 I2C: 00:10
1211 03:16:26.932212 PCI: 00:15.2
1212 03:16:26.941544 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 03:16:26.944765 PCI: 00:15.3
1214 03:16:26.954971 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 03:16:26.955514 PCI: 00:16.0
1216 03:16:26.964959 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 03:16:26.968609 PCI: 00:19.0
1218 03:16:26.971795 PCI: 00:19.1 child on link 0 I2C: 00:15
1219 03:16:26.981183 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 03:16:26.981635 I2C: 00:15
1221 03:16:26.988564 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1222 03:16:26.995564 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1223 03:16:27.004914 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1224 03:16:27.014903 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1225 03:16:27.018131 GENERIC: 0.0
1226 03:16:27.018578 PCI: 01:00.0
1227 03:16:27.028020 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1228 03:16:27.038116 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1229 03:16:27.041130 PCI: 00:1e.0
1230 03:16:27.051553 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1231 03:16:27.054828 PCI: 00:1e.2 child on link 0 SPI: 00
1232 03:16:27.064989 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 03:16:27.068170 SPI: 00
1234 03:16:27.071214 PCI: 00:1e.3 child on link 0 SPI: 00
1235 03:16:27.080759 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 03:16:27.081213 SPI: 00
1237 03:16:27.084843 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1238 03:16:27.094341 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1239 03:16:27.097354 PNP: 0c09.0
1240 03:16:27.104299 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1241 03:16:27.110555 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1242 03:16:27.117474 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1243 03:16:27.127387 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1244 03:16:27.133795 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1245 03:16:27.134433 GENERIC: 0.0
1246 03:16:27.137427 GENERIC: 1.0
1247 03:16:27.138002 PCI: 00:1f.3
1248 03:16:27.147178 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1249 03:16:27.157745 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1250 03:16:27.160868 PCI: 00:1f.5
1251 03:16:27.170574 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1252 03:16:27.173841 CPU_CLUSTER: 0 child on link 0 APIC: 00
1253 03:16:27.174536 APIC: 00
1254 03:16:27.176610 APIC: 01
1255 03:16:27.177100 APIC: 07
1256 03:16:27.177486 APIC: 03
1257 03:16:27.180078 APIC: 04
1258 03:16:27.180541 APIC: 06
1259 03:16:27.183487 APIC: 02
1260 03:16:27.183929 APIC: 05
1261 03:16:27.189809 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1262 03:16:27.196546 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1263 03:16:27.203398 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1264 03:16:27.210137 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1265 03:16:27.213407 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1266 03:16:27.216990 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1267 03:16:27.223613 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1268 03:16:27.233450 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1269 03:16:27.239902 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1270 03:16:27.246441 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1271 03:16:27.252938 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1272 03:16:27.259759 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1273 03:16:27.266701 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1274 03:16:27.270201
1275 03:16:27.276484 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1276 03:16:27.279244 DOMAIN: 0000: Resource ranges:
1277 03:16:27.283218 * Base: 1000, Size: 800, Tag: 100
1278 03:16:27.286001 * Base: 1900, Size: e700, Tag: 100
1279 03:16:27.292766 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1280 03:16:27.299868 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1281 03:16:27.306236 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1282 03:16:27.313133 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1283 03:16:27.320013 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1284 03:16:27.330060 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1285 03:16:27.336039 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1286 03:16:27.342742 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1287 03:16:27.353077 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1288 03:16:27.359096 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1289 03:16:27.366277 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1290 03:16:27.372538 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1291 03:16:27.376121
1292 03:16:27.382144 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1293 03:16:27.389390 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1294 03:16:27.395527 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1295 03:16:27.405713 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1296 03:16:27.412367 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1297 03:16:27.419533 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1298 03:16:27.429498 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1299 03:16:27.435498 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1300 03:16:27.442171 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1301 03:16:27.451823 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1302 03:16:27.458788 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1303 03:16:27.465403 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1304 03:16:27.475985 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1305 03:16:27.478670 DOMAIN: 0000: Resource ranges:
1306 03:16:27.481578 * Base: 7fc00000, Size: 40400000, Tag: 200
1307 03:16:27.485764 * Base: d0000000, Size: 28000000, Tag: 200
1308 03:16:27.492136 * Base: fa000000, Size: 1000000, Tag: 200
1309 03:16:27.495084 * Base: fb001000, Size: 2fff000, Tag: 200
1310 03:16:27.498413 * Base: fe010000, Size: 2e000, Tag: 200
1311 03:16:27.501755 * Base: fe03f000, Size: d41000, Tag: 200
1312 03:16:27.508758 * Base: fed88000, Size: 8000, Tag: 200
1313 03:16:27.511686 * Base: fed93000, Size: d000, Tag: 200
1314 03:16:27.514893 * Base: feda2000, Size: 1e000, Tag: 200
1315 03:16:27.518445 * Base: fede0000, Size: 1220000, Tag: 200
1316 03:16:27.524916 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1317 03:16:27.531798 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1318 03:16:27.538536 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1319 03:16:27.544874 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1320 03:16:27.551908 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1321 03:16:27.558221 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1322 03:16:27.564894 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1323 03:16:27.571469 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1324 03:16:27.578686 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1325 03:16:27.584437 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1326 03:16:27.591102 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1327 03:16:27.597941 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1328 03:16:27.604704 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1329 03:16:27.611151 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1330 03:16:27.618022 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1331 03:16:27.624261 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1332 03:16:27.631247 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1333 03:16:27.638043 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1334 03:16:27.644469 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1335 03:16:27.650985 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1336 03:16:27.657470 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1337 03:16:27.664034 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1338 03:16:27.670590 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1339 03:16:27.677534 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1340 03:16:27.687333 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1341 03:16:27.690544 PCI: 00:1d.0: Resource ranges:
1342 03:16:27.694225 * Base: 7fc00000, Size: 100000, Tag: 200
1343 03:16:27.700696 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1344 03:16:27.707339 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1345 03:16:27.714038 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1346 03:16:27.724279 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1347 03:16:27.727642 Root Device assign_resources, bus 0 link: 0
1348 03:16:27.730842 DOMAIN: 0000 assign_resources, bus 0 link: 0
1349 03:16:27.740745 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1350 03:16:27.747165 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1351 03:16:27.757258 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1352 03:16:27.763742 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1353 03:16:27.770449 PCI: 00:04.0 assign_resources, bus 1 link: 0
1354 03:16:27.773870 PCI: 00:04.0 assign_resources, bus 1 link: 0
1355 03:16:27.780103 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1356 03:16:27.783610
1357 03:16:27.790009 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1358 03:16:27.796783 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1359 03:16:27.799772
1360 03:16:27.803459 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1361 03:16:27.806825 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1362 03:16:27.816355 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1363 03:16:27.820389 PCI: 00:14.0 assign_resources, bus 0 link: 0
1364 03:16:27.826508 PCI: 00:14.0 assign_resources, bus 0 link: 0
1365 03:16:27.833438 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1366 03:16:27.840026 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1367 03:16:27.849971 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1368 03:16:27.853583 PCI: 00:14.3 assign_resources, bus 0 link: 0
1369 03:16:27.859963 PCI: 00:14.3 assign_resources, bus 0 link: 0
1370 03:16:27.866254 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1371 03:16:27.872900 PCI: 00:15.0 assign_resources, bus 0 link: 0
1372 03:16:27.876379 PCI: 00:15.0 assign_resources, bus 0 link: 0
1373 03:16:27.885760 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1374 03:16:27.889206 PCI: 00:15.1 assign_resources, bus 0 link: 0
1375 03:16:27.892847 PCI: 00:15.1 assign_resources, bus 0 link: 0
1376 03:16:27.902881 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1377 03:16:27.909395 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1378 03:16:27.918751 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1379 03:16:27.925483 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1380 03:16:27.932646 PCI: 00:19.1 assign_resources, bus 0 link: 0
1381 03:16:27.935381 PCI: 00:19.1 assign_resources, bus 0 link: 0
1382 03:16:27.945690 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1383 03:16:27.955386 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1384 03:16:27.962067 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1385 03:16:27.968695 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1386 03:16:27.975249 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1387 03:16:27.985281 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1388 03:16:27.987895 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1389 03:16:27.998100 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1390 03:16:28.001802 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1391 03:16:28.005020 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1392 03:16:28.014827 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1393 03:16:28.018467 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1394 03:16:28.024885 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1395 03:16:28.028085 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1396 03:16:28.034562 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1397 03:16:28.038098 LPC: Trying to open IO window from 800 size 1ff
1398 03:16:28.048062 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1399 03:16:28.054737 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1400 03:16:28.061034 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1401 03:16:28.067955 DOMAIN: 0000 assign_resources, bus 0 link: 0
1402 03:16:28.071163 Root Device assign_resources, bus 0 link: 0
1403 03:16:28.075089 Done setting resources.
1404 03:16:28.081426 Show resources in subtree (Root Device)...After assigning values.
1405 03:16:28.084641 Root Device child on link 0 DOMAIN: 0000
1406 03:16:28.091033 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1407 03:16:28.097824 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1408 03:16:28.107974 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1409 03:16:28.110606 PCI: 00:00.0
1410 03:16:28.121317 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1411 03:16:28.131168 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1412 03:16:28.137680 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1413 03:16:28.147312 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1414 03:16:28.158025 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1415 03:16:28.167516 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1416 03:16:28.177262 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1417 03:16:28.186999 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1418 03:16:28.194012 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1419 03:16:28.203694 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1420 03:16:28.214095 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1421 03:16:28.224025 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1422 03:16:28.233750 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1423 03:16:28.240233 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1424 03:16:28.250371 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1425 03:16:28.260094 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1426 03:16:28.270274 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1427 03:16:28.280000 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1428 03:16:28.290166 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1429 03:16:28.299855 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1430 03:16:28.300385 PCI: 00:02.0
1431 03:16:28.310165 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1432 03:16:28.323170 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1433 03:16:28.329656 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1434 03:16:28.336375 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1435 03:16:28.346203 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1436 03:16:28.346797 GENERIC: 0.0
1437 03:16:28.349864 PCI: 00:05.0
1438 03:16:28.359435 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1439 03:16:28.362944 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1440 03:16:28.366560 GENERIC: 0.0
1441 03:16:28.367146 PCI: 00:08.0
1442 03:16:28.369556
1443 03:16:28.379436 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1444 03:16:28.380184 PCI: 00:0a.0
1445 03:16:28.382323 PCI: 00:0d.0 child on link 0 USB0 port 0
1446 03:16:28.395751 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1447 03:16:28.399075 USB0 port 0 child on link 0 USB3 port 0
1448 03:16:28.399673 USB3 port 0
1449 03:16:28.402185 USB3 port 1
1450 03:16:28.405737 USB3 port 2
1451 03:16:28.406343 USB3 port 3
1452 03:16:28.409067 PCI: 00:14.0 child on link 0 USB0 port 0
1453 03:16:28.422507 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1454 03:16:28.425637 USB0 port 0 child on link 0 USB2 port 0
1455 03:16:28.426261 USB2 port 0
1456 03:16:28.429029 USB2 port 1
1457 03:16:28.429611 USB2 port 2
1458 03:16:28.432422 USB2 port 3
1459 03:16:28.433007 USB2 port 4
1460 03:16:28.436110
1461 03:16:28.436692 USB2 port 5
1462 03:16:28.438734 USB2 port 6
1463 03:16:28.439215 USB2 port 7
1464 03:16:28.442546 USB2 port 8
1465 03:16:28.443136 USB2 port 9
1466 03:16:28.446132 USB3 port 0
1467 03:16:28.446715 USB3 port 1
1468 03:16:28.448852 USB3 port 2
1469 03:16:28.449346 USB3 port 3
1470 03:16:28.452124 PCI: 00:14.2
1471 03:16:28.462032 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1472 03:16:28.472126 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1473 03:16:28.475469 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1474 03:16:28.485378 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1475 03:16:28.488271
1476 03:16:28.488726 GENERIC: 0.0
1477 03:16:28.492252 PCI: 00:15.0 child on link 0 I2C: 00:1a
1478 03:16:28.501965 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1479 03:16:28.505447 I2C: 00:1a
1480 03:16:28.506035 I2C: 00:31
1481 03:16:28.508854 I2C: 00:32
1482 03:16:28.511895 PCI: 00:15.1 child on link 0 I2C: 00:10
1483 03:16:28.521762 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1484 03:16:28.525258 I2C: 00:10
1485 03:16:28.525827 PCI: 00:15.2
1486 03:16:28.535159 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1487 03:16:28.538247 PCI: 00:15.3
1488 03:16:28.548329 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1489 03:16:28.548911 PCI: 00:16.0
1490 03:16:28.562106 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1491 03:16:28.562733 PCI: 00:19.0
1492 03:16:28.564924 PCI: 00:19.1 child on link 0 I2C: 00:15
1493 03:16:28.578505 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1494 03:16:28.579103 I2C: 00:15
1495 03:16:28.581294 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1496 03:16:28.591144 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1497 03:16:28.604543 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1498 03:16:28.614398 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1499 03:16:28.614839 GENERIC: 0.0
1500 03:16:28.617912 PCI: 01:00.0
1501 03:16:28.627692 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1502 03:16:28.637961 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1503 03:16:28.641298 PCI: 00:1e.0
1504 03:16:28.651105 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1505 03:16:28.654339 PCI: 00:1e.2 child on link 0 SPI: 00
1506 03:16:28.664808 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1507 03:16:28.667745 SPI: 00
1508 03:16:28.670909 PCI: 00:1e.3 child on link 0 SPI: 00
1509 03:16:28.680634 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1510 03:16:28.681195 SPI: 00
1511 03:16:28.687629 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1512 03:16:28.694525 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1513 03:16:28.697734 PNP: 0c09.0
1514 03:16:28.704427 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1515 03:16:28.707384
1516 03:16:28.710543 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1517 03:16:28.720847 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1518 03:16:28.727153 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1519 03:16:28.734248 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1520 03:16:28.734828 GENERIC: 0.0
1521 03:16:28.737532 GENERIC: 1.0
1522 03:16:28.738101 PCI: 00:1f.3
1523 03:16:28.740310
1524 03:16:28.750714 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1525 03:16:28.760559 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1526 03:16:28.761137 PCI: 00:1f.5
1527 03:16:28.770108 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1528 03:16:28.777135 CPU_CLUSTER: 0 child on link 0 APIC: 00
1529 03:16:28.777697 APIC: 00
1530 03:16:28.778109 APIC: 01
1531 03:16:28.779905 APIC: 07
1532 03:16:28.780383 APIC: 03
1533 03:16:28.783309 APIC: 04
1534 03:16:28.783749 APIC: 06
1535 03:16:28.784086 APIC: 02
1536 03:16:28.786964 APIC: 05
1537 03:16:28.790203 Done allocating resources.
1538 03:16:28.793508 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1539 03:16:28.801208 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1540 03:16:28.803848 Configure GPIOs for I2S audio on UP4.
1541 03:16:28.811620 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1542 03:16:28.814693 Enabling resources...
1543 03:16:28.817704 PCI: 00:00.0 subsystem <- 8086/9a12
1544 03:16:28.820906 PCI: 00:00.0 cmd <- 06
1545 03:16:28.824640 PCI: 00:02.0 subsystem <- 8086/9a40
1546 03:16:28.827702 PCI: 00:02.0 cmd <- 03
1547 03:16:28.831192 PCI: 00:04.0 subsystem <- 8086/9a03
1548 03:16:28.834642 PCI: 00:04.0 cmd <- 02
1549 03:16:28.837721 PCI: 00:05.0 subsystem <- 8086/9a19
1550 03:16:28.838297 PCI: 00:05.0 cmd <- 02
1551 03:16:28.844320 PCI: 00:08.0 subsystem <- 8086/9a11
1552 03:16:28.844984 PCI: 00:08.0 cmd <- 06
1553 03:16:28.847885 PCI: 00:0d.0 subsystem <- 8086/9a13
1554 03:16:28.850770 PCI: 00:0d.0 cmd <- 02
1555 03:16:28.854427 PCI: 00:14.0 subsystem <- 8086/a0ed
1556 03:16:28.857848 PCI: 00:14.0 cmd <- 02
1557 03:16:28.861269 PCI: 00:14.2 subsystem <- 8086/a0ef
1558 03:16:28.864321 PCI: 00:14.2 cmd <- 02
1559 03:16:28.867441 PCI: 00:14.3 subsystem <- 8086/a0f0
1560 03:16:28.870608 PCI: 00:14.3 cmd <- 02
1561 03:16:28.874109 PCI: 00:15.0 subsystem <- 8086/a0e8
1562 03:16:28.877079 PCI: 00:15.0 cmd <- 02
1563 03:16:28.880844 PCI: 00:15.1 subsystem <- 8086/a0e9
1564 03:16:28.883734 PCI: 00:15.1 cmd <- 02
1565 03:16:28.886707 PCI: 00:15.2 subsystem <- 8086/a0ea
1566 03:16:28.887221 PCI: 00:15.2 cmd <- 02
1567 03:16:28.893858 PCI: 00:15.3 subsystem <- 8086/a0eb
1568 03:16:28.894334 PCI: 00:15.3 cmd <- 02
1569 03:16:28.897257 PCI: 00:16.0 subsystem <- 8086/a0e0
1570 03:16:28.900934 PCI: 00:16.0 cmd <- 02
1571 03:16:28.903687 PCI: 00:19.1 subsystem <- 8086/a0c6
1572 03:16:28.907090 PCI: 00:19.1 cmd <- 02
1573 03:16:28.910420 PCI: 00:1d.0 bridge ctrl <- 0013
1574 03:16:28.914140 PCI: 00:1d.0 subsystem <- 8086/a0b0
1575 03:16:28.917012 PCI: 00:1d.0 cmd <- 06
1576 03:16:28.919910 PCI: 00:1e.0 subsystem <- 8086/a0a8
1577 03:16:28.923818 PCI: 00:1e.0 cmd <- 06
1578 03:16:28.926797 PCI: 00:1e.2 subsystem <- 8086/a0aa
1579 03:16:28.930298 PCI: 00:1e.2 cmd <- 06
1580 03:16:28.933095 PCI: 00:1e.3 subsystem <- 8086/a0ab
1581 03:16:28.937106 PCI: 00:1e.3 cmd <- 02
1582 03:16:28.940087 PCI: 00:1f.0 subsystem <- 8086/a087
1583 03:16:28.940634 PCI: 00:1f.0 cmd <- 407
1584 03:16:28.946608 PCI: 00:1f.3 subsystem <- 8086/a0c8
1585 03:16:28.947144 PCI: 00:1f.3 cmd <- 02
1586 03:16:28.950038 PCI: 00:1f.5 subsystem <- 8086/a0a4
1587 03:16:28.953671 PCI: 00:1f.5 cmd <- 406
1588 03:16:28.958509 PCI: 01:00.0 cmd <- 02
1589 03:16:28.963102 done.
1590 03:16:28.966325 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1591 03:16:28.969969 Initializing devices...
1592 03:16:28.972833 Root Device init
1593 03:16:28.975842 Chrome EC: Set SMI mask to 0x0000000000000000
1594 03:16:28.982535 Chrome EC: clear events_b mask to 0x0000000000000000
1595 03:16:28.989409 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1596 03:16:28.996211 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1597 03:16:29.002239 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1598 03:16:29.005744 Chrome EC: Set WAKE mask to 0x0000000000000000
1599 03:16:29.014120 fw_config match found: DB_USB=USB3_ACTIVE
1600 03:16:29.017330 Configure Right Type-C port orientation for retimer
1601 03:16:29.020963 Root Device init finished in 46 msecs
1602 03:16:29.024482 PCI: 00:00.0 init
1603 03:16:29.027631 CPU TDP = 9 Watts
1604 03:16:29.028149 CPU PL1 = 9 Watts
1605 03:16:29.031056 CPU PL2 = 40 Watts
1606 03:16:29.034607 CPU PL4 = 83 Watts
1607 03:16:29.037627 PCI: 00:00.0 init finished in 8 msecs
1608 03:16:29.038101 PCI: 00:02.0 init
1609 03:16:29.041014 GMA: Found VBT in CBFS
1610 03:16:29.044523 GMA: Found valid VBT in CBFS
1611 03:16:29.050806 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1612 03:16:29.057749 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1613 03:16:29.060928 PCI: 00:02.0 init finished in 18 msecs
1614 03:16:29.064193 PCI: 00:05.0 init
1615 03:16:29.067555 PCI: 00:05.0 init finished in 0 msecs
1616 03:16:29.070848 PCI: 00:08.0 init
1617 03:16:29.074026 PCI: 00:08.0 init finished in 0 msecs
1618 03:16:29.077258 PCI: 00:14.0 init
1619 03:16:29.080986 PCI: 00:14.0 init finished in 0 msecs
1620 03:16:29.083987 PCI: 00:14.2 init
1621 03:16:29.087203 PCI: 00:14.2 init finished in 0 msecs
1622 03:16:29.090847 PCI: 00:15.0 init
1623 03:16:29.091366 I2C bus 0 version 0x3230302a
1624 03:16:29.094014
1625 03:16:29.096936 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1626 03:16:29.100488 PCI: 00:15.0 init finished in 6 msecs
1627 03:16:29.100932 PCI: 00:15.1 init
1628 03:16:29.103947 I2C bus 1 version 0x3230302a
1629 03:16:29.107208 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1630 03:16:29.113996 PCI: 00:15.1 init finished in 6 msecs
1631 03:16:29.114533 PCI: 00:15.2 init
1632 03:16:29.117480 I2C bus 2 version 0x3230302a
1633 03:16:29.120878 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1634 03:16:29.123244 PCI: 00:15.2 init finished in 6 msecs
1635 03:16:29.127178 PCI: 00:15.3 init
1636 03:16:29.130809 I2C bus 3 version 0x3230302a
1637 03:16:29.134001 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1638 03:16:29.137177 PCI: 00:15.3 init finished in 6 msecs
1639 03:16:29.140721 PCI: 00:16.0 init
1640 03:16:29.143739 PCI: 00:16.0 init finished in 0 msecs
1641 03:16:29.146707 PCI: 00:19.1 init
1642 03:16:29.150432 I2C bus 5 version 0x3230302a
1643 03:16:29.154032 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1644 03:16:29.156777 PCI: 00:19.1 init finished in 6 msecs
1645 03:16:29.160371 PCI: 00:1d.0 init
1646 03:16:29.160957 Initializing PCH PCIe bridge.
1647 03:16:29.167550 PCI: 00:1d.0 init finished in 3 msecs
1648 03:16:29.170211 PCI: 00:1f.0 init
1649 03:16:29.173707 IOAPIC: Initializing IOAPIC at 0xfec00000
1650 03:16:29.176649 IOAPIC: Bootstrap Processor Local APIC = 0x00
1651 03:16:29.180022 IOAPIC: ID = 0x02
1652 03:16:29.183764 IOAPIC: Dumping registers
1653 03:16:29.184219 reg 0x0000: 0x02000000
1654 03:16:29.186557 reg 0x0001: 0x00770020
1655 03:16:29.189896 reg 0x0002: 0x00000000
1656 03:16:29.192950 PCI: 00:1f.0 init finished in 21 msecs
1657 03:16:29.196686 PCI: 00:1f.2 init
1658 03:16:29.200276 Disabling ACPI via APMC.
1659 03:16:29.203239 APMC done.
1660 03:16:29.207254 PCI: 00:1f.2 init finished in 6 msecs
1661 03:16:29.217601 PCI: 01:00.0 init
1662 03:16:29.220604 PCI: 01:00.0 init finished in 0 msecs
1663 03:16:29.224161 PNP: 0c09.0 init
1664 03:16:29.227266 Google Chrome EC uptime: 8.267 seconds
1665 03:16:29.234362 Google Chrome AP resets since EC boot: 1
1666 03:16:29.237330 Google Chrome most recent AP reset causes:
1667 03:16:29.240343 0.451: 32775 shutdown: entering G3
1668 03:16:29.247079 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1669 03:16:29.250285 PNP: 0c09.0 init finished in 22 msecs
1670 03:16:29.256309 Devices initialized
1671 03:16:29.259199 Show all devs... After init.
1672 03:16:29.262270 Root Device: enabled 1
1673 03:16:29.262709 DOMAIN: 0000: enabled 1
1674 03:16:29.265821 CPU_CLUSTER: 0: enabled 1
1675 03:16:29.268882 PCI: 00:00.0: enabled 1
1676 03:16:29.272478 PCI: 00:02.0: enabled 1
1677 03:16:29.273018 PCI: 00:04.0: enabled 1
1678 03:16:29.275725 PCI: 00:05.0: enabled 1
1679 03:16:29.279389 PCI: 00:06.0: enabled 0
1680 03:16:29.282914 PCI: 00:07.0: enabled 0
1681 03:16:29.283448 PCI: 00:07.1: enabled 0
1682 03:16:29.285770 PCI: 00:07.2: enabled 0
1683 03:16:29.288938 PCI: 00:07.3: enabled 0
1684 03:16:29.292238 PCI: 00:08.0: enabled 1
1685 03:16:29.292675 PCI: 00:09.0: enabled 0
1686 03:16:29.295708 PCI: 00:0a.0: enabled 0
1687 03:16:29.298984 PCI: 00:0d.0: enabled 1
1688 03:16:29.299421 PCI: 00:0d.1: enabled 0
1689 03:16:29.302317
1690 03:16:29.302761 PCI: 00:0d.2: enabled 0
1691 03:16:29.305359 PCI: 00:0d.3: enabled 0
1692 03:16:29.309045 PCI: 00:0e.0: enabled 0
1693 03:16:29.309596 PCI: 00:10.2: enabled 1
1694 03:16:29.312331 PCI: 00:10.6: enabled 0
1695 03:16:29.316075 PCI: 00:10.7: enabled 0
1696 03:16:29.318683 PCI: 00:12.0: enabled 0
1697 03:16:29.319127 PCI: 00:12.6: enabled 0
1698 03:16:29.322357 PCI: 00:13.0: enabled 0
1699 03:16:29.325895 PCI: 00:14.0: enabled 1
1700 03:16:29.328864 PCI: 00:14.1: enabled 0
1701 03:16:29.329304 PCI: 00:14.2: enabled 1
1702 03:16:29.332612 PCI: 00:14.3: enabled 1
1703 03:16:29.335616 PCI: 00:15.0: enabled 1
1704 03:16:29.338911 PCI: 00:15.1: enabled 1
1705 03:16:29.339455 PCI: 00:15.2: enabled 1
1706 03:16:29.342336 PCI: 00:15.3: enabled 1
1707 03:16:29.345670 PCI: 00:16.0: enabled 1
1708 03:16:29.346247 PCI: 00:16.1: enabled 0
1709 03:16:29.348793 PCI: 00:16.2: enabled 0
1710 03:16:29.352581 PCI: 00:16.3: enabled 0
1711 03:16:29.355443 PCI: 00:16.4: enabled 0
1712 03:16:29.355886 PCI: 00:16.5: enabled 0
1713 03:16:29.358842 PCI: 00:17.0: enabled 0
1714 03:16:29.362343 PCI: 00:19.0: enabled 0
1715 03:16:29.365205 PCI: 00:19.1: enabled 1
1716 03:16:29.365650 PCI: 00:19.2: enabled 0
1717 03:16:29.368931 PCI: 00:1c.0: enabled 1
1718 03:16:29.372167 PCI: 00:1c.1: enabled 0
1719 03:16:29.375546 PCI: 00:1c.2: enabled 0
1720 03:16:29.376082 PCI: 00:1c.3: enabled 0
1721 03:16:29.378814 PCI: 00:1c.4: enabled 0
1722 03:16:29.382151 PCI: 00:1c.5: enabled 0
1723 03:16:29.382736 PCI: 00:1c.6: enabled 1
1724 03:16:29.385322
1725 03:16:29.385813 PCI: 00:1c.7: enabled 0
1726 03:16:29.388596 PCI: 00:1d.0: enabled 1
1727 03:16:29.391733 PCI: 00:1d.1: enabled 0
1728 03:16:29.392189 PCI: 00:1d.2: enabled 1
1729 03:16:29.395201 PCI: 00:1d.3: enabled 0
1730 03:16:29.398253 PCI: 00:1e.0: enabled 1
1731 03:16:29.402103 PCI: 00:1e.1: enabled 0
1732 03:16:29.402563 PCI: 00:1e.2: enabled 1
1733 03:16:29.405326 PCI: 00:1e.3: enabled 1
1734 03:16:29.408429 PCI: 00:1f.0: enabled 1
1735 03:16:29.411698 PCI: 00:1f.1: enabled 0
1736 03:16:29.412195 PCI: 00:1f.2: enabled 1
1737 03:16:29.415602 PCI: 00:1f.3: enabled 1
1738 03:16:29.418694 PCI: 00:1f.4: enabled 0
1739 03:16:29.422027 PCI: 00:1f.5: enabled 1
1740 03:16:29.422466 PCI: 00:1f.6: enabled 0
1741 03:16:29.425729 PCI: 00:1f.7: enabled 0
1742 03:16:29.428532 APIC: 00: enabled 1
1743 03:16:29.428971 GENERIC: 0.0: enabled 1
1744 03:16:29.432181 GENERIC: 0.0: enabled 1
1745 03:16:29.434970 GENERIC: 1.0: enabled 1
1746 03:16:29.438861 GENERIC: 0.0: enabled 1
1747 03:16:29.439400 GENERIC: 1.0: enabled 1
1748 03:16:29.441803 USB0 port 0: enabled 1
1749 03:16:29.445078 GENERIC: 0.0: enabled 1
1750 03:16:29.445617 USB0 port 0: enabled 1
1751 03:16:29.448401 GENERIC: 0.0: enabled 1
1752 03:16:29.451790 I2C: 00:1a: enabled 1
1753 03:16:29.455204 I2C: 00:31: enabled 1
1754 03:16:29.455743 I2C: 00:32: enabled 1
1755 03:16:29.458183 I2C: 00:10: enabled 1
1756 03:16:29.461596 I2C: 00:15: enabled 1
1757 03:16:29.462184 GENERIC: 0.0: enabled 0
1758 03:16:29.464891 GENERIC: 1.0: enabled 0
1759 03:16:29.468610 GENERIC: 0.0: enabled 1
1760 03:16:29.469142 SPI: 00: enabled 1
1761 03:16:29.471913 SPI: 00: enabled 1
1762 03:16:29.475096 PNP: 0c09.0: enabled 1
1763 03:16:29.475734 GENERIC: 0.0: enabled 1
1764 03:16:29.478471 USB3 port 0: enabled 1
1765 03:16:29.481642 USB3 port 1: enabled 1
1766 03:16:29.482221 USB3 port 2: enabled 0
1767 03:16:29.484947
1768 03:16:29.485386 USB3 port 3: enabled 0
1769 03:16:29.488461 USB2 port 0: enabled 0
1770 03:16:29.491505 USB2 port 1: enabled 1
1771 03:16:29.491950 USB2 port 2: enabled 1
1772 03:16:29.494737 USB2 port 3: enabled 0
1773 03:16:29.497888 USB2 port 4: enabled 1
1774 03:16:29.498473 USB2 port 5: enabled 0
1775 03:16:29.501285 USB2 port 6: enabled 0
1776 03:16:29.504746 USB2 port 7: enabled 0
1777 03:16:29.508035 USB2 port 8: enabled 0
1778 03:16:29.508472 USB2 port 9: enabled 0
1779 03:16:29.511381 USB3 port 0: enabled 0
1780 03:16:29.514948 USB3 port 1: enabled 1
1781 03:16:29.515509 USB3 port 2: enabled 0
1782 03:16:29.518784 USB3 port 3: enabled 0
1783 03:16:29.521065 GENERIC: 0.0: enabled 1
1784 03:16:29.524897 GENERIC: 1.0: enabled 1
1785 03:16:29.525431 APIC: 01: enabled 1
1786 03:16:29.528150 APIC: 07: enabled 1
1787 03:16:29.528687 APIC: 03: enabled 1
1788 03:16:29.531245 APIC: 04: enabled 1
1789 03:16:29.534760 APIC: 06: enabled 1
1790 03:16:29.535302 APIC: 02: enabled 1
1791 03:16:29.537889 APIC: 05: enabled 1
1792 03:16:29.541183 PCI: 01:00.0: enabled 1
1793 03:16:29.544427 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1794 03:16:29.551140 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1795 03:16:29.554153 ELOG: NV offset 0xf30000 size 0x1000
1796 03:16:29.561212 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1797 03:16:29.567839 ELOG: Event(17) added with size 13 at 2023-01-19 03:16:29 UTC
1798 03:16:29.574127 ELOG: Event(92) added with size 9 at 2023-01-19 03:16:29 UTC
1799 03:16:29.580830 ELOG: Event(93) added with size 9 at 2023-01-19 03:16:29 UTC
1800 03:16:29.587407 ELOG: Event(9E) added with size 10 at 2023-01-19 03:16:29 UTC
1801 03:16:29.593760 ELOG: Event(9F) added with size 14 at 2023-01-19 03:16:29 UTC
1802 03:16:29.601083 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1803 03:16:29.607298 ELOG: Event(A1) added with size 10 at 2023-01-19 03:16:29 UTC
1804 03:16:29.613871 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1805 03:16:29.620150 ELOG: Event(A0) added with size 9 at 2023-01-19 03:16:29 UTC
1806 03:16:29.623632 elog_add_boot_reason: Logged dev mode boot
1807 03:16:29.630669 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1808 03:16:29.631261 Finalize devices...
1809 03:16:29.633803 Devices finalized
1810 03:16:29.640201 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1811 03:16:29.643550 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1812 03:16:29.650344 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1813 03:16:29.653642 ME: HFSTS1 : 0x80030055
1814 03:16:29.660233 ME: HFSTS2 : 0x30280116
1815 03:16:29.663568 ME: HFSTS3 : 0x00000050
1816 03:16:29.666476 ME: HFSTS4 : 0x00004000
1817 03:16:29.673474 ME: HFSTS5 : 0x00000000
1818 03:16:29.676662 ME: HFSTS6 : 0x40400006
1819 03:16:29.679954 ME: Manufacturing Mode : YES
1820 03:16:29.682988 ME: SPI Protection Mode Enabled : NO
1821 03:16:29.690059 ME: FW Partition Table : OK
1822 03:16:29.693170 ME: Bringup Loader Failure : NO
1823 03:16:29.696531 ME: Firmware Init Complete : NO
1824 03:16:29.699589 ME: Boot Options Present : NO
1825 03:16:29.703126 ME: Update In Progress : NO
1826 03:16:29.706108 ME: D0i3 Support : YES
1827 03:16:29.710209 ME: Low Power State Enabled : NO
1828 03:16:29.713095 ME: CPU Replaced : YES
1829 03:16:29.719894 ME: CPU Replacement Valid : YES
1830 03:16:29.722773 ME: Current Working State : 5
1831 03:16:29.726409 ME: Current Operation State : 1
1832 03:16:29.729781 ME: Current Operation Mode : 3
1833 03:16:29.733295 ME: Error Code : 0
1834 03:16:29.736740 ME: Enhanced Debug Mode : NO
1835 03:16:29.739433 ME: CPU Debug Disabled : YES
1836 03:16:29.743211 ME: TXT Support : NO
1837 03:16:29.749822 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1838 03:16:29.756019 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1839 03:16:29.759454 CBFS: 'fallback/slic' not found.
1840 03:16:29.766048 ACPI: Writing ACPI tables at 76b01000.
1841 03:16:29.766582 ACPI: * FACS
1842 03:16:29.769493 ACPI: * DSDT
1843 03:16:29.772863 Ramoops buffer: 0x100000@0x76a00000.
1844 03:16:29.776367 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1845 03:16:29.782873 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1846 03:16:29.785691 Google Chrome EC: version:
1847 03:16:29.789222 ro: voema_v2.0.10114-a447f03e46
1848 03:16:29.792193 rw: voema_v2.0.10114-a447f03e46
1849 03:16:29.792633 running image: 2
1850 03:16:29.799061 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1851 03:16:29.803694 ACPI: * FADT
1852 03:16:29.804245 SCI is IRQ9
1853 03:16:29.806810 ACPI: added table 1/32, length now 40
1854 03:16:29.810516
1855 03:16:29.810960 ACPI: * SSDT
1856 03:16:29.813960 Found 1 CPU(s) with 8 core(s) each.
1857 03:16:29.820134 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1858 03:16:29.823591 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1859 03:16:29.827349 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1860 03:16:29.830149 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1861 03:16:29.837283 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1862 03:16:29.843568 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1863 03:16:29.846684 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1864 03:16:29.853738 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1865 03:16:29.860116 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1866 03:16:29.863603 \_SB.PCI0.RP09: Added StorageD3Enable property
1867 03:16:29.870066 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1868 03:16:29.873006 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1869 03:16:29.880091 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1870 03:16:29.882875 PS2K: Passing 80 keymaps to kernel
1871 03:16:29.890167 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1872 03:16:29.896568 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1873 03:16:29.903049 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1874 03:16:29.910056 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1875 03:16:29.916346 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1876 03:16:29.922900 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1877 03:16:29.929794 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1878 03:16:29.936716 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1879 03:16:29.939723 ACPI: added table 2/32, length now 44
1880 03:16:29.940273 ACPI: * MCFG
1881 03:16:29.942807 ACPI: added table 3/32, length now 48
1882 03:16:29.946501 ACPI: * TPM2
1883 03:16:29.949189 TPM2 log created at 0x769f0000
1884 03:16:29.952860 ACPI: added table 4/32, length now 52
1885 03:16:29.953419 ACPI: * MADT
1886 03:16:29.955790
1887 03:16:29.956238 SCI is IRQ9
1888 03:16:29.960088 ACPI: added table 5/32, length now 56
1889 03:16:29.962617 current = 76b09850
1890 03:16:29.963066 ACPI: * DMAR
1891 03:16:29.966095 ACPI: added table 6/32, length now 60
1892 03:16:29.969439 ACPI: added table 7/32, length now 64
1893 03:16:29.972496 ACPI: * HPET
1894 03:16:29.975970 ACPI: added table 8/32, length now 68
1895 03:16:29.976524 ACPI: done.
1896 03:16:29.979299 ACPI tables: 35216 bytes.
1897 03:16:29.982614 smbios_write_tables: 769ef000
1898 03:16:29.985538 EC returned error result code 3
1899 03:16:29.989075 Couldn't obtain OEM name from CBI
1900 03:16:29.992130 Create SMBIOS type 16
1901 03:16:29.995606 Create SMBIOS type 17
1902 03:16:29.999089 GENERIC: 0.0 (WIFI Device)
1903 03:16:29.999558 SMBIOS tables: 1734 bytes.
1904 03:16:30.002414
1905 03:16:30.005766 Writing table forward entry at 0x00000500
1906 03:16:30.012716 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1907 03:16:30.015690 Writing coreboot table at 0x76b25000
1908 03:16:30.022723 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1909 03:16:30.025388 1. 0000000000001000-000000000009ffff: RAM
1910 03:16:30.028887 2. 00000000000a0000-00000000000fffff: RESERVED
1911 03:16:30.035955 3. 0000000000100000-00000000769eefff: RAM
1912 03:16:30.038927 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1913 03:16:30.045720 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1914 03:16:30.052245 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1915 03:16:30.055299 7. 0000000077000000-000000007fbfffff: RESERVED
1916 03:16:30.058704 8. 00000000c0000000-00000000cfffffff: RESERVED
1917 03:16:30.061963
1918 03:16:30.065347 9. 00000000f8000000-00000000f9ffffff: RESERVED
1919 03:16:30.068773 10. 00000000fb000000-00000000fb000fff: RESERVED
1920 03:16:30.075053 11. 00000000fe000000-00000000fe00ffff: RESERVED
1921 03:16:30.078330 12. 00000000fed80000-00000000fed87fff: RESERVED
1922 03:16:30.085484 13. 00000000fed90000-00000000fed92fff: RESERVED
1923 03:16:30.088184 14. 00000000feda0000-00000000feda1fff: RESERVED
1924 03:16:30.095157 15. 00000000fedc0000-00000000feddffff: RESERVED
1925 03:16:30.098830 16. 0000000100000000-00000004803fffff: RAM
1926 03:16:30.102512 Passing 4 GPIOs to payload:
1927 03:16:30.105239 NAME | PORT | POLARITY | VALUE
1928 03:16:30.111939 lid | undefined | high | high
1929 03:16:30.115518 power | undefined | high | low
1930 03:16:30.118366
1931 03:16:30.121878 oprom | undefined | high | low
1932 03:16:30.128527 EC in RW | 0x000000e5 | high | high
1933 03:16:30.135334 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1934 03:16:30.135876 coreboot table: 1576 bytes.
1935 03:16:30.142072 IMD ROOT 0. 0x76fff000 0x00001000
1936 03:16:30.144933 IMD SMALL 1. 0x76ffe000 0x00001000
1937 03:16:30.148244 FSP MEMORY 2. 0x76c4e000 0x003b0000
1938 03:16:30.151621 VPD 3. 0x76c4d000 0x00000367
1939 03:16:30.154893 RO MCACHE 4. 0x76c4c000 0x00000fdc
1940 03:16:30.158405 CONSOLE 5. 0x76c2c000 0x00020000
1941 03:16:30.161228 FMAP 6. 0x76c2b000 0x00000578
1942 03:16:30.168248 TIME STAMP 7. 0x76c2a000 0x00000910
1943 03:16:30.171120 VBOOT WORK 8. 0x76c16000 0x00014000
1944 03:16:30.174968 ROMSTG STCK 9. 0x76c15000 0x00001000
1945 03:16:30.177981 AFTER CAR 10. 0x76c0a000 0x0000b000
1946 03:16:30.181209 RAMSTAGE 11. 0x76b97000 0x00073000
1947 03:16:30.184539 REFCODE 12. 0x76b42000 0x00055000
1948 03:16:30.188260 SMM BACKUP 13. 0x76b32000 0x00010000
1949 03:16:30.190845 4f444749 14. 0x76b30000 0x00002000
1950 03:16:30.194788 EXT VBT15. 0x76b2d000 0x0000219f
1951 03:16:30.197645 COREBOOT 16. 0x76b25000 0x00008000
1952 03:16:30.201187
1953 03:16:30.204323 ACPI 17. 0x76b01000 0x00024000
1954 03:16:30.207872 ACPI GNVS 18. 0x76b00000 0x00001000
1955 03:16:30.211340 RAMOOPS 19. 0x76a00000 0x00100000
1956 03:16:30.214452 TPM2 TCGLOG20. 0x769f0000 0x00010000
1957 03:16:30.217508 SMBIOS 21. 0x769ef000 0x00000800
1958 03:16:30.220944 IMD small region:
1959 03:16:30.224380 IMD ROOT 0. 0x76ffec00 0x00000400
1960 03:16:30.227838 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1961 03:16:30.230550 POWER STATE 2. 0x76ffeb80 0x00000044
1962 03:16:30.234387 ROMSTAGE 3. 0x76ffeb60 0x00000004
1963 03:16:30.240433 MEM INFO 4. 0x76ffe980 0x000001e0
1964 03:16:30.244263 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1965 03:16:30.247581 MTRR: Physical address space:
1966 03:16:30.253784 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1967 03:16:30.260670 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1968 03:16:30.266797 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1969 03:16:30.273648 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1970 03:16:30.280357 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1971 03:16:30.286685 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1972 03:16:30.293276 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1973 03:16:30.297069 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 03:16:30.300048 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 03:16:30.303788 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 03:16:30.307041 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 03:16:30.313713 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 03:16:30.316555 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 03:16:30.320080 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 03:16:30.323414 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 03:16:30.330126 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 03:16:30.333842 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 03:16:30.336353 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 03:16:30.340866 call enable_fixed_mtrr()
1985 03:16:30.344530 CPU physical address size: 39 bits
1986 03:16:30.351019 MTRR: default type WB/UC MTRR counts: 6/7.
1987 03:16:30.354388 MTRR: WB selected as default type.
1988 03:16:30.361384 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1989 03:16:30.364417 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1990 03:16:30.370736 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1991 03:16:30.377276 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1992 03:16:30.383673 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1993 03:16:30.390369 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1994 03:16:30.394593
1995 03:16:30.394707 MTRR check
1996 03:16:30.397929 Fixed MTRRs : Enabled
1997 03:16:30.398031 Variable MTRRs: Enabled
1998 03:16:30.398107
1999 03:16:30.404849 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 03:16:30.407656 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 03:16:30.411428 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 03:16:30.414531 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 03:16:30.421006 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 03:16:30.424661 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 03:16:30.427743 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 03:16:30.431126 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 03:16:30.437691 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 03:16:30.440937 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 03:16:30.444515 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 03:16:30.452069 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 03:16:30.452180 call enable_fixed_mtrr()
2012 03:16:30.458634 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 03:16:30.461746 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 03:16:30.465254 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 03:16:30.468280 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 03:16:30.475211 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 03:16:30.478374 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 03:16:30.481736 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 03:16:30.484722 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 03:16:30.491806 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 03:16:30.494791 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 03:16:30.498164 CPU physical address size: 39 bits
2023 03:16:30.504470 call enable_fixed_mtrr()
2024 03:16:30.508271 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 03:16:30.511281 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 03:16:30.517931 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2027 03:16:30.521261 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 03:16:30.524785 Checking cr50 for pending updates
2029 03:16:30.528127 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 03:16:30.535108 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 03:16:30.538611 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 03:16:30.541955 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 03:16:30.545231 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 03:16:30.551762 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 03:16:30.554981 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 03:16:30.558675 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 03:16:30.561933 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 03:16:30.568357 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 03:16:30.571687 CPU physical address size: 39 bits
2040 03:16:30.571832 call enable_fixed_mtrr()
2041 03:16:30.578049 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 03:16:30.581697 CPU physical address size: 39 bits
2043 03:16:30.588361 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 03:16:30.591474 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 03:16:30.594717 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 03:16:30.597978 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 03:16:30.604657 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 03:16:30.607844 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 03:16:30.611418 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 03:16:30.614977 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 03:16:30.617756 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 03:16:30.620987
2053 03:16:30.624166 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 03:16:30.628269 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 03:16:30.630998 MTRR: Fixed MSR 0x259 0x0000000000000000
2056 03:16:30.634313 MTRR: Fixed MSR 0x268 0x0606060606060606
2057 03:16:30.641245 MTRR: Fixed MSR 0x269 0x0606060606060606
2058 03:16:30.644193 MTRR: Fixed MSR 0x26a 0x0606060606060606
2059 03:16:30.647695 MTRR: Fixed MSR 0x26b 0x0606060606060606
2060 03:16:30.650685 MTRR: Fixed MSR 0x26c 0x0606060606060606
2061 03:16:30.658037 MTRR: Fixed MSR 0x26d 0x0606060606060606
2062 03:16:30.661210 MTRR: Fixed MSR 0x26e 0x0606060606060606
2063 03:16:30.664170 MTRR: Fixed MSR 0x26f 0x0606060606060606
2064 03:16:30.672211 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 03:16:30.672334 call enable_fixed_mtrr()
2066 03:16:30.678409 MTRR: Fixed MSR 0x258 0x0606060606060606
2067 03:16:30.681826 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 03:16:30.685302 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 03:16:30.688573 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 03:16:30.695052 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 03:16:30.698318 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 03:16:30.701947 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 03:16:30.705358 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 03:16:30.711552 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 03:16:30.715087 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 03:16:30.718710 CPU physical address size: 39 bits
2077 03:16:30.725229 call enable_fixed_mtrr()
2078 03:16:30.728261 MTRR: Fixed MSR 0x258 0x0606060606060606
2079 03:16:30.731405 Reading cr50 TPM mode
2080 03:16:30.735881 call enable_fixed_mtrr()
2081 03:16:30.735998 CPU physical address size: 39 bits
2082 03:16:30.741909 CPU physical address size: 39 bits
2083 03:16:30.745316 BS: BS_PAYLOAD_LOAD entry times (exec / console): 211 / 6 ms
2084 03:16:30.751884 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 03:16:30.758621 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2086 03:16:30.762227 MTRR: Fixed MSR 0x268 0x0606060606060606
2087 03:16:30.765291 MTRR: Fixed MSR 0x269 0x0606060606060606
2088 03:16:30.771984 MTRR: Fixed MSR 0x26a 0x0606060606060606
2089 03:16:30.775199 MTRR: Fixed MSR 0x26b 0x0606060606060606
2090 03:16:30.779058 MTRR: Fixed MSR 0x26c 0x0606060606060606
2091 03:16:30.782201 MTRR: Fixed MSR 0x26d 0x0606060606060606
2092 03:16:30.785434 MTRR: Fixed MSR 0x26e 0x0606060606060606
2093 03:16:30.788454
2094 03:16:30.792151 MTRR: Fixed MSR 0x26f 0x0606060606060606
2095 03:16:30.798523 Checking segment from ROM address 0xffc02b38
2096 03:16:30.802011 call enable_fixed_mtrr()
2097 03:16:30.805634 Checking segment from ROM address 0xffc02b54
2098 03:16:30.809071 CPU physical address size: 39 bits
2099 03:16:30.816207 Loading segment from ROM address 0xffc02b38
2100 03:16:30.816383 code (compression=0)
2101 03:16:30.825868 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2102 03:16:30.836090 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2103 03:16:30.836311 it's not compressed!
2104 03:16:30.986435 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2105 03:16:30.993227 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2106 03:16:30.999849 Loading segment from ROM address 0xffc02b54
2107 03:16:31.003158 Entry Point 0x30000000
2108 03:16:31.003654 Loaded segments
2109 03:16:31.010071 BS: BS_PAYLOAD_LOAD run times (exec / console): 189 / 67 ms
2110 03:16:31.055499 Finalizing chipset.
2111 03:16:31.058601 Finalizing SMM.
2112 03:16:31.059110 APMC done.
2113 03:16:31.065298 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2114 03:16:31.068331 mp_park_aps done after 0 msecs.
2115 03:16:31.071634 Jumping to boot code at 0x30000000(0x76b25000)
2116 03:16:31.081800 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2117 03:16:31.082416
2118 03:16:31.084835
2119 03:16:31.085303
2120 03:16:31.088314 Starting depthcharge on Voema...
2121 03:16:31.088762
2122 03:16:31.089464 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2123 03:16:31.089581 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2124 03:16:31.089676 Setting prompt string to ['volteer:']
2125 03:16:31.089771 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2126 03:16:31.094332 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2127 03:16:31.094441
2128 03:16:31.100767 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2129 03:16:31.100882
2130 03:16:31.107363 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2131 03:16:31.107489
2132 03:16:31.110850 Failed to find eMMC card reader
2133 03:16:31.111002
2134 03:16:31.114234 Wipe memory regions:
2135 03:16:31.114400
2136 03:16:31.117885 [0x00000000001000, 0x000000000a0000)
2137 03:16:31.118050
2138 03:16:31.120576 [0x00000000100000, 0x00000030000000)
2139 03:16:31.120752
2140 03:16:31.164129 [0x00000032662db0, 0x000000769ef000)
2141 03:16:31.164720
2142 03:16:31.222565 [0x00000100000000, 0x00000480400000)
2143 03:16:31.223216
2144 03:16:31.908794 ec_init: CrosEC protocol v3 supported (256, 256)
2145 03:16:31.908946
2146 03:16:32.340015 R8152: Initializing
2147 03:16:32.340167
2148 03:16:32.342886 Version 6 (ocp_data = 5c30)
2149 03:16:32.342987
2150 03:16:32.346002 R8152: Done initializing
2151 03:16:32.346102
2152 03:16:32.349286 Adding net device
2153 03:16:32.349374
2154 03:16:32.653769 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2155 03:16:32.653941
2156 03:16:32.654024
2157 03:16:32.654095
2158 03:16:32.657648 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2160 03:16:32.758455 volteer: tftpboot 192.168.201.1 8789682/tftp-deploy-uv9nj5r2/kernel/bzImage 8789682/tftp-deploy-uv9nj5r2/kernel/cmdline 8789682/tftp-deploy-uv9nj5r2/ramdisk/ramdisk.cpio.gz
2161 03:16:32.758659 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 03:16:32.758761 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2163 03:16:32.763126 tftpboot 192.168.201.1 8789682/tftp-deploy-uv9nj5r2/kernel/bzImy-uv9nj5r2/kernel/cmdline 8789682/tftp-deploy-uv9nj5r2/ramdisk/ramdisk.cpio.gz
2164 03:16:32.763231
2165 03:16:32.763307 Waiting for link
2166 03:16:32.763379
2167 03:16:32.967154 done.
2168 03:16:32.967320
2169 03:16:32.967400 MAC: 00:24:32:30:77:d1
2170 03:16:32.967471
2171 03:16:32.970270 Sending DHCP discover... done.
2172 03:16:32.970370
2173 03:16:32.973649 Waiting for reply... done.
2174 03:16:32.973748
2175 03:16:32.976950 Sending DHCP request... done.
2176 03:16:32.977055
2177 03:16:32.983615 Waiting for reply... done.
2178 03:16:32.983726
2179 03:16:32.983806 My ip is 192.168.201.13
2180 03:16:32.983876
2181 03:16:32.986935 The DHCP server ip is 192.168.201.1
2182 03:16:32.987035
2183 03:16:32.994025 TFTP server IP predefined by user: 192.168.201.1
2184 03:16:32.994140
2185 03:16:33.000591 Bootfile predefined by user: 8789682/tftp-deploy-uv9nj5r2/kernel/bzImage
2186 03:16:33.000709
2187 03:16:33.003561 Sending tftp read request... done.
2188 03:16:33.003661
2189 03:16:33.007014 Waiting for the transfer...
2190 03:16:33.007124
2191 03:16:33.556417 00000000 ################################################################
2192 03:16:33.556579
2193 03:16:34.102405 00080000 ################################################################
2194 03:16:34.102572
2195 03:16:34.638253 00100000 ################################################################
2196 03:16:34.638418
2197 03:16:35.178273 00180000 ################################################################
2198 03:16:35.178437
2199 03:16:35.703655 00200000 ################################################################
2200 03:16:35.703820
2201 03:16:36.225112 00280000 ################################################################
2202 03:16:36.225273
2203 03:16:36.758264 00300000 ################################################################
2204 03:16:36.758420
2205 03:16:37.290763 00380000 ################################################################
2206 03:16:37.290912
2207 03:16:37.828346 00400000 ################################################################
2208 03:16:37.828493
2209 03:16:38.376289 00480000 ################################################################
2210 03:16:38.376433
2211 03:16:38.902037 00500000 ################################################################
2212 03:16:38.902188
2213 03:16:39.450922 00580000 ################################################################
2214 03:16:39.451075
2215 03:16:39.996797 00600000 ################################################################
2216 03:16:39.996948
2217 03:16:40.537737 00680000 ################################################################
2218 03:16:40.537887
2219 03:16:41.103287 00700000 ################################################################
2220 03:16:41.103443
2221 03:16:41.660305 00780000 ################################################################
2222 03:16:41.660453
2223 03:16:42.234185 00800000 ################################################################
2224 03:16:42.234595
2225 03:16:42.866680 00880000 ################################################################
2226 03:16:42.867124
2227 03:16:43.199689 00900000 ################################## done.
2228 03:16:43.200242
2229 03:16:43.202900 The bootfile was 9711616 bytes long.
2230 03:16:43.203284
2231 03:16:43.206112 Sending tftp read request... done.
2232 03:16:43.206486
2233 03:16:43.209666 Waiting for the transfer...
2234 03:16:43.210082
2235 03:16:43.803009 00000000 ################################################################
2236 03:16:43.803214
2237 03:16:44.417931 00080000 ################################################################
2238 03:16:44.418463
2239 03:16:45.124350 00100000 ################################################################
2240 03:16:45.124847
2241 03:16:45.826312 00180000 ################################################################
2242 03:16:45.826833
2243 03:16:46.436254 00200000 ################################################################
2244 03:16:46.436404
2245 03:16:47.027303 00280000 ################################################################
2246 03:16:47.027460
2247 03:16:47.599795 00300000 ################################################################
2248 03:16:47.599942
2249 03:16:48.257384 00380000 ################################################################
2250 03:16:48.257954
2251 03:16:48.907905 00400000 ################################################################
2252 03:16:48.908070
2253 03:16:49.458107 00480000 ################################################################
2254 03:16:49.458271
2255 03:16:49.999890 00500000 ################################################################
2256 03:16:50.000038
2257 03:16:50.559645 00580000 ################################################################
2258 03:16:50.559793
2259 03:16:51.108674 00600000 ################################################################
2260 03:16:51.108822
2261 03:16:51.700216 00680000 ################################################################
2262 03:16:51.700379
2263 03:16:52.257369 00700000 ################################################################
2264 03:16:52.257517
2265 03:16:52.829124 00780000 ################################################################
2266 03:16:52.829270
2267 03:16:53.043723 00800000 ######################## done.
2268 03:16:53.043899
2269 03:16:53.047147 Sending tftp read request... done.
2270 03:16:53.047244
2271 03:16:53.050647 Waiting for the transfer...
2272 03:16:53.050779
2273 03:16:53.050869 00000000 # done.
2274 03:16:53.050949
2275 03:16:53.060117 Command line loaded dynamically from TFTP file: 8789682/tftp-deploy-uv9nj5r2/kernel/cmdline
2276 03:16:53.060235
2277 03:16:53.073299 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2278 03:16:53.073441
2279 03:16:53.081940 Shutting down all USB controllers.
2280 03:16:53.082115
2281 03:16:53.082251 Removing current net device
2282 03:16:53.082378
2283 03:16:53.085313 Finalizing coreboot
2284 03:16:53.085513
2285 03:16:53.092159 Exiting depthcharge with code 4 at timestamp: 30592288
2286 03:16:53.092398
2287 03:16:53.092584
2288 03:16:53.092756 Starting kernel ...
2289 03:16:53.092923
2290 03:16:53.093085
2291 03:16:53.093244
2292 03:16:53.094116 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2293 03:16:53.094405 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2294 03:16:53.094620 Setting prompt string to ['Linux version [0-9]']
2295 03:16:53.094818 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2296 03:16:53.095058 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2298 03:21:14.095374 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2300 03:21:14.096577 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2302 03:21:14.097454 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2305 03:21:14.099002 end: 2 depthcharge-action (duration 00:05:00) [common]
2307 03:21:14.099638 Cleaning after the job
2308 03:21:14.099731 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8789682/tftp-deploy-uv9nj5r2/ramdisk
2309 03:21:14.100451 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8789682/tftp-deploy-uv9nj5r2/kernel
2310 03:21:14.101197 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8789682/tftp-deploy-uv9nj5r2/modules
2311 03:21:14.101408 start: 5.1 power-off (timeout 00:00:30) [common]
2312 03:21:14.101576 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2313 03:21:14.122692 >> Command sent successfully.
2314 03:21:14.124807 Returned 0 in 0 seconds
2315 03:21:14.226190 end: 5.1 power-off (duration 00:00:00) [common]
2317 03:21:14.227759 start: 5.2 read-feedback (timeout 00:10:00) [common]
2318 03:21:14.228946 Listened to connection for namespace 'common' for up to 1s
2319 03:21:15.230204 Finalising connection for namespace 'common'
2320 03:21:15.230952 Disconnecting from shell: Finalise
2321 03:21:15.332593 end: 5.2 read-feedback (duration 00:00:01) [common]
2322 03:21:15.333283 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8789682
2323 03:21:15.341935 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8789682
2324 03:21:15.342078 JobError: Your job cannot terminate cleanly.