Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 03:16:07.486600 lava-dispatcher, installed at version: 2022.11
2 03:16:07.486799 start: 0 validate
3 03:16:07.486927 Start time: 2023-01-19 03:16:07.486920+00:00 (UTC)
4 03:16:07.487056 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:16:07.487181 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230114.0%2Famd64%2Frootfs.cpio.gz exists
6 03:16:07.783184 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:16:07.783371 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.269-cip88-rt28-rebase%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:16:10.787367 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:16:10.787545 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.269-cip88-rt28-rebase%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 03:16:10.790684 validate duration: 3.30
12 03:16:10.790959 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:16:10.791081 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:16:10.791197 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:16:10.791312 Not decompressing ramdisk as can be used compressed.
16 03:16:10.791407 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230114.0/amd64/rootfs.cpio.gz
17 03:16:10.791487 saving as /var/lib/lava/dispatcher/tmp/8789678/tftp-deploy-au7b2xh9/ramdisk/rootfs.cpio.gz
18 03:16:10.791569 total size: 35753308 (34MB)
19 03:16:10.793815 progress 0% (0MB)
20 03:16:10.826865 progress 5% (1MB)
21 03:16:10.856777 progress 10% (3MB)
22 03:16:10.893046 progress 15% (5MB)
23 03:16:10.939369 progress 20% (6MB)
24 03:16:10.989849 progress 25% (8MB)
25 03:16:11.051114 progress 30% (10MB)
26 03:16:11.111080 progress 35% (11MB)
27 03:16:11.187992 progress 40% (13MB)
28 03:16:11.277126 progress 45% (15MB)
29 03:16:11.368488 progress 50% (17MB)
30 03:16:11.456915 progress 55% (18MB)
31 03:16:11.561124 progress 60% (20MB)
32 03:16:11.667529 progress 65% (22MB)
33 03:16:11.770191 progress 70% (23MB)
34 03:16:11.876060 progress 75% (25MB)
35 03:16:11.975441 progress 80% (27MB)
36 03:16:12.084300 progress 85% (29MB)
37 03:16:12.180357 progress 90% (30MB)
38 03:16:12.263678 progress 95% (32MB)
39 03:16:12.324307 progress 100% (34MB)
40 03:16:12.324561 34MB downloaded in 1.53s (22.24MB/s)
41 03:16:12.324727 end: 1.1.1 http-download (duration 00:00:02) [common]
43 03:16:12.324997 end: 1.1 download-retry (duration 00:00:02) [common]
44 03:16:12.325091 start: 1.2 download-retry (timeout 00:09:58) [common]
45 03:16:12.325184 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 03:16:12.325292 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.269-cip88-rt28-rebase/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 03:16:12.325364 saving as /var/lib/lava/dispatcher/tmp/8789678/tftp-deploy-au7b2xh9/kernel/bzImage
48 03:16:12.325428 total size: 9711616 (9MB)
49 03:16:12.325494 No compression specified
50 03:16:12.328159 progress 0% (0MB)
51 03:16:12.345038 progress 5% (0MB)
52 03:16:12.362689 progress 10% (0MB)
53 03:16:12.377398 progress 15% (1MB)
54 03:16:12.394763 progress 20% (1MB)
55 03:16:12.411821 progress 25% (2MB)
56 03:16:12.428559 progress 30% (2MB)
57 03:16:12.444691 progress 35% (3MB)
58 03:16:12.462387 progress 40% (3MB)
59 03:16:12.477858 progress 45% (4MB)
60 03:16:12.495922 progress 50% (4MB)
61 03:16:12.510680 progress 55% (5MB)
62 03:16:12.526431 progress 60% (5MB)
63 03:16:12.544477 progress 65% (6MB)
64 03:16:12.561179 progress 70% (6MB)
65 03:16:12.578304 progress 75% (6MB)
66 03:16:12.594753 progress 80% (7MB)
67 03:16:12.608760 progress 85% (7MB)
68 03:16:12.627425 progress 90% (8MB)
69 03:16:12.643739 progress 95% (8MB)
70 03:16:12.658353 progress 100% (9MB)
71 03:16:12.658607 9MB downloaded in 0.33s (27.80MB/s)
72 03:16:12.658793 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:16:12.659053 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:16:12.659162 start: 1.3 download-retry (timeout 00:09:58) [common]
76 03:16:12.659265 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 03:16:12.659373 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.269-cip88-rt28-rebase/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 03:16:12.659441 saving as /var/lib/lava/dispatcher/tmp/8789678/tftp-deploy-au7b2xh9/modules/modules.tar
79 03:16:12.659504 total size: 64648 (0MB)
80 03:16:12.659567 Using unxz to decompress xz
81 03:16:12.680192 progress 50% (0MB)
82 03:16:12.685219 progress 100% (0MB)
83 03:16:12.687752 0MB downloaded in 0.03s (2.18MB/s)
84 03:16:12.687999 end: 1.3.1 http-download (duration 00:00:00) [common]
86 03:16:12.688271 end: 1.3 download-retry (duration 00:00:00) [common]
87 03:16:12.688374 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 03:16:12.688475 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 03:16:12.688563 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 03:16:12.688651 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 03:16:12.688835 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v
92 03:16:12.688982 makedir: /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin
93 03:16:12.689077 makedir: /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/tests
94 03:16:12.689163 makedir: /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/results
95 03:16:12.689280 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-add-keys
96 03:16:12.689416 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-add-sources
97 03:16:12.689538 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-background-process-start
98 03:16:12.689654 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-background-process-stop
99 03:16:12.689777 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-common-functions
100 03:16:12.689899 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-echo-ipv4
101 03:16:12.690016 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-install-packages
102 03:16:12.690144 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-installed-packages
103 03:16:12.690282 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-os-build
104 03:16:12.690442 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-probe-channel
105 03:16:12.690599 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-probe-ip
106 03:16:12.690716 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-target-ip
107 03:16:12.690829 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-target-mac
108 03:16:12.690941 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-target-storage
109 03:16:12.691056 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-test-case
110 03:16:12.691170 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-test-event
111 03:16:12.691283 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-test-feedback
112 03:16:12.691396 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-test-raise
113 03:16:12.691511 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-test-reference
114 03:16:12.691623 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-test-runner
115 03:16:12.691734 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-test-set
116 03:16:12.691847 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-test-shell
117 03:16:12.692004 Updating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-install-packages (oe)
118 03:16:12.692137 Updating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/bin/lava-installed-packages (oe)
119 03:16:12.692245 Creating /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/environment
120 03:16:12.692338 LAVA metadata
121 03:16:12.692414 - LAVA_JOB_ID=8789678
122 03:16:12.692487 - LAVA_DISPATCHER_IP=192.168.201.1
123 03:16:12.692593 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 03:16:12.692663 skipped lava-vland-overlay
125 03:16:12.692742 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 03:16:12.692831 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 03:16:12.692897 skipped lava-multinode-overlay
128 03:16:12.692977 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 03:16:12.693062 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 03:16:12.693143 Loading test definitions
131 03:16:12.693243 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 03:16:12.693322 Using /lava-8789678 at stage 0
133 03:16:12.693589 uuid=8789678_1.4.2.3.1 testdef=None
134 03:16:12.693683 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 03:16:12.693777 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 03:16:12.694282 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 03:16:12.694521 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 03:16:12.695087 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 03:16:12.695341 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 03:16:12.695878 runner path: /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/0/tests/0_cros-ec test_uuid 8789678_1.4.2.3.1
143 03:16:12.696029 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 03:16:12.696261 Creating lava-test-runner.conf files
146 03:16:12.696331 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8789678/lava-overlay-yb03zz5v/lava-8789678/0 for stage 0
147 03:16:12.696416 - 0_cros-ec
148 03:16:12.696512 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 03:16:12.696603 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
150 03:16:12.701759 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 03:16:12.701966 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
152 03:16:12.702061 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 03:16:12.702153 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 03:16:12.702254 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
155 03:16:13.480354 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 03:16:13.480682 start: 1.4.4 extract-modules (timeout 00:09:57) [common]
157 03:16:13.480794 extracting modules file /var/lib/lava/dispatcher/tmp/8789678/tftp-deploy-au7b2xh9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8789678/extract-overlay-ramdisk-r3tach3h/ramdisk
158 03:16:13.485155 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 03:16:13.485305 start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
160 03:16:13.485390 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8789678/compress-overlay-yu9l3c82/overlay-1.4.2.4.tar.gz to ramdisk
161 03:16:13.485466 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8789678/compress-overlay-yu9l3c82/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8789678/extract-overlay-ramdisk-r3tach3h/ramdisk
162 03:16:13.488697 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 03:16:13.488808 start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
164 03:16:13.488905 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 03:16:13.488999 start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
166 03:16:13.489078 Building ramdisk /var/lib/lava/dispatcher/tmp/8789678/extract-overlay-ramdisk-r3tach3h/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8789678/extract-overlay-ramdisk-r3tach3h/ramdisk
167 03:16:13.739364 >> 182674 blocks
168 03:16:17.003632 rename /var/lib/lava/dispatcher/tmp/8789678/extract-overlay-ramdisk-r3tach3h/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8789678/tftp-deploy-au7b2xh9/ramdisk/ramdisk.cpio.gz
169 03:16:17.004080 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
170 03:16:17.004205 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
171 03:16:17.004309 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
172 03:16:17.004405 No mkimage arch provided, not using FIT.
173 03:16:17.004497 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 03:16:17.004585 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 03:16:17.004687 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 03:16:17.004777 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
177 03:16:17.004859 No LXC device requested
178 03:16:17.004942 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 03:16:17.005035 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
180 03:16:17.005121 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 03:16:17.005192 Checking files for TFTP limit of 4294967296 bytes.
182 03:16:17.005648 end: 1 tftp-deploy (duration 00:00:06) [common]
183 03:16:17.005756 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 03:16:17.005855 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 03:16:17.005979 substitutions:
186 03:16:17.006051 - {DTB}: None
187 03:16:17.006118 - {INITRD}: 8789678/tftp-deploy-au7b2xh9/ramdisk/ramdisk.cpio.gz
188 03:16:17.006180 - {KERNEL}: 8789678/tftp-deploy-au7b2xh9/kernel/bzImage
189 03:16:17.006286 - {LAVA_MAC}: None
190 03:16:17.006347 - {PRESEED_CONFIG}: None
191 03:16:17.006409 - {PRESEED_LOCAL}: None
192 03:16:17.006468 - {RAMDISK}: 8789678/tftp-deploy-au7b2xh9/ramdisk/ramdisk.cpio.gz
193 03:16:17.006526 - {ROOT_PART}: None
194 03:16:17.006583 - {ROOT}: None
195 03:16:17.006639 - {SERVER_IP}: 192.168.201.1
196 03:16:17.006696 - {TEE}: None
197 03:16:17.006752 Parsed boot commands:
198 03:16:17.006809 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 03:16:17.006964 Parsed boot commands: tftpboot 192.168.201.1 8789678/tftp-deploy-au7b2xh9/kernel/bzImage 8789678/tftp-deploy-au7b2xh9/kernel/cmdline 8789678/tftp-deploy-au7b2xh9/ramdisk/ramdisk.cpio.gz
200 03:16:17.007056 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 03:16:17.007146 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 03:16:17.007278 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 03:16:17.007396 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 03:16:17.007467 Not connected, no need to disconnect.
205 03:16:17.007545 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 03:16:17.007633 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 03:16:17.007704 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
208 03:16:17.010389 Setting prompt string to ['lava-test: # ']
209 03:16:17.010718 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 03:16:17.010826 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 03:16:17.010924 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 03:16:17.011019 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 03:16:17.011241 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
214 03:16:17.031931 >> Command sent successfully.
215 03:16:17.034035 Returned 0 in 0 seconds
216 03:16:17.134346 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 03:16:17.134688 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 03:16:17.134792 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 03:16:17.134886 Setting prompt string to 'Starting depthcharge on Voema...'
221 03:16:17.134954 Changing prompt to 'Starting depthcharge on Voema...'
222 03:16:17.135023 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 03:16:17.135320 [Enter `^Ec?' for help]
224 03:16:24.930156
225 03:16:24.930363
226 03:16:24.939855 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 03:16:24.943272 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 03:16:24.946541
229 03:16:24.949832 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
230 03:16:24.953312 CPU: AES supported, TXT NOT supported, VT supported
231 03:16:24.959591 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
232 03:16:24.966361 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
233 03:16:24.969883 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
234 03:16:24.973059 VBOOT: Loading verstage.
235 03:16:24.979607 FMAP: Found "FLASH" version 1.1 at 0x1804000.
236 03:16:24.983025 FMAP: base = 0x0 size = 0x2000000 #areas = 32
237 03:16:24.986307 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
238 03:16:24.996958 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
239 03:16:25.003846 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
240 03:16:25.004193
241 03:16:25.004471
242 03:16:25.016915 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
243 03:16:25.031161 Probing TPM: . done!
244 03:16:25.033974 TPM ready after 0 ms
245 03:16:25.037610 Connected to device vid:did:rid of 1ae0:0028:00
246 03:16:25.048965 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
247 03:16:25.055372 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
248 03:16:25.058984 Initialized TPM device CR50 revision 0
249 03:16:25.109901 tlcl_send_startup: Startup return code is 0
250 03:16:25.110047 TPM: setup succeeded
251 03:16:25.125468 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
252 03:16:25.139646 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
253 03:16:25.152712 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
254 03:16:25.162400 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
255 03:16:25.166064 Chrome EC: UHEPI supported
256 03:16:25.169509 Phase 1
257 03:16:25.172639 FMAP: area GBB found @ 1805000 (458752 bytes)
258 03:16:25.182650 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
259 03:16:25.189269 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
260 03:16:25.195750 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
261 03:16:25.202766 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
262 03:16:25.205749 Recovery requested (1009000e)
263 03:16:25.209141 TPM: Extending digest for VBOOT: boot mode into PCR 0
264 03:16:25.220767 tlcl_extend: response is 0
265 03:16:25.227487 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
266 03:16:25.237411 tlcl_extend: response is 0
267 03:16:25.244017 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
268 03:16:25.250530 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
269 03:16:25.257151 BS: verstage times (exec / console): total (unknown) / 142 ms
270 03:16:25.257239
271 03:16:25.257307
272 03:16:25.270547 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
273 03:16:25.277023 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
274 03:16:25.280558 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
275 03:16:25.283602 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
276 03:16:25.290193 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
277 03:16:25.293679 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
278 03:16:25.297146 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
279 03:16:25.300477 TCO_STS: 0000 0000
280 03:16:25.303502 GEN_PMCON: d0015038 00002200
281 03:16:25.306876 GBLRST_CAUSE: 00000000 00000000
282 03:16:25.306963 HPR_CAUSE0: 00000000
283 03:16:25.310149 prev_sleep_state 5
284 03:16:25.313554 Boot Count incremented to 15842
285 03:16:25.320197 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
286 03:16:25.326539 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 03:16:25.333397 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 03:16:25.336628
289 03:16:25.343214 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
290 03:16:25.346491 Chrome EC: UHEPI supported
291 03:16:25.353238 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
292 03:16:25.364088 Probing TPM: done!
293 03:16:25.370733 Connected to device vid:did:rid of 1ae0:0028:00
294 03:16:25.381576 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
295 03:16:25.390117 Initialized TPM device CR50 revision 0
296 03:16:25.399308 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
297 03:16:25.406137 MRC: Hash idx 0x100b comparison successful.
298 03:16:25.409392 MRC cache found, size faa8
299 03:16:25.409469 bootmode is set to: 2
300 03:16:25.412643 SPD index = 0
301 03:16:25.419233 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
302 03:16:25.422530 SPD: module type is LPDDR4X
303 03:16:25.425856 SPD: module part number is MT53E512M64D4NW-046
304 03:16:25.432496 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
305 03:16:25.435921 SPD: device width 16 bits, bus width 16 bits
306 03:16:25.442453 SPD: module size is 1024 MB (per channel)
307 03:16:25.874590 CBMEM:
308 03:16:25.878125 IMD: root @ 0x76fff000 254 entries.
309 03:16:25.881503 IMD: root @ 0x76ffec00 62 entries.
310 03:16:25.884502 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
311 03:16:25.890897 FMAP: area RW_VPD found @ f35000 (8192 bytes)
312 03:16:25.894486 External stage cache:
313 03:16:25.897612 IMD: root @ 0x7b3ff000 254 entries.
314 03:16:25.900924 IMD: root @ 0x7b3fec00 62 entries.
315 03:16:25.916284 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
316 03:16:25.922936 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
317 03:16:25.929640 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
318 03:16:25.943518 MRC: 'RECOVERY_MRC_CACHE' does not need update.
319 03:16:25.950279 cse_lite: Skip switching to RW in the recovery path
320 03:16:25.950367 8 DIMMs found
321 03:16:25.950435 SMM Memory Map
322 03:16:25.953425
323 03:16:25.956811 SMRAM : 0x7b000000 0x800000
324 03:16:25.960595 Subregion 0: 0x7b000000 0x200000
325 03:16:25.960681 Subregion 1: 0x7b200000 0x200000
326 03:16:25.964364 Subregion 2: 0x7b400000 0x400000
327 03:16:25.967923 top_of_ram = 0x77000000
328 03:16:25.974466 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
329 03:16:25.977815 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
330 03:16:25.984609 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
331 03:16:25.987891 MTRR Range: Start=ff000000 End=0 (Size 1000000)
332 03:16:25.997724 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
333 03:16:26.004086 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
334 03:16:26.014116 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
335 03:16:26.017346 Processing 211 relocs. Offset value of 0x74c0b000
336 03:16:26.026618 BS: romstage times (exec / console): total (unknown) / 277 ms
337 03:16:26.032465
338 03:16:26.032549
339 03:16:26.042457 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
340 03:16:26.045870 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
341 03:16:26.055804 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
342 03:16:26.062529 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
343 03:16:26.069031 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
344 03:16:26.075650 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
345 03:16:26.122802 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
346 03:16:26.129158 Processing 5008 relocs. Offset value of 0x75d98000
347 03:16:26.132508 BS: postcar times (exec / console): total (unknown) / 59 ms
348 03:16:26.132597
349 03:16:26.136119
350 03:16:26.136203
351 03:16:26.145927 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
352 03:16:26.146014 Normal boot
353 03:16:26.149150 FW_CONFIG value is 0x804c02
354 03:16:26.152447 PCI: 00:07.0 disabled by fw_config
355 03:16:26.155812 PCI: 00:07.1 disabled by fw_config
356 03:16:26.158937 PCI: 00:0d.2 disabled by fw_config
357 03:16:26.165593 PCI: 00:1c.7 disabled by fw_config
358 03:16:26.168879 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
359 03:16:26.175569 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
360 03:16:26.178937 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 03:16:26.185463 GENERIC: 0.0 disabled by fw_config
362 03:16:26.188841 GENERIC: 1.0 disabled by fw_config
363 03:16:26.192117 fw_config match found: DB_USB=USB3_ACTIVE
364 03:16:26.195310 fw_config match found: DB_USB=USB3_ACTIVE
365 03:16:26.198629 fw_config match found: DB_USB=USB3_ACTIVE
366 03:16:26.205585 fw_config match found: DB_USB=USB3_ACTIVE
367 03:16:26.208841 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
368 03:16:26.215162 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
369 03:16:26.225286 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
370 03:16:26.232094 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
371 03:16:26.235345 microcode: sig=0x806c1 pf=0x80 revision=0x86
372 03:16:26.242025 microcode: Update skipped, already up-to-date
373 03:16:26.248209 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
374 03:16:26.276073 Detected 4 core, 8 thread CPU.
375 03:16:26.279415 Setting up SMI for CPU
376 03:16:26.282801 IED base = 0x7b400000
377 03:16:26.282887 IED size = 0x00400000
378 03:16:26.286235 Will perform SMM setup.
379 03:16:26.292881 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
380 03:16:26.299571 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
381 03:16:26.305904 Processing 16 relocs. Offset value of 0x00030000
382 03:16:26.309289 Attempting to start 7 APs
383 03:16:26.312601 Waiting for 10ms after sending INIT.
384 03:16:26.328507 Waiting for 1st SIPI to complete...done.
385 03:16:26.328594 AP: slot 4 apic_id 2.
386 03:16:26.331803 AP: slot 7 apic_id 3.
387 03:16:26.335052 AP: slot 5 apic_id 4.
388 03:16:26.335138 AP: slot 2 apic_id 5.
389 03:16:26.338201 AP: slot 1 apic_id 1.
390 03:16:26.341620 Waiting for 2nd SIPI to complete...done.
391 03:16:26.344914 AP: slot 6 apic_id 6.
392 03:16:26.348327 AP: slot 3 apic_id 7.
393 03:16:26.354668 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
394 03:16:26.361542 Processing 13 relocs. Offset value of 0x00038000
395 03:16:26.361628 Unable to locate Global NVS
396 03:16:26.364774
397 03:16:26.371527 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
398 03:16:26.374899 Installing permanent SMM handler to 0x7b000000
399 03:16:26.384933 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
400 03:16:26.388249 Processing 794 relocs. Offset value of 0x7b010000
401 03:16:26.397793 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
402 03:16:26.401512 Processing 13 relocs. Offset value of 0x7b008000
403 03:16:26.408191 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
404 03:16:26.414754 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
405 03:16:26.417809 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
406 03:16:26.424425 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
407 03:16:26.431388 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
408 03:16:26.437897 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
409 03:16:26.444248 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
410 03:16:26.444334 Unable to locate Global NVS
411 03:16:26.454117 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
412 03:16:26.457727 Clearing SMI status registers
413 03:16:26.457813 SMI_STS: PM1
414 03:16:26.460953 PM1_STS: PWRBTN
415 03:16:26.467587 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
416 03:16:26.471049 In relocation handler: CPU 0
417 03:16:26.474029 New SMBASE=0x7b000000 IEDBASE=0x7b400000
418 03:16:26.480581 Writing SMRR. base = 0x7b000006, mask=0xff800c00
419 03:16:26.480667 Relocation complete.
420 03:16:26.490578 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
421 03:16:26.490668 In relocation handler: CPU 1
422 03:16:26.493960
423 03:16:26.497283 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 03:16:26.497370 Relocation complete.
425 03:16:26.507177 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
426 03:16:26.507266 In relocation handler: CPU 4
427 03:16:26.513976 New SMBASE=0x7afff000 IEDBASE=0x7b400000
428 03:16:26.517174 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 03:16:26.520335 Relocation complete.
430 03:16:26.527115 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
431 03:16:26.530508 In relocation handler: CPU 7
432 03:16:26.533429 New SMBASE=0x7affe400 IEDBASE=0x7b400000
433 03:16:26.536844 Relocation complete.
434 03:16:26.543449 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
435 03:16:26.546876 In relocation handler: CPU 5
436 03:16:26.550153 New SMBASE=0x7affec00 IEDBASE=0x7b400000
437 03:16:26.556604 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 03:16:26.556693 Relocation complete.
439 03:16:26.566509 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
440 03:16:26.566584 In relocation handler: CPU 2
441 03:16:26.573387 New SMBASE=0x7afff800 IEDBASE=0x7b400000
442 03:16:26.573459 Relocation complete.
443 03:16:26.580028 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
444 03:16:26.583047
445 03:16:26.583117 In relocation handler: CPU 3
446 03:16:26.589708 New SMBASE=0x7afff400 IEDBASE=0x7b400000
447 03:16:26.589795 Relocation complete.
448 03:16:26.596433 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
449 03:16:26.599803 In relocation handler: CPU 6
450 03:16:26.606197 New SMBASE=0x7affe800 IEDBASE=0x7b400000
451 03:16:26.609575 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 03:16:26.612906 Relocation complete.
453 03:16:26.613000 Initializing CPU #0
454 03:16:26.616265 CPU: vendor Intel device 806c1
455 03:16:26.622757 CPU: family 06, model 8c, stepping 01
456 03:16:26.622834 Clearing out pending MCEs
457 03:16:26.626095 Setting up local APIC...
458 03:16:26.629831 apic_id: 0x00 done.
459 03:16:26.633460 Turbo is available but hidden
460 03:16:26.633563 Turbo is available and visible
461 03:16:26.636794
462 03:16:26.640200 microcode: Update skipped, already up-to-date
463 03:16:26.640286 CPU #0 initialized
464 03:16:26.643551
465 03:16:26.643636 Initializing CPU #5
466 03:16:26.646738 Initializing CPU #2
467 03:16:26.650122 CPU: vendor Intel device 806c1
468 03:16:26.653608 CPU: family 06, model 8c, stepping 01
469 03:16:26.656911 CPU: vendor Intel device 806c1
470 03:16:26.660271 CPU: family 06, model 8c, stepping 01
471 03:16:26.663470 Clearing out pending MCEs
472 03:16:26.663545 Clearing out pending MCEs
473 03:16:26.666766
474 03:16:26.666843 Setting up local APIC...
475 03:16:26.670045 Initializing CPU #3
476 03:16:26.670125 Initializing CPU #6
477 03:16:26.673363
478 03:16:26.673456 CPU: vendor Intel device 806c1
479 03:16:26.679864 CPU: family 06, model 8c, stepping 01
480 03:16:26.683447 CPU: vendor Intel device 806c1
481 03:16:26.686741 CPU: family 06, model 8c, stepping 01
482 03:16:26.686826 Clearing out pending MCEs
483 03:16:26.690062 Clearing out pending MCEs
484 03:16:26.693286 Setting up local APIC...
485 03:16:26.696518 Setting up local APIC...
486 03:16:26.696598 Initializing CPU #7
487 03:16:26.699711 Initializing CPU #4
488 03:16:26.703389 CPU: vendor Intel device 806c1
489 03:16:26.706389 CPU: family 06, model 8c, stepping 01
490 03:16:26.709938 CPU: vendor Intel device 806c1
491 03:16:26.713179 CPU: family 06, model 8c, stepping 01
492 03:16:26.716502 Clearing out pending MCEs
493 03:16:26.719714 Clearing out pending MCEs
494 03:16:26.723171 Setting up local APIC...
495 03:16:26.723257 Setting up local APIC...
496 03:16:26.726477 apic_id: 0x05 done.
497 03:16:26.729866 apic_id: 0x04 done.
498 03:16:26.733093 microcode: Update skipped, already up-to-date
499 03:16:26.736396 microcode: Update skipped, already up-to-date
500 03:16:26.739729 CPU #2 initialized
501 03:16:26.743023 CPU #5 initialized
502 03:16:26.743109 Setting up local APIC...
503 03:16:26.746401 apic_id: 0x06 done.
504 03:16:26.749618 apic_id: 0x07 done.
505 03:16:26.753244 microcode: Update skipped, already up-to-date
506 03:16:26.756332 microcode: Update skipped, already up-to-date
507 03:16:26.759874 CPU #6 initialized
508 03:16:26.762805 CPU #3 initialized
509 03:16:26.762921 Initializing CPU #1
510 03:16:26.766142 apic_id: 0x02 done.
511 03:16:26.766238 apic_id: 0x03 done.
512 03:16:26.772741 microcode: Update skipped, already up-to-date
513 03:16:26.776070 microcode: Update skipped, already up-to-date
514 03:16:26.779557 CPU #4 initialized
515 03:16:26.779644 CPU #7 initialized
516 03:16:26.782789 CPU: vendor Intel device 806c1
517 03:16:26.786126 CPU: family 06, model 8c, stepping 01
518 03:16:26.789472
519 03:16:26.789559 Clearing out pending MCEs
520 03:16:26.792729 Setting up local APIC...
521 03:16:26.796063 apic_id: 0x01 done.
522 03:16:26.799381 microcode: Update skipped, already up-to-date
523 03:16:26.802766 CPU #1 initialized
524 03:16:26.806114 bsp_do_flight_plan done after 459 msecs.
525 03:16:26.809307 CPU: frequency set to 4000 MHz
526 03:16:26.809395 Enabling SMIs.
527 03:16:26.812745
528 03:16:26.816023 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
529 03:16:26.833443 SATAXPCIE1 indicates PCIe NVMe is present
530 03:16:26.836781 Probing TPM: done!
531 03:16:26.840441 Connected to device vid:did:rid of 1ae0:0028:00
532 03:16:26.850347 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
533 03:16:26.853843 Initialized TPM device CR50 revision 0
534 03:16:26.857192 Enabling S0i3.4
535 03:16:26.863740 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 03:16:26.867022 Found a VBT of 8704 bytes after decompression
537 03:16:26.873559 cse_lite: CSE RO boot. HybridStorageMode disabled
538 03:16:26.880131 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 03:16:26.956303 FSPS returned 0
540 03:16:26.959687 Executing Phase 1 of FspMultiPhaseSiInit
541 03:16:26.969593 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 03:16:26.972951 port C0 DISC req: usage 1 usb3 1 usb2 5
543 03:16:26.976251 Raw Buffer output 0 00000511
544 03:16:26.979215 Raw Buffer output 1 00000000
545 03:16:26.983385 pmc_send_ipc_cmd succeeded
546 03:16:26.986599 port C1 DISC req: usage 1 usb3 2 usb2 3
547 03:16:26.989981
548 03:16:26.990068 Raw Buffer output 0 00000321
549 03:16:26.993290 Raw Buffer output 1 00000000
550 03:16:26.997366 pmc_send_ipc_cmd succeeded
551 03:16:27.002433 Detected 4 core, 8 thread CPU.
552 03:16:27.005763 Detected 4 core, 8 thread CPU.
553 03:16:27.240328 Display FSP Version Info HOB
554 03:16:27.243667 Reference Code - CPU = a.0.4c.31
555 03:16:27.246647 uCode Version = 0.0.0.86
556 03:16:27.249809 TXT ACM version = ff.ff.ff.ffff
557 03:16:27.253264 Reference Code - ME = a.0.4c.31
558 03:16:27.256693 MEBx version = 0.0.0.0
559 03:16:27.259891 ME Firmware Version = Consumer SKU
560 03:16:27.263260 Reference Code - PCH = a.0.4c.31
561 03:16:27.266680 PCH-CRID Status = Disabled
562 03:16:27.269883 PCH-CRID Original Value = ff.ff.ff.ffff
563 03:16:27.273370 PCH-CRID New Value = ff.ff.ff.ffff
564 03:16:27.276599 OPROM - RST - RAID = ff.ff.ff.ffff
565 03:16:27.279620 PCH Hsio Version = 4.0.0.0
566 03:16:27.283337 Reference Code - SA - System Agent = a.0.4c.31
567 03:16:27.286642 Reference Code - MRC = 2.0.0.1
568 03:16:27.289895 SA - PCIe Version = a.0.4c.31
569 03:16:27.293292 SA-CRID Status = Disabled
570 03:16:27.296240 SA-CRID Original Value = 0.0.0.1
571 03:16:27.299589 SA-CRID New Value = 0.0.0.1
572 03:16:27.302946 OPROM - VBIOS = ff.ff.ff.ffff
573 03:16:27.306260 IO Manageability Engine FW Version = 11.1.4.0
574 03:16:27.309590 PHY Build Version = 0.0.0.e0
575 03:16:27.312953 Thunderbolt(TM) FW Version = 0.0.0.0
576 03:16:27.319675 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
577 03:16:27.322892 ITSS IRQ Polarities Before:
578 03:16:27.322988 IPC0: 0xffffffff
579 03:16:27.326082 IPC1: 0xffffffff
580 03:16:27.326152 IPC2: 0xffffffff
581 03:16:27.329444 IPC3: 0xffffffff
582 03:16:27.332644 ITSS IRQ Polarities After:
583 03:16:27.332718 IPC0: 0xffffffff
584 03:16:27.336079 IPC1: 0xffffffff
585 03:16:27.336152 IPC2: 0xffffffff
586 03:16:27.339412 IPC3: 0xffffffff
587 03:16:27.342685 Found PCIe Root Port #9 at PCI: 00:1d.0.
588 03:16:27.355741 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
589 03:16:27.365969 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
590 03:16:27.379177 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
591 03:16:27.385877 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
592 03:16:27.389204 Enumerating buses...
593 03:16:27.392445 Show all devs... Before device enumeration.
594 03:16:27.395722 Root Device: enabled 1
595 03:16:27.395795 DOMAIN: 0000: enabled 1
596 03:16:27.399126 CPU_CLUSTER: 0: enabled 1
597 03:16:27.402106 PCI: 00:00.0: enabled 1
598 03:16:27.405955 PCI: 00:02.0: enabled 1
599 03:16:27.406031 PCI: 00:04.0: enabled 1
600 03:16:27.408914 PCI: 00:05.0: enabled 1
601 03:16:27.412321 PCI: 00:06.0: enabled 0
602 03:16:27.415650 PCI: 00:07.0: enabled 0
603 03:16:27.415735 PCI: 00:07.1: enabled 0
604 03:16:27.418821 PCI: 00:07.2: enabled 0
605 03:16:27.422113 PCI: 00:07.3: enabled 0
606 03:16:27.425558 PCI: 00:08.0: enabled 1
607 03:16:27.425629 PCI: 00:09.0: enabled 0
608 03:16:27.428902 PCI: 00:0a.0: enabled 0
609 03:16:27.432275 PCI: 00:0d.0: enabled 1
610 03:16:27.432346 PCI: 00:0d.1: enabled 0
611 03:16:27.435561
612 03:16:27.435641 PCI: 00:0d.2: enabled 0
613 03:16:27.438658 PCI: 00:0d.3: enabled 0
614 03:16:27.442089 PCI: 00:0e.0: enabled 0
615 03:16:27.442160 PCI: 00:10.2: enabled 1
616 03:16:27.445387 PCI: 00:10.6: enabled 0
617 03:16:27.448937 PCI: 00:10.7: enabled 0
618 03:16:27.452326 PCI: 00:12.0: enabled 0
619 03:16:27.452416 PCI: 00:12.6: enabled 0
620 03:16:27.455366 PCI: 00:13.0: enabled 0
621 03:16:27.458692 PCI: 00:14.0: enabled 1
622 03:16:27.462259 PCI: 00:14.1: enabled 0
623 03:16:27.462342 PCI: 00:14.2: enabled 1
624 03:16:27.465297 PCI: 00:14.3: enabled 1
625 03:16:27.468868 PCI: 00:15.0: enabled 1
626 03:16:27.472116 PCI: 00:15.1: enabled 1
627 03:16:27.472199 PCI: 00:15.2: enabled 1
628 03:16:27.475225 PCI: 00:15.3: enabled 1
629 03:16:27.478560 PCI: 00:16.0: enabled 1
630 03:16:27.478643 PCI: 00:16.1: enabled 0
631 03:16:27.481747
632 03:16:27.481831 PCI: 00:16.2: enabled 0
633 03:16:27.485068 PCI: 00:16.3: enabled 0
634 03:16:27.488699 PCI: 00:16.4: enabled 0
635 03:16:27.488784 PCI: 00:16.5: enabled 0
636 03:16:27.491725 PCI: 00:17.0: enabled 1
637 03:16:27.495142 PCI: 00:19.0: enabled 0
638 03:16:27.498517 PCI: 00:19.1: enabled 1
639 03:16:27.498601 PCI: 00:19.2: enabled 0
640 03:16:27.501793 PCI: 00:1c.0: enabled 1
641 03:16:27.505162 PCI: 00:1c.1: enabled 0
642 03:16:27.508588 PCI: 00:1c.2: enabled 0
643 03:16:27.508673 PCI: 00:1c.3: enabled 0
644 03:16:27.511858 PCI: 00:1c.4: enabled 0
645 03:16:27.515118 PCI: 00:1c.5: enabled 0
646 03:16:27.518489 PCI: 00:1c.6: enabled 1
647 03:16:27.518574 PCI: 00:1c.7: enabled 0
648 03:16:27.521670 PCI: 00:1d.0: enabled 1
649 03:16:27.524819 PCI: 00:1d.1: enabled 0
650 03:16:27.528172 PCI: 00:1d.2: enabled 1
651 03:16:27.528256 PCI: 00:1d.3: enabled 0
652 03:16:27.531744 PCI: 00:1e.0: enabled 1
653 03:16:27.534909 PCI: 00:1e.1: enabled 0
654 03:16:27.534994 PCI: 00:1e.2: enabled 1
655 03:16:27.538216 PCI: 00:1e.3: enabled 1
656 03:16:27.541550 PCI: 00:1f.0: enabled 1
657 03:16:27.544841 PCI: 00:1f.1: enabled 0
658 03:16:27.544926 PCI: 00:1f.2: enabled 1
659 03:16:27.548202 PCI: 00:1f.3: enabled 1
660 03:16:27.551347 PCI: 00:1f.4: enabled 0
661 03:16:27.554779 PCI: 00:1f.5: enabled 1
662 03:16:27.554864 PCI: 00:1f.6: enabled 0
663 03:16:27.558074 PCI: 00:1f.7: enabled 0
664 03:16:27.561355 APIC: 00: enabled 1
665 03:16:27.561440 GENERIC: 0.0: enabled 1
666 03:16:27.564594
667 03:16:27.564678 GENERIC: 0.0: enabled 1
668 03:16:27.567974 GENERIC: 1.0: enabled 1
669 03:16:27.571348 GENERIC: 0.0: enabled 1
670 03:16:27.571433 GENERIC: 1.0: enabled 1
671 03:16:27.574734 USB0 port 0: enabled 1
672 03:16:27.577871 GENERIC: 0.0: enabled 1
673 03:16:27.581275 USB0 port 0: enabled 1
674 03:16:27.581359 GENERIC: 0.0: enabled 1
675 03:16:27.584471 I2C: 00:1a: enabled 1
676 03:16:27.587772 I2C: 00:31: enabled 1
677 03:16:27.587857 I2C: 00:32: enabled 1
678 03:16:27.591110 I2C: 00:10: enabled 1
679 03:16:27.594483 I2C: 00:15: enabled 1
680 03:16:27.594567 GENERIC: 0.0: enabled 0
681 03:16:27.597766 GENERIC: 1.0: enabled 0
682 03:16:27.601207 GENERIC: 0.0: enabled 1
683 03:16:27.604399 SPI: 00: enabled 1
684 03:16:27.604484 SPI: 00: enabled 1
685 03:16:27.607749 PNP: 0c09.0: enabled 1
686 03:16:27.610803 GENERIC: 0.0: enabled 1
687 03:16:27.610893 USB3 port 0: enabled 1
688 03:16:27.614115 USB3 port 1: enabled 1
689 03:16:27.617426 USB3 port 2: enabled 0
690 03:16:27.617504 USB3 port 3: enabled 0
691 03:16:27.620784 USB2 port 0: enabled 0
692 03:16:27.624106 USB2 port 1: enabled 1
693 03:16:27.627680 USB2 port 2: enabled 1
694 03:16:27.627764 USB2 port 3: enabled 0
695 03:16:27.630927 USB2 port 4: enabled 1
696 03:16:27.634187 USB2 port 5: enabled 0
697 03:16:27.634310 USB2 port 6: enabled 0
698 03:16:27.637235 USB2 port 7: enabled 0
699 03:16:27.640551 USB2 port 8: enabled 0
700 03:16:27.644138 USB2 port 9: enabled 0
701 03:16:27.644222 USB3 port 0: enabled 0
702 03:16:27.647430 USB3 port 1: enabled 1
703 03:16:27.650588 USB3 port 2: enabled 0
704 03:16:27.650672 USB3 port 3: enabled 0
705 03:16:27.654124 GENERIC: 0.0: enabled 1
706 03:16:27.657072 GENERIC: 1.0: enabled 1
707 03:16:27.657156 APIC: 01: enabled 1
708 03:16:27.660767 APIC: 05: enabled 1
709 03:16:27.664180 APIC: 07: enabled 1
710 03:16:27.664296 APIC: 02: enabled 1
711 03:16:27.667080 APIC: 04: enabled 1
712 03:16:27.670444 APIC: 06: enabled 1
713 03:16:27.670527 APIC: 03: enabled 1
714 03:16:27.673770 Compare with tree...
715 03:16:27.677086 Root Device: enabled 1
716 03:16:27.677195 DOMAIN: 0000: enabled 1
717 03:16:27.680243 PCI: 00:00.0: enabled 1
718 03:16:27.683929 PCI: 00:02.0: enabled 1
719 03:16:27.686880 PCI: 00:04.0: enabled 1
720 03:16:27.690591 GENERIC: 0.0: enabled 1
721 03:16:27.690675 PCI: 00:05.0: enabled 1
722 03:16:27.693506 PCI: 00:06.0: enabled 0
723 03:16:27.696845 PCI: 00:07.0: enabled 0
724 03:16:27.700303 GENERIC: 0.0: enabled 1
725 03:16:27.703519 PCI: 00:07.1: enabled 0
726 03:16:27.703603 GENERIC: 1.0: enabled 1
727 03:16:27.706678 PCI: 00:07.2: enabled 0
728 03:16:27.710087 GENERIC: 0.0: enabled 1
729 03:16:27.713343 PCI: 00:07.3: enabled 0
730 03:16:27.716569 GENERIC: 1.0: enabled 1
731 03:16:27.716654 PCI: 00:08.0: enabled 1
732 03:16:27.719941 PCI: 00:09.0: enabled 0
733 03:16:27.723317 PCI: 00:0a.0: enabled 0
734 03:16:27.726751 PCI: 00:0d.0: enabled 1
735 03:16:27.729940 USB0 port 0: enabled 1
736 03:16:27.730037 USB3 port 0: enabled 1
737 03:16:27.733578 USB3 port 1: enabled 1
738 03:16:27.736431 USB3 port 2: enabled 0
739 03:16:27.740037 USB3 port 3: enabled 0
740 03:16:27.743224 PCI: 00:0d.1: enabled 0
741 03:16:27.746581 PCI: 00:0d.2: enabled 0
742 03:16:27.746666 GENERIC: 0.0: enabled 1
743 03:16:27.749941 PCI: 00:0d.3: enabled 0
744 03:16:27.753462 PCI: 00:0e.0: enabled 0
745 03:16:27.756304 PCI: 00:10.2: enabled 1
746 03:16:27.759728 PCI: 00:10.6: enabled 0
747 03:16:27.759812 PCI: 00:10.7: enabled 0
748 03:16:27.763082 PCI: 00:12.0: enabled 0
749 03:16:27.766472 PCI: 00:12.6: enabled 0
750 03:16:27.769462 PCI: 00:13.0: enabled 0
751 03:16:27.772825 PCI: 00:14.0: enabled 1
752 03:16:27.772951 USB0 port 0: enabled 1
753 03:16:27.776210 USB2 port 0: enabled 0
754 03:16:27.779503 USB2 port 1: enabled 1
755 03:16:27.782713 USB2 port 2: enabled 1
756 03:16:27.786108 USB2 port 3: enabled 0
757 03:16:27.786192 USB2 port 4: enabled 1
758 03:16:27.789332 USB2 port 5: enabled 0
759 03:16:27.792900 USB2 port 6: enabled 0
760 03:16:27.796307 USB2 port 7: enabled 0
761 03:16:27.799357 USB2 port 8: enabled 0
762 03:16:27.802602 USB2 port 9: enabled 0
763 03:16:27.802686 USB3 port 0: enabled 0
764 03:16:27.805927 USB3 port 1: enabled 1
765 03:16:27.809214 USB3 port 2: enabled 0
766 03:16:27.812541 USB3 port 3: enabled 0
767 03:16:27.815967 PCI: 00:14.1: enabled 0
768 03:16:27.819355 PCI: 00:14.2: enabled 1
769 03:16:27.819454 PCI: 00:14.3: enabled 1
770 03:16:27.822383 GENERIC: 0.0: enabled 1
771 03:16:27.825923 PCI: 00:15.0: enabled 1
772 03:16:27.829049 I2C: 00:1a: enabled 1
773 03:16:27.829183 I2C: 00:31: enabled 1
774 03:16:27.832335 I2C: 00:32: enabled 1
775 03:16:27.835584 PCI: 00:15.1: enabled 1
776 03:16:27.838870 I2C: 00:10: enabled 1
777 03:16:27.842180 PCI: 00:15.2: enabled 1
778 03:16:27.842300 PCI: 00:15.3: enabled 1
779 03:16:27.845369 PCI: 00:16.0: enabled 1
780 03:16:27.848704 PCI: 00:16.1: enabled 0
781 03:16:27.852149 PCI: 00:16.2: enabled 0
782 03:16:27.855451 PCI: 00:16.3: enabled 0
783 03:16:27.855535 PCI: 00:16.4: enabled 0
784 03:16:27.858776 PCI: 00:16.5: enabled 0
785 03:16:27.862123 PCI: 00:17.0: enabled 1
786 03:16:27.865620 PCI: 00:19.0: enabled 0
787 03:16:27.868725 PCI: 00:19.1: enabled 1
788 03:16:27.868809 I2C: 00:15: enabled 1
789 03:16:27.872285 PCI: 00:19.2: enabled 0
790 03:16:27.875348 PCI: 00:1d.0: enabled 1
791 03:16:27.878933 GENERIC: 0.0: enabled 1
792 03:16:27.879021 PCI: 00:1e.0: enabled 1
793 03:16:27.929170 PCI: 00:1e.1: enabled 0
794 03:16:27.929319 PCI: 00:1e.2: enabled 1
795 03:16:27.929647 SPI: 00: enabled 1
796 03:16:27.929733 PCI: 00:1e.3: enabled 1
797 03:16:27.929796 SPI: 00: enabled 1
798 03:16:27.929859 PCI: 00:1f.0: enabled 1
799 03:16:27.929918 PNP: 0c09.0: enabled 1
800 03:16:27.930188 PCI: 00:1f.1: enabled 0
801 03:16:27.930292 PCI: 00:1f.2: enabled 1
802 03:16:27.930365 GENERIC: 0.0: enabled 1
803 03:16:27.930421 GENERIC: 0.0: enabled 1
804 03:16:27.930476 GENERIC: 1.0: enabled 1
805 03:16:27.930531 PCI: 00:1f.3: enabled 1
806 03:16:27.930603 PCI: 00:1f.4: enabled 0
807 03:16:27.930856 PCI: 00:1f.5: enabled 1
808 03:16:27.930915 PCI: 00:1f.6: enabled 0
809 03:16:27.930970 PCI: 00:1f.7: enabled 0
810 03:16:27.931024 CPU_CLUSTER: 0: enabled 1
811 03:16:27.931078 APIC: 00: enabled 1
812 03:16:27.981075 APIC: 01: enabled 1
813 03:16:27.981196 APIC: 05: enabled 1
814 03:16:27.981263 APIC: 07: enabled 1
815 03:16:27.981521 APIC: 02: enabled 1
816 03:16:27.981588 APIC: 04: enabled 1
817 03:16:27.981650 APIC: 06: enabled 1
818 03:16:27.981708 APIC: 03: enabled 1
819 03:16:27.981764 Root Device scanning...
820 03:16:27.981852 scan_static_bus for Root Device
821 03:16:27.981931 DOMAIN: 0000 enabled
822 03:16:27.982002 CPU_CLUSTER: 0 enabled
823 03:16:27.982074 DOMAIN: 0000 scanning...
824 03:16:27.982130 PCI: pci_scan_bus for bus 00
825 03:16:27.982187 PCI: 00:00.0 [8086/0000] ops
826 03:16:27.982253 PCI: 00:00.0 [8086/9a12] enabled
827 03:16:27.982508 PCI: 00:02.0 [8086/0000] bus ops
828 03:16:27.982571 PCI: 00:02.0 [8086/9a40] enabled
829 03:16:27.982646 PCI: 00:04.0 [8086/0000] bus ops
830 03:16:28.031335 PCI: 00:04.0 [8086/9a03] enabled
831 03:16:28.031511 PCI: 00:05.0 [8086/9a19] enabled
832 03:16:28.031612 PCI: 00:07.0 [0000/0000] hidden
833 03:16:28.031705 PCI: 00:08.0 [8086/9a11] enabled
834 03:16:28.032010 PCI: 00:0a.0 [8086/9a0d] disabled
835 03:16:28.032158 PCI: 00:0d.0 [8086/0000] bus ops
836 03:16:28.032308 PCI: 00:0d.0 [8086/9a13] enabled
837 03:16:28.032405 PCI: 00:14.0 [8086/0000] bus ops
838 03:16:28.032494 PCI: 00:14.0 [8086/a0ed] enabled
839 03:16:28.032579 PCI: 00:14.2 [8086/a0ef] enabled
840 03:16:28.032663 PCI: 00:14.3 [8086/0000] bus ops
841 03:16:28.032747 PCI: 00:14.3 [8086/a0f0] enabled
842 03:16:28.032828 PCI: 00:15.0 [8086/0000] bus ops
843 03:16:28.032909 PCI: 00:15.0 [8086/a0e8] enabled
844 03:16:28.032991 PCI: 00:15.1 [8086/0000] bus ops
845 03:16:28.035286 PCI: 00:15.1 [8086/a0e9] enabled
846 03:16:28.035425 PCI: 00:15.2 [8086/0000] bus ops
847 03:16:28.038653 PCI: 00:15.2 [8086/a0ea] enabled
848 03:16:28.041758 PCI: 00:15.3 [8086/0000] bus ops
849 03:16:28.045028 PCI: 00:15.3 [8086/a0eb] enabled
850 03:16:28.048572 PCI: 00:16.0 [8086/0000] ops
851 03:16:28.051900 PCI: 00:16.0 [8086/a0e0] enabled
852 03:16:28.058662 PCI: Static device PCI: 00:17.0 not found, disabling it.
853 03:16:28.061976 PCI: 00:19.0 [8086/0000] bus ops
854 03:16:28.065411 PCI: 00:19.0 [8086/a0c5] disabled
855 03:16:28.068570 PCI: 00:19.1 [8086/0000] bus ops
856 03:16:28.072048 PCI: 00:19.1 [8086/a0c6] enabled
857 03:16:28.075226 PCI: 00:1d.0 [8086/0000] bus ops
858 03:16:28.078397 PCI: 00:1d.0 [8086/a0b0] enabled
859 03:16:28.083187 PCI: 00:1e.0 [8086/0000] ops
860 03:16:28.085267 PCI: 00:1e.0 [8086/a0a8] enabled
861 03:16:28.088521 PCI: 00:1e.2 [8086/0000] bus ops
862 03:16:28.091749 PCI: 00:1e.2 [8086/a0aa] enabled
863 03:16:28.094914 PCI: 00:1e.3 [8086/0000] bus ops
864 03:16:28.098598 PCI: 00:1e.3 [8086/a0ab] enabled
865 03:16:28.101573 PCI: 00:1f.0 [8086/0000] bus ops
866 03:16:28.104819 PCI: 00:1f.0 [8086/a087] enabled
867 03:16:28.105278 RTC Init
868 03:16:28.108120 Set power on after power failure.
869 03:16:28.111520
870 03:16:28.111861 Disabling Deep S3
871 03:16:28.114813 Disabling Deep S3
872 03:16:28.115236 Disabling Deep S4
873 03:16:28.117971 Disabling Deep S4
874 03:16:28.118247 Disabling Deep S5
875 03:16:28.121420 Disabling Deep S5
876 03:16:28.124405 PCI: 00:1f.2 [0000/0000] hidden
877 03:16:28.127658 PCI: 00:1f.3 [8086/0000] bus ops
878 03:16:28.131134 PCI: 00:1f.3 [8086/a0c8] enabled
879 03:16:28.134230 PCI: 00:1f.5 [8086/0000] bus ops
880 03:16:28.137620 PCI: 00:1f.5 [8086/a0a4] enabled
881 03:16:28.141103 PCI: Leftover static devices:
882 03:16:28.141227 PCI: 00:10.2
883 03:16:28.144228 PCI: 00:10.6
884 03:16:28.144338 PCI: 00:10.7
885 03:16:28.147590 PCI: 00:06.0
886 03:16:28.147690 PCI: 00:07.1
887 03:16:28.147765 PCI: 00:07.2
888 03:16:28.150692 PCI: 00:07.3
889 03:16:28.150789 PCI: 00:09.0
890 03:16:28.154226 PCI: 00:0d.1
891 03:16:28.154316 PCI: 00:0d.2
892 03:16:28.154384 PCI: 00:0d.3
893 03:16:28.157409 PCI: 00:0e.0
894 03:16:28.157527 PCI: 00:12.0
895 03:16:28.160580 PCI: 00:12.6
896 03:16:28.160689 PCI: 00:13.0
897 03:16:28.163856 PCI: 00:14.1
898 03:16:28.163946 PCI: 00:16.1
899 03:16:28.164012 PCI: 00:16.2
900 03:16:28.167255 PCI: 00:16.3
901 03:16:28.167340 PCI: 00:16.4
902 03:16:28.170649 PCI: 00:16.5
903 03:16:28.170736 PCI: 00:17.0
904 03:16:28.170803 PCI: 00:19.2
905 03:16:28.174047 PCI: 00:1e.1
906 03:16:28.174134 PCI: 00:1f.1
907 03:16:28.177431 PCI: 00:1f.4
908 03:16:28.177520 PCI: 00:1f.6
909 03:16:28.177587 PCI: 00:1f.7
910 03:16:28.180579 PCI: Check your devicetree.cb.
911 03:16:28.184148 PCI: 00:02.0 scanning...
912 03:16:28.187162 scan_generic_bus for PCI: 00:02.0
913 03:16:28.190441 scan_generic_bus for PCI: 00:02.0 done
914 03:16:28.197189 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
915 03:16:28.200509 PCI: 00:04.0 scanning...
916 03:16:28.203795 scan_generic_bus for PCI: 00:04.0
917 03:16:28.203910 GENERIC: 0.0 enabled
918 03:16:28.210275 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
919 03:16:28.217119 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
920 03:16:28.217273 PCI: 00:0d.0 scanning...
921 03:16:28.220570 scan_static_bus for PCI: 00:0d.0
922 03:16:28.223929 USB0 port 0 enabled
923 03:16:28.227273 USB0 port 0 scanning...
924 03:16:28.230480 scan_static_bus for USB0 port 0
925 03:16:28.230563 USB3 port 0 enabled
926 03:16:28.233854
927 03:16:28.233939 USB3 port 1 enabled
928 03:16:28.237182 USB3 port 2 disabled
929 03:16:28.237261 USB3 port 3 disabled
930 03:16:28.240345 USB3 port 0 scanning...
931 03:16:28.243805 scan_static_bus for USB3 port 0
932 03:16:28.247119 scan_static_bus for USB3 port 0 done
933 03:16:28.253657 scan_bus: bus USB3 port 0 finished in 6 msecs
934 03:16:28.253753 USB3 port 1 scanning...
935 03:16:28.257346 scan_static_bus for USB3 port 1
936 03:16:28.263703 scan_static_bus for USB3 port 1 done
937 03:16:28.266984 scan_bus: bus USB3 port 1 finished in 6 msecs
938 03:16:28.270512 scan_static_bus for USB0 port 0 done
939 03:16:28.273807 scan_bus: bus USB0 port 0 finished in 43 msecs
940 03:16:28.280473 scan_static_bus for PCI: 00:0d.0 done
941 03:16:28.283865 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
942 03:16:28.286932 PCI: 00:14.0 scanning...
943 03:16:28.290384 scan_static_bus for PCI: 00:14.0
944 03:16:28.293560 USB0 port 0 enabled
945 03:16:28.293732 USB0 port 0 scanning...
946 03:16:28.296852 scan_static_bus for USB0 port 0
947 03:16:28.300136 USB2 port 0 disabled
948 03:16:28.303461 USB2 port 1 enabled
949 03:16:28.303570 USB2 port 2 enabled
950 03:16:28.306757 USB2 port 3 disabled
951 03:16:28.306860 USB2 port 4 enabled
952 03:16:28.310337 USB2 port 5 disabled
953 03:16:28.313616 USB2 port 6 disabled
954 03:16:28.313712 USB2 port 7 disabled
955 03:16:28.316635 USB2 port 8 disabled
956 03:16:28.320165 USB2 port 9 disabled
957 03:16:28.320254 USB3 port 0 disabled
958 03:16:28.323529 USB3 port 1 enabled
959 03:16:28.326600 USB3 port 2 disabled
960 03:16:28.326697 USB3 port 3 disabled
961 03:16:28.330264 USB2 port 1 scanning...
962 03:16:28.333501 scan_static_bus for USB2 port 1
963 03:16:28.336468 scan_static_bus for USB2 port 1 done
964 03:16:28.343143 scan_bus: bus USB2 port 1 finished in 6 msecs
965 03:16:28.343284 USB2 port 2 scanning...
966 03:16:28.346491 scan_static_bus for USB2 port 2
967 03:16:28.349902 scan_static_bus for USB2 port 2 done
968 03:16:28.356464 scan_bus: bus USB2 port 2 finished in 6 msecs
969 03:16:28.359925 USB2 port 4 scanning...
970 03:16:28.363302 scan_static_bus for USB2 port 4
971 03:16:28.366243 scan_static_bus for USB2 port 4 done
972 03:16:28.370004 scan_bus: bus USB2 port 4 finished in 6 msecs
973 03:16:28.373044 USB3 port 1 scanning...
974 03:16:28.376349 scan_static_bus for USB3 port 1
975 03:16:28.379786 scan_static_bus for USB3 port 1 done
976 03:16:28.383115 scan_bus: bus USB3 port 1 finished in 6 msecs
977 03:16:28.389355 scan_static_bus for USB0 port 0 done
978 03:16:28.393070 scan_bus: bus USB0 port 0 finished in 93 msecs
979 03:16:28.396270 scan_static_bus for PCI: 00:14.0 done
980 03:16:28.402900 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
981 03:16:28.403021 PCI: 00:14.3 scanning...
982 03:16:28.406293 scan_static_bus for PCI: 00:14.3
983 03:16:28.409286 GENERIC: 0.0 enabled
984 03:16:28.412836 scan_static_bus for PCI: 00:14.3 done
985 03:16:28.419521 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
986 03:16:28.419625 PCI: 00:15.0 scanning...
987 03:16:28.422778 scan_static_bus for PCI: 00:15.0
988 03:16:28.426226 I2C: 00:1a enabled
989 03:16:28.429262 I2C: 00:31 enabled
990 03:16:28.429346 I2C: 00:32 enabled
991 03:16:28.432611 scan_static_bus for PCI: 00:15.0 done
992 03:16:28.439150 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
993 03:16:28.442527 PCI: 00:15.1 scanning...
994 03:16:28.445698 scan_static_bus for PCI: 00:15.1
995 03:16:28.445784 I2C: 00:10 enabled
996 03:16:28.449326 scan_static_bus for PCI: 00:15.1 done
997 03:16:28.455693 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
998 03:16:28.459174 PCI: 00:15.2 scanning...
999 03:16:28.462651 scan_static_bus for PCI: 00:15.2
1000 03:16:28.466158 scan_static_bus for PCI: 00:15.2 done
1001 03:16:28.469441 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1002 03:16:28.472685 PCI: 00:15.3 scanning...
1003 03:16:28.475913 scan_static_bus for PCI: 00:15.3
1004 03:16:28.479178 scan_static_bus for PCI: 00:15.3 done
1005 03:16:28.486095 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1006 03:16:28.486186 PCI: 00:19.1 scanning...
1007 03:16:28.489224 scan_static_bus for PCI: 00:19.1
1008 03:16:28.492451 I2C: 00:15 enabled
1009 03:16:28.495927 scan_static_bus for PCI: 00:19.1 done
1010 03:16:28.502455 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1011 03:16:28.502548 PCI: 00:1d.0 scanning...
1012 03:16:28.508948 do_pci_scan_bridge for PCI: 00:1d.0
1013 03:16:28.509049 PCI: pci_scan_bus for bus 01
1014 03:16:28.512352 PCI: 01:00.0 [1c5c/174a] enabled
1015 03:16:28.515716 GENERIC: 0.0 enabled
1016 03:16:28.519158 Enabling Common Clock Configuration
1017 03:16:28.525640 L1 Sub-State supported from root port 29
1018 03:16:28.525736 L1 Sub-State Support = 0xf
1019 03:16:28.529038 CommonModeRestoreTime = 0x28
1020 03:16:28.535747 Power On Value = 0x16, Power On Scale = 0x0
1021 03:16:28.535838 ASPM: Enabled L1
1022 03:16:28.538779 PCIe: Max_Payload_Size adjusted to 128
1023 03:16:28.545492 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1024 03:16:28.545578 PCI: 00:1e.2 scanning...
1025 03:16:28.548991
1026 03:16:28.551973 scan_generic_bus for PCI: 00:1e.2
1027 03:16:28.552064 SPI: 00 enabled
1028 03:16:28.558731 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1029 03:16:28.562091 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1030 03:16:28.565115 PCI: 00:1e.3 scanning...
1031 03:16:28.568518 scan_generic_bus for PCI: 00:1e.3
1032 03:16:28.571744 SPI: 00 enabled
1033 03:16:28.578472 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1034 03:16:28.581703 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1035 03:16:28.585080 PCI: 00:1f.0 scanning...
1036 03:16:28.588336 scan_static_bus for PCI: 00:1f.0
1037 03:16:28.591762 PNP: 0c09.0 enabled
1038 03:16:28.591853 PNP: 0c09.0 scanning...
1039 03:16:28.595146 scan_static_bus for PNP: 0c09.0
1040 03:16:28.598448 scan_static_bus for PNP: 0c09.0 done
1041 03:16:28.605085 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1042 03:16:28.608110 scan_static_bus for PCI: 00:1f.0 done
1043 03:16:28.611674 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1044 03:16:28.614777 PCI: 00:1f.2 scanning...
1045 03:16:28.618089 scan_static_bus for PCI: 00:1f.2
1046 03:16:28.621403 GENERIC: 0.0 enabled
1047 03:16:28.624795 GENERIC: 0.0 scanning...
1048 03:16:28.628273 scan_static_bus for GENERIC: 0.0
1049 03:16:28.628358 GENERIC: 0.0 enabled
1050 03:16:28.631602 GENERIC: 1.0 enabled
1051 03:16:28.634579 scan_static_bus for GENERIC: 0.0 done
1052 03:16:28.641337 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1053 03:16:28.644552 scan_static_bus for PCI: 00:1f.2 done
1054 03:16:28.648083 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1055 03:16:28.651262 PCI: 00:1f.3 scanning...
1056 03:16:28.654664 scan_static_bus for PCI: 00:1f.3
1057 03:16:28.657725 scan_static_bus for PCI: 00:1f.3 done
1058 03:16:28.664389 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1059 03:16:28.664475 PCI: 00:1f.5 scanning...
1060 03:16:28.668035 scan_generic_bus for PCI: 00:1f.5
1061 03:16:28.671423
1062 03:16:28.674760 scan_generic_bus for PCI: 00:1f.5 done
1063 03:16:28.678135 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1064 03:16:28.684732 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1065 03:16:28.687791 scan_static_bus for Root Device done
1066 03:16:28.691406 scan_bus: bus Root Device finished in 737 msecs
1067 03:16:28.691492 done
1068 03:16:28.697401 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1069 03:16:28.701067 Chrome EC: UHEPI supported
1070 03:16:28.708199 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1071 03:16:28.714458 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1072 03:16:28.717843 SPI flash protection: WPSW=0 SRP0=0
1073 03:16:28.724481 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1074 03:16:28.727714 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1075 03:16:28.731118 found VGA at PCI: 00:02.0
1076 03:16:28.734600 Setting up VGA for PCI: 00:02.0
1077 03:16:28.741031 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1078 03:16:28.744449 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1079 03:16:28.747808 Allocating resources...
1080 03:16:28.751119 Reading resources...
1081 03:16:28.754461 Root Device read_resources bus 0 link: 0
1082 03:16:28.757369 DOMAIN: 0000 read_resources bus 0 link: 0
1083 03:16:28.764206 PCI: 00:04.0 read_resources bus 1 link: 0
1084 03:16:28.767310 PCI: 00:04.0 read_resources bus 1 link: 0 done
1085 03:16:28.774431 PCI: 00:0d.0 read_resources bus 0 link: 0
1086 03:16:28.777800 USB0 port 0 read_resources bus 0 link: 0
1087 03:16:28.784483 USB0 port 0 read_resources bus 0 link: 0 done
1088 03:16:28.787774 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1089 03:16:28.791119 PCI: 00:14.0 read_resources bus 0 link: 0
1090 03:16:28.794142
1091 03:16:28.797551 USB0 port 0 read_resources bus 0 link: 0
1092 03:16:28.804003 USB0 port 0 read_resources bus 0 link: 0 done
1093 03:16:28.807432 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 03:16:28.814038 PCI: 00:14.3 read_resources bus 0 link: 0
1095 03:16:28.817375 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 03:16:28.820603 PCI: 00:15.0 read_resources bus 0 link: 0
1097 03:16:28.823867
1098 03:16:28.826922 PCI: 00:15.0 read_resources bus 0 link: 0 done
1099 03:16:28.833389 PCI: 00:15.1 read_resources bus 0 link: 0
1100 03:16:28.836711 PCI: 00:15.1 read_resources bus 0 link: 0 done
1101 03:16:28.843738 PCI: 00:19.1 read_resources bus 0 link: 0
1102 03:16:28.847173 PCI: 00:19.1 read_resources bus 0 link: 0 done
1103 03:16:28.853771 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 03:16:28.857079 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 03:16:28.863706 PCI: 00:1e.2 read_resources bus 2 link: 0
1106 03:16:28.867096 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1107 03:16:28.873672 PCI: 00:1e.3 read_resources bus 3 link: 0
1108 03:16:28.877015 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1109 03:16:28.883559 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 03:16:28.886900 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 03:16:28.890243 PCI: 00:1f.2 read_resources bus 0 link: 0
1112 03:16:28.893650
1113 03:16:28.896951 GENERIC: 0.0 read_resources bus 0 link: 0
1114 03:16:28.900330 GENERIC: 0.0 read_resources bus 0 link: 0 done
1115 03:16:28.906939 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1116 03:16:28.913758 DOMAIN: 0000 read_resources bus 0 link: 0 done
1117 03:16:28.916722 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1118 03:16:28.923457 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1119 03:16:28.926758 Root Device read_resources bus 0 link: 0 done
1120 03:16:28.930115 Done reading resources.
1121 03:16:28.933463 Show resources in subtree (Root Device)...After reading.
1122 03:16:28.939879 Root Device child on link 0 DOMAIN: 0000
1123 03:16:28.943304 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1124 03:16:28.953237 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1125 03:16:28.963335 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1126 03:16:28.963428 PCI: 00:00.0
1127 03:16:28.973152 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1128 03:16:28.983223 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1129 03:16:28.993180 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1130 03:16:29.003211 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1131 03:16:29.012889 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1132 03:16:29.019540 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1133 03:16:29.029363 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1134 03:16:29.039335 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1135 03:16:29.049456 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1136 03:16:29.059203 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1137 03:16:29.069093 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1138 03:16:29.075826 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1139 03:16:29.085674 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1140 03:16:29.095685 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1141 03:16:29.105790 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1142 03:16:29.115678 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1143 03:16:29.125422 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1144 03:16:29.132184 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1145 03:16:29.142139 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1146 03:16:29.152216 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1147 03:16:29.155498 PCI: 00:02.0
1148 03:16:29.165495 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1149 03:16:29.175342 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1150 03:16:29.182103 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1151 03:16:29.188385 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1152 03:16:29.198554 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1153 03:16:29.198643 GENERIC: 0.0
1154 03:16:29.201759 PCI: 00:05.0
1155 03:16:29.211789 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1156 03:16:29.214757 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1157 03:16:29.218089 GENERIC: 0.0
1158 03:16:29.218177 PCI: 00:08.0
1159 03:16:29.228168 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 03:16:29.231472 PCI: 00:0a.0
1161 03:16:29.234494 PCI: 00:0d.0 child on link 0 USB0 port 0
1162 03:16:29.244585 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 03:16:29.251474 USB0 port 0 child on link 0 USB3 port 0
1164 03:16:29.251560 USB3 port 0
1165 03:16:29.254417 USB3 port 1
1166 03:16:29.254502 USB3 port 2
1167 03:16:29.257831 USB3 port 3
1168 03:16:29.261182 PCI: 00:14.0 child on link 0 USB0 port 0
1169 03:16:29.271266 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1170 03:16:29.274403 USB0 port 0 child on link 0 USB2 port 0
1171 03:16:29.277730 USB2 port 0
1172 03:16:29.281116 USB2 port 1
1173 03:16:29.281200 USB2 port 2
1174 03:16:29.284469 USB2 port 3
1175 03:16:29.284553 USB2 port 4
1176 03:16:29.287400 USB2 port 5
1177 03:16:29.287485 USB2 port 6
1178 03:16:29.290768 USB2 port 7
1179 03:16:29.290852 USB2 port 8
1180 03:16:29.294084 USB2 port 9
1181 03:16:29.294169 USB3 port 0
1182 03:16:29.297493 USB3 port 1
1183 03:16:29.297579 USB3 port 2
1184 03:16:29.300837 USB3 port 3
1185 03:16:29.300922 PCI: 00:14.2
1186 03:16:29.310977 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1187 03:16:29.320766 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1188 03:16:29.324107
1189 03:16:29.327507 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1190 03:16:29.337258 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 03:16:29.337345 GENERIC: 0.0
1192 03:16:29.343911 PCI: 00:15.0 child on link 0 I2C: 00:1a
1193 03:16:29.353692 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 03:16:29.353780 I2C: 00:1a
1195 03:16:29.356988 I2C: 00:31
1196 03:16:29.357074 I2C: 00:32
1197 03:16:29.360413 PCI: 00:15.1 child on link 0 I2C: 00:10
1198 03:16:29.370121 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 03:16:29.373325 I2C: 00:10
1200 03:16:29.373411 PCI: 00:15.2
1201 03:16:29.383492 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 03:16:29.386487 PCI: 00:15.3
1203 03:16:29.396606 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 03:16:29.396692 PCI: 00:16.0
1205 03:16:29.406597 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 03:16:29.410029 PCI: 00:19.0
1207 03:16:29.413059 PCI: 00:19.1 child on link 0 I2C: 00:15
1208 03:16:29.423187 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 03:16:29.426424 I2C: 00:15
1210 03:16:29.429737 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1211 03:16:29.439420 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1212 03:16:29.449444 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1213 03:16:29.456283 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1214 03:16:29.459289 GENERIC: 0.0
1215 03:16:29.462867 PCI: 01:00.0
1216 03:16:29.472792 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 03:16:29.479277 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1218 03:16:29.489393 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1219 03:16:29.492616 PCI: 00:1e.0
1220 03:16:29.502606 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1221 03:16:29.505615 PCI: 00:1e.2 child on link 0 SPI: 00
1222 03:16:29.515468 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 03:16:29.519175 SPI: 00
1224 03:16:29.522556 PCI: 00:1e.3 child on link 0 SPI: 00
1225 03:16:29.532174 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 03:16:29.532265 SPI: 00
1227 03:16:29.538817 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1228 03:16:29.545491 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1229 03:16:29.548814 PNP: 0c09.0
1230 03:16:29.555169 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1231 03:16:29.561863 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1232 03:16:29.572031 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1233 03:16:29.578492 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1234 03:16:29.585156 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1235 03:16:29.585290 GENERIC: 0.0
1236 03:16:29.588525 GENERIC: 1.0
1237 03:16:29.588646 PCI: 00:1f.3
1238 03:16:29.598387 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 03:16:29.608371 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1240 03:16:29.611687 PCI: 00:1f.5
1241 03:16:29.621490 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1242 03:16:29.624666 CPU_CLUSTER: 0 child on link 0 APIC: 00
1243 03:16:29.624754 APIC: 00
1244 03:16:29.628015 APIC: 01
1245 03:16:29.628100 APIC: 05
1246 03:16:29.631693 APIC: 07
1247 03:16:29.631779 APIC: 02
1248 03:16:29.631844 APIC: 04
1249 03:16:29.634656 APIC: 06
1250 03:16:29.634741 APIC: 03
1251 03:16:29.641403 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1252 03:16:29.647981 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1253 03:16:29.654822 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1254 03:16:29.661116 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1255 03:16:29.664420 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1256 03:16:29.667990 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1257 03:16:29.674476 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1258 03:16:29.681305 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1259 03:16:29.687613 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1260 03:16:29.694494 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1261 03:16:29.704198 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1262 03:16:29.707554 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1263 03:16:29.717521 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1264 03:16:29.724171 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1265 03:16:29.730915 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1266 03:16:29.733993 DOMAIN: 0000: Resource ranges:
1267 03:16:29.737378 * Base: 1000, Size: 800, Tag: 100
1268 03:16:29.740646 * Base: 1900, Size: e700, Tag: 100
1269 03:16:29.747455 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1270 03:16:29.753780 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1271 03:16:29.760822 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1272 03:16:29.767210 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1273 03:16:29.777168 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1274 03:16:29.783771 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1275 03:16:29.790133 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1276 03:16:29.800338 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1277 03:16:29.807062 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1278 03:16:29.813417 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1279 03:16:29.823168 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1280 03:16:29.829880 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1281 03:16:29.836413 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1282 03:16:29.846600 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1283 03:16:29.853290 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1284 03:16:29.859765 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1285 03:16:29.869541 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1286 03:16:29.876444 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1287 03:16:29.882795 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1288 03:16:29.892924 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1289 03:16:29.899496 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1290 03:16:29.906157 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1291 03:16:29.915892 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1292 03:16:29.922631 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1293 03:16:29.929274 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1294 03:16:29.932715 DOMAIN: 0000: Resource ranges:
1295 03:16:29.939319 * Base: 7fc00000, Size: 40400000, Tag: 200
1296 03:16:29.942363 * Base: d0000000, Size: 28000000, Tag: 200
1297 03:16:29.945669 * Base: fa000000, Size: 1000000, Tag: 200
1298 03:16:29.952197 * Base: fb001000, Size: 2fff000, Tag: 200
1299 03:16:29.955527 * Base: fe010000, Size: 2e000, Tag: 200
1300 03:16:29.958853 * Base: fe03f000, Size: d41000, Tag: 200
1301 03:16:29.962245 * Base: fed88000, Size: 8000, Tag: 200
1302 03:16:29.969008 * Base: fed93000, Size: d000, Tag: 200
1303 03:16:29.972464 * Base: feda2000, Size: 1e000, Tag: 200
1304 03:16:29.975779 * Base: fede0000, Size: 1220000, Tag: 200
1305 03:16:29.981969 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1306 03:16:29.988671 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1307 03:16:29.995468 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1308 03:16:30.002164 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1309 03:16:30.008563 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1310 03:16:30.015319 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1311 03:16:30.021597 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1312 03:16:30.028278 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1313 03:16:30.035237 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1314 03:16:30.041765 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1315 03:16:30.048327 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1316 03:16:30.054994 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1317 03:16:30.061351 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1318 03:16:30.068036 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1319 03:16:30.074643 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1320 03:16:30.081111 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1321 03:16:30.088401 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1322 03:16:30.094719 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1323 03:16:30.101255 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1324 03:16:30.108063 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1325 03:16:30.114417 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1326 03:16:30.121112 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1327 03:16:30.127823 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1328 03:16:30.134487 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1329 03:16:30.141127 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1330 03:16:30.144504 PCI: 00:1d.0: Resource ranges:
1331 03:16:30.150927 * Base: 7fc00000, Size: 100000, Tag: 200
1332 03:16:30.157420 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1333 03:16:30.164125 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1334 03:16:30.170841 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1335 03:16:30.177120 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1336 03:16:30.183772 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1337 03:16:30.190695 Root Device assign_resources, bus 0 link: 0
1338 03:16:30.193829 DOMAIN: 0000 assign_resources, bus 0 link: 0
1339 03:16:30.203749 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1340 03:16:30.210506 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1341 03:16:30.220326 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1342 03:16:30.227028 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1343 03:16:30.230118 PCI: 00:04.0 assign_resources, bus 1 link: 0
1344 03:16:30.237133 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 03:16:30.243528 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1346 03:16:30.253339 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1347 03:16:30.260274 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1348 03:16:30.266829 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1349 03:16:30.269958 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 03:16:30.279947 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1351 03:16:30.283207 PCI: 00:14.0 assign_resources, bus 0 link: 0
1352 03:16:30.286420 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 03:16:30.296511 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1354 03:16:30.303279 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1355 03:16:30.312896 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1356 03:16:30.316246 PCI: 00:14.3 assign_resources, bus 0 link: 0
1357 03:16:30.322862 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 03:16:30.329539 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1359 03:16:30.333016 PCI: 00:15.0 assign_resources, bus 0 link: 0
1360 03:16:30.339534 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 03:16:30.346179 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1362 03:16:30.352816 PCI: 00:15.1 assign_resources, bus 0 link: 0
1363 03:16:30.356137 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 03:16:30.366012 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1365 03:16:30.372752 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1366 03:16:30.382497 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1367 03:16:30.389071 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1368 03:16:30.395645 PCI: 00:19.1 assign_resources, bus 0 link: 0
1369 03:16:30.398851 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 03:16:30.408861 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1371 03:16:30.419007 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1372 03:16:30.425428 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1373 03:16:30.432207 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1374 03:16:30.438534 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1375 03:16:30.445344 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1376 03:16:30.455219 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1377 03:16:30.458616 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 03:16:30.468411 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 03:16:30.471849 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 03:16:30.478550 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 03:16:30.484928 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 03:16:30.488123 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 03:16:30.494782 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 03:16:30.498086 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 03:16:30.504597 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 03:16:30.507950 LPC: Trying to open IO window from 800 size 1ff
1387 03:16:30.517808 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 03:16:30.524361 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 03:16:30.534274 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 03:16:30.537702 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 03:16:30.541000 Root Device assign_resources, bus 0 link: 0
1392 03:16:30.544337
1393 03:16:30.544423 Done setting resources.
1394 03:16:30.550939 Show resources in subtree (Root Device)...After assigning values.
1395 03:16:30.554393 Root Device child on link 0 DOMAIN: 0000
1396 03:16:30.561166 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1397 03:16:30.570872 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1398 03:16:30.580855 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1399 03:16:30.580949 PCI: 00:00.0
1400 03:16:30.590840 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1401 03:16:30.600892 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1402 03:16:30.610693 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1403 03:16:30.617476 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1404 03:16:30.620445
1405 03:16:30.627208 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1406 03:16:30.637280 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1407 03:16:30.646963 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1408 03:16:30.657099 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1409 03:16:30.667156 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1410 03:16:30.673471 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1411 03:16:30.683644 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1412 03:16:30.693505 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1413 03:16:30.703460 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1414 03:16:30.713669 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1415 03:16:30.719943 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1416 03:16:30.729855 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1417 03:16:30.739991 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1418 03:16:30.749921 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1419 03:16:30.759695 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1420 03:16:30.769726 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1421 03:16:30.769819 PCI: 00:02.0
1422 03:16:30.783184 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1423 03:16:30.792879 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1424 03:16:30.802959 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1425 03:16:30.806159 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1426 03:16:30.816093 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1427 03:16:30.819480 GENERIC: 0.0
1428 03:16:30.819586 PCI: 00:05.0
1429 03:16:30.829280 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1430 03:16:30.835826 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1431 03:16:30.835928 GENERIC: 0.0
1432 03:16:30.839073 PCI: 00:08.0
1433 03:16:30.849249 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1434 03:16:30.849346 PCI: 00:0a.0
1435 03:16:30.855762 PCI: 00:0d.0 child on link 0 USB0 port 0
1436 03:16:30.865828 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1437 03:16:30.869182 USB0 port 0 child on link 0 USB3 port 0
1438 03:16:30.872354 USB3 port 0
1439 03:16:30.872452 USB3 port 1
1440 03:16:30.875790 USB3 port 2
1441 03:16:30.875885 USB3 port 3
1442 03:16:30.882277 PCI: 00:14.0 child on link 0 USB0 port 0
1443 03:16:30.892254 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1444 03:16:30.895632 USB0 port 0 child on link 0 USB2 port 0
1445 03:16:30.898784 USB2 port 0
1446 03:16:30.898887 USB2 port 1
1447 03:16:30.902232 USB2 port 2
1448 03:16:30.902343 USB2 port 3
1449 03:16:30.905428 USB2 port 4
1450 03:16:30.905523 USB2 port 5
1451 03:16:30.908672 USB2 port 6
1452 03:16:30.908775 USB2 port 7
1453 03:16:30.911989 USB2 port 8
1454 03:16:30.912087 USB2 port 9
1455 03:16:30.915422 USB3 port 0
1456 03:16:30.918831 USB3 port 1
1457 03:16:30.918912 USB3 port 2
1458 03:16:30.922129 USB3 port 3
1459 03:16:30.922225 PCI: 00:14.2
1460 03:16:30.931783 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1461 03:16:30.941712 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1462 03:16:30.948652 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1463 03:16:30.958365 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1464 03:16:30.958457 GENERIC: 0.0
1465 03:16:30.964892 PCI: 00:15.0 child on link 0 I2C: 00:1a
1466 03:16:30.975008 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1467 03:16:30.975098 I2C: 00:1a
1468 03:16:30.978179 I2C: 00:31
1469 03:16:30.978323 I2C: 00:32
1470 03:16:30.984812 PCI: 00:15.1 child on link 0 I2C: 00:10
1471 03:16:30.994727 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1472 03:16:30.994817 I2C: 00:10
1473 03:16:30.998039 PCI: 00:15.2
1474 03:16:31.008197 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1475 03:16:31.008288 PCI: 00:15.3
1476 03:16:31.017950 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1477 03:16:31.021336 PCI: 00:16.0
1478 03:16:31.031101 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1479 03:16:31.031194 PCI: 00:19.0
1480 03:16:31.034433
1481 03:16:31.037808 PCI: 00:19.1 child on link 0 I2C: 00:15
1482 03:16:31.047856 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1483 03:16:31.047946 I2C: 00:15
1484 03:16:31.054415 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1485 03:16:31.064212 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1486 03:16:31.074157 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1487 03:16:31.084152 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1488 03:16:31.087455 GENERIC: 0.0
1489 03:16:31.087581 PCI: 01:00.0
1490 03:16:31.097322 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1491 03:16:31.110483 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1492 03:16:31.120596 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1493 03:16:31.120719 PCI: 00:1e.0
1494 03:16:31.133728 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1495 03:16:31.137048 PCI: 00:1e.2 child on link 0 SPI: 00
1496 03:16:31.146919 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1497 03:16:31.147008 SPI: 00
1498 03:16:31.153441 PCI: 00:1e.3 child on link 0 SPI: 00
1499 03:16:31.163742 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1500 03:16:31.163830 SPI: 00
1501 03:16:31.166689 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1502 03:16:31.176923 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1503 03:16:31.180193 PNP: 0c09.0
1504 03:16:31.186611 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1505 03:16:31.193470 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1506 03:16:31.200012 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1507 03:16:31.209792 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1508 03:16:31.216374 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1509 03:16:31.216460 GENERIC: 0.0
1510 03:16:31.219824 GENERIC: 1.0
1511 03:16:31.219911 PCI: 00:1f.3
1512 03:16:31.229554 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1513 03:16:31.242980 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1514 03:16:31.243070 PCI: 00:1f.5
1515 03:16:31.252801 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1516 03:16:31.256181 CPU_CLUSTER: 0 child on link 0 APIC: 00
1517 03:16:31.259502 APIC: 00
1518 03:16:31.259587 APIC: 01
1519 03:16:31.262843 APIC: 05
1520 03:16:31.262929 APIC: 07
1521 03:16:31.262998 APIC: 02
1522 03:16:31.266029 APIC: 04
1523 03:16:31.266115 APIC: 06
1524 03:16:31.269413 APIC: 03
1525 03:16:31.269498 Done allocating resources.
1526 03:16:31.276004 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1527 03:16:31.282669 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1528 03:16:31.286000 Configure GPIOs for I2S audio on UP4.
1529 03:16:31.293115 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1530 03:16:31.296504 Enabling resources...
1531 03:16:31.299876 PCI: 00:00.0 subsystem <- 8086/9a12
1532 03:16:31.302878 PCI: 00:00.0 cmd <- 06
1533 03:16:31.306159 PCI: 00:02.0 subsystem <- 8086/9a40
1534 03:16:31.309431 PCI: 00:02.0 cmd <- 03
1535 03:16:31.313026 PCI: 00:04.0 subsystem <- 8086/9a03
1536 03:16:31.315999 PCI: 00:04.0 cmd <- 02
1537 03:16:31.319281 PCI: 00:05.0 subsystem <- 8086/9a19
1538 03:16:31.319366 PCI: 00:05.0 cmd <- 02
1539 03:16:31.326167 PCI: 00:08.0 subsystem <- 8086/9a11
1540 03:16:31.326291 PCI: 00:08.0 cmd <- 06
1541 03:16:31.329524 PCI: 00:0d.0 subsystem <- 8086/9a13
1542 03:16:31.332767 PCI: 00:0d.0 cmd <- 02
1543 03:16:31.335971 PCI: 00:14.0 subsystem <- 8086/a0ed
1544 03:16:31.339471 PCI: 00:14.0 cmd <- 02
1545 03:16:31.342549 PCI: 00:14.2 subsystem <- 8086/a0ef
1546 03:16:31.346123 PCI: 00:14.2 cmd <- 02
1547 03:16:31.349529 PCI: 00:14.3 subsystem <- 8086/a0f0
1548 03:16:31.352538 PCI: 00:14.3 cmd <- 02
1549 03:16:31.355817 PCI: 00:15.0 subsystem <- 8086/a0e8
1550 03:16:31.359268 PCI: 00:15.0 cmd <- 02
1551 03:16:31.362572 PCI: 00:15.1 subsystem <- 8086/a0e9
1552 03:16:31.365876 PCI: 00:15.1 cmd <- 02
1553 03:16:31.368807 PCI: 00:15.2 subsystem <- 8086/a0ea
1554 03:16:31.372227 PCI: 00:15.2 cmd <- 02
1555 03:16:31.375535 PCI: 00:15.3 subsystem <- 8086/a0eb
1556 03:16:31.375618 PCI: 00:15.3 cmd <- 02
1557 03:16:31.382209 PCI: 00:16.0 subsystem <- 8086/a0e0
1558 03:16:31.382327 PCI: 00:16.0 cmd <- 02
1559 03:16:31.385310 PCI: 00:19.1 subsystem <- 8086/a0c6
1560 03:16:31.388670 PCI: 00:19.1 cmd <- 02
1561 03:16:31.391917 PCI: 00:1d.0 bridge ctrl <- 0013
1562 03:16:31.395396 PCI: 00:1d.0 subsystem <- 8086/a0b0
1563 03:16:31.398757 PCI: 00:1d.0 cmd <- 06
1564 03:16:31.401814 PCI: 00:1e.0 subsystem <- 8086/a0a8
1565 03:16:31.405206 PCI: 00:1e.0 cmd <- 06
1566 03:16:31.408429 PCI: 00:1e.2 subsystem <- 8086/a0aa
1567 03:16:31.411670 PCI: 00:1e.2 cmd <- 06
1568 03:16:31.415241 PCI: 00:1e.3 subsystem <- 8086/a0ab
1569 03:16:31.418463 PCI: 00:1e.3 cmd <- 02
1570 03:16:31.421732 PCI: 00:1f.0 subsystem <- 8086/a087
1571 03:16:31.425018 PCI: 00:1f.0 cmd <- 407
1572 03:16:31.428311 PCI: 00:1f.3 subsystem <- 8086/a0c8
1573 03:16:31.428395 PCI: 00:1f.3 cmd <- 02
1574 03:16:31.435122 PCI: 00:1f.5 subsystem <- 8086/a0a4
1575 03:16:31.435206 PCI: 00:1f.5 cmd <- 406
1576 03:16:31.440441 PCI: 01:00.0 cmd <- 02
1577 03:16:31.445205 done.
1578 03:16:31.448552 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1579 03:16:31.451686 Initializing devices...
1580 03:16:31.455029 Root Device init
1581 03:16:31.458401 Chrome EC: Set SMI mask to 0x0000000000000000
1582 03:16:31.464926 Chrome EC: clear events_b mask to 0x0000000000000000
1583 03:16:31.471469 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1584 03:16:31.474894 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1585 03:16:31.481638 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1586 03:16:31.488280 Chrome EC: Set WAKE mask to 0x0000000000000000
1587 03:16:31.491729 fw_config match found: DB_USB=USB3_ACTIVE
1588 03:16:31.498480 Configure Right Type-C port orientation for retimer
1589 03:16:31.501361 Root Device init finished in 43 msecs
1590 03:16:31.504723 PCI: 00:00.0 init
1591 03:16:31.508128 CPU TDP = 9 Watts
1592 03:16:31.508212 CPU PL1 = 9 Watts
1593 03:16:31.511421 CPU PL2 = 40 Watts
1594 03:16:31.514687 CPU PL4 = 83 Watts
1595 03:16:31.517769 PCI: 00:00.0 init finished in 8 msecs
1596 03:16:31.517848 PCI: 00:02.0 init
1597 03:16:31.521458 GMA: Found VBT in CBFS
1598 03:16:31.524607 GMA: Found valid VBT in CBFS
1599 03:16:31.530960 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1600 03:16:31.537778 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1601 03:16:31.541181 PCI: 00:02.0 init finished in 18 msecs
1602 03:16:31.544462 PCI: 00:05.0 init
1603 03:16:31.547869 PCI: 00:05.0 init finished in 0 msecs
1604 03:16:31.550857 PCI: 00:08.0 init
1605 03:16:31.554303 PCI: 00:08.0 init finished in 0 msecs
1606 03:16:31.557726 PCI: 00:14.0 init
1607 03:16:31.561062 PCI: 00:14.0 init finished in 0 msecs
1608 03:16:31.564343 PCI: 00:14.2 init
1609 03:16:31.567396 PCI: 00:14.2 init finished in 0 msecs
1610 03:16:31.570609 PCI: 00:15.0 init
1611 03:16:31.570694 I2C bus 0 version 0x3230302a
1612 03:16:31.577256 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1613 03:16:31.580717 PCI: 00:15.0 init finished in 6 msecs
1614 03:16:31.580803 PCI: 00:15.1 init
1615 03:16:31.583954 I2C bus 1 version 0x3230302a
1616 03:16:31.587350 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1617 03:16:31.593929 PCI: 00:15.1 init finished in 6 msecs
1618 03:16:31.594018 PCI: 00:15.2 init
1619 03:16:31.596979 I2C bus 2 version 0x3230302a
1620 03:16:31.600285 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1621 03:16:31.603674 PCI: 00:15.2 init finished in 6 msecs
1622 03:16:31.606949 PCI: 00:15.3 init
1623 03:16:31.610177 I2C bus 3 version 0x3230302a
1624 03:16:31.613754 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1625 03:16:31.616769 PCI: 00:15.3 init finished in 6 msecs
1626 03:16:31.620075 PCI: 00:16.0 init
1627 03:16:31.623481 PCI: 00:16.0 init finished in 0 msecs
1628 03:16:31.626945 PCI: 00:19.1 init
1629 03:16:31.630244 I2C bus 5 version 0x3230302a
1630 03:16:31.633693 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1631 03:16:31.636837 PCI: 00:19.1 init finished in 6 msecs
1632 03:16:31.640312 PCI: 00:1d.0 init
1633 03:16:31.640397 Initializing PCH PCIe bridge.
1634 03:16:31.643256
1635 03:16:31.646622 PCI: 00:1d.0 init finished in 3 msecs
1636 03:16:31.649909 PCI: 00:1f.0 init
1637 03:16:31.653347 IOAPIC: Initializing IOAPIC at 0xfec00000
1638 03:16:31.656635 IOAPIC: Bootstrap Processor Local APIC = 0x00
1639 03:16:31.660170 IOAPIC: ID = 0x02
1640 03:16:31.663349 IOAPIC: Dumping registers
1641 03:16:31.663434 reg 0x0000: 0x02000000
1642 03:16:31.666412 reg 0x0001: 0x00770020
1643 03:16:31.669714 reg 0x0002: 0x00000000
1644 03:16:31.673130 PCI: 00:1f.0 init finished in 21 msecs
1645 03:16:31.676409 PCI: 00:1f.2 init
1646 03:16:31.680037 Disabling ACPI via APMC.
1647 03:16:31.680126 APMC done.
1648 03:16:31.683575 PCI: 00:1f.2 init finished in 5 msecs
1649 03:16:31.696832 PCI: 01:00.0 init
1650 03:16:31.700240 PCI: 01:00.0 init finished in 0 msecs
1651 03:16:31.703596 PNP: 0c09.0 init
1652 03:16:31.706948 Google Chrome EC uptime: 8.367 seconds
1653 03:16:31.713430 Google Chrome AP resets since EC boot: 1
1654 03:16:31.716747 Google Chrome most recent AP reset causes:
1655 03:16:31.719884 0.346: 32775 shutdown: entering G3
1656 03:16:31.726859 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1657 03:16:31.730011 PNP: 0c09.0 init finished in 22 msecs
1658 03:16:31.735558 Devices initialized
1659 03:16:31.739159 Show all devs... After init.
1660 03:16:31.742546 Root Device: enabled 1
1661 03:16:31.742632 DOMAIN: 0000: enabled 1
1662 03:16:31.745550 CPU_CLUSTER: 0: enabled 1
1663 03:16:31.748828 PCI: 00:00.0: enabled 1
1664 03:16:31.752215 PCI: 00:02.0: enabled 1
1665 03:16:31.752301 PCI: 00:04.0: enabled 1
1666 03:16:31.755579 PCI: 00:05.0: enabled 1
1667 03:16:31.758964 PCI: 00:06.0: enabled 0
1668 03:16:31.762333 PCI: 00:07.0: enabled 0
1669 03:16:31.762419 PCI: 00:07.1: enabled 0
1670 03:16:31.765662 PCI: 00:07.2: enabled 0
1671 03:16:31.768891 PCI: 00:07.3: enabled 0
1672 03:16:31.772234 PCI: 00:08.0: enabled 1
1673 03:16:31.772320 PCI: 00:09.0: enabled 0
1674 03:16:31.775583 PCI: 00:0a.0: enabled 0
1675 03:16:31.778793 PCI: 00:0d.0: enabled 1
1676 03:16:31.778879 PCI: 00:0d.1: enabled 0
1677 03:16:31.782078
1678 03:16:31.782167 PCI: 00:0d.2: enabled 0
1679 03:16:31.785449 PCI: 00:0d.3: enabled 0
1680 03:16:31.788792 PCI: 00:0e.0: enabled 0
1681 03:16:31.788876 PCI: 00:10.2: enabled 1
1682 03:16:31.792370 PCI: 00:10.6: enabled 0
1683 03:16:31.795391 PCI: 00:10.7: enabled 0
1684 03:16:31.798855 PCI: 00:12.0: enabled 0
1685 03:16:31.798940 PCI: 00:12.6: enabled 0
1686 03:16:31.802175 PCI: 00:13.0: enabled 0
1687 03:16:31.805590 PCI: 00:14.0: enabled 1
1688 03:16:31.808848 PCI: 00:14.1: enabled 0
1689 03:16:31.808933 PCI: 00:14.2: enabled 1
1690 03:16:31.812112 PCI: 00:14.3: enabled 1
1691 03:16:31.815336 PCI: 00:15.0: enabled 1
1692 03:16:31.818869 PCI: 00:15.1: enabled 1
1693 03:16:31.818953 PCI: 00:15.2: enabled 1
1694 03:16:31.822127 PCI: 00:15.3: enabled 1
1695 03:16:31.825374 PCI: 00:16.0: enabled 1
1696 03:16:31.825459 PCI: 00:16.1: enabled 0
1697 03:16:31.828613 PCI: 00:16.2: enabled 0
1698 03:16:31.832171 PCI: 00:16.3: enabled 0
1699 03:16:31.835290 PCI: 00:16.4: enabled 0
1700 03:16:31.835382 PCI: 00:16.5: enabled 0
1701 03:16:31.838617 PCI: 00:17.0: enabled 0
1702 03:16:31.841938 PCI: 00:19.0: enabled 0
1703 03:16:31.845314 PCI: 00:19.1: enabled 1
1704 03:16:31.845399 PCI: 00:19.2: enabled 0
1705 03:16:31.848673 PCI: 00:1c.0: enabled 1
1706 03:16:31.851982 PCI: 00:1c.1: enabled 0
1707 03:16:31.855216 PCI: 00:1c.2: enabled 0
1708 03:16:31.855300 PCI: 00:1c.3: enabled 0
1709 03:16:31.858562 PCI: 00:1c.4: enabled 0
1710 03:16:31.861980 PCI: 00:1c.5: enabled 0
1711 03:16:31.862065 PCI: 00:1c.6: enabled 1
1712 03:16:31.865267
1713 03:16:31.865352 PCI: 00:1c.7: enabled 0
1714 03:16:31.868361 PCI: 00:1d.0: enabled 1
1715 03:16:31.871726 PCI: 00:1d.1: enabled 0
1716 03:16:31.871811 PCI: 00:1d.2: enabled 1
1717 03:16:31.875380 PCI: 00:1d.3: enabled 0
1718 03:16:31.878257 PCI: 00:1e.0: enabled 1
1719 03:16:31.881939 PCI: 00:1e.1: enabled 0
1720 03:16:31.882024 PCI: 00:1e.2: enabled 1
1721 03:16:31.885093 PCI: 00:1e.3: enabled 1
1722 03:16:31.888206 PCI: 00:1f.0: enabled 1
1723 03:16:31.891887 PCI: 00:1f.1: enabled 0
1724 03:16:31.891973 PCI: 00:1f.2: enabled 1
1725 03:16:31.895187 PCI: 00:1f.3: enabled 1
1726 03:16:31.898162 PCI: 00:1f.4: enabled 0
1727 03:16:31.901524 PCI: 00:1f.5: enabled 1
1728 03:16:31.901610 PCI: 00:1f.6: enabled 0
1729 03:16:31.904833 PCI: 00:1f.7: enabled 0
1730 03:16:31.908448 APIC: 00: enabled 1
1731 03:16:31.908533 GENERIC: 0.0: enabled 1
1732 03:16:31.911459 GENERIC: 0.0: enabled 1
1733 03:16:31.914926 GENERIC: 1.0: enabled 1
1734 03:16:31.918135 GENERIC: 0.0: enabled 1
1735 03:16:31.918225 GENERIC: 1.0: enabled 1
1736 03:16:31.921430 USB0 port 0: enabled 1
1737 03:16:31.924618 GENERIC: 0.0: enabled 1
1738 03:16:31.924706 USB0 port 0: enabled 1
1739 03:16:31.928141
1740 03:16:31.928248 GENERIC: 0.0: enabled 1
1741 03:16:31.931390 I2C: 00:1a: enabled 1
1742 03:16:31.934636 I2C: 00:31: enabled 1
1743 03:16:31.934720 I2C: 00:32: enabled 1
1744 03:16:31.938009 I2C: 00:10: enabled 1
1745 03:16:31.941495 I2C: 00:15: enabled 1
1746 03:16:31.941580 GENERIC: 0.0: enabled 0
1747 03:16:31.944667 GENERIC: 1.0: enabled 0
1748 03:16:31.947996 GENERIC: 0.0: enabled 1
1749 03:16:31.948081 SPI: 00: enabled 1
1750 03:16:31.951394 SPI: 00: enabled 1
1751 03:16:31.954451 PNP: 0c09.0: enabled 1
1752 03:16:31.954536 GENERIC: 0.0: enabled 1
1753 03:16:31.958185 USB3 port 0: enabled 1
1754 03:16:31.961176 USB3 port 1: enabled 1
1755 03:16:31.964520 USB3 port 2: enabled 0
1756 03:16:31.964605 USB3 port 3: enabled 0
1757 03:16:31.967901 USB2 port 0: enabled 0
1758 03:16:31.971291 USB2 port 1: enabled 1
1759 03:16:31.971375 USB2 port 2: enabled 1
1760 03:16:31.974547 USB2 port 3: enabled 0
1761 03:16:31.977887 USB2 port 4: enabled 1
1762 03:16:31.977971 USB2 port 5: enabled 0
1763 03:16:31.981264
1764 03:16:31.981348 USB2 port 6: enabled 0
1765 03:16:31.984576 USB2 port 7: enabled 0
1766 03:16:31.987884 USB2 port 8: enabled 0
1767 03:16:31.987969 USB2 port 9: enabled 0
1768 03:16:31.991164 USB3 port 0: enabled 0
1769 03:16:31.994132 USB3 port 1: enabled 1
1770 03:16:31.994238 USB3 port 2: enabled 0
1771 03:16:31.997695 USB3 port 3: enabled 0
1772 03:16:32.001002 GENERIC: 0.0: enabled 1
1773 03:16:32.004396 GENERIC: 1.0: enabled 1
1774 03:16:32.004506 APIC: 01: enabled 1
1775 03:16:32.007618 APIC: 05: enabled 1
1776 03:16:32.010913 APIC: 07: enabled 1
1777 03:16:32.011011 APIC: 02: enabled 1
1778 03:16:32.014164 APIC: 04: enabled 1
1779 03:16:32.014273 APIC: 06: enabled 1
1780 03:16:32.017546 APIC: 03: enabled 1
1781 03:16:32.020671 PCI: 01:00.0: enabled 1
1782 03:16:32.024078 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1783 03:16:32.030872 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1784 03:16:32.034122 ELOG: NV offset 0xf30000 size 0x1000
1785 03:16:32.041184 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1786 03:16:32.047444 ELOG: Event(17) added with size 13 at 2023-01-19 03:16:32 UTC
1787 03:16:32.054005 ELOG: Event(92) added with size 9 at 2023-01-19 03:16:32 UTC
1788 03:16:32.060663 ELOG: Event(93) added with size 9 at 2023-01-19 03:16:32 UTC
1789 03:16:32.067495 ELOG: Event(9E) added with size 10 at 2023-01-19 03:16:32 UTC
1790 03:16:32.074197 ELOG: Event(9F) added with size 14 at 2023-01-19 03:16:32 UTC
1791 03:16:32.080562 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1792 03:16:32.083809 ELOG: Event(A1) added with size 10 at 2023-01-19 03:16:32 UTC
1793 03:16:32.093960 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1794 03:16:32.100628 ELOG: Event(A0) added with size 9 at 2023-01-19 03:16:32 UTC
1795 03:16:32.104000 elog_add_boot_reason: Logged dev mode boot
1796 03:16:32.110352 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1797 03:16:32.110461 Finalize devices...
1798 03:16:32.113693 Devices finalized
1799 03:16:32.120806 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1800 03:16:32.123762 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1801 03:16:32.130052 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1802 03:16:32.133425 ME: HFSTS1 : 0x80030055
1803 03:16:32.140332 ME: HFSTS2 : 0x30280116
1804 03:16:32.143675 ME: HFSTS3 : 0x00000050
1805 03:16:32.146969 ME: HFSTS4 : 0x00004000
1806 03:16:32.153621 ME: HFSTS5 : 0x00000000
1807 03:16:32.156784 ME: HFSTS6 : 0x00400006
1808 03:16:32.160153 ME: Manufacturing Mode : YES
1809 03:16:32.163543 ME: SPI Protection Mode Enabled : NO
1810 03:16:32.166479 ME: FW Partition Table : OK
1811 03:16:32.170015
1812 03:16:32.173292 ME: Bringup Loader Failure : NO
1813 03:16:32.176551 ME: Firmware Init Complete : NO
1814 03:16:32.179923 ME: Boot Options Present : NO
1815 03:16:32.183360 ME: Update In Progress : NO
1816 03:16:32.186622 ME: D0i3 Support : YES
1817 03:16:32.190051 ME: Low Power State Enabled : NO
1818 03:16:32.193378 ME: CPU Replaced : YES
1819 03:16:32.199666 ME: CPU Replacement Valid : YES
1820 03:16:32.202972 ME: Current Working State : 5
1821 03:16:32.206467 ME: Current Operation State : 1
1822 03:16:32.209839 ME: Current Operation Mode : 3
1823 03:16:32.213138 ME: Error Code : 0
1824 03:16:32.216401 ME: Enhanced Debug Mode : NO
1825 03:16:32.219622 ME: CPU Debug Disabled : YES
1826 03:16:32.223009 ME: TXT Support : NO
1827 03:16:32.229538 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1828 03:16:32.236358 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1829 03:16:32.239721 CBFS: 'fallback/slic' not found.
1830 03:16:32.246296 ACPI: Writing ACPI tables at 76b01000.
1831 03:16:32.246395 ACPI: * FACS
1832 03:16:32.249355 ACPI: * DSDT
1833 03:16:32.252805 Ramoops buffer: 0x100000@0x76a00000.
1834 03:16:32.256142 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1835 03:16:32.262924 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1836 03:16:32.266018 Google Chrome EC: version:
1837 03:16:32.269221 ro: voema_v2.0.7540-147f8d37d1
1838 03:16:32.272632 rw: voema_v2.0.7540-147f8d37d1
1839 03:16:32.272725 running image: 2
1840 03:16:32.279221 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1841 03:16:32.283836 ACPI: * FADT
1842 03:16:32.283961 SCI is IRQ9
1843 03:16:32.287032 ACPI: added table 1/32, length now 40
1844 03:16:32.290383
1845 03:16:32.290468 ACPI: * SSDT
1846 03:16:32.293567 Found 1 CPU(s) with 8 core(s) each.
1847 03:16:32.300206 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1848 03:16:32.303469 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1849 03:16:32.306942 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1850 03:16:32.310106 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1851 03:16:32.316981 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1852 03:16:32.323577 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1853 03:16:32.326720 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1854 03:16:32.333652 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1855 03:16:32.340311 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1856 03:16:32.343580 \_SB.PCI0.RP09: Added StorageD3Enable property
1857 03:16:32.346610 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1858 03:16:32.353211 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1859 03:16:32.359883 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1860 03:16:32.363266 PS2K: Passing 80 keymaps to kernel
1861 03:16:32.369838 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1862 03:16:32.376411 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1863 03:16:32.383001 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1864 03:16:32.389581 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1865 03:16:32.396425 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1866 03:16:32.402880 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1867 03:16:32.409644 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1868 03:16:32.416133 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1869 03:16:32.419408 ACPI: added table 2/32, length now 44
1870 03:16:32.419496 ACPI: * MCFG
1871 03:16:32.422632 ACPI: added table 3/32, length now 48
1872 03:16:32.426151 ACPI: * TPM2
1873 03:16:32.429461 TPM2 log created at 0x769f0000
1874 03:16:32.432694 ACPI: added table 4/32, length now 52
1875 03:16:32.435988 ACPI: * MADT
1876 03:16:32.436077 SCI is IRQ9
1877 03:16:32.439538 ACPI: added table 5/32, length now 56
1878 03:16:32.442698 current = 76b09850
1879 03:16:32.442785 ACPI: * DMAR
1880 03:16:32.445872 ACPI: added table 6/32, length now 60
1881 03:16:32.449315 ACPI: added table 7/32, length now 64
1882 03:16:32.452440
1883 03:16:32.452531 ACPI: * HPET
1884 03:16:32.455986 ACPI: added table 8/32, length now 68
1885 03:16:32.459467 ACPI: done.
1886 03:16:32.459555 ACPI tables: 35216 bytes.
1887 03:16:32.462421 smbios_write_tables: 769ef000
1888 03:16:32.465666 EC returned error result code 3
1889 03:16:32.469003 Couldn't obtain OEM name from CBI
1890 03:16:32.472656 Create SMBIOS type 16
1891 03:16:32.475897 Create SMBIOS type 17
1892 03:16:32.479177 GENERIC: 0.0 (WIFI Device)
1893 03:16:32.479265 SMBIOS tables: 1750 bytes.
1894 03:16:32.482423
1895 03:16:32.485620 Writing table forward entry at 0x00000500
1896 03:16:32.492171 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1897 03:16:32.495500 Writing coreboot table at 0x76b25000
1898 03:16:32.502550 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1899 03:16:32.505383 1. 0000000000001000-000000000009ffff: RAM
1900 03:16:32.508717 2. 00000000000a0000-00000000000fffff: RESERVED
1901 03:16:32.515622 3. 0000000000100000-00000000769eefff: RAM
1902 03:16:32.518767 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1903 03:16:32.525239 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1904 03:16:32.531938 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1905 03:16:32.535163 7. 0000000077000000-000000007fbfffff: RESERVED
1906 03:16:32.541947 8. 00000000c0000000-00000000cfffffff: RESERVED
1907 03:16:32.545345 9. 00000000f8000000-00000000f9ffffff: RESERVED
1908 03:16:32.548606 10. 00000000fb000000-00000000fb000fff: RESERVED
1909 03:16:32.555294 11. 00000000fe000000-00000000fe00ffff: RESERVED
1910 03:16:32.558498 12. 00000000fed80000-00000000fed87fff: RESERVED
1911 03:16:32.565047 13. 00000000fed90000-00000000fed92fff: RESERVED
1912 03:16:32.568393 14. 00000000feda0000-00000000feda1fff: RESERVED
1913 03:16:32.574939 15. 00000000fedc0000-00000000feddffff: RESERVED
1914 03:16:32.578184 16. 0000000100000000-00000002803fffff: RAM
1915 03:16:32.581490 Passing 4 GPIOs to payload:
1916 03:16:32.584761 NAME | PORT | POLARITY | VALUE
1917 03:16:32.591534 lid | undefined | high | high
1918 03:16:32.598115 power | undefined | high | low
1919 03:16:32.601305 oprom | undefined | high | low
1920 03:16:32.607995 EC in RW | 0x000000e5 | high | high
1921 03:16:32.614543 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 9e26
1922 03:16:32.617844 coreboot table: 1576 bytes.
1923 03:16:32.621156 IMD ROOT 0. 0x76fff000 0x00001000
1924 03:16:32.624408 IMD SMALL 1. 0x76ffe000 0x00001000
1925 03:16:32.627947 FSP MEMORY 2. 0x76c4e000 0x003b0000
1926 03:16:32.631292 VPD 3. 0x76c4d000 0x00000367
1927 03:16:32.634489 RO MCACHE 4. 0x76c4c000 0x00000fdc
1928 03:16:32.637752 CONSOLE 5. 0x76c2c000 0x00020000
1929 03:16:32.644413 FMAP 6. 0x76c2b000 0x00000578
1930 03:16:32.647599 TIME STAMP 7. 0x76c2a000 0x00000910
1931 03:16:32.650753 VBOOT WORK 8. 0x76c16000 0x00014000
1932 03:16:32.654066 ROMSTG STCK 9. 0x76c15000 0x00001000
1933 03:16:32.657298 AFTER CAR 10. 0x76c0a000 0x0000b000
1934 03:16:32.660674 RAMSTAGE 11. 0x76b97000 0x00073000
1935 03:16:32.663959 REFCODE 12. 0x76b42000 0x00055000
1936 03:16:32.667329 SMM BACKUP 13. 0x76b32000 0x00010000
1937 03:16:32.673910 4f444749 14. 0x76b30000 0x00002000
1938 03:16:32.677445 EXT VBT15. 0x76b2d000 0x0000219f
1939 03:16:32.680734 COREBOOT 16. 0x76b25000 0x00008000
1940 03:16:32.683995 ACPI 17. 0x76b01000 0x00024000
1941 03:16:32.687442 ACPI GNVS 18. 0x76b00000 0x00001000
1942 03:16:32.690582 RAMOOPS 19. 0x76a00000 0x00100000
1943 03:16:32.693868 TPM2 TCGLOG20. 0x769f0000 0x00010000
1944 03:16:32.697187 SMBIOS 21. 0x769ef000 0x00000800
1945 03:16:32.700390 IMD small region:
1946 03:16:32.703691 IMD ROOT 0. 0x76ffec00 0x00000400
1947 03:16:32.706921 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1948 03:16:32.710183 POWER STATE 2. 0x76ffeb80 0x00000044
1949 03:16:32.713696
1950 03:16:32.716901 ROMSTAGE 3. 0x76ffeb60 0x00000004
1951 03:16:32.720201 MEM INFO 4. 0x76ffe980 0x000001e0
1952 03:16:32.726653 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1953 03:16:32.729796 MTRR: Physical address space:
1954 03:16:32.733178 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1955 03:16:32.736701
1956 03:16:32.740013 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1957 03:16:32.746618 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1958 03:16:32.753127 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1959 03:16:32.759927 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1960 03:16:32.766458 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1961 03:16:32.773063 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1962 03:16:32.776465 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 03:16:32.779645 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 03:16:32.786343 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 03:16:32.789592 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 03:16:32.792921 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 03:16:32.796214 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 03:16:32.799389 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 03:16:32.802634
1970 03:16:32.806175 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 03:16:32.809174 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 03:16:32.812521 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 03:16:32.816110 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 03:16:32.820488 call enable_fixed_mtrr()
1975 03:16:32.823793 CPU physical address size: 39 bits
1976 03:16:32.830686 MTRR: default type WB/UC MTRR counts: 6/6.
1977 03:16:32.833900 MTRR: UC selected as default type.
1978 03:16:32.840500 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1979 03:16:32.843790 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1980 03:16:32.850616 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1981 03:16:32.857247 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1982 03:16:32.863698 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1983 03:16:32.870407 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1984 03:16:32.870488
1985 03:16:32.873576 MTRR check
1986 03:16:32.873650 Fixed MTRRs : Enabled
1987 03:16:32.876880
1988 03:16:32.876955 Variable MTRRs: Enabled
1989 03:16:32.877018
1990 03:16:32.883516 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 03:16:32.886795 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 03:16:32.889976 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 03:16:32.893568 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 03:16:32.896905 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 03:16:32.900118
1996 03:16:32.903470 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 03:16:32.906794 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 03:16:32.910075 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 03:16:32.913327 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 03:16:32.919959 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 03:16:32.923083 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 03:16:32.930107 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2003 03:16:32.933304 call enable_fixed_mtrr()
2004 03:16:32.936615 Checking cr50 for pending updates
2005 03:16:32.940943 CPU physical address size: 39 bits
2006 03:16:32.944468 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 03:16:32.947828 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 03:16:32.951229 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 03:16:32.954442 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 03:16:32.961146 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 03:16:32.964012 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 03:16:32.967611 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 03:16:32.970935 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 03:16:32.977417 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 03:16:32.980620 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 03:16:32.984238 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 03:16:32.987294 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 03:16:32.994797 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 03:16:32.994879 call enable_fixed_mtrr()
2020 03:16:33.001384 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 03:16:33.004911 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 03:16:33.008257 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 03:16:33.011653 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 03:16:33.018347 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 03:16:33.021340 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 03:16:33.024962 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 03:16:33.027941 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 03:16:33.034769 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 03:16:33.037968 CPU physical address size: 39 bits
2030 03:16:33.041237 call enable_fixed_mtrr()
2031 03:16:33.044747 Reading cr50 TPM mode
2032 03:16:33.049143 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 03:16:33.052450 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 03:16:33.055777 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 03:16:33.059046 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 03:16:33.065518 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 03:16:33.068871 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 03:16:33.072223 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 03:16:33.075425 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 03:16:33.078659 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 03:16:33.082163
2042 03:16:33.085462 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 03:16:33.088818 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 03:16:33.092005 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 03:16:33.099280 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 03:16:33.099358 call enable_fixed_mtrr()
2047 03:16:33.105736 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 03:16:33.109266 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 03:16:33.112536 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 03:16:33.115867 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 03:16:33.122126 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 03:16:33.125771 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 03:16:33.129182 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 03:16:33.132332 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 03:16:33.138734 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 03:16:33.142083 CPU physical address size: 39 bits
2057 03:16:33.145539 call enable_fixed_mtrr()
2058 03:16:33.148920 CPU physical address size: 39 bits
2059 03:16:33.152027 MTRR: Fixed MSR 0x250 0x0606060606060606
2060 03:16:33.158910 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 03:16:33.162082 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 03:16:33.165282 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 03:16:33.168825 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 03:16:33.171947 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 03:16:33.175225
2066 03:16:33.178570 MTRR: Fixed MSR 0x26a 0x0606060606060606
2067 03:16:33.181814 MTRR: Fixed MSR 0x26b 0x0606060606060606
2068 03:16:33.185166 MTRR: Fixed MSR 0x26c 0x0606060606060606
2069 03:16:33.188427 MTRR: Fixed MSR 0x26d 0x0606060606060606
2070 03:16:33.195048 MTRR: Fixed MSR 0x26e 0x0606060606060606
2071 03:16:33.198328 MTRR: Fixed MSR 0x26f 0x0606060606060606
2072 03:16:33.202000 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 03:16:33.204971 call enable_fixed_mtrr()
2074 03:16:33.208478 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 03:16:33.215064 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 03:16:33.218418 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 03:16:33.221700 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 03:16:33.225086 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 03:16:33.231540 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 03:16:33.234910 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 03:16:33.238099 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 03:16:33.241466 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 03:16:33.245769 CPU physical address size: 39 bits
2084 03:16:33.252492 call enable_fixed_mtrr()
2085 03:16:33.255692 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2086 03:16:33.258845 CPU physical address size: 39 bits
2087 03:16:33.262168 CPU physical address size: 39 bits
2088 03:16:33.265854
2089 03:16:33.272116 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2090 03:16:33.275456 Checking segment from ROM address 0xffc02b38
2091 03:16:33.278807 Checking segment from ROM address 0xffc02b54
2092 03:16:33.282136
2093 03:16:33.285504 Loading segment from ROM address 0xffc02b38
2094 03:16:33.288776 code (compression=0)
2095 03:16:33.295268 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2096 03:16:33.305137 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2097 03:16:33.305221 it's not compressed!
2098 03:16:33.445763 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2099 03:16:33.452151 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2100 03:16:33.458697 Loading segment from ROM address 0xffc02b54
2101 03:16:33.461987 Entry Point 0x30000000
2102 03:16:33.462073 Loaded segments
2103 03:16:33.468788 BS: BS_PAYLOAD_LOAD run times (exec / console): 142 / 63 ms
2104 03:16:33.511556 Finalizing chipset.
2105 03:16:33.515150 Finalizing SMM.
2106 03:16:33.515237 APMC done.
2107 03:16:33.521706 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2108 03:16:33.525061 mp_park_aps done after 0 msecs.
2109 03:16:33.528364 Jumping to boot code at 0x30000000(0x76b25000)
2110 03:16:33.538058 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2111 03:16:33.538166
2112 03:16:33.538273
2113 03:16:33.538353
2114 03:16:33.541674 Starting depthcharge on Voema...
2115 03:16:33.541760
2116 03:16:33.542138 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2117 03:16:33.542289 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2118 03:16:33.542385 Setting prompt string to ['volteer:']
2119 03:16:33.542477 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2120 03:16:33.551537 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2121 03:16:33.551625
2122 03:16:33.558009 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2123 03:16:33.558106
2124 03:16:33.564586 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2125 03:16:33.564672
2126 03:16:33.568034 Failed to find eMMC card reader
2127 03:16:33.568136
2128 03:16:33.568235 Wipe memory regions:
2129 03:16:33.571208
2130 03:16:33.574405 [0x00000000001000, 0x000000000a0000)
2131 03:16:33.574506
2132 03:16:33.577830 [0x00000000100000, 0x00000030000000)
2133 03:16:33.577944
2134 03:16:33.606937 [0x00000032662db0, 0x000000769ef000)
2135 03:16:33.607026
2136 03:16:33.645447 [0x00000100000000, 0x00000280400000)
2137 03:16:33.645555
2138 03:16:33.849214 ec_init: CrosEC protocol v3 supported (256, 256)
2139 03:16:33.849352
2140 03:16:33.856031 update_port_state: port C0 state: usb enable 1 mux conn 0
2141 03:16:33.856117
2142 03:16:33.862448 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2143 03:16:33.865630
2144 03:16:33.869223 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2145 03:16:33.869308
2146 03:16:33.875587 send_conn_disc_msg: pmc_send_cmd succeeded
2147 03:16:33.875672
2148 03:16:34.306056 R8152: Initializing
2149 03:16:34.306192
2150 03:16:34.309449 Version 6 (ocp_data = 5c30)
2151 03:16:34.309527
2152 03:16:34.312751 R8152: Done initializing
2153 03:16:34.312831
2154 03:16:34.316045 Adding net device
2155 03:16:34.316124
2156 03:16:34.621452 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2157 03:16:34.621584
2158 03:16:34.621657
2159 03:16:34.621724
2160 03:16:34.624893 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 03:16:34.725548 volteer: tftpboot 192.168.201.1 8789678/tftp-deploy-au7b2xh9/kernel/bzImage 8789678/tftp-deploy-au7b2xh9/kernel/cmdline 8789678/tftp-deploy-au7b2xh9/ramdisk/ramdisk.cpio.gz
2163 03:16:34.725724 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 03:16:34.725849 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2165 03:16:34.729712 tftpboot 192.168.201.1 8789678/tftp-deploy-au7b2xh9/kernel/bzImoy-au7b2xh9/kernel/cmdline 8789678/tftp-deploy-au7b2xh9/ramdisk/ramdisk.cpio.gz
2166 03:16:34.729798
2167 03:16:34.729864 Waiting for link
2168 03:16:34.729939
2169 03:16:34.935157 done.
2170 03:16:34.935298
2171 03:16:34.935367 MAC: 00:24:32:30:79:06
2172 03:16:34.935429
2173 03:16:34.938184 Sending DHCP discover... done.
2174 03:16:34.938288
2175 03:16:34.941596 Waiting for reply... done.
2176 03:16:34.941673
2177 03:16:34.944761 Sending DHCP request... done.
2178 03:16:34.944841
2179 03:16:34.948366 Waiting for reply... done.
2180 03:16:34.948444
2181 03:16:34.951683 My ip is 192.168.201.23
2182 03:16:34.951758
2183 03:16:34.954848 The DHCP server ip is 192.168.201.1
2184 03:16:34.954926
2185 03:16:34.958154 TFTP server IP predefined by user: 192.168.201.1
2186 03:16:34.958271
2187 03:16:34.964701 Bootfile predefined by user: 8789678/tftp-deploy-au7b2xh9/kernel/bzImage
2188 03:16:34.964781
2189 03:16:34.968127 Sending tftp read request... done.
2190 03:16:34.968203
2191 03:16:34.974314 Waiting for the transfer...
2192 03:16:34.974395
2193 03:16:35.497053 00000000 ################################################################
2194 03:16:35.497206
2195 03:16:36.002971 00080000 ################################################################
2196 03:16:36.003111
2197 03:16:36.515780 00100000 ################################################################
2198 03:16:36.515922
2199 03:16:37.035186 00180000 ################################################################
2200 03:16:37.035331
2201 03:16:37.552485 00200000 ################################################################
2202 03:16:37.552625
2203 03:16:38.073103 00280000 ################################################################
2204 03:16:38.073240
2205 03:16:38.585623 00300000 ################################################################
2206 03:16:38.585762
2207 03:16:39.101103 00380000 ################################################################
2208 03:16:39.101245
2209 03:16:39.619738 00400000 ################################################################
2210 03:16:39.619874
2211 03:16:40.135790 00480000 ################################################################
2212 03:16:40.135925
2213 03:16:40.658963 00500000 ################################################################
2214 03:16:40.659115
2215 03:16:41.190375 00580000 ################################################################
2216 03:16:41.190539
2217 03:16:41.721274 00600000 ################################################################
2218 03:16:41.721417
2219 03:16:42.235692 00680000 ################################################################
2220 03:16:42.235844
2221 03:16:42.768796 00700000 ################################################################
2222 03:16:42.768944
2223 03:16:43.286941 00780000 ################################################################
2224 03:16:43.287136
2225 03:16:43.809373 00800000 ################################################################
2226 03:16:43.809513
2227 03:16:44.320994 00880000 ################################################################
2228 03:16:44.321131
2229 03:16:44.588445 00900000 ################################## done.
2230 03:16:44.588584
2231 03:16:44.591606 The bootfile was 9711616 bytes long.
2232 03:16:44.591693
2233 03:16:44.595190 Sending tftp read request... done.
2234 03:16:44.595276
2235 03:16:44.598372 Waiting for the transfer...
2236 03:16:44.598458
2237 03:16:45.121558 00000000 ################################################################
2238 03:16:45.121693
2239 03:16:45.637029 00080000 ################################################################
2240 03:16:45.637165
2241 03:16:46.149367 00100000 ################################################################
2242 03:16:46.149511
2243 03:16:46.661349 00180000 ################################################################
2244 03:16:46.661486
2245 03:16:47.279873 00200000 ################################################################
2246 03:16:47.280438
2247 03:16:47.962686 00280000 ################################################################
2248 03:16:47.963266
2249 03:16:48.636285 00300000 ################################################################
2250 03:16:48.636887
2251 03:16:49.268161 00380000 ################################################################
2252 03:16:49.268295
2253 03:16:49.805574 00400000 ################################################################
2254 03:16:49.805712
2255 03:16:50.346233 00480000 ################################################################
2256 03:16:50.346386
2257 03:16:51.000769 00500000 ################################################################
2258 03:16:51.001283
2259 03:16:51.630295 00580000 ################################################################
2260 03:16:51.630589
2261 03:16:52.233127 00600000 ################################################################
2262 03:16:52.233799
2263 03:16:52.868044 00680000 ################################################################
2264 03:16:52.868585
2265 03:16:53.492615 00700000 ################################################################
2266 03:16:53.492801
2267 03:16:54.094480 00780000 ################################################################
2268 03:16:54.095046
2269 03:16:54.738253 00800000 ################################################################
2270 03:16:54.738873
2271 03:16:55.403542 00880000 ################################################################
2272 03:16:55.404094
2273 03:16:56.070066 00900000 ################################################################
2274 03:16:56.070695
2275 03:16:56.747762 00980000 ################################################################
2276 03:16:56.748331
2277 03:16:57.333159 00a00000 ################################################################
2278 03:16:57.333309
2279 03:16:57.904616 00a80000 ################################################################
2280 03:16:57.904752
2281 03:16:58.471181 00b00000 ################################################################
2282 03:16:58.471820
2283 03:16:59.062405 00b80000 ################################################################
2284 03:16:59.062923
2285 03:16:59.704596 00c00000 ################################################################
2286 03:16:59.705125
2287 03:17:00.352010 00c80000 ################################################################
2288 03:17:00.352162
2289 03:17:00.973035 00d00000 ################################################################
2290 03:17:00.973185
2291 03:17:01.520763 00d80000 ################################################################
2292 03:17:01.520914
2293 03:17:02.070517 00e00000 ################################################################
2294 03:17:02.070678
2295 03:17:02.597955 00e80000 ################################################################
2296 03:17:02.598098
2297 03:17:03.124418 00f00000 ################################################################
2298 03:17:03.124567
2299 03:17:03.652964 00f80000 ################################################################
2300 03:17:03.653110
2301 03:17:04.176961 01000000 ################################################################
2302 03:17:04.177101
2303 03:17:04.726189 01080000 ################################################################
2304 03:17:04.726369
2305 03:17:05.260076 01100000 ################################################################
2306 03:17:05.260215
2307 03:17:05.798490 01180000 ################################################################
2308 03:17:05.798627
2309 03:17:06.322428 01200000 ################################################################
2310 03:17:06.322582
2311 03:17:06.860884 01280000 ################################################################
2312 03:17:06.861034
2313 03:17:07.396023 01300000 ################################################################
2314 03:17:07.396166
2315 03:17:07.932454 01380000 ################################################################
2316 03:17:07.932595
2317 03:17:08.463219 01400000 ################################################################
2318 03:17:08.463363
2319 03:17:08.982173 01480000 ################################################################
2320 03:17:08.982352
2321 03:17:09.515352 01500000 ################################################################
2322 03:17:09.515511
2323 03:17:10.059047 01580000 ################################################################
2324 03:17:10.059242
2325 03:17:10.596904 01600000 ################################################################
2326 03:17:10.597061
2327 03:17:11.132360 01680000 ################################################################
2328 03:17:11.132527
2329 03:17:11.665966 01700000 ################################################################
2330 03:17:11.666123
2331 03:17:12.189555 01780000 ################################################################
2332 03:17:12.189710
2333 03:17:12.715062 01800000 ################################################################
2334 03:17:12.715259
2335 03:17:13.242162 01880000 ################################################################
2336 03:17:13.242376
2337 03:17:13.764397 01900000 ################################################################
2338 03:17:13.764586
2339 03:17:14.284366 01980000 ################################################################
2340 03:17:14.284551
2341 03:17:14.807028 01a00000 ################################################################
2342 03:17:14.807193
2343 03:17:15.359634 01a80000 ################################################################
2344 03:17:15.359787
2345 03:17:15.905156 01b00000 ################################################################
2346 03:17:15.905311
2347 03:17:16.452580 01b80000 ################################################################
2348 03:17:16.452730
2349 03:17:16.997819 01c00000 ################################################################
2350 03:17:16.997983
2351 03:17:17.552410 01c80000 ################################################################
2352 03:17:17.552560
2353 03:17:18.106766 01d00000 ################################################################
2354 03:17:18.106922
2355 03:17:18.655308 01d80000 ################################################################
2356 03:17:18.655458
2357 03:17:19.214155 01e00000 ################################################################
2358 03:17:19.214398
2359 03:17:19.819044 01e80000 ################################################################
2360 03:17:19.819208
2361 03:17:20.402321 01f00000 ################################################################
2362 03:17:20.402472
2363 03:17:20.999088 01f80000 ################################################################
2364 03:17:20.999242
2365 03:17:21.563803 02000000 ################################################################
2366 03:17:21.563999
2367 03:17:22.132568 02080000 ################################################################
2368 03:17:22.132719
2369 03:17:22.692518 02100000 ################################################################
2370 03:17:22.692668
2371 03:17:23.220783 02180000 ################################################################
2372 03:17:23.221010
2373 03:17:23.404578 02200000 ####################### done.
2374 03:17:23.404770
2375 03:17:23.407797 Sending tftp read request... done.
2376 03:17:23.407882
2377 03:17:23.411362 Waiting for the transfer...
2378 03:17:23.411447
2379 03:17:23.411513 00000000 # done.
2380 03:17:23.411577
2381 03:17:23.421084 Command line loaded dynamically from TFTP file: 8789678/tftp-deploy-au7b2xh9/kernel/cmdline
2382 03:17:23.421175
2383 03:17:23.434085 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2384 03:17:23.434181
2385 03:17:23.443793 Shutting down all USB controllers.
2386 03:17:23.443880
2387 03:17:23.443947 Removing current net device
2388 03:17:23.444009
2389 03:17:23.447155 Finalizing coreboot
2390 03:17:23.447240
2391 03:17:23.453829 Exiting depthcharge with code 4 at timestamp: 58576301
2392 03:17:23.453914
2393 03:17:23.453981
2394 03:17:23.454042 Starting kernel ...
2395 03:17:23.454102
2396 03:17:23.454159
2397 03:17:23.454237
2398 03:17:23.454655 end: 2.2.4 bootloader-commands (duration 00:00:50) [common]
2399 03:17:23.454755 start: 2.2.5 auto-login-action (timeout 00:03:54) [common]
2400 03:17:23.454840 Setting prompt string to ['Linux version [0-9]']
2401 03:17:23.454915 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2402 03:17:23.454985 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2404 03:21:17.455840 end: 2.2.5 auto-login-action (duration 00:03:54) [common]
2406 03:21:17.457993 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 234 seconds'
2408 03:21:17.459036 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2411 03:21:17.460673 end: 2 depthcharge-action (duration 00:05:00) [common]
2413 03:21:17.462064 Cleaning after the job
2414 03:21:17.462856 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8789678/tftp-deploy-au7b2xh9/ramdisk
2415 03:21:17.474009 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8789678/tftp-deploy-au7b2xh9/kernel
2416 03:21:17.476477 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8789678/tftp-deploy-au7b2xh9/modules
2417 03:21:17.476682 start: 4.1 power-off (timeout 00:00:30) [common]
2418 03:21:17.476833 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2419 03:21:17.495996 >> Command sent successfully.
2420 03:21:17.497899 Returned 0 in 0 seconds
2421 03:21:17.598896 end: 4.1 power-off (duration 00:00:00) [common]
2423 03:21:17.600444 start: 4.2 read-feedback (timeout 00:10:00) [common]
2424 03:21:17.601721 Listened to connection for namespace 'common' for up to 1s
2425 03:21:18.603318 Finalising connection for namespace 'common'
2426 03:21:18.604053 Disconnecting from shell: Finalise
2427 03:21:18.705704 end: 4.2 read-feedback (duration 00:00:01) [common]
2428 03:21:18.706401 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8789678
2429 03:21:18.770609 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8789678
2430 03:21:18.770819 JobError: Your job cannot terminate cleanly.