Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 00:35:21.846150 lava-dispatcher, installed at version: 2023.03
2 00:35:21.846381 start: 0 validate
3 00:35:21.846516 Start time: 2023-05-23 00:35:21.846507+00:00 (UTC)
4 00:35:21.846690 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:35:21.846878 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230512.0%2Fx86%2Frootfs.cpio.gz exists
6 00:35:22.139198 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:35:22.139414 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:35:22.425035 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:35:22.425307 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 00:35:27.125646 validate duration: 5.28
12 00:35:27.126141 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 00:35:27.126300 start: 1.1 download-retry (timeout 00:10:00) [common]
14 00:35:27.126446 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 00:35:27.126699 Not decompressing ramdisk as can be used compressed.
16 00:35:27.126867 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230512.0/x86/rootfs.cpio.gz
17 00:35:27.126995 saving as /var/lib/lava/dispatcher/tmp/10419316/tftp-deploy-e023kttr/ramdisk/rootfs.cpio.gz
18 00:35:27.127107 total size: 8430071 (8MB)
19 00:35:27.837204 progress 0% (0MB)
20 00:35:27.844988 progress 5% (0MB)
21 00:35:27.847240 progress 10% (0MB)
22 00:35:27.849512 progress 15% (1MB)
23 00:35:27.851741 progress 20% (1MB)
24 00:35:27.853977 progress 25% (2MB)
25 00:35:27.856170 progress 30% (2MB)
26 00:35:27.858404 progress 35% (2MB)
27 00:35:27.860432 progress 40% (3MB)
28 00:35:27.862664 progress 45% (3MB)
29 00:35:27.864851 progress 50% (4MB)
30 00:35:27.867108 progress 55% (4MB)
31 00:35:27.869306 progress 60% (4MB)
32 00:35:27.871505 progress 65% (5MB)
33 00:35:27.873694 progress 70% (5MB)
34 00:35:27.875682 progress 75% (6MB)
35 00:35:27.877835 progress 80% (6MB)
36 00:35:27.879998 progress 85% (6MB)
37 00:35:27.882194 progress 90% (7MB)
38 00:35:27.884356 progress 95% (7MB)
39 00:35:27.886573 progress 100% (8MB)
40 00:35:27.886725 8MB downloaded in 0.76s (10.58MB/s)
41 00:35:27.886889 end: 1.1.1 http-download (duration 00:00:01) [common]
43 00:35:27.887162 end: 1.1 download-retry (duration 00:00:01) [common]
44 00:35:27.887268 start: 1.2 download-retry (timeout 00:09:59) [common]
45 00:35:27.887367 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 00:35:27.887518 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.280-cip95-rt30/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 00:35:27.887619 saving as /var/lib/lava/dispatcher/tmp/10419316/tftp-deploy-e023kttr/kernel/bzImage
48 00:35:27.887718 total size: 10862592 (10MB)
49 00:35:27.887816 No compression specified
50 00:35:27.889413 progress 0% (0MB)
51 00:35:27.892278 progress 5% (0MB)
52 00:35:27.895158 progress 10% (1MB)
53 00:35:27.897865 progress 15% (1MB)
54 00:35:27.900692 progress 20% (2MB)
55 00:35:27.903410 progress 25% (2MB)
56 00:35:27.906286 progress 30% (3MB)
57 00:35:27.909108 progress 35% (3MB)
58 00:35:27.911815 progress 40% (4MB)
59 00:35:27.914696 progress 45% (4MB)
60 00:35:27.917391 progress 50% (5MB)
61 00:35:27.920253 progress 55% (5MB)
62 00:35:27.922941 progress 60% (6MB)
63 00:35:27.925798 progress 65% (6MB)
64 00:35:27.928588 progress 70% (7MB)
65 00:35:27.931217 progress 75% (7MB)
66 00:35:27.934047 progress 80% (8MB)
67 00:35:27.936673 progress 85% (8MB)
68 00:35:27.939487 progress 90% (9MB)
69 00:35:27.942162 progress 95% (9MB)
70 00:35:27.944958 progress 100% (10MB)
71 00:35:27.945138 10MB downloaded in 0.06s (180.42MB/s)
72 00:35:27.945299 end: 1.2.1 http-download (duration 00:00:00) [common]
74 00:35:27.945652 end: 1.2 download-retry (duration 00:00:00) [common]
75 00:35:27.945753 start: 1.3 download-retry (timeout 00:09:59) [common]
76 00:35:27.945854 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 00:35:27.946009 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.280-cip95-rt30/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 00:35:27.946108 saving as /var/lib/lava/dispatcher/tmp/10419316/tftp-deploy-e023kttr/modules/modules.tar
79 00:35:27.946207 total size: 486648 (0MB)
80 00:35:27.946306 Using unxz to decompress xz
81 00:35:27.950421 progress 6% (0MB)
82 00:35:27.950850 progress 13% (0MB)
83 00:35:27.951101 progress 20% (0MB)
84 00:35:27.952524 progress 26% (0MB)
85 00:35:27.954696 progress 33% (0MB)
86 00:35:27.956993 progress 40% (0MB)
87 00:35:27.959579 progress 47% (0MB)
88 00:35:27.961788 progress 53% (0MB)
89 00:35:27.963558 progress 60% (0MB)
90 00:35:27.965620 progress 67% (0MB)
91 00:35:27.967851 progress 74% (0MB)
92 00:35:27.969996 progress 80% (0MB)
93 00:35:27.971885 progress 87% (0MB)
94 00:35:27.973879 progress 94% (0MB)
95 00:35:27.975726 progress 100% (0MB)
96 00:35:27.982028 0MB downloaded in 0.04s (12.96MB/s)
97 00:35:27.982305 end: 1.3.1 http-download (duration 00:00:00) [common]
99 00:35:27.982575 end: 1.3 download-retry (duration 00:00:00) [common]
100 00:35:27.982670 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 00:35:27.982764 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 00:35:27.982845 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 00:35:27.982929 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 00:35:27.983152 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo
105 00:35:27.983283 makedir: /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin
106 00:35:27.983439 makedir: /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/tests
107 00:35:27.983537 makedir: /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/results
108 00:35:27.983651 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-add-keys
109 00:35:27.983837 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-add-sources
110 00:35:27.983999 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-background-process-start
111 00:35:27.984157 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-background-process-stop
112 00:35:27.984299 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-common-functions
113 00:35:27.984423 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-echo-ipv4
114 00:35:27.984561 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-install-packages
115 00:35:27.984714 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-installed-packages
116 00:35:27.984833 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-os-build
117 00:35:27.984952 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-probe-channel
118 00:35:27.985089 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-probe-ip
119 00:35:27.985225 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-target-ip
120 00:35:27.985393 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-target-mac
121 00:35:27.985531 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-target-storage
122 00:35:27.985674 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-test-case
123 00:35:27.985795 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-test-event
124 00:35:27.985914 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-test-feedback
125 00:35:27.986066 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-test-raise
126 00:35:27.986284 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-test-reference
127 00:35:27.986408 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-test-runner
128 00:35:27.986528 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-test-set
129 00:35:27.986679 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-test-shell
130 00:35:27.986804 Updating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-install-packages (oe)
131 00:35:27.986996 Updating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/bin/lava-installed-packages (oe)
132 00:35:27.987136 Creating /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/environment
133 00:35:27.987297 LAVA metadata
134 00:35:27.987394 - LAVA_JOB_ID=10419316
135 00:35:27.987498 - LAVA_DISPATCHER_IP=192.168.201.1
136 00:35:27.987634 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 00:35:27.987733 skipped lava-vland-overlay
138 00:35:27.987843 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 00:35:27.987926 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 00:35:27.987991 skipped lava-multinode-overlay
141 00:35:27.988067 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 00:35:27.988150 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 00:35:27.988225 Loading test definitions
144 00:35:27.988318 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 00:35:27.988394 Using /lava-10419316 at stage 0
146 00:35:27.988700 uuid=10419316_1.4.2.3.1 testdef=None
147 00:35:27.988791 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 00:35:27.988882 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 00:35:27.989406 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 00:35:27.989736 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 00:35:27.990405 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 00:35:27.990640 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 00:35:27.991257 runner path: /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/0/tests/0_dmesg test_uuid 10419316_1.4.2.3.1
156 00:35:27.991411 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 00:35:27.991643 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 00:35:27.991719 Using /lava-10419316 at stage 1
160 00:35:27.992010 uuid=10419316_1.4.2.3.5 testdef=None
161 00:35:27.992102 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 00:35:27.992189 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 00:35:27.992655 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 00:35:27.992891 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 00:35:27.993525 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 00:35:27.993758 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 00:35:27.994375 runner path: /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/1/tests/1_bootrr test_uuid 10419316_1.4.2.3.5
170 00:35:27.994525 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 00:35:27.994739 Creating lava-test-runner.conf files
173 00:35:27.994805 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/0 for stage 0
174 00:35:27.994894 - 0_dmesg
175 00:35:27.994976 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419316/lava-overlay-5nrxj8lo/lava-10419316/1 for stage 1
176 00:35:27.995067 - 1_bootrr
177 00:35:27.995160 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 00:35:27.995245 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 00:35:28.003606 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 00:35:28.003723 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 00:35:28.003812 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 00:35:28.003897 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 00:35:28.003984 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 00:35:28.260050 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 00:35:28.260514 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 00:35:28.260690 extracting modules file /var/lib/lava/dispatcher/tmp/10419316/tftp-deploy-e023kttr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10419316/extract-overlay-ramdisk-_ydqb_4v/ramdisk
187 00:35:28.295458 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 00:35:28.295670 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 00:35:28.295823 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419316/compress-overlay-bqskoi5w/overlay-1.4.2.4.tar.gz to ramdisk
190 00:35:28.295944 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419316/compress-overlay-bqskoi5w/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10419316/extract-overlay-ramdisk-_ydqb_4v/ramdisk
191 00:35:28.311636 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 00:35:28.311820 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 00:35:28.311929 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 00:35:28.312027 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 00:35:28.312119 Building ramdisk /var/lib/lava/dispatcher/tmp/10419316/extract-overlay-ramdisk-_ydqb_4v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10419316/extract-overlay-ramdisk-_ydqb_4v/ramdisk
196 00:35:28.451960 >> 53978 blocks
197 00:35:29.365574 rename /var/lib/lava/dispatcher/tmp/10419316/extract-overlay-ramdisk-_ydqb_4v/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10419316/tftp-deploy-e023kttr/ramdisk/ramdisk.cpio.gz
198 00:35:29.365998 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 00:35:29.366123 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 00:35:29.366227 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 00:35:29.366319 No mkimage arch provided, not using FIT.
202 00:35:29.366411 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 00:35:29.366496 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 00:35:29.366605 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 00:35:29.366699 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 00:35:29.366788 No LXC device requested
207 00:35:29.366872 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 00:35:29.366964 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 00:35:29.367063 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 00:35:29.367145 Checking files for TFTP limit of 4294967296 bytes.
211 00:35:29.367566 end: 1 tftp-deploy (duration 00:00:02) [common]
212 00:35:29.367673 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 00:35:29.367766 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 00:35:29.367883 substitutions:
215 00:35:29.367951 - {DTB}: None
216 00:35:29.368014 - {INITRD}: 10419316/tftp-deploy-e023kttr/ramdisk/ramdisk.cpio.gz
217 00:35:29.368106 - {KERNEL}: 10419316/tftp-deploy-e023kttr/kernel/bzImage
218 00:35:29.368166 - {LAVA_MAC}: None
219 00:35:29.368226 - {PRESEED_CONFIG}: None
220 00:35:29.368293 - {PRESEED_LOCAL}: None
221 00:35:29.368351 - {RAMDISK}: 10419316/tftp-deploy-e023kttr/ramdisk/ramdisk.cpio.gz
222 00:35:29.368408 - {ROOT_PART}: None
223 00:35:29.368477 - {ROOT}: None
224 00:35:29.368535 - {SERVER_IP}: 192.168.201.1
225 00:35:29.368591 - {TEE}: None
226 00:35:29.368650 Parsed boot commands:
227 00:35:29.368706 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 00:35:29.368876 Parsed boot commands: tftpboot 192.168.201.1 10419316/tftp-deploy-e023kttr/kernel/bzImage 10419316/tftp-deploy-e023kttr/kernel/cmdline 10419316/tftp-deploy-e023kttr/ramdisk/ramdisk.cpio.gz
229 00:35:29.368966 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 00:35:29.369053 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 00:35:29.369222 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 00:35:29.369329 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 00:35:29.369446 Not connected, no need to disconnect.
234 00:35:29.369582 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 00:35:29.369667 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 00:35:29.369735 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
237 00:35:29.373295 Setting prompt string to ['lava-test: # ']
238 00:35:29.373739 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 00:35:29.373869 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 00:35:29.373999 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 00:35:29.374123 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 00:35:29.374355 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
243 00:35:34.512363 >> Command sent successfully.
244 00:35:34.514720 Returned 0 in 5 seconds
245 00:35:34.615122 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 00:35:34.615467 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 00:35:34.615577 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 00:35:34.615666 Setting prompt string to 'Starting depthcharge on Helios...'
250 00:35:34.615737 Changing prompt to 'Starting depthcharge on Helios...'
251 00:35:34.615808 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 00:35:34.616104 [Enter `^Ec?' for help]
253 00:35:35.237854
254 00:35:35.238021
255 00:35:35.247120 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 00:35:35.250864 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 00:35:35.257463 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 00:35:35.260482 CPU: AES supported, TXT NOT supported, VT supported
259 00:35:35.267569 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 00:35:35.270695 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 00:35:35.277403 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 00:35:35.280497 VBOOT: Loading verstage.
263 00:35:35.284272 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 00:35:35.290595 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 00:35:35.293665 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 00:35:35.297190 CBFS @ c08000 size 3f8000
267 00:35:35.303549 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 00:35:35.307227 CBFS: Locating 'fallback/verstage'
269 00:35:35.310451 CBFS: Found @ offset 10fb80 size 1072c
270 00:35:35.314085
271 00:35:35.314171
272 00:35:35.324212 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 00:35:35.338019 Probing TPM: . done!
274 00:35:35.341072 TPM ready after 0 ms
275 00:35:35.344568 Connected to device vid:did:rid of 1ae0:0028:00
276 00:35:35.354931 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
277 00:35:35.358532 Initialized TPM device CR50 revision 0
278 00:35:35.403062 tlcl_send_startup: Startup return code is 0
279 00:35:35.403217 TPM: setup succeeded
280 00:35:35.415646 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 00:35:35.419333 Chrome EC: UHEPI supported
282 00:35:35.422918 Phase 1
283 00:35:35.425922 FMAP: area GBB found @ c05000 (12288 bytes)
284 00:35:35.432404 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 00:35:35.436189 Phase 2
286 00:35:35.436276 Phase 3
287 00:35:35.439151 FMAP: area GBB found @ c05000 (12288 bytes)
288 00:35:35.445759 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 00:35:35.452624 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 00:35:35.455989 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 00:35:35.462623 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 00:35:35.477893 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 00:35:35.481520 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 00:35:35.487688 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 00:35:35.492107 Phase 4
296 00:35:35.495249 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 00:35:35.502178 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 00:35:35.681873 VB2:vb2_rsa_verify_digest() Digest check failed!
299 00:35:35.687987 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 00:35:35.688134 Saving nvdata
301 00:35:35.691547 Reboot requested (10020007)
302 00:35:35.694608 board_reset() called!
303 00:35:35.694738 full_reset() called!
304 00:35:40.204402
305 00:35:40.204547
306 00:35:40.214199 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 00:35:40.217448 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 00:35:40.223939 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 00:35:40.227640 CPU: AES supported, TXT NOT supported, VT supported
310 00:35:40.234190 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 00:35:40.237783 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 00:35:40.243977 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 00:35:40.247625 VBOOT: Loading verstage.
314 00:35:40.250938 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 00:35:40.257641 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 00:35:40.260792 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 00:35:40.263945 CBFS @ c08000 size 3f8000
318 00:35:40.270590 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 00:35:40.274364 CBFS: Locating 'fallback/verstage'
320 00:35:40.277376 CBFS: Found @ offset 10fb80 size 1072c
321 00:35:40.281236
322 00:35:40.281344
323 00:35:40.291005 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 00:35:40.305232 Probing TPM: . done!
325 00:35:40.308456 TPM ready after 0 ms
326 00:35:40.311732 Connected to device vid:did:rid of 1ae0:0028:00
327 00:35:40.322079 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 00:35:40.325998 Initialized TPM device CR50 revision 0
329 00:35:40.370591 tlcl_send_startup: Startup return code is 0
330 00:35:40.370717 TPM: setup succeeded
331 00:35:40.382693 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 00:35:40.386528 Chrome EC: UHEPI supported
333 00:35:40.390345 Phase 1
334 00:35:40.393475 FMAP: area GBB found @ c05000 (12288 bytes)
335 00:35:40.399859 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 00:35:40.406672 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 00:35:40.409806 Recovery requested (1009000e)
338 00:35:40.415702 Saving nvdata
339 00:35:40.421999 tlcl_extend: response is 0
340 00:35:40.430471 tlcl_extend: response is 0
341 00:35:40.437418 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 00:35:40.440712 CBFS @ c08000 size 3f8000
343 00:35:40.447773 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 00:35:40.450779 CBFS: Locating 'fallback/romstage'
345 00:35:40.454327 CBFS: Found @ offset 80 size 145fc
346 00:35:40.457239 Accumulated console time in verstage 98 ms
347 00:35:40.457341
348 00:35:40.457432
349 00:35:40.470564 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 00:35:40.477501 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 00:35:40.480668 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 00:35:40.484199 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 00:35:40.490895 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 00:35:40.494204 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 00:35:40.497264 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 00:35:40.500462 TCO_STS: 0000 0000
357 00:35:40.503535 GEN_PMCON: e0015238 00000200
358 00:35:40.506707 GBLRST_CAUSE: 00000000 00000000
359 00:35:40.506789 prev_sleep_state 5
360 00:35:40.510405 Boot Count incremented to 56891
361 00:35:40.517376 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 00:35:40.520578 CBFS @ c08000 size 3f8000
363 00:35:40.527012 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 00:35:40.527096 CBFS: Locating 'fspm.bin'
365 00:35:40.533492 CBFS: Found @ offset 5ffc0 size 71000
366 00:35:40.536691 Chrome EC: UHEPI supported
367 00:35:40.543541 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 00:35:40.547371 Probing TPM: done!
369 00:35:40.553901 Connected to device vid:did:rid of 1ae0:0028:00
370 00:35:40.563847 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
371 00:35:40.569234 Initialized TPM device CR50 revision 0
372 00:35:40.579087 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 00:35:40.585397 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 00:35:40.588652 MRC cache found, size 1948
375 00:35:40.591763 bootmode is set to: 2
376 00:35:40.595314 PRMRR disabled by config.
377 00:35:40.598538 SPD INDEX = 1
378 00:35:40.601676 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 00:35:40.605181 CBFS @ c08000 size 3f8000
380 00:35:40.611652 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 00:35:40.611739 CBFS: Locating 'spd.bin'
382 00:35:40.615221 CBFS: Found @ offset 5fb80 size 400
383 00:35:40.618460 SPD: module type is LPDDR3
384 00:35:40.621739 SPD: module part is
385 00:35:40.628323 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 00:35:40.631612 SPD: device width 4 bits, bus width 8 bits
387 00:35:40.635540 SPD: module size is 4096 MB (per channel)
388 00:35:40.638149 memory slot: 0 configuration done.
389 00:35:40.642008 memory slot: 2 configuration done.
390 00:35:40.693296 CBMEM:
391 00:35:40.696615 IMD: root @ 99fff000 254 entries.
392 00:35:40.699459 IMD: root @ 99ffec00 62 entries.
393 00:35:40.703108 External stage cache:
394 00:35:40.706652 IMD: root @ 9abff000 254 entries.
395 00:35:40.709770 IMD: root @ 9abfec00 62 entries.
396 00:35:40.712986 Chrome EC: clear events_b mask to 0x0000000020004000
397 00:35:40.729053 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 00:35:40.742077 tlcl_write: response is 0
399 00:35:40.751340 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 00:35:40.757730 MRC: TPM MRC hash updated successfully.
401 00:35:40.757816 2 DIMMs found
402 00:35:40.761062 SMM Memory Map
403 00:35:40.764314 SMRAM : 0x9a000000 0x1000000
404 00:35:40.767531 Subregion 0: 0x9a000000 0xa00000
405 00:35:40.771213 Subregion 1: 0x9aa00000 0x200000
406 00:35:40.774492 Subregion 2: 0x9ac00000 0x400000
407 00:35:40.777730 top_of_ram = 0x9a000000
408 00:35:40.780824 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 00:35:40.787337 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 00:35:40.791030 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 00:35:40.797301 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 00:35:40.801115 CBFS @ c08000 size 3f8000
413 00:35:40.804359 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 00:35:40.807663 CBFS: Locating 'fallback/postcar'
415 00:35:40.814453 CBFS: Found @ offset 107000 size 4b44
416 00:35:40.817421 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 00:35:40.830548 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 00:35:40.833486 Processing 180 relocs. Offset value of 0x97c0c000
419 00:35:40.841717 Accumulated console time in romstage 286 ms
420 00:35:40.841802
421 00:35:40.841869
422 00:35:40.852109 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 00:35:40.858292 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 00:35:40.861695 CBFS @ c08000 size 3f8000
425 00:35:40.868246 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 00:35:40.871393 CBFS: Locating 'fallback/ramstage'
427 00:35:40.874996 CBFS: Found @ offset 43380 size 1b9e8
428 00:35:40.881434 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 00:35:40.913843 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 00:35:40.917017 Processing 3976 relocs. Offset value of 0x98db0000
431 00:35:40.923703 Accumulated console time in postcar 52 ms
432 00:35:40.923788
433 00:35:40.923856
434 00:35:40.933794 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 00:35:40.939969 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 00:35:40.943632 WARNING: RO_VPD is uninitialized or empty.
437 00:35:40.946749 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 00:35:40.953290 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 00:35:40.953425 Normal boot.
440 00:35:40.960106 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 00:35:40.963359 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 00:35:40.966634 CBFS @ c08000 size 3f8000
443 00:35:40.973024 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 00:35:40.976913 CBFS: Locating 'cpu_microcode_blob.bin'
445 00:35:40.980042 CBFS: Found @ offset 14700 size 2ec00
446 00:35:40.983131 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 00:35:40.986460 Skip microcode update
448 00:35:40.990346 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 00:35:40.993551 CBFS @ c08000 size 3f8000
450 00:35:40.999918 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 00:35:41.003409 CBFS: Locating 'fsps.bin'
452 00:35:41.006507 CBFS: Found @ offset d1fc0 size 35000
453 00:35:41.031742 Detected 4 core, 8 thread CPU.
454 00:35:41.034848 Setting up SMI for CPU
455 00:35:41.037974 IED base = 0x9ac00000
456 00:35:41.038062 IED size = 0x00400000
457 00:35:41.041917 Will perform SMM setup.
458 00:35:41.048065 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 00:35:41.054808 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 00:35:41.058061 Processing 16 relocs. Offset value of 0x00030000
461 00:35:41.061937 Attempting to start 7 APs
462 00:35:41.065156 Waiting for 10ms after sending INIT.
463 00:35:41.081105 Waiting for 1st SIPI to complete...done.
464 00:35:41.081202 AP: slot 2 apic_id 1.
465 00:35:41.088051 Waiting for 2nd SIPI to complete...done.
466 00:35:41.088144 AP: slot 5 apic_id 6.
467 00:35:41.091368 AP: slot 4 apic_id 7.
468 00:35:41.094409 AP: slot 7 apic_id 4.
469 00:35:41.094530 AP: slot 6 apic_id 5.
470 00:35:41.098301 AP: slot 3 apic_id 3.
471 00:35:41.101586 AP: slot 1 apic_id 2.
472 00:35:41.107872 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 00:35:41.111531 Processing 13 relocs. Offset value of 0x00038000
474 00:35:41.118166 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 00:35:41.124587 Installing SMM handler to 0x9a000000
476 00:35:41.131553 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 00:35:41.134448 Processing 658 relocs. Offset value of 0x9a010000
478 00:35:41.144816 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 00:35:41.147975 Processing 13 relocs. Offset value of 0x9a008000
480 00:35:41.154417 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 00:35:41.161033 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 00:35:41.167460 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 00:35:41.170794 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 00:35:41.177239 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 00:35:41.184208 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 00:35:41.187248 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 00:35:41.193767 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 00:35:41.197606 Clearing SMI status registers
489 00:35:41.201020 SMI_STS: PM1
490 00:35:41.201127 PM1_STS: PWRBTN
491 00:35:41.204075 TCO_STS: SECOND_TO
492 00:35:41.207356 New SMBASE 0x9a000000
493 00:35:41.210688 In relocation handler: CPU 0
494 00:35:41.214376 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 00:35:41.217475 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 00:35:41.220479 Relocation complete.
497 00:35:41.224128 New SMBASE 0x99fff800
498 00:35:41.224217 In relocation handler: CPU 2
499 00:35:41.230649 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
500 00:35:41.234237 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 00:35:41.237256 Relocation complete.
502 00:35:41.241137 New SMBASE 0x99fff400
503 00:35:41.241227 In relocation handler: CPU 3
504 00:35:41.247430 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
505 00:35:41.250904 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 00:35:41.253975 Relocation complete.
507 00:35:41.254061 New SMBASE 0x99fffc00
508 00:35:41.257294 In relocation handler: CPU 1
509 00:35:41.263923 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
510 00:35:41.267528 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 00:35:41.270815 Relocation complete.
512 00:35:41.270907 New SMBASE 0x99ffe800
513 00:35:41.274022 In relocation handler: CPU 6
514 00:35:41.277168 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
515 00:35:41.283609 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 00:35:41.286910 Relocation complete.
517 00:35:41.287023 New SMBASE 0x99ffe400
518 00:35:41.290653 In relocation handler: CPU 7
519 00:35:41.294004 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
520 00:35:41.300392 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 00:35:41.303606 Relocation complete.
522 00:35:41.303719 New SMBASE 0x99ffec00
523 00:35:41.307548 In relocation handler: CPU 5
524 00:35:41.310772 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
525 00:35:41.317267 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 00:35:41.317381 Relocation complete.
527 00:35:41.320274 New SMBASE 0x99fff000
528 00:35:41.323610 In relocation handler: CPU 4
529 00:35:41.326887 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
530 00:35:41.333947 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 00:35:41.334060 Relocation complete.
532 00:35:41.336858 Initializing CPU #0
533 00:35:41.340495 CPU: vendor Intel device 806ec
534 00:35:41.344104 CPU: family 06, model 8e, stepping 0c
535 00:35:41.347091 Clearing out pending MCEs
536 00:35:41.350318 Setting up local APIC...
537 00:35:41.350431 apic_id: 0x00 done.
538 00:35:41.353570 Turbo is available but hidden
539 00:35:41.356982 Turbo is available and visible
540 00:35:41.360131 VMX status: enabled
541 00:35:41.363417 IA32_FEATURE_CONTROL status: locked
542 00:35:41.367095 Skip microcode update
543 00:35:41.367178 CPU #0 initialized
544 00:35:41.370307 Initializing CPU #2
545 00:35:41.370388 Initializing CPU #3
546 00:35:41.373558 Initializing CPU #1
547 00:35:41.377192 CPU: vendor Intel device 806ec
548 00:35:41.380214 CPU: family 06, model 8e, stepping 0c
549 00:35:41.383344 CPU: vendor Intel device 806ec
550 00:35:41.387203 CPU: family 06, model 8e, stepping 0c
551 00:35:41.390600 Clearing out pending MCEs
552 00:35:41.393605 Clearing out pending MCEs
553 00:35:41.396733 Setting up local APIC...
554 00:35:41.396832 Initializing CPU #5
555 00:35:41.400052 Initializing CPU #4
556 00:35:41.403709 CPU: vendor Intel device 806ec
557 00:35:41.407028 CPU: family 06, model 8e, stepping 0c
558 00:35:41.410283 CPU: vendor Intel device 806ec
559 00:35:41.413539 CPU: family 06, model 8e, stepping 0c
560 00:35:41.416712 Clearing out pending MCEs
561 00:35:41.416793 Clearing out pending MCEs
562 00:35:41.419896 Setting up local APIC...
563 00:35:41.423602 Initializing CPU #6
564 00:35:41.423715 Initializing CPU #7
565 00:35:41.426705 CPU: vendor Intel device 806ec
566 00:35:41.433187 CPU: family 06, model 8e, stepping 0c
567 00:35:41.436938 CPU: vendor Intel device 806ec
568 00:35:41.440086 CPU: family 06, model 8e, stepping 0c
569 00:35:41.440198 Clearing out pending MCEs
570 00:35:41.443265 Clearing out pending MCEs
571 00:35:41.446812 Setting up local APIC...
572 00:35:41.449675 Setting up local APIC...
573 00:35:41.449760 apic_id: 0x06 done.
574 00:35:41.453329 Setting up local APIC...
575 00:35:41.456496 CPU: vendor Intel device 806ec
576 00:35:41.460127 CPU: family 06, model 8e, stepping 0c
577 00:35:41.463136 Clearing out pending MCEs
578 00:35:41.466241 apic_id: 0x03 done.
579 00:35:41.466363 apic_id: 0x02 done.
580 00:35:41.469523 VMX status: enabled
581 00:35:41.473381 VMX status: enabled
582 00:35:41.476476 IA32_FEATURE_CONTROL status: locked
583 00:35:41.479729 IA32_FEATURE_CONTROL status: locked
584 00:35:41.479853 Skip microcode update
585 00:35:41.482971 Skip microcode update
586 00:35:41.486601 CPU #3 initialized
587 00:35:41.486679 CPU #1 initialized
588 00:35:41.489493 Setting up local APIC...
589 00:35:41.493312 apic_id: 0x05 done.
590 00:35:41.493430 Setting up local APIC...
591 00:35:41.496585 VMX status: enabled
592 00:35:41.499624 apic_id: 0x07 done.
593 00:35:41.502915 IA32_FEATURE_CONTROL status: locked
594 00:35:41.502999 VMX status: enabled
595 00:35:41.506204 Skip microcode update
596 00:35:41.509361 IA32_FEATURE_CONTROL status: locked
597 00:35:41.512637 CPU #5 initialized
598 00:35:41.512715 Skip microcode update
599 00:35:41.515966 apic_id: 0x01 done.
600 00:35:41.519704 apic_id: 0x04 done.
601 00:35:41.519808 VMX status: enabled
602 00:35:41.522963 VMX status: enabled
603 00:35:41.526135 IA32_FEATURE_CONTROL status: locked
604 00:35:41.529335 IA32_FEATURE_CONTROL status: locked
605 00:35:41.532442 Skip microcode update
606 00:35:41.536216 Skip microcode update
607 00:35:41.536322 CPU #6 initialized
608 00:35:41.539577 CPU #7 initialized
609 00:35:41.539714 CPU #4 initialized
610 00:35:41.542659 VMX status: enabled
611 00:35:41.545782 IA32_FEATURE_CONTROL status: locked
612 00:35:41.549426 Skip microcode update
613 00:35:41.549566 CPU #2 initialized
614 00:35:41.556140 bsp_do_flight_plan done after 466 msecs.
615 00:35:41.556248 CPU: frequency set to 4200 MHz
616 00:35:41.559039 Enabling SMIs.
617 00:35:41.559119 Locking SMM.
618 00:35:41.575239 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 00:35:41.578426 CBFS @ c08000 size 3f8000
620 00:35:41.585193 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 00:35:41.585317 CBFS: Locating 'vbt.bin'
622 00:35:41.588644 CBFS: Found @ offset 5f5c0 size 499
623 00:35:41.595335 Found a VBT of 4608 bytes after decompression
624 00:35:41.781986 Display FSP Version Info HOB
625 00:35:41.785092 Reference Code - CPU = 9.0.1e.30
626 00:35:41.788018 uCode Version = 0.0.0.ca
627 00:35:41.791854 TXT ACM version = ff.ff.ff.ffff
628 00:35:41.795111 Display FSP Version Info HOB
629 00:35:41.798458 Reference Code - ME = 9.0.1e.30
630 00:35:41.801591 MEBx version = 0.0.0.0
631 00:35:41.804678 ME Firmware Version = Consumer SKU
632 00:35:41.808385 Display FSP Version Info HOB
633 00:35:41.811578 Reference Code - CML PCH = 9.0.1e.30
634 00:35:41.815215 PCH-CRID Status = Disabled
635 00:35:41.818472 PCH-CRID Original Value = ff.ff.ff.ffff
636 00:35:41.821431 PCH-CRID New Value = ff.ff.ff.ffff
637 00:35:41.824774 OPROM - RST - RAID = ff.ff.ff.ffff
638 00:35:41.828083 ChipsetInit Base Version = ff.ff.ff.ffff
639 00:35:41.831354 ChipsetInit Oem Version = ff.ff.ff.ffff
640 00:35:41.834527 Display FSP Version Info HOB
641 00:35:41.841521 Reference Code - SA - System Agent = 9.0.1e.30
642 00:35:41.844662 Reference Code - MRC = 0.7.1.6c
643 00:35:41.844752 SA - PCIe Version = 9.0.1e.30
644 00:35:41.847819 SA-CRID Status = Disabled
645 00:35:41.851711 SA-CRID Original Value = 0.0.0.c
646 00:35:41.854900 SA-CRID New Value = 0.0.0.c
647 00:35:41.858199 OPROM - VBIOS = ff.ff.ff.ffff
648 00:35:41.861441 RTC Init
649 00:35:41.864583 Set power on after power failure.
650 00:35:41.864701 Disabling Deep S3
651 00:35:41.867594 Disabling Deep S3
652 00:35:41.867697 Disabling Deep S4
653 00:35:41.871032 Disabling Deep S4
654 00:35:41.871116 Disabling Deep S5
655 00:35:41.874550 Disabling Deep S5
656 00:35:41.881130 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 197 exit 1
657 00:35:41.881215 Enumerating buses...
658 00:35:41.887964 Show all devs... Before device enumeration.
659 00:35:41.888049 Root Device: enabled 1
660 00:35:41.891145 CPU_CLUSTER: 0: enabled 1
661 00:35:41.894741 DOMAIN: 0000: enabled 1
662 00:35:41.897840 APIC: 00: enabled 1
663 00:35:41.897934 PCI: 00:00.0: enabled 1
664 00:35:41.901024 PCI: 00:02.0: enabled 1
665 00:35:41.904876 PCI: 00:04.0: enabled 0
666 00:35:41.904964 PCI: 00:05.0: enabled 0
667 00:35:41.907918 PCI: 00:12.0: enabled 1
668 00:35:41.911170 PCI: 00:12.5: enabled 0
669 00:35:41.914765 PCI: 00:12.6: enabled 0
670 00:35:41.914905 PCI: 00:14.0: enabled 1
671 00:35:41.917985 PCI: 00:14.1: enabled 0
672 00:35:41.921023 PCI: 00:14.3: enabled 1
673 00:35:41.924186 PCI: 00:14.5: enabled 0
674 00:35:41.924274 PCI: 00:15.0: enabled 1
675 00:35:41.928048 PCI: 00:15.1: enabled 1
676 00:35:41.931469 PCI: 00:15.2: enabled 0
677 00:35:41.934569 PCI: 00:15.3: enabled 0
678 00:35:41.934649 PCI: 00:16.0: enabled 1
679 00:35:41.937853 PCI: 00:16.1: enabled 0
680 00:35:41.941090 PCI: 00:16.2: enabled 0
681 00:35:41.941170 PCI: 00:16.3: enabled 0
682 00:35:41.944324 PCI: 00:16.4: enabled 0
683 00:35:41.947981 PCI: 00:16.5: enabled 0
684 00:35:41.951172 PCI: 00:17.0: enabled 1
685 00:35:41.951260 PCI: 00:19.0: enabled 1
686 00:35:41.954397 PCI: 00:19.1: enabled 0
687 00:35:41.957506 PCI: 00:19.2: enabled 0
688 00:35:41.961333 PCI: 00:1a.0: enabled 0
689 00:35:41.961443 PCI: 00:1c.0: enabled 0
690 00:35:41.964551 PCI: 00:1c.1: enabled 0
691 00:35:41.967777 PCI: 00:1c.2: enabled 0
692 00:35:41.970991 PCI: 00:1c.3: enabled 0
693 00:35:41.971072 PCI: 00:1c.4: enabled 0
694 00:35:41.974211 PCI: 00:1c.5: enabled 0
695 00:35:41.977292 PCI: 00:1c.6: enabled 0
696 00:35:41.977372 PCI: 00:1c.7: enabled 0
697 00:35:41.980961 PCI: 00:1d.0: enabled 1
698 00:35:41.984206 PCI: 00:1d.1: enabled 0
699 00:35:41.987886 PCI: 00:1d.2: enabled 0
700 00:35:41.987969 PCI: 00:1d.3: enabled 0
701 00:35:41.990714 PCI: 00:1d.4: enabled 0
702 00:35:41.993852 PCI: 00:1d.5: enabled 1
703 00:35:41.997496 PCI: 00:1e.0: enabled 1
704 00:35:41.997589 PCI: 00:1e.1: enabled 0
705 00:35:42.000543 PCI: 00:1e.2: enabled 1
706 00:35:42.004229 PCI: 00:1e.3: enabled 1
707 00:35:42.007331 PCI: 00:1f.0: enabled 1
708 00:35:42.007407 PCI: 00:1f.1: enabled 1
709 00:35:42.010374 PCI: 00:1f.2: enabled 1
710 00:35:42.013630 PCI: 00:1f.3: enabled 1
711 00:35:42.017389 PCI: 00:1f.4: enabled 1
712 00:35:42.017500 PCI: 00:1f.5: enabled 1
713 00:35:42.020651 PCI: 00:1f.6: enabled 0
714 00:35:42.023910 USB0 port 0: enabled 1
715 00:35:42.023987 I2C: 00:15: enabled 1
716 00:35:42.026903 I2C: 00:5d: enabled 1
717 00:35:42.030682 GENERIC: 0.0: enabled 1
718 00:35:42.030789 I2C: 00:1a: enabled 1
719 00:35:42.033925 I2C: 00:38: enabled 1
720 00:35:42.036986 I2C: 00:39: enabled 1
721 00:35:42.037064 I2C: 00:3a: enabled 1
722 00:35:42.040263 I2C: 00:3b: enabled 1
723 00:35:42.043684 PCI: 00:00.0: enabled 1
724 00:35:42.043760 SPI: 00: enabled 1
725 00:35:42.046877 SPI: 01: enabled 1
726 00:35:42.050661 PNP: 0c09.0: enabled 1
727 00:35:42.050745 USB2 port 0: enabled 1
728 00:35:42.053579 USB2 port 1: enabled 1
729 00:35:42.056904 USB2 port 2: enabled 0
730 00:35:42.060180 USB2 port 3: enabled 0
731 00:35:42.060296 USB2 port 5: enabled 0
732 00:35:42.063578 USB2 port 6: enabled 1
733 00:35:42.066920 USB2 port 9: enabled 1
734 00:35:42.066999 USB3 port 0: enabled 1
735 00:35:42.070133 USB3 port 1: enabled 1
736 00:35:42.073921 USB3 port 2: enabled 1
737 00:35:42.074012 USB3 port 3: enabled 1
738 00:35:42.077209 USB3 port 4: enabled 0
739 00:35:42.080373 APIC: 02: enabled 1
740 00:35:42.080450 APIC: 01: enabled 1
741 00:35:42.083523 APIC: 03: enabled 1
742 00:35:42.086750 APIC: 07: enabled 1
743 00:35:42.086891 APIC: 06: enabled 1
744 00:35:42.090004 APIC: 05: enabled 1
745 00:35:42.093653 APIC: 04: enabled 1
746 00:35:42.093764 Compare with tree...
747 00:35:42.096805 Root Device: enabled 1
748 00:35:42.100157 CPU_CLUSTER: 0: enabled 1
749 00:35:42.100239 APIC: 00: enabled 1
750 00:35:42.103437 APIC: 02: enabled 1
751 00:35:42.107074 APIC: 01: enabled 1
752 00:35:42.107154 APIC: 03: enabled 1
753 00:35:42.109976 APIC: 07: enabled 1
754 00:35:42.113668 APIC: 06: enabled 1
755 00:35:42.113774 APIC: 05: enabled 1
756 00:35:42.116842 APIC: 04: enabled 1
757 00:35:42.120131 DOMAIN: 0000: enabled 1
758 00:35:42.123411 PCI: 00:00.0: enabled 1
759 00:35:42.123491 PCI: 00:02.0: enabled 1
760 00:35:42.126480 PCI: 00:04.0: enabled 0
761 00:35:42.129621 PCI: 00:05.0: enabled 0
762 00:35:42.133315 PCI: 00:12.0: enabled 1
763 00:35:42.136456 PCI: 00:12.5: enabled 0
764 00:35:42.136575 PCI: 00:12.6: enabled 0
765 00:35:42.139684 PCI: 00:14.0: enabled 1
766 00:35:42.143058 USB0 port 0: enabled 1
767 00:35:42.146291 USB2 port 0: enabled 1
768 00:35:42.149484 USB2 port 1: enabled 1
769 00:35:42.149665 USB2 port 2: enabled 0
770 00:35:42.153284 USB2 port 3: enabled 0
771 00:35:42.156691 USB2 port 5: enabled 0
772 00:35:42.159619 USB2 port 6: enabled 1
773 00:35:42.162819 USB2 port 9: enabled 1
774 00:35:42.166264 USB3 port 0: enabled 1
775 00:35:42.166381 USB3 port 1: enabled 1
776 00:35:42.169471 USB3 port 2: enabled 1
777 00:35:42.172673 USB3 port 3: enabled 1
778 00:35:42.176514 USB3 port 4: enabled 0
779 00:35:42.179803 PCI: 00:14.1: enabled 0
780 00:35:42.179920 PCI: 00:14.3: enabled 1
781 00:35:42.183077 PCI: 00:14.5: enabled 0
782 00:35:42.186371 PCI: 00:15.0: enabled 1
783 00:35:42.189638 I2C: 00:15: enabled 1
784 00:35:42.192588 PCI: 00:15.1: enabled 1
785 00:35:42.192700 I2C: 00:5d: enabled 1
786 00:35:42.196285 GENERIC: 0.0: enabled 1
787 00:35:42.199266 PCI: 00:15.2: enabled 0
788 00:35:42.202840 PCI: 00:15.3: enabled 0
789 00:35:42.206027 PCI: 00:16.0: enabled 1
790 00:35:42.206140 PCI: 00:16.1: enabled 0
791 00:35:42.209283 PCI: 00:16.2: enabled 0
792 00:35:42.212345 PCI: 00:16.3: enabled 0
793 00:35:42.215980 PCI: 00:16.4: enabled 0
794 00:35:42.218956 PCI: 00:16.5: enabled 0
795 00:35:42.219070 PCI: 00:17.0: enabled 1
796 00:35:42.222631 PCI: 00:19.0: enabled 1
797 00:35:42.226218 I2C: 00:1a: enabled 1
798 00:35:42.229376 I2C: 00:38: enabled 1
799 00:35:42.229516 I2C: 00:39: enabled 1
800 00:35:42.232641 I2C: 00:3a: enabled 1
801 00:35:42.236015 I2C: 00:3b: enabled 1
802 00:35:42.239143 PCI: 00:19.1: enabled 0
803 00:35:42.242138 PCI: 00:19.2: enabled 0
804 00:35:42.242232 PCI: 00:1a.0: enabled 0
805 00:35:42.245737 PCI: 00:1c.0: enabled 0
806 00:35:42.248895 PCI: 00:1c.1: enabled 0
807 00:35:42.252168 PCI: 00:1c.2: enabled 0
808 00:35:42.255893 PCI: 00:1c.3: enabled 0
809 00:35:42.255978 PCI: 00:1c.4: enabled 0
810 00:35:42.259097 PCI: 00:1c.5: enabled 0
811 00:35:42.262170 PCI: 00:1c.6: enabled 0
812 00:35:42.265918 PCI: 00:1c.7: enabled 0
813 00:35:42.266044 PCI: 00:1d.0: enabled 1
814 00:35:42.269081 PCI: 00:1d.1: enabled 0
815 00:35:42.272470 PCI: 00:1d.2: enabled 0
816 00:35:42.275521 PCI: 00:1d.3: enabled 0
817 00:35:42.278714 PCI: 00:1d.4: enabled 0
818 00:35:42.278830 PCI: 00:1d.5: enabled 1
819 00:35:42.281978 PCI: 00:00.0: enabled 1
820 00:35:42.285144 PCI: 00:1e.0: enabled 1
821 00:35:42.289042 PCI: 00:1e.1: enabled 0
822 00:35:42.292405 PCI: 00:1e.2: enabled 1
823 00:35:42.292496 SPI: 00: enabled 1
824 00:35:42.295612 PCI: 00:1e.3: enabled 1
825 00:35:42.298931 SPI: 01: enabled 1
826 00:35:42.301911 PCI: 00:1f.0: enabled 1
827 00:35:42.301994 PNP: 0c09.0: enabled 1
828 00:35:42.305390 PCI: 00:1f.1: enabled 1
829 00:35:42.309070 PCI: 00:1f.2: enabled 1
830 00:35:42.312031 PCI: 00:1f.3: enabled 1
831 00:35:42.315273 PCI: 00:1f.4: enabled 1
832 00:35:42.315355 PCI: 00:1f.5: enabled 1
833 00:35:42.318323 PCI: 00:1f.6: enabled 0
834 00:35:42.322174 Root Device scanning...
835 00:35:42.325260 scan_static_bus for Root Device
836 00:35:42.328359 CPU_CLUSTER: 0 enabled
837 00:35:42.328479 DOMAIN: 0000 enabled
838 00:35:42.331855 DOMAIN: 0000 scanning...
839 00:35:42.334970 PCI: pci_scan_bus for bus 00
840 00:35:42.338281 PCI: 00:00.0 [8086/0000] ops
841 00:35:42.342038 PCI: 00:00.0 [8086/9b61] enabled
842 00:35:42.345174 PCI: 00:02.0 [8086/0000] bus ops
843 00:35:42.348235 PCI: 00:02.0 [8086/9b41] enabled
844 00:35:42.351827 PCI: 00:04.0 [8086/1903] disabled
845 00:35:42.354939 PCI: 00:08.0 [8086/1911] enabled
846 00:35:42.358638 PCI: 00:12.0 [8086/02f9] enabled
847 00:35:42.361830 PCI: 00:14.0 [8086/0000] bus ops
848 00:35:42.365065 PCI: 00:14.0 [8086/02ed] enabled
849 00:35:42.368272 PCI: 00:14.2 [8086/02ef] enabled
850 00:35:42.372019 PCI: 00:14.3 [8086/02f0] enabled
851 00:35:42.375173 PCI: 00:15.0 [8086/0000] bus ops
852 00:35:42.378520 PCI: 00:15.0 [8086/02e8] enabled
853 00:35:42.381811 PCI: 00:15.1 [8086/0000] bus ops
854 00:35:42.384995 PCI: 00:15.1 [8086/02e9] enabled
855 00:35:42.388315 PCI: 00:16.0 [8086/0000] ops
856 00:35:42.391592 PCI: 00:16.0 [8086/02e0] enabled
857 00:35:42.394938 PCI: 00:17.0 [8086/0000] ops
858 00:35:42.398199 PCI: 00:17.0 [8086/02d3] enabled
859 00:35:42.401994 PCI: 00:19.0 [8086/0000] bus ops
860 00:35:42.405162 PCI: 00:19.0 [8086/02c5] enabled
861 00:35:42.408335 PCI: 00:1d.0 [8086/0000] bus ops
862 00:35:42.411280 PCI: 00:1d.0 [8086/02b0] enabled
863 00:35:42.417897 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 00:35:42.417988 PCI: 00:1e.0 [8086/0000] ops
865 00:35:42.421438 PCI: 00:1e.0 [8086/02a8] enabled
866 00:35:42.424603 PCI: 00:1e.2 [8086/0000] bus ops
867 00:35:42.427803 PCI: 00:1e.2 [8086/02aa] enabled
868 00:35:42.431583 PCI: 00:1e.3 [8086/0000] bus ops
869 00:35:42.434672 PCI: 00:1e.3 [8086/02ab] enabled
870 00:35:42.438194 PCI: 00:1f.0 [8086/0000] bus ops
871 00:35:42.441162 PCI: 00:1f.0 [8086/0284] enabled
872 00:35:42.447996 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 00:35:42.454267 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 00:35:42.457419 PCI: 00:1f.3 [8086/0000] bus ops
875 00:35:42.461104 PCI: 00:1f.3 [8086/02c8] enabled
876 00:35:42.464089 PCI: 00:1f.4 [8086/0000] bus ops
877 00:35:42.467699 PCI: 00:1f.4 [8086/02a3] enabled
878 00:35:42.470963 PCI: 00:1f.5 [8086/0000] bus ops
879 00:35:42.474177 PCI: 00:1f.5 [8086/02a4] enabled
880 00:35:42.477352 PCI: Leftover static devices:
881 00:35:42.477466 PCI: 00:05.0
882 00:35:42.480690 PCI: 00:12.5
883 00:35:42.480804 PCI: 00:12.6
884 00:35:42.480908 PCI: 00:14.1
885 00:35:42.483808 PCI: 00:14.5
886 00:35:42.483921 PCI: 00:15.2
887 00:35:42.487164 PCI: 00:15.3
888 00:35:42.487277 PCI: 00:16.1
889 00:35:42.491013 PCI: 00:16.2
890 00:35:42.491126 PCI: 00:16.3
891 00:35:42.491225 PCI: 00:16.4
892 00:35:42.494206 PCI: 00:16.5
893 00:35:42.494317 PCI: 00:19.1
894 00:35:42.497391 PCI: 00:19.2
895 00:35:42.497502 PCI: 00:1a.0
896 00:35:42.497615 PCI: 00:1c.0
897 00:35:42.500648 PCI: 00:1c.1
898 00:35:42.500752 PCI: 00:1c.2
899 00:35:42.503923 PCI: 00:1c.3
900 00:35:42.504035 PCI: 00:1c.4
901 00:35:42.504133 PCI: 00:1c.5
902 00:35:42.507132 PCI: 00:1c.6
903 00:35:42.507244 PCI: 00:1c.7
904 00:35:42.510413 PCI: 00:1d.1
905 00:35:42.510525 PCI: 00:1d.2
906 00:35:42.513502 PCI: 00:1d.3
907 00:35:42.513618 PCI: 00:1d.4
908 00:35:42.513717 PCI: 00:1d.5
909 00:35:42.517297 PCI: 00:1e.1
910 00:35:42.517408 PCI: 00:1f.1
911 00:35:42.520489 PCI: 00:1f.2
912 00:35:42.520601 PCI: 00:1f.6
913 00:35:42.523652 PCI: Check your devicetree.cb.
914 00:35:42.527103 PCI: 00:02.0 scanning...
915 00:35:42.530441 scan_generic_bus for PCI: 00:02.0
916 00:35:42.533482 scan_generic_bus for PCI: 00:02.0 done
917 00:35:42.540609 scan_bus: scanning of bus PCI: 00:02.0 took 10178 usecs
918 00:35:42.540734 PCI: 00:14.0 scanning...
919 00:35:42.543714 scan_static_bus for PCI: 00:14.0
920 00:35:42.547205 USB0 port 0 enabled
921 00:35:42.550633 USB0 port 0 scanning...
922 00:35:42.553687 scan_static_bus for USB0 port 0
923 00:35:42.556914 USB2 port 0 enabled
924 00:35:42.557025 USB2 port 1 enabled
925 00:35:42.560566 USB2 port 2 disabled
926 00:35:42.560683 USB2 port 3 disabled
927 00:35:42.563517 USB2 port 5 disabled
928 00:35:42.566964 USB2 port 6 enabled
929 00:35:42.567081 USB2 port 9 enabled
930 00:35:42.570087 USB3 port 0 enabled
931 00:35:42.573729 USB3 port 1 enabled
932 00:35:42.573847 USB3 port 2 enabled
933 00:35:42.576823 USB3 port 3 enabled
934 00:35:42.576936 USB3 port 4 disabled
935 00:35:42.580053 USB2 port 0 scanning...
936 00:35:42.583270 scan_static_bus for USB2 port 0
937 00:35:42.587087 scan_static_bus for USB2 port 0 done
938 00:35:42.593541 scan_bus: scanning of bus USB2 port 0 took 9704 usecs
939 00:35:42.596844 USB2 port 1 scanning...
940 00:35:42.600008 scan_static_bus for USB2 port 1
941 00:35:42.603384 scan_static_bus for USB2 port 1 done
942 00:35:42.606726 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
943 00:35:42.609944 USB2 port 6 scanning...
944 00:35:42.613316 scan_static_bus for USB2 port 6
945 00:35:42.616570 scan_static_bus for USB2 port 6 done
946 00:35:42.623573 scan_bus: scanning of bus USB2 port 6 took 9705 usecs
947 00:35:42.626935 USB2 port 9 scanning...
948 00:35:42.630274 scan_static_bus for USB2 port 9
949 00:35:42.633181 scan_static_bus for USB2 port 9 done
950 00:35:42.639781 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
951 00:35:42.639896 USB3 port 0 scanning...
952 00:35:42.643446 scan_static_bus for USB3 port 0
953 00:35:42.646657 scan_static_bus for USB3 port 0 done
954 00:35:42.653005 scan_bus: scanning of bus USB3 port 0 took 9703 usecs
955 00:35:42.656664 USB3 port 1 scanning...
956 00:35:42.659579 scan_static_bus for USB3 port 1
957 00:35:42.663183 scan_static_bus for USB3 port 1 done
958 00:35:42.670008 scan_bus: scanning of bus USB3 port 1 took 9704 usecs
959 00:35:42.670132 USB3 port 2 scanning...
960 00:35:42.673205 scan_static_bus for USB3 port 2
961 00:35:42.679371 scan_static_bus for USB3 port 2 done
962 00:35:42.682615 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
963 00:35:42.686277 USB3 port 3 scanning...
964 00:35:42.689345 scan_static_bus for USB3 port 3
965 00:35:42.692573 scan_static_bus for USB3 port 3 done
966 00:35:42.699486 scan_bus: scanning of bus USB3 port 3 took 9705 usecs
967 00:35:42.702662 scan_static_bus for USB0 port 0 done
968 00:35:42.705942 scan_bus: scanning of bus USB0 port 0 took 155373 usecs
969 00:35:42.713004 scan_static_bus for PCI: 00:14.0 done
970 00:35:42.716262 scan_bus: scanning of bus PCI: 00:14.0 took 172994 usecs
971 00:35:42.719600 PCI: 00:15.0 scanning...
972 00:35:42.722572 scan_generic_bus for PCI: 00:15.0
973 00:35:42.725993 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 00:35:42.732312 scan_generic_bus for PCI: 00:15.0 done
975 00:35:42.735544 scan_bus: scanning of bus PCI: 00:15.0 took 14305 usecs
976 00:35:42.739323 PCI: 00:15.1 scanning...
977 00:35:42.742543 scan_generic_bus for PCI: 00:15.1
978 00:35:42.745533 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 00:35:42.752264 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 00:35:42.755457 scan_generic_bus for PCI: 00:15.1 done
981 00:35:42.762588 scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs
982 00:35:42.762721 PCI: 00:19.0 scanning...
983 00:35:42.765699 scan_generic_bus for PCI: 00:19.0
984 00:35:42.772285 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 00:35:42.775285 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 00:35:42.779048 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 00:35:42.782189 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 00:35:42.788958 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 00:35:42.792219 scan_generic_bus for PCI: 00:19.0 done
990 00:35:42.795258 scan_bus: scanning of bus PCI: 00:19.0 took 30737 usecs
991 00:35:42.799084 PCI: 00:1d.0 scanning...
992 00:35:42.801877 do_pci_scan_bridge for PCI: 00:1d.0
993 00:35:42.805633 PCI: pci_scan_bus for bus 01
994 00:35:42.809037 PCI: 01:00.0 [1c5c/1327] enabled
995 00:35:42.812137 Enabling Common Clock Configuration
996 00:35:42.818606 L1 Sub-State supported from root port 29
997 00:35:42.822478 L1 Sub-State Support = 0xf
998 00:35:42.822568 CommonModeRestoreTime = 0x28
999 00:35:42.828616 Power On Value = 0x16, Power On Scale = 0x0
1000 00:35:42.828707 ASPM: Enabled L1
1001 00:35:42.835480 scan_bus: scanning of bus PCI: 00:1d.0 took 32772 usecs
1002 00:35:42.838585 PCI: 00:1e.2 scanning...
1003 00:35:42.841860 scan_generic_bus for PCI: 00:1e.2
1004 00:35:42.845085 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 00:35:42.848963 scan_generic_bus for PCI: 00:1e.2 done
1006 00:35:42.854970 scan_bus: scanning of bus PCI: 00:1e.2 took 14012 usecs
1007 00:35:42.858928 PCI: 00:1e.3 scanning...
1008 00:35:42.861870 scan_generic_bus for PCI: 00:1e.3
1009 00:35:42.865035 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 00:35:42.868274 scan_generic_bus for PCI: 00:1e.3 done
1011 00:35:42.875232 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1012 00:35:42.875345 PCI: 00:1f.0 scanning...
1013 00:35:42.878615 scan_static_bus for PCI: 00:1f.0
1014 00:35:42.881640 PNP: 0c09.0 enabled
1015 00:35:42.885222 scan_static_bus for PCI: 00:1f.0 done
1016 00:35:42.891516 scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
1017 00:35:42.895310 PCI: 00:1f.3 scanning...
1018 00:35:42.898199 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1019 00:35:42.901890 PCI: 00:1f.4 scanning...
1020 00:35:42.904944 scan_generic_bus for PCI: 00:1f.4
1021 00:35:42.908170 scan_generic_bus for PCI: 00:1f.4 done
1022 00:35:42.914710 scan_bus: scanning of bus PCI: 00:1f.4 took 10180 usecs
1023 00:35:42.918576 PCI: 00:1f.5 scanning...
1024 00:35:42.921828 scan_generic_bus for PCI: 00:1f.5
1025 00:35:42.924996 scan_generic_bus for PCI: 00:1f.5 done
1026 00:35:42.931314 scan_bus: scanning of bus PCI: 00:1f.5 took 10183 usecs
1027 00:35:42.938210 scan_bus: scanning of bus DOMAIN: 0000 took 605004 usecs
1028 00:35:42.941314 scan_static_bus for Root Device done
1029 00:35:42.944489 scan_bus: scanning of bus Root Device took 624917 usecs
1030 00:35:42.948498 done
1031 00:35:42.951660 Chrome EC: UHEPI supported
1032 00:35:42.954818 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 00:35:42.961760 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 00:35:42.967914 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 00:35:42.974498 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 00:35:42.977796 SPI flash protection: WPSW=0 SRP0=1
1037 00:35:42.984746 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 00:35:42.987578 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1039 00:35:42.991039 found VGA at PCI: 00:02.0
1040 00:35:42.994513 Setting up VGA for PCI: 00:02.0
1041 00:35:43.001243 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 00:35:43.004524 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 00:35:43.007684 Allocating resources...
1044 00:35:43.011213 Reading resources...
1045 00:35:43.014144 Root Device read_resources bus 0 link: 0
1046 00:35:43.017842 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 00:35:43.024163 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 00:35:43.027345 DOMAIN: 0000 read_resources bus 0 link: 0
1049 00:35:43.034722 PCI: 00:14.0 read_resources bus 0 link: 0
1050 00:35:43.037884 USB0 port 0 read_resources bus 0 link: 0
1051 00:35:43.046081 USB0 port 0 read_resources bus 0 link: 0 done
1052 00:35:43.049290 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 00:35:43.056875 PCI: 00:15.0 read_resources bus 1 link: 0
1054 00:35:43.059962 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 00:35:43.066343 PCI: 00:15.1 read_resources bus 2 link: 0
1056 00:35:43.070080 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 00:35:43.077402 PCI: 00:19.0 read_resources bus 3 link: 0
1058 00:35:43.083882 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 00:35:43.087667 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 00:35:43.093938 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 00:35:43.097127 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 00:35:43.104161 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 00:35:43.107561 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 00:35:43.113920 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 00:35:43.117732 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 00:35:43.124250 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 00:35:43.130665 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 00:35:43.133850 Root Device read_resources bus 0 link: 0 done
1069 00:35:43.137123 Done reading resources.
1070 00:35:43.140954 Show resources in subtree (Root Device)...After reading.
1071 00:35:43.147419 Root Device child on link 0 CPU_CLUSTER: 0
1072 00:35:43.150525 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 00:35:43.150611 APIC: 00
1074 00:35:43.153632 APIC: 02
1075 00:35:43.153717 APIC: 01
1076 00:35:43.157369 APIC: 03
1077 00:35:43.157454 APIC: 07
1078 00:35:43.157530 APIC: 06
1079 00:35:43.160506 APIC: 05
1080 00:35:43.160590 APIC: 04
1081 00:35:43.163628 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 00:35:43.220483 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 00:35:43.220822 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 00:35:43.220936 PCI: 00:00.0
1085 00:35:43.221300 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 00:35:43.221726 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 00:35:43.221990 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 00:35:43.269744 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 00:35:43.270088 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 00:35:43.270210 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 00:35:43.270305 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 00:35:43.270563 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 00:35:43.270825 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 00:35:43.319482 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 00:35:43.319605 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 00:35:43.320450 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 00:35:43.320712 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 00:35:43.321592 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 00:35:43.325284 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 00:35:43.335077 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 00:35:43.338632 PCI: 00:02.0
1102 00:35:43.348205 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 00:35:43.358505 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 00:35:43.365298 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 00:35:43.368576 PCI: 00:04.0
1106 00:35:43.368669 PCI: 00:08.0
1107 00:35:43.378194 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 00:35:43.381411 PCI: 00:12.0
1109 00:35:43.391802 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 00:35:43.394900 PCI: 00:14.0 child on link 0 USB0 port 0
1111 00:35:43.405081 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 00:35:43.408171 USB0 port 0 child on link 0 USB2 port 0
1113 00:35:43.411374 USB2 port 0
1114 00:35:43.414527 USB2 port 1
1115 00:35:43.414634 USB2 port 2
1116 00:35:43.418307 USB2 port 3
1117 00:35:43.418410 USB2 port 5
1118 00:35:43.421412 USB2 port 6
1119 00:35:43.421487 USB2 port 9
1120 00:35:43.424431 USB3 port 0
1121 00:35:43.424518 USB3 port 1
1122 00:35:43.428036 USB3 port 2
1123 00:35:43.428126 USB3 port 3
1124 00:35:43.431568 USB3 port 4
1125 00:35:43.431679 PCI: 00:14.2
1126 00:35:43.441285 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 00:35:43.451340 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 00:35:43.454483 PCI: 00:14.3
1129 00:35:43.464183 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 00:35:43.467973 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 00:35:43.477447 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 00:35:43.480834 I2C: 01:15
1133 00:35:43.484603 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 00:35:43.494319 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 00:35:43.494408 I2C: 02:5d
1136 00:35:43.497484 GENERIC: 0.0
1137 00:35:43.497605 PCI: 00:16.0
1138 00:35:43.507544 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 00:35:43.510726 PCI: 00:17.0
1140 00:35:43.520794 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 00:35:43.527095 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 00:35:43.537390 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 00:35:43.543454 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 00:35:43.553391 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 00:35:43.563460 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 00:35:43.566705 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 00:35:43.576792 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 00:35:43.576915 I2C: 03:1a
1149 00:35:43.579947 I2C: 03:38
1150 00:35:43.580060 I2C: 03:39
1151 00:35:43.583701 I2C: 03:3a
1152 00:35:43.583812 I2C: 03:3b
1153 00:35:43.590185 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 00:35:43.596719 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 00:35:43.606863 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 00:35:43.616409 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 00:35:43.616504 PCI: 01:00.0
1158 00:35:43.626253 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 00:35:43.629579 PCI: 00:1e.0
1160 00:35:43.639772 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 00:35:43.649808 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 00:35:43.656238 PCI: 00:1e.2 child on link 0 SPI: 00
1163 00:35:43.666133 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 00:35:43.666251 SPI: 00
1165 00:35:43.669308 PCI: 00:1e.3 child on link 0 SPI: 01
1166 00:35:43.679721 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 00:35:43.683002 SPI: 01
1168 00:35:43.686149 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 00:35:43.692651 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 00:35:43.702936 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 00:35:43.706100 PNP: 0c09.0
1172 00:35:43.712511 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 00:35:43.716057 PCI: 00:1f.3
1174 00:35:43.725639 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 00:35:43.735865 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 00:35:43.735959 PCI: 00:1f.4
1177 00:35:43.745391 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 00:35:43.755482 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 00:35:43.755571 PCI: 00:1f.5
1180 00:35:43.765926 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 00:35:43.772597 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 00:35:43.779234 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 00:35:43.785194 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 00:35:43.788981 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 00:35:43.792117 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 00:35:43.795306 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 00:35:43.798443 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 00:35:43.808946 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 00:35:43.815222 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 00:35:43.821556 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 00:35:43.828300 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 00:35:43.838634 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 00:35:43.841865 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 00:35:43.848332 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 00:35:43.851453 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 00:35:43.858189 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 00:35:43.861907 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 00:35:43.868382 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 00:35:43.871600 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 00:35:43.878558 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 00:35:43.881474 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 00:35:43.887806 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 00:35:43.891199 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 00:35:43.897867 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 00:35:43.901157 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 00:35:43.908287 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 00:35:43.910902 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 00:35:43.917744 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 00:35:43.920936 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 00:35:43.927846 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 00:35:43.930936 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 00:35:43.934438 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 00:35:43.941225 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 00:35:43.944493 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 00:35:43.951161 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 00:35:43.954261 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 00:35:43.960730 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 00:35:43.967414 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 00:35:43.970484 avoid_fixed_resources: DOMAIN: 0000
1220 00:35:43.976965 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 00:35:43.984002 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 00:35:43.990278 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 00:35:44.000358 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 00:35:44.006692 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 00:35:44.013162 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 00:35:44.023598 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 00:35:44.030031 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 00:35:44.036433 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 00:35:44.046860 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 00:35:44.053367 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 00:35:44.059952 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 00:35:44.063052 Setting resources...
1233 00:35:44.069397 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 00:35:44.073024 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 00:35:44.075946 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 00:35:44.079510 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 00:35:44.083087 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 00:35:44.089714 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 00:35:44.096078 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 00:35:44.102929 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 00:35:44.109450 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 00:35:44.115645 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 00:35:44.119568 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 00:35:44.126017 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 00:35:44.129251 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 00:35:44.135674 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 00:35:44.138976 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 00:35:44.145793 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 00:35:44.148794 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 00:35:44.155683 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 00:35:44.159039 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 00:35:44.165408 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 00:35:44.168960 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 00:35:44.175197 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 00:35:44.178928 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 00:35:44.185065 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 00:35:44.188622 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 00:35:44.195231 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 00:35:44.198896 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 00:35:44.201934 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 00:35:44.208724 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 00:35:44.211939 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 00:35:44.218147 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 00:35:44.222119 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 00:35:44.231818 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 00:35:44.238567 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 00:35:44.244865 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 00:35:44.251240 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 00:35:44.257859 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 00:35:44.265015 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 00:35:44.268192 Root Device assign_resources, bus 0 link: 0
1272 00:35:44.274574 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 00:35:44.280953 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 00:35:44.291196 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 00:35:44.297430 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 00:35:44.307315 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 00:35:44.313977 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 00:35:44.324002 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 00:35:44.327690 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 00:35:44.334043 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 00:35:44.340501 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 00:35:44.346969 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 00:35:44.357366 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 00:35:44.364141 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 00:35:44.370976 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 00:35:44.374172 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 00:35:44.383951 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 00:35:44.387064 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 00:35:44.393918 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 00:35:44.400310 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 00:35:44.407439 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 00:35:44.416746 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 00:35:44.423246 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 00:35:44.430339 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 00:35:44.440151 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 00:35:44.446590 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 00:35:44.456310 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 00:35:44.459593 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 00:35:44.462826 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 00:35:44.473336 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 00:35:44.482899 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 00:35:44.490178 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 00:35:44.496332 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 00:35:44.503237 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 00:35:44.509617 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 00:35:44.516473 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 00:35:44.526241 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 00:35:44.529753 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 00:35:44.533276 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 00:35:44.543136 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 00:35:44.546151 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 00:35:44.553019 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 00:35:44.556355 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 00:35:44.562783 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 00:35:44.566057 LPC: Trying to open IO window from 800 size 1ff
1316 00:35:44.576134 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 00:35:44.582234 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 00:35:44.589371 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 00:35:44.599622 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 00:35:44.602592 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 00:35:44.609707 Root Device assign_resources, bus 0 link: 0
1322 00:35:44.609823 Done setting resources.
1323 00:35:44.616071 Show resources in subtree (Root Device)...After assigning values.
1324 00:35:44.622545 Root Device child on link 0 CPU_CLUSTER: 0
1325 00:35:44.625798 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 00:35:44.625904 APIC: 00
1327 00:35:44.629428 APIC: 02
1328 00:35:44.629545 APIC: 01
1329 00:35:44.632523 APIC: 03
1330 00:35:44.632631 APIC: 07
1331 00:35:44.632724 APIC: 06
1332 00:35:44.635631 APIC: 05
1333 00:35:44.635737 APIC: 04
1334 00:35:44.639354 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 00:35:44.649217 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 00:35:44.662663 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 00:35:44.662786 PCI: 00:00.0
1338 00:35:44.672328 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 00:35:44.682429 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 00:35:44.692529 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 00:35:44.702015 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 00:35:44.708944 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 00:35:44.718726 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 00:35:44.728629 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 00:35:44.738478 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 00:35:44.748504 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 00:35:44.754628 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 00:35:44.764769 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 00:35:44.775005 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 00:35:44.784389 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 00:35:44.794603 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 00:35:44.804484 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 00:35:44.814149 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 00:35:44.814244 PCI: 00:02.0
1355 00:35:44.824345 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 00:35:44.834079 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 00:35:44.843704 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 00:35:44.847309 PCI: 00:04.0
1359 00:35:44.847400 PCI: 00:08.0
1360 00:35:44.857455 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 00:35:44.860649 PCI: 00:12.0
1362 00:35:44.870587 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 00:35:44.873806 PCI: 00:14.0 child on link 0 USB0 port 0
1364 00:35:44.883384 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 00:35:44.890429 USB0 port 0 child on link 0 USB2 port 0
1366 00:35:44.890525 USB2 port 0
1367 00:35:44.893599 USB2 port 1
1368 00:35:44.893678 USB2 port 2
1369 00:35:44.896889 USB2 port 3
1370 00:35:44.896967 USB2 port 5
1371 00:35:44.900185 USB2 port 6
1372 00:35:44.900282 USB2 port 9
1373 00:35:44.903724 USB3 port 0
1374 00:35:44.906662 USB3 port 1
1375 00:35:44.906743 USB3 port 2
1376 00:35:44.910428 USB3 port 3
1377 00:35:44.910512 USB3 port 4
1378 00:35:44.913568 PCI: 00:14.2
1379 00:35:44.923345 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 00:35:44.933523 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 00:35:44.933627 PCI: 00:14.3
1382 00:35:44.943385 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 00:35:44.949667 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 00:35:44.959868 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 00:35:44.959953 I2C: 01:15
1386 00:35:44.966331 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 00:35:44.976519 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 00:35:44.976617 I2C: 02:5d
1389 00:35:44.979918 GENERIC: 0.0
1390 00:35:44.980056 PCI: 00:16.0
1391 00:35:44.989363 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 00:35:44.992651 PCI: 00:17.0
1393 00:35:45.002928 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 00:35:45.012529 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 00:35:45.022558 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 00:35:45.032236 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 00:35:45.038903 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 00:35:45.049259 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 00:35:45.055621 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 00:35:45.065681 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 00:35:45.065788 I2C: 03:1a
1402 00:35:45.068749 I2C: 03:38
1403 00:35:45.068871 I2C: 03:39
1404 00:35:45.071885 I2C: 03:3a
1405 00:35:45.071963 I2C: 03:3b
1406 00:35:45.078755 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 00:35:45.085427 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 00:35:45.095439 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 00:35:45.108449 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 00:35:45.108542 PCI: 01:00.0
1411 00:35:45.118546 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 00:35:45.121748 PCI: 00:1e.0
1413 00:35:45.131575 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 00:35:45.141866 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 00:35:45.145096 PCI: 00:1e.2 child on link 0 SPI: 00
1416 00:35:45.154584 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 00:35:45.157856 SPI: 00
1418 00:35:45.161657 PCI: 00:1e.3 child on link 0 SPI: 01
1419 00:35:45.171061 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 00:35:45.174442 SPI: 01
1421 00:35:45.177999 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 00:35:45.187584 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 00:35:45.194429 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 00:35:45.197958 PNP: 0c09.0
1425 00:35:45.204278 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 00:35:45.207445 PCI: 00:1f.3
1427 00:35:45.217751 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 00:35:45.227556 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 00:35:45.230909 PCI: 00:1f.4
1430 00:35:45.237386 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 00:35:45.247482 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 00:35:45.250736 PCI: 00:1f.5
1433 00:35:45.260307 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 00:35:45.263509 Done allocating resources.
1435 00:35:45.270350 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 00:35:45.270448 Enabling resources...
1437 00:35:45.277981 PCI: 00:00.0 subsystem <- 8086/9b61
1438 00:35:45.278063 PCI: 00:00.0 cmd <- 06
1439 00:35:45.281106 PCI: 00:02.0 subsystem <- 8086/9b41
1440 00:35:45.284303 PCI: 00:02.0 cmd <- 03
1441 00:35:45.287830 PCI: 00:08.0 cmd <- 06
1442 00:35:45.290726 PCI: 00:12.0 subsystem <- 8086/02f9
1443 00:35:45.294149 PCI: 00:12.0 cmd <- 02
1444 00:35:45.297920 PCI: 00:14.0 subsystem <- 8086/02ed
1445 00:35:45.300978 PCI: 00:14.0 cmd <- 02
1446 00:35:45.304034 PCI: 00:14.2 cmd <- 02
1447 00:35:45.307699 PCI: 00:14.3 subsystem <- 8086/02f0
1448 00:35:45.307809 PCI: 00:14.3 cmd <- 02
1449 00:35:45.314197 PCI: 00:15.0 subsystem <- 8086/02e8
1450 00:35:45.314278 PCI: 00:15.0 cmd <- 02
1451 00:35:45.317628 PCI: 00:15.1 subsystem <- 8086/02e9
1452 00:35:45.320712 PCI: 00:15.1 cmd <- 02
1453 00:35:45.324613 PCI: 00:16.0 subsystem <- 8086/02e0
1454 00:35:45.327591 PCI: 00:16.0 cmd <- 02
1455 00:35:45.330847 PCI: 00:17.0 subsystem <- 8086/02d3
1456 00:35:45.334122 PCI: 00:17.0 cmd <- 03
1457 00:35:45.337829 PCI: 00:19.0 subsystem <- 8086/02c5
1458 00:35:45.340893 PCI: 00:19.0 cmd <- 02
1459 00:35:45.344508 PCI: 00:1d.0 bridge ctrl <- 0013
1460 00:35:45.347437 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 00:35:45.351147 PCI: 00:1d.0 cmd <- 06
1462 00:35:45.354180 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 00:35:45.357385 PCI: 00:1e.0 cmd <- 06
1464 00:35:45.360608 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 00:35:45.360707 PCI: 00:1e.2 cmd <- 06
1466 00:35:45.367719 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 00:35:45.367803 PCI: 00:1e.3 cmd <- 02
1468 00:35:45.374153 PCI: 00:1f.0 subsystem <- 8086/0284
1469 00:35:45.374236 PCI: 00:1f.0 cmd <- 407
1470 00:35:45.377300 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 00:35:45.381013 PCI: 00:1f.3 cmd <- 02
1472 00:35:45.384108 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 00:35:45.387408 PCI: 00:1f.4 cmd <- 03
1474 00:35:45.390546 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 00:35:45.394166 PCI: 00:1f.5 cmd <- 406
1476 00:35:45.402784 PCI: 01:00.0 cmd <- 02
1477 00:35:45.408130 done.
1478 00:35:45.420535 ME: Version: 14.0.39.1367
1479 00:35:45.427110 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1480 00:35:45.430349 Initializing devices...
1481 00:35:45.430431 Root Device init ...
1482 00:35:45.436693 Chrome EC: Set SMI mask to 0x0000000000000000
1483 00:35:45.439932 Chrome EC: clear events_b mask to 0x0000000000000000
1484 00:35:45.446857 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 00:35:45.453404 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 00:35:45.460489 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 00:35:45.463657 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 00:35:45.466943 Root Device init finished in 35185 usecs
1489 00:35:45.470163 CPU_CLUSTER: 0 init ...
1490 00:35:45.477124 CPU_CLUSTER: 0 init finished in 2447 usecs
1491 00:35:45.481336 PCI: 00:00.0 init ...
1492 00:35:45.484533 CPU TDP: 15 Watts
1493 00:35:45.487686 CPU PL2 = 64 Watts
1494 00:35:45.490959 PCI: 00:00.0 init finished in 7080 usecs
1495 00:35:45.494234 PCI: 00:02.0 init ...
1496 00:35:45.497878 PCI: 00:02.0 init finished in 2244 usecs
1497 00:35:45.501081 PCI: 00:08.0 init ...
1498 00:35:45.504223 PCI: 00:08.0 init finished in 2252 usecs
1499 00:35:45.507483 PCI: 00:12.0 init ...
1500 00:35:45.510953 PCI: 00:12.0 init finished in 2253 usecs
1501 00:35:45.513962 PCI: 00:14.0 init ...
1502 00:35:45.517427 PCI: 00:14.0 init finished in 2253 usecs
1503 00:35:45.520549 PCI: 00:14.2 init ...
1504 00:35:45.524218 PCI: 00:14.2 init finished in 2252 usecs
1505 00:35:45.527266 PCI: 00:14.3 init ...
1506 00:35:45.530477 PCI: 00:14.3 init finished in 2262 usecs
1507 00:35:45.533676 PCI: 00:15.0 init ...
1508 00:35:45.537405 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 00:35:45.540579 PCI: 00:15.0 init finished in 5976 usecs
1510 00:35:45.543886 PCI: 00:15.1 init ...
1511 00:35:45.546998 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 00:35:45.553494 PCI: 00:15.1 init finished in 5978 usecs
1513 00:35:45.553602 PCI: 00:16.0 init ...
1514 00:35:45.560337 PCI: 00:16.0 init finished in 2254 usecs
1515 00:35:45.563896 PCI: 00:19.0 init ...
1516 00:35:45.566804 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 00:35:45.570399 PCI: 00:19.0 init finished in 5978 usecs
1518 00:35:45.573727 PCI: 00:1d.0 init ...
1519 00:35:45.576837 Initializing PCH PCIe bridge.
1520 00:35:45.580137 PCI: 00:1d.0 init finished in 5287 usecs
1521 00:35:45.583939 PCI: 00:1f.0 init ...
1522 00:35:45.586930 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 00:35:45.593887 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 00:35:45.593982 IOAPIC: ID = 0x02
1525 00:35:45.597082 IOAPIC: Dumping registers
1526 00:35:45.600166 reg 0x0000: 0x02000000
1527 00:35:45.603860 reg 0x0001: 0x00770020
1528 00:35:45.603961 reg 0x0002: 0x00000000
1529 00:35:45.610209 PCI: 00:1f.0 init finished in 23535 usecs
1530 00:35:45.613399 PCI: 00:1f.4 init ...
1531 00:35:45.616456 PCI: 00:1f.4 init finished in 2262 usecs
1532 00:35:45.627345 PCI: 01:00.0 init ...
1533 00:35:45.630482 PCI: 01:00.0 init finished in 2252 usecs
1534 00:35:45.634290 PNP: 0c09.0 init ...
1535 00:35:45.641156 Google Chrome EC uptime: 11.098 seconds
1536 00:35:45.644480 Google Chrome AP resets since EC boot: 0
1537 00:35:45.647675 Google Chrome most recent AP reset causes:
1538 00:35:45.654227 Google Chrome EC reset flags at last EC boot: reset-pin
1539 00:35:45.658082 PNP: 0c09.0 init finished in 20587 usecs
1540 00:35:45.661329 Devices initialized
1541 00:35:45.664591 Show all devs... After init.
1542 00:35:45.664693 Root Device: enabled 1
1543 00:35:45.667793 CPU_CLUSTER: 0: enabled 1
1544 00:35:45.670815 DOMAIN: 0000: enabled 1
1545 00:35:45.670902 APIC: 00: enabled 1
1546 00:35:45.674162 PCI: 00:00.0: enabled 1
1547 00:35:45.677594 PCI: 00:02.0: enabled 1
1548 00:35:45.680808 PCI: 00:04.0: enabled 0
1549 00:35:45.680894 PCI: 00:05.0: enabled 0
1550 00:35:45.684405 PCI: 00:12.0: enabled 1
1551 00:35:45.687644 PCI: 00:12.5: enabled 0
1552 00:35:45.690709 PCI: 00:12.6: enabled 0
1553 00:35:45.690796 PCI: 00:14.0: enabled 1
1554 00:35:45.693945 PCI: 00:14.1: enabled 0
1555 00:35:45.697246 PCI: 00:14.3: enabled 1
1556 00:35:45.697331 PCI: 00:14.5: enabled 0
1557 00:35:45.701089 PCI: 00:15.0: enabled 1
1558 00:35:45.704192 PCI: 00:15.1: enabled 1
1559 00:35:45.707231 PCI: 00:15.2: enabled 0
1560 00:35:45.707317 PCI: 00:15.3: enabled 0
1561 00:35:45.710483 PCI: 00:16.0: enabled 1
1562 00:35:45.714339 PCI: 00:16.1: enabled 0
1563 00:35:45.717481 PCI: 00:16.2: enabled 0
1564 00:35:45.717577 PCI: 00:16.3: enabled 0
1565 00:35:45.720713 PCI: 00:16.4: enabled 0
1566 00:35:45.723887 PCI: 00:16.5: enabled 0
1567 00:35:45.727015 PCI: 00:17.0: enabled 1
1568 00:35:45.727101 PCI: 00:19.0: enabled 1
1569 00:35:45.730771 PCI: 00:19.1: enabled 0
1570 00:35:45.733841 PCI: 00:19.2: enabled 0
1571 00:35:45.736789 PCI: 00:1a.0: enabled 0
1572 00:35:45.736874 PCI: 00:1c.0: enabled 0
1573 00:35:45.740475 PCI: 00:1c.1: enabled 0
1574 00:35:45.743898 PCI: 00:1c.2: enabled 0
1575 00:35:45.743988 PCI: 00:1c.3: enabled 0
1576 00:35:45.746958 PCI: 00:1c.4: enabled 0
1577 00:35:45.750623 PCI: 00:1c.5: enabled 0
1578 00:35:45.753716 PCI: 00:1c.6: enabled 0
1579 00:35:45.753801 PCI: 00:1c.7: enabled 0
1580 00:35:45.757010 PCI: 00:1d.0: enabled 1
1581 00:35:45.760107 PCI: 00:1d.1: enabled 0
1582 00:35:45.763269 PCI: 00:1d.2: enabled 0
1583 00:35:45.763355 PCI: 00:1d.3: enabled 0
1584 00:35:45.767088 PCI: 00:1d.4: enabled 0
1585 00:35:45.770374 PCI: 00:1d.5: enabled 0
1586 00:35:45.773680 PCI: 00:1e.0: enabled 1
1587 00:35:45.773770 PCI: 00:1e.1: enabled 0
1588 00:35:45.776766 PCI: 00:1e.2: enabled 1
1589 00:35:45.779800 PCI: 00:1e.3: enabled 1
1590 00:35:45.783077 PCI: 00:1f.0: enabled 1
1591 00:35:45.783162 PCI: 00:1f.1: enabled 0
1592 00:35:45.786590 PCI: 00:1f.2: enabled 0
1593 00:35:45.790207 PCI: 00:1f.3: enabled 1
1594 00:35:45.790295 PCI: 00:1f.4: enabled 1
1595 00:35:45.793353 PCI: 00:1f.5: enabled 1
1596 00:35:45.796568 PCI: 00:1f.6: enabled 0
1597 00:35:45.799883 USB0 port 0: enabled 1
1598 00:35:45.799969 I2C: 01:15: enabled 1
1599 00:35:45.802979 I2C: 02:5d: enabled 1
1600 00:35:45.806301 GENERIC: 0.0: enabled 1
1601 00:35:45.806388 I2C: 03:1a: enabled 1
1602 00:35:45.810044 I2C: 03:38: enabled 1
1603 00:35:45.813077 I2C: 03:39: enabled 1
1604 00:35:45.813167 I2C: 03:3a: enabled 1
1605 00:35:45.816311 I2C: 03:3b: enabled 1
1606 00:35:45.819560 PCI: 00:00.0: enabled 1
1607 00:35:45.819640 SPI: 00: enabled 1
1608 00:35:45.823265 SPI: 01: enabled 1
1609 00:35:45.826481 PNP: 0c09.0: enabled 1
1610 00:35:45.826556 USB2 port 0: enabled 1
1611 00:35:45.829598 USB2 port 1: enabled 1
1612 00:35:45.832661 USB2 port 2: enabled 0
1613 00:35:45.835952 USB2 port 3: enabled 0
1614 00:35:45.836037 USB2 port 5: enabled 0
1615 00:35:45.839113 USB2 port 6: enabled 1
1616 00:35:45.842816 USB2 port 9: enabled 1
1617 00:35:45.842939 USB3 port 0: enabled 1
1618 00:35:45.846341 USB3 port 1: enabled 1
1619 00:35:45.849582 USB3 port 2: enabled 1
1620 00:35:45.852722 USB3 port 3: enabled 1
1621 00:35:45.852804 USB3 port 4: enabled 0
1622 00:35:45.855947 APIC: 02: enabled 1
1623 00:35:45.856067 APIC: 01: enabled 1
1624 00:35:45.859527 APIC: 03: enabled 1
1625 00:35:45.862688 APIC: 07: enabled 1
1626 00:35:45.862770 APIC: 06: enabled 1
1627 00:35:45.865906 APIC: 05: enabled 1
1628 00:35:45.868978 APIC: 04: enabled 1
1629 00:35:45.869083 PCI: 00:08.0: enabled 1
1630 00:35:45.872188 PCI: 00:14.2: enabled 1
1631 00:35:45.876247 PCI: 01:00.0: enabled 1
1632 00:35:45.879316 Disabling ACPI via APMC:
1633 00:35:45.882432 done.
1634 00:35:45.885625 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 00:35:45.888698 ELOG: NV offset 0xaf0000 size 0x4000
1636 00:35:45.896207 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 00:35:45.902969 ELOG: Event(17) added with size 13 at 2023-05-23 00:35:45 UTC
1638 00:35:45.909990 POST: Unexpected post code in previous boot: 0x73
1639 00:35:45.916298 ELOG: Event(A3) added with size 11 at 2023-05-23 00:35:45 UTC
1640 00:35:45.922888 ELOG: Event(A6) added with size 13 at 2023-05-23 00:35:45 UTC
1641 00:35:45.929838 ELOG: Event(92) added with size 9 at 2023-05-23 00:35:45 UTC
1642 00:35:45.932999 ELOG: Event(93) added with size 9 at 2023-05-23 00:35:45 UTC
1643 00:35:45.939388 ELOG: Event(9A) added with size 9 at 2023-05-23 00:35:45 UTC
1644 00:35:45.946538 ELOG: Event(9E) added with size 10 at 2023-05-23 00:35:45 UTC
1645 00:35:45.953014 ELOG: Event(9F) added with size 14 at 2023-05-23 00:35:45 UTC
1646 00:35:45.959424 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1647 00:35:45.966446 ELOG: Event(A1) added with size 10 at 2023-05-23 00:35:46 UTC
1648 00:35:45.972549 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1649 00:35:45.979526 ELOG: Event(A0) added with size 9 at 2023-05-23 00:35:46 UTC
1650 00:35:45.982865 elog_add_boot_reason: Logged dev mode boot
1651 00:35:45.986014 Finalize devices...
1652 00:35:45.989147 PCI: 00:17.0 final
1653 00:35:45.989250 Devices finalized
1654 00:35:45.995923 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1655 00:35:45.999199 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1656 00:35:46.006078 ME: HFSTS1 : 0x90000245
1657 00:35:46.008946 ME: HFSTS2 : 0x3B850126
1658 00:35:46.012579 ME: HFSTS3 : 0x00000020
1659 00:35:46.015864 ME: HFSTS4 : 0x00004800
1660 00:35:46.022124 ME: HFSTS5 : 0x00000000
1661 00:35:46.026077 ME: HFSTS6 : 0x40400006
1662 00:35:46.029105 ME: Manufacturing Mode : NO
1663 00:35:46.032108 ME: FW Partition Table : OK
1664 00:35:46.035361 ME: Bringup Loader Failure : NO
1665 00:35:46.039054 ME: Firmware Init Complete : YES
1666 00:35:46.042194 ME: Boot Options Present : NO
1667 00:35:46.045427 ME: Update In Progress : NO
1668 00:35:46.048579 ME: D0i3 Support : YES
1669 00:35:46.051897 ME: Low Power State Enabled : NO
1670 00:35:46.055583 ME: CPU Replaced : NO
1671 00:35:46.058735 ME: CPU Replacement Valid : YES
1672 00:35:46.061786 ME: Current Working State : 5
1673 00:35:46.065606 ME: Current Operation State : 1
1674 00:35:46.068821 ME: Current Operation Mode : 0
1675 00:35:46.071798 ME: Error Code : 0
1676 00:35:46.075021 ME: CPU Debug Disabled : YES
1677 00:35:46.078777 ME: TXT Support : NO
1678 00:35:46.081723 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1679 00:35:46.088829 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1680 00:35:46.092077 CBFS @ c08000 size 3f8000
1681 00:35:46.098205 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1682 00:35:46.102057 CBFS: Locating 'fallback/dsdt.aml'
1683 00:35:46.105290 CBFS: Found @ offset 10bb80 size 3fa5
1684 00:35:46.108655 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1685 00:35:46.111616 CBFS @ c08000 size 3f8000
1686 00:35:46.118428 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1687 00:35:46.121857 CBFS: Locating 'fallback/slic'
1688 00:35:46.125035 CBFS: 'fallback/slic' not found.
1689 00:35:46.131906 ACPI: Writing ACPI tables at 99b3e000.
1690 00:35:46.132003 ACPI: * FACS
1691 00:35:46.135091 ACPI: * DSDT
1692 00:35:46.138216 Ramoops buffer: 0x100000@0x99a3d000.
1693 00:35:46.141382 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1694 00:35:46.148278 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1695 00:35:46.151467 Google Chrome EC: version:
1696 00:35:46.154914 ro: helios_v2.0.2659-56403530b
1697 00:35:46.158007 rw: helios_v2.0.2849-c41de27e7d
1698 00:35:46.158106 running image: 1
1699 00:35:46.162440 ACPI: * FADT
1700 00:35:46.162529 SCI is IRQ9
1701 00:35:46.165649 ACPI: added table 1/32, length now 40
1702 00:35:46.169346 ACPI: * SSDT
1703 00:35:46.172534 Found 1 CPU(s) with 8 core(s) each.
1704 00:35:46.175890 Error: Could not locate 'wifi_sar' in VPD.
1705 00:35:46.182532 Checking CBFS for default SAR values
1706 00:35:46.185620 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 00:35:46.188860 CBFS @ c08000 size 3f8000
1708 00:35:46.195392 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 00:35:46.198598 CBFS: Locating 'wifi_sar_defaults.hex'
1710 00:35:46.202301 CBFS: Found @ offset 5fac0 size 77
1711 00:35:46.205472 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1712 00:35:46.208530 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1713 00:35:46.215685 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1714 00:35:46.221869 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1715 00:35:46.225478 failed to find key in VPD: dsm_calib_r0_0
1716 00:35:46.235120 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1717 00:35:46.238748 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1718 00:35:46.241883 failed to find key in VPD: dsm_calib_r0_1
1719 00:35:46.252044 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1720 00:35:46.258596 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1721 00:35:46.261752 failed to find key in VPD: dsm_calib_r0_2
1722 00:35:46.271335 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1723 00:35:46.274979 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1724 00:35:46.281375 failed to find key in VPD: dsm_calib_r0_3
1725 00:35:46.288079 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1726 00:35:46.294381 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1727 00:35:46.297625 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1728 00:35:46.304578 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1729 00:35:46.308241 EC returned error result code 1
1730 00:35:46.311366 EC returned error result code 1
1731 00:35:46.314673 EC returned error result code 1
1732 00:35:46.318423 PS2K: Bad resp from EC. Vivaldi disabled!
1733 00:35:46.324551 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1734 00:35:46.331838 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1735 00:35:46.334985 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1736 00:35:46.341521 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1737 00:35:46.344453 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1738 00:35:46.351406 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1739 00:35:46.357698 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1740 00:35:46.364711 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1741 00:35:46.367925 ACPI: added table 2/32, length now 44
1742 00:35:46.368013 ACPI: * MCFG
1743 00:35:46.374353 ACPI: added table 3/32, length now 48
1744 00:35:46.374440 ACPI: * TPM2
1745 00:35:46.377985 TPM2 log created at 99a2d000
1746 00:35:46.381055 ACPI: added table 4/32, length now 52
1747 00:35:46.384663 ACPI: * MADT
1748 00:35:46.384777 SCI is IRQ9
1749 00:35:46.387995 ACPI: added table 5/32, length now 56
1750 00:35:46.391210 current = 99b43ac0
1751 00:35:46.391296 ACPI: * DMAR
1752 00:35:46.394239 ACPI: added table 6/32, length now 60
1753 00:35:46.397792 ACPI: * IGD OpRegion
1754 00:35:46.400711 GMA: Found VBT in CBFS
1755 00:35:46.404456 GMA: Found valid VBT in CBFS
1756 00:35:46.407552 ACPI: added table 7/32, length now 64
1757 00:35:46.407639 ACPI: * HPET
1758 00:35:46.410754 ACPI: added table 8/32, length now 68
1759 00:35:46.414499 ACPI: done.
1760 00:35:46.417625 ACPI tables: 31744 bytes.
1761 00:35:46.420931 smbios_write_tables: 99a2c000
1762 00:35:46.424049 EC returned error result code 3
1763 00:35:46.427164 Couldn't obtain OEM name from CBI
1764 00:35:46.430950 Create SMBIOS type 17
1765 00:35:46.431036 PCI: 00:00.0 (Intel Cannonlake)
1766 00:35:46.434274 PCI: 00:14.3 (Intel WiFi)
1767 00:35:46.437390 SMBIOS tables: 939 bytes.
1768 00:35:46.440649 Writing table forward entry at 0x00000500
1769 00:35:46.447213 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1770 00:35:46.450785 Writing coreboot table at 0x99b62000
1771 00:35:46.457345 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1772 00:35:46.460280 1. 0000000000001000-000000000009ffff: RAM
1773 00:35:46.467139 2. 00000000000a0000-00000000000fffff: RESERVED
1774 00:35:46.470459 3. 0000000000100000-0000000099a2bfff: RAM
1775 00:35:46.477388 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1776 00:35:46.480069 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1777 00:35:46.486731 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1778 00:35:46.493924 7. 000000009a000000-000000009f7fffff: RESERVED
1779 00:35:46.497121 8. 00000000e0000000-00000000efffffff: RESERVED
1780 00:35:46.500269 9. 00000000fc000000-00000000fc000fff: RESERVED
1781 00:35:46.506821 10. 00000000fe000000-00000000fe00ffff: RESERVED
1782 00:35:46.510244 11. 00000000fed10000-00000000fed17fff: RESERVED
1783 00:35:46.516883 12. 00000000fed80000-00000000fed83fff: RESERVED
1784 00:35:46.519940 13. 00000000fed90000-00000000fed91fff: RESERVED
1785 00:35:46.527110 14. 00000000feda0000-00000000feda1fff: RESERVED
1786 00:35:46.530285 15. 0000000100000000-000000045e7fffff: RAM
1787 00:35:46.533386 Graphics framebuffer located at 0xc0000000
1788 00:35:46.536555 Passing 5 GPIOs to payload:
1789 00:35:46.543657 NAME | PORT | POLARITY | VALUE
1790 00:35:46.546900 write protect | undefined | high | low
1791 00:35:46.553167 lid | undefined | high | high
1792 00:35:46.556758 power | undefined | high | low
1793 00:35:46.562857 oprom | undefined | high | low
1794 00:35:46.569827 EC in RW | 0x000000cb | high | low
1795 00:35:46.569915 Board ID: 4
1796 00:35:46.576222 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1797 00:35:46.576326 CBFS @ c08000 size 3f8000
1798 00:35:46.583355 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1799 00:35:46.589673 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1800 00:35:46.592746 coreboot table: 1492 bytes.
1801 00:35:46.596480 IMD ROOT 0. 99fff000 00001000
1802 00:35:46.599685 IMD SMALL 1. 99ffe000 00001000
1803 00:35:46.602990 FSP MEMORY 2. 99c4e000 003b0000
1804 00:35:46.606300 CONSOLE 3. 99c2e000 00020000
1805 00:35:46.609390 FMAP 4. 99c2d000 0000054e
1806 00:35:46.613234 TIME STAMP 5. 99c2c000 00000910
1807 00:35:46.616151 VBOOT WORK 6. 99c18000 00014000
1808 00:35:46.619694 MRC DATA 7. 99c16000 00001958
1809 00:35:46.622745 ROMSTG STCK 8. 99c15000 00001000
1810 00:35:46.626244 AFTER CAR 9. 99c0b000 0000a000
1811 00:35:46.629945 RAMSTAGE 10. 99baf000 0005c000
1812 00:35:46.632860 REFCODE 11. 99b7a000 00035000
1813 00:35:46.635897 SMM BACKUP 12. 99b6a000 00010000
1814 00:35:46.639792 COREBOOT 13. 99b62000 00008000
1815 00:35:46.643076 ACPI 14. 99b3e000 00024000
1816 00:35:46.646318 ACPI GNVS 15. 99b3d000 00001000
1817 00:35:46.649660 RAMOOPS 16. 99a3d000 00100000
1818 00:35:46.652602 TPM2 TCGLOG17. 99a2d000 00010000
1819 00:35:46.655906 SMBIOS 18. 99a2c000 00000800
1820 00:35:46.655978 IMD small region:
1821 00:35:46.659678 IMD ROOT 0. 99ffec00 00000400
1822 00:35:46.662799 FSP RUNTIME 1. 99ffebe0 00000004
1823 00:35:46.669640 EC HOSTEVENT 2. 99ffebc0 00000008
1824 00:35:46.672744 POWER STATE 3. 99ffeb80 00000040
1825 00:35:46.675958 ROMSTAGE 4. 99ffeb60 00000004
1826 00:35:46.679548 MEM INFO 5. 99ffe9a0 000001b9
1827 00:35:46.682919 VPD 6. 99ffe920 0000006c
1828 00:35:46.686104 MTRR: Physical address space:
1829 00:35:46.692668 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1830 00:35:46.695919 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1831 00:35:46.702792 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1832 00:35:46.709397 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1833 00:35:46.715711 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1834 00:35:46.722691 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1835 00:35:46.728838 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1836 00:35:46.732549 MTRR: Fixed MSR 0x250 0x0606060606060606
1837 00:35:46.735561 MTRR: Fixed MSR 0x258 0x0606060606060606
1838 00:35:46.742120 MTRR: Fixed MSR 0x259 0x0000000000000000
1839 00:35:46.745227 MTRR: Fixed MSR 0x268 0x0606060606060606
1840 00:35:46.749128 MTRR: Fixed MSR 0x269 0x0606060606060606
1841 00:35:46.752300 MTRR: Fixed MSR 0x26a 0x0606060606060606
1842 00:35:46.758649 MTRR: Fixed MSR 0x26b 0x0606060606060606
1843 00:35:46.761983 MTRR: Fixed MSR 0x26c 0x0606060606060606
1844 00:35:46.765614 MTRR: Fixed MSR 0x26d 0x0606060606060606
1845 00:35:46.768812 MTRR: Fixed MSR 0x26e 0x0606060606060606
1846 00:35:46.775314 MTRR: Fixed MSR 0x26f 0x0606060606060606
1847 00:35:46.778333 call enable_fixed_mtrr()
1848 00:35:46.782042 CPU physical address size: 39 bits
1849 00:35:46.785062 MTRR: default type WB/UC MTRR counts: 6/8.
1850 00:35:46.788323 MTRR: WB selected as default type.
1851 00:35:46.795267 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1852 00:35:46.801675 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1853 00:35:46.807870 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1854 00:35:46.814799 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1855 00:35:46.818015 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1856 00:35:46.824905 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1857 00:35:46.832083 MTRR: Fixed MSR 0x250 0x0606060606060606
1858 00:35:46.835302 MTRR: Fixed MSR 0x258 0x0606060606060606
1859 00:35:46.838537 MTRR: Fixed MSR 0x259 0x0000000000000000
1860 00:35:46.841457 MTRR: Fixed MSR 0x268 0x0606060606060606
1861 00:35:46.848355 MTRR: Fixed MSR 0x269 0x0606060606060606
1862 00:35:46.851606 MTRR: Fixed MSR 0x26a 0x0606060606060606
1863 00:35:46.854679 MTRR: Fixed MSR 0x26b 0x0606060606060606
1864 00:35:46.857860 MTRR: Fixed MSR 0x26c 0x0606060606060606
1865 00:35:46.864968 MTRR: Fixed MSR 0x26d 0x0606060606060606
1866 00:35:46.868079 MTRR: Fixed MSR 0x26e 0x0606060606060606
1867 00:35:46.871152 MTRR: Fixed MSR 0x26f 0x0606060606060606
1868 00:35:46.871239
1869 00:35:46.875072 MTRR check
1870 00:35:46.875157 Fixed MTRRs : Enabled
1871 00:35:46.878068 Variable MTRRs: Enabled
1872 00:35:46.878153
1873 00:35:46.881296 call enable_fixed_mtrr()
1874 00:35:46.884507 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1875 00:35:46.891020 CPU physical address size: 39 bits
1876 00:35:46.894965 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1877 00:35:46.898218 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 00:35:46.904809 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 00:35:46.908016 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 00:35:46.911230 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 00:35:46.914302 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 00:35:46.921167 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 00:35:46.924421 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 00:35:46.927920 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 00:35:46.931065 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 00:35:46.937973 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 00:35:46.941154 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 00:35:46.944323 MTRR: Fixed MSR 0x250 0x0606060606060606
1889 00:35:46.947455 call enable_fixed_mtrr()
1890 00:35:46.950939 MTRR: Fixed MSR 0x258 0x0606060606060606
1891 00:35:46.954585 MTRR: Fixed MSR 0x259 0x0000000000000000
1892 00:35:46.961061 MTRR: Fixed MSR 0x268 0x0606060606060606
1893 00:35:46.964200 MTRR: Fixed MSR 0x269 0x0606060606060606
1894 00:35:46.967915 MTRR: Fixed MSR 0x26a 0x0606060606060606
1895 00:35:46.971065 MTRR: Fixed MSR 0x26b 0x0606060606060606
1896 00:35:46.974114 MTRR: Fixed MSR 0x26c 0x0606060606060606
1897 00:35:46.980438 MTRR: Fixed MSR 0x26d 0x0606060606060606
1898 00:35:46.984535 MTRR: Fixed MSR 0x26e 0x0606060606060606
1899 00:35:46.986960 MTRR: Fixed MSR 0x26f 0x0606060606060606
1900 00:35:46.990935 CPU physical address size: 39 bits
1901 00:35:46.994036 call enable_fixed_mtrr()
1902 00:35:46.996929 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 00:35:47.004122 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 00:35:47.007357 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 00:35:47.010496 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 00:35:47.013838 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 00:35:47.020190 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 00:35:47.023350 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 00:35:47.026824 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 00:35:47.030314 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 00:35:47.036592 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 00:35:47.040374 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 00:35:47.043504 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 00:35:47.046727 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 00:35:47.049960 call enable_fixed_mtrr()
1916 00:35:47.053220 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 00:35:47.059547 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 00:35:47.063389 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 00:35:47.066509 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 00:35:47.069604 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 00:35:47.076641 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 00:35:47.079833 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 00:35:47.082973 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 00:35:47.086137 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 00:35:47.093113 CPU physical address size: 39 bits
1926 00:35:47.093220 call enable_fixed_mtrr()
1927 00:35:47.099410 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 00:35:47.102486 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 00:35:47.106158 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 00:35:47.109255 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 00:35:47.116310 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 00:35:47.119370 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 00:35:47.122517 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 00:35:47.125729 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 00:35:47.132574 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 00:35:47.135585 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 00:35:47.139203 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 00:35:47.142225 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 00:35:47.148983 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 00:35:47.152617 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 00:35:47.155931 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 00:35:47.158998 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 00:35:47.165525 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 00:35:47.168666 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 00:35:47.172453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 00:35:47.175570 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 00:35:47.178793 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 00:35:47.185545 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 00:35:47.188858 call enable_fixed_mtrr()
1950 00:35:47.188941 call enable_fixed_mtrr()
1951 00:35:47.192038 CPU physical address size: 39 bits
1952 00:35:47.198462 CPU physical address size: 39 bits
1953 00:35:47.202193 CPU physical address size: 39 bits
1954 00:35:47.205347 CPU physical address size: 39 bits
1955 00:35:47.208476 CBFS @ c08000 size 3f8000
1956 00:35:47.211684 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1957 00:35:47.214798 CBFS: Locating 'fallback/payload'
1958 00:35:47.222279 CBFS: Found @ offset 1c96c0 size 3f798
1959 00:35:47.225527 Checking segment from ROM address 0xffdd16f8
1960 00:35:47.228738 Checking segment from ROM address 0xffdd1714
1961 00:35:47.235101 Loading segment from ROM address 0xffdd16f8
1962 00:35:47.235183 code (compression=0)
1963 00:35:47.245001 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1964 00:35:47.255269 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1965 00:35:47.255352 it's not compressed!
1966 00:35:47.347934 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1967 00:35:47.354784 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1968 00:35:47.357839 Loading segment from ROM address 0xffdd1714
1969 00:35:47.361392 Entry Point 0x30000000
1970 00:35:47.364606 Loaded segments
1971 00:35:47.370254 Finalizing chipset.
1972 00:35:47.373404 Finalizing SMM.
1973 00:35:47.376367 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1974 00:35:47.379893 mp_park_aps done after 0 msecs.
1975 00:35:47.386520 Jumping to boot code at 30000000(99b62000)
1976 00:35:47.392805 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1977 00:35:47.392947
1978 00:35:47.393049
1979 00:35:47.393162
1980 00:35:47.396053 Starting depthcharge on Helios...
1981 00:35:47.396183
1982 00:35:47.396610 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1983 00:35:47.396736 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1984 00:35:47.396854 Setting prompt string to ['hatch:']
1985 00:35:47.396984 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1986 00:35:47.406168 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1987 00:35:47.406337
1988 00:35:47.412611 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1989 00:35:47.412703
1990 00:35:47.419724 board_setup: Info: eMMC controller not present; skipping
1991 00:35:47.419840
1992 00:35:47.423072 New NVMe Controller 0x30053ac0 @ 00:1d:00
1993 00:35:47.423161
1994 00:35:47.429455 board_setup: Info: SDHCI controller not present; skipping
1995 00:35:47.429550
1996 00:35:47.435752 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1997 00:35:47.435845
1998 00:35:47.435914 Wipe memory regions:
1999 00:35:47.435978
2000 00:35:47.439600 [0x00000000001000, 0x000000000a0000)
2001 00:35:47.439686
2002 00:35:47.446101 [0x00000000100000, 0x00000030000000)
2003 00:35:47.509401
2004 00:35:47.512463 [0x00000030657430, 0x00000099a2c000)
2005 00:35:47.649751
2006 00:35:47.653072 [0x00000100000000, 0x0000045e800000)
2007 00:35:49.036043
2008 00:35:49.036177 R8152: Initializing
2009 00:35:49.036247
2010 00:35:49.039466 Version 9 (ocp_data = 6010)
2011 00:35:49.043346
2012 00:35:49.043440 R8152: Done initializing
2013 00:35:49.043510
2014 00:35:49.046431 Adding net device
2015 00:35:49.529159
2016 00:35:49.529324 R8152: Initializing
2017 00:35:49.529422
2018 00:35:49.532493 Version 6 (ocp_data = 5c30)
2019 00:35:49.532591
2020 00:35:49.535901 R8152: Done initializing
2021 00:35:49.535999
2022 00:35:49.539191 net_add_device: Attemp to include the same device
2023 00:35:49.542373
2024 00:35:49.550019 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2025 00:35:49.550152
2026 00:35:49.550223
2027 00:35:49.550315
2028 00:35:49.550630 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2030 00:35:49.651034 hatch: tftpboot 192.168.201.1 10419316/tftp-deploy-e023kttr/kernel/bzImage 10419316/tftp-deploy-e023kttr/kernel/cmdline 10419316/tftp-deploy-e023kttr/ramdisk/ramdisk.cpio.gz
2031 00:35:49.651198 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2032 00:35:49.651298 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2033 00:35:49.655696 tftpboot 192.168.201.1 10419316/tftp-deploy-e023kttr/kernel/bzIploy-e023kttr/kernel/cmdline 10419316/tftp-deploy-e023kttr/ramdisk/ramdisk.cpio.gz
2034 00:35:49.655781
2035 00:35:49.655867 Waiting for link
2036 00:35:49.856298
2037 00:35:49.856484 done.
2038 00:35:49.856655
2039 00:35:49.856854 MAC: 00:24:32:50:19:be
2040 00:35:49.856999
2041 00:35:49.859994 Sending DHCP discover... done.
2042 00:35:49.860111
2043 00:35:49.863245 Waiting for reply... done.
2044 00:35:49.863360
2045 00:35:49.866589 Sending DHCP request... done.
2046 00:35:49.866718
2047 00:35:49.874413 Waiting for reply... done.
2048 00:35:49.874560
2049 00:35:49.874664 My ip is 192.168.201.15
2050 00:35:49.874774
2051 00:35:49.877404 The DHCP server ip is 192.168.201.1
2052 00:35:49.881040
2053 00:35:49.884004 TFTP server IP predefined by user: 192.168.201.1
2054 00:35:49.884136
2055 00:35:49.890691 Bootfile predefined by user: 10419316/tftp-deploy-e023kttr/kernel/bzImage
2056 00:35:49.890824
2057 00:35:49.893866 Sending tftp read request... done.
2058 00:35:49.893990
2059 00:35:49.901562 Waiting for the transfer...
2060 00:35:49.901693
2061 00:35:50.722947 00000000 ################################################################
2062 00:35:50.723087
2063 00:35:51.244260 00080000 ################################################################
2064 00:35:51.244425
2065 00:35:51.801172 00100000 ################################################################
2066 00:35:51.801312
2067 00:35:52.316816 00180000 ################################################################
2068 00:35:52.316974
2069 00:35:52.833907 00200000 ################################################################
2070 00:35:52.834058
2071 00:35:53.347035 00280000 ################################################################
2072 00:35:53.347215
2073 00:35:53.852176 00300000 ################################################################
2074 00:35:53.852313
2075 00:35:54.358937 00380000 ################################################################
2076 00:35:54.359110
2077 00:35:54.864254 00400000 ################################################################
2078 00:35:54.864423
2079 00:35:55.372969 00480000 ################################################################
2080 00:35:55.373115
2081 00:35:55.876356 00500000 ################################################################
2082 00:35:55.876534
2083 00:35:56.379011 00580000 ################################################################
2084 00:35:56.379172
2085 00:35:56.887972 00600000 ################################################################
2086 00:35:56.888147
2087 00:35:57.401675 00680000 ################################################################
2088 00:35:57.401839
2089 00:35:57.916536 00700000 ################################################################
2090 00:35:57.916705
2091 00:35:58.432726 00780000 ################################################################
2092 00:35:58.432893
2093 00:35:58.951856 00800000 ################################################################
2094 00:35:58.951991
2095 00:35:59.463952 00880000 ################################################################
2096 00:35:59.464136
2097 00:35:59.971670 00900000 ################################################################
2098 00:35:59.971832
2099 00:36:00.488567 00980000 ################################################################
2100 00:36:00.488718
2101 00:36:00.857635 00a00000 ############################################### done.
2102 00:36:00.857770
2103 00:36:00.860957 The bootfile was 10862592 bytes long.
2104 00:36:00.861043
2105 00:36:00.864260 Sending tftp read request... done.
2106 00:36:00.864347
2107 00:36:00.867433 Waiting for the transfer...
2108 00:36:00.867517
2109 00:36:01.381191 00000000 ################################################################
2110 00:36:01.381373
2111 00:36:01.895637 00080000 ################################################################
2112 00:36:01.895808
2113 00:36:02.406648 00100000 ################################################################
2114 00:36:02.406819
2115 00:36:02.921832 00180000 ################################################################
2116 00:36:02.921970
2117 00:36:03.433260 00200000 ################################################################
2118 00:36:03.433431
2119 00:36:03.943261 00280000 ################################################################
2120 00:36:03.943432
2121 00:36:04.452768 00300000 ################################################################
2122 00:36:04.452949
2123 00:36:04.962282 00380000 ################################################################
2124 00:36:04.962451
2125 00:36:05.469828 00400000 ################################################################
2126 00:36:05.470011
2127 00:36:05.976144 00480000 ################################################################
2128 00:36:05.976279
2129 00:36:06.486183 00500000 ################################################################
2130 00:36:06.486346
2131 00:36:06.997476 00580000 ################################################################
2132 00:36:06.997661
2133 00:36:07.515462 00600000 ################################################################
2134 00:36:07.515614
2135 00:36:08.031091 00680000 ################################################################
2136 00:36:08.031275
2137 00:36:08.537580 00700000 ################################################################
2138 00:36:08.537729
2139 00:36:09.053120 00780000 ################################################################
2140 00:36:09.053306
2141 00:36:09.562589 00800000 ################################################################
2142 00:36:09.562741
2143 00:36:09.870288 00880000 ####################################### done.
2144 00:36:09.870506
2145 00:36:09.873402 Sending tftp read request... done.
2146 00:36:09.873506
2147 00:36:09.877093 Waiting for the transfer...
2148 00:36:09.877205
2149 00:36:09.877298 00000000 # done.
2150 00:36:09.877403
2151 00:36:09.886839 Command line loaded dynamically from TFTP file: 10419316/tftp-deploy-e023kttr/kernel/cmdline
2152 00:36:09.886947
2153 00:36:09.903153 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2154 00:36:09.903273
2155 00:36:09.909730 ec_init(0): CrosEC protocol v3 supported (256, 256)
2156 00:36:09.915020
2157 00:36:09.918216 Shutting down all USB controllers.
2158 00:36:09.918318
2159 00:36:09.918422 Removing current net device
2160 00:36:09.922018
2161 00:36:09.922123 Finalizing coreboot
2162 00:36:09.922216
2163 00:36:09.928290 Exiting depthcharge with code 4 at timestamp: 29907905
2164 00:36:09.928408
2165 00:36:09.928505
2166 00:36:09.928608 Starting kernel ...
2167 00:36:09.928674
2168 00:36:09.928735
2169 00:36:09.929360 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2170 00:36:09.929498 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2171 00:36:09.929593 Setting prompt string to ['Linux version [0-9]']
2172 00:36:09.929665 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 00:36:09.929750 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2175 00:40:28.929791 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2177 00:40:28.929997 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2179 00:40:28.930170 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2182 00:40:28.930587 end: 2 depthcharge-action (duration 00:05:00) [common]
2184 00:40:28.930856 Cleaning after the job
2185 00:40:28.930945 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419316/tftp-deploy-e023kttr/ramdisk
2186 00:40:28.932098 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419316/tftp-deploy-e023kttr/kernel
2187 00:40:28.933381 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419316/tftp-deploy-e023kttr/modules
2188 00:40:28.933962 start: 5.1 power-off (timeout 00:00:30) [common]
2189 00:40:28.934240 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2190 00:40:29.010426 >> Command sent successfully.
2191 00:40:29.012654 Returned 0 in 0 seconds
2192 00:40:29.113053 end: 5.1 power-off (duration 00:00:00) [common]
2194 00:40:29.113375 start: 5.2 read-feedback (timeout 00:10:00) [common]
2195 00:40:29.113670 Listened to connection for namespace 'common' for up to 1s
2197 00:40:29.114041 Listened to connection for namespace 'common' for up to 1s
2198 00:40:30.113677 Finalising connection for namespace 'common'
2199 00:40:30.113854 Disconnecting from shell: Finalise
2200 00:40:30.113930