Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 17:17:27.400778 lava-dispatcher, installed at version: 2023.05.1
2 17:17:27.401011 start: 0 validate
3 17:17:27.401149 Start time: 2023-06-09 17:17:27.401142+00:00 (UTC)
4 17:17:27.401277 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:17:27.401406 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 17:17:27.687186 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:17:27.688251 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.283-cip98-1248-gcaf6e8ee921e9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:17:27.952380 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:17:27.953247 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.283-cip98-1248-gcaf6e8ee921e9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:17:28.227481 validate duration: 0.83
12 17:17:28.228035 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:17:28.228307 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:17:28.228502 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:17:28.228838 Not decompressing ramdisk as can be used compressed.
16 17:17:28.229022 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 17:17:28.229171 saving as /var/lib/lava/dispatcher/tmp/10664094/tftp-deploy-hnp6c3_z/ramdisk/rootfs.cpio.gz
18 17:17:28.229319 total size: 8430069 (8MB)
19 17:17:28.231555 progress 0% (0MB)
20 17:17:28.236240 progress 5% (0MB)
21 17:17:28.240959 progress 10% (0MB)
22 17:17:28.245584 progress 15% (1MB)
23 17:17:28.250077 progress 20% (1MB)
24 17:17:28.254440 progress 25% (2MB)
25 17:17:28.257006 progress 30% (2MB)
26 17:17:28.259170 progress 35% (2MB)
27 17:17:28.261215 progress 40% (3MB)
28 17:17:28.263366 progress 45% (3MB)
29 17:17:28.265563 progress 50% (4MB)
30 17:17:28.267711 progress 55% (4MB)
31 17:17:28.269900 progress 60% (4MB)
32 17:17:28.272045 progress 65% (5MB)
33 17:17:28.274232 progress 70% (5MB)
34 17:17:28.276266 progress 75% (6MB)
35 17:17:28.278548 progress 80% (6MB)
36 17:17:28.280693 progress 85% (6MB)
37 17:17:28.282884 progress 90% (7MB)
38 17:17:28.285101 progress 95% (7MB)
39 17:17:28.287262 progress 100% (8MB)
40 17:17:28.287398 8MB downloaded in 0.06s (138.43MB/s)
41 17:17:28.287547 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:17:28.287785 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:17:28.287871 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:17:28.287960 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:17:28.288109 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.283-cip98-1248-gcaf6e8ee921e9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:17:28.288181 saving as /var/lib/lava/dispatcher/tmp/10664094/tftp-deploy-hnp6c3_z/kernel/bzImage
48 17:17:28.288244 total size: 10866688 (10MB)
49 17:17:28.288303 No compression specified
50 17:17:28.289431 progress 0% (0MB)
51 17:17:28.292151 progress 5% (0MB)
52 17:17:28.295027 progress 10% (1MB)
53 17:17:28.297724 progress 15% (1MB)
54 17:17:28.300533 progress 20% (2MB)
55 17:17:28.303224 progress 25% (2MB)
56 17:17:28.306087 progress 30% (3MB)
57 17:17:28.308938 progress 35% (3MB)
58 17:17:28.311591 progress 40% (4MB)
59 17:17:28.314458 progress 45% (4MB)
60 17:17:28.317145 progress 50% (5MB)
61 17:17:28.319927 progress 55% (5MB)
62 17:17:28.322588 progress 60% (6MB)
63 17:17:28.325415 progress 65% (6MB)
64 17:17:28.328191 progress 70% (7MB)
65 17:17:28.330846 progress 75% (7MB)
66 17:17:28.333679 progress 80% (8MB)
67 17:17:28.336301 progress 85% (8MB)
68 17:17:28.339115 progress 90% (9MB)
69 17:17:28.341933 progress 95% (9MB)
70 17:17:28.344576 progress 100% (10MB)
71 17:17:28.344762 10MB downloaded in 0.06s (183.37MB/s)
72 17:17:28.344950 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:17:28.345177 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:17:28.345266 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:17:28.345353 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:17:28.345509 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.283-cip98-1248-gcaf6e8ee921e9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:17:28.345578 saving as /var/lib/lava/dispatcher/tmp/10664094/tftp-deploy-hnp6c3_z/modules/modules.tar
79 17:17:28.345639 total size: 485236 (0MB)
80 17:17:28.345698 Using unxz to decompress xz
81 17:17:28.349037 progress 6% (0MB)
82 17:17:28.349431 progress 13% (0MB)
83 17:17:28.349672 progress 20% (0MB)
84 17:17:28.351260 progress 27% (0MB)
85 17:17:28.353353 progress 33% (0MB)
86 17:17:28.355506 progress 40% (0MB)
87 17:17:28.357951 progress 47% (0MB)
88 17:17:28.360747 progress 54% (0MB)
89 17:17:28.362818 progress 60% (0MB)
90 17:17:28.364944 progress 67% (0MB)
91 17:17:28.366997 progress 74% (0MB)
92 17:17:28.369203 progress 81% (0MB)
93 17:17:28.371385 progress 87% (0MB)
94 17:17:28.373412 progress 94% (0MB)
95 17:17:28.375259 progress 100% (0MB)
96 17:17:28.381586 0MB downloaded in 0.04s (12.88MB/s)
97 17:17:28.381857 end: 1.3.1 http-download (duration 00:00:00) [common]
99 17:17:28.382122 end: 1.3 download-retry (duration 00:00:00) [common]
100 17:17:28.382218 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 17:17:28.382314 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 17:17:28.382397 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 17:17:28.382485 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 17:17:28.382726 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000
105 17:17:28.382884 makedir: /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin
106 17:17:28.383003 makedir: /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/tests
107 17:17:28.383114 makedir: /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/results
108 17:17:28.383227 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-add-keys
109 17:17:28.383375 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-add-sources
110 17:17:28.383508 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-background-process-start
111 17:17:28.383640 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-background-process-stop
112 17:17:28.383765 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-common-functions
113 17:17:28.383889 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-echo-ipv4
114 17:17:28.384013 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-install-packages
115 17:17:28.384135 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-installed-packages
116 17:17:28.384257 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-os-build
117 17:17:28.384379 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-probe-channel
118 17:17:28.384501 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-probe-ip
119 17:17:28.384623 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-target-ip
120 17:17:28.384745 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-target-mac
121 17:17:28.384914 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-target-storage
122 17:17:28.385048 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-test-case
123 17:17:28.385173 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-test-event
124 17:17:28.385297 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-test-feedback
125 17:17:28.385422 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-test-raise
126 17:17:28.385547 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-test-reference
127 17:17:28.385679 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-test-runner
128 17:17:28.385803 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-test-set
129 17:17:28.385929 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-test-shell
130 17:17:28.386055 Updating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-install-packages (oe)
131 17:17:28.418218 Updating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/bin/lava-installed-packages (oe)
132 17:17:28.419004 Creating /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/environment
133 17:17:28.419572 LAVA metadata
134 17:17:28.420231 - LAVA_JOB_ID=10664094
135 17:17:28.420855 - LAVA_DISPATCHER_IP=192.168.201.1
136 17:17:28.421594 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 17:17:28.422072 skipped lava-vland-overlay
138 17:17:28.422525 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 17:17:28.422991 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 17:17:28.423399 skipped lava-multinode-overlay
141 17:17:28.423815 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 17:17:28.424245 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 17:17:28.424735 Loading test definitions
144 17:17:28.425349 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 17:17:28.425813 Using /lava-10664094 at stage 0
146 17:17:28.427962 uuid=10664094_1.4.2.3.1 testdef=None
147 17:17:28.428466 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 17:17:28.428971 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 17:17:28.431852 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 17:17:28.433189 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 17:17:28.436649 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 17:17:28.438181 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 17:17:28.821346 runner path: /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/0/tests/0_dmesg test_uuid 10664094_1.4.2.3.1
156 17:17:28.833925 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 17:17:28.834441 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 17:17:28.834579 Using /lava-10664094 at stage 1
160 17:17:28.835153 uuid=10664094_1.4.2.3.5 testdef=None
161 17:17:28.835280 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 17:17:28.835403 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 17:17:28.836183 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 17:17:28.836686 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 17:17:28.837792 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 17:17:28.838251 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 17:17:29.173259 runner path: /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/1/tests/1_bootrr test_uuid 10664094_1.4.2.3.5
170 17:17:29.175393 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 17:17:29.177663 Creating lava-test-runner.conf files
173 17:17:29.178263 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/0 for stage 0
174 17:17:29.179024 - 0_dmesg
175 17:17:29.179707 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10664094/lava-overlay-720_t000/lava-10664094/1 for stage 1
176 17:17:29.180509 - 1_bootrr
177 17:17:29.181388 end: 1.4.2.3 test-definition (duration 00:00:01) [common]
178 17:17:29.182153 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 17:17:29.215214 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 17:17:29.215503 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 17:17:29.215715 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 17:17:29.215923 end: 1.4.2 lava-overlay (duration 00:00:01) [common]
183 17:17:29.216119 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 17:17:29.467866 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 17:17:29.468244 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 17:17:29.468376 extracting modules file /var/lib/lava/dispatcher/tmp/10664094/tftp-deploy-hnp6c3_z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10664094/extract-overlay-ramdisk-gghtqqul/ramdisk
187 17:17:29.491797 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 17:17:29.491965 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 17:17:29.492084 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10664094/compress-overlay-0ktcp1ey/overlay-1.4.2.4.tar.gz to ramdisk
190 17:17:29.492167 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10664094/compress-overlay-0ktcp1ey/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10664094/extract-overlay-ramdisk-gghtqqul/ramdisk
191 17:17:29.501375 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 17:17:29.501519 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 17:17:29.501628 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 17:17:29.501731 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 17:17:29.501823 Building ramdisk /var/lib/lava/dispatcher/tmp/10664094/extract-overlay-ramdisk-gghtqqul/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10664094/extract-overlay-ramdisk-gghtqqul/ramdisk
196 17:17:30.517779 >> 53981 blocks
197 17:17:31.452994 rename /var/lib/lava/dispatcher/tmp/10664094/extract-overlay-ramdisk-gghtqqul/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10664094/tftp-deploy-hnp6c3_z/ramdisk/ramdisk.cpio.gz
198 17:17:31.453509 end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
199 17:17:31.453642 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
200 17:17:31.453745 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
201 17:17:31.453856 No mkimage arch provided, not using FIT.
202 17:17:31.453974 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 17:17:31.454092 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 17:17:31.454230 end: 1.4 prepare-tftp-overlay (duration 00:00:03) [common]
205 17:17:31.454357 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
206 17:17:31.454457 No LXC device requested
207 17:17:31.454539 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 17:17:31.454628 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
209 17:17:31.454709 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 17:17:31.454783 Checking files for TFTP limit of 4294967296 bytes.
211 17:17:31.455206 end: 1 tftp-deploy (duration 00:00:03) [common]
212 17:17:31.455314 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 17:17:31.455408 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 17:17:31.455576 substitutions:
215 17:17:31.455659 - {DTB}: None
216 17:17:31.455737 - {INITRD}: 10664094/tftp-deploy-hnp6c3_z/ramdisk/ramdisk.cpio.gz
217 17:17:31.455827 - {KERNEL}: 10664094/tftp-deploy-hnp6c3_z/kernel/bzImage
218 17:17:31.455899 - {LAVA_MAC}: None
219 17:17:31.455958 - {PRESEED_CONFIG}: None
220 17:17:31.456014 - {PRESEED_LOCAL}: None
221 17:17:31.456071 - {RAMDISK}: 10664094/tftp-deploy-hnp6c3_z/ramdisk/ramdisk.cpio.gz
222 17:17:31.456127 - {ROOT_PART}: None
223 17:17:31.456182 - {ROOT}: None
224 17:17:31.456238 - {SERVER_IP}: 192.168.201.1
225 17:17:31.456302 - {TEE}: None
226 17:17:31.456361 Parsed boot commands:
227 17:17:31.456417 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 17:17:31.456596 Parsed boot commands: tftpboot 192.168.201.1 10664094/tftp-deploy-hnp6c3_z/kernel/bzImage 10664094/tftp-deploy-hnp6c3_z/kernel/cmdline 10664094/tftp-deploy-hnp6c3_z/ramdisk/ramdisk.cpio.gz
229 17:17:31.456687 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 17:17:31.456777 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 17:17:31.456899 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 17:17:31.457015 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 17:17:31.457100 Not connected, no need to disconnect.
234 17:17:31.457205 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 17:17:31.457318 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 17:17:31.457398 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
237 17:17:31.460852 Setting prompt string to ['lava-test: # ']
238 17:17:31.461237 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 17:17:31.461377 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 17:17:31.461511 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 17:17:31.461607 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 17:17:31.461828 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
243 17:17:36.605650 >> Command sent successfully.
244 17:17:36.608321 Returned 0 in 5 seconds
245 17:17:36.708765 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 17:17:36.709113 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 17:17:36.709212 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 17:17:36.709297 Setting prompt string to 'Starting depthcharge on Helios...'
250 17:17:36.709365 Changing prompt to 'Starting depthcharge on Helios...'
251 17:17:36.709431 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 17:17:36.709674 [Enter `^Ec?' for help]
253 17:17:37.328778
254 17:17:37.328931
255 17:17:37.339109 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 17:17:37.342252 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 17:17:37.349257 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 17:17:37.352571 CPU: AES supported, TXT NOT supported, VT supported
259 17:17:37.359281 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 17:17:37.362466 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 17:17:37.368987 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 17:17:37.372238 VBOOT: Loading verstage.
263 17:17:37.375464 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 17:17:37.382333 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 17:17:37.386033 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 17:17:37.389356 CBFS @ c08000 size 3f8000
267 17:17:37.395680 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 17:17:37.399024 CBFS: Locating 'fallback/verstage'
269 17:17:37.402344 CBFS: Found @ offset 10fb80 size 1072c
270 17:17:37.402431
271 17:17:37.405560
272 17:17:37.415238 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 17:17:37.429989 Probing TPM: . done!
274 17:17:37.433261 TPM ready after 0 ms
275 17:17:37.436423 Connected to device vid:did:rid of 1ae0:0028:00
276 17:17:37.446916 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
277 17:17:37.450189 Initialized TPM device CR50 revision 0
278 17:17:37.493961 tlcl_send_startup: Startup return code is 0
279 17:17:37.494102 TPM: setup succeeded
280 17:17:37.506299 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 17:17:37.510174 Chrome EC: UHEPI supported
282 17:17:37.513474 Phase 1
283 17:17:37.516648 FMAP: area GBB found @ c05000 (12288 bytes)
284 17:17:37.522968 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 17:17:37.526865 Phase 2
286 17:17:37.527003 Phase 3
287 17:17:37.529947 FMAP: area GBB found @ c05000 (12288 bytes)
288 17:17:37.536703 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 17:17:37.543262 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 17:17:37.546581 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 17:17:37.553480 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 17:17:37.568759 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 17:17:37.572089 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 17:17:37.578728 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 17:17:37.582666 Phase 4
296 17:17:37.586472 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 17:17:37.592887 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 17:17:37.772170 VB2:vb2_rsa_verify_digest() Digest check failed!
299 17:17:37.778736 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 17:17:37.778923 Saving nvdata
301 17:17:37.781975 Reboot requested (10020007)
302 17:17:37.785182 board_reset() called!
303 17:17:37.785274 full_reset() called!
304 17:17:42.295998
305 17:17:42.296588
306 17:17:42.305393 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 17:17:42.309156 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 17:17:42.315733 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 17:17:42.318947 CPU: AES supported, TXT NOT supported, VT supported
310 17:17:42.325340 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 17:17:42.328433 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 17:17:42.335337 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 17:17:42.338572 VBOOT: Loading verstage.
314 17:17:42.341800 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 17:17:42.348755 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 17:17:42.355213 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 17:17:42.355458 CBFS @ c08000 size 3f8000
318 17:17:42.361854 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 17:17:42.365222 CBFS: Locating 'fallback/verstage'
320 17:17:42.368588 CBFS: Found @ offset 10fb80 size 1072c
321 17:17:42.372363
322 17:17:42.372522
323 17:17:42.382318 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 17:17:42.396891 Probing TPM: . done!
325 17:17:42.400138 TPM ready after 0 ms
326 17:17:42.403162 Connected to device vid:did:rid of 1ae0:0028:00
327 17:17:42.413546 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 17:17:42.417213 Initialized TPM device CR50 revision 0
329 17:17:42.460699 tlcl_send_startup: Startup return code is 0
330 17:17:42.461034 TPM: setup succeeded
331 17:17:42.472931 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 17:17:42.476781 Chrome EC: UHEPI supported
333 17:17:42.480184 Phase 1
334 17:17:42.483623 FMAP: area GBB found @ c05000 (12288 bytes)
335 17:17:42.490522 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 17:17:42.497007 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 17:17:42.500219 Recovery requested (1009000e)
338 17:17:42.505366 Saving nvdata
339 17:17:42.512024 tlcl_extend: response is 0
340 17:17:42.520669 tlcl_extend: response is 0
341 17:17:42.528125 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 17:17:42.531331 CBFS @ c08000 size 3f8000
343 17:17:42.537970 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 17:17:42.541288 CBFS: Locating 'fallback/romstage'
345 17:17:42.544238 CBFS: Found @ offset 80 size 145fc
346 17:17:42.547857 Accumulated console time in verstage 98 ms
347 17:17:42.548167
348 17:17:42.548427
349 17:17:42.560967 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 17:17:42.567355 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 17:17:42.570576 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 17:17:42.573839 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 17:17:42.581092 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 17:17:42.583597 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 17:17:42.587519 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 17:17:42.590749 TCO_STS: 0000 0000
357 17:17:42.593809 GEN_PMCON: e0015238 00000200
358 17:17:42.597064 GBLRST_CAUSE: 00000000 00000000
359 17:17:42.597215 prev_sleep_state 5
360 17:17:42.601033 Boot Count incremented to 58429
361 17:17:42.607431 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 17:17:42.611020 CBFS @ c08000 size 3f8000
363 17:17:42.617520 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 17:17:42.617833 CBFS: Locating 'fspm.bin'
365 17:17:42.624047 CBFS: Found @ offset 5ffc0 size 71000
366 17:17:42.627175 Chrome EC: UHEPI supported
367 17:17:42.634095 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 17:17:42.637638 Probing TPM: done!
369 17:17:42.644259 Connected to device vid:did:rid of 1ae0:0028:00
370 17:17:42.654024 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
371 17:17:42.660068 Initialized TPM device CR50 revision 0
372 17:17:42.669146 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 17:17:42.675593 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 17:17:42.678773 MRC cache found, size 1948
375 17:17:42.682036 bootmode is set to: 2
376 17:17:42.685910 PRMRR disabled by config.
377 17:17:42.686477 SPD INDEX = 1
378 17:17:42.691958 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 17:17:42.695775 CBFS @ c08000 size 3f8000
380 17:17:42.702166 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 17:17:42.702610 CBFS: Locating 'spd.bin'
382 17:17:42.705462 CBFS: Found @ offset 5fb80 size 400
383 17:17:42.708878 SPD: module type is LPDDR3
384 17:17:42.712017 SPD: module part is
385 17:17:42.719144 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 17:17:42.722345 SPD: device width 4 bits, bus width 8 bits
387 17:17:42.725678 SPD: module size is 4096 MB (per channel)
388 17:17:42.728864 memory slot: 0 configuration done.
389 17:17:42.732211 memory slot: 2 configuration done.
390 17:17:42.783069 CBMEM:
391 17:17:42.786333 IMD: root @ 99fff000 254 entries.
392 17:17:42.789483 IMD: root @ 99ffec00 62 entries.
393 17:17:42.793506 External stage cache:
394 17:17:42.796650 IMD: root @ 9abff000 254 entries.
395 17:17:42.799913 IMD: root @ 9abfec00 62 entries.
396 17:17:42.803036 Chrome EC: clear events_b mask to 0x0000000020004000
397 17:17:42.819149 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 17:17:42.832485 tlcl_write: response is 0
399 17:17:42.841635 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 17:17:42.847650 MRC: TPM MRC hash updated successfully.
401 17:17:42.848252 2 DIMMs found
402 17:17:42.851404 SMM Memory Map
403 17:17:42.854608 SMRAM : 0x9a000000 0x1000000
404 17:17:42.857763 Subregion 0: 0x9a000000 0xa00000
405 17:17:42.861052 Subregion 1: 0x9aa00000 0x200000
406 17:17:42.864307 Subregion 2: 0x9ac00000 0x400000
407 17:17:42.867551 top_of_ram = 0x9a000000
408 17:17:42.871544 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 17:17:42.877883 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 17:17:42.880975 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 17:17:42.887882 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 17:17:42.891147 CBFS @ c08000 size 3f8000
413 17:17:42.894299 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 17:17:42.897575 CBFS: Locating 'fallback/postcar'
415 17:17:42.903988 CBFS: Found @ offset 107000 size 4b44
416 17:17:42.907161 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 17:17:42.919937 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 17:17:42.923330 Processing 180 relocs. Offset value of 0x97c0c000
419 17:17:42.932369 Accumulated console time in romstage 285 ms
420 17:17:42.932848
421 17:17:42.933211
422 17:17:42.941839 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 17:17:42.948735 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 17:17:42.951771 CBFS @ c08000 size 3f8000
425 17:17:42.954941 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 17:17:42.962020 CBFS: Locating 'fallback/ramstage'
427 17:17:42.965159 CBFS: Found @ offset 43380 size 1b9e8
428 17:17:42.971704 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 17:17:43.003541 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 17:17:43.006790 Processing 3976 relocs. Offset value of 0x98db0000
431 17:17:43.013842 Accumulated console time in postcar 52 ms
432 17:17:43.014386
433 17:17:43.014820
434 17:17:43.023556 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 17:17:43.029957 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 17:17:43.033240 WARNING: RO_VPD is uninitialized or empty.
437 17:17:43.036516 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 17:17:43.043432 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 17:17:43.043637 Normal boot.
440 17:17:43.050086 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 17:17:43.053384 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 17:17:43.056564 CBFS @ c08000 size 3f8000
443 17:17:43.063025 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 17:17:43.065978 CBFS: Locating 'cpu_microcode_blob.bin'
445 17:17:43.069811 CBFS: Found @ offset 14700 size 2ec00
446 17:17:43.073043 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 17:17:43.076299 Skip microcode update
448 17:17:43.082889 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 17:17:43.083020 CBFS @ c08000 size 3f8000
450 17:17:43.089492 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 17:17:43.092575 CBFS: Locating 'fsps.bin'
452 17:17:43.096243 CBFS: Found @ offset d1fc0 size 35000
453 17:17:43.121589 Detected 4 core, 8 thread CPU.
454 17:17:43.125030 Setting up SMI for CPU
455 17:17:43.128328 IED base = 0x9ac00000
456 17:17:43.128432 IED size = 0x00400000
457 17:17:43.131638 Will perform SMM setup.
458 17:17:43.138124 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 17:17:43.144604 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 17:17:43.147751 Processing 16 relocs. Offset value of 0x00030000
461 17:17:43.151717 Attempting to start 7 APs
462 17:17:43.155152 Waiting for 10ms after sending INIT.
463 17:17:43.770434 Waiting for 1st SIPI to complete...done.
464 17:17:43.771110 AP: slot 7 apic_id 7.
465 17:17:43.771668 AP: slot 2 apic_id 6.
466 17:17:43.772202 AP: slot 4 apic_id 2.
467 17:17:43.772726 AP: slot 1 apic_id 3.
468 17:17:43.773265 AP: slot 5 apic_id 5.
469 17:17:43.773748 Waiting for 2nd SIPI to complete...done.
470 17:17:43.774240 AP: slot 3 apic_id 1.
471 17:17:43.774723 AP: slot 6 apic_id 4.
472 17:17:43.775202 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 17:17:43.775685 Processing 13 relocs. Offset value of 0x00038000
474 17:17:43.776170 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 17:17:43.776648 Installing SMM handler to 0x9a000000
476 17:17:43.777157 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 17:17:43.777645 Processing 658 relocs. Offset value of 0x9a010000
478 17:17:43.778131 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 17:17:43.778612 Processing 13 relocs. Offset value of 0x9a008000
480 17:17:43.779098 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 17:17:43.779579 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 17:17:43.780092 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 17:17:43.780418 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 17:17:43.780721 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 17:17:43.781040 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 17:17:43.781330 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 17:17:43.781617 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 17:17:43.781906 Clearing SMI status registers
489 17:17:43.782191 SMI_STS: PM1
490 17:17:43.782474 PM1_STS: PWRBTN
491 17:17:43.782755 TCO_STS: SECOND_TO
492 17:17:43.783041 New SMBASE 0x9a000000
493 17:17:43.783325 In relocation handler: CPU 0
494 17:17:43.783604 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 17:17:43.783888 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 17:17:43.784168 Relocation complete.
497 17:17:43.784446 New SMBASE 0x99fff400
498 17:17:43.784729 In relocation handler: CPU 3
499 17:17:43.785031 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
500 17:17:43.785318 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 17:17:43.785601 Relocation complete.
502 17:17:43.785877 New SMBASE 0x99fffc00
503 17:17:43.786159 In relocation handler: CPU 1
504 17:17:43.786436 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
505 17:17:43.786719 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 17:17:43.786996 Relocation complete.
507 17:17:43.787273 New SMBASE 0x99fff000
508 17:17:43.787571 In relocation handler: CPU 4
509 17:17:43.787852 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
510 17:17:43.788135 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 17:17:43.788414 Relocation complete.
512 17:17:43.788690 New SMBASE 0x99ffec00
513 17:17:43.788988 In relocation handler: CPU 5
514 17:17:43.789266 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
515 17:17:43.789606 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 17:17:43.789912 Relocation complete.
517 17:17:43.790193 New SMBASE 0x99ffe800
518 17:17:43.790476 In relocation handler: CPU 6
519 17:17:43.790755 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
520 17:17:43.791039 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 17:17:43.791318 Relocation complete.
522 17:17:43.791603 New SMBASE 0x99fff800
523 17:17:43.791886 In relocation handler: CPU 2
524 17:17:43.792165 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
525 17:17:43.792445 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 17:17:43.792722 Relocation complete.
527 17:17:43.793035 New SMBASE 0x99ffe400
528 17:17:43.793536 In relocation handler: CPU 7
529 17:17:43.793995 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
530 17:17:43.794511 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 17:17:43.794982 Relocation complete.
532 17:17:43.795435 Initializing CPU #0
533 17:17:43.795909 CPU: vendor Intel device 806ec
534 17:17:43.796392 CPU: family 06, model 8e, stepping 0c
535 17:17:43.796862 Clearing out pending MCEs
536 17:17:43.797360 Setting up local APIC...
537 17:17:43.797752 apic_id: 0x00 done.
538 17:17:43.798086 Turbo is available but hidden
539 17:17:43.798383 Turbo is available and visible
540 17:17:43.798674 VMX status: enabled
541 17:17:43.799011 IA32_FEATURE_CONTROL status: locked
542 17:17:43.799341 Skip microcode update
543 17:17:43.799680 CPU #0 initialized
544 17:17:43.800044 Initializing CPU #3
545 17:17:43.800399 Initializing CPU #5
546 17:17:43.800743 Initializing CPU #6
547 17:17:43.801086 Initializing CPU #2
548 17:17:43.801411 Initializing CPU #7
549 17:17:43.801722 CPU: vendor Intel device 806ec
550 17:17:43.802026 CPU: family 06, model 8e, stepping 0c
551 17:17:43.802238 CPU: vendor Intel device 806ec
552 17:17:43.802421 CPU: family 06, model 8e, stepping 0c
553 17:17:43.802572 Clearing out pending MCEs
554 17:17:43.802724 Clearing out pending MCEs
555 17:17:43.802876 Setting up local APIC...
556 17:17:43.803024 CPU: vendor Intel device 806ec
557 17:17:43.803176 CPU: family 06, model 8e, stepping 0c
558 17:17:43.803341 Clearing out pending MCEs
559 17:17:43.803494 Initializing CPU #4
560 17:17:43.803644 Initializing CPU #1
561 17:17:43.803793 CPU: vendor Intel device 806ec
562 17:17:43.803942 CPU: family 06, model 8e, stepping 0c
563 17:17:43.804091 CPU: vendor Intel device 806ec
564 17:17:43.804240 CPU: family 06, model 8e, stepping 0c
565 17:17:43.804389 Clearing out pending MCEs
566 17:17:43.804537 Clearing out pending MCEs
567 17:17:43.804687 Setting up local APIC...
568 17:17:43.804857 Setting up local APIC...
569 17:17:43.805012 CPU: vendor Intel device 806ec
570 17:17:43.805164 CPU: family 06, model 8e, stepping 0c
571 17:17:43.805316 CPU: vendor Intel device 806ec
572 17:17:43.805467 CPU: family 06, model 8e, stepping 0c
573 17:17:43.805617 Clearing out pending MCEs
574 17:17:43.805765 Clearing out pending MCEs
575 17:17:43.805926 Setting up local APIC...
576 17:17:43.806082 apic_id: 0x02 done.
577 17:17:43.806231 Setting up local APIC...
578 17:17:43.806391 apic_id: 0x06 done.
579 17:17:43.806543 apic_id: 0x07 done.
580 17:17:43.806692 VMX status: enabled
581 17:17:43.806843 VMX status: enabled
582 17:17:43.806991 IA32_FEATURE_CONTROL status: locked
583 17:17:43.807139 Setting up local APIC...
584 17:17:43.807527 apic_id: 0x03 done.
585 17:17:43.807663 VMX status: enabled
586 17:17:43.807785 VMX status: enabled
587 17:17:43.807904 IA32_FEATURE_CONTROL status: locked
588 17:17:43.808025 IA32_FEATURE_CONTROL status: locked
589 17:17:43.808145 Skip microcode update
590 17:17:43.808265 Skip microcode update
591 17:17:43.808384 CPU #4 initialized
592 17:17:43.808502 CPU #1 initialized
593 17:17:43.808620 IA32_FEATURE_CONTROL status: locked
594 17:17:43.808740 Skip microcode update
595 17:17:43.808881 Skip microcode update
596 17:17:43.809004 CPU #2 initialized
597 17:17:43.809123 CPU #7 initialized
598 17:17:43.809243 apic_id: 0x04 done.
599 17:17:43.809362 Setting up local APIC...
600 17:17:43.809482 apic_id: 0x01 done.
601 17:17:43.809600 VMX status: enabled
602 17:17:43.809719 apic_id: 0x05 done.
603 17:17:43.809836 IA32_FEATURE_CONTROL status: locked
604 17:17:43.809954 VMX status: enabled
605 17:17:43.810072 Skip microcode update
606 17:17:43.810190 IA32_FEATURE_CONTROL status: locked
607 17:17:43.810309 CPU #6 initialized
608 17:17:43.810428 Skip microcode update
609 17:17:43.810547 VMX status: enabled
610 17:17:43.810664 CPU #5 initialized
611 17:17:43.810783 IA32_FEATURE_CONTROL status: locked
612 17:17:43.810901 Skip microcode update
613 17:17:43.811018 CPU #3 initialized
614 17:17:43.811169 bsp_do_flight_plan done after 457 msecs.
615 17:17:43.811305 CPU: frequency set to 4200 MHz
616 17:17:43.811426 Enabling SMIs.
617 17:17:43.811545 Locking SMM.
618 17:17:43.811665 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 17:17:43.811786 CBFS @ c08000 size 3f8000
620 17:17:43.811905 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 17:17:43.812025 CBFS: Locating 'vbt.bin'
622 17:17:43.812144 CBFS: Found @ offset 5f5c0 size 499
623 17:17:43.812276 Found a VBT of 4608 bytes after decompression
624 17:17:43.867095 Display FSP Version Info HOB
625 17:17:43.870270 Reference Code - CPU = 9.0.1e.30
626 17:17:43.873472 uCode Version = 0.0.0.ca
627 17:17:43.876500 TXT ACM version = ff.ff.ff.ffff
628 17:17:43.880178 Display FSP Version Info HOB
629 17:17:43.883443 Reference Code - ME = 9.0.1e.30
630 17:17:43.886719 MEBx version = 0.0.0.0
631 17:17:43.890046 ME Firmware Version = Consumer SKU
632 17:17:43.893338 Display FSP Version Info HOB
633 17:17:43.896552 Reference Code - CML PCH = 9.0.1e.30
634 17:17:44.080268 PCH-CRID Status = Disabled
635 17:17:44.080995 PCH-CRID Original Value = ff.ff.ff.ffff
636 17:17:44.081402 PCH-CRID New Value = ff.ff.ff.ffff
637 17:17:44.081735 OPROM - RST - RAID = ff.ff.ff.ffff
638 17:17:44.082055 ChipsetInit Base Version = ff.ff.ff.ffff
639 17:17:44.082362 ChipsetInit Oem Version = ff.ff.ff.ffff
640 17:17:44.082673 Display FSP Version Info HOB
641 17:17:44.082969 Reference Code - SA - System Agent = 9.0.1e.30
642 17:17:44.083340 Reference Code - MRC = 0.7.1.6c
643 17:17:44.083820 SA - PCIe Version = 9.0.1e.30
644 17:17:44.084137 SA-CRID Status = Disabled
645 17:17:44.084432 SA-CRID Original Value = 0.0.0.c
646 17:17:44.084834 SA-CRID New Value = 0.0.0.c
647 17:17:44.085301 OPROM - VBIOS = ff.ff.ff.ffff
648 17:17:44.085609 RTC Init
649 17:17:44.085901 Set power on after power failure.
650 17:17:44.086192 Disabling Deep S3
651 17:17:44.086580 Disabling Deep S3
652 17:17:44.086874 Disabling Deep S4
653 17:17:44.087160 Disabling Deep S4
654 17:17:44.087446 Disabling Deep S5
655 17:17:44.087732 Disabling Deep S5
656 17:17:44.088119 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
657 17:17:44.088469 Enumerating buses...
658 17:17:44.088925 Show all devs... Before device enumeration.
659 17:17:44.089225 Root Device: enabled 1
660 17:17:44.089511 CPU_CLUSTER: 0: enabled 1
661 17:17:44.089796 DOMAIN: 0000: enabled 1
662 17:17:44.090133 APIC: 00: enabled 1
663 17:17:44.090450 PCI: 00:00.0: enabled 1
664 17:17:44.090734 PCI: 00:02.0: enabled 1
665 17:17:44.091053 PCI: 00:04.0: enabled 0
666 17:17:44.091389 PCI: 00:05.0: enabled 0
667 17:17:44.091674 PCI: 00:12.0: enabled 1
668 17:17:44.091957 PCI: 00:12.5: enabled 0
669 17:17:44.092237 PCI: 00:12.6: enabled 0
670 17:17:44.092654 PCI: 00:14.0: enabled 1
671 17:17:44.093065 PCI: 00:14.1: enabled 0
672 17:17:44.093363 PCI: 00:14.3: enabled 1
673 17:17:44.093717 PCI: 00:14.5: enabled 0
674 17:17:44.094073 PCI: 00:15.0: enabled 1
675 17:17:44.094448 PCI: 00:15.1: enabled 1
676 17:17:44.094788 PCI: 00:15.2: enabled 0
677 17:17:44.095188 PCI: 00:15.3: enabled 0
678 17:17:44.095477 PCI: 00:16.0: enabled 1
679 17:17:44.095858 PCI: 00:16.1: enabled 0
680 17:17:44.096165 PCI: 00:16.2: enabled 0
681 17:17:44.096449 PCI: 00:16.3: enabled 0
682 17:17:44.096730 PCI: 00:16.4: enabled 0
683 17:17:44.097223 PCI: 00:16.5: enabled 0
684 17:17:44.097552 PCI: 00:17.0: enabled 1
685 17:17:44.097899 PCI: 00:19.0: enabled 1
686 17:17:44.098259 PCI: 00:19.1: enabled 0
687 17:17:44.098591 PCI: 00:19.2: enabled 0
688 17:17:44.098880 PCI: 00:1a.0: enabled 0
689 17:17:44.099351 PCI: 00:1c.0: enabled 0
690 17:17:44.099649 PCI: 00:1c.1: enabled 0
691 17:17:44.099926 PCI: 00:1c.2: enabled 0
692 17:17:44.100358 PCI: 00:1c.3: enabled 0
693 17:17:44.100885 PCI: 00:1c.4: enabled 0
694 17:17:44.101399 PCI: 00:1c.5: enabled 0
695 17:17:44.101710 PCI: 00:1c.6: enabled 0
696 17:17:44.102001 PCI: 00:1c.7: enabled 0
697 17:17:44.102368 PCI: 00:1d.0: enabled 1
698 17:17:44.102840 PCI: 00:1d.1: enabled 0
699 17:17:44.103275 PCI: 00:1d.2: enabled 0
700 17:17:44.103574 PCI: 00:1d.3: enabled 0
701 17:17:44.103857 PCI: 00:1d.4: enabled 0
702 17:17:44.104278 PCI: 00:1d.5: enabled 1
703 17:17:44.104938 PCI: 00:1e.0: enabled 1
704 17:17:44.105407 PCI: 00:1e.1: enabled 0
705 17:17:44.105708 PCI: 00:1e.2: enabled 1
706 17:17:44.105995 PCI: 00:1e.3: enabled 1
707 17:17:44.106383 PCI: 00:1f.0: enabled 1
708 17:17:44.106675 PCI: 00:1f.1: enabled 1
709 17:17:44.106960 PCI: 00:1f.2: enabled 1
710 17:17:44.107394 PCI: 00:1f.3: enabled 1
711 17:17:44.107623 PCI: 00:1f.4: enabled 1
712 17:17:44.107826 PCI: 00:1f.5: enabled 1
713 17:17:44.108144 PCI: 00:1f.6: enabled 0
714 17:17:44.108651 USB0 port 0: enabled 1
715 17:17:44.108924 I2C: 00:15: enabled 1
716 17:17:44.111779 I2C: 00:5d: enabled 1
717 17:17:44.115382 GENERIC: 0.0: enabled 1
718 17:17:44.118763 I2C: 00:1a: enabled 1
719 17:17:44.118969 I2C: 00:38: enabled 1
720 17:17:44.122075 I2C: 00:39: enabled 1
721 17:17:44.124658 I2C: 00:3a: enabled 1
722 17:17:44.124877 I2C: 00:3b: enabled 1
723 17:17:44.128083 PCI: 00:00.0: enabled 1
724 17:17:44.131277 SPI: 00: enabled 1
725 17:17:44.131518 SPI: 01: enabled 1
726 17:17:44.134549 PNP: 0c09.0: enabled 1
727 17:17:44.138491 USB2 port 0: enabled 1
728 17:17:44.138648 USB2 port 1: enabled 1
729 17:17:44.141839 USB2 port 2: enabled 0
730 17:17:44.145070 USB2 port 3: enabled 0
731 17:17:44.145251 USB2 port 5: enabled 0
732 17:17:44.148203 USB2 port 6: enabled 1
733 17:17:44.151269 USB2 port 9: enabled 1
734 17:17:44.154630 USB3 port 0: enabled 1
735 17:17:44.154817 USB3 port 1: enabled 1
736 17:17:44.158292 USB3 port 2: enabled 1
737 17:17:44.161678 USB3 port 3: enabled 1
738 17:17:44.161831 USB3 port 4: enabled 0
739 17:17:44.164777 APIC: 03: enabled 1
740 17:17:44.168269 APIC: 06: enabled 1
741 17:17:44.168421 APIC: 01: enabled 1
742 17:17:44.171123 APIC: 02: enabled 1
743 17:17:44.171263 APIC: 05: enabled 1
744 17:17:44.174696 APIC: 04: enabled 1
745 17:17:44.177809 APIC: 07: enabled 1
746 17:17:44.177984 Compare with tree...
747 17:17:44.181524 Root Device: enabled 1
748 17:17:44.184453 CPU_CLUSTER: 0: enabled 1
749 17:17:44.187677 APIC: 00: enabled 1
750 17:17:44.187805 APIC: 03: enabled 1
751 17:17:44.190968 APIC: 06: enabled 1
752 17:17:44.194791 APIC: 01: enabled 1
753 17:17:44.194925 APIC: 02: enabled 1
754 17:17:44.198003 APIC: 05: enabled 1
755 17:17:44.201269 APIC: 04: enabled 1
756 17:17:44.201357 APIC: 07: enabled 1
757 17:17:44.204786 DOMAIN: 0000: enabled 1
758 17:17:44.208067 PCI: 00:00.0: enabled 1
759 17:17:44.211385 PCI: 00:02.0: enabled 1
760 17:17:44.211930 PCI: 00:04.0: enabled 0
761 17:17:44.214581 PCI: 00:05.0: enabled 0
762 17:17:44.217894 PCI: 00:12.0: enabled 1
763 17:17:44.221034 PCI: 00:12.5: enabled 0
764 17:17:44.224658 PCI: 00:12.6: enabled 0
765 17:17:44.225326 PCI: 00:14.0: enabled 1
766 17:17:44.227987 USB0 port 0: enabled 1
767 17:17:44.231370 USB2 port 0: enabled 1
768 17:17:44.234540 USB2 port 1: enabled 1
769 17:17:44.237870 USB2 port 2: enabled 0
770 17:17:44.238265 USB2 port 3: enabled 0
771 17:17:44.241144 USB2 port 5: enabled 0
772 17:17:44.244422 USB2 port 6: enabled 1
773 17:17:44.247766 USB2 port 9: enabled 1
774 17:17:44.250889 USB3 port 0: enabled 1
775 17:17:44.254653 USB3 port 1: enabled 1
776 17:17:44.255201 USB3 port 2: enabled 1
777 17:17:44.257926 USB3 port 3: enabled 1
778 17:17:44.261119 USB3 port 4: enabled 0
779 17:17:44.264217 PCI: 00:14.1: enabled 0
780 17:17:44.267813 PCI: 00:14.3: enabled 1
781 17:17:44.268096 PCI: 00:14.5: enabled 0
782 17:17:44.271045 PCI: 00:15.0: enabled 1
783 17:17:44.284456 I2C: 00:15: enabled 1
784 17:17:44.284666 PCI: 00:15.1: enabled 1
785 17:17:44.284907 I2C: 00:5d: enabled 1
786 17:17:44.285053 GENERIC: 0.0: enabled 1
787 17:17:44.285190 PCI: 00:15.2: enabled 0
788 17:17:44.287472 PCI: 00:15.3: enabled 0
789 17:17:44.290703 PCI: 00:16.0: enabled 1
790 17:17:44.293691 PCI: 00:16.1: enabled 0
791 17:17:44.293912 PCI: 00:16.2: enabled 0
792 17:17:44.296914 PCI: 00:16.3: enabled 0
793 17:17:44.300733 PCI: 00:16.4: enabled 0
794 17:17:44.303793 PCI: 00:16.5: enabled 0
795 17:17:44.307048 PCI: 00:17.0: enabled 1
796 17:17:44.307351 PCI: 00:19.0: enabled 1
797 17:17:44.310250 I2C: 00:1a: enabled 1
798 17:17:44.313508 I2C: 00:38: enabled 1
799 17:17:44.317447 I2C: 00:39: enabled 1
800 17:17:44.317656 I2C: 00:3a: enabled 1
801 17:17:44.320588 I2C: 00:3b: enabled 1
802 17:17:44.323854 PCI: 00:19.1: enabled 0
803 17:17:44.344591 PCI: 00:19.2: enabled 0
804 17:17:44.345085 PCI: 00:1a.0: enabled 0
805 17:17:44.345471 PCI: 00:1c.0: enabled 0
806 17:17:44.345831 PCI: 00:1c.1: enabled 0
807 17:17:44.346193 PCI: 00:1c.2: enabled 0
808 17:17:44.346557 PCI: 00:1c.3: enabled 0
809 17:17:44.346918 PCI: 00:1c.4: enabled 0
810 17:17:44.347207 PCI: 00:1c.5: enabled 0
811 17:17:44.347736 PCI: 00:1c.6: enabled 0
812 17:17:44.349957 PCI: 00:1c.7: enabled 0
813 17:17:44.353270 PCI: 00:1d.0: enabled 1
814 17:17:44.353606 PCI: 00:1d.1: enabled 0
815 17:17:44.357136 PCI: 00:1d.2: enabled 0
816 17:17:44.360219 PCI: 00:1d.3: enabled 0
817 17:17:44.363356 PCI: 00:1d.4: enabled 0
818 17:17:44.378781 PCI: 00:1d.5: enabled 1
819 17:17:44.379334 PCI: 00:00.0: enabled 1
820 17:17:44.379837 PCI: 00:1e.0: enabled 1
821 17:17:44.380330 PCI: 00:1e.1: enabled 0
822 17:17:44.380844 PCI: 00:1e.2: enabled 1
823 17:17:44.381652 SPI: 00: enabled 1
824 17:17:44.382168 PCI: 00:1e.3: enabled 1
825 17:17:44.383418 SPI: 01: enabled 1
826 17:17:44.386245 PCI: 00:1f.0: enabled 1
827 17:17:44.389933 PNP: 0c09.0: enabled 1
828 17:17:44.390474 PCI: 00:1f.1: enabled 1
829 17:17:44.393406 PCI: 00:1f.2: enabled 1
830 17:17:44.396385 PCI: 00:1f.3: enabled 1
831 17:17:44.399949 PCI: 00:1f.4: enabled 1
832 17:17:44.403069 PCI: 00:1f.5: enabled 1
833 17:17:44.403432 PCI: 00:1f.6: enabled 0
834 17:17:44.406489 Root Device scanning...
835 17:17:44.409803 scan_static_bus for Root Device
836 17:17:44.412738 CPU_CLUSTER: 0 enabled
837 17:17:44.416716 DOMAIN: 0000 enabled
838 17:17:44.417178 DOMAIN: 0000 scanning...
839 17:17:44.419723 PCI: pci_scan_bus for bus 00
840 17:17:44.423185 PCI: 00:00.0 [8086/0000] ops
841 17:17:44.426329 PCI: 00:00.0 [8086/9b61] enabled
842 17:17:44.429657 PCI: 00:02.0 [8086/0000] bus ops
843 17:17:44.432886 PCI: 00:02.0 [8086/9b41] enabled
844 17:17:44.436209 PCI: 00:04.0 [8086/1903] disabled
845 17:17:44.439240 PCI: 00:08.0 [8086/1911] enabled
846 17:17:44.443074 PCI: 00:12.0 [8086/02f9] enabled
847 17:17:44.445805 PCI: 00:14.0 [8086/0000] bus ops
848 17:17:44.449002 PCI: 00:14.0 [8086/02ed] enabled
849 17:17:44.452897 PCI: 00:14.2 [8086/02ef] enabled
850 17:17:44.456168 PCI: 00:14.3 [8086/02f0] enabled
851 17:17:44.459585 PCI: 00:15.0 [8086/0000] bus ops
852 17:17:44.462811 PCI: 00:15.0 [8086/02e8] enabled
853 17:17:44.465922 PCI: 00:15.1 [8086/0000] bus ops
854 17:17:44.469146 PCI: 00:15.1 [8086/02e9] enabled
855 17:17:44.472380 PCI: 00:16.0 [8086/0000] ops
856 17:17:44.475686 PCI: 00:16.0 [8086/02e0] enabled
857 17:17:44.491887 PCI: 00:17.0 [8086/0000] ops
858 17:17:44.491993 PCI: 00:17.0 [8086/02d3] enabled
859 17:17:44.492070 PCI: 00:19.0 [8086/0000] bus ops
860 17:17:44.492133 PCI: 00:19.0 [8086/02c5] enabled
861 17:17:44.492454 PCI: 00:1d.0 [8086/0000] bus ops
862 17:17:44.495434 PCI: 00:1d.0 [8086/02b0] enabled
863 17:17:44.502394 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 17:17:44.505470 PCI: 00:1e.0 [8086/0000] ops
865 17:17:44.508669 PCI: 00:1e.0 [8086/02a8] enabled
866 17:17:44.511936 PCI: 00:1e.2 [8086/0000] bus ops
867 17:17:44.515131 PCI: 00:1e.2 [8086/02aa] enabled
868 17:17:44.518898 PCI: 00:1e.3 [8086/0000] bus ops
869 17:17:44.522105 PCI: 00:1e.3 [8086/02ab] enabled
870 17:17:44.525095 PCI: 00:1f.0 [8086/0000] bus ops
871 17:17:44.584456 PCI: 00:1f.0 [8086/0284] enabled
872 17:17:44.584621 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 17:17:44.584737 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 17:17:44.584849 PCI: 00:1f.3 [8086/0000] bus ops
875 17:17:44.584950 PCI: 00:1f.3 [8086/02c8] enabled
876 17:17:44.585049 PCI: 00:1f.4 [8086/0000] bus ops
877 17:17:44.585146 PCI: 00:1f.4 [8086/02a3] enabled
878 17:17:44.585243 PCI: 00:1f.5 [8086/0000] bus ops
879 17:17:44.585342 PCI: 00:1f.5 [8086/02a4] enabled
880 17:17:44.585439 PCI: Leftover static devices:
881 17:17:44.585536 PCI: 00:05.0
882 17:17:44.585634 PCI: 00:12.5
883 17:17:44.585731 PCI: 00:12.6
884 17:17:44.585827 PCI: 00:14.1
885 17:17:44.585924 PCI: 00:14.5
886 17:17:44.586019 PCI: 00:15.2
887 17:17:44.586117 PCI: 00:15.3
888 17:17:44.586211 PCI: 00:16.1
889 17:17:44.586308 PCI: 00:16.2
890 17:17:44.586402 PCI: 00:16.3
891 17:17:44.586496 PCI: 00:16.4
892 17:17:44.586590 PCI: 00:16.5
893 17:17:44.586684 PCI: 00:19.1
894 17:17:44.586779 PCI: 00:19.2
895 17:17:44.586872 PCI: 00:1a.0
896 17:17:44.587164 PCI: 00:1c.0
897 17:17:44.587269 PCI: 00:1c.1
898 17:17:44.587366 PCI: 00:1c.2
899 17:17:44.588311 PCI: 00:1c.3
900 17:17:44.588424 PCI: 00:1c.4
901 17:17:44.591378 PCI: 00:1c.5
902 17:17:44.591486 PCI: 00:1c.6
903 17:17:44.591582 PCI: 00:1c.7
904 17:17:44.595029 PCI: 00:1d.1
905 17:17:44.595116 PCI: 00:1d.2
906 17:17:44.598149 PCI: 00:1d.3
907 17:17:44.598237 PCI: 00:1d.4
908 17:17:44.601806 PCI: 00:1d.5
909 17:17:44.601892 PCI: 00:1e.1
910 17:17:44.601960 PCI: 00:1f.1
911 17:17:44.604845 PCI: 00:1f.2
912 17:17:44.604931 PCI: 00:1f.6
913 17:17:44.608040 PCI: Check your devicetree.cb.
914 17:17:44.611702 PCI: 00:02.0 scanning...
915 17:17:44.614780 scan_generic_bus for PCI: 00:02.0
916 17:17:44.618143 scan_generic_bus for PCI: 00:02.0 done
917 17:17:44.624773 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
918 17:17:44.628366 PCI: 00:14.0 scanning...
919 17:17:44.631583 scan_static_bus for PCI: 00:14.0
920 17:17:44.631698 USB0 port 0 enabled
921 17:17:44.634813 USB0 port 0 scanning...
922 17:17:44.638134 scan_static_bus for USB0 port 0
923 17:17:44.641367 USB2 port 0 enabled
924 17:17:44.641457 USB2 port 1 enabled
925 17:17:44.644683 USB2 port 2 disabled
926 17:17:44.647900 USB2 port 3 disabled
927 17:17:44.648006 USB2 port 5 disabled
928 17:17:44.651061 USB2 port 6 enabled
929 17:17:44.651148 USB2 port 9 enabled
930 17:17:44.654942 USB3 port 0 enabled
931 17:17:44.658185 USB3 port 1 enabled
932 17:17:44.658269 USB3 port 2 enabled
933 17:17:44.661570 USB3 port 3 enabled
934 17:17:44.664717 USB3 port 4 disabled
935 17:17:44.664798 USB2 port 0 scanning...
936 17:17:44.668033 scan_static_bus for USB2 port 0
937 17:17:44.674379 scan_static_bus for USB2 port 0 done
938 17:17:44.678004 scan_bus: scanning of bus USB2 port 0 took 9688 usecs
939 17:17:44.681220 USB2 port 1 scanning...
940 17:17:44.684436 scan_static_bus for USB2 port 1
941 17:17:44.687592 scan_static_bus for USB2 port 1 done
942 17:17:44.694508 scan_bus: scanning of bus USB2 port 1 took 9681 usecs
943 17:17:44.694608 USB2 port 6 scanning...
944 17:17:44.697683 scan_static_bus for USB2 port 6
945 17:17:44.704581 scan_static_bus for USB2 port 6 done
946 17:17:44.707593 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
947 17:17:44.710614 USB2 port 9 scanning...
948 17:17:44.714501 scan_static_bus for USB2 port 9
949 17:17:44.717654 scan_static_bus for USB2 port 9 done
950 17:17:44.723937 scan_bus: scanning of bus USB2 port 9 took 9706 usecs
951 17:17:44.724021 USB3 port 0 scanning...
952 17:17:44.727889 scan_static_bus for USB3 port 0
953 17:17:44.734352 scan_static_bus for USB3 port 0 done
954 17:17:44.737533 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
955 17:17:44.740740 USB3 port 1 scanning...
956 17:17:44.744086 scan_static_bus for USB3 port 1
957 17:17:44.747285 scan_static_bus for USB3 port 1 done
958 17:17:44.753808 scan_bus: scanning of bus USB3 port 1 took 9706 usecs
959 17:17:44.753893 USB3 port 2 scanning...
960 17:17:44.757585 scan_static_bus for USB3 port 2
961 17:17:44.764088 scan_static_bus for USB3 port 2 done
962 17:17:44.767346 scan_bus: scanning of bus USB3 port 2 took 9687 usecs
963 17:17:44.771245 USB3 port 3 scanning...
964 17:17:44.774574 scan_static_bus for USB3 port 3
965 17:17:44.777712 scan_static_bus for USB3 port 3 done
966 17:17:44.784241 scan_bus: scanning of bus USB3 port 3 took 9698 usecs
967 17:17:44.787604 scan_static_bus for USB0 port 0 done
968 17:17:44.794127 scan_bus: scanning of bus USB0 port 0 took 155307 usecs
969 17:17:44.797406 scan_static_bus for PCI: 00:14.0 done
970 17:17:44.800541 scan_bus: scanning of bus PCI: 00:14.0 took 172923 usecs
971 17:17:44.804150 PCI: 00:15.0 scanning...
972 17:17:44.807270 scan_generic_bus for PCI: 00:15.0
973 17:17:44.810870 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 17:17:44.817045 scan_generic_bus for PCI: 00:15.0 done
975 17:17:44.820732 scan_bus: scanning of bus PCI: 00:15.0 took 14300 usecs
976 17:17:44.824050 PCI: 00:15.1 scanning...
977 17:17:44.827059 scan_generic_bus for PCI: 00:15.1
978 17:17:44.830279 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 17:17:44.837128 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 17:17:44.840357 scan_generic_bus for PCI: 00:15.1 done
981 17:17:44.847332 scan_bus: scanning of bus PCI: 00:15.1 took 18614 usecs
982 17:17:44.847425 PCI: 00:19.0 scanning...
983 17:17:44.850523 scan_generic_bus for PCI: 00:19.0
984 17:17:44.857046 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 17:17:44.860260 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 17:17:44.863630 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 17:17:44.866927 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 17:17:44.873535 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 17:17:44.876708 scan_generic_bus for PCI: 00:19.0 done
990 17:17:44.880603 scan_bus: scanning of bus PCI: 00:19.0 took 30727 usecs
991 17:17:44.883570 PCI: 00:1d.0 scanning...
992 17:17:44.886864 do_pci_scan_bridge for PCI: 00:1d.0
993 17:17:44.890083 PCI: pci_scan_bus for bus 01
994 17:17:44.893350 PCI: 01:00.0 [1c5c/1327] enabled
995 17:17:44.896659 Enabling Common Clock Configuration
996 17:17:44.903714 L1 Sub-State supported from root port 29
997 17:17:44.906975 L1 Sub-State Support = 0xf
998 17:17:44.907067 CommonModeRestoreTime = 0x28
999 17:17:44.913391 Power On Value = 0x16, Power On Scale = 0x0
1000 17:17:44.913478 ASPM: Enabled L1
1001 17:17:44.919894 scan_bus: scanning of bus PCI: 00:1d.0 took 32789 usecs
1002 17:17:44.923643 PCI: 00:1e.2 scanning...
1003 17:17:44.926624 scan_generic_bus for PCI: 00:1e.2
1004 17:17:44.930172 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 17:17:44.933336 scan_generic_bus for PCI: 00:1e.2 done
1006 17:17:44.940262 scan_bus: scanning of bus PCI: 00:1e.2 took 13993 usecs
1007 17:17:44.943286 PCI: 00:1e.3 scanning...
1008 17:17:44.946608 scan_generic_bus for PCI: 00:1e.3
1009 17:17:44.950212 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 17:17:44.953402 scan_generic_bus for PCI: 00:1e.3 done
1011 17:17:44.960007 scan_bus: scanning of bus PCI: 00:1e.3 took 13992 usecs
1012 17:17:44.960113 PCI: 00:1f.0 scanning...
1013 17:17:44.963207 scan_static_bus for PCI: 00:1f.0
1014 17:17:44.966489 PNP: 0c09.0 enabled
1015 17:17:44.970290 scan_static_bus for PCI: 00:1f.0 done
1016 17:17:44.976710 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1017 17:17:44.980061 PCI: 00:1f.3 scanning...
1018 17:17:44.983406 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1019 17:17:44.986550 PCI: 00:1f.4 scanning...
1020 17:17:44.989744 scan_generic_bus for PCI: 00:1f.4
1021 17:17:44.996293 scan_generic_bus for PCI: 00:1f.4 done
1022 17:17:44.999588 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1023 17:17:45.003572 PCI: 00:1f.5 scanning...
1024 17:17:45.006764 scan_generic_bus for PCI: 00:1f.5
1025 17:17:45.010077 scan_generic_bus for PCI: 00:1f.5 done
1026 17:17:45.016413 scan_bus: scanning of bus PCI: 00:1f.5 took 10184 usecs
1027 17:17:45.022910 scan_bus: scanning of bus DOMAIN: 0000 took 604911 usecs
1028 17:17:45.026580 scan_static_bus for Root Device done
1029 17:17:45.029627 scan_bus: scanning of bus Root Device took 624788 usecs
1030 17:17:45.032921 done
1031 17:17:45.036486 Chrome EC: UHEPI supported
1032 17:17:45.039575 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 17:17:45.046374 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 17:17:45.053088 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 17:17:45.059444 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 17:17:45.062802 SPI flash protection: WPSW=0 SRP0=1
1037 17:17:45.069296 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 17:17:45.072457 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1039 17:17:45.075734 found VGA at PCI: 00:02.0
1040 17:17:45.079103 Setting up VGA for PCI: 00:02.0
1041 17:17:45.086344 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 17:17:45.089576 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 17:17:45.092659 Allocating resources...
1044 17:17:45.095977 Reading resources...
1045 17:17:45.099241 Root Device read_resources bus 0 link: 0
1046 17:17:45.102473 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 17:17:45.109612 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 17:17:45.112229 DOMAIN: 0000 read_resources bus 0 link: 0
1049 17:17:45.120007 PCI: 00:14.0 read_resources bus 0 link: 0
1050 17:17:45.122729 USB0 port 0 read_resources bus 0 link: 0
1051 17:17:45.130865 USB0 port 0 read_resources bus 0 link: 0 done
1052 17:17:45.134591 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 17:17:45.141600 PCI: 00:15.0 read_resources bus 1 link: 0
1054 17:17:45.144880 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 17:17:45.151566 PCI: 00:15.1 read_resources bus 2 link: 0
1056 17:17:45.154735 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 17:17:45.162407 PCI: 00:19.0 read_resources bus 3 link: 0
1058 17:17:45.169060 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 17:17:45.172308 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 17:17:45.178926 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 17:17:45.182265 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 17:17:45.188936 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 17:17:45.192195 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 17:17:45.199386 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 17:17:45.202561 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 17:17:45.209133 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 17:17:45.215806 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 17:17:45.218934 Root Device read_resources bus 0 link: 0 done
1069 17:17:45.222172 Done reading resources.
1070 17:17:45.225323 Show resources in subtree (Root Device)...After reading.
1071 17:17:45.231892 Root Device child on link 0 CPU_CLUSTER: 0
1072 17:17:45.235253 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 17:17:45.235362 APIC: 00
1074 17:17:45.238651 APIC: 03
1075 17:17:45.238778 APIC: 06
1076 17:17:45.242394 APIC: 01
1077 17:17:45.242500 APIC: 02
1078 17:17:45.242594 APIC: 05
1079 17:17:45.245425 APIC: 04
1080 17:17:45.245545 APIC: 07
1081 17:17:45.248512 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 17:17:45.297382 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 17:17:45.297719 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 17:17:45.297842 PCI: 00:00.0
1085 17:17:45.297968 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 17:17:45.298081 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 17:17:45.301785 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 17:17:45.308285 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 17:17:45.318182 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 17:17:45.327891 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 17:17:45.338185 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 17:17:45.344661 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 17:17:45.354499 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 17:17:45.364722 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 17:17:45.374097 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 17:17:45.384053 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 17:17:45.390630 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 17:17:45.401139 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 17:17:45.410839 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 17:17:45.420988 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 17:17:45.423587 PCI: 00:02.0
1102 17:17:45.434103 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 17:17:45.443481 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 17:17:45.450206 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 17:17:45.453672 PCI: 00:04.0
1106 17:17:45.453760 PCI: 00:08.0
1107 17:17:45.463244 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 17:17:45.466980 PCI: 00:12.0
1109 17:17:45.476512 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 17:17:45.479762 PCI: 00:14.0 child on link 0 USB0 port 0
1111 17:17:45.490046 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 17:17:45.493315 USB0 port 0 child on link 0 USB2 port 0
1113 17:17:45.496554 USB2 port 0
1114 17:17:45.499854 USB2 port 1
1115 17:17:45.499932 USB2 port 2
1116 17:17:45.502993 USB2 port 3
1117 17:17:45.503067 USB2 port 5
1118 17:17:45.506212 USB2 port 6
1119 17:17:45.506285 USB2 port 9
1120 17:17:45.509982 USB3 port 0
1121 17:17:45.510058 USB3 port 1
1122 17:17:45.513289 USB3 port 2
1123 17:17:45.513397 USB3 port 3
1124 17:17:45.516591 USB3 port 4
1125 17:17:45.516697 PCI: 00:14.2
1126 17:17:45.526387 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 17:17:45.536069 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 17:17:45.539296 PCI: 00:14.3
1129 17:17:45.549657 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 17:17:45.552967 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 17:17:45.562815 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 17:17:45.566002 I2C: 01:15
1133 17:17:45.569040 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 17:17:45.579336 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 17:17:45.579422 I2C: 02:5d
1136 17:17:45.582431 GENERIC: 0.0
1137 17:17:45.582518 PCI: 00:16.0
1138 17:17:45.592897 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 17:17:45.595972 PCI: 00:17.0
1140 17:17:45.605585 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 17:17:45.612475 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 17:17:45.622179 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 17:17:45.628629 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 17:17:45.639127 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 17:17:45.648681 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 17:17:45.652000 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 17:17:45.661886 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 17:17:45.661974 I2C: 03:1a
1149 17:17:45.665124 I2C: 03:38
1150 17:17:45.665209 I2C: 03:39
1151 17:17:45.668323 I2C: 03:3a
1152 17:17:45.668437 I2C: 03:3b
1153 17:17:45.675478 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 17:17:45.681801 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 17:17:45.691833 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 17:17:45.701909 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 17:17:45.701999 PCI: 01:00.0
1158 17:17:45.711510 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 17:17:45.715005 PCI: 00:1e.0
1160 17:17:45.725132 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 17:17:45.734758 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 17:17:45.737945 PCI: 00:1e.2 child on link 0 SPI: 00
1163 17:17:45.748315 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 17:17:45.751574 SPI: 00
1165 17:17:45.754682 PCI: 00:1e.3 child on link 0 SPI: 01
1166 17:17:45.764602 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 17:17:45.764694 SPI: 01
1168 17:17:45.771764 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 17:17:45.778059 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 17:17:45.787690 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 17:17:45.790908 PNP: 0c09.0
1172 17:17:45.797753 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 17:17:45.800966 PCI: 00:1f.3
1174 17:17:45.811029 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 17:17:45.820625 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 17:17:45.820714 PCI: 00:1f.4
1177 17:17:45.830525 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 17:17:45.840688 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 17:17:45.840780 PCI: 00:1f.5
1180 17:17:45.850441 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 17:17:45.856878 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 17:17:45.863860 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 17:17:45.870561 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 17:17:45.873271 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 17:17:45.876553 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 17:17:45.880288 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 17:17:45.886842 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 17:17:45.893198 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 17:17:45.900058 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 17:17:45.906375 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 17:17:45.916522 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 17:17:45.922877 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 17:17:45.926059 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 17:17:45.932997 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 17:17:45.939217 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 17:17:45.942719 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 17:17:45.949370 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 17:17:45.952576 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 17:17:45.959204 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 17:17:45.962440 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 17:17:45.965647 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 17:17:45.972250 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 17:17:45.975500 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 17:17:45.982110 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 17:17:45.985829 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 17:17:45.992489 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 17:17:45.995696 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 17:17:46.002011 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 17:17:46.005210 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 17:17:46.012024 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 17:17:46.015151 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 17:17:46.022154 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 17:17:46.025183 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 17:17:46.031659 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 17:17:46.035000 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 17:17:46.041693 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 17:17:46.044813 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 17:17:46.054758 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 17:17:46.058033 avoid_fixed_resources: DOMAIN: 0000
1220 17:17:46.061234 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 17:17:46.068360 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 17:17:46.078259 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 17:17:46.084667 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 17:17:46.091599 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 17:17:46.101317 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 17:17:46.107689 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 17:17:46.114050 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 17:17:46.124256 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 17:17:46.130756 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 17:17:46.137691 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 17:17:46.144131 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 17:17:46.147494 Setting resources...
1233 17:17:46.153774 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 17:17:46.156761 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 17:17:46.160644 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 17:17:46.163777 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 17:17:46.170345 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 17:17:46.176849 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 17:17:46.180074 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 17:17:46.186703 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 17:17:46.196969 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 17:17:46.200172 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 17:17:46.206917 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 17:17:46.210169 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 17:17:46.216418 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 17:17:46.219593 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 17:17:46.226401 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 17:17:46.229639 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 17:17:46.236554 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 17:17:46.239660 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 17:17:46.242952 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 17:17:46.249344 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 17:17:46.252617 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 17:17:46.259641 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 17:17:46.262918 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 17:17:46.269730 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 17:17:46.272835 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 17:17:46.279320 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 17:17:46.282589 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 17:17:46.289215 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 17:17:46.292503 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 17:17:46.299691 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 17:17:46.302888 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 17:17:46.309324 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 17:17:46.315987 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 17:17:46.322558 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 17:17:46.328725 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 17:17:46.335666 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 17:17:46.342409 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 17:17:46.348724 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 17:17:46.355572 Root Device assign_resources, bus 0 link: 0
1272 17:17:46.358826 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 17:17:46.368649 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 17:17:46.375413 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 17:17:46.382318 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 17:17:46.392176 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 17:17:46.398602 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 17:17:46.408283 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 17:17:46.411619 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 17:17:46.418764 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 17:17:46.425406 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 17:17:46.435098 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 17:17:46.441840 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 17:17:46.451802 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 17:17:46.455040 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 17:17:46.458305 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 17:17:46.468143 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 17:17:46.471404 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 17:17:46.477857 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 17:17:46.484699 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 17:17:46.494699 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 17:17:46.501339 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 17:17:46.507800 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 17:17:46.517647 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 17:17:46.524298 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 17:17:46.530871 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 17:17:46.541115 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 17:17:46.544142 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 17:17:46.551094 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 17:17:46.557283 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 17:17:46.567555 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 17:17:46.573972 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 17:17:46.580562 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 17:17:46.587057 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 17:17:46.594010 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 17:17:46.600246 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 17:17:46.610628 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 17:17:46.613878 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 17:17:46.620474 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 17:17:46.627109 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 17:17:46.630314 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 17:17:46.636942 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 17:17:46.640128 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 17:17:46.647155 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 17:17:46.650376 LPC: Trying to open IO window from 800 size 1ff
1316 17:17:46.659814 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 17:17:46.666799 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 17:17:46.676817 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 17:17:46.683095 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 17:17:46.689674 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 17:17:46.692985 Root Device assign_resources, bus 0 link: 0
1322 17:17:46.696271 Done setting resources.
1323 17:17:46.703180 Show resources in subtree (Root Device)...After assigning values.
1324 17:17:46.706247 Root Device child on link 0 CPU_CLUSTER: 0
1325 17:17:46.709535 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 17:17:46.712643 APIC: 00
1327 17:17:46.712727 APIC: 03
1328 17:17:46.712793 APIC: 06
1329 17:17:46.716488 APIC: 01
1330 17:17:46.716608 APIC: 02
1331 17:17:46.719708 APIC: 05
1332 17:17:46.719784 APIC: 04
1333 17:17:46.719855 APIC: 07
1334 17:17:46.726394 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 17:17:46.736240 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 17:17:46.746200 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 17:17:46.746297 PCI: 00:00.0
1338 17:17:46.755737 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 17:17:46.765719 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 17:17:46.775649 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 17:17:46.785915 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 17:17:46.795753 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 17:17:46.805577 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 17:17:46.811937 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 17:17:46.822010 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 17:17:46.831773 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 17:17:46.841813 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 17:17:46.851538 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 17:17:46.858485 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 17:17:46.868191 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 17:17:46.878132 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 17:17:46.887968 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 17:17:46.897889 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 17:17:46.897979 PCI: 00:02.0
1355 17:17:46.911220 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 17:17:46.921357 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 17:17:46.931167 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 17:17:46.931272 PCI: 00:04.0
1359 17:17:46.934512 PCI: 00:08.0
1360 17:17:46.944451 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 17:17:46.944535 PCI: 00:12.0
1362 17:17:46.954261 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 17:17:46.960636 PCI: 00:14.0 child on link 0 USB0 port 0
1364 17:17:46.970602 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 17:17:46.973798 USB0 port 0 child on link 0 USB2 port 0
1366 17:17:46.977005 USB2 port 0
1367 17:17:46.977089 USB2 port 1
1368 17:17:46.980638 USB2 port 2
1369 17:17:46.980716 USB2 port 3
1370 17:17:47.110252 USB2 port 5
1371 17:17:47.110499 USB2 port 6
1372 17:17:47.110723 USB2 port 9
1373 17:17:47.110822 USB3 port 0
1374 17:17:47.110938 USB3 port 1
1375 17:17:47.111038 USB3 port 2
1376 17:17:47.111159 USB3 port 3
1377 17:17:47.111256 USB3 port 4
1378 17:17:47.111388 PCI: 00:14.2
1379 17:17:47.111509 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 17:17:47.111618 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 17:17:47.111715 PCI: 00:14.3
1382 17:17:47.111812 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 17:17:47.111920 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 17:17:47.112018 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 17:17:47.112123 I2C: 01:15
1386 17:17:47.112234 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 17:17:47.112351 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 17:17:47.112452 I2C: 02:5d
1389 17:17:47.112561 GENERIC: 0.0
1390 17:17:47.112669 PCI: 00:16.0
1391 17:17:47.112774 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 17:17:47.112880 PCI: 00:17.0
1393 17:17:47.112980 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 17:17:47.113099 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 17:17:47.113197 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 17:17:47.116379 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 17:17:47.126542 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 17:17:47.135832 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 17:17:47.139581 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 17:17:47.149474 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 17:17:47.152638 I2C: 03:1a
1402 17:17:47.152786 I2C: 03:38
1403 17:17:47.156003 I2C: 03:39
1404 17:17:47.156152 I2C: 03:3a
1405 17:17:47.156277 I2C: 03:3b
1406 17:17:47.162638 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 17:17:47.172438 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 17:17:47.182343 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 17:17:47.192169 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 17:17:47.192601 PCI: 01:00.0
1411 17:17:47.205814 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 17:17:47.206241 PCI: 00:1e.0
1413 17:17:47.215376 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 17:17:47.228219 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 17:17:47.231798 PCI: 00:1e.2 child on link 0 SPI: 00
1416 17:17:47.241681 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 17:17:47.242155 SPI: 00
1418 17:17:47.245276 PCI: 00:1e.3 child on link 0 SPI: 01
1419 17:17:47.258148 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 17:17:47.258433 SPI: 01
1421 17:17:47.261319 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 17:17:47.271068 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 17:17:47.280751 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 17:17:47.280902 PNP: 0c09.0
1425 17:17:47.291257 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 17:17:47.291375 PCI: 00:1f.3
1427 17:17:47.301110 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 17:17:47.313804 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 17:17:47.313926 PCI: 00:1f.4
1430 17:17:47.324059 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 17:17:47.333731 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 17:17:47.333873 PCI: 00:1f.5
1433 17:17:47.347342 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 17:17:47.347490 Done allocating resources.
1435 17:17:47.353441 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 17:17:47.356636 Enabling resources...
1437 17:17:47.359942 PCI: 00:00.0 subsystem <- 8086/9b61
1438 17:17:47.363103 PCI: 00:00.0 cmd <- 06
1439 17:17:47.366444 PCI: 00:02.0 subsystem <- 8086/9b41
1440 17:17:47.369808 PCI: 00:02.0 cmd <- 03
1441 17:17:47.373091 PCI: 00:08.0 cmd <- 06
1442 17:17:47.376661 PCI: 00:12.0 subsystem <- 8086/02f9
1443 17:17:47.379887 PCI: 00:12.0 cmd <- 02
1444 17:17:47.383258 PCI: 00:14.0 subsystem <- 8086/02ed
1445 17:17:47.386542 PCI: 00:14.0 cmd <- 02
1446 17:17:47.386633 PCI: 00:14.2 cmd <- 02
1447 17:17:47.393025 PCI: 00:14.3 subsystem <- 8086/02f0
1448 17:17:47.393143 PCI: 00:14.3 cmd <- 02
1449 17:17:47.396261 PCI: 00:15.0 subsystem <- 8086/02e8
1450 17:17:47.399536 PCI: 00:15.0 cmd <- 02
1451 17:17:47.402825 PCI: 00:15.1 subsystem <- 8086/02e9
1452 17:17:47.406145 PCI: 00:15.1 cmd <- 02
1453 17:17:47.409426 PCI: 00:16.0 subsystem <- 8086/02e0
1454 17:17:47.412714 PCI: 00:16.0 cmd <- 02
1455 17:17:47.415955 PCI: 00:17.0 subsystem <- 8086/02d3
1456 17:17:47.419719 PCI: 00:17.0 cmd <- 03
1457 17:17:47.422758 PCI: 00:19.0 subsystem <- 8086/02c5
1458 17:17:47.426547 PCI: 00:19.0 cmd <- 02
1459 17:17:47.429543 PCI: 00:1d.0 bridge ctrl <- 0013
1460 17:17:47.432475 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 17:17:47.436296 PCI: 00:1d.0 cmd <- 06
1462 17:17:47.439606 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 17:17:47.439751 PCI: 00:1e.0 cmd <- 06
1464 17:17:47.446580 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 17:17:47.446736 PCI: 00:1e.2 cmd <- 06
1466 17:17:47.449624 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 17:17:47.452700 PCI: 00:1e.3 cmd <- 02
1468 17:17:47.455993 PCI: 00:1f.0 subsystem <- 8086/0284
1469 17:17:47.459629 PCI: 00:1f.0 cmd <- 407
1470 17:17:47.462575 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 17:17:47.466272 PCI: 00:1f.3 cmd <- 02
1472 17:17:47.469558 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 17:17:47.472787 PCI: 00:1f.4 cmd <- 03
1474 17:17:47.476121 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 17:17:47.479234 PCI: 00:1f.5 cmd <- 406
1476 17:17:47.487651 PCI: 01:00.0 cmd <- 02
1477 17:17:47.492842 done.
1478 17:17:47.505213 ME: Version: 14.0.39.1367
1479 17:17:47.511634 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1480 17:17:47.515066 Initializing devices...
1481 17:17:47.515153 Root Device init ...
1482 17:17:47.521561 Chrome EC: Set SMI mask to 0x0000000000000000
1483 17:17:47.524692 Chrome EC: clear events_b mask to 0x0000000000000000
1484 17:17:47.531439 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 17:17:47.538191 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 17:17:47.544489 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 17:17:47.548350 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 17:17:47.551551 Root Device init finished in 35172 usecs
1489 17:17:47.554721 CPU_CLUSTER: 0 init ...
1490 17:17:47.561172 CPU_CLUSTER: 0 init finished in 2449 usecs
1491 17:17:47.565723 PCI: 00:00.0 init ...
1492 17:17:47.568967 CPU TDP: 15 Watts
1493 17:17:47.572047 CPU PL2 = 64 Watts
1494 17:17:47.576018 PCI: 00:00.0 init finished in 7080 usecs
1495 17:17:47.579104 PCI: 00:02.0 init ...
1496 17:17:47.582393 PCI: 00:02.0 init finished in 2252 usecs
1497 17:17:47.585643 PCI: 00:08.0 init ...
1498 17:17:47.588903 PCI: 00:08.0 init finished in 2253 usecs
1499 17:17:47.592051 PCI: 00:12.0 init ...
1500 17:17:47.595333 PCI: 00:12.0 init finished in 2253 usecs
1501 17:17:47.598597 PCI: 00:14.0 init ...
1502 17:17:47.601894 PCI: 00:14.0 init finished in 2242 usecs
1503 17:17:47.605735 PCI: 00:14.2 init ...
1504 17:17:47.608929 PCI: 00:14.2 init finished in 2244 usecs
1505 17:17:47.612264 PCI: 00:14.3 init ...
1506 17:17:47.615693 PCI: 00:14.3 init finished in 2270 usecs
1507 17:17:47.619034 PCI: 00:15.0 init ...
1508 17:17:47.622272 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 17:17:47.625034 PCI: 00:15.0 init finished in 5974 usecs
1510 17:17:47.628279 PCI: 00:15.1 init ...
1511 17:17:47.631996 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 17:17:47.638576 PCI: 00:15.1 init finished in 5976 usecs
1513 17:17:47.638671 PCI: 00:16.0 init ...
1514 17:17:47.644731 PCI: 00:16.0 init finished in 2253 usecs
1515 17:17:47.644825 PCI: 00:19.0 init ...
1516 17:17:47.651967 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 17:17:47.654947 PCI: 00:19.0 init finished in 5976 usecs
1518 17:17:47.658059 PCI: 00:1d.0 init ...
1519 17:17:47.661881 Initializing PCH PCIe bridge.
1520 17:17:47.664999 PCI: 00:1d.0 init finished in 5285 usecs
1521 17:17:47.668197 PCI: 00:1f.0 init ...
1522 17:17:47.671482 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 17:17:47.677856 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 17:17:47.677979 IOAPIC: ID = 0x02
1525 17:17:47.681611 IOAPIC: Dumping registers
1526 17:17:47.684964 reg 0x0000: 0x02000000
1527 17:17:47.688165 reg 0x0001: 0x00770020
1528 17:17:47.688265 reg 0x0002: 0x00000000
1529 17:17:47.694602 PCI: 00:1f.0 init finished in 23552 usecs
1530 17:17:47.697926 PCI: 00:1f.4 init ...
1531 17:17:47.701235 PCI: 00:1f.4 init finished in 2262 usecs
1532 17:17:47.712001 PCI: 01:00.0 init ...
1533 17:17:47.715186 PCI: 01:00.0 init finished in 2253 usecs
1534 17:17:47.719140 PNP: 0c09.0 init ...
1535 17:17:47.729376 Google Chrome EC uptime: 11.070 seconds
1536 17:17:47.729470 Google Chrome AP resets since EC boot: 0
1537 17:17:47.732236 Google Chrome most recent AP reset causes:
1538 17:17:47.739334 Google Chrome EC reset flags at last EC boot: reset-pin
1539 17:17:47.742496 PNP: 0c09.0 init finished in 20574 usecs
1540 17:17:47.745761 Devices initialized
1541 17:17:47.748774 Show all devs... After init.
1542 17:17:47.748896 Root Device: enabled 1
1543 17:17:47.752566 CPU_CLUSTER: 0: enabled 1
1544 17:17:47.755740 DOMAIN: 0000: enabled 1
1545 17:17:47.755826 APIC: 00: enabled 1
1546 17:17:47.758836 PCI: 00:00.0: enabled 1
1547 17:17:47.762500 PCI: 00:02.0: enabled 1
1548 17:17:47.765665 PCI: 00:04.0: enabled 0
1549 17:17:47.765746 PCI: 00:05.0: enabled 0
1550 17:17:47.768682 PCI: 00:12.0: enabled 1
1551 17:17:47.772297 PCI: 00:12.5: enabled 0
1552 17:17:47.775305 PCI: 00:12.6: enabled 0
1553 17:17:47.775399 PCI: 00:14.0: enabled 1
1554 17:17:47.778433 PCI: 00:14.1: enabled 0
1555 17:17:47.781576 PCI: 00:14.3: enabled 1
1556 17:17:47.785226 PCI: 00:14.5: enabled 0
1557 17:17:47.785312 PCI: 00:15.0: enabled 1
1558 17:17:47.788425 PCI: 00:15.1: enabled 1
1559 17:17:47.791653 PCI: 00:15.2: enabled 0
1560 17:17:47.791739 PCI: 00:15.3: enabled 0
1561 17:17:47.795485 PCI: 00:16.0: enabled 1
1562 17:17:47.798652 PCI: 00:16.1: enabled 0
1563 17:17:47.801866 PCI: 00:16.2: enabled 0
1564 17:17:47.801952 PCI: 00:16.3: enabled 0
1565 17:17:47.805093 PCI: 00:16.4: enabled 0
1566 17:17:47.808317 PCI: 00:16.5: enabled 0
1567 17:17:47.811614 PCI: 00:17.0: enabled 1
1568 17:17:47.811720 PCI: 00:19.0: enabled 1
1569 17:17:47.814882 PCI: 00:19.1: enabled 0
1570 17:17:47.818112 PCI: 00:19.2: enabled 0
1571 17:17:47.821342 PCI: 00:1a.0: enabled 0
1572 17:17:47.821444 PCI: 00:1c.0: enabled 0
1573 17:17:47.824663 PCI: 00:1c.1: enabled 0
1574 17:17:47.827919 PCI: 00:1c.2: enabled 0
1575 17:17:47.831817 PCI: 00:1c.3: enabled 0
1576 17:17:47.831922 PCI: 00:1c.4: enabled 0
1577 17:17:47.834489 PCI: 00:1c.5: enabled 0
1578 17:17:47.837874 PCI: 00:1c.6: enabled 0
1579 17:17:47.837996 PCI: 00:1c.7: enabled 0
1580 17:17:47.841759 PCI: 00:1d.0: enabled 1
1581 17:17:47.844926 PCI: 00:1d.1: enabled 0
1582 17:17:47.848188 PCI: 00:1d.2: enabled 0
1583 17:17:47.848292 PCI: 00:1d.3: enabled 0
1584 17:17:47.851359 PCI: 00:1d.4: enabled 0
1585 17:17:47.854491 PCI: 00:1d.5: enabled 0
1586 17:17:47.858312 PCI: 00:1e.0: enabled 1
1587 17:17:47.858418 PCI: 00:1e.1: enabled 0
1588 17:17:47.861248 PCI: 00:1e.2: enabled 1
1589 17:17:48.103307 PCI: 00:1e.3: enabled 1
1590 17:17:48.103742 PCI: 00:1f.0: enabled 1
1591 17:17:48.103858 PCI: 00:1f.1: enabled 0
1592 17:17:48.103926 PCI: 00:1f.2: enabled 0
1593 17:17:48.103996 PCI: 00:1f.3: enabled 1
1594 17:17:48.104070 PCI: 00:1f.4: enabled 1
1595 17:17:48.104160 PCI: 00:1f.5: enabled 1
1596 17:17:48.104250 PCI: 00:1f.6: enabled 0
1597 17:17:48.104336 USB0 port 0: enabled 1
1598 17:17:48.104424 I2C: 01:15: enabled 1
1599 17:17:48.104509 I2C: 02:5d: enabled 1
1600 17:17:48.104601 GENERIC: 0.0: enabled 1
1601 17:17:48.104689 I2C: 03:1a: enabled 1
1602 17:17:48.104774 I2C: 03:38: enabled 1
1603 17:17:48.104872 I2C: 03:39: enabled 1
1604 17:17:48.104962 I2C: 03:3a: enabled 1
1605 17:17:48.105047 I2C: 03:3b: enabled 1
1606 17:17:48.105162 PCI: 00:00.0: enabled 1
1607 17:17:48.105275 SPI: 00: enabled 1
1608 17:17:48.105390 SPI: 01: enabled 1
1609 17:17:48.105501 PNP: 0c09.0: enabled 1
1610 17:17:48.105586 USB2 port 0: enabled 1
1611 17:17:48.105675 USB2 port 1: enabled 1
1612 17:17:48.105760 USB2 port 2: enabled 0
1613 17:17:48.105837 USB2 port 3: enabled 0
1614 17:17:48.105894 USB2 port 5: enabled 0
1615 17:17:48.105965 USB2 port 6: enabled 1
1616 17:17:48.106055 USB2 port 9: enabled 1
1617 17:17:48.106147 USB3 port 0: enabled 1
1618 17:17:48.106243 USB3 port 1: enabled 1
1619 17:17:48.106330 USB3 port 2: enabled 1
1620 17:17:48.106414 USB3 port 3: enabled 1
1621 17:17:48.106497 USB3 port 4: enabled 0
1622 17:17:48.106582 APIC: 03: enabled 1
1623 17:17:48.106667 APIC: 06: enabled 1
1624 17:17:48.106767 APIC: 01: enabled 1
1625 17:17:48.106852 APIC: 02: enabled 1
1626 17:17:48.106946 APIC: 05: enabled 1
1627 17:17:48.107037 APIC: 04: enabled 1
1628 17:17:48.107121 APIC: 07: enabled 1
1629 17:17:48.107205 PCI: 00:08.0: enabled 1
1630 17:17:48.107291 PCI: 00:14.2: enabled 1
1631 17:17:48.107374 PCI: 01:00.0: enabled 1
1632 17:17:48.107459 Disabling ACPI via APMC:
1633 17:17:48.107543 done.
1634 17:17:48.107627 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 17:17:48.107705 ELOG: NV offset 0xaf0000 size 0x4000
1636 17:17:48.107766 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 17:17:48.107832 ELOG: Event(17) added with size 13 at 2023-06-09 17:17:32 UTC
1638 17:17:48.107926 POST: Unexpected post code in previous boot: 0x73
1639 17:17:48.108016 ELOG: Event(A3) added with size 11 at 2023-06-09 17:17:32 UTC
1640 17:17:48.108105 ELOG: Event(A6) added with size 13 at 2023-06-09 17:17:32 UTC
1641 17:17:48.108197 ELOG: Event(92) added with size 9 at 2023-06-09 17:17:32 UTC
1642 17:17:48.108288 ELOG: Event(93) added with size 9 at 2023-06-09 17:17:32 UTC
1643 17:17:48.108377 ELOG: Event(9A) added with size 9 at 2023-06-09 17:17:32 UTC
1644 17:17:48.108466 ELOG: Event(9E) added with size 10 at 2023-06-09 17:17:32 UTC
1645 17:17:48.108556 ELOG: Event(9F) added with size 14 at 2023-06-09 17:17:32 UTC
1646 17:17:48.108649 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1647 17:17:48.108751 ELOG: Event(A1) added with size 10 at 2023-06-09 17:17:32 UTC
1648 17:17:48.108847 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1649 17:17:48.108941 ELOG: Event(A0) added with size 9 at 2023-06-09 17:17:32 UTC
1650 17:17:48.109031 elog_add_boot_reason: Logged dev mode boot
1651 17:17:48.109122 Finalize devices...
1652 17:17:48.109210 PCI: 00:17.0 final
1653 17:17:48.109303 Devices finalized
1654 17:17:48.109395 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1655 17:17:48.109485 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1656 17:17:48.109577 ME: HFSTS1 : 0x90000245
1657 17:17:48.109668 ME: HFSTS2 : 0x3B850126
1658 17:17:48.109760 ME: HFSTS3 : 0x00000020
1659 17:17:48.109852 ME: HFSTS4 : 0x00004800
1660 17:17:48.109960 ME: HFSTS5 : 0x00000000
1661 17:17:48.110055 ME: HFSTS6 : 0x40400006
1662 17:17:48.112991 ME: Manufacturing Mode : NO
1663 17:17:48.116663 ME: FW Partition Table : OK
1664 17:17:48.119605 ME: Bringup Loader Failure : NO
1665 17:17:48.122869 ME: Firmware Init Complete : YES
1666 17:17:48.126193 ME: Boot Options Present : NO
1667 17:17:48.129519 ME: Update In Progress : NO
1668 17:17:48.132603 ME: D0i3 Support : YES
1669 17:17:48.135980 ME: Low Power State Enabled : NO
1670 17:17:48.139256 ME: CPU Replaced : NO
1671 17:17:48.142643 ME: CPU Replacement Valid : YES
1672 17:17:48.145891 ME: Current Working State : 5
1673 17:17:48.149191 ME: Current Operation State : 1
1674 17:17:48.152395 ME: Current Operation Mode : 0
1675 17:17:48.155619 ME: Error Code : 0
1676 17:17:48.159379 ME: CPU Debug Disabled : YES
1677 17:17:48.162627 ME: TXT Support : NO
1678 17:17:48.169108 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1679 17:17:48.172409 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1680 17:17:48.175636 CBFS @ c08000 size 3f8000
1681 17:17:48.182526 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1682 17:17:48.185729 CBFS: Locating 'fallback/dsdt.aml'
1683 17:17:48.188780 CBFS: Found @ offset 10bb80 size 3fa5
1684 17:17:48.195703 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1685 17:17:48.195813 CBFS @ c08000 size 3f8000
1686 17:17:48.202478 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1687 17:17:48.205534 CBFS: Locating 'fallback/slic'
1688 17:17:48.209229 CBFS: 'fallback/slic' not found.
1689 17:17:48.216027 ACPI: Writing ACPI tables at 99b3e000.
1690 17:17:48.216161 ACPI: * FACS
1691 17:17:48.219110 ACPI: * DSDT
1692 17:17:48.333320 Ramoops buffer: 0x100000@0x99a3d000.
1693 17:17:48.333661 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1694 17:17:48.333793 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1695 17:17:48.333893 Google Chrome EC: version:
1696 17:17:48.333988 ro: helios_v2.0.2659-56403530b
1697 17:17:48.334079 rw: helios_v2.0.2849-c41de27e7d
1698 17:17:48.334168 running image: 1
1699 17:17:48.334262 ACPI: * FADT
1700 17:17:48.334351 SCI is IRQ9
1701 17:17:48.334437 ACPI: added table 1/32, length now 40
1702 17:17:48.334497 ACPI: * SSDT
1703 17:17:48.334555 Found 1 CPU(s) with 8 core(s) each.
1704 17:17:48.334619 Error: Could not locate 'wifi_sar' in VPD.
1705 17:17:48.334681 Checking CBFS for default SAR values
1706 17:17:48.334740 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 17:17:48.334797 CBFS @ c08000 size 3f8000
1708 17:17:48.334858 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 17:17:48.334918 CBFS: Locating 'wifi_sar_defaults.hex'
1710 17:17:48.335000 CBFS: Found @ offset 5fac0 size 77
1711 17:17:48.335063 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1712 17:17:48.335161 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1713 17:17:48.335225 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1714 17:17:48.335283 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1715 17:17:48.335341 failed to find key in VPD: dsm_calib_r0_0
1716 17:17:48.335402 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1717 17:17:48.335466 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1718 17:17:48.335523 failed to find key in VPD: dsm_calib_r0_1
1719 17:17:48.336056 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1720 17:17:48.342669 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1721 17:17:48.346008 failed to find key in VPD: dsm_calib_r0_2
1722 17:17:48.356067 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1723 17:17:48.359284 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1724 17:17:48.365869 failed to find key in VPD: dsm_calib_r0_3
1725 17:17:48.372395 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1726 17:17:48.378836 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1727 17:17:48.382243 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1728 17:17:48.388881 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1729 17:17:48.392184 EC returned error result code 1
1730 17:17:48.396128 EC returned error result code 1
1731 17:17:48.399206 EC returned error result code 1
1732 17:17:48.402409 PS2K: Bad resp from EC. Vivaldi disabled!
1733 17:17:48.409254 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1734 17:17:48.416118 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1735 17:17:48.418976 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1736 17:17:48.425809 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1737 17:17:48.429044 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1738 17:17:48.435467 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1739 17:17:48.442329 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1740 17:17:48.449168 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1741 17:17:48.452470 ACPI: added table 2/32, length now 44
1742 17:17:48.452560 ACPI: * MCFG
1743 17:17:48.459179 ACPI: added table 3/32, length now 48
1744 17:17:48.459290 ACPI: * TPM2
1745 17:17:48.461880 TPM2 log created at 99a2d000
1746 17:17:48.465203 ACPI: added table 4/32, length now 52
1747 17:17:48.468462 ACPI: * MADT
1748 17:17:48.468566 SCI is IRQ9
1749 17:17:48.472205 ACPI: added table 5/32, length now 56
1750 17:17:48.475538 current = 99b43ac0
1751 17:17:48.475623 ACPI: * DMAR
1752 17:17:48.478724 ACPI: added table 6/32, length now 60
1753 17:17:48.482040 ACPI: * IGD OpRegion
1754 17:17:48.485374 GMA: Found VBT in CBFS
1755 17:17:48.488645 GMA: Found valid VBT in CBFS
1756 17:17:48.491987 ACPI: added table 7/32, length now 64
1757 17:17:48.492072 ACPI: * HPET
1758 17:17:48.495184 ACPI: added table 8/32, length now 68
1759 17:17:48.498490 ACPI: done.
1760 17:17:48.501745 ACPI tables: 31744 bytes.
1761 17:17:48.505080 smbios_write_tables: 99a2c000
1762 17:17:48.508171 EC returned error result code 3
1763 17:17:48.511812 Couldn't obtain OEM name from CBI
1764 17:17:48.514944 Create SMBIOS type 17
1765 17:17:48.518547 PCI: 00:00.0 (Intel Cannonlake)
1766 17:17:48.518633 PCI: 00:14.3 (Intel WiFi)
1767 17:17:48.521614 SMBIOS tables: 939 bytes.
1768 17:17:48.524785 Writing table forward entry at 0x00000500
1769 17:17:48.531737 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1770 17:17:48.534755 Writing coreboot table at 0x99b62000
1771 17:17:48.541514 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1772 17:17:48.544720 1. 0000000000001000-000000000009ffff: RAM
1773 17:17:48.551765 2. 00000000000a0000-00000000000fffff: RESERVED
1774 17:17:48.554844 3. 0000000000100000-0000000099a2bfff: RAM
1775 17:17:48.561181 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1776 17:17:48.564438 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1777 17:17:48.571535 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1778 17:17:48.577883 7. 000000009a000000-000000009f7fffff: RESERVED
1779 17:17:48.581218 8. 00000000e0000000-00000000efffffff: RESERVED
1780 17:17:48.587659 9. 00000000fc000000-00000000fc000fff: RESERVED
1781 17:17:48.590954 10. 00000000fe000000-00000000fe00ffff: RESERVED
1782 17:17:48.594169 11. 00000000fed10000-00000000fed17fff: RESERVED
1783 17:17:48.600863 12. 00000000fed80000-00000000fed83fff: RESERVED
1784 17:17:48.604657 13. 00000000fed90000-00000000fed91fff: RESERVED
1785 17:17:48.611248 14. 00000000feda0000-00000000feda1fff: RESERVED
1786 17:17:48.614659 15. 0000000100000000-000000045e7fffff: RAM
1787 17:17:48.617798 Graphics framebuffer located at 0xc0000000
1788 17:17:48.620894 Passing 5 GPIOs to payload:
1789 17:17:48.627852 NAME | PORT | POLARITY | VALUE
1790 17:17:48.630957 write protect | undefined | high | low
1791 17:17:48.637691 lid | undefined | high | high
1792 17:17:48.643864 power | undefined | high | low
1793 17:17:48.647570 oprom | undefined | high | low
1794 17:17:48.654463 EC in RW | 0x000000cb | high | low
1795 17:17:48.654695 Board ID: 4
1796 17:17:48.660918 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1797 17:17:48.661186 CBFS @ c08000 size 3f8000
1798 17:17:48.667219 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1799 17:17:48.674476 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1800 17:17:48.677613 coreboot table: 1492 bytes.
1801 17:17:48.680771 IMD ROOT 0. 99fff000 00001000
1802 17:17:48.685854 IMD SMALL 1. 99ffe000 00001000
1803 17:17:48.687286 FSP MEMORY 2. 99c4e000 003b0000
1804 17:17:48.690650 CONSOLE 3. 99c2e000 00020000
1805 17:17:48.694543 FMAP 4. 99c2d000 0000054e
1806 17:17:48.697838 TIME STAMP 5. 99c2c000 00000910
1807 17:17:48.701087 VBOOT WORK 6. 99c18000 00014000
1808 17:17:48.704240 MRC DATA 7. 99c16000 00001958
1809 17:17:48.707463 ROMSTG STCK 8. 99c15000 00001000
1810 17:17:48.710850 AFTER CAR 9. 99c0b000 0000a000
1811 17:17:48.714174 RAMSTAGE 10. 99baf000 0005c000
1812 17:17:48.717464 REFCODE 11. 99b7a000 00035000
1813 17:17:48.720735 SMM BACKUP 12. 99b6a000 00010000
1814 17:17:48.724390 COREBOOT 13. 99b62000 00008000
1815 17:17:48.727642 ACPI 14. 99b3e000 00024000
1816 17:17:48.730847 ACPI GNVS 15. 99b3d000 00001000
1817 17:17:48.733975 RAMOOPS 16. 99a3d000 00100000
1818 17:17:48.737065 TPM2 TCGLOG17. 99a2d000 00010000
1819 17:17:48.740699 SMBIOS 18. 99a2c000 00000800
1820 17:17:48.740959 IMD small region:
1821 17:17:48.743840 IMD ROOT 0. 99ffec00 00000400
1822 17:17:48.750653 FSP RUNTIME 1. 99ffebe0 00000004
1823 17:17:48.753952 EC HOSTEVENT 2. 99ffebc0 00000008
1824 17:17:48.757084 POWER STATE 3. 99ffeb80 00000040
1825 17:17:48.760303 ROMSTAGE 4. 99ffeb60 00000004
1826 17:17:48.764116 MEM INFO 5. 99ffe9a0 000001b9
1827 17:17:48.767203 VPD 6. 99ffe920 0000006c
1828 17:17:48.770388 MTRR: Physical address space:
1829 17:17:48.776813 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1830 17:17:48.783989 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1831 17:17:48.787179 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1832 17:17:48.793813 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1833 17:17:48.800351 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1834 17:17:48.806846 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1835 17:17:48.813280 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1836 17:17:48.816505 MTRR: Fixed MSR 0x250 0x0606060606060606
1837 17:17:48.820309 MTRR: Fixed MSR 0x258 0x0606060606060606
1838 17:17:48.826851 MTRR: Fixed MSR 0x259 0x0000000000000000
1839 17:17:48.830072 MTRR: Fixed MSR 0x268 0x0606060606060606
1840 17:17:48.833289 MTRR: Fixed MSR 0x269 0x0606060606060606
1841 17:17:48.836491 MTRR: Fixed MSR 0x26a 0x0606060606060606
1842 17:17:48.843287 MTRR: Fixed MSR 0x26b 0x0606060606060606
1843 17:17:48.846327 MTRR: Fixed MSR 0x26c 0x0606060606060606
1844 17:17:48.849473 MTRR: Fixed MSR 0x26d 0x0606060606060606
1845 17:17:48.853237 MTRR: Fixed MSR 0x26e 0x0606060606060606
1846 17:17:48.859891 MTRR: Fixed MSR 0x26f 0x0606060606060606
1847 17:17:48.863161 call enable_fixed_mtrr()
1848 17:17:48.866414 CPU physical address size: 39 bits
1849 17:17:48.869518 MTRR: default type WB/UC MTRR counts: 6/8.
1850 17:17:48.873239 MTRR: WB selected as default type.
1851 17:17:48.879485 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1852 17:17:48.886004 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1853 17:17:48.892844 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1854 17:17:48.899432 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1855 17:17:48.902642 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1856 17:17:48.909207 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1857 17:17:48.916200 MTRR: Fixed MSR 0x250 0x0606060606060606
1858 17:17:48.919463 MTRR: Fixed MSR 0x258 0x0606060606060606
1859 17:17:48.922865 MTRR: Fixed MSR 0x259 0x0000000000000000
1860 17:17:48.926112 MTRR: Fixed MSR 0x268 0x0606060606060606
1861 17:17:48.932446 MTRR: Fixed MSR 0x269 0x0606060606060606
1862 17:17:48.935747 MTRR: Fixed MSR 0x26a 0x0606060606060606
1863 17:17:48.939034 MTRR: Fixed MSR 0x26b 0x0606060606060606
1864 17:17:48.942410 MTRR: Fixed MSR 0x26c 0x0606060606060606
1865 17:17:48.949200 MTRR: Fixed MSR 0x26d 0x0606060606060606
1866 17:17:48.952341 MTRR: Fixed MSR 0x26e 0x0606060606060606
1867 17:17:48.956076 MTRR: Fixed MSR 0x26f 0x0606060606060606
1868 17:17:48.956155
1869 17:17:48.959098 MTRR check
1870 17:17:48.959180 call enable_fixed_mtrr()
1871 17:17:48.962508 Fixed MTRRs : Enabled
1872 17:17:48.966139 Variable MTRRs: Enabled
1873 17:17:48.966242
1874 17:17:48.969253 CPU physical address size: 39 bits
1875 17:17:49.124236 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1876 17:17:49.124507 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 17:17:49.124613 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 17:17:49.124718 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 17:17:49.124844 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 17:17:49.124964 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 17:17:49.125080 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 17:17:49.125202 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 17:17:49.125299 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 17:17:49.125386 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 17:17:49.125479 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 17:17:49.125566 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 17:17:49.125653 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 17:17:49.125752 MTRR: Fixed MSR 0x250 0x0606060606060606
1889 17:17:49.125835 MTRR: Fixed MSR 0x258 0x0606060606060606
1890 17:17:49.125920 MTRR: Fixed MSR 0x259 0x0000000000000000
1891 17:17:49.126003 MTRR: Fixed MSR 0x268 0x0606060606060606
1892 17:17:49.126086 MTRR: Fixed MSR 0x269 0x0606060606060606
1893 17:17:49.126171 MTRR: Fixed MSR 0x26a 0x0606060606060606
1894 17:17:49.126254 MTRR: Fixed MSR 0x26b 0x0606060606060606
1895 17:17:49.126337 MTRR: Fixed MSR 0x26c 0x0606060606060606
1896 17:17:49.126421 MTRR: Fixed MSR 0x26d 0x0606060606060606
1897 17:17:49.126503 MTRR: Fixed MSR 0x26e 0x0606060606060606
1898 17:17:49.126587 MTRR: Fixed MSR 0x26f 0x0606060606060606
1899 17:17:49.126670 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 17:17:49.126752 call enable_fixed_mtrr()
1901 17:17:49.126836 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 17:17:49.126918 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 17:17:49.127016 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 17:17:49.127122 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 17:17:49.127228 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 17:17:49.127323 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 17:17:49.127417 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 17:17:49.127504 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 17:17:49.127590 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 17:17:49.127678 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 17:17:49.127771 CPU physical address size: 39 bits
1912 17:17:49.128057 call enable_fixed_mtrr()
1913 17:17:49.128152 MTRR: Fixed MSR 0x250 0x0606060606060606
1914 17:17:49.131114 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 17:17:49.134458 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 17:17:49.140934 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 17:17:49.144231 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 17:17:49.147370 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 17:17:49.150826 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 17:17:49.157320 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 17:17:49.160526 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 17:17:49.164297 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 17:17:49.167501 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 17:17:49.174356 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 17:17:49.177461 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 17:17:49.180528 call enable_fixed_mtrr()
1927 17:17:49.183777 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 17:17:49.186915 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 17:17:49.190793 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 17:17:49.196908 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 17:17:49.200592 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 17:17:49.203682 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 17:17:49.206803 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 17:17:49.213415 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 17:17:49.216674 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 17:17:49.219928 CPU physical address size: 39 bits
1937 17:17:49.223233 call enable_fixed_mtrr()
1938 17:17:49.226490 call enable_fixed_mtrr()
1939 17:17:49.229703 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 17:17:49.233099 CPU physical address size: 39 bits
1941 17:17:49.236259 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 17:17:49.240186 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 17:17:49.246678 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 17:17:49.249947 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 17:17:49.253167 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 17:17:49.256513 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 17:17:49.262980 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 17:17:49.266252 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 17:17:49.269526 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 17:17:49.273277 CPU physical address size: 39 bits
1951 17:17:49.276416 call enable_fixed_mtrr()
1952 17:17:49.279613 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1953 17:17:49.286380 CPU physical address size: 39 bits
1954 17:17:49.289440 CPU physical address size: 39 bits
1955 17:17:49.289523 CBFS @ c08000 size 3f8000
1956 17:17:49.296401 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1957 17:17:49.299673 CBFS: Locating 'fallback/payload'
1958 17:17:49.305874 CBFS: Found @ offset 1c96c0 size 3f798
1959 17:17:49.309538 Checking segment from ROM address 0xffdd16f8
1960 17:17:49.312532 Checking segment from ROM address 0xffdd1714
1961 17:17:49.319620 Loading segment from ROM address 0xffdd16f8
1962 17:17:49.319704 code (compression=0)
1963 17:17:49.329412 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1964 17:17:49.339146 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1965 17:17:49.339234 it's not compressed!
1966 17:17:49.432270 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1967 17:17:49.438836 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1968 17:17:49.442096 Loading segment from ROM address 0xffdd1714
1969 17:17:49.445511 Entry Point 0x30000000
1970 17:17:49.448684 Loaded segments
1971 17:17:51.120482 Finalizing chipset.
1972 17:17:51.121691 Finalizing SMM.
1973 17:17:51.122323 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1974 17:17:51.122908 mp_park_aps done after 0 msecs.
1975 17:17:51.123486 Jumping to boot code at 30000000(99b62000)
1976 17:17:51.124056 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1977 17:17:51.124627
1978 17:17:51.125216
1979 17:17:51.125768
1980 17:17:51.126317 Starting depthcharge on Helios...
1981 17:17:51.126861
1982 17:17:51.127411 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1983 17:17:51.127959
1984 17:17:51.128517 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1985 17:17:51.129101
1986 17:17:51.129646 board_setup: Info: eMMC controller not present; skipping
1987 17:17:51.130196
1988 17:17:51.130745 New NVMe Controller 0x30053ac0 @ 00:1d:00
1989 17:17:51.131303
1990 17:17:51.131858 board_setup: Info: SDHCI controller not present; skipping
1991 17:17:51.132408
1992 17:17:51.132997 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1993 17:17:51.133587
1994 17:17:51.134139 Wipe memory regions:
1995 17:17:51.134683
1996 17:17:51.135230 [0x00000000001000, 0x000000000a0000)
1997 17:17:51.135777
1998 17:17:51.136320 [0x00000000100000, 0x00000030000000)
1999 17:17:51.136889
2000 17:17:51.137450 [0x00000030657430, 0x00000099a2c000)
2001 17:17:51.137998
2002 17:17:51.138560 [0x00000100000000, 0x0000045e800000)
2003 17:17:51.139125
2004 17:17:51.139689 R8152: Initializing
2005 17:17:51.140225
2006 17:17:51.141793 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2007 17:17:51.142733 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2008 17:17:51.143448 Setting prompt string to ['hatch:']
2009 17:17:51.144124 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2010 17:17:51.145287 Version 9 (ocp_data = 6010)
2011 17:17:51.145916
2012 17:17:51.146501 R8152: Done initializing
2013 17:17:51.147108
2014 17:17:51.147577 Adding net device
2015 17:17:53.166107
2016 17:17:53.167712 R8152: Initializing
2017 17:17:53.168326
2018 17:17:53.169179 Version 6 (ocp_data = 5c30)
2019 17:17:53.169977
2020 17:17:53.170363 R8152: Done initializing
2021 17:17:53.170468
2022 17:17:53.170569 net_add_device: Attemp to include the same device
2023 17:17:53.170675
2024 17:17:53.170798 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2025 17:17:53.170935
2026 17:17:53.171064
2027 17:17:53.171158
2028 17:17:53.171498 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2030 17:17:53.271985 hatch: tftpboot 192.168.201.1 10664094/tftp-deploy-hnp6c3_z/kernel/bzImage 10664094/tftp-deploy-hnp6c3_z/kernel/cmdline 10664094/tftp-deploy-hnp6c3_z/ramdisk/ramdisk.cpio.gz
2031 17:17:53.272254 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2032 17:17:53.272435 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2033 17:17:53.276241 tftpboot 192.168.201.1 10664094/tftp-deploy-hnp6c3_z/kernel/bzIploy-hnp6c3_z/kernel/cmdline 10664094/tftp-deploy-hnp6c3_z/ramdisk/ramdisk.cpio.gz
2034 17:17:53.276450
2035 17:17:53.276624 Waiting for link
2036 17:17:54.175069
2037 17:17:54.175999 done.
2038 17:17:54.176744
2039 17:17:54.177539 MAC: 00:24:32:50:19:be
2040 17:17:54.178125
2041 17:17:54.178853 Sending DHCP discover... done.
2042 17:17:54.179488
2043 17:17:54.179585 Waiting for reply... done.
2044 17:17:54.179674
2045 17:17:54.179782 Sending DHCP request... done.
2046 17:17:54.179945
2047 17:17:54.439526 Waiting for reply... done.
2048 17:17:54.440180
2049 17:17:54.440637 My ip is 192.168.201.15
2050 17:17:54.441150
2051 17:17:54.441613 The DHCP server ip is 192.168.201.1
2052 17:17:54.442171
2053 17:17:54.442715 TFTP server IP predefined by user: 192.168.201.1
2054 17:17:54.443381
2055 17:17:54.444334 Bootfile predefined by user: 10664094/tftp-deploy-hnp6c3_z/kernel/bzImage
2056 17:17:54.445004
2057 17:17:54.445729 Sending tftp read request... done.
2058 17:17:54.446446
2059 17:17:54.447010 Waiting for the transfer...
2060 17:17:54.447605
2061 17:17:54.920524 00000000 ################################################################
2062 17:17:54.920667
2063 17:17:55.891035 00080000 ################################################################
2064 17:17:55.891823
2065 17:17:56.061868 00100000 ################################################################
2066 17:17:56.062017
2067 17:17:56.588097 00180000 ################################################################
2068 17:17:56.588268
2069 17:17:57.111036 00200000 ################################################################
2070 17:17:57.111208
2071 17:17:57.628766 00280000 ################################################################
2072 17:17:57.628937
2073 17:17:58.159003 00300000 ################################################################
2074 17:17:58.159150
2075 17:17:58.680589 00380000 ################################################################
2076 17:17:58.680781
2077 17:17:59.195823 00400000 ################################################################
2078 17:17:59.195990
2079 17:17:59.711774 00480000 ################################################################
2080 17:17:59.711956
2081 17:18:00.226247 00500000 ################################################################
2082 17:18:00.226399
2083 17:18:00.742544 00580000 ################################################################
2084 17:18:00.742740
2085 17:18:01.258604 00600000 ################################################################
2086 17:18:01.258797
2087 17:18:01.775188 00680000 ################################################################
2088 17:18:01.775383
2089 17:18:02.299997 00700000 ################################################################
2090 17:18:02.300205
2091 17:18:02.824451 00780000 ################################################################
2092 17:18:02.824639
2093 17:18:03.824959 00800000 ################################################################
2094 17:18:03.825122
2095 17:18:03.868057 00880000 ################################################################
2096 17:18:03.868227
2097 17:18:04.388708 00900000 ################################################################
2098 17:18:04.388883
2099 17:18:04.910659 00980000 ################################################################
2100 17:18:04.910817
2101 17:18:05.292635 00a00000 ############################################### done.
2102 17:18:05.292843
2103 17:18:05.295962 The bootfile was 10866688 bytes long.
2104 17:18:05.296057
2105 17:18:05.299676 Sending tftp read request... done.
2106 17:18:05.299767
2107 17:18:05.302814 Waiting for the transfer...
2108 17:18:05.302930
2109 17:18:05.822731 00000000 ################################################################
2110 17:18:05.822873
2111 17:18:06.345377 00080000 ################################################################
2112 17:18:06.345549
2113 17:18:06.868239 00100000 ################################################################
2114 17:18:06.868386
2115 17:18:07.393737 00180000 ################################################################
2116 17:18:07.393915
2117 17:18:07.912504 00200000 ################################################################
2118 17:18:07.912663
2119 17:18:08.441531 00280000 ################################################################
2120 17:18:08.441728
2121 17:18:08.960870 00300000 ################################################################
2122 17:18:08.961027
2123 17:18:09.484692 00380000 ################################################################
2124 17:18:09.484877
2125 17:18:10.030155 00400000 ################################################################
2126 17:18:10.030331
2127 17:18:10.596364 00480000 ################################################################
2128 17:18:10.596549
2129 17:18:11.166290 00500000 ################################################################
2130 17:18:11.166476
2131 17:18:11.718688 00580000 ################################################################
2132 17:18:11.718887
2133 17:18:12.241830 00600000 ################################################################
2134 17:18:12.241969
2135 17:18:12.764237 00680000 ################################################################
2136 17:18:12.764428
2137 17:18:13.282713 00700000 ################################################################
2138 17:18:13.282892
2139 17:18:13.805065 00780000 ################################################################
2140 17:18:13.805228
2141 17:18:14.337161 00800000 ################################################################
2142 17:18:14.337326
2143 17:18:14.662290 00880000 ####################################### done.
2144 17:18:14.662456
2145 17:18:14.664953 Sending tftp read request... done.
2146 17:18:14.665066
2147 17:18:14.668400 Waiting for the transfer...
2148 17:18:14.668486
2149 17:18:14.668554 00000000 # done.
2150 17:18:14.668619
2151 17:18:14.678469 Command line loaded dynamically from TFTP file: 10664094/tftp-deploy-hnp6c3_z/kernel/cmdline
2152 17:18:14.678556
2153 17:18:14.694853 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2154 17:18:14.694950
2155 17:18:14.701356 ec_init(0): CrosEC protocol v3 supported (256, 256)
2156 17:18:14.706365
2157 17:18:14.709554 Shutting down all USB controllers.
2158 17:18:14.709670
2159 17:18:14.709761 Removing current net device
2160 17:18:14.714190
2161 17:18:14.714306 Finalizing coreboot
2162 17:18:14.714409
2163 17:18:14.720314 Exiting depthcharge with code 4 at timestamp: 32623364
2164 17:18:14.720403
2165 17:18:14.720470
2166 17:18:14.720531 Starting kernel ...
2167 17:18:14.720591
2168 17:18:14.720648
2169 17:18:14.721057 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2170 17:18:14.721156 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2171 17:18:14.721233 Setting prompt string to ['Linux version [0-9]']
2172 17:18:14.721301 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 17:18:14.721368 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2175 17:22:31.721410 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2177 17:22:31.721684 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2179 17:22:31.721927 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2182 17:22:31.722227 end: 2 depthcharge-action (duration 00:05:00) [common]
2184 17:22:31.722511 Cleaning after the job
2185 17:22:31.722600 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664094/tftp-deploy-hnp6c3_z/ramdisk
2186 17:22:31.723796 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664094/tftp-deploy-hnp6c3_z/kernel
2187 17:22:31.725128 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664094/tftp-deploy-hnp6c3_z/modules
2188 17:22:31.725701 start: 5.1 power-off (timeout 00:00:30) [common]
2189 17:22:31.725866 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2190 17:22:31.803592 >> Command sent successfully.
2191 17:22:31.806935 Returned 0 in 0 seconds
2192 17:22:31.907337 end: 5.1 power-off (duration 00:00:00) [common]
2194 17:22:31.907769 start: 5.2 read-feedback (timeout 00:10:00) [common]
2195 17:22:31.908059 Listened to connection for namespace 'common' for up to 1s
2197 17:22:31.908439 Listened to connection for namespace 'common' for up to 1s
2198 17:22:32.908945 Finalising connection for namespace 'common'
2199 17:22:32.909125 Disconnecting from shell: Finalise
2200 17:22:32.909211
2201 17:22:33.009557 end: 5.2 read-feedback (duration 00:00:01) [common]
2202 17:22:33.009712 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10664094
2203 17:22:33.024259 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10664094
2204 17:22:33.024432 JobError: Your job cannot terminate cleanly.