Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 17:15:17.271627 lava-dispatcher, installed at version: 2023.05.1
2 17:15:17.271824 start: 0 validate
3 17:15:17.271956 Start time: 2023-06-09 17:15:17.271947+00:00 (UTC)
4 17:15:17.272080 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:15:17.272209 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 17:15:17.534765 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:15:17.535353 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.283-cip98-1248-gcaf6e8ee921e9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:15:17.804840 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:15:17.805593 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.283-cip98-1248-gcaf6e8ee921e9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:15:20.752958 validate duration: 3.48
12 17:15:20.753320 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:15:20.753452 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:15:20.753644 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:15:20.753767 Not decompressing ramdisk as can be used compressed.
16 17:15:20.753861 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 17:15:20.753928 saving as /var/lib/lava/dispatcher/tmp/10664126/tftp-deploy-18pbf9jt/ramdisk/rootfs.cpio.gz
18 17:15:20.753989 total size: 8430069 (8MB)
19 17:15:21.397541 progress 0% (0MB)
20 17:15:21.410712 progress 5% (0MB)
21 17:15:21.423550 progress 10% (0MB)
22 17:15:21.432390 progress 15% (1MB)
23 17:15:21.438203 progress 20% (1MB)
24 17:15:21.440844 progress 25% (2MB)
25 17:15:21.443059 progress 30% (2MB)
26 17:15:21.445279 progress 35% (2MB)
27 17:15:21.447290 progress 40% (3MB)
28 17:15:21.449467 progress 45% (3MB)
29 17:15:21.451627 progress 50% (4MB)
30 17:15:21.453849 progress 55% (4MB)
31 17:15:21.456004 progress 60% (4MB)
32 17:15:21.458245 progress 65% (5MB)
33 17:15:21.460400 progress 70% (5MB)
34 17:15:21.462491 progress 75% (6MB)
35 17:15:21.464647 progress 80% (6MB)
36 17:15:21.466932 progress 85% (6MB)
37 17:15:21.469097 progress 90% (7MB)
38 17:15:21.471317 progress 95% (7MB)
39 17:15:21.473482 progress 100% (8MB)
40 17:15:21.473666 8MB downloaded in 0.72s (11.17MB/s)
41 17:15:21.473819 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:15:21.474058 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:15:21.474143 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:15:21.474228 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:15:21.474369 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.283-cip98-1248-gcaf6e8ee921e9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:15:21.474442 saving as /var/lib/lava/dispatcher/tmp/10664126/tftp-deploy-18pbf9jt/kernel/bzImage
48 17:15:21.474503 total size: 10866688 (10MB)
49 17:15:21.474563 No compression specified
50 17:15:21.475682 progress 0% (0MB)
51 17:15:21.478465 progress 5% (0MB)
52 17:15:21.481310 progress 10% (1MB)
53 17:15:21.484012 progress 15% (1MB)
54 17:15:21.486939 progress 20% (2MB)
55 17:15:21.489664 progress 25% (2MB)
56 17:15:21.492497 progress 30% (3MB)
57 17:15:21.495371 progress 35% (3MB)
58 17:15:21.498055 progress 40% (4MB)
59 17:15:21.500878 progress 45% (4MB)
60 17:15:21.503578 progress 50% (5MB)
61 17:15:21.506430 progress 55% (5MB)
62 17:15:21.509061 progress 60% (6MB)
63 17:15:21.511899 progress 65% (6MB)
64 17:15:21.514751 progress 70% (7MB)
65 17:15:21.517376 progress 75% (7MB)
66 17:15:21.520219 progress 80% (8MB)
67 17:15:21.522913 progress 85% (8MB)
68 17:15:21.525718 progress 90% (9MB)
69 17:15:21.528526 progress 95% (9MB)
70 17:15:21.531214 progress 100% (10MB)
71 17:15:21.531404 10MB downloaded in 0.06s (182.14MB/s)
72 17:15:21.531547 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:15:21.531773 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:15:21.531863 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:15:21.531950 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:15:21.532087 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.283-cip98-1248-gcaf6e8ee921e9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:15:21.532157 saving as /var/lib/lava/dispatcher/tmp/10664126/tftp-deploy-18pbf9jt/modules/modules.tar
79 17:15:21.532218 total size: 485236 (0MB)
80 17:15:21.532279 Using unxz to decompress xz
81 17:15:21.535833 progress 6% (0MB)
82 17:15:21.536211 progress 13% (0MB)
83 17:15:21.536445 progress 20% (0MB)
84 17:15:21.538001 progress 27% (0MB)
85 17:15:21.540095 progress 33% (0MB)
86 17:15:21.542248 progress 40% (0MB)
87 17:15:21.544647 progress 47% (0MB)
88 17:15:21.546789 progress 54% (0MB)
89 17:15:21.548545 progress 60% (0MB)
90 17:15:21.550563 progress 67% (0MB)
91 17:15:21.552610 progress 74% (0MB)
92 17:15:21.554714 progress 81% (0MB)
93 17:15:21.556786 progress 87% (0MB)
94 17:15:21.558828 progress 94% (0MB)
95 17:15:21.560681 progress 100% (0MB)
96 17:15:21.566872 0MB downloaded in 0.03s (13.36MB/s)
97 17:15:21.567134 end: 1.3.1 http-download (duration 00:00:00) [common]
99 17:15:21.567401 end: 1.3 download-retry (duration 00:00:00) [common]
100 17:15:21.567493 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 17:15:21.567589 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 17:15:21.567670 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 17:15:21.567767 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 17:15:21.567981 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d
105 17:15:21.568111 makedir: /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin
106 17:15:21.568215 makedir: /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/tests
107 17:15:21.568311 makedir: /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/results
108 17:15:21.568424 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-add-keys
109 17:15:21.568567 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-add-sources
110 17:15:21.568702 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-background-process-start
111 17:15:21.568832 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-background-process-stop
112 17:15:21.568959 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-common-functions
113 17:15:21.569081 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-echo-ipv4
114 17:15:21.569203 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-install-packages
115 17:15:21.569323 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-installed-packages
116 17:15:21.569478 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-os-build
117 17:15:21.569673 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-probe-channel
118 17:15:21.569848 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-probe-ip
119 17:15:21.569977 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-target-ip
120 17:15:21.570101 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-target-mac
121 17:15:21.570222 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-target-storage
122 17:15:21.570348 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-test-case
123 17:15:21.570470 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-test-event
124 17:15:21.570590 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-test-feedback
125 17:15:21.570712 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-test-raise
126 17:15:21.570839 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-test-reference
127 17:15:21.570969 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-test-runner
128 17:15:21.571090 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-test-set
129 17:15:21.571211 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-test-shell
130 17:15:21.571335 Updating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-install-packages (oe)
131 17:15:21.571483 Updating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/bin/lava-installed-packages (oe)
132 17:15:21.571603 Creating /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/environment
133 17:15:21.571708 LAVA metadata
134 17:15:21.571783 - LAVA_JOB_ID=10664126
135 17:15:21.571852 - LAVA_DISPATCHER_IP=192.168.201.1
136 17:15:21.571952 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 17:15:21.572020 skipped lava-vland-overlay
138 17:15:21.572095 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 17:15:21.572178 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 17:15:21.572240 skipped lava-multinode-overlay
141 17:15:21.572312 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 17:15:21.572391 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 17:15:21.572468 Loading test definitions
144 17:15:21.572558 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 17:15:21.572632 Using /lava-10664126 at stage 0
146 17:15:21.572939 uuid=10664126_1.4.2.3.1 testdef=None
147 17:15:21.573028 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 17:15:21.573116 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 17:15:21.573698 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 17:15:21.573924 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 17:15:21.574557 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 17:15:21.574789 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 17:15:21.575396 runner path: /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/0/tests/0_dmesg test_uuid 10664126_1.4.2.3.1
156 17:15:21.575548 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 17:15:21.575778 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 17:15:21.575850 Using /lava-10664126 at stage 1
160 17:15:21.576134 uuid=10664126_1.4.2.3.5 testdef=None
161 17:15:21.576222 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 17:15:21.576306 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 17:15:21.576764 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 17:15:21.576987 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 17:15:21.577656 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 17:15:21.577887 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 17:15:21.578522 runner path: /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/1/tests/1_bootrr test_uuid 10664126_1.4.2.3.5
170 17:15:21.578671 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 17:15:21.578877 Creating lava-test-runner.conf files
173 17:15:21.578942 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/0 for stage 0
174 17:15:21.579029 - 0_dmesg
175 17:15:21.579110 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10664126/lava-overlay-d66qlu6d/lava-10664126/1 for stage 1
176 17:15:21.579200 - 1_bootrr
177 17:15:21.579292 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 17:15:21.579377 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 17:15:21.587700 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 17:15:21.587805 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 17:15:21.587890 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 17:15:21.587976 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 17:15:21.588065 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 17:15:21.824834 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 17:15:21.825198 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 17:15:21.825322 extracting modules file /var/lib/lava/dispatcher/tmp/10664126/tftp-deploy-18pbf9jt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10664126/extract-overlay-ramdisk-wou1jxgd/ramdisk
187 17:15:21.845124 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 17:15:21.845261 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 17:15:21.845352 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10664126/compress-overlay-rm6oeffg/overlay-1.4.2.4.tar.gz to ramdisk
190 17:15:21.845425 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10664126/compress-overlay-rm6oeffg/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10664126/extract-overlay-ramdisk-wou1jxgd/ramdisk
191 17:15:21.853420 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 17:15:21.853575 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 17:15:21.853667 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 17:15:21.853758 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 17:15:21.853834 Building ramdisk /var/lib/lava/dispatcher/tmp/10664126/extract-overlay-ramdisk-wou1jxgd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10664126/extract-overlay-ramdisk-wou1jxgd/ramdisk
196 17:15:21.976041 >> 53981 blocks
197 17:15:22.867039 rename /var/lib/lava/dispatcher/tmp/10664126/extract-overlay-ramdisk-wou1jxgd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10664126/tftp-deploy-18pbf9jt/ramdisk/ramdisk.cpio.gz
198 17:15:22.867453 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 17:15:22.867576 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 17:15:22.867673 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 17:15:22.867769 No mkimage arch provided, not using FIT.
202 17:15:22.867855 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 17:15:22.867934 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 17:15:22.868036 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 17:15:22.868124 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 17:15:22.868201 No LXC device requested
207 17:15:22.868280 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 17:15:22.868363 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 17:15:22.868443 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 17:15:22.868514 Checking files for TFTP limit of 4294967296 bytes.
211 17:15:22.868910 end: 1 tftp-deploy (duration 00:00:02) [common]
212 17:15:22.869011 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 17:15:22.869101 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 17:15:22.869218 substitutions:
215 17:15:22.869283 - {DTB}: None
216 17:15:22.869346 - {INITRD}: 10664126/tftp-deploy-18pbf9jt/ramdisk/ramdisk.cpio.gz
217 17:15:22.869404 - {KERNEL}: 10664126/tftp-deploy-18pbf9jt/kernel/bzImage
218 17:15:22.869459 - {LAVA_MAC}: None
219 17:15:22.869544 - {PRESEED_CONFIG}: None
220 17:15:22.869612 - {PRESEED_LOCAL}: None
221 17:15:22.869665 - {RAMDISK}: 10664126/tftp-deploy-18pbf9jt/ramdisk/ramdisk.cpio.gz
222 17:15:22.869718 - {ROOT_PART}: None
223 17:15:22.869772 - {ROOT}: None
224 17:15:22.869825 - {SERVER_IP}: 192.168.201.1
225 17:15:22.869878 - {TEE}: None
226 17:15:22.869931 Parsed boot commands:
227 17:15:22.869983 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 17:15:22.870150 Parsed boot commands: tftpboot 192.168.201.1 10664126/tftp-deploy-18pbf9jt/kernel/bzImage 10664126/tftp-deploy-18pbf9jt/kernel/cmdline 10664126/tftp-deploy-18pbf9jt/ramdisk/ramdisk.cpio.gz
229 17:15:22.870237 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 17:15:22.870321 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 17:15:22.870408 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 17:15:22.870489 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 17:15:22.870556 Not connected, no need to disconnect.
234 17:15:22.870630 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 17:15:22.870709 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 17:15:22.870771 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
237 17:15:22.873950 Setting prompt string to ['lava-test: # ']
238 17:15:22.874266 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 17:15:22.874370 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 17:15:22.874466 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 17:15:22.874558 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 17:15:22.874747 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
243 17:15:28.008489 >> Command sent successfully.
244 17:15:28.010951 Returned 0 in 5 seconds
245 17:15:28.111328 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 17:15:28.111646 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 17:15:28.111749 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 17:15:28.111835 Setting prompt string to 'Starting depthcharge on Voema...'
250 17:15:28.111906 Changing prompt to 'Starting depthcharge on Voema...'
251 17:15:28.111973 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 17:15:28.112230 [Enter `^Ec?' for help]
253 17:15:29.674284
254 17:15:29.674433
255 17:15:29.684207 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 17:15:29.690731 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
257 17:15:29.694104 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 17:15:29.698110 CPU: AES supported, TXT NOT supported, VT supported
259 17:15:29.705365 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 17:15:29.708446 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 17:15:29.715196 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 17:15:29.718320 VBOOT: Loading verstage.
263 17:15:29.721470 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 17:15:29.728010 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 17:15:29.731660 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 17:15:29.741333 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 17:15:29.748146 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 17:15:29.748230
269 17:15:29.748297
270 17:15:29.758256 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 17:15:29.774933 Probing TPM: . done!
272 17:15:29.777781 TPM ready after 0 ms
273 17:15:29.781296 Connected to device vid:did:rid of 1ae0:0028:00
274 17:15:29.792844 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
275 17:15:29.799454 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 17:15:29.802555 Initialized TPM device CR50 revision 0
277 17:15:29.859864 tlcl_send_startup: Startup return code is 0
278 17:15:29.859976 TPM: setup succeeded
279 17:15:29.875572 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 17:15:29.889635 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 17:15:29.902729 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 17:15:29.912221 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 17:15:29.916151 Chrome EC: UHEPI supported
284 17:15:29.919443 Phase 1
285 17:15:29.923088 FMAP: area GBB found @ 1805000 (458752 bytes)
286 17:15:29.932624 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 17:15:29.939447 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 17:15:29.945878 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 17:15:29.952547 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 17:15:29.955537 Recovery requested (1009000e)
291 17:15:29.958980 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 17:15:29.971009 tlcl_extend: response is 0
293 17:15:29.977460 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 17:15:29.987298 tlcl_extend: response is 0
295 17:15:29.993997 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 17:15:30.000508 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 17:15:30.006992 BS: verstage times (exec / console): total (unknown) / 142 ms
298 17:15:30.007093
299 17:15:30.007160
300 17:15:30.020477 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 17:15:30.026944 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 17:15:30.030299 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 17:15:30.033200 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 17:15:30.040534 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 17:15:30.043326 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 17:15:30.047317 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 17:15:30.049978 TCO_STS: 0000 0000
308 17:15:30.053244 GEN_PMCON: d0015038 00002200
309 17:15:30.057086 GBLRST_CAUSE: 00000000 00000000
310 17:15:30.059781 HPR_CAUSE0: 00000000
311 17:15:30.059865 prev_sleep_state 5
312 17:15:30.063293 Boot Count incremented to 18682
313 17:15:30.069630 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 17:15:30.076737 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 17:15:30.086376 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 17:15:30.093265 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 17:15:30.095872 Chrome EC: UHEPI supported
318 17:15:30.103007 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 17:15:30.113928 Probing TPM: done!
320 17:15:30.120393 Connected to device vid:did:rid of 1ae0:0028:00
321 17:15:30.130580 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
322 17:15:30.133888 Initialized TPM device CR50 revision 0
323 17:15:30.148956 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 17:15:30.155835 MRC: Hash idx 0x100b comparison successful.
325 17:15:30.158730 MRC cache found, size faa8
326 17:15:30.158808 bootmode is set to: 2
327 17:15:30.162220 SPD index = 2
328 17:15:30.168687 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 17:15:30.172218 SPD: module type is LPDDR4X
330 17:15:30.175081 SPD: module part number is MT53D1G64D4NW-046
331 17:15:30.182097 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
332 17:15:30.185645 SPD: device width 16 bits, bus width 16 bits
333 17:15:30.192665 SPD: module size is 2048 MB (per channel)
334 17:15:30.621440 CBMEM:
335 17:15:30.624814 IMD: root @ 0x76fff000 254 entries.
336 17:15:30.628216 IMD: root @ 0x76ffec00 62 entries.
337 17:15:30.631355 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 17:15:30.637666 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 17:15:30.641046 External stage cache:
340 17:15:30.644764 IMD: root @ 0x7b3ff000 254 entries.
341 17:15:30.647494 IMD: root @ 0x7b3fec00 62 entries.
342 17:15:30.662798 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 17:15:30.669417 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 17:15:30.675790 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 17:15:30.689480 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 17:15:30.696473 cse_lite: Skip switching to RW in the recovery path
347 17:15:30.696575 8 DIMMs found
348 17:15:30.696671 SMM Memory Map
349 17:15:30.702747 SMRAM : 0x7b000000 0x800000
350 17:15:30.705969 Subregion 0: 0x7b000000 0x200000
351 17:15:30.709497 Subregion 1: 0x7b200000 0x200000
352 17:15:30.712888 Subregion 2: 0x7b400000 0x400000
353 17:15:30.712967 top_of_ram = 0x77000000
354 17:15:30.719409 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 17:15:30.726157 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 17:15:30.729264 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 17:15:30.735883 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 17:15:30.742653 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 17:15:30.748992 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 17:15:30.759582 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 17:15:30.762815 Processing 211 relocs. Offset value of 0x74c0b000
362 17:15:30.772868 BS: romstage times (exec / console): total (unknown) / 277 ms
363 17:15:30.778063
364 17:15:30.778145
365 17:15:30.788002 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 17:15:30.791610 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 17:15:30.801103 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 17:15:30.808120 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 17:15:30.814835 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 17:15:30.821175 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 17:15:30.865130 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 17:15:30.871382 Processing 5008 relocs. Offset value of 0x75d98000
373 17:15:30.874709 BS: postcar times (exec / console): total (unknown) / 59 ms
374 17:15:30.877950
375 17:15:30.878034
376 17:15:30.887852 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 17:15:30.887940 Normal boot
378 17:15:30.891383 FW_CONFIG value is 0x804c02
379 17:15:30.894822 PCI: 00:07.0 disabled by fw_config
380 17:15:30.897941 PCI: 00:07.1 disabled by fw_config
381 17:15:30.901257 PCI: 00:0d.2 disabled by fw_config
382 17:15:30.907969 PCI: 00:1c.7 disabled by fw_config
383 17:15:30.911099 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 17:15:30.917962 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 17:15:30.921316 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 17:15:30.927888 GENERIC: 0.0 disabled by fw_config
387 17:15:30.931120 GENERIC: 1.0 disabled by fw_config
388 17:15:30.934243 fw_config match found: DB_USB=USB3_ACTIVE
389 17:15:30.937558 fw_config match found: DB_USB=USB3_ACTIVE
390 17:15:30.941045 fw_config match found: DB_USB=USB3_ACTIVE
391 17:15:30.947569 fw_config match found: DB_USB=USB3_ACTIVE
392 17:15:30.950823 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 17:15:30.961257 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 17:15:30.967444 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 17:15:30.974300 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 17:15:30.977216 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 17:15:30.984452 microcode: Update skipped, already up-to-date
398 17:15:30.991411 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 17:15:31.018712 Detected 4 core, 8 thread CPU.
400 17:15:31.022249 Setting up SMI for CPU
401 17:15:31.024917 IED base = 0x7b400000
402 17:15:31.025021 IED size = 0x00400000
403 17:15:31.028453 Will perform SMM setup.
404 17:15:31.034868 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
405 17:15:31.041436 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 17:15:31.048289 Processing 16 relocs. Offset value of 0x00030000
407 17:15:31.051638 Attempting to start 7 APs
408 17:15:31.054653 Waiting for 10ms after sending INIT.
409 17:15:31.070256 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 17:15:31.073816 AP: slot 7 apic_id 3.
411 17:15:31.076727 AP: slot 4 apic_id 2.
412 17:15:31.076806 AP: slot 6 apic_id 6.
413 17:15:31.080188 AP: slot 3 apic_id 7.
414 17:15:31.083530 AP: slot 2 apic_id 5.
415 17:15:31.083606 AP: slot 5 apic_id 4.
416 17:15:31.086925 done.
417 17:15:31.090085 Waiting for 2nd SIPI to complete...done.
418 17:15:31.097058 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 17:15:31.103117 Processing 13 relocs. Offset value of 0x00038000
420 17:15:31.106528 Unable to locate Global NVS
421 17:15:31.113270 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 17:15:31.116693 Installing permanent SMM handler to 0x7b000000
423 17:15:31.126619 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 17:15:31.129731 Processing 794 relocs. Offset value of 0x7b010000
425 17:15:31.139773 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 17:15:31.143304 Processing 13 relocs. Offset value of 0x7b008000
427 17:15:31.149263 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 17:15:31.155987 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 17:15:31.162589 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 17:15:31.166141 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 17:15:31.172402 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 17:15:31.179220 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 17:15:31.185747 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 17:15:31.189006 Unable to locate Global NVS
435 17:15:31.196155 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 17:15:31.199118 Clearing SMI status registers
437 17:15:31.202192 SMI_STS: PM1
438 17:15:31.202292 PM1_STS: PWRBTN
439 17:15:31.209246 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 17:15:31.212367 In relocation handler: CPU 0
441 17:15:31.218512 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 17:15:31.221903 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 17:15:31.225567 Relocation complete.
444 17:15:31.232157 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 17:15:31.235085 In relocation handler: CPU 1
446 17:15:31.238235 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 17:15:31.241961 Relocation complete.
448 17:15:31.248381 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
449 17:15:31.251614 In relocation handler: CPU 5
450 17:15:31.255226 New SMBASE=0x7affec00 IEDBASE=0x7b400000
451 17:15:31.258681 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 17:15:31.261427 Relocation complete.
453 17:15:31.268477 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
454 17:15:31.271807 In relocation handler: CPU 6
455 17:15:31.274592 New SMBASE=0x7affe800 IEDBASE=0x7b400000
456 17:15:31.281351 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 17:15:31.284912 Relocation complete.
458 17:15:31.291146 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
459 17:15:31.294769 In relocation handler: CPU 3
460 17:15:31.297655 New SMBASE=0x7afff400 IEDBASE=0x7b400000
461 17:15:31.300983 Relocation complete.
462 17:15:31.307742 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
463 17:15:31.310868 In relocation handler: CPU 4
464 17:15:31.314205 New SMBASE=0x7afff000 IEDBASE=0x7b400000
465 17:15:31.317681 Writing SMRR. base = 0x7b000006, mask=0xff800c00
466 17:15:31.320975 Relocation complete.
467 17:15:31.327568 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
468 17:15:31.330392 In relocation handler: CPU 7
469 17:15:31.333903 New SMBASE=0x7affe400 IEDBASE=0x7b400000
470 17:15:31.337358 Relocation complete.
471 17:15:31.343728 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
472 17:15:31.346955 In relocation handler: CPU 2
473 17:15:31.350350 New SMBASE=0x7afff800 IEDBASE=0x7b400000
474 17:15:31.353684 Relocation complete.
475 17:15:31.357042 Initializing CPU #0
476 17:15:31.360677 CPU: vendor Intel device 806c1
477 17:15:31.363819 CPU: family 06, model 8c, stepping 01
478 17:15:31.367110 Clearing out pending MCEs
479 17:15:31.370219 Setting up local APIC...
480 17:15:31.370302 apic_id: 0x00 done.
481 17:15:31.373613 Turbo is available but hidden
482 17:15:31.376598 Turbo is available and visible
483 17:15:31.380053 microcode: Update skipped, already up-to-date
484 17:15:31.383967 CPU #0 initialized
485 17:15:31.387035 Initializing CPU #6
486 17:15:31.387118 Initializing CPU #3
487 17:15:31.390310 CPU: vendor Intel device 806c1
488 17:15:31.393478 CPU: family 06, model 8c, stepping 01
489 17:15:31.397244 CPU: vendor Intel device 806c1
490 17:15:31.403566 CPU: family 06, model 8c, stepping 01
491 17:15:31.403661 Clearing out pending MCEs
492 17:15:31.406968 Clearing out pending MCEs
493 17:15:31.410144 Initializing CPU #5
494 17:15:31.410221 Initializing CPU #2
495 17:15:31.413291 CPU: vendor Intel device 806c1
496 17:15:31.416517 CPU: family 06, model 8c, stepping 01
497 17:15:31.420080 CPU: vendor Intel device 806c1
498 17:15:31.426991 CPU: family 06, model 8c, stepping 01
499 17:15:31.427076 Clearing out pending MCEs
500 17:15:31.430633 Initializing CPU #1
501 17:15:31.434599 Clearing out pending MCEs
502 17:15:31.434677 Setting up local APIC...
503 17:15:31.437684 Setting up local APIC...
504 17:15:31.440827 Setting up local APIC...
505 17:15:31.440898 Initializing CPU #4
506 17:15:31.444628 Initializing CPU #7
507 17:15:31.447676 CPU: vendor Intel device 806c1
508 17:15:31.450559 CPU: family 06, model 8c, stepping 01
509 17:15:31.453991 CPU: vendor Intel device 806c1
510 17:15:31.457549 CPU: family 06, model 8c, stepping 01
511 17:15:31.460503 Clearing out pending MCEs
512 17:15:31.464231 Clearing out pending MCEs
513 17:15:31.464308 Setting up local APIC...
514 17:15:31.467639 apic_id: 0x06 done.
515 17:15:31.470645 Setting up local APIC...
516 17:15:31.473815 CPU: vendor Intel device 806c1
517 17:15:31.477515 CPU: family 06, model 8c, stepping 01
518 17:15:31.480593 Setting up local APIC...
519 17:15:31.484051 Clearing out pending MCEs
520 17:15:31.484146 apic_id: 0x05 done.
521 17:15:31.487525 apic_id: 0x04 done.
522 17:15:31.487606 apic_id: 0x03 done.
523 17:15:31.490754 apic_id: 0x02 done.
524 17:15:31.497091 microcode: Update skipped, already up-to-date
525 17:15:31.501199 microcode: Update skipped, already up-to-date
526 17:15:31.501276 CPU #7 initialized
527 17:15:31.503908 CPU #4 initialized
528 17:15:31.507255 apic_id: 0x07 done.
529 17:15:31.510844 microcode: Update skipped, already up-to-date
530 17:15:31.513901 microcode: Update skipped, already up-to-date
531 17:15:31.517121 CPU #6 initialized
532 17:15:31.520461 CPU #3 initialized
533 17:15:31.520540 Setting up local APIC...
534 17:15:31.527287 microcode: Update skipped, already up-to-date
535 17:15:31.530610 microcode: Update skipped, already up-to-date
536 17:15:31.533540 CPU #5 initialized
537 17:15:31.533621 CPU #2 initialized
538 17:15:31.537563 apic_id: 0x01 done.
539 17:15:31.540394 microcode: Update skipped, already up-to-date
540 17:15:31.543458 CPU #1 initialized
541 17:15:31.547247 bsp_do_flight_plan done after 454 msecs.
542 17:15:31.550320 CPU: frequency set to 4400 MHz
543 17:15:31.553451 Enabling SMIs.
544 17:15:31.560020 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 17:15:31.575166 SATAXPCIE1 indicates PCIe NVMe is present
546 17:15:31.578229 Probing TPM: done!
547 17:15:31.581945 Connected to device vid:did:rid of 1ae0:0028:00
548 17:15:31.592443 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
549 17:15:31.595497 Initialized TPM device CR50 revision 0
550 17:15:31.599041 Enabling S0i3.4
551 17:15:31.605744 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 17:15:31.609308 Found a VBT of 8704 bytes after decompression
553 17:15:31.615509 cse_lite: CSE RO boot. HybridStorageMode disabled
554 17:15:31.622326 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 17:15:31.697673 FSPS returned 0
556 17:15:31.700918 Executing Phase 1 of FspMultiPhaseSiInit
557 17:15:31.710608 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 17:15:31.713956 port C0 DISC req: usage 1 usb3 1 usb2 5
559 17:15:31.717686 Raw Buffer output 0 00000511
560 17:15:31.720792 Raw Buffer output 1 00000000
561 17:15:31.724477 pmc_send_ipc_cmd succeeded
562 17:15:31.731068 port C1 DISC req: usage 1 usb3 2 usb2 3
563 17:15:31.731155 Raw Buffer output 0 00000321
564 17:15:31.734703 Raw Buffer output 1 00000000
565 17:15:31.738531 pmc_send_ipc_cmd succeeded
566 17:15:31.743715 Detected 4 core, 8 thread CPU.
567 17:15:31.746837 Detected 4 core, 8 thread CPU.
568 17:15:31.947773 Display FSP Version Info HOB
569 17:15:31.950834 Reference Code - CPU = a.0.4c.31
570 17:15:31.954405 uCode Version = 0.0.0.86
571 17:15:31.957089 TXT ACM version = ff.ff.ff.ffff
572 17:15:31.960632 Reference Code - ME = a.0.4c.31
573 17:15:31.964252 MEBx version = 0.0.0.0
574 17:15:31.967406 ME Firmware Version = Consumer SKU
575 17:15:31.970436 Reference Code - PCH = a.0.4c.31
576 17:15:31.973854 PCH-CRID Status = Disabled
577 17:15:31.977186 PCH-CRID Original Value = ff.ff.ff.ffff
578 17:15:31.980740 PCH-CRID New Value = ff.ff.ff.ffff
579 17:15:31.983724 OPROM - RST - RAID = ff.ff.ff.ffff
580 17:15:31.987085 PCH Hsio Version = 4.0.0.0
581 17:15:31.990505 Reference Code - SA - System Agent = a.0.4c.31
582 17:15:31.993821 Reference Code - MRC = 2.0.0.1
583 17:15:31.997123 SA - PCIe Version = a.0.4c.31
584 17:15:32.000677 SA-CRID Status = Disabled
585 17:15:32.004170 SA-CRID Original Value = 0.0.0.1
586 17:15:32.008390 SA-CRID New Value = 0.0.0.1
587 17:15:32.008477 OPROM - VBIOS = ff.ff.ff.ffff
588 17:15:32.015209 IO Manageability Engine FW Version = 11.1.4.0
589 17:15:32.018246 PHY Build Version = 0.0.0.e0
590 17:15:32.021797 Thunderbolt(TM) FW Version = 0.0.0.0
591 17:15:32.028113 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 17:15:32.028200 ITSS IRQ Polarities Before:
593 17:15:32.031725 IPC0: 0xffffffff
594 17:15:32.031810 IPC1: 0xffffffff
595 17:15:32.034650 IPC2: 0xffffffff
596 17:15:32.037823 IPC3: 0xffffffff
597 17:15:32.037908 ITSS IRQ Polarities After:
598 17:15:32.041526 IPC0: 0xffffffff
599 17:15:32.041625 IPC1: 0xffffffff
600 17:15:32.045028 IPC2: 0xffffffff
601 17:15:32.048013 IPC3: 0xffffffff
602 17:15:32.051549 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 17:15:32.061068 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 17:15:32.074408 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 17:15:32.087425 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 17:15:32.094233 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
607 17:15:32.094320 Enumerating buses...
608 17:15:32.100555 Show all devs... Before device enumeration.
609 17:15:32.100641 Root Device: enabled 1
610 17:15:32.103972 DOMAIN: 0000: enabled 1
611 17:15:32.107590 CPU_CLUSTER: 0: enabled 1
612 17:15:32.110959 PCI: 00:00.0: enabled 1
613 17:15:32.111047 PCI: 00:02.0: enabled 1
614 17:15:32.114362 PCI: 00:04.0: enabled 1
615 17:15:32.117057 PCI: 00:05.0: enabled 1
616 17:15:32.120414 PCI: 00:06.0: enabled 0
617 17:15:32.120500 PCI: 00:07.0: enabled 0
618 17:15:32.123503 PCI: 00:07.1: enabled 0
619 17:15:32.127003 PCI: 00:07.2: enabled 0
620 17:15:32.130377 PCI: 00:07.3: enabled 0
621 17:15:32.130463 PCI: 00:08.0: enabled 1
622 17:15:32.133753 PCI: 00:09.0: enabled 0
623 17:15:32.137004 PCI: 00:0a.0: enabled 0
624 17:15:32.140167 PCI: 00:0d.0: enabled 1
625 17:15:32.140252 PCI: 00:0d.1: enabled 0
626 17:15:32.143849 PCI: 00:0d.2: enabled 0
627 17:15:32.146940 PCI: 00:0d.3: enabled 0
628 17:15:32.150207 PCI: 00:0e.0: enabled 0
629 17:15:32.150305 PCI: 00:10.2: enabled 1
630 17:15:32.153438 PCI: 00:10.6: enabled 0
631 17:15:32.156535 PCI: 00:10.7: enabled 0
632 17:15:32.159757 PCI: 00:12.0: enabled 0
633 17:15:32.159840 PCI: 00:12.6: enabled 0
634 17:15:32.163212 PCI: 00:13.0: enabled 0
635 17:15:32.166579 PCI: 00:14.0: enabled 1
636 17:15:32.166662 PCI: 00:14.1: enabled 0
637 17:15:32.169474 PCI: 00:14.2: enabled 1
638 17:15:32.173230 PCI: 00:14.3: enabled 1
639 17:15:32.176144 PCI: 00:15.0: enabled 1
640 17:15:32.176227 PCI: 00:15.1: enabled 1
641 17:15:32.179775 PCI: 00:15.2: enabled 1
642 17:15:32.183359 PCI: 00:15.3: enabled 1
643 17:15:32.186081 PCI: 00:16.0: enabled 1
644 17:15:32.186163 PCI: 00:16.1: enabled 0
645 17:15:32.189352 PCI: 00:16.2: enabled 0
646 17:15:32.193001 PCI: 00:16.3: enabled 0
647 17:15:32.196018 PCI: 00:16.4: enabled 0
648 17:15:32.196101 PCI: 00:16.5: enabled 0
649 17:15:32.199409 PCI: 00:17.0: enabled 1
650 17:15:32.202760 PCI: 00:19.0: enabled 0
651 17:15:32.206112 PCI: 00:19.1: enabled 1
652 17:15:32.206227 PCI: 00:19.2: enabled 0
653 17:15:32.209662 PCI: 00:1c.0: enabled 1
654 17:15:32.212481 PCI: 00:1c.1: enabled 0
655 17:15:32.216028 PCI: 00:1c.2: enabled 0
656 17:15:32.216126 PCI: 00:1c.3: enabled 0
657 17:15:32.219045 PCI: 00:1c.4: enabled 0
658 17:15:32.222266 PCI: 00:1c.5: enabled 0
659 17:15:32.225737 PCI: 00:1c.6: enabled 1
660 17:15:32.225850 PCI: 00:1c.7: enabled 0
661 17:15:32.229246 PCI: 00:1d.0: enabled 1
662 17:15:32.232209 PCI: 00:1d.1: enabled 0
663 17:15:32.232292 PCI: 00:1d.2: enabled 1
664 17:15:32.235636 PCI: 00:1d.3: enabled 0
665 17:15:32.238967 PCI: 00:1e.0: enabled 1
666 17:15:32.242317 PCI: 00:1e.1: enabled 0
667 17:15:32.242400 PCI: 00:1e.2: enabled 1
668 17:15:32.245516 PCI: 00:1e.3: enabled 1
669 17:15:32.249094 PCI: 00:1f.0: enabled 1
670 17:15:32.252373 PCI: 00:1f.1: enabled 0
671 17:15:32.252456 PCI: 00:1f.2: enabled 1
672 17:15:32.255284 PCI: 00:1f.3: enabled 1
673 17:15:32.258618 PCI: 00:1f.4: enabled 0
674 17:15:32.261834 PCI: 00:1f.5: enabled 1
675 17:15:32.261915 PCI: 00:1f.6: enabled 0
676 17:15:32.265161 PCI: 00:1f.7: enabled 0
677 17:15:32.268450 APIC: 00: enabled 1
678 17:15:32.268550 GENERIC: 0.0: enabled 1
679 17:15:32.272095 GENERIC: 0.0: enabled 1
680 17:15:32.275142 GENERIC: 1.0: enabled 1
681 17:15:32.278529 GENERIC: 0.0: enabled 1
682 17:15:32.278615 GENERIC: 1.0: enabled 1
683 17:15:32.282062 USB0 port 0: enabled 1
684 17:15:32.284951 GENERIC: 0.0: enabled 1
685 17:15:32.288667 USB0 port 0: enabled 1
686 17:15:32.288749 GENERIC: 0.0: enabled 1
687 17:15:32.291968 I2C: 00:1a: enabled 1
688 17:15:32.294920 I2C: 00:31: enabled 1
689 17:15:32.295023 I2C: 00:32: enabled 1
690 17:15:32.298541 I2C: 00:10: enabled 1
691 17:15:32.301445 I2C: 00:15: enabled 1
692 17:15:32.301565 GENERIC: 0.0: enabled 0
693 17:15:32.304750 GENERIC: 1.0: enabled 0
694 17:15:32.308407 GENERIC: 0.0: enabled 1
695 17:15:32.311712 SPI: 00: enabled 1
696 17:15:32.311786 SPI: 00: enabled 1
697 17:15:32.315335 PNP: 0c09.0: enabled 1
698 17:15:32.318092 GENERIC: 0.0: enabled 1
699 17:15:32.318192 USB3 port 0: enabled 1
700 17:15:32.321352 USB3 port 1: enabled 1
701 17:15:32.325140 USB3 port 2: enabled 0
702 17:15:32.325245 USB3 port 3: enabled 0
703 17:15:32.328488 USB2 port 0: enabled 0
704 17:15:32.331489 USB2 port 1: enabled 1
705 17:15:32.334635 USB2 port 2: enabled 1
706 17:15:32.334736 USB2 port 3: enabled 0
707 17:15:32.337839 USB2 port 4: enabled 1
708 17:15:32.341207 USB2 port 5: enabled 0
709 17:15:32.341307 USB2 port 6: enabled 0
710 17:15:32.344670 USB2 port 7: enabled 0
711 17:15:32.347739 USB2 port 8: enabled 0
712 17:15:32.351018 USB2 port 9: enabled 0
713 17:15:32.351121 USB3 port 0: enabled 0
714 17:15:32.354691 USB3 port 1: enabled 1
715 17:15:32.357933 USB3 port 2: enabled 0
716 17:15:32.358009 USB3 port 3: enabled 0
717 17:15:32.361337 GENERIC: 0.0: enabled 1
718 17:15:32.364209 GENERIC: 1.0: enabled 1
719 17:15:32.364309 APIC: 01: enabled 1
720 17:15:32.367934 APIC: 05: enabled 1
721 17:15:32.371031 APIC: 07: enabled 1
722 17:15:32.371133 APIC: 02: enabled 1
723 17:15:32.374355 APIC: 04: enabled 1
724 17:15:32.377578 APIC: 06: enabled 1
725 17:15:32.377651 APIC: 03: enabled 1
726 17:15:32.381208 Compare with tree...
727 17:15:32.381308 Root Device: enabled 1
728 17:15:32.384717 DOMAIN: 0000: enabled 1
729 17:15:32.388014 PCI: 00:00.0: enabled 1
730 17:15:32.390909 PCI: 00:02.0: enabled 1
731 17:15:32.394448 PCI: 00:04.0: enabled 1
732 17:15:32.394523 GENERIC: 0.0: enabled 1
733 17:15:32.397789 PCI: 00:05.0: enabled 1
734 17:15:32.401285 PCI: 00:06.0: enabled 0
735 17:15:32.404649 PCI: 00:07.0: enabled 0
736 17:15:32.407575 GENERIC: 0.0: enabled 1
737 17:15:32.407651 PCI: 00:07.1: enabled 0
738 17:15:32.411019 GENERIC: 1.0: enabled 1
739 17:15:32.414390 PCI: 00:07.2: enabled 0
740 17:15:32.417757 GENERIC: 0.0: enabled 1
741 17:15:32.421381 PCI: 00:07.3: enabled 0
742 17:15:32.424100 GENERIC: 1.0: enabled 1
743 17:15:32.424206 PCI: 00:08.0: enabled 1
744 17:15:32.427708 PCI: 00:09.0: enabled 0
745 17:15:32.430973 PCI: 00:0a.0: enabled 0
746 17:15:32.434223 PCI: 00:0d.0: enabled 1
747 17:15:32.434324 USB0 port 0: enabled 1
748 17:15:32.437445 USB3 port 0: enabled 1
749 17:15:32.440847 USB3 port 1: enabled 1
750 17:15:32.444126 USB3 port 2: enabled 0
751 17:15:32.447466 USB3 port 3: enabled 0
752 17:15:32.451460 PCI: 00:0d.1: enabled 0
753 17:15:32.451562 PCI: 00:0d.2: enabled 0
754 17:15:32.454049 GENERIC: 0.0: enabled 1
755 17:15:32.457281 PCI: 00:0d.3: enabled 0
756 17:15:32.460984 PCI: 00:0e.0: enabled 0
757 17:15:32.464086 PCI: 00:10.2: enabled 1
758 17:15:32.464193 PCI: 00:10.6: enabled 0
759 17:15:32.467655 PCI: 00:10.7: enabled 0
760 17:15:32.470531 PCI: 00:12.0: enabled 0
761 17:15:32.473896 PCI: 00:12.6: enabled 0
762 17:15:32.477031 PCI: 00:13.0: enabled 0
763 17:15:32.477129 PCI: 00:14.0: enabled 1
764 17:15:32.480618 USB0 port 0: enabled 1
765 17:15:32.483697 USB2 port 0: enabled 0
766 17:15:32.487216 USB2 port 1: enabled 1
767 17:15:32.490547 USB2 port 2: enabled 1
768 17:15:32.490629 USB2 port 3: enabled 0
769 17:15:32.493924 USB2 port 4: enabled 1
770 17:15:32.496761 USB2 port 5: enabled 0
771 17:15:32.500266 USB2 port 6: enabled 0
772 17:15:32.503785 USB2 port 7: enabled 0
773 17:15:32.507036 USB2 port 8: enabled 0
774 17:15:32.507109 USB2 port 9: enabled 0
775 17:15:32.510128 USB3 port 0: enabled 0
776 17:15:32.513834 USB3 port 1: enabled 1
777 17:15:32.516947 USB3 port 2: enabled 0
778 17:15:32.520452 USB3 port 3: enabled 0
779 17:15:32.523525 PCI: 00:14.1: enabled 0
780 17:15:32.523632 PCI: 00:14.2: enabled 1
781 17:15:32.527017 PCI: 00:14.3: enabled 1
782 17:15:32.530280 GENERIC: 0.0: enabled 1
783 17:15:32.533293 PCI: 00:15.0: enabled 1
784 17:15:32.536662 I2C: 00:1a: enabled 1
785 17:15:32.536768 I2C: 00:31: enabled 1
786 17:15:32.540296 I2C: 00:32: enabled 1
787 17:15:32.543207 PCI: 00:15.1: enabled 1
788 17:15:32.546669 I2C: 00:10: enabled 1
789 17:15:32.546741 PCI: 00:15.2: enabled 1
790 17:15:32.549735 PCI: 00:15.3: enabled 1
791 17:15:32.553067 PCI: 00:16.0: enabled 1
792 17:15:32.556398 PCI: 00:16.1: enabled 0
793 17:15:32.559903 PCI: 00:16.2: enabled 0
794 17:15:32.560008 PCI: 00:16.3: enabled 0
795 17:15:32.563465 PCI: 00:16.4: enabled 0
796 17:15:32.566594 PCI: 00:16.5: enabled 0
797 17:15:32.569874 PCI: 00:17.0: enabled 1
798 17:15:32.573042 PCI: 00:19.0: enabled 0
799 17:15:32.573141 PCI: 00:19.1: enabled 1
800 17:15:32.576640 I2C: 00:15: enabled 1
801 17:15:32.579880 PCI: 00:19.2: enabled 0
802 17:15:32.582941 PCI: 00:1d.0: enabled 1
803 17:15:32.587000 GENERIC: 0.0: enabled 1
804 17:15:32.587107 PCI: 00:1e.0: enabled 1
805 17:15:32.589848 PCI: 00:1e.1: enabled 0
806 17:15:32.593308 PCI: 00:1e.2: enabled 1
807 17:15:32.596341 SPI: 00: enabled 1
808 17:15:32.596452 PCI: 00:1e.3: enabled 1
809 17:15:32.599992 SPI: 00: enabled 1
810 17:15:32.603253 PCI: 00:1f.0: enabled 1
811 17:15:32.606650 PNP: 0c09.0: enabled 1
812 17:15:32.606737 PCI: 00:1f.1: enabled 0
813 17:15:32.609732 PCI: 00:1f.2: enabled 1
814 17:15:32.612971 GENERIC: 0.0: enabled 1
815 17:15:32.616230 GENERIC: 0.0: enabled 1
816 17:15:32.619504 GENERIC: 1.0: enabled 1
817 17:15:32.671395 PCI: 00:1f.3: enabled 1
818 17:15:32.671480 PCI: 00:1f.4: enabled 0
819 17:15:32.671547 PCI: 00:1f.5: enabled 1
820 17:15:32.671792 PCI: 00:1f.6: enabled 0
821 17:15:32.671860 PCI: 00:1f.7: enabled 0
822 17:15:32.671945 CPU_CLUSTER: 0: enabled 1
823 17:15:32.672036 APIC: 00: enabled 1
824 17:15:32.672125 APIC: 01: enabled 1
825 17:15:32.672229 APIC: 05: enabled 1
826 17:15:32.672318 APIC: 07: enabled 1
827 17:15:32.672405 APIC: 02: enabled 1
828 17:15:32.672754 APIC: 04: enabled 1
829 17:15:32.672847 APIC: 06: enabled 1
830 17:15:32.673113 APIC: 03: enabled 1
831 17:15:32.673203 Root Device scanning...
832 17:15:32.673293 scan_static_bus for Root Device
833 17:15:32.673380 DOMAIN: 0000 enabled
834 17:15:32.673466 CPU_CLUSTER: 0 enabled
835 17:15:32.673592 DOMAIN: 0000 scanning...
836 17:15:32.673653 PCI: pci_scan_bus for bus 00
837 17:15:32.687345 PCI: 00:00.0 [8086/0000] ops
838 17:15:32.687450 PCI: 00:00.0 [8086/9a12] enabled
839 17:15:32.687722 PCI: 00:02.0 [8086/0000] bus ops
840 17:15:32.687816 PCI: 00:02.0 [8086/9a40] enabled
841 17:15:32.690345 PCI: 00:04.0 [8086/0000] bus ops
842 17:15:32.690420 PCI: 00:04.0 [8086/9a03] enabled
843 17:15:32.693753 PCI: 00:05.0 [8086/9a19] enabled
844 17:15:32.697240 PCI: 00:07.0 [0000/0000] hidden
845 17:15:32.700058 PCI: 00:08.0 [8086/9a11] enabled
846 17:15:32.703590 PCI: 00:0a.0 [8086/9a0d] disabled
847 17:15:32.707061 PCI: 00:0d.0 [8086/0000] bus ops
848 17:15:32.710444 PCI: 00:0d.0 [8086/9a13] enabled
849 17:15:32.713643 PCI: 00:14.0 [8086/0000] bus ops
850 17:15:32.716872 PCI: 00:14.0 [8086/a0ed] enabled
851 17:15:32.720082 PCI: 00:14.2 [8086/a0ef] enabled
852 17:15:32.723291 PCI: 00:14.3 [8086/0000] bus ops
853 17:15:32.726875 PCI: 00:14.3 [8086/a0f0] enabled
854 17:15:32.730378 PCI: 00:15.0 [8086/0000] bus ops
855 17:15:32.733644 PCI: 00:15.0 [8086/a0e8] enabled
856 17:15:32.736438 PCI: 00:15.1 [8086/0000] bus ops
857 17:15:32.740041 PCI: 00:15.1 [8086/a0e9] enabled
858 17:15:32.743151 PCI: 00:15.2 [8086/0000] bus ops
859 17:15:32.746424 PCI: 00:15.2 [8086/a0ea] enabled
860 17:15:32.749645 PCI: 00:15.3 [8086/0000] bus ops
861 17:15:32.752900 PCI: 00:15.3 [8086/a0eb] enabled
862 17:15:32.756405 PCI: 00:16.0 [8086/0000] ops
863 17:15:32.759535 PCI: 00:16.0 [8086/a0e0] enabled
864 17:15:32.766521 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 17:15:32.769870 PCI: 00:19.0 [8086/0000] bus ops
866 17:15:32.772735 PCI: 00:19.0 [8086/a0c5] disabled
867 17:15:32.776148 PCI: 00:19.1 [8086/0000] bus ops
868 17:15:32.779483 PCI: 00:19.1 [8086/a0c6] enabled
869 17:15:32.782742 PCI: 00:1d.0 [8086/0000] bus ops
870 17:15:32.786426 PCI: 00:1d.0 [8086/a0b0] enabled
871 17:15:32.789415 PCI: 00:1e.0 [8086/0000] ops
872 17:15:32.792410 PCI: 00:1e.0 [8086/a0a8] enabled
873 17:15:32.796091 PCI: 00:1e.2 [8086/0000] bus ops
874 17:15:32.799300 PCI: 00:1e.2 [8086/a0aa] enabled
875 17:15:32.802344 PCI: 00:1e.3 [8086/0000] bus ops
876 17:15:32.805884 PCI: 00:1e.3 [8086/a0ab] enabled
877 17:15:32.809347 PCI: 00:1f.0 [8086/0000] bus ops
878 17:15:32.812675 PCI: 00:1f.0 [8086/a087] enabled
879 17:15:32.812750 RTC Init
880 17:15:32.815683 Set power on after power failure.
881 17:15:32.819133 Disabling Deep S3
882 17:15:32.819221 Disabling Deep S3
883 17:15:32.822169 Disabling Deep S4
884 17:15:32.822254 Disabling Deep S4
885 17:15:32.825706 Disabling Deep S5
886 17:15:32.828954 Disabling Deep S5
887 17:15:32.832041 PCI: 00:1f.2 [0000/0000] hidden
888 17:15:32.835573 PCI: 00:1f.3 [8086/0000] bus ops
889 17:15:32.839167 PCI: 00:1f.3 [8086/a0c8] enabled
890 17:15:32.841993 PCI: 00:1f.5 [8086/0000] bus ops
891 17:15:32.845410 PCI: 00:1f.5 [8086/a0a4] enabled
892 17:15:32.848892 PCI: Leftover static devices:
893 17:15:32.848992 PCI: 00:10.2
894 17:15:32.849089 PCI: 00:10.6
895 17:15:32.852152 PCI: 00:10.7
896 17:15:32.852248 PCI: 00:06.0
897 17:15:32.855483 PCI: 00:07.1
898 17:15:32.855582 PCI: 00:07.2
899 17:15:32.855688 PCI: 00:07.3
900 17:15:32.858853 PCI: 00:09.0
901 17:15:32.858943 PCI: 00:0d.1
902 17:15:32.862106 PCI: 00:0d.2
903 17:15:32.862203 PCI: 00:0d.3
904 17:15:32.862280 PCI: 00:0e.0
905 17:15:32.865551 PCI: 00:12.0
906 17:15:32.865663 PCI: 00:12.6
907 17:15:32.868441 PCI: 00:13.0
908 17:15:32.868546 PCI: 00:14.1
909 17:15:32.872030 PCI: 00:16.1
910 17:15:32.872143 PCI: 00:16.2
911 17:15:32.872233 PCI: 00:16.3
912 17:15:32.874960 PCI: 00:16.4
913 17:15:32.875072 PCI: 00:16.5
914 17:15:32.878328 PCI: 00:17.0
915 17:15:32.878451 PCI: 00:19.2
916 17:15:32.878548 PCI: 00:1e.1
917 17:15:32.881810 PCI: 00:1f.1
918 17:15:32.881947 PCI: 00:1f.4
919 17:15:32.885213 PCI: 00:1f.6
920 17:15:32.885352 PCI: 00:1f.7
921 17:15:32.888464 PCI: Check your devicetree.cb.
922 17:15:32.891729 PCI: 00:02.0 scanning...
923 17:15:32.894929 scan_generic_bus for PCI: 00:02.0
924 17:15:32.898284 scan_generic_bus for PCI: 00:02.0 done
925 17:15:32.905022 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 17:15:32.905198 PCI: 00:04.0 scanning...
927 17:15:32.908076 scan_generic_bus for PCI: 00:04.0
928 17:15:32.911425 GENERIC: 0.0 enabled
929 17:15:32.918237 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 17:15:32.921269 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 17:15:32.924905 PCI: 00:0d.0 scanning...
932 17:15:32.928290 scan_static_bus for PCI: 00:0d.0
933 17:15:32.931411 USB0 port 0 enabled
934 17:15:32.934545 USB0 port 0 scanning...
935 17:15:32.937866 scan_static_bus for USB0 port 0
936 17:15:32.938128 USB3 port 0 enabled
937 17:15:32.941430 USB3 port 1 enabled
938 17:15:32.944567 USB3 port 2 disabled
939 17:15:32.944858 USB3 port 3 disabled
940 17:15:32.948058 USB3 port 0 scanning...
941 17:15:32.951623 scan_static_bus for USB3 port 0
942 17:15:32.954525 scan_static_bus for USB3 port 0 done
943 17:15:32.958018 scan_bus: bus USB3 port 0 finished in 6 msecs
944 17:15:32.961642 USB3 port 1 scanning...
945 17:15:32.964698 scan_static_bus for USB3 port 1
946 17:15:32.967982 scan_static_bus for USB3 port 1 done
947 17:15:32.974208 scan_bus: bus USB3 port 1 finished in 6 msecs
948 17:15:32.977814 scan_static_bus for USB0 port 0 done
949 17:15:32.981238 scan_bus: bus USB0 port 0 finished in 43 msecs
950 17:15:32.984751 scan_static_bus for PCI: 00:0d.0 done
951 17:15:32.991006 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 17:15:32.994408 PCI: 00:14.0 scanning...
953 17:15:32.997471 scan_static_bus for PCI: 00:14.0
954 17:15:32.998122 USB0 port 0 enabled
955 17:15:33.000962 USB0 port 0 scanning...
956 17:15:33.004076 scan_static_bus for USB0 port 0
957 17:15:33.007459 USB2 port 0 disabled
958 17:15:33.007923 USB2 port 1 enabled
959 17:15:33.010777 USB2 port 2 enabled
960 17:15:33.014023 USB2 port 3 disabled
961 17:15:33.014474 USB2 port 4 enabled
962 17:15:33.017324 USB2 port 5 disabled
963 17:15:33.020418 USB2 port 6 disabled
964 17:15:33.020871 USB2 port 7 disabled
965 17:15:33.024179 USB2 port 8 disabled
966 17:15:33.027734 USB2 port 9 disabled
967 17:15:33.028188 USB3 port 0 disabled
968 17:15:33.030507 USB3 port 1 enabled
969 17:15:33.034033 USB3 port 2 disabled
970 17:15:33.034487 USB3 port 3 disabled
971 17:15:33.037339 USB2 port 1 scanning...
972 17:15:33.040371 scan_static_bus for USB2 port 1
973 17:15:33.043686 scan_static_bus for USB2 port 1 done
974 17:15:33.047400 scan_bus: bus USB2 port 1 finished in 6 msecs
975 17:15:33.050795 USB2 port 2 scanning...
976 17:15:33.053785 scan_static_bus for USB2 port 2
977 17:15:33.056965 scan_static_bus for USB2 port 2 done
978 17:15:33.063663 scan_bus: bus USB2 port 2 finished in 6 msecs
979 17:15:33.064227 USB2 port 4 scanning...
980 17:15:33.067138 scan_static_bus for USB2 port 4
981 17:15:33.073600 scan_static_bus for USB2 port 4 done
982 17:15:33.077034 scan_bus: bus USB2 port 4 finished in 6 msecs
983 17:15:33.080549 USB3 port 1 scanning...
984 17:15:33.083550 scan_static_bus for USB3 port 1
985 17:15:33.086899 scan_static_bus for USB3 port 1 done
986 17:15:33.090364 scan_bus: bus USB3 port 1 finished in 6 msecs
987 17:15:33.093633 scan_static_bus for USB0 port 0 done
988 17:15:33.099979 scan_bus: bus USB0 port 0 finished in 93 msecs
989 17:15:33.103577 scan_static_bus for PCI: 00:14.0 done
990 17:15:33.106815 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
991 17:15:33.110413 PCI: 00:14.3 scanning...
992 17:15:33.113227 scan_static_bus for PCI: 00:14.3
993 17:15:33.116959 GENERIC: 0.0 enabled
994 17:15:33.119959 scan_static_bus for PCI: 00:14.3 done
995 17:15:33.126840 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 17:15:33.127412 PCI: 00:15.0 scanning...
997 17:15:33.130133 scan_static_bus for PCI: 00:15.0
998 17:15:33.132980 I2C: 00:1a enabled
999 17:15:33.136903 I2C: 00:31 enabled
1000 17:15:33.137460 I2C: 00:32 enabled
1001 17:15:33.139863 scan_static_bus for PCI: 00:15.0 done
1002 17:15:33.146174 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 17:15:33.149455 PCI: 00:15.1 scanning...
1004 17:15:33.152824 scan_static_bus for PCI: 00:15.1
1005 17:15:33.153278 I2C: 00:10 enabled
1006 17:15:33.156714 scan_static_bus for PCI: 00:15.1 done
1007 17:15:33.162930 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 17:15:33.166338 PCI: 00:15.2 scanning...
1009 17:15:33.169592 scan_static_bus for PCI: 00:15.2
1010 17:15:33.173074 scan_static_bus for PCI: 00:15.2 done
1011 17:15:33.176283 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 17:15:33.179549 PCI: 00:15.3 scanning...
1013 17:15:33.182663 scan_static_bus for PCI: 00:15.3
1014 17:15:33.186150 scan_static_bus for PCI: 00:15.3 done
1015 17:15:33.192979 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 17:15:33.193587 PCI: 00:19.1 scanning...
1017 17:15:33.196105 scan_static_bus for PCI: 00:19.1
1018 17:15:33.198958 I2C: 00:15 enabled
1019 17:15:33.202743 scan_static_bus for PCI: 00:19.1 done
1020 17:15:33.209555 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 17:15:33.210168 PCI: 00:1d.0 scanning...
1022 17:15:33.215611 do_pci_scan_bridge for PCI: 00:1d.0
1023 17:15:33.216185 PCI: pci_scan_bus for bus 01
1024 17:15:33.218769 PCI: 01:00.0 [15b7/5009] enabled
1025 17:15:33.222385 GENERIC: 0.0 enabled
1026 17:15:33.225686 Enabling Common Clock Configuration
1027 17:15:33.232114 L1 Sub-State supported from root port 29
1028 17:15:33.232672 L1 Sub-State Support = 0x5
1029 17:15:33.235902 CommonModeRestoreTime = 0x28
1030 17:15:33.242117 Power On Value = 0x16, Power On Scale = 0x0
1031 17:15:33.242680 ASPM: Enabled L1
1032 17:15:33.246123 PCIe: Max_Payload_Size adjusted to 128
1033 17:15:33.249520 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 17:15:33.252773 PCI: 00:1e.2 scanning...
1035 17:15:33.256341 scan_generic_bus for PCI: 00:1e.2
1036 17:15:33.259539 SPI: 00 enabled
1037 17:15:33.266268 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 17:15:33.269678 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 17:15:33.272952 PCI: 00:1e.3 scanning...
1040 17:15:33.276396 scan_generic_bus for PCI: 00:1e.3
1041 17:15:33.276956 SPI: 00 enabled
1042 17:15:33.282812 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 17:15:33.289449 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 17:15:33.292766 PCI: 00:1f.0 scanning...
1045 17:15:33.295749 scan_static_bus for PCI: 00:1f.0
1046 17:15:33.296308 PNP: 0c09.0 enabled
1047 17:15:33.298957 PNP: 0c09.0 scanning...
1048 17:15:33.302616 scan_static_bus for PNP: 0c09.0
1049 17:15:33.305795 scan_static_bus for PNP: 0c09.0 done
1050 17:15:33.312521 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 17:15:33.315590 scan_static_bus for PCI: 00:1f.0 done
1052 17:15:33.318811 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 17:15:33.322414 PCI: 00:1f.2 scanning...
1054 17:15:33.325235 scan_static_bus for PCI: 00:1f.2
1055 17:15:33.328513 GENERIC: 0.0 enabled
1056 17:15:33.328970 GENERIC: 0.0 scanning...
1057 17:15:33.332524 scan_static_bus for GENERIC: 0.0
1058 17:15:33.335327 GENERIC: 0.0 enabled
1059 17:15:33.339097 GENERIC: 1.0 enabled
1060 17:15:33.341957 scan_static_bus for GENERIC: 0.0 done
1061 17:15:33.345780 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 17:15:33.351869 scan_static_bus for PCI: 00:1f.2 done
1063 17:15:33.355510 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 17:15:33.358865 PCI: 00:1f.3 scanning...
1065 17:15:33.362076 scan_static_bus for PCI: 00:1f.3
1066 17:15:33.365607 scan_static_bus for PCI: 00:1f.3 done
1067 17:15:33.369050 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 17:15:33.372368 PCI: 00:1f.5 scanning...
1069 17:15:33.375453 scan_generic_bus for PCI: 00:1f.5
1070 17:15:33.378886 scan_generic_bus for PCI: 00:1f.5 done
1071 17:15:33.385364 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 17:15:33.388770 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1073 17:15:33.391933 scan_static_bus for Root Device done
1074 17:15:33.398671 scan_bus: bus Root Device finished in 735 msecs
1075 17:15:33.399231 done
1076 17:15:33.405149 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1077 17:15:33.408919 Chrome EC: UHEPI supported
1078 17:15:33.414975 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 17:15:33.421754 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 17:15:33.424668 SPI flash protection: WPSW=0 SRP0=1
1081 17:15:33.427890 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 17:15:33.434358 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 17:15:33.438084 found VGA at PCI: 00:02.0
1084 17:15:33.441350 Setting up VGA for PCI: 00:02.0
1085 17:15:33.444719 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 17:15:33.451351 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 17:15:33.454612 Allocating resources...
1088 17:15:33.455073 Reading resources...
1089 17:15:33.457925 Root Device read_resources bus 0 link: 0
1090 17:15:33.464923 DOMAIN: 0000 read_resources bus 0 link: 0
1091 17:15:33.467882 PCI: 00:04.0 read_resources bus 1 link: 0
1092 17:15:33.475015 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 17:15:33.477868 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 17:15:33.484122 USB0 port 0 read_resources bus 0 link: 0
1095 17:15:33.487747 USB0 port 0 read_resources bus 0 link: 0 done
1096 17:15:33.494174 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 17:15:33.497100 PCI: 00:14.0 read_resources bus 0 link: 0
1098 17:15:33.500360 USB0 port 0 read_resources bus 0 link: 0
1099 17:15:33.509051 USB0 port 0 read_resources bus 0 link: 0 done
1100 17:15:33.511457 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 17:15:33.518593 PCI: 00:14.3 read_resources bus 0 link: 0
1102 17:15:33.522043 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 17:15:33.528955 PCI: 00:15.0 read_resources bus 0 link: 0
1104 17:15:33.532042 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 17:15:33.538351 PCI: 00:15.1 read_resources bus 0 link: 0
1106 17:15:33.541197 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 17:15:33.548808 PCI: 00:19.1 read_resources bus 0 link: 0
1108 17:15:33.551932 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 17:15:33.558638 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 17:15:33.562081 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 17:15:33.569026 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 17:15:33.572015 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 17:15:33.578693 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 17:15:33.581459 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 17:15:33.588686 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 17:15:33.591927 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 17:15:33.598755 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 17:15:33.601699 GENERIC: 0.0 read_resources bus 0 link: 0
1119 17:15:33.608271 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 17:15:33.611673 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 17:15:33.618232 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 17:15:33.621523 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 17:15:33.627808 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 17:15:33.631095 Root Device read_resources bus 0 link: 0 done
1125 17:15:33.634164 Done reading resources.
1126 17:15:33.640725 Show resources in subtree (Root Device)...After reading.
1127 17:15:33.644247 Root Device child on link 0 DOMAIN: 0000
1128 17:15:33.647274 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 17:15:33.657240 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 17:15:33.667266 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 17:15:33.670730 PCI: 00:00.0
1132 17:15:33.680543 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 17:15:33.687514 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 17:15:33.696883 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 17:15:33.706833 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 17:15:33.716908 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 17:15:33.726661 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 17:15:33.736711 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 17:15:33.743205 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 17:15:33.752949 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 17:15:33.762557 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 17:15:33.772647 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 17:15:33.782960 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 17:15:33.792758 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 17:15:33.798903 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 17:15:33.809147 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 17:15:33.819088 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 17:15:33.828764 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 17:15:33.839182 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 17:15:33.848288 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 17:15:33.858326 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 17:15:33.858833 PCI: 00:02.0
1153 17:15:33.868114 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 17:15:33.881642 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 17:15:33.888365 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 17:15:33.891729 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 17:15:33.902112 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 17:15:33.904596 GENERIC: 0.0
1159 17:15:33.907476 PCI: 00:05.0
1160 17:15:33.918179 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 17:15:33.921032 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 17:15:33.924458 GENERIC: 0.0
1163 17:15:33.925012 PCI: 00:08.0
1164 17:15:33.934050 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 17:15:33.937368 PCI: 00:0a.0
1166 17:15:33.940591 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 17:15:33.950546 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 17:15:33.953861 USB0 port 0 child on link 0 USB3 port 0
1169 17:15:33.956994 USB3 port 0
1170 17:15:33.957450 USB3 port 1
1171 17:15:33.960348 USB3 port 2
1172 17:15:33.960856 USB3 port 3
1173 17:15:33.966682 PCI: 00:14.0 child on link 0 USB0 port 0
1174 17:15:33.976623 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 17:15:33.980619 USB0 port 0 child on link 0 USB2 port 0
1176 17:15:33.983309 USB2 port 0
1177 17:15:33.983765 USB2 port 1
1178 17:15:33.987101 USB2 port 2
1179 17:15:33.987659 USB2 port 3
1180 17:15:33.990463 USB2 port 4
1181 17:15:33.991021 USB2 port 5
1182 17:15:33.993905 USB2 port 6
1183 17:15:33.994458 USB2 port 7
1184 17:15:33.996902 USB2 port 8
1185 17:15:34.000134 USB2 port 9
1186 17:15:34.000687 USB3 port 0
1187 17:15:34.002962 USB3 port 1
1188 17:15:34.003420 USB3 port 2
1189 17:15:34.006111 USB3 port 3
1190 17:15:34.006568 PCI: 00:14.2
1191 17:15:34.016856 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 17:15:34.026461 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 17:15:34.033058 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 17:15:34.042611 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 17:15:34.043159 GENERIC: 0.0
1196 17:15:34.045703 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 17:15:34.055879 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 17:15:34.059043 I2C: 00:1a
1199 17:15:34.059615 I2C: 00:31
1200 17:15:34.062104 I2C: 00:32
1201 17:15:34.065793 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 17:15:34.075911 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 17:15:34.079248 I2C: 00:10
1204 17:15:34.079801 PCI: 00:15.2
1205 17:15:34.088720 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 17:15:34.092133 PCI: 00:15.3
1207 17:15:34.102084 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 17:15:34.102713 PCI: 00:16.0
1209 17:15:34.112070 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 17:15:34.115825 PCI: 00:19.0
1211 17:15:34.118273 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 17:15:34.128375 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 17:15:34.131866 I2C: 00:15
1214 17:15:34.135303 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 17:15:34.145170 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 17:15:34.151504 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 17:15:34.161729 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 17:15:34.165199 GENERIC: 0.0
1219 17:15:34.165804 PCI: 01:00.0
1220 17:15:34.174700 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 17:15:34.184608 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1222 17:15:34.187978 PCI: 00:1e.0
1223 17:15:34.197649 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 17:15:34.201206 PCI: 00:1e.2 child on link 0 SPI: 00
1225 17:15:34.210852 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 17:15:34.214187 SPI: 00
1227 17:15:34.217326 PCI: 00:1e.3 child on link 0 SPI: 00
1228 17:15:34.227652 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 17:15:34.228209 SPI: 00
1230 17:15:34.234012 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 17:15:34.240483 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 17:15:34.243951 PNP: 0c09.0
1233 17:15:34.254007 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 17:15:34.256904 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 17:15:34.267325 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 17:15:34.276807 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 17:15:34.280095 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 17:15:34.283494 GENERIC: 0.0
1239 17:15:34.284043 GENERIC: 1.0
1240 17:15:34.286704 PCI: 00:1f.3
1241 17:15:34.296655 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 17:15:34.306406 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 17:15:34.306579 PCI: 00:1f.5
1244 17:15:34.316290 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 17:15:34.319544 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 17:15:34.322892 APIC: 00
1247 17:15:34.322996 APIC: 01
1248 17:15:34.323074 APIC: 05
1249 17:15:34.326185 APIC: 07
1250 17:15:34.326308 APIC: 02
1251 17:15:34.329596 APIC: 04
1252 17:15:34.329691 APIC: 06
1253 17:15:34.329786 APIC: 03
1254 17:15:34.339677 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 17:15:34.342560 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 17:15:34.349674 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 17:15:34.356250 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 17:15:34.359137 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 17:15:34.366107 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1260 17:15:34.372343 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1261 17:15:34.379141 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1262 17:15:34.385843 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1263 17:15:34.392292 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1264 17:15:34.399216 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1265 17:15:34.409569 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 17:15:34.416057 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1267 17:15:34.422696 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1268 17:15:34.426035 DOMAIN: 0000: Resource ranges:
1269 17:15:34.429520 * Base: 1000, Size: 800, Tag: 100
1270 17:15:34.432514 * Base: 1900, Size: e700, Tag: 100
1271 17:15:34.439262 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1272 17:15:34.445369 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1273 17:15:34.452662 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1274 17:15:34.458958 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1275 17:15:34.469103 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1276 17:15:34.475517 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1277 17:15:34.482289 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1278 17:15:34.491839 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1279 17:15:34.499077 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1280 17:15:34.505528 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1281 17:15:34.515125 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1282 17:15:34.521742 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1283 17:15:34.528555 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1284 17:15:34.538365 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1285 17:15:34.545094 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1286 17:15:34.552158 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1287 17:15:34.561738 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 17:15:34.568296 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 17:15:34.575119 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 17:15:34.585062 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1291 17:15:34.591183 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 17:15:34.598132 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 17:15:34.607687 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1294 17:15:34.614468 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1295 17:15:34.621057 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1296 17:15:34.624320 DOMAIN: 0000: Resource ranges:
1297 17:15:34.631172 * Base: 7fc00000, Size: 40400000, Tag: 200
1298 17:15:34.634165 * Base: d0000000, Size: 28000000, Tag: 200
1299 17:15:34.637739 * Base: fa000000, Size: 1000000, Tag: 200
1300 17:15:34.641136 * Base: fb001000, Size: 2fff000, Tag: 200
1301 17:15:34.647675 * Base: fe010000, Size: 2e000, Tag: 200
1302 17:15:34.651061 * Base: fe03f000, Size: d41000, Tag: 200
1303 17:15:34.654540 * Base: fed88000, Size: 8000, Tag: 200
1304 17:15:34.657678 * Base: fed93000, Size: d000, Tag: 200
1305 17:15:34.663886 * Base: feda2000, Size: 1e000, Tag: 200
1306 17:15:34.667161 * Base: fede0000, Size: 1220000, Tag: 200
1307 17:15:34.670477 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1308 17:15:34.680834 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1309 17:15:34.686960 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1310 17:15:34.693782 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1311 17:15:34.700305 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1312 17:15:34.706757 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1313 17:15:34.713532 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1314 17:15:34.720461 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1315 17:15:34.726708 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1316 17:15:34.732951 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1317 17:15:34.740160 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1318 17:15:34.746765 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1319 17:15:34.753292 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1320 17:15:34.759952 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1321 17:15:34.766153 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1322 17:15:34.773009 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1323 17:15:34.779514 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1324 17:15:34.786117 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1325 17:15:34.792447 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1326 17:15:34.799430 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1327 17:15:34.805841 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1328 17:15:34.812410 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1329 17:15:34.819081 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1330 17:15:34.825737 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1331 17:15:34.832045 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1332 17:15:34.835719 PCI: 00:1d.0: Resource ranges:
1333 17:15:34.842440 * Base: 7fc00000, Size: 100000, Tag: 200
1334 17:15:34.848862 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1335 17:15:34.855407 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1336 17:15:34.861793 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1337 17:15:34.868608 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1338 17:15:34.875418 Root Device assign_resources, bus 0 link: 0
1339 17:15:34.878289 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 17:15:34.888276 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1341 17:15:34.894800 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1342 17:15:34.904951 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1343 17:15:34.911733 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1344 17:15:34.914478 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 17:15:34.921353 PCI: 00:04.0 assign_resources, bus 1 link: 0
1346 17:15:34.927317 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1347 17:15:34.937443 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1348 17:15:34.944054 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1349 17:15:34.950951 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 17:15:34.954267 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1351 17:15:34.964239 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1352 17:15:34.967208 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 17:15:34.970660 PCI: 00:14.0 assign_resources, bus 0 link: 0
1354 17:15:34.980685 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1355 17:15:34.987192 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1356 17:15:34.997025 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1357 17:15:35.000216 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 17:15:35.007037 PCI: 00:14.3 assign_resources, bus 0 link: 0
1359 17:15:35.013973 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1360 17:15:35.017222 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 17:15:35.024109 PCI: 00:15.0 assign_resources, bus 0 link: 0
1362 17:15:35.030198 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1363 17:15:35.036737 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 17:15:35.040360 PCI: 00:15.1 assign_resources, bus 0 link: 0
1365 17:15:35.050141 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1366 17:15:35.056731 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1367 17:15:35.066631 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1368 17:15:35.073128 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1369 17:15:35.076500 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 17:15:35.083551 PCI: 00:19.1 assign_resources, bus 0 link: 0
1371 17:15:35.090127 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1372 17:15:35.102911 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1373 17:15:35.109576 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1374 17:15:35.112798 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 17:15:35.122830 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1376 17:15:35.129613 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1377 17:15:35.136113 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 17:15:35.142389 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 17:15:35.149277 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 17:15:35.152323 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 17:15:35.161966 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 17:15:35.165845 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 17:15:35.168570 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 17:15:35.175815 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 17:15:35.178799 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 17:15:35.185206 LPC: Trying to open IO window from 800 size 1ff
1387 17:15:35.191859 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 17:15:35.201721 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 17:15:35.208693 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 17:15:35.214971 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 17:15:35.218324 Root Device assign_resources, bus 0 link: 0
1392 17:15:35.221626 Done setting resources.
1393 17:15:35.228055 Show resources in subtree (Root Device)...After assigning values.
1394 17:15:35.231493 Root Device child on link 0 DOMAIN: 0000
1395 17:15:35.235085 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 17:15:35.244836 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 17:15:35.254526 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 17:15:35.258021 PCI: 00:00.0
1399 17:15:35.267846 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 17:15:35.274793 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 17:15:35.284440 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 17:15:35.294644 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 17:15:35.304213 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 17:15:35.314123 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1405 17:15:35.324114 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1406 17:15:35.330847 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1407 17:15:35.340887 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1408 17:15:35.350989 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1409 17:15:35.360561 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1410 17:15:35.370765 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1411 17:15:35.380248 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1412 17:15:35.386838 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1413 17:15:35.397008 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1414 17:15:35.407002 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1415 17:15:35.416351 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1416 17:15:35.426590 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1417 17:15:35.436519 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1418 17:15:35.446150 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1419 17:15:35.446571 PCI: 00:02.0
1420 17:15:35.456197 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1421 17:15:35.469589 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1422 17:15:35.475736 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1423 17:15:35.482423 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1424 17:15:35.492630 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1425 17:15:35.495585 GENERIC: 0.0
1426 17:15:35.495885 PCI: 00:05.0
1427 17:15:35.505650 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1428 17:15:35.512579 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1429 17:15:35.512883 GENERIC: 0.0
1430 17:15:35.515260 PCI: 00:08.0
1431 17:15:35.525422 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1432 17:15:35.525781 PCI: 00:0a.0
1433 17:15:35.532238 PCI: 00:0d.0 child on link 0 USB0 port 0
1434 17:15:35.541731 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1435 17:15:35.545444 USB0 port 0 child on link 0 USB3 port 0
1436 17:15:35.548369 USB3 port 0
1437 17:15:35.548755 USB3 port 1
1438 17:15:35.551749 USB3 port 2
1439 17:15:35.552137 USB3 port 3
1440 17:15:35.558272 PCI: 00:14.0 child on link 0 USB0 port 0
1441 17:15:35.568429 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1442 17:15:35.571505 USB0 port 0 child on link 0 USB2 port 0
1443 17:15:35.574490 USB2 port 0
1444 17:15:35.574572 USB2 port 1
1445 17:15:35.578013 USB2 port 2
1446 17:15:35.578095 USB2 port 3
1447 17:15:35.581149 USB2 port 4
1448 17:15:35.581230 USB2 port 5
1449 17:15:35.584559 USB2 port 6
1450 17:15:35.584645 USB2 port 7
1451 17:15:35.587628 USB2 port 8
1452 17:15:35.587710 USB2 port 9
1453 17:15:35.590950 USB3 port 0
1454 17:15:35.594253 USB3 port 1
1455 17:15:35.594364 USB3 port 2
1456 17:15:35.597825 USB3 port 3
1457 17:15:35.597949 PCI: 00:14.2
1458 17:15:35.607944 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1459 17:15:35.617382 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1460 17:15:35.624097 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1461 17:15:35.633746 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1462 17:15:35.634029 GENERIC: 0.0
1463 17:15:35.640868 PCI: 00:15.0 child on link 0 I2C: 00:1a
1464 17:15:35.650372 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1465 17:15:35.650795 I2C: 00:1a
1466 17:15:35.653752 I2C: 00:31
1467 17:15:35.654209 I2C: 00:32
1468 17:15:35.660280 PCI: 00:15.1 child on link 0 I2C: 00:10
1469 17:15:35.670383 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1470 17:15:35.670813 I2C: 00:10
1471 17:15:35.673760 PCI: 00:15.2
1472 17:15:35.683459 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1473 17:15:35.683904 PCI: 00:15.3
1474 17:15:35.693308 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1475 17:15:35.696949 PCI: 00:16.0
1476 17:15:35.706798 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1477 17:15:35.710307 PCI: 00:19.0
1478 17:15:35.713201 PCI: 00:19.1 child on link 0 I2C: 00:15
1479 17:15:35.723088 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1480 17:15:35.726406 I2C: 00:15
1481 17:15:35.729470 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1482 17:15:35.739688 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1483 17:15:35.749318 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1484 17:15:35.759688 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1485 17:15:35.762547 GENERIC: 0.0
1486 17:15:35.763089 PCI: 01:00.0
1487 17:15:35.775936 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1488 17:15:35.785772 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1489 17:15:35.786196 PCI: 00:1e.0
1490 17:15:35.799188 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1491 17:15:35.801924 PCI: 00:1e.2 child on link 0 SPI: 00
1492 17:15:35.812005 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1493 17:15:35.812487 SPI: 00
1494 17:15:35.818575 PCI: 00:1e.3 child on link 0 SPI: 00
1495 17:15:35.828696 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1496 17:15:35.829122 SPI: 00
1497 17:15:35.832269 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1498 17:15:35.841956 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1499 17:15:35.845136 PNP: 0c09.0
1500 17:15:35.851563 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1501 17:15:35.858401 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1502 17:15:35.865049 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1503 17:15:35.875151 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1504 17:15:35.881137 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1505 17:15:35.881220 GENERIC: 0.0
1506 17:15:35.884680 GENERIC: 1.0
1507 17:15:35.884762 PCI: 00:1f.3
1508 17:15:35.894347 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1509 17:15:35.907412 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1510 17:15:35.907496 PCI: 00:1f.5
1511 17:15:35.917399 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1512 17:15:35.920630 CPU_CLUSTER: 0 child on link 0 APIC: 00
1513 17:15:35.924162 APIC: 00
1514 17:15:35.924249 APIC: 01
1515 17:15:35.927396 APIC: 05
1516 17:15:35.927483 APIC: 07
1517 17:15:35.927552 APIC: 02
1518 17:15:35.930567 APIC: 04
1519 17:15:35.930662 APIC: 06
1520 17:15:35.934363 APIC: 03
1521 17:15:35.934466 Done allocating resources.
1522 17:15:35.940814 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1523 17:15:35.947270 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1524 17:15:35.950898 Configure GPIOs for I2S audio on UP4.
1525 17:15:35.957689 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1526 17:15:35.960931 Enabling resources...
1527 17:15:35.964394 PCI: 00:00.0 subsystem <- 8086/9a12
1528 17:15:35.967743 PCI: 00:00.0 cmd <- 06
1529 17:15:35.970731 PCI: 00:02.0 subsystem <- 8086/9a40
1530 17:15:35.974287 PCI: 00:02.0 cmd <- 03
1531 17:15:35.977230 PCI: 00:04.0 subsystem <- 8086/9a03
1532 17:15:35.980599 PCI: 00:04.0 cmd <- 02
1533 17:15:35.983627 PCI: 00:05.0 subsystem <- 8086/9a19
1534 17:15:35.983927 PCI: 00:05.0 cmd <- 02
1535 17:15:35.990813 PCI: 00:08.0 subsystem <- 8086/9a11
1536 17:15:35.991115 PCI: 00:08.0 cmd <- 06
1537 17:15:35.993864 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 17:15:35.997450 PCI: 00:0d.0 cmd <- 02
1539 17:15:36.000667 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 17:15:36.003820 PCI: 00:14.0 cmd <- 02
1541 17:15:36.007134 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 17:15:36.010451 PCI: 00:14.2 cmd <- 02
1543 17:15:36.013629 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 17:15:36.016952 PCI: 00:14.3 cmd <- 02
1545 17:15:36.020209 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 17:15:36.023855 PCI: 00:15.0 cmd <- 02
1547 17:15:36.026878 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 17:15:36.029972 PCI: 00:15.1 cmd <- 02
1549 17:15:36.033422 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 17:15:36.036998 PCI: 00:15.2 cmd <- 02
1551 17:15:36.040141 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 17:15:36.040503 PCI: 00:15.3 cmd <- 02
1553 17:15:36.046364 PCI: 00:16.0 subsystem <- 8086/a0e0
1554 17:15:36.046659 PCI: 00:16.0 cmd <- 02
1555 17:15:36.052781 PCI: 00:19.1 subsystem <- 8086/a0c6
1556 17:15:36.053132 PCI: 00:19.1 cmd <- 02
1557 17:15:36.056027 PCI: 00:1d.0 bridge ctrl <- 0013
1558 17:15:36.059374 PCI: 00:1d.0 subsystem <- 8086/a0b0
1559 17:15:36.063288 PCI: 00:1d.0 cmd <- 06
1560 17:15:36.066486 PCI: 00:1e.0 subsystem <- 8086/a0a8
1561 17:15:36.069245 PCI: 00:1e.0 cmd <- 06
1562 17:15:36.072804 PCI: 00:1e.2 subsystem <- 8086/a0aa
1563 17:15:36.075912 PCI: 00:1e.2 cmd <- 06
1564 17:15:36.079230 PCI: 00:1e.3 subsystem <- 8086/a0ab
1565 17:15:36.082449 PCI: 00:1e.3 cmd <- 02
1566 17:15:36.085464 PCI: 00:1f.0 subsystem <- 8086/a087
1567 17:15:36.088972 PCI: 00:1f.0 cmd <- 407
1568 17:15:36.092224 PCI: 00:1f.3 subsystem <- 8086/a0c8
1569 17:15:36.095679 PCI: 00:1f.3 cmd <- 02
1570 17:15:36.098943 PCI: 00:1f.5 subsystem <- 8086/a0a4
1571 17:15:36.101922 PCI: 00:1f.5 cmd <- 406
1572 17:15:36.105107 PCI: 01:00.0 cmd <- 02
1573 17:15:36.109295 done.
1574 17:15:36.112272 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1575 17:15:36.115484 Initializing devices...
1576 17:15:36.118601 Root Device init
1577 17:15:36.121890 Chrome EC: Set SMI mask to 0x0000000000000000
1578 17:15:36.129916 Chrome EC: clear events_b mask to 0x0000000000000000
1579 17:15:36.136212 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1580 17:15:36.143495 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1581 17:15:36.149610 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1582 17:15:36.153061 Chrome EC: Set WAKE mask to 0x0000000000000000
1583 17:15:36.160765 fw_config match found: DB_USB=USB3_ACTIVE
1584 17:15:36.164222 Configure Right Type-C port orientation for retimer
1585 17:15:36.167405 Root Device init finished in 47 msecs
1586 17:15:36.171617 PCI: 00:00.0 init
1587 17:15:36.175042 CPU TDP = 9 Watts
1588 17:15:36.175336 CPU PL1 = 9 Watts
1589 17:15:36.178624 CPU PL2 = 40 Watts
1590 17:15:36.181593 CPU PL4 = 83 Watts
1591 17:15:36.184858 PCI: 00:00.0 init finished in 8 msecs
1592 17:15:36.188466 PCI: 00:02.0 init
1593 17:15:36.188761 GMA: Found VBT in CBFS
1594 17:15:36.191735 GMA: Found valid VBT in CBFS
1595 17:15:36.198523 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1596 17:15:36.204801 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1597 17:15:36.208143 PCI: 00:02.0 init finished in 18 msecs
1598 17:15:36.211659 PCI: 00:05.0 init
1599 17:15:36.214890 PCI: 00:05.0 init finished in 0 msecs
1600 17:15:36.217756 PCI: 00:08.0 init
1601 17:15:36.221133 PCI: 00:08.0 init finished in 0 msecs
1602 17:15:36.224416 PCI: 00:14.0 init
1603 17:15:36.227948 PCI: 00:14.0 init finished in 0 msecs
1604 17:15:36.231416 PCI: 00:14.2 init
1605 17:15:36.234648 PCI: 00:14.2 init finished in 0 msecs
1606 17:15:36.237705 PCI: 00:15.0 init
1607 17:15:36.240618 I2C bus 0 version 0x3230302a
1608 17:15:36.244512 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1609 17:15:36.247365 PCI: 00:15.0 init finished in 6 msecs
1610 17:15:36.250562 PCI: 00:15.1 init
1611 17:15:36.250861 I2C bus 1 version 0x3230302a
1612 17:15:36.257271 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1613 17:15:36.260693 PCI: 00:15.1 init finished in 6 msecs
1614 17:15:36.261106 PCI: 00:15.2 init
1615 17:15:36.264092 I2C bus 2 version 0x3230302a
1616 17:15:36.267681 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1617 17:15:36.273647 PCI: 00:15.2 init finished in 6 msecs
1618 17:15:36.273947 PCI: 00:15.3 init
1619 17:15:36.277057 I2C bus 3 version 0x3230302a
1620 17:15:36.280412 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1621 17:15:36.283485 PCI: 00:15.3 init finished in 6 msecs
1622 17:15:36.287025 PCI: 00:16.0 init
1623 17:15:36.290294 PCI: 00:16.0 init finished in 0 msecs
1624 17:15:36.293405 PCI: 00:19.1 init
1625 17:15:36.296792 I2C bus 5 version 0x3230302a
1626 17:15:36.300113 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1627 17:15:36.303537 PCI: 00:19.1 init finished in 6 msecs
1628 17:15:36.306786 PCI: 00:1d.0 init
1629 17:15:36.310340 Initializing PCH PCIe bridge.
1630 17:15:36.313465 PCI: 00:1d.0 init finished in 3 msecs
1631 17:15:36.316623 PCI: 00:1f.0 init
1632 17:15:36.320028 IOAPIC: Initializing IOAPIC at 0xfec00000
1633 17:15:36.323448 IOAPIC: Bootstrap Processor Local APIC = 0x00
1634 17:15:36.326481 IOAPIC: ID = 0x02
1635 17:15:36.330139 IOAPIC: Dumping registers
1636 17:15:36.332999 reg 0x0000: 0x02000000
1637 17:15:36.333298 reg 0x0001: 0x00770020
1638 17:15:36.336428 reg 0x0002: 0x00000000
1639 17:15:36.340023 PCI: 00:1f.0 init finished in 21 msecs
1640 17:15:36.342939 PCI: 00:1f.2 init
1641 17:15:36.346308 Disabling ACPI via APMC.
1642 17:15:36.349977 APMC done.
1643 17:15:36.353572 PCI: 00:1f.2 init finished in 6 msecs
1644 17:15:36.364879 PCI: 01:00.0 init
1645 17:15:36.368352 PCI: 01:00.0 init finished in 0 msecs
1646 17:15:36.371364 PNP: 0c09.0 init
1647 17:15:36.378078 Google Chrome EC uptime: 8.307 seconds
1648 17:15:36.381445 Google Chrome AP resets since EC boot: 1
1649 17:15:36.385170 Google Chrome most recent AP reset causes:
1650 17:15:36.388121 0.455: 32775 shutdown: entering G3
1651 17:15:36.394741 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1652 17:15:36.398377 PNP: 0c09.0 init finished in 24 msecs
1653 17:15:36.404970 Devices initialized
1654 17:15:36.408392 Show all devs... After init.
1655 17:15:36.411755 Root Device: enabled 1
1656 17:15:36.412170 DOMAIN: 0000: enabled 1
1657 17:15:36.414693 CPU_CLUSTER: 0: enabled 1
1658 17:15:36.418186 PCI: 00:00.0: enabled 1
1659 17:15:36.421334 PCI: 00:02.0: enabled 1
1660 17:15:36.421749 PCI: 00:04.0: enabled 1
1661 17:15:36.424723 PCI: 00:05.0: enabled 1
1662 17:15:36.428361 PCI: 00:06.0: enabled 0
1663 17:15:36.431404 PCI: 00:07.0: enabled 0
1664 17:15:36.431787 PCI: 00:07.1: enabled 0
1665 17:15:36.434761 PCI: 00:07.2: enabled 0
1666 17:15:36.438115 PCI: 00:07.3: enabled 0
1667 17:15:36.441433 PCI: 00:08.0: enabled 1
1668 17:15:36.441859 PCI: 00:09.0: enabled 0
1669 17:15:36.444351 PCI: 00:0a.0: enabled 0
1670 17:15:36.447713 PCI: 00:0d.0: enabled 1
1671 17:15:36.450898 PCI: 00:0d.1: enabled 0
1672 17:15:36.451347 PCI: 00:0d.2: enabled 0
1673 17:15:36.454225 PCI: 00:0d.3: enabled 0
1674 17:15:36.457624 PCI: 00:0e.0: enabled 0
1675 17:15:36.461002 PCI: 00:10.2: enabled 1
1676 17:15:36.461394 PCI: 00:10.6: enabled 0
1677 17:15:36.464687 PCI: 00:10.7: enabled 0
1678 17:15:36.467756 PCI: 00:12.0: enabled 0
1679 17:15:36.470846 PCI: 00:12.6: enabled 0
1680 17:15:36.471228 PCI: 00:13.0: enabled 0
1681 17:15:36.474447 PCI: 00:14.0: enabled 1
1682 17:15:36.477474 PCI: 00:14.1: enabled 0
1683 17:15:36.480627 PCI: 00:14.2: enabled 1
1684 17:15:36.481102 PCI: 00:14.3: enabled 1
1685 17:15:36.483825 PCI: 00:15.0: enabled 1
1686 17:15:36.487486 PCI: 00:15.1: enabled 1
1687 17:15:36.490407 PCI: 00:15.2: enabled 1
1688 17:15:36.490791 PCI: 00:15.3: enabled 1
1689 17:15:36.493947 PCI: 00:16.0: enabled 1
1690 17:15:36.497655 PCI: 00:16.1: enabled 0
1691 17:15:36.498028 PCI: 00:16.2: enabled 0
1692 17:15:36.500467 PCI: 00:16.3: enabled 0
1693 17:15:36.503742 PCI: 00:16.4: enabled 0
1694 17:15:36.506810 PCI: 00:16.5: enabled 0
1695 17:15:36.507145 PCI: 00:17.0: enabled 0
1696 17:15:36.510222 PCI: 00:19.0: enabled 0
1697 17:15:36.513537 PCI: 00:19.1: enabled 1
1698 17:15:36.516783 PCI: 00:19.2: enabled 0
1699 17:15:36.517161 PCI: 00:1c.0: enabled 1
1700 17:15:36.519896 PCI: 00:1c.1: enabled 0
1701 17:15:36.523536 PCI: 00:1c.2: enabled 0
1702 17:15:36.526469 PCI: 00:1c.3: enabled 0
1703 17:15:36.526849 PCI: 00:1c.4: enabled 0
1704 17:15:36.529894 PCI: 00:1c.5: enabled 0
1705 17:15:36.533260 PCI: 00:1c.6: enabled 1
1706 17:15:36.536847 PCI: 00:1c.7: enabled 0
1707 17:15:36.537421 PCI: 00:1d.0: enabled 1
1708 17:15:36.540080 PCI: 00:1d.1: enabled 0
1709 17:15:36.543401 PCI: 00:1d.2: enabled 1
1710 17:15:36.546496 PCI: 00:1d.3: enabled 0
1711 17:15:36.546875 PCI: 00:1e.0: enabled 1
1712 17:15:36.549764 PCI: 00:1e.1: enabled 0
1713 17:15:36.552862 PCI: 00:1e.2: enabled 1
1714 17:15:36.556604 PCI: 00:1e.3: enabled 1
1715 17:15:36.556984 PCI: 00:1f.0: enabled 1
1716 17:15:36.559434 PCI: 00:1f.1: enabled 0
1717 17:15:36.563069 PCI: 00:1f.2: enabled 1
1718 17:15:36.566377 PCI: 00:1f.3: enabled 1
1719 17:15:36.566830 PCI: 00:1f.4: enabled 0
1720 17:15:36.569555 PCI: 00:1f.5: enabled 1
1721 17:15:36.572611 PCI: 00:1f.6: enabled 0
1722 17:15:36.572987 PCI: 00:1f.7: enabled 0
1723 17:15:36.576001 APIC: 00: enabled 1
1724 17:15:36.579249 GENERIC: 0.0: enabled 1
1725 17:15:36.583189 GENERIC: 0.0: enabled 1
1726 17:15:36.583670 GENERIC: 1.0: enabled 1
1727 17:15:36.585856 GENERIC: 0.0: enabled 1
1728 17:15:36.589272 GENERIC: 1.0: enabled 1
1729 17:15:36.592677 USB0 port 0: enabled 1
1730 17:15:36.593055 GENERIC: 0.0: enabled 1
1731 17:15:36.595551 USB0 port 0: enabled 1
1732 17:15:36.598815 GENERIC: 0.0: enabled 1
1733 17:15:36.599213 I2C: 00:1a: enabled 1
1734 17:15:36.602277 I2C: 00:31: enabled 1
1735 17:15:36.605694 I2C: 00:32: enabled 1
1736 17:15:36.606095 I2C: 00:10: enabled 1
1737 17:15:36.608819 I2C: 00:15: enabled 1
1738 17:15:36.612288 GENERIC: 0.0: enabled 0
1739 17:15:36.615348 GENERIC: 1.0: enabled 0
1740 17:15:36.615753 GENERIC: 0.0: enabled 1
1741 17:15:36.619018 SPI: 00: enabled 1
1742 17:15:36.622303 SPI: 00: enabled 1
1743 17:15:36.622811 PNP: 0c09.0: enabled 1
1744 17:15:36.625600 GENERIC: 0.0: enabled 1
1745 17:15:36.629017 USB3 port 0: enabled 1
1746 17:15:36.629465 USB3 port 1: enabled 1
1747 17:15:36.632448 USB3 port 2: enabled 0
1748 17:15:36.635253 USB3 port 3: enabled 0
1749 17:15:36.639009 USB2 port 0: enabled 0
1750 17:15:36.639408 USB2 port 1: enabled 1
1751 17:15:36.642418 USB2 port 2: enabled 1
1752 17:15:36.645290 USB2 port 3: enabled 0
1753 17:15:36.645843 USB2 port 4: enabled 1
1754 17:15:36.648683 USB2 port 5: enabled 0
1755 17:15:36.652143 USB2 port 6: enabled 0
1756 17:15:36.652558 USB2 port 7: enabled 0
1757 17:15:36.655172 USB2 port 8: enabled 0
1758 17:15:36.658614 USB2 port 9: enabled 0
1759 17:15:36.661847 USB3 port 0: enabled 0
1760 17:15:36.662225 USB3 port 1: enabled 1
1761 17:15:36.665573 USB3 port 2: enabled 0
1762 17:15:36.668272 USB3 port 3: enabled 0
1763 17:15:36.668662 GENERIC: 0.0: enabled 1
1764 17:15:36.672000 GENERIC: 1.0: enabled 1
1765 17:15:36.675262 APIC: 01: enabled 1
1766 17:15:36.675645 APIC: 05: enabled 1
1767 17:15:36.678341 APIC: 07: enabled 1
1768 17:15:36.681892 APIC: 02: enabled 1
1769 17:15:36.682342 APIC: 04: enabled 1
1770 17:15:36.684839 APIC: 06: enabled 1
1771 17:15:36.688448 APIC: 03: enabled 1
1772 17:15:36.688857 PCI: 01:00.0: enabled 1
1773 17:15:36.695177 BS: BS_DEV_INIT run times (exec / console): 35 / 540 ms
1774 17:15:36.698556 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1775 17:15:36.705009 ELOG: NV offset 0xf30000 size 0x1000
1776 17:15:36.711485 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1777 17:15:36.718342 ELOG: Event(17) added with size 13 at 2023-06-09 17:15:36 UTC
1778 17:15:36.724738 ELOG: Event(92) added with size 9 at 2023-06-09 17:15:36 UTC
1779 17:15:36.731256 ELOG: Event(93) added with size 9 at 2023-06-09 17:15:36 UTC
1780 17:15:36.737866 ELOG: Event(9E) added with size 10 at 2023-06-09 17:15:36 UTC
1781 17:15:36.744273 ELOG: Event(9F) added with size 14 at 2023-06-09 17:15:36 UTC
1782 17:15:36.747903 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1783 17:15:36.754146 ELOG: Event(A1) added with size 10 at 2023-06-09 17:15:36 UTC
1784 17:15:36.764229 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1785 17:15:36.767111 ELOG: Event(A0) added with size 9 at 2023-06-09 17:15:36 UTC
1786 17:15:36.773586 elog_add_boot_reason: Logged dev mode boot
1787 17:15:36.780913 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1788 17:15:36.781399 Finalize devices...
1789 17:15:36.783590 Devices finalized
1790 17:15:36.787200 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1791 17:15:36.793605 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1792 17:15:36.800230 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1793 17:15:36.803700 ME: HFSTS1 : 0x80030055
1794 17:15:36.807274 ME: HFSTS2 : 0x30280116
1795 17:15:36.813793 ME: HFSTS3 : 0x00000050
1796 17:15:36.816747 ME: HFSTS4 : 0x00004000
1797 17:15:36.823307 ME: HFSTS5 : 0x00000000
1798 17:15:36.826800 ME: HFSTS6 : 0x40400006
1799 17:15:36.830306 ME: Manufacturing Mode : YES
1800 17:15:36.833233 ME: SPI Protection Mode Enabled : NO
1801 17:15:36.836531 ME: FW Partition Table : OK
1802 17:15:36.839957 ME: Bringup Loader Failure : NO
1803 17:15:36.846680 ME: Firmware Init Complete : NO
1804 17:15:36.849935 ME: Boot Options Present : NO
1805 17:15:36.853152 ME: Update In Progress : NO
1806 17:15:36.856434 ME: D0i3 Support : YES
1807 17:15:36.859854 ME: Low Power State Enabled : NO
1808 17:15:36.863305 ME: CPU Replaced : YES
1809 17:15:36.866250 ME: CPU Replacement Valid : YES
1810 17:15:36.869677 ME: Current Working State : 5
1811 17:15:36.876266 ME: Current Operation State : 1
1812 17:15:36.879577 ME: Current Operation Mode : 3
1813 17:15:36.883145 ME: Error Code : 0
1814 17:15:36.886046 ME: Enhanced Debug Mode : NO
1815 17:15:36.889389 ME: CPU Debug Disabled : YES
1816 17:15:36.892985 ME: TXT Support : NO
1817 17:15:36.899459 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1818 17:15:36.905936 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1819 17:15:36.909345 CBFS: 'fallback/slic' not found.
1820 17:15:36.912769 ACPI: Writing ACPI tables at 76b01000.
1821 17:15:36.915899 ACPI: * FACS
1822 17:15:36.916143 ACPI: * DSDT
1823 17:15:36.923083 Ramoops buffer: 0x100000@0x76a00000.
1824 17:15:36.925749 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1825 17:15:36.929028 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1826 17:15:36.933243 Google Chrome EC: version:
1827 17:15:36.936593 ro: voema_v2.0.10114-a447f03e46
1828 17:15:36.939730 rw: voema_v2.0.10114-a447f03e46
1829 17:15:36.943314 running image: 2
1830 17:15:36.949464 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1831 17:15:36.952995 ACPI: * FADT
1832 17:15:36.953191 SCI is IRQ9
1833 17:15:36.959718 ACPI: added table 1/32, length now 40
1834 17:15:36.960083 ACPI: * SSDT
1835 17:15:36.963024 Found 1 CPU(s) with 8 core(s) each.
1836 17:15:36.969353 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1837 17:15:36.973005 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1838 17:15:36.975939 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1839 17:15:36.979397 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1840 17:15:36.985844 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1841 17:15:36.992448 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1842 17:15:36.995779 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1843 17:15:37.002766 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1844 17:15:37.008951 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1845 17:15:37.012813 \_SB.PCI0.RP09: Added StorageD3Enable property
1846 17:15:37.018995 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1847 17:15:37.022132 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1848 17:15:37.029182 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1849 17:15:37.032836 PS2K: Passing 80 keymaps to kernel
1850 17:15:37.039302 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1851 17:15:37.045790 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1852 17:15:37.052360 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1853 17:15:37.059324 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1854 17:15:37.065605 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1855 17:15:37.072473 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1856 17:15:37.079021 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1857 17:15:37.086133 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1858 17:15:37.088873 ACPI: added table 2/32, length now 44
1859 17:15:37.092269 ACPI: * MCFG
1860 17:15:37.095535 ACPI: added table 3/32, length now 48
1861 17:15:37.095638 ACPI: * TPM2
1862 17:15:37.099111 TPM2 log created at 0x769f0000
1863 17:15:37.101917 ACPI: added table 4/32, length now 52
1864 17:15:37.105472 ACPI: * MADT
1865 17:15:37.105602 SCI is IRQ9
1866 17:15:37.108587 ACPI: added table 5/32, length now 56
1867 17:15:37.112615 current = 76b09850
1868 17:15:37.112778 ACPI: * DMAR
1869 17:15:37.118484 ACPI: added table 6/32, length now 60
1870 17:15:37.121958 ACPI: added table 7/32, length now 64
1871 17:15:37.122139 ACPI: * HPET
1872 17:15:37.125386 ACPI: added table 8/32, length now 68
1873 17:15:37.128722 ACPI: done.
1874 17:15:37.132149 ACPI tables: 35216 bytes.
1875 17:15:37.135600 smbios_write_tables: 769ef000
1876 17:15:37.138483 EC returned error result code 3
1877 17:15:37.141937 Couldn't obtain OEM name from CBI
1878 17:15:37.145616 Create SMBIOS type 16
1879 17:15:37.149126 Create SMBIOS type 17
1880 17:15:37.149631 GENERIC: 0.0 (WIFI Device)
1881 17:15:37.152059 SMBIOS tables: 1734 bytes.
1882 17:15:37.155449 Writing table forward entry at 0x00000500
1883 17:15:37.161831 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1884 17:15:37.165108 Writing coreboot table at 0x76b25000
1885 17:15:37.171895 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1886 17:15:37.178650 1. 0000000000001000-000000000009ffff: RAM
1887 17:15:37.181473 2. 00000000000a0000-00000000000fffff: RESERVED
1888 17:15:37.184935 3. 0000000000100000-00000000769eefff: RAM
1889 17:15:37.191216 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1890 17:15:37.197932 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1891 17:15:37.201518 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1892 17:15:37.208137 7. 0000000077000000-000000007fbfffff: RESERVED
1893 17:15:37.211430 8. 00000000c0000000-00000000cfffffff: RESERVED
1894 17:15:37.217981 9. 00000000f8000000-00000000f9ffffff: RESERVED
1895 17:15:37.221306 10. 00000000fb000000-00000000fb000fff: RESERVED
1896 17:15:37.228062 11. 00000000fe000000-00000000fe00ffff: RESERVED
1897 17:15:37.231268 12. 00000000fed80000-00000000fed87fff: RESERVED
1898 17:15:37.237622 13. 00000000fed90000-00000000fed92fff: RESERVED
1899 17:15:37.240706 14. 00000000feda0000-00000000feda1fff: RESERVED
1900 17:15:37.244154 15. 00000000fedc0000-00000000feddffff: RESERVED
1901 17:15:37.250874 16. 0000000100000000-00000004803fffff: RAM
1902 17:15:37.254073 Passing 4 GPIOs to payload:
1903 17:15:37.257554 NAME | PORT | POLARITY | VALUE
1904 17:15:37.264576 lid | undefined | high | high
1905 17:15:37.267635 power | undefined | high | low
1906 17:15:37.274561 oprom | undefined | high | low
1907 17:15:37.280554 EC in RW | 0x000000e5 | high | high
1908 17:15:37.284099 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1909 17:15:37.287317 coreboot table: 1576 bytes.
1910 17:15:37.290613 IMD ROOT 0. 0x76fff000 0x00001000
1911 17:15:37.297479 IMD SMALL 1. 0x76ffe000 0x00001000
1912 17:15:37.300511 FSP MEMORY 2. 0x76c4e000 0x003b0000
1913 17:15:37.303683 VPD 3. 0x76c4d000 0x00000367
1914 17:15:37.307159 RO MCACHE 4. 0x76c4c000 0x00000fdc
1915 17:15:37.310666 CONSOLE 5. 0x76c2c000 0x00020000
1916 17:15:37.314327 FMAP 6. 0x76c2b000 0x00000578
1917 17:15:37.317282 TIME STAMP 7. 0x76c2a000 0x00000910
1918 17:15:37.320516 VBOOT WORK 8. 0x76c16000 0x00014000
1919 17:15:37.326863 ROMSTG STCK 9. 0x76c15000 0x00001000
1920 17:15:37.330598 AFTER CAR 10. 0x76c0a000 0x0000b000
1921 17:15:37.333739 RAMSTAGE 11. 0x76b97000 0x00073000
1922 17:15:37.337061 REFCODE 12. 0x76b42000 0x00055000
1923 17:15:37.340362 SMM BACKUP 13. 0x76b32000 0x00010000
1924 17:15:37.343454 4f444749 14. 0x76b30000 0x00002000
1925 17:15:37.346614 EXT VBT15. 0x76b2d000 0x0000219f
1926 17:15:37.349939 COREBOOT 16. 0x76b25000 0x00008000
1927 17:15:37.356934 ACPI 17. 0x76b01000 0x00024000
1928 17:15:37.360019 ACPI GNVS 18. 0x76b00000 0x00001000
1929 17:15:37.363305 RAMOOPS 19. 0x76a00000 0x00100000
1930 17:15:37.366775 TPM2 TCGLOG20. 0x769f0000 0x00010000
1931 17:15:37.369837 SMBIOS 21. 0x769ef000 0x00000800
1932 17:15:37.373281 IMD small region:
1933 17:15:37.376413 IMD ROOT 0. 0x76ffec00 0x00000400
1934 17:15:37.379839 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1935 17:15:37.382962 POWER STATE 2. 0x76ffeb80 0x00000044
1936 17:15:37.386735 ROMSTAGE 3. 0x76ffeb60 0x00000004
1937 17:15:37.393295 MEM INFO 4. 0x76ffe980 0x000001e0
1938 17:15:37.396275 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1939 17:15:37.399387 MTRR: Physical address space:
1940 17:15:37.405920 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1941 17:15:37.412821 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1942 17:15:37.419320 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1943 17:15:37.426128 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1944 17:15:37.432634 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1945 17:15:37.438847 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1946 17:15:37.445597 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1947 17:15:37.449054 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 17:15:37.452445 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 17:15:37.455593 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 17:15:37.462193 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 17:15:37.465425 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 17:15:37.468751 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 17:15:37.471831 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 17:15:37.475347 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 17:15:37.482085 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 17:15:37.485308 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 17:15:37.488659 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 17:15:37.493005 call enable_fixed_mtrr()
1959 17:15:37.496500 CPU physical address size: 39 bits
1960 17:15:37.502891 MTRR: default type WB/UC MTRR counts: 6/7.
1961 17:15:37.506137 MTRR: WB selected as default type.
1962 17:15:37.513056 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1963 17:15:37.515991 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1964 17:15:37.522559 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1965 17:15:37.529440 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1966 17:15:37.535830 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1967 17:15:37.542348 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1968 17:15:37.549428 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 17:15:37.552630 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 17:15:37.555974 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 17:15:37.559618 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 17:15:37.565764 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 17:15:37.569232 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 17:15:37.572920 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 17:15:37.575827 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 17:15:37.582511 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 17:15:37.585934 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 17:15:37.589077 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 17:15:37.589369
1980 17:15:37.593476 MTRR check
1981 17:15:37.596532 call enable_fixed_mtrr()
1982 17:15:37.596822 Fixed MTRRs : Enabled
1983 17:15:37.599877 Variable MTRRs: Enabled
1984 17:15:37.600167
1985 17:15:37.602968 CPU physical address size: 39 bits
1986 17:15:37.610697 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
1987 17:15:37.614044 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 17:15:37.620700 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 17:15:37.624291 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 17:15:37.627504 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 17:15:37.630686 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 17:15:37.637093 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 17:15:37.640409 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 17:15:37.643749 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 17:15:37.647170 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 17:15:37.653541 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 17:15:37.656832 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 17:15:37.660211 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 17:15:37.667952 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 17:15:37.668236 call enable_fixed_mtrr()
2001 17:15:37.674343 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 17:15:37.677536 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 17:15:37.681081 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 17:15:37.684113 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 17:15:37.690942 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 17:15:37.694500 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 17:15:37.697577 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 17:15:37.700816 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 17:15:37.707401 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 17:15:37.710794 CPU physical address size: 39 bits
2011 17:15:37.714781 call enable_fixed_mtrr()
2012 17:15:37.718510 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 17:15:37.724827 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 17:15:37.728499 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 17:15:37.731899 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 17:15:37.734924 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 17:15:37.741373 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 17:15:37.744948 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 17:15:37.748104 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 17:15:37.751426 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 17:15:37.757831 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 17:15:37.760971 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 17:15:37.764322 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 17:15:37.771395 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 17:15:37.774703 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 17:15:37.778057 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 17:15:37.781627 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 17:15:37.788219 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 17:15:37.791495 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 17:15:37.794472 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 17:15:37.797927 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 17:15:37.804429 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 17:15:37.807921 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 17:15:37.811151 call enable_fixed_mtrr()
2035 17:15:37.814265 call enable_fixed_mtrr()
2036 17:15:37.817500 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 17:15:37.821040 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 17:15:37.827678 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 17:15:37.831020 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 17:15:37.834051 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 17:15:37.837601 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 17:15:37.844259 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 17:15:37.847422 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 17:15:37.851134 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 17:15:37.854132 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 17:15:37.857214 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 17:15:37.864202 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 17:15:37.867248 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 17:15:37.874800 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 17:15:37.877443 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 17:15:37.881148 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 17:15:37.884778 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 17:15:37.891210 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 17:15:37.894282 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 17:15:37.897715 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 17:15:37.900978 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 17:15:37.907655 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 17:15:37.910707 call enable_fixed_mtrr()
2059 17:15:37.913483 call enable_fixed_mtrr()
2060 17:15:37.917311 CPU physical address size: 39 bits
2061 17:15:37.920824 CPU physical address size: 39 bits
2062 17:15:37.926902 CPU physical address size: 39 bits
2063 17:15:37.930358 CPU physical address size: 39 bits
2064 17:15:37.933092 CPU physical address size: 39 bits
2065 17:15:37.936674 Checking cr50 for pending updates
2066 17:15:37.944117 Reading cr50 TPM mode
2067 17:15:37.954774 BS: BS_PAYLOAD_LOAD entry times (exec / console): 331 / 6 ms
2068 17:15:37.964871 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2069 17:15:37.968027 Checking segment from ROM address 0xffc02b38
2070 17:15:37.971219 Checking segment from ROM address 0xffc02b54
2071 17:15:37.977841 Loading segment from ROM address 0xffc02b38
2072 17:15:37.978394 code (compression=0)
2073 17:15:37.987897 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2074 17:15:37.997596 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2075 17:15:37.998154 it's not compressed!
2076 17:15:38.137931 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2077 17:15:38.144814 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2078 17:15:38.151059 Loading segment from ROM address 0xffc02b54
2079 17:15:38.154489 Entry Point 0x30000000
2080 17:15:38.154942 Loaded segments
2081 17:15:38.161388 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2082 17:15:38.206176 Finalizing chipset.
2083 17:15:38.209431 Finalizing SMM.
2084 17:15:38.209914 APMC done.
2085 17:15:38.216242 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2086 17:15:38.219280 mp_park_aps done after 0 msecs.
2087 17:15:38.222386 Jumping to boot code at 0x30000000(0x76b25000)
2088 17:15:38.232527 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2089 17:15:38.233116
2090 17:15:38.233523
2091 17:15:38.236088
2092 17:15:38.236572 Starting depthcharge on Voema...
2093 17:15:38.237748 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2094 17:15:38.238282 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2095 17:15:38.238733 Setting prompt string to ['volteer:']
2096 17:15:38.239161 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2097 17:15:38.239894
2098 17:15:38.245668 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2099 17:15:38.246137
2100 17:15:38.252253 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2101 17:15:38.252874
2102 17:15:38.259312 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2103 17:15:38.259777
2104 17:15:38.262412 Failed to find eMMC card reader
2105 17:15:38.262875
2106 17:15:38.263242 Wipe memory regions:
2107 17:15:38.265402
2108 17:15:38.268801 [0x00000000001000, 0x000000000a0000)
2109 17:15:38.269448
2110 17:15:38.271962 [0x00000000100000, 0x00000030000000)
2111 17:15:38.306826
2112 17:15:38.309615 [0x00000032662db0, 0x000000769ef000)
2113 17:15:38.356968
2114 17:15:38.360463 [0x00000100000000, 0x00000480400000)
2115 17:15:38.971151
2116 17:15:38.974040 ec_init: CrosEC protocol v3 supported (256, 256)
2117 17:15:39.405539
2118 17:15:39.406112 R8152: Initializing
2119 17:15:39.406482
2120 17:15:39.408861 Version 6 (ocp_data = 5c30)
2121 17:15:39.409426
2122 17:15:39.411936 R8152: Done initializing
2123 17:15:39.412501
2124 17:15:39.414876 Adding net device
2125 17:15:39.717067
2126 17:15:39.720022 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2127 17:15:39.720588
2128 17:15:39.720958
2129 17:15:39.721302
2130 17:15:39.724022 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 17:15:39.825821 volteer: tftpboot 192.168.201.1 10664126/tftp-deploy-18pbf9jt/kernel/bzImage 10664126/tftp-deploy-18pbf9jt/kernel/cmdline 10664126/tftp-deploy-18pbf9jt/ramdisk/ramdisk.cpio.gz
2133 17:15:39.826495 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 17:15:39.826956 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2135 17:15:39.832163 tftpboot 192.168.201.1 10664126/tftp-deploy-18pbf9jt/kernel/bzIploy-18pbf9jt/kernel/cmdline 10664126/tftp-deploy-18pbf9jt/ramdisk/ramdisk.cpio.gz
2136 17:15:39.832762
2137 17:15:39.833134 Waiting for link
2138 17:15:40.035689
2139 17:15:40.036250 done.
2140 17:15:40.036625
2141 17:15:40.037017 MAC: 00:24:32:30:78:e4
2142 17:15:40.037370
2143 17:15:40.039180 Sending DHCP discover... done.
2144 17:15:40.039641
2145 17:15:40.042117 Waiting for reply... done.
2146 17:15:40.042584
2147 17:15:40.045565 Sending DHCP request... done.
2148 17:15:40.046031
2149 17:15:40.049157 Waiting for reply... done.
2150 17:15:40.049665
2151 17:15:40.052405 My ip is 192.168.201.13
2152 17:15:40.052873
2153 17:15:40.055314 The DHCP server ip is 192.168.201.1
2154 17:15:40.055784
2155 17:15:40.058480 TFTP server IP predefined by user: 192.168.201.1
2156 17:15:40.058948
2157 17:15:40.068385 Bootfile predefined by user: 10664126/tftp-deploy-18pbf9jt/kernel/bzImage
2158 17:15:40.069049
2159 17:15:40.071463 Sending tftp read request... done.
2160 17:15:40.071927
2161 17:15:40.078721 Waiting for the transfer...
2162 17:15:40.079294
2163 17:15:40.788113 00000000 ################################################################
2164 17:15:40.788804
2165 17:15:41.457421 00080000 ################################################################
2166 17:15:41.457962
2167 17:15:42.143595 00100000 ################################################################
2168 17:15:42.144187
2169 17:15:42.842854 00180000 ################################################################
2170 17:15:42.843411
2171 17:15:43.526594 00200000 ################################################################
2172 17:15:43.526841
2173 17:15:44.093838 00280000 ################################################################
2174 17:15:44.093974
2175 17:15:44.669927 00300000 ################################################################
2176 17:15:44.670427
2177 17:15:45.288137 00380000 ################################################################
2178 17:15:45.288273
2179 17:15:45.834001 00400000 ################################################################
2180 17:15:45.834138
2181 17:15:46.415201 00480000 ################################################################
2182 17:15:46.415339
2183 17:15:47.008894 00500000 ################################################################
2184 17:15:47.009035
2185 17:15:47.548851 00580000 ################################################################
2186 17:15:47.549006
2187 17:15:48.163775 00600000 ################################################################
2188 17:15:48.164446
2189 17:15:48.786450 00680000 ################################################################
2190 17:15:48.787200
2191 17:15:49.451470 00700000 ################################################################
2192 17:15:49.451609
2193 17:15:49.997279 00780000 ################################################################
2194 17:15:49.997430
2195 17:15:50.540755 00800000 ################################################################
2196 17:15:50.540924
2197 17:15:51.091313 00880000 ################################################################
2198 17:15:51.091478
2199 17:15:51.686818 00900000 ################################################################
2200 17:15:51.687506
2201 17:15:52.276174 00980000 ################################################################
2202 17:15:52.276328
2203 17:15:52.694117 00a00000 ############################################### done.
2204 17:15:52.694251
2205 17:15:52.697231 The bootfile was 10866688 bytes long.
2206 17:15:52.697319
2207 17:15:52.700602 Sending tftp read request... done.
2208 17:15:52.700696
2209 17:15:52.704054 Waiting for the transfer...
2210 17:15:52.704148
2211 17:15:53.331024 00000000 ################################################################
2212 17:15:53.331163
2213 17:15:53.892936 00080000 ################################################################
2214 17:15:53.893074
2215 17:15:54.450441 00100000 ################################################################
2216 17:15:54.450572
2217 17:15:55.029402 00180000 ################################################################
2218 17:15:55.029573
2219 17:15:55.627994 00200000 ################################################################
2220 17:15:55.628130
2221 17:15:56.200148 00280000 ################################################################
2222 17:15:56.200302
2223 17:15:56.741506 00300000 ################################################################
2224 17:15:56.741655
2225 17:15:57.278740 00380000 ################################################################
2226 17:15:57.278913
2227 17:15:57.821074 00400000 ################################################################
2228 17:15:57.821252
2229 17:15:58.376428 00480000 ################################################################
2230 17:15:58.376574
2231 17:15:58.918466 00500000 ################################################################
2232 17:15:58.918622
2233 17:15:59.448924 00580000 ################################################################
2234 17:15:59.449059
2235 17:16:00.017794 00600000 ################################################################
2236 17:16:00.018383
2237 17:16:00.642571 00680000 ################################################################
2238 17:16:00.642833
2239 17:16:01.340768 00700000 ################################################################
2240 17:16:01.341349
2241 17:16:02.064123 00780000 ################################################################
2242 17:16:02.064679
2243 17:16:02.755412 00800000 ################################################################
2244 17:16:02.756062
2245 17:16:03.151190 00880000 ###################################### done.
2246 17:16:03.151737
2247 17:16:03.154704 Sending tftp read request... done.
2248 17:16:03.155219
2249 17:16:03.158134 Waiting for the transfer...
2250 17:16:03.158600
2251 17:16:03.160861 00000000 # done.
2252 17:16:03.161340
2253 17:16:03.167573 Command line loaded dynamically from TFTP file: 10664126/tftp-deploy-18pbf9jt/kernel/cmdline
2254 17:16:03.170597
2255 17:16:03.180751 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2256 17:16:03.186861
2257 17:16:03.189824 Shutting down all USB controllers.
2258 17:16:03.190403
2259 17:16:03.190781 Removing current net device
2260 17:16:03.191141
2261 17:16:03.193164 Finalizing coreboot
2262 17:16:03.193655
2263 17:16:03.200197 Exiting depthcharge with code 4 at timestamp: 33551987
2264 17:16:03.200767
2265 17:16:03.201145
2266 17:16:03.201527 Starting kernel ...
2267 17:16:03.201870
2268 17:16:03.203230 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2269 17:16:03.203773 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2270 17:16:03.204188 Setting prompt string to ['Linux version [0-9]']
2271 17:16:03.204574 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2272 17:16:03.204953 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2273 17:16:03.205875
2275 17:20:23.204015 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2277 17:20:23.204233 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2279 17:20:23.204398 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2282 17:20:23.204655 end: 2 depthcharge-action (duration 00:05:00) [common]
2284 17:20:23.204882 Cleaning after the job
2285 17:20:23.205033 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664126/tftp-deploy-18pbf9jt/ramdisk
2286 17:20:23.206242 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664126/tftp-deploy-18pbf9jt/kernel
2287 17:20:23.207557 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664126/tftp-deploy-18pbf9jt/modules
2288 17:20:23.208117 start: 5.1 power-off (timeout 00:00:30) [common]
2289 17:20:23.208280 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2290 17:20:23.283465 >> Command sent successfully.
2291 17:20:23.286004 Returned 0 in 0 seconds
2292 17:20:23.386390 end: 5.1 power-off (duration 00:00:00) [common]
2294 17:20:23.386731 start: 5.2 read-feedback (timeout 00:10:00) [common]
2295 17:20:23.386982 Listened to connection for namespace 'common' for up to 1s
2296 17:20:24.387947 Finalising connection for namespace 'common'
2297 17:20:24.388126 Disconnecting from shell: Finalise
2298 17:20:24.388208
2299 17:20:24.488541 end: 5.2 read-feedback (duration 00:00:01) [common]
2300 17:20:24.488697 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10664126
2301 17:20:24.503054 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10664126
2302 17:20:24.503214 JobError: Your job cannot terminate cleanly.