Boot log: asus-C436FA-Flip-hatch

    1 17:24:11.160417  lava-dispatcher, installed at version: 2023.05.1
    2 17:24:11.160653  start: 0 validate
    3 17:24:11.160803  Start time: 2023-06-09 17:24:11.160795+00:00 (UTC)
    4 17:24:11.160930  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:24:11.161061  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
    6 17:24:11.421656  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:24:11.421835  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.283-cip98-1248-gcaf6e8ee921e9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:24:11.673080  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:24:11.673301  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 17:24:11.930969  Using caching service: 'http://localhost/cache/?uri=%s'
   11 17:24:11.931226  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.283-cip98-1248-gcaf6e8ee921e9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 17:24:12.192104  validate duration: 1.03
   14 17:24:12.192374  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 17:24:12.192473  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 17:24:12.192568  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 17:24:12.192682  Not decompressing ramdisk as can be used compressed.
   18 17:24:12.192769  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/amd64/initrd.cpio.gz
   19 17:24:12.192837  saving as /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/ramdisk/initrd.cpio.gz
   20 17:24:12.192923  total size: 5432291 (5MB)
   21 17:24:12.194046  progress   0% (0MB)
   22 17:24:12.195737  progress   5% (0MB)
   23 17:24:12.197184  progress  10% (0MB)
   24 17:24:12.198629  progress  15% (0MB)
   25 17:24:12.200358  progress  20% (1MB)
   26 17:24:12.201803  progress  25% (1MB)
   27 17:24:12.203304  progress  30% (1MB)
   28 17:24:12.205025  progress  35% (1MB)
   29 17:24:12.206405  progress  40% (2MB)
   30 17:24:12.207894  progress  45% (2MB)
   31 17:24:12.209282  progress  50% (2MB)
   32 17:24:12.210863  progress  55% (2MB)
   33 17:24:12.212275  progress  60% (3MB)
   34 17:24:12.213642  progress  65% (3MB)
   35 17:24:12.215282  progress  70% (3MB)
   36 17:24:12.216643  progress  75% (3MB)
   37 17:24:12.218021  progress  80% (4MB)
   38 17:24:12.219606  progress  85% (4MB)
   39 17:24:12.221374  progress  90% (4MB)
   40 17:24:12.222954  progress  95% (4MB)
   41 17:24:12.224763  progress 100% (5MB)
   42 17:24:12.225066  5MB downloaded in 0.03s (161.19MB/s)
   43 17:24:12.225239  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 17:24:12.225550  end: 1.1 download-retry (duration 00:00:00) [common]
   46 17:24:12.225689  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 17:24:12.225789  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 17:24:12.225924  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.283-cip98-1248-gcaf6e8ee921e9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 17:24:12.226008  saving as /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/kernel/bzImage
   50 17:24:12.226073  total size: 10866688 (10MB)
   51 17:24:12.226150  No compression specified
   52 17:24:12.227488  progress   0% (0MB)
   53 17:24:12.230834  progress   5% (0MB)
   54 17:24:12.234243  progress  10% (1MB)
   55 17:24:12.237205  progress  15% (1MB)
   56 17:24:12.240153  progress  20% (2MB)
   57 17:24:12.242934  progress  25% (2MB)
   58 17:24:12.245908  progress  30% (3MB)
   59 17:24:12.249065  progress  35% (3MB)
   60 17:24:12.252229  progress  40% (4MB)
   61 17:24:12.255378  progress  45% (4MB)
   62 17:24:12.258150  progress  50% (5MB)
   63 17:24:12.261316  progress  55% (5MB)
   64 17:24:12.264120  progress  60% (6MB)
   65 17:24:12.266981  progress  65% (6MB)
   66 17:24:12.269972  progress  70% (7MB)
   67 17:24:12.272777  progress  75% (7MB)
   68 17:24:12.275744  progress  80% (8MB)
   69 17:24:12.278456  progress  85% (8MB)
   70 17:24:12.281640  progress  90% (9MB)
   71 17:24:12.284542  progress  95% (9MB)
   72 17:24:12.287628  progress 100% (10MB)
   73 17:24:12.287890  10MB downloaded in 0.06s (167.66MB/s)
   74 17:24:12.288061  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 17:24:12.288357  end: 1.2 download-retry (duration 00:00:00) [common]
   77 17:24:12.288525  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 17:24:12.288628  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 17:24:12.288812  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/amd64/full.rootfs.tar.xz
   80 17:24:12.288891  saving as /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/nfsrootfs/full.rootfs.tar
   81 17:24:12.289023  total size: 207183956 (197MB)
   82 17:24:12.289125  Using unxz to decompress xz
   83 17:24:12.293036  progress   0% (0MB)
   84 17:24:12.865276  progress   5% (9MB)
   85 17:24:13.413489  progress  10% (19MB)
   86 17:24:14.051216  progress  15% (29MB)
   87 17:24:14.439808  progress  20% (39MB)
   88 17:24:14.807310  progress  25% (49MB)
   89 17:24:15.423544  progress  30% (59MB)
   90 17:24:16.001487  progress  35% (69MB)
   91 17:24:16.654008  progress  40% (79MB)
   92 17:24:17.222383  progress  45% (88MB)
   93 17:24:17.832181  progress  50% (98MB)
   94 17:24:18.479028  progress  55% (108MB)
   95 17:24:19.180330  progress  60% (118MB)
   96 17:24:19.328190  progress  65% (128MB)
   97 17:24:19.476236  progress  70% (138MB)
   98 17:24:19.577069  progress  75% (148MB)
   99 17:24:19.647199  progress  80% (158MB)
  100 17:24:19.719168  progress  85% (167MB)
  101 17:24:19.826974  progress  90% (177MB)
  102 17:24:20.101458  progress  95% (187MB)
  103 17:24:20.691883  progress 100% (197MB)
  104 17:24:20.697908  197MB downloaded in 8.41s (23.50MB/s)
  105 17:24:20.698203  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 17:24:20.698477  end: 1.3 download-retry (duration 00:00:08) [common]
  108 17:24:20.698573  start: 1.4 download-retry (timeout 00:09:51) [common]
  109 17:24:20.698667  start: 1.4.1 http-download (timeout 00:09:51) [common]
  110 17:24:20.698825  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.283-cip98-1248-gcaf6e8ee921e9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 17:24:20.698903  saving as /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/modules/modules.tar
  112 17:24:20.698968  total size: 485236 (0MB)
  113 17:24:20.699040  Using unxz to decompress xz
  114 17:24:20.703206  progress   6% (0MB)
  115 17:24:20.703616  progress  13% (0MB)
  116 17:24:20.703857  progress  20% (0MB)
  117 17:24:20.705307  progress  27% (0MB)
  118 17:24:20.707458  progress  33% (0MB)
  119 17:24:20.709679  progress  40% (0MB)
  120 17:24:20.712245  progress  47% (0MB)
  121 17:24:20.714455  progress  54% (0MB)
  122 17:24:20.716260  progress  60% (0MB)
  123 17:24:20.718288  progress  67% (0MB)
  124 17:24:20.720385  progress  74% (0MB)
  125 17:24:20.722604  progress  81% (0MB)
  126 17:24:20.724486  progress  87% (0MB)
  127 17:24:20.726474  progress  94% (0MB)
  128 17:24:20.728332  progress 100% (0MB)
  129 17:24:20.734538  0MB downloaded in 0.04s (13.01MB/s)
  130 17:24:20.734790  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 17:24:20.735051  end: 1.4 download-retry (duration 00:00:00) [common]
  133 17:24:20.735153  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  134 17:24:20.735254  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  135 17:24:24.031888  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10664074/extract-nfsrootfs-pe298xxv
  136 17:24:24.032111  end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
  137 17:24:24.032217  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  138 17:24:24.032384  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh
  139 17:24:24.032511  makedir: /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin
  140 17:24:24.032611  makedir: /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/tests
  141 17:24:24.032708  makedir: /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/results
  142 17:24:24.032811  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-add-keys
  143 17:24:24.032953  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-add-sources
  144 17:24:24.033079  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-background-process-start
  145 17:24:24.033205  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-background-process-stop
  146 17:24:24.033327  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-common-functions
  147 17:24:24.033449  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-echo-ipv4
  148 17:24:24.033571  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-install-packages
  149 17:24:24.033694  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-installed-packages
  150 17:24:24.033822  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-os-build
  151 17:24:24.033946  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-probe-channel
  152 17:24:24.034074  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-probe-ip
  153 17:24:24.034196  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-target-ip
  154 17:24:24.034317  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-target-mac
  155 17:24:24.034438  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-target-storage
  156 17:24:24.034562  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-test-case
  157 17:24:24.034687  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-test-event
  158 17:24:24.034808  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-test-feedback
  159 17:24:24.034930  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-test-raise
  160 17:24:24.035051  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-test-reference
  161 17:24:24.035295  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-test-runner
  162 17:24:24.035419  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-test-set
  163 17:24:24.035543  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-test-shell
  164 17:24:24.035689  Updating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-add-keys (debian)
  165 17:24:24.035838  Updating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-add-sources (debian)
  166 17:24:24.035999  Updating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-install-packages (debian)
  167 17:24:24.036144  Updating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-installed-packages (debian)
  168 17:24:24.036280  Updating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/bin/lava-os-build (debian)
  169 17:24:24.036404  Creating /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/environment
  170 17:24:24.036505  LAVA metadata
  171 17:24:24.036590  - LAVA_JOB_ID=10664074
  172 17:24:24.036657  - LAVA_DISPATCHER_IP=192.168.201.1
  173 17:24:24.036762  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  174 17:24:24.036831  skipped lava-vland-overlay
  175 17:24:24.036907  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  176 17:24:24.037003  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  177 17:24:24.037070  skipped lava-multinode-overlay
  178 17:24:24.037145  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  179 17:24:24.037225  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  180 17:24:24.037300  Loading test definitions
  181 17:24:24.037391  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  182 17:24:24.037464  Using /lava-10664074 at stage 0
  183 17:24:24.037741  uuid=10664074_1.5.2.3.1 testdef=None
  184 17:24:24.037830  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  185 17:24:24.037916  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  186 17:24:24.038362  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  188 17:24:24.038604  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  189 17:24:24.039171  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  191 17:24:24.039408  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  192 17:24:24.039948  runner path: /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/0/tests/0_timesync-off test_uuid 10664074_1.5.2.3.1
  193 17:24:24.040103  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  195 17:24:24.040332  start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
  196 17:24:24.040405  Using /lava-10664074 at stage 0
  197 17:24:24.040504  Fetching tests from https://github.com/kernelci/test-definitions.git
  198 17:24:24.040582  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/0/tests/1_kselftest-filesystems'
  199 17:24:28.041207  Running '/usr/bin/git checkout kernelci.org
  200 17:24:28.095164  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
  201 17:24:28.095903  uuid=10664074_1.5.2.3.5 testdef=None
  202 17:24:28.096069  end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
  204 17:24:28.096323  start: 1.5.2.3.6 test-overlay (timeout 00:09:44) [common]
  205 17:24:28.097089  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  207 17:24:28.097360  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:44) [common]
  208 17:24:28.098392  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  210 17:24:28.098651  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
  211 17:24:28.099658  runner path: /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/0/tests/1_kselftest-filesystems test_uuid 10664074_1.5.2.3.5
  212 17:24:28.099753  BOARD='asus-C436FA-Flip-hatch'
  213 17:24:28.099819  BRANCH='cip-gitlab'
  214 17:24:28.099879  SKIPFILE='/dev/null'
  215 17:24:28.099987  SKIP_INSTALL='True'
  216 17:24:28.100051  TESTPROG_URL='None'
  217 17:24:28.100124  TST_CASENAME=''
  218 17:24:28.100183  TST_CMDFILES='filesystems'
  219 17:24:28.100330  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  221 17:24:28.100555  Creating lava-test-runner.conf files
  222 17:24:28.100632  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10664074/lava-overlay-vi4khubh/lava-10664074/0 for stage 0
  223 17:24:28.100728  - 0_timesync-off
  224 17:24:28.100798  - 1_kselftest-filesystems
  225 17:24:28.100909  end: 1.5.2.3 test-definition (duration 00:00:04) [common]
  226 17:24:28.101001  start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
  227 17:24:35.767640  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  228 17:24:35.767808  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
  229 17:24:35.767906  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  230 17:24:35.768011  end: 1.5.2 lava-overlay (duration 00:00:12) [common]
  231 17:24:35.768105  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
  232 17:24:35.904958  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  233 17:24:35.905323  start: 1.5.4 extract-modules (timeout 00:09:36) [common]
  234 17:24:35.905448  extracting modules file /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10664074/extract-nfsrootfs-pe298xxv
  235 17:24:35.927577  extracting modules file /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10664074/extract-overlay-ramdisk-hmkeczb4/ramdisk
  236 17:24:35.950594  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  237 17:24:35.950787  start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
  238 17:24:35.950915  [common] Applying overlay to NFS
  239 17:24:35.951016  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10664074/compress-overlay-sypal9oi/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10664074/extract-nfsrootfs-pe298xxv
  240 17:24:36.852974  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  241 17:24:36.853142  start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
  242 17:24:36.853243  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  243 17:24:36.853335  start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
  244 17:24:36.853420  Building ramdisk /var/lib/lava/dispatcher/tmp/10664074/extract-overlay-ramdisk-hmkeczb4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10664074/extract-overlay-ramdisk-hmkeczb4/ramdisk
  245 17:24:36.928162  >> 30352 blocks

  246 17:24:37.541091  rename /var/lib/lava/dispatcher/tmp/10664074/extract-overlay-ramdisk-hmkeczb4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/ramdisk/ramdisk.cpio.gz
  247 17:24:37.541526  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  248 17:24:37.541653  start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
  249 17:24:37.541762  start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
  250 17:24:37.541857  No mkimage arch provided, not using FIT.
  251 17:24:37.541951  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  252 17:24:37.542036  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  253 17:24:37.542144  end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
  254 17:24:37.542234  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
  255 17:24:37.542310  No LXC device requested
  256 17:24:37.542389  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 17:24:37.542475  start: 1.7 deploy-device-env (timeout 00:09:35) [common]
  258 17:24:37.542554  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 17:24:37.542623  Checking files for TFTP limit of 4294967296 bytes.
  260 17:24:37.543061  end: 1 tftp-deploy (duration 00:00:25) [common]
  261 17:24:37.543203  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 17:24:37.543294  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 17:24:37.543420  substitutions:
  264 17:24:37.543487  - {DTB}: None
  265 17:24:37.543550  - {INITRD}: 10664074/tftp-deploy-vfixj_q8/ramdisk/ramdisk.cpio.gz
  266 17:24:37.543609  - {KERNEL}: 10664074/tftp-deploy-vfixj_q8/kernel/bzImage
  267 17:24:37.543667  - {LAVA_MAC}: None
  268 17:24:37.543723  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10664074/extract-nfsrootfs-pe298xxv
  269 17:24:37.543783  - {NFS_SERVER_IP}: 192.168.201.1
  270 17:24:37.543837  - {PRESEED_CONFIG}: None
  271 17:24:37.543893  - {PRESEED_LOCAL}: None
  272 17:24:37.543947  - {RAMDISK}: 10664074/tftp-deploy-vfixj_q8/ramdisk/ramdisk.cpio.gz
  273 17:24:37.544002  - {ROOT_PART}: None
  274 17:24:37.544056  - {ROOT}: None
  275 17:24:37.544111  - {SERVER_IP}: 192.168.201.1
  276 17:24:37.544165  - {TEE}: None
  277 17:24:37.544219  Parsed boot commands:
  278 17:24:37.544272  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  279 17:24:37.544450  Parsed boot commands: tftpboot 192.168.201.1 10664074/tftp-deploy-vfixj_q8/kernel/bzImage 10664074/tftp-deploy-vfixj_q8/kernel/cmdline 10664074/tftp-deploy-vfixj_q8/ramdisk/ramdisk.cpio.gz
  280 17:24:37.544568  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  281 17:24:37.544651  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  282 17:24:37.544744  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  283 17:24:37.544827  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  284 17:24:37.544897  Not connected, no need to disconnect.
  285 17:24:37.544969  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  286 17:24:37.545049  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  287 17:24:37.545117  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
  288 17:24:37.548602  Setting prompt string to ['lava-test: # ']
  289 17:24:37.548945  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  290 17:24:37.549053  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  291 17:24:37.549152  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  292 17:24:37.549250  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  293 17:24:37.549438  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
  294 17:24:42.673092  >> Command sent successfully.

  295 17:24:42.676808  Returned 0 in 5 seconds
  296 17:24:42.777216  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  298 17:24:42.777558  end: 2.2.2 reset-device (duration 00:00:05) [common]
  299 17:24:42.777662  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  300 17:24:42.777759  Setting prompt string to 'Starting depthcharge on Helios...'
  301 17:24:42.777830  Changing prompt to 'Starting depthcharge on Helios...'
  302 17:24:42.777933  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  303 17:24:42.778195  [Enter `^Ec?' for help]

  304 17:24:43.399714  

  305 17:24:43.400305  

  306 17:24:43.409444  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  307 17:24:43.412550  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  308 17:24:43.419191  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  309 17:24:43.422908  CPU: AES supported, TXT NOT supported, VT supported

  310 17:24:43.429444  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  311 17:24:43.432429  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  312 17:24:43.438828  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  313 17:24:43.442479  VBOOT: Loading verstage.

  314 17:24:43.448863  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  315 17:24:43.452362  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  316 17:24:43.458535  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  317 17:24:43.459061  CBFS @ c08000 size 3f8000

  318 17:24:43.465579  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  319 17:24:43.468631  CBFS: Locating 'fallback/verstage'

  320 17:24:43.471620  CBFS: Found @ offset 10fb80 size 1072c

  321 17:24:43.476441  

  322 17:24:43.476903  

  323 17:24:43.486103  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  324 17:24:43.500627  Probing TPM: . done!

  325 17:24:43.504188  TPM ready after 0 ms

  326 17:24:43.507408  Connected to device vid:did:rid of 1ae0:0028:00

  327 17:24:43.517614  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  328 17:24:43.520583  Initialized TPM device CR50 revision 0

  329 17:24:43.566209  tlcl_send_startup: Startup return code is 0

  330 17:24:43.566705  TPM: setup succeeded

  331 17:24:43.578993  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  332 17:24:43.582992  Chrome EC: UHEPI supported

  333 17:24:43.586656  Phase 1

  334 17:24:43.589568  FMAP: area GBB found @ c05000 (12288 bytes)

  335 17:24:43.596373  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  336 17:24:43.599524  Phase 2

  337 17:24:43.599979  Phase 3

  338 17:24:43.602803  FMAP: area GBB found @ c05000 (12288 bytes)

  339 17:24:43.609363  VB2:vb2_report_dev_firmware() This is developer signed firmware

  340 17:24:43.616090  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  341 17:24:43.619180  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  342 17:24:43.625818  VB2:vb2_verify_keyblock() Checking keyblock signature...

  343 17:24:43.641750  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  344 17:24:43.644737  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  345 17:24:43.651669  VB2:vb2_verify_fw_preamble() Verifying preamble.

  346 17:24:43.655621  Phase 4

  347 17:24:43.658464  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  348 17:24:43.668283  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  349 17:24:43.844994  VB2:vb2_rsa_verify_digest() Digest check failed!

  350 17:24:43.851723  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  351 17:24:43.851831  Saving nvdata

  352 17:24:43.854837  Reboot requested (10020007)

  353 17:24:43.858046  board_reset() called!

  354 17:24:43.858216  full_reset() called!

  355 17:24:48.366800  

  356 17:24:48.366972  

  357 17:24:48.376317  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  358 17:24:48.379440  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  359 17:24:48.386435  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  360 17:24:48.389297  CPU: AES supported, TXT NOT supported, VT supported

  361 17:24:48.396039  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  362 17:24:48.402239  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  363 17:24:48.405754  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  364 17:24:48.409163  VBOOT: Loading verstage.

  365 17:24:48.415672  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  366 17:24:48.418826  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  367 17:24:48.425653  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  368 17:24:48.429205  CBFS @ c08000 size 3f8000

  369 17:24:48.432417  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  370 17:24:48.435353  CBFS: Locating 'fallback/verstage'

  371 17:24:48.442158  CBFS: Found @ offset 10fb80 size 1072c

  372 17:24:48.442461  

  373 17:24:48.442699  

  374 17:24:48.452364  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  375 17:24:48.468102  Probing TPM: . done!

  376 17:24:48.471259  TPM ready after 0 ms

  377 17:24:48.474638  Connected to device vid:did:rid of 1ae0:0028:00

  378 17:24:48.484442  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  379 17:24:48.488037  Initialized TPM device CR50 revision 0

  380 17:24:48.534113  tlcl_send_startup: Startup return code is 0

  381 17:24:48.534607  TPM: setup succeeded

  382 17:24:48.546667  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  383 17:24:48.550459  Chrome EC: UHEPI supported

  384 17:24:48.554102  Phase 1

  385 17:24:48.557241  FMAP: area GBB found @ c05000 (12288 bytes)

  386 17:24:48.563876  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  387 17:24:48.570320  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  388 17:24:48.573492  Recovery requested (1009000e)

  389 17:24:48.579528  Saving nvdata

  390 17:24:48.585830  tlcl_extend: response is 0

  391 17:24:48.594217  tlcl_extend: response is 0

  392 17:24:48.601188  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  393 17:24:48.604123  CBFS @ c08000 size 3f8000

  394 17:24:48.610826  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  395 17:24:48.613784  CBFS: Locating 'fallback/romstage'

  396 17:24:48.617508  CBFS: Found @ offset 80 size 145fc

  397 17:24:48.620376  Accumulated console time in verstage 98 ms

  398 17:24:48.620711  

  399 17:24:48.623843  

  400 17:24:48.633518  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  401 17:24:48.640378  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  402 17:24:48.643738  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  403 17:24:48.646579  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  404 17:24:48.653114  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  405 17:24:48.656742  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  406 17:24:48.659762  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  407 17:24:48.662932  TCO_STS:   0000 0000

  408 17:24:48.666513  GEN_PMCON: e0015238 00000200

  409 17:24:48.669518  GBLRST_CAUSE: 00000000 00000000

  410 17:24:48.669607  prev_sleep_state 5

  411 17:24:48.673964  Boot Count incremented to 56307

  412 17:24:48.680513  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  413 17:24:48.683827  CBFS @ c08000 size 3f8000

  414 17:24:48.690321  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  415 17:24:48.690408  CBFS: Locating 'fspm.bin'

  416 17:24:48.696783  CBFS: Found @ offset 5ffc0 size 71000

  417 17:24:48.700209  Chrome EC: UHEPI supported

  418 17:24:48.707205  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  419 17:24:48.710962  Probing TPM:  done!

  420 17:24:48.717682  Connected to device vid:did:rid of 1ae0:0028:00

  421 17:24:48.726989  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  422 17:24:48.733318  Initialized TPM device CR50 revision 0

  423 17:24:48.742420  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  424 17:24:48.751960  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  425 17:24:48.752404  MRC cache found, size 1948

  426 17:24:48.755287  bootmode is set to: 2

  427 17:24:48.758365  PRMRR disabled by config.

  428 17:24:48.762230  SPD INDEX = 1

  429 17:24:48.765271  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  430 17:24:48.768775  CBFS @ c08000 size 3f8000

  431 17:24:48.775386  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  432 17:24:48.775838  CBFS: Locating 'spd.bin'

  433 17:24:48.778614  CBFS: Found @ offset 5fb80 size 400

  434 17:24:48.782218  SPD: module type is LPDDR3

  435 17:24:48.785226  SPD: module part is 

  436 17:24:48.791946  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  437 17:24:48.795046  SPD: device width 4 bits, bus width 8 bits

  438 17:24:48.798041  SPD: module size is 4096 MB (per channel)

  439 17:24:48.801638  memory slot: 0 configuration done.

  440 17:24:48.807897  memory slot: 2 configuration done.

  441 17:24:48.857173  CBMEM:

  442 17:24:48.860802  IMD: root @ 99fff000 254 entries.

  443 17:24:48.863772  IMD: root @ 99ffec00 62 entries.

  444 17:24:48.866784  External stage cache:

  445 17:24:48.870416  IMD: root @ 9abff000 254 entries.

  446 17:24:48.873308  IMD: root @ 9abfec00 62 entries.

  447 17:24:48.880118  Chrome EC: clear events_b mask to 0x0000000020004000

  448 17:24:48.892658  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  449 17:24:48.903012  tlcl_write: response is 0

  450 17:24:48.914782  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  451 17:24:48.921619  MRC: TPM MRC hash updated successfully.

  452 17:24:48.921822  2 DIMMs found

  453 17:24:48.924631  SMM Memory Map

  454 17:24:48.927724  SMRAM       : 0x9a000000 0x1000000

  455 17:24:48.931386   Subregion 0: 0x9a000000 0xa00000

  456 17:24:48.934479   Subregion 1: 0x9aa00000 0x200000

  457 17:24:48.937965   Subregion 2: 0x9ac00000 0x400000

  458 17:24:48.940966  top_of_ram = 0x9a000000

  459 17:24:48.944531  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  460 17:24:48.951020  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  461 17:24:48.954584  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  462 17:24:48.960798  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  463 17:24:48.964285  CBFS @ c08000 size 3f8000

  464 17:24:48.967369  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  465 17:24:48.974344  CBFS: Locating 'fallback/postcar'

  466 17:24:48.977343  CBFS: Found @ offset 107000 size 4b44

  467 17:24:48.983691  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  468 17:24:48.993798  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  469 17:24:48.997533  Processing 180 relocs. Offset value of 0x97c0c000

  470 17:24:49.005273  Accumulated console time in romstage 286 ms

  471 17:24:49.005699  

  472 17:24:49.005963  

  473 17:24:49.015010  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  474 17:24:49.021839  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  475 17:24:49.024941  CBFS @ c08000 size 3f8000

  476 17:24:49.028717  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  477 17:24:49.034610  CBFS: Locating 'fallback/ramstage'

  478 17:24:49.038264  CBFS: Found @ offset 43380 size 1b9e8

  479 17:24:49.044765  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  480 17:24:49.077034  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  481 17:24:49.083392  Processing 3976 relocs. Offset value of 0x98db0000

  482 17:24:49.086932  Accumulated console time in postcar 52 ms

  483 17:24:49.087450  

  484 17:24:49.087829  

  485 17:24:49.096767  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  486 17:24:49.102891  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  487 17:24:49.106465  WARNING: RO_VPD is uninitialized or empty.

  488 17:24:49.109484  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  489 17:24:49.116459  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  490 17:24:49.116898  Normal boot.

  491 17:24:49.123004  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  492 17:24:49.126018  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 17:24:49.129746  CBFS @ c08000 size 3f8000

  494 17:24:49.136012  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 17:24:49.139717  CBFS: Locating 'cpu_microcode_blob.bin'

  496 17:24:49.142759  CBFS: Found @ offset 14700 size 2ec00

  497 17:24:49.149183  microcode: sig=0x806ec pf=0x4 revision=0xc9

  498 17:24:49.149738  Skip microcode update

  499 17:24:49.155961  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  500 17:24:49.158818  CBFS @ c08000 size 3f8000

  501 17:24:49.162286  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  502 17:24:49.165868  CBFS: Locating 'fsps.bin'

  503 17:24:49.169009  CBFS: Found @ offset d1fc0 size 35000

  504 17:24:49.194942  Detected 4 core, 8 thread CPU.

  505 17:24:49.198504  Setting up SMI for CPU

  506 17:24:49.201523  IED base = 0x9ac00000

  507 17:24:49.205194  IED size = 0x00400000

  508 17:24:49.205704  Will perform SMM setup.

  509 17:24:49.211331  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  510 17:24:49.218022  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  511 17:24:49.224720  Processing 16 relocs. Offset value of 0x00030000

  512 17:24:49.227732  Attempting to start 7 APs

  513 17:24:49.230971  Waiting for 10ms after sending INIT.

  514 17:24:49.244996  Waiting for 1st SIPI to complete...done.

  515 17:24:49.245499  AP: slot 2 apic_id 5.

  516 17:24:49.247890  AP: slot 7 apic_id 7.

  517 17:24:49.251436  AP: slot 6 apic_id 6.

  518 17:24:49.251907  AP: slot 3 apic_id 1.

  519 17:24:49.258386  Waiting for 2nd SIPI to complete...done.

  520 17:24:49.258991  AP: slot 5 apic_id 4.

  521 17:24:49.261070  AP: slot 4 apic_id 2.

  522 17:24:49.264537  AP: slot 1 apic_id 3.

  523 17:24:49.271515  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  524 17:24:49.278044  Processing 13 relocs. Offset value of 0x00038000

  525 17:24:49.285032  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  526 17:24:49.287793  Installing SMM handler to 0x9a000000

  527 17:24:49.294460  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  528 17:24:49.300562  Processing 658 relocs. Offset value of 0x9a010000

  529 17:24:49.307394  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  530 17:24:49.310450  Processing 13 relocs. Offset value of 0x9a008000

  531 17:24:49.317187  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  532 17:24:49.323615  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  533 17:24:49.330273  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  534 17:24:49.333413  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  535 17:24:49.340079  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  536 17:24:49.368080  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  537 17:24:49.368410  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  538 17:24:49.368486  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  539 17:24:49.368578  Clearing SMI status registers

  540 17:24:49.368656  SMI_STS: PM1 

  541 17:24:49.368717  PM1_STS: PWRBTN 

  542 17:24:49.368776  TCO_STS: SECOND_TO 

  543 17:24:49.369708  New SMBASE 0x9a000000

  544 17:24:49.372849  In relocation handler: CPU 0

  545 17:24:49.376315  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  546 17:24:49.382437  Writing SMRR. base = 0x9a000006, mask=0xff000800

  547 17:24:49.382540  Relocation complete.

  548 17:24:49.385947  New SMBASE 0x99fff400

  549 17:24:49.389449  In relocation handler: CPU 3

  550 17:24:49.392473  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  551 17:24:49.399053  Writing SMRR. base = 0x9a000006, mask=0xff000800

  552 17:24:49.399206  Relocation complete.

  553 17:24:49.402127  New SMBASE 0x99ffe400

  554 17:24:49.405467  In relocation handler: CPU 7

  555 17:24:49.409051  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  556 17:24:49.415749  Writing SMRR. base = 0x9a000006, mask=0xff000800

  557 17:24:49.415838  Relocation complete.

  558 17:24:49.418701  New SMBASE 0x99fff800

  559 17:24:49.421964  In relocation handler: CPU 2

  560 17:24:49.425288  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  561 17:24:49.431513  Writing SMRR. base = 0x9a000006, mask=0xff000800

  562 17:24:49.431617  Relocation complete.

  563 17:24:49.435221  New SMBASE 0x99ffec00

  564 17:24:49.438198  In relocation handler: CPU 5

  565 17:24:49.441920  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  566 17:24:49.448096  Writing SMRR. base = 0x9a000006, mask=0xff000800

  567 17:24:49.448228  Relocation complete.

  568 17:24:49.451792  New SMBASE 0x99ffe800

  569 17:24:49.454827  In relocation handler: CPU 6

  570 17:24:49.458026  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  571 17:24:49.464634  Writing SMRR. base = 0x9a000006, mask=0xff000800

  572 17:24:49.464904  Relocation complete.

  573 17:24:49.467752  New SMBASE 0x99fffc00

  574 17:24:49.471363  In relocation handler: CPU 1

  575 17:24:49.474508  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  576 17:24:49.481112  Writing SMRR. base = 0x9a000006, mask=0xff000800

  577 17:24:49.481550  Relocation complete.

  578 17:24:49.484621  New SMBASE 0x99fff000

  579 17:24:49.488076  In relocation handler: CPU 4

  580 17:24:49.491023  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  581 17:24:49.497877  Writing SMRR. base = 0x9a000006, mask=0xff000800

  582 17:24:49.498364  Relocation complete.

  583 17:24:49.500755  Initializing CPU #0

  584 17:24:49.504152  CPU: vendor Intel device 806ec

  585 17:24:49.507330  CPU: family 06, model 8e, stepping 0c

  586 17:24:49.510493  Clearing out pending MCEs

  587 17:24:49.514198  Setting up local APIC...

  588 17:24:49.514630   apic_id: 0x00 done.

  589 17:24:49.517231  Turbo is available but hidden

  590 17:24:49.520795  Turbo is available and visible

  591 17:24:49.524038  VMX status: enabled

  592 17:24:49.527076  IA32_FEATURE_CONTROL status: locked

  593 17:24:49.530565  Skip microcode update

  594 17:24:49.530996  CPU #0 initialized

  595 17:24:49.533786  Initializing CPU #6

  596 17:24:49.534244  Initializing CPU #3

  597 17:24:49.537433  Initializing CPU #1

  598 17:24:49.540413  Initializing CPU #4

  599 17:24:49.543560  CPU: vendor Intel device 806ec

  600 17:24:49.547224  CPU: family 06, model 8e, stepping 0c

  601 17:24:49.550607  CPU: vendor Intel device 806ec

  602 17:24:49.553713  CPU: family 06, model 8e, stepping 0c

  603 17:24:49.557255  Clearing out pending MCEs

  604 17:24:49.557734  Clearing out pending MCEs

  605 17:24:49.560327  Setting up local APIC...

  606 17:24:49.563295  CPU: vendor Intel device 806ec

  607 17:24:49.567027  CPU: family 06, model 8e, stepping 0c

  608 17:24:49.569994  Clearing out pending MCEs

  609 17:24:49.573631  Initializing CPU #2

  610 17:24:49.574111  Setting up local APIC...

  611 17:24:49.576662  CPU: vendor Intel device 806ec

  612 17:24:49.583344  CPU: family 06, model 8e, stepping 0c

  613 17:24:49.583827  Initializing CPU #5

  614 17:24:49.586884  Clearing out pending MCEs

  615 17:24:49.590269  CPU: vendor Intel device 806ec

  616 17:24:49.593352  CPU: family 06, model 8e, stepping 0c

  617 17:24:49.596829  Setting up local APIC...

  618 17:24:49.599750  Setting up local APIC...

  619 17:24:49.600550  Initializing CPU #7

  620 17:24:49.603257  CPU: vendor Intel device 806ec

  621 17:24:49.606627  CPU: family 06, model 8e, stepping 0c

  622 17:24:49.609632  CPU: vendor Intel device 806ec

  623 17:24:49.612679  CPU: family 06, model 8e, stepping 0c

  624 17:24:49.615781   apic_id: 0x01 done.

  625 17:24:49.619328   apic_id: 0x05 done.

  626 17:24:49.619793  VMX status: enabled

  627 17:24:49.622296  Clearing out pending MCEs

  628 17:24:49.626030  Clearing out pending MCEs

  629 17:24:49.628717  Setting up local APIC...

  630 17:24:49.629010   apic_id: 0x02 done.

  631 17:24:49.632104   apic_id: 0x03 done.

  632 17:24:49.635109  VMX status: enabled

  633 17:24:49.635240  VMX status: enabled

  634 17:24:49.638769  IA32_FEATURE_CONTROL status: locked

  635 17:24:49.645424  IA32_FEATURE_CONTROL status: locked

  636 17:24:49.645513  Skip microcode update

  637 17:24:49.648543  Skip microcode update

  638 17:24:49.648629  CPU #4 initialized

  639 17:24:49.651606  CPU #1 initialized

  640 17:24:49.655190  VMX status: enabled

  641 17:24:49.655279  Clearing out pending MCEs

  642 17:24:49.661784  IA32_FEATURE_CONTROL status: locked

  643 17:24:49.661958  Setting up local APIC...

  644 17:24:49.665122  IA32_FEATURE_CONTROL status: locked

  645 17:24:49.668065  Skip microcode update

  646 17:24:49.671663  Setting up local APIC...

  647 17:24:49.674644  Skip microcode update

  648 17:24:49.674730   apic_id: 0x04 done.

  649 17:24:49.678280  CPU #2 initialized

  650 17:24:49.678365  VMX status: enabled

  651 17:24:49.681344  CPU #3 initialized

  652 17:24:49.684501  IA32_FEATURE_CONTROL status: locked

  653 17:24:49.688028   apic_id: 0x06 done.

  654 17:24:49.688116   apic_id: 0x07 done.

  655 17:24:49.691664  VMX status: enabled

  656 17:24:49.694638  VMX status: enabled

  657 17:24:49.698173  IA32_FEATURE_CONTROL status: locked

  658 17:24:49.701130  IA32_FEATURE_CONTROL status: locked

  659 17:24:49.704940  Skip microcode update

  660 17:24:49.705037  Skip microcode update

  661 17:24:49.707652  Skip microcode update

  662 17:24:49.711049  CPU #6 initialized

  663 17:24:49.711201  CPU #5 initialized

  664 17:24:49.714170  CPU #7 initialized

  665 17:24:49.717818  bsp_do_flight_plan done after 459 msecs.

  666 17:24:49.720933  CPU: frequency set to 4200 MHz

  667 17:24:49.721022  Enabling SMIs.

  668 17:24:49.723995  Locking SMM.

  669 17:24:49.738590  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  670 17:24:49.741746  CBFS @ c08000 size 3f8000

  671 17:24:49.748412  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  672 17:24:49.748514  CBFS: Locating 'vbt.bin'

  673 17:24:49.754548  CBFS: Found @ offset 5f5c0 size 499

  674 17:24:49.757766  Found a VBT of 4608 bytes after decompression

  675 17:24:49.942557  Display FSP Version Info HOB

  676 17:24:49.946144  Reference Code - CPU = 9.0.1e.30

  677 17:24:49.949057  uCode Version = 0.0.0.ca

  678 17:24:49.952189  TXT ACM version = ff.ff.ff.ffff

  679 17:24:49.955802  Display FSP Version Info HOB

  680 17:24:49.959041  Reference Code - ME = 9.0.1e.30

  681 17:24:49.962101  MEBx version = 0.0.0.0

  682 17:24:49.965188  ME Firmware Version = Consumer SKU

  683 17:24:49.968931  Display FSP Version Info HOB

  684 17:24:49.971985  Reference Code - CML PCH = 9.0.1e.30

  685 17:24:49.974985  PCH-CRID Status = Disabled

  686 17:24:49.978736  PCH-CRID Original Value = ff.ff.ff.ffff

  687 17:24:49.981776  PCH-CRID New Value = ff.ff.ff.ffff

  688 17:24:49.984802  OPROM - RST - RAID = ff.ff.ff.ffff

  689 17:24:49.988003  ChipsetInit Base Version = ff.ff.ff.ffff

  690 17:24:49.994570  ChipsetInit Oem Version = ff.ff.ff.ffff

  691 17:24:49.994681  Display FSP Version Info HOB

  692 17:24:50.001345  Reference Code - SA - System Agent = 9.0.1e.30

  693 17:24:50.004102  Reference Code - MRC = 0.7.1.6c

  694 17:24:50.007787  SA - PCIe Version = 9.0.1e.30

  695 17:24:50.010590  SA-CRID Status = Disabled

  696 17:24:50.014238  SA-CRID Original Value = 0.0.0.c

  697 17:24:50.017050  SA-CRID New Value = 0.0.0.c

  698 17:24:50.017164  OPROM - VBIOS = ff.ff.ff.ffff

  699 17:24:50.021130  RTC Init

  700 17:24:50.024613  Set power on after power failure.

  701 17:24:50.024745  Disabling Deep S3

  702 17:24:50.027795  Disabling Deep S3

  703 17:24:50.031374  Disabling Deep S4

  704 17:24:50.031456  Disabling Deep S4

  705 17:24:50.034479  Disabling Deep S5

  706 17:24:50.034581  Disabling Deep S5

  707 17:24:50.040741  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1

  708 17:24:50.044271  Enumerating buses...

  709 17:24:50.047467  Show all devs... Before device enumeration.

  710 17:24:50.050636  Root Device: enabled 1

  711 17:24:50.053684  CPU_CLUSTER: 0: enabled 1

  712 17:24:50.053763  DOMAIN: 0000: enabled 1

  713 17:24:50.057308  APIC: 00: enabled 1

  714 17:24:50.060351  PCI: 00:00.0: enabled 1

  715 17:24:50.063435  PCI: 00:02.0: enabled 1

  716 17:24:50.063527  PCI: 00:04.0: enabled 0

  717 17:24:50.067201  PCI: 00:05.0: enabled 0

  718 17:24:50.070256  PCI: 00:12.0: enabled 1

  719 17:24:50.073343  PCI: 00:12.5: enabled 0

  720 17:24:50.073429  PCI: 00:12.6: enabled 0

  721 17:24:50.076869  PCI: 00:14.0: enabled 1

  722 17:24:50.080102  PCI: 00:14.1: enabled 0

  723 17:24:50.083006  PCI: 00:14.3: enabled 1

  724 17:24:50.083112  PCI: 00:14.5: enabled 0

  725 17:24:50.086670  PCI: 00:15.0: enabled 1

  726 17:24:50.089654  PCI: 00:15.1: enabled 1

  727 17:24:50.089732  PCI: 00:15.2: enabled 0

  728 17:24:50.092850  PCI: 00:15.3: enabled 0

  729 17:24:50.095972  PCI: 00:16.0: enabled 1

  730 17:24:50.099833  PCI: 00:16.1: enabled 0

  731 17:24:50.099918  PCI: 00:16.2: enabled 0

  732 17:24:50.102681  PCI: 00:16.3: enabled 0

  733 17:24:50.105788  PCI: 00:16.4: enabled 0

  734 17:24:50.109301  PCI: 00:16.5: enabled 0

  735 17:24:50.109417  PCI: 00:17.0: enabled 1

  736 17:24:50.112401  PCI: 00:19.0: enabled 1

  737 17:24:50.115755  PCI: 00:19.1: enabled 0

  738 17:24:50.118691  PCI: 00:19.2: enabled 0

  739 17:24:50.118808  PCI: 00:1a.0: enabled 0

  740 17:24:50.122466  PCI: 00:1c.0: enabled 0

  741 17:24:50.125693  PCI: 00:1c.1: enabled 0

  742 17:24:50.128687  PCI: 00:1c.2: enabled 0

  743 17:24:50.128797  PCI: 00:1c.3: enabled 0

  744 17:24:50.132246  PCI: 00:1c.4: enabled 0

  745 17:24:50.135265  PCI: 00:1c.5: enabled 0

  746 17:24:50.138303  PCI: 00:1c.6: enabled 0

  747 17:24:50.138414  PCI: 00:1c.7: enabled 0

  748 17:24:50.142114  PCI: 00:1d.0: enabled 1

  749 17:24:50.145402  PCI: 00:1d.1: enabled 0

  750 17:24:50.148449  PCI: 00:1d.2: enabled 0

  751 17:24:50.148565  PCI: 00:1d.3: enabled 0

  752 17:24:50.151441  PCI: 00:1d.4: enabled 0

  753 17:24:50.155049  PCI: 00:1d.5: enabled 1

  754 17:24:50.158220  PCI: 00:1e.0: enabled 1

  755 17:24:50.158331  PCI: 00:1e.1: enabled 0

  756 17:24:50.161212  PCI: 00:1e.2: enabled 1

  757 17:24:50.164788  PCI: 00:1e.3: enabled 1

  758 17:24:50.167822  PCI: 00:1f.0: enabled 1

  759 17:24:50.167934  PCI: 00:1f.1: enabled 1

  760 17:24:50.171057  PCI: 00:1f.2: enabled 1

  761 17:24:50.174726  PCI: 00:1f.3: enabled 1

  762 17:24:50.177996  PCI: 00:1f.4: enabled 1

  763 17:24:50.178107  PCI: 00:1f.5: enabled 1

  764 17:24:50.180859  PCI: 00:1f.6: enabled 0

  765 17:24:50.184582  USB0 port 0: enabled 1

  766 17:24:50.187588  I2C: 00:15: enabled 1

  767 17:24:50.187698  I2C: 00:5d: enabled 1

  768 17:24:50.190586  GENERIC: 0.0: enabled 1

  769 17:24:50.193763  I2C: 00:1a: enabled 1

  770 17:24:50.193854  I2C: 00:38: enabled 1

  771 17:24:50.197452  I2C: 00:39: enabled 1

  772 17:24:50.200547  I2C: 00:3a: enabled 1

  773 17:24:50.200630  I2C: 00:3b: enabled 1

  774 17:24:50.203664  PCI: 00:00.0: enabled 1

  775 17:24:50.206834  SPI: 00: enabled 1

  776 17:24:50.206920  SPI: 01: enabled 1

  777 17:24:50.210510  PNP: 0c09.0: enabled 1

  778 17:24:50.213598  USB2 port 0: enabled 1

  779 17:24:50.213681  USB2 port 1: enabled 1

  780 17:24:50.216993  USB2 port 2: enabled 0

  781 17:24:50.220016  USB2 port 3: enabled 0

  782 17:24:50.223470  USB2 port 5: enabled 0

  783 17:24:50.223553  USB2 port 6: enabled 1

  784 17:24:50.226461  USB2 port 9: enabled 1

  785 17:24:50.230004  USB3 port 0: enabled 1

  786 17:24:50.230087  USB3 port 1: enabled 1

  787 17:24:50.233265  USB3 port 2: enabled 1

  788 17:24:50.236751  USB3 port 3: enabled 1

  789 17:24:50.239542  USB3 port 4: enabled 0

  790 17:24:50.239625  APIC: 03: enabled 1

  791 17:24:50.242646  APIC: 05: enabled 1

  792 17:24:50.242729  APIC: 01: enabled 1

  793 17:24:50.246288  APIC: 02: enabled 1

  794 17:24:50.249425  APIC: 04: enabled 1

  795 17:24:50.249507  APIC: 06: enabled 1

  796 17:24:50.252443  APIC: 07: enabled 1

  797 17:24:50.256003  Compare with tree...

  798 17:24:50.256090  Root Device: enabled 1

  799 17:24:50.259072   CPU_CLUSTER: 0: enabled 1

  800 17:24:50.262621    APIC: 00: enabled 1

  801 17:24:50.265816    APIC: 03: enabled 1

  802 17:24:50.265904    APIC: 05: enabled 1

  803 17:24:50.269026    APIC: 01: enabled 1

  804 17:24:50.272197    APIC: 02: enabled 1

  805 17:24:50.272285    APIC: 04: enabled 1

  806 17:24:50.275800    APIC: 06: enabled 1

  807 17:24:50.278786    APIC: 07: enabled 1

  808 17:24:50.278901   DOMAIN: 0000: enabled 1

  809 17:24:50.282401    PCI: 00:00.0: enabled 1

  810 17:24:50.285404    PCI: 00:02.0: enabled 1

  811 17:24:50.288498    PCI: 00:04.0: enabled 0

  812 17:24:50.291622    PCI: 00:05.0: enabled 0

  813 17:24:50.295349    PCI: 00:12.0: enabled 1

  814 17:24:50.295453    PCI: 00:12.5: enabled 0

  815 17:24:50.298268    PCI: 00:12.6: enabled 0

  816 17:24:50.301386    PCI: 00:14.0: enabled 1

  817 17:24:50.304550     USB0 port 0: enabled 1

  818 17:24:50.307981      USB2 port 0: enabled 1

  819 17:24:50.308071      USB2 port 1: enabled 1

  820 17:24:50.311663      USB2 port 2: enabled 0

  821 17:24:50.314734      USB2 port 3: enabled 0

  822 17:24:50.317681      USB2 port 5: enabled 0

  823 17:24:50.321297      USB2 port 6: enabled 1

  824 17:24:50.324321      USB2 port 9: enabled 1

  825 17:24:50.324404      USB3 port 0: enabled 1

  826 17:24:50.327772      USB3 port 1: enabled 1

  827 17:24:50.331131      USB3 port 2: enabled 1

  828 17:24:50.334004      USB3 port 3: enabled 1

  829 17:24:50.337584      USB3 port 4: enabled 0

  830 17:24:50.340477    PCI: 00:14.1: enabled 0

  831 17:24:50.340556    PCI: 00:14.3: enabled 1

  832 17:24:50.344176    PCI: 00:14.5: enabled 0

  833 17:24:50.347188    PCI: 00:15.0: enabled 1

  834 17:24:50.350133     I2C: 00:15: enabled 1

  835 17:24:50.353736    PCI: 00:15.1: enabled 1

  836 17:24:50.353842     I2C: 00:5d: enabled 1

  837 17:24:50.356883     GENERIC: 0.0: enabled 1

  838 17:24:50.360124    PCI: 00:15.2: enabled 0

  839 17:24:50.363788    PCI: 00:15.3: enabled 0

  840 17:24:50.366987    PCI: 00:16.0: enabled 1

  841 17:24:50.367091    PCI: 00:16.1: enabled 0

  842 17:24:50.369992    PCI: 00:16.2: enabled 0

  843 17:24:50.373108    PCI: 00:16.3: enabled 0

  844 17:24:50.376870    PCI: 00:16.4: enabled 0

  845 17:24:50.379915    PCI: 00:16.5: enabled 0

  846 17:24:50.379988    PCI: 00:17.0: enabled 1

  847 17:24:50.383082    PCI: 00:19.0: enabled 1

  848 17:24:50.386019     I2C: 00:1a: enabled 1

  849 17:24:50.389595     I2C: 00:38: enabled 1

  850 17:24:50.392764     I2C: 00:39: enabled 1

  851 17:24:50.392839     I2C: 00:3a: enabled 1

  852 17:24:50.396524     I2C: 00:3b: enabled 1

  853 17:24:50.399367    PCI: 00:19.1: enabled 0

  854 17:24:50.402527    PCI: 00:19.2: enabled 0

  855 17:24:50.402629    PCI: 00:1a.0: enabled 0

  856 17:24:50.406137    PCI: 00:1c.0: enabled 0

  857 17:24:50.409261    PCI: 00:1c.1: enabled 0

  858 17:24:50.412358    PCI: 00:1c.2: enabled 0

  859 17:24:50.416014    PCI: 00:1c.3: enabled 0

  860 17:24:50.416097    PCI: 00:1c.4: enabled 0

  861 17:24:50.419068    PCI: 00:1c.5: enabled 0

  862 17:24:50.422708    PCI: 00:1c.6: enabled 0

  863 17:24:50.425699    PCI: 00:1c.7: enabled 0

  864 17:24:50.428960    PCI: 00:1d.0: enabled 1

  865 17:24:50.432257    PCI: 00:1d.1: enabled 0

  866 17:24:50.432340    PCI: 00:1d.2: enabled 0

  867 17:24:50.435629    PCI: 00:1d.3: enabled 0

  868 17:24:50.438613    PCI: 00:1d.4: enabled 0

  869 17:24:50.441994    PCI: 00:1d.5: enabled 1

  870 17:24:50.445529     PCI: 00:00.0: enabled 1

  871 17:24:50.445612    PCI: 00:1e.0: enabled 1

  872 17:24:50.448497    PCI: 00:1e.1: enabled 0

  873 17:24:50.451483    PCI: 00:1e.2: enabled 1

  874 17:24:50.455251     SPI: 00: enabled 1

  875 17:24:50.455335    PCI: 00:1e.3: enabled 1

  876 17:24:50.458301     SPI: 01: enabled 1

  877 17:24:50.461377    PCI: 00:1f.0: enabled 1

  878 17:24:50.464591     PNP: 0c09.0: enabled 1

  879 17:24:50.467913    PCI: 00:1f.1: enabled 1

  880 17:24:50.467997    PCI: 00:1f.2: enabled 1

  881 17:24:50.471291    PCI: 00:1f.3: enabled 1

  882 17:24:50.474391    PCI: 00:1f.4: enabled 1

  883 17:24:50.478117    PCI: 00:1f.5: enabled 1

  884 17:24:50.481212    PCI: 00:1f.6: enabled 0

  885 17:24:50.481295  Root Device scanning...

  886 17:24:50.484183  scan_static_bus for Root Device

  887 17:24:50.487874  CPU_CLUSTER: 0 enabled

  888 17:24:50.490803  DOMAIN: 0000 enabled

  889 17:24:50.494600  DOMAIN: 0000 scanning...

  890 17:24:50.497651  PCI: pci_scan_bus for bus 00

  891 17:24:50.500647  PCI: 00:00.0 [8086/0000] ops

  892 17:24:50.503828  PCI: 00:00.0 [8086/9b61] enabled

  893 17:24:50.507589  PCI: 00:02.0 [8086/0000] bus ops

  894 17:24:50.510602  PCI: 00:02.0 [8086/9b41] enabled

  895 17:24:50.513672  PCI: 00:04.0 [8086/1903] disabled

  896 17:24:50.517212  PCI: 00:08.0 [8086/1911] enabled

  897 17:24:50.520122  PCI: 00:12.0 [8086/02f9] enabled

  898 17:24:50.523874  PCI: 00:14.0 [8086/0000] bus ops

  899 17:24:50.526823  PCI: 00:14.0 [8086/02ed] enabled

  900 17:24:50.529910  PCI: 00:14.2 [8086/02ef] enabled

  901 17:24:50.532993  PCI: 00:14.3 [8086/02f0] enabled

  902 17:24:50.536483  PCI: 00:15.0 [8086/0000] bus ops

  903 17:24:50.539899  PCI: 00:15.0 [8086/02e8] enabled

  904 17:24:50.542748  PCI: 00:15.1 [8086/0000] bus ops

  905 17:24:50.546335  PCI: 00:15.1 [8086/02e9] enabled

  906 17:24:50.549347  PCI: 00:16.0 [8086/0000] ops

  907 17:24:50.553081  PCI: 00:16.0 [8086/02e0] enabled

  908 17:24:50.556061  PCI: 00:17.0 [8086/0000] ops

  909 17:24:50.559111  PCI: 00:17.0 [8086/02d3] enabled

  910 17:24:50.562794  PCI: 00:19.0 [8086/0000] bus ops

  911 17:24:50.566144  PCI: 00:19.0 [8086/02c5] enabled

  912 17:24:50.569555  PCI: 00:1d.0 [8086/0000] bus ops

  913 17:24:50.572767  PCI: 00:1d.0 [8086/02b0] enabled

  914 17:24:50.575791  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  915 17:24:50.578774  PCI: 00:1e.0 [8086/0000] ops

  916 17:24:50.582465  PCI: 00:1e.0 [8086/02a8] enabled

  917 17:24:50.585432  PCI: 00:1e.2 [8086/0000] bus ops

  918 17:24:50.588520  PCI: 00:1e.2 [8086/02aa] enabled

  919 17:24:50.591881  PCI: 00:1e.3 [8086/0000] bus ops

  920 17:24:50.595697  PCI: 00:1e.3 [8086/02ab] enabled

  921 17:24:50.598964  PCI: 00:1f.0 [8086/0000] bus ops

  922 17:24:50.601812  PCI: 00:1f.0 [8086/0284] enabled

  923 17:24:50.608662  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  924 17:24:50.614738  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  925 17:24:50.618396  PCI: 00:1f.3 [8086/0000] bus ops

  926 17:24:50.621418  PCI: 00:1f.3 [8086/02c8] enabled

  927 17:24:50.625174  PCI: 00:1f.4 [8086/0000] bus ops

  928 17:24:50.628034  PCI: 00:1f.4 [8086/02a3] enabled

  929 17:24:50.631043  PCI: 00:1f.5 [8086/0000] bus ops

  930 17:24:50.634785  PCI: 00:1f.5 [8086/02a4] enabled

  931 17:24:50.637783  PCI: Leftover static devices:

  932 17:24:50.637891  PCI: 00:05.0

  933 17:24:50.641240  PCI: 00:12.5

  934 17:24:50.641346  PCI: 00:12.6

  935 17:24:50.644219  PCI: 00:14.1

  936 17:24:50.644338  PCI: 00:14.5

  937 17:24:50.644432  PCI: 00:15.2

  938 17:24:50.647610  PCI: 00:15.3

  939 17:24:50.647721  PCI: 00:16.1

  940 17:24:50.650825  PCI: 00:16.2

  941 17:24:50.650944  PCI: 00:16.3

  942 17:24:50.653930  PCI: 00:16.4

  943 17:24:50.654037  PCI: 00:16.5

  944 17:24:50.654129  PCI: 00:19.1

  945 17:24:50.656940  PCI: 00:19.2

  946 17:24:50.657043  PCI: 00:1a.0

  947 17:24:50.660555  PCI: 00:1c.0

  948 17:24:50.660662  PCI: 00:1c.1

  949 17:24:50.663643  PCI: 00:1c.2

  950 17:24:50.663749  PCI: 00:1c.3

  951 17:24:50.663848  PCI: 00:1c.4

  952 17:24:50.666810  PCI: 00:1c.5

  953 17:24:50.666929  PCI: 00:1c.6

  954 17:24:50.670578  PCI: 00:1c.7

  955 17:24:50.670695  PCI: 00:1d.1

  956 17:24:50.670790  PCI: 00:1d.2

  957 17:24:50.673563  PCI: 00:1d.3

  958 17:24:50.673666  PCI: 00:1d.4

  959 17:24:50.676570  PCI: 00:1d.5

  960 17:24:50.676681  PCI: 00:1e.1

  961 17:24:50.680194  PCI: 00:1f.1

  962 17:24:50.680302  PCI: 00:1f.2

  963 17:24:50.680403  PCI: 00:1f.6

  964 17:24:50.683207  PCI: Check your devicetree.cb.

  965 17:24:50.686297  PCI: 00:02.0 scanning...

  966 17:24:50.690014  scan_generic_bus for PCI: 00:02.0

  967 17:24:50.693241  scan_generic_bus for PCI: 00:02.0 done

  968 17:24:50.699890  scan_bus: scanning of bus PCI: 00:02.0 took 10185 usecs

  969 17:24:50.702860  PCI: 00:14.0 scanning...

  970 17:24:50.706060  scan_static_bus for PCI: 00:14.0

  971 17:24:50.709131  USB0 port 0 enabled

  972 17:24:50.709245  USB0 port 0 scanning...

  973 17:24:50.712794  scan_static_bus for USB0 port 0

  974 17:24:50.715939  USB2 port 0 enabled

  975 17:24:50.719039  USB2 port 1 enabled

  976 17:24:50.719161  USB2 port 2 disabled

  977 17:24:50.722754  USB2 port 3 disabled

  978 17:24:50.725773  USB2 port 5 disabled

  979 17:24:50.725866  USB2 port 6 enabled

  980 17:24:50.728915  USB2 port 9 enabled

  981 17:24:50.732084  USB3 port 0 enabled

  982 17:24:50.732168  USB3 port 1 enabled

  983 17:24:50.735741  USB3 port 2 enabled

  984 17:24:50.735828  USB3 port 3 enabled

  985 17:24:50.738795  USB3 port 4 disabled

  986 17:24:50.741934  USB2 port 0 scanning...

  987 17:24:50.745322  scan_static_bus for USB2 port 0

  988 17:24:50.748339  scan_static_bus for USB2 port 0 done

  989 17:24:50.755151  scan_bus: scanning of bus USB2 port 0 took 9706 usecs

  990 17:24:50.755250  USB2 port 1 scanning...

  991 17:24:50.758429  scan_static_bus for USB2 port 1

  992 17:24:50.765338  scan_static_bus for USB2 port 1 done

  993 17:24:50.768420  scan_bus: scanning of bus USB2 port 1 took 9696 usecs

  994 17:24:50.771595  USB2 port 6 scanning...

  995 17:24:50.775152  scan_static_bus for USB2 port 6

  996 17:24:50.778407  scan_static_bus for USB2 port 6 done

  997 17:24:50.784949  scan_bus: scanning of bus USB2 port 6 took 9696 usecs

  998 17:24:50.788079  USB2 port 9 scanning...

  999 17:24:50.791024  scan_static_bus for USB2 port 9

 1000 17:24:50.794592  scan_static_bus for USB2 port 9 done

 1001 17:24:50.797591  scan_bus: scanning of bus USB2 port 9 took 9705 usecs

 1002 17:24:50.800792  USB3 port 0 scanning...

 1003 17:24:50.804405  scan_static_bus for USB3 port 0

 1004 17:24:50.807325  scan_static_bus for USB3 port 0 done

 1005 17:24:50.814384  scan_bus: scanning of bus USB3 port 0 took 9704 usecs

 1006 17:24:50.817368  USB3 port 1 scanning...

 1007 17:24:50.820889  scan_static_bus for USB3 port 1

 1008 17:24:50.824070  scan_static_bus for USB3 port 1 done

 1009 17:24:50.830705  scan_bus: scanning of bus USB3 port 1 took 9698 usecs

 1010 17:24:50.830819  USB3 port 2 scanning...

 1011 17:24:50.833626  scan_static_bus for USB3 port 2

 1012 17:24:50.840336  scan_static_bus for USB3 port 2 done

 1013 17:24:50.843319  scan_bus: scanning of bus USB3 port 2 took 9707 usecs

 1014 17:24:50.846564  USB3 port 3 scanning...

 1015 17:24:50.850404  scan_static_bus for USB3 port 3

 1016 17:24:50.853469  scan_static_bus for USB3 port 3 done

 1017 17:24:50.859747  scan_bus: scanning of bus USB3 port 3 took 9704 usecs

 1018 17:24:50.863259  scan_static_bus for USB0 port 0 done

 1019 17:24:50.870154  scan_bus: scanning of bus USB0 port 0 took 155361 usecs

 1020 17:24:50.873382  scan_static_bus for PCI: 00:14.0 done

 1021 17:24:50.876154  scan_bus: scanning of bus PCI: 00:14.0 took 172973 usecs

 1022 17:24:50.879762  PCI: 00:15.0 scanning...

 1023 17:24:50.882786  scan_generic_bus for PCI: 00:15.0

 1024 17:24:50.889586  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1025 17:24:50.892559  scan_generic_bus for PCI: 00:15.0 done

 1026 17:24:50.899206  scan_bus: scanning of bus PCI: 00:15.0 took 14297 usecs

 1027 17:24:50.899315  PCI: 00:15.1 scanning...

 1028 17:24:50.902255  scan_generic_bus for PCI: 00:15.1

 1029 17:24:50.908912  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1030 17:24:50.912039  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1031 17:24:50.915740  scan_generic_bus for PCI: 00:15.1 done

 1032 17:24:50.921733  scan_bus: scanning of bus PCI: 00:15.1 took 18588 usecs

 1033 17:24:50.924837  PCI: 00:19.0 scanning...

 1034 17:24:50.928069  scan_generic_bus for PCI: 00:19.0

 1035 17:24:50.931487  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1036 17:24:50.934632  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1037 17:24:50.941319  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1038 17:24:50.944367  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1039 17:24:50.948026  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1040 17:24:50.951028  scan_generic_bus for PCI: 00:19.0 done

 1041 17:24:50.958060  scan_bus: scanning of bus PCI: 00:19.0 took 30720 usecs

 1042 17:24:50.961109  PCI: 00:1d.0 scanning...

 1043 17:24:50.964442  do_pci_scan_bridge for PCI: 00:1d.0

 1044 17:24:50.967902  PCI: pci_scan_bus for bus 01

 1045 17:24:50.970847  PCI: 01:00.0 [1c5c/1327] enabled

 1046 17:24:50.974052  Enabling Common Clock Configuration

 1047 17:24:50.977136  L1 Sub-State supported from root port 29

 1048 17:24:50.980795  L1 Sub-State Support = 0xf

 1049 17:24:50.983874  CommonModeRestoreTime = 0x28

 1050 17:24:50.986921  Power On Value = 0x16, Power On Scale = 0x0

 1051 17:24:50.990471  ASPM: Enabled L1

 1052 17:24:50.997081  scan_bus: scanning of bus PCI: 00:1d.0 took 32787 usecs

 1053 17:24:50.997165  PCI: 00:1e.2 scanning...

 1054 17:24:51.003766  scan_generic_bus for PCI: 00:1e.2

 1055 17:24:51.006680  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1056 17:24:51.010187  scan_generic_bus for PCI: 00:1e.2 done

 1057 17:24:51.016628  scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs

 1058 17:24:51.016738  PCI: 00:1e.3 scanning...

 1059 17:24:51.020100  scan_generic_bus for PCI: 00:1e.3

 1060 17:24:51.026779  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1061 17:24:51.029732  scan_generic_bus for PCI: 00:1e.3 done

 1062 17:24:51.036492  scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs

 1063 17:24:51.036626  PCI: 00:1f.0 scanning...

 1064 17:24:51.039592  scan_static_bus for PCI: 00:1f.0

 1065 17:24:51.042729  PNP: 0c09.0 enabled

 1066 17:24:51.046349  scan_static_bus for PCI: 00:1f.0 done

 1067 17:24:51.052893  scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs

 1068 17:24:51.056001  PCI: 00:1f.3 scanning...

 1069 17:24:51.058908  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1070 17:24:51.062576  PCI: 00:1f.4 scanning...

 1071 17:24:51.065509  scan_generic_bus for PCI: 00:1f.4

 1072 17:24:51.072082  scan_generic_bus for PCI: 00:1f.4 done

 1073 17:24:51.075642  scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs

 1074 17:24:51.078793  PCI: 00:1f.5 scanning...

 1075 17:24:51.081811  scan_generic_bus for PCI: 00:1f.5

 1076 17:24:51.085324  scan_generic_bus for PCI: 00:1f.5 done

 1077 17:24:51.092189  scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs

 1078 17:24:51.098118  scan_bus: scanning of bus DOMAIN: 0000 took 604904 usecs

 1079 17:24:51.101340  scan_static_bus for Root Device done

 1080 17:24:51.108066  scan_bus: scanning of bus Root Device took 624783 usecs

 1081 17:24:51.108229  done

 1082 17:24:51.111652  Chrome EC: UHEPI supported

 1083 17:24:51.117728  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1084 17:24:51.121306  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1085 17:24:51.127607  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1086 17:24:51.134995  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1087 17:24:51.138462  SPI flash protection: WPSW=0 SRP0=0

 1088 17:24:51.145333  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1089 17:24:51.148221  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1090 17:24:51.151427  found VGA at PCI: 00:02.0

 1091 17:24:51.155005  Setting up VGA for PCI: 00:02.0

 1092 17:24:51.161127  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1093 17:24:51.164245  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1094 17:24:51.167564  Allocating resources...

 1095 17:24:51.171180  Reading resources...

 1096 17:24:51.173988  Root Device read_resources bus 0 link: 0

 1097 17:24:51.177489  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1098 17:24:51.184171  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1099 17:24:51.187463  DOMAIN: 0000 read_resources bus 0 link: 0

 1100 17:24:51.195110  PCI: 00:14.0 read_resources bus 0 link: 0

 1101 17:24:51.198243  USB0 port 0 read_resources bus 0 link: 0

 1102 17:24:51.206566  USB0 port 0 read_resources bus 0 link: 0 done

 1103 17:24:51.209702  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1104 17:24:51.217147  PCI: 00:15.0 read_resources bus 1 link: 0

 1105 17:24:51.220912  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1106 17:24:51.226851  PCI: 00:15.1 read_resources bus 2 link: 0

 1107 17:24:51.230537  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1108 17:24:51.238284  PCI: 00:19.0 read_resources bus 3 link: 0

 1109 17:24:51.244622  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1110 17:24:51.247611  PCI: 00:1d.0 read_resources bus 1 link: 0

 1111 17:24:51.254293  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1112 17:24:51.257262  PCI: 00:1e.2 read_resources bus 4 link: 0

 1113 17:24:51.264176  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1114 17:24:51.267559  PCI: 00:1e.3 read_resources bus 5 link: 0

 1115 17:24:51.273986  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1116 17:24:51.276953  PCI: 00:1f.0 read_resources bus 0 link: 0

 1117 17:24:51.283953  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1118 17:24:51.290101  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1119 17:24:51.293806  Root Device read_resources bus 0 link: 0 done

 1120 17:24:51.296999  Done reading resources.

 1121 17:24:51.303534  Show resources in subtree (Root Device)...After reading.

 1122 17:24:51.306734   Root Device child on link 0 CPU_CLUSTER: 0

 1123 17:24:51.309986    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1124 17:24:51.313557     APIC: 00

 1125 17:24:51.313640     APIC: 03

 1126 17:24:51.313727     APIC: 05

 1127 17:24:51.316735     APIC: 01

 1128 17:24:51.316917     APIC: 02

 1129 17:24:51.319885     APIC: 04

 1130 17:24:51.319975     APIC: 06

 1131 17:24:51.320077     APIC: 07

 1132 17:24:51.369944    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1133 17:24:51.370796    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1134 17:24:51.370971    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1135 17:24:51.371082     PCI: 00:00.0

 1136 17:24:51.371222     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1137 17:24:51.371339     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1138 17:24:51.419412     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1139 17:24:51.419717     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1140 17:24:51.419854     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1141 17:24:51.420254     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1142 17:24:51.420531     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1143 17:24:51.455480     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1144 17:24:51.455656     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1145 17:24:51.455926     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1146 17:24:51.455996     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1147 17:24:51.462716     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1148 17:24:51.468677     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1149 17:24:51.478648     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1150 17:24:51.488408     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1151 17:24:51.495379     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1152 17:24:51.498243     PCI: 00:02.0

 1153 17:24:51.507963     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 17:24:51.518206     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1155 17:24:51.528083     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1156 17:24:51.528168     PCI: 00:04.0

 1157 17:24:51.531072     PCI: 00:08.0

 1158 17:24:51.540588     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1159 17:24:51.540672     PCI: 00:12.0

 1160 17:24:51.550267     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 17:24:51.557013     PCI: 00:14.0 child on link 0 USB0 port 0

 1162 17:24:51.566880     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1163 17:24:51.569863      USB0 port 0 child on link 0 USB2 port 0

 1164 17:24:51.573612       USB2 port 0

 1165 17:24:51.573694       USB2 port 1

 1166 17:24:51.576636       USB2 port 2

 1167 17:24:51.576718       USB2 port 3

 1168 17:24:51.579726       USB2 port 5

 1169 17:24:51.579808       USB2 port 6

 1170 17:24:51.582826       USB2 port 9

 1171 17:24:51.582908       USB3 port 0

 1172 17:24:51.586496       USB3 port 1

 1173 17:24:51.589547       USB3 port 2

 1174 17:24:51.589628       USB3 port 3

 1175 17:24:51.592947       USB3 port 4

 1176 17:24:51.593028     PCI: 00:14.2

 1177 17:24:51.602817     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1178 17:24:51.612066     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1179 17:24:51.615707     PCI: 00:14.3

 1180 17:24:51.625275     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1181 17:24:51.628422     PCI: 00:15.0 child on link 0 I2C: 01:15

 1182 17:24:51.638538     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 17:24:51.641419      I2C: 01:15

 1184 17:24:51.644978     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1185 17:24:51.654580     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 17:24:51.654665      I2C: 02:5d

 1187 17:24:51.657964      GENERIC: 0.0

 1188 17:24:51.658045     PCI: 00:16.0

 1189 17:24:51.667799     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 17:24:51.671451     PCI: 00:17.0

 1191 17:24:51.680649     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1192 17:24:51.690570     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1193 17:24:51.697459     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1194 17:24:51.707037     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1195 17:24:51.713633     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1196 17:24:51.723436     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1197 17:24:51.726450     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1198 17:24:51.736388     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1199 17:24:51.739428      I2C: 03:1a

 1200 17:24:51.739514      I2C: 03:38

 1201 17:24:51.742997      I2C: 03:39

 1202 17:24:51.743106      I2C: 03:3a

 1203 17:24:51.746116      I2C: 03:3b

 1204 17:24:51.749151     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1205 17:24:51.759075     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1206 17:24:51.768891     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1207 17:24:51.778639     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1208 17:24:51.778724      PCI: 01:00.0

 1209 17:24:51.788465      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1210 17:24:51.791370     PCI: 00:1e.0

 1211 17:24:51.801349     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1212 17:24:51.810841     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1213 17:24:51.814171     PCI: 00:1e.2 child on link 0 SPI: 00

 1214 17:24:51.823938     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1215 17:24:51.827426      SPI: 00

 1216 17:24:51.830500     PCI: 00:1e.3 child on link 0 SPI: 01

 1217 17:24:51.840201     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1218 17:24:51.840292      SPI: 01

 1219 17:24:51.846983     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1220 17:24:51.853621     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1221 17:24:51.862914     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1222 17:24:51.866573      PNP: 0c09.0

 1223 17:24:51.873317      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1224 17:24:51.876348     PCI: 00:1f.3

 1225 17:24:51.886293     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1226 17:24:51.896062     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1227 17:24:51.896147     PCI: 00:1f.4

 1228 17:24:51.905827     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1229 17:24:51.915673     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1230 17:24:51.918699     PCI: 00:1f.5

 1231 17:24:51.928534     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1232 17:24:51.935034  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1233 17:24:51.938051  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1234 17:24:51.947960  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1235 17:24:51.951575  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1236 17:24:51.954809  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1237 17:24:51.957885  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1238 17:24:51.960785  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1239 17:24:51.967588  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1240 17:24:51.974223  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1241 17:24:51.983684  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1242 17:24:51.990364  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1243 17:24:51.996892  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1244 17:24:52.000450  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1245 17:24:52.010282  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1246 17:24:52.013464  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1247 17:24:52.020069  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1248 17:24:52.022951  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1249 17:24:52.029765  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1250 17:24:52.032670  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1251 17:24:52.039672  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1252 17:24:52.042553  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1253 17:24:52.049279  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1254 17:24:52.052385  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1255 17:24:52.059013  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1256 17:24:52.062165  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1257 17:24:52.068361  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1258 17:24:52.072015  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1259 17:24:52.078106  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1260 17:24:52.081838  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1261 17:24:52.088452  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1262 17:24:52.091610  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1263 17:24:52.097756  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1264 17:24:52.101392  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1265 17:24:52.107991  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1266 17:24:52.111115  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1267 17:24:52.117846  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1268 17:24:52.120864  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1269 17:24:52.130923  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1270 17:24:52.133674  avoid_fixed_resources: DOMAIN: 0000

 1271 17:24:52.140666  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1272 17:24:52.143663  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1273 17:24:52.153979  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1274 17:24:52.160063  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1275 17:24:52.166182  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1276 17:24:52.176042  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1277 17:24:52.182745  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1278 17:24:52.189685  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1279 17:24:52.199201  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1280 17:24:52.206196  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1281 17:24:52.212166  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1282 17:24:52.221665  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1283 17:24:52.221779  Setting resources...

 1284 17:24:52.228390  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1285 17:24:52.231709  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1286 17:24:52.238287  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1287 17:24:52.241728  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1288 17:24:52.244565  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1289 17:24:52.251456  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1290 17:24:52.257870  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1291 17:24:52.264579  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1292 17:24:52.270714  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1293 17:24:52.277304  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1294 17:24:52.280321  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1295 17:24:52.287094  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1296 17:24:52.290186  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1297 17:24:52.297022  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1298 17:24:52.300053  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1299 17:24:52.306950  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1300 17:24:52.309993  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1301 17:24:52.316862  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1302 17:24:52.319883  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1303 17:24:52.326483  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1304 17:24:52.329732  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1305 17:24:52.336343  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1306 17:24:52.339095  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1307 17:24:52.345633  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1308 17:24:52.349041  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1309 17:24:52.356262  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1310 17:24:52.359358  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1311 17:24:52.365399  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1312 17:24:52.369154  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1313 17:24:52.375174  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1314 17:24:52.378822  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1315 17:24:52.382033  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1316 17:24:52.391617  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1317 17:24:52.398604  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1318 17:24:52.404722  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1319 17:24:52.414389  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1320 17:24:52.418076  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1321 17:24:52.424316  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1322 17:24:52.430882  Root Device assign_resources, bus 0 link: 0

 1323 17:24:52.434210  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1324 17:24:52.443670  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1325 17:24:52.450333  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1326 17:24:52.460140  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1327 17:24:52.466949  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1328 17:24:52.476801  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1329 17:24:52.483391  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1330 17:24:52.489324  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1331 17:24:52.492510  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1332 17:24:52.502310  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1333 17:24:52.509032  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1334 17:24:52.518782  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1335 17:24:52.525515  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1336 17:24:52.531734  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1337 17:24:52.535000  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1338 17:24:52.545138  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1339 17:24:52.548033  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1340 17:24:52.551502  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1341 17:24:52.561486  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1342 17:24:52.567916  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1343 17:24:52.578120  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1344 17:24:52.584202  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1345 17:24:52.594075  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1346 17:24:52.600773  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1347 17:24:52.606927  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1348 17:24:52.616730  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1349 17:24:52.619902  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1350 17:24:52.626720  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1351 17:24:52.633257  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1352 17:24:52.642897  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1353 17:24:52.653197  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1354 17:24:52.655986  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1355 17:24:52.665506  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1356 17:24:52.668889  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1357 17:24:52.678781  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1358 17:24:52.684955  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1359 17:24:52.688578  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1360 17:24:52.695072  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1361 17:24:52.701651  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1362 17:24:52.708325  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1363 17:24:52.711587  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1364 17:24:52.718217  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1365 17:24:52.721874  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 17:24:52.727998  LPC: Trying to open IO window from 800 size 1ff

 1367 17:24:52.734760  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1368 17:24:52.744494  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1369 17:24:52.750637  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1370 17:24:52.760928  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1371 17:24:52.764030  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 17:24:52.770459  Root Device assign_resources, bus 0 link: 0

 1373 17:24:52.770543  Done setting resources.

 1374 17:24:52.776862  Show resources in subtree (Root Device)...After assigning values.

 1375 17:24:52.783432   Root Device child on link 0 CPU_CLUSTER: 0

 1376 17:24:52.787039    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1377 17:24:52.787167     APIC: 00

 1378 17:24:52.790055     APIC: 03

 1379 17:24:52.790156     APIC: 05

 1380 17:24:52.790248     APIC: 01

 1381 17:24:52.792968     APIC: 02

 1382 17:24:52.793086     APIC: 04

 1383 17:24:52.796737     APIC: 06

 1384 17:24:52.796857     APIC: 07

 1385 17:24:52.799692    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1386 17:24:52.809350    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1387 17:24:52.822207    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1388 17:24:52.822309     PCI: 00:00.0

 1389 17:24:52.831838     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1390 17:24:52.842245     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1391 17:24:52.851966     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1392 17:24:52.861798     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1393 17:24:52.871295     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1394 17:24:52.881083     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1395 17:24:52.887554     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1396 17:24:52.897456     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1397 17:24:52.906840     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1398 17:24:52.916811     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1399 17:24:52.926547     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1400 17:24:52.936199     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1401 17:24:52.946460     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1402 17:24:52.956352     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1403 17:24:52.965635     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1404 17:24:52.972325     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1405 17:24:52.975778     PCI: 00:02.0

 1406 17:24:52.985750     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1407 17:24:52.995104     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1408 17:24:53.005488     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1409 17:24:53.008298     PCI: 00:04.0

 1410 17:24:53.008375     PCI: 00:08.0

 1411 17:24:53.017948     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1412 17:24:53.021701     PCI: 00:12.0

 1413 17:24:53.031407     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1414 17:24:53.034440     PCI: 00:14.0 child on link 0 USB0 port 0

 1415 17:24:53.044203     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1416 17:24:53.050904      USB0 port 0 child on link 0 USB2 port 0

 1417 17:24:53.050997       USB2 port 0

 1418 17:24:53.054163       USB2 port 1

 1419 17:24:53.054240       USB2 port 2

 1420 17:24:53.057769       USB2 port 3

 1421 17:24:53.060654       USB2 port 5

 1422 17:24:53.060728       USB2 port 6

 1423 17:24:53.063637       USB2 port 9

 1424 17:24:53.063709       USB3 port 0

 1425 17:24:53.067369       USB3 port 1

 1426 17:24:53.067440       USB3 port 2

 1427 17:24:53.070442       USB3 port 3

 1428 17:24:53.070517       USB3 port 4

 1429 17:24:53.073540     PCI: 00:14.2

 1430 17:24:53.083595     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1431 17:24:53.093414     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1432 17:24:53.096855     PCI: 00:14.3

 1433 17:24:53.106222     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1434 17:24:53.109324     PCI: 00:15.0 child on link 0 I2C: 01:15

 1435 17:24:53.119239     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1436 17:24:53.122884      I2C: 01:15

 1437 17:24:53.125950     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1438 17:24:53.135693     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1439 17:24:53.138770      I2C: 02:5d

 1440 17:24:53.138874      GENERIC: 0.0

 1441 17:24:53.142457     PCI: 00:16.0

 1442 17:24:53.152123     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1443 17:24:53.152207     PCI: 00:17.0

 1444 17:24:53.164861     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1445 17:24:53.174671     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1446 17:24:53.181379     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1447 17:24:53.191495     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1448 17:24:53.200731     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1449 17:24:53.210492     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1450 17:24:53.214286     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1451 17:24:53.227599     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1452 17:24:53.227711      I2C: 03:1a

 1453 17:24:53.227811      I2C: 03:38

 1454 17:24:53.230322      I2C: 03:39

 1455 17:24:53.230411      I2C: 03:3a

 1456 17:24:53.233604      I2C: 03:3b

 1457 17:24:53.236646     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1458 17:24:53.246442     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1459 17:24:53.256388     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1460 17:24:53.266153     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1461 17:24:53.269735      PCI: 01:00.0

 1462 17:24:53.279350      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1463 17:24:53.282594     PCI: 00:1e.0

 1464 17:24:53.292084     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1465 17:24:53.301759     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1466 17:24:53.305326     PCI: 00:1e.2 child on link 0 SPI: 00

 1467 17:24:53.318343     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1468 17:24:53.318436      SPI: 00

 1469 17:24:53.321834     PCI: 00:1e.3 child on link 0 SPI: 01

 1470 17:24:53.331520     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1471 17:24:53.334577      SPI: 01

 1472 17:24:53.338236     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1473 17:24:53.348038     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1474 17:24:53.354747     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1475 17:24:53.357675      PNP: 0c09.0

 1476 17:24:53.367274      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1477 17:24:53.367387     PCI: 00:1f.3

 1478 17:24:53.377088     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1479 17:24:53.386914     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1480 17:24:53.389956     PCI: 00:1f.4

 1481 17:24:53.400138     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1482 17:24:53.409409     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1483 17:24:53.409526     PCI: 00:1f.5

 1484 17:24:53.423075     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1485 17:24:53.423221  Done allocating resources.

 1486 17:24:53.429285  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1487 17:24:53.432652  Enabling resources...

 1488 17:24:53.435655  PCI: 00:00.0 subsystem <- 8086/9b61

 1489 17:24:53.439338  PCI: 00:00.0 cmd <- 06

 1490 17:24:53.442164  PCI: 00:02.0 subsystem <- 8086/9b41

 1491 17:24:53.445876  PCI: 00:02.0 cmd <- 03

 1492 17:24:53.449030  PCI: 00:08.0 cmd <- 06

 1493 17:24:53.452117  PCI: 00:12.0 subsystem <- 8086/02f9

 1494 17:24:53.455112  PCI: 00:12.0 cmd <- 02

 1495 17:24:53.458889  PCI: 00:14.0 subsystem <- 8086/02ed

 1496 17:24:53.462014  PCI: 00:14.0 cmd <- 02

 1497 17:24:53.462144  PCI: 00:14.2 cmd <- 02

 1498 17:24:53.468719  PCI: 00:14.3 subsystem <- 8086/02f0

 1499 17:24:53.468833  PCI: 00:14.3 cmd <- 02

 1500 17:24:53.474732  PCI: 00:15.0 subsystem <- 8086/02e8

 1501 17:24:53.474840  PCI: 00:15.0 cmd <- 02

 1502 17:24:53.478387  PCI: 00:15.1 subsystem <- 8086/02e9

 1503 17:24:53.481485  PCI: 00:15.1 cmd <- 02

 1504 17:24:53.484595  PCI: 00:16.0 subsystem <- 8086/02e0

 1505 17:24:53.488257  PCI: 00:16.0 cmd <- 02

 1506 17:24:53.491320  PCI: 00:17.0 subsystem <- 8086/02d3

 1507 17:24:53.494341  PCI: 00:17.0 cmd <- 03

 1508 17:24:53.497870  PCI: 00:19.0 subsystem <- 8086/02c5

 1509 17:24:53.500952  PCI: 00:19.0 cmd <- 02

 1510 17:24:53.504404  PCI: 00:1d.0 bridge ctrl <- 0013

 1511 17:24:53.507510  PCI: 00:1d.0 subsystem <- 8086/02b0

 1512 17:24:53.511009  PCI: 00:1d.0 cmd <- 06

 1513 17:24:53.513992  PCI: 00:1e.0 subsystem <- 8086/02a8

 1514 17:24:53.517453  PCI: 00:1e.0 cmd <- 06

 1515 17:24:53.520696  PCI: 00:1e.2 subsystem <- 8086/02aa

 1516 17:24:53.523517  PCI: 00:1e.2 cmd <- 06

 1517 17:24:53.526875  PCI: 00:1e.3 subsystem <- 8086/02ab

 1518 17:24:53.530592  PCI: 00:1e.3 cmd <- 02

 1519 17:24:53.533618  PCI: 00:1f.0 subsystem <- 8086/0284

 1520 17:24:53.536644  PCI: 00:1f.0 cmd <- 407

 1521 17:24:53.540483  PCI: 00:1f.3 subsystem <- 8086/02c8

 1522 17:24:53.540562  PCI: 00:1f.3 cmd <- 02

 1523 17:24:53.546991  PCI: 00:1f.4 subsystem <- 8086/02a3

 1524 17:24:53.547100  PCI: 00:1f.4 cmd <- 03

 1525 17:24:53.553703  PCI: 00:1f.5 subsystem <- 8086/02a4

 1526 17:24:53.553791  PCI: 00:1f.5 cmd <- 406

 1527 17:24:53.563463  PCI: 01:00.0 cmd <- 02

 1528 17:24:53.568323  done.

 1529 17:24:53.580673  ME: Version: 14.0.39.1367

 1530 17:24:53.587463  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12

 1531 17:24:53.590533  Initializing devices...

 1532 17:24:53.590614  Root Device init ...

 1533 17:24:53.596919  Chrome EC: Set SMI mask to 0x0000000000000000

 1534 17:24:53.603271  Chrome EC: clear events_b mask to 0x0000000000000000

 1535 17:24:53.606895  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1536 17:24:53.613631  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1537 17:24:53.619881  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1538 17:24:53.623391  Chrome EC: Set WAKE mask to 0x0000000000000000

 1539 17:24:53.629913  Root Device init finished in 35170 usecs

 1540 17:24:53.632913  CPU_CLUSTER: 0 init ...

 1541 17:24:53.635872  CPU_CLUSTER: 0 init finished in 2448 usecs

 1542 17:24:53.641591  PCI: 00:00.0 init ...

 1543 17:24:53.644812  CPU TDP: 15 Watts

 1544 17:24:53.648077  CPU PL2 = 64 Watts

 1545 17:24:53.650960  PCI: 00:00.0 init finished in 7078 usecs

 1546 17:24:53.654505  PCI: 00:02.0 init ...

 1547 17:24:53.657602  PCI: 00:02.0 init finished in 2253 usecs

 1548 17:24:53.661239  PCI: 00:08.0 init ...

 1549 17:24:53.664297  PCI: 00:08.0 init finished in 2252 usecs

 1550 17:24:53.667451  PCI: 00:12.0 init ...

 1551 17:24:53.671054  PCI: 00:12.0 init finished in 2245 usecs

 1552 17:24:53.674153  PCI: 00:14.0 init ...

 1553 17:24:53.677007  PCI: 00:14.0 init finished in 2251 usecs

 1554 17:24:53.680160  PCI: 00:14.2 init ...

 1555 17:24:53.683867  PCI: 00:14.2 init finished in 2252 usecs

 1556 17:24:53.686958  PCI: 00:14.3 init ...

 1557 17:24:53.689985  PCI: 00:14.3 init finished in 2270 usecs

 1558 17:24:53.693632  PCI: 00:15.0 init ...

 1559 17:24:53.696890  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1560 17:24:53.703511  PCI: 00:15.0 init finished in 5977 usecs

 1561 17:24:53.703589  PCI: 00:15.1 init ...

 1562 17:24:53.710085  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1563 17:24:53.713156  PCI: 00:15.1 init finished in 5974 usecs

 1564 17:24:53.716308  PCI: 00:16.0 init ...

 1565 17:24:53.719817  PCI: 00:16.0 init finished in 2253 usecs

 1566 17:24:53.723429  PCI: 00:19.0 init ...

 1567 17:24:53.726250  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1568 17:24:53.729774  PCI: 00:19.0 init finished in 5976 usecs

 1569 17:24:53.732740  PCI: 00:1d.0 init ...

 1570 17:24:53.736177  Initializing PCH PCIe bridge.

 1571 17:24:53.739325  PCI: 00:1d.0 init finished in 5282 usecs

 1572 17:24:53.743002  PCI: 00:1f.0 init ...

 1573 17:24:53.746659  IOAPIC: Initializing IOAPIC at 0xfec00000

 1574 17:24:53.753316  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1575 17:24:53.753403  IOAPIC: ID = 0x02

 1576 17:24:53.756384  IOAPIC: Dumping registers

 1577 17:24:53.759370    reg 0x0000: 0x02000000

 1578 17:24:53.762955    reg 0x0001: 0x00770020

 1579 17:24:53.765986    reg 0x0002: 0x00000000

 1580 17:24:53.768924  PCI: 00:1f.0 init finished in 23550 usecs

 1581 17:24:53.772603  PCI: 00:1f.4 init ...

 1582 17:24:53.775443  PCI: 00:1f.4 init finished in 2263 usecs

 1583 17:24:53.787647  PCI: 01:00.0 init ...

 1584 17:24:53.790687  PCI: 01:00.0 init finished in 2253 usecs

 1585 17:24:53.795027  PNP: 0c09.0 init ...

 1586 17:24:53.801206  Google Chrome EC uptime: 11.052 seconds

 1587 17:24:53.805017  Google Chrome AP resets since EC boot: 0

 1588 17:24:53.808027  Google Chrome most recent AP reset causes:

 1589 17:24:53.814868  Google Chrome EC reset flags at last EC boot: reset-pin

 1590 17:24:53.818063  PNP: 0c09.0 init finished in 20576 usecs

 1591 17:24:53.821026  Devices initialized

 1592 17:24:53.823953  Show all devs... After init.

 1593 17:24:53.824051  Root Device: enabled 1

 1594 17:24:53.827464  CPU_CLUSTER: 0: enabled 1

 1595 17:24:53.830895  DOMAIN: 0000: enabled 1

 1596 17:24:53.833828  APIC: 00: enabled 1

 1597 17:24:53.833910  PCI: 00:00.0: enabled 1

 1598 17:24:53.837595  PCI: 00:02.0: enabled 1

 1599 17:24:53.840623  PCI: 00:04.0: enabled 0

 1600 17:24:53.843766  PCI: 00:05.0: enabled 0

 1601 17:24:53.843848  PCI: 00:12.0: enabled 1

 1602 17:24:53.847143  PCI: 00:12.5: enabled 0

 1603 17:24:53.850302  PCI: 00:12.6: enabled 0

 1604 17:24:53.853779  PCI: 00:14.0: enabled 1

 1605 17:24:53.853894  PCI: 00:14.1: enabled 0

 1606 17:24:53.856875  PCI: 00:14.3: enabled 1

 1607 17:24:53.860078  PCI: 00:14.5: enabled 0

 1608 17:24:53.863041  PCI: 00:15.0: enabled 1

 1609 17:24:53.863189  PCI: 00:15.1: enabled 1

 1610 17:24:53.866775  PCI: 00:15.2: enabled 0

 1611 17:24:53.869893  PCI: 00:15.3: enabled 0

 1612 17:24:53.872941  PCI: 00:16.0: enabled 1

 1613 17:24:53.873023  PCI: 00:16.1: enabled 0

 1614 17:24:53.876618  PCI: 00:16.2: enabled 0

 1615 17:24:53.879815  PCI: 00:16.3: enabled 0

 1616 17:24:53.879898  PCI: 00:16.4: enabled 0

 1617 17:24:53.882694  PCI: 00:16.5: enabled 0

 1618 17:24:53.886175  PCI: 00:17.0: enabled 1

 1619 17:24:53.889297  PCI: 00:19.0: enabled 1

 1620 17:24:53.889404  PCI: 00:19.1: enabled 0

 1621 17:24:53.893051  PCI: 00:19.2: enabled 0

 1622 17:24:53.896223  PCI: 00:1a.0: enabled 0

 1623 17:24:53.899111  PCI: 00:1c.0: enabled 0

 1624 17:24:53.899219  PCI: 00:1c.1: enabled 0

 1625 17:24:53.902263  PCI: 00:1c.2: enabled 0

 1626 17:24:53.905912  PCI: 00:1c.3: enabled 0

 1627 17:24:53.908932  PCI: 00:1c.4: enabled 0

 1628 17:24:53.909015  PCI: 00:1c.5: enabled 0

 1629 17:24:53.912290  PCI: 00:1c.6: enabled 0

 1630 17:24:53.915750  PCI: 00:1c.7: enabled 0

 1631 17:24:53.918565  PCI: 00:1d.0: enabled 1

 1632 17:24:53.918648  PCI: 00:1d.1: enabled 0

 1633 17:24:53.922244  PCI: 00:1d.2: enabled 0

 1634 17:24:53.925107  PCI: 00:1d.3: enabled 0

 1635 17:24:53.928536  PCI: 00:1d.4: enabled 0

 1636 17:24:53.928619  PCI: 00:1d.5: enabled 0

 1637 17:24:53.931862  PCI: 00:1e.0: enabled 1

 1638 17:24:53.935345  PCI: 00:1e.1: enabled 0

 1639 17:24:53.938605  PCI: 00:1e.2: enabled 1

 1640 17:24:53.938721  PCI: 00:1e.3: enabled 1

 1641 17:24:53.941666  PCI: 00:1f.0: enabled 1

 1642 17:24:53.945156  PCI: 00:1f.1: enabled 0

 1643 17:24:53.948318  PCI: 00:1f.2: enabled 0

 1644 17:24:53.948403  PCI: 00:1f.3: enabled 1

 1645 17:24:53.951336  PCI: 00:1f.4: enabled 1

 1646 17:24:53.955067  PCI: 00:1f.5: enabled 1

 1647 17:24:53.957903  PCI: 00:1f.6: enabled 0

 1648 17:24:53.957988  USB0 port 0: enabled 1

 1649 17:24:53.961456  I2C: 01:15: enabled 1

 1650 17:24:53.964569  I2C: 02:5d: enabled 1

 1651 17:24:53.964653  GENERIC: 0.0: enabled 1

 1652 17:24:53.968373  I2C: 03:1a: enabled 1

 1653 17:24:53.971038  I2C: 03:38: enabled 1

 1654 17:24:53.971182  I2C: 03:39: enabled 1

 1655 17:24:53.974188  I2C: 03:3a: enabled 1

 1656 17:24:53.977813  I2C: 03:3b: enabled 1

 1657 17:24:53.981015  PCI: 00:00.0: enabled 1

 1658 17:24:53.981127  SPI: 00: enabled 1

 1659 17:24:53.984171  SPI: 01: enabled 1

 1660 17:24:53.984254  PNP: 0c09.0: enabled 1

 1661 17:24:53.987265  USB2 port 0: enabled 1

 1662 17:24:53.990892  USB2 port 1: enabled 1

 1663 17:24:53.993981  USB2 port 2: enabled 0

 1664 17:24:53.994063  USB2 port 3: enabled 0

 1665 17:24:53.997036  USB2 port 5: enabled 0

 1666 17:24:54.000719  USB2 port 6: enabled 1

 1667 17:24:54.000801  USB2 port 9: enabled 1

 1668 17:24:54.003771  USB3 port 0: enabled 1

 1669 17:24:54.006869  USB3 port 1: enabled 1

 1670 17:24:54.010528  USB3 port 2: enabled 1

 1671 17:24:54.010635  USB3 port 3: enabled 1

 1672 17:24:54.013627  USB3 port 4: enabled 0

 1673 17:24:54.016734  APIC: 03: enabled 1

 1674 17:24:54.016816  APIC: 05: enabled 1

 1675 17:24:54.020361  APIC: 01: enabled 1

 1676 17:24:54.023062  APIC: 02: enabled 1

 1677 17:24:54.023210  APIC: 04: enabled 1

 1678 17:24:54.026814  APIC: 06: enabled 1

 1679 17:24:54.026956  APIC: 07: enabled 1

 1680 17:24:54.029721  PCI: 00:08.0: enabled 1

 1681 17:24:54.033163  PCI: 00:14.2: enabled 1

 1682 17:24:54.036358  PCI: 01:00.0: enabled 1

 1683 17:24:54.039816  Disabling ACPI via APMC:

 1684 17:24:54.043113  done.

 1685 17:24:54.046159  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1686 17:24:54.049740  ELOG: NV offset 0xaf0000 size 0x4000

 1687 17:24:54.056601  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1688 17:24:54.063277  ELOG: Event(17) added with size 13 at 2023-06-09 17:24:53 UTC

 1689 17:24:54.070005  POST: Unexpected post code in previous boot: 0x75

 1690 17:24:54.076214  ELOG: Event(A3) added with size 11 at 2023-06-09 17:24:53 UTC

 1691 17:24:54.082894  ELOG: Event(92) added with size 9 at 2023-06-09 17:24:53 UTC

 1692 17:24:54.089083  ELOG: Event(93) added with size 9 at 2023-06-09 17:24:53 UTC

 1693 17:24:54.096061  ELOG: Event(9A) added with size 9 at 2023-06-09 17:24:53 UTC

 1694 17:24:54.102615  ELOG: Event(9E) added with size 10 at 2023-06-09 17:24:53 UTC

 1695 17:24:54.108644  ELOG: Event(9F) added with size 14 at 2023-06-09 17:24:53 UTC

 1696 17:24:54.111904  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1697 17:24:54.118567  ELOG: Event(A1) added with size 10 at 2023-06-09 17:24:53 UTC

 1698 17:24:54.128415  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1699 17:24:54.134866  ELOG: Event(A0) added with size 9 at 2023-06-09 17:24:53 UTC

 1700 17:24:54.137936  elog_add_boot_reason: Logged dev mode boot

 1701 17:24:54.141237  Finalize devices...

 1702 17:24:54.141347  PCI: 00:17.0 final

 1703 17:24:54.144597  Devices finalized

 1704 17:24:54.147982  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1705 17:24:54.154351  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1706 17:24:54.157791  ME: HFSTS1                  : 0x90000245

 1707 17:24:54.160881  ME: HFSTS2                  : 0x3B850126

 1708 17:24:54.167516  ME: HFSTS3                  : 0x00000020

 1709 17:24:54.170772  ME: HFSTS4                  : 0x00004800

 1710 17:24:54.173643  ME: HFSTS5                  : 0x00000000

 1711 17:24:54.176852  ME: HFSTS6                  : 0x40400006

 1712 17:24:54.180442  ME: Manufacturing Mode      : NO

 1713 17:24:54.187016  ME: FW Partition Table      : OK

 1714 17:24:54.190108  ME: Bringup Loader Failure  : NO

 1715 17:24:54.193044  ME: Firmware Init Complete  : YES

 1716 17:24:54.196894  ME: Boot Options Present    : NO

 1717 17:24:54.199928  ME: Update In Progress      : NO

 1718 17:24:54.202974  ME: D0i3 Support            : YES

 1719 17:24:54.206665  ME: Low Power State Enabled : NO

 1720 17:24:54.209685  ME: CPU Replaced            : NO

 1721 17:24:54.212715  ME: CPU Replacement Valid   : YES

 1722 17:24:54.216460  ME: Current Working State   : 5

 1723 17:24:54.219607  ME: Current Operation State : 1

 1724 17:24:54.222769  ME: Current Operation Mode  : 0

 1725 17:24:54.226662  ME: Error Code              : 0

 1726 17:24:54.229509  ME: CPU Debug Disabled      : YES

 1727 17:24:54.232699  ME: TXT Support             : NO

 1728 17:24:54.235544  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1729 17:24:54.242489  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1730 17:24:54.245516  CBFS @ c08000 size 3f8000

 1731 17:24:54.252246  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1732 17:24:54.255199  CBFS: Locating 'fallback/dsdt.aml'

 1733 17:24:54.258779  CBFS: Found @ offset 10bb80 size 3fa5

 1734 17:24:54.261814  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1735 17:24:54.265400  CBFS @ c08000 size 3f8000

 1736 17:24:54.272141  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1737 17:24:54.275279  CBFS: Locating 'fallback/slic'

 1738 17:24:54.281932  CBFS: 'fallback/slic' not found.

 1739 17:24:54.285001  ACPI: Writing ACPI tables at 99b3e000.

 1740 17:24:54.285083  ACPI:    * FACS

 1741 17:24:54.288654  ACPI:    * DSDT

 1742 17:24:54.291897  Ramoops buffer: 0x100000@0x99a3d000.

 1743 17:24:54.294754  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1744 17:24:54.301545  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1745 17:24:54.304691  Google Chrome EC: version:

 1746 17:24:54.308338  	ro: helios_v2.0.2659-56403530b

 1747 17:24:54.311294  	rw: helios_v2.0.2849-c41de27e7d

 1748 17:24:54.311383    running image: 1

 1749 17:24:54.315953  ACPI:    * FADT

 1750 17:24:54.316035  SCI is IRQ9

 1751 17:24:54.322594  ACPI: added table 1/32, length now 40

 1752 17:24:54.322677  ACPI:     * SSDT

 1753 17:24:54.325638  Found 1 CPU(s) with 8 core(s) each.

 1754 17:24:54.332359  Error: Could not locate 'wifi_sar' in VPD.

 1755 17:24:54.335424  Checking CBFS for default SAR values

 1756 17:24:54.339054  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1757 17:24:54.342205  CBFS @ c08000 size 3f8000

 1758 17:24:54.348708  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1759 17:24:54.352162  CBFS: Locating 'wifi_sar_defaults.hex'

 1760 17:24:54.355162  CBFS: Found @ offset 5fac0 size 77

 1761 17:24:54.358744  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1762 17:24:54.364810  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1763 17:24:54.368178  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1764 17:24:54.374582  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1765 17:24:54.378233  failed to find key in VPD: dsm_calib_r0_0

 1766 17:24:54.387602  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1767 17:24:54.394460  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1768 17:24:54.397529  failed to find key in VPD: dsm_calib_r0_1

 1769 17:24:54.404303  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1770 17:24:54.410509  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1771 17:24:54.414263  failed to find key in VPD: dsm_calib_r0_2

 1772 17:24:54.423946  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1773 17:24:54.429993  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1774 17:24:54.433839  failed to find key in VPD: dsm_calib_r0_3

 1775 17:24:54.443605  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1776 17:24:54.446491  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1777 17:24:54.453496  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1778 17:24:54.456654  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1779 17:24:54.460068  EC returned error result code 1

 1780 17:24:54.463528  EC returned error result code 1

 1781 17:24:54.466509  EC returned error result code 1

 1782 17:24:54.472974  PS2K: Bad resp from EC. Vivaldi disabled!

 1783 17:24:54.479950  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1784 17:24:54.482860  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1785 17:24:54.489549  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1786 17:24:54.492627  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1787 17:24:54.499284  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1788 17:24:54.505430  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1789 17:24:54.512311  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1790 17:24:54.518472  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1791 17:24:54.522093  ACPI: added table 2/32, length now 44

 1792 17:24:54.522206  ACPI:    * MCFG

 1793 17:24:54.525177  ACPI: added table 3/32, length now 48

 1794 17:24:54.528306  ACPI:    * TPM2

 1795 17:24:54.531950  TPM2 log created at 99a2d000

 1796 17:24:54.535197  ACPI: added table 4/32, length now 52

 1797 17:24:54.535280  ACPI:    * MADT

 1798 17:24:54.538109  SCI is IRQ9

 1799 17:24:54.541819  ACPI: added table 5/32, length now 56

 1800 17:24:54.544864  current = 99b43ac0

 1801 17:24:54.544947  ACPI:    * DMAR

 1802 17:24:54.547903  ACPI: added table 6/32, length now 60

 1803 17:24:54.551465  ACPI:    * IGD OpRegion

 1804 17:24:54.554600  GMA: Found VBT in CBFS

 1805 17:24:54.557622  GMA: Found valid VBT in CBFS

 1806 17:24:54.560832  ACPI: added table 7/32, length now 64

 1807 17:24:54.560915  ACPI:    * HPET

 1808 17:24:54.564636  ACPI: added table 8/32, length now 68

 1809 17:24:54.567618  ACPI: done.

 1810 17:24:54.570827  ACPI tables: 31744 bytes.

 1811 17:24:54.574067  smbios_write_tables: 99a2c000

 1812 17:24:54.577308  EC returned error result code 3

 1813 17:24:54.580824  Couldn't obtain OEM name from CBI

 1814 17:24:54.583692  Create SMBIOS type 17

 1815 17:24:54.587019  PCI: 00:00.0 (Intel Cannonlake)

 1816 17:24:54.587134  PCI: 00:14.3 (Intel WiFi)

 1817 17:24:54.590620  SMBIOS tables: 939 bytes.

 1818 17:24:54.596835  Writing table forward entry at 0x00000500

 1819 17:24:54.600494  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1820 17:24:54.603839  Writing coreboot table at 0x99b62000

 1821 17:24:54.610468   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1822 17:24:54.616584   1. 0000000000001000-000000000009ffff: RAM

 1823 17:24:54.619704   2. 00000000000a0000-00000000000fffff: RESERVED

 1824 17:24:54.623386   3. 0000000000100000-0000000099a2bfff: RAM

 1825 17:24:54.629582   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1826 17:24:54.636377   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1827 17:24:54.639433   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1828 17:24:54.646065   7. 000000009a000000-000000009f7fffff: RESERVED

 1829 17:24:54.649167   8. 00000000e0000000-00000000efffffff: RESERVED

 1830 17:24:54.655813   9. 00000000fc000000-00000000fc000fff: RESERVED

 1831 17:24:54.658838  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1832 17:24:54.665363  11. 00000000fed10000-00000000fed17fff: RESERVED

 1833 17:24:54.669083  12. 00000000fed80000-00000000fed83fff: RESERVED

 1834 17:24:54.675614  13. 00000000fed90000-00000000fed91fff: RESERVED

 1835 17:24:54.678669  14. 00000000feda0000-00000000feda1fff: RESERVED

 1836 17:24:54.685122  15. 0000000100000000-000000045e7fffff: RAM

 1837 17:24:54.688579  Graphics framebuffer located at 0xc0000000

 1838 17:24:54.691992  Passing 5 GPIOs to payload:

 1839 17:24:54.694854              NAME |       PORT | POLARITY |     VALUE

 1840 17:24:54.701764     write protect |  undefined |     high |       low

 1841 17:24:54.707862               lid |  undefined |     high |      high

 1842 17:24:54.710999             power |  undefined |     high |       low

 1843 17:24:54.717834             oprom |  undefined |     high |       low

 1844 17:24:54.720920          EC in RW | 0x000000cb |     high |       low

 1845 17:24:54.724536  Board ID: 4

 1846 17:24:54.727447  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1847 17:24:54.730731  CBFS @ c08000 size 3f8000

 1848 17:24:54.737337  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1849 17:24:54.744159  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861

 1850 17:24:54.747148  coreboot table: 1492 bytes.

 1851 17:24:54.750127  IMD ROOT    0. 99fff000 00001000

 1852 17:24:54.753721  IMD SMALL   1. 99ffe000 00001000

 1853 17:24:54.756770  FSP MEMORY  2. 99c4e000 003b0000

 1854 17:24:54.760457  CONSOLE     3. 99c2e000 00020000

 1855 17:24:54.763389  FMAP        4. 99c2d000 0000054e

 1856 17:24:54.766538  TIME STAMP  5. 99c2c000 00000910

 1857 17:24:54.769609  VBOOT WORK  6. 99c18000 00014000

 1858 17:24:54.773247  MRC DATA    7. 99c16000 00001958

 1859 17:24:54.776298  ROMSTG STCK 8. 99c15000 00001000

 1860 17:24:54.779907  AFTER CAR   9. 99c0b000 0000a000

 1861 17:24:54.783247  RAMSTAGE   10. 99baf000 0005c000

 1862 17:24:54.786052  REFCODE    11. 99b7a000 00035000

 1863 17:24:54.789632  SMM BACKUP 12. 99b6a000 00010000

 1864 17:24:54.792438  COREBOOT   13. 99b62000 00008000

 1865 17:24:54.796015  ACPI       14. 99b3e000 00024000

 1866 17:24:54.798945  ACPI GNVS  15. 99b3d000 00001000

 1867 17:24:54.802563  RAMOOPS    16. 99a3d000 00100000

 1868 17:24:54.805637  TPM2 TCGLOG17. 99a2d000 00010000

 1869 17:24:54.808731  SMBIOS     18. 99a2c000 00000800

 1870 17:24:54.812453  IMD small region:

 1871 17:24:54.815471    IMD ROOT    0. 99ffec00 00000400

 1872 17:24:54.818544    FSP RUNTIME 1. 99ffebe0 00000004

 1873 17:24:54.822256    EC HOSTEVENT 2. 99ffebc0 00000008

 1874 17:24:54.825297    POWER STATE 3. 99ffeb80 00000040

 1875 17:24:54.828388    ROMSTAGE    4. 99ffeb60 00000004

 1876 17:24:54.831982    MEM INFO    5. 99ffe9a0 000001b9

 1877 17:24:54.835047    VPD         6. 99ffe920 0000006c

 1878 17:24:54.838112  MTRR: Physical address space:

 1879 17:24:54.844881  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1880 17:24:54.851616  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1881 17:24:54.857796  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1882 17:24:54.864493  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1883 17:24:54.870672  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1884 17:24:54.877467  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1885 17:24:54.880879  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1886 17:24:54.887100  MTRR: Fixed MSR 0x250 0x0606060606060606

 1887 17:24:54.890822  MTRR: Fixed MSR 0x258 0x0606060606060606

 1888 17:24:54.893887  MTRR: Fixed MSR 0x259 0x0000000000000000

 1889 17:24:54.897272  MTRR: Fixed MSR 0x268 0x0606060606060606

 1890 17:24:54.903583  MTRR: Fixed MSR 0x269 0x0606060606060606

 1891 17:24:54.907050  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1892 17:24:54.910456  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1893 17:24:54.913139  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1894 17:24:54.920027  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1895 17:24:54.922996  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1896 17:24:54.926693  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1897 17:24:54.929754  call enable_fixed_mtrr()

 1898 17:24:54.932768  CPU physical address size: 39 bits

 1899 17:24:54.939814  MTRR: default type WB/UC MTRR counts: 6/8.

 1900 17:24:54.942886  MTRR: WB selected as default type.

 1901 17:24:54.949689  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1902 17:24:54.956156  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1903 17:24:54.959135  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1904 17:24:54.965756  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1905 17:24:54.972325  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1906 17:24:54.979069  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1907 17:24:54.985544  MTRR: Fixed MSR 0x250 0x0606060606060606

 1908 17:24:54.988468  MTRR: Fixed MSR 0x258 0x0606060606060606

 1909 17:24:54.991995  MTRR: Fixed MSR 0x259 0x0000000000000000

 1910 17:24:54.994923  MTRR: Fixed MSR 0x268 0x0606060606060606

 1911 17:24:55.001600  MTRR: Fixed MSR 0x269 0x0606060606060606

 1912 17:24:55.005074  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1913 17:24:55.008012  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1914 17:24:55.011902  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1915 17:24:55.018312  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1916 17:24:55.021374  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1917 17:24:55.024494  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1918 17:24:55.024611  

 1919 17:24:55.027522  MTRR check

 1920 17:24:55.031293  Fixed MTRRs   : Enabled

 1921 17:24:55.031382  Variable MTRRs: Enabled

 1922 17:24:55.031467  

 1923 17:24:55.034206  call enable_fixed_mtrr()

 1924 17:24:55.040998  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1925 17:24:55.044114  CPU physical address size: 39 bits

 1926 17:24:55.047059  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1927 17:24:55.053759  MTRR: Fixed MSR 0x250 0x0606060606060606

 1928 17:24:55.057303  MTRR: Fixed MSR 0x258 0x0606060606060606

 1929 17:24:55.060172  MTRR: Fixed MSR 0x259 0x0000000000000000

 1930 17:24:55.066886  MTRR: Fixed MSR 0x268 0x0606060606060606

 1931 17:24:55.069949  MTRR: Fixed MSR 0x269 0x0606060606060606

 1932 17:24:55.073004  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1933 17:24:55.076711  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1934 17:24:55.079862  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1935 17:24:55.086348  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1936 17:24:55.089527  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1937 17:24:55.092912  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1938 17:24:55.099383  MTRR: Fixed MSR 0x250 0x0606060606060606

 1939 17:24:55.099500  call enable_fixed_mtrr()

 1940 17:24:55.106049  MTRR: Fixed MSR 0x258 0x0606060606060606

 1941 17:24:55.109595  MTRR: Fixed MSR 0x259 0x0000000000000000

 1942 17:24:55.112647  MTRR: Fixed MSR 0x268 0x0606060606060606

 1943 17:24:55.115680  MTRR: Fixed MSR 0x269 0x0606060606060606

 1944 17:24:55.122393  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1945 17:24:55.125419  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1946 17:24:55.128675  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1947 17:24:55.132202  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1948 17:24:55.138300  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1949 17:24:55.141958  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1950 17:24:55.144938  CPU physical address size: 39 bits

 1951 17:24:55.148022  call enable_fixed_mtrr()

 1952 17:24:55.151707  MTRR: Fixed MSR 0x250 0x0606060606060606

 1953 17:24:55.157849  MTRR: Fixed MSR 0x258 0x0606060606060606

 1954 17:24:55.161596  MTRR: Fixed MSR 0x259 0x0000000000000000

 1955 17:24:55.164422  MTRR: Fixed MSR 0x268 0x0606060606060606

 1956 17:24:55.168040  MTRR: Fixed MSR 0x269 0x0606060606060606

 1957 17:24:55.174856  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1958 17:24:55.177701  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1959 17:24:55.181257  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1960 17:24:55.184193  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1961 17:24:55.190979  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1962 17:24:55.194056  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1963 17:24:55.196950  CBFS @ c08000 size 3f8000

 1964 17:24:55.200610  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1965 17:24:55.206782  MTRR: Fixed MSR 0x250 0x0606060606060606

 1966 17:24:55.210045  MTRR: Fixed MSR 0x250 0x0606060606060606

 1967 17:24:55.213360  MTRR: Fixed MSR 0x258 0x0606060606060606

 1968 17:24:55.216621  MTRR: Fixed MSR 0x259 0x0000000000000000

 1969 17:24:55.223080  MTRR: Fixed MSR 0x268 0x0606060606060606

 1970 17:24:55.226766  MTRR: Fixed MSR 0x269 0x0606060606060606

 1971 17:24:55.229778  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1972 17:24:55.232700  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1973 17:24:55.239192  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1974 17:24:55.242853  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1975 17:24:55.245790  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1976 17:24:55.248915  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1977 17:24:55.255753  MTRR: Fixed MSR 0x258 0x0606060606060606

 1978 17:24:55.258881  call enable_fixed_mtrr()

 1979 17:24:55.262371  MTRR: Fixed MSR 0x259 0x0000000000000000

 1980 17:24:55.265433  MTRR: Fixed MSR 0x268 0x0606060606060606

 1981 17:24:55.269083  MTRR: Fixed MSR 0x269 0x0606060606060606

 1982 17:24:55.275041  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1983 17:24:55.278256  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1984 17:24:55.281885  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1985 17:24:55.285478  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1986 17:24:55.291416  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1987 17:24:55.294965  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1988 17:24:55.298126  CPU physical address size: 39 bits

 1989 17:24:55.301105  call enable_fixed_mtrr()

 1990 17:24:55.304764  MTRR: Fixed MSR 0x250 0x0606060606060606

 1991 17:24:55.307701  MTRR: Fixed MSR 0x258 0x0606060606060606

 1992 17:24:55.314452  MTRR: Fixed MSR 0x259 0x0000000000000000

 1993 17:24:55.317782  MTRR: Fixed MSR 0x268 0x0606060606060606

 1994 17:24:55.320566  MTRR: Fixed MSR 0x269 0x0606060606060606

 1995 17:24:55.324092  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1996 17:24:55.330856  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1997 17:24:55.333732  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1998 17:24:55.337421  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1999 17:24:55.343509  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2000 17:24:55.347068  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2001 17:24:55.350137  call enable_fixed_mtrr()

 2002 17:24:55.350223  call enable_fixed_mtrr()

 2003 17:24:55.356853  CPU physical address size: 39 bits

 2004 17:24:55.359771  CPU physical address size: 39 bits

 2005 17:24:55.363386  CPU physical address size: 39 bits

 2006 17:24:55.366429  CBFS: Locating 'fallback/payload'

 2007 17:24:55.369530  CPU physical address size: 39 bits

 2008 17:24:55.373251  CBFS: Found @ offset 1c96c0 size 3f798

 2009 17:24:55.376002  Checking segment from ROM address 0xffdd16f8

 2010 17:24:55.382782  Checking segment from ROM address 0xffdd1714

 2011 17:24:55.385973  Loading segment from ROM address 0xffdd16f8

 2012 17:24:55.389015    code (compression=0)

 2013 17:24:55.399235    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2014 17:24:55.405916  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2015 17:24:55.408947  it's not compressed!

 2016 17:24:55.500035  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2017 17:24:55.506806  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2018 17:24:55.512942  Loading segment from ROM address 0xffdd1714

 2019 17:24:55.513030    Entry Point 0x30000000

 2020 17:24:55.516380  Loaded segments

 2021 17:24:55.522136  Finalizing chipset.

 2022 17:24:55.525551  Finalizing SMM.

 2023 17:24:55.528949  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2024 17:24:55.532066  mp_park_aps done after 0 msecs.

 2025 17:24:55.538657  Jumping to boot code at 30000000(99b62000)

 2026 17:24:55.545292  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2027 17:24:55.545377  

 2028 17:24:55.545443  

 2029 17:24:55.545503  

 2030 17:24:55.548309  Starting depthcharge on Helios...

 2031 17:24:55.548679  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2032 17:24:55.548777  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2033 17:24:55.548866  Setting prompt string to ['hatch:']
 2034 17:24:55.548955  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2035 17:24:55.552097  

 2036 17:24:55.558002  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2037 17:24:55.558086  

 2038 17:24:55.564584  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2039 17:24:55.564667  

 2040 17:24:55.571473  board_setup: Info: eMMC controller not present; skipping

 2041 17:24:55.571556  

 2042 17:24:55.574406  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2043 17:24:55.574489  

 2044 17:24:55.581082  board_setup: Info: SDHCI controller not present; skipping

 2045 17:24:55.581169  

 2046 17:24:55.587350  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2047 17:24:55.587466  

 2048 17:24:55.587535  Wipe memory regions:

 2049 17:24:55.590916  

 2050 17:24:55.593886  	[0x00000000001000, 0x000000000a0000)

 2051 17:24:55.594027  

 2052 17:24:55.597675  	[0x00000000100000, 0x00000030000000)

 2053 17:24:55.660102  

 2054 17:24:55.663719  	[0x00000030657430, 0x00000099a2c000)

 2055 17:24:55.801165  

 2056 17:24:55.804184  	[0x00000100000000, 0x0000045e800000)

 2057 17:24:57.187288  

 2058 17:24:57.187447  R8152: Initializing

 2059 17:24:57.187513  

 2060 17:24:57.190078  Version 9 (ocp_data = 6010)

 2061 17:24:57.194878  

 2062 17:24:57.194988  R8152: Done initializing

 2063 17:24:57.195082  

 2064 17:24:57.197340  Adding net device

 2065 17:24:57.802005  

 2066 17:24:57.802171  R8152: Initializing

 2067 17:24:57.802250  

 2068 17:24:57.805000  Version 6 (ocp_data = 5c30)

 2069 17:24:57.805099  

 2070 17:24:57.808181  R8152: Done initializing

 2071 17:24:57.808281  

 2072 17:24:57.814742  net_add_device: Attemp to include the same device

 2073 17:24:57.814896  

 2074 17:24:57.821436  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2075 17:24:57.821557  

 2076 17:24:57.821650  

 2077 17:24:57.821737  

 2078 17:24:57.822044  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2080 17:24:57.922456  hatch: tftpboot 192.168.201.1 10664074/tftp-deploy-vfixj_q8/kernel/bzImage 10664074/tftp-deploy-vfixj_q8/kernel/cmdline 10664074/tftp-deploy-vfixj_q8/ramdisk/ramdisk.cpio.gz

 2081 17:24:57.922677  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2082 17:24:57.922812  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2083 17:24:57.927259  tftpboot 192.168.201.1 10664074/tftp-deploy-vfixj_q8/kernel/bzIploy-vfixj_q8/kernel/cmdline 10664074/tftp-deploy-vfixj_q8/ramdisk/ramdisk.cpio.gz

 2084 17:24:57.927347  

 2085 17:24:57.927411  Waiting for link

 2086 17:24:58.128450  

 2087 17:24:58.128589  done.

 2088 17:24:58.128656  

 2089 17:24:58.128717  MAC: 00:24:32:30:7f:7f

 2090 17:24:58.128775  

 2091 17:24:58.131329  Sending DHCP discover... done.

 2092 17:24:58.131412  

 2093 17:24:58.134438  Waiting for reply... done.

 2094 17:24:58.134520  

 2095 17:24:58.137969  Sending DHCP request... done.

 2096 17:24:58.138052  

 2097 17:24:58.141623  Waiting for reply... done.

 2098 17:24:58.141730  

 2099 17:24:58.144384  My ip is 192.168.201.15

 2100 17:24:58.144466  

 2101 17:24:58.147967  The DHCP server ip is 192.168.201.1

 2102 17:24:58.148051  

 2103 17:24:58.151351  TFTP server IP predefined by user: 192.168.201.1

 2104 17:24:58.154376  

 2105 17:24:58.161047  Bootfile predefined by user: 10664074/tftp-deploy-vfixj_q8/kernel/bzImage

 2106 17:24:58.161133  

 2107 17:24:58.164281  Sending tftp read request... done.

 2108 17:24:58.164364  

 2109 17:24:58.167111  Waiting for the transfer... 

 2110 17:24:58.167260  

 2111 17:24:58.717688  00000000 ################################################################

 2112 17:24:58.717827  

 2113 17:24:59.266222  00080000 ################################################################

 2114 17:24:59.266381  

 2115 17:24:59.847515  00100000 ################################################################

 2116 17:24:59.847679  

 2117 17:25:00.473388  00180000 ################################################################

 2118 17:25:00.473524  

 2119 17:25:01.113974  00200000 ################################################################

 2120 17:25:01.114479  

 2121 17:25:01.770768  00280000 ################################################################

 2122 17:25:01.771362  

 2123 17:25:02.443528  00300000 ################################################################

 2124 17:25:02.444034  

 2125 17:25:03.076059  00380000 ################################################################

 2126 17:25:03.076216  

 2127 17:25:03.660686  00400000 ################################################################

 2128 17:25:03.661426  

 2129 17:25:04.236076  00480000 ################################################################

 2130 17:25:04.236213  

 2131 17:25:04.828788  00500000 ################################################################

 2132 17:25:04.829526  

 2133 17:25:05.434143  00580000 ################################################################

 2134 17:25:05.434728  

 2135 17:25:06.065592  00600000 ################################################################

 2136 17:25:06.065735  

 2137 17:25:06.678936  00680000 ################################################################

 2138 17:25:06.679119  

 2139 17:25:07.261938  00700000 ################################################################

 2140 17:25:07.262104  

 2141 17:25:07.880161  00780000 ################################################################

 2142 17:25:07.880665  

 2143 17:25:08.479919  00800000 ################################################################

 2144 17:25:08.480110  

 2145 17:25:09.082721  00880000 ################################################################

 2146 17:25:09.082859  

 2147 17:25:09.634021  00900000 ################################################################

 2148 17:25:09.634333  

 2149 17:25:10.254752  00980000 ################################################################

 2150 17:25:10.255304  

 2151 17:25:10.693760  00a00000 ############################################### done.

 2152 17:25:10.694413  

 2153 17:25:10.696837  The bootfile was 10866688 bytes long.

 2154 17:25:10.697330  

 2155 17:25:10.700226  Sending tftp read request... done.

 2156 17:25:10.700791  

 2157 17:25:10.703960  Waiting for the transfer... 

 2158 17:25:10.704530  

 2159 17:25:11.332127  00000000 ################################################################

 2160 17:25:11.332621  

 2161 17:25:11.915902  00080000 ################################################################

 2162 17:25:11.916040  

 2163 17:25:12.465764  00100000 ################################################################

 2164 17:25:12.465908  

 2165 17:25:13.018708  00180000 ################################################################

 2166 17:25:13.018862  

 2167 17:25:13.550141  00200000 ################################################################

 2168 17:25:13.550356  

 2169 17:25:14.069862  00280000 ################################################################

 2170 17:25:14.070009  

 2171 17:25:14.599529  00300000 ################################################################

 2172 17:25:14.599665  

 2173 17:25:15.125932  00380000 ################################################################

 2174 17:25:15.126077  

 2175 17:25:15.686742  00400000 ################################################################

 2176 17:25:15.687459  

 2177 17:25:16.269380  00480000 ################################################################

 2178 17:25:16.269892  

 2179 17:25:16.891436  00500000 ################################################################

 2180 17:25:16.892035  

 2181 17:25:17.334768  00580000 ################################################ done.

 2182 17:25:17.334908  

 2183 17:25:17.338395  Sending tftp read request... done.

 2184 17:25:17.338491  

 2185 17:25:17.341417  Waiting for the transfer... 

 2186 17:25:17.341512  

 2187 17:25:17.341595  00000000 # done.

 2188 17:25:17.341690  

 2189 17:25:17.351262  Command line loaded dynamically from TFTP file: 10664074/tftp-deploy-vfixj_q8/kernel/cmdline

 2190 17:25:17.351347  

 2191 17:25:17.374099  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8  console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10664074/extract-nfsrootfs-pe298xxv,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2192 17:25:17.374194  

 2193 17:25:17.380799  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2194 17:25:17.384945  

 2195 17:25:17.387955  Shutting down all USB controllers.

 2196 17:25:17.388044  

 2197 17:25:17.388115  Removing current net device

 2198 17:25:17.395913  

 2199 17:25:17.396018  Finalizing coreboot

 2200 17:25:17.396100  

 2201 17:25:17.402604  Exiting depthcharge with code 4 at timestamp: 29215824

 2202 17:25:17.402717  

 2203 17:25:17.402807  

 2204 17:25:17.402889  Starting kernel ...

 2205 17:25:17.403332  end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
 2206 17:25:17.403462  start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
 2207 17:25:17.403577  Setting prompt string to ['Linux version [0-9]']
 2208 17:25:17.403687  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2209 17:25:17.403783  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2210 17:25:17.405681  

 2211 17:25:17.405846  

 2213 17:29:37.403769  end: 2.2.5 auto-login-action (duration 00:04:20) [common]
 2215 17:29:37.404096  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
 2217 17:29:37.404336  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2220 17:29:37.404737  end: 2 depthcharge-action (duration 00:05:00) [common]
 2222 17:29:37.405085  Cleaning after the job
 2223 17:29:37.405227  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/ramdisk
 2224 17:29:37.405501  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/kernel
 2225 17:29:37.405722  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/nfsrootfs
 2226 17:29:37.406002  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664074/tftp-deploy-vfixj_q8/modules
 2227 17:29:37.406274  start: 4.1 power-off (timeout 00:00:30) [common]
 2228 17:29:37.406526  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
 2229 17:29:37.478968  >> Command sent successfully.

 2230 17:29:37.481403  Returned 0 in 0 seconds
 2231 17:29:37.581865  end: 4.1 power-off (duration 00:00:00) [common]
 2233 17:29:37.582341  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2234 17:29:37.582678  Listened to connection for namespace 'common' for up to 1s
 2236 17:29:37.583144  Listened to connection for namespace 'common' for up to 1s
 2237 17:29:37.584182  Listened to connection for namespace 'common' for up to 1s
 2238 17:29:37.587147  Listened to connection for namespace 'common' for up to 1s
 2239 17:29:37.590837  Listened to connection for namespace 'common' for up to 1s
 2240 17:29:37.594085  Listened to connection for namespace 'common' for up to 1s
 2241 17:29:37.597155  Listened to connection for namespace 'common' for up to 1s
 2242 17:29:37.600305  Listened to connection for namespace 'common' for up to 1s
 2243 17:29:37.604055  Listened to connection for namespace 'common' for up to 1s
 2244 17:29:37.607276  Listened to connection for namespace 'common' for up to 1s
 2245 17:29:37.610451  Listened to connection for namespace 'common' for up to 1s
 2246 17:29:37.613768  Listened to connection for namespace 'common' for up to 1s
 2247 17:29:37.616945  Listened to connection for namespace 'common' for up to 1s
 2248 17:29:37.620011  Listened to connection for namespace 'common' for up to 1s
 2249 17:29:37.623232  Listened to connection for namespace 'common' for up to 1s
 2250 17:29:37.627020  Listened to connection for namespace 'common' for up to 1s
 2251 17:29:37.630093  Listened to connection for namespace 'common' for up to 1s
 2252 17:29:37.633271  Listened to connection for namespace 'common' for up to 1s
 2253 17:29:37.636400  Listened to connection for namespace 'common' for up to 1s
 2254 17:29:37.639508  Listened to connection for namespace 'common' for up to 1s
 2255 17:29:37.643442  Listened to connection for namespace 'common' for up to 1s
 2256 17:29:37.646433  Listened to connection for namespace 'common' for up to 1s
 2257 17:29:37.649639  Listened to connection for namespace 'common' for up to 1s
 2258 17:29:37.652846  Listened to connection for namespace 'common' for up to 1s
 2259 17:29:37.655930  Listened to connection for namespace 'common' for up to 1s
 2260 17:29:37.659691  Listened to connection for namespace 'common' for up to 1s
 2261 17:29:37.662695  Listened to connection for namespace 'common' for up to 1s
 2262 17:29:37.665799  Listened to connection for namespace 'common' for up to 1s
 2263 17:29:37.669421  Listened to connection for namespace 'common' for up to 1s
 2264 17:29:37.672596  Listened to connection for namespace 'common' for up to 1s
 2265 17:29:37.675749  Listened to connection for namespace 'common' for up to 1s
 2266 17:29:37.679300  Listened to connection for namespace 'common' for up to 1s
 2267 17:29:37.682487  Listened to connection for namespace 'common' for up to 1s
 2268 17:29:37.685509  Listened to connection for namespace 'common' for up to 1s
 2269 17:29:37.688741  Listened to connection for namespace 'common' for up to 1s
 2270 17:29:37.692276  Listened to connection for namespace 'common' for up to 1s
 2271 17:29:37.695464  Listened to connection for namespace 'common' for up to 1s
 2272 17:29:37.698582  Listened to connection for namespace 'common' for up to 1s
 2273 17:29:37.702271  Listened to connection for namespace 'common' for up to 1s
 2274 17:29:37.705509  Listened to connection for namespace 'common' for up to 1s
 2275 17:29:37.708816  Listened to connection for namespace 'common' for up to 1s
 2276 17:29:37.712039  Listened to connection for namespace 'common' for up to 1s
 2277 17:29:37.715111  Listened to connection for namespace 'common' for up to 1s
 2278 17:29:37.718205  Listened to connection for namespace 'common' for up to 1s
 2279 17:29:37.721828  Listened to connection for namespace 'common' for up to 1s
 2280 17:29:37.725011  Listened to connection for namespace 'common' for up to 1s
 2281 17:29:37.728118  Listened to connection for namespace 'common' for up to 1s
 2282 17:29:37.731709  Listened to connection for namespace 'common' for up to 1s
 2283 17:29:37.734974  Listened to connection for namespace 'common' for up to 1s
 2284 17:29:37.738098  Listened to connection for namespace 'common' for up to 1s
 2285 17:29:37.741382  Listened to connection for namespace 'common' for up to 1s
 2286 17:29:37.745130  Listened to connection for namespace 'common' for up to 1s
 2287 17:29:37.748402  Listened to connection for namespace 'common' for up to 1s
 2288 17:29:37.751482  Listened to connection for namespace 'common' for up to 1s
 2289 17:29:37.754549  Listened to connection for namespace 'common' for up to 1s
 2290 17:29:37.757707  Listened to connection for namespace 'common' for up to 1s
 2291 17:29:37.761094  Listened to connection for namespace 'common' for up to 1s
 2292 17:29:37.764769  Listened to connection for namespace 'common' for up to 1s
 2293 17:29:37.767906  Listened to connection for namespace 'common' for up to 1s
 2294 17:29:37.770967  Listened to connection for namespace 'common' for up to 1s
 2295 17:29:37.773987  Listened to connection for namespace 'common' for up to 1s
 2296 17:29:37.777766  Listened to connection for namespace 'common' for up to 1s
 2297 17:29:37.780637  Listened to connection for namespace 'common' for up to 1s
 2298 17:29:37.784202  Listened to connection for namespace 'common' for up to 1s
 2299 17:29:37.787107  Listened to connection for namespace 'common' for up to 1s
 2300 17:29:37.790385  Listened to connection for namespace 'common' for up to 1s
 2301 17:29:37.794069  Listened to connection for namespace 'common' for up to 1s
 2302 17:29:37.797170  Listened to connection for namespace 'common' for up to 1s
 2303 17:29:37.800362  Listened to connection for namespace 'common' for up to 1s
 2304 17:29:37.804124  Listened to connection for namespace 'common' for up to 1s
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 2536 17:29:38.564144  Listened to connection for namespace 'common' for up to 1s
 2537 17:29:38.567206  Listened to connection for namespace 'common' for up to 1s
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 2539 17:29:38.573816  Listened to connection for namespace 'common' for up to 1s
 2540 17:29:38.579163  Listened to connection for namespace 'common' for up to 1s
 2541 17:29:38.582070  Listened to connection for namespace 'common' for up to 1s
 2542 17:29:38.582581  Finalising connection for namespace 'common'
 2543 17:29:38.582681  Disconnecting from shell: Finalise
 2544 17:29:38.582750  
 2545 17:29:38.683262  end: 4.2 read-feedback (duration 00:00:01) [common]
 2546 17:29:38.683490  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10664074
 2547 17:29:39.149173  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10664074
 2548 17:29:39.149389  JobError: Your job cannot terminate cleanly.