Boot log: asus-C436FA-Flip-hatch

    1 17:25:07.583381  lava-dispatcher, installed at version: 2023.05.1
    2 17:25:07.583590  start: 0 validate
    3 17:25:07.583721  Start time: 2023-06-09 17:25:07.583714+00:00 (UTC)
    4 17:25:07.583905  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:25:07.584048  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
    6 17:25:07.836355  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:25:07.837137  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.283-cip98-1248-gcaf6e8ee921e9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:25:08.092535  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:25:08.093278  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 17:25:08.353960  Using caching service: 'http://localhost/cache/?uri=%s'
   11 17:25:08.354721  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.283-cip98-1248-gcaf6e8ee921e9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 17:25:08.631318  validate duration: 1.05
   14 17:25:08.632594  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 17:25:08.633183  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 17:25:08.633619  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 17:25:08.634183  Not decompressing ramdisk as can be used compressed.
   18 17:25:08.634607  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/initrd.cpio.gz
   19 17:25:08.634982  saving as /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/ramdisk/initrd.cpio.gz
   20 17:25:08.635297  total size: 5671546 (5MB)
   21 17:25:08.640148  progress   0% (0MB)
   22 17:25:08.648394  progress   5% (0MB)
   23 17:25:08.655987  progress  10% (0MB)
   24 17:25:08.660836  progress  15% (0MB)
   25 17:25:08.664949  progress  20% (1MB)
   26 17:25:08.668461  progress  25% (1MB)
   27 17:25:08.671203  progress  30% (1MB)
   28 17:25:08.674116  progress  35% (1MB)
   29 17:25:08.676579  progress  40% (2MB)
   30 17:25:08.678775  progress  45% (2MB)
   31 17:25:08.680994  progress  50% (2MB)
   32 17:25:08.683136  progress  55% (3MB)
   33 17:25:08.685020  progress  60% (3MB)
   34 17:25:08.686940  progress  65% (3MB)
   35 17:25:08.688909  progress  70% (3MB)
   36 17:25:08.690529  progress  75% (4MB)
   37 17:25:08.692253  progress  80% (4MB)
   38 17:25:08.693976  progress  85% (4MB)
   39 17:25:08.695404  progress  90% (4MB)
   40 17:25:08.696997  progress  95% (5MB)
   41 17:25:08.698574  progress 100% (5MB)
   42 17:25:08.698684  5MB downloaded in 0.06s (85.32MB/s)
   43 17:25:08.698832  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 17:25:08.699069  end: 1.1 download-retry (duration 00:00:00) [common]
   46 17:25:08.699155  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 17:25:08.699252  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 17:25:08.699379  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.283-cip98-1248-gcaf6e8ee921e9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 17:25:08.699448  saving as /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/kernel/bzImage
   50 17:25:08.699508  total size: 10866688 (10MB)
   51 17:25:08.699568  No compression specified
   52 17:25:08.700627  progress   0% (0MB)
   53 17:25:08.703427  progress   5% (0MB)
   54 17:25:08.706340  progress  10% (1MB)
   55 17:25:08.709055  progress  15% (1MB)
   56 17:25:08.711946  progress  20% (2MB)
   57 17:25:08.714715  progress  25% (2MB)
   58 17:25:08.717685  progress  30% (3MB)
   59 17:25:08.720591  progress  35% (3MB)
   60 17:25:08.723549  progress  40% (4MB)
   61 17:25:08.726790  progress  45% (4MB)
   62 17:25:08.729852  progress  50% (5MB)
   63 17:25:08.733114  progress  55% (5MB)
   64 17:25:08.736121  progress  60% (6MB)
   65 17:25:08.739408  progress  65% (6MB)
   66 17:25:08.742613  progress  70% (7MB)
   67 17:25:08.745656  progress  75% (7MB)
   68 17:25:08.748886  progress  80% (8MB)
   69 17:25:08.751834  progress  85% (8MB)
   70 17:25:08.755024  progress  90% (9MB)
   71 17:25:08.758212  progress  95% (9MB)
   72 17:25:08.761226  progress 100% (10MB)
   73 17:25:08.761448  10MB downloaded in 0.06s (167.33MB/s)
   74 17:25:08.761666  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 17:25:08.762052  end: 1.2 download-retry (duration 00:00:00) [common]
   77 17:25:08.762180  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 17:25:08.762303  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 17:25:08.762472  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/full.rootfs.tar.xz
   80 17:25:08.762568  saving as /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/nfsrootfs/full.rootfs.tar
   81 17:25:08.762677  total size: 125914312 (120MB)
   82 17:25:08.762774  Using unxz to decompress xz
   83 17:25:08.767168  progress   0% (0MB)
   84 17:25:09.269149  progress   5% (6MB)
   85 17:25:09.783191  progress  10% (12MB)
   86 17:25:10.290363  progress  15% (18MB)
   87 17:25:10.813020  progress  20% (24MB)
   88 17:25:11.158385  progress  25% (30MB)
   89 17:25:11.515828  progress  30% (36MB)
   90 17:25:11.793606  progress  35% (42MB)
   91 17:25:11.994038  progress  40% (48MB)
   92 17:25:12.363204  progress  45% (54MB)
   93 17:25:12.733475  progress  50% (60MB)
   94 17:25:13.071060  progress  55% (66MB)
   95 17:25:13.429994  progress  60% (72MB)
   96 17:25:13.776481  progress  65% (78MB)
   97 17:25:14.162321  progress  70% (84MB)
   98 17:25:14.573536  progress  75% (90MB)
   99 17:25:14.992834  progress  80% (96MB)
  100 17:25:15.083741  progress  85% (102MB)
  101 17:25:15.243121  progress  90% (108MB)
  102 17:25:15.581918  progress  95% (114MB)
  103 17:25:15.953293  progress 100% (120MB)
  104 17:25:15.959038  120MB downloaded in 7.20s (16.69MB/s)
  105 17:25:15.959343  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 17:25:15.959609  end: 1.3 download-retry (duration 00:00:07) [common]
  108 17:25:15.959702  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 17:25:15.959791  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 17:25:15.959936  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.283-cip98-1248-gcaf6e8ee921e9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 17:25:15.960010  saving as /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/modules/modules.tar
  112 17:25:15.960071  total size: 485236 (0MB)
  113 17:25:15.960134  Using unxz to decompress xz
  114 17:25:15.963908  progress   6% (0MB)
  115 17:25:15.964331  progress  13% (0MB)
  116 17:25:15.964643  progress  20% (0MB)
  117 17:25:15.966155  progress  27% (0MB)
  118 17:25:15.968307  progress  33% (0MB)
  119 17:25:15.970781  progress  40% (0MB)
  120 17:25:15.973453  progress  47% (0MB)
  121 17:25:15.975619  progress  54% (0MB)
  122 17:25:15.977422  progress  60% (0MB)
  123 17:25:15.979349  progress  67% (0MB)
  124 17:25:15.981415  progress  74% (0MB)
  125 17:25:15.983487  progress  81% (0MB)
  126 17:25:15.985484  progress  87% (0MB)
  127 17:25:15.987430  progress  94% (0MB)
  128 17:25:15.989292  progress 100% (0MB)
  129 17:25:15.995514  0MB downloaded in 0.04s (13.06MB/s)
  130 17:25:15.995785  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 17:25:15.996068  end: 1.4 download-retry (duration 00:00:00) [common]
  133 17:25:15.996165  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  134 17:25:15.996265  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  135 17:25:18.742294  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10664092/extract-nfsrootfs-6m2t9xoi
  136 17:25:18.742502  end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
  137 17:25:18.742612  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  138 17:25:18.742785  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3
  139 17:25:18.742934  makedir: /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin
  140 17:25:18.743047  makedir: /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/tests
  141 17:25:18.743155  makedir: /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/results
  142 17:25:18.743269  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-add-keys
  143 17:25:18.743412  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-add-sources
  144 17:25:18.743541  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-background-process-start
  145 17:25:18.743667  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-background-process-stop
  146 17:25:18.743794  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-common-functions
  147 17:25:18.743916  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-echo-ipv4
  148 17:25:18.744038  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-install-packages
  149 17:25:18.744159  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-installed-packages
  150 17:25:18.744280  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-os-build
  151 17:25:18.744401  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-probe-channel
  152 17:25:18.744524  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-probe-ip
  153 17:25:18.744644  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-target-ip
  154 17:25:18.744764  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-target-mac
  155 17:25:18.744924  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-target-storage
  156 17:25:18.745047  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-test-case
  157 17:25:18.745169  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-test-event
  158 17:25:18.745290  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-test-feedback
  159 17:25:18.745417  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-test-raise
  160 17:25:18.745538  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-test-reference
  161 17:25:18.745660  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-test-runner
  162 17:25:18.745780  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-test-set
  163 17:25:18.745900  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-test-shell
  164 17:25:18.746021  Updating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-install-packages (oe)
  165 17:25:18.746169  Updating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/bin/lava-installed-packages (oe)
  166 17:25:18.746295  Creating /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/environment
  167 17:25:18.746389  LAVA metadata
  168 17:25:18.746459  - LAVA_JOB_ID=10664092
  169 17:25:18.746522  - LAVA_DISPATCHER_IP=192.168.201.1
  170 17:25:18.746630  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  171 17:25:18.746695  skipped lava-vland-overlay
  172 17:25:18.746767  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 17:25:18.746845  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  174 17:25:18.746905  skipped lava-multinode-overlay
  175 17:25:18.746975  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 17:25:18.747051  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  177 17:25:18.747121  Loading test definitions
  178 17:25:18.747209  start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
  179 17:25:18.747276  Using /lava-10664092 at stage 0
  180 17:25:18.747370  Fetching tests from https://github.com/kernelci/test-definitions
  181 17:25:18.747445  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/0/tests/0_ltp-ipc'
  182 17:25:23.715823  Running '/usr/bin/git checkout kernelci.org
  183 17:25:23.863746  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
  184 17:25:23.864521  uuid=10664092_1.5.2.3.1 testdef=None
  185 17:25:23.864676  end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
  187 17:25:23.864992  start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
  188 17:25:23.865896  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  190 17:25:23.866137  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
  191 17:25:23.867213  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  193 17:25:23.867493  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
  194 17:25:23.868563  runner path: /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/0/tests/0_ltp-ipc test_uuid 10664092_1.5.2.3.1
  195 17:25:23.868682  SKIPFILE='skipfile-lkft.yaml'
  196 17:25:23.868774  SKIP_INSTALL='true'
  197 17:25:23.868886  TST_CMDFILES='ipc'
  198 17:25:23.869031  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  200 17:25:23.869239  Creating lava-test-runner.conf files
  201 17:25:23.869303  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10664092/lava-overlay-y3q5gyw3/lava-10664092/0 for stage 0
  202 17:25:23.869393  - 0_ltp-ipc
  203 17:25:23.869497  end: 1.5.2.3 test-definition (duration 00:00:05) [common]
  204 17:25:23.869584  start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
  205 17:25:31.427600  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  206 17:25:31.427792  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
  207 17:25:31.427911  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  208 17:25:31.428013  end: 1.5.2 lava-overlay (duration 00:00:13) [common]
  209 17:25:31.428108  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
  210 17:25:31.564509  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  211 17:25:31.564945  start: 1.5.4 extract-modules (timeout 00:09:37) [common]
  212 17:25:31.565101  extracting modules file /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10664092/extract-nfsrootfs-6m2t9xoi
  213 17:25:31.585539  extracting modules file /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10664092/extract-overlay-ramdisk-mc9nfqaq/ramdisk
  214 17:25:31.605646  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  215 17:25:31.605800  start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
  216 17:25:31.605896  [common] Applying overlay to NFS
  217 17:25:31.605971  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10664092/compress-overlay-2tms7nph/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10664092/extract-nfsrootfs-6m2t9xoi
  218 17:25:32.505920  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  219 17:25:32.506095  start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
  220 17:25:32.506194  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  221 17:25:32.506287  start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
  222 17:25:32.506372  Building ramdisk /var/lib/lava/dispatcher/tmp/10664092/extract-overlay-ramdisk-mc9nfqaq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10664092/extract-overlay-ramdisk-mc9nfqaq/ramdisk
  223 17:25:32.581709  >> 31371 blocks

  224 17:25:33.189077  rename /var/lib/lava/dispatcher/tmp/10664092/extract-overlay-ramdisk-mc9nfqaq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/ramdisk/ramdisk.cpio.gz
  225 17:25:33.189502  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  226 17:25:33.189628  start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
  227 17:25:33.189728  start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
  228 17:25:33.189823  No mkimage arch provided, not using FIT.
  229 17:25:33.189914  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  230 17:25:33.189995  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  231 17:25:33.190104  end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
  232 17:25:33.190240  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
  233 17:25:33.190322  No LXC device requested
  234 17:25:33.190406  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  235 17:25:33.190496  start: 1.7 deploy-device-env (timeout 00:09:35) [common]
  236 17:25:33.190578  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  237 17:25:33.190651  Checking files for TFTP limit of 4294967296 bytes.
  238 17:25:33.191083  end: 1 tftp-deploy (duration 00:00:25) [common]
  239 17:25:33.191186  start: 2 depthcharge-action (timeout 00:05:00) [common]
  240 17:25:33.191277  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  241 17:25:33.191408  substitutions:
  242 17:25:33.191478  - {DTB}: None
  243 17:25:33.191542  - {INITRD}: 10664092/tftp-deploy-rbxdxtkb/ramdisk/ramdisk.cpio.gz
  244 17:25:33.191605  - {KERNEL}: 10664092/tftp-deploy-rbxdxtkb/kernel/bzImage
  245 17:25:33.191665  - {LAVA_MAC}: None
  246 17:25:33.191723  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10664092/extract-nfsrootfs-6m2t9xoi
  247 17:25:33.191783  - {NFS_SERVER_IP}: 192.168.201.1
  248 17:25:33.191840  - {PRESEED_CONFIG}: None
  249 17:25:33.191896  - {PRESEED_LOCAL}: None
  250 17:25:33.191952  - {RAMDISK}: 10664092/tftp-deploy-rbxdxtkb/ramdisk/ramdisk.cpio.gz
  251 17:25:33.192008  - {ROOT_PART}: None
  252 17:25:33.192063  - {ROOT}: None
  253 17:25:33.192118  - {SERVER_IP}: 192.168.201.1
  254 17:25:33.192172  - {TEE}: None
  255 17:25:33.192227  Parsed boot commands:
  256 17:25:33.192280  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  257 17:25:33.192451  Parsed boot commands: tftpboot 192.168.201.1 10664092/tftp-deploy-rbxdxtkb/kernel/bzImage 10664092/tftp-deploy-rbxdxtkb/kernel/cmdline 10664092/tftp-deploy-rbxdxtkb/ramdisk/ramdisk.cpio.gz
  258 17:25:33.192540  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  259 17:25:33.192624  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  260 17:25:33.192719  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  261 17:25:33.192811  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  262 17:25:33.192919  Not connected, no need to disconnect.
  263 17:25:33.192993  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  264 17:25:33.193076  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  265 17:25:33.193145  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
  266 17:25:33.196575  Setting prompt string to ['lava-test: # ']
  267 17:25:33.196961  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  268 17:25:33.197074  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  269 17:25:33.197174  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  270 17:25:33.197264  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  271 17:25:33.197453  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  272 17:25:38.332390  >> Command sent successfully.

  273 17:25:38.334724  Returned 0 in 5 seconds
  274 17:25:38.435140  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  276 17:25:38.435504  end: 2.2.2 reset-device (duration 00:00:05) [common]
  277 17:25:38.435607  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  278 17:25:38.435698  Setting prompt string to 'Starting depthcharge on Helios...'
  279 17:25:38.435768  Changing prompt to 'Starting depthcharge on Helios...'
  280 17:25:38.435839  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  281 17:25:38.436086  [Enter `^Ec?' for help]

  282 17:25:39.056562  

  283 17:25:39.057120  

  284 17:25:39.066769  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  285 17:25:39.070108  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  286 17:25:39.076704  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  287 17:25:39.080447  CPU: AES supported, TXT NOT supported, VT supported

  288 17:25:39.087416  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  289 17:25:39.090524  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  290 17:25:39.096885  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  291 17:25:39.100536  VBOOT: Loading verstage.

  292 17:25:39.103506  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  293 17:25:39.110032  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  294 17:25:39.114042  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  295 17:25:39.116927  CBFS @ c08000 size 3f8000

  296 17:25:39.123526  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  297 17:25:39.127281  CBFS: Locating 'fallback/verstage'

  298 17:25:39.130449  CBFS: Found @ offset 10fb80 size 1072c

  299 17:25:39.133765  

  300 17:25:39.134194  

  301 17:25:39.143524  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  302 17:25:39.157982  Probing TPM: . done!

  303 17:25:39.161120  TPM ready after 0 ms

  304 17:25:39.164358  Connected to device vid:did:rid of 1ae0:0028:00

  305 17:25:39.174839  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  306 17:25:39.178255  Initialized TPM device CR50 revision 0

  307 17:25:39.222623  tlcl_send_startup: Startup return code is 0

  308 17:25:39.223105  TPM: setup succeeded

  309 17:25:39.235828  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  310 17:25:39.239608  Chrome EC: UHEPI supported

  311 17:25:39.242992  Phase 1

  312 17:25:39.245661  FMAP: area GBB found @ c05000 (12288 bytes)

  313 17:25:39.252822  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  314 17:25:39.253256  Phase 2

  315 17:25:39.256000  Phase 3

  316 17:25:39.259084  FMAP: area GBB found @ c05000 (12288 bytes)

  317 17:25:39.265967  VB2:vb2_report_dev_firmware() This is developer signed firmware

  318 17:25:39.272627  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  319 17:25:39.276219  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  320 17:25:39.282671  VB2:vb2_verify_keyblock() Checking keyblock signature...

  321 17:25:39.298433  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  322 17:25:39.301680  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  323 17:25:39.308293  VB2:vb2_verify_fw_preamble() Verifying preamble.

  324 17:25:39.312220  Phase 4

  325 17:25:39.315524  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  326 17:25:39.322250  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  327 17:25:39.501332  VB2:vb2_rsa_verify_digest() Digest check failed!

  328 17:25:39.508314  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  329 17:25:39.508485  Saving nvdata

  330 17:25:39.511523  Reboot requested (10020007)

  331 17:25:39.514816  board_reset() called!

  332 17:25:39.514994  full_reset() called!

  333 17:25:44.024175  

  334 17:25:44.024314  

  335 17:25:44.034160  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  336 17:25:44.037317  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  337 17:25:44.044007  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  338 17:25:44.047215  CPU: AES supported, TXT NOT supported, VT supported

  339 17:25:44.053682  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  340 17:25:44.056792  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  341 17:25:44.063366  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  342 17:25:44.067163  VBOOT: Loading verstage.

  343 17:25:44.070415  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  344 17:25:44.077066  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  345 17:25:44.083530  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  346 17:25:44.083626  CBFS @ c08000 size 3f8000

  347 17:25:44.090152  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  348 17:25:44.093915  CBFS: Locating 'fallback/verstage'

  349 17:25:44.097094  CBFS: Found @ offset 10fb80 size 1072c

  350 17:25:44.101051  

  351 17:25:44.101149  

  352 17:25:44.110431  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  353 17:25:44.125167  Probing TPM: . done!

  354 17:25:44.128554  TPM ready after 0 ms

  355 17:25:44.131674  Connected to device vid:did:rid of 1ae0:0028:00

  356 17:25:44.141824  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  357 17:25:44.145634  Initialized TPM device CR50 revision 0

  358 17:25:44.188461  tlcl_send_startup: Startup return code is 0

  359 17:25:44.188569  TPM: setup succeeded

  360 17:25:44.201219  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  361 17:25:44.205092  Chrome EC: UHEPI supported

  362 17:25:44.208461  Phase 1

  363 17:25:44.211857  FMAP: area GBB found @ c05000 (12288 bytes)

  364 17:25:44.218301  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  365 17:25:44.225047  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  366 17:25:44.228385  Recovery requested (1009000e)

  367 17:25:44.233541  Saving nvdata

  368 17:25:44.239956  tlcl_extend: response is 0

  369 17:25:44.248751  tlcl_extend: response is 0

  370 17:25:44.255840  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  371 17:25:44.259445  CBFS @ c08000 size 3f8000

  372 17:25:44.265687  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  373 17:25:44.268970  CBFS: Locating 'fallback/romstage'

  374 17:25:44.272275  CBFS: Found @ offset 80 size 145fc

  375 17:25:44.275502  Accumulated console time in verstage 98 ms

  376 17:25:44.275592  

  377 17:25:44.275658  

  378 17:25:44.288792  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  379 17:25:44.295619  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  380 17:25:44.298896  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  381 17:25:44.302191  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  382 17:25:44.308787  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  383 17:25:44.312244  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  384 17:25:44.315541  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  385 17:25:44.318894  TCO_STS:   0000 0000

  386 17:25:44.322134  GEN_PMCON: e0015238 00000200

  387 17:25:44.325451  GBLRST_CAUSE: 00000000 00000000

  388 17:25:44.325561  prev_sleep_state 5

  389 17:25:44.328678  Boot Count incremented to 58431

  390 17:25:44.335928  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  391 17:25:44.339163  CBFS @ c08000 size 3f8000

  392 17:25:44.345485  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  393 17:25:44.345566  CBFS: Locating 'fspm.bin'

  394 17:25:44.352286  CBFS: Found @ offset 5ffc0 size 71000

  395 17:25:44.355550  Chrome EC: UHEPI supported

  396 17:25:44.361843  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  397 17:25:44.365598  Probing TPM:  done!

  398 17:25:44.372494  Connected to device vid:did:rid of 1ae0:0028:00

  399 17:25:44.382517  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  400 17:25:44.387717  Initialized TPM device CR50 revision 0

  401 17:25:44.397083  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  402 17:25:44.403714  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  403 17:25:44.406736  MRC cache found, size 1948

  404 17:25:44.410462  bootmode is set to: 2

  405 17:25:44.413587  PRMRR disabled by config.

  406 17:25:44.413670  SPD INDEX = 1

  407 17:25:44.420109  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  408 17:25:44.423465  CBFS @ c08000 size 3f8000

  409 17:25:44.430335  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  410 17:25:44.430416  CBFS: Locating 'spd.bin'

  411 17:25:44.433643  CBFS: Found @ offset 5fb80 size 400

  412 17:25:44.437011  SPD: module type is LPDDR3

  413 17:25:44.440273  SPD: module part is 

  414 17:25:44.446943  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  415 17:25:44.450060  SPD: device width 4 bits, bus width 8 bits

  416 17:25:44.453130  SPD: module size is 4096 MB (per channel)

  417 17:25:44.456383  memory slot: 0 configuration done.

  418 17:25:44.459664  memory slot: 2 configuration done.

  419 17:25:44.511997  CBMEM:

  420 17:25:44.514795  IMD: root @ 99fff000 254 entries.

  421 17:25:44.518518  IMD: root @ 99ffec00 62 entries.

  422 17:25:44.521711  External stage cache:

  423 17:25:44.525097  IMD: root @ 9abff000 254 entries.

  424 17:25:44.528360  IMD: root @ 9abfec00 62 entries.

  425 17:25:44.531515  Chrome EC: clear events_b mask to 0x0000000020004000

  426 17:25:44.547902  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  427 17:25:44.560718  tlcl_write: response is 0

  428 17:25:44.569696  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  429 17:25:44.576564  MRC: TPM MRC hash updated successfully.

  430 17:25:44.576689  2 DIMMs found

  431 17:25:44.579662  SMM Memory Map

  432 17:25:44.582835  SMRAM       : 0x9a000000 0x1000000

  433 17:25:44.586445   Subregion 0: 0x9a000000 0xa00000

  434 17:25:44.589386   Subregion 1: 0x9aa00000 0x200000

  435 17:25:44.593326   Subregion 2: 0x9ac00000 0x400000

  436 17:25:44.596683  top_of_ram = 0x9a000000

  437 17:25:44.599997  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  438 17:25:44.606325  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  439 17:25:44.609626  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  440 17:25:44.616068  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  441 17:25:44.619857  CBFS @ c08000 size 3f8000

  442 17:25:44.622978  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  443 17:25:44.625979  CBFS: Locating 'fallback/postcar'

  444 17:25:44.632928  CBFS: Found @ offset 107000 size 4b44

  445 17:25:44.636245  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  446 17:25:44.648934  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  447 17:25:44.652074  Processing 180 relocs. Offset value of 0x97c0c000

  448 17:25:44.660919  Accumulated console time in romstage 286 ms

  449 17:25:44.661005  

  450 17:25:44.661075  

  451 17:25:44.670521  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  452 17:25:44.677429  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  453 17:25:44.680435  CBFS @ c08000 size 3f8000

  454 17:25:44.683692  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  455 17:25:44.690334  CBFS: Locating 'fallback/ramstage'

  456 17:25:44.693460  CBFS: Found @ offset 43380 size 1b9e8

  457 17:25:44.700331  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  458 17:25:44.732007  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  459 17:25:44.735774  Processing 3976 relocs. Offset value of 0x98db0000

  460 17:25:44.742202  Accumulated console time in postcar 52 ms

  461 17:25:44.742285  

  462 17:25:44.742357  

  463 17:25:44.752548  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  464 17:25:44.759216  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  465 17:25:44.761960  WARNING: RO_VPD is uninitialized or empty.

  466 17:25:44.765961  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  467 17:25:44.772519  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  468 17:25:44.772624  Normal boot.

  469 17:25:44.778753  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  470 17:25:44.782459  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  471 17:25:44.785750  CBFS @ c08000 size 3f8000

  472 17:25:44.792016  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  473 17:25:44.795551  CBFS: Locating 'cpu_microcode_blob.bin'

  474 17:25:44.798648  CBFS: Found @ offset 14700 size 2ec00

  475 17:25:44.802040  microcode: sig=0x806ec pf=0x4 revision=0xc9

  476 17:25:44.805050  Skip microcode update

  477 17:25:44.808339  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  478 17:25:44.812191  CBFS @ c08000 size 3f8000

  479 17:25:44.818828  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  480 17:25:44.822053  CBFS: Locating 'fsps.bin'

  481 17:25:44.825384  CBFS: Found @ offset d1fc0 size 35000

  482 17:25:44.850215  Detected 4 core, 8 thread CPU.

  483 17:25:44.853441  Setting up SMI for CPU

  484 17:25:44.857436  IED base = 0x9ac00000

  485 17:25:44.857525  IED size = 0x00400000

  486 17:25:44.860616  Will perform SMM setup.

  487 17:25:44.866644  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  488 17:25:44.873844  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  489 17:25:44.877142  Processing 16 relocs. Offset value of 0x00030000

  490 17:25:44.880441  Attempting to start 7 APs

  491 17:25:44.883572  Waiting for 10ms after sending INIT.

  492 17:25:44.899986  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  493 17:25:44.900133  done.

  494 17:25:44.903667  AP: slot 2 apic_id 2.

  495 17:25:44.906716  AP: slot 3 apic_id 3.

  496 17:25:44.906838  AP: slot 6 apic_id 6.

  497 17:25:44.909901  AP: slot 7 apic_id 7.

  498 17:25:44.913164  AP: slot 4 apic_id 4.

  499 17:25:44.913292  AP: slot 5 apic_id 5.

  500 17:25:44.920330  Waiting for 2nd SIPI to complete...done.

  501 17:25:44.926950  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  502 17:25:44.933338  Processing 13 relocs. Offset value of 0x00038000

  503 17:25:44.936636  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  504 17:25:44.943121  Installing SMM handler to 0x9a000000

  505 17:25:44.950043  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  506 17:25:44.956341  Processing 658 relocs. Offset value of 0x9a010000

  507 17:25:44.963290  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  508 17:25:44.966070  Processing 13 relocs. Offset value of 0x9a008000

  509 17:25:44.972638  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  510 17:25:44.979842  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  511 17:25:44.986378  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  512 17:25:44.989594  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  513 17:25:44.996121  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  514 17:25:45.002950  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  515 17:25:45.006295  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  516 17:25:45.012539  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  517 17:25:45.016351  Clearing SMI status registers

  518 17:25:45.019492  SMI_STS: PM1 

  519 17:25:45.019614  PM1_STS: PWRBTN 

  520 17:25:45.022717  TCO_STS: SECOND_TO 

  521 17:25:45.026551  New SMBASE 0x9a000000

  522 17:25:45.029758  In relocation handler: CPU 0

  523 17:25:45.033002  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  524 17:25:45.036168  Writing SMRR. base = 0x9a000006, mask=0xff000800

  525 17:25:45.039491  Relocation complete.

  526 17:25:45.042758  New SMBASE 0x99fffc00

  527 17:25:45.042864  In relocation handler: CPU 1

  528 17:25:45.049858  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  529 17:25:45.053020  Writing SMRR. base = 0x9a000006, mask=0xff000800

  530 17:25:45.056232  Relocation complete.

  531 17:25:45.059546  New SMBASE 0x99fff000

  532 17:25:45.059683  In relocation handler: CPU 4

  533 17:25:45.066362  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  534 17:25:45.069667  Writing SMRR. base = 0x9a000006, mask=0xff000800

  535 17:25:45.073047  Relocation complete.

  536 17:25:45.073125  New SMBASE 0x99ffec00

  537 17:25:45.076421  In relocation handler: CPU 5

  538 17:25:45.082909  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  539 17:25:45.086121  Writing SMRR. base = 0x9a000006, mask=0xff000800

  540 17:25:45.089394  Relocation complete.

  541 17:25:45.089507  New SMBASE 0x99fff800

  542 17:25:45.092592  In relocation handler: CPU 2

  543 17:25:45.099336  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  544 17:25:45.102953  Writing SMRR. base = 0x9a000006, mask=0xff000800

  545 17:25:45.106123  Relocation complete.

  546 17:25:45.106201  New SMBASE 0x99fff400

  547 17:25:45.109220  In relocation handler: CPU 3

  548 17:25:45.112462  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  549 17:25:45.119326  Writing SMRR. base = 0x9a000006, mask=0xff000800

  550 17:25:45.122399  Relocation complete.

  551 17:25:45.122510  New SMBASE 0x99ffe800

  552 17:25:45.125872  In relocation handler: CPU 6

  553 17:25:45.129094  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  554 17:25:45.135474  Writing SMRR. base = 0x9a000006, mask=0xff000800

  555 17:25:45.135560  Relocation complete.

  556 17:25:45.139271  New SMBASE 0x99ffe400

  557 17:25:45.142533  In relocation handler: CPU 7

  558 17:25:45.145748  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  559 17:25:45.152415  Writing SMRR. base = 0x9a000006, mask=0xff000800

  560 17:25:45.152528  Relocation complete.

  561 17:25:45.155619  Initializing CPU #0

  562 17:25:45.159065  CPU: vendor Intel device 806ec

  563 17:25:45.162611  CPU: family 06, model 8e, stepping 0c

  564 17:25:45.165909  Clearing out pending MCEs

  565 17:25:45.168946  Setting up local APIC...

  566 17:25:45.169098   apic_id: 0x00 done.

  567 17:25:45.172798  Turbo is available but hidden

  568 17:25:45.175512  Turbo is available and visible

  569 17:25:45.178893  VMX status: enabled

  570 17:25:45.182176  IA32_FEATURE_CONTROL status: locked

  571 17:25:45.186028  Skip microcode update

  572 17:25:45.186142  CPU #0 initialized

  573 17:25:45.189271  Initializing CPU #1

  574 17:25:45.189377  Initializing CPU #4

  575 17:25:45.192587  Initializing CPU #5

  576 17:25:45.195880  CPU: vendor Intel device 806ec

  577 17:25:45.199049  CPU: family 06, model 8e, stepping 0c

  578 17:25:45.202291  CPU: vendor Intel device 806ec

  579 17:25:45.205601  CPU: family 06, model 8e, stepping 0c

  580 17:25:45.208913  Clearing out pending MCEs

  581 17:25:45.212099  Clearing out pending MCEs

  582 17:25:45.215355  Setting up local APIC...

  583 17:25:45.215463  Initializing CPU #2

  584 17:25:45.218626  Initializing CPU #3

  585 17:25:45.218713  Initializing CPU #6

  586 17:25:45.222438  Initializing CPU #7

  587 17:25:45.225465  CPU: vendor Intel device 806ec

  588 17:25:45.228624  CPU: family 06, model 8e, stepping 0c

  589 17:25:45.232248  CPU: vendor Intel device 806ec

  590 17:25:45.235180  CPU: family 06, model 8e, stepping 0c

  591 17:25:45.238326  Clearing out pending MCEs

  592 17:25:45.241501  Clearing out pending MCEs

  593 17:25:45.245299  Setting up local APIC...

  594 17:25:45.248701  CPU: vendor Intel device 806ec

  595 17:25:45.251392  CPU: family 06, model 8e, stepping 0c

  596 17:25:45.255322  CPU: vendor Intel device 806ec

  597 17:25:45.258016  CPU: family 06, model 8e, stepping 0c

  598 17:25:45.261927  Clearing out pending MCEs

  599 17:25:45.262044  Clearing out pending MCEs

  600 17:25:45.265219  Setting up local APIC...

  601 17:25:45.268176  Setting up local APIC...

  602 17:25:45.271416  CPU: vendor Intel device 806ec

  603 17:25:45.274666  CPU: family 06, model 8e, stepping 0c

  604 17:25:45.278221  Clearing out pending MCEs

  605 17:25:45.281449   apic_id: 0x03 done.

  606 17:25:45.281536  Setting up local APIC...

  607 17:25:45.284631   apic_id: 0x05 done.

  608 17:25:45.287975   apic_id: 0x04 done.

  609 17:25:45.288062  Setting up local APIC...

  610 17:25:45.291969   apic_id: 0x02 done.

  611 17:25:45.294603  VMX status: enabled

  612 17:25:45.294689  VMX status: enabled

  613 17:25:45.297981  IA32_FEATURE_CONTROL status: locked

  614 17:25:45.301069  IA32_FEATURE_CONTROL status: locked

  615 17:25:45.304534  Skip microcode update

  616 17:25:45.307895  Skip microcode update

  617 17:25:45.308011  CPU #3 initialized

  618 17:25:45.311150  CPU #2 initialized

  619 17:25:45.314457  VMX status: enabled

  620 17:25:45.314569  VMX status: enabled

  621 17:25:45.317624  IA32_FEATURE_CONTROL status: locked

  622 17:25:45.320995  IA32_FEATURE_CONTROL status: locked

  623 17:25:45.324217  Skip microcode update

  624 17:25:45.328276  Skip microcode update

  625 17:25:45.328385  CPU #4 initialized

  626 17:25:45.331334  CPU #5 initialized

  627 17:25:45.334402   apic_id: 0x01 done.

  628 17:25:45.334520  Setting up local APIC...

  629 17:25:45.338123  VMX status: enabled

  630 17:25:45.341101   apic_id: 0x06 done.

  631 17:25:45.341218   apic_id: 0x07 done.

  632 17:25:45.344565  VMX status: enabled

  633 17:25:45.344681  VMX status: enabled

  634 17:25:45.350971  IA32_FEATURE_CONTROL status: locked

  635 17:25:45.354685  IA32_FEATURE_CONTROL status: locked

  636 17:25:45.354772  Skip microcode update

  637 17:25:45.358105  Skip microcode update

  638 17:25:45.361284  CPU #6 initialized

  639 17:25:45.361402  CPU #7 initialized

  640 17:25:45.364507  IA32_FEATURE_CONTROL status: locked

  641 17:25:45.367924  Skip microcode update

  642 17:25:45.371073  CPU #1 initialized

  643 17:25:45.374124  bsp_do_flight_plan done after 452 msecs.

  644 17:25:45.377521  CPU: frequency set to 4200 MHz

  645 17:25:45.377608  Enabling SMIs.

  646 17:25:45.380623  Locking SMM.

  647 17:25:45.394610  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  648 17:25:45.398022  CBFS @ c08000 size 3f8000

  649 17:25:45.404380  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  650 17:25:45.404496  CBFS: Locating 'vbt.bin'

  651 17:25:45.407688  CBFS: Found @ offset 5f5c0 size 499

  652 17:25:45.414272  Found a VBT of 4608 bytes after decompression

  653 17:25:45.599088  Display FSP Version Info HOB

  654 17:25:45.602348  Reference Code - CPU = 9.0.1e.30

  655 17:25:45.605374  uCode Version = 0.0.0.ca

  656 17:25:45.608580  TXT ACM version = ff.ff.ff.ffff

  657 17:25:45.612226  Display FSP Version Info HOB

  658 17:25:45.615463  Reference Code - ME = 9.0.1e.30

  659 17:25:45.618861  MEBx version = 0.0.0.0

  660 17:25:45.622152  ME Firmware Version = Consumer SKU

  661 17:25:45.625594  Display FSP Version Info HOB

  662 17:25:45.628789  Reference Code - CML PCH = 9.0.1e.30

  663 17:25:45.631991  PCH-CRID Status = Disabled

  664 17:25:45.635365  PCH-CRID Original Value = ff.ff.ff.ffff

  665 17:25:45.638623  PCH-CRID New Value = ff.ff.ff.ffff

  666 17:25:45.642116  OPROM - RST - RAID = ff.ff.ff.ffff

  667 17:25:45.645275  ChipsetInit Base Version = ff.ff.ff.ffff

  668 17:25:45.648596  ChipsetInit Oem Version = ff.ff.ff.ffff

  669 17:25:45.651995  Display FSP Version Info HOB

  670 17:25:45.658173  Reference Code - SA - System Agent = 9.0.1e.30

  671 17:25:45.661862  Reference Code - MRC = 0.7.1.6c

  672 17:25:45.662003  SA - PCIe Version = 9.0.1e.30

  673 17:25:45.664863  SA-CRID Status = Disabled

  674 17:25:45.668113  SA-CRID Original Value = 0.0.0.c

  675 17:25:45.671867  SA-CRID New Value = 0.0.0.c

  676 17:25:45.675080  OPROM - VBIOS = ff.ff.ff.ffff

  677 17:25:45.678279  RTC Init

  678 17:25:45.681593  Set power on after power failure.

  679 17:25:45.681704  Disabling Deep S3

  680 17:25:45.684916  Disabling Deep S3

  681 17:25:45.684994  Disabling Deep S4

  682 17:25:45.688227  Disabling Deep S4

  683 17:25:45.691504  Disabling Deep S5

  684 17:25:45.691610  Disabling Deep S5

  685 17:25:45.697882  BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 195 exit 1

  686 17:25:45.697969  Enumerating buses...

  687 17:25:45.705043  Show all devs... Before device enumeration.

  688 17:25:45.708233  Root Device: enabled 1

  689 17:25:45.708345  CPU_CLUSTER: 0: enabled 1

  690 17:25:45.711433  DOMAIN: 0000: enabled 1

  691 17:25:45.714591  APIC: 00: enabled 1

  692 17:25:45.714670  PCI: 00:00.0: enabled 1

  693 17:25:45.717737  PCI: 00:02.0: enabled 1

  694 17:25:45.721681  PCI: 00:04.0: enabled 0

  695 17:25:45.724940  PCI: 00:05.0: enabled 0

  696 17:25:45.725026  PCI: 00:12.0: enabled 1

  697 17:25:45.728290  PCI: 00:12.5: enabled 0

  698 17:25:45.731532  PCI: 00:12.6: enabled 0

  699 17:25:45.734764  PCI: 00:14.0: enabled 1

  700 17:25:45.734851  PCI: 00:14.1: enabled 0

  701 17:25:45.738116  PCI: 00:14.3: enabled 1

  702 17:25:45.741402  PCI: 00:14.5: enabled 0

  703 17:25:45.741487  PCI: 00:15.0: enabled 1

  704 17:25:45.744688  PCI: 00:15.1: enabled 1

  705 17:25:45.748041  PCI: 00:15.2: enabled 0

  706 17:25:45.751117  PCI: 00:15.3: enabled 0

  707 17:25:45.751230  PCI: 00:16.0: enabled 1

  708 17:25:45.754421  PCI: 00:16.1: enabled 0

  709 17:25:45.757729  PCI: 00:16.2: enabled 0

  710 17:25:45.760784  PCI: 00:16.3: enabled 0

  711 17:25:45.760895  PCI: 00:16.4: enabled 0

  712 17:25:45.764589  PCI: 00:16.5: enabled 0

  713 17:25:45.767583  PCI: 00:17.0: enabled 1

  714 17:25:45.771331  PCI: 00:19.0: enabled 1

  715 17:25:45.771450  PCI: 00:19.1: enabled 0

  716 17:25:45.774543  PCI: 00:19.2: enabled 0

  717 17:25:45.777675  PCI: 00:1a.0: enabled 0

  718 17:25:45.777790  PCI: 00:1c.0: enabled 0

  719 17:25:45.780789  PCI: 00:1c.1: enabled 0

  720 17:25:45.784568  PCI: 00:1c.2: enabled 0

  721 17:25:45.787881  PCI: 00:1c.3: enabled 0

  722 17:25:45.787996  PCI: 00:1c.4: enabled 0

  723 17:25:45.791203  PCI: 00:1c.5: enabled 0

  724 17:25:45.794468  PCI: 00:1c.6: enabled 0

  725 17:25:45.797629  PCI: 00:1c.7: enabled 0

  726 17:25:45.797742  PCI: 00:1d.0: enabled 1

  727 17:25:45.800869  PCI: 00:1d.1: enabled 0

  728 17:25:45.804064  PCI: 00:1d.2: enabled 0

  729 17:25:45.807401  PCI: 00:1d.3: enabled 0

  730 17:25:45.807521  PCI: 00:1d.4: enabled 0

  731 17:25:45.810627  PCI: 00:1d.5: enabled 1

  732 17:25:45.813958  PCI: 00:1e.0: enabled 1

  733 17:25:45.814071  PCI: 00:1e.1: enabled 0

  734 17:25:45.817291  PCI: 00:1e.2: enabled 1

  735 17:25:45.820485  PCI: 00:1e.3: enabled 1

  736 17:25:45.824008  PCI: 00:1f.0: enabled 1

  737 17:25:45.824120  PCI: 00:1f.1: enabled 1

  738 17:25:45.827281  PCI: 00:1f.2: enabled 1

  739 17:25:45.830622  PCI: 00:1f.3: enabled 1

  740 17:25:45.833943  PCI: 00:1f.4: enabled 1

  741 17:25:45.834061  PCI: 00:1f.5: enabled 1

  742 17:25:45.837349  PCI: 00:1f.6: enabled 0

  743 17:25:45.840538  USB0 port 0: enabled 1

  744 17:25:45.840643  I2C: 00:15: enabled 1

  745 17:25:45.843906  I2C: 00:5d: enabled 1

  746 17:25:45.847129  GENERIC: 0.0: enabled 1

  747 17:25:45.850390  I2C: 00:1a: enabled 1

  748 17:25:45.850503  I2C: 00:38: enabled 1

  749 17:25:45.853616  I2C: 00:39: enabled 1

  750 17:25:45.856911  I2C: 00:3a: enabled 1

  751 17:25:45.856995  I2C: 00:3b: enabled 1

  752 17:25:45.860769  PCI: 00:00.0: enabled 1

  753 17:25:45.864031  SPI: 00: enabled 1

  754 17:25:45.864140  SPI: 01: enabled 1

  755 17:25:45.867336  PNP: 0c09.0: enabled 1

  756 17:25:45.870496  USB2 port 0: enabled 1

  757 17:25:45.870580  USB2 port 1: enabled 1

  758 17:25:45.873678  USB2 port 2: enabled 0

  759 17:25:45.876708  USB2 port 3: enabled 0

  760 17:25:45.876843  USB2 port 5: enabled 0

  761 17:25:45.880680  USB2 port 6: enabled 1

  762 17:25:45.883894  USB2 port 9: enabled 1

  763 17:25:45.887107  USB3 port 0: enabled 1

  764 17:25:45.887216  USB3 port 1: enabled 1

  765 17:25:45.890348  USB3 port 2: enabled 1

  766 17:25:45.893512  USB3 port 3: enabled 1

  767 17:25:45.893639  USB3 port 4: enabled 0

  768 17:25:45.896919  APIC: 01: enabled 1

  769 17:25:45.900174  APIC: 02: enabled 1

  770 17:25:45.900257  APIC: 03: enabled 1

  771 17:25:45.903367  APIC: 04: enabled 1

  772 17:25:45.903450  APIC: 05: enabled 1

  773 17:25:45.907089  APIC: 06: enabled 1

  774 17:25:45.910262  APIC: 07: enabled 1

  775 17:25:45.910373  Compare with tree...

  776 17:25:45.913518  Root Device: enabled 1

  777 17:25:45.916874   CPU_CLUSTER: 0: enabled 1

  778 17:25:45.919958    APIC: 00: enabled 1

  779 17:25:45.920078    APIC: 01: enabled 1

  780 17:25:45.923325    APIC: 02: enabled 1

  781 17:25:45.926443    APIC: 03: enabled 1

  782 17:25:45.926554    APIC: 04: enabled 1

  783 17:25:45.930136    APIC: 05: enabled 1

  784 17:25:45.933228    APIC: 06: enabled 1

  785 17:25:45.933313    APIC: 07: enabled 1

  786 17:25:45.936426   DOMAIN: 0000: enabled 1

  787 17:25:45.939682    PCI: 00:00.0: enabled 1

  788 17:25:45.942915    PCI: 00:02.0: enabled 1

  789 17:25:45.943029    PCI: 00:04.0: enabled 0

  790 17:25:45.946960    PCI: 00:05.0: enabled 0

  791 17:25:45.950192    PCI: 00:12.0: enabled 1

  792 17:25:45.952823    PCI: 00:12.5: enabled 0

  793 17:25:45.956757    PCI: 00:12.6: enabled 0

  794 17:25:45.956907    PCI: 00:14.0: enabled 1

  795 17:25:45.960180     USB0 port 0: enabled 1

  796 17:25:45.962875      USB2 port 0: enabled 1

  797 17:25:45.966276      USB2 port 1: enabled 1

  798 17:25:45.969540      USB2 port 2: enabled 0

  799 17:25:45.969643      USB2 port 3: enabled 0

  800 17:25:45.973343      USB2 port 5: enabled 0

  801 17:25:45.976445      USB2 port 6: enabled 1

  802 17:25:45.979606      USB2 port 9: enabled 1

  803 17:25:45.982714      USB3 port 0: enabled 1

  804 17:25:45.986622      USB3 port 1: enabled 1

  805 17:25:45.986702      USB3 port 2: enabled 1

  806 17:25:45.989740      USB3 port 3: enabled 1

  807 17:25:45.993064      USB3 port 4: enabled 0

  808 17:25:45.996154    PCI: 00:14.1: enabled 0

  809 17:25:45.999549    PCI: 00:14.3: enabled 1

  810 17:25:45.999661    PCI: 00:14.5: enabled 0

  811 17:25:46.002793    PCI: 00:15.0: enabled 1

  812 17:25:46.006097     I2C: 00:15: enabled 1

  813 17:25:46.009372    PCI: 00:15.1: enabled 1

  814 17:25:46.012518     I2C: 00:5d: enabled 1

  815 17:25:46.012604     GENERIC: 0.0: enabled 1

  816 17:25:46.016250    PCI: 00:15.2: enabled 0

  817 17:25:46.019386    PCI: 00:15.3: enabled 0

  818 17:25:46.022663    PCI: 00:16.0: enabled 1

  819 17:25:46.025960    PCI: 00:16.1: enabled 0

  820 17:25:46.026044    PCI: 00:16.2: enabled 0

  821 17:25:46.029297    PCI: 00:16.3: enabled 0

  822 17:25:46.032452    PCI: 00:16.4: enabled 0

  823 17:25:46.035592    PCI: 00:16.5: enabled 0

  824 17:25:46.039439    PCI: 00:17.0: enabled 1

  825 17:25:46.039523    PCI: 00:19.0: enabled 1

  826 17:25:46.042523     I2C: 00:1a: enabled 1

  827 17:25:46.045877     I2C: 00:38: enabled 1

  828 17:25:46.049057     I2C: 00:39: enabled 1

  829 17:25:46.049139     I2C: 00:3a: enabled 1

  830 17:25:46.052341     I2C: 00:3b: enabled 1

  831 17:25:46.055664    PCI: 00:19.1: enabled 0

  832 17:25:46.058959    PCI: 00:19.2: enabled 0

  833 17:25:46.059067    PCI: 00:1a.0: enabled 0

  834 17:25:46.062264    PCI: 00:1c.0: enabled 0

  835 17:25:46.065474    PCI: 00:1c.1: enabled 0

  836 17:25:46.068718    PCI: 00:1c.2: enabled 0

  837 17:25:46.072044    PCI: 00:1c.3: enabled 0

  838 17:25:46.072119    PCI: 00:1c.4: enabled 0

  839 17:25:46.075339    PCI: 00:1c.5: enabled 0

  840 17:25:46.079184    PCI: 00:1c.6: enabled 0

  841 17:25:46.082303    PCI: 00:1c.7: enabled 0

  842 17:25:46.085447    PCI: 00:1d.0: enabled 1

  843 17:25:46.085530    PCI: 00:1d.1: enabled 0

  844 17:25:46.089167    PCI: 00:1d.2: enabled 0

  845 17:25:46.092231    PCI: 00:1d.3: enabled 0

  846 17:25:46.095559    PCI: 00:1d.4: enabled 0

  847 17:25:46.098846    PCI: 00:1d.5: enabled 1

  848 17:25:46.098933     PCI: 00:00.0: enabled 1

  849 17:25:46.101857    PCI: 00:1e.0: enabled 1

  850 17:25:46.105730    PCI: 00:1e.1: enabled 0

  851 17:25:46.109006    PCI: 00:1e.2: enabled 1

  852 17:25:46.109080     SPI: 00: enabled 1

  853 17:25:46.112211    PCI: 00:1e.3: enabled 1

  854 17:25:46.115573     SPI: 01: enabled 1

  855 17:25:46.118807    PCI: 00:1f.0: enabled 1

  856 17:25:46.121888     PNP: 0c09.0: enabled 1

  857 17:25:46.121962    PCI: 00:1f.1: enabled 1

  858 17:25:46.125451    PCI: 00:1f.2: enabled 1

  859 17:25:46.128446    PCI: 00:1f.3: enabled 1

  860 17:25:46.131773    PCI: 00:1f.4: enabled 1

  861 17:25:46.131877    PCI: 00:1f.5: enabled 1

  862 17:25:46.135076    PCI: 00:1f.6: enabled 0

  863 17:25:46.138907  Root Device scanning...

  864 17:25:46.141990  scan_static_bus for Root Device

  865 17:25:46.145283  CPU_CLUSTER: 0 enabled

  866 17:25:46.145366  DOMAIN: 0000 enabled

  867 17:25:46.148545  DOMAIN: 0000 scanning...

  868 17:25:46.152251  PCI: pci_scan_bus for bus 00

  869 17:25:46.155551  PCI: 00:00.0 [8086/0000] ops

  870 17:25:46.158887  PCI: 00:00.0 [8086/9b61] enabled

  871 17:25:46.162183  PCI: 00:02.0 [8086/0000] bus ops

  872 17:25:46.165427  PCI: 00:02.0 [8086/9b41] enabled

  873 17:25:46.168755  PCI: 00:04.0 [8086/1903] disabled

  874 17:25:46.171996  PCI: 00:08.0 [8086/1911] enabled

  875 17:25:46.175341  PCI: 00:12.0 [8086/02f9] enabled

  876 17:25:46.178740  PCI: 00:14.0 [8086/0000] bus ops

  877 17:25:46.181960  PCI: 00:14.0 [8086/02ed] enabled

  878 17:25:46.185158  PCI: 00:14.2 [8086/02ef] enabled

  879 17:25:46.188240  PCI: 00:14.3 [8086/02f0] enabled

  880 17:25:46.192060  PCI: 00:15.0 [8086/0000] bus ops

  881 17:25:46.195175  PCI: 00:15.0 [8086/02e8] enabled

  882 17:25:46.198362  PCI: 00:15.1 [8086/0000] bus ops

  883 17:25:46.201682  PCI: 00:15.1 [8086/02e9] enabled

  884 17:25:46.204827  PCI: 00:16.0 [8086/0000] ops

  885 17:25:46.208542  PCI: 00:16.0 [8086/02e0] enabled

  886 17:25:46.211771  PCI: 00:17.0 [8086/0000] ops

  887 17:25:46.215041  PCI: 00:17.0 [8086/02d3] enabled

  888 17:25:46.218199  PCI: 00:19.0 [8086/0000] bus ops

  889 17:25:46.221547  PCI: 00:19.0 [8086/02c5] enabled

  890 17:25:46.224831  PCI: 00:1d.0 [8086/0000] bus ops

  891 17:25:46.228704  PCI: 00:1d.0 [8086/02b0] enabled

  892 17:25:46.234886  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  893 17:25:46.234978  PCI: 00:1e.0 [8086/0000] ops

  894 17:25:46.238075  PCI: 00:1e.0 [8086/02a8] enabled

  895 17:25:46.241860  PCI: 00:1e.2 [8086/0000] bus ops

  896 17:25:46.245036  PCI: 00:1e.2 [8086/02aa] enabled

  897 17:25:46.248090  PCI: 00:1e.3 [8086/0000] bus ops

  898 17:25:46.251451  PCI: 00:1e.3 [8086/02ab] enabled

  899 17:25:46.254626  PCI: 00:1f.0 [8086/0000] bus ops

  900 17:25:46.258354  PCI: 00:1f.0 [8086/0284] enabled

  901 17:25:46.264722  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  902 17:25:46.271441  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  903 17:25:46.274727  PCI: 00:1f.3 [8086/0000] bus ops

  904 17:25:46.277981  PCI: 00:1f.3 [8086/02c8] enabled

  905 17:25:46.281339  PCI: 00:1f.4 [8086/0000] bus ops

  906 17:25:46.284735  PCI: 00:1f.4 [8086/02a3] enabled

  907 17:25:46.288002  PCI: 00:1f.5 [8086/0000] bus ops

  908 17:25:46.291131  PCI: 00:1f.5 [8086/02a4] enabled

  909 17:25:46.294210  PCI: Leftover static devices:

  910 17:25:46.294285  PCI: 00:05.0

  911 17:25:46.297975  PCI: 00:12.5

  912 17:25:46.298061  PCI: 00:12.6

  913 17:25:46.298127  PCI: 00:14.1

  914 17:25:46.301132  PCI: 00:14.5

  915 17:25:46.301227  PCI: 00:15.2

  916 17:25:46.304255  PCI: 00:15.3

  917 17:25:46.304339  PCI: 00:16.1

  918 17:25:46.308022  PCI: 00:16.2

  919 17:25:46.308105  PCI: 00:16.3

  920 17:25:46.308171  PCI: 00:16.4

  921 17:25:46.311242  PCI: 00:16.5

  922 17:25:46.311326  PCI: 00:19.1

  923 17:25:46.314379  PCI: 00:19.2

  924 17:25:46.314462  PCI: 00:1a.0

  925 17:25:46.314529  PCI: 00:1c.0

  926 17:25:46.317546  PCI: 00:1c.1

  927 17:25:46.317630  PCI: 00:1c.2

  928 17:25:46.320795  PCI: 00:1c.3

  929 17:25:46.320931  PCI: 00:1c.4

  930 17:25:46.321039  PCI: 00:1c.5

  931 17:25:46.324036  PCI: 00:1c.6

  932 17:25:46.324119  PCI: 00:1c.7

  933 17:25:46.327291  PCI: 00:1d.1

  934 17:25:46.327378  PCI: 00:1d.2

  935 17:25:46.331131  PCI: 00:1d.3

  936 17:25:46.331284  PCI: 00:1d.4

  937 17:25:46.331396  PCI: 00:1d.5

  938 17:25:46.334447  PCI: 00:1e.1

  939 17:25:46.334522  PCI: 00:1f.1

  940 17:25:46.337547  PCI: 00:1f.2

  941 17:25:46.337623  PCI: 00:1f.6

  942 17:25:46.340764  PCI: Check your devicetree.cb.

  943 17:25:46.344371  PCI: 00:02.0 scanning...

  944 17:25:46.347492  scan_generic_bus for PCI: 00:02.0

  945 17:25:46.350562  scan_generic_bus for PCI: 00:02.0 done

  946 17:25:46.357066  scan_bus: scanning of bus PCI: 00:02.0 took 10177 usecs

  947 17:25:46.357157  PCI: 00:14.0 scanning...

  948 17:25:46.361070  scan_static_bus for PCI: 00:14.0

  949 17:25:46.364277  USB0 port 0 enabled

  950 17:25:46.368002  USB0 port 0 scanning...

  951 17:25:46.371237  scan_static_bus for USB0 port 0

  952 17:25:46.371348  USB2 port 0 enabled

  953 17:25:46.374459  USB2 port 1 enabled

  954 17:25:46.377810  USB2 port 2 disabled

  955 17:25:46.377906  USB2 port 3 disabled

  956 17:25:46.381137  USB2 port 5 disabled

  957 17:25:46.384496  USB2 port 6 enabled

  958 17:25:46.384599  USB2 port 9 enabled

  959 17:25:46.387875  USB3 port 0 enabled

  960 17:25:46.391130  USB3 port 1 enabled

  961 17:25:46.391237  USB3 port 2 enabled

  962 17:25:46.394435  USB3 port 3 enabled

  963 17:25:46.394512  USB3 port 4 disabled

  964 17:25:46.397648  USB2 port 0 scanning...

  965 17:25:46.400670  scan_static_bus for USB2 port 0

  966 17:25:46.404410  scan_static_bus for USB2 port 0 done

  967 17:25:46.410744  scan_bus: scanning of bus USB2 port 0 took 9707 usecs

  968 17:25:46.413923  USB2 port 1 scanning...

  969 17:25:46.417109  scan_static_bus for USB2 port 1

  970 17:25:46.420993  scan_static_bus for USB2 port 1 done

  971 17:25:46.423935  scan_bus: scanning of bus USB2 port 1 took 9698 usecs

  972 17:25:46.427261  USB2 port 6 scanning...

  973 17:25:46.430541  scan_static_bus for USB2 port 6

  974 17:25:46.433889  scan_static_bus for USB2 port 6 done

  975 17:25:46.440359  scan_bus: scanning of bus USB2 port 6 took 9705 usecs

  976 17:25:46.443632  USB2 port 9 scanning...

  977 17:25:46.446940  scan_static_bus for USB2 port 9

  978 17:25:46.450705  scan_static_bus for USB2 port 9 done

  979 17:25:46.454001  scan_bus: scanning of bus USB2 port 9 took 9688 usecs

  980 17:25:46.457008  USB3 port 0 scanning...

  981 17:25:46.460181  scan_static_bus for USB3 port 0

  982 17:25:46.463559  scan_static_bus for USB3 port 0 done

  983 17:25:46.470416  scan_bus: scanning of bus USB3 port 0 took 9696 usecs

  984 17:25:46.473686  USB3 port 1 scanning...

  985 17:25:46.476763  scan_static_bus for USB3 port 1

  986 17:25:46.480541  scan_static_bus for USB3 port 1 done

  987 17:25:46.487026  scan_bus: scanning of bus USB3 port 1 took 9698 usecs

  988 17:25:46.487111  USB3 port 2 scanning...

  989 17:25:46.490228  scan_static_bus for USB3 port 2

  990 17:25:46.493544  scan_static_bus for USB3 port 2 done

  991 17:25:46.500224  scan_bus: scanning of bus USB3 port 2 took 9689 usecs

  992 17:25:46.503470  USB3 port 3 scanning...

  993 17:25:46.506626  scan_static_bus for USB3 port 3

  994 17:25:46.510328  scan_static_bus for USB3 port 3 done

  995 17:25:46.516800  scan_bus: scanning of bus USB3 port 3 took 9706 usecs

  996 17:25:46.519928  scan_static_bus for USB0 port 0 done

  997 17:25:46.522942  scan_bus: scanning of bus USB0 port 0 took 155313 usecs

  998 17:25:46.529879  scan_static_bus for PCI: 00:14.0 done

  999 17:25:46.533104  scan_bus: scanning of bus PCI: 00:14.0 took 172932 usecs

 1000 17:25:46.536360  PCI: 00:15.0 scanning...

 1001 17:25:46.539464  scan_generic_bus for PCI: 00:15.0

 1002 17:25:46.543415  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1003 17:25:46.549999  scan_generic_bus for PCI: 00:15.0 done

 1004 17:25:46.553193  scan_bus: scanning of bus PCI: 00:15.0 took 14288 usecs

 1005 17:25:46.556412  PCI: 00:15.1 scanning...

 1006 17:25:46.559652  scan_generic_bus for PCI: 00:15.1

 1007 17:25:46.562915  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1008 17:25:46.569463  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1009 17:25:46.572679  scan_generic_bus for PCI: 00:15.1 done

 1010 17:25:46.576564  scan_bus: scanning of bus PCI: 00:15.1 took 18603 usecs

 1011 17:25:46.579312  PCI: 00:19.0 scanning...

 1012 17:25:46.583230  scan_generic_bus for PCI: 00:19.0

 1013 17:25:46.589597  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1014 17:25:46.592985  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1015 17:25:46.596355  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1016 17:25:46.599569  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1017 17:25:46.602909  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1018 17:25:46.609314  scan_generic_bus for PCI: 00:19.0 done

 1019 17:25:46.612569  scan_bus: scanning of bus PCI: 00:19.0 took 30728 usecs

 1020 17:25:46.615924  PCI: 00:1d.0 scanning...

 1021 17:25:46.619720  do_pci_scan_bridge for PCI: 00:1d.0

 1022 17:25:46.623049  PCI: pci_scan_bus for bus 01

 1023 17:25:46.626226  PCI: 01:00.0 [1c5c/1327] enabled

 1024 17:25:46.629410  Enabling Common Clock Configuration

 1025 17:25:46.635823  L1 Sub-State supported from root port 29

 1026 17:25:46.635907  L1 Sub-State Support = 0xf

 1027 17:25:46.639582  CommonModeRestoreTime = 0x28

 1028 17:25:46.646063  Power On Value = 0x16, Power On Scale = 0x0

 1029 17:25:46.646188  ASPM: Enabled L1

 1030 17:25:46.652574  scan_bus: scanning of bus PCI: 00:1d.0 took 32836 usecs

 1031 17:25:46.655857  PCI: 00:1e.2 scanning...

 1032 17:25:46.659082  scan_generic_bus for PCI: 00:1e.2

 1033 17:25:46.662276  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1034 17:25:46.666195  scan_generic_bus for PCI: 00:1e.2 done

 1035 17:25:46.672456  scan_bus: scanning of bus PCI: 00:1e.2 took 13996 usecs

 1036 17:25:46.672540  PCI: 00:1e.3 scanning...

 1037 17:25:46.679701  scan_generic_bus for PCI: 00:1e.3

 1038 17:25:46.682840  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1039 17:25:46.686194  scan_generic_bus for PCI: 00:1e.3 done

 1040 17:25:46.692647  scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs

 1041 17:25:46.692732  PCI: 00:1f.0 scanning...

 1042 17:25:46.695858  scan_static_bus for PCI: 00:1f.0

 1043 17:25:46.699153  PNP: 0c09.0 enabled

 1044 17:25:46.702561  scan_static_bus for PCI: 00:1f.0 done

 1045 17:25:46.709023  scan_bus: scanning of bus PCI: 00:1f.0 took 12046 usecs

 1046 17:25:46.712369  PCI: 00:1f.3 scanning...

 1047 17:25:46.716118  scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs

 1048 17:25:46.719478  PCI: 00:1f.4 scanning...

 1049 17:25:46.722899  scan_generic_bus for PCI: 00:1f.4

 1050 17:25:46.726029  scan_generic_bus for PCI: 00:1f.4 done

 1051 17:25:46.732830  scan_bus: scanning of bus PCI: 00:1f.4 took 10192 usecs

 1052 17:25:46.736023  PCI: 00:1f.5 scanning...

 1053 17:25:46.739198  scan_generic_bus for PCI: 00:1f.5

 1054 17:25:46.742304  scan_generic_bus for PCI: 00:1f.5 done

 1055 17:25:46.749208  scan_bus: scanning of bus PCI: 00:1f.5 took 10176 usecs

 1056 17:25:46.752420  scan_bus: scanning of bus DOMAIN: 0000 took 604897 usecs

 1057 17:25:46.759117  scan_static_bus for Root Device done

 1058 17:25:46.762389  scan_bus: scanning of bus Root Device took 624776 usecs

 1059 17:25:46.765662  done

 1060 17:25:46.765748  Chrome EC: UHEPI supported

 1061 17:25:46.772244  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1062 17:25:46.779186  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1063 17:25:46.785394  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1064 17:25:46.791942  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1065 17:25:46.795839  SPI flash protection: WPSW=0 SRP0=1

 1066 17:25:46.802321  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1067 17:25:46.805664  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1068 17:25:46.809028  found VGA at PCI: 00:02.0

 1069 17:25:46.812324  Setting up VGA for PCI: 00:02.0

 1070 17:25:46.815601  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1071 17:25:46.822068  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1072 17:25:46.825275  Allocating resources...

 1073 17:25:46.825355  Reading resources...

 1074 17:25:46.831961  Root Device read_resources bus 0 link: 0

 1075 17:25:46.835144  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1076 17:25:46.841935  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1077 17:25:46.845470  DOMAIN: 0000 read_resources bus 0 link: 0

 1078 17:25:46.851786  PCI: 00:14.0 read_resources bus 0 link: 0

 1079 17:25:46.854804  USB0 port 0 read_resources bus 0 link: 0

 1080 17:25:46.863431  USB0 port 0 read_resources bus 0 link: 0 done

 1081 17:25:46.866675  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1082 17:25:46.873864  PCI: 00:15.0 read_resources bus 1 link: 0

 1083 17:25:46.877103  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1084 17:25:46.883350  PCI: 00:15.1 read_resources bus 2 link: 0

 1085 17:25:46.886739  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1086 17:25:46.894635  PCI: 00:19.0 read_resources bus 3 link: 0

 1087 17:25:46.901231  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1088 17:25:46.904485  PCI: 00:1d.0 read_resources bus 1 link: 0

 1089 17:25:46.910885  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1090 17:25:46.914240  PCI: 00:1e.2 read_resources bus 4 link: 0

 1091 17:25:46.921213  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1092 17:25:46.924518  PCI: 00:1e.3 read_resources bus 5 link: 0

 1093 17:25:46.931034  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1094 17:25:46.934304  PCI: 00:1f.0 read_resources bus 0 link: 0

 1095 17:25:46.940612  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1096 17:25:46.947556  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1097 17:25:46.950521  Root Device read_resources bus 0 link: 0 done

 1098 17:25:46.953938  Done reading resources.

 1099 17:25:46.957095  Show resources in subtree (Root Device)...After reading.

 1100 17:25:46.963903   Root Device child on link 0 CPU_CLUSTER: 0

 1101 17:25:46.967163    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1102 17:25:46.967270     APIC: 00

 1103 17:25:46.970582     APIC: 01

 1104 17:25:46.970684     APIC: 02

 1105 17:25:46.973774     APIC: 03

 1106 17:25:46.973875     APIC: 04

 1107 17:25:46.973974     APIC: 05

 1108 17:25:46.977054     APIC: 06

 1109 17:25:46.977159     APIC: 07

 1110 17:25:46.980382    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1111 17:25:47.029533    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1112 17:25:47.029859    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1113 17:25:47.029936     PCI: 00:00.0

 1114 17:25:47.030194     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1115 17:25:47.030263     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1116 17:25:47.033617     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1117 17:25:47.040300     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1118 17:25:47.050004     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1119 17:25:47.060094     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1120 17:25:47.067117     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1121 17:25:47.076393     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1122 17:25:47.086863     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1123 17:25:47.096688     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1124 17:25:47.106266     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1125 17:25:47.113084     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1126 17:25:47.123352     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1127 17:25:47.133114     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1128 17:25:47.142771     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1129 17:25:47.152556     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1130 17:25:47.152673     PCI: 00:02.0

 1131 17:25:47.166276     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1132 17:25:47.175648     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1133 17:25:47.182359     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1134 17:25:47.185689     PCI: 00:04.0

 1135 17:25:47.185772     PCI: 00:08.0

 1136 17:25:47.195877     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1137 17:25:47.199246     PCI: 00:12.0

 1138 17:25:47.209156     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1139 17:25:47.212415     PCI: 00:14.0 child on link 0 USB0 port 0

 1140 17:25:47.222430     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1141 17:25:47.225667      USB0 port 0 child on link 0 USB2 port 0

 1142 17:25:47.228909       USB2 port 0

 1143 17:25:47.228992       USB2 port 1

 1144 17:25:47.232000       USB2 port 2

 1145 17:25:47.232084       USB2 port 3

 1146 17:25:47.235262       USB2 port 5

 1147 17:25:47.239081       USB2 port 6

 1148 17:25:47.239165       USB2 port 9

 1149 17:25:47.242321       USB3 port 0

 1150 17:25:47.242404       USB3 port 1

 1151 17:25:47.245578       USB3 port 2

 1152 17:25:47.245662       USB3 port 3

 1153 17:25:47.248829       USB3 port 4

 1154 17:25:47.248925     PCI: 00:14.2

 1155 17:25:47.258786     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1156 17:25:47.268559     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1157 17:25:47.271854     PCI: 00:14.3

 1158 17:25:47.282091     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1159 17:25:47.285198     PCI: 00:15.0 child on link 0 I2C: 01:15

 1160 17:25:47.295094     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 17:25:47.295186      I2C: 01:15

 1162 17:25:47.302110     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1163 17:25:47.311939     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1164 17:25:47.312110      I2C: 02:5d

 1165 17:25:47.315075      GENERIC: 0.0

 1166 17:25:47.315189     PCI: 00:16.0

 1167 17:25:47.324678     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1168 17:25:47.328539     PCI: 00:17.0

 1169 17:25:47.335075     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1170 17:25:47.344633     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1171 17:25:47.354944     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1172 17:25:47.361331     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1173 17:25:47.371222     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1174 17:25:47.377756     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1175 17:25:47.384839     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1176 17:25:47.394117     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1177 17:25:47.394255      I2C: 03:1a

 1178 17:25:47.397954      I2C: 03:38

 1179 17:25:47.398040      I2C: 03:39

 1180 17:25:47.401129      I2C: 03:3a

 1181 17:25:47.401224      I2C: 03:3b

 1182 17:25:47.404204     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1183 17:25:47.414565     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1184 17:25:47.424288     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1185 17:25:47.434020     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1186 17:25:47.434193      PCI: 01:00.0

 1187 17:25:47.444120      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1188 17:25:47.447299     PCI: 00:1e.0

 1189 17:25:47.457410     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1190 17:25:47.467216     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1191 17:25:47.470591     PCI: 00:1e.2 child on link 0 SPI: 00

 1192 17:25:47.480363     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1193 17:25:47.483615      SPI: 00

 1194 17:25:47.486899     PCI: 00:1e.3 child on link 0 SPI: 01

 1195 17:25:47.496621     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1196 17:25:47.496760      SPI: 01

 1197 17:25:47.503489     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1198 17:25:47.509870     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1199 17:25:47.520007     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1200 17:25:47.523269      PNP: 0c09.0

 1201 17:25:47.529427      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1202 17:25:47.533216     PCI: 00:1f.3

 1203 17:25:47.542987     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1204 17:25:47.552525     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1205 17:25:47.552641     PCI: 00:1f.4

 1206 17:25:47.562642     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1207 17:25:47.572509     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1208 17:25:47.572618     PCI: 00:1f.5

 1209 17:25:47.582313     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1210 17:25:47.589000  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1211 17:25:47.595490  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1212 17:25:47.602046  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1213 17:25:47.605647  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1214 17:25:47.608884  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1215 17:25:47.611967  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1216 17:25:47.615813  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1217 17:25:47.625442  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1218 17:25:47.632014  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1219 17:25:47.638593  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1220 17:25:47.648263  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1221 17:25:47.655245  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1222 17:25:47.658481  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1223 17:25:47.665370  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1224 17:25:47.671484  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1225 17:25:47.674801  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1226 17:25:47.678088  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1227 17:25:47.684628  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1228 17:25:47.687941  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1229 17:25:47.694446  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1230 17:25:47.697835  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1231 17:25:47.704350  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1232 17:25:47.708218  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1233 17:25:47.714699  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1234 17:25:47.717988  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1235 17:25:47.724296  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1236 17:25:47.728163  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1237 17:25:47.734665  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1238 17:25:47.738103  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1239 17:25:47.744597  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1240 17:25:47.748123  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1241 17:25:47.754472  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1242 17:25:47.757830  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1243 17:25:47.761105  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1244 17:25:47.767686  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1245 17:25:47.770953  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1246 17:25:47.777595  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1247 17:25:47.784063  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1248 17:25:47.790675  avoid_fixed_resources: DOMAIN: 0000

 1249 17:25:47.794080  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1250 17:25:47.800650  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1251 17:25:47.807248  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1252 17:25:47.817465  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1253 17:25:47.824129  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1254 17:25:47.830527  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1255 17:25:47.840627  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1256 17:25:47.847221  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1257 17:25:47.853310  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1258 17:25:47.863676  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1259 17:25:47.870178  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1260 17:25:47.876946  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1261 17:25:47.880084  Setting resources...

 1262 17:25:47.886510  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1263 17:25:47.890280  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1264 17:25:47.893625  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1265 17:25:47.896330  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1266 17:25:47.900200  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1267 17:25:47.906804  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1268 17:25:47.913409  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1269 17:25:47.919944  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1270 17:25:47.926645  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1271 17:25:47.933273  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1272 17:25:47.936565  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1273 17:25:47.942682  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1274 17:25:47.946208  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1275 17:25:47.952578  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1276 17:25:47.955935  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1277 17:25:47.962498  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1278 17:25:47.965608  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1279 17:25:47.972720  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1280 17:25:47.976102  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1281 17:25:47.982741  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1282 17:25:47.986079  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1283 17:25:47.992396  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1284 17:25:47.995575  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1285 17:25:48.002572  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1286 17:25:48.006060  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1287 17:25:48.009082  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1288 17:25:48.015708  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1289 17:25:48.019167  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1290 17:25:48.025498  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1291 17:25:48.028714  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1292 17:25:48.035254  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1293 17:25:48.038581  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1294 17:25:48.048477  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1295 17:25:48.055308  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1296 17:25:48.061715  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1297 17:25:48.068384  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1298 17:25:48.074830  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1299 17:25:48.081325  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1300 17:25:48.084663  Root Device assign_resources, bus 0 link: 0

 1301 17:25:48.091935  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1302 17:25:48.098360  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1303 17:25:48.107780  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1304 17:25:48.115010  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1305 17:25:48.124821  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1306 17:25:48.131263  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1307 17:25:48.140992  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1308 17:25:48.144363  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1309 17:25:48.147633  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1310 17:25:48.157932  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1311 17:25:48.164389  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1312 17:25:48.174778  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1313 17:25:48.181289  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1314 17:25:48.187623  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1315 17:25:48.190936  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1316 17:25:48.201437  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1317 17:25:48.204793  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1318 17:25:48.208008  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1319 17:25:48.217916  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1320 17:25:48.224291  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1321 17:25:48.234216  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1322 17:25:48.240786  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1323 17:25:48.247471  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1324 17:25:48.257268  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1325 17:25:48.263822  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1326 17:25:48.274175  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1327 17:25:48.277425  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1328 17:25:48.280595  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1329 17:25:48.290779  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1330 17:25:48.300572  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1331 17:25:48.306917  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1332 17:25:48.313754  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1333 17:25:48.320200  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1334 17:25:48.323320  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1335 17:25:48.333667  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1336 17:25:48.340290  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1337 17:25:48.346987  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1338 17:25:48.350314  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1339 17:25:48.359878  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1340 17:25:48.363766  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1341 17:25:48.366984  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1342 17:25:48.373526  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1343 17:25:48.376897  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1344 17:25:48.383942  LPC: Trying to open IO window from 800 size 1ff

 1345 17:25:48.389918  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1346 17:25:48.399946  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1347 17:25:48.406841  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1348 17:25:48.416707  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1349 17:25:48.419931  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1350 17:25:48.426383  Root Device assign_resources, bus 0 link: 0

 1351 17:25:48.426530  Done setting resources.

 1352 17:25:48.433259  Show resources in subtree (Root Device)...After assigning values.

 1353 17:25:48.439608   Root Device child on link 0 CPU_CLUSTER: 0

 1354 17:25:48.443258    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1355 17:25:48.443410     APIC: 00

 1356 17:25:48.446595     APIC: 01

 1357 17:25:48.446723     APIC: 02

 1358 17:25:48.446821     APIC: 03

 1359 17:25:48.449319     APIC: 04

 1360 17:25:48.449438     APIC: 05

 1361 17:25:48.452588     APIC: 06

 1362 17:25:48.452717     APIC: 07

 1363 17:25:48.455969    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1364 17:25:48.466044    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1365 17:25:48.479382    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1366 17:25:48.479566     PCI: 00:00.0

 1367 17:25:48.489141     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1368 17:25:48.499053     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1369 17:25:48.509174     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1370 17:25:48.518942     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1371 17:25:48.525621     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1372 17:25:48.535043     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1373 17:25:48.545416     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1374 17:25:48.555213     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1375 17:25:48.565247     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1376 17:25:48.571602     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1377 17:25:48.581318     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1378 17:25:48.591213     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1379 17:25:48.601375     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1380 17:25:48.611056     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1381 17:25:48.621225     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1382 17:25:48.630952     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1383 17:25:48.631144     PCI: 00:02.0

 1384 17:25:48.640697     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1385 17:25:48.654161     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1386 17:25:48.660351     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1387 17:25:48.664244     PCI: 00:04.0

 1388 17:25:48.664394     PCI: 00:08.0

 1389 17:25:48.673949     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1390 17:25:48.677057     PCI: 00:12.0

 1391 17:25:48.686856     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1392 17:25:48.690151     PCI: 00:14.0 child on link 0 USB0 port 0

 1393 17:25:48.703493     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1394 17:25:48.706747      USB0 port 0 child on link 0 USB2 port 0

 1395 17:25:48.706888       USB2 port 0

 1396 17:25:48.709929       USB2 port 1

 1397 17:25:48.710050       USB2 port 2

 1398 17:25:48.712986       USB2 port 3

 1399 17:25:48.716313       USB2 port 5

 1400 17:25:48.716438       USB2 port 6

 1401 17:25:48.720165       USB2 port 9

 1402 17:25:48.720287       USB3 port 0

 1403 17:25:48.723351       USB3 port 1

 1404 17:25:48.723480       USB3 port 2

 1405 17:25:48.726478       USB3 port 3

 1406 17:25:48.726586       USB3 port 4

 1407 17:25:48.730013     PCI: 00:14.2

 1408 17:25:48.739957     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1409 17:25:48.749594     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1410 17:25:48.752643     PCI: 00:14.3

 1411 17:25:48.762891     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1412 17:25:48.765941     PCI: 00:15.0 child on link 0 I2C: 01:15

 1413 17:25:48.776250     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1414 17:25:48.779507      I2C: 01:15

 1415 17:25:48.782733     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1416 17:25:48.792572     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1417 17:25:48.792762      I2C: 02:5d

 1418 17:25:48.795948      GENERIC: 0.0

 1419 17:25:48.796063     PCI: 00:16.0

 1420 17:25:48.808503     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1421 17:25:48.808684     PCI: 00:17.0

 1422 17:25:48.818956     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1423 17:25:48.828779     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1424 17:25:48.838479     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1425 17:25:48.848219     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1426 17:25:48.858644     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1427 17:25:48.868566     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1428 17:25:48.871523     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1429 17:25:48.881452     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1430 17:25:48.884766      I2C: 03:1a

 1431 17:25:48.884894      I2C: 03:38

 1432 17:25:48.884996      I2C: 03:39

 1433 17:25:48.887935      I2C: 03:3a

 1434 17:25:48.888055      I2C: 03:3b

 1435 17:25:48.894392     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1436 17:25:48.904762     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1437 17:25:48.914546     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1438 17:25:48.924168     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1439 17:25:48.924312      PCI: 01:00.0

 1440 17:25:48.934003      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1441 17:25:48.937776     PCI: 00:1e.0

 1442 17:25:48.947471     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1443 17:25:48.957292     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1444 17:25:48.963900     PCI: 00:1e.2 child on link 0 SPI: 00

 1445 17:25:48.973357     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1446 17:25:48.973504      SPI: 00

 1447 17:25:48.977162     PCI: 00:1e.3 child on link 0 SPI: 01

 1448 17:25:48.990351     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1449 17:25:48.990515      SPI: 01

 1450 17:25:48.993453     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1451 17:25:49.003366     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1452 17:25:49.013230     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1453 17:25:49.013384      PNP: 0c09.0

 1454 17:25:49.022926      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1455 17:25:49.023066     PCI: 00:1f.3

 1456 17:25:49.032904     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1457 17:25:49.045905     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1458 17:25:49.046059     PCI: 00:1f.4

 1459 17:25:49.055995     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1460 17:25:49.066188     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1461 17:25:49.066373     PCI: 00:1f.5

 1462 17:25:49.079076     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1463 17:25:49.079263  Done allocating resources.

 1464 17:25:49.085462  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1465 17:25:49.089116  Enabling resources...

 1466 17:25:49.092201  PCI: 00:00.0 subsystem <- 8086/9b61

 1467 17:25:49.095847  PCI: 00:00.0 cmd <- 06

 1468 17:25:49.098983  PCI: 00:02.0 subsystem <- 8086/9b41

 1469 17:25:49.102138  PCI: 00:02.0 cmd <- 03

 1470 17:25:49.105428  PCI: 00:08.0 cmd <- 06

 1471 17:25:49.108640  PCI: 00:12.0 subsystem <- 8086/02f9

 1472 17:25:49.111816  PCI: 00:12.0 cmd <- 02

 1473 17:25:49.115256  PCI: 00:14.0 subsystem <- 8086/02ed

 1474 17:25:49.115388  PCI: 00:14.0 cmd <- 02

 1475 17:25:49.118559  PCI: 00:14.2 cmd <- 02

 1476 17:25:49.121917  PCI: 00:14.3 subsystem <- 8086/02f0

 1477 17:25:49.125235  PCI: 00:14.3 cmd <- 02

 1478 17:25:49.128414  PCI: 00:15.0 subsystem <- 8086/02e8

 1479 17:25:49.131712  PCI: 00:15.0 cmd <- 02

 1480 17:25:49.135053  PCI: 00:15.1 subsystem <- 8086/02e9

 1481 17:25:49.138344  PCI: 00:15.1 cmd <- 02

 1482 17:25:49.141804  PCI: 00:16.0 subsystem <- 8086/02e0

 1483 17:25:49.144994  PCI: 00:16.0 cmd <- 02

 1484 17:25:49.148166  PCI: 00:17.0 subsystem <- 8086/02d3

 1485 17:25:49.151462  PCI: 00:17.0 cmd <- 03

 1486 17:25:49.154786  PCI: 00:19.0 subsystem <- 8086/02c5

 1487 17:25:49.158456  PCI: 00:19.0 cmd <- 02

 1488 17:25:49.161609  PCI: 00:1d.0 bridge ctrl <- 0013

 1489 17:25:49.165050  PCI: 00:1d.0 subsystem <- 8086/02b0

 1490 17:25:49.165190  PCI: 00:1d.0 cmd <- 06

 1491 17:25:49.172132  PCI: 00:1e.0 subsystem <- 8086/02a8

 1492 17:25:49.172295  PCI: 00:1e.0 cmd <- 06

 1493 17:25:49.175381  PCI: 00:1e.2 subsystem <- 8086/02aa

 1494 17:25:49.178653  PCI: 00:1e.2 cmd <- 06

 1495 17:25:49.181809  PCI: 00:1e.3 subsystem <- 8086/02ab

 1496 17:25:49.184943  PCI: 00:1e.3 cmd <- 02

 1497 17:25:49.188602  PCI: 00:1f.0 subsystem <- 8086/0284

 1498 17:25:49.191571  PCI: 00:1f.0 cmd <- 407

 1499 17:25:49.194650  PCI: 00:1f.3 subsystem <- 8086/02c8

 1500 17:25:49.198197  PCI: 00:1f.3 cmd <- 02

 1501 17:25:49.201849  PCI: 00:1f.4 subsystem <- 8086/02a3

 1502 17:25:49.204836  PCI: 00:1f.4 cmd <- 03

 1503 17:25:49.207942  PCI: 00:1f.5 subsystem <- 8086/02a4

 1504 17:25:49.211469  PCI: 00:1f.5 cmd <- 406

 1505 17:25:49.219630  PCI: 01:00.0 cmd <- 02

 1506 17:25:49.224843  done.

 1507 17:25:49.234547  ME: Version: 14.0.39.1367

 1508 17:25:49.241223  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9

 1509 17:25:49.244505  Initializing devices...

 1510 17:25:49.244614  Root Device init ...

 1511 17:25:49.250986  Chrome EC: Set SMI mask to 0x0000000000000000

 1512 17:25:49.254335  Chrome EC: clear events_b mask to 0x0000000000000000

 1513 17:25:49.261000  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1514 17:25:49.267848  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1515 17:25:49.274109  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1516 17:25:49.277583  Chrome EC: Set WAKE mask to 0x0000000000000000

 1517 17:25:49.280837  Root Device init finished in 35247 usecs

 1518 17:25:49.284755  CPU_CLUSTER: 0 init ...

 1519 17:25:49.291330  CPU_CLUSTER: 0 init finished in 2449 usecs

 1520 17:25:49.295033  PCI: 00:00.0 init ...

 1521 17:25:49.298695  CPU TDP: 15 Watts

 1522 17:25:49.301848  CPU PL2 = 64 Watts

 1523 17:25:49.305436  PCI: 00:00.0 init finished in 7074 usecs

 1524 17:25:49.308523  PCI: 00:02.0 init ...

 1525 17:25:49.311565  PCI: 00:02.0 init finished in 2252 usecs

 1526 17:25:49.315311  PCI: 00:08.0 init ...

 1527 17:25:49.318368  PCI: 00:08.0 init finished in 2253 usecs

 1528 17:25:49.321538  PCI: 00:12.0 init ...

 1529 17:25:49.324821  PCI: 00:12.0 init finished in 2252 usecs

 1530 17:25:49.328635  PCI: 00:14.0 init ...

 1531 17:25:49.331865  PCI: 00:14.0 init finished in 2254 usecs

 1532 17:25:49.334981  PCI: 00:14.2 init ...

 1533 17:25:49.338204  PCI: 00:14.2 init finished in 2252 usecs

 1534 17:25:49.341448  PCI: 00:14.3 init ...

 1535 17:25:49.344830  PCI: 00:14.3 init finished in 2272 usecs

 1536 17:25:49.348022  PCI: 00:15.0 init ...

 1537 17:25:49.351461  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1538 17:25:49.355145  PCI: 00:15.0 init finished in 5979 usecs

 1539 17:25:49.358414  PCI: 00:15.1 init ...

 1540 17:25:49.361831  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1541 17:25:49.368407  PCI: 00:15.1 init finished in 5977 usecs

 1542 17:25:49.368535  PCI: 00:16.0 init ...

 1543 17:25:49.374686  PCI: 00:16.0 init finished in 2253 usecs

 1544 17:25:49.377857  PCI: 00:19.0 init ...

 1545 17:25:49.381010  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1546 17:25:49.384827  PCI: 00:19.0 init finished in 5979 usecs

 1547 17:25:49.388035  PCI: 00:1d.0 init ...

 1548 17:25:49.391305  Initializing PCH PCIe bridge.

 1549 17:25:49.394571  PCI: 00:1d.0 init finished in 5286 usecs

 1550 17:25:49.397811  PCI: 00:1f.0 init ...

 1551 17:25:49.400966  IOAPIC: Initializing IOAPIC at 0xfec00000

 1552 17:25:49.407662  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1553 17:25:49.407837  IOAPIC: ID = 0x02

 1554 17:25:49.411258  IOAPIC: Dumping registers

 1555 17:25:49.414295    reg 0x0000: 0x02000000

 1556 17:25:49.417831    reg 0x0001: 0x00770020

 1557 17:25:49.417954    reg 0x0002: 0x00000000

 1558 17:25:49.424006  PCI: 00:1f.0 init finished in 23542 usecs

 1559 17:25:49.427696  PCI: 00:1f.4 init ...

 1560 17:25:49.431051  PCI: 00:1f.4 init finished in 2264 usecs

 1561 17:25:49.441589  PCI: 01:00.0 init ...

 1562 17:25:49.444864  PCI: 01:00.0 init finished in 2245 usecs

 1563 17:25:49.448753  PNP: 0c09.0 init ...

 1564 17:25:49.452085  Google Chrome EC uptime: 11.082 seconds

 1565 17:25:49.459145  Google Chrome AP resets since EC boot: 0

 1566 17:25:49.461937  Google Chrome most recent AP reset causes:

 1567 17:25:49.468481  Google Chrome EC reset flags at last EC boot: reset-pin

 1568 17:25:49.472262  PNP: 0c09.0 init finished in 20573 usecs

 1569 17:25:49.475383  Devices initialized

 1570 17:25:49.478657  Show all devs... After init.

 1571 17:25:49.478781  Root Device: enabled 1

 1572 17:25:49.481932  CPU_CLUSTER: 0: enabled 1

 1573 17:25:49.485179  DOMAIN: 0000: enabled 1

 1574 17:25:49.485308  APIC: 00: enabled 1

 1575 17:25:49.488960  PCI: 00:00.0: enabled 1

 1576 17:25:49.492110  PCI: 00:02.0: enabled 1

 1577 17:25:49.495495  PCI: 00:04.0: enabled 0

 1578 17:25:49.495655  PCI: 00:05.0: enabled 0

 1579 17:25:49.498746  PCI: 00:12.0: enabled 1

 1580 17:25:49.502039  PCI: 00:12.5: enabled 0

 1581 17:25:49.505213  PCI: 00:12.6: enabled 0

 1582 17:25:49.505401  PCI: 00:14.0: enabled 1

 1583 17:25:49.508455  PCI: 00:14.1: enabled 0

 1584 17:25:49.511690  PCI: 00:14.3: enabled 1

 1585 17:25:49.511863  PCI: 00:14.5: enabled 0

 1586 17:25:49.515390  PCI: 00:15.0: enabled 1

 1587 17:25:49.518611  PCI: 00:15.1: enabled 1

 1588 17:25:49.521671  PCI: 00:15.2: enabled 0

 1589 17:25:49.521840  PCI: 00:15.3: enabled 0

 1590 17:25:49.525222  PCI: 00:16.0: enabled 1

 1591 17:25:49.528432  PCI: 00:16.1: enabled 0

 1592 17:25:49.531500  PCI: 00:16.2: enabled 0

 1593 17:25:49.531677  PCI: 00:16.3: enabled 0

 1594 17:25:49.534698  PCI: 00:16.4: enabled 0

 1595 17:25:49.538479  PCI: 00:16.5: enabled 0

 1596 17:25:49.541763  PCI: 00:17.0: enabled 1

 1597 17:25:49.541938  PCI: 00:19.0: enabled 1

 1598 17:25:49.544754  PCI: 00:19.1: enabled 0

 1599 17:25:49.548017  PCI: 00:19.2: enabled 0

 1600 17:25:49.548179  PCI: 00:1a.0: enabled 0

 1601 17:25:49.551282  PCI: 00:1c.0: enabled 0

 1602 17:25:49.554564  PCI: 00:1c.1: enabled 0

 1603 17:25:49.558036  PCI: 00:1c.2: enabled 0

 1604 17:25:49.558203  PCI: 00:1c.3: enabled 0

 1605 17:25:49.561275  PCI: 00:1c.4: enabled 0

 1606 17:25:49.565124  PCI: 00:1c.5: enabled 0

 1607 17:25:49.568389  PCI: 00:1c.6: enabled 0

 1608 17:25:49.568563  PCI: 00:1c.7: enabled 0

 1609 17:25:49.571603  PCI: 00:1d.0: enabled 1

 1610 17:25:49.574899  PCI: 00:1d.1: enabled 0

 1611 17:25:49.578093  PCI: 00:1d.2: enabled 0

 1612 17:25:49.578259  PCI: 00:1d.3: enabled 0

 1613 17:25:49.581245  PCI: 00:1d.4: enabled 0

 1614 17:25:49.584623  PCI: 00:1d.5: enabled 0

 1615 17:25:49.587929  PCI: 00:1e.0: enabled 1

 1616 17:25:49.588109  PCI: 00:1e.1: enabled 0

 1617 17:25:49.591157  PCI: 00:1e.2: enabled 1

 1618 17:25:49.594330  PCI: 00:1e.3: enabled 1

 1619 17:25:49.594522  PCI: 00:1f.0: enabled 1

 1620 17:25:49.597907  PCI: 00:1f.1: enabled 0

 1621 17:25:49.601023  PCI: 00:1f.2: enabled 0

 1622 17:25:49.604316  PCI: 00:1f.3: enabled 1

 1623 17:25:49.604496  PCI: 00:1f.4: enabled 1

 1624 17:25:49.607508  PCI: 00:1f.5: enabled 1

 1625 17:25:49.611357  PCI: 00:1f.6: enabled 0

 1626 17:25:49.614527  USB0 port 0: enabled 1

 1627 17:25:49.614673  I2C: 01:15: enabled 1

 1628 17:25:49.617665  I2C: 02:5d: enabled 1

 1629 17:25:49.620832  GENERIC: 0.0: enabled 1

 1630 17:25:49.620997  I2C: 03:1a: enabled 1

 1631 17:25:49.624001  I2C: 03:38: enabled 1

 1632 17:25:49.627753  I2C: 03:39: enabled 1

 1633 17:25:49.627901  I2C: 03:3a: enabled 1

 1634 17:25:49.630843  I2C: 03:3b: enabled 1

 1635 17:25:49.633959  PCI: 00:00.0: enabled 1

 1636 17:25:49.634120  SPI: 00: enabled 1

 1637 17:25:49.637731  SPI: 01: enabled 1

 1638 17:25:49.640943  PNP: 0c09.0: enabled 1

 1639 17:25:49.641106  USB2 port 0: enabled 1

 1640 17:25:49.644075  USB2 port 1: enabled 1

 1641 17:25:49.647333  USB2 port 2: enabled 0

 1642 17:25:49.647471  USB2 port 3: enabled 0

 1643 17:25:49.651037  USB2 port 5: enabled 0

 1644 17:25:49.654332  USB2 port 6: enabled 1

 1645 17:25:49.657568  USB2 port 9: enabled 1

 1646 17:25:49.657708  USB3 port 0: enabled 1

 1647 17:25:49.660970  USB3 port 1: enabled 1

 1648 17:25:49.664407  USB3 port 2: enabled 1

 1649 17:25:49.664520  USB3 port 3: enabled 1

 1650 17:25:49.667497  USB3 port 4: enabled 0

 1651 17:25:49.670701  APIC: 01: enabled 1

 1652 17:25:49.670815  APIC: 02: enabled 1

 1653 17:25:49.673932  APIC: 03: enabled 1

 1654 17:25:49.677286  APIC: 04: enabled 1

 1655 17:25:49.677375  APIC: 05: enabled 1

 1656 17:25:49.680461  APIC: 06: enabled 1

 1657 17:25:49.680571  APIC: 07: enabled 1

 1658 17:25:49.683605  PCI: 00:08.0: enabled 1

 1659 17:25:49.686854  PCI: 00:14.2: enabled 1

 1660 17:25:49.690724  PCI: 01:00.0: enabled 1

 1661 17:25:49.694131  Disabling ACPI via APMC:

 1662 17:25:49.694298  done.

 1663 17:25:49.700475  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1664 17:25:49.703676  ELOG: NV offset 0xaf0000 size 0x4000

 1665 17:25:49.710687  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1666 17:25:49.717098  ELOG: Event(17) added with size 13 at 2023-06-09 17:25:34 UTC

 1667 17:25:49.723661  POST: Unexpected post code in previous boot: 0x73

 1668 17:25:49.730624  ELOG: Event(A3) added with size 11 at 2023-06-09 17:25:34 UTC

 1669 17:25:49.736776  ELOG: Event(A6) added with size 13 at 2023-06-09 17:25:34 UTC

 1670 17:25:49.743397  ELOG: Event(92) added with size 9 at 2023-06-09 17:25:34 UTC

 1671 17:25:49.750424  ELOG: Event(16) added with size 11 at 2023-06-09 17:25:34 UTC

 1672 17:25:49.753673  Erasing flash addr af0000 + 4 KiB

 1673 17:25:49.818831  ELOG: Event(93) added with size 9 at 2023-06-09 17:25:34 UTC

 1674 17:25:49.825395  ELOG: Event(9A) added with size 9 at 2023-06-09 17:25:34 UTC

 1675 17:25:49.832406  ELOG: Event(9E) added with size 10 at 2023-06-09 17:25:34 UTC

 1676 17:25:49.839043  ELOG: Event(9F) added with size 14 at 2023-06-09 17:25:34 UTC

 1677 17:25:49.845319  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 59

 1678 17:25:49.852032  ELOG: Event(A1) added with size 10 at 2023-06-09 17:25:34 UTC

 1679 17:25:49.858887  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1680 17:25:49.865060  ELOG: Event(A0) added with size 9 at 2023-06-09 17:25:34 UTC

 1681 17:25:49.868414  elog_add_boot_reason: Logged dev mode boot

 1682 17:25:49.871679  Finalize devices...

 1683 17:25:49.874883  PCI: 00:17.0 final

 1684 17:25:49.875033  Devices finalized

 1685 17:25:49.881595  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1686 17:25:49.884931  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1687 17:25:49.891911  ME: HFSTS1                  : 0x90000245

 1688 17:25:49.895222  ME: HFSTS2                  : 0x3B850126

 1689 17:25:49.898500  ME: HFSTS3                  : 0x00000020

 1690 17:25:49.901840  ME: HFSTS4                  : 0x00004800

 1691 17:25:49.905059  ME: HFSTS5                  : 0x00000000

 1692 17:25:49.911558  ME: HFSTS6                  : 0x40400006

 1693 17:25:49.914807  ME: Manufacturing Mode      : NO

 1694 17:25:49.918086  ME: FW Partition Table      : OK

 1695 17:25:49.921243  ME: Bringup Loader Failure  : NO

 1696 17:25:49.924369  ME: Firmware Init Complete  : YES

 1697 17:25:49.928135  ME: Boot Options Present    : NO

 1698 17:25:49.931395  ME: Update In Progress      : NO

 1699 17:25:49.934625  ME: D0i3 Support            : YES

 1700 17:25:49.937807  ME: Low Power State Enabled : NO

 1701 17:25:49.941386  ME: CPU Replaced            : NO

 1702 17:25:49.944390  ME: CPU Replacement Valid   : YES

 1703 17:25:49.948122  ME: Current Working State   : 5

 1704 17:25:49.951209  ME: Current Operation State : 1

 1705 17:25:49.954341  ME: Current Operation Mode  : 0

 1706 17:25:49.957469  ME: Error Code              : 0

 1707 17:25:49.961170  ME: CPU Debug Disabled      : YES

 1708 17:25:49.964391  ME: TXT Support             : NO

 1709 17:25:49.967658  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1710 17:25:49.974473  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1711 17:25:49.977685  CBFS @ c08000 size 3f8000

 1712 17:25:49.981019  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1713 17:25:49.987562  CBFS: Locating 'fallback/dsdt.aml'

 1714 17:25:49.990879  CBFS: Found @ offset 10bb80 size 3fa5

 1715 17:25:49.994095  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1716 17:25:49.997344  CBFS @ c08000 size 3f8000

 1717 17:25:50.003896  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1718 17:25:50.007168  CBFS: Locating 'fallback/slic'

 1719 17:25:50.010435  CBFS: 'fallback/slic' not found.

 1720 17:25:50.017517  ACPI: Writing ACPI tables at 99b3e000.

 1721 17:25:50.017697  ACPI:    * FACS

 1722 17:25:50.020797  ACPI:    * DSDT

 1723 17:25:50.024084  Ramoops buffer: 0x100000@0x99a3d000.

 1724 17:25:50.027179  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1725 17:25:50.033525  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1726 17:25:50.036757  Google Chrome EC: version:

 1727 17:25:50.040140  	ro: helios_v2.0.2659-56403530b

 1728 17:25:50.043389  	rw: helios_v2.0.2849-c41de27e7d

 1729 17:25:50.043575    running image: 1

 1730 17:25:50.048233  ACPI:    * FADT

 1731 17:25:50.048391  SCI is IRQ9

 1732 17:25:50.054643  ACPI: added table 1/32, length now 40

 1733 17:25:50.054813  ACPI:     * SSDT

 1734 17:25:50.057625  Found 1 CPU(s) with 8 core(s) each.

 1735 17:25:50.061314  Error: Could not locate 'wifi_sar' in VPD.

 1736 17:25:50.067482  Checking CBFS for default SAR values

 1737 17:25:50.070749  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1738 17:25:50.074706  CBFS @ c08000 size 3f8000

 1739 17:25:50.080848  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1740 17:25:50.084495  CBFS: Locating 'wifi_sar_defaults.hex'

 1741 17:25:50.087811  CBFS: Found @ offset 5fac0 size 77

 1742 17:25:50.091091  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1743 17:25:50.094460  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1744 17:25:50.101331  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1745 17:25:50.107891  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1746 17:25:50.111113  failed to find key in VPD: dsm_calib_r0_0

 1747 17:25:50.120983  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1748 17:25:50.124191  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1749 17:25:50.127460  failed to find key in VPD: dsm_calib_r0_1

 1750 17:25:50.137588  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1751 17:25:50.144192  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1752 17:25:50.147391  failed to find key in VPD: dsm_calib_r0_2

 1753 17:25:50.157048  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1754 17:25:50.160138  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1755 17:25:50.166757  failed to find key in VPD: dsm_calib_r0_3

 1756 17:25:50.173579  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1757 17:25:50.180537  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1758 17:25:50.183821  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1759 17:25:50.186851  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1760 17:25:50.190564  EC returned error result code 1

 1761 17:25:50.194256  EC returned error result code 1

 1762 17:25:50.198179  EC returned error result code 1

 1763 17:25:50.205187  PS2K: Bad resp from EC. Vivaldi disabled!

 1764 17:25:50.208527  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1765 17:25:50.214980  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1766 17:25:50.221523  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1767 17:25:50.224652  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1768 17:25:50.231192  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1769 17:25:50.237793  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1770 17:25:50.244681  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1771 17:25:50.247979  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1772 17:25:50.254487  ACPI: added table 2/32, length now 44

 1773 17:25:50.254698  ACPI:    * MCFG

 1774 17:25:50.257631  ACPI: added table 3/32, length now 48

 1775 17:25:50.260991  ACPI:    * TPM2

 1776 17:25:50.264697  TPM2 log created at 99a2d000

 1777 17:25:50.267943  ACPI: added table 4/32, length now 52

 1778 17:25:50.268072  ACPI:    * MADT

 1779 17:25:50.271022  SCI is IRQ9

 1780 17:25:50.274609  ACPI: added table 5/32, length now 56

 1781 17:25:50.274711  current = 99b43ac0

 1782 17:25:50.277697  ACPI:    * DMAR

 1783 17:25:50.280795  ACPI: added table 6/32, length now 60

 1784 17:25:50.284602  ACPI:    * IGD OpRegion

 1785 17:25:50.284731  GMA: Found VBT in CBFS

 1786 17:25:50.287647  GMA: Found valid VBT in CBFS

 1787 17:25:50.290764  ACPI: added table 7/32, length now 64

 1788 17:25:50.294201  ACPI:    * HPET

 1789 17:25:50.297722  ACPI: added table 8/32, length now 68

 1790 17:25:50.297862  ACPI: done.

 1791 17:25:50.300911  ACPI tables: 31744 bytes.

 1792 17:25:50.304789  smbios_write_tables: 99a2c000

 1793 17:25:50.307934  EC returned error result code 3

 1794 17:25:50.311202  Couldn't obtain OEM name from CBI

 1795 17:25:50.314548  Create SMBIOS type 17

 1796 17:25:50.317910  PCI: 00:00.0 (Intel Cannonlake)

 1797 17:25:50.321282  PCI: 00:14.3 (Intel WiFi)

 1798 17:25:50.324464  SMBIOS tables: 939 bytes.

 1799 17:25:50.327857  Writing table forward entry at 0x00000500

 1800 17:25:50.334374  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1801 17:25:50.337678  Writing coreboot table at 0x99b62000

 1802 17:25:50.344120   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1803 17:25:50.347280   1. 0000000000001000-000000000009ffff: RAM

 1804 17:25:50.351045   2. 00000000000a0000-00000000000fffff: RESERVED

 1805 17:25:50.357543   3. 0000000000100000-0000000099a2bfff: RAM

 1806 17:25:50.364013   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1807 17:25:50.367386   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1808 17:25:50.373776   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1809 17:25:50.376994   7. 000000009a000000-000000009f7fffff: RESERVED

 1810 17:25:50.383817   8. 00000000e0000000-00000000efffffff: RESERVED

 1811 17:25:50.387425   9. 00000000fc000000-00000000fc000fff: RESERVED

 1812 17:25:50.393871  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1813 17:25:50.396886  11. 00000000fed10000-00000000fed17fff: RESERVED

 1814 17:25:50.400219  12. 00000000fed80000-00000000fed83fff: RESERVED

 1815 17:25:50.406951  13. 00000000fed90000-00000000fed91fff: RESERVED

 1816 17:25:50.410186  14. 00000000feda0000-00000000feda1fff: RESERVED

 1817 17:25:50.416546  15. 0000000100000000-000000045e7fffff: RAM

 1818 17:25:50.420485  Graphics framebuffer located at 0xc0000000

 1819 17:25:50.423680  Passing 5 GPIOs to payload:

 1820 17:25:50.426938              NAME |       PORT | POLARITY |     VALUE

 1821 17:25:50.433452     write protect |  undefined |     high |       low

 1822 17:25:50.440268               lid |  undefined |     high |      high

 1823 17:25:50.443538             power |  undefined |     high |       low

 1824 17:25:50.450053             oprom |  undefined |     high |       low

 1825 17:25:50.453169          EC in RW | 0x000000cb |     high |       low

 1826 17:25:50.456970  Board ID: 4

 1827 17:25:50.460138  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1828 17:25:50.463498  CBFS @ c08000 size 3f8000

 1829 17:25:50.469918  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1830 17:25:50.476209  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87

 1831 17:25:50.476338  coreboot table: 1492 bytes.

 1832 17:25:50.480107  IMD ROOT    0. 99fff000 00001000

 1833 17:25:50.483278  IMD SMALL   1. 99ffe000 00001000

 1834 17:25:50.486421  FSP MEMORY  2. 99c4e000 003b0000

 1835 17:25:50.490061  CONSOLE     3. 99c2e000 00020000

 1836 17:25:50.493159  FMAP        4. 99c2d000 0000054e

 1837 17:25:50.496305  TIME STAMP  5. 99c2c000 00000910

 1838 17:25:50.500024  VBOOT WORK  6. 99c18000 00014000

 1839 17:25:50.503224  MRC DATA    7. 99c16000 00001958

 1840 17:25:50.506545  ROMSTG STCK 8. 99c15000 00001000

 1841 17:25:50.509852  AFTER CAR   9. 99c0b000 0000a000

 1842 17:25:50.513021  RAMSTAGE   10. 99baf000 0005c000

 1843 17:25:50.516636  REFCODE    11. 99b7a000 00035000

 1844 17:25:50.519819  SMM BACKUP 12. 99b6a000 00010000

 1845 17:25:50.522976  COREBOOT   13. 99b62000 00008000

 1846 17:25:50.526250  ACPI       14. 99b3e000 00024000

 1847 17:25:50.529585  ACPI GNVS  15. 99b3d000 00001000

 1848 17:25:50.532992  RAMOOPS    16. 99a3d000 00100000

 1849 17:25:50.536227  TPM2 TCGLOG17. 99a2d000 00010000

 1850 17:25:50.539535  SMBIOS     18. 99a2c000 00000800

 1851 17:25:50.542891  IMD small region:

 1852 17:25:50.546123    IMD ROOT    0. 99ffec00 00000400

 1853 17:25:50.549438    FSP RUNTIME 1. 99ffebe0 00000004

 1854 17:25:50.552724    EC HOSTEVENT 2. 99ffebc0 00000008

 1855 17:25:50.555889    POWER STATE 3. 99ffeb80 00000040

 1856 17:25:50.559682    ROMSTAGE    4. 99ffeb60 00000004

 1857 17:25:50.562782    MEM INFO    5. 99ffe9a0 000001b9

 1858 17:25:50.566029    VPD         6. 99ffe920 0000006c

 1859 17:25:50.569157  MTRR: Physical address space:

 1860 17:25:50.575770  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1861 17:25:50.582815  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1862 17:25:50.589253  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1863 17:25:50.596015  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1864 17:25:50.602172  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1865 17:25:50.609260  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1866 17:25:50.615672  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1867 17:25:50.618663  MTRR: Fixed MSR 0x250 0x0606060606060606

 1868 17:25:50.622361  MTRR: Fixed MSR 0x258 0x0606060606060606

 1869 17:25:50.625492  MTRR: Fixed MSR 0x259 0x0000000000000000

 1870 17:25:50.631863  MTRR: Fixed MSR 0x268 0x0606060606060606

 1871 17:25:50.635119  MTRR: Fixed MSR 0x269 0x0606060606060606

 1872 17:25:50.638959  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1873 17:25:50.642211  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1874 17:25:50.648860  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1875 17:25:50.652154  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1876 17:25:50.655398  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1877 17:25:50.658072  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1878 17:25:50.661937  call enable_fixed_mtrr()

 1879 17:25:50.665110  CPU physical address size: 39 bits

 1880 17:25:50.672002  MTRR: default type WB/UC MTRR counts: 6/8.

 1881 17:25:50.675137  MTRR: WB selected as default type.

 1882 17:25:50.681655  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1883 17:25:50.684848  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1884 17:25:50.691445  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1885 17:25:50.698457  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1886 17:25:50.704688  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1887 17:25:50.711569  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1888 17:25:50.714647  MTRR: Fixed MSR 0x250 0x0606060606060606

 1889 17:25:50.721785  MTRR: Fixed MSR 0x258 0x0606060606060606

 1890 17:25:50.724763  MTRR: Fixed MSR 0x259 0x0000000000000000

 1891 17:25:50.727931  MTRR: Fixed MSR 0x268 0x0606060606060606

 1892 17:25:50.731436  MTRR: Fixed MSR 0x269 0x0606060606060606

 1893 17:25:50.737912  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1894 17:25:50.741092  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1895 17:25:50.744298  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1896 17:25:50.747648  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1897 17:25:50.754342  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1898 17:25:50.757566  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1899 17:25:50.757705  

 1900 17:25:50.757808  MTRR check

 1901 17:25:50.761526  Fixed MTRRs   : Enabled

 1902 17:25:50.764820  Variable MTRRs: Enabled

 1903 17:25:50.764962  

 1904 17:25:50.768117  call enable_fixed_mtrr()

 1905 17:25:50.771257  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1906 17:25:50.774233  CPU physical address size: 39 bits

 1907 17:25:50.781260  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1908 17:25:50.784597  MTRR: Fixed MSR 0x250 0x0606060606060606

 1909 17:25:50.787805  MTRR: Fixed MSR 0x250 0x0606060606060606

 1910 17:25:50.794942  MTRR: Fixed MSR 0x258 0x0606060606060606

 1911 17:25:50.798203  MTRR: Fixed MSR 0x259 0x0000000000000000

 1912 17:25:50.801488  MTRR: Fixed MSR 0x268 0x0606060606060606

 1913 17:25:50.804653  MTRR: Fixed MSR 0x269 0x0606060606060606

 1914 17:25:50.811065  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1915 17:25:50.814700  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1916 17:25:50.817838  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1917 17:25:50.821204  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1918 17:25:50.824325  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1919 17:25:50.831226  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1920 17:25:50.834281  MTRR: Fixed MSR 0x258 0x0606060606060606

 1921 17:25:50.837817  MTRR: Fixed MSR 0x259 0x0000000000000000

 1922 17:25:50.843983  MTRR: Fixed MSR 0x268 0x0606060606060606

 1923 17:25:50.847300  MTRR: Fixed MSR 0x269 0x0606060606060606

 1924 17:25:50.851132  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1925 17:25:50.854438  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1926 17:25:50.857702  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1927 17:25:50.864318  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1928 17:25:50.867572  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1929 17:25:50.870900  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1930 17:25:50.874232  call enable_fixed_mtrr()

 1931 17:25:50.877510  call enable_fixed_mtrr()

 1932 17:25:50.880481  MTRR: Fixed MSR 0x250 0x0606060606060606

 1933 17:25:50.884149  MTRR: Fixed MSR 0x250 0x0606060606060606

 1934 17:25:50.890324  MTRR: Fixed MSR 0x258 0x0606060606060606

 1935 17:25:50.893416  MTRR: Fixed MSR 0x259 0x0000000000000000

 1936 17:25:50.896876  MTRR: Fixed MSR 0x268 0x0606060606060606

 1937 17:25:50.900129  MTRR: Fixed MSR 0x269 0x0606060606060606

 1938 17:25:50.906771  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1939 17:25:50.910549  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1940 17:25:50.913601  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1941 17:25:50.916818  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1942 17:25:50.919941  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1943 17:25:50.926804  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1944 17:25:50.929949  MTRR: Fixed MSR 0x258 0x0606060606060606

 1945 17:25:50.933760  MTRR: Fixed MSR 0x259 0x0000000000000000

 1946 17:25:50.937096  MTRR: Fixed MSR 0x268 0x0606060606060606

 1947 17:25:50.943415  MTRR: Fixed MSR 0x269 0x0606060606060606

 1948 17:25:50.946386  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1949 17:25:50.950262  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1950 17:25:50.953442  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1951 17:25:50.960036  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1952 17:25:50.963326  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1953 17:25:50.966557  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1954 17:25:50.969849  call enable_fixed_mtrr()

 1955 17:25:50.973144  call enable_fixed_mtrr()

 1956 17:25:50.976387  CPU physical address size: 39 bits

 1957 17:25:50.979828  CPU physical address size: 39 bits

 1958 17:25:50.983048  MTRR: Fixed MSR 0x250 0x0606060606060606

 1959 17:25:50.986213  MTRR: Fixed MSR 0x258 0x0606060606060606

 1960 17:25:50.992742  MTRR: Fixed MSR 0x259 0x0000000000000000

 1961 17:25:50.996473  MTRR: Fixed MSR 0x268 0x0606060606060606

 1962 17:25:50.999641  MTRR: Fixed MSR 0x269 0x0606060606060606

 1963 17:25:51.002944  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1964 17:25:51.009625  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1965 17:25:51.012750  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1966 17:25:51.015955  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1967 17:25:51.019620  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1968 17:25:51.025874  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1969 17:25:51.029664  MTRR: Fixed MSR 0x250 0x0606060606060606

 1970 17:25:51.032720  call enable_fixed_mtrr()

 1971 17:25:51.035934  MTRR: Fixed MSR 0x258 0x0606060606060606

 1972 17:25:51.039248  MTRR: Fixed MSR 0x259 0x0000000000000000

 1973 17:25:51.042845  MTRR: Fixed MSR 0x268 0x0606060606060606

 1974 17:25:51.049258  MTRR: Fixed MSR 0x269 0x0606060606060606

 1975 17:25:51.052767  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1976 17:25:51.056012  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1977 17:25:51.059228  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1978 17:25:51.065893  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1979 17:25:51.069244  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1980 17:25:51.072493  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1981 17:25:51.075683  CPU physical address size: 39 bits

 1982 17:25:51.079088  call enable_fixed_mtrr()

 1983 17:25:51.082347  CPU physical address size: 39 bits

 1984 17:25:51.085594  CPU physical address size: 39 bits

 1985 17:25:51.088887  CPU physical address size: 39 bits

 1986 17:25:51.092041  CBFS @ c08000 size 3f8000

 1987 17:25:51.099013  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1988 17:25:51.102093  CBFS: Locating 'fallback/payload'

 1989 17:25:51.105590  CBFS: Found @ offset 1c96c0 size 3f798

 1990 17:25:51.112082  Checking segment from ROM address 0xffdd16f8

 1991 17:25:51.115262  Checking segment from ROM address 0xffdd1714

 1992 17:25:51.118615  Loading segment from ROM address 0xffdd16f8

 1993 17:25:51.121907    code (compression=0)

 1994 17:25:51.131830    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1995 17:25:51.138659  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1996 17:25:51.141830  it's not compressed!

 1997 17:25:51.233589  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1998 17:25:51.240837  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1999 17:25:51.243834  Loading segment from ROM address 0xffdd1714

 2000 17:25:51.246902    Entry Point 0x30000000

 2001 17:25:51.250012  Loaded segments

 2002 17:25:51.255637  Finalizing chipset.

 2003 17:25:51.258774  Finalizing SMM.

 2004 17:25:51.262415  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5

 2005 17:25:51.265450  mp_park_aps done after 0 msecs.

 2006 17:25:51.272474  Jumping to boot code at 30000000(99b62000)

 2007 17:25:51.279238  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2008 17:25:51.279388  

 2009 17:25:51.279461  

 2010 17:25:51.279524  

 2011 17:25:51.282438  Starting depthcharge on Helios...

 2012 17:25:51.282537  

 2013 17:25:51.282901  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2014 17:25:51.283005  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2015 17:25:51.283095  Setting prompt string to ['hatch:']
 2016 17:25:51.283185  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2017 17:25:51.292257  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2018 17:25:51.292400  

 2019 17:25:51.298804  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2020 17:25:51.298956  

 2021 17:25:51.305283  board_setup: Info: eMMC controller not present; skipping

 2022 17:25:51.305414  

 2023 17:25:51.308486  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2024 17:25:51.308586  

 2025 17:25:51.315352  board_setup: Info: SDHCI controller not present; skipping

 2026 17:25:51.315480  

 2027 17:25:51.322343  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2028 17:25:51.322512  

 2029 17:25:51.322622  Wipe memory regions:

 2030 17:25:51.322722  

 2031 17:25:51.325191  	[0x00000000001000, 0x000000000a0000)

 2032 17:25:51.325305  

 2033 17:25:51.328934  	[0x00000000100000, 0x00000030000000)

 2034 17:25:51.395036  

 2035 17:25:51.397591  	[0x00000030657430, 0x00000099a2c000)

 2036 17:25:51.535146  

 2037 17:25:51.538311  	[0x00000100000000, 0x0000045e800000)

 2038 17:25:52.920968  

 2039 17:25:52.921119  R8152: Initializing

 2040 17:25:52.921193  

 2041 17:25:52.924167  Version 9 (ocp_data = 6010)

 2042 17:25:52.928134  

 2043 17:25:52.928227  R8152: Done initializing

 2044 17:25:52.928294  

 2045 17:25:52.931400  Adding net device

 2046 17:25:53.414335  

 2047 17:25:53.414469  R8152: Initializing

 2048 17:25:53.414538  

 2049 17:25:53.417717  Version 6 (ocp_data = 5c30)

 2050 17:25:53.417803  

 2051 17:25:53.421035  R8152: Done initializing

 2052 17:25:53.421120  

 2053 17:25:53.424176  net_add_device: Attemp to include the same device

 2054 17:25:53.428158  

 2055 17:25:53.434565  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2056 17:25:53.434659  

 2057 17:25:53.434725  

 2058 17:25:53.434786  

 2059 17:25:53.435065  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2061 17:25:53.535414  hatch: tftpboot 192.168.201.1 10664092/tftp-deploy-rbxdxtkb/kernel/bzImage 10664092/tftp-deploy-rbxdxtkb/kernel/cmdline 10664092/tftp-deploy-rbxdxtkb/ramdisk/ramdisk.cpio.gz

 2062 17:25:53.535578  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2063 17:25:53.535663  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2064 17:25:53.539566  tftpboot 192.168.201.1 10664092/tftp-deploy-rbxdxtkb/kernel/bzIploy-rbxdxtkb/kernel/cmdline 10664092/tftp-deploy-rbxdxtkb/ramdisk/ramdisk.cpio.gz

 2065 17:25:53.539667  

 2066 17:25:53.539733  Waiting for link

 2067 17:25:53.740576  

 2068 17:25:53.740762  done.

 2069 17:25:53.740872  

 2070 17:25:53.740953  MAC: 00:24:32:50:19:be

 2071 17:25:53.741029  

 2072 17:25:53.743984  Sending DHCP discover... done.

 2073 17:25:53.744099  

 2074 17:25:53.747313  Waiting for reply... done.

 2075 17:25:53.747411  

 2076 17:25:53.750558  Sending DHCP request... done.

 2077 17:25:53.750645  

 2078 17:25:53.760073  Waiting for reply... done.

 2079 17:25:53.760187  

 2080 17:25:53.760257  My ip is 192.168.201.15

 2081 17:25:53.760357  

 2082 17:25:53.763173  The DHCP server ip is 192.168.201.1

 2083 17:25:53.766164  

 2084 17:25:53.769994  TFTP server IP predefined by user: 192.168.201.1

 2085 17:25:53.770109  

 2086 17:25:53.776636  Bootfile predefined by user: 10664092/tftp-deploy-rbxdxtkb/kernel/bzImage

 2087 17:25:53.776734  

 2088 17:25:53.779856  Sending tftp read request... done.

 2089 17:25:53.779970  

 2090 17:25:53.783098  Waiting for the transfer... 

 2091 17:25:53.783185  

 2092 17:25:54.307121  00000000 ################################################################

 2093 17:25:54.307269  

 2094 17:25:54.840973  00080000 ################################################################

 2095 17:25:54.841128  

 2096 17:25:55.370665  00100000 ################################################################

 2097 17:25:55.370844  

 2098 17:25:55.903862  00180000 ################################################################

 2099 17:25:55.904028  

 2100 17:25:56.446672  00200000 ################################################################

 2101 17:25:56.446820  

 2102 17:25:56.964698  00280000 ################################################################

 2103 17:25:56.964924  

 2104 17:25:57.489234  00300000 ################################################################

 2105 17:25:57.489383  

 2106 17:25:58.018798  00380000 ################################################################

 2107 17:25:58.018936  

 2108 17:25:58.567576  00400000 ################################################################

 2109 17:25:58.567794  

 2110 17:25:59.128298  00480000 ################################################################

 2111 17:25:59.128518  

 2112 17:25:59.728458  00500000 ################################################################

 2113 17:25:59.728696  

 2114 17:26:00.257977  00580000 ################################################################

 2115 17:26:00.258231  

 2116 17:26:00.846430  00600000 ################################################################

 2117 17:26:00.846701  

 2118 17:26:01.516981  00680000 ################################################################

 2119 17:26:01.517126  

 2120 17:26:02.189541  00700000 ################################################################

 2121 17:26:02.189710  

 2122 17:26:02.865934  00780000 ################################################################

 2123 17:26:02.866080  

 2124 17:26:03.525078  00800000 ################################################################

 2125 17:26:03.525233  

 2126 17:26:04.128922  00880000 ################################################################

 2127 17:26:04.129065  

 2128 17:26:04.673634  00900000 ################################################################

 2129 17:26:04.673804  

 2130 17:26:05.219154  00980000 ################################################################

 2131 17:26:05.219302  

 2132 17:26:05.605851  00a00000 ############################################### done.

 2133 17:26:05.605989  

 2134 17:26:05.608648  The bootfile was 10866688 bytes long.

 2135 17:26:05.608765  

 2136 17:26:05.611958  Sending tftp read request... done.

 2137 17:26:05.612058  

 2138 17:26:05.615332  Waiting for the transfer... 

 2139 17:26:05.615451  

 2140 17:26:06.175133  00000000 ################################################################

 2141 17:26:06.175585  

 2142 17:26:06.762396  00080000 ################################################################

 2143 17:26:06.762564  

 2144 17:26:07.373309  00100000 ################################################################

 2145 17:26:07.373772  

 2146 17:26:07.933913  00180000 ################################################################

 2147 17:26:07.934085  

 2148 17:26:08.471488  00200000 ################################################################

 2149 17:26:08.471633  

 2150 17:26:08.988698  00280000 ################################################################

 2151 17:26:08.988894  

 2152 17:26:09.519048  00300000 ################################################################

 2153 17:26:09.519224  

 2154 17:26:10.082710  00380000 ################################################################

 2155 17:26:10.082916  

 2156 17:26:10.619890  00400000 ################################################################

 2157 17:26:10.620132  

 2158 17:26:11.162350  00480000 ################################################################

 2159 17:26:11.162511  

 2160 17:26:11.687238  00500000 ################################################################

 2161 17:26:11.687429  

 2162 17:26:12.208303  00580000 ################################################################

 2163 17:26:12.208489  

 2164 17:26:12.313476  00600000 ############# done.

 2165 17:26:12.313664  

 2166 17:26:12.316631  Sending tftp read request... done.

 2167 17:26:12.316774  

 2168 17:26:12.319955  Waiting for the transfer... 

 2169 17:26:12.320095  

 2170 17:26:12.320201  00000000 # done.

 2171 17:26:12.320283  

 2172 17:26:12.329963  Command line loaded dynamically from TFTP file: 10664092/tftp-deploy-rbxdxtkb/kernel/cmdline

 2173 17:26:12.330123  

 2174 17:26:12.356265  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10664092/extract-nfsrootfs-6m2t9xoi,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2175 17:26:12.356454  

 2176 17:26:12.363074  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2177 17:26:12.366993  

 2178 17:26:12.370315  Shutting down all USB controllers.

 2179 17:26:12.370467  

 2180 17:26:12.370567  Removing current net device

 2181 17:26:12.374246  

 2182 17:26:12.374382  Finalizing coreboot

 2183 17:26:12.374487  

 2184 17:26:12.380942  Exiting depthcharge with code 4 at timestamp: 28532306

 2185 17:26:12.381113  

 2186 17:26:12.381217  

 2187 17:26:12.381317  Starting kernel ...

 2188 17:26:12.381409  

 2189 17:26:12.381504  

 2190 17:26:12.382144  end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
 2191 17:26:12.382278  start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
 2192 17:26:12.382392  Setting prompt string to ['Linux version [0-9]']
 2193 17:26:12.382495  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2194 17:26:12.382599  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2196 17:30:33.383225  end: 2.2.5 auto-login-action (duration 00:04:21) [common]
 2198 17:30:33.384224  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
 2200 17:30:33.385133  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2203 17:30:33.386530  end: 2 depthcharge-action (duration 00:05:00) [common]
 2205 17:30:33.387619  Cleaning after the job
 2206 17:30:33.388056  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/ramdisk
 2207 17:30:33.391869  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/kernel
 2208 17:30:33.397476  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/nfsrootfs
 2209 17:30:33.506774  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664092/tftp-deploy-rbxdxtkb/modules
 2210 17:30:33.507436  start: 4.1 power-off (timeout 00:00:30) [common]
 2211 17:30:33.507613  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2212 17:30:33.585276  >> Command sent successfully.

 2213 17:30:33.590155  Returned 0 in 0 seconds
 2214 17:30:33.691032  end: 4.1 power-off (duration 00:00:00) [common]
 2216 17:30:33.692464  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2217 17:30:33.693704  Listened to connection for namespace 'common' for up to 1s
 2219 17:30:33.694947  Listened to connection for namespace 'common' for up to 1s
 2220 17:30:34.694411  Finalising connection for namespace 'common'
 2221 17:30:34.695063  Disconnecting from shell: Finalise
 2222 17:30:34.695449  
 2223 17:30:34.796578  end: 4.2 read-feedback (duration 00:00:01) [common]
 2224 17:30:34.797247  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10664092
 2225 17:30:35.199562  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10664092
 2226 17:30:35.199755  JobError: Your job cannot terminate cleanly.