Boot log: asus-cx9400-volteer

    1 17:15:04.257906  lava-dispatcher, installed at version: 2023.05.1
    2 17:15:04.258138  start: 0 validate
    3 17:15:04.258274  Start time: 2023-06-09 17:15:04.258266+00:00 (UTC)
    4 17:15:04.258412  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:15:04.258549  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
    6 17:15:04.518707  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:15:04.518950  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.283-cip98-1248-gcaf6e8ee921e9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:15:04.778562  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:15:04.778798  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 17:15:07.536117  Using caching service: 'http://localhost/cache/?uri=%s'
   11 17:15:07.536365  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.283-cip98-1248-gcaf6e8ee921e9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 17:15:07.806964  validate duration: 3.55
   14 17:15:07.807360  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 17:15:07.807497  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 17:15:07.807630  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 17:15:07.807795  Not decompressing ramdisk as can be used compressed.
   18 17:15:07.807919  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/initrd.cpio.gz
   19 17:15:07.808019  saving as /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/ramdisk/initrd.cpio.gz
   20 17:15:07.808114  total size: 5671546 (5MB)
   21 17:15:08.471251  progress   0% (0MB)
   22 17:15:08.473205  progress   5% (0MB)
   23 17:15:08.475110  progress  10% (0MB)
   24 17:15:08.476743  progress  15% (0MB)
   25 17:15:08.478471  progress  20% (1MB)
   26 17:15:08.480195  progress  25% (1MB)
   27 17:15:08.481818  progress  30% (1MB)
   28 17:15:08.483642  progress  35% (1MB)
   29 17:15:08.485337  progress  40% (2MB)
   30 17:15:08.486848  progress  45% (2MB)
   31 17:15:08.488568  progress  50% (2MB)
   32 17:15:08.490311  progress  55% (3MB)
   33 17:15:08.491834  progress  60% (3MB)
   34 17:15:08.493542  progress  65% (3MB)
   35 17:15:08.495253  progress  70% (3MB)
   36 17:15:08.496773  progress  75% (4MB)
   37 17:15:08.498482  progress  80% (4MB)
   38 17:15:08.500188  progress  85% (4MB)
   39 17:15:08.501728  progress  90% (4MB)
   40 17:15:08.503448  progress  95% (5MB)
   41 17:15:08.505107  progress 100% (5MB)
   42 17:15:08.505284  5MB downloaded in 0.70s (7.76MB/s)
   43 17:15:08.505516  end: 1.1.1 http-download (duration 00:00:01) [common]
   45 17:15:08.505906  end: 1.1 download-retry (duration 00:00:01) [common]
   46 17:15:08.506030  start: 1.2 download-retry (timeout 00:09:59) [common]
   47 17:15:08.506148  start: 1.2.1 http-download (timeout 00:09:59) [common]
   48 17:15:08.506307  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.283-cip98-1248-gcaf6e8ee921e9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 17:15:08.506399  saving as /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/kernel/bzImage
   50 17:15:08.506467  total size: 10866688 (10MB)
   51 17:15:08.506532  No compression specified
   52 17:15:08.508117  progress   0% (0MB)
   53 17:15:08.511397  progress   5% (0MB)
   54 17:15:08.514663  progress  10% (1MB)
   55 17:15:08.517788  progress  15% (1MB)
   56 17:15:08.521113  progress  20% (2MB)
   57 17:15:08.524313  progress  25% (2MB)
   58 17:15:08.527678  progress  30% (3MB)
   59 17:15:08.531112  progress  35% (3MB)
   60 17:15:08.534101  progress  40% (4MB)
   61 17:15:08.537240  progress  45% (4MB)
   62 17:15:08.540188  progress  50% (5MB)
   63 17:15:08.543305  progress  55% (5MB)
   64 17:15:08.546274  progress  60% (6MB)
   65 17:15:08.549382  progress  65% (6MB)
   66 17:15:08.552490  progress  70% (7MB)
   67 17:15:08.555449  progress  75% (7MB)
   68 17:15:08.558527  progress  80% (8MB)
   69 17:15:08.561463  progress  85% (8MB)
   70 17:15:08.564540  progress  90% (9MB)
   71 17:15:08.567657  progress  95% (9MB)
   72 17:15:08.570589  progress 100% (10MB)
   73 17:15:08.570791  10MB downloaded in 0.06s (161.12MB/s)
   74 17:15:08.570989  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 17:15:08.571394  end: 1.2 download-retry (duration 00:00:00) [common]
   77 17:15:08.571487  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 17:15:08.571582  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 17:15:08.571723  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/full.rootfs.tar.xz
   80 17:15:08.571797  saving as /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/nfsrootfs/full.rootfs.tar
   81 17:15:08.571871  total size: 125914312 (120MB)
   82 17:15:08.571941  Using unxz to decompress xz
   83 17:15:08.575927  progress   0% (0MB)
   84 17:15:09.070261  progress   5% (6MB)
   85 17:15:09.578907  progress  10% (12MB)
   86 17:15:10.096074  progress  15% (18MB)
   87 17:15:10.613649  progress  20% (24MB)
   88 17:15:10.971319  progress  25% (30MB)
   89 17:15:11.321316  progress  30% (36MB)
   90 17:15:11.596884  progress  35% (42MB)
   91 17:15:11.799740  progress  40% (48MB)
   92 17:15:12.180444  progress  45% (54MB)
   93 17:15:12.562766  progress  50% (60MB)
   94 17:15:12.920183  progress  55% (66MB)
   95 17:15:13.290008  progress  60% (72MB)
   96 17:15:13.641571  progress  65% (78MB)
   97 17:15:14.066488  progress  70% (84MB)
   98 17:15:14.508356  progress  75% (90MB)
   99 17:15:14.949567  progress  80% (96MB)
  100 17:15:15.041837  progress  85% (102MB)
  101 17:15:15.206990  progress  90% (108MB)
  102 17:15:15.552169  progress  95% (114MB)
  103 17:15:15.936952  progress 100% (120MB)
  104 17:15:15.942755  120MB downloaded in 7.37s (16.29MB/s)
  105 17:15:15.943059  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 17:15:15.943324  end: 1.3 download-retry (duration 00:00:07) [common]
  108 17:15:15.943434  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 17:15:15.943526  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 17:15:15.943679  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.283-cip98-1248-gcaf6e8ee921e9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 17:15:15.943754  saving as /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/modules/modules.tar
  112 17:15:15.943818  total size: 485236 (0MB)
  113 17:15:15.943882  Using unxz to decompress xz
  114 17:15:15.947201  progress   6% (0MB)
  115 17:15:15.947609  progress  13% (0MB)
  116 17:15:15.947850  progress  20% (0MB)
  117 17:15:15.949273  progress  27% (0MB)
  118 17:15:15.951509  progress  33% (0MB)
  119 17:15:15.953803  progress  40% (0MB)
  120 17:15:15.956445  progress  47% (0MB)
  121 17:15:15.958757  progress  54% (0MB)
  122 17:15:15.960567  progress  60% (0MB)
  123 17:15:15.962692  progress  67% (0MB)
  124 17:15:15.964942  progress  74% (0MB)
  125 17:15:15.967198  progress  81% (0MB)
  126 17:15:15.969134  progress  87% (0MB)
  127 17:15:15.971224  progress  94% (0MB)
  128 17:15:15.973164  progress 100% (0MB)
  129 17:15:15.979652  0MB downloaded in 0.04s (12.92MB/s)
  130 17:15:15.979932  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 17:15:15.980201  end: 1.4 download-retry (duration 00:00:00) [common]
  133 17:15:15.980301  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  134 17:15:15.980399  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  135 17:15:18.707190  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10664050/extract-nfsrootfs-8y6_5ta2
  136 17:15:18.707726  end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
  137 17:15:18.707835  start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
  138 17:15:18.708000  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g
  139 17:15:18.708122  makedir: /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin
  140 17:15:18.708259  makedir: /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/tests
  141 17:15:18.708354  makedir: /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/results
  142 17:15:18.708454  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-add-keys
  143 17:15:18.708592  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-add-sources
  144 17:15:18.708715  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-background-process-start
  145 17:15:18.708867  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-background-process-stop
  146 17:15:18.708987  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-common-functions
  147 17:15:18.709137  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-echo-ipv4
  148 17:15:18.709257  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-install-packages
  149 17:15:18.709376  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-installed-packages
  150 17:15:18.709523  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-os-build
  151 17:15:18.709671  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-probe-channel
  152 17:15:18.709835  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-probe-ip
  153 17:15:18.709984  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-target-ip
  154 17:15:18.710104  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-target-mac
  155 17:15:18.710224  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-target-storage
  156 17:15:18.710347  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-test-case
  157 17:15:18.710521  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-test-event
  158 17:15:18.710654  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-test-feedback
  159 17:15:18.710787  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-test-raise
  160 17:15:18.710918  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-test-reference
  161 17:15:18.711038  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-test-runner
  162 17:15:18.711156  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-test-set
  163 17:15:18.711275  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-test-shell
  164 17:15:18.711419  Updating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-install-packages (oe)
  165 17:15:18.711610  Updating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/bin/lava-installed-packages (oe)
  166 17:15:18.711774  Creating /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/environment
  167 17:15:18.711895  LAVA metadata
  168 17:15:18.711978  - LAVA_JOB_ID=10664050
  169 17:15:18.712040  - LAVA_DISPATCHER_IP=192.168.201.1
  170 17:15:18.712177  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
  171 17:15:18.712271  skipped lava-vland-overlay
  172 17:15:18.712345  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 17:15:18.712423  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
  174 17:15:18.712535  skipped lava-multinode-overlay
  175 17:15:18.712636  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 17:15:18.712715  start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
  177 17:15:18.712817  Loading test definitions
  178 17:15:18.712909  start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
  179 17:15:18.712981  Using /lava-10664050 at stage 0
  180 17:15:18.713076  Fetching tests from https://github.com/kernelci/test-definitions
  181 17:15:18.713154  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/0/tests/0_ltp-ipc'
  182 17:15:23.575303  Running '/usr/bin/git checkout kernelci.org
  183 17:15:23.941080  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
  184 17:15:23.944798  uuid=10664050_1.5.2.3.1 testdef=None
  185 17:15:23.945565  end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
  187 17:15:23.946949  start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
  188 17:15:23.951159  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  190 17:15:23.952530  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
  191 17:15:24.006471  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  193 17:15:24.009329  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
  194 17:15:24.022066  runner path: /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/0/tests/0_ltp-ipc test_uuid 10664050_1.5.2.3.1
  195 17:15:24.022986  SKIPFILE='skipfile-lkft.yaml'
  196 17:15:24.023738  SKIP_INSTALL='true'
  197 17:15:24.024395  TST_CMDFILES='ipc'
  198 17:15:24.025676  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  200 17:15:24.028277  Creating lava-test-runner.conf files
  201 17:15:24.028962  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10664050/lava-overlay-6666sn5g/lava-10664050/0 for stage 0
  202 17:15:24.029909  - 0_ltp-ipc
  203 17:15:24.030594  end: 1.5.2.3 test-definition (duration 00:00:05) [common]
  204 17:15:24.031181  start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
  205 17:15:31.877565  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  206 17:15:31.877751  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
  207 17:15:31.877873  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  208 17:15:31.878007  end: 1.5.2 lava-overlay (duration 00:00:13) [common]
  209 17:15:31.878128  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
  210 17:15:32.018191  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  211 17:15:32.018595  start: 1.5.4 extract-modules (timeout 00:09:36) [common]
  212 17:15:32.018748  extracting modules file /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10664050/extract-nfsrootfs-8y6_5ta2
  213 17:15:32.048396  extracting modules file /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10664050/extract-overlay-ramdisk-oza7ifye/ramdisk
  214 17:15:32.077073  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  215 17:15:32.077250  start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
  216 17:15:32.077383  [common] Applying overlay to NFS
  217 17:15:32.077490  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10664050/compress-overlay-dzohschw/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10664050/extract-nfsrootfs-8y6_5ta2
  218 17:15:33.191463  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  219 17:15:33.191622  start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
  220 17:15:33.191714  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  221 17:15:33.191807  start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
  222 17:15:33.191893  Building ramdisk /var/lib/lava/dispatcher/tmp/10664050/extract-overlay-ramdisk-oza7ifye/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10664050/extract-overlay-ramdisk-oza7ifye/ramdisk
  223 17:15:33.269264  >> 31371 blocks

  224 17:15:33.900116  rename /var/lib/lava/dispatcher/tmp/10664050/extract-overlay-ramdisk-oza7ifye/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/ramdisk/ramdisk.cpio.gz
  225 17:15:33.900557  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  226 17:15:33.900686  start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
  227 17:15:33.900818  start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
  228 17:15:33.900980  No mkimage arch provided, not using FIT.
  229 17:15:33.901104  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  230 17:15:33.901216  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  231 17:15:33.901367  end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
  232 17:15:33.901491  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
  233 17:15:33.901660  No LXC device requested
  234 17:15:33.901750  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  235 17:15:33.901872  start: 1.7 deploy-device-env (timeout 00:09:34) [common]
  236 17:15:33.901988  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  237 17:15:33.902095  Checking files for TFTP limit of 4294967296 bytes.
  238 17:15:33.902695  end: 1 tftp-deploy (duration 00:00:26) [common]
  239 17:15:33.902827  start: 2 depthcharge-action (timeout 00:05:00) [common]
  240 17:15:33.902945  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  241 17:15:33.903087  substitutions:
  242 17:15:33.903185  - {DTB}: None
  243 17:15:33.903279  - {INITRD}: 10664050/tftp-deploy-dmoza6df/ramdisk/ramdisk.cpio.gz
  244 17:15:33.903419  - {KERNEL}: 10664050/tftp-deploy-dmoza6df/kernel/bzImage
  245 17:15:33.903522  - {LAVA_MAC}: None
  246 17:15:33.903609  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10664050/extract-nfsrootfs-8y6_5ta2
  247 17:15:33.903782  - {NFS_SERVER_IP}: 192.168.201.1
  248 17:15:33.903938  - {PRESEED_CONFIG}: None
  249 17:15:33.904097  - {PRESEED_LOCAL}: None
  250 17:15:33.904189  - {RAMDISK}: 10664050/tftp-deploy-dmoza6df/ramdisk/ramdisk.cpio.gz
  251 17:15:33.904301  - {ROOT_PART}: None
  252 17:15:33.904445  - {ROOT}: None
  253 17:15:33.904597  - {SERVER_IP}: 192.168.201.1
  254 17:15:33.904683  - {TEE}: None
  255 17:15:33.904767  Parsed boot commands:
  256 17:15:33.904893  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  257 17:15:33.905115  Parsed boot commands: tftpboot 192.168.201.1 10664050/tftp-deploy-dmoza6df/kernel/bzImage 10664050/tftp-deploy-dmoza6df/kernel/cmdline 10664050/tftp-deploy-dmoza6df/ramdisk/ramdisk.cpio.gz
  258 17:15:33.905234  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  259 17:15:33.905407  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  260 17:15:33.905533  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  261 17:15:33.905648  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  262 17:15:33.905802  Not connected, no need to disconnect.
  263 17:15:33.905922  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  264 17:15:33.906044  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  265 17:15:33.906168  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
  266 17:15:33.910025  Setting prompt string to ['lava-test: # ']
  267 17:15:33.910432  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  268 17:15:33.910589  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  269 17:15:33.910731  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  270 17:15:33.910860  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  271 17:15:33.911249  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
  272 17:15:39.042621  >> Command sent successfully.

  273 17:15:39.045039  Returned 0 in 5 seconds
  274 17:15:39.145434  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  276 17:15:39.145872  end: 2.2.2 reset-device (duration 00:00:05) [common]
  277 17:15:39.146008  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  278 17:15:39.146133  Setting prompt string to 'Starting depthcharge on Voema...'
  279 17:15:39.146240  Changing prompt to 'Starting depthcharge on Voema...'
  280 17:15:39.146341  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  281 17:15:39.146673  [Enter `^Ec?' for help]

  282 17:15:40.745440  

  283 17:15:40.745610  

  284 17:15:40.755092  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  285 17:15:40.758828  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  286 17:15:40.765519  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  287 17:15:40.768529  CPU: AES supported, TXT NOT supported, VT supported

  288 17:15:40.775279  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  289 17:15:40.782024  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  290 17:15:40.785004  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  291 17:15:40.788545  VBOOT: Loading verstage.

  292 17:15:40.791829  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  293 17:15:40.798422  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  294 17:15:40.801537  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  295 17:15:40.812586  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  296 17:15:40.818660  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  297 17:15:40.818748  

  298 17:15:40.818816  

  299 17:15:40.832314  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  300 17:15:40.846229  Probing TPM: . done!

  301 17:15:40.849216  TPM ready after 0 ms

  302 17:15:40.852867  Connected to device vid:did:rid of 1ae0:0028:00

  303 17:15:40.863750  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  304 17:15:40.870383  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  305 17:15:40.873942  Initialized TPM device CR50 revision 0

  306 17:15:40.925597  tlcl_send_startup: Startup return code is 0

  307 17:15:40.925811  TPM: setup succeeded

  308 17:15:40.940801  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  309 17:15:40.954941  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  310 17:15:40.968049  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  311 17:15:40.977797  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  312 17:15:40.981828  Chrome EC: UHEPI supported

  313 17:15:40.984835  Phase 1

  314 17:15:40.988445  FMAP: area GBB found @ 1805000 (458752 bytes)

  315 17:15:40.998169  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  316 17:15:41.004559  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  317 17:15:41.011324  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  318 17:15:41.018052  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  319 17:15:41.021727  Recovery requested (1009000e)

  320 17:15:41.024546  TPM: Extending digest for VBOOT: boot mode into PCR 0

  321 17:15:41.036550  tlcl_extend: response is 0

  322 17:15:41.042935  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  323 17:15:41.053078  tlcl_extend: response is 0

  324 17:15:41.059554  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  325 17:15:41.066486  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  326 17:15:41.072590  BS: verstage times (exec / console): total (unknown) / 142 ms

  327 17:15:41.072679  

  328 17:15:41.072765  

  329 17:15:41.086029  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  330 17:15:41.092548  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  331 17:15:41.096049  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  332 17:15:41.099161  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  333 17:15:41.105746  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  334 17:15:41.109391  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  335 17:15:41.112919  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  336 17:15:41.116064  TCO_STS:   0000 0000

  337 17:15:41.119458  GEN_PMCON: d0015038 00002200

  338 17:15:41.122489  GBLRST_CAUSE: 00000000 00000000

  339 17:15:41.122574  HPR_CAUSE0: 00000000

  340 17:15:41.125981  prev_sleep_state 5

  341 17:15:41.129564  Boot Count incremented to 20183

  342 17:15:41.135670  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  343 17:15:41.142558  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  344 17:15:41.148864  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  345 17:15:41.155841  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  346 17:15:41.160459  Chrome EC: UHEPI supported

  347 17:15:41.166907  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  348 17:15:41.179922  Probing TPM:  done!

  349 17:15:41.187212  Connected to device vid:did:rid of 1ae0:0028:00

  350 17:15:41.194970  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  351 17:15:41.205119  Initialized TPM device CR50 revision 0

  352 17:15:41.214936  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  353 17:15:41.221666  MRC: Hash idx 0x100b comparison successful.

  354 17:15:41.225200  MRC cache found, size faa8

  355 17:15:41.225320  bootmode is set to: 2

  356 17:15:41.228071  SPD index = 0

  357 17:15:41.235127  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  358 17:15:41.238185  SPD: module type is LPDDR4X

  359 17:15:41.241575  SPD: module part number is MT53E512M64D4NW-046

  360 17:15:41.248262  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  361 17:15:41.251523  SPD: device width 16 bits, bus width 16 bits

  362 17:15:41.258187  SPD: module size is 1024 MB (per channel)

  363 17:15:41.689765  CBMEM:

  364 17:15:41.692694  IMD: root @ 0x76fff000 254 entries.

  365 17:15:41.696077  IMD: root @ 0x76ffec00 62 entries.

  366 17:15:41.699303  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  367 17:15:41.705707  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  368 17:15:41.709220  External stage cache:

  369 17:15:41.712881  IMD: root @ 0x7b3ff000 254 entries.

  370 17:15:41.715763  IMD: root @ 0x7b3fec00 62 entries.

  371 17:15:41.730860  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  372 17:15:41.737414  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  373 17:15:41.744147  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  374 17:15:41.758154  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  375 17:15:41.765368  cse_lite: Skip switching to RW in the recovery path

  376 17:15:41.765461  8 DIMMs found

  377 17:15:41.765552  SMM Memory Map

  378 17:15:41.769212  SMRAM       : 0x7b000000 0x800000

  379 17:15:41.772842   Subregion 0: 0x7b000000 0x200000

  380 17:15:41.775841   Subregion 1: 0x7b200000 0x200000

  381 17:15:41.779514   Subregion 2: 0x7b400000 0x400000

  382 17:15:41.782493  top_of_ram = 0x77000000

  383 17:15:41.789328  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  384 17:15:41.792372  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  385 17:15:41.799223  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  386 17:15:41.802549  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  387 17:15:41.812516  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  388 17:15:41.818996  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  389 17:15:41.829216  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  390 17:15:41.832182  Processing 211 relocs. Offset value of 0x74c0b000

  391 17:15:41.840984  BS: romstage times (exec / console): total (unknown) / 277 ms

  392 17:15:41.846997  

  393 17:15:41.847089  

  394 17:15:41.857079  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  395 17:15:41.860788  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  396 17:15:41.870440  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  397 17:15:41.877076  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  398 17:15:41.883799  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  399 17:15:41.890369  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  400 17:15:41.937568  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  401 17:15:41.943994  Processing 5008 relocs. Offset value of 0x75d98000

  402 17:15:41.947122  BS: postcar times (exec / console): total (unknown) / 59 ms

  403 17:15:41.947209  

  404 17:15:41.950651  

  405 17:15:41.960804  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  406 17:15:41.960895  Normal boot

  407 17:15:41.964455  FW_CONFIG value is 0x804c02

  408 17:15:41.967454  PCI: 00:07.0 disabled by fw_config

  409 17:15:41.970507  PCI: 00:07.1 disabled by fw_config

  410 17:15:41.974064  PCI: 00:0d.2 disabled by fw_config

  411 17:15:41.977110  PCI: 00:1c.7 disabled by fw_config

  412 17:15:41.983834  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  413 17:15:41.990382  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  414 17:15:41.994087  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  415 17:15:41.997071  GENERIC: 0.0 disabled by fw_config

  416 17:15:42.000638  GENERIC: 1.0 disabled by fw_config

  417 17:15:42.007244  fw_config match found: DB_USB=USB3_ACTIVE

  418 17:15:42.010392  fw_config match found: DB_USB=USB3_ACTIVE

  419 17:15:42.013903  fw_config match found: DB_USB=USB3_ACTIVE

  420 17:15:42.017412  fw_config match found: DB_USB=USB3_ACTIVE

  421 17:15:42.023871  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  422 17:15:42.030626  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  423 17:15:42.040202  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  424 17:15:42.046745  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  425 17:15:42.050196  microcode: sig=0x806c1 pf=0x80 revision=0x86

  426 17:15:42.056723  microcode: Update skipped, already up-to-date

  427 17:15:42.063746  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  428 17:15:42.091065  Detected 4 core, 8 thread CPU.

  429 17:15:42.093888  Setting up SMI for CPU

  430 17:15:42.097485  IED base = 0x7b400000

  431 17:15:42.097587  IED size = 0x00400000

  432 17:15:42.100416  Will perform SMM setup.

  433 17:15:42.107046  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  434 17:15:42.114319  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  435 17:15:42.120861  Processing 16 relocs. Offset value of 0x00030000

  436 17:15:42.124385  Attempting to start 7 APs

  437 17:15:42.127118  Waiting for 10ms after sending INIT.

  438 17:15:42.142922  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  439 17:15:42.143013  done.

  440 17:15:42.146237  AP: slot 4 apic_id 5.

  441 17:15:42.149233  AP: slot 2 apic_id 3.

  442 17:15:42.149322  AP: slot 7 apic_id 6.

  443 17:15:42.152837  AP: slot 3 apic_id 7.

  444 17:15:42.156348  AP: slot 5 apic_id 4.

  445 17:15:42.156434  AP: slot 6 apic_id 2.

  446 17:15:42.163013  Waiting for 2nd SIPI to complete...done.

  447 17:15:42.169429  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  448 17:15:42.175973  Processing 13 relocs. Offset value of 0x00038000

  449 17:15:42.176070  Unable to locate Global NVS

  450 17:15:42.186226  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  451 17:15:42.189238  Installing permanent SMM handler to 0x7b000000

  452 17:15:42.199441  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  453 17:15:42.202578  Processing 794 relocs. Offset value of 0x7b010000

  454 17:15:42.212409  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  455 17:15:42.215898  Processing 13 relocs. Offset value of 0x7b008000

  456 17:15:42.222634  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  457 17:15:42.229131  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  458 17:15:42.232327  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  459 17:15:42.238903  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  460 17:15:42.245642  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  461 17:15:42.252595  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  462 17:15:42.258985  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  463 17:15:42.259294  Unable to locate Global NVS

  464 17:15:42.268910  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  465 17:15:42.272203  Clearing SMI status registers

  466 17:15:42.272652  SMI_STS: PM1 

  467 17:15:42.275574  PM1_STS: PWRBTN 

  468 17:15:42.282267  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  469 17:15:42.285371  In relocation handler: CPU 0

  470 17:15:42.289240  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  471 17:15:42.295721  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  472 17:15:42.295990  Relocation complete.

  473 17:15:42.305932  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  474 17:15:42.306222  In relocation handler: CPU 1

  475 17:15:42.312521  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  476 17:15:42.312805  Relocation complete.

  477 17:15:42.319058  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  478 17:15:42.322020  In relocation handler: CPU 4

  479 17:15:42.329018  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  480 17:15:42.329285  Relocation complete.

  481 17:15:42.335302  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  482 17:15:42.338545  In relocation handler: CPU 5

  483 17:15:42.345292  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  484 17:15:42.348779  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  485 17:15:42.352285  Relocation complete.

  486 17:15:42.358387  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  487 17:15:42.361707  In relocation handler: CPU 6

  488 17:15:42.365353  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  489 17:15:42.368459  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  490 17:15:42.372131  Relocation complete.

  491 17:15:42.378678  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  492 17:15:42.381864  In relocation handler: CPU 2

  493 17:15:42.385341  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  494 17:15:42.388316  Relocation complete.

  495 17:15:42.395176  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  496 17:15:42.398782  In relocation handler: CPU 7

  497 17:15:42.401826  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  498 17:15:42.408516  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  499 17:15:42.408600  Relocation complete.

  500 17:15:42.418669  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  501 17:15:42.421644  In relocation handler: CPU 3

  502 17:15:42.425273  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  503 17:15:42.425356  Relocation complete.

  504 17:15:42.428898  Initializing CPU #0

  505 17:15:42.432590  CPU: vendor Intel device 806c1

  506 17:15:42.436190  CPU: family 06, model 8c, stepping 01

  507 17:15:42.439228  Clearing out pending MCEs

  508 17:15:42.442920  Setting up local APIC...

  509 17:15:42.443009   apic_id: 0x00 done.

  510 17:15:42.446259  Turbo is available but hidden

  511 17:15:42.449400  Turbo is available and visible

  512 17:15:42.452846  microcode: Update skipped, already up-to-date

  513 17:15:42.456320  CPU #0 initialized

  514 17:15:42.459668  Initializing CPU #7

  515 17:15:42.459754  Initializing CPU #3

  516 17:15:42.462758  Initializing CPU #2

  517 17:15:42.466175  Initializing CPU #6

  518 17:15:42.466261  CPU: vendor Intel device 806c1

  519 17:15:42.472735  CPU: family 06, model 8c, stepping 01

  520 17:15:42.476265  CPU: vendor Intel device 806c1

  521 17:15:42.479298  CPU: family 06, model 8c, stepping 01

  522 17:15:42.479400  Clearing out pending MCEs

  523 17:15:42.482884  Clearing out pending MCEs

  524 17:15:42.486342  Setting up local APIC...

  525 17:15:42.489632  Initializing CPU #4

  526 17:15:42.489719  Initializing CPU #5

  527 17:15:42.492791  CPU: vendor Intel device 806c1

  528 17:15:42.495768  CPU: family 06, model 8c, stepping 01

  529 17:15:42.499484  CPU: vendor Intel device 806c1

  530 17:15:42.502409  CPU: family 06, model 8c, stepping 01

  531 17:15:42.505988  Clearing out pending MCEs

  532 17:15:42.508962  Clearing out pending MCEs

  533 17:15:42.512613  Setting up local APIC...

  534 17:15:42.512699  Initializing CPU #1

  535 17:15:42.515575  CPU: vendor Intel device 806c1

  536 17:15:42.519241  CPU: vendor Intel device 806c1

  537 17:15:42.522797  CPU: family 06, model 8c, stepping 01

  538 17:15:42.529483  CPU: family 06, model 8c, stepping 01

  539 17:15:42.529573  Clearing out pending MCEs

  540 17:15:42.532301  Clearing out pending MCEs

  541 17:15:42.535906  Setting up local APIC...

  542 17:15:42.538938   apic_id: 0x05 done.

  543 17:15:42.539024  Setting up local APIC...

  544 17:15:42.542392  Setting up local APIC...

  545 17:15:42.545556   apic_id: 0x04 done.

  546 17:15:42.549173  microcode: Update skipped, already up-to-date

  547 17:15:42.555638  microcode: Update skipped, already up-to-date

  548 17:15:42.555726  CPU #4 initialized

  549 17:15:42.558966  CPU #5 initialized

  550 17:15:42.559051   apic_id: 0x06 done.

  551 17:15:42.562183  Setting up local APIC...

  552 17:15:42.565521   apic_id: 0x03 done.

  553 17:15:42.565607   apic_id: 0x02 done.

  554 17:15:42.572160  microcode: Update skipped, already up-to-date

  555 17:15:42.575463  microcode: Update skipped, already up-to-date

  556 17:15:42.579054  CPU #2 initialized

  557 17:15:42.579169  CPU #6 initialized

  558 17:15:42.582415  CPU: vendor Intel device 806c1

  559 17:15:42.585964  CPU: family 06, model 8c, stepping 01

  560 17:15:42.588835   apic_id: 0x07 done.

  561 17:15:42.592156  microcode: Update skipped, already up-to-date

  562 17:15:42.598810  microcode: Update skipped, already up-to-date

  563 17:15:42.598924  CPU #7 initialized

  564 17:15:42.601944  CPU #3 initialized

  565 17:15:42.605574  Clearing out pending MCEs

  566 17:15:42.608592  Setting up local APIC...

  567 17:15:42.608679   apic_id: 0x01 done.

  568 17:15:42.615111  microcode: Update skipped, already up-to-date

  569 17:15:42.615199  CPU #1 initialized

  570 17:15:42.621970  bsp_do_flight_plan done after 455 msecs.

  571 17:15:42.625510  CPU: frequency set to 4000 MHz

  572 17:15:42.625612  Enabling SMIs.

  573 17:15:42.632221  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  574 17:15:42.647717  SATAXPCIE1 indicates PCIe NVMe is present

  575 17:15:42.651409  Probing TPM:  done!

  576 17:15:42.654975  Connected to device vid:did:rid of 1ae0:0028:00

  577 17:15:42.665231  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  578 17:15:42.668529  Initialized TPM device CR50 revision 0

  579 17:15:42.671795  Enabling S0i3.4

  580 17:15:42.678453  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  581 17:15:42.681811  Found a VBT of 8704 bytes after decompression

  582 17:15:42.688078  cse_lite: CSE RO boot. HybridStorageMode disabled

  583 17:15:42.694888  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  584 17:15:42.770483  FSPS returned 0

  585 17:15:42.773396  Executing Phase 1 of FspMultiPhaseSiInit

  586 17:15:42.783618  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  587 17:15:42.787071  port C0 DISC req: usage 1 usb3 1 usb2 5

  588 17:15:42.790590  Raw Buffer output 0 00000511

  589 17:15:42.793229  Raw Buffer output 1 00000000

  590 17:15:42.797134  pmc_send_ipc_cmd succeeded

  591 17:15:42.803635  port C1 DISC req: usage 1 usb3 2 usb2 3

  592 17:15:42.803762  Raw Buffer output 0 00000321

  593 17:15:42.806952  Raw Buffer output 1 00000000

  594 17:15:42.811205  pmc_send_ipc_cmd succeeded

  595 17:15:42.816822  Detected 4 core, 8 thread CPU.

  596 17:15:42.819702  Detected 4 core, 8 thread CPU.

  597 17:15:43.054274  Display FSP Version Info HOB

  598 17:15:43.057113  Reference Code - CPU = a.0.4c.31

  599 17:15:43.060803  uCode Version = 0.0.0.86

  600 17:15:43.063850  TXT ACM version = ff.ff.ff.ffff

  601 17:15:43.067014  Reference Code - ME = a.0.4c.31

  602 17:15:43.070534  MEBx version = 0.0.0.0

  603 17:15:43.073658  ME Firmware Version = Consumer SKU

  604 17:15:43.077157  Reference Code - PCH = a.0.4c.31

  605 17:15:43.080648  PCH-CRID Status = Disabled

  606 17:15:43.083736  PCH-CRID Original Value = ff.ff.ff.ffff

  607 17:15:43.086853  PCH-CRID New Value = ff.ff.ff.ffff

  608 17:15:43.090349  OPROM - RST - RAID = ff.ff.ff.ffff

  609 17:15:43.094028  PCH Hsio Version = 4.0.0.0

  610 17:15:43.096978  Reference Code - SA - System Agent = a.0.4c.31

  611 17:15:43.100480  Reference Code - MRC = 2.0.0.1

  612 17:15:43.103476  SA - PCIe Version = a.0.4c.31

  613 17:15:43.106932  SA-CRID Status = Disabled

  614 17:15:43.110342  SA-CRID Original Value = 0.0.0.1

  615 17:15:43.113909  SA-CRID New Value = 0.0.0.1

  616 17:15:43.116698  OPROM - VBIOS = ff.ff.ff.ffff

  617 17:15:43.120366  IO Manageability Engine FW Version = 11.1.4.0

  618 17:15:43.123702  PHY Build Version = 0.0.0.e0

  619 17:15:43.126733  Thunderbolt(TM) FW Version = 0.0.0.0

  620 17:15:43.133690  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  621 17:15:43.136507  ITSS IRQ Polarities Before:

  622 17:15:43.136615  IPC0: 0xffffffff

  623 17:15:43.140233  IPC1: 0xffffffff

  624 17:15:43.140345  IPC2: 0xffffffff

  625 17:15:43.143272  IPC3: 0xffffffff

  626 17:15:43.146861  ITSS IRQ Polarities After:

  627 17:15:43.146968  IPC0: 0xffffffff

  628 17:15:43.149877  IPC1: 0xffffffff

  629 17:15:43.149988  IPC2: 0xffffffff

  630 17:15:43.153289  IPC3: 0xffffffff

  631 17:15:43.156846  Found PCIe Root Port #9 at PCI: 00:1d.0.

  632 17:15:43.169880  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  633 17:15:43.180142  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  634 17:15:43.193532  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  635 17:15:43.199692  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  636 17:15:43.203048  Enumerating buses...

  637 17:15:43.206400  Show all devs... Before device enumeration.

  638 17:15:43.209494  Root Device: enabled 1

  639 17:15:43.209606  DOMAIN: 0000: enabled 1

  640 17:15:43.213019  CPU_CLUSTER: 0: enabled 1

  641 17:15:43.216517  PCI: 00:00.0: enabled 1

  642 17:15:43.219886  PCI: 00:02.0: enabled 1

  643 17:15:43.219991  PCI: 00:04.0: enabled 1

  644 17:15:43.223149  PCI: 00:05.0: enabled 1

  645 17:15:43.226231  PCI: 00:06.0: enabled 0

  646 17:15:43.229727  PCI: 00:07.0: enabled 0

  647 17:15:43.229833  PCI: 00:07.1: enabled 0

  648 17:15:43.232987  PCI: 00:07.2: enabled 0

  649 17:15:43.235987  PCI: 00:07.3: enabled 0

  650 17:15:43.239404  PCI: 00:08.0: enabled 1

  651 17:15:43.239524  PCI: 00:09.0: enabled 0

  652 17:15:43.243060  PCI: 00:0a.0: enabled 0

  653 17:15:43.246176  PCI: 00:0d.0: enabled 1

  654 17:15:43.246308  PCI: 00:0d.1: enabled 0

  655 17:15:43.249699  PCI: 00:0d.2: enabled 0

  656 17:15:43.253226  PCI: 00:0d.3: enabled 0

  657 17:15:43.256157  PCI: 00:0e.0: enabled 0

  658 17:15:43.256265  PCI: 00:10.2: enabled 1

  659 17:15:43.259925  PCI: 00:10.6: enabled 0

  660 17:15:43.262768  PCI: 00:10.7: enabled 0

  661 17:15:43.265887  PCI: 00:12.0: enabled 0

  662 17:15:43.265996  PCI: 00:12.6: enabled 0

  663 17:15:43.269477  PCI: 00:13.0: enabled 0

  664 17:15:43.272760  PCI: 00:14.0: enabled 1

  665 17:15:43.276147  PCI: 00:14.1: enabled 0

  666 17:15:43.276256  PCI: 00:14.2: enabled 1

  667 17:15:43.279178  PCI: 00:14.3: enabled 1

  668 17:15:43.283367  PCI: 00:15.0: enabled 1

  669 17:15:43.285941  PCI: 00:15.1: enabled 1

  670 17:15:43.286050  PCI: 00:15.2: enabled 1

  671 17:15:43.289583  PCI: 00:15.3: enabled 1

  672 17:15:43.292700  PCI: 00:16.0: enabled 1

  673 17:15:43.292805  PCI: 00:16.1: enabled 0

  674 17:15:43.296386  PCI: 00:16.2: enabled 0

  675 17:15:43.299503  PCI: 00:16.3: enabled 0

  676 17:15:43.302602  PCI: 00:16.4: enabled 0

  677 17:15:43.302708  PCI: 00:16.5: enabled 0

  678 17:15:43.306065  PCI: 00:17.0: enabled 1

  679 17:15:43.308832  PCI: 00:19.0: enabled 0

  680 17:15:43.312234  PCI: 00:19.1: enabled 1

  681 17:15:43.312342  PCI: 00:19.2: enabled 0

  682 17:15:43.315808  PCI: 00:1c.0: enabled 1

  683 17:15:43.318818  PCI: 00:1c.1: enabled 0

  684 17:15:43.322557  PCI: 00:1c.2: enabled 0

  685 17:15:43.322665  PCI: 00:1c.3: enabled 0

  686 17:15:43.325516  PCI: 00:1c.4: enabled 0

  687 17:15:43.329367  PCI: 00:1c.5: enabled 0

  688 17:15:43.332555  PCI: 00:1c.6: enabled 1

  689 17:15:43.332670  PCI: 00:1c.7: enabled 0

  690 17:15:43.335470  PCI: 00:1d.0: enabled 1

  691 17:15:43.338980  PCI: 00:1d.1: enabled 0

  692 17:15:43.339089  PCI: 00:1d.2: enabled 1

  693 17:15:43.342456  PCI: 00:1d.3: enabled 0

  694 17:15:43.345978  PCI: 00:1e.0: enabled 1

  695 17:15:43.349186  PCI: 00:1e.1: enabled 0

  696 17:15:43.349292  PCI: 00:1e.2: enabled 1

  697 17:15:43.352281  PCI: 00:1e.3: enabled 1

  698 17:15:43.355835  PCI: 00:1f.0: enabled 1

  699 17:15:43.358838  PCI: 00:1f.1: enabled 0

  700 17:15:43.358922  PCI: 00:1f.2: enabled 1

  701 17:15:43.362567  PCI: 00:1f.3: enabled 1

  702 17:15:43.365340  PCI: 00:1f.4: enabled 0

  703 17:15:43.369007  PCI: 00:1f.5: enabled 1

  704 17:15:43.369109  PCI: 00:1f.6: enabled 0

  705 17:15:43.371945  PCI: 00:1f.7: enabled 0

  706 17:15:43.375822  APIC: 00: enabled 1

  707 17:15:43.375933  GENERIC: 0.0: enabled 1

  708 17:15:43.378750  GENERIC: 0.0: enabled 1

  709 17:15:43.382299  GENERIC: 1.0: enabled 1

  710 17:15:43.385333  GENERIC: 0.0: enabled 1

  711 17:15:43.385438  GENERIC: 1.0: enabled 1

  712 17:15:43.388625  USB0 port 0: enabled 1

  713 17:15:43.392028  GENERIC: 0.0: enabled 1

  714 17:15:43.395102  USB0 port 0: enabled 1

  715 17:15:43.395206  GENERIC: 0.0: enabled 1

  716 17:15:43.398825  I2C: 00:1a: enabled 1

  717 17:15:43.401855  I2C: 00:31: enabled 1

  718 17:15:43.401956  I2C: 00:32: enabled 1

  719 17:15:43.405369  I2C: 00:10: enabled 1

  720 17:15:43.408458  I2C: 00:15: enabled 1

  721 17:15:43.408564  GENERIC: 0.0: enabled 0

  722 17:15:43.412045  GENERIC: 1.0: enabled 0

  723 17:15:43.415415  GENERIC: 0.0: enabled 1

  724 17:15:43.415519  SPI: 00: enabled 1

  725 17:15:43.418564  SPI: 00: enabled 1

  726 17:15:43.422205  PNP: 0c09.0: enabled 1

  727 17:15:43.422306  GENERIC: 0.0: enabled 1

  728 17:15:43.425221  USB3 port 0: enabled 1

  729 17:15:43.428347  USB3 port 1: enabled 1

  730 17:15:43.431886  USB3 port 2: enabled 0

  731 17:15:43.431987  USB3 port 3: enabled 0

  732 17:15:43.435468  USB2 port 0: enabled 0

  733 17:15:43.438329  USB2 port 1: enabled 1

  734 17:15:43.438437  USB2 port 2: enabled 1

  735 17:15:43.441623  USB2 port 3: enabled 0

  736 17:15:43.445029  USB2 port 4: enabled 1

  737 17:15:43.448296  USB2 port 5: enabled 0

  738 17:15:43.448471  USB2 port 6: enabled 0

  739 17:15:43.451768  USB2 port 7: enabled 0

  740 17:15:43.455270  USB2 port 8: enabled 0

  741 17:15:43.455419  USB2 port 9: enabled 0

  742 17:15:43.458782  USB3 port 0: enabled 0

  743 17:15:43.462082  USB3 port 1: enabled 1

  744 17:15:43.462186  USB3 port 2: enabled 0

  745 17:15:43.465139  USB3 port 3: enabled 0

  746 17:15:43.468236  GENERIC: 0.0: enabled 1

  747 17:15:43.471558  GENERIC: 1.0: enabled 1

  748 17:15:43.471660  APIC: 01: enabled 1

  749 17:15:43.475147  APIC: 03: enabled 1

  750 17:15:43.475248  APIC: 07: enabled 1

  751 17:15:43.478813  APIC: 05: enabled 1

  752 17:15:43.481702  APIC: 04: enabled 1

  753 17:15:43.481803  APIC: 02: enabled 1

  754 17:15:43.484776  APIC: 06: enabled 1

  755 17:15:43.488409  Compare with tree...

  756 17:15:43.488513  Root Device: enabled 1

  757 17:15:43.491503   DOMAIN: 0000: enabled 1

  758 17:15:43.494966    PCI: 00:00.0: enabled 1

  759 17:15:43.498024    PCI: 00:02.0: enabled 1

  760 17:15:43.498137    PCI: 00:04.0: enabled 1

  761 17:15:43.501807     GENERIC: 0.0: enabled 1

  762 17:15:43.504814    PCI: 00:05.0: enabled 1

  763 17:15:43.508426    PCI: 00:06.0: enabled 0

  764 17:15:43.511336    PCI: 00:07.0: enabled 0

  765 17:15:43.515071     GENERIC: 0.0: enabled 1

  766 17:15:43.515192    PCI: 00:07.1: enabled 0

  767 17:15:43.517968     GENERIC: 1.0: enabled 1

  768 17:15:43.521342    PCI: 00:07.2: enabled 0

  769 17:15:43.525067     GENERIC: 0.0: enabled 1

  770 17:15:43.528169    PCI: 00:07.3: enabled 0

  771 17:15:43.528271     GENERIC: 1.0: enabled 1

  772 17:15:43.531055    PCI: 00:08.0: enabled 1

  773 17:15:43.534750    PCI: 00:09.0: enabled 0

  774 17:15:43.538299    PCI: 00:0a.0: enabled 0

  775 17:15:43.541201    PCI: 00:0d.0: enabled 1

  776 17:15:43.541301     USB0 port 0: enabled 1

  777 17:15:43.544745      USB3 port 0: enabled 1

  778 17:15:43.548132      USB3 port 1: enabled 1

  779 17:15:43.551761      USB3 port 2: enabled 0

  780 17:15:43.554699      USB3 port 3: enabled 0

  781 17:15:43.554822    PCI: 00:0d.1: enabled 0

  782 17:15:43.558118    PCI: 00:0d.2: enabled 0

  783 17:15:43.561157     GENERIC: 0.0: enabled 1

  784 17:15:43.564448    PCI: 00:0d.3: enabled 0

  785 17:15:43.567907    PCI: 00:0e.0: enabled 0

  786 17:15:43.570916    PCI: 00:10.2: enabled 1

  787 17:15:43.571000    PCI: 00:10.6: enabled 0

  788 17:15:43.574260    PCI: 00:10.7: enabled 0

  789 17:15:43.577973    PCI: 00:12.0: enabled 0

  790 17:15:43.580837    PCI: 00:12.6: enabled 0

  791 17:15:43.580917    PCI: 00:13.0: enabled 0

  792 17:15:43.584472    PCI: 00:14.0: enabled 1

  793 17:15:43.587637     USB0 port 0: enabled 1

  794 17:15:43.591287      USB2 port 0: enabled 0

  795 17:15:43.594133      USB2 port 1: enabled 1

  796 17:15:43.597669      USB2 port 2: enabled 1

  797 17:15:43.597753      USB2 port 3: enabled 0

  798 17:15:43.601136      USB2 port 4: enabled 1

  799 17:15:43.604259      USB2 port 5: enabled 0

  800 17:15:43.607878      USB2 port 6: enabled 0

  801 17:15:43.610804      USB2 port 7: enabled 0

  802 17:15:43.610883      USB2 port 8: enabled 0

  803 17:15:43.614326      USB2 port 9: enabled 0

  804 17:15:43.617360      USB3 port 0: enabled 0

  805 17:15:43.621059      USB3 port 1: enabled 1

  806 17:15:43.624437      USB3 port 2: enabled 0

  807 17:15:43.627285      USB3 port 3: enabled 0

  808 17:15:43.627430    PCI: 00:14.1: enabled 0

  809 17:15:43.631042    PCI: 00:14.2: enabled 1

  810 17:15:43.634169    PCI: 00:14.3: enabled 1

  811 17:15:43.637365     GENERIC: 0.0: enabled 1

  812 17:15:43.640821    PCI: 00:15.0: enabled 1

  813 17:15:43.640914     I2C: 00:1a: enabled 1

  814 17:15:43.643893     I2C: 00:31: enabled 1

  815 17:15:43.647510     I2C: 00:32: enabled 1

  816 17:15:43.650483    PCI: 00:15.1: enabled 1

  817 17:15:43.650559     I2C: 00:10: enabled 1

  818 17:15:43.653750    PCI: 00:15.2: enabled 1

  819 17:15:43.657308    PCI: 00:15.3: enabled 1

  820 17:15:43.660922    PCI: 00:16.0: enabled 1

  821 17:15:43.663596    PCI: 00:16.1: enabled 0

  822 17:15:43.663676    PCI: 00:16.2: enabled 0

  823 17:15:43.667097    PCI: 00:16.3: enabled 0

  824 17:15:43.670625    PCI: 00:16.4: enabled 0

  825 17:15:43.674151    PCI: 00:16.5: enabled 0

  826 17:15:43.674238    PCI: 00:17.0: enabled 1

  827 17:15:43.678086    PCI: 00:19.0: enabled 0

  828 17:15:43.681693    PCI: 00:19.1: enabled 1

  829 17:15:43.685310     I2C: 00:15: enabled 1

  830 17:15:43.685393    PCI: 00:19.2: enabled 0

  831 17:15:43.688414    PCI: 00:1d.0: enabled 1

  832 17:15:43.692152     GENERIC: 0.0: enabled 1

  833 17:15:43.695051    PCI: 00:1e.0: enabled 1

  834 17:15:43.698284    PCI: 00:1e.1: enabled 0

  835 17:15:43.698372    PCI: 00:1e.2: enabled 1

  836 17:15:43.701737     SPI: 00: enabled 1

  837 17:15:43.705286    PCI: 00:1e.3: enabled 1

  838 17:15:43.708260     SPI: 00: enabled 1

  839 17:15:43.708347    PCI: 00:1f.0: enabled 1

  840 17:15:43.711839     PNP: 0c09.0: enabled 1

  841 17:15:43.750439    PCI: 00:1f.1: enabled 0

  842 17:15:43.750568    PCI: 00:1f.2: enabled 1

  843 17:15:43.750831     GENERIC: 0.0: enabled 1

  844 17:15:43.750919      GENERIC: 0.0: enabled 1

  845 17:15:43.751009      GENERIC: 1.0: enabled 1

  846 17:15:43.751096    PCI: 00:1f.3: enabled 1

  847 17:15:43.751183    PCI: 00:1f.4: enabled 0

  848 17:15:43.751285    PCI: 00:1f.5: enabled 1

  849 17:15:43.751413    PCI: 00:1f.6: enabled 0

  850 17:15:43.751533    PCI: 00:1f.7: enabled 0

  851 17:15:43.751633   CPU_CLUSTER: 0: enabled 1

  852 17:15:43.751740    APIC: 00: enabled 1

  853 17:15:43.751837    APIC: 01: enabled 1

  854 17:15:43.751937    APIC: 03: enabled 1

  855 17:15:43.752039    APIC: 07: enabled 1

  856 17:15:43.754638    APIC: 05: enabled 1

  857 17:15:43.754747    APIC: 04: enabled 1

  858 17:15:43.757543    APIC: 02: enabled 1

  859 17:15:43.760970    APIC: 06: enabled 1

  860 17:15:43.764389  Root Device scanning...

  861 17:15:43.767951  scan_static_bus for Root Device

  862 17:15:43.768037  DOMAIN: 0000 enabled

  863 17:15:43.771483  CPU_CLUSTER: 0 enabled

  864 17:15:43.774458  DOMAIN: 0000 scanning...

  865 17:15:43.777392  PCI: pci_scan_bus for bus 00

  866 17:15:43.781276  PCI: 00:00.0 [8086/0000] ops

  867 17:15:43.784263  PCI: 00:00.0 [8086/9a12] enabled

  868 17:15:43.787354  PCI: 00:02.0 [8086/0000] bus ops

  869 17:15:43.791106  PCI: 00:02.0 [8086/9a40] enabled

  870 17:15:43.794177  PCI: 00:04.0 [8086/0000] bus ops

  871 17:15:43.797731  PCI: 00:04.0 [8086/9a03] enabled

  872 17:15:43.800727  PCI: 00:05.0 [8086/9a19] enabled

  873 17:15:43.804440  PCI: 00:07.0 [0000/0000] hidden

  874 17:15:43.807261  PCI: 00:08.0 [8086/9a11] enabled

  875 17:15:43.810870  PCI: 00:0a.0 [8086/9a0d] disabled

  876 17:15:43.814064  PCI: 00:0d.0 [8086/0000] bus ops

  877 17:15:43.817777  PCI: 00:0d.0 [8086/9a13] enabled

  878 17:15:43.820762  PCI: 00:14.0 [8086/0000] bus ops

  879 17:15:43.824407  PCI: 00:14.0 [8086/a0ed] enabled

  880 17:15:43.827340  PCI: 00:14.2 [8086/a0ef] enabled

  881 17:15:43.830926  PCI: 00:14.3 [8086/0000] bus ops

  882 17:15:43.834359  PCI: 00:14.3 [8086/a0f0] enabled

  883 17:15:43.837445  PCI: 00:15.0 [8086/0000] bus ops

  884 17:15:43.841122  PCI: 00:15.0 [8086/a0e8] enabled

  885 17:15:43.844087  PCI: 00:15.1 [8086/0000] bus ops

  886 17:15:43.847162  PCI: 00:15.1 [8086/a0e9] enabled

  887 17:15:43.850729  PCI: 00:15.2 [8086/0000] bus ops

  888 17:15:43.854161  PCI: 00:15.2 [8086/a0ea] enabled

  889 17:15:43.857152  PCI: 00:15.3 [8086/0000] bus ops

  890 17:15:43.860896  PCI: 00:15.3 [8086/a0eb] enabled

  891 17:15:43.864272  PCI: 00:16.0 [8086/0000] ops

  892 17:15:43.867678  PCI: 00:16.0 [8086/a0e0] enabled

  893 17:15:43.870584  PCI: Static device PCI: 00:17.0 not found, disabling it.

  894 17:15:43.873996  PCI: 00:19.0 [8086/0000] bus ops

  895 17:15:43.877468  PCI: 00:19.0 [8086/a0c5] disabled

  896 17:15:43.880503  PCI: 00:19.1 [8086/0000] bus ops

  897 17:15:43.883849  PCI: 00:19.1 [8086/a0c6] enabled

  898 17:15:43.887237  PCI: 00:1d.0 [8086/0000] bus ops

  899 17:15:43.890754  PCI: 00:1d.0 [8086/a0b0] enabled

  900 17:15:43.894059  PCI: 00:1e.0 [8086/0000] ops

  901 17:15:43.897038  PCI: 00:1e.0 [8086/a0a8] enabled

  902 17:15:43.900695  PCI: 00:1e.2 [8086/0000] bus ops

  903 17:15:43.903728  PCI: 00:1e.2 [8086/a0aa] enabled

  904 17:15:43.907473  PCI: 00:1e.3 [8086/0000] bus ops

  905 17:15:43.910407  PCI: 00:1e.3 [8086/a0ab] enabled

  906 17:15:43.913768  PCI: 00:1f.0 [8086/0000] bus ops

  907 17:15:43.917314  PCI: 00:1f.0 [8086/a087] enabled

  908 17:15:43.920283  RTC Init

  909 17:15:43.924064  Set power on after power failure.

  910 17:15:43.924151  Disabling Deep S3

  911 17:15:43.926988  Disabling Deep S3

  912 17:15:43.930664  Disabling Deep S4

  913 17:15:43.930751  Disabling Deep S4

  914 17:15:43.933592  Disabling Deep S5

  915 17:15:43.933700  Disabling Deep S5

  916 17:15:43.937135  PCI: 00:1f.2 [0000/0000] hidden

  917 17:15:43.940335  PCI: 00:1f.3 [8086/0000] bus ops

  918 17:15:43.943844  PCI: 00:1f.3 [8086/a0c8] enabled

  919 17:15:43.946908  PCI: 00:1f.5 [8086/0000] bus ops

  920 17:15:43.950175  PCI: 00:1f.5 [8086/a0a4] enabled

  921 17:15:43.953771  PCI: Leftover static devices:

  922 17:15:43.957149  PCI: 00:10.2

  923 17:15:43.957258  PCI: 00:10.6

  924 17:15:43.957366  PCI: 00:10.7

  925 17:15:43.960216  PCI: 00:06.0

  926 17:15:43.960324  PCI: 00:07.1

  927 17:15:43.963916  PCI: 00:07.2

  928 17:15:43.964019  PCI: 00:07.3

  929 17:15:43.964109  PCI: 00:09.0

  930 17:15:43.966906  PCI: 00:0d.1

  931 17:15:43.967002  PCI: 00:0d.2

  932 17:15:43.970288  PCI: 00:0d.3

  933 17:15:43.970398  PCI: 00:0e.0

  934 17:15:43.973697  PCI: 00:12.0

  935 17:15:43.973821  PCI: 00:12.6

  936 17:15:43.973914  PCI: 00:13.0

  937 17:15:43.977136  PCI: 00:14.1

  938 17:15:43.977232  PCI: 00:16.1

  939 17:15:43.980703  PCI: 00:16.2

  940 17:15:43.980774  PCI: 00:16.3

  941 17:15:43.980835  PCI: 00:16.4

  942 17:15:43.983541  PCI: 00:16.5

  943 17:15:43.983608  PCI: 00:17.0

  944 17:15:43.987136  PCI: 00:19.2

  945 17:15:43.987229  PCI: 00:1e.1

  946 17:15:43.987314  PCI: 00:1f.1

  947 17:15:43.990096  PCI: 00:1f.4

  948 17:15:43.990161  PCI: 00:1f.6

  949 17:15:43.993388  PCI: 00:1f.7

  950 17:15:43.996838  PCI: Check your devicetree.cb.

  951 17:15:43.996919  PCI: 00:02.0 scanning...

  952 17:15:44.003821  scan_generic_bus for PCI: 00:02.0

  953 17:15:44.006893  scan_generic_bus for PCI: 00:02.0 done

  954 17:15:44.009971  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  955 17:15:44.013594  PCI: 00:04.0 scanning...

  956 17:15:44.016983  scan_generic_bus for PCI: 00:04.0

  957 17:15:44.020339  GENERIC: 0.0 enabled

  958 17:15:44.023362  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  959 17:15:44.030019  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  960 17:15:44.033593  PCI: 00:0d.0 scanning...

  961 17:15:44.036668  scan_static_bus for PCI: 00:0d.0

  962 17:15:44.036758  USB0 port 0 enabled

  963 17:15:44.040613  USB0 port 0 scanning...

  964 17:15:44.043527  scan_static_bus for USB0 port 0

  965 17:15:44.046525  USB3 port 0 enabled

  966 17:15:44.046662  USB3 port 1 enabled

  967 17:15:44.049599  USB3 port 2 disabled

  968 17:15:44.053441  USB3 port 3 disabled

  969 17:15:44.053605  USB3 port 0 scanning...

  970 17:15:44.056424  scan_static_bus for USB3 port 0

  971 17:15:44.062977  scan_static_bus for USB3 port 0 done

  972 17:15:44.066707  scan_bus: bus USB3 port 0 finished in 6 msecs

  973 17:15:44.069714  USB3 port 1 scanning...

  974 17:15:44.073384  scan_static_bus for USB3 port 1

  975 17:15:44.076733  scan_static_bus for USB3 port 1 done

  976 17:15:44.080129  scan_bus: bus USB3 port 1 finished in 6 msecs

  977 17:15:44.082931  scan_static_bus for USB0 port 0 done

  978 17:15:44.089927  scan_bus: bus USB0 port 0 finished in 43 msecs

  979 17:15:44.092865  scan_static_bus for PCI: 00:0d.0 done

  980 17:15:44.096239  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  981 17:15:44.099580  PCI: 00:14.0 scanning...

  982 17:15:44.103189  scan_static_bus for PCI: 00:14.0

  983 17:15:44.106439  USB0 port 0 enabled

  984 17:15:44.110026  USB0 port 0 scanning...

  985 17:15:44.113161  scan_static_bus for USB0 port 0

  986 17:15:44.113303  USB2 port 0 disabled

  987 17:15:44.116176  USB2 port 1 enabled

  988 17:15:44.116299  USB2 port 2 enabled

  989 17:15:44.119862  USB2 port 3 disabled

  990 17:15:44.122745  USB2 port 4 enabled

  991 17:15:44.122879  USB2 port 5 disabled

  992 17:15:44.126308  USB2 port 6 disabled

  993 17:15:44.129386  USB2 port 7 disabled

  994 17:15:44.129530  USB2 port 8 disabled

  995 17:15:44.133028  USB2 port 9 disabled

  996 17:15:44.136672  USB3 port 0 disabled

  997 17:15:44.136804  USB3 port 1 enabled

  998 17:15:44.139604  USB3 port 2 disabled

  999 17:15:44.143030  USB3 port 3 disabled

 1000 17:15:44.143161  USB2 port 1 scanning...

 1001 17:15:44.145937  scan_static_bus for USB2 port 1

 1002 17:15:44.149689  scan_static_bus for USB2 port 1 done

 1003 17:15:44.156436  scan_bus: bus USB2 port 1 finished in 6 msecs

 1004 17:15:44.159324  USB2 port 2 scanning...

 1005 17:15:44.162932  scan_static_bus for USB2 port 2

 1006 17:15:44.165818  scan_static_bus for USB2 port 2 done

 1007 17:15:44.169543  scan_bus: bus USB2 port 2 finished in 6 msecs

 1008 17:15:44.172624  USB2 port 4 scanning...

 1009 17:15:44.176344  scan_static_bus for USB2 port 4

 1010 17:15:44.179238  scan_static_bus for USB2 port 4 done

 1011 17:15:44.182630  scan_bus: bus USB2 port 4 finished in 6 msecs

 1012 17:15:44.186072  USB3 port 1 scanning...

 1013 17:15:44.189397  scan_static_bus for USB3 port 1

 1014 17:15:44.192525  scan_static_bus for USB3 port 1 done

 1015 17:15:44.199376  scan_bus: bus USB3 port 1 finished in 6 msecs

 1016 17:15:44.203078  scan_static_bus for USB0 port 0 done

 1017 17:15:44.206116  scan_bus: bus USB0 port 0 finished in 93 msecs

 1018 17:15:44.209314  scan_static_bus for PCI: 00:14.0 done

 1019 17:15:44.216102  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

 1020 17:15:44.219226  PCI: 00:14.3 scanning...

 1021 17:15:44.222274  scan_static_bus for PCI: 00:14.3

 1022 17:15:44.222384  GENERIC: 0.0 enabled

 1023 17:15:44.225694  scan_static_bus for PCI: 00:14.3 done

 1024 17:15:44.232274  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1025 17:15:44.235784  PCI: 00:15.0 scanning...

 1026 17:15:44.239597  scan_static_bus for PCI: 00:15.0

 1027 17:15:44.239694  I2C: 00:1a enabled

 1028 17:15:44.242549  I2C: 00:31 enabled

 1029 17:15:44.242637  I2C: 00:32 enabled

 1030 17:15:44.249057  scan_static_bus for PCI: 00:15.0 done

 1031 17:15:44.252793  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1032 17:15:44.256984  PCI: 00:15.1 scanning...

 1033 17:15:44.259884  scan_static_bus for PCI: 00:15.1

 1034 17:15:44.259970  I2C: 00:10 enabled

 1035 17:15:44.263634  scan_static_bus for PCI: 00:15.1 done

 1036 17:15:44.270143  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1037 17:15:44.273111  PCI: 00:15.2 scanning...

 1038 17:15:44.276715  scan_static_bus for PCI: 00:15.2

 1039 17:15:44.279746  scan_static_bus for PCI: 00:15.2 done

 1040 17:15:44.282822  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1041 17:15:44.286464  PCI: 00:15.3 scanning...

 1042 17:15:44.289561  scan_static_bus for PCI: 00:15.3

 1043 17:15:44.292741  scan_static_bus for PCI: 00:15.3 done

 1044 17:15:44.299741  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1045 17:15:44.299828  PCI: 00:19.1 scanning...

 1046 17:15:44.302698  scan_static_bus for PCI: 00:19.1

 1047 17:15:44.306614  I2C: 00:15 enabled

 1048 17:15:44.309945  scan_static_bus for PCI: 00:19.1 done

 1049 17:15:44.316277  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1050 17:15:44.316363  PCI: 00:1d.0 scanning...

 1051 17:15:44.323037  do_pci_scan_bridge for PCI: 00:1d.0

 1052 17:15:44.323121  PCI: pci_scan_bus for bus 01

 1053 17:15:44.325911  PCI: 01:00.0 [1c5c/174a] enabled

 1054 17:15:44.329480  GENERIC: 0.0 enabled

 1055 17:15:44.332727  Enabling Common Clock Configuration

 1056 17:15:44.339311  L1 Sub-State supported from root port 29

 1057 17:15:44.339434  L1 Sub-State Support = 0xf

 1058 17:15:44.342349  CommonModeRestoreTime = 0x28

 1059 17:15:44.348920  Power On Value = 0x16, Power On Scale = 0x0

 1060 17:15:44.349005  ASPM: Enabled L1

 1061 17:15:44.352510  PCIe: Max_Payload_Size adjusted to 128

 1062 17:15:44.359204  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1063 17:15:44.362311  PCI: 00:1e.2 scanning...

 1064 17:15:44.366026  scan_generic_bus for PCI: 00:1e.2

 1065 17:15:44.366126  SPI: 00 enabled

 1066 17:15:44.372557  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1067 17:15:44.375729  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1068 17:15:44.378769  PCI: 00:1e.3 scanning...

 1069 17:15:44.382367  scan_generic_bus for PCI: 00:1e.3

 1070 17:15:44.385376  SPI: 00 enabled

 1071 17:15:44.392072  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1072 17:15:44.395838  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1073 17:15:44.398710  PCI: 00:1f.0 scanning...

 1074 17:15:44.402098  scan_static_bus for PCI: 00:1f.0

 1075 17:15:44.405205  PNP: 0c09.0 enabled

 1076 17:15:44.405296  PNP: 0c09.0 scanning...

 1077 17:15:44.408608  scan_static_bus for PNP: 0c09.0

 1078 17:15:44.411975  scan_static_bus for PNP: 0c09.0 done

 1079 17:15:44.418707  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1080 17:15:44.422051  scan_static_bus for PCI: 00:1f.0 done

 1081 17:15:44.425330  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1082 17:15:44.428801  PCI: 00:1f.2 scanning...

 1083 17:15:44.432130  scan_static_bus for PCI: 00:1f.2

 1084 17:15:44.435211  GENERIC: 0.0 enabled

 1085 17:15:44.438526  GENERIC: 0.0 scanning...

 1086 17:15:44.442129  scan_static_bus for GENERIC: 0.0

 1087 17:15:44.442232  GENERIC: 0.0 enabled

 1088 17:15:44.445126  GENERIC: 1.0 enabled

 1089 17:15:44.448762  scan_static_bus for GENERIC: 0.0 done

 1090 17:15:44.454988  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1091 17:15:44.458487  scan_static_bus for PCI: 00:1f.2 done

 1092 17:15:44.461548  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1093 17:15:44.465160  PCI: 00:1f.3 scanning...

 1094 17:15:44.468183  scan_static_bus for PCI: 00:1f.3

 1095 17:15:44.471768  scan_static_bus for PCI: 00:1f.3 done

 1096 17:15:44.478356  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1097 17:15:44.478464  PCI: 00:1f.5 scanning...

 1098 17:15:44.485027  scan_generic_bus for PCI: 00:1f.5

 1099 17:15:44.488114  scan_generic_bus for PCI: 00:1f.5 done

 1100 17:15:44.491723  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1101 17:15:44.497974  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1102 17:15:44.501370  scan_static_bus for Root Device done

 1103 17:15:44.505117  scan_bus: bus Root Device finished in 736 msecs

 1104 17:15:44.505228  done

 1105 17:15:44.511566  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1106 17:15:44.514349  Chrome EC: UHEPI supported

 1107 17:15:44.521342  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1108 17:15:44.528071  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1109 17:15:44.531156  SPI flash protection: WPSW=0 SRP0=0

 1110 17:15:44.534542  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1111 17:15:44.541058  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1112 17:15:44.544400  found VGA at PCI: 00:02.0

 1113 17:15:44.547741  Setting up VGA for PCI: 00:02.0

 1114 17:15:44.554480  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1115 17:15:44.557535  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1116 17:15:44.560941  Allocating resources...

 1117 17:15:44.564055  Reading resources...

 1118 17:15:44.567702  Root Device read_resources bus 0 link: 0

 1119 17:15:44.570754  DOMAIN: 0000 read_resources bus 0 link: 0

 1120 17:15:44.577372  PCI: 00:04.0 read_resources bus 1 link: 0

 1121 17:15:44.581088  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1122 17:15:44.587059  PCI: 00:0d.0 read_resources bus 0 link: 0

 1123 17:15:44.590688  USB0 port 0 read_resources bus 0 link: 0

 1124 17:15:44.597430  USB0 port 0 read_resources bus 0 link: 0 done

 1125 17:15:44.600376  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1126 17:15:44.604072  PCI: 00:14.0 read_resources bus 0 link: 0

 1127 17:15:44.610763  USB0 port 0 read_resources bus 0 link: 0

 1128 17:15:44.613797  USB0 port 0 read_resources bus 0 link: 0 done

 1129 17:15:44.620941  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1130 17:15:44.623938  PCI: 00:14.3 read_resources bus 0 link: 0

 1131 17:15:44.631134  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1132 17:15:44.634309  PCI: 00:15.0 read_resources bus 0 link: 0

 1133 17:15:44.641117  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1134 17:15:44.644393  PCI: 00:15.1 read_resources bus 0 link: 0

 1135 17:15:44.650822  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1136 17:15:44.654171  PCI: 00:19.1 read_resources bus 0 link: 0

 1137 17:15:44.661420  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1138 17:15:44.664405  PCI: 00:1d.0 read_resources bus 1 link: 0

 1139 17:15:44.671529  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1140 17:15:44.674474  PCI: 00:1e.2 read_resources bus 2 link: 0

 1141 17:15:44.681176  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1142 17:15:44.684912  PCI: 00:1e.3 read_resources bus 3 link: 0

 1143 17:15:44.691623  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1144 17:15:44.694806  PCI: 00:1f.0 read_resources bus 0 link: 0

 1145 17:15:44.701453  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1146 17:15:44.704702  PCI: 00:1f.2 read_resources bus 0 link: 0

 1147 17:15:44.708045  GENERIC: 0.0 read_resources bus 0 link: 0

 1148 17:15:44.715002  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1149 17:15:44.718062  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1150 17:15:44.725610  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1151 17:15:44.729073  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1152 17:15:44.735254  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1153 17:15:44.738517  Root Device read_resources bus 0 link: 0 done

 1154 17:15:44.742110  Done reading resources.

 1155 17:15:44.748956  Show resources in subtree (Root Device)...After reading.

 1156 17:15:44.752153   Root Device child on link 0 DOMAIN: 0000

 1157 17:15:44.755632    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1158 17:15:44.765322    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1159 17:15:44.775133    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1160 17:15:44.778784     PCI: 00:00.0

 1161 17:15:44.788446     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1162 17:15:44.795150     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1163 17:15:44.804782     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1164 17:15:44.815111     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1165 17:15:44.824833     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1166 17:15:44.835106     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1167 17:15:44.841824     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1168 17:15:44.851627     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1169 17:15:44.861458     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1170 17:15:44.871264     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1171 17:15:44.881549     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1172 17:15:44.891273     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1173 17:15:44.897796     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1174 17:15:44.908079     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1175 17:15:44.917695     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1176 17:15:44.928077     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1177 17:15:44.937821     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1178 17:15:44.947437     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1179 17:15:44.954415     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1180 17:15:44.964128     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1181 17:15:44.967966     PCI: 00:02.0

 1182 17:15:44.977508     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1183 17:15:44.987709     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1184 17:15:44.997270     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1185 17:15:45.000874     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1186 17:15:45.010574     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1187 17:15:45.014132      GENERIC: 0.0

 1188 17:15:45.014244     PCI: 00:05.0

 1189 17:15:45.023740     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1190 17:15:45.030350     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1191 17:15:45.030462      GENERIC: 0.0

 1192 17:15:45.033979     PCI: 00:08.0

 1193 17:15:45.044138     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 17:15:45.044247     PCI: 00:0a.0

 1195 17:15:45.047132     PCI: 00:0d.0 child on link 0 USB0 port 0

 1196 17:15:45.057071     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1197 17:15:45.063667      USB0 port 0 child on link 0 USB3 port 0

 1198 17:15:45.063763       USB3 port 0

 1199 17:15:45.067303       USB3 port 1

 1200 17:15:45.067417       USB3 port 2

 1201 17:15:45.070732       USB3 port 3

 1202 17:15:45.073979     PCI: 00:14.0 child on link 0 USB0 port 0

 1203 17:15:45.083885     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1204 17:15:45.090529      USB0 port 0 child on link 0 USB2 port 0

 1205 17:15:45.090625       USB2 port 0

 1206 17:15:45.094010       USB2 port 1

 1207 17:15:45.094086       USB2 port 2

 1208 17:15:45.096953       USB2 port 3

 1209 17:15:45.097034       USB2 port 4

 1210 17:15:45.100516       USB2 port 5

 1211 17:15:45.100595       USB2 port 6

 1212 17:15:45.103686       USB2 port 7

 1213 17:15:45.103780       USB2 port 8

 1214 17:15:45.107162       USB2 port 9

 1215 17:15:45.107271       USB3 port 0

 1216 17:15:45.110742       USB3 port 1

 1217 17:15:45.110818       USB3 port 2

 1218 17:15:45.113819       USB3 port 3

 1219 17:15:45.113903     PCI: 00:14.2

 1220 17:15:45.124086     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1221 17:15:45.133909     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1222 17:15:45.140507     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1223 17:15:45.150169     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1224 17:15:45.150253      GENERIC: 0.0

 1225 17:15:45.156737     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1226 17:15:45.167187     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1227 17:15:45.167296      I2C: 00:1a

 1228 17:15:45.170088      I2C: 00:31

 1229 17:15:45.170169      I2C: 00:32

 1230 17:15:45.173721     PCI: 00:15.1 child on link 0 I2C: 00:10

 1231 17:15:45.183741     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1232 17:15:45.186963      I2C: 00:10

 1233 17:15:45.187045     PCI: 00:15.2

 1234 17:15:45.196912     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1235 17:15:45.200309     PCI: 00:15.3

 1236 17:15:45.210105     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1237 17:15:45.210214     PCI: 00:16.0

 1238 17:15:45.219691     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1239 17:15:45.223294     PCI: 00:19.0

 1240 17:15:45.226391     PCI: 00:19.1 child on link 0 I2C: 00:15

 1241 17:15:45.236522     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1242 17:15:45.239741      I2C: 00:15

 1243 17:15:45.243233     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1244 17:15:45.253315     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1245 17:15:45.259918     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1246 17:15:45.269964     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1247 17:15:45.272896      GENERIC: 0.0

 1248 17:15:45.272973      PCI: 01:00.0

 1249 17:15:45.283101      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1250 17:15:45.292983      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1251 17:15:45.302731      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1252 17:15:45.302850     PCI: 00:1e.0

 1253 17:15:45.316356     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1254 17:15:45.319797     PCI: 00:1e.2 child on link 0 SPI: 00

 1255 17:15:45.329546     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1256 17:15:45.329630      SPI: 00

 1257 17:15:45.336173     PCI: 00:1e.3 child on link 0 SPI: 00

 1258 17:15:45.346433     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1259 17:15:45.346520      SPI: 00

 1260 17:15:45.349455     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1261 17:15:45.359668     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1262 17:15:45.359769      PNP: 0c09.0

 1263 17:15:45.369398      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1264 17:15:45.372662     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1265 17:15:45.382469     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1266 17:15:45.392826     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1267 17:15:45.395934      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1268 17:15:45.399404       GENERIC: 0.0

 1269 17:15:45.399488       GENERIC: 1.0

 1270 17:15:45.402820     PCI: 00:1f.3

 1271 17:15:45.412854     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1272 17:15:45.422754     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1273 17:15:45.422846     PCI: 00:1f.5

 1274 17:15:45.432692     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1275 17:15:45.439377    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1276 17:15:45.439462     APIC: 00

 1277 17:15:45.439528     APIC: 01

 1278 17:15:45.442591     APIC: 03

 1279 17:15:45.442675     APIC: 07

 1280 17:15:45.442740     APIC: 05

 1281 17:15:45.445923     APIC: 04

 1282 17:15:45.446079     APIC: 02

 1283 17:15:45.449008     APIC: 06

 1284 17:15:45.455651  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1285 17:15:45.462273   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1286 17:15:45.465891   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1287 17:15:45.472431   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1288 17:15:45.478933    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1289 17:15:45.482346    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1290 17:15:45.485953    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1291 17:15:45.492689   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1292 17:15:45.499297   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1293 17:15:45.508802   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1294 17:15:45.515810  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1295 17:15:45.522230  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1296 17:15:45.529013   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1297 17:15:45.535217   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1298 17:15:45.545435   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1299 17:15:45.548486   DOMAIN: 0000: Resource ranges:

 1300 17:15:45.552247   * Base: 1000, Size: 800, Tag: 100

 1301 17:15:45.555061   * Base: 1900, Size: e700, Tag: 100

 1302 17:15:45.558633    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1303 17:15:45.565115  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1304 17:15:45.575653  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1305 17:15:45.581963   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1306 17:15:45.588484   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1307 17:15:45.595270   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1308 17:15:45.605140   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1309 17:15:45.611784   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1310 17:15:45.618089   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1311 17:15:45.628055   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1312 17:15:45.635008   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1313 17:15:45.641893   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1314 17:15:45.651440   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1315 17:15:45.658094   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1316 17:15:45.664801   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1317 17:15:45.674942   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1318 17:15:45.681197   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1319 17:15:45.687903   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1320 17:15:45.698065   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1321 17:15:45.704749   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1322 17:15:45.711543   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1323 17:15:45.721121   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1324 17:15:45.727829   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1325 17:15:45.734263   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1326 17:15:45.744421   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1327 17:15:45.747887   DOMAIN: 0000: Resource ranges:

 1328 17:15:45.750784   * Base: 7fc00000, Size: 40400000, Tag: 200

 1329 17:15:45.754335   * Base: d0000000, Size: 28000000, Tag: 200

 1330 17:15:45.760779   * Base: fa000000, Size: 1000000, Tag: 200

 1331 17:15:45.764385   * Base: fb001000, Size: 2fff000, Tag: 200

 1332 17:15:45.767561   * Base: fe010000, Size: 2e000, Tag: 200

 1333 17:15:45.770934   * Base: fe03f000, Size: d41000, Tag: 200

 1334 17:15:45.777537   * Base: fed88000, Size: 8000, Tag: 200

 1335 17:15:45.781188   * Base: fed93000, Size: d000, Tag: 200

 1336 17:15:45.784115   * Base: feda2000, Size: 1e000, Tag: 200

 1337 17:15:45.787725   * Base: fede0000, Size: 1220000, Tag: 200

 1338 17:15:45.794172   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1339 17:15:45.800813    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1340 17:15:45.807325    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1341 17:15:45.814053    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1342 17:15:45.820607    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1343 17:15:45.827307    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1344 17:15:45.834024    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1345 17:15:45.840802    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1346 17:15:45.847463    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1347 17:15:45.853845    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1348 17:15:45.860804    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1349 17:15:45.867225    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1350 17:15:45.873706    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1351 17:15:45.880260    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1352 17:15:45.887075    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1353 17:15:45.893690    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1354 17:15:45.900474    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1355 17:15:45.907007    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1356 17:15:45.913623    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1357 17:15:45.920039    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1358 17:15:45.926765    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1359 17:15:45.933484    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1360 17:15:45.940035    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1361 17:15:45.946873  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1362 17:15:45.956736  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1363 17:15:45.959752   PCI: 00:1d.0: Resource ranges:

 1364 17:15:45.963226   * Base: 7fc00000, Size: 100000, Tag: 200

 1365 17:15:45.969675    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1366 17:15:45.976695    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1367 17:15:45.983401    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1368 17:15:45.990121  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1369 17:15:45.996524  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1370 17:15:46.002964  Root Device assign_resources, bus 0 link: 0

 1371 17:15:46.006697  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 17:15:46.016217  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1373 17:15:46.022876  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1374 17:15:46.032983  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1375 17:15:46.039688  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1376 17:15:46.043143  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1377 17:15:46.049764  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1378 17:15:46.056352  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1379 17:15:46.066478  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1380 17:15:46.073054  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1381 17:15:46.079373  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1382 17:15:46.082912  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1383 17:15:46.092705  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1384 17:15:46.096291  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1385 17:15:46.099960  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1386 17:15:46.109460  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1387 17:15:46.116235  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1388 17:15:46.125754  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1389 17:15:46.129253  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1390 17:15:46.136022  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1391 17:15:46.142712  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1392 17:15:46.145686  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1393 17:15:46.152798  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1394 17:15:46.159017  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1395 17:15:46.165833  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1396 17:15:46.169181  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1397 17:15:46.179089  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1398 17:15:46.185388  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1399 17:15:46.195718  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1400 17:15:46.202381  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1401 17:15:46.205422  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1402 17:15:46.212012  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1403 17:15:46.218835  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1404 17:15:46.228475  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1405 17:15:46.238300  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1406 17:15:46.241921  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1407 17:15:46.251681  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1408 17:15:46.258168  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1409 17:15:46.268403  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1410 17:15:46.271832  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1411 17:15:46.281616  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1412 17:15:46.285168  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1413 17:15:46.288456  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1414 17:15:46.298290  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1415 17:15:46.301561  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1416 17:15:46.307691  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1417 17:15:46.311146  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1418 17:15:46.317791  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1419 17:15:46.320953  LPC: Trying to open IO window from 800 size 1ff

 1420 17:15:46.331078  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1421 17:15:46.337665  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1422 17:15:46.344377  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1423 17:15:46.351004  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1424 17:15:46.354696  Root Device assign_resources, bus 0 link: 0

 1425 17:15:46.357737  Done setting resources.

 1426 17:15:46.364419  Show resources in subtree (Root Device)...After assigning values.

 1427 17:15:46.368050   Root Device child on link 0 DOMAIN: 0000

 1428 17:15:46.374272    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1429 17:15:46.381145    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1430 17:15:46.390843    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1431 17:15:46.394257     PCI: 00:00.0

 1432 17:15:46.404442     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1433 17:15:46.414141     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1434 17:15:46.420722     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1435 17:15:46.431022     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1436 17:15:46.440688     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1437 17:15:46.451021     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1438 17:15:46.460615     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1439 17:15:46.467714     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1440 17:15:46.477302     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1441 17:15:46.487256     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1442 17:15:46.497346     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1443 17:15:46.507438     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1444 17:15:46.517224     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1445 17:15:46.523682     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1446 17:15:46.533466     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1447 17:15:46.543499     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1448 17:15:46.553857     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1449 17:15:46.563791     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1450 17:15:46.573670     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1451 17:15:46.583744     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1452 17:15:46.583836     PCI: 00:02.0

 1453 17:15:46.593457     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1454 17:15:46.606810     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1455 17:15:46.613463     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1456 17:15:46.620044     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1457 17:15:46.629832     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1458 17:15:46.629935      GENERIC: 0.0

 1459 17:15:46.633418     PCI: 00:05.0

 1460 17:15:46.643187     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1461 17:15:46.646249     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1462 17:15:46.650003      GENERIC: 0.0

 1463 17:15:46.650121     PCI: 00:08.0

 1464 17:15:46.663044     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1465 17:15:46.663171     PCI: 00:0a.0

 1466 17:15:46.666041     PCI: 00:0d.0 child on link 0 USB0 port 0

 1467 17:15:46.679710     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1468 17:15:46.682866      USB0 port 0 child on link 0 USB3 port 0

 1469 17:15:46.682952       USB3 port 0

 1470 17:15:46.686535       USB3 port 1

 1471 17:15:46.686636       USB3 port 2

 1472 17:15:46.689495       USB3 port 3

 1473 17:15:46.692983     PCI: 00:14.0 child on link 0 USB0 port 0

 1474 17:15:46.702917     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1475 17:15:46.709387      USB0 port 0 child on link 0 USB2 port 0

 1476 17:15:46.709483       USB2 port 0

 1477 17:15:46.712752       USB2 port 1

 1478 17:15:46.712837       USB2 port 2

 1479 17:15:46.716083       USB2 port 3

 1480 17:15:46.716165       USB2 port 4

 1481 17:15:46.719478       USB2 port 5

 1482 17:15:46.719561       USB2 port 6

 1483 17:15:46.722873       USB2 port 7

 1484 17:15:46.726165       USB2 port 8

 1485 17:15:46.726305       USB2 port 9

 1486 17:15:46.729600       USB3 port 0

 1487 17:15:46.729684       USB3 port 1

 1488 17:15:46.732960       USB3 port 2

 1489 17:15:46.733051       USB3 port 3

 1490 17:15:46.735982     PCI: 00:14.2

 1491 17:15:46.746281     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1492 17:15:46.755772     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1493 17:15:46.759284     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1494 17:15:46.769319     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1495 17:15:46.772408      GENERIC: 0.0

 1496 17:15:46.776032     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1497 17:15:46.786083     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1498 17:15:46.789049      I2C: 00:1a

 1499 17:15:46.789163      I2C: 00:31

 1500 17:15:46.792875      I2C: 00:32

 1501 17:15:46.795793     PCI: 00:15.1 child on link 0 I2C: 00:10

 1502 17:15:46.806086     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1503 17:15:46.809094      I2C: 00:10

 1504 17:15:46.809182     PCI: 00:15.2

 1505 17:15:46.819221     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1506 17:15:46.822592     PCI: 00:15.3

 1507 17:15:46.832186     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1508 17:15:46.832330     PCI: 00:16.0

 1509 17:15:46.842770     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1510 17:15:46.845634     PCI: 00:19.0

 1511 17:15:46.849202     PCI: 00:19.1 child on link 0 I2C: 00:15

 1512 17:15:46.859269     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1513 17:15:46.862248      I2C: 00:15

 1514 17:15:46.865883     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1515 17:15:46.875528     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1516 17:15:46.885612     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1517 17:15:46.898867     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1518 17:15:46.898972      GENERIC: 0.0

 1519 17:15:46.902406      PCI: 01:00.0

 1520 17:15:46.912026      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1521 17:15:46.921979      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1522 17:15:46.932250      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1523 17:15:46.935225     PCI: 00:1e.0

 1524 17:15:46.945357     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1525 17:15:46.948652     PCI: 00:1e.2 child on link 0 SPI: 00

 1526 17:15:46.958777     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1527 17:15:46.961667      SPI: 00

 1528 17:15:46.965431     PCI: 00:1e.3 child on link 0 SPI: 00

 1529 17:15:46.975111     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1530 17:15:46.975203      SPI: 00

 1531 17:15:46.981733     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1532 17:15:46.988293     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1533 17:15:46.992030      PNP: 0c09.0

 1534 17:15:46.998658      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1535 17:15:47.005398     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1536 17:15:47.014995     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1537 17:15:47.021739     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1538 17:15:47.028304      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1539 17:15:47.028423       GENERIC: 0.0

 1540 17:15:47.031843       GENERIC: 1.0

 1541 17:15:47.031925     PCI: 00:1f.3

 1542 17:15:47.044796     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1543 17:15:47.055024     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1544 17:15:47.055166     PCI: 00:1f.5

 1545 17:15:47.065071     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1546 17:15:47.071542    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1547 17:15:47.071631     APIC: 00

 1548 17:15:47.071700     APIC: 01

 1549 17:15:47.074677     APIC: 03

 1550 17:15:47.074762     APIC: 07

 1551 17:15:47.078264     APIC: 05

 1552 17:15:47.078367     APIC: 04

 1553 17:15:47.078463     APIC: 02

 1554 17:15:47.081273     APIC: 06

 1555 17:15:47.084794  Done allocating resources.

 1556 17:15:47.087966  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1557 17:15:47.095034  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1558 17:15:47.098167  Configure GPIOs for I2S audio on UP4.

 1559 17:15:47.106011  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1560 17:15:47.109011  Enabling resources...

 1561 17:15:47.112452  PCI: 00:00.0 subsystem <- 8086/9a12

 1562 17:15:47.115394  PCI: 00:00.0 cmd <- 06

 1563 17:15:47.119001  PCI: 00:02.0 subsystem <- 8086/9a40

 1564 17:15:47.121990  PCI: 00:02.0 cmd <- 03

 1565 17:15:47.125554  PCI: 00:04.0 subsystem <- 8086/9a03

 1566 17:15:47.128888  PCI: 00:04.0 cmd <- 02

 1567 17:15:47.131997  PCI: 00:05.0 subsystem <- 8086/9a19

 1568 17:15:47.132109  PCI: 00:05.0 cmd <- 02

 1569 17:15:47.138679  PCI: 00:08.0 subsystem <- 8086/9a11

 1570 17:15:47.138788  PCI: 00:08.0 cmd <- 06

 1571 17:15:47.144946  PCI: 00:0d.0 subsystem <- 8086/9a13

 1572 17:15:47.145037  PCI: 00:0d.0 cmd <- 02

 1573 17:15:47.148236  PCI: 00:14.0 subsystem <- 8086/a0ed

 1574 17:15:47.151832  PCI: 00:14.0 cmd <- 02

 1575 17:15:47.155137  PCI: 00:14.2 subsystem <- 8086/a0ef

 1576 17:15:47.157970  PCI: 00:14.2 cmd <- 02

 1577 17:15:47.161413  PCI: 00:14.3 subsystem <- 8086/a0f0

 1578 17:15:47.164749  PCI: 00:14.3 cmd <- 02

 1579 17:15:47.168136  PCI: 00:15.0 subsystem <- 8086/a0e8

 1580 17:15:47.171765  PCI: 00:15.0 cmd <- 02

 1581 17:15:47.174804  PCI: 00:15.1 subsystem <- 8086/a0e9

 1582 17:15:47.178485  PCI: 00:15.1 cmd <- 02

 1583 17:15:47.181676  PCI: 00:15.2 subsystem <- 8086/a0ea

 1584 17:15:47.181785  PCI: 00:15.2 cmd <- 02

 1585 17:15:47.188431  PCI: 00:15.3 subsystem <- 8086/a0eb

 1586 17:15:47.188525  PCI: 00:15.3 cmd <- 02

 1587 17:15:47.191590  PCI: 00:16.0 subsystem <- 8086/a0e0

 1588 17:15:47.195169  PCI: 00:16.0 cmd <- 02

 1589 17:15:47.198378  PCI: 00:19.1 subsystem <- 8086/a0c6

 1590 17:15:47.201419  PCI: 00:19.1 cmd <- 02

 1591 17:15:47.204478  PCI: 00:1d.0 bridge ctrl <- 0013

 1592 17:15:47.208147  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1593 17:15:47.211188  PCI: 00:1d.0 cmd <- 06

 1594 17:15:47.214767  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1595 17:15:47.218258  PCI: 00:1e.0 cmd <- 06

 1596 17:15:47.221151  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1597 17:15:47.224717  PCI: 00:1e.2 cmd <- 06

 1598 17:15:47.227730  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1599 17:15:47.231460  PCI: 00:1e.3 cmd <- 02

 1600 17:15:47.234333  PCI: 00:1f.0 subsystem <- 8086/a087

 1601 17:15:47.237389  PCI: 00:1f.0 cmd <- 407

 1602 17:15:47.241066  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1603 17:15:47.241154  PCI: 00:1f.3 cmd <- 02

 1604 17:15:47.247826  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1605 17:15:47.247915  PCI: 00:1f.5 cmd <- 406

 1606 17:15:47.252966  PCI: 01:00.0 cmd <- 02

 1607 17:15:47.257325  done.

 1608 17:15:47.260829  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1609 17:15:47.264156  Initializing devices...

 1610 17:15:47.267110  Root Device init

 1611 17:15:47.270525  Chrome EC: Set SMI mask to 0x0000000000000000

 1612 17:15:47.277341  Chrome EC: clear events_b mask to 0x0000000000000000

 1613 17:15:47.283810  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1614 17:15:47.287233  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1615 17:15:47.293887  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1616 17:15:47.300457  Chrome EC: Set WAKE mask to 0x0000000000000000

 1617 17:15:47.303429  fw_config match found: DB_USB=USB3_ACTIVE

 1618 17:15:47.310065  Configure Right Type-C port orientation for retimer

 1619 17:15:47.313651  Root Device init finished in 42 msecs

 1620 17:15:47.316687  PCI: 00:00.0 init

 1621 17:15:47.320422  CPU TDP = 9 Watts

 1622 17:15:47.320508  CPU PL1 = 9 Watts

 1623 17:15:47.323772  CPU PL2 = 40 Watts

 1624 17:15:47.323862  CPU PL4 = 83 Watts

 1625 17:15:47.326737  PCI: 00:00.0 init finished in 8 msecs

 1626 17:15:47.330251  PCI: 00:02.0 init

 1627 17:15:47.333834  GMA: Found VBT in CBFS

 1628 17:15:47.336800  GMA: Found valid VBT in CBFS

 1629 17:15:47.340379  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1630 17:15:47.350119                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1631 17:15:47.353164  PCI: 00:02.0 init finished in 18 msecs

 1632 17:15:47.356786  PCI: 00:05.0 init

 1633 17:15:47.360060  PCI: 00:05.0 init finished in 0 msecs

 1634 17:15:47.360193  PCI: 00:08.0 init

 1635 17:15:47.366648  PCI: 00:08.0 init finished in 0 msecs

 1636 17:15:47.366753  PCI: 00:14.0 init

 1637 17:15:47.373410  PCI: 00:14.0 init finished in 0 msecs

 1638 17:15:47.373506  PCI: 00:14.2 init

 1639 17:15:47.376768  PCI: 00:14.2 init finished in 0 msecs

 1640 17:15:47.380173  PCI: 00:15.0 init

 1641 17:15:47.383584  I2C bus 0 version 0x3230302a

 1642 17:15:47.386913  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1643 17:15:47.390438  PCI: 00:15.0 init finished in 6 msecs

 1644 17:15:47.393903  PCI: 00:15.1 init

 1645 17:15:47.396959  I2C bus 1 version 0x3230302a

 1646 17:15:47.400234  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1647 17:15:47.403796  PCI: 00:15.1 init finished in 6 msecs

 1648 17:15:47.406633  PCI: 00:15.2 init

 1649 17:15:47.410297  I2C bus 2 version 0x3230302a

 1650 17:15:47.413359  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1651 17:15:47.416994  PCI: 00:15.2 init finished in 6 msecs

 1652 17:15:47.417081  PCI: 00:15.3 init

 1653 17:15:47.420167  I2C bus 3 version 0x3230302a

 1654 17:15:47.423754  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1655 17:15:47.430155  PCI: 00:15.3 init finished in 6 msecs

 1656 17:15:47.430244  PCI: 00:16.0 init

 1657 17:15:47.433066  PCI: 00:16.0 init finished in 0 msecs

 1658 17:15:47.437385  PCI: 00:19.1 init

 1659 17:15:47.440247  I2C bus 5 version 0x3230302a

 1660 17:15:47.443741  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1661 17:15:47.446917  PCI: 00:19.1 init finished in 6 msecs

 1662 17:15:47.450662  PCI: 00:1d.0 init

 1663 17:15:47.453880  Initializing PCH PCIe bridge.

 1664 17:15:47.456912  PCI: 00:1d.0 init finished in 3 msecs

 1665 17:15:47.460765  PCI: 00:1f.0 init

 1666 17:15:47.463532  IOAPIC: Initializing IOAPIC at 0xfec00000

 1667 17:15:47.470437  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1668 17:15:47.470525  IOAPIC: ID = 0x02

 1669 17:15:47.474112  IOAPIC: Dumping registers

 1670 17:15:47.477471    reg 0x0000: 0x02000000

 1671 17:15:47.477556    reg 0x0001: 0x00770020

 1672 17:15:47.480231    reg 0x0002: 0x00000000

 1673 17:15:47.483875  PCI: 00:1f.0 init finished in 21 msecs

 1674 17:15:47.487007  PCI: 00:1f.2 init

 1675 17:15:47.490355  Disabling ACPI via APMC.

 1676 17:15:47.494439  APMC done.

 1677 17:15:47.497241  PCI: 00:1f.2 init finished in 6 msecs

 1678 17:15:47.509086  PCI: 01:00.0 init

 1679 17:15:47.512552  PCI: 01:00.0 init finished in 0 msecs

 1680 17:15:47.516204  PNP: 0c09.0 init

 1681 17:15:47.519369  Google Chrome EC uptime: 8.400 seconds

 1682 17:15:47.526102  Google Chrome AP resets since EC boot: 1

 1683 17:15:47.528861  Google Chrome most recent AP reset causes:

 1684 17:15:47.532210  	0.348: 32775 shutdown: entering G3

 1685 17:15:47.538789  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1686 17:15:47.542357  PNP: 0c09.0 init finished in 22 msecs

 1687 17:15:47.547826  Devices initialized

 1688 17:15:47.551708  Show all devs... After init.

 1689 17:15:47.554614  Root Device: enabled 1

 1690 17:15:47.554753  DOMAIN: 0000: enabled 1

 1691 17:15:47.557857  CPU_CLUSTER: 0: enabled 1

 1692 17:15:47.561373  PCI: 00:00.0: enabled 1

 1693 17:15:47.564391  PCI: 00:02.0: enabled 1

 1694 17:15:47.564478  PCI: 00:04.0: enabled 1

 1695 17:15:47.568048  PCI: 00:05.0: enabled 1

 1696 17:15:47.571071  PCI: 00:06.0: enabled 0

 1697 17:15:47.574804  PCI: 00:07.0: enabled 0

 1698 17:15:47.574889  PCI: 00:07.1: enabled 0

 1699 17:15:47.578051  PCI: 00:07.2: enabled 0

 1700 17:15:47.580967  PCI: 00:07.3: enabled 0

 1701 17:15:47.584523  PCI: 00:08.0: enabled 1

 1702 17:15:47.584625  PCI: 00:09.0: enabled 0

 1703 17:15:47.587829  PCI: 00:0a.0: enabled 0

 1704 17:15:47.591277  PCI: 00:0d.0: enabled 1

 1705 17:15:47.594679  PCI: 00:0d.1: enabled 0

 1706 17:15:47.594765  PCI: 00:0d.2: enabled 0

 1707 17:15:47.598180  PCI: 00:0d.3: enabled 0

 1708 17:15:47.601328  PCI: 00:0e.0: enabled 0

 1709 17:15:47.601414  PCI: 00:10.2: enabled 1

 1710 17:15:47.604952  PCI: 00:10.6: enabled 0

 1711 17:15:47.607800  PCI: 00:10.7: enabled 0

 1712 17:15:47.611123  PCI: 00:12.0: enabled 0

 1713 17:15:47.611248  PCI: 00:12.6: enabled 0

 1714 17:15:47.614723  PCI: 00:13.0: enabled 0

 1715 17:15:47.617726  PCI: 00:14.0: enabled 1

 1716 17:15:47.621368  PCI: 00:14.1: enabled 0

 1717 17:15:47.621463  PCI: 00:14.2: enabled 1

 1718 17:15:47.624509  PCI: 00:14.3: enabled 1

 1719 17:15:47.627649  PCI: 00:15.0: enabled 1

 1720 17:15:47.631366  PCI: 00:15.1: enabled 1

 1721 17:15:47.631466  PCI: 00:15.2: enabled 1

 1722 17:15:47.634797  PCI: 00:15.3: enabled 1

 1723 17:15:47.638088  PCI: 00:16.0: enabled 1

 1724 17:15:47.638203  PCI: 00:16.1: enabled 0

 1725 17:15:47.640924  PCI: 00:16.2: enabled 0

 1726 17:15:47.644711  PCI: 00:16.3: enabled 0

 1727 17:15:47.647596  PCI: 00:16.4: enabled 0

 1728 17:15:47.647685  PCI: 00:16.5: enabled 0

 1729 17:15:47.651078  PCI: 00:17.0: enabled 0

 1730 17:15:47.654273  PCI: 00:19.0: enabled 0

 1731 17:15:47.657876  PCI: 00:19.1: enabled 1

 1732 17:15:47.657971  PCI: 00:19.2: enabled 0

 1733 17:15:47.660954  PCI: 00:1c.0: enabled 1

 1734 17:15:47.664685  PCI: 00:1c.1: enabled 0

 1735 17:15:47.667573  PCI: 00:1c.2: enabled 0

 1736 17:15:47.667648  PCI: 00:1c.3: enabled 0

 1737 17:15:47.671198  PCI: 00:1c.4: enabled 0

 1738 17:15:47.674223  PCI: 00:1c.5: enabled 0

 1739 17:15:47.674307  PCI: 00:1c.6: enabled 1

 1740 17:15:47.677405  PCI: 00:1c.7: enabled 0

 1741 17:15:47.680891  PCI: 00:1d.0: enabled 1

 1742 17:15:47.684256  PCI: 00:1d.1: enabled 0

 1743 17:15:47.684349  PCI: 00:1d.2: enabled 1

 1744 17:15:47.687878  PCI: 00:1d.3: enabled 0

 1745 17:15:47.690640  PCI: 00:1e.0: enabled 1

 1746 17:15:47.694081  PCI: 00:1e.1: enabled 0

 1747 17:15:47.694165  PCI: 00:1e.2: enabled 1

 1748 17:15:47.697791  PCI: 00:1e.3: enabled 1

 1749 17:15:47.701232  PCI: 00:1f.0: enabled 1

 1750 17:15:47.703951  PCI: 00:1f.1: enabled 0

 1751 17:15:47.704041  PCI: 00:1f.2: enabled 1

 1752 17:15:47.707241  PCI: 00:1f.3: enabled 1

 1753 17:15:47.710777  PCI: 00:1f.4: enabled 0

 1754 17:15:47.714155  PCI: 00:1f.5: enabled 1

 1755 17:15:47.714261  PCI: 00:1f.6: enabled 0

 1756 17:15:47.717426  PCI: 00:1f.7: enabled 0

 1757 17:15:47.720971  APIC: 00: enabled 1

 1758 17:15:47.721087  GENERIC: 0.0: enabled 1

 1759 17:15:47.724047  GENERIC: 0.0: enabled 1

 1760 17:15:47.727639  GENERIC: 1.0: enabled 1

 1761 17:15:47.730645  GENERIC: 0.0: enabled 1

 1762 17:15:47.730757  GENERIC: 1.0: enabled 1

 1763 17:15:47.734280  USB0 port 0: enabled 1

 1764 17:15:47.737263  GENERIC: 0.0: enabled 1

 1765 17:15:47.737375  USB0 port 0: enabled 1

 1766 17:15:47.740724  GENERIC: 0.0: enabled 1

 1767 17:15:47.744090  I2C: 00:1a: enabled 1

 1768 17:15:47.747166  I2C: 00:31: enabled 1

 1769 17:15:47.747269  I2C: 00:32: enabled 1

 1770 17:15:47.750735  I2C: 00:10: enabled 1

 1771 17:15:47.754165  I2C: 00:15: enabled 1

 1772 17:15:47.754276  GENERIC: 0.0: enabled 0

 1773 17:15:47.757346  GENERIC: 1.0: enabled 0

 1774 17:15:47.760487  GENERIC: 0.0: enabled 1

 1775 17:15:47.760590  SPI: 00: enabled 1

 1776 17:15:47.764042  SPI: 00: enabled 1

 1777 17:15:47.767077  PNP: 0c09.0: enabled 1

 1778 17:15:47.767179  GENERIC: 0.0: enabled 1

 1779 17:15:47.770729  USB3 port 0: enabled 1

 1780 17:15:47.773839  USB3 port 1: enabled 1

 1781 17:15:47.773928  USB3 port 2: enabled 0

 1782 17:15:47.777450  USB3 port 3: enabled 0

 1783 17:15:47.780480  USB2 port 0: enabled 0

 1784 17:15:47.784009  USB2 port 1: enabled 1

 1785 17:15:47.784096  USB2 port 2: enabled 1

 1786 17:15:47.787286  USB2 port 3: enabled 0

 1787 17:15:47.790705  USB2 port 4: enabled 1

 1788 17:15:47.790791  USB2 port 5: enabled 0

 1789 17:15:47.793734  USB2 port 6: enabled 0

 1790 17:15:47.797275  USB2 port 7: enabled 0

 1791 17:15:47.800453  USB2 port 8: enabled 0

 1792 17:15:47.800539  USB2 port 9: enabled 0

 1793 17:15:47.804171  USB3 port 0: enabled 0

 1794 17:15:47.807386  USB3 port 1: enabled 1

 1795 17:15:47.807473  USB3 port 2: enabled 0

 1796 17:15:47.810295  USB3 port 3: enabled 0

 1797 17:15:47.813787  GENERIC: 0.0: enabled 1

 1798 17:15:47.817392  GENERIC: 1.0: enabled 1

 1799 17:15:47.817501  APIC: 01: enabled 1

 1800 17:15:47.820226  APIC: 03: enabled 1

 1801 17:15:47.820334  APIC: 07: enabled 1

 1802 17:15:47.823607  APIC: 05: enabled 1

 1803 17:15:47.826947  APIC: 04: enabled 1

 1804 17:15:47.827050  APIC: 02: enabled 1

 1805 17:15:47.830672  APIC: 06: enabled 1

 1806 17:15:47.833827  PCI: 01:00.0: enabled 1

 1807 17:15:47.836848  BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms

 1808 17:15:47.843946  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1809 17:15:47.846891  ELOG: NV offset 0xf30000 size 0x1000

 1810 17:15:47.854062  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1811 17:15:47.860619  ELOG: Event(17) added with size 13 at 2023-06-09 17:15:47 UTC

 1812 17:15:47.866714  ELOG: Event(92) added with size 9 at 2023-06-09 17:15:47 UTC

 1813 17:15:47.873482  ELOG: Event(93) added with size 9 at 2023-06-09 17:15:47 UTC

 1814 17:15:47.880148  ELOG: Event(9E) added with size 10 at 2023-06-09 17:15:47 UTC

 1815 17:15:47.886708  ELOG: Event(9F) added with size 14 at 2023-06-09 17:15:47 UTC

 1816 17:15:47.893281  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1817 17:15:47.896562  ELOG: Event(A1) added with size 10 at 2023-06-09 17:15:47 UTC

 1818 17:15:47.903314  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

 1819 17:15:47.909872  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1820 17:15:47.913422  Finalize devices...

 1821 17:15:47.913502  Devices finalized

 1822 17:15:47.919583  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1823 17:15:47.922994  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1824 17:15:47.929899  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1825 17:15:47.936534  ME: HFSTS1                      : 0x80030055

 1826 17:15:47.939952  ME: HFSTS2                      : 0x30280116

 1827 17:15:47.943027  ME: HFSTS3                      : 0x00000050

 1828 17:15:47.949547  ME: HFSTS4                      : 0x00004000

 1829 17:15:47.953085  ME: HFSTS5                      : 0x00000000

 1830 17:15:47.956208  ME: HFSTS6                      : 0x00400006

 1831 17:15:47.959856  ME: Manufacturing Mode          : YES

 1832 17:15:47.966385  ME: SPI Protection Mode Enabled : NO

 1833 17:15:47.969542  ME: FW Partition Table          : OK

 1834 17:15:47.973189  ME: Bringup Loader Failure      : NO

 1835 17:15:47.976293  ME: Firmware Init Complete      : NO

 1836 17:15:47.979255  ME: Boot Options Present        : NO

 1837 17:15:47.983121  ME: Update In Progress          : NO

 1838 17:15:47.986184  ME: D0i3 Support                : YES

 1839 17:15:47.989700  ME: Low Power State Enabled     : NO

 1840 17:15:47.996259  ME: CPU Replaced                : YES

 1841 17:15:47.999311  ME: CPU Replacement Valid       : YES

 1842 17:15:48.002753  ME: Current Working State       : 5

 1843 17:15:48.006001  ME: Current Operation State     : 1

 1844 17:15:48.009290  ME: Current Operation Mode      : 3

 1845 17:15:48.012757  ME: Error Code                  : 0

 1846 17:15:48.016232  ME: Enhanced Debug Mode         : NO

 1847 17:15:48.019231  ME: CPU Debug Disabled          : YES

 1848 17:15:48.022466  ME: TXT Support                 : NO

 1849 17:15:48.029152  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1850 17:15:48.039276  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1851 17:15:48.042237  CBFS: 'fallback/slic' not found.

 1852 17:15:48.045870  ACPI: Writing ACPI tables at 76b01000.

 1853 17:15:48.045952  ACPI:    * FACS

 1854 17:15:48.048925  ACPI:    * DSDT

 1855 17:15:48.052515  Ramoops buffer: 0x100000@0x76a00000.

 1856 17:15:48.055505  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1857 17:15:48.062058  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1858 17:15:48.065643  Google Chrome EC: version:

 1859 17:15:48.068684  	ro: voema_v2.0.7540-147f8d37d1

 1860 17:15:48.072350  	rw: voema_v2.0.7540-147f8d37d1

 1861 17:15:48.072435    running image: 2

 1862 17:15:48.079130  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1863 17:15:48.083844  ACPI:    * FADT

 1864 17:15:48.083936  SCI is IRQ9

 1865 17:15:48.090648  ACPI: added table 1/32, length now 40

 1866 17:15:48.090734  ACPI:     * SSDT

 1867 17:15:48.093657  Found 1 CPU(s) with 8 core(s) each.

 1868 17:15:48.100351  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1869 17:15:48.104150  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1870 17:15:48.107100  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1871 17:15:48.110527  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1872 17:15:48.117163  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1873 17:15:48.123733  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1874 17:15:48.127173  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1875 17:15:48.134077  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1876 17:15:48.140455  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1877 17:15:48.143684  \_SB.PCI0.RP09: Added StorageD3Enable property

 1878 17:15:48.147105  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1879 17:15:48.153706  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1880 17:15:48.160152  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1881 17:15:48.163839  PS2K: Passing 80 keymaps to kernel

 1882 17:15:48.170358  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1883 17:15:48.177047  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1884 17:15:48.183656  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1885 17:15:48.190442  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1886 17:15:48.196638  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1887 17:15:48.203297  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1888 17:15:48.210148  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1889 17:15:48.216690  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1890 17:15:48.219674  ACPI: added table 2/32, length now 44

 1891 17:15:48.219809  ACPI:    * MCFG

 1892 17:15:48.226474  ACPI: added table 3/32, length now 48

 1893 17:15:48.226599  ACPI:    * TPM2

 1894 17:15:48.230119  TPM2 log created at 0x769f0000

 1895 17:15:48.232992  ACPI: added table 4/32, length now 52

 1896 17:15:48.236438  ACPI:    * MADT

 1897 17:15:48.236524  SCI is IRQ9

 1898 17:15:48.240003  ACPI: added table 5/32, length now 56

 1899 17:15:48.243313  current = 76b09850

 1900 17:15:48.243401  ACPI:    * DMAR

 1901 17:15:48.246235  ACPI: added table 6/32, length now 60

 1902 17:15:48.253252  ACPI: added table 7/32, length now 64

 1903 17:15:48.253342  ACPI:    * HPET

 1904 17:15:48.256422  ACPI: added table 8/32, length now 68

 1905 17:15:48.259804  ACPI: done.

 1906 17:15:48.259895  ACPI tables: 35216 bytes.

 1907 17:15:48.262946  smbios_write_tables: 769ef000

 1908 17:15:48.266387  EC returned error result code 3

 1909 17:15:48.269504  Couldn't obtain OEM name from CBI

 1910 17:15:48.274800  Create SMBIOS type 16

 1911 17:15:48.277862  Create SMBIOS type 17

 1912 17:15:48.281449  GENERIC: 0.0 (WIFI Device)

 1913 17:15:48.281532  SMBIOS tables: 1750 bytes.

 1914 17:15:48.288228  Writing table forward entry at 0x00000500

 1915 17:15:48.294320  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1916 17:15:48.298029  Writing coreboot table at 0x76b25000

 1917 17:15:48.304583   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1918 17:15:48.307690   1. 0000000000001000-000000000009ffff: RAM

 1919 17:15:48.311221   2. 00000000000a0000-00000000000fffff: RESERVED

 1920 17:15:48.317870   3. 0000000000100000-00000000769eefff: RAM

 1921 17:15:48.320942   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1922 17:15:48.327531   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1923 17:15:48.334471   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1924 17:15:48.337777   7. 0000000077000000-000000007fbfffff: RESERVED

 1925 17:15:48.340729   8. 00000000c0000000-00000000cfffffff: RESERVED

 1926 17:15:48.347602   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1927 17:15:48.351099  10. 00000000fb000000-00000000fb000fff: RESERVED

 1928 17:15:48.357556  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1929 17:15:48.361047  12. 00000000fed80000-00000000fed87fff: RESERVED

 1930 17:15:48.367472  13. 00000000fed90000-00000000fed92fff: RESERVED

 1931 17:15:48.370864  14. 00000000feda0000-00000000feda1fff: RESERVED

 1932 17:15:48.377971  15. 00000000fedc0000-00000000feddffff: RESERVED

 1933 17:15:48.380779  16. 0000000100000000-00000002803fffff: RAM

 1934 17:15:48.384428  Passing 4 GPIOs to payload:

 1935 17:15:48.387321              NAME |       PORT | POLARITY |     VALUE

 1936 17:15:48.394155               lid |  undefined |     high |      high

 1937 17:15:48.397755             power |  undefined |     high |       low

 1938 17:15:48.404394             oprom |  undefined |     high |       low

 1939 17:15:48.410477          EC in RW | 0x000000e5 |     high |      high

 1940 17:15:48.417259  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 1b4c

 1941 17:15:48.417377  coreboot table: 1576 bytes.

 1942 17:15:48.424553  IMD ROOT    0. 0x76fff000 0x00001000

 1943 17:15:48.427751  IMD SMALL   1. 0x76ffe000 0x00001000

 1944 17:15:48.430555  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1945 17:15:48.434186  VPD         3. 0x76c4d000 0x00000367

 1946 17:15:48.437244  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1947 17:15:48.440648  CONSOLE     5. 0x76c2c000 0x00020000

 1948 17:15:48.443975  FMAP        6. 0x76c2b000 0x00000578

 1949 17:15:48.447327  TIME STAMP  7. 0x76c2a000 0x00000910

 1950 17:15:48.450389  VBOOT WORK  8. 0x76c16000 0x00014000

 1951 17:15:48.457289  ROMSTG STCK 9. 0x76c15000 0x00001000

 1952 17:15:48.460462  AFTER CAR  10. 0x76c0a000 0x0000b000

 1953 17:15:48.463969  RAMSTAGE   11. 0x76b97000 0x00073000

 1954 17:15:48.467408  REFCODE    12. 0x76b42000 0x00055000

 1955 17:15:48.470394  SMM BACKUP 13. 0x76b32000 0x00010000

 1956 17:15:48.473932  4f444749   14. 0x76b30000 0x00002000

 1957 17:15:48.477384  EXT VBT15. 0x76b2d000 0x0000219f

 1958 17:15:48.480677  COREBOOT   16. 0x76b25000 0x00008000

 1959 17:15:48.483673  ACPI       17. 0x76b01000 0x00024000

 1960 17:15:48.490883  ACPI GNVS  18. 0x76b00000 0x00001000

 1961 17:15:48.493944  RAMOOPS    19. 0x76a00000 0x00100000

 1962 17:15:48.496982  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1963 17:15:48.500732  SMBIOS     21. 0x769ef000 0x00000800

 1964 17:15:48.503729  IMD small region:

 1965 17:15:48.507479    IMD ROOT    0. 0x76ffec00 0x00000400

 1966 17:15:48.510347    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1967 17:15:48.514090    POWER STATE 2. 0x76ffeb80 0x00000044

 1968 17:15:48.517116    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1969 17:15:48.520777    MEM INFO    4. 0x76ffe980 0x000001e0

 1970 17:15:48.526871  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1971 17:15:48.530481  MTRR: Physical address space:

 1972 17:15:48.537217  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1973 17:15:48.543731  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1974 17:15:48.550042  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1975 17:15:48.556956  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1976 17:15:48.563312  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1977 17:15:48.566741  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1978 17:15:48.573444  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1979 17:15:48.580003  MTRR: Fixed MSR 0x250 0x0606060606060606

 1980 17:15:48.583547  MTRR: Fixed MSR 0x258 0x0606060606060606

 1981 17:15:48.586759  MTRR: Fixed MSR 0x259 0x0000000000000000

 1982 17:15:48.590256  MTRR: Fixed MSR 0x268 0x0606060606060606

 1983 17:15:48.593702  MTRR: Fixed MSR 0x269 0x0606060606060606

 1984 17:15:48.599631  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1985 17:15:48.603312  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1986 17:15:48.606565  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1987 17:15:48.609645  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1988 17:15:48.616343  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1989 17:15:48.619975  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1990 17:15:48.622962  call enable_fixed_mtrr()

 1991 17:15:48.626695  CPU physical address size: 39 bits

 1992 17:15:48.629836  MTRR: default type WB/UC MTRR counts: 6/6.

 1993 17:15:48.633323  MTRR: UC selected as default type.

 1994 17:15:48.639478  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1995 17:15:48.646148  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1996 17:15:48.653343  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1997 17:15:48.659666  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1998 17:15:48.666116  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1999 17:15:48.673029  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 2000 17:15:48.673155  

 2001 17:15:48.676401  MTRR check

 2002 17:15:48.676514  Fixed MTRRs   : Enabled

 2003 17:15:48.679251  Variable MTRRs: Enabled

 2004 17:15:48.679365  

 2005 17:15:48.682561  MTRR: Fixed MSR 0x250 0x0606060606060606

 2006 17:15:48.689465  MTRR: Fixed MSR 0x258 0x0606060606060606

 2007 17:15:48.692898  MTRR: Fixed MSR 0x259 0x0000000000000000

 2008 17:15:48.696263  MTRR: Fixed MSR 0x268 0x0606060606060606

 2009 17:15:48.699147  MTRR: Fixed MSR 0x269 0x0606060606060606

 2010 17:15:48.705713  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2011 17:15:48.709423  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2012 17:15:48.712522  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2013 17:15:48.716237  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2014 17:15:48.719194  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2015 17:15:48.725840  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2016 17:15:48.732587  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2017 17:15:48.736181  call enable_fixed_mtrr()

 2018 17:15:48.739830  Checking cr50 for pending updates

 2019 17:15:48.739916  CPU physical address size: 39 bits

 2020 17:15:48.746517  MTRR: Fixed MSR 0x250 0x0606060606060606

 2021 17:15:48.749974  MTRR: Fixed MSR 0x250 0x0606060606060606

 2022 17:15:48.753008  MTRR: Fixed MSR 0x258 0x0606060606060606

 2023 17:15:48.756608  MTRR: Fixed MSR 0x259 0x0000000000000000

 2024 17:15:48.763107  MTRR: Fixed MSR 0x268 0x0606060606060606

 2025 17:15:48.766508  MTRR: Fixed MSR 0x269 0x0606060606060606

 2026 17:15:48.770059  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2027 17:15:48.772966  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2028 17:15:48.779641  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2029 17:15:48.782838  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2030 17:15:48.786498  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2031 17:15:48.789981  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2032 17:15:48.797025  MTRR: Fixed MSR 0x258 0x0606060606060606

 2033 17:15:48.797148  call enable_fixed_mtrr()

 2034 17:15:48.803341  MTRR: Fixed MSR 0x259 0x0000000000000000

 2035 17:15:48.806953  MTRR: Fixed MSR 0x268 0x0606060606060606

 2036 17:15:48.809956  MTRR: Fixed MSR 0x269 0x0606060606060606

 2037 17:15:48.813672  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2038 17:15:48.819896  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2039 17:15:48.823692  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2040 17:15:48.826686  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2041 17:15:48.830300  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2042 17:15:48.836484  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2043 17:15:48.839969  CPU physical address size: 39 bits

 2044 17:15:48.843753  call enable_fixed_mtrr()

 2045 17:15:48.846717  MTRR: Fixed MSR 0x250 0x0606060606060606

 2046 17:15:48.849774  MTRR: Fixed MSR 0x250 0x0606060606060606

 2047 17:15:48.856825  MTRR: Fixed MSR 0x258 0x0606060606060606

 2048 17:15:48.859841  MTRR: Fixed MSR 0x259 0x0000000000000000

 2049 17:15:48.863604  MTRR: Fixed MSR 0x268 0x0606060606060606

 2050 17:15:48.866452  MTRR: Fixed MSR 0x269 0x0606060606060606

 2051 17:15:48.873370  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2052 17:15:48.876275  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2053 17:15:48.879726  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2054 17:15:48.883345  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2055 17:15:48.889892  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2056 17:15:48.892918  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2057 17:15:48.896553  MTRR: Fixed MSR 0x258 0x0606060606060606

 2058 17:15:48.899838  call enable_fixed_mtrr()

 2059 17:15:48.903235  MTRR: Fixed MSR 0x259 0x0000000000000000

 2060 17:15:48.909597  MTRR: Fixed MSR 0x268 0x0606060606060606

 2061 17:15:48.913032  MTRR: Fixed MSR 0x269 0x0606060606060606

 2062 17:15:48.916158  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2063 17:15:48.919732  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2064 17:15:48.926324  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2065 17:15:48.929391  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2066 17:15:48.933117  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2067 17:15:48.936225  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2068 17:15:48.939843  CPU physical address size: 39 bits

 2069 17:15:48.947826  call enable_fixed_mtrr()

 2070 17:15:48.947917  Reading cr50 TPM mode

 2071 17:15:48.951525  CPU physical address size: 39 bits

 2072 17:15:48.954665  MTRR: Fixed MSR 0x250 0x0606060606060606

 2073 17:15:48.958160  MTRR: Fixed MSR 0x250 0x0606060606060606

 2074 17:15:48.964790  MTRR: Fixed MSR 0x258 0x0606060606060606

 2075 17:15:48.967874  MTRR: Fixed MSR 0x259 0x0000000000000000

 2076 17:15:48.970968  MTRR: Fixed MSR 0x268 0x0606060606060606

 2077 17:15:48.974441  MTRR: Fixed MSR 0x269 0x0606060606060606

 2078 17:15:48.981093  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2079 17:15:48.984510  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2080 17:15:48.988129  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2081 17:15:48.991006  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2082 17:15:48.997548  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2083 17:15:49.001274  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2084 17:15:49.004696  MTRR: Fixed MSR 0x258 0x0606060606060606

 2085 17:15:49.007520  call enable_fixed_mtrr()

 2086 17:15:49.010923  MTRR: Fixed MSR 0x259 0x0000000000000000

 2087 17:15:49.017824  MTRR: Fixed MSR 0x268 0x0606060606060606

 2088 17:15:49.020722  MTRR: Fixed MSR 0x269 0x0606060606060606

 2089 17:15:49.024470  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2090 17:15:49.027443  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2091 17:15:49.031064  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2092 17:15:49.037681  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2093 17:15:49.040748  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2094 17:15:49.043844  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2095 17:15:49.047888  CPU physical address size: 39 bits

 2096 17:15:49.054728  call enable_fixed_mtrr()

 2097 17:15:49.057848  CPU physical address size: 39 bits

 2098 17:15:49.060907  CPU physical address size: 39 bits

 2099 17:15:49.067255  BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms

 2100 17:15:49.073997  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2101 17:15:49.077638  Checking segment from ROM address 0xffc02b38

 2102 17:15:49.084000  Checking segment from ROM address 0xffc02b54

 2103 17:15:49.087328  Loading segment from ROM address 0xffc02b38

 2104 17:15:49.090908    code (compression=0)

 2105 17:15:49.097303    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2106 17:15:49.107791  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2107 17:15:49.107898  it's not compressed!

 2108 17:15:49.247507  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2109 17:15:49.254342  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2110 17:15:49.261074  Loading segment from ROM address 0xffc02b54

 2111 17:15:49.261220    Entry Point 0x30000000

 2112 17:15:49.264006  Loaded segments

 2113 17:15:49.270736  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2114 17:15:49.313865  Finalizing chipset.

 2115 17:15:49.317300  Finalizing SMM.

 2116 17:15:49.317440  APMC done.

 2117 17:15:49.323681  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2118 17:15:49.327071  mp_park_aps done after 0 msecs.

 2119 17:15:49.330004  Jumping to boot code at 0x30000000(0x76b25000)

 2120 17:15:49.340407  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2121 17:15:49.340544  

 2122 17:15:49.340677  

 2123 17:15:49.340773  

 2124 17:15:49.343356  Starting depthcharge on Voema...

 2125 17:15:49.343470  

 2126 17:15:49.343972  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2127 17:15:49.344108  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2128 17:15:49.344239  Setting prompt string to ['volteer:']
 2129 17:15:49.344431  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2130 17:15:49.353637  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2131 17:15:49.353762  

 2132 17:15:49.360506  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2133 17:15:49.360632  

 2134 17:15:49.366685  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2135 17:15:49.366772  

 2136 17:15:49.370170  Failed to find eMMC card reader

 2137 17:15:49.370280  

 2138 17:15:49.370389  Wipe memory regions:

 2139 17:15:49.370460  

 2140 17:15:49.376923  	[0x00000000001000, 0x000000000a0000)

 2141 17:15:49.377039  

 2142 17:15:49.379922  	[0x00000000100000, 0x00000030000000)

 2143 17:15:49.404842  

 2144 17:15:49.408223  	[0x00000032662db0, 0x000000769ef000)

 2145 17:15:49.443104  

 2146 17:15:49.446473  	[0x00000100000000, 0x00000280400000)

 2147 17:15:49.647701  

 2148 17:15:49.650997  ec_init: CrosEC protocol v3 supported (256, 256)

 2149 17:15:49.651126  

 2150 17:15:49.657456  update_port_state: port C0 state: usb enable 1 mux conn 0

 2151 17:15:49.657576  

 2152 17:15:49.664034  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2153 17:15:49.668743  

 2154 17:15:49.672287  pmc_check_ipc_sts: STS_BUSY done after 1611 us

 2155 17:15:49.672366  

 2156 17:15:49.675364  send_conn_disc_msg: pmc_send_cmd succeeded

 2157 17:15:50.106980  

 2158 17:15:50.107144  R8152: Initializing

 2159 17:15:50.107244  

 2160 17:15:50.109684  Version 6 (ocp_data = 5c30)

 2161 17:15:50.109795  

 2162 17:15:50.113387  R8152: Done initializing

 2163 17:15:50.113499  

 2164 17:15:50.116373  Adding net device

 2165 17:15:50.418523  

 2166 17:15:50.422032  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2167 17:15:50.422166  

 2168 17:15:50.422283  

 2169 17:15:50.422388  

 2170 17:15:50.425593  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2172 17:15:50.526022  volteer: tftpboot 192.168.201.1 10664050/tftp-deploy-dmoza6df/kernel/bzImage 10664050/tftp-deploy-dmoza6df/kernel/cmdline 10664050/tftp-deploy-dmoza6df/ramdisk/ramdisk.cpio.gz

 2173 17:15:50.526232  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2174 17:15:50.526356  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2175 17:15:50.530825  tftpboot 192.168.201.1 10664050/tftp-deploy-dmoza6df/kernel/bzImploy-dmoza6df/kernel/cmdline 10664050/tftp-deploy-dmoza6df/ramdisk/ramdisk.cpio.gz

 2176 17:15:50.530953  

 2177 17:15:50.531050  Waiting for link

 2178 17:15:50.733787  

 2179 17:15:50.733966  done.

 2180 17:15:50.734065  

 2181 17:15:50.734161  MAC: 00:24:32:30:7e:47

 2182 17:15:50.734250  

 2183 17:15:50.737001  Sending DHCP discover... done.

 2184 17:15:50.737136  

 2185 17:15:50.740298  Waiting for reply... done.

 2186 17:15:50.740413  

 2187 17:15:50.743553  Sending DHCP request... done.

 2188 17:15:50.743674  

 2189 17:15:50.747098  Waiting for reply... done.

 2190 17:15:50.747222  

 2191 17:15:50.749798  My ip is 192.168.201.19

 2192 17:15:50.749906  

 2193 17:15:50.753078  The DHCP server ip is 192.168.201.1

 2194 17:15:50.753187  

 2195 17:15:50.759684  TFTP server IP predefined by user: 192.168.201.1

 2196 17:15:50.759800  

 2197 17:15:50.766569  Bootfile predefined by user: 10664050/tftp-deploy-dmoza6df/kernel/bzImage

 2198 17:15:50.766671  

 2199 17:15:50.770115  Sending tftp read request... done.

 2200 17:15:50.770208  

 2201 17:15:50.773032  Waiting for the transfer... 

 2202 17:15:50.773111  

 2203 17:15:51.292702  00000000 ################################################################

 2204 17:15:51.292850  

 2205 17:15:51.805356  00080000 ################################################################

 2206 17:15:51.805540  

 2207 17:15:52.318898  00100000 ################################################################

 2208 17:15:52.319100  

 2209 17:15:52.833957  00180000 ################################################################

 2210 17:15:52.834121  

 2211 17:15:53.349897  00200000 ################################################################

 2212 17:15:53.350085  

 2213 17:15:53.873205  00280000 ################################################################

 2214 17:15:53.873387  

 2215 17:15:54.403445  00300000 ################################################################

 2216 17:15:54.403591  

 2217 17:15:54.926079  00380000 ################################################################

 2218 17:15:54.926249  

 2219 17:15:55.441471  00400000 ################################################################

 2220 17:15:55.441657  

 2221 17:15:55.950408  00480000 ################################################################

 2222 17:15:55.950565  

 2223 17:15:56.458874  00500000 ################################################################

 2224 17:15:56.459054  

 2225 17:15:56.971929  00580000 ################################################################

 2226 17:15:56.972118  

 2227 17:15:57.483028  00600000 ################################################################

 2228 17:15:57.483198  

 2229 17:15:57.993655  00680000 ################################################################

 2230 17:15:57.993843  

 2231 17:15:58.505649  00700000 ################################################################

 2232 17:15:58.505928  

 2233 17:15:59.022578  00780000 ################################################################

 2234 17:15:59.022748  

 2235 17:15:59.553649  00800000 ################################################################

 2236 17:15:59.553824  

 2237 17:16:00.110920  00880000 ################################################################

 2238 17:16:00.111102  

 2239 17:16:00.666268  00900000 ################################################################

 2240 17:16:00.666412  

 2241 17:16:01.216565  00980000 ################################################################

 2242 17:16:01.216730  

 2243 17:16:01.627372  00a00000 ############################################### done.

 2244 17:16:01.627510  

 2245 17:16:01.630734  The bootfile was 10866688 bytes long.

 2246 17:16:01.630841  

 2247 17:16:01.633784  Sending tftp read request... done.

 2248 17:16:01.633869  

 2249 17:16:01.637152  Waiting for the transfer... 

 2250 17:16:01.637235  

 2251 17:16:02.201037  00000000 ################################################################

 2252 17:16:02.201194  

 2253 17:16:02.757549  00080000 ################################################################

 2254 17:16:02.757719  

 2255 17:16:03.306799  00100000 ################################################################

 2256 17:16:03.306985  

 2257 17:16:03.835231  00180000 ################################################################

 2258 17:16:03.835405  

 2259 17:16:04.355658  00200000 ################################################################

 2260 17:16:04.355830  

 2261 17:16:04.878711  00280000 ################################################################

 2262 17:16:04.878867  

 2263 17:16:05.398255  00300000 ################################################################

 2264 17:16:05.398431  

 2265 17:16:05.925541  00380000 ################################################################

 2266 17:16:05.925707  

 2267 17:16:06.446177  00400000 ################################################################

 2268 17:16:06.446358  

 2269 17:16:06.968819  00480000 ################################################################

 2270 17:16:06.969005  

 2271 17:16:07.484916  00500000 ################################################################

 2272 17:16:07.485098  

 2273 17:16:08.004445  00580000 ################################################################

 2274 17:16:08.004624  

 2275 17:16:08.109294  00600000 ############# done.

 2276 17:16:08.109443  

 2277 17:16:08.112390  Sending tftp read request... done.

 2278 17:16:08.112469  

 2279 17:16:08.116039  Waiting for the transfer... 

 2280 17:16:08.116126  

 2281 17:16:08.116192  00000000 # done.

 2282 17:16:08.116255  

 2283 17:16:08.125827  Command line loaded dynamically from TFTP file: 10664050/tftp-deploy-dmoza6df/kernel/cmdline

 2284 17:16:08.125968  

 2285 17:16:08.149053  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10664050/extract-nfsrootfs-8y6_5ta2,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2286 17:16:08.152514  

 2287 17:16:08.156247  Shutting down all USB controllers.

 2288 17:16:08.156362  

 2289 17:16:08.156464  Removing current net device

 2290 17:16:08.156566  

 2291 17:16:08.159145  Finalizing coreboot

 2292 17:16:08.159257  

 2293 17:16:08.165721  Exiting depthcharge with code 4 at timestamp: 27459234

 2294 17:16:08.165833  

 2295 17:16:08.165930  

 2296 17:16:08.166022  Starting kernel ...

 2297 17:16:08.166115  

 2298 17:16:08.166207  

 2299 17:16:08.166816  end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
 2300 17:16:08.166948  start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
 2301 17:16:08.167054  Setting prompt string to ['Linux version [0-9]']
 2302 17:16:08.167153  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2303 17:16:08.167249  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2305 17:20:34.167325  end: 2.2.5 auto-login-action (duration 00:04:26) [common]
 2307 17:20:34.167670  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
 2309 17:20:34.167917  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2312 17:20:34.168330  end: 2 depthcharge-action (duration 00:05:00) [common]
 2314 17:20:34.168731  Cleaning after the job
 2315 17:20:34.168870  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/ramdisk
 2316 17:20:34.169813  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/kernel
 2317 17:20:34.171226  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/nfsrootfs
 2318 17:20:34.263627  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10664050/tftp-deploy-dmoza6df/modules
 2319 17:20:34.264416  start: 4.1 power-off (timeout 00:00:30) [common]
 2320 17:20:34.264593  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
 2321 17:20:34.341119  >> Command sent successfully.

 2322 17:20:34.343771  Returned 0 in 0 seconds
 2323 17:20:34.444164  end: 4.1 power-off (duration 00:00:00) [common]
 2325 17:20:34.444632  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2326 17:20:34.444939  Listened to connection for namespace 'common' for up to 1s
 2327 17:20:35.445868  Finalising connection for namespace 'common'
 2328 17:20:35.446045  Disconnecting from shell: Finalise
 2329 17:20:35.446129  

 2330 17:20:35.546437  end: 4.2 read-feedback (duration 00:00:01) [common]
 2331 17:20:35.546631  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10664050
 2332 17:20:36.011948  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10664050
 2333 17:20:36.012131  JobError: Your job cannot terminate cleanly.