Boot log: acer-cbv514-1h-34uz-brya

    1 10:12:12.933462  lava-dispatcher, installed at version: 2023.06
    2 10:12:12.933667  start: 0 validate
    3 10:12:12.933798  Start time: 2023-08-14 10:12:12.933790+00:00 (UTC)
    4 10:12:12.933933  Using caching service: 'http://localhost/cache/?uri=%s'
    5 10:12:12.934088  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 10:12:13.201306  Using caching service: 'http://localhost/cache/?uri=%s'
    7 10:12:13.201495  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.288-cip101-1117-g1f3468542aa9e%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 10:12:13.202575  Using caching service: 'http://localhost/cache/?uri=%s'
    9 10:12:13.202697  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.288-cip101-1117-g1f3468542aa9e%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 10:12:13.204891  validate duration: 0.27
   12 10:12:13.205118  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 10:12:13.205215  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 10:12:13.205302  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 10:12:13.205418  Not decompressing ramdisk as can be used compressed.
   16 10:12:13.205504  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 10:12:13.205573  saving as /var/lib/lava/dispatcher/tmp/11283177/tftp-deploy-m0n0od6d/ramdisk/rootfs.cpio.gz
   18 10:12:13.205638  total size: 8418130 (8 MB)
   19 10:12:13.206609  progress   0 % (0 MB)
   20 10:12:13.209028  progress   5 % (0 MB)
   21 10:12:13.211303  progress  10 % (0 MB)
   22 10:12:13.213743  progress  15 % (1 MB)
   23 10:12:13.216124  progress  20 % (1 MB)
   24 10:12:13.218495  progress  25 % (2 MB)
   25 10:12:13.220840  progress  30 % (2 MB)
   26 10:12:13.222984  progress  35 % (2 MB)
   27 10:12:13.225391  progress  40 % (3 MB)
   28 10:12:13.227731  progress  45 % (3 MB)
   29 10:12:13.230114  progress  50 % (4 MB)
   30 10:12:13.232404  progress  55 % (4 MB)
   31 10:12:13.234718  progress  60 % (4 MB)
   32 10:12:13.236854  progress  65 % (5 MB)
   33 10:12:13.239087  progress  70 % (5 MB)
   34 10:12:13.241385  progress  75 % (6 MB)
   35 10:12:13.243746  progress  80 % (6 MB)
   36 10:12:13.246113  progress  85 % (6 MB)
   37 10:12:13.248432  progress  90 % (7 MB)
   38 10:12:13.250868  progress  95 % (7 MB)
   39 10:12:13.253087  progress 100 % (8 MB)
   40 10:12:13.253349  8 MB downloaded in 0.05 s (168.27 MB/s)
   41 10:12:13.253549  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 10:12:13.253824  end: 1.1 download-retry (duration 00:00:00) [common]
   44 10:12:13.253911  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 10:12:13.253995  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 10:12:13.254117  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.288-cip101-1117-g1f3468542aa9e/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 10:12:13.254219  saving as /var/lib/lava/dispatcher/tmp/11283177/tftp-deploy-m0n0od6d/kernel/bzImage
   48 10:12:13.254282  total size: 10867200 (10 MB)
   49 10:12:13.254364  No compression specified
   50 10:12:13.255611  progress   0 % (0 MB)
   51 10:12:13.258559  progress   5 % (0 MB)
   52 10:12:13.261619  progress  10 % (1 MB)
   53 10:12:13.264489  progress  15 % (1 MB)
   54 10:12:13.267571  progress  20 % (2 MB)
   55 10:12:13.270383  progress  25 % (2 MB)
   56 10:12:13.273391  progress  30 % (3 MB)
   57 10:12:13.276498  progress  35 % (3 MB)
   58 10:12:13.279349  progress  40 % (4 MB)
   59 10:12:13.282281  progress  45 % (4 MB)
   60 10:12:13.285063  progress  50 % (5 MB)
   61 10:12:13.288003  progress  55 % (5 MB)
   62 10:12:13.290826  progress  60 % (6 MB)
   63 10:12:13.293781  progress  65 % (6 MB)
   64 10:12:13.296666  progress  70 % (7 MB)
   65 10:12:13.299376  progress  75 % (7 MB)
   66 10:12:13.302269  progress  80 % (8 MB)
   67 10:12:13.304997  progress  85 % (8 MB)
   68 10:12:13.307922  progress  90 % (9 MB)
   69 10:12:13.310978  progress  95 % (9 MB)
   70 10:12:13.313822  progress 100 % (10 MB)
   71 10:12:13.314031  10 MB downloaded in 0.06 s (173.47 MB/s)
   72 10:12:13.314183  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 10:12:13.314448  end: 1.2 download-retry (duration 00:00:00) [common]
   75 10:12:13.314564  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 10:12:13.314655  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 10:12:13.314783  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.288-cip101-1117-g1f3468542aa9e/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 10:12:13.314856  saving as /var/lib/lava/dispatcher/tmp/11283177/tftp-deploy-m0n0od6d/modules/modules.tar
   79 10:12:13.314919  total size: 484808 (0 MB)
   80 10:12:13.314984  Using unxz to decompress xz
   81 10:12:13.318682  progress   6 % (0 MB)
   82 10:12:13.319092  progress  13 % (0 MB)
   83 10:12:13.319335  progress  20 % (0 MB)
   84 10:12:13.320710  progress  27 % (0 MB)
   85 10:12:13.322981  progress  33 % (0 MB)
   86 10:12:13.324825  progress  40 % (0 MB)
   87 10:12:13.326885  progress  47 % (0 MB)
   88 10:12:13.328832  progress  54 % (0 MB)
   89 10:12:13.330890  progress  60 % (0 MB)
   90 10:12:13.333313  progress  67 % (0 MB)
   91 10:12:13.335378  progress  74 % (0 MB)
   92 10:12:13.337411  progress  81 % (0 MB)
   93 10:12:13.339529  progress  87 % (0 MB)
   94 10:12:13.341450  progress  94 % (0 MB)
   95 10:12:13.343662  progress 100 % (0 MB)
   96 10:12:13.349864  0 MB downloaded in 0.03 s (13.23 MB/s)
   97 10:12:13.350213  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 10:12:13.350689  end: 1.3 download-retry (duration 00:00:00) [common]
  100 10:12:13.350847  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
  101 10:12:13.351006  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  102 10:12:13.351148  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 10:12:13.351296  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  104 10:12:13.351598  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk
  105 10:12:13.351809  makedir: /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin
  106 10:12:13.351982  makedir: /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/tests
  107 10:12:13.352152  makedir: /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/results
  108 10:12:13.352342  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-add-keys
  109 10:12:13.352571  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-add-sources
  110 10:12:13.352781  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-background-process-start
  111 10:12:13.352991  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-background-process-stop
  112 10:12:13.353195  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-common-functions
  113 10:12:13.353394  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-echo-ipv4
  114 10:12:13.353594  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-install-packages
  115 10:12:13.353801  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-installed-packages
  116 10:12:13.354000  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-os-build
  117 10:12:13.354199  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-probe-channel
  118 10:12:13.354406  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-probe-ip
  119 10:12:13.354616  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-target-ip
  120 10:12:13.354816  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-target-mac
  121 10:12:13.355017  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-target-storage
  122 10:12:13.355216  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-test-case
  123 10:12:13.355417  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-test-event
  124 10:12:13.355614  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-test-feedback
  125 10:12:13.355816  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-test-raise
  126 10:12:13.356022  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-test-reference
  127 10:12:13.356229  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-test-runner
  128 10:12:13.356434  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-test-set
  129 10:12:13.356641  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-test-shell
  130 10:12:13.356853  Updating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-install-packages (oe)
  131 10:12:13.357089  Updating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/bin/lava-installed-packages (oe)
  132 10:12:13.357294  Creating /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/environment
  133 10:12:13.357461  LAVA metadata
  134 10:12:13.357587  - LAVA_JOB_ID=11283177
  135 10:12:13.357710  - LAVA_DISPATCHER_IP=192.168.201.1
  136 10:12:13.357883  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  137 10:12:13.358005  skipped lava-vland-overlay
  138 10:12:13.358147  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 10:12:13.358290  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  140 10:12:13.358409  skipped lava-multinode-overlay
  141 10:12:13.358547  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 10:12:13.358692  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  143 10:12:13.358825  Loading test definitions
  144 10:12:13.358988  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  145 10:12:13.359135  Using /lava-11283177 at stage 0
  146 10:12:13.359637  uuid=11283177_1.4.2.3.1 testdef=None
  147 10:12:13.359783  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 10:12:13.359930  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  149 10:12:13.360827  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 10:12:13.361247  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  152 10:12:13.362368  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 10:12:13.362797  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  155 10:12:13.363854  runner path: /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/0/tests/0_dmesg test_uuid 11283177_1.4.2.3.1
  156 10:12:13.364082  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 10:12:13.364502  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  159 10:12:13.364627  Using /lava-11283177 at stage 1
  160 10:12:13.365128  uuid=11283177_1.4.2.3.5 testdef=None
  161 10:12:13.365272  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  162 10:12:13.365414  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  163 10:12:13.366223  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  165 10:12:13.366621  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  166 10:12:13.367723  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  168 10:12:13.368149  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  169 10:12:13.369260  runner path: /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/1/tests/1_bootrr test_uuid 11283177_1.4.2.3.5
  170 10:12:13.369497  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  172 10:12:13.369884  Creating lava-test-runner.conf files
  173 10:12:13.369998  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/0 for stage 0
  174 10:12:13.370150  - 0_dmesg
  175 10:12:13.370285  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11283177/lava-overlay-0tlrc_lk/lava-11283177/1 for stage 1
  176 10:12:13.370439  - 1_bootrr
  177 10:12:13.370598  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  178 10:12:13.370746  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  179 10:12:13.383861  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  180 10:12:13.384067  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  181 10:12:13.384217  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  182 10:12:13.384365  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  183 10:12:13.384512  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  184 10:12:13.628381  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  185 10:12:13.628909  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  186 10:12:13.629039  extracting modules file /var/lib/lava/dispatcher/tmp/11283177/tftp-deploy-m0n0od6d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11283177/extract-overlay-ramdisk-kjphfw8y/ramdisk
  187 10:12:13.649466  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  188 10:12:13.649642  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  189 10:12:13.649745  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11283177/compress-overlay-h8201ajh/overlay-1.4.2.4.tar.gz to ramdisk
  190 10:12:13.649818  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11283177/compress-overlay-h8201ajh/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11283177/extract-overlay-ramdisk-kjphfw8y/ramdisk
  191 10:12:13.657853  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  192 10:12:13.658003  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  193 10:12:13.658099  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  194 10:12:13.658187  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  195 10:12:13.658266  Building ramdisk /var/lib/lava/dispatcher/tmp/11283177/extract-overlay-ramdisk-kjphfw8y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11283177/extract-overlay-ramdisk-kjphfw8y/ramdisk
  196 10:12:13.787510  >> 53982 blocks

  197 10:12:14.705577  rename /var/lib/lava/dispatcher/tmp/11283177/extract-overlay-ramdisk-kjphfw8y/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11283177/tftp-deploy-m0n0od6d/ramdisk/ramdisk.cpio.gz
  198 10:12:14.706015  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  199 10:12:14.706142  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  200 10:12:14.706246  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  201 10:12:14.706345  No mkimage arch provided, not using FIT.
  202 10:12:14.706436  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  203 10:12:14.706564  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  204 10:12:14.706669  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  205 10:12:14.706758  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  206 10:12:14.706836  No LXC device requested
  207 10:12:14.706912  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  208 10:12:14.706996  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  209 10:12:14.707076  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  210 10:12:14.707152  Checking files for TFTP limit of 4294967296 bytes.
  211 10:12:14.707554  end: 1 tftp-deploy (duration 00:00:02) [common]
  212 10:12:14.707666  start: 2 depthcharge-action (timeout 00:05:00) [common]
  213 10:12:14.707759  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  214 10:12:14.707877  substitutions:
  215 10:12:14.707943  - {DTB}: None
  216 10:12:14.708006  - {INITRD}: 11283177/tftp-deploy-m0n0od6d/ramdisk/ramdisk.cpio.gz
  217 10:12:14.708065  - {KERNEL}: 11283177/tftp-deploy-m0n0od6d/kernel/bzImage
  218 10:12:14.708122  - {LAVA_MAC}: None
  219 10:12:14.708178  - {PRESEED_CONFIG}: None
  220 10:12:14.708234  - {PRESEED_LOCAL}: None
  221 10:12:14.708289  - {RAMDISK}: 11283177/tftp-deploy-m0n0od6d/ramdisk/ramdisk.cpio.gz
  222 10:12:14.708345  - {ROOT_PART}: None
  223 10:12:14.708422  - {ROOT}: None
  224 10:12:14.708483  - {SERVER_IP}: 192.168.201.1
  225 10:12:14.708566  - {TEE}: None
  226 10:12:14.708627  Parsed boot commands:
  227 10:12:14.708684  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  228 10:12:14.708872  Parsed boot commands: tftpboot 192.168.201.1 11283177/tftp-deploy-m0n0od6d/kernel/bzImage 11283177/tftp-deploy-m0n0od6d/kernel/cmdline 11283177/tftp-deploy-m0n0od6d/ramdisk/ramdisk.cpio.gz
  229 10:12:14.708964  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  230 10:12:14.709051  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  231 10:12:14.709142  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  232 10:12:14.709256  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  233 10:12:14.709356  Not connected, no need to disconnect.
  234 10:12:14.709458  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  235 10:12:14.709540  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  236 10:12:14.709609  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-0'
  237 10:12:14.712965  Setting prompt string to ['lava-test: # ']
  238 10:12:14.713354  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  239 10:12:14.713507  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  240 10:12:14.713634  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  241 10:12:14.713733  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  242 10:12:14.713973  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=reboot'
  243 10:12:19.848575  >> Command sent successfully.

  244 10:12:19.850915  Returned 0 in 5 seconds
  245 10:12:19.951325  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  247 10:12:19.951653  end: 2.2.2 reset-device (duration 00:00:05) [common]
  248 10:12:19.951759  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  249 10:12:19.951846  Setting prompt string to 'Starting depthcharge on Volmar...'
  250 10:12:19.951913  Changing prompt to 'Starting depthcharge on Volmar...'
  251 10:12:19.951989  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  252 10:12:19.952255  [Enter `^Ec?' for help]

  253 10:12:21.329375  

  254 10:12:21.329537  

  255 10:12:21.335934  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  256 10:12:21.339124  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  257 10:12:21.345829  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  258 10:12:21.349640  CPU: AES supported, TXT NOT supported, VT supported

  259 10:12:21.360185  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  260 10:12:21.360272  Cache size = 10 MiB

  261 10:12:21.363614  MCH: device id 4609 (rev 04) is Alderlake-P

  262 10:12:21.370611  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  263 10:12:21.374440  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  264 10:12:21.377947  VBOOT: Loading verstage.

  265 10:12:21.381761  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  266 10:12:21.385256  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  267 10:12:21.392282  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  268 10:12:21.399113  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  269 10:12:21.405846  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  270 10:12:21.409752  

  271 10:12:21.409842  

  272 10:12:21.416730  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  273 10:12:21.424511  Probing TPM I2C: I2C bus 1 version 0x3230302a

  274 10:12:21.427557  DW I2C bus 1 at 0xfe022000 (400 KHz)

  275 10:12:21.431076  I2C TX abort detected (00000001)

  276 10:12:21.434440  cr50_i2c_read: Address write failed

  277 10:12:21.445236  .done! DID_VID 0x00281ae0

  278 10:12:21.448251  TPM ready after 0 ms

  279 10:12:21.451863  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  280 10:12:21.464985  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  281 10:12:21.471933  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  282 10:12:21.528404  tlcl_send_startup: Startup return code is 0

  283 10:12:21.528527  TPM: setup succeeded

  284 10:12:21.547899  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  285 10:12:21.571344  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  286 10:12:21.574802  Chrome EC: UHEPI supported

  287 10:12:21.578248  Reading cr50 boot mode

  288 10:12:21.592777  Cr50 says boot_mode is VERIFIED_RW(0x00).

  289 10:12:21.592883  Phase 1

  290 10:12:21.600170  FMAP: area GBB found @ 1805000 (458752 bytes)

  291 10:12:21.606007  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  292 10:12:21.612702  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  293 10:12:21.619579  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  294 10:12:21.619710  Phase 2

  295 10:12:21.622913  Phase 3

  296 10:12:21.626093  FMAP: area GBB found @ 1805000 (458752 bytes)

  297 10:12:21.633386  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  298 10:12:21.636626  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  299 10:12:21.643339  VB2:vb2_verify_keyblock() Checking keyblock signature...

  300 10:12:21.649917  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  301 10:12:21.656438  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  302 10:12:21.663225  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  303 10:12:21.678317  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  304 10:12:21.681295  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  305 10:12:21.687804  VB2:vb2_verify_fw_preamble() Verifying preamble.

  306 10:12:21.694632  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  307 10:12:21.701355  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  308 10:12:21.707847  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  309 10:12:21.712243  Phase 4

  310 10:12:21.715332  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  311 10:12:21.721647  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  312 10:12:21.934382  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  313 10:12:21.940531  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  314 10:12:21.943883  Saving vboot hash.

  315 10:12:21.950795  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  316 10:12:21.967080  tlcl_extend: response is 0

  317 10:12:21.973675  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  318 10:12:21.980594  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  319 10:12:21.995370  tlcl_extend: response is 0

  320 10:12:22.002378  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  321 10:12:22.021724  tlcl_lock_nv_write: response is 0

  322 10:12:22.040592  tlcl_lock_nv_write: response is 0

  323 10:12:22.040737  Slot A is selected

  324 10:12:22.047415  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  325 10:12:22.053774  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  326 10:12:22.060507  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  327 10:12:22.067317  BS: verstage times (exec / console): total (unknown) / 264 ms

  328 10:12:22.067420  

  329 10:12:22.067489  

  330 10:12:22.073905  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  331 10:12:22.078011  Google Chrome EC: version:

  332 10:12:22.081237  	ro: volmar_v2.0.14126-e605144e9c

  333 10:12:22.084769  	rw: volmar_v0.0.55-22d1557

  334 10:12:22.087979    running image: 2

  335 10:12:22.091061  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  336 10:12:22.100994  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  337 10:12:22.107921  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  338 10:12:22.114173  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  339 10:12:22.124293  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  340 10:12:22.134449  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  341 10:12:22.141852  EC took 2551us to calculate image hash

  342 10:12:22.151843  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  343 10:12:22.154959  VB2:sync_ec() select_rw=RW(active)

  344 10:12:22.165161  Waited 270us to clear limit power flag.

  345 10:12:22.168725  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  346 10:12:22.172316  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  347 10:12:22.175375  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  348 10:12:22.182166  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  349 10:12:22.185194  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  350 10:12:22.188719  TCO_STS:   0000 0000

  351 10:12:22.188828  GEN_PMCON: d0015038 00002200

  352 10:12:22.192446  GBLRST_CAUSE: 00000000 00000000

  353 10:12:22.195701  HPR_CAUSE0: 00000000

  354 10:12:22.198670  prev_sleep_state 5

  355 10:12:22.202162  Abort disabling TXT, as CPU is not TXT capable.

  356 10:12:22.210443  cse_lite: Number of partitions = 3

  357 10:12:22.213554  cse_lite: Current partition = RO

  358 10:12:22.213642  cse_lite: Next partition = RO

  359 10:12:22.216967  cse_lite: Flags = 0x7

  360 10:12:22.223440  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  361 10:12:22.233141  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  362 10:12:22.236228  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  363 10:12:22.243122  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  364 10:12:22.249887  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  365 10:12:22.256544  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  366 10:12:22.259643  cse_lite: CSE CBFS RW version : 16.1.25.2049

  367 10:12:22.266344  cse_lite: Set Boot Partition Info Command (RW)

  368 10:12:22.269512  HECI: Global Reset(Type:1) Command

  369 10:12:23.687710  �Ks;���6ȶevel: 8)...

  370 10:12:23.691634  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  371 10:12:23.698861  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  372 10:12:23.701446  CPU: AES supported, TXT NOT supported, VT supported

  373 10:12:23.711765  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  374 10:12:23.711881  Cache size = 10 MiB

  375 10:12:23.718495  MCH: device id 4609 (rev 04) is Alderlake-P

  376 10:12:23.722012  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  377 10:12:23.725081  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  378 10:12:23.728644  VBOOT: Loading verstage.

  379 10:12:23.736146  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  380 10:12:23.739700  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  381 10:12:23.742673  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  382 10:12:23.750777  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  383 10:12:23.760660  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  384 10:12:23.760757  

  385 10:12:23.760847  

  386 10:12:23.770925  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  387 10:12:23.774485  Probing TPM I2C: I2C bus 1 version 0x3230302a

  388 10:12:23.777557  DW I2C bus 1 at 0xfe022000 (400 KHz)

  389 10:12:23.781395  done! DID_VID 0x00281ae0

  390 10:12:23.784685  TPM ready after 0 ms

  391 10:12:23.788097  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  392 10:12:23.797977  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  393 10:12:23.805544  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  394 10:12:23.867132  tlcl_send_startup: Startup return code is 0

  395 10:12:23.867256  TPM: setup succeeded

  396 10:12:23.886744  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  397 10:12:23.908851  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  398 10:12:23.912967  Chrome EC: UHEPI supported

  399 10:12:23.916124  Reading cr50 boot mode

  400 10:12:23.931244  Cr50 says boot_mode is VERIFIED_RW(0x00).

  401 10:12:23.931360  Phase 1

  402 10:12:23.938001  FMAP: area GBB found @ 1805000 (458752 bytes)

  403 10:12:23.944640  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  404 10:12:23.950871  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  405 10:12:23.957680  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  406 10:12:23.961323  Phase 2

  407 10:12:23.961404  Phase 3

  408 10:12:23.964633  FMAP: area GBB found @ 1805000 (458752 bytes)

  409 10:12:23.971186  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  410 10:12:23.974357  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  411 10:12:23.981079  VB2:vb2_verify_keyblock() Checking keyblock signature...

  412 10:12:23.987868  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  413 10:12:23.994494  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  414 10:12:24.004089  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  415 10:12:24.016542  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  416 10:12:24.019518  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  417 10:12:24.026326  VB2:vb2_verify_fw_preamble() Verifying preamble.

  418 10:12:24.032944  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  419 10:12:24.039418  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  420 10:12:24.046318  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  421 10:12:24.050349  Phase 4

  422 10:12:24.053832  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  423 10:12:24.060096  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  424 10:12:24.273019  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  425 10:12:24.279432  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  426 10:12:24.282563  Saving vboot hash.

  427 10:12:24.289131  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  428 10:12:24.305507  tlcl_extend: response is 0

  429 10:12:24.311865  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  430 10:12:24.315529  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  431 10:12:24.332865  tlcl_extend: response is 0

  432 10:12:24.339486  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  433 10:12:24.359360  tlcl_lock_nv_write: response is 0

  434 10:12:24.378934  tlcl_lock_nv_write: response is 0

  435 10:12:24.379020  Slot A is selected

  436 10:12:24.385316  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  437 10:12:24.391979  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  438 10:12:24.398559  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  439 10:12:24.405355  BS: verstage times (exec / console): total (unknown) / 256 ms

  440 10:12:24.405441  

  441 10:12:24.405508  

  442 10:12:24.412005  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  443 10:12:24.416082  Google Chrome EC: version:

  444 10:12:24.419301  	ro: volmar_v2.0.14126-e605144e9c

  445 10:12:24.422435  	rw: volmar_v0.0.55-22d1557

  446 10:12:24.425782    running image: 2

  447 10:12:24.429013  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  448 10:12:24.439207  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  449 10:12:24.445722  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  450 10:12:24.452333  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  451 10:12:24.462570  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  452 10:12:24.472498  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  453 10:12:24.475751  EC took 941us to calculate image hash

  454 10:12:24.486224  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  455 10:12:24.489681  VB2:sync_ec() select_rw=RW(active)

  456 10:12:24.504236  Waited 270us to clear limit power flag.

  457 10:12:24.507907  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  458 10:12:24.511396  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  459 10:12:24.514438  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  460 10:12:24.521051  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  461 10:12:24.524802  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  462 10:12:24.527849  TCO_STS:   0000 0000

  463 10:12:24.531193  GEN_PMCON: d1001038 00002200

  464 10:12:24.531279  GBLRST_CAUSE: 00000040 00000000

  465 10:12:24.534417  HPR_CAUSE0: 00000000

  466 10:12:24.538219  prev_sleep_state 5

  467 10:12:24.541262  Abort disabling TXT, as CPU is not TXT capable.

  468 10:12:24.549765  cse_lite: Number of partitions = 3

  469 10:12:24.552953  cse_lite: Current partition = RW

  470 10:12:24.553057  cse_lite: Next partition = RW

  471 10:12:24.556149  cse_lite: Flags = 0x7

  472 10:12:24.563014  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  473 10:12:24.573114  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  474 10:12:24.576292  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  475 10:12:24.583048  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  476 10:12:24.589319  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  477 10:12:24.596007  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  478 10:12:24.599138  cse_lite: CSE CBFS RW version : 16.1.25.2049

  479 10:12:24.602579  Boot Count incremented to 2126

  480 10:12:24.609295  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  481 10:12:24.615964  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  482 10:12:24.629325  Probing TPM I2C: done! DID_VID 0x00281ae0

  483 10:12:24.632266  Locality already claimed

  484 10:12:24.635333  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  485 10:12:24.655088  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  486 10:12:24.661658  MRC: Hash idx 0x100d comparison successful.

  487 10:12:24.665464  MRC cache found, size f6c8

  488 10:12:24.665550  bootmode is set to: 2

  489 10:12:24.668507  EC returned error result code 3

  490 10:12:24.672119  FW_CONFIG value from CBI is 0x131

  491 10:12:24.678913  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  492 10:12:24.682000  SPD index = 0

  493 10:12:24.688605  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  494 10:12:24.688721  SPD: module type is LPDDR4X

  495 10:12:24.695529  SPD: module part number is K4U6E3S4AB-MGCL

  496 10:12:24.702166  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  497 10:12:24.705320  SPD: device width 16 bits, bus width 16 bits

  498 10:12:24.708997  SPD: module size is 1024 MB (per channel)

  499 10:12:24.777939  CBMEM:

  500 10:12:24.781239  IMD: root @ 0x76fff000 254 entries.

  501 10:12:24.784467  IMD: root @ 0x76ffec00 62 entries.

  502 10:12:24.792483  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  503 10:12:24.795782  RO_VPD is uninitialized or empty.

  504 10:12:24.799548  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  505 10:12:24.802564  RW_VPD is uninitialized or empty.

  506 10:12:24.809284  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  507 10:12:24.812294  External stage cache:

  508 10:12:24.815737  IMD: root @ 0x7bbff000 254 entries.

  509 10:12:24.818826  IMD: root @ 0x7bbfec00 62 entries.

  510 10:12:24.825525  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  511 10:12:24.832620  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  512 10:12:24.835866  MRC: 'RW_MRC_CACHE' does not need update.

  513 10:12:24.835951  8 DIMMs found

  514 10:12:24.839109  SMM Memory Map

  515 10:12:24.842470  SMRAM       : 0x7b800000 0x800000

  516 10:12:24.846430   Subregion 0: 0x7b800000 0x200000

  517 10:12:24.849208   Subregion 1: 0x7ba00000 0x200000

  518 10:12:24.852416   Subregion 2: 0x7bc00000 0x400000

  519 10:12:24.855673  top_of_ram = 0x77000000

  520 10:12:24.859091  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  521 10:12:24.865606  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  522 10:12:24.872171  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  523 10:12:24.875773  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  524 10:12:24.875858  Normal boot

  525 10:12:24.885618  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  526 10:12:24.892310  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  527 10:12:24.898780  Processing 237 relocs. Offset value of 0x74ab9000

  528 10:12:24.906780  BS: romstage times (exec / console): total (unknown) / 380 ms

  529 10:12:24.914353  

  530 10:12:24.914455  

  531 10:12:24.921034  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  532 10:12:24.921152  Normal boot

  533 10:12:24.927646  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  534 10:12:24.934150  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  535 10:12:24.940963  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  536 10:12:24.950698  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  537 10:12:24.999293  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  538 10:12:25.005766  Processing 5931 relocs. Offset value of 0x72a2f000

  539 10:12:25.008967  BS: postcar times (exec / console): total (unknown) / 51 ms

  540 10:12:25.012473  

  541 10:12:25.012599  

  542 10:12:25.018953  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  543 10:12:25.022739  Reserving BERT start 76a1e000, size 10000

  544 10:12:25.026332  Normal boot

  545 10:12:25.028961  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  546 10:12:25.035941  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  547 10:12:25.045621  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  548 10:12:25.049227  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  549 10:12:25.052542  Google Chrome EC: version:

  550 10:12:25.055701  	ro: volmar_v2.0.14126-e605144e9c

  551 10:12:25.059398  	rw: volmar_v0.0.55-22d1557

  552 10:12:25.059524    running image: 2

  553 10:12:25.066697  ACPI _SWS is PM1 Index 8 GPE Index -1

  554 10:12:25.069861  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  555 10:12:25.073486  EC returned error result code 3

  556 10:12:25.076680  FW_CONFIG value from CBI is 0x131

  557 10:12:25.083331  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  558 10:12:25.086496  PCI: 00:1c.2 disabled by fw_config

  559 10:12:25.093567  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  560 10:12:25.096666  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  561 10:12:25.103501  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  562 10:12:25.106837  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  563 10:12:25.113694  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  564 10:12:25.120120  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  565 10:12:25.126406  microcode: sig=0x906a4 pf=0x80 revision=0x423

  566 10:12:25.129865  microcode: Update skipped, already up-to-date

  567 10:12:25.136594  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  568 10:12:25.168835  Detected 6 core, 8 thread CPU.

  569 10:12:25.171981  Setting up SMI for CPU

  570 10:12:25.176129  IED base = 0x7bc00000

  571 10:12:25.176254  IED size = 0x00400000

  572 10:12:25.178924  Will perform SMM setup.

  573 10:12:25.182104  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  574 10:12:25.185860  LAPIC 0x0 in XAPIC mode.

  575 10:12:25.195233  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  576 10:12:25.198773  Processing 18 relocs. Offset value of 0x00030000

  577 10:12:25.203408  Attempting to start 7 APs

  578 10:12:25.206699  Waiting for 10ms after sending INIT.

  579 10:12:25.219713  Waiting for SIPI to complete...

  580 10:12:25.222671  done.

  581 10:12:25.222793  LAPIC 0x10 in XAPIC mode.

  582 10:12:25.226234  LAPIC 0x12 in XAPIC mode.

  583 10:12:25.229691  LAPIC 0x9 in XAPIC mode.

  584 10:12:25.232678  LAPIC 0x8 in XAPIC mode.

  585 10:12:25.236114  AP: slot 4 apic_id 10, MCU rev: 0x00000423

  586 10:12:25.239652  LAPIC 0x14 in XAPIC mode.

  587 10:12:25.243039  LAPIC 0x16 in XAPIC mode.

  588 10:12:25.246749  Waiting for SIPI to complete...

  589 10:12:25.246876  done.

  590 10:12:25.249965  LAPIC 0x1 in XAPIC mode.

  591 10:12:25.253280  AP: slot 2 apic_id 14, MCU rev: 0x00000423

  592 10:12:25.256612  AP: slot 5 apic_id 1, MCU rev: 0x00000423

  593 10:12:25.259542  AP: slot 1 apic_id 12, MCU rev: 0x00000423

  594 10:12:25.266420  AP: slot 3 apic_id 16, MCU rev: 0x00000423

  595 10:12:25.269527  AP: slot 7 apic_id 8, MCU rev: 0x00000423

  596 10:12:25.272927  AP: slot 6 apic_id 9, MCU rev: 0x00000423

  597 10:12:25.276453  smm_setup_relocation_handler: enter

  598 10:12:25.279281  smm_setup_relocation_handler: exit

  599 10:12:25.289414  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  600 10:12:25.292936  Processing 11 relocs. Offset value of 0x00038000

  601 10:12:25.299564  smm_module_setup_stub: stack_top = 0x7b804000

  602 10:12:25.303101  smm_module_setup_stub: per cpu stack_size = 0x800

  603 10:12:25.309531  smm_module_setup_stub: runtime.start32_offset = 0x4c

  604 10:12:25.312535  smm_module_setup_stub: runtime.smm_size = 0x10000

  605 10:12:25.319146  SMM Module: stub loaded at 38000. Will call 0x76a52094

  606 10:12:25.322645  Installing permanent SMM handler to 0x7b800000

  607 10:12:25.329367  smm_load_module: total_smm_space_needed e468, available -> 200000

  608 10:12:25.339425  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  609 10:12:25.342854  Processing 255 relocs. Offset value of 0x7b9f6000

  610 10:12:25.348853  smm_load_module: smram_start: 0x7b800000

  611 10:12:25.352635  smm_load_module: smram_end: 7ba00000

  612 10:12:25.355766  smm_load_module: handler start 0x7b9f6d5f

  613 10:12:25.359351  smm_load_module: handler_size 98d0

  614 10:12:25.362627  smm_load_module: fxsave_area 0x7b9ff000

  615 10:12:25.366113  smm_load_module: fxsave_size 1000

  616 10:12:25.369380  smm_load_module: CONFIG_MSEG_SIZE 0x0

  617 10:12:25.375573  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  618 10:12:25.382791  smm_load_module: handler_mod_params.smbase = 0x7b800000

  619 10:12:25.385624  smm_load_module: per_cpu_save_state_size = 0x400

  620 10:12:25.389117  smm_load_module: num_cpus = 0x8

  621 10:12:25.395966  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  622 10:12:25.399212  smm_load_module: total_save_state_size = 0x2000

  623 10:12:25.402248  smm_load_module: cpu0 entry: 7b9e6000

  624 10:12:25.408858  smm_create_map: cpus allowed in one segment 30

  625 10:12:25.412875  smm_create_map: min # of segments needed 1

  626 10:12:25.413004  CPU 0x0

  627 10:12:25.418784      smbase 7b9e6000  entry 7b9ee000

  628 10:12:25.422110             ss_start 7b9f5c00  code_end 7b9ee208

  629 10:12:25.422198  CPU 0x1

  630 10:12:25.425814      smbase 7b9e5c00  entry 7b9edc00

  631 10:12:25.432440             ss_start 7b9f5800  code_end 7b9ede08

  632 10:12:25.432557  CPU 0x2

  633 10:12:25.435677      smbase 7b9e5800  entry 7b9ed800

  634 10:12:25.442202             ss_start 7b9f5400  code_end 7b9eda08

  635 10:12:25.442288  CPU 0x3

  636 10:12:25.445484      smbase 7b9e5400  entry 7b9ed400

  637 10:12:25.448712             ss_start 7b9f5000  code_end 7b9ed608

  638 10:12:25.451723  CPU 0x4

  639 10:12:25.455795      smbase 7b9e5000  entry 7b9ed000

  640 10:12:25.458543             ss_start 7b9f4c00  code_end 7b9ed208

  641 10:12:25.458628  CPU 0x5

  642 10:12:25.465404      smbase 7b9e4c00  entry 7b9ecc00

  643 10:12:25.468852             ss_start 7b9f4800  code_end 7b9ece08

  644 10:12:25.468937  CPU 0x6

  645 10:12:25.471985      smbase 7b9e4800  entry 7b9ec800

  646 10:12:25.478856             ss_start 7b9f4400  code_end 7b9eca08

  647 10:12:25.478941  CPU 0x7

  648 10:12:25.481718      smbase 7b9e4400  entry 7b9ec400

  649 10:12:25.488409             ss_start 7b9f4000  code_end 7b9ec608

  650 10:12:25.495089  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  651 10:12:25.501902  Processing 11 relocs. Offset value of 0x7b9ee000

  652 10:12:25.504835  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  653 10:12:25.511649  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  654 10:12:25.518605  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  655 10:12:25.525017  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  656 10:12:25.531682  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  657 10:12:25.538387  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  658 10:12:25.544980  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  659 10:12:25.548348  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  660 10:12:25.554847  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  661 10:12:25.561534  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  662 10:12:25.568331  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  663 10:12:25.574893  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  664 10:12:25.581669  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  665 10:12:25.588095  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  666 10:12:25.594824  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  667 10:12:25.598062  smm_module_setup_stub: stack_top = 0x7b804000

  668 10:12:25.605055  smm_module_setup_stub: per cpu stack_size = 0x800

  669 10:12:25.607847  smm_module_setup_stub: runtime.start32_offset = 0x4c

  670 10:12:25.615226  smm_module_setup_stub: runtime.smm_size = 0x200000

  671 10:12:25.617971  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  672 10:12:25.623390  Clearing SMI status registers

  673 10:12:25.626789  SMI_STS: PM1 

  674 10:12:25.626874  PM1_STS: WAK PWRBTN 

  675 10:12:25.637041  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  676 10:12:25.640358  In relocation handler: CPU 0

  677 10:12:25.643621  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  678 10:12:25.646646  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  679 10:12:25.650189  Relocation complete.

  680 10:12:25.656594  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  681 10:12:25.659879  In relocation handler: CPU 5

  682 10:12:25.663054  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  683 10:12:25.666737  Relocation complete.

  684 10:12:25.673432  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  685 10:12:25.676519  In relocation handler: CPU 3

  686 10:12:25.680195  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  687 10:12:25.686371  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  688 10:12:25.686506  Relocation complete.

  689 10:12:25.693386  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  690 10:12:25.696562  In relocation handler: CPU 2

  691 10:12:25.702994  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  692 10:12:25.706488  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  693 10:12:25.709797  Relocation complete.

  694 10:12:25.716501  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  695 10:12:25.719750  In relocation handler: CPU 4

  696 10:12:25.722782  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  697 10:12:25.726367  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  698 10:12:25.729829  Relocation complete.

  699 10:12:25.735940  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  700 10:12:25.739769  In relocation handler: CPU 1

  701 10:12:25.742749  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  702 10:12:25.749377  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  703 10:12:25.749480  Relocation complete.

  704 10:12:25.759198  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  705 10:12:25.762907  In relocation handler: CPU 7

  706 10:12:25.766126  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  707 10:12:25.769609  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  708 10:12:25.772684  Relocation complete.

  709 10:12:25.779574  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  710 10:12:25.782698  In relocation handler: CPU 6

  711 10:12:25.785729  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  712 10:12:25.789201  Relocation complete.

  713 10:12:25.789287  Initializing CPU #0

  714 10:12:25.792584  CPU: vendor Intel device 906a4

  715 10:12:25.799889  CPU: family 06, model 9a, stepping 04

  716 10:12:25.799974  Clearing out pending MCEs

  717 10:12:25.802555  cpu: energy policy set to 7

  718 10:12:25.805876  Turbo is available but hidden

  719 10:12:25.809125  Turbo is available and visible

  720 10:12:25.812343  microcode: Update skipped, already up-to-date

  721 10:12:25.815751  CPU #0 initialized

  722 10:12:25.819295  Initializing CPU #5

  723 10:12:25.819422  Initializing CPU #1

  724 10:12:25.822627  Initializing CPU #4

  725 10:12:25.822768  Initializing CPU #3

  726 10:12:25.825831  Initializing CPU #2

  727 10:12:25.829242  CPU: vendor Intel device 906a4

  728 10:12:25.832291  CPU: family 06, model 9a, stepping 04

  729 10:12:25.835812  Initializing CPU #6

  730 10:12:25.839337  CPU: vendor Intel device 906a4

  731 10:12:25.842527  CPU: family 06, model 9a, stepping 04

  732 10:12:25.845716  CPU: vendor Intel device 906a4

  733 10:12:25.849046  CPU: family 06, model 9a, stepping 04

  734 10:12:25.852518  Clearing out pending MCEs

  735 10:12:25.855573  CPU: vendor Intel device 906a4

  736 10:12:25.858852  CPU: family 06, model 9a, stepping 04

  737 10:12:25.862326  CPU: vendor Intel device 906a4

  738 10:12:25.866106  CPU: family 06, model 9a, stepping 04

  739 10:12:25.869275  cpu: energy policy set to 7

  740 10:12:25.872217  Clearing out pending MCEs

  741 10:12:25.875749  microcode: Update skipped, already up-to-date

  742 10:12:25.879469  CPU #4 initialized

  743 10:12:25.879554  cpu: energy policy set to 7

  744 10:12:25.882215  Clearing out pending MCEs

  745 10:12:25.885926  Clearing out pending MCEs

  746 10:12:25.888874  Clearing out pending MCEs

  747 10:12:25.892259  cpu: energy policy set to 7

  748 10:12:25.892344  cpu: energy policy set to 7

  749 10:12:25.899046  microcode: Update skipped, already up-to-date

  750 10:12:25.899131  CPU #2 initialized

  751 10:12:25.902147  cpu: energy policy set to 7

  752 10:12:25.909437  microcode: Update skipped, already up-to-date

  753 10:12:25.909552  CPU #3 initialized

  754 10:12:25.915704  microcode: Update skipped, already up-to-date

  755 10:12:25.915837  CPU #1 initialized

  756 10:12:25.918720  CPU: vendor Intel device 906a4

  757 10:12:25.922028  CPU: family 06, model 9a, stepping 04

  758 10:12:25.925548  Initializing CPU #7

  759 10:12:25.928949  Clearing out pending MCEs

  760 10:12:25.931973  microcode: Update skipped, already up-to-date

  761 10:12:25.935612  CPU #5 initialized

  762 10:12:25.938583  CPU: vendor Intel device 906a4

  763 10:12:25.942145  CPU: family 06, model 9a, stepping 04

  764 10:12:25.945373  cpu: energy policy set to 7

  765 10:12:25.945505  Clearing out pending MCEs

  766 10:12:25.951815  microcode: Update skipped, already up-to-date

  767 10:12:25.951940  CPU #6 initialized

  768 10:12:25.955701  cpu: energy policy set to 7

  769 10:12:25.962249  microcode: Update skipped, already up-to-date

  770 10:12:25.962381  CPU #7 initialized

  771 10:12:25.965492  bsp_do_flight_plan done after 717 msecs.

  772 10:12:25.968600  CPU: frequency set to 4400 MHz

  773 10:12:25.971927  Enabling SMIs.

  774 10:12:25.978492  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms

  775 10:12:25.994130  Probing TPM I2C: done! DID_VID 0x00281ae0

  776 10:12:25.997750  Locality already claimed

  777 10:12:26.000868  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  778 10:12:26.012009  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  779 10:12:26.015490  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  780 10:12:26.022128  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  781 10:12:26.029252  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  782 10:12:26.032416  Found a VBT of 9216 bytes after decompression

  783 10:12:26.035384  PCI  1.0, PIN A, using IRQ #16

  784 10:12:26.038961  PCI  2.0, PIN A, using IRQ #17

  785 10:12:26.042185  PCI  4.0, PIN A, using IRQ #18

  786 10:12:26.045516  PCI  5.0, PIN A, using IRQ #16

  787 10:12:26.048704  PCI  6.0, PIN A, using IRQ #16

  788 10:12:26.052075  PCI  6.2, PIN C, using IRQ #18

  789 10:12:26.055891  PCI  7.0, PIN A, using IRQ #19

  790 10:12:26.058994  PCI  7.1, PIN B, using IRQ #20

  791 10:12:26.062137  PCI  7.2, PIN C, using IRQ #21

  792 10:12:26.065387  PCI  7.3, PIN D, using IRQ #22

  793 10:12:26.069060  PCI  8.0, PIN A, using IRQ #23

  794 10:12:26.072227  PCI  D.0, PIN A, using IRQ #17

  795 10:12:26.072359  PCI  D.1, PIN B, using IRQ #19

  796 10:12:26.075270  PCI 10.0, PIN A, using IRQ #24

  797 10:12:26.078737  PCI 10.1, PIN B, using IRQ #25

  798 10:12:26.082026  PCI 10.6, PIN C, using IRQ #20

  799 10:12:26.085272  PCI 10.7, PIN D, using IRQ #21

  800 10:12:26.088850  PCI 11.0, PIN A, using IRQ #26

  801 10:12:26.092293  PCI 11.1, PIN B, using IRQ #27

  802 10:12:26.095712  PCI 11.2, PIN C, using IRQ #28

  803 10:12:26.098984  PCI 11.3, PIN D, using IRQ #29

  804 10:12:26.102147  PCI 12.0, PIN A, using IRQ #30

  805 10:12:26.105830  PCI 12.6, PIN B, using IRQ #31

  806 10:12:26.108667  PCI 12.7, PIN C, using IRQ #22

  807 10:12:26.112148  PCI 13.0, PIN A, using IRQ #32

  808 10:12:26.115387  PCI 13.1, PIN B, using IRQ #33

  809 10:12:26.118658  PCI 13.2, PIN C, using IRQ #34

  810 10:12:26.118788  PCI 13.3, PIN D, using IRQ #35

  811 10:12:26.122322  PCI 14.0, PIN B, using IRQ #23

  812 10:12:26.125482  PCI 14.1, PIN A, using IRQ #36

  813 10:12:26.128921  PCI 14.3, PIN C, using IRQ #17

  814 10:12:26.132341  PCI 15.0, PIN A, using IRQ #37

  815 10:12:26.135515  PCI 15.1, PIN B, using IRQ #38

  816 10:12:26.138874  PCI 15.2, PIN C, using IRQ #39

  817 10:12:26.142222  PCI 15.3, PIN D, using IRQ #40

  818 10:12:26.145638  PCI 16.0, PIN A, using IRQ #18

  819 10:12:26.149066  PCI 16.1, PIN B, using IRQ #19

  820 10:12:26.152311  PCI 16.2, PIN C, using IRQ #20

  821 10:12:26.155790  PCI 16.3, PIN D, using IRQ #21

  822 10:12:26.158883  PCI 16.4, PIN A, using IRQ #18

  823 10:12:26.162196  PCI 16.5, PIN B, using IRQ #19

  824 10:12:26.165866  PCI 17.0, PIN A, using IRQ #22

  825 10:12:26.169139  PCI 19.0, PIN A, using IRQ #41

  826 10:12:26.169226  PCI 19.1, PIN B, using IRQ #42

  827 10:12:26.172363  PCI 19.2, PIN C, using IRQ #43

  828 10:12:26.176040  PCI 1C.0, PIN A, using IRQ #16

  829 10:12:26.179148  PCI 1C.1, PIN B, using IRQ #17

  830 10:12:26.182516  PCI 1C.2, PIN C, using IRQ #18

  831 10:12:26.185882  PCI 1C.3, PIN D, using IRQ #19

  832 10:12:26.189064  PCI 1C.4, PIN A, using IRQ #16

  833 10:12:26.192273  PCI 1C.5, PIN B, using IRQ #17

  834 10:12:26.196150  PCI 1C.6, PIN C, using IRQ #18

  835 10:12:26.199236  PCI 1C.7, PIN D, using IRQ #19

  836 10:12:26.202865  PCI 1D.0, PIN A, using IRQ #16

  837 10:12:26.205874  PCI 1D.1, PIN B, using IRQ #17

  838 10:12:26.208870  PCI 1D.2, PIN C, using IRQ #18

  839 10:12:26.212054  PCI 1D.3, PIN D, using IRQ #19

  840 10:12:26.215780  PCI 1E.0, PIN A, using IRQ #23

  841 10:12:26.218904  PCI 1E.1, PIN B, using IRQ #20

  842 10:12:26.219057  PCI 1E.2, PIN C, using IRQ #44

  843 10:12:26.222397  PCI 1E.3, PIN D, using IRQ #45

  844 10:12:26.225754  PCI 1F.3, PIN B, using IRQ #22

  845 10:12:26.229061  PCI 1F.4, PIN C, using IRQ #23

  846 10:12:26.232015  PCI 1F.6, PIN D, using IRQ #20

  847 10:12:26.235876  PCI 1F.7, PIN A, using IRQ #21

  848 10:12:26.242447  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  849 10:12:26.248654  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  850 10:12:26.429063  FSPS returned 0

  851 10:12:26.432490  Executing Phase 1 of FspMultiPhaseSiInit

  852 10:12:26.442285  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  853 10:12:26.445327  port C0 DISC req: usage 1 usb3 1 usb2 1

  854 10:12:26.448709  Raw Buffer output 0 00000111

  855 10:12:26.452289  Raw Buffer output 1 00000000

  856 10:12:26.455734  pmc_send_ipc_cmd succeeded

  857 10:12:26.459579  port C1 DISC req: usage 1 usb3 3 usb2 3

  858 10:12:26.462489  Raw Buffer output 0 00000331

  859 10:12:26.466073  Raw Buffer output 1 00000000

  860 10:12:26.469922  pmc_send_ipc_cmd succeeded

  861 10:12:26.473822  Detected 6 core, 8 thread CPU.

  862 10:12:26.476954  Detected 6 core, 8 thread CPU.

  863 10:12:26.482389  Detected 6 core, 8 thread CPU.

  864 10:12:26.485769  Detected 6 core, 8 thread CPU.

  865 10:12:26.489220  Detected 6 core, 8 thread CPU.

  866 10:12:26.492407  Detected 6 core, 8 thread CPU.

  867 10:12:26.495991  Detected 6 core, 8 thread CPU.

  868 10:12:26.498977  Detected 6 core, 8 thread CPU.

  869 10:12:26.502372  Detected 6 core, 8 thread CPU.

  870 10:12:26.505973  Detected 6 core, 8 thread CPU.

  871 10:12:26.509405  Detected 6 core, 8 thread CPU.

  872 10:12:26.512922  Detected 6 core, 8 thread CPU.

  873 10:12:26.516003  Detected 6 core, 8 thread CPU.

  874 10:12:26.519215  Detected 6 core, 8 thread CPU.

  875 10:12:26.522689  Detected 6 core, 8 thread CPU.

  876 10:12:26.526088  Detected 6 core, 8 thread CPU.

  877 10:12:26.529538  Detected 6 core, 8 thread CPU.

  878 10:12:26.532786  Detected 6 core, 8 thread CPU.

  879 10:12:26.535924  Detected 6 core, 8 thread CPU.

  880 10:12:26.536012  Detected 6 core, 8 thread CPU.

  881 10:12:26.539774  Detected 6 core, 8 thread CPU.

  882 10:12:26.542562  Detected 6 core, 8 thread CPU.

  883 10:12:26.835094  Detected 6 core, 8 thread CPU.

  884 10:12:26.838148  Detected 6 core, 8 thread CPU.

  885 10:12:26.841593  Detected 6 core, 8 thread CPU.

  886 10:12:26.845048  Detected 6 core, 8 thread CPU.

  887 10:12:26.848530  Detected 6 core, 8 thread CPU.

  888 10:12:26.852105  Detected 6 core, 8 thread CPU.

  889 10:12:26.855065  Detected 6 core, 8 thread CPU.

  890 10:12:26.858461  Detected 6 core, 8 thread CPU.

  891 10:12:26.862108  Detected 6 core, 8 thread CPU.

  892 10:12:26.865292  Detected 6 core, 8 thread CPU.

  893 10:12:26.868347  Detected 6 core, 8 thread CPU.

  894 10:12:26.871942  Detected 6 core, 8 thread CPU.

  895 10:12:26.875188  Detected 6 core, 8 thread CPU.

  896 10:12:26.878559  Detected 6 core, 8 thread CPU.

  897 10:12:26.881972  Detected 6 core, 8 thread CPU.

  898 10:12:26.885618  Detected 6 core, 8 thread CPU.

  899 10:12:26.888567  Detected 6 core, 8 thread CPU.

  900 10:12:26.888671  Detected 6 core, 8 thread CPU.

  901 10:12:26.892009  Detected 6 core, 8 thread CPU.

  902 10:12:26.895685  Detected 6 core, 8 thread CPU.

  903 10:12:26.898791  Display FSP Version Info HOB

  904 10:12:26.901965  Reference Code - CPU = c.0.65.70

  905 10:12:26.905275  uCode Version = 0.0.4.23

  906 10:12:26.909002  TXT ACM version = ff.ff.ff.ffff

  907 10:12:26.911737  Reference Code - ME = c.0.65.70

  908 10:12:26.915186  MEBx version = 0.0.0.0

  909 10:12:26.918565  ME Firmware Version = Lite SKU

  910 10:12:26.922100  Reference Code - PCH = c.0.65.70

  911 10:12:26.925626  PCH-CRID Status = Disabled

  912 10:12:26.928416  PCH-CRID Original Value = ff.ff.ff.ffff

  913 10:12:26.931828  PCH-CRID New Value = ff.ff.ff.ffff

  914 10:12:26.935486  OPROM - RST - RAID = ff.ff.ff.ffff

  915 10:12:26.938732  PCH Hsio Version = 4.0.0.0

  916 10:12:26.941656  Reference Code - SA - System Agent = c.0.65.70

  917 10:12:26.945130  Reference Code - MRC = 0.0.3.80

  918 10:12:26.948688  SA - PCIe Version = c.0.65.70

  919 10:12:26.951902  SA-CRID Status = Disabled

  920 10:12:26.955145  SA-CRID Original Value = 0.0.0.4

  921 10:12:26.958561  SA-CRID New Value = 0.0.0.4

  922 10:12:26.961961  OPROM - VBIOS = ff.ff.ff.ffff

  923 10:12:26.964921  IO Manageability Engine FW Version = 24.0.4.0

  924 10:12:26.968283  PHY Build Version = 0.0.0.2016

  925 10:12:26.971884  Thunderbolt(TM) FW Version = 0.0.0.0

  926 10:12:26.978879  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  927 10:12:26.985218  BS: BS_DEV_INIT_CHIPS run times (exec / console): 491 / 507 ms

  928 10:12:26.985307  Enumerating buses...

  929 10:12:26.991756  Show all devs... Before device enumeration.

  930 10:12:26.991845  Root Device: enabled 1

  931 10:12:26.995187  CPU_CLUSTER: 0: enabled 1

  932 10:12:26.998474  DOMAIN: 0000: enabled 1

  933 10:12:26.998561  GPIO: 0: enabled 1

  934 10:12:27.002003  PCI: 00:00.0: enabled 1

  935 10:12:27.005632  PCI: 00:01.0: enabled 0

  936 10:12:27.008926  PCI: 00:01.1: enabled 0

  937 10:12:27.009013  PCI: 00:02.0: enabled 1

  938 10:12:27.011944  PCI: 00:04.0: enabled 1

  939 10:12:27.015139  PCI: 00:05.0: enabled 0

  940 10:12:27.018510  PCI: 00:06.0: enabled 1

  941 10:12:27.018596  PCI: 00:06.2: enabled 0

  942 10:12:27.022124  PCI: 00:07.0: enabled 0

  943 10:12:27.025341  PCI: 00:07.1: enabled 0

  944 10:12:27.028555  PCI: 00:07.2: enabled 0

  945 10:12:27.028641  PCI: 00:07.3: enabled 0

  946 10:12:27.032006  PCI: 00:08.0: enabled 0

  947 10:12:27.035360  PCI: 00:09.0: enabled 0

  948 10:12:27.035446  PCI: 00:0a.0: enabled 1

  949 10:12:27.038716  PCI: 00:0d.0: enabled 1

  950 10:12:27.041965  PCI: 00:0d.1: enabled 0

  951 10:12:27.045638  PCI: 00:0d.2: enabled 0

  952 10:12:27.045725  PCI: 00:0d.3: enabled 0

  953 10:12:27.048671  PCI: 00:0e.0: enabled 0

  954 10:12:27.052157  PCI: 00:10.0: enabled 0

  955 10:12:27.052242  PCI: 00:10.1: enabled 0

  956 10:12:27.055493  PCI: 00:10.6: enabled 0

  957 10:12:27.059186  PCI: 00:10.7: enabled 0

  958 10:12:27.062242  PCI: 00:12.0: enabled 0

  959 10:12:27.062329  PCI: 00:12.6: enabled 0

  960 10:12:27.065337  PCI: 00:12.7: enabled 0

  961 10:12:27.069038  PCI: 00:13.0: enabled 0

  962 10:12:27.072116  PCI: 00:14.0: enabled 1

  963 10:12:27.072202  PCI: 00:14.1: enabled 0

  964 10:12:27.075720  PCI: 00:14.2: enabled 1

  965 10:12:27.079035  PCI: 00:14.3: enabled 1

  966 10:12:27.082105  PCI: 00:15.0: enabled 1

  967 10:12:27.082206  PCI: 00:15.1: enabled 1

  968 10:12:27.085243  PCI: 00:15.2: enabled 0

  969 10:12:27.088959  PCI: 00:15.3: enabled 1

  970 10:12:27.092242  PCI: 00:16.0: enabled 1

  971 10:12:27.092329  PCI: 00:16.1: enabled 0

  972 10:12:27.095386  PCI: 00:16.2: enabled 0

  973 10:12:27.098879  PCI: 00:16.3: enabled 0

  974 10:12:27.098966  PCI: 00:16.4: enabled 0

  975 10:12:27.101871  PCI: 00:16.5: enabled 0

  976 10:12:27.105378  PCI: 00:17.0: enabled 1

  977 10:12:27.108476  PCI: 00:19.0: enabled 0

  978 10:12:27.108562  PCI: 00:19.1: enabled 1

  979 10:12:27.112191  PCI: 00:19.2: enabled 0

  980 10:12:27.115599  PCI: 00:1a.0: enabled 0

  981 10:12:27.118923  PCI: 00:1c.0: enabled 0

  982 10:12:27.119010  PCI: 00:1c.1: enabled 0

  983 10:12:27.122075  PCI: 00:1c.2: enabled 0

  984 10:12:27.125131  PCI: 00:1c.3: enabled 0

  985 10:12:27.128649  PCI: 00:1c.4: enabled 0

  986 10:12:27.128735  PCI: 00:1c.5: enabled 0

  987 10:12:27.131905  PCI: 00:1c.6: enabled 0

  988 10:12:27.135606  PCI: 00:1c.7: enabled 0

  989 10:12:27.135693  PCI: 00:1d.0: enabled 0

  990 10:12:27.138710  PCI: 00:1d.1: enabled 0

  991 10:12:27.142282  PCI: 00:1d.2: enabled 0

  992 10:12:27.145362  PCI: 00:1d.3: enabled 0

  993 10:12:27.145449  PCI: 00:1e.0: enabled 1

  994 10:12:27.148575  PCI: 00:1e.1: enabled 0

  995 10:12:27.151962  PCI: 00:1e.2: enabled 0

  996 10:12:27.155117  PCI: 00:1e.3: enabled 1

  997 10:12:27.155204  PCI: 00:1f.0: enabled 1

  998 10:12:27.158805  PCI: 00:1f.1: enabled 0

  999 10:12:27.161979  PCI: 00:1f.2: enabled 1

 1000 10:12:27.165544  PCI: 00:1f.3: enabled 1

 1001 10:12:27.165632  PCI: 00:1f.4: enabled 0

 1002 10:12:27.168465  PCI: 00:1f.5: enabled 1

 1003 10:12:27.171821  PCI: 00:1f.6: enabled 0

 1004 10:12:27.171909  PCI: 00:1f.7: enabled 0

 1005 10:12:27.175521  GENERIC: 0.0: enabled 1

 1006 10:12:27.178741  GENERIC: 0.0: enabled 1

 1007 10:12:27.181982  GENERIC: 1.0: enabled 1

 1008 10:12:27.182070  GENERIC: 0.0: enabled 1

 1009 10:12:27.185427  GENERIC: 1.0: enabled 1

 1010 10:12:27.188695  USB0 port 0: enabled 1

 1011 10:12:27.191726  USB0 port 0: enabled 1

 1012 10:12:27.191813  GENERIC: 0.0: enabled 1

 1013 10:12:27.195269  I2C: 00:1a: enabled 1

 1014 10:12:27.198768  I2C: 00:31: enabled 1

 1015 10:12:27.198855  I2C: 00:32: enabled 1

 1016 10:12:27.201909  I2C: 00:50: enabled 1

 1017 10:12:27.205489  I2C: 00:10: enabled 1

 1018 10:12:27.205577  I2C: 00:15: enabled 1

 1019 10:12:27.208593  I2C: 00:2c: enabled 1

 1020 10:12:27.211843  GENERIC: 0.0: enabled 1

 1021 10:12:27.211930  SPI: 00: enabled 1

 1022 10:12:27.216088  PNP: 0c09.0: enabled 1

 1023 10:12:27.218906  GENERIC: 0.0: enabled 1

 1024 10:12:27.218992  USB3 port 0: enabled 1

 1025 10:12:27.222046  USB3 port 1: enabled 0

 1026 10:12:27.225191  USB3 port 2: enabled 1

 1027 10:12:27.228661  USB3 port 3: enabled 0

 1028 10:12:27.228809  USB2 port 0: enabled 1

 1029 10:12:27.232120  USB2 port 1: enabled 0

 1030 10:12:27.235173  USB2 port 2: enabled 1

 1031 10:12:27.235295  USB2 port 3: enabled 0

 1032 10:12:27.238603  USB2 port 4: enabled 0

 1033 10:12:27.241799  USB2 port 5: enabled 1

 1034 10:12:27.241921  USB2 port 6: enabled 0

 1035 10:12:27.245334  USB2 port 7: enabled 0

 1036 10:12:27.248943  USB2 port 8: enabled 1

 1037 10:12:27.252026  USB2 port 9: enabled 1

 1038 10:12:27.252148  USB3 port 0: enabled 1

 1039 10:12:27.255363  USB3 port 1: enabled 0

 1040 10:12:27.258556  USB3 port 2: enabled 0

 1041 10:12:27.258683  USB3 port 3: enabled 0

 1042 10:12:27.262021  GENERIC: 0.0: enabled 1

 1043 10:12:27.265510  GENERIC: 1.0: enabled 1

 1044 10:12:27.265614  APIC: 00: enabled 1

 1045 10:12:27.268937  APIC: 12: enabled 1

 1046 10:12:27.272144  APIC: 14: enabled 1

 1047 10:12:27.272243  APIC: 16: enabled 1

 1048 10:12:27.275572  APIC: 10: enabled 1

 1049 10:12:27.275654  APIC: 01: enabled 1

 1050 10:12:27.278848  APIC: 09: enabled 1

 1051 10:12:27.282243  APIC: 08: enabled 1

 1052 10:12:27.282341  Compare with tree...

 1053 10:12:27.285688  Root Device: enabled 1

 1054 10:12:27.288737   CPU_CLUSTER: 0: enabled 1

 1055 10:12:27.292056    APIC: 00: enabled 1

 1056 10:12:27.292145    APIC: 12: enabled 1

 1057 10:12:27.295548    APIC: 14: enabled 1

 1058 10:12:27.298790    APIC: 16: enabled 1

 1059 10:12:27.298875    APIC: 10: enabled 1

 1060 10:12:27.302409    APIC: 01: enabled 1

 1061 10:12:27.305622    APIC: 09: enabled 1

 1062 10:12:27.305721    APIC: 08: enabled 1

 1063 10:12:27.309016   DOMAIN: 0000: enabled 1

 1064 10:12:27.312528    GPIO: 0: enabled 1

 1065 10:12:27.312625    PCI: 00:00.0: enabled 1

 1066 10:12:27.315335    PCI: 00:01.0: enabled 0

 1067 10:12:27.318899    PCI: 00:01.1: enabled 0

 1068 10:12:27.322277    PCI: 00:02.0: enabled 1

 1069 10:12:27.325430    PCI: 00:04.0: enabled 1

 1070 10:12:27.325528     GENERIC: 0.0: enabled 1

 1071 10:12:27.328709    PCI: 00:05.0: enabled 0

 1072 10:12:27.332380    PCI: 00:06.0: enabled 1

 1073 10:12:27.335308    PCI: 00:06.2: enabled 0

 1074 10:12:27.339016    PCI: 00:08.0: enabled 0

 1075 10:12:27.339114    PCI: 00:09.0: enabled 0

 1076 10:12:27.342235    PCI: 00:0a.0: enabled 1

 1077 10:12:27.345378    PCI: 00:0d.0: enabled 1

 1078 10:12:27.348634     USB0 port 0: enabled 1

 1079 10:12:27.351958      USB3 port 0: enabled 1

 1080 10:12:27.352057      USB3 port 1: enabled 0

 1081 10:12:27.355606      USB3 port 2: enabled 1

 1082 10:12:27.359014      USB3 port 3: enabled 0

 1083 10:12:27.362694    PCI: 00:0d.1: enabled 0

 1084 10:12:27.365329    PCI: 00:0d.2: enabled 0

 1085 10:12:27.365428    PCI: 00:0d.3: enabled 0

 1086 10:12:27.369111    PCI: 00:0e.0: enabled 0

 1087 10:12:27.372414    PCI: 00:10.0: enabled 0

 1088 10:12:27.375505    PCI: 00:10.1: enabled 0

 1089 10:12:27.378931    PCI: 00:10.6: enabled 0

 1090 10:12:27.379018    PCI: 00:10.7: enabled 0

 1091 10:12:27.382382    PCI: 00:12.0: enabled 0

 1092 10:12:27.385690    PCI: 00:12.6: enabled 0

 1093 10:12:27.388825    PCI: 00:12.7: enabled 0

 1094 10:12:27.392288    PCI: 00:13.0: enabled 0

 1095 10:12:27.392363    PCI: 00:14.0: enabled 1

 1096 10:12:27.395802     USB0 port 0: enabled 1

 1097 10:12:27.398828      USB2 port 0: enabled 1

 1098 10:12:27.402291      USB2 port 1: enabled 0

 1099 10:12:27.405536      USB2 port 2: enabled 1

 1100 10:12:27.405622      USB2 port 3: enabled 0

 1101 10:12:27.408863      USB2 port 4: enabled 0

 1102 10:12:27.412397      USB2 port 5: enabled 1

 1103 10:12:27.415510      USB2 port 6: enabled 0

 1104 10:12:27.419214      USB2 port 7: enabled 0

 1105 10:12:27.419290      USB2 port 8: enabled 1

 1106 10:12:27.422622      USB2 port 9: enabled 1

 1107 10:12:27.425666      USB3 port 0: enabled 1

 1108 10:12:27.429034      USB3 port 1: enabled 0

 1109 10:12:27.431910      USB3 port 2: enabled 0

 1110 10:12:27.435300      USB3 port 3: enabled 0

 1111 10:12:27.435385    PCI: 00:14.1: enabled 0

 1112 10:12:27.439326    PCI: 00:14.2: enabled 1

 1113 10:12:27.442228    PCI: 00:14.3: enabled 1

 1114 10:12:27.445662     GENERIC: 0.0: enabled 1

 1115 10:12:27.448998    PCI: 00:15.0: enabled 1

 1116 10:12:27.449076     I2C: 00:1a: enabled 1

 1117 10:12:27.452228     I2C: 00:31: enabled 1

 1118 10:12:27.455620     I2C: 00:32: enabled 1

 1119 10:12:27.458572    PCI: 00:15.1: enabled 1

 1120 10:12:27.458646     I2C: 00:50: enabled 1

 1121 10:12:27.461801    PCI: 00:15.2: enabled 0

 1122 10:12:27.465469    PCI: 00:15.3: enabled 1

 1123 10:12:27.468687     I2C: 00:10: enabled 1

 1124 10:12:27.471801    PCI: 00:16.0: enabled 1

 1125 10:12:27.471933    PCI: 00:16.1: enabled 0

 1126 10:12:27.475653    PCI: 00:16.2: enabled 0

 1127 10:12:27.478731    PCI: 00:16.3: enabled 0

 1128 10:12:27.481896    PCI: 00:16.4: enabled 0

 1129 10:12:27.485294    PCI: 00:16.5: enabled 0

 1130 10:12:27.485418    PCI: 00:17.0: enabled 1

 1131 10:12:27.488719    PCI: 00:19.0: enabled 0

 1132 10:12:27.491913    PCI: 00:19.1: enabled 1

 1133 10:12:27.495439     I2C: 00:15: enabled 1

 1134 10:12:27.498753     I2C: 00:2c: enabled 1

 1135 10:12:27.498877    PCI: 00:19.2: enabled 0

 1136 10:12:27.501760    PCI: 00:1a.0: enabled 0

 1137 10:12:27.505386    PCI: 00:1e.0: enabled 1

 1138 10:12:27.508414    PCI: 00:1e.1: enabled 0

 1139 10:12:27.511998    PCI: 00:1e.2: enabled 0

 1140 10:12:27.512118    PCI: 00:1e.3: enabled 1

 1141 10:12:27.515141     SPI: 00: enabled 1

 1142 10:12:27.518500    PCI: 00:1f.0: enabled 1

 1143 10:12:27.521923     PNP: 0c09.0: enabled 1

 1144 10:12:27.522048    PCI: 00:1f.1: enabled 0

 1145 10:12:27.525085    PCI: 00:1f.2: enabled 1

 1146 10:12:27.528503     GENERIC: 0.0: enabled 1

 1147 10:12:27.532040      GENERIC: 0.0: enabled 1

 1148 10:12:27.535298      GENERIC: 1.0: enabled 1

 1149 10:12:27.535422    PCI: 00:1f.3: enabled 1

 1150 10:12:27.538630    PCI: 00:1f.4: enabled 0

 1151 10:12:27.541832    PCI: 00:1f.5: enabled 1

 1152 10:12:27.545306    PCI: 00:1f.6: enabled 0

 1153 10:12:27.548613    PCI: 00:1f.7: enabled 0

 1154 10:12:27.548731  Root Device scanning...

 1155 10:12:27.551711  scan_static_bus for Root Device

 1156 10:12:27.555037  CPU_CLUSTER: 0 enabled

 1157 10:12:27.559251  DOMAIN: 0000 enabled

 1158 10:12:27.559375  DOMAIN: 0000 scanning...

 1159 10:12:27.562028  PCI: pci_scan_bus for bus 00

 1160 10:12:27.565135  PCI: 00:00.0 [8086/0000] ops

 1161 10:12:27.568608  PCI: 00:00.0 [8086/4609] enabled

 1162 10:12:27.571826  PCI: 00:02.0 [8086/0000] bus ops

 1163 10:12:27.575631  PCI: 00:02.0 [8086/46b3] enabled

 1164 10:12:27.578425  PCI: 00:04.0 [8086/0000] bus ops

 1165 10:12:27.581844  PCI: 00:04.0 [8086/461d] enabled

 1166 10:12:27.585175  PCI: 00:06.0 [8086/0000] bus ops

 1167 10:12:27.588571  PCI: 00:06.0 [8086/464d] enabled

 1168 10:12:27.592123  PCI: 00:08.0 [8086/464f] disabled

 1169 10:12:27.595500  PCI: 00:0a.0 [8086/467d] enabled

 1170 10:12:27.598710  PCI: 00:0d.0 [8086/0000] bus ops

 1171 10:12:27.601714  PCI: 00:0d.0 [8086/461e] enabled

 1172 10:12:27.605258  PCI: 00:14.0 [8086/0000] bus ops

 1173 10:12:27.608987  PCI: 00:14.0 [8086/51ed] enabled

 1174 10:12:27.611965  PCI: 00:14.2 [8086/51ef] enabled

 1175 10:12:27.615091  PCI: 00:14.3 [8086/0000] bus ops

 1176 10:12:27.618655  PCI: 00:14.3 [8086/51f0] enabled

 1177 10:12:27.622052  PCI: 00:15.0 [8086/0000] bus ops

 1178 10:12:27.625566  PCI: 00:15.0 [8086/51e8] enabled

 1179 10:12:27.628677  PCI: 00:15.1 [8086/0000] bus ops

 1180 10:12:27.632074  PCI: 00:15.1 [8086/51e9] enabled

 1181 10:12:27.635334  PCI: 00:15.2 [8086/0000] bus ops

 1182 10:12:27.638831  PCI: 00:15.2 [8086/51ea] disabled

 1183 10:12:27.641898  PCI: 00:15.3 [8086/0000] bus ops

 1184 10:12:27.645148  PCI: 00:15.3 [8086/51eb] enabled

 1185 10:12:27.648723  PCI: 00:16.0 [8086/0000] ops

 1186 10:12:27.652002  PCI: 00:16.0 [8086/51e0] enabled

 1187 10:12:27.658456  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1188 10:12:27.662298  PCI: 00:19.0 [8086/0000] bus ops

 1189 10:12:27.665457  PCI: 00:19.0 [8086/51c5] disabled

 1190 10:12:27.668845  PCI: 00:19.1 [8086/0000] bus ops

 1191 10:12:27.671936  PCI: 00:19.1 [8086/51c6] enabled

 1192 10:12:27.675408  PCI: 00:1e.0 [8086/0000] ops

 1193 10:12:27.678397  PCI: 00:1e.0 [8086/51a8] enabled

 1194 10:12:27.682237  PCI: 00:1e.3 [8086/0000] bus ops

 1195 10:12:27.685416  PCI: 00:1e.3 [8086/51ab] enabled

 1196 10:12:27.688598  PCI: 00:1f.0 [8086/0000] bus ops

 1197 10:12:27.691953  PCI: 00:1f.0 [8086/5182] enabled

 1198 10:12:27.695737  RTC Init

 1199 10:12:27.699266  Set power on after power failure.

 1200 10:12:27.699350  Disabling Deep S3

 1201 10:12:27.701898  Disabling Deep S3

 1202 10:12:27.705393  Disabling Deep S4

 1203 10:12:27.705477  Disabling Deep S4

 1204 10:12:27.708691  Disabling Deep S5

 1205 10:12:27.708782  Disabling Deep S5

 1206 10:12:27.712061  PCI: 00:1f.2 [0000/0000] hidden

 1207 10:12:27.715310  PCI: 00:1f.3 [8086/0000] bus ops

 1208 10:12:27.718891  PCI: 00:1f.3 [8086/51c8] enabled

 1209 10:12:27.722278  PCI: 00:1f.5 [8086/0000] bus ops

 1210 10:12:27.725297  PCI: 00:1f.5 [8086/51a4] enabled

 1211 10:12:27.728647  GPIO: 0 enabled

 1212 10:12:27.731692  PCI: Leftover static devices:

 1213 10:12:27.731777  PCI: 00:01.0

 1214 10:12:27.731843  PCI: 00:01.1

 1215 10:12:27.735355  PCI: 00:05.0

 1216 10:12:27.735439  PCI: 00:06.2

 1217 10:12:27.738660  PCI: 00:09.0

 1218 10:12:27.738745  PCI: 00:0d.1

 1219 10:12:27.738811  PCI: 00:0d.2

 1220 10:12:27.741615  PCI: 00:0d.3

 1221 10:12:27.741698  PCI: 00:0e.0

 1222 10:12:27.745079  PCI: 00:10.0

 1223 10:12:27.745163  PCI: 00:10.1

 1224 10:12:27.748299  PCI: 00:10.6

 1225 10:12:27.748383  PCI: 00:10.7

 1226 10:12:27.748449  PCI: 00:12.0

 1227 10:12:27.752017  PCI: 00:12.6

 1228 10:12:27.752100  PCI: 00:12.7

 1229 10:12:27.755331  PCI: 00:13.0

 1230 10:12:27.755416  PCI: 00:14.1

 1231 10:12:27.755482  PCI: 00:16.1

 1232 10:12:27.758587  PCI: 00:16.2

 1233 10:12:27.758671  PCI: 00:16.3

 1234 10:12:27.761791  PCI: 00:16.4

 1235 10:12:27.761875  PCI: 00:16.5

 1236 10:12:27.761941  PCI: 00:17.0

 1237 10:12:27.765254  PCI: 00:19.2

 1238 10:12:27.765338  PCI: 00:1a.0

 1239 10:12:27.768599  PCI: 00:1e.1

 1240 10:12:27.768687  PCI: 00:1e.2

 1241 10:12:27.772007  PCI: 00:1f.1

 1242 10:12:27.772093  PCI: 00:1f.4

 1243 10:12:27.772161  PCI: 00:1f.6

 1244 10:12:27.775018  PCI: 00:1f.7

 1245 10:12:27.778510  PCI: Check your devicetree.cb.

 1246 10:12:27.778594  PCI: 00:02.0 scanning...

 1247 10:12:27.785569  scan_generic_bus for PCI: 00:02.0

 1248 10:12:27.788473  scan_generic_bus for PCI: 00:02.0 done

 1249 10:12:27.791563  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1250 10:12:27.795196  PCI: 00:04.0 scanning...

 1251 10:12:27.798191  scan_generic_bus for PCI: 00:04.0

 1252 10:12:27.801610  GENERIC: 0.0 enabled

 1253 10:12:27.805003  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1254 10:12:27.811585  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1255 10:12:27.814847  PCI: 00:06.0 scanning...

 1256 10:12:27.818749  do_pci_scan_bridge for PCI: 00:06.0

 1257 10:12:27.821609  PCI: pci_scan_bus for bus 01

 1258 10:12:27.825037  PCI: 01:00.0 [15b7/5009] enabled

 1259 10:12:27.828492  Enabling Common Clock Configuration

 1260 10:12:27.832003  L1 Sub-State supported from root port 6

 1261 10:12:27.835031  L1 Sub-State Support = 0x5

 1262 10:12:27.838732  CommonModeRestoreTime = 0x6e

 1263 10:12:27.841625  Power On Value = 0x5, Power On Scale = 0x2

 1264 10:12:27.841731  ASPM: Enabled L1

 1265 10:12:27.848417  PCIe: Max_Payload_Size adjusted to 256

 1266 10:12:27.848519  PCI: 01:00.0: Enabled LTR

 1267 10:12:27.854956  PCI: 01:00.0: Programmed LTR max latencies

 1268 10:12:27.858424  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1269 10:12:27.861803  PCI: 00:0d.0 scanning...

 1270 10:12:27.864990  scan_static_bus for PCI: 00:0d.0

 1271 10:12:27.865074  USB0 port 0 enabled

 1272 10:12:27.868585  USB0 port 0 scanning...

 1273 10:12:27.872027  scan_static_bus for USB0 port 0

 1274 10:12:27.875322  USB3 port 0 enabled

 1275 10:12:27.875407  USB3 port 1 disabled

 1276 10:12:27.878540  USB3 port 2 enabled

 1277 10:12:27.881995  USB3 port 3 disabled

 1278 10:12:27.882082  USB3 port 0 scanning...

 1279 10:12:27.884943  scan_static_bus for USB3 port 0

 1280 10:12:27.888673  scan_static_bus for USB3 port 0 done

 1281 10:12:27.895217  scan_bus: bus USB3 port 0 finished in 6 msecs

 1282 10:12:27.898561  USB3 port 2 scanning...

 1283 10:12:27.901873  scan_static_bus for USB3 port 2

 1284 10:12:27.905090  scan_static_bus for USB3 port 2 done

 1285 10:12:27.908693  scan_bus: bus USB3 port 2 finished in 6 msecs

 1286 10:12:27.911683  scan_static_bus for USB0 port 0 done

 1287 10:12:27.918520  scan_bus: bus USB0 port 0 finished in 43 msecs

 1288 10:12:27.921824  scan_static_bus for PCI: 00:0d.0 done

 1289 10:12:27.925004  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1290 10:12:27.928328  PCI: 00:14.0 scanning...

 1291 10:12:27.931636  scan_static_bus for PCI: 00:14.0

 1292 10:12:27.934847  USB0 port 0 enabled

 1293 10:12:27.934931  USB0 port 0 scanning...

 1294 10:12:27.938429  scan_static_bus for USB0 port 0

 1295 10:12:27.941848  USB2 port 0 enabled

 1296 10:12:27.941932  USB2 port 1 disabled

 1297 10:12:27.945026  USB2 port 2 enabled

 1298 10:12:27.948398  USB2 port 3 disabled

 1299 10:12:27.948481  USB2 port 4 disabled

 1300 10:12:27.951606  USB2 port 5 enabled

 1301 10:12:27.955110  USB2 port 6 disabled

 1302 10:12:27.955194  USB2 port 7 disabled

 1303 10:12:27.958316  USB2 port 8 enabled

 1304 10:12:27.961786  USB2 port 9 enabled

 1305 10:12:27.961870  USB3 port 0 enabled

 1306 10:12:27.965335  USB3 port 1 disabled

 1307 10:12:27.965418  USB3 port 2 disabled

 1308 10:12:27.968230  USB3 port 3 disabled

 1309 10:12:27.971565  USB2 port 0 scanning...

 1310 10:12:27.975349  scan_static_bus for USB2 port 0

 1311 10:12:27.978281  scan_static_bus for USB2 port 0 done

 1312 10:12:27.981794  scan_bus: bus USB2 port 0 finished in 6 msecs

 1313 10:12:27.985109  USB2 port 2 scanning...

 1314 10:12:27.988414  scan_static_bus for USB2 port 2

 1315 10:12:27.991828  scan_static_bus for USB2 port 2 done

 1316 10:12:27.995326  scan_bus: bus USB2 port 2 finished in 6 msecs

 1317 10:12:27.998372  USB2 port 5 scanning...

 1318 10:12:28.001530  scan_static_bus for USB2 port 5

 1319 10:12:28.004938  scan_static_bus for USB2 port 5 done

 1320 10:12:28.011465  scan_bus: bus USB2 port 5 finished in 6 msecs

 1321 10:12:28.011549  USB2 port 8 scanning...

 1322 10:12:28.015102  scan_static_bus for USB2 port 8

 1323 10:12:28.021641  scan_static_bus for USB2 port 8 done

 1324 10:12:28.025234  scan_bus: bus USB2 port 8 finished in 6 msecs

 1325 10:12:28.028377  USB2 port 9 scanning...

 1326 10:12:28.031811  scan_static_bus for USB2 port 9

 1327 10:12:28.034917  scan_static_bus for USB2 port 9 done

 1328 10:12:28.038212  scan_bus: bus USB2 port 9 finished in 6 msecs

 1329 10:12:28.041624  USB3 port 0 scanning...

 1330 10:12:28.044990  scan_static_bus for USB3 port 0

 1331 10:12:28.048377  scan_static_bus for USB3 port 0 done

 1332 10:12:28.051683  scan_bus: bus USB3 port 0 finished in 6 msecs

 1333 10:12:28.055107  scan_static_bus for USB0 port 0 done

 1334 10:12:28.061686  scan_bus: bus USB0 port 0 finished in 120 msecs

 1335 10:12:28.064872  scan_static_bus for PCI: 00:14.0 done

 1336 10:12:28.068191  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1337 10:12:28.071529  PCI: 00:14.3 scanning...

 1338 10:12:28.074931  scan_static_bus for PCI: 00:14.3

 1339 10:12:28.078686  GENERIC: 0.0 enabled

 1340 10:12:28.081462  scan_static_bus for PCI: 00:14.3 done

 1341 10:12:28.085143  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1342 10:12:28.088072  PCI: 00:15.0 scanning...

 1343 10:12:28.091479  scan_static_bus for PCI: 00:15.0

 1344 10:12:28.094995  I2C: 00:1a enabled

 1345 10:12:28.095093  I2C: 00:31 enabled

 1346 10:12:28.098360  I2C: 00:32 enabled

 1347 10:12:28.101775  scan_static_bus for PCI: 00:15.0 done

 1348 10:12:28.104920  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

 1349 10:12:28.108562  PCI: 00:15.1 scanning...

 1350 10:12:28.112235  scan_static_bus for PCI: 00:15.1

 1351 10:12:28.115239  I2C: 00:50 enabled

 1352 10:12:28.118611  scan_static_bus for PCI: 00:15.1 done

 1353 10:12:28.121741  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1354 10:12:28.125193  PCI: 00:15.3 scanning...

 1355 10:12:28.128495  scan_static_bus for PCI: 00:15.3

 1356 10:12:28.131970  I2C: 00:10 enabled

 1357 10:12:28.135464  scan_static_bus for PCI: 00:15.3 done

 1358 10:12:28.138483  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1359 10:12:28.141834  PCI: 00:19.1 scanning...

 1360 10:12:28.144954  scan_static_bus for PCI: 00:19.1

 1361 10:12:28.148420  I2C: 00:15 enabled

 1362 10:12:28.148542  I2C: 00:2c enabled

 1363 10:12:28.151992  scan_static_bus for PCI: 00:19.1 done

 1364 10:12:28.158214  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1365 10:12:28.161721  PCI: 00:1e.3 scanning...

 1366 10:12:28.164942  scan_generic_bus for PCI: 00:1e.3

 1367 10:12:28.165064  SPI: 00 enabled

 1368 10:12:28.171710  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1369 10:12:28.174774  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1370 10:12:28.178120  PCI: 00:1f.0 scanning...

 1371 10:12:28.181448  scan_static_bus for PCI: 00:1f.0

 1372 10:12:28.185035  PNP: 0c09.0 enabled

 1373 10:12:28.185157  PNP: 0c09.0 scanning...

 1374 10:12:28.188331  scan_static_bus for PNP: 0c09.0

 1375 10:12:28.194678  scan_static_bus for PNP: 0c09.0 done

 1376 10:12:28.198176  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1377 10:12:28.201483  scan_static_bus for PCI: 00:1f.0 done

 1378 10:12:28.204888  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1379 10:12:28.208122  PCI: 00:1f.2 scanning...

 1380 10:12:28.211660  scan_static_bus for PCI: 00:1f.2

 1381 10:12:28.214990  GENERIC: 0.0 enabled

 1382 10:12:28.218237  GENERIC: 0.0 scanning...

 1383 10:12:28.222254  scan_static_bus for GENERIC: 0.0

 1384 10:12:28.222337  GENERIC: 0.0 enabled

 1385 10:12:28.224876  GENERIC: 1.0 enabled

 1386 10:12:28.228252  scan_static_bus for GENERIC: 0.0 done

 1387 10:12:28.232057  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1388 10:12:28.238188  scan_static_bus for PCI: 00:1f.2 done

 1389 10:12:28.241615  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1390 10:12:28.244733  PCI: 00:1f.3 scanning...

 1391 10:12:28.248189  scan_static_bus for PCI: 00:1f.3

 1392 10:12:28.251833  scan_static_bus for PCI: 00:1f.3 done

 1393 10:12:28.254920  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1394 10:12:28.258436  PCI: 00:1f.5 scanning...

 1395 10:12:28.261982  scan_generic_bus for PCI: 00:1f.5

 1396 10:12:28.265135  scan_generic_bus for PCI: 00:1f.5 done

 1397 10:12:28.271969  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1398 10:12:28.274883  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1399 10:12:28.278341  scan_static_bus for Root Device done

 1400 10:12:28.285145  scan_bus: bus Root Device finished in 729 msecs

 1401 10:12:28.285229  done

 1402 10:12:28.291780  BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms

 1403 10:12:28.295336  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1404 10:12:28.301808  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1405 10:12:28.305330  SPI flash protection: WPSW=0 SRP0=0

 1406 10:12:28.311899  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1407 10:12:28.318392  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1408 10:12:28.318477  found VGA at PCI: 00:02.0

 1409 10:12:28.321496  Setting up VGA for PCI: 00:02.0

 1410 10:12:28.328581  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1411 10:12:28.331607  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1412 10:12:28.335223  Allocating resources...

 1413 10:12:28.338152  Reading resources...

 1414 10:12:28.341757  Root Device read_resources bus 0 link: 0

 1415 10:12:28.344962  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1416 10:12:28.351436  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1417 10:12:28.354497  DOMAIN: 0000 read_resources bus 0 link: 0

 1418 10:12:28.361397  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1419 10:12:28.368079  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1420 10:12:28.374705  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1421 10:12:28.378407  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1422 10:12:28.385151  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1423 10:12:28.391607  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1424 10:12:28.397987  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1425 10:12:28.404586  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1426 10:12:28.411326  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1427 10:12:28.418182  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1428 10:12:28.424681  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1429 10:12:28.431629  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1430 10:12:28.438227  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1431 10:12:28.445621  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1432 10:12:28.451634  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1433 10:12:28.454718  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1434 10:12:28.461175  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1435 10:12:28.467902  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1436 10:12:28.474663  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1437 10:12:28.481470  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1438 10:12:28.487983  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1439 10:12:28.491573  PCI: 00:04.0 read_resources bus 1 link: 0

 1440 10:12:28.497866  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1441 10:12:28.501693  PCI: 00:06.0 read_resources bus 1 link: 0

 1442 10:12:28.505090  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1443 10:12:28.508075  PCI: 00:0d.0 read_resources bus 0 link: 0

 1444 10:12:28.515099  USB0 port 0 read_resources bus 0 link: 0

 1445 10:12:28.518167  USB0 port 0 read_resources bus 0 link: 0 done

 1446 10:12:28.521398  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1447 10:12:28.528146  PCI: 00:14.0 read_resources bus 0 link: 0

 1448 10:12:28.531916  USB0 port 0 read_resources bus 0 link: 0

 1449 10:12:28.534678  USB0 port 0 read_resources bus 0 link: 0 done

 1450 10:12:28.541430  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1451 10:12:28.544783  PCI: 00:14.3 read_resources bus 0 link: 0

 1452 10:12:28.551666  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1453 10:12:28.554674  PCI: 00:15.0 read_resources bus 0 link: 0

 1454 10:12:28.558332  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1455 10:12:28.564980  PCI: 00:15.1 read_resources bus 0 link: 0

 1456 10:12:28.568170  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1457 10:12:28.571563  PCI: 00:15.3 read_resources bus 0 link: 0

 1458 10:12:28.577883  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1459 10:12:28.581389  PCI: 00:19.1 read_resources bus 0 link: 0

 1460 10:12:28.584916  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1461 10:12:28.591562  PCI: 00:1e.3 read_resources bus 2 link: 0

 1462 10:12:28.594755  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1463 10:12:28.598695  PCI: 00:1f.0 read_resources bus 0 link: 0

 1464 10:12:28.604716  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1465 10:12:28.608292  PCI: 00:1f.2 read_resources bus 0 link: 0

 1466 10:12:28.611498  GENERIC: 0.0 read_resources bus 0 link: 0

 1467 10:12:28.618488  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1468 10:12:28.621467  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1469 10:12:28.628235  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1470 10:12:28.631780  Root Device read_resources bus 0 link: 0 done

 1471 10:12:28.634773  Done reading resources.

 1472 10:12:28.638491  Show resources in subtree (Root Device)...After reading.

 1473 10:12:28.644907   Root Device child on link 0 CPU_CLUSTER: 0

 1474 10:12:28.648128    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1475 10:12:28.648200     APIC: 00

 1476 10:12:28.651643     APIC: 12

 1477 10:12:28.651757     APIC: 14

 1478 10:12:28.651823     APIC: 16

 1479 10:12:28.655520     APIC: 10

 1480 10:12:28.655588     APIC: 01

 1481 10:12:28.658584     APIC: 09

 1482 10:12:28.658652     APIC: 08

 1483 10:12:28.661693    DOMAIN: 0000 child on link 0 GPIO: 0

 1484 10:12:28.671665    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1485 10:12:28.681868    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1486 10:12:28.681956     GPIO: 0

 1487 10:12:28.684737     PCI: 00:00.0

 1488 10:12:28.695008     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1489 10:12:28.701578     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1490 10:12:28.711624     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1491 10:12:28.721306     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1492 10:12:28.731373     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1493 10:12:28.741245     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1494 10:12:28.751399     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1495 10:12:28.758532     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1496 10:12:28.767990     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1497 10:12:28.777787     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1498 10:12:28.788493     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1499 10:12:28.798044     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1500 10:12:28.808218     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1501 10:12:28.814796     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1502 10:12:28.824647     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1503 10:12:28.834726     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1504 10:12:28.844540     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1505 10:12:28.854516     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1506 10:12:28.864488     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1507 10:12:28.874454     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1508 10:12:28.884479     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1509 10:12:28.891247     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1510 10:12:28.900945     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1511 10:12:28.910829     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1512 10:12:28.921093     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1513 10:12:28.930943     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1514 10:12:28.941336     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1515 10:12:28.950775     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1516 10:12:28.950853     PCI: 00:02.0

 1517 10:12:28.961205     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1518 10:12:28.971024     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1519 10:12:28.981155     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1520 10:12:28.984224     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1521 10:12:28.994146     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1522 10:12:28.997859      GENERIC: 0.0

 1523 10:12:29.001033     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1524 10:12:29.010869     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1525 10:12:29.020830     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1526 10:12:29.027311     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1527 10:12:29.030914      PCI: 01:00.0

 1528 10:12:29.040922      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1529 10:12:29.050893      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1530 10:12:29.050973     PCI: 00:08.0

 1531 10:12:29.054385     PCI: 00:0a.0

 1532 10:12:29.064174     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1533 10:12:29.067816     PCI: 00:0d.0 child on link 0 USB0 port 0

 1534 10:12:29.077533     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1535 10:12:29.084728      USB0 port 0 child on link 0 USB3 port 0

 1536 10:12:29.084844       USB3 port 0

 1537 10:12:29.087663       USB3 port 1

 1538 10:12:29.087747       USB3 port 2

 1539 10:12:29.090847       USB3 port 3

 1540 10:12:29.094096     PCI: 00:14.0 child on link 0 USB0 port 0

 1541 10:12:29.104178     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1542 10:12:29.107391      USB0 port 0 child on link 0 USB2 port 0

 1543 10:12:29.110889       USB2 port 0

 1544 10:12:29.111014       USB2 port 1

 1545 10:12:29.114358       USB2 port 2

 1546 10:12:29.114482       USB2 port 3

 1547 10:12:29.117788       USB2 port 4

 1548 10:12:29.120836       USB2 port 5

 1549 10:12:29.120948       USB2 port 6

 1550 10:12:29.124401       USB2 port 7

 1551 10:12:29.124501       USB2 port 8

 1552 10:12:29.127625       USB2 port 9

 1553 10:12:29.127723       USB3 port 0

 1554 10:12:29.130887       USB3 port 1

 1555 10:12:29.130981       USB3 port 2

 1556 10:12:29.134253       USB3 port 3

 1557 10:12:29.134336     PCI: 00:14.2

 1558 10:12:29.144650     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1559 10:12:29.154328     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1560 10:12:29.160697     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1561 10:12:29.170824     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1562 10:12:29.170908      GENERIC: 0.0

 1563 10:12:29.174585     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1564 10:12:29.184332     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1565 10:12:29.187809      I2C: 00:1a

 1566 10:12:29.187912      I2C: 00:31

 1567 10:12:29.191112      I2C: 00:32

 1568 10:12:29.194581     PCI: 00:15.1 child on link 0 I2C: 00:50

 1569 10:12:29.204055     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1570 10:12:29.207908      I2C: 00:50

 1571 10:12:29.207993     PCI: 00:15.2

 1572 10:12:29.210945     PCI: 00:15.3 child on link 0 I2C: 00:10

 1573 10:12:29.220846     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1574 10:12:29.224044      I2C: 00:10

 1575 10:12:29.224129     PCI: 00:16.0

 1576 10:12:29.234145     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1577 10:12:29.237575     PCI: 00:19.0

 1578 10:12:29.240742     PCI: 00:19.1 child on link 0 I2C: 00:15

 1579 10:12:29.250440     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1580 10:12:29.254219      I2C: 00:15

 1581 10:12:29.254304      I2C: 00:2c

 1582 10:12:29.257425     PCI: 00:1e.0

 1583 10:12:29.267054     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1584 10:12:29.270834     PCI: 00:1e.3 child on link 0 SPI: 00

 1585 10:12:29.280563     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1586 10:12:29.284164      SPI: 00

 1587 10:12:29.286985     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1588 10:12:29.293766     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1589 10:12:29.296943      PNP: 0c09.0

 1590 10:12:29.307950      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1591 10:12:29.310713     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1592 10:12:29.320119     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1593 10:12:29.330399     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1594 10:12:29.334061      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1595 10:12:29.336946       GENERIC: 0.0

 1596 10:12:29.337047       GENERIC: 1.0

 1597 10:12:29.340405     PCI: 00:1f.3

 1598 10:12:29.350164     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1599 10:12:29.359852     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1600 10:12:29.359936     PCI: 00:1f.5

 1601 10:12:29.370244     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1602 10:12:29.376984  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1603 10:12:29.383314   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1604 10:12:29.390211   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1605 10:12:29.396939   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1606 10:12:29.400125    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1607 10:12:29.403380    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1608 10:12:29.410105   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1609 10:12:29.417022   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1610 10:12:29.427089   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1611 10:12:29.433252  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1612 10:12:29.440120  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1613 10:12:29.447111   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1614 10:12:29.453508   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1615 10:12:29.460306   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1616 10:12:29.463665   DOMAIN: 0000: Resource ranges:

 1617 10:12:29.466819   * Base: 1000, Size: 800, Tag: 100

 1618 10:12:29.473439   * Base: 1900, Size: e700, Tag: 100

 1619 10:12:29.477088    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1620 10:12:29.483582  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1621 10:12:29.490130  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1622 10:12:29.500171   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1623 10:12:29.506730   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1624 10:12:29.513749   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1625 10:12:29.520218   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1626 10:12:29.531520   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1627 10:12:29.536656   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1628 10:12:29.543841   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1629 10:12:29.553536   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1630 10:12:29.560077   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1631 10:12:29.566547   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1632 10:12:29.576586   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1633 10:12:29.583213   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1634 10:12:29.589835   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1635 10:12:29.599966   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1636 10:12:29.606493   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1637 10:12:29.613465   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1638 10:12:29.623674   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1639 10:12:29.629639   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1640 10:12:29.636262   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1641 10:12:29.646381   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1642 10:12:29.653245   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1643 10:12:29.659481   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1644 10:12:29.669707   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1645 10:12:29.676376   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1646 10:12:29.682649   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1647 10:12:29.693120   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1648 10:12:29.699562   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1649 10:12:29.706290   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1650 10:12:29.716022   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1651 10:12:29.722833   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1652 10:12:29.725988   DOMAIN: 0000: Resource ranges:

 1653 10:12:29.729672   * Base: 80400000, Size: 3fc00000, Tag: 200

 1654 10:12:29.732696   * Base: d0000000, Size: 28000000, Tag: 200

 1655 10:12:29.739468   * Base: fa000000, Size: 1000000, Tag: 200

 1656 10:12:29.743026   * Base: fb001000, Size: 17ff000, Tag: 200

 1657 10:12:29.746029   * Base: fe800000, Size: 300000, Tag: 200

 1658 10:12:29.752649   * Base: feb80000, Size: 80000, Tag: 200

 1659 10:12:29.756329   * Base: fed00000, Size: 40000, Tag: 200

 1660 10:12:29.759937   * Base: fed70000, Size: 10000, Tag: 200

 1661 10:12:29.763185   * Base: fed88000, Size: 8000, Tag: 200

 1662 10:12:29.766170   * Base: fed93000, Size: d000, Tag: 200

 1663 10:12:29.773175   * Base: feda2000, Size: 1e000, Tag: 200

 1664 10:12:29.776297   * Base: fede0000, Size: 1220000, Tag: 200

 1665 10:12:29.779490   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1666 10:12:29.786087    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1667 10:12:29.792681    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1668 10:12:29.799426    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1669 10:12:29.806218    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1670 10:12:29.812876    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1671 10:12:29.819701    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1672 10:12:29.826005    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1673 10:12:29.832500    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1674 10:12:29.839319    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1675 10:12:29.845784    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1676 10:12:29.852830    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1677 10:12:29.859356    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1678 10:12:29.865711    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1679 10:12:29.872690    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1680 10:12:29.882161    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1681 10:12:29.888885    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1682 10:12:29.895530    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1683 10:12:29.902192    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1684 10:12:29.908848    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1685 10:12:29.915668  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1686 10:12:29.922073  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1687 10:12:29.925376   PCI: 00:06.0: Resource ranges:

 1688 10:12:29.928817   * Base: 80400000, Size: 100000, Tag: 200

 1689 10:12:29.935105    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1690 10:12:29.942245    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1691 10:12:29.951552  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1692 10:12:29.958611  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1693 10:12:29.961603  Root Device assign_resources, bus 0 link: 0

 1694 10:12:29.968364  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1695 10:12:29.975132  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1696 10:12:29.984764  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1697 10:12:29.991531  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1698 10:12:29.998275  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1699 10:12:30.004773  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1700 10:12:30.008403  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1701 10:12:30.018050  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1702 10:12:30.028128  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1703 10:12:30.035093  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1704 10:12:30.041340  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1705 10:12:30.047925  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1706 10:12:30.058388  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1707 10:12:30.061526  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1708 10:12:30.071417  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1709 10:12:30.077927  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1710 10:12:30.081155  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1711 10:12:30.087941  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1712 10:12:30.094401  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1713 10:12:30.101156  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1714 10:12:30.104241  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1715 10:12:30.111063  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1716 10:12:30.121250  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1717 10:12:30.127881  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1718 10:12:30.134410  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1719 10:12:30.137408  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1720 10:12:30.147569  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1721 10:12:30.150608  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1722 10:12:30.154238  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1723 10:12:30.164304  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1724 10:12:30.167739  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1725 10:12:30.174022  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1726 10:12:30.180821  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1727 10:12:30.183895  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1728 10:12:30.190687  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1729 10:12:30.197314  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1730 10:12:30.207176  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1731 10:12:30.210793  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1732 10:12:30.217438  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1733 10:12:30.223818  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1734 10:12:30.227449  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1735 10:12:30.234068  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1736 10:12:30.237245  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1737 10:12:30.243810  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1738 10:12:30.247554  LPC: Trying to open IO window from 800 size 1ff

 1739 10:12:30.256967  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1740 10:12:30.263826  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1741 10:12:30.270485  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1742 10:12:30.276960  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1743 10:12:30.280431  Root Device assign_resources, bus 0 link: 0 done

 1744 10:12:30.283911  Done setting resources.

 1745 10:12:30.290127  Show resources in subtree (Root Device)...After assigning values.

 1746 10:12:30.293525   Root Device child on link 0 CPU_CLUSTER: 0

 1747 10:12:30.300393    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1748 10:12:30.300516     APIC: 00

 1749 10:12:30.300628     APIC: 12

 1750 10:12:30.303791     APIC: 14

 1751 10:12:30.303911     APIC: 16

 1752 10:12:30.307095     APIC: 10

 1753 10:12:30.307203     APIC: 01

 1754 10:12:30.307296     APIC: 09

 1755 10:12:30.310291     APIC: 08

 1756 10:12:30.313870    DOMAIN: 0000 child on link 0 GPIO: 0

 1757 10:12:30.323812    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1758 10:12:30.334088    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1759 10:12:30.334171     GPIO: 0

 1760 10:12:30.337035     PCI: 00:00.0

 1761 10:12:30.343621     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1762 10:12:30.353689     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1763 10:12:30.363395     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1764 10:12:30.373648     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1765 10:12:30.383248     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1766 10:12:30.393277     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1767 10:12:30.400102     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1768 10:12:30.410009     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1769 10:12:30.420119     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1770 10:12:30.430021     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1771 10:12:30.439661     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1772 10:12:30.449756     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1773 10:12:30.456265     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1774 10:12:30.466219     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1775 10:12:30.476403     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1776 10:12:30.486593     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1777 10:12:30.496323     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1778 10:12:30.506271     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1779 10:12:30.516484     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1780 10:12:30.526296     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1781 10:12:30.532625     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1782 10:12:30.542602     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1783 10:12:30.552999     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1784 10:12:30.562938     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1785 10:12:30.572868     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1786 10:12:30.582681     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1787 10:12:30.592408     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1788 10:12:30.602502     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1789 10:12:30.602588     PCI: 00:02.0

 1790 10:12:30.612409     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1791 10:12:30.622286     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1792 10:12:30.632500     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1793 10:12:30.638856     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1794 10:12:30.648667     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1795 10:12:30.648801      GENERIC: 0.0

 1796 10:12:30.655266     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1797 10:12:30.662106     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1798 10:12:30.675172     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1799 10:12:30.684917     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1800 10:12:30.688469      PCI: 01:00.0

 1801 10:12:30.698637      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1802 10:12:30.708012      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1803 10:12:30.708099     PCI: 00:08.0

 1804 10:12:30.711505     PCI: 00:0a.0

 1805 10:12:30.721302     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1806 10:12:30.724921     PCI: 00:0d.0 child on link 0 USB0 port 0

 1807 10:12:30.737865     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1808 10:12:30.741369      USB0 port 0 child on link 0 USB3 port 0

 1809 10:12:30.741453       USB3 port 0

 1810 10:12:30.744510       USB3 port 1

 1811 10:12:30.747688       USB3 port 2

 1812 10:12:30.747772       USB3 port 3

 1813 10:12:30.751202     PCI: 00:14.0 child on link 0 USB0 port 0

 1814 10:12:30.764593     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1815 10:12:30.767691      USB0 port 0 child on link 0 USB2 port 0

 1816 10:12:30.767815       USB2 port 0

 1817 10:12:30.771600       USB2 port 1

 1818 10:12:30.771723       USB2 port 2

 1819 10:12:30.774607       USB2 port 3

 1820 10:12:30.777944       USB2 port 4

 1821 10:12:30.778068       USB2 port 5

 1822 10:12:30.781077       USB2 port 6

 1823 10:12:30.781199       USB2 port 7

 1824 10:12:30.784645       USB2 port 8

 1825 10:12:30.784804       USB2 port 9

 1826 10:12:30.788004       USB3 port 0

 1827 10:12:30.788129       USB3 port 1

 1828 10:12:30.791313       USB3 port 2

 1829 10:12:30.791438       USB3 port 3

 1830 10:12:30.794654     PCI: 00:14.2

 1831 10:12:30.804297     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1832 10:12:30.814358     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1833 10:12:30.817558     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1834 10:12:30.827790     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1835 10:12:30.830901      GENERIC: 0.0

 1836 10:12:30.834352     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1837 10:12:30.844141     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1838 10:12:30.847448      I2C: 00:1a

 1839 10:12:30.847538      I2C: 00:31

 1840 10:12:30.851083      I2C: 00:32

 1841 10:12:30.854004     PCI: 00:15.1 child on link 0 I2C: 00:50

 1842 10:12:30.864267     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1843 10:12:30.867483      I2C: 00:50

 1844 10:12:30.867562     PCI: 00:15.2

 1845 10:12:30.874439     PCI: 00:15.3 child on link 0 I2C: 00:10

 1846 10:12:30.884124     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1847 10:12:30.884210      I2C: 00:10

 1848 10:12:30.887590     PCI: 00:16.0

 1849 10:12:30.897399     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1850 10:12:30.897497     PCI: 00:19.0

 1851 10:12:30.904398     PCI: 00:19.1 child on link 0 I2C: 00:15

 1852 10:12:30.913837     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1853 10:12:30.913971      I2C: 00:15

 1854 10:12:30.917603      I2C: 00:2c

 1855 10:12:30.917723     PCI: 00:1e.0

 1856 10:12:30.927153     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1857 10:12:30.933981     PCI: 00:1e.3 child on link 0 SPI: 00

 1858 10:12:30.943892     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1859 10:12:30.944016      SPI: 00

 1860 10:12:30.947278     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1861 10:12:30.957188     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1862 10:12:30.960329      PNP: 0c09.0

 1863 10:12:30.967206      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1864 10:12:30.973599     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1865 10:12:30.980215     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1866 10:12:30.990248     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1867 10:12:30.997564      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1868 10:12:30.997646       GENERIC: 0.0

 1869 10:12:31.000622       GENERIC: 1.0

 1870 10:12:31.000706     PCI: 00:1f.3

 1871 10:12:31.010214     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1872 10:12:31.019982     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1873 10:12:31.023288     PCI: 00:1f.5

 1874 10:12:31.033503     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1875 10:12:31.036653  Done allocating resources.

 1876 10:12:31.043173  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms

 1877 10:12:31.047055  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1878 10:12:31.053406  Configure audio over I2S with MAX98373 NAU88L25B.

 1879 10:12:31.057264  Enabling BT offload

 1880 10:12:31.065059  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1881 10:12:31.068212  Enabling resources...

 1882 10:12:31.071537  PCI: 00:00.0 subsystem <- 8086/4609

 1883 10:12:31.075221  PCI: 00:00.0 cmd <- 06

 1884 10:12:31.078545  PCI: 00:02.0 subsystem <- 8086/46b3

 1885 10:12:31.081944  PCI: 00:02.0 cmd <- 03

 1886 10:12:31.084785  PCI: 00:04.0 subsystem <- 8086/461d

 1887 10:12:31.084878  PCI: 00:04.0 cmd <- 02

 1888 10:12:31.088262  PCI: 00:06.0 bridge ctrl <- 0013

 1889 10:12:31.091579  PCI: 00:06.0 subsystem <- 8086/464d

 1890 10:12:31.094935  PCI: 00:06.0 cmd <- 106

 1891 10:12:31.098226  PCI: 00:0a.0 subsystem <- 8086/467d

 1892 10:12:31.101405  PCI: 00:0a.0 cmd <- 02

 1893 10:12:31.104713  PCI: 00:0d.0 subsystem <- 8086/461e

 1894 10:12:31.108121  PCI: 00:0d.0 cmd <- 02

 1895 10:12:31.111219  PCI: 00:14.0 subsystem <- 8086/51ed

 1896 10:12:31.114479  PCI: 00:14.0 cmd <- 02

 1897 10:12:31.118024  PCI: 00:14.2 subsystem <- 8086/51ef

 1898 10:12:31.118151  PCI: 00:14.2 cmd <- 02

 1899 10:12:31.121290  PCI: 00:14.3 subsystem <- 8086/51f0

 1900 10:12:31.124685  PCI: 00:14.3 cmd <- 02

 1901 10:12:31.127873  PCI: 00:15.0 subsystem <- 8086/51e8

 1902 10:12:31.131090  PCI: 00:15.0 cmd <- 02

 1903 10:12:31.134367  PCI: 00:15.1 subsystem <- 8086/51e9

 1904 10:12:31.137971  PCI: 00:15.1 cmd <- 06

 1905 10:12:31.140857  PCI: 00:15.3 subsystem <- 8086/51eb

 1906 10:12:31.144226  PCI: 00:15.3 cmd <- 02

 1907 10:12:31.147547  PCI: 00:16.0 subsystem <- 8086/51e0

 1908 10:12:31.147675  PCI: 00:16.0 cmd <- 02

 1909 10:12:31.154693  PCI: 00:19.1 subsystem <- 8086/51c6

 1910 10:12:31.154780  PCI: 00:19.1 cmd <- 02

 1911 10:12:31.157486  PCI: 00:1e.0 subsystem <- 8086/51a8

 1912 10:12:31.160773  PCI: 00:1e.0 cmd <- 06

 1913 10:12:31.164089  PCI: 00:1e.3 subsystem <- 8086/51ab

 1914 10:12:31.167564  PCI: 00:1e.3 cmd <- 02

 1915 10:12:31.170917  PCI: 00:1f.0 subsystem <- 8086/5182

 1916 10:12:31.173999  PCI: 00:1f.0 cmd <- 407

 1917 10:12:31.177426  PCI: 00:1f.3 subsystem <- 8086/51c8

 1918 10:12:31.180737  PCI: 00:1f.3 cmd <- 02

 1919 10:12:31.184327  PCI: 00:1f.5 subsystem <- 8086/51a4

 1920 10:12:31.184412  PCI: 00:1f.5 cmd <- 406

 1921 10:12:31.187498  PCI: 01:00.0 cmd <- 02

 1922 10:12:31.187584  done.

 1923 10:12:31.194324  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1924 10:12:31.197371  ME: Version: Unavailable

 1925 10:12:31.200685  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1926 10:12:31.204084  Initializing devices...

 1927 10:12:31.207768  Root Device init

 1928 10:12:31.207859  mainboard: EC init

 1929 10:12:31.213795  Chrome EC: Set SMI mask to 0x0000000000000000

 1930 10:12:31.217177  Chrome EC: UHEPI supported

 1931 10:12:31.220839  Chrome EC: clear events_b mask to 0x0000000000000000

 1932 10:12:31.227268  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1933 10:12:31.233829  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1934 10:12:31.240582  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1935 10:12:31.243971  Chrome EC: Set WAKE mask to 0x0000000000000000

 1936 10:12:31.247381  Root Device init finished in 38 msecs

 1937 10:12:31.250486  PCI: 00:00.0 init

 1938 10:12:31.254143  CPU TDP = 15 Watts

 1939 10:12:31.254228  CPU PL1 = 15 Watts

 1940 10:12:31.257515  CPU PL2 = 55 Watts

 1941 10:12:31.260678  CPU PL4 = 123 Watts

 1942 10:12:31.264272  PCI: 00:00.0 init finished in 8 msecs

 1943 10:12:31.264357  PCI: 00:02.0 init

 1944 10:12:31.267401  GMA: Found VBT in CBFS

 1945 10:12:31.270815  GMA: Found valid VBT in CBFS

 1946 10:12:31.277229  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1947 10:12:31.284152                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1948 10:12:31.287269  PCI: 00:02.0 init finished in 18 msecs

 1949 10:12:31.290399  PCI: 00:06.0 init

 1950 10:12:31.293733  Initializing PCH PCIe bridge.

 1951 10:12:31.297328  PCI: 00:06.0 init finished in 3 msecs

 1952 10:12:31.297414  PCI: 00:0a.0 init

 1953 10:12:31.300662  PCI: 00:0a.0 init finished in 0 msecs

 1954 10:12:31.303682  PCI: 00:14.0 init

 1955 10:12:31.307194  PCI: 00:14.0 init finished in 0 msecs

 1956 10:12:31.311256  PCI: 00:14.2 init

 1957 10:12:31.314048  PCI: 00:14.2 init finished in 0 msecs

 1958 10:12:31.314133  PCI: 00:15.0 init

 1959 10:12:31.317144  I2C bus 0 version 0x3230302a

 1960 10:12:31.320685  DW I2C bus 0 at 0x80655000 (400 KHz)

 1961 10:12:31.327151  PCI: 00:15.0 init finished in 6 msecs

 1962 10:12:31.327235  PCI: 00:15.1 init

 1963 10:12:31.330702  I2C bus 1 version 0x3230302a

 1964 10:12:31.333691  DW I2C bus 1 at 0x80656000 (400 KHz)

 1965 10:12:31.337079  PCI: 00:15.1 init finished in 6 msecs

 1966 10:12:31.340466  PCI: 00:15.3 init

 1967 10:12:31.344165  I2C bus 3 version 0x3230302a

 1968 10:12:31.347314  DW I2C bus 3 at 0x80657000 (400 KHz)

 1969 10:12:31.350499  PCI: 00:15.3 init finished in 6 msecs

 1970 10:12:31.353671  PCI: 00:16.0 init

 1971 10:12:31.357353  PCI: 00:16.0 init finished in 0 msecs

 1972 10:12:31.357437  PCI: 00:19.1 init

 1973 10:12:31.360355  I2C bus 5 version 0x3230302a

 1974 10:12:31.363824  DW I2C bus 5 at 0x80659000 (400 KHz)

 1975 10:12:31.367316  PCI: 00:19.1 init finished in 6 msecs

 1976 10:12:31.370264  PCI: 00:1f.0 init

 1977 10:12:31.373622  IOAPIC: Initializing IOAPIC at 0xfec00000

 1978 10:12:31.377113  IOAPIC: ID = 0x02

 1979 10:12:31.380638  IOAPIC: Dumping registers

 1980 10:12:31.380722    reg 0x0000: 0x02000000

 1981 10:12:31.384088    reg 0x0001: 0x00770020

 1982 10:12:31.387442    reg 0x0002: 0x00000000

 1983 10:12:31.391087  IOAPIC: 120 interrupts

 1984 10:12:31.393917  IOAPIC: Clearing IOAPIC at 0xfec00000

 1985 10:12:31.397256  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1986 10:12:31.403817  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1987 10:12:31.407358  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1988 10:12:31.414194  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1989 10:12:31.417152  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1990 10:12:31.420461  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1991 10:12:31.427372  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1992 10:12:31.430574  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1993 10:12:31.437116  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1994 10:12:31.440196  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1995 10:12:31.447318  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1996 10:12:31.450231  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 1997 10:12:31.456771  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 1998 10:12:31.460434  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 1999 10:12:31.463725  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2000 10:12:31.470338  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2001 10:12:31.473358  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2002 10:12:31.480364  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2003 10:12:31.483574  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2004 10:12:31.490189  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2005 10:12:31.493704  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2006 10:12:31.497183  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2007 10:12:31.503358  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2008 10:12:31.506677  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2009 10:12:31.513310  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2010 10:12:31.516680  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2011 10:12:31.523153  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2012 10:12:31.526627  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2013 10:12:31.533262  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2014 10:12:31.536777  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2015 10:12:31.539958  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2016 10:12:31.546602  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2017 10:12:31.550259  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2018 10:12:31.556506  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2019 10:12:31.559841  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2020 10:12:31.566350  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2021 10:12:31.569871  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2022 10:12:31.576663  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2023 10:12:31.579712  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2024 10:12:31.583032  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2025 10:12:31.589953  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2026 10:12:31.592934  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2027 10:12:31.599593  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2028 10:12:31.603112  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2029 10:12:31.609531  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2030 10:12:31.612888  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2031 10:12:31.619911  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2032 10:12:31.623046  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2033 10:12:31.626739  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2034 10:12:31.632889  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2035 10:12:31.636292  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2036 10:12:31.642776  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2037 10:12:31.646201  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2038 10:12:31.652989  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2039 10:12:31.656444  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2040 10:12:31.659384  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2041 10:12:31.666151  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2042 10:12:31.669638  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2043 10:12:31.676450  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2044 10:12:31.679647  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2045 10:12:31.686282  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2046 10:12:31.689842  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2047 10:12:31.696437  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2048 10:12:31.699987  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2049 10:12:31.702762  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2050 10:12:31.709878  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2051 10:12:31.712781  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2052 10:12:31.719849  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2053 10:12:31.723285  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2054 10:12:31.729951  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2055 10:12:31.733033  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2056 10:12:31.739462  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2057 10:12:31.742845  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2058 10:12:31.746233  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2059 10:12:31.752494  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2060 10:12:31.756095  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2061 10:12:31.762347  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2062 10:12:31.765795  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2063 10:12:31.772564  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2064 10:12:31.776069  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2065 10:12:31.782502  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2066 10:12:31.785677  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2067 10:12:31.789162  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2068 10:12:31.795856  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2069 10:12:31.798985  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2070 10:12:31.805656  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2071 10:12:31.808983  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2072 10:12:31.815757  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2073 10:12:31.819226  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2074 10:12:31.826064  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2075 10:12:31.829083  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2076 10:12:31.832314  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2077 10:12:31.838965  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2078 10:12:31.842691  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2079 10:12:31.849158  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2080 10:12:31.852180  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2081 10:12:31.859026  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2082 10:12:31.862376  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2083 10:12:31.865586  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2084 10:12:31.872349  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2085 10:12:31.875579  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2086 10:12:31.882006  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2087 10:12:31.885415  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2088 10:12:31.892108  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2089 10:12:31.895564  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2090 10:12:31.901990  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2091 10:12:31.905826  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2092 10:12:31.908714  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2093 10:12:31.915522  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2094 10:12:31.918562  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2095 10:12:31.925274  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2096 10:12:31.928711  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2097 10:12:31.935487  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2098 10:12:31.938779  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2099 10:12:31.945385  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2100 10:12:31.948928  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2101 10:12:31.951808  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2102 10:12:31.958777  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2103 10:12:31.961759  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2104 10:12:31.968631  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2105 10:12:31.971858  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2106 10:12:31.978383  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2107 10:12:31.981990  PCI: 00:1f.0 init finished in 607 msecs

 2108 10:12:31.982071  PCI: 00:1f.2 init

 2109 10:12:31.985326  apm_control: Disabling ACPI.

 2110 10:12:31.990315  APMC done.

 2111 10:12:31.993702  PCI: 00:1f.2 init finished in 6 msecs

 2112 10:12:31.996943  PCI: 00:1f.3 init

 2113 10:12:32.000452  PCI: 00:1f.3 init finished in 0 msecs

 2114 10:12:32.000535  PCI: 01:00.0 init

 2115 10:12:32.003816  PCI: 01:00.0 init finished in 0 msecs

 2116 10:12:32.007145  PNP: 0c09.0 init

 2117 10:12:32.010410  Google Chrome EC uptime: 12.088 seconds

 2118 10:12:32.017137  Google Chrome AP resets since EC boot: 1

 2119 10:12:32.020268  Google Chrome most recent AP reset causes:

 2120 10:12:32.023524  	0.340: 32775 shutdown: entering G3

 2121 10:12:32.030195  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2122 10:12:32.033579  PNP: 0c09.0 init finished in 23 msecs

 2123 10:12:32.037030  GENERIC: 0.0 init

 2124 10:12:32.040529  GENERIC: 0.0 init finished in 0 msecs

 2125 10:12:32.040612  GENERIC: 1.0 init

 2126 10:12:32.043465  GENERIC: 1.0 init finished in 0 msecs

 2127 10:12:32.047065  Devices initialized

 2128 10:12:32.050484  Show all devs... After init.

 2129 10:12:32.053459  Root Device: enabled 1

 2130 10:12:32.053533  CPU_CLUSTER: 0: enabled 1

 2131 10:12:32.056640  DOMAIN: 0000: enabled 1

 2132 10:12:32.059957  GPIO: 0: enabled 1

 2133 10:12:32.063320  PCI: 00:00.0: enabled 1

 2134 10:12:32.063388  PCI: 00:01.0: enabled 0

 2135 10:12:32.066782  PCI: 00:01.1: enabled 0

 2136 10:12:32.070000  PCI: 00:02.0: enabled 1

 2137 10:12:32.070070  PCI: 00:04.0: enabled 1

 2138 10:12:32.073423  PCI: 00:05.0: enabled 0

 2139 10:12:32.076811  PCI: 00:06.0: enabled 1

 2140 10:12:32.079838  PCI: 00:06.2: enabled 0

 2141 10:12:32.079906  PCI: 00:07.0: enabled 0

 2142 10:12:32.083541  PCI: 00:07.1: enabled 0

 2143 10:12:32.086917  PCI: 00:07.2: enabled 0

 2144 10:12:32.089745  PCI: 00:07.3: enabled 0

 2145 10:12:32.089813  PCI: 00:08.0: enabled 0

 2146 10:12:32.093252  PCI: 00:09.0: enabled 0

 2147 10:12:32.096607  PCI: 00:0a.0: enabled 1

 2148 10:12:32.100001  PCI: 00:0d.0: enabled 1

 2149 10:12:32.100077  PCI: 00:0d.1: enabled 0

 2150 10:12:32.103000  PCI: 00:0d.2: enabled 0

 2151 10:12:32.106612  PCI: 00:0d.3: enabled 0

 2152 10:12:32.109757  PCI: 00:0e.0: enabled 0

 2153 10:12:32.109842  PCI: 00:10.0: enabled 0

 2154 10:12:32.113026  PCI: 00:10.1: enabled 0

 2155 10:12:32.116256  PCI: 00:10.6: enabled 0

 2156 10:12:32.119835  PCI: 00:10.7: enabled 0

 2157 10:12:32.119918  PCI: 00:12.0: enabled 0

 2158 10:12:32.122864  PCI: 00:12.6: enabled 0

 2159 10:12:32.126474  PCI: 00:12.7: enabled 0

 2160 10:12:32.129938  PCI: 00:13.0: enabled 0

 2161 10:12:32.130020  PCI: 00:14.0: enabled 1

 2162 10:12:32.132982  PCI: 00:14.1: enabled 0

 2163 10:12:32.136085  PCI: 00:14.2: enabled 1

 2164 10:12:32.136166  PCI: 00:14.3: enabled 1

 2165 10:12:32.139724  PCI: 00:15.0: enabled 1

 2166 10:12:32.142943  PCI: 00:15.1: enabled 1

 2167 10:12:32.146502  PCI: 00:15.2: enabled 0

 2168 10:12:32.146584  PCI: 00:15.3: enabled 1

 2169 10:12:32.149365  PCI: 00:16.0: enabled 1

 2170 10:12:32.152872  PCI: 00:16.1: enabled 0

 2171 10:12:32.155784  PCI: 00:16.2: enabled 0

 2172 10:12:32.155866  PCI: 00:16.3: enabled 0

 2173 10:12:32.159414  PCI: 00:16.4: enabled 0

 2174 10:12:32.162628  PCI: 00:16.5: enabled 0

 2175 10:12:32.165923  PCI: 00:17.0: enabled 0

 2176 10:12:32.166005  PCI: 00:19.0: enabled 0

 2177 10:12:32.169039  PCI: 00:19.1: enabled 1

 2178 10:12:32.172302  PCI: 00:19.2: enabled 0

 2179 10:12:32.175887  PCI: 00:1a.0: enabled 0

 2180 10:12:32.175970  PCI: 00:1c.0: enabled 0

 2181 10:12:32.178879  PCI: 00:1c.1: enabled 0

 2182 10:12:32.182442  PCI: 00:1c.2: enabled 0

 2183 10:12:32.182525  PCI: 00:1c.3: enabled 0

 2184 10:12:32.185791  PCI: 00:1c.4: enabled 0

 2185 10:12:32.189008  PCI: 00:1c.5: enabled 0

 2186 10:12:32.192529  PCI: 00:1c.6: enabled 0

 2187 10:12:32.192611  PCI: 00:1c.7: enabled 0

 2188 10:12:32.195787  PCI: 00:1d.0: enabled 0

 2189 10:12:32.199187  PCI: 00:1d.1: enabled 0

 2190 10:12:32.202233  PCI: 00:1d.2: enabled 0

 2191 10:12:32.202315  PCI: 00:1d.3: enabled 0

 2192 10:12:32.205914  PCI: 00:1e.0: enabled 1

 2193 10:12:32.208724  PCI: 00:1e.1: enabled 0

 2194 10:12:32.212147  PCI: 00:1e.2: enabled 0

 2195 10:12:32.212229  PCI: 00:1e.3: enabled 1

 2196 10:12:32.215858  PCI: 00:1f.0: enabled 1

 2197 10:12:32.218707  PCI: 00:1f.1: enabled 0

 2198 10:12:32.222308  PCI: 00:1f.2: enabled 1

 2199 10:12:32.222391  PCI: 00:1f.3: enabled 1

 2200 10:12:32.225228  PCI: 00:1f.4: enabled 0

 2201 10:12:32.228987  PCI: 00:1f.5: enabled 1

 2202 10:12:32.232332  PCI: 00:1f.6: enabled 0

 2203 10:12:32.232414  PCI: 00:1f.7: enabled 0

 2204 10:12:32.235865  GENERIC: 0.0: enabled 1

 2205 10:12:32.238475  GENERIC: 0.0: enabled 1

 2206 10:12:32.238558  GENERIC: 1.0: enabled 1

 2207 10:12:32.242098  GENERIC: 0.0: enabled 1

 2208 10:12:32.245880  GENERIC: 1.0: enabled 1

 2209 10:12:32.249229  USB0 port 0: enabled 1

 2210 10:12:32.249311  USB0 port 0: enabled 1

 2211 10:12:32.252018  GENERIC: 0.0: enabled 1

 2212 10:12:32.255179  I2C: 00:1a: enabled 1

 2213 10:12:32.258402  I2C: 00:31: enabled 1

 2214 10:12:32.258484  I2C: 00:32: enabled 1

 2215 10:12:32.261637  I2C: 00:50: enabled 1

 2216 10:12:32.265213  I2C: 00:10: enabled 1

 2217 10:12:32.265295  I2C: 00:15: enabled 1

 2218 10:12:32.268193  I2C: 00:2c: enabled 1

 2219 10:12:32.271523  GENERIC: 0.0: enabled 1

 2220 10:12:32.271604  SPI: 00: enabled 1

 2221 10:12:32.275006  PNP: 0c09.0: enabled 1

 2222 10:12:32.278354  GENERIC: 0.0: enabled 1

 2223 10:12:32.278436  USB3 port 0: enabled 1

 2224 10:12:32.281429  USB3 port 1: enabled 0

 2225 10:12:32.285055  USB3 port 2: enabled 1

 2226 10:12:32.285137  USB3 port 3: enabled 0

 2227 10:12:32.288181  USB2 port 0: enabled 1

 2228 10:12:32.291533  USB2 port 1: enabled 0

 2229 10:12:32.294947  USB2 port 2: enabled 1

 2230 10:12:32.295029  USB2 port 3: enabled 0

 2231 10:12:32.297933  USB2 port 4: enabled 0

 2232 10:12:32.301590  USB2 port 5: enabled 1

 2233 10:12:32.301672  USB2 port 6: enabled 0

 2234 10:12:32.304725  USB2 port 7: enabled 0

 2235 10:12:32.308077  USB2 port 8: enabled 1

 2236 10:12:32.311528  USB2 port 9: enabled 1

 2237 10:12:32.311610  USB3 port 0: enabled 1

 2238 10:12:32.314564  USB3 port 1: enabled 0

 2239 10:12:32.318102  USB3 port 2: enabled 0

 2240 10:12:32.318211  USB3 port 3: enabled 0

 2241 10:12:32.321138  GENERIC: 0.0: enabled 1

 2242 10:12:32.324689  GENERIC: 1.0: enabled 1

 2243 10:12:32.328241  APIC: 00: enabled 1

 2244 10:12:32.328323  APIC: 12: enabled 1

 2245 10:12:32.331501  APIC: 14: enabled 1

 2246 10:12:32.331597  APIC: 16: enabled 1

 2247 10:12:32.334798  APIC: 10: enabled 1

 2248 10:12:32.338172  APIC: 01: enabled 1

 2249 10:12:32.338254  APIC: 09: enabled 1

 2250 10:12:32.341432  APIC: 08: enabled 1

 2251 10:12:32.344389  PCI: 01:00.0: enabled 1

 2252 10:12:32.348038  BS: BS_DEV_INIT run times (exec / console): 8 / 1133 ms

 2253 10:12:32.354551  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2254 10:12:32.358606  ELOG: NV offset 0xf20000 size 0x4000

 2255 10:12:32.364651  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2256 10:12:32.371112  ELOG: Event(17) added with size 13 at 2023-08-14 10:12:27 UTC

 2257 10:12:32.377750  ELOG: Event(9E) added with size 10 at 2023-08-14 10:12:27 UTC

 2258 10:12:32.384389  ELOG: Event(9F) added with size 14 at 2023-08-14 10:12:27 UTC

 2259 10:12:32.390947  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2260 10:12:32.397747  ELOG: Event(A0) added with size 9 at 2023-08-14 10:12:27 UTC

 2261 10:12:32.400898  elog_add_boot_reason: Logged dev mode boot

 2262 10:12:32.407699  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2263 10:12:32.407781  Finalize devices...

 2264 10:12:32.411123  PCI: 00:16.0 final

 2265 10:12:32.414507  PCI: 00:1f.2 final

 2266 10:12:32.414588  GENERIC: 0.0 final

 2267 10:12:32.420952  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2268 10:12:32.424126  GENERIC: 1.0 final

 2269 10:12:32.427435  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2270 10:12:32.431098  Devices finalized

 2271 10:12:32.437611  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2272 10:12:32.441089  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2273 10:12:32.447659  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2274 10:12:32.451128  ME: HFSTS1                      : 0x90000245

 2275 10:12:32.458130  ME: HFSTS2                      : 0x82100116

 2276 10:12:32.461109  ME: HFSTS3                      : 0x00000050

 2277 10:12:32.464389  ME: HFSTS4                      : 0x00004000

 2278 10:12:32.470619  ME: HFSTS5                      : 0x00000000

 2279 10:12:32.474166  ME: HFSTS6                      : 0x40600006

 2280 10:12:32.477276  ME: Manufacturing Mode          : NO

 2281 10:12:32.480746  ME: SPI Protection Mode Enabled : YES

 2282 10:12:32.487468  ME: FPFs Committed              : YES

 2283 10:12:32.490867  ME: Manufacturing Vars Locked   : YES

 2284 10:12:32.494295  ME: FW Partition Table          : OK

 2285 10:12:32.497566  ME: Bringup Loader Failure      : NO

 2286 10:12:32.500743  ME: Firmware Init Complete      : YES

 2287 10:12:32.504276  ME: Boot Options Present        : NO

 2288 10:12:32.507532  ME: Update In Progress          : NO

 2289 10:12:32.510744  ME: D0i3 Support                : YES

 2290 10:12:32.517231  ME: Low Power State Enabled     : NO

 2291 10:12:32.520510  ME: CPU Replaced                : YES

 2292 10:12:32.524009  ME: CPU Replacement Valid       : YES

 2293 10:12:32.527290  ME: Current Working State       : 5

 2294 10:12:32.530872  ME: Current Operation State     : 1

 2295 10:12:32.533720  ME: Current Operation Mode      : 0

 2296 10:12:32.537562  ME: Error Code                  : 0

 2297 10:12:32.540671  ME: Enhanced Debug Mode         : NO

 2298 10:12:32.543685  ME: CPU Debug Disabled          : YES

 2299 10:12:32.550393  ME: TXT Support                 : NO

 2300 10:12:32.553765  ME: WP for RO is enabled        : YES

 2301 10:12:32.560718  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2302 10:12:32.563910  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2303 10:12:32.570291  Ramoops buffer: 0x100000@0x76899000.

 2304 10:12:32.573618  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2305 10:12:32.583713  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2306 10:12:32.587138  CBFS: 'fallback/slic' not found.

 2307 10:12:32.590474  ACPI: Writing ACPI tables at 7686d000.

 2308 10:12:32.590557  ACPI:    * FACS

 2309 10:12:32.593893  ACPI:    * DSDT

 2310 10:12:32.600263  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2311 10:12:32.603726  ACPI:    * FADT

 2312 10:12:32.603809  SCI is IRQ9

 2313 10:12:32.606863  ACPI: added table 1/32, length now 40

 2314 10:12:32.610346  ACPI:     * SSDT

 2315 10:12:32.613723  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2316 10:12:32.620941  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2317 10:12:32.624878  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2318 10:12:32.627845  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2319 10:12:32.634058  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2320 10:12:32.640832  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2321 10:12:32.647621  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2322 10:12:32.650756  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2323 10:12:32.657432  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2324 10:12:32.661319  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2325 10:12:32.667914  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2326 10:12:32.670752  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2327 10:12:32.677759  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2328 10:12:32.680837  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2329 10:12:32.689599  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2330 10:12:32.693106  PS2K: Passing 80 keymaps to kernel

 2331 10:12:32.699378  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2332 10:12:32.706280  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2333 10:12:32.712909  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2334 10:12:32.719200  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2335 10:12:32.726195  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2336 10:12:32.732403  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2337 10:12:32.736229  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2338 10:12:32.742618  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2339 10:12:32.749583  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2340 10:12:32.755789  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2341 10:12:32.759462  ACPI: added table 2/32, length now 44

 2342 10:12:32.762560  ACPI:    * MCFG

 2343 10:12:32.765672  ACPI: added table 3/32, length now 48

 2344 10:12:32.765744  ACPI:    * TPM2

 2345 10:12:32.769539  TPM2 log created at 0x7685d000

 2346 10:12:32.775855  ACPI: added table 4/32, length now 52

 2347 10:12:32.775931  ACPI:     * LPIT

 2348 10:12:32.779350  ACPI: added table 5/32, length now 56

 2349 10:12:32.782482  ACPI:    * MADT

 2350 10:12:32.782584  SCI is IRQ9

 2351 10:12:32.785944  ACPI: added table 6/32, length now 60

 2352 10:12:32.789108  cmd_reg from pmc_make_ipc_cmd 1052838

 2353 10:12:32.795924  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2354 10:12:32.802525  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2355 10:12:32.809264  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2356 10:12:32.812979  PMC CrashLog size in discovery mode: 0xC00

 2357 10:12:32.815862  cpu crashlog bar addr: 0x80640000

 2358 10:12:32.819227  cpu discovery table offset: 0x6030

 2359 10:12:32.825855  cpu_crashlog_discovery_table buffer count: 0x3

 2360 10:12:32.832424  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2361 10:12:32.839013  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2362 10:12:32.845828  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2363 10:12:32.849194  PMC crashLog size in discovery mode : 0xC00

 2364 10:12:32.855551  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2365 10:12:32.862432  discover mode PMC crashlog size adjusted to: 0x200

 2366 10:12:32.869019  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2367 10:12:32.872222  discover mode PMC crashlog size adjusted to: 0x0

 2368 10:12:32.875826  m_cpu_crashLog_size : 0x3480 bytes

 2369 10:12:32.879460  CPU crashLog present.

 2370 10:12:32.882401  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2371 10:12:32.888907  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2372 10:12:32.892181  current = 76876550

 2373 10:12:32.895725  ACPI:    * DMAR

 2374 10:12:32.898631  ACPI: added table 7/32, length now 64

 2375 10:12:32.902072  ACPI: added table 8/32, length now 68

 2376 10:12:32.902176  ACPI:    * HPET

 2377 10:12:32.905415  ACPI: added table 9/32, length now 72

 2378 10:12:32.909023  ACPI: done.

 2379 10:12:32.912131  ACPI tables: 38528 bytes.

 2380 10:12:32.915923  smbios_write_tables: 76857000

 2381 10:12:32.919428  EC returned error result code 3

 2382 10:12:32.922680  Couldn't obtain OEM name from CBI

 2383 10:12:32.922804  Create SMBIOS type 16

 2384 10:12:32.926319  Create SMBIOS type 17

 2385 10:12:32.929722  Create SMBIOS type 20

 2386 10:12:32.933220  GENERIC: 0.0 (WIFI Device)

 2387 10:12:32.933348  SMBIOS tables: 2156 bytes.

 2388 10:12:32.939267  Writing table forward entry at 0x00000500

 2389 10:12:32.946097  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2390 10:12:32.949487  Writing coreboot table at 0x76891000

 2391 10:12:32.956139   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2392 10:12:32.959399   1. 0000000000001000-000000000009ffff: RAM

 2393 10:12:32.962844   2. 00000000000a0000-00000000000fffff: RESERVED

 2394 10:12:32.969229   3. 0000000000100000-0000000076856fff: RAM

 2395 10:12:32.972688   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2396 10:12:32.979311   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2397 10:12:32.985546   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2398 10:12:32.988996   7. 0000000077000000-00000000803fffff: RESERVED

 2399 10:12:32.995776   8. 00000000c0000000-00000000cfffffff: RESERVED

 2400 10:12:32.998769   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2401 10:12:33.002402  10. 00000000fb000000-00000000fb000fff: RESERVED

 2402 10:12:33.008933  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2403 10:12:33.011991  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2404 10:12:33.019258  13. 00000000fec00000-00000000fecfffff: RESERVED

 2405 10:12:33.022333  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2406 10:12:33.028840  15. 00000000fed80000-00000000fed87fff: RESERVED

 2407 10:12:33.031854  16. 00000000fed90000-00000000fed92fff: RESERVED

 2408 10:12:33.038618  17. 00000000feda0000-00000000feda1fff: RESERVED

 2409 10:12:33.041877  18. 00000000fedc0000-00000000feddffff: RESERVED

 2410 10:12:33.045206  19. 0000000100000000-000000027fbfffff: RAM

 2411 10:12:33.048145  Passing 4 GPIOs to payload:

 2412 10:12:33.055094              NAME |       PORT | POLARITY |     VALUE

 2413 10:12:33.058304               lid |  undefined |     high |      high

 2414 10:12:33.065248             power |  undefined |     high |       low

 2415 10:12:33.071658             oprom |  undefined |     high |       low

 2416 10:12:33.075186          EC in RW | 0x00000151 |     high |      high

 2417 10:12:33.075287  Board ID: 3

 2418 10:12:33.078076  FW config: 0x131

 2419 10:12:33.084736  Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 572f

 2420 10:12:33.088014  coreboot table: 1748 bytes.

 2421 10:12:33.091820  IMD ROOT    0. 0x76fff000 0x00001000

 2422 10:12:33.094889  IMD SMALL   1. 0x76ffe000 0x00001000

 2423 10:12:33.098333  FSP MEMORY  2. 0x76afe000 0x00500000

 2424 10:12:33.101716  CONSOLE     3. 0x76ade000 0x00020000

 2425 10:12:33.104858  RW MCACHE   4. 0x76add000 0x0000043c

 2426 10:12:33.111419  RO MCACHE   5. 0x76adc000 0x00000fd8

 2427 10:12:33.114782  FMAP        6. 0x76adb000 0x0000064a

 2428 10:12:33.118078  TIME STAMP  7. 0x76ada000 0x00000910

 2429 10:12:33.121529  VBOOT WORK  8. 0x76ac6000 0x00014000

 2430 10:12:33.124918  MEM INFO    9. 0x76ac5000 0x000003b8

 2431 10:12:33.128317  ROMSTG STCK10. 0x76ac4000 0x00001000

 2432 10:12:33.131214  AFTER CAR  11. 0x76ab8000 0x0000c000

 2433 10:12:33.134741  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2434 10:12:33.141329  ACPI BERT  13. 0x76a1e000 0x00010000

 2435 10:12:33.144781  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2436 10:12:33.147812  REFCODE    15. 0x769ae000 0x0006f000

 2437 10:12:33.151083  SMM BACKUP 16. 0x7699e000 0x00010000

 2438 10:12:33.154406  IGD OPREGION17. 0x76999000 0x00004203

 2439 10:12:33.158073  RAMOOPS    18. 0x76899000 0x00100000

 2440 10:12:33.161156  COREBOOT   19. 0x76891000 0x00008000

 2441 10:12:33.164623  ACPI       20. 0x7686d000 0x00024000

 2442 10:12:33.171426  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2443 10:12:33.174410  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2444 10:12:33.177811  CPU CRASHLOG23. 0x76858000 0x00003480

 2445 10:12:33.181434  SMBIOS     24. 0x76857000 0x00001000

 2446 10:12:33.184593  IMD small region:

 2447 10:12:33.187872    IMD ROOT    0. 0x76ffec00 0x00000400

 2448 10:12:33.191347    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2449 10:12:33.194525    POWER STATE 2. 0x76ffeb80 0x00000044

 2450 10:12:33.197739    ROMSTAGE    3. 0x76ffeb60 0x00000004

 2451 10:12:33.201130    ACPI GNVS   4. 0x76ffeb00 0x00000048

 2452 10:12:33.208248    TYPE_C INFO 5. 0x76ffeae0 0x0000000c

 2453 10:12:33.211423  BS: BS_WRITE_TABLES run times (exec / console): 8 / 624 ms

 2454 10:12:33.214422  MTRR: Physical address space:

 2455 10:12:33.221161  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2456 10:12:33.227802  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2457 10:12:33.234543  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2458 10:12:33.241219  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2459 10:12:33.247685  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2460 10:12:33.254436  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2461 10:12:33.257895  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2462 10:12:33.264397  MTRR: Fixed MSR 0x250 0x0606060606060606

 2463 10:12:33.267543  MTRR: Fixed MSR 0x258 0x0606060606060606

 2464 10:12:33.271162  MTRR: Fixed MSR 0x259 0x0000000000000000

 2465 10:12:33.274086  MTRR: Fixed MSR 0x268 0x0606060606060606

 2466 10:12:33.281211  MTRR: Fixed MSR 0x269 0x0606060606060606

 2467 10:12:33.284189  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2468 10:12:33.287679  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2469 10:12:33.290782  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2470 10:12:33.297736  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2471 10:12:33.301147  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2472 10:12:33.304109  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2473 10:12:33.307708  call enable_fixed_mtrr()

 2474 10:12:33.310961  CPU physical address size: 39 bits

 2475 10:12:33.317607  MTRR: default type WB/UC MTRR counts: 6/6.

 2476 10:12:33.321083  MTRR: UC selected as default type.

 2477 10:12:33.327508  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2478 10:12:33.331239  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2479 10:12:33.337409  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2480 10:12:33.344281  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2481 10:12:33.350781  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2482 10:12:33.357537  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2483 10:12:33.364087  MTRR: Fixed MSR 0x250 0x0606060606060606

 2484 10:12:33.367810  MTRR: Fixed MSR 0x258 0x0606060606060606

 2485 10:12:33.370745  MTRR: Fixed MSR 0x259 0x0000000000000000

 2486 10:12:33.374334  MTRR: Fixed MSR 0x268 0x0606060606060606

 2487 10:12:33.380561  MTRR: Fixed MSR 0x269 0x0606060606060606

 2488 10:12:33.384117  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2489 10:12:33.387360  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2490 10:12:33.390824  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2491 10:12:33.397301  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2492 10:12:33.400681  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2493 10:12:33.403913  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2494 10:12:33.407386  MTRR: Fixed MSR 0x250 0x0606060606060606

 2495 10:12:33.410894  call enable_fixed_mtrr()

 2496 10:12:33.413959  MTRR: Fixed MSR 0x250 0x0606060606060606

 2497 10:12:33.417261  MTRR: Fixed MSR 0x250 0x0606060606060606

 2498 10:12:33.423635  CPU physical address size: 39 bits

 2499 10:12:33.427119  MTRR: Fixed MSR 0x258 0x0606060606060606

 2500 10:12:33.430359  MTRR: Fixed MSR 0x258 0x0606060606060606

 2501 10:12:33.433573  MTRR: Fixed MSR 0x250 0x0606060606060606

 2502 10:12:33.437129  MTRR: Fixed MSR 0x259 0x0000000000000000

 2503 10:12:33.443668  MTRR: Fixed MSR 0x268 0x0606060606060606

 2504 10:12:33.447163  MTRR: Fixed MSR 0x269 0x0606060606060606

 2505 10:12:33.450636  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2506 10:12:33.453735  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2507 10:12:33.460471  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2508 10:12:33.463378  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2509 10:12:33.466757  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2510 10:12:33.470391  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2511 10:12:33.476670  MTRR: Fixed MSR 0x258 0x0606060606060606

 2512 10:12:33.480131  MTRR: Fixed MSR 0x259 0x0000000000000000

 2513 10:12:33.483962  MTRR: Fixed MSR 0x259 0x0000000000000000

 2514 10:12:33.487019  MTRR: Fixed MSR 0x268 0x0606060606060606

 2515 10:12:33.493232  MTRR: Fixed MSR 0x269 0x0606060606060606

 2516 10:12:33.493312  call enable_fixed_mtrr()

 2517 10:12:33.500261  MTRR: Fixed MSR 0x268 0x0606060606060606

 2518 10:12:33.503538  MTRR: Fixed MSR 0x269 0x0606060606060606

 2519 10:12:33.506576  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2520 10:12:33.510119  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2521 10:12:33.513602  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2522 10:12:33.519978  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2523 10:12:33.523655  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2524 10:12:33.526711  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2525 10:12:33.529875  MTRR: Fixed MSR 0x250 0x0606060606060606

 2526 10:12:33.533423  call enable_fixed_mtrr()

 2527 10:12:33.536953  MTRR: Fixed MSR 0x258 0x0606060606060606

 2528 10:12:33.539868  CPU physical address size: 39 bits

 2529 10:12:33.546406  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2530 10:12:33.549936  CPU physical address size: 39 bits

 2531 10:12:33.553242  MTRR: Fixed MSR 0x258 0x0606060606060606

 2532 10:12:33.556294  MTRR: Fixed MSR 0x250 0x0606060606060606

 2533 10:12:33.559921  MTRR: Fixed MSR 0x259 0x0000000000000000

 2534 10:12:33.566298  MTRR: Fixed MSR 0x268 0x0606060606060606

 2535 10:12:33.569869  MTRR: Fixed MSR 0x269 0x0606060606060606

 2536 10:12:33.572960  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2537 10:12:33.576560  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2538 10:12:33.583001  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2539 10:12:33.586610  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2540 10:12:33.589896  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2541 10:12:33.592993  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2542 10:12:33.599410  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2543 10:12:33.599540  call enable_fixed_mtrr()

 2544 10:12:33.606529  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2545 10:12:33.609397  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2546 10:12:33.612956  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2547 10:12:33.616005  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2548 10:12:33.619379  CPU physical address size: 39 bits

 2549 10:12:33.622776  call enable_fixed_mtrr()

 2550 10:12:33.626370  MTRR: Fixed MSR 0x258 0x0606060606060606

 2551 10:12:33.629326  CPU physical address size: 39 bits

 2552 10:12:33.635857  MTRR: Fixed MSR 0x259 0x0000000000000000

 2553 10:12:33.639679  MTRR: Fixed MSR 0x259 0x0000000000000000

 2554 10:12:33.642924  MTRR: Fixed MSR 0x268 0x0606060606060606

 2555 10:12:33.646331  MTRR: Fixed MSR 0x269 0x0606060606060606

 2556 10:12:33.652693  MTRR: Fixed MSR 0x268 0x0606060606060606

 2557 10:12:33.655952  MTRR: Fixed MSR 0x269 0x0606060606060606

 2558 10:12:33.659610  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2559 10:12:33.662893  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2560 10:12:33.665960  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2561 10:12:33.672665  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2562 10:12:33.675791  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2563 10:12:33.679048  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2564 10:12:33.683002  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2565 10:12:33.686467  call enable_fixed_mtrr()

 2566 10:12:33.689874  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2567 10:12:33.696515  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2568 10:12:33.699540  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2569 10:12:33.703174  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2570 10:12:33.706197  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2571 10:12:33.712795  CPU physical address size: 39 bits

 2572 10:12:33.716301  call enable_fixed_mtrr()

 2573 10:12:33.719744  CPU physical address size: 39 bits

 2574 10:12:33.719827  

 2575 10:12:33.723103  MTRR check

 2576 10:12:33.723186  Fixed MTRRs   : Enabled

 2577 10:12:33.726226  Variable MTRRs: Enabled

 2578 10:12:33.726308  

 2579 10:12:33.732938  BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms

 2580 10:12:33.736220  Checking cr50 for pending updates

 2581 10:12:33.747610  Reading cr50 TPM mode

 2582 10:12:33.762871  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2583 10:12:33.772654  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2584 10:12:33.775895  Checking segment from ROM address 0xf96cbe6c

 2585 10:12:33.779715  Checking segment from ROM address 0xf96cbe88

 2586 10:12:33.786119  Loading segment from ROM address 0xf96cbe6c

 2587 10:12:33.786246    code (compression=1)

 2588 10:12:33.796067    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2589 10:12:33.802841  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2590 10:12:33.806104  using LZMA

 2591 10:12:33.828516  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2592 10:12:33.835137  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2593 10:12:33.843747  Loading segment from ROM address 0xf96cbe88

 2594 10:12:33.846660    Entry Point 0x30000000

 2595 10:12:33.846767  Loaded segments

 2596 10:12:33.853391  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2597 10:12:33.859844  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2598 10:12:33.863084  Finalizing chipset.

 2599 10:12:33.863168  apm_control: Finalizing SMM.

 2600 10:12:33.866550  APMC done.

 2601 10:12:33.869874  HECI: CSE device 16.1 is disabled

 2602 10:12:33.873547  HECI: CSE device 16.2 is disabled

 2603 10:12:33.876904  HECI: CSE device 16.3 is disabled

 2604 10:12:33.879746  HECI: CSE device 16.4 is disabled

 2605 10:12:33.883174  HECI: CSE device 16.5 is disabled

 2606 10:12:33.886674  HECI: Sending End-of-Post

 2607 10:12:33.895016  CSE: EOP requested action: continue boot

 2608 10:12:33.898073  CSE EOP successful, continuing boot

 2609 10:12:33.904574  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2610 10:12:33.908003  mp_park_aps done after 0 msecs.

 2611 10:12:33.911214  Jumping to boot code at 0x30000000(0x76891000)

 2612 10:12:33.921592  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2613 10:12:33.925571  

 2614 10:12:33.925650  

 2615 10:12:33.925715  

 2616 10:12:33.929220  Starting depthcharge on Volmar...

 2617 10:12:33.929293  

 2618 10:12:33.929760  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2619 10:12:33.929859  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2620 10:12:33.929953  Setting prompt string to ['brya:']
 2621 10:12:33.930034  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2622 10:12:33.935284  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2623 10:12:33.935369  

 2624 10:12:33.942268  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2625 10:12:33.942341  

 2626 10:12:33.948658  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2627 10:12:33.948745  

 2628 10:12:33.952082  configure_storage: Failed to remap 1C:2

 2629 10:12:33.952166  

 2630 10:12:33.955686  Wipe memory regions:

 2631 10:12:33.955768  

 2632 10:12:33.958863  	[0x00000000001000, 0x000000000a0000)

 2633 10:12:33.958945  

 2634 10:12:33.962028  	[0x00000000100000, 0x00000030000000)

 2635 10:12:34.071576  

 2636 10:12:34.074738  	[0x00000032668e60, 0x00000076857000)

 2637 10:12:34.226337  

 2638 10:12:34.229714  	[0x00000100000000, 0x0000027fc00000)

 2639 10:12:35.083191  

 2640 10:12:35.086202  ec_init: CrosEC protocol v3 supported (256, 256)

 2641 10:12:35.694721  

 2642 10:12:35.694863  R8152: Initializing

 2643 10:12:35.694930  

 2644 10:12:35.698037  Version 9 (ocp_data = 6010)

 2645 10:12:35.698120  

 2646 10:12:35.701721  R8152: Done initializing

 2647 10:12:35.701803  

 2648 10:12:35.704725  Adding net device

 2649 10:12:36.006086  

 2650 10:12:36.009325  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2651 10:12:36.009416  

 2652 10:12:36.009482  

 2653 10:12:36.009542  

 2654 10:12:36.009820  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2656 10:12:36.110157  brya: tftpboot 192.168.201.1 11283177/tftp-deploy-m0n0od6d/kernel/bzImage 11283177/tftp-deploy-m0n0od6d/kernel/cmdline 11283177/tftp-deploy-m0n0od6d/ramdisk/ramdisk.cpio.gz

 2657 10:12:36.110292  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2658 10:12:36.110378  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2659 10:12:36.114130  tftpboot 192.168.201.1 11283177/tftp-deploy-m0n0od6d/kernel/bzImploy-m0n0od6d/kernel/cmdline 11283177/tftp-deploy-m0n0od6d/ramdisk/ramdisk.cpio.gz

 2660 10:12:36.114218  

 2661 10:12:36.114283  Waiting for link

 2662 10:12:36.317058  

 2663 10:12:36.317202  done.

 2664 10:12:36.317272  

 2665 10:12:36.317400  MAC: 00:e0:4c:68:01:8f

 2666 10:12:36.317461  

 2667 10:12:36.320352  Sending DHCP discover... done.

 2668 10:12:36.320436  

 2669 10:12:36.323400  Waiting for reply... done.

 2670 10:12:36.323494  

 2671 10:12:36.326717  Sending DHCP request... done.

 2672 10:12:36.326798  

 2673 10:12:36.330094  Waiting for reply... done.

 2674 10:12:36.330173  

 2675 10:12:36.333675  My ip is 192.168.201.28

 2676 10:12:36.333762  

 2677 10:12:36.336688  The DHCP server ip is 192.168.201.1

 2678 10:12:36.336828  

 2679 10:12:36.340399  TFTP server IP predefined by user: 192.168.201.1

 2680 10:12:36.340525  

 2681 10:12:36.346990  Bootfile predefined by user: 11283177/tftp-deploy-m0n0od6d/kernel/bzImage

 2682 10:12:36.347102  

 2683 10:12:36.350005  Sending tftp read request... done.

 2684 10:12:36.350087  

 2685 10:12:36.353470  Waiting for the transfer... 

 2686 10:12:36.356786  

 2687 10:12:36.623371  00000000 ################################################################

 2688 10:12:36.623509  

 2689 10:12:36.896549  00080000 ################################################################

 2690 10:12:36.896712  

 2691 10:12:37.164739  00100000 ################################################################

 2692 10:12:37.164906  

 2693 10:12:37.426788  00180000 ################################################################

 2694 10:12:37.427028  

 2695 10:12:37.699949  00200000 ################################################################

 2696 10:12:37.700092  

 2697 10:12:37.954630  00280000 ################################################################

 2698 10:12:37.954777  

 2699 10:12:38.209805  00300000 ################################################################

 2700 10:12:38.209936  

 2701 10:12:38.467079  00380000 ################################################################

 2702 10:12:38.467285  

 2703 10:12:38.731150  00400000 ################################################################

 2704 10:12:38.731342  

 2705 10:12:38.986760  00480000 ################################################################

 2706 10:12:38.986937  

 2707 10:12:39.241953  00500000 ################################################################

 2708 10:12:39.242101  

 2709 10:12:39.507883  00580000 ################################################################

 2710 10:12:39.508021  

 2711 10:12:39.763042  00600000 ################################################################

 2712 10:12:39.763201  

 2713 10:12:40.019729  00680000 ################################################################

 2714 10:12:40.019898  

 2715 10:12:40.295546  00700000 ################################################################

 2716 10:12:40.295684  

 2717 10:12:40.562271  00780000 ################################################################

 2718 10:12:40.562473  

 2719 10:12:40.833096  00800000 ################################################################

 2720 10:12:40.833233  

 2721 10:12:41.099400  00880000 ################################################################

 2722 10:12:41.099569  

 2723 10:12:41.355814  00900000 ################################################################

 2724 10:12:41.355954  

 2725 10:12:41.611023  00980000 ################################################################

 2726 10:12:41.611237  

 2727 10:12:41.793908  00a00000 ############################################### done.

 2728 10:12:41.794046  

 2729 10:12:41.800585  The bootfile was 10867200 bytes long.

 2730 10:12:41.800675  

 2731 10:12:41.804010  Sending tftp read request... done.

 2732 10:12:41.804090  

 2733 10:12:41.804163  Waiting for the transfer... 

 2734 10:12:41.807264  

 2735 10:12:42.065907  00000000 ################################################################

 2736 10:12:42.066047  

 2737 10:12:42.323042  00080000 ################################################################

 2738 10:12:42.323199  

 2739 10:12:42.574000  00100000 ################################################################

 2740 10:12:42.574161  

 2741 10:12:42.833331  00180000 ################################################################

 2742 10:12:42.833490  

 2743 10:12:43.088237  00200000 ################################################################

 2744 10:12:43.088384  

 2745 10:12:43.344839  00280000 ################################################################

 2746 10:12:43.344981  

 2747 10:12:43.595974  00300000 ################################################################

 2748 10:12:43.596181  

 2749 10:12:43.851191  00380000 ################################################################

 2750 10:12:43.851379  

 2751 10:12:44.103810  00400000 ################################################################

 2752 10:12:44.103979  

 2753 10:12:44.355263  00480000 ################################################################

 2754 10:12:44.355438  

 2755 10:12:44.599745  00500000 ################################################################

 2756 10:12:44.599925  

 2757 10:12:44.840569  00580000 ################################################################

 2758 10:12:44.840766  

 2759 10:12:45.089048  00600000 ################################################################

 2760 10:12:45.089226  

 2761 10:12:45.344165  00680000 ################################################################

 2762 10:12:45.344331  

 2763 10:12:45.601509  00700000 ################################################################

 2764 10:12:45.601699  

 2765 10:12:45.859767  00780000 ################################################################

 2766 10:12:45.859919  

 2767 10:12:46.125411  00800000 ################################################################

 2768 10:12:46.125557  

 2769 10:12:46.274517  00880000 ##################################### done.

 2770 10:12:46.274675  

 2771 10:12:46.277898  Sending tftp read request... done.

 2772 10:12:46.278007  

 2773 10:12:46.281388  Waiting for the transfer... 

 2774 10:12:46.281467  

 2775 10:12:46.281533  00000000 # done.

 2776 10:12:46.281596  

 2777 10:12:46.291401  Command line loaded dynamically from TFTP file: 11283177/tftp-deploy-m0n0od6d/kernel/cmdline

 2778 10:12:46.291511  

 2779 10:12:46.304453  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2780 10:12:46.311696  

 2781 10:12:46.314830  Shutting down all USB controllers.

 2782 10:12:46.314909  

 2783 10:12:46.314975  Removing current net device

 2784 10:12:46.315039  

 2785 10:12:46.318550  Finalizing coreboot

 2786 10:12:46.318627  

 2787 10:12:46.325084  Exiting depthcharge with code 4 at timestamp: 22654332

 2788 10:12:46.325164  

 2789 10:12:46.325229  

 2790 10:12:46.325298  Starting kernel ...

 2791 10:12:46.325359  

 2792 10:12:46.325419  

 2793 10:12:46.325807  end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
 2794 10:12:46.325914  start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
 2795 10:12:46.325996  Setting prompt string to ['Linux version [0-9]']
 2796 10:12:46.326073  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2797 10:12:46.326145  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2799 10:17:14.326159  end: 2.2.5 auto-login-action (duration 00:04:28) [common]
 2801 10:17:14.326371  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
 2803 10:17:14.326535  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2806 10:17:14.326794  end: 2 depthcharge-action (duration 00:05:00) [common]
 2808 10:17:14.327009  Cleaning after the job
 2809 10:17:14.327111  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11283177/tftp-deploy-m0n0od6d/ramdisk
 2810 10:17:14.328257  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11283177/tftp-deploy-m0n0od6d/kernel
 2811 10:17:14.329572  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11283177/tftp-deploy-m0n0od6d/modules
 2812 10:17:14.330115  start: 5.1 power-off (timeout 00:00:30) [common]
 2813 10:17:14.330276  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=off'
 2814 10:17:14.405946  >> Command sent successfully.

 2815 10:17:14.409319  Returned 0 in 0 seconds
 2816 10:17:14.509698  end: 5.1 power-off (duration 00:00:00) [common]
 2818 10:17:14.510006  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2819 10:17:14.510260  Listened to connection for namespace 'common' for up to 1s
 2820 10:17:15.511238  Finalising connection for namespace 'common'
 2821 10:17:15.511475  Disconnecting from shell: Finalise
 2822 10:17:15.511551  

 2823 10:17:15.611865  end: 5.2 read-feedback (duration 00:00:01) [common]
 2824 10:17:15.612077  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11283177
 2825 10:17:15.627211  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11283177
 2826 10:17:15.627361  JobError: Your job cannot terminate cleanly.