Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
1 20:14:28.023472 lava-dispatcher, installed at version: 2023.10
2 20:14:28.023679 start: 0 validate
3 20:14:28.023806 Start time: 2023-12-28 20:14:28.023798+00:00 (UTC)
4 20:14:28.023920 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:14:28.024050 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 20:14:28.285600 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:14:28.286349 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.299-cip105-1134-gc868d5e4adaa%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:14:28.558866 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:14:28.559663 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.299-cip105-1134-gc868d5e4adaa%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 20:14:36.800765 validate duration: 8.78
12 20:14:36.801040 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:14:36.801141 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:14:36.801228 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:14:36.801351 Not decompressing ramdisk as can be used compressed.
16 20:14:36.801437 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 20:14:36.801501 saving as /var/lib/lava/dispatcher/tmp/12402887/tftp-deploy-9qoloh1n/ramdisk/rootfs.cpio.gz
18 20:14:36.801563 total size: 8418130 (8 MB)
19 20:14:37.420683 progress 0 % (0 MB)
20 20:14:37.425919 progress 5 % (0 MB)
21 20:14:37.428177 progress 10 % (0 MB)
22 20:14:37.430393 progress 15 % (1 MB)
23 20:14:37.432608 progress 20 % (1 MB)
24 20:14:37.434812 progress 25 % (2 MB)
25 20:14:37.437049 progress 30 % (2 MB)
26 20:14:37.439083 progress 35 % (2 MB)
27 20:14:37.441322 progress 40 % (3 MB)
28 20:14:37.443567 progress 45 % (3 MB)
29 20:14:37.445776 progress 50 % (4 MB)
30 20:14:37.448043 progress 55 % (4 MB)
31 20:14:37.450321 progress 60 % (4 MB)
32 20:14:37.452392 progress 65 % (5 MB)
33 20:14:37.454554 progress 70 % (5 MB)
34 20:14:37.456808 progress 75 % (6 MB)
35 20:14:37.459107 progress 80 % (6 MB)
36 20:14:37.461396 progress 85 % (6 MB)
37 20:14:37.463698 progress 90 % (7 MB)
38 20:14:37.466060 progress 95 % (7 MB)
39 20:14:37.468211 progress 100 % (8 MB)
40 20:14:37.468447 8 MB downloaded in 0.67 s (12.04 MB/s)
41 20:14:37.468667 end: 1.1.1 http-download (duration 00:00:01) [common]
43 20:14:37.468933 end: 1.1 download-retry (duration 00:00:01) [common]
44 20:14:37.469018 start: 1.2 download-retry (timeout 00:09:59) [common]
45 20:14:37.469100 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 20:14:37.469261 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.299-cip105-1134-gc868d5e4adaa/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 20:14:37.469346 saving as /var/lib/lava/dispatcher/tmp/12402887/tftp-deploy-9qoloh1n/kernel/bzImage
48 20:14:37.469446 total size: 11579904 (11 MB)
49 20:14:37.469534 No compression specified
50 20:14:37.470832 progress 0 % (0 MB)
51 20:14:37.474063 progress 5 % (0 MB)
52 20:14:37.477157 progress 10 % (1 MB)
53 20:14:37.480268 progress 15 % (1 MB)
54 20:14:37.483163 progress 20 % (2 MB)
55 20:14:37.486252 progress 25 % (2 MB)
56 20:14:37.489337 progress 30 % (3 MB)
57 20:14:37.492271 progress 35 % (3 MB)
58 20:14:37.495296 progress 40 % (4 MB)
59 20:14:37.498424 progress 45 % (5 MB)
60 20:14:37.501386 progress 50 % (5 MB)
61 20:14:37.504487 progress 55 % (6 MB)
62 20:14:37.507640 progress 60 % (6 MB)
63 20:14:37.510625 progress 65 % (7 MB)
64 20:14:37.513667 progress 70 % (7 MB)
65 20:14:37.516882 progress 75 % (8 MB)
66 20:14:37.519919 progress 80 % (8 MB)
67 20:14:37.522983 progress 85 % (9 MB)
68 20:14:37.525994 progress 90 % (9 MB)
69 20:14:37.528794 progress 95 % (10 MB)
70 20:14:37.531778 progress 100 % (11 MB)
71 20:14:37.531930 11 MB downloaded in 0.06 s (176.75 MB/s)
72 20:14:37.532071 end: 1.2.1 http-download (duration 00:00:00) [common]
74 20:14:37.532291 end: 1.2 download-retry (duration 00:00:00) [common]
75 20:14:37.532378 start: 1.3 download-retry (timeout 00:09:59) [common]
76 20:14:37.532459 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 20:14:37.532593 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.299-cip105-1134-gc868d5e4adaa/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 20:14:37.532664 saving as /var/lib/lava/dispatcher/tmp/12402887/tftp-deploy-9qoloh1n/modules/modules.tar
79 20:14:37.532724 total size: 484260 (0 MB)
80 20:14:37.532783 Using unxz to decompress xz
81 20:14:37.537040 progress 6 % (0 MB)
82 20:14:37.537430 progress 13 % (0 MB)
83 20:14:37.537656 progress 20 % (0 MB)
84 20:14:37.539250 progress 27 % (0 MB)
85 20:14:37.541252 progress 33 % (0 MB)
86 20:14:37.543098 progress 40 % (0 MB)
87 20:14:37.545048 progress 47 % (0 MB)
88 20:14:37.546924 progress 54 % (0 MB)
89 20:14:37.548861 progress 60 % (0 MB)
90 20:14:37.550841 progress 67 % (0 MB)
91 20:14:37.552889 progress 74 % (0 MB)
92 20:14:37.554882 progress 81 % (0 MB)
93 20:14:37.556779 progress 87 % (0 MB)
94 20:14:37.558683 progress 94 % (0 MB)
95 20:14:37.561082 progress 100 % (0 MB)
96 20:14:37.567546 0 MB downloaded in 0.03 s (13.26 MB/s)
97 20:14:37.567780 end: 1.3.1 http-download (duration 00:00:00) [common]
99 20:14:37.568037 end: 1.3 download-retry (duration 00:00:00) [common]
100 20:14:37.568129 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 20:14:37.568222 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 20:14:37.568301 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 20:14:37.568382 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 20:14:37.568599 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej
105 20:14:37.568731 makedir: /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin
106 20:14:37.568834 makedir: /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/tests
107 20:14:37.568933 makedir: /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/results
108 20:14:37.569054 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-add-keys
109 20:14:37.569198 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-add-sources
110 20:14:37.569327 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-background-process-start
111 20:14:37.569455 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-background-process-stop
112 20:14:37.569582 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-common-functions
113 20:14:37.569707 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-echo-ipv4
114 20:14:37.569831 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-install-packages
115 20:14:37.569954 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-installed-packages
116 20:14:37.570077 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-os-build
117 20:14:37.570201 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-probe-channel
118 20:14:37.570323 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-probe-ip
119 20:14:37.570446 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-target-ip
120 20:14:37.570569 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-target-mac
121 20:14:37.570691 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-target-storage
122 20:14:37.570817 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-test-case
123 20:14:37.570943 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-test-event
124 20:14:37.571066 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-test-feedback
125 20:14:37.571189 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-test-raise
126 20:14:37.571314 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-test-reference
127 20:14:37.571481 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-test-runner
128 20:14:37.571605 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-test-set
129 20:14:37.571729 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-test-shell
130 20:14:37.571855 Updating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-install-packages (oe)
131 20:14:37.572005 Updating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/bin/lava-installed-packages (oe)
132 20:14:37.572126 Creating /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/environment
133 20:14:37.572224 LAVA metadata
134 20:14:37.572298 - LAVA_JOB_ID=12402887
135 20:14:37.572365 - LAVA_DISPATCHER_IP=192.168.201.1
136 20:14:37.572463 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 20:14:37.572530 skipped lava-vland-overlay
138 20:14:37.572605 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 20:14:37.572683 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 20:14:37.572743 skipped lava-multinode-overlay
141 20:14:37.572814 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 20:14:37.572892 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 20:14:37.572964 Loading test definitions
144 20:14:37.573057 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 20:14:37.573134 Using /lava-12402887 at stage 0
146 20:14:37.573452 uuid=12402887_1.4.2.3.1 testdef=None
147 20:14:37.573539 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 20:14:37.573630 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 20:14:37.574151 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 20:14:37.574370 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 20:14:37.575022 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 20:14:37.575246 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 20:14:37.575900 runner path: /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/0/tests/0_dmesg test_uuid 12402887_1.4.2.3.1
156 20:14:37.576053 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 20:14:37.576277 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 20:14:37.576347 Using /lava-12402887 at stage 1
160 20:14:37.576694 uuid=12402887_1.4.2.3.5 testdef=None
161 20:14:37.576782 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 20:14:37.576865 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 20:14:37.577335 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 20:14:37.577550 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 20:14:37.578187 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 20:14:37.578409 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 20:14:37.579030 runner path: /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/1/tests/1_bootrr test_uuid 12402887_1.4.2.3.5
170 20:14:37.579180 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 20:14:37.579427 Creating lava-test-runner.conf files
173 20:14:37.579490 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/0 for stage 0
174 20:14:37.579579 - 0_dmesg
175 20:14:37.579658 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12402887/lava-overlay-4bwzqzej/lava-12402887/1 for stage 1
176 20:14:37.579748 - 1_bootrr
177 20:14:37.579842 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 20:14:37.579928 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 20:14:37.588265 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 20:14:37.588365 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 20:14:37.588448 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 20:14:37.588531 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 20:14:37.588614 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 20:14:37.842314 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 20:14:37.842697 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 20:14:37.842808 extracting modules file /var/lib/lava/dispatcher/tmp/12402887/tftp-deploy-9qoloh1n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12402887/extract-overlay-ramdisk-vs1f_jq6/ramdisk
187 20:14:37.863666 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 20:14:37.863799 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 20:14:37.863886 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12402887/compress-overlay-0xvuvgin/overlay-1.4.2.4.tar.gz to ramdisk
190 20:14:37.863954 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12402887/compress-overlay-0xvuvgin/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12402887/extract-overlay-ramdisk-vs1f_jq6/ramdisk
191 20:14:37.872175 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 20:14:37.872276 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 20:14:37.872360 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 20:14:37.872441 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 20:14:37.872517 Building ramdisk /var/lib/lava/dispatcher/tmp/12402887/extract-overlay-ramdisk-vs1f_jq6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12402887/extract-overlay-ramdisk-vs1f_jq6/ramdisk
196 20:14:38.021833 >> 53983 blocks
197 20:14:38.898167 rename /var/lib/lava/dispatcher/tmp/12402887/extract-overlay-ramdisk-vs1f_jq6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12402887/tftp-deploy-9qoloh1n/ramdisk/ramdisk.cpio.gz
198 20:14:38.898608 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 20:14:38.898729 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 20:14:38.898827 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 20:14:38.898923 No mkimage arch provided, not using FIT.
202 20:14:38.899007 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 20:14:38.899086 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 20:14:38.899185 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 20:14:38.899270 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 20:14:38.899344 No LXC device requested
207 20:14:38.899460 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 20:14:38.899540 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 20:14:38.899616 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 20:14:38.899684 Checking files for TFTP limit of 4294967296 bytes.
211 20:14:38.900076 end: 1 tftp-deploy (duration 00:00:02) [common]
212 20:14:38.900181 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 20:14:38.900269 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 20:14:38.900392 substitutions:
215 20:14:38.900465 - {DTB}: None
216 20:14:38.900535 - {INITRD}: 12402887/tftp-deploy-9qoloh1n/ramdisk/ramdisk.cpio.gz
217 20:14:38.900596 - {KERNEL}: 12402887/tftp-deploy-9qoloh1n/kernel/bzImage
218 20:14:38.900651 - {LAVA_MAC}: None
219 20:14:38.900705 - {PRESEED_CONFIG}: None
220 20:14:38.900761 - {PRESEED_LOCAL}: None
221 20:14:38.900813 - {RAMDISK}: 12402887/tftp-deploy-9qoloh1n/ramdisk/ramdisk.cpio.gz
222 20:14:38.900866 - {ROOT_PART}: None
223 20:14:38.900923 - {ROOT}: None
224 20:14:38.900975 - {SERVER_IP}: 192.168.201.1
225 20:14:38.901026 - {TEE}: None
226 20:14:38.901078 Parsed boot commands:
227 20:14:38.901131 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 20:14:38.901301 Parsed boot commands: tftpboot 192.168.201.1 12402887/tftp-deploy-9qoloh1n/kernel/bzImage 12402887/tftp-deploy-9qoloh1n/kernel/cmdline 12402887/tftp-deploy-9qoloh1n/ramdisk/ramdisk.cpio.gz
229 20:14:38.901385 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 20:14:38.901466 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 20:14:38.901558 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 20:14:38.901642 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 20:14:38.901709 Not connected, no need to disconnect.
234 20:14:38.901782 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 20:14:38.901858 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 20:14:38.901919 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-5'
237 20:14:38.905762 Setting prompt string to ['lava-test: # ']
238 20:14:38.906091 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 20:14:38.906187 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 20:14:38.906280 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 20:14:38.906363 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 20:14:38.906610 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=reboot'
243 20:14:44.054390 >> Command sent successfully.
244 20:14:44.060306 Returned 0 in 5 seconds
245 20:14:44.161024 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 20:14:44.162552 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 20:14:44.163088 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 20:14:44.163543 Setting prompt string to 'Starting depthcharge on Volmar...'
250 20:14:44.163879 Changing prompt to 'Starting depthcharge on Volmar...'
251 20:14:44.164218 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
252 20:14:44.165358 [Enter `^Ec?' for help]
253 20:14:45.534490
254 20:14:45.535094
255 20:14:45.542075 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
256 20:14:45.545480 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
257 20:14:45.549455 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
258 20:14:45.557069 CPU: AES supported, TXT NOT supported, VT supported
259 20:14:45.564502 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
260 20:14:45.564968 Cache size = 10 MiB
261 20:14:45.572304 MCH: device id 4609 (rev 04) is Alderlake-P
262 20:14:45.575449 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
263 20:14:45.579765 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
264 20:14:45.583602 VBOOT: Loading verstage.
265 20:14:45.587448 FMAP: Found "FLASH" version 1.1 at 0x1804000.
266 20:14:45.590440 FMAP: base = 0x0 size = 0x2000000 #areas = 37
267 20:14:45.597308 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
268 20:14:45.604473 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
269 20:14:45.610709 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
270 20:14:45.615508
271 20:14:45.616023
272 20:14:45.621625 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
273 20:14:45.629220 Probing TPM I2C: I2C bus 1 version 0x3230302a
274 20:14:45.632374 DW I2C bus 1 at 0xfe022000 (400 KHz)
275 20:14:45.635953 I2C TX abort detected (00000001)
276 20:14:45.639401 cr50_i2c_read: Address write failed
277 20:14:45.651020 .done! DID_VID 0x00281ae0
278 20:14:45.654224 TPM ready after 0 ms
279 20:14:45.658442 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
280 20:14:45.671058 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
281 20:14:45.678171 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
282 20:14:45.730490 tlcl_send_startup: Startup return code is 0
283 20:14:45.731049 TPM: setup succeeded
284 20:14:45.752698 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
285 20:14:45.774937 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
286 20:14:45.778683 Chrome EC: UHEPI supported
287 20:14:45.782306 Reading cr50 boot mode
288 20:14:45.797149 Cr50 says boot_mode is VERIFIED_RW(0x00).
289 20:14:45.797708 Phase 1
290 20:14:45.800436 FMAP: area GBB found @ 1805000 (458752 bytes)
291 20:14:45.811826 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 20:14:45.818380 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 20:14:45.824516 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
294 20:14:45.824983 Phase 2
295 20:14:45.825351 Phase 3
296 20:14:45.831992 FMAP: area GBB found @ 1805000 (458752 bytes)
297 20:14:45.834726 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 20:14:45.841585 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
299 20:14:45.848354 VB2:vb2_verify_keyblock() Checking keyblock signature...
300 20:14:45.855822 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
301 20:14:45.863228 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
302 20:14:45.870215 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
303 20:14:45.881772 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
304 20:14:45.885150 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
305 20:14:45.892088 VB2:vb2_verify_fw_preamble() Verifying preamble.
306 20:14:45.898928 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
307 20:14:45.905165 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
308 20:14:45.911491 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
309 20:14:45.916096 Phase 4
310 20:14:45.919071 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
311 20:14:45.925783 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
312 20:14:46.137662 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
313 20:14:46.144221 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
314 20:14:46.148040 Saving vboot hash.
315 20:14:46.154378 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
316 20:14:46.170559 tlcl_extend: response is 0
317 20:14:46.177198 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
318 20:14:46.180555 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
319 20:14:46.198963 tlcl_extend: response is 0
320 20:14:46.204716 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
321 20:14:46.226489 tlcl_lock_nv_write: response is 0
322 20:14:46.245801 tlcl_lock_nv_write: response is 0
323 20:14:46.246364 Slot A is selected
324 20:14:46.252143 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
325 20:14:46.258844 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
326 20:14:46.265846 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
327 20:14:46.272215 BS: verstage times (exec / console): total (unknown) / 263 ms
328 20:14:46.272802
329 20:14:46.273163
330 20:14:46.278511 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
331 20:14:46.282967 Google Chrome EC: version:
332 20:14:46.286514 ro: volmar_v2.0.14126-e605144e9c
333 20:14:46.289952 rw: volmar_v0.0.55-22d1557
334 20:14:46.293349 running image: 2
335 20:14:46.296546 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
336 20:14:46.306671 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
337 20:14:46.313278 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
338 20:14:46.319528 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
339 20:14:46.329659 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
340 20:14:46.340069 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 20:14:46.343584 EC took 942us to calculate image hash
342 20:14:46.352949 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
343 20:14:46.356547 VB2:sync_ec() select_rw=RW(active)
344 20:14:46.367744 Waited 270us to clear limit power flag.
345 20:14:46.370709 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
346 20:14:46.374243 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
347 20:14:46.377285 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
348 20:14:46.384366 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
349 20:14:46.387472 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
350 20:14:46.390708 TCO_STS: 0000 0000
351 20:14:46.391273 GEN_PMCON: d0015038 00002200
352 20:14:46.394235 GBLRST_CAUSE: 00000000 00000000
353 20:14:46.397476 HPR_CAUSE0: 00000000
354 20:14:46.400926 prev_sleep_state 5
355 20:14:46.403734 Abort disabling TXT, as CPU is not TXT capable.
356 20:14:46.412332 cse_lite: Number of partitions = 3
357 20:14:46.416256 cse_lite: Current partition = RO
358 20:14:46.416819 cse_lite: Next partition = RO
359 20:14:46.418914 cse_lite: Flags = 0x7
360 20:14:46.425794 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
361 20:14:46.435472 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
362 20:14:46.438544 FMAP: area SI_ME found @ 1000 (5238784 bytes)
363 20:14:46.445792 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
364 20:14:46.452378 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
365 20:14:46.458762 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
366 20:14:46.462735 cse_lite: CSE CBFS RW version : 16.1.25.2049
367 20:14:46.469165 cse_lite: Set Boot Partition Info Command (RW)
368 20:14:46.472261 HECI: Global Reset(Type:1) Command
369 20:14:47.895916 c�����Y��CPU: 12th Gen Intel(R) Core(TM) i3-1215U
370 20:14:47.903047 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
371 20:14:47.906163 CPU: AES supported, TXT NOT supported, VT supported
372 20:14:47.912947 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
373 20:14:47.916250 Cache size = 10 MiB
374 20:14:47.919174 MCH: device id 4609 (rev 04) is Alderlake-P
375 20:14:47.926405 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
376 20:14:47.929711 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
377 20:14:47.932646 VBOOT: Loading verstage.
378 20:14:47.936829 FMAP: Found "FLASH" version 1.1 at 0x1804000.
379 20:14:47.943592 FMAP: base = 0x0 size = 0x2000000 #areas = 37
380 20:14:47.947055 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
381 20:14:47.957181 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
382 20:14:47.964029 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
383 20:14:47.964593
384 20:14:47.965083
385 20:14:47.974308 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
386 20:14:47.980600 Probing TPM I2C: I2C bus 1 version 0x3230302a
387 20:14:47.984137 DW I2C bus 1 at 0xfe022000 (400 KHz)
388 20:14:47.987249 done! DID_VID 0x00281ae0
389 20:14:47.987872 TPM ready after 0 ms
390 20:14:47.992405 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
391 20:14:48.001856 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
392 20:14:48.009812 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
393 20:14:48.065959 tlcl_send_startup: Startup return code is 0
394 20:14:48.066524 TPM: setup succeeded
395 20:14:48.085430 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
396 20:14:48.107612 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
397 20:14:48.111760 Chrome EC: UHEPI supported
398 20:14:48.114813 Reading cr50 boot mode
399 20:14:48.129212 Cr50 says boot_mode is VERIFIED_RW(0x00).
400 20:14:48.129773 Phase 1
401 20:14:48.136077 FMAP: area GBB found @ 1805000 (458752 bytes)
402 20:14:48.142397 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
403 20:14:48.149471 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
404 20:14:48.156163 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
405 20:14:48.159949 Phase 2
406 20:14:48.160516 Phase 3
407 20:14:48.163085 FMAP: area GBB found @ 1805000 (458752 bytes)
408 20:14:48.169503 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 20:14:48.172582 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 20:14:48.179734 VB2:vb2_verify_keyblock() Checking keyblock signature...
411 20:14:48.185945 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
412 20:14:48.192997 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
413 20:14:48.202700 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
414 20:14:48.214851 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
415 20:14:48.218037 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
416 20:14:48.224443 VB2:vb2_verify_fw_preamble() Verifying preamble.
417 20:14:48.231512 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
418 20:14:48.238547 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
419 20:14:48.244312 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
420 20:14:48.248858 Phase 4
421 20:14:48.251802 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
422 20:14:48.258613 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
423 20:14:48.471486 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
424 20:14:48.477570 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
425 20:14:48.480792 Saving vboot hash.
426 20:14:48.487320 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
427 20:14:48.503339 tlcl_extend: response is 0
428 20:14:48.510216 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
429 20:14:48.516446 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
430 20:14:48.530619 tlcl_extend: response is 0
431 20:14:48.538502 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
432 20:14:48.556093 tlcl_lock_nv_write: response is 0
433 20:14:48.575215 tlcl_lock_nv_write: response is 0
434 20:14:48.575840 Slot A is selected
435 20:14:48.581936 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
436 20:14:48.588484 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
437 20:14:48.594633 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
438 20:14:48.602121 BS: verstage times (exec / console): total (unknown) / 256 ms
439 20:14:48.602700
440 20:14:48.603068
441 20:14:48.608181 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
442 20:14:48.612394 Google Chrome EC: version:
443 20:14:48.616121 ro: volmar_v2.0.14126-e605144e9c
444 20:14:48.618820 rw: volmar_v0.0.55-22d1557
445 20:14:48.622250 running image: 2
446 20:14:48.625296 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
447 20:14:48.635818 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
448 20:14:48.642604 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
449 20:14:48.648997 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
450 20:14:48.659130 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
451 20:14:48.669159 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
452 20:14:48.672312 EC took 966us to calculate image hash
453 20:14:48.682411 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
454 20:14:48.685791 VB2:sync_ec() select_rw=RW(active)
455 20:14:48.704122 Waited 280us to clear limit power flag.
456 20:14:48.708192 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
457 20:14:48.711794 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
458 20:14:48.715140 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
459 20:14:48.719027 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
460 20:14:48.722887 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
461 20:14:48.726933 TCO_STS: 0000 0000
462 20:14:48.730395 GEN_PMCON: d1001038 00002200
463 20:14:48.734540 GBLRST_CAUSE: 00000040 00000000
464 20:14:48.734961 HPR_CAUSE0: 00000000
465 20:14:48.738390 prev_sleep_state 5
466 20:14:48.741281 Abort disabling TXT, as CPU is not TXT capable.
467 20:14:48.746578 cse_lite: Number of partitions = 3
468 20:14:48.750745 cse_lite: Current partition = RW
469 20:14:48.754194 cse_lite: Next partition = RW
470 20:14:48.758525 cse_lite: Flags = 0x7
471 20:14:48.766000 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
472 20:14:48.774107 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
473 20:14:48.777668 FMAP: area SI_ME found @ 1000 (5238784 bytes)
474 20:14:48.781475 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
475 20:14:48.788557 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
476 20:14:48.795525 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
477 20:14:48.798449 cse_lite: CSE CBFS RW version : 16.1.25.2049
478 20:14:48.802488 Boot Count incremented to 4275
479 20:14:48.809333 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
480 20:14:48.815727 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
481 20:14:48.828870 Probing TPM I2C: done! DID_VID 0x00281ae0
482 20:14:48.831999 Locality already claimed
483 20:14:48.835839 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
484 20:14:48.854619 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
485 20:14:48.861718 MRC: Hash idx 0x100d comparison successful.
486 20:14:48.865163 MRC cache found, size f6c8
487 20:14:48.865726 bootmode is set to: 2
488 20:14:48.868852 EC returned error result code 3
489 20:14:48.872451 FW_CONFIG value from CBI is 0x131
490 20:14:48.879739 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
491 20:14:48.881976 SPD index = 0
492 20:14:48.888653 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
493 20:14:48.889209 SPD: module type is LPDDR4X
494 20:14:48.895380 SPD: module part number is K4U6E3S4AB-MGCL
495 20:14:48.902404 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
496 20:14:48.905352 SPD: device width 16 bits, bus width 16 bits
497 20:14:48.908341 SPD: module size is 1024 MB (per channel)
498 20:14:48.978279 CBMEM:
499 20:14:48.981025 IMD: root @ 0x76fff000 254 entries.
500 20:14:48.985520 IMD: root @ 0x76ffec00 62 entries.
501 20:14:48.991881 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
502 20:14:48.995753 RO_VPD is uninitialized or empty.
503 20:14:48.999239 FMAP: area RW_VPD found @ f29000 (8192 bytes)
504 20:14:49.005376 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
505 20:14:49.008667 External stage cache:
506 20:14:49.012083 IMD: root @ 0x7bbff000 254 entries.
507 20:14:49.015437 IMD: root @ 0x7bbfec00 62 entries.
508 20:14:49.022643 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
509 20:14:49.029014 MRC: Checking cached data update for 'RW_MRC_CACHE'.
510 20:14:49.032116 MRC: 'RW_MRC_CACHE' does not need update.
511 20:14:49.032577 8 DIMMs found
512 20:14:49.035651 SMM Memory Map
513 20:14:49.038998 SMRAM : 0x7b800000 0x800000
514 20:14:49.042404 Subregion 0: 0x7b800000 0x200000
515 20:14:49.045085 Subregion 1: 0x7ba00000 0x200000
516 20:14:49.048548 Subregion 2: 0x7bc00000 0x400000
517 20:14:49.051752 top_of_ram = 0x77000000
518 20:14:49.055204 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
519 20:14:49.062164 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
520 20:14:49.068649 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
521 20:14:49.071748 MTRR Range: Start=ff000000 End=0 (Size 1000000)
522 20:14:49.072208 Normal boot
523 20:14:49.081721 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
524 20:14:49.088655 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
525 20:14:49.095236 Processing 237 relocs. Offset value of 0x74ab9000
526 20:14:49.103764 BS: romstage times (exec / console): total (unknown) / 377 ms
527 20:14:49.110883
528 20:14:49.111472
529 20:14:49.117515 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
530 20:14:49.118077 Normal boot
531 20:14:49.124297 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
532 20:14:49.130356 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
533 20:14:49.137415 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
534 20:14:49.147114 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
535 20:14:49.195272 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
536 20:14:49.201528 Processing 5931 relocs. Offset value of 0x72a2f000
537 20:14:49.204576 BS: postcar times (exec / console): total (unknown) / 51 ms
538 20:14:49.205041
539 20:14:49.208274
540 20:14:49.214728 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
541 20:14:49.218218 Reserving BERT start 76a1e000, size 10000
542 20:14:49.221526 Normal boot
543 20:14:49.225035 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
544 20:14:49.231486 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
545 20:14:49.241771 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
546 20:14:49.244843 FMAP: area RW_VPD found @ f29000 (8192 bytes)
547 20:14:49.248179 Google Chrome EC: version:
548 20:14:49.251857 ro: volmar_v2.0.14126-e605144e9c
549 20:14:49.254798 rw: volmar_v0.0.55-22d1557
550 20:14:49.258064 running image: 2
551 20:14:49.261117 ACPI _SWS is PM1 Index 8 GPE Index -1
552 20:14:49.264410 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
553 20:14:49.269570 EC returned error result code 3
554 20:14:49.273798 FW_CONFIG value from CBI is 0x131
555 20:14:49.280273 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
556 20:14:49.283584 PCI: 00:1c.2 disabled by fw_config
557 20:14:49.286790 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 20:14:49.293309 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 20:14:49.300263 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
560 20:14:49.303423 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
561 20:14:49.310237 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
562 20:14:49.316956 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
563 20:14:49.320317 microcode: sig=0x906a4 pf=0x80 revision=0x423
564 20:14:49.327112 microcode: Update skipped, already up-to-date
565 20:14:49.333232 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
566 20:14:49.364649 Detected 6 core, 8 thread CPU.
567 20:14:49.368088 Setting up SMI for CPU
568 20:14:49.371505 IED base = 0x7bc00000
569 20:14:49.372068 IED size = 0x00400000
570 20:14:49.374799 Will perform SMM setup.
571 20:14:49.378301 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
572 20:14:49.381434 LAPIC 0x0 in XAPIC mode.
573 20:14:49.391592 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
574 20:14:49.394750 Processing 18 relocs. Offset value of 0x00030000
575 20:14:49.399514 Attempting to start 7 APs
576 20:14:49.402485 Waiting for 10ms after sending INIT.
577 20:14:49.415593 Waiting for SIPI to complete...
578 20:14:49.418778 LAPIC 0x1 in XAPIC mode.
579 20:14:49.422266 LAPIC 0x12 in XAPIC mode.
580 20:14:49.425426 LAPIC 0x16 in XAPIC mode.
581 20:14:49.429323 AP: slot 4 apic_id 12, MCU rev: 0x00000423
582 20:14:49.432063 AP: slot 2 apic_id 16, MCU rev: 0x00000423
583 20:14:49.435708 LAPIC 0x14 in XAPIC mode.
584 20:14:49.438929 LAPIC 0x10 in XAPIC mode.
585 20:14:49.442619 AP: slot 1 apic_id 14, MCU rev: 0x00000423
586 20:14:49.443179 done.
587 20:14:49.448700 AP: slot 3 apic_id 10, MCU rev: 0x00000423
588 20:14:49.451967 LAPIC 0x8 in XAPIC mode.
589 20:14:49.452427 LAPIC 0x9 in XAPIC mode.
590 20:14:49.459467 AP: slot 6 apic_id 8, MCU rev: 0x00000423
591 20:14:49.462146 AP: slot 5 apic_id 9, MCU rev: 0x00000423
592 20:14:49.465271 Waiting for SIPI to complete...
593 20:14:49.465733 done.
594 20:14:49.468798 AP: slot 7 apic_id 1, MCU rev: 0x00000423
595 20:14:49.472544 smm_setup_relocation_handler: enter
596 20:14:49.475392 smm_setup_relocation_handler: exit
597 20:14:49.485512 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
598 20:14:49.488973 Processing 11 relocs. Offset value of 0x00038000
599 20:14:49.495607 smm_module_setup_stub: stack_top = 0x7b804000
600 20:14:49.498967 smm_module_setup_stub: per cpu stack_size = 0x800
601 20:14:49.505698 smm_module_setup_stub: runtime.start32_offset = 0x4c
602 20:14:49.508798 smm_module_setup_stub: runtime.smm_size = 0x10000
603 20:14:49.515341 SMM Module: stub loaded at 38000. Will call 0x76a52094
604 20:14:49.518681 Installing permanent SMM handler to 0x7b800000
605 20:14:49.525765 smm_load_module: total_smm_space_needed e468, available -> 200000
606 20:14:49.535518 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
607 20:14:49.538471 Processing 255 relocs. Offset value of 0x7b9f6000
608 20:14:49.545885 smm_load_module: smram_start: 0x7b800000
609 20:14:49.548726 smm_load_module: smram_end: 7ba00000
610 20:14:49.551727 smm_load_module: handler start 0x7b9f6d5f
611 20:14:49.555291 smm_load_module: handler_size 98d0
612 20:14:49.558848 smm_load_module: fxsave_area 0x7b9ff000
613 20:14:49.561925 smm_load_module: fxsave_size 1000
614 20:14:49.565209 smm_load_module: CONFIG_MSEG_SIZE 0x0
615 20:14:49.571962 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
616 20:14:49.578407 smm_load_module: handler_mod_params.smbase = 0x7b800000
617 20:14:49.581825 smm_load_module: per_cpu_save_state_size = 0x400
618 20:14:49.585178 smm_load_module: num_cpus = 0x8
619 20:14:49.592030 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
620 20:14:49.595154 smm_load_module: total_save_state_size = 0x2000
621 20:14:49.598452 smm_load_module: cpu0 entry: 7b9e6000
622 20:14:49.605085 smm_create_map: cpus allowed in one segment 30
623 20:14:49.608765 smm_create_map: min # of segments needed 1
624 20:14:49.609315 CPU 0x0
625 20:14:49.611714 smbase 7b9e6000 entry 7b9ee000
626 20:14:49.618201 ss_start 7b9f5c00 code_end 7b9ee208
627 20:14:49.618661 CPU 0x1
628 20:14:49.621610 smbase 7b9e5c00 entry 7b9edc00
629 20:14:49.628121 ss_start 7b9f5800 code_end 7b9ede08
630 20:14:49.628665 CPU 0x2
631 20:14:49.631726 smbase 7b9e5800 entry 7b9ed800
632 20:14:49.635095 ss_start 7b9f5400 code_end 7b9eda08
633 20:14:49.638524 CPU 0x3
634 20:14:49.641929 smbase 7b9e5400 entry 7b9ed400
635 20:14:49.644685 ss_start 7b9f5000 code_end 7b9ed608
636 20:14:49.648227 CPU 0x4
637 20:14:49.651711 smbase 7b9e5000 entry 7b9ed000
638 20:14:49.655243 ss_start 7b9f4c00 code_end 7b9ed208
639 20:14:49.655844 CPU 0x5
640 20:14:49.658616 smbase 7b9e4c00 entry 7b9ecc00
641 20:14:49.664814 ss_start 7b9f4800 code_end 7b9ece08
642 20:14:49.665374 CPU 0x6
643 20:14:49.668082 smbase 7b9e4800 entry 7b9ec800
644 20:14:49.675252 ss_start 7b9f4400 code_end 7b9eca08
645 20:14:49.675883 CPU 0x7
646 20:14:49.678020 smbase 7b9e4400 entry 7b9ec400
647 20:14:49.681681 ss_start 7b9f4000 code_end 7b9ec608
648 20:14:49.692187 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
649 20:14:49.694725 Processing 11 relocs. Offset value of 0x7b9ee000
650 20:14:49.701481 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
651 20:14:49.708049 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
652 20:14:49.714755 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
653 20:14:49.721312 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
654 20:14:49.728304 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
655 20:14:49.731311 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
656 20:14:49.737993 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
657 20:14:49.744600 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
658 20:14:49.751541 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
659 20:14:49.757819 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
660 20:14:49.765828 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
661 20:14:49.771623 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
662 20:14:49.777991 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
663 20:14:49.785023 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
664 20:14:49.791127 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
665 20:14:49.794633 smm_module_setup_stub: stack_top = 0x7b804000
666 20:14:49.797866 smm_module_setup_stub: per cpu stack_size = 0x800
667 20:14:49.804340 smm_module_setup_stub: runtime.start32_offset = 0x4c
668 20:14:49.811274 smm_module_setup_stub: runtime.smm_size = 0x200000
669 20:14:49.814704 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
670 20:14:49.819457 Clearing SMI status registers
671 20:14:49.822730 SMI_STS: PM1
672 20:14:49.823188 PM1_STS: WAK PWRBTN
673 20:14:49.832819 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
674 20:14:49.835850 In relocation handler: CPU 0
675 20:14:49.839386 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
676 20:14:49.843059 Writing SMRR. base = 0x7b800006, mask=0xff800c00
677 20:14:49.845919 Relocation complete.
678 20:14:49.852680 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
679 20:14:49.856154 In relocation handler: CPU 7
680 20:14:49.859172 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
681 20:14:49.863158 Relocation complete.
682 20:14:49.869466 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
683 20:14:49.872737 In relocation handler: CPU 4
684 20:14:49.875814 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
685 20:14:49.882900 Writing SMRR. base = 0x7b800006, mask=0xff800c00
686 20:14:49.883503 Relocation complete.
687 20:14:49.889945 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
688 20:14:49.892622 In relocation handler: CPU 2
689 20:14:49.895765 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
690 20:14:49.902704 Writing SMRR. base = 0x7b800006, mask=0xff800c00
691 20:14:49.905809 Relocation complete.
692 20:14:49.913127 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
693 20:14:49.916126 In relocation handler: CPU 3
694 20:14:49.919197 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
695 20:14:49.922844 Writing SMRR. base = 0x7b800006, mask=0xff800c00
696 20:14:49.925787 Relocation complete.
697 20:14:49.932557 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
698 20:14:49.935601 In relocation handler: CPU 1
699 20:14:49.939423 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
700 20:14:49.945752 Writing SMRR. base = 0x7b800006, mask=0xff800c00
701 20:14:49.946590 Relocation complete.
702 20:14:49.955631 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
703 20:14:49.956184 In relocation handler: CPU 6
704 20:14:49.962567 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
705 20:14:49.966017 Writing SMRR. base = 0x7b800006, mask=0xff800c00
706 20:14:49.969296 Relocation complete.
707 20:14:49.975491 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
708 20:14:49.978858 In relocation handler: CPU 5
709 20:14:49.982401 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
710 20:14:49.985742 Relocation complete.
711 20:14:49.986302 Initializing CPU #0
712 20:14:49.989273 CPU: vendor Intel device 906a4
713 20:14:49.992428 CPU: family 06, model 9a, stepping 04
714 20:14:49.995971 Clearing out pending MCEs
715 20:14:49.999209 cpu: energy policy set to 7
716 20:14:50.002467 Turbo is available but hidden
717 20:14:50.005873 Turbo is available and visible
718 20:14:50.009113 microcode: Update skipped, already up-to-date
719 20:14:50.013098 CPU #0 initialized
720 20:14:50.013654 Initializing CPU #7
721 20:14:50.015988 Initializing CPU #3
722 20:14:50.018871 Initializing CPU #2
723 20:14:50.019334 Initializing CPU #1
724 20:14:50.022362 Initializing CPU #6
725 20:14:50.025645 Initializing CPU #4
726 20:14:50.026201 CPU: vendor Intel device 906a4
727 20:14:50.032550 CPU: family 06, model 9a, stepping 04
728 20:14:50.036591 CPU: vendor Intel device 906a4
729 20:14:50.039519 CPU: family 06, model 9a, stepping 04
730 20:14:50.042558 CPU: vendor Intel device 906a4
731 20:14:50.045606 CPU: family 06, model 9a, stepping 04
732 20:14:50.049056 CPU: vendor Intel device 906a4
733 20:14:50.052641 CPU: family 06, model 9a, stepping 04
734 20:14:50.055649 CPU: vendor Intel device 906a4
735 20:14:50.059505 CPU: family 06, model 9a, stepping 04
736 20:14:50.062435 Clearing out pending MCEs
737 20:14:50.062991 Clearing out pending MCEs
738 20:14:50.066086 Clearing out pending MCEs
739 20:14:50.069505 Clearing out pending MCEs
740 20:14:50.072425 cpu: energy policy set to 7
741 20:14:50.076202 cpu: energy policy set to 7
742 20:14:50.078770 cpu: energy policy set to 7
743 20:14:50.082248 microcode: Update skipped, already up-to-date
744 20:14:50.085700 CPU #1 initialized
745 20:14:50.088965 microcode: Update skipped, already up-to-date
746 20:14:50.092484 CPU #3 initialized
747 20:14:50.093064 cpu: energy policy set to 7
748 20:14:50.098938 microcode: Update skipped, already up-to-date
749 20:14:50.099550 CPU #2 initialized
750 20:14:50.105768 microcode: Update skipped, already up-to-date
751 20:14:50.106324 CPU #4 initialized
752 20:14:50.109014 Clearing out pending MCEs
753 20:14:50.112310 CPU: vendor Intel device 906a4
754 20:14:50.115644 CPU: family 06, model 9a, stepping 04
755 20:14:50.118710 Initializing CPU #5
756 20:14:50.122086 Clearing out pending MCEs
757 20:14:50.125548 CPU: vendor Intel device 906a4
758 20:14:50.129293 CPU: family 06, model 9a, stepping 04
759 20:14:50.132176 cpu: energy policy set to 7
760 20:14:50.132639 cpu: energy policy set to 7
761 20:14:50.138716 microcode: Update skipped, already up-to-date
762 20:14:50.139508 CPU #6 initialized
763 20:14:50.145421 microcode: Update skipped, already up-to-date
764 20:14:50.145969 CPU #7 initialized
765 20:14:50.148778 Clearing out pending MCEs
766 20:14:50.152011 cpu: energy policy set to 7
767 20:14:50.155179 microcode: Update skipped, already up-to-date
768 20:14:50.158712 CPU #5 initialized
769 20:14:50.162019 bsp_do_flight_plan done after 693 msecs.
770 20:14:50.165256 CPU: frequency set to 4400 MHz
771 20:14:50.168711 Enabling SMIs.
772 20:14:50.175422 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
773 20:14:50.190271 Probing TPM I2C: done! DID_VID 0x00281ae0
774 20:14:50.193537 Locality already claimed
775 20:14:50.196633 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
776 20:14:50.208232 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
777 20:14:50.211611 Enabling GPIO PM b/c CR50 has long IRQ pulse support
778 20:14:50.217976 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
779 20:14:50.224961 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
780 20:14:50.227913 Found a VBT of 9216 bytes after decompression
781 20:14:50.231434 PCI 1.0, PIN A, using IRQ #16
782 20:14:50.234805 PCI 2.0, PIN A, using IRQ #17
783 20:14:50.238495 PCI 4.0, PIN A, using IRQ #18
784 20:14:50.241378 PCI 5.0, PIN A, using IRQ #16
785 20:14:50.244476 PCI 6.0, PIN A, using IRQ #16
786 20:14:50.247719 PCI 6.2, PIN C, using IRQ #18
787 20:14:50.251183 PCI 7.0, PIN A, using IRQ #19
788 20:14:50.255105 PCI 7.1, PIN B, using IRQ #20
789 20:14:50.258395 PCI 7.2, PIN C, using IRQ #21
790 20:14:50.261409 PCI 7.3, PIN D, using IRQ #22
791 20:14:50.264656 PCI 8.0, PIN A, using IRQ #23
792 20:14:50.268096 PCI D.0, PIN A, using IRQ #17
793 20:14:50.271800 PCI D.1, PIN B, using IRQ #19
794 20:14:50.272261 PCI 10.0, PIN A, using IRQ #24
795 20:14:50.275256 PCI 10.1, PIN B, using IRQ #25
796 20:14:50.278118 PCI 10.6, PIN C, using IRQ #20
797 20:14:50.281445 PCI 10.7, PIN D, using IRQ #21
798 20:14:50.285265 PCI 11.0, PIN A, using IRQ #26
799 20:14:50.288298 PCI 11.1, PIN B, using IRQ #27
800 20:14:50.291514 PCI 11.2, PIN C, using IRQ #28
801 20:14:50.294660 PCI 11.3, PIN D, using IRQ #29
802 20:14:50.297904 PCI 12.0, PIN A, using IRQ #30
803 20:14:50.301661 PCI 12.6, PIN B, using IRQ #31
804 20:14:50.304431 PCI 12.7, PIN C, using IRQ #22
805 20:14:50.307855 PCI 13.0, PIN A, using IRQ #32
806 20:14:50.311295 PCI 13.1, PIN B, using IRQ #33
807 20:14:50.314878 PCI 13.2, PIN C, using IRQ #34
808 20:14:50.318430 PCI 13.3, PIN D, using IRQ #35
809 20:14:50.321407 PCI 14.0, PIN B, using IRQ #23
810 20:14:50.321886 PCI 14.1, PIN A, using IRQ #36
811 20:14:50.324485 PCI 14.3, PIN C, using IRQ #17
812 20:14:50.327921 PCI 15.0, PIN A, using IRQ #37
813 20:14:50.331130 PCI 15.1, PIN B, using IRQ #38
814 20:14:50.334533 PCI 15.2, PIN C, using IRQ #39
815 20:14:50.337957 PCI 15.3, PIN D, using IRQ #40
816 20:14:50.341079 PCI 16.0, PIN A, using IRQ #18
817 20:14:50.344808 PCI 16.1, PIN B, using IRQ #19
818 20:14:50.347790 PCI 16.2, PIN C, using IRQ #20
819 20:14:50.351230 PCI 16.3, PIN D, using IRQ #21
820 20:14:50.354914 PCI 16.4, PIN A, using IRQ #18
821 20:14:50.358275 PCI 16.5, PIN B, using IRQ #19
822 20:14:50.361706 PCI 17.0, PIN A, using IRQ #22
823 20:14:50.364950 PCI 19.0, PIN A, using IRQ #41
824 20:14:50.368252 PCI 19.1, PIN B, using IRQ #42
825 20:14:50.371119 PCI 19.2, PIN C, using IRQ #43
826 20:14:50.371721 PCI 1C.0, PIN A, using IRQ #16
827 20:14:50.374685 PCI 1C.1, PIN B, using IRQ #17
828 20:14:50.378426 PCI 1C.2, PIN C, using IRQ #18
829 20:14:50.381281 PCI 1C.3, PIN D, using IRQ #19
830 20:14:50.384298 PCI 1C.4, PIN A, using IRQ #16
831 20:14:50.387851 PCI 1C.5, PIN B, using IRQ #17
832 20:14:50.391610 PCI 1C.6, PIN C, using IRQ #18
833 20:14:50.394791 PCI 1C.7, PIN D, using IRQ #19
834 20:14:50.398199 PCI 1D.0, PIN A, using IRQ #16
835 20:14:50.401603 PCI 1D.1, PIN B, using IRQ #17
836 20:14:50.404907 PCI 1D.2, PIN C, using IRQ #18
837 20:14:50.407838 PCI 1D.3, PIN D, using IRQ #19
838 20:14:50.411045 PCI 1E.0, PIN A, using IRQ #23
839 20:14:50.414758 PCI 1E.1, PIN B, using IRQ #20
840 20:14:50.417882 PCI 1E.2, PIN C, using IRQ #44
841 20:14:50.421269 PCI 1E.3, PIN D, using IRQ #45
842 20:14:50.421879 PCI 1F.3, PIN B, using IRQ #22
843 20:14:50.424211 PCI 1F.4, PIN C, using IRQ #23
844 20:14:50.427607 PCI 1F.6, PIN D, using IRQ #20
845 20:14:50.431095 PCI 1F.7, PIN A, using IRQ #21
846 20:14:50.437951 IRQ: Using dynamically assigned PCI IO-APIC IRQs
847 20:14:50.444498 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
848 20:14:50.627516 FSPS returned 0
849 20:14:50.630932 Executing Phase 1 of FspMultiPhaseSiInit
850 20:14:50.640531 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
851 20:14:50.644419 port C0 DISC req: usage 1 usb3 1 usb2 1
852 20:14:50.647447 Raw Buffer output 0 00000111
853 20:14:50.650425 Raw Buffer output 1 00000000
854 20:14:50.654507 pmc_send_ipc_cmd succeeded
855 20:14:50.661324 port C1 DISC req: usage 1 usb3 3 usb2 3
856 20:14:50.661885 Raw Buffer output 0 00000331
857 20:14:50.664624 Raw Buffer output 1 00000000
858 20:14:50.668630 pmc_send_ipc_cmd succeeded
859 20:14:50.672783 Detected 6 core, 8 thread CPU.
860 20:14:50.675548 Detected 6 core, 8 thread CPU.
861 20:14:50.680743 Detected 6 core, 8 thread CPU.
862 20:14:50.684057 Detected 6 core, 8 thread CPU.
863 20:14:50.687571 Detected 6 core, 8 thread CPU.
864 20:14:50.691059 Detected 6 core, 8 thread CPU.
865 20:14:50.694300 Detected 6 core, 8 thread CPU.
866 20:14:50.697506 Detected 6 core, 8 thread CPU.
867 20:14:50.701215 Detected 6 core, 8 thread CPU.
868 20:14:50.704508 Detected 6 core, 8 thread CPU.
869 20:14:50.707482 Detected 6 core, 8 thread CPU.
870 20:14:50.711011 Detected 6 core, 8 thread CPU.
871 20:14:50.714860 Detected 6 core, 8 thread CPU.
872 20:14:50.718093 Detected 6 core, 8 thread CPU.
873 20:14:50.720889 Detected 6 core, 8 thread CPU.
874 20:14:50.724255 Detected 6 core, 8 thread CPU.
875 20:14:50.728062 Detected 6 core, 8 thread CPU.
876 20:14:50.730743 Detected 6 core, 8 thread CPU.
877 20:14:50.734707 Detected 6 core, 8 thread CPU.
878 20:14:50.735289 Detected 6 core, 8 thread CPU.
879 20:14:50.737763 Detected 6 core, 8 thread CPU.
880 20:14:50.741342 Detected 6 core, 8 thread CPU.
881 20:14:51.033019 Detected 6 core, 8 thread CPU.
882 20:14:51.036724 Detected 6 core, 8 thread CPU.
883 20:14:51.039963 Detected 6 core, 8 thread CPU.
884 20:14:51.043121 Detected 6 core, 8 thread CPU.
885 20:14:51.046733 Detected 6 core, 8 thread CPU.
886 20:14:51.049559 Detected 6 core, 8 thread CPU.
887 20:14:51.052926 Detected 6 core, 8 thread CPU.
888 20:14:51.057059 Detected 6 core, 8 thread CPU.
889 20:14:51.059569 Detected 6 core, 8 thread CPU.
890 20:14:51.063308 Detected 6 core, 8 thread CPU.
891 20:14:51.066610 Detected 6 core, 8 thread CPU.
892 20:14:51.069932 Detected 6 core, 8 thread CPU.
893 20:14:51.073145 Detected 6 core, 8 thread CPU.
894 20:14:51.076500 Detected 6 core, 8 thread CPU.
895 20:14:51.079560 Detected 6 core, 8 thread CPU.
896 20:14:51.082911 Detected 6 core, 8 thread CPU.
897 20:14:51.086777 Detected 6 core, 8 thread CPU.
898 20:14:51.089640 Detected 6 core, 8 thread CPU.
899 20:14:51.093159 Detected 6 core, 8 thread CPU.
900 20:14:51.096548 Detected 6 core, 8 thread CPU.
901 20:14:51.099977 Display FSP Version Info HOB
902 20:14:51.103538 Reference Code - CPU = c.0.65.70
903 20:14:51.104095 uCode Version = 0.0.4.23
904 20:14:51.106314 TXT ACM version = ff.ff.ff.ffff
905 20:14:51.109669 Reference Code - ME = c.0.65.70
906 20:14:51.112841 MEBx version = 0.0.0.0
907 20:14:51.116705 ME Firmware Version = Lite SKU
908 20:14:51.119527 Reference Code - PCH = c.0.65.70
909 20:14:51.122724 PCH-CRID Status = Disabled
910 20:14:51.125964 PCH-CRID Original Value = ff.ff.ff.ffff
911 20:14:51.129818 PCH-CRID New Value = ff.ff.ff.ffff
912 20:14:51.132962 OPROM - RST - RAID = ff.ff.ff.ffff
913 20:14:51.135756 PCH Hsio Version = 4.0.0.0
914 20:14:51.139681 Reference Code - SA - System Agent = c.0.65.70
915 20:14:51.142575 Reference Code - MRC = 0.0.3.80
916 20:14:51.146000 SA - PCIe Version = c.0.65.70
917 20:14:51.149154 SA-CRID Status = Disabled
918 20:14:51.152838 SA-CRID Original Value = 0.0.0.4
919 20:14:51.156069 SA-CRID New Value = 0.0.0.4
920 20:14:51.159986 OPROM - VBIOS = ff.ff.ff.ffff
921 20:14:51.162468 IO Manageability Engine FW Version = 24.0.4.0
922 20:14:51.165983 PHY Build Version = 0.0.0.2016
923 20:14:51.169343 Thunderbolt(TM) FW Version = 0.0.0.0
924 20:14:51.175894 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
925 20:14:51.182401 BS: BS_DEV_INIT_CHIPS run times (exec / console): 494 / 507 ms
926 20:14:51.185777 Enumerating buses...
927 20:14:51.189743 Show all devs... Before device enumeration.
928 20:14:51.192272 Root Device: enabled 1
929 20:14:51.195598 CPU_CLUSTER: 0: enabled 1
930 20:14:51.196190 DOMAIN: 0000: enabled 1
931 20:14:51.199021 GPIO: 0: enabled 1
932 20:14:51.202523 PCI: 00:00.0: enabled 1
933 20:14:51.203103 PCI: 00:01.0: enabled 0
934 20:14:51.205707 PCI: 00:01.1: enabled 0
935 20:14:51.208906 PCI: 00:02.0: enabled 1
936 20:14:51.212574 PCI: 00:04.0: enabled 1
937 20:14:51.213150 PCI: 00:05.0: enabled 0
938 20:14:51.216090 PCI: 00:06.0: enabled 1
939 20:14:51.219255 PCI: 00:06.2: enabled 0
940 20:14:51.219884 PCI: 00:07.0: enabled 0
941 20:14:51.222507 PCI: 00:07.1: enabled 0
942 20:14:51.225963 PCI: 00:07.2: enabled 0
943 20:14:51.228717 PCI: 00:07.3: enabled 0
944 20:14:51.229179 PCI: 00:08.0: enabled 0
945 20:14:51.233127 PCI: 00:09.0: enabled 0
946 20:14:51.235467 PCI: 00:0a.0: enabled 1
947 20:14:51.239143 PCI: 00:0d.0: enabled 1
948 20:14:51.239761 PCI: 00:0d.1: enabled 0
949 20:14:51.242437 PCI: 00:0d.2: enabled 0
950 20:14:51.245910 PCI: 00:0d.3: enabled 0
951 20:14:51.249099 PCI: 00:0e.0: enabled 0
952 20:14:51.249705 PCI: 00:10.0: enabled 0
953 20:14:51.252053 PCI: 00:10.1: enabled 0
954 20:14:51.255596 PCI: 00:10.6: enabled 0
955 20:14:51.256161 PCI: 00:10.7: enabled 0
956 20:14:51.259173 PCI: 00:12.0: enabled 0
957 20:14:51.262512 PCI: 00:12.6: enabled 0
958 20:14:51.265707 PCI: 00:12.7: enabled 0
959 20:14:51.266318 PCI: 00:13.0: enabled 0
960 20:14:51.269081 PCI: 00:14.0: enabled 1
961 20:14:51.272440 PCI: 00:14.1: enabled 0
962 20:14:51.275987 PCI: 00:14.2: enabled 1
963 20:14:51.276558 PCI: 00:14.3: enabled 1
964 20:14:51.278817 PCI: 00:15.0: enabled 1
965 20:14:51.282448 PCI: 00:15.1: enabled 1
966 20:14:51.285403 PCI: 00:15.2: enabled 0
967 20:14:51.285970 PCI: 00:15.3: enabled 1
968 20:14:51.288854 PCI: 00:16.0: enabled 1
969 20:14:51.292326 PCI: 00:16.1: enabled 0
970 20:14:51.295342 PCI: 00:16.2: enabled 0
971 20:14:51.295850 PCI: 00:16.3: enabled 0
972 20:14:51.298948 PCI: 00:16.4: enabled 0
973 20:14:51.301916 PCI: 00:16.5: enabled 0
974 20:14:51.302511 PCI: 00:17.0: enabled 1
975 20:14:51.305542 PCI: 00:19.0: enabled 0
976 20:14:51.308596 PCI: 00:19.1: enabled 1
977 20:14:51.312033 PCI: 00:19.2: enabled 0
978 20:14:51.312496 PCI: 00:1a.0: enabled 0
979 20:14:51.316040 PCI: 00:1c.0: enabled 0
980 20:14:51.318604 PCI: 00:1c.1: enabled 0
981 20:14:51.322298 PCI: 00:1c.2: enabled 0
982 20:14:51.322860 PCI: 00:1c.3: enabled 0
983 20:14:51.325303 PCI: 00:1c.4: enabled 0
984 20:14:51.328394 PCI: 00:1c.5: enabled 0
985 20:14:51.331855 PCI: 00:1c.6: enabled 0
986 20:14:51.332339 PCI: 00:1c.7: enabled 0
987 20:14:51.335009 PCI: 00:1d.0: enabled 0
988 20:14:51.338905 PCI: 00:1d.1: enabled 0
989 20:14:51.339522 PCI: 00:1d.2: enabled 0
990 20:14:51.341989 PCI: 00:1d.3: enabled 0
991 20:14:51.345877 PCI: 00:1e.0: enabled 1
992 20:14:51.348640 PCI: 00:1e.1: enabled 0
993 20:14:51.349359 PCI: 00:1e.2: enabled 0
994 20:14:51.351829 PCI: 00:1e.3: enabled 1
995 20:14:51.355546 PCI: 00:1f.0: enabled 1
996 20:14:51.358768 PCI: 00:1f.1: enabled 0
997 20:14:51.359247 PCI: 00:1f.2: enabled 1
998 20:14:51.362342 PCI: 00:1f.3: enabled 1
999 20:14:51.365517 PCI: 00:1f.4: enabled 0
1000 20:14:51.368612 PCI: 00:1f.5: enabled 1
1001 20:14:51.369194 PCI: 00:1f.6: enabled 0
1002 20:14:51.371977 PCI: 00:1f.7: enabled 0
1003 20:14:51.375620 GENERIC: 0.0: enabled 1
1004 20:14:51.378914 GENERIC: 0.0: enabled 1
1005 20:14:51.379530 GENERIC: 1.0: enabled 1
1006 20:14:51.382476 GENERIC: 0.0: enabled 1
1007 20:14:51.385526 GENERIC: 1.0: enabled 1
1008 20:14:51.386117 USB0 port 0: enabled 1
1009 20:14:51.388970 USB0 port 0: enabled 1
1010 20:14:51.391943 GENERIC: 0.0: enabled 1
1011 20:14:51.395307 I2C: 00:1a: enabled 1
1012 20:14:51.395975 I2C: 00:31: enabled 1
1013 20:14:51.398890 I2C: 00:32: enabled 1
1014 20:14:51.401599 I2C: 00:50: enabled 1
1015 20:14:51.402073 I2C: 00:10: enabled 1
1016 20:14:51.405019 I2C: 00:15: enabled 1
1017 20:14:51.408664 I2C: 00:2c: enabled 1
1018 20:14:51.409238 GENERIC: 0.0: enabled 1
1019 20:14:51.411886 SPI: 00: enabled 1
1020 20:14:51.415099 PNP: 0c09.0: enabled 1
1021 20:14:51.415715 GENERIC: 0.0: enabled 1
1022 20:14:51.418622 USB3 port 0: enabled 1
1023 20:14:51.421555 USB3 port 1: enabled 0
1024 20:14:51.422034 USB3 port 2: enabled 1
1025 20:14:51.424846 USB3 port 3: enabled 0
1026 20:14:51.428337 USB2 port 0: enabled 1
1027 20:14:51.431919 USB2 port 1: enabled 0
1028 20:14:51.432550 USB2 port 2: enabled 1
1029 20:14:51.434774 USB2 port 3: enabled 0
1030 20:14:51.438714 USB2 port 4: enabled 0
1031 20:14:51.439283 USB2 port 5: enabled 1
1032 20:14:51.442093 USB2 port 6: enabled 0
1033 20:14:51.445087 USB2 port 7: enabled 0
1034 20:14:51.448307 USB2 port 8: enabled 1
1035 20:14:51.448769 USB2 port 9: enabled 1
1036 20:14:51.451649 USB3 port 0: enabled 1
1037 20:14:51.455245 USB3 port 1: enabled 0
1038 20:14:51.455869 USB3 port 2: enabled 0
1039 20:14:51.458316 USB3 port 3: enabled 0
1040 20:14:51.461677 GENERIC: 0.0: enabled 1
1041 20:14:51.465108 GENERIC: 1.0: enabled 1
1042 20:14:51.465669 APIC: 00: enabled 1
1043 20:14:51.468618 APIC: 14: enabled 1
1044 20:14:51.469311 APIC: 16: enabled 1
1045 20:14:51.471922 APIC: 10: enabled 1
1046 20:14:51.475043 APIC: 12: enabled 1
1047 20:14:51.475654 APIC: 09: enabled 1
1048 20:14:51.478918 APIC: 08: enabled 1
1049 20:14:51.479521 APIC: 01: enabled 1
1050 20:14:51.481497 Compare with tree...
1051 20:14:51.484812 Root Device: enabled 1
1052 20:14:51.488368 CPU_CLUSTER: 0: enabled 1
1053 20:14:51.488928 APIC: 00: enabled 1
1054 20:14:51.492052 APIC: 14: enabled 1
1055 20:14:51.495052 APIC: 16: enabled 1
1056 20:14:51.495659 APIC: 10: enabled 1
1057 20:14:51.498365 APIC: 12: enabled 1
1058 20:14:51.501515 APIC: 09: enabled 1
1059 20:14:51.502077 APIC: 08: enabled 1
1060 20:14:51.505272 APIC: 01: enabled 1
1061 20:14:51.508143 DOMAIN: 0000: enabled 1
1062 20:14:51.508701 GPIO: 0: enabled 1
1063 20:14:51.511593 PCI: 00:00.0: enabled 1
1064 20:14:51.515190 PCI: 00:01.0: enabled 0
1065 20:14:51.518591 PCI: 00:01.1: enabled 0
1066 20:14:51.521699 PCI: 00:02.0: enabled 1
1067 20:14:51.522260 PCI: 00:04.0: enabled 1
1068 20:14:51.524640 GENERIC: 0.0: enabled 1
1069 20:14:51.527972 PCI: 00:05.0: enabled 0
1070 20:14:51.531631 PCI: 00:06.0: enabled 1
1071 20:14:51.535176 PCI: 00:06.2: enabled 0
1072 20:14:51.535771 PCI: 00:08.0: enabled 0
1073 20:14:51.538236 PCI: 00:09.0: enabled 0
1074 20:14:51.541465 PCI: 00:0a.0: enabled 1
1075 20:14:51.545286 PCI: 00:0d.0: enabled 1
1076 20:14:51.547938 USB0 port 0: enabled 1
1077 20:14:51.548397 USB3 port 0: enabled 1
1078 20:14:51.550969 USB3 port 1: enabled 0
1079 20:14:51.554421 USB3 port 2: enabled 1
1080 20:14:51.557941 USB3 port 3: enabled 0
1081 20:14:51.561283 PCI: 00:0d.1: enabled 0
1082 20:14:51.561846 PCI: 00:0d.2: enabled 0
1083 20:14:51.564829 PCI: 00:0d.3: enabled 0
1084 20:14:51.568040 PCI: 00:0e.0: enabled 0
1085 20:14:51.571344 PCI: 00:10.0: enabled 0
1086 20:14:51.574970 PCI: 00:10.1: enabled 0
1087 20:14:51.575642 PCI: 00:10.6: enabled 0
1088 20:14:51.577985 PCI: 00:10.7: enabled 0
1089 20:14:51.581507 PCI: 00:12.0: enabled 0
1090 20:14:51.585475 PCI: 00:12.6: enabled 0
1091 20:14:51.588335 PCI: 00:12.7: enabled 0
1092 20:14:51.588905 PCI: 00:13.0: enabled 0
1093 20:14:51.591243 PCI: 00:14.0: enabled 1
1094 20:14:51.594757 USB0 port 0: enabled 1
1095 20:14:51.597912 USB2 port 0: enabled 1
1096 20:14:51.601494 USB2 port 1: enabled 0
1097 20:14:51.602056 USB2 port 2: enabled 1
1098 20:14:51.604338 USB2 port 3: enabled 0
1099 20:14:51.607962 USB2 port 4: enabled 0
1100 20:14:51.611154 USB2 port 5: enabled 1
1101 20:14:51.614607 USB2 port 6: enabled 0
1102 20:14:51.617933 USB2 port 7: enabled 0
1103 20:14:51.618491 USB2 port 8: enabled 1
1104 20:14:51.621359 USB2 port 9: enabled 1
1105 20:14:51.624342 USB3 port 0: enabled 1
1106 20:14:51.628192 USB3 port 1: enabled 0
1107 20:14:51.631042 USB3 port 2: enabled 0
1108 20:14:51.634737 USB3 port 3: enabled 0
1109 20:14:51.635304 PCI: 00:14.1: enabled 0
1110 20:14:51.638014 PCI: 00:14.2: enabled 1
1111 20:14:51.641245 PCI: 00:14.3: enabled 1
1112 20:14:51.644206 GENERIC: 0.0: enabled 1
1113 20:14:51.648094 PCI: 00:15.0: enabled 1
1114 20:14:51.648544 I2C: 00:1a: enabled 1
1115 20:14:51.650640 I2C: 00:31: enabled 1
1116 20:14:51.654365 I2C: 00:32: enabled 1
1117 20:14:51.657900 PCI: 00:15.1: enabled 1
1118 20:14:51.658452 I2C: 00:50: enabled 1
1119 20:14:51.661144 PCI: 00:15.2: enabled 0
1120 20:14:51.664519 PCI: 00:15.3: enabled 1
1121 20:14:51.667885 I2C: 00:10: enabled 1
1122 20:14:51.671077 PCI: 00:16.0: enabled 1
1123 20:14:51.671683 PCI: 00:16.1: enabled 0
1124 20:14:51.674171 PCI: 00:16.2: enabled 0
1125 20:14:51.677583 PCI: 00:16.3: enabled 0
1126 20:14:51.680774 PCI: 00:16.4: enabled 0
1127 20:14:51.681233 PCI: 00:16.5: enabled 0
1128 20:14:51.684496 PCI: 00:17.0: enabled 1
1129 20:14:51.687418 PCI: 00:19.0: enabled 0
1130 20:14:51.691471 PCI: 00:19.1: enabled 1
1131 20:14:51.694435 I2C: 00:15: enabled 1
1132 20:14:51.694891 I2C: 00:2c: enabled 1
1133 20:14:51.697456 PCI: 00:19.2: enabled 0
1134 20:14:51.701272 PCI: 00:1a.0: enabled 0
1135 20:14:51.704776 PCI: 00:1e.0: enabled 1
1136 20:14:51.707398 PCI: 00:1e.1: enabled 0
1137 20:14:51.707864 PCI: 00:1e.2: enabled 0
1138 20:14:51.711053 PCI: 00:1e.3: enabled 1
1139 20:14:51.714631 SPI: 00: enabled 1
1140 20:14:51.717843 PCI: 00:1f.0: enabled 1
1141 20:14:51.718407 PNP: 0c09.0: enabled 1
1142 20:14:51.721197 PCI: 00:1f.1: enabled 0
1143 20:14:51.724297 PCI: 00:1f.2: enabled 1
1144 20:14:51.728095 GENERIC: 0.0: enabled 1
1145 20:14:51.731185 GENERIC: 0.0: enabled 1
1146 20:14:51.731697 GENERIC: 1.0: enabled 1
1147 20:14:51.734624 PCI: 00:1f.3: enabled 1
1148 20:14:51.737871 PCI: 00:1f.4: enabled 0
1149 20:14:51.741114 PCI: 00:1f.5: enabled 1
1150 20:14:51.744546 PCI: 00:1f.6: enabled 0
1151 20:14:51.745112 PCI: 00:1f.7: enabled 0
1152 20:14:51.747828 Root Device scanning...
1153 20:14:51.751415 scan_static_bus for Root Device
1154 20:14:51.754377 CPU_CLUSTER: 0 enabled
1155 20:14:51.754830 DOMAIN: 0000 enabled
1156 20:14:51.757699 DOMAIN: 0000 scanning...
1157 20:14:51.761214 PCI: pci_scan_bus for bus 00
1158 20:14:51.764371 PCI: 00:00.0 [8086/0000] ops
1159 20:14:51.768045 PCI: 00:00.0 [8086/4609] enabled
1160 20:14:51.771291 PCI: 00:02.0 [8086/0000] bus ops
1161 20:14:51.774422 PCI: 00:02.0 [8086/46b3] enabled
1162 20:14:51.777675 PCI: 00:04.0 [8086/0000] bus ops
1163 20:14:51.781019 PCI: 00:04.0 [8086/461d] enabled
1164 20:14:51.784451 PCI: 00:06.0 [8086/0000] bus ops
1165 20:14:51.787319 PCI: 00:06.0 [8086/464d] enabled
1166 20:14:51.791147 PCI: 00:08.0 [8086/464f] disabled
1167 20:14:51.794415 PCI: 00:0a.0 [8086/467d] enabled
1168 20:14:51.797838 PCI: 00:0d.0 [8086/0000] bus ops
1169 20:14:51.801021 PCI: 00:0d.0 [8086/461e] enabled
1170 20:14:51.804209 PCI: 00:14.0 [8086/0000] bus ops
1171 20:14:51.807921 PCI: 00:14.0 [8086/51ed] enabled
1172 20:14:51.811240 PCI: 00:14.2 [8086/51ef] enabled
1173 20:14:51.814417 PCI: 00:14.3 [8086/0000] bus ops
1174 20:14:51.817730 PCI: 00:14.3 [8086/51f0] enabled
1175 20:14:51.821347 PCI: 00:15.0 [8086/0000] bus ops
1176 20:14:51.824782 PCI: 00:15.0 [8086/51e8] enabled
1177 20:14:51.828253 PCI: 00:15.1 [8086/0000] bus ops
1178 20:14:51.831088 PCI: 00:15.1 [8086/51e9] enabled
1179 20:14:51.834219 PCI: 00:15.2 [8086/0000] bus ops
1180 20:14:51.837584 PCI: 00:15.2 [8086/51ea] disabled
1181 20:14:51.841101 PCI: 00:15.3 [8086/0000] bus ops
1182 20:14:51.844613 PCI: 00:15.3 [8086/51eb] enabled
1183 20:14:51.848065 PCI: 00:16.0 [8086/0000] ops
1184 20:14:51.851396 PCI: 00:16.0 [8086/51e0] enabled
1185 20:14:51.858017 PCI: Static device PCI: 00:17.0 not found, disabling it.
1186 20:14:51.860911 PCI: 00:19.0 [8086/0000] bus ops
1187 20:14:51.864530 PCI: 00:19.0 [8086/51c5] disabled
1188 20:14:51.867589 PCI: 00:19.1 [8086/0000] bus ops
1189 20:14:51.870864 PCI: 00:19.1 [8086/51c6] enabled
1190 20:14:51.874158 PCI: 00:1e.0 [8086/0000] ops
1191 20:14:51.877512 PCI: 00:1e.0 [8086/51a8] enabled
1192 20:14:51.881045 PCI: 00:1e.3 [8086/0000] bus ops
1193 20:14:51.884309 PCI: 00:1e.3 [8086/51ab] enabled
1194 20:14:51.887666 PCI: 00:1f.0 [8086/0000] bus ops
1195 20:14:51.890832 PCI: 00:1f.0 [8086/5182] enabled
1196 20:14:51.894115 RTC Init
1197 20:14:51.897538 Set power on after power failure.
1198 20:14:51.898101 Disabling Deep S3
1199 20:14:51.900718 Disabling Deep S3
1200 20:14:51.901167 Disabling Deep S4
1201 20:14:51.904085 Disabling Deep S4
1202 20:14:51.907529 Disabling Deep S5
1203 20:14:51.908075 Disabling Deep S5
1204 20:14:51.911142 PCI: 00:1f.2 [0000/0000] hidden
1205 20:14:51.914194 PCI: 00:1f.3 [8086/0000] bus ops
1206 20:14:51.917649 PCI: 00:1f.3 [8086/51c8] enabled
1207 20:14:51.920923 PCI: 00:1f.5 [8086/0000] bus ops
1208 20:14:51.924385 PCI: 00:1f.5 [8086/51a4] enabled
1209 20:14:51.928310 GPIO: 0 enabled
1210 20:14:51.930954 PCI: Leftover static devices:
1211 20:14:51.931464 PCI: 00:01.0
1212 20:14:51.931836 PCI: 00:01.1
1213 20:14:51.933956 PCI: 00:05.0
1214 20:14:51.934402 PCI: 00:06.2
1215 20:14:51.937791 PCI: 00:09.0
1216 20:14:51.938336 PCI: 00:0d.1
1217 20:14:51.938692 PCI: 00:0d.2
1218 20:14:51.940805 PCI: 00:0d.3
1219 20:14:51.941349 PCI: 00:0e.0
1220 20:14:51.943909 PCI: 00:10.0
1221 20:14:51.944392 PCI: 00:10.1
1222 20:14:51.944755 PCI: 00:10.6
1223 20:14:51.947754 PCI: 00:10.7
1224 20:14:51.948203 PCI: 00:12.0
1225 20:14:51.950857 PCI: 00:12.6
1226 20:14:51.951544 PCI: 00:12.7
1227 20:14:51.954219 PCI: 00:13.0
1228 20:14:51.954664 PCI: 00:14.1
1229 20:14:51.955015 PCI: 00:16.1
1230 20:14:51.957974 PCI: 00:16.2
1231 20:14:51.958458 PCI: 00:16.3
1232 20:14:51.960886 PCI: 00:16.4
1233 20:14:51.961332 PCI: 00:16.5
1234 20:14:51.961685 PCI: 00:17.0
1235 20:14:51.964025 PCI: 00:19.2
1236 20:14:51.964561 PCI: 00:1a.0
1237 20:14:51.967337 PCI: 00:1e.1
1238 20:14:51.967946 PCI: 00:1e.2
1239 20:14:51.968301 PCI: 00:1f.1
1240 20:14:51.971072 PCI: 00:1f.4
1241 20:14:51.971557 PCI: 00:1f.6
1242 20:14:51.974948 PCI: 00:1f.7
1243 20:14:51.978123 PCI: Check your devicetree.cb.
1244 20:14:51.978671 PCI: 00:02.0 scanning...
1245 20:14:51.980961 scan_generic_bus for PCI: 00:02.0
1246 20:14:51.987703 scan_generic_bus for PCI: 00:02.0 done
1247 20:14:51.991523 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1248 20:14:51.994020 PCI: 00:04.0 scanning...
1249 20:14:51.997740 scan_generic_bus for PCI: 00:04.0
1250 20:14:51.998314 GENERIC: 0.0 enabled
1251 20:14:52.004485 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1252 20:14:52.010840 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1253 20:14:52.011451 PCI: 00:06.0 scanning...
1254 20:14:52.017568 do_pci_scan_bridge for PCI: 00:06.0
1255 20:14:52.018121 PCI: pci_scan_bus for bus 01
1256 20:14:52.021009 PCI: 01:00.0 [15b7/5009] enabled
1257 20:14:52.024500 Enabling Common Clock Configuration
1258 20:14:52.030873 L1 Sub-State supported from root port 6
1259 20:14:52.034591 L1 Sub-State Support = 0x5
1260 20:14:52.035139 CommonModeRestoreTime = 0x6e
1261 20:14:52.041016 Power On Value = 0x5, Power On Scale = 0x2
1262 20:14:52.041578 ASPM: Enabled L1
1263 20:14:52.044043 PCIe: Max_Payload_Size adjusted to 256
1264 20:14:52.047953 PCI: 01:00.0: Enabled LTR
1265 20:14:52.051037 PCI: 01:00.0: Programmed LTR max latencies
1266 20:14:52.057835 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1267 20:14:52.061064 PCI: 00:0d.0 scanning...
1268 20:14:52.064735 scan_static_bus for PCI: 00:0d.0
1269 20:14:52.065295 USB0 port 0 enabled
1270 20:14:52.067898 USB0 port 0 scanning...
1271 20:14:52.071391 scan_static_bus for USB0 port 0
1272 20:14:52.074683 USB3 port 0 enabled
1273 20:14:52.075238 USB3 port 1 disabled
1274 20:14:52.078237 USB3 port 2 enabled
1275 20:14:52.078803 USB3 port 3 disabled
1276 20:14:52.081379 USB3 port 0 scanning...
1277 20:14:52.084369 scan_static_bus for USB3 port 0
1278 20:14:52.087880 scan_static_bus for USB3 port 0 done
1279 20:14:52.094499 scan_bus: bus USB3 port 0 finished in 6 msecs
1280 20:14:52.095062 USB3 port 2 scanning...
1281 20:14:52.097875 scan_static_bus for USB3 port 2
1282 20:14:52.101069 scan_static_bus for USB3 port 2 done
1283 20:14:52.107629 scan_bus: bus USB3 port 2 finished in 6 msecs
1284 20:14:52.111312 scan_static_bus for USB0 port 0 done
1285 20:14:52.114395 scan_bus: bus USB0 port 0 finished in 43 msecs
1286 20:14:52.120911 scan_static_bus for PCI: 00:0d.0 done
1287 20:14:52.125174 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1288 20:14:52.127850 PCI: 00:14.0 scanning...
1289 20:14:52.130778 scan_static_bus for PCI: 00:14.0
1290 20:14:52.131235 USB0 port 0 enabled
1291 20:14:52.134919 USB0 port 0 scanning...
1292 20:14:52.137681 scan_static_bus for USB0 port 0
1293 20:14:52.141046 USB2 port 0 enabled
1294 20:14:52.141608 USB2 port 1 disabled
1295 20:14:52.144204 USB2 port 2 enabled
1296 20:14:52.147292 USB2 port 3 disabled
1297 20:14:52.147784 USB2 port 4 disabled
1298 20:14:52.151127 USB2 port 5 enabled
1299 20:14:52.151658 USB2 port 6 disabled
1300 20:14:52.154152 USB2 port 7 disabled
1301 20:14:52.157914 USB2 port 8 enabled
1302 20:14:52.158370 USB2 port 9 enabled
1303 20:14:52.161056 USB3 port 0 enabled
1304 20:14:52.164297 USB3 port 1 disabled
1305 20:14:52.164865 USB3 port 2 disabled
1306 20:14:52.168107 USB3 port 3 disabled
1307 20:14:52.170895 USB2 port 0 scanning...
1308 20:14:52.174221 scan_static_bus for USB2 port 0
1309 20:14:52.177693 scan_static_bus for USB2 port 0 done
1310 20:14:52.181059 scan_bus: bus USB2 port 0 finished in 6 msecs
1311 20:14:52.184851 USB2 port 2 scanning...
1312 20:14:52.187497 scan_static_bus for USB2 port 2
1313 20:14:52.191192 scan_static_bus for USB2 port 2 done
1314 20:14:52.194753 scan_bus: bus USB2 port 2 finished in 6 msecs
1315 20:14:52.197645 USB2 port 5 scanning...
1316 20:14:52.200797 scan_static_bus for USB2 port 5
1317 20:14:52.204271 scan_static_bus for USB2 port 5 done
1318 20:14:52.211234 scan_bus: bus USB2 port 5 finished in 6 msecs
1319 20:14:52.211847 USB2 port 8 scanning...
1320 20:14:52.214002 scan_static_bus for USB2 port 8
1321 20:14:52.218128 scan_static_bus for USB2 port 8 done
1322 20:14:52.224318 scan_bus: bus USB2 port 8 finished in 6 msecs
1323 20:14:52.224874 USB2 port 9 scanning...
1324 20:14:52.227490 scan_static_bus for USB2 port 9
1325 20:14:52.234003 scan_static_bus for USB2 port 9 done
1326 20:14:52.237410 scan_bus: bus USB2 port 9 finished in 6 msecs
1327 20:14:52.240978 USB3 port 0 scanning...
1328 20:14:52.244103 scan_static_bus for USB3 port 0
1329 20:14:52.247637 scan_static_bus for USB3 port 0 done
1330 20:14:52.250916 scan_bus: bus USB3 port 0 finished in 6 msecs
1331 20:14:52.254006 scan_static_bus for USB0 port 0 done
1332 20:14:52.261254 scan_bus: bus USB0 port 0 finished in 120 msecs
1333 20:14:52.264592 scan_static_bus for PCI: 00:14.0 done
1334 20:14:52.267933 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1335 20:14:52.271016 PCI: 00:14.3 scanning...
1336 20:14:52.274234 scan_static_bus for PCI: 00:14.3
1337 20:14:52.278022 GENERIC: 0.0 enabled
1338 20:14:52.280782 scan_static_bus for PCI: 00:14.3 done
1339 20:14:52.284356 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1340 20:14:52.287318 PCI: 00:15.0 scanning...
1341 20:14:52.290994 scan_static_bus for PCI: 00:15.0
1342 20:14:52.293785 I2C: 00:1a enabled
1343 20:14:52.294348 I2C: 00:31 enabled
1344 20:14:52.297400 I2C: 00:32 enabled
1345 20:14:52.300671 scan_static_bus for PCI: 00:15.0 done
1346 20:14:52.303644 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1347 20:14:52.307315 PCI: 00:15.1 scanning...
1348 20:14:52.311127 scan_static_bus for PCI: 00:15.1
1349 20:14:52.313954 I2C: 00:50 enabled
1350 20:14:52.317636 scan_static_bus for PCI: 00:15.1 done
1351 20:14:52.320389 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1352 20:14:52.323846 PCI: 00:15.3 scanning...
1353 20:14:52.327397 scan_static_bus for PCI: 00:15.3
1354 20:14:52.330773 I2C: 00:10 enabled
1355 20:14:52.334005 scan_static_bus for PCI: 00:15.3 done
1356 20:14:52.337748 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1357 20:14:52.340489 PCI: 00:19.1 scanning...
1358 20:14:52.344134 scan_static_bus for PCI: 00:19.1
1359 20:14:52.347620 I2C: 00:15 enabled
1360 20:14:52.348178 I2C: 00:2c enabled
1361 20:14:52.350272 scan_static_bus for PCI: 00:19.1 done
1362 20:14:52.357282 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1363 20:14:52.357743 PCI: 00:1e.3 scanning...
1364 20:14:52.360890 scan_generic_bus for PCI: 00:1e.3
1365 20:14:52.364018 SPI: 00 enabled
1366 20:14:52.370950 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1367 20:14:52.374204 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1368 20:14:52.377176 PCI: 00:1f.0 scanning...
1369 20:14:52.381121 scan_static_bus for PCI: 00:1f.0
1370 20:14:52.384591 PNP: 0c09.0 enabled
1371 20:14:52.385153 PNP: 0c09.0 scanning...
1372 20:14:52.386811 scan_static_bus for PNP: 0c09.0
1373 20:14:52.390533 scan_static_bus for PNP: 0c09.0 done
1374 20:14:52.397158 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1375 20:14:52.400730 scan_static_bus for PCI: 00:1f.0 done
1376 20:14:52.403456 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1377 20:14:52.407269 PCI: 00:1f.2 scanning...
1378 20:14:52.410429 scan_static_bus for PCI: 00:1f.2
1379 20:14:52.413531 GENERIC: 0.0 enabled
1380 20:14:52.417088 GENERIC: 0.0 scanning...
1381 20:14:52.420666 scan_static_bus for GENERIC: 0.0
1382 20:14:52.421228 GENERIC: 0.0 enabled
1383 20:14:52.423848 GENERIC: 1.0 enabled
1384 20:14:52.426883 scan_static_bus for GENERIC: 0.0 done
1385 20:14:52.430227 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1386 20:14:52.437222 scan_static_bus for PCI: 00:1f.2 done
1387 20:14:52.440534 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1388 20:14:52.443931 PCI: 00:1f.3 scanning...
1389 20:14:52.446851 scan_static_bus for PCI: 00:1f.3
1390 20:14:52.450570 scan_static_bus for PCI: 00:1f.3 done
1391 20:14:52.453425 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1392 20:14:52.457006 PCI: 00:1f.5 scanning...
1393 20:14:52.460612 scan_generic_bus for PCI: 00:1f.5
1394 20:14:52.463310 scan_generic_bus for PCI: 00:1f.5 done
1395 20:14:52.470297 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1396 20:14:52.473437 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1397 20:14:52.476843 scan_static_bus for Root Device done
1398 20:14:52.483804 scan_bus: bus Root Device finished in 729 msecs
1399 20:14:52.484369 done
1400 20:14:52.490552 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1401 20:14:52.496815 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1402 20:14:52.500510 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1403 20:14:52.503138 SPI flash protection: WPSW=0 SRP0=0
1404 20:14:52.510054 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1405 20:14:52.516696 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1406 20:14:52.517159 found VGA at PCI: 00:02.0
1407 20:14:52.520543 Setting up VGA for PCI: 00:02.0
1408 20:14:52.526822 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1409 20:14:52.530169 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1410 20:14:52.533116 Allocating resources...
1411 20:14:52.536948 Reading resources...
1412 20:14:52.540274 Root Device read_resources bus 0 link: 0
1413 20:14:52.543861 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1414 20:14:52.550275 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1415 20:14:52.553336 DOMAIN: 0000 read_resources bus 0 link: 0
1416 20:14:52.560283 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1417 20:14:52.566739 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1418 20:14:52.573525 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1419 20:14:52.580091 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1420 20:14:52.583541 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1421 20:14:52.590026 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1422 20:14:52.596850 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1423 20:14:52.603385 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1424 20:14:52.610387 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1425 20:14:52.616754 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1426 20:14:52.622934 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1427 20:14:52.630150 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1428 20:14:52.637187 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1429 20:14:52.642917 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1430 20:14:52.650427 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1431 20:14:52.656621 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1432 20:14:52.659788 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1433 20:14:52.666472 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1434 20:14:52.673200 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1435 20:14:52.680064 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1436 20:14:52.686950 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1437 20:14:52.689966 PCI: 00:04.0 read_resources bus 1 link: 0
1438 20:14:52.696192 PCI: 00:04.0 read_resources bus 1 link: 0 done
1439 20:14:52.699718 PCI: 00:06.0 read_resources bus 1 link: 0
1440 20:14:52.703393 PCI: 00:06.0 read_resources bus 1 link: 0 done
1441 20:14:52.710536 PCI: 00:0d.0 read_resources bus 0 link: 0
1442 20:14:52.713703 USB0 port 0 read_resources bus 0 link: 0
1443 20:14:52.716355 USB0 port 0 read_resources bus 0 link: 0 done
1444 20:14:52.723078 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1445 20:14:52.726422 PCI: 00:14.0 read_resources bus 0 link: 0
1446 20:14:52.729362 USB0 port 0 read_resources bus 0 link: 0
1447 20:14:52.735769 USB0 port 0 read_resources bus 0 link: 0 done
1448 20:14:52.739600 PCI: 00:14.0 read_resources bus 0 link: 0 done
1449 20:14:52.743321 PCI: 00:14.3 read_resources bus 0 link: 0
1450 20:14:52.749450 PCI: 00:14.3 read_resources bus 0 link: 0 done
1451 20:14:52.752662 PCI: 00:15.0 read_resources bus 0 link: 0
1452 20:14:52.756239 PCI: 00:15.0 read_resources bus 0 link: 0 done
1453 20:14:52.762366 PCI: 00:15.1 read_resources bus 0 link: 0
1454 20:14:52.765721 PCI: 00:15.1 read_resources bus 0 link: 0 done
1455 20:14:52.769052 PCI: 00:15.3 read_resources bus 0 link: 0
1456 20:14:52.776010 PCI: 00:15.3 read_resources bus 0 link: 0 done
1457 20:14:52.779203 PCI: 00:19.1 read_resources bus 0 link: 0
1458 20:14:52.785835 PCI: 00:19.1 read_resources bus 0 link: 0 done
1459 20:14:52.789555 PCI: 00:1e.3 read_resources bus 2 link: 0
1460 20:14:52.792464 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1461 20:14:52.799433 PCI: 00:1f.0 read_resources bus 0 link: 0
1462 20:14:52.802655 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1463 20:14:52.806262 PCI: 00:1f.2 read_resources bus 0 link: 0
1464 20:14:52.812798 GENERIC: 0.0 read_resources bus 0 link: 0
1465 20:14:52.815812 GENERIC: 0.0 read_resources bus 0 link: 0 done
1466 20:14:52.819163 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1467 20:14:52.826430 DOMAIN: 0000 read_resources bus 0 link: 0 done
1468 20:14:52.829063 Root Device read_resources bus 0 link: 0 done
1469 20:14:52.832735 Done reading resources.
1470 20:14:52.838934 Show resources in subtree (Root Device)...After reading.
1471 20:14:52.842800 Root Device child on link 0 CPU_CLUSTER: 0
1472 20:14:52.846122 CPU_CLUSTER: 0 child on link 0 APIC: 00
1473 20:14:52.849630 APIC: 00
1474 20:14:52.850188 APIC: 14
1475 20:14:52.850553 APIC: 16
1476 20:14:52.852701 APIC: 10
1477 20:14:52.853158 APIC: 12
1478 20:14:52.856027 APIC: 09
1479 20:14:52.856494 APIC: 08
1480 20:14:52.856849 APIC: 01
1481 20:14:52.859905 DOMAIN: 0000 child on link 0 GPIO: 0
1482 20:14:52.869046 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1483 20:14:52.879206 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1484 20:14:52.882333 GPIO: 0
1485 20:14:52.882883 PCI: 00:00.0
1486 20:14:52.892821 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1487 20:14:52.902378 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1488 20:14:52.912482 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1489 20:14:52.918819 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1490 20:14:52.929363 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1491 20:14:52.939488 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1492 20:14:52.949462 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1493 20:14:52.959082 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1494 20:14:52.969303 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1495 20:14:52.979587 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1496 20:14:52.985804 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1497 20:14:52.995760 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1498 20:14:53.006483 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1499 20:14:53.015892 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1500 20:14:53.025642 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1501 20:14:53.031955 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1502 20:14:53.042084 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1503 20:14:53.052204 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1504 20:14:53.062478 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1505 20:14:53.072211 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1506 20:14:53.082327 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1507 20:14:53.091905 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1508 20:14:53.102251 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1509 20:14:53.109161 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1510 20:14:53.118401 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1511 20:14:53.128551 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1512 20:14:53.138360 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1513 20:14:53.148125 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1514 20:14:53.151443 PCI: 00:02.0
1515 20:14:53.161751 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1516 20:14:53.171815 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1517 20:14:53.178141 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1518 20:14:53.185048 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1519 20:14:53.194978 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1520 20:14:53.195607 GENERIC: 0.0
1521 20:14:53.201767 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1522 20:14:53.208223 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1523 20:14:53.218173 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1524 20:14:53.228254 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1525 20:14:53.228804 PCI: 01:00.0
1526 20:14:53.237799 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1527 20:14:53.248032 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1528 20:14:53.252331 PCI: 00:08.0
1529 20:14:53.252879 PCI: 00:0a.0
1530 20:14:53.261835 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1531 20:14:53.267554 PCI: 00:0d.0 child on link 0 USB0 port 0
1532 20:14:53.278547 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1533 20:14:53.280975 USB0 port 0 child on link 0 USB3 port 0
1534 20:14:53.284155 USB3 port 0
1535 20:14:53.284602 USB3 port 1
1536 20:14:53.287703 USB3 port 2
1537 20:14:53.288246 USB3 port 3
1538 20:14:53.291111 PCI: 00:14.0 child on link 0 USB0 port 0
1539 20:14:53.304720 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1540 20:14:53.307841 USB0 port 0 child on link 0 USB2 port 0
1541 20:14:53.308394 USB2 port 0
1542 20:14:53.311556 USB2 port 1
1543 20:14:53.312098 USB2 port 2
1544 20:14:53.314435 USB2 port 3
1545 20:14:53.314986 USB2 port 4
1546 20:14:53.318040 USB2 port 5
1547 20:14:53.321208 USB2 port 6
1548 20:14:53.321757 USB2 port 7
1549 20:14:53.324523 USB2 port 8
1550 20:14:53.325072 USB2 port 9
1551 20:14:53.328040 USB3 port 0
1552 20:14:53.328591 USB3 port 1
1553 20:14:53.331893 USB3 port 2
1554 20:14:53.332441 USB3 port 3
1555 20:14:53.334402 PCI: 00:14.2
1556 20:14:53.344676 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1557 20:14:53.354163 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1558 20:14:53.357307 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1559 20:14:53.367555 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1560 20:14:53.371331 GENERIC: 0.0
1561 20:14:53.374338 PCI: 00:15.0 child on link 0 I2C: 00:1a
1562 20:14:53.385085 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1563 20:14:53.385642 I2C: 00:1a
1564 20:14:53.387447 I2C: 00:31
1565 20:14:53.387907 I2C: 00:32
1566 20:14:53.394781 PCI: 00:15.1 child on link 0 I2C: 00:50
1567 20:14:53.404307 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1568 20:14:53.404867 I2C: 00:50
1569 20:14:53.408158 PCI: 00:15.2
1570 20:14:53.411156 PCI: 00:15.3 child on link 0 I2C: 00:10
1571 20:14:53.421185 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 20:14:53.421748 I2C: 00:10
1573 20:14:53.424208 PCI: 00:16.0
1574 20:14:53.434505 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1575 20:14:53.435090 PCI: 00:19.0
1576 20:14:53.440968 PCI: 00:19.1 child on link 0 I2C: 00:15
1577 20:14:53.451641 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1578 20:14:53.452199 I2C: 00:15
1579 20:14:53.454085 I2C: 00:2c
1580 20:14:53.454592 PCI: 00:1e.0
1581 20:14:53.464327 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1582 20:14:53.471120 PCI: 00:1e.3 child on link 0 SPI: 00
1583 20:14:53.480782 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1584 20:14:53.481322 SPI: 00
1585 20:14:53.484323 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1586 20:14:53.494262 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1587 20:14:53.494811 PNP: 0c09.0
1588 20:14:53.504124 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1589 20:14:53.508063 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1590 20:14:53.517917 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1591 20:14:53.527528 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1592 20:14:53.531042 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1593 20:14:53.533892 GENERIC: 0.0
1594 20:14:53.534342 GENERIC: 1.0
1595 20:14:53.537298 PCI: 00:1f.3
1596 20:14:53.547395 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1597 20:14:53.557940 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1598 20:14:53.558491 PCI: 00:1f.5
1599 20:14:53.567566 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1600 20:14:53.574353 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1601 20:14:53.580955 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1602 20:14:53.587530 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1603 20:14:53.594060 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1604 20:14:53.597603 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1605 20:14:53.600857 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1606 20:14:53.607993 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1607 20:14:53.617419 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1608 20:14:53.624525 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1609 20:14:53.630725 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1610 20:14:53.637502 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1611 20:14:53.643905 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1612 20:14:53.653919 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1613 20:14:53.660567 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1614 20:14:53.664400 DOMAIN: 0000: Resource ranges:
1615 20:14:53.668049 * Base: 1000, Size: 800, Tag: 100
1616 20:14:53.670855 * Base: 1900, Size: e700, Tag: 100
1617 20:14:53.677422 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1618 20:14:53.684142 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1619 20:14:53.691048 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1620 20:14:53.697801 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1621 20:14:53.704273 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1622 20:14:53.713936 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1623 20:14:53.720791 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1624 20:14:53.727322 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1625 20:14:53.737419 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1626 20:14:53.744128 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1627 20:14:53.750460 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1628 20:14:53.757539 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1629 20:14:53.767272 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1630 20:14:53.773775 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1631 20:14:53.780329 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1632 20:14:53.790267 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1633 20:14:53.796884 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1634 20:14:53.803461 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1635 20:14:53.813507 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1636 20:14:53.820207 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1637 20:14:53.827344 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1638 20:14:53.837213 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1639 20:14:53.843506 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1640 20:14:53.850548 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1641 20:14:53.859822 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1642 20:14:53.866861 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1643 20:14:53.873441 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1644 20:14:53.883654 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1645 20:14:53.890241 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1646 20:14:53.896799 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1647 20:14:53.906642 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1648 20:14:53.913973 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1649 20:14:53.920030 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1650 20:14:53.922869 DOMAIN: 0000: Resource ranges:
1651 20:14:53.929381 * Base: 80400000, Size: 3fc00000, Tag: 200
1652 20:14:53.933048 * Base: d0000000, Size: 28000000, Tag: 200
1653 20:14:53.936151 * Base: fa000000, Size: 1000000, Tag: 200
1654 20:14:53.939842 * Base: fb001000, Size: 17ff000, Tag: 200
1655 20:14:53.946371 * Base: fe800000, Size: 300000, Tag: 200
1656 20:14:53.949847 * Base: feb80000, Size: 80000, Tag: 200
1657 20:14:53.952917 * Base: fed00000, Size: 40000, Tag: 200
1658 20:14:53.956220 * Base: fed70000, Size: 10000, Tag: 200
1659 20:14:53.963165 * Base: fed88000, Size: 8000, Tag: 200
1660 20:14:53.966284 * Base: fed93000, Size: d000, Tag: 200
1661 20:14:53.969706 * Base: feda2000, Size: 1e000, Tag: 200
1662 20:14:53.972784 * Base: fede0000, Size: 1220000, Tag: 200
1663 20:14:53.979492 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1664 20:14:53.986572 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1665 20:14:53.993222 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1666 20:14:53.999521 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1667 20:14:54.005883 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1668 20:14:54.012617 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1669 20:14:54.019196 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1670 20:14:54.026314 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1671 20:14:54.032845 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1672 20:14:54.038944 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1673 20:14:54.045966 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1674 20:14:54.052773 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1675 20:14:54.058711 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1676 20:14:54.065573 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1677 20:14:54.072039 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1678 20:14:54.078893 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1679 20:14:54.085507 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1680 20:14:54.092003 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1681 20:14:54.098722 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1682 20:14:54.105251 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1683 20:14:54.111844 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1684 20:14:54.121679 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1685 20:14:54.125027 PCI: 00:06.0: Resource ranges:
1686 20:14:54.128592 * Base: 80400000, Size: 100000, Tag: 200
1687 20:14:54.135136 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1688 20:14:54.141520 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1689 20:14:54.151593 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1690 20:14:54.158258 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1691 20:14:54.161855 Root Device assign_resources, bus 0 link: 0
1692 20:14:54.164921 DOMAIN: 0000 assign_resources, bus 0 link: 0
1693 20:14:54.175191 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1694 20:14:54.181583 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1695 20:14:54.191430 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1696 20:14:54.198281 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1697 20:14:54.201689 PCI: 00:04.0 assign_resources, bus 1 link: 0
1698 20:14:54.208157 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1699 20:14:54.214983 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1700 20:14:54.224541 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1701 20:14:54.235088 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1702 20:14:54.238594 PCI: 00:06.0 assign_resources, bus 1 link: 0
1703 20:14:54.247803 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1704 20:14:54.254500 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1705 20:14:54.262685 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1706 20:14:54.267843 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1707 20:14:54.274301 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1708 20:14:54.281110 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1709 20:14:54.284294 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1710 20:14:54.294343 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1711 20:14:54.298097 PCI: 00:14.0 assign_resources, bus 0 link: 0
1712 20:14:54.304624 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1713 20:14:54.311244 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1714 20:14:54.317297 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1715 20:14:54.327734 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1716 20:14:54.331025 PCI: 00:14.3 assign_resources, bus 0 link: 0
1717 20:14:54.337563 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1718 20:14:54.344166 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1719 20:14:54.350414 PCI: 00:15.0 assign_resources, bus 0 link: 0
1720 20:14:54.354049 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1721 20:14:54.360472 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1722 20:14:54.367148 PCI: 00:15.1 assign_resources, bus 0 link: 0
1723 20:14:54.370573 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1724 20:14:54.380814 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1725 20:14:54.383634 PCI: 00:15.3 assign_resources, bus 0 link: 0
1726 20:14:54.390584 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1727 20:14:54.397515 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1728 20:14:54.403789 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1729 20:14:54.410815 PCI: 00:19.1 assign_resources, bus 0 link: 0
1730 20:14:54.413852 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1731 20:14:54.423514 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1732 20:14:54.426863 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1733 20:14:54.429747 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1734 20:14:54.437341 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1735 20:14:54.440076 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1736 20:14:54.446853 LPC: Trying to open IO window from 800 size 1ff
1737 20:14:54.453888 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1738 20:14:54.463229 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1739 20:14:54.470567 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1740 20:14:54.473516 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1741 20:14:54.480253 Root Device assign_resources, bus 0 link: 0 done
1742 20:14:54.483555 Done setting resources.
1743 20:14:54.490278 Show resources in subtree (Root Device)...After assigning values.
1744 20:14:54.493595 Root Device child on link 0 CPU_CLUSTER: 0
1745 20:14:54.496893 CPU_CLUSTER: 0 child on link 0 APIC: 00
1746 20:14:54.500000 APIC: 00
1747 20:14:54.500551 APIC: 14
1748 20:14:54.500954 APIC: 16
1749 20:14:54.503699 APIC: 10
1750 20:14:54.504146 APIC: 12
1751 20:14:54.506788 APIC: 09
1752 20:14:54.507334 APIC: 08
1753 20:14:54.507756 APIC: 01
1754 20:14:54.509780 DOMAIN: 0000 child on link 0 GPIO: 0
1755 20:14:54.519808 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1756 20:14:54.530419 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1757 20:14:54.533626 GPIO: 0
1758 20:14:54.534179 PCI: 00:00.0
1759 20:14:54.543747 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1760 20:14:54.553445 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1761 20:14:54.563329 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1762 20:14:54.569767 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1763 20:14:54.580598 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1764 20:14:54.590030 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1765 20:14:54.599874 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1766 20:14:54.609870 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1767 20:14:54.619881 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1768 20:14:54.629996 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1769 20:14:54.636870 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1770 20:14:54.646200 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1771 20:14:54.656238 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1772 20:14:54.665981 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1773 20:14:54.676236 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1774 20:14:54.682595 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1775 20:14:54.693139 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1776 20:14:54.702517 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1777 20:14:54.713105 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1778 20:14:54.722616 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1779 20:14:54.732712 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1780 20:14:54.742252 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1781 20:14:54.752352 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1782 20:14:54.762106 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1783 20:14:54.772159 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1784 20:14:54.779181 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1785 20:14:54.788826 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1786 20:14:54.798812 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1787 20:14:54.802340 PCI: 00:02.0
1788 20:14:54.812356 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1789 20:14:54.822289 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1790 20:14:54.832054 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1791 20:14:54.835953 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1792 20:14:54.845267 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1793 20:14:54.848080 GENERIC: 0.0
1794 20:14:54.851394 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1795 20:14:54.861663 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1796 20:14:54.875524 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1797 20:14:54.884747 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1798 20:14:54.885290 PCI: 01:00.0
1799 20:14:54.894473 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1800 20:14:54.904664 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1801 20:14:54.908608 PCI: 00:08.0
1802 20:14:54.909159 PCI: 00:0a.0
1803 20:14:54.921168 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1804 20:14:54.924312 PCI: 00:0d.0 child on link 0 USB0 port 0
1805 20:14:54.934554 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1806 20:14:54.938180 USB0 port 0 child on link 0 USB3 port 0
1807 20:14:54.941105 USB3 port 0
1808 20:14:54.941657 USB3 port 1
1809 20:14:54.944057 USB3 port 2
1810 20:14:54.947490 USB3 port 3
1811 20:14:54.951525 PCI: 00:14.0 child on link 0 USB0 port 0
1812 20:14:54.960951 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1813 20:14:54.964350 USB0 port 0 child on link 0 USB2 port 0
1814 20:14:54.968024 USB2 port 0
1815 20:14:54.968572 USB2 port 1
1816 20:14:54.971336 USB2 port 2
1817 20:14:54.971942 USB2 port 3
1818 20:14:54.974584 USB2 port 4
1819 20:14:54.977733 USB2 port 5
1820 20:14:54.978286 USB2 port 6
1821 20:14:54.980590 USB2 port 7
1822 20:14:54.981038 USB2 port 8
1823 20:14:54.984384 USB2 port 9
1824 20:14:54.984931 USB3 port 0
1825 20:14:54.987726 USB3 port 1
1826 20:14:54.988277 USB3 port 2
1827 20:14:54.991109 USB3 port 3
1828 20:14:54.991706 PCI: 00:14.2
1829 20:14:55.000796 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1830 20:14:55.010877 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1831 20:14:55.017764 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1832 20:14:55.027514 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1833 20:14:55.028081 GENERIC: 0.0
1834 20:14:55.033898 PCI: 00:15.0 child on link 0 I2C: 00:1a
1835 20:14:55.044119 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1836 20:14:55.044683 I2C: 00:1a
1837 20:14:55.047291 I2C: 00:31
1838 20:14:55.047998 I2C: 00:32
1839 20:14:55.054311 PCI: 00:15.1 child on link 0 I2C: 00:50
1840 20:14:55.064059 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1841 20:14:55.064620 I2C: 00:50
1842 20:14:55.067487 PCI: 00:15.2
1843 20:14:55.070874 PCI: 00:15.3 child on link 0 I2C: 00:10
1844 20:14:55.080816 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1845 20:14:55.084081 I2C: 00:10
1846 20:14:55.084634 PCI: 00:16.0
1847 20:14:55.093966 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1848 20:14:55.097184 PCI: 00:19.0
1849 20:14:55.100550 PCI: 00:19.1 child on link 0 I2C: 00:15
1850 20:14:55.110431 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1851 20:14:55.114379 I2C: 00:15
1852 20:14:55.114934 I2C: 00:2c
1853 20:14:55.117538 PCI: 00:1e.0
1854 20:14:55.127290 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1855 20:14:55.130620 PCI: 00:1e.3 child on link 0 SPI: 00
1856 20:14:55.140082 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1857 20:14:55.143978 SPI: 00
1858 20:14:55.147238 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1859 20:14:55.157114 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1860 20:14:55.157909 PNP: 0c09.0
1861 20:14:55.167264 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1862 20:14:55.170326 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1863 20:14:55.180538 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1864 20:14:55.190245 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1865 20:14:55.193706 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1866 20:14:55.196949 GENERIC: 0.0
1867 20:14:55.197504 GENERIC: 1.0
1868 20:14:55.200069 PCI: 00:1f.3
1869 20:14:55.210154 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1870 20:14:55.220228 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1871 20:14:55.220794 PCI: 00:1f.5
1872 20:14:55.233739 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1873 20:14:55.234299 Done allocating resources.
1874 20:14:55.240079 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2716 ms
1875 20:14:55.246668 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1876 20:14:55.250028 Configure audio over I2S with MAX98373 NAU88L25B.
1877 20:14:55.255260 Enabling BT offload
1878 20:14:55.262953 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1879 20:14:55.266428 Enabling resources...
1880 20:14:55.269406 PCI: 00:00.0 subsystem <- 8086/4609
1881 20:14:55.273310 PCI: 00:00.0 cmd <- 06
1882 20:14:55.276216 PCI: 00:02.0 subsystem <- 8086/46b3
1883 20:14:55.279514 PCI: 00:02.0 cmd <- 03
1884 20:14:55.283066 PCI: 00:04.0 subsystem <- 8086/461d
1885 20:14:55.283671 PCI: 00:04.0 cmd <- 02
1886 20:14:55.285981 PCI: 00:06.0 bridge ctrl <- 0013
1887 20:14:55.289400 PCI: 00:06.0 subsystem <- 8086/464d
1888 20:14:55.293022 PCI: 00:06.0 cmd <- 106
1889 20:14:55.295846 PCI: 00:0a.0 subsystem <- 8086/467d
1890 20:14:55.299196 PCI: 00:0a.0 cmd <- 02
1891 20:14:55.303185 PCI: 00:0d.0 subsystem <- 8086/461e
1892 20:14:55.306549 PCI: 00:0d.0 cmd <- 02
1893 20:14:55.309161 PCI: 00:14.0 subsystem <- 8086/51ed
1894 20:14:55.312787 PCI: 00:14.0 cmd <- 02
1895 20:14:55.316132 PCI: 00:14.2 subsystem <- 8086/51ef
1896 20:14:55.316691 PCI: 00:14.2 cmd <- 02
1897 20:14:55.319951 PCI: 00:14.3 subsystem <- 8086/51f0
1898 20:14:55.322567 PCI: 00:14.3 cmd <- 02
1899 20:14:55.326280 PCI: 00:15.0 subsystem <- 8086/51e8
1900 20:14:55.329571 PCI: 00:15.0 cmd <- 02
1901 20:14:55.332679 PCI: 00:15.1 subsystem <- 8086/51e9
1902 20:14:55.336353 PCI: 00:15.1 cmd <- 06
1903 20:14:55.339478 PCI: 00:15.3 subsystem <- 8086/51eb
1904 20:14:55.342686 PCI: 00:15.3 cmd <- 02
1905 20:14:55.346309 PCI: 00:16.0 subsystem <- 8086/51e0
1906 20:14:55.346869 PCI: 00:16.0 cmd <- 02
1907 20:14:55.348990 PCI: 00:19.1 subsystem <- 8086/51c6
1908 20:14:55.352591 PCI: 00:19.1 cmd <- 02
1909 20:14:55.355498 PCI: 00:1e.0 subsystem <- 8086/51a8
1910 20:14:55.358940 PCI: 00:1e.0 cmd <- 06
1911 20:14:55.363444 PCI: 00:1e.3 subsystem <- 8086/51ab
1912 20:14:55.366194 PCI: 00:1e.3 cmd <- 02
1913 20:14:55.369274 PCI: 00:1f.0 subsystem <- 8086/5182
1914 20:14:55.372735 PCI: 00:1f.0 cmd <- 407
1915 20:14:55.375926 PCI: 00:1f.3 subsystem <- 8086/51c8
1916 20:14:55.376381 PCI: 00:1f.3 cmd <- 02
1917 20:14:55.379061 PCI: 00:1f.5 subsystem <- 8086/51a4
1918 20:14:55.383050 PCI: 00:1f.5 cmd <- 406
1919 20:14:55.386144 PCI: 01:00.0 cmd <- 02
1920 20:14:55.386694 done.
1921 20:14:55.392431 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1922 20:14:55.395765 ME: Version: Unavailable
1923 20:14:55.399283 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1924 20:14:55.402656 Initializing devices...
1925 20:14:55.405904 Root Device init
1926 20:14:55.406456 mainboard: EC init
1927 20:14:55.412231 Chrome EC: Set SMI mask to 0x0000000000000000
1928 20:14:55.412783 Chrome EC: UHEPI supported
1929 20:14:55.419999 Chrome EC: clear events_b mask to 0x0000000000000000
1930 20:14:55.426500 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1931 20:14:55.433322 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1932 20:14:55.440057 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1933 20:14:55.443204 Chrome EC: Set WAKE mask to 0x0000000000000000
1934 20:14:55.450671 Root Device init finished in 41 msecs
1935 20:14:55.451207 PCI: 00:00.0 init
1936 20:14:55.453808 CPU TDP = 15 Watts
1937 20:14:55.457616 CPU PL1 = 15 Watts
1938 20:14:55.458505 CPU PL2 = 55 Watts
1939 20:14:55.460685 CPU PL4 = 123 Watts
1940 20:14:55.464210 PCI: 00:00.0 init finished in 8 msecs
1941 20:14:55.467644 PCI: 00:02.0 init
1942 20:14:55.468191 GMA: Found VBT in CBFS
1943 20:14:55.470741 GMA: Found valid VBT in CBFS
1944 20:14:55.477643 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1945 20:14:55.483972 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1946 20:14:55.487299 PCI: 00:02.0 init finished in 18 msecs
1947 20:14:55.491060 PCI: 00:06.0 init
1948 20:14:55.494082 Initializing PCH PCIe bridge.
1949 20:14:55.497512 PCI: 00:06.0 init finished in 3 msecs
1950 20:14:55.500632 PCI: 00:0a.0 init
1951 20:14:55.504244 PCI: 00:0a.0 init finished in 0 msecs
1952 20:14:55.504793 PCI: 00:14.0 init
1953 20:14:55.507528 PCI: 00:14.0 init finished in 0 msecs
1954 20:14:55.511208 PCI: 00:14.2 init
1955 20:14:55.514392 PCI: 00:14.2 init finished in 0 msecs
1956 20:14:55.518365 PCI: 00:15.0 init
1957 20:14:55.521048 I2C bus 0 version 0x3230302a
1958 20:14:55.524082 DW I2C bus 0 at 0x80655000 (400 KHz)
1959 20:14:55.527945 PCI: 00:15.0 init finished in 6 msecs
1960 20:14:55.528497 PCI: 00:15.1 init
1961 20:14:55.530633 I2C bus 1 version 0x3230302a
1962 20:14:55.534113 DW I2C bus 1 at 0x80656000 (400 KHz)
1963 20:14:55.537639 PCI: 00:15.1 init finished in 6 msecs
1964 20:14:55.540508 PCI: 00:15.3 init
1965 20:14:55.544216 I2C bus 3 version 0x3230302a
1966 20:14:55.547577 DW I2C bus 3 at 0x80657000 (400 KHz)
1967 20:14:55.550629 PCI: 00:15.3 init finished in 6 msecs
1968 20:14:55.553871 PCI: 00:16.0 init
1969 20:14:55.557204 PCI: 00:16.0 init finished in 0 msecs
1970 20:14:55.557669 PCI: 00:19.1 init
1971 20:14:55.560350 I2C bus 5 version 0x3230302a
1972 20:14:55.563872 DW I2C bus 5 at 0x80659000 (400 KHz)
1973 20:14:55.570424 PCI: 00:19.1 init finished in 6 msecs
1974 20:14:55.570857 PCI: 00:1f.0 init
1975 20:14:55.573638 IOAPIC: Initializing IOAPIC at 0xfec00000
1976 20:14:55.577196 IOAPIC: ID = 0x02
1977 20:14:55.580763 IOAPIC: Dumping registers
1978 20:14:55.584146 reg 0x0000: 0x02000000
1979 20:14:55.584605 reg 0x0001: 0x00770020
1980 20:14:55.587242 reg 0x0002: 0x00000000
1981 20:14:55.590789 IOAPIC: 120 interrupts
1982 20:14:55.594198 IOAPIC: Clearing IOAPIC at 0xfec00000
1983 20:14:55.597361 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1984 20:14:55.604047 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1985 20:14:55.607316 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1986 20:14:55.613875 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1987 20:14:55.617216 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1988 20:14:55.623990 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1989 20:14:55.627510 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1990 20:14:55.633858 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1991 20:14:55.637039 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1992 20:14:55.640273 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1993 20:14:55.646969 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1994 20:14:55.650479 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1995 20:14:55.657355 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1996 20:14:55.660335 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1997 20:14:55.666975 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1998 20:14:55.670199 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1999 20:14:55.673307 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2000 20:14:55.680736 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2001 20:14:55.684135 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2002 20:14:55.690467 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2003 20:14:55.693588 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2004 20:14:55.700078 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2005 20:14:55.703807 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2006 20:14:55.710320 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2007 20:14:55.713264 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2008 20:14:55.716819 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2009 20:14:55.723880 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2010 20:14:55.726940 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2011 20:14:55.733774 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2012 20:14:55.737188 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2013 20:14:55.743545 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2014 20:14:55.746833 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2015 20:14:55.753987 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2016 20:14:55.756975 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2017 20:14:55.759919 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2018 20:14:55.766480 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2019 20:14:55.769872 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2020 20:14:55.776470 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2021 20:14:55.780172 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2022 20:14:55.786649 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2023 20:14:55.789795 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2024 20:14:55.796661 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2025 20:14:55.799695 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2026 20:14:55.802769 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2027 20:14:55.810017 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2028 20:14:55.812855 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2029 20:14:55.820171 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2030 20:14:55.823015 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2031 20:14:55.829514 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2032 20:14:55.833623 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2033 20:14:55.839624 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2034 20:14:55.843496 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2035 20:14:55.846093 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2036 20:14:55.852953 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2037 20:14:55.856159 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2038 20:14:55.862860 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2039 20:14:55.865973 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2040 20:14:55.873478 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2041 20:14:55.876202 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2042 20:14:55.882798 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2043 20:14:55.886353 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2044 20:14:55.889645 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2045 20:14:55.895906 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2046 20:14:55.899507 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2047 20:14:55.906158 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2048 20:14:55.909453 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2049 20:14:55.916327 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2050 20:14:55.919230 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2051 20:14:55.926288 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2052 20:14:55.929506 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2053 20:14:55.932833 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2054 20:14:55.939328 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2055 20:14:55.943031 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2056 20:14:55.950008 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2057 20:14:55.953243 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2058 20:14:55.959244 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2059 20:14:55.962200 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2060 20:14:55.965539 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2061 20:14:55.972202 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2062 20:14:55.975394 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2063 20:14:55.982613 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2064 20:14:55.985917 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2065 20:14:55.992084 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2066 20:14:55.995579 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2067 20:14:56.002415 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2068 20:14:56.005781 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2069 20:14:56.009006 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2070 20:14:56.016280 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2071 20:14:56.019509 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2072 20:14:56.025820 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2073 20:14:56.028994 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2074 20:14:56.035952 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2075 20:14:56.039161 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2076 20:14:56.046098 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2077 20:14:56.049316 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2078 20:14:56.052357 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2079 20:14:56.058772 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2080 20:14:56.061988 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2081 20:14:56.068970 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2082 20:14:56.072275 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2083 20:14:56.078619 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2084 20:14:56.082300 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2085 20:14:56.088804 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2086 20:14:56.091993 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2087 20:14:56.095150 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2088 20:14:56.102174 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2089 20:14:56.105416 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2090 20:14:56.112548 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2091 20:14:56.115900 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2092 20:14:56.122390 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2093 20:14:56.126048 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2094 20:14:56.128684 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2095 20:14:56.135774 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2096 20:14:56.138819 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2097 20:14:56.145287 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2098 20:14:56.148449 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2099 20:14:56.155295 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2100 20:14:56.159330 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2101 20:14:56.165503 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2102 20:14:56.168647 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2103 20:14:56.172046 IOAPIC: Bootstrap Processor Local APIC = 0x00
2104 20:14:56.179076 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2105 20:14:56.181951 PCI: 00:1f.0 init finished in 607 msecs
2106 20:14:56.185526 PCI: 00:1f.2 init
2107 20:14:56.189151 apm_control: Disabling ACPI.
2108 20:14:56.192188 APMC done.
2109 20:14:56.195334 PCI: 00:1f.2 init finished in 6 msecs
2110 20:14:56.195958 PCI: 00:1f.3 init
2111 20:14:56.202186 PCI: 00:1f.3 init finished in 0 msecs
2112 20:14:56.202762 PCI: 01:00.0 init
2113 20:14:56.205041 PCI: 01:00.0 init finished in 0 msecs
2114 20:14:56.208732 PNP: 0c09.0 init
2115 20:14:56.212456 Google Chrome EC uptime: 12.121 seconds
2116 20:14:56.215669 Google Chrome AP resets since EC boot: 1
2117 20:14:56.222043 Google Chrome most recent AP reset causes:
2118 20:14:56.226087 0.341: 32775 shutdown: entering G3
2119 20:14:56.232483 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2120 20:14:56.235615 PNP: 0c09.0 init finished in 23 msecs
2121 20:14:56.236185 GENERIC: 0.0 init
2122 20:14:56.242077 GENERIC: 0.0 init finished in 0 msecs
2123 20:14:56.242647 GENERIC: 1.0 init
2124 20:14:56.245456 GENERIC: 1.0 init finished in 0 msecs
2125 20:14:56.248672 Devices initialized
2126 20:14:56.252308 Show all devs... After init.
2127 20:14:56.252885 Root Device: enabled 1
2128 20:14:56.255017 CPU_CLUSTER: 0: enabled 1
2129 20:14:56.259239 DOMAIN: 0000: enabled 1
2130 20:14:56.261710 GPIO: 0: enabled 1
2131 20:14:56.262182 PCI: 00:00.0: enabled 1
2132 20:14:56.265375 PCI: 00:01.0: enabled 0
2133 20:14:56.268957 PCI: 00:01.1: enabled 0
2134 20:14:56.271692 PCI: 00:02.0: enabled 1
2135 20:14:56.272161 PCI: 00:04.0: enabled 1
2136 20:14:56.275642 PCI: 00:05.0: enabled 0
2137 20:14:56.278666 PCI: 00:06.0: enabled 1
2138 20:14:56.279241 PCI: 00:06.2: enabled 0
2139 20:14:56.282185 PCI: 00:07.0: enabled 0
2140 20:14:56.285378 PCI: 00:07.1: enabled 0
2141 20:14:56.289109 PCI: 00:07.2: enabled 0
2142 20:14:56.289685 PCI: 00:07.3: enabled 0
2143 20:14:56.291971 PCI: 00:08.0: enabled 0
2144 20:14:56.295404 PCI: 00:09.0: enabled 0
2145 20:14:56.299174 PCI: 00:0a.0: enabled 1
2146 20:14:56.299823 PCI: 00:0d.0: enabled 1
2147 20:14:56.301829 PCI: 00:0d.1: enabled 0
2148 20:14:56.305320 PCI: 00:0d.2: enabled 0
2149 20:14:56.308527 PCI: 00:0d.3: enabled 0
2150 20:14:56.309000 PCI: 00:0e.0: enabled 0
2151 20:14:56.311838 PCI: 00:10.0: enabled 0
2152 20:14:56.315438 PCI: 00:10.1: enabled 0
2153 20:14:56.316017 PCI: 00:10.6: enabled 0
2154 20:14:56.318442 PCI: 00:10.7: enabled 0
2155 20:14:56.322304 PCI: 00:12.0: enabled 0
2156 20:14:56.325404 PCI: 00:12.6: enabled 0
2157 20:14:56.325977 PCI: 00:12.7: enabled 0
2158 20:14:56.328173 PCI: 00:13.0: enabled 0
2159 20:14:56.331869 PCI: 00:14.0: enabled 1
2160 20:14:56.335558 PCI: 00:14.1: enabled 0
2161 20:14:56.336123 PCI: 00:14.2: enabled 1
2162 20:14:56.338841 PCI: 00:14.3: enabled 1
2163 20:14:56.341771 PCI: 00:15.0: enabled 1
2164 20:14:56.345044 PCI: 00:15.1: enabled 1
2165 20:14:56.345614 PCI: 00:15.2: enabled 0
2166 20:14:56.348409 PCI: 00:15.3: enabled 1
2167 20:14:56.351998 PCI: 00:16.0: enabled 1
2168 20:14:56.355508 PCI: 00:16.1: enabled 0
2169 20:14:56.356062 PCI: 00:16.2: enabled 0
2170 20:14:56.358632 PCI: 00:16.3: enabled 0
2171 20:14:56.361524 PCI: 00:16.4: enabled 0
2172 20:14:56.365068 PCI: 00:16.5: enabled 0
2173 20:14:56.365560 PCI: 00:17.0: enabled 0
2174 20:14:56.368096 PCI: 00:19.0: enabled 0
2175 20:14:56.371548 PCI: 00:19.1: enabled 1
2176 20:14:56.372106 PCI: 00:19.2: enabled 0
2177 20:14:56.374983 PCI: 00:1a.0: enabled 0
2178 20:14:56.378059 PCI: 00:1c.0: enabled 0
2179 20:14:56.381950 PCI: 00:1c.1: enabled 0
2180 20:14:56.382528 PCI: 00:1c.2: enabled 0
2181 20:14:56.384649 PCI: 00:1c.3: enabled 0
2182 20:14:56.388162 PCI: 00:1c.4: enabled 0
2183 20:14:56.391857 PCI: 00:1c.5: enabled 0
2184 20:14:56.392428 PCI: 00:1c.6: enabled 0
2185 20:14:56.394859 PCI: 00:1c.7: enabled 0
2186 20:14:56.398121 PCI: 00:1d.0: enabled 0
2187 20:14:56.401510 PCI: 00:1d.1: enabled 0
2188 20:14:56.402067 PCI: 00:1d.2: enabled 0
2189 20:14:56.404618 PCI: 00:1d.3: enabled 0
2190 20:14:56.408292 PCI: 00:1e.0: enabled 1
2191 20:14:56.408854 PCI: 00:1e.1: enabled 0
2192 20:14:56.411746 PCI: 00:1e.2: enabled 0
2193 20:14:56.415059 PCI: 00:1e.3: enabled 1
2194 20:14:56.417990 PCI: 00:1f.0: enabled 1
2195 20:14:56.418445 PCI: 00:1f.1: enabled 0
2196 20:14:56.421299 PCI: 00:1f.2: enabled 1
2197 20:14:56.424661 PCI: 00:1f.3: enabled 1
2198 20:14:56.428132 PCI: 00:1f.4: enabled 0
2199 20:14:56.428692 PCI: 00:1f.5: enabled 1
2200 20:14:56.431252 PCI: 00:1f.6: enabled 0
2201 20:14:56.435136 PCI: 00:1f.7: enabled 0
2202 20:14:56.438097 GENERIC: 0.0: enabled 1
2203 20:14:56.438652 GENERIC: 0.0: enabled 1
2204 20:14:56.441438 GENERIC: 1.0: enabled 1
2205 20:14:56.444422 GENERIC: 0.0: enabled 1
2206 20:14:56.447626 GENERIC: 1.0: enabled 1
2207 20:14:56.448087 USB0 port 0: enabled 1
2208 20:14:56.451396 USB0 port 0: enabled 1
2209 20:14:56.454611 GENERIC: 0.0: enabled 1
2210 20:14:56.455200 I2C: 00:1a: enabled 1
2211 20:14:56.457984 I2C: 00:31: enabled 1
2212 20:14:56.461202 I2C: 00:32: enabled 1
2213 20:14:56.461658 I2C: 00:50: enabled 1
2214 20:14:56.464535 I2C: 00:10: enabled 1
2215 20:14:56.468928 I2C: 00:15: enabled 1
2216 20:14:56.469488 I2C: 00:2c: enabled 1
2217 20:14:56.470900 GENERIC: 0.0: enabled 1
2218 20:14:56.474818 SPI: 00: enabled 1
2219 20:14:56.475425 PNP: 0c09.0: enabled 1
2220 20:14:56.477885 GENERIC: 0.0: enabled 1
2221 20:14:56.481324 USB3 port 0: enabled 1
2222 20:14:56.484775 USB3 port 1: enabled 0
2223 20:14:56.485233 USB3 port 2: enabled 1
2224 20:14:56.487630 USB3 port 3: enabled 0
2225 20:14:56.491419 USB2 port 0: enabled 1
2226 20:14:56.491990 USB2 port 1: enabled 0
2227 20:14:56.494537 USB2 port 2: enabled 1
2228 20:14:56.497926 USB2 port 3: enabled 0
2229 20:14:56.501813 USB2 port 4: enabled 0
2230 20:14:56.502392 USB2 port 5: enabled 1
2231 20:14:56.504470 USB2 port 6: enabled 0
2232 20:14:56.507951 USB2 port 7: enabled 0
2233 20:14:56.508517 USB2 port 8: enabled 1
2234 20:14:56.511087 USB2 port 9: enabled 1
2235 20:14:56.514131 USB3 port 0: enabled 1
2236 20:14:56.514586 USB3 port 1: enabled 0
2237 20:14:56.517799 USB3 port 2: enabled 0
2238 20:14:56.521266 USB3 port 3: enabled 0
2239 20:14:56.524229 GENERIC: 0.0: enabled 1
2240 20:14:56.524690 GENERIC: 1.0: enabled 1
2241 20:14:56.527780 APIC: 00: enabled 1
2242 20:14:56.531138 APIC: 14: enabled 1
2243 20:14:56.531736 APIC: 16: enabled 1
2244 20:14:56.534814 APIC: 10: enabled 1
2245 20:14:56.535403 APIC: 12: enabled 1
2246 20:14:56.537895 APIC: 09: enabled 1
2247 20:14:56.541102 APIC: 08: enabled 1
2248 20:14:56.541658 APIC: 01: enabled 1
2249 20:14:56.544023 PCI: 01:00.0: enabled 1
2250 20:14:56.550744 BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms
2251 20:14:56.554365 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2252 20:14:56.557883 ELOG: NV offset 0xf20000 size 0x4000
2253 20:14:56.565307 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2254 20:14:56.572255 ELOG: Event(17) added with size 13 at 2023-12-28 20:14:56 UTC
2255 20:14:56.578654 ELOG: Event(9E) added with size 10 at 2023-12-28 20:14:56 UTC
2256 20:14:56.585638 ELOG: Event(9F) added with size 14 at 2023-12-28 20:14:56 UTC
2257 20:14:56.592091 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2258 20:14:56.598826 ELOG: Event(A0) added with size 9 at 2023-12-28 20:14:56 UTC
2259 20:14:56.602408 elog_add_boot_reason: Logged dev mode boot
2260 20:14:56.608265 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2261 20:14:56.611799 Finalize devices...
2262 20:14:56.612254 PCI: 00:16.0 final
2263 20:14:56.615343 PCI: 00:1f.2 final
2264 20:14:56.615938 GENERIC: 0.0 final
2265 20:14:56.621809 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2266 20:14:56.625538 GENERIC: 1.0 final
2267 20:14:56.631685 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2268 20:14:56.632247 Devices finalized
2269 20:14:56.638486 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2270 20:14:56.642036 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2271 20:14:56.648000 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2272 20:14:56.655264 ME: HFSTS1 : 0x90000245
2273 20:14:56.658798 ME: HFSTS2 : 0x82100116
2274 20:14:56.661727 ME: HFSTS3 : 0x00000050
2275 20:14:56.668202 ME: HFSTS4 : 0x00004000
2276 20:14:56.671907 ME: HFSTS5 : 0x00000000
2277 20:14:56.675029 ME: HFSTS6 : 0x40600006
2278 20:14:56.678424 ME: Manufacturing Mode : NO
2279 20:14:56.684944 ME: SPI Protection Mode Enabled : YES
2280 20:14:56.688196 ME: FPFs Committed : YES
2281 20:14:56.691786 ME: Manufacturing Vars Locked : YES
2282 20:14:56.694926 ME: FW Partition Table : OK
2283 20:14:56.697743 ME: Bringup Loader Failure : NO
2284 20:14:56.701616 ME: Firmware Init Complete : YES
2285 20:14:56.704766 ME: Boot Options Present : NO
2286 20:14:56.707814 ME: Update In Progress : NO
2287 20:14:56.715291 ME: D0i3 Support : YES
2288 20:14:56.717821 ME: Low Power State Enabled : NO
2289 20:14:56.721578 ME: CPU Replaced : YES
2290 20:14:56.724484 ME: CPU Replacement Valid : YES
2291 20:14:56.727951 ME: Current Working State : 5
2292 20:14:56.731269 ME: Current Operation State : 1
2293 20:14:56.734509 ME: Current Operation Mode : 0
2294 20:14:56.738061 ME: Error Code : 0
2295 20:14:56.744674 ME: Enhanced Debug Mode : NO
2296 20:14:56.747716 ME: CPU Debug Disabled : YES
2297 20:14:56.751008 ME: TXT Support : NO
2298 20:14:56.754716 ME: WP for RO is enabled : YES
2299 20:14:56.760711 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2300 20:14:56.767478 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2301 20:14:56.770861 Ramoops buffer: 0x100000@0x76899000.
2302 20:14:56.777993 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2303 20:14:56.784118 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2304 20:14:56.787558 CBFS: 'fallback/slic' not found.
2305 20:14:56.790426 ACPI: Writing ACPI tables at 7686d000.
2306 20:14:56.790934 ACPI: * FACS
2307 20:14:56.794059 ACPI: * DSDT
2308 20:14:56.800677 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2309 20:14:56.804336 ACPI: * FADT
2310 20:14:56.804881 SCI is IRQ9
2311 20:14:56.811339 ACPI: added table 1/32, length now 40
2312 20:14:56.811934 ACPI: * SSDT
2313 20:14:56.818208 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2314 20:14:56.821318 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2315 20:14:56.827740 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2316 20:14:56.830973 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2317 20:14:56.837347 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2318 20:14:56.840862 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2319 20:14:56.847484 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2320 20:14:56.854167 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2321 20:14:56.857376 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2322 20:14:56.864302 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2323 20:14:56.866917 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2324 20:14:56.874389 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2325 20:14:56.877612 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2326 20:14:56.883779 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2327 20:14:56.891475 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2328 20:14:56.893926 PS2K: Passing 80 keymaps to kernel
2329 20:14:56.901051 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2330 20:14:56.908650 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2331 20:14:56.914193 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2332 20:14:56.920266 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2333 20:14:56.923755 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2334 20:14:56.930388 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2335 20:14:56.936993 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2336 20:14:56.943859 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2337 20:14:56.950445 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2338 20:14:56.957125 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2339 20:14:56.960012 ACPI: added table 2/32, length now 44
2340 20:14:56.963512 ACPI: * MCFG
2341 20:14:56.966965 ACPI: added table 3/32, length now 48
2342 20:14:56.967565 ACPI: * TPM2
2343 20:14:56.970654 TPM2 log created at 0x7685d000
2344 20:14:56.973625 ACPI: added table 4/32, length now 52
2345 20:14:56.977509 ACPI: * LPIT
2346 20:14:56.980048 ACPI: added table 5/32, length now 56
2347 20:14:56.983823 ACPI: * MADT
2348 20:14:56.984370 SCI is IRQ9
2349 20:14:56.987047 ACPI: added table 6/32, length now 60
2350 20:14:56.990247 cmd_reg from pmc_make_ipc_cmd 1052838
2351 20:14:56.996940 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2352 20:14:57.003989 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2353 20:14:57.010117 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2354 20:14:57.013249 PMC CrashLog size in discovery mode: 0xC00
2355 20:14:57.016957 cpu crashlog bar addr: 0x80640000
2356 20:14:57.019850 cpu discovery table offset: 0x6030
2357 20:14:57.026426 cpu_crashlog_discovery_table buffer count: 0x3
2358 20:14:57.033517 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2359 20:14:57.039809 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2360 20:14:57.046798 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2361 20:14:57.049657 PMC crashLog size in discovery mode : 0xC00
2362 20:14:57.056416 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2363 20:14:57.059890 discover mode PMC crashlog size adjusted to: 0x200
2364 20:14:57.070273 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2365 20:14:57.073329 discover mode PMC crashlog size adjusted to: 0x0
2366 20:14:57.077006 m_cpu_crashLog_size : 0x3480 bytes
2367 20:14:57.079743 CPU crashLog present.
2368 20:14:57.083105 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2369 20:14:57.089889 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2370 20:14:57.093035 current = 76876550
2371 20:14:57.096304 ACPI: * DMAR
2372 20:14:57.099343 ACPI: added table 7/32, length now 64
2373 20:14:57.103321 ACPI: added table 8/32, length now 68
2374 20:14:57.103942 ACPI: * HPET
2375 20:14:57.106470 ACPI: added table 9/32, length now 72
2376 20:14:57.109796 ACPI: done.
2377 20:14:57.113261 ACPI tables: 38528 bytes.
2378 20:14:57.116754 smbios_write_tables: 76857000
2379 20:14:57.119963 EC returned error result code 3
2380 20:14:57.123856 Couldn't obtain OEM name from CBI
2381 20:14:57.127222 Create SMBIOS type 16
2382 20:14:57.127816 Create SMBIOS type 17
2383 20:14:57.129962 Create SMBIOS type 20
2384 20:14:57.133016 GENERIC: 0.0 (WIFI Device)
2385 20:14:57.137000 SMBIOS tables: 2156 bytes.
2386 20:14:57.140541 Writing table forward entry at 0x00000500
2387 20:14:57.146761 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2388 20:14:57.149560 Writing coreboot table at 0x76891000
2389 20:14:57.156934 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2390 20:14:57.159902 1. 0000000000001000-000000000009ffff: RAM
2391 20:14:57.163398 2. 00000000000a0000-00000000000fffff: RESERVED
2392 20:14:57.170185 3. 0000000000100000-0000000076856fff: RAM
2393 20:14:57.173456 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2394 20:14:57.180143 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2395 20:14:57.186864 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2396 20:14:57.190027 7. 0000000077000000-00000000803fffff: RESERVED
2397 20:14:57.193326 8. 00000000c0000000-00000000cfffffff: RESERVED
2398 20:14:57.200029 9. 00000000f8000000-00000000f9ffffff: RESERVED
2399 20:14:57.203158 10. 00000000fb000000-00000000fb000fff: RESERVED
2400 20:14:57.209755 11. 00000000fc800000-00000000fe7fffff: RESERVED
2401 20:14:57.213348 12. 00000000feb00000-00000000feb7ffff: RESERVED
2402 20:14:57.219802 13. 00000000fec00000-00000000fecfffff: RESERVED
2403 20:14:57.223538 14. 00000000fed40000-00000000fed6ffff: RESERVED
2404 20:14:57.230152 15. 00000000fed80000-00000000fed87fff: RESERVED
2405 20:14:57.233436 16. 00000000fed90000-00000000fed92fff: RESERVED
2406 20:14:57.236249 17. 00000000feda0000-00000000feda1fff: RESERVED
2407 20:14:57.243444 18. 00000000fedc0000-00000000feddffff: RESERVED
2408 20:14:57.246837 19. 0000000100000000-000000027fbfffff: RAM
2409 20:14:57.249828 Passing 4 GPIOs to payload:
2410 20:14:57.256529 NAME | PORT | POLARITY | VALUE
2411 20:14:57.260072 lid | undefined | high | high
2412 20:14:57.266512 power | undefined | high | low
2413 20:14:57.270015 oprom | undefined | high | low
2414 20:14:57.276115 EC in RW | 0x00000151 | high | high
2415 20:14:57.276577 Board ID: 3
2416 20:14:57.279526 FW config: 0x131
2417 20:14:57.286334 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum b4b6
2418 20:14:57.289566 coreboot table: 1788 bytes.
2419 20:14:57.293179 IMD ROOT 0. 0x76fff000 0x00001000
2420 20:14:57.297239 IMD SMALL 1. 0x76ffe000 0x00001000
2421 20:14:57.299482 FSP MEMORY 2. 0x76afe000 0x00500000
2422 20:14:57.302968 CONSOLE 3. 0x76ade000 0x00020000
2423 20:14:57.306514 RW MCACHE 4. 0x76add000 0x0000043c
2424 20:14:57.309491 RO MCACHE 5. 0x76adc000 0x00000fd8
2425 20:14:57.312903 FMAP 6. 0x76adb000 0x0000064a
2426 20:14:57.319600 TIME STAMP 7. 0x76ada000 0x00000910
2427 20:14:57.322953 VBOOT WORK 8. 0x76ac6000 0x00014000
2428 20:14:57.326188 MEM INFO 9. 0x76ac5000 0x000003b8
2429 20:14:57.329928 ROMSTG STCK10. 0x76ac4000 0x00001000
2430 20:14:57.332921 AFTER CAR 11. 0x76ab8000 0x0000c000
2431 20:14:57.336302 RAMSTAGE 12. 0x76a2e000 0x0008a000
2432 20:14:57.339976 ACPI BERT 13. 0x76a1e000 0x00010000
2433 20:14:57.342605 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2434 20:14:57.349485 REFCODE 15. 0x769ae000 0x0006f000
2435 20:14:57.353038 SMM BACKUP 16. 0x7699e000 0x00010000
2436 20:14:57.356762 IGD OPREGION17. 0x76999000 0x00004203
2437 20:14:57.360130 RAMOOPS 18. 0x76899000 0x00100000
2438 20:14:57.362702 COREBOOT 19. 0x76891000 0x00008000
2439 20:14:57.366608 ACPI 20. 0x7686d000 0x00024000
2440 20:14:57.369394 TPM2 TCGLOG21. 0x7685d000 0x00010000
2441 20:14:57.372848 PMC CRASHLOG22. 0x7685c000 0x00000c00
2442 20:14:57.379799 CPU CRASHLOG23. 0x76858000 0x00003480
2443 20:14:57.383420 SMBIOS 24. 0x76857000 0x00001000
2444 20:14:57.383984 IMD small region:
2445 20:14:57.385924 IMD ROOT 0. 0x76ffec00 0x00000400
2446 20:14:57.393017 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2447 20:14:57.396086 VPD 2. 0x76ffeb80 0x00000058
2448 20:14:57.399471 POWER STATE 3. 0x76ffeb20 0x00000044
2449 20:14:57.403318 ROMSTAGE 4. 0x76ffeb00 0x00000004
2450 20:14:57.406276 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2451 20:14:57.412855 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2452 20:14:57.416097 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2453 20:14:57.419519 MTRR: Physical address space:
2454 20:14:57.426325 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2455 20:14:57.433033 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2456 20:14:57.439491 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2457 20:14:57.446478 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2458 20:14:57.453010 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2459 20:14:57.459207 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2460 20:14:57.462358 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2461 20:14:57.469171 MTRR: Fixed MSR 0x250 0x0606060606060606
2462 20:14:57.472735 MTRR: Fixed MSR 0x258 0x0606060606060606
2463 20:14:57.476119 MTRR: Fixed MSR 0x259 0x0000000000000000
2464 20:14:57.479000 MTRR: Fixed MSR 0x268 0x0606060606060606
2465 20:14:57.486314 MTRR: Fixed MSR 0x269 0x0606060606060606
2466 20:14:57.489180 MTRR: Fixed MSR 0x26a 0x0606060606060606
2467 20:14:57.492312 MTRR: Fixed MSR 0x26b 0x0606060606060606
2468 20:14:57.495708 MTRR: Fixed MSR 0x26c 0x0606060606060606
2469 20:14:57.502967 MTRR: Fixed MSR 0x26d 0x0606060606060606
2470 20:14:57.506262 MTRR: Fixed MSR 0x26e 0x0606060606060606
2471 20:14:57.508943 MTRR: Fixed MSR 0x26f 0x0606060606060606
2472 20:14:57.512185 call enable_fixed_mtrr()
2473 20:14:57.515787 CPU physical address size: 39 bits
2474 20:14:57.522437 MTRR: default type WB/UC MTRR counts: 6/6.
2475 20:14:57.525496 MTRR: UC selected as default type.
2476 20:14:57.532170 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2477 20:14:57.535617 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2478 20:14:57.542209 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2479 20:14:57.548959 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2480 20:14:57.555543 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2481 20:14:57.561553 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2482 20:14:57.568493 MTRR: Fixed MSR 0x250 0x0606060606060606
2483 20:14:57.572362 MTRR: Fixed MSR 0x258 0x0606060606060606
2484 20:14:57.575487 MTRR: Fixed MSR 0x259 0x0000000000000000
2485 20:14:57.578842 MTRR: Fixed MSR 0x268 0x0606060606060606
2486 20:14:57.585426 MTRR: Fixed MSR 0x269 0x0606060606060606
2487 20:14:57.588597 MTRR: Fixed MSR 0x26a 0x0606060606060606
2488 20:14:57.592228 MTRR: Fixed MSR 0x26b 0x0606060606060606
2489 20:14:57.595338 MTRR: Fixed MSR 0x26c 0x0606060606060606
2490 20:14:57.602296 MTRR: Fixed MSR 0x26d 0x0606060606060606
2491 20:14:57.605302 MTRR: Fixed MSR 0x26e 0x0606060606060606
2492 20:14:57.608579 MTRR: Fixed MSR 0x26f 0x0606060606060606
2493 20:14:57.611896 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 20:14:57.615516 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 20:14:57.621745 MTRR: Fixed MSR 0x258 0x0606060606060606
2496 20:14:57.625426 MTRR: Fixed MSR 0x259 0x0000000000000000
2497 20:14:57.628039 MTRR: Fixed MSR 0x268 0x0606060606060606
2498 20:14:57.631902 MTRR: Fixed MSR 0x269 0x0606060606060606
2499 20:14:57.638493 MTRR: Fixed MSR 0x26a 0x0606060606060606
2500 20:14:57.641629 MTRR: Fixed MSR 0x26b 0x0606060606060606
2501 20:14:57.645489 MTRR: Fixed MSR 0x26c 0x0606060606060606
2502 20:14:57.648399 MTRR: Fixed MSR 0x26d 0x0606060606060606
2503 20:14:57.654836 MTRR: Fixed MSR 0x26e 0x0606060606060606
2504 20:14:57.658403 MTRR: Fixed MSR 0x26f 0x0606060606060606
2505 20:14:57.661234 MTRR: Fixed MSR 0x250 0x0606060606060606
2506 20:14:57.667203 MTRR: Fixed MSR 0x250 0x0606060606060606
2507 20:14:57.671731 MTRR: Fixed MSR 0x250 0x0606060606060606
2508 20:14:57.674698 MTRR: Fixed MSR 0x250 0x0606060606060606
2509 20:14:57.678137 MTRR: Fixed MSR 0x258 0x0606060606060606
2510 20:14:57.681174 MTRR: Fixed MSR 0x259 0x0000000000000000
2511 20:14:57.684955 MTRR: Fixed MSR 0x268 0x0606060606060606
2512 20:14:57.691470 MTRR: Fixed MSR 0x269 0x0606060606060606
2513 20:14:57.694591 MTRR: Fixed MSR 0x26a 0x0606060606060606
2514 20:14:57.698302 MTRR: Fixed MSR 0x26b 0x0606060606060606
2515 20:14:57.701031 MTRR: Fixed MSR 0x26c 0x0606060606060606
2516 20:14:57.708331 MTRR: Fixed MSR 0x26d 0x0606060606060606
2517 20:14:57.711203 MTRR: Fixed MSR 0x26e 0x0606060606060606
2518 20:14:57.714887 MTRR: Fixed MSR 0x26f 0x0606060606060606
2519 20:14:57.717932 call enable_fixed_mtrr()
2520 20:14:57.721315 MTRR: Fixed MSR 0x258 0x0606060606060606
2521 20:14:57.724738 MTRR: Fixed MSR 0x258 0x0606060606060606
2522 20:14:57.727768 call enable_fixed_mtrr()
2523 20:14:57.730899 MTRR: Fixed MSR 0x259 0x0000000000000000
2524 20:14:57.737954 MTRR: Fixed MSR 0x268 0x0606060606060606
2525 20:14:57.741520 MTRR: Fixed MSR 0x269 0x0606060606060606
2526 20:14:57.744891 MTRR: Fixed MSR 0x26a 0x0606060606060606
2527 20:14:57.747902 MTRR: Fixed MSR 0x26b 0x0606060606060606
2528 20:14:57.754373 MTRR: Fixed MSR 0x26c 0x0606060606060606
2529 20:14:57.757901 MTRR: Fixed MSR 0x26d 0x0606060606060606
2530 20:14:57.761220 MTRR: Fixed MSR 0x26e 0x0606060606060606
2531 20:14:57.763977 MTRR: Fixed MSR 0x26f 0x0606060606060606
2532 20:14:57.767742 call enable_fixed_mtrr()
2533 20:14:57.770971 MTRR: Fixed MSR 0x259 0x0000000000000000
2534 20:14:57.774491 CPU physical address size: 39 bits
2535 20:14:57.777915 call enable_fixed_mtrr()
2536 20:14:57.781164 CPU physical address size: 39 bits
2537 20:14:57.784498 MTRR: Fixed MSR 0x268 0x0606060606060606
2538 20:14:57.787939 CPU physical address size: 39 bits
2539 20:14:57.794375 MTRR: Fixed MSR 0x269 0x0606060606060606
2540 20:14:57.797707 MTRR: Fixed MSR 0x258 0x0606060606060606
2541 20:14:57.801260 MTRR: Fixed MSR 0x26a 0x0606060606060606
2542 20:14:57.803884 MTRR: Fixed MSR 0x26b 0x0606060606060606
2543 20:14:57.811045 MTRR: Fixed MSR 0x26c 0x0606060606060606
2544 20:14:57.814267 MTRR: Fixed MSR 0x26d 0x0606060606060606
2545 20:14:57.817866 MTRR: Fixed MSR 0x26e 0x0606060606060606
2546 20:14:57.820709 MTRR: Fixed MSR 0x26f 0x0606060606060606
2547 20:14:57.824813 CPU physical address size: 39 bits
2548 20:14:57.827853 call enable_fixed_mtrr()
2549 20:14:57.830816 MTRR: Fixed MSR 0x258 0x0606060606060606
2550 20:14:57.834150 CPU physical address size: 39 bits
2551 20:14:57.840727 MTRR: Fixed MSR 0x259 0x0000000000000000
2552 20:14:57.844302 MTRR: Fixed MSR 0x259 0x0000000000000000
2553 20:14:57.847706 MTRR: Fixed MSR 0x268 0x0606060606060606
2554 20:14:57.851116 MTRR: Fixed MSR 0x269 0x0606060606060606
2555 20:14:57.857269 MTRR: Fixed MSR 0x268 0x0606060606060606
2556 20:14:57.860573 MTRR: Fixed MSR 0x269 0x0606060606060606
2557 20:14:57.863753 MTRR: Fixed MSR 0x26a 0x0606060606060606
2558 20:14:57.867139 MTRR: Fixed MSR 0x26b 0x0606060606060606
2559 20:14:57.874270 MTRR: Fixed MSR 0x26c 0x0606060606060606
2560 20:14:57.877677 MTRR: Fixed MSR 0x26d 0x0606060606060606
2561 20:14:57.880593 MTRR: Fixed MSR 0x26e 0x0606060606060606
2562 20:14:57.883901 MTRR: Fixed MSR 0x26f 0x0606060606060606
2563 20:14:57.887225 MTRR: Fixed MSR 0x26a 0x0606060606060606
2564 20:14:57.890885 call enable_fixed_mtrr()
2565 20:14:57.894676 MTRR: Fixed MSR 0x26b 0x0606060606060606
2566 20:14:57.900518 MTRR: Fixed MSR 0x26c 0x0606060606060606
2567 20:14:57.903770 MTRR: Fixed MSR 0x26d 0x0606060606060606
2568 20:14:57.907482 MTRR: Fixed MSR 0x26e 0x0606060606060606
2569 20:14:57.910644 MTRR: Fixed MSR 0x26f 0x0606060606060606
2570 20:14:57.913781 CPU physical address size: 39 bits
2571 20:14:57.917213 call enable_fixed_mtrr()
2572 20:14:57.920394 CPU physical address size: 39 bits
2573 20:14:57.925066
2574 20:14:57.925641 MTRR check
2575 20:14:57.928019 Fixed MTRRs : Enabled
2576 20:14:57.928583 Variable MTRRs: Enabled
2577 20:14:57.928947
2578 20:14:57.934647 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2579 20:14:57.938641 Checking cr50 for pending updates
2580 20:14:57.950181 Reading cr50 TPM mode
2581 20:14:57.965382 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2582 20:14:57.975629 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2583 20:14:57.978772 Checking segment from ROM address 0xf96cbe6c
2584 20:14:57.982415 Checking segment from ROM address 0xf96cbe88
2585 20:14:57.988878 Loading segment from ROM address 0xf96cbe6c
2586 20:14:57.989434 code (compression=1)
2587 20:14:57.999342 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2588 20:14:58.006063 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2589 20:14:58.009107 using LZMA
2590 20:14:58.031244 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2591 20:14:58.037659 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2592 20:14:58.046043 Loading segment from ROM address 0xf96cbe88
2593 20:14:58.049191 Entry Point 0x30000000
2594 20:14:58.049748 Loaded segments
2595 20:14:58.055925 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2596 20:14:58.062758 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2597 20:14:58.063712 Finalizing chipset.
2598 20:14:58.066095 apm_control: Finalizing SMM.
2599 20:14:58.069599 APMC done.
2600 20:14:58.072769 HECI: CSE device 16.1 is disabled
2601 20:14:58.076036 HECI: CSE device 16.2 is disabled
2602 20:14:58.080140 HECI: CSE device 16.3 is disabled
2603 20:14:58.082278 HECI: CSE device 16.4 is disabled
2604 20:14:58.085623 HECI: CSE device 16.5 is disabled
2605 20:14:58.089168 HECI: Sending End-of-Post
2606 20:14:58.096970 CSE: EOP requested action: continue boot
2607 20:14:58.100749 CSE EOP successful, continuing boot
2608 20:14:58.107453 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2609 20:14:58.110558 mp_park_aps done after 0 msecs.
2610 20:14:58.114134 Jumping to boot code at 0x30000000(0x76891000)
2611 20:14:58.123815 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2612 20:14:58.128315
2613 20:14:58.128865
2614 20:14:58.129222
2615 20:14:58.131449 Starting depthcharge on Volmar...
2616 20:14:58.131998
2617 20:14:58.133835 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2618 20:14:58.134358 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2619 20:14:58.134809 Setting prompt string to ['brya:']
2620 20:14:58.135232 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2621 20:14:58.137885 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2622 20:14:58.138451
2623 20:14:58.144423 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2624 20:14:58.144992
2625 20:14:58.151476 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2626 20:14:58.152030
2627 20:14:58.155008 configure_storage: Failed to remap 1C:2
2628 20:14:58.155622
2629 20:14:58.157561 Wipe memory regions:
2630 20:14:58.158116
2631 20:14:58.161240 [0x00000000001000, 0x000000000a0000)
2632 20:14:58.161804
2633 20:14:58.164237 [0x00000000100000, 0x00000030000000)
2634 20:14:58.270263
2635 20:14:58.273743 [0x00000032668e60, 0x00000076857000)
2636 20:14:58.421812
2637 20:14:58.424731 [0x00000100000000, 0x0000027fc00000)
2638 20:14:59.253423
2639 20:14:59.256424 ec_init: CrosEC protocol v3 supported (256, 256)
2640 20:14:59.866048
2641 20:14:59.866608 R8152: Initializing
2642 20:14:59.866979
2643 20:14:59.868613 Version 9 (ocp_data = 6010)
2644 20:14:59.869125
2645 20:14:59.871811 R8152: Done initializing
2646 20:14:59.872268
2647 20:14:59.875064 Adding net device
2648 20:15:00.177452
2649 20:15:00.180771 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2650 20:15:00.181502
2651 20:15:00.181881
2652 20:15:00.182224
2653 20:15:00.183046 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2655 20:15:00.284711 brya: tftpboot 192.168.201.1 12402887/tftp-deploy-9qoloh1n/kernel/bzImage 12402887/tftp-deploy-9qoloh1n/kernel/cmdline 12402887/tftp-deploy-9qoloh1n/ramdisk/ramdisk.cpio.gz
2656 20:15:00.285376 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2657 20:15:00.285870 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2658 20:15:00.291438 tftpboot 192.168.201.1 12402887/tftp-deploy-9qoloh1n/kernel/bzIploy-9qoloh1n/kernel/cmdline 12402887/tftp-deploy-9qoloh1n/ramdisk/ramdisk.cpio.gz
2659 20:15:00.292030
2660 20:15:00.292397 Waiting for link
2661 20:15:00.493201
2662 20:15:00.493757 done.
2663 20:15:00.494121
2664 20:15:00.494633 MAC: 00:e0:4c:68:00:8b
2665 20:15:00.495111
2666 20:15:00.496482 Sending DHCP discover... done.
2667 20:15:00.496934
2668 20:15:00.499815 Waiting for reply... done.
2669 20:15:00.500619
2670 20:15:00.503814 Sending DHCP request... done.
2671 20:15:00.504364
2672 20:15:00.510264 Waiting for reply... done.
2673 20:15:00.510823
2674 20:15:00.511185 My ip is 192.168.201.16
2675 20:15:00.511579
2676 20:15:00.513749 The DHCP server ip is 192.168.201.1
2677 20:15:00.516804
2678 20:15:00.520295 TFTP server IP predefined by user: 192.168.201.1
2679 20:15:00.520857
2680 20:15:00.526622 Bootfile predefined by user: 12402887/tftp-deploy-9qoloh1n/kernel/bzImage
2681 20:15:00.527182
2682 20:15:00.529990 Sending tftp read request... done.
2683 20:15:00.530545
2684 20:15:00.539469 Waiting for the transfer...
2685 20:15:00.540048
2686 20:15:00.938530 00000000 ################################################################
2687 20:15:00.939018
2688 20:15:01.329485 00080000 ################################################################
2689 20:15:01.329977
2690 20:15:01.645633 00100000 ################################################################
2691 20:15:01.645777
2692 20:15:01.913928 00180000 ################################################################
2693 20:15:01.914078
2694 20:15:02.168473 00200000 ################################################################
2695 20:15:02.168621
2696 20:15:02.436226 00280000 ################################################################
2697 20:15:02.436356
2698 20:15:02.716289 00300000 ################################################################
2699 20:15:02.716432
2700 20:15:02.986177 00380000 ################################################################
2701 20:15:02.986336
2702 20:15:03.235981 00400000 ################################################################
2703 20:15:03.236101
2704 20:15:03.502362 00480000 ################################################################
2705 20:15:03.502491
2706 20:15:03.771223 00500000 ################################################################
2707 20:15:03.771403
2708 20:15:04.024959 00580000 ################################################################
2709 20:15:04.025107
2710 20:15:04.290640 00600000 ################################################################
2711 20:15:04.290766
2712 20:15:04.566955 00680000 ################################################################
2713 20:15:04.567076
2714 20:15:04.816499 00700000 ################################################################
2715 20:15:04.816630
2716 20:15:05.083896 00780000 ################################################################
2717 20:15:05.084029
2718 20:15:05.337421 00800000 ################################################################
2719 20:15:05.337547
2720 20:15:05.586066 00880000 ################################################################
2721 20:15:05.586190
2722 20:15:05.856514 00900000 ################################################################
2723 20:15:05.856647
2724 20:15:06.108265 00980000 ################################################################
2725 20:15:06.108392
2726 20:15:06.358780 00a00000 ################################################################
2727 20:15:06.358904
2728 20:15:06.613897 00a80000 ################################################################
2729 20:15:06.614023
2730 20:15:06.637950 00b00000 ###### done.
2731 20:15:06.641213
2732 20:15:06.644376 The bootfile was 11579904 bytes long.
2733 20:15:06.644463
2734 20:15:06.647411 Sending tftp read request... done.
2735 20:15:06.647503
2736 20:15:06.650884 Waiting for the transfer...
2737 20:15:06.651064
2738 20:15:07.013346 00000000 ################################################################
2739 20:15:07.013490
2740 20:15:07.267200 00080000 ################################################################
2741 20:15:07.267325
2742 20:15:07.515698 00100000 ################################################################
2743 20:15:07.515858
2744 20:15:07.779595 00180000 ################################################################
2745 20:15:07.779726
2746 20:15:08.075204 00200000 ################################################################
2747 20:15:08.075345
2748 20:15:08.367557 00280000 ################################################################
2749 20:15:08.367688
2750 20:15:08.654991 00300000 ################################################################
2751 20:15:08.655124
2752 20:15:08.907361 00380000 ################################################################
2753 20:15:08.907521
2754 20:15:09.183094 00400000 ################################################################
2755 20:15:09.183238
2756 20:15:09.477497 00480000 ################################################################
2757 20:15:09.477629
2758 20:15:09.768477 00500000 ################################################################
2759 20:15:09.768608
2760 20:15:10.120446 00580000 ################################################################
2761 20:15:10.120578
2762 20:15:10.409289 00600000 ################################################################
2763 20:15:10.409426
2764 20:15:10.670927 00680000 ################################################################
2765 20:15:10.671053
2766 20:15:10.944581 00700000 ################################################################
2767 20:15:10.944714
2768 20:15:11.213137 00780000 ################################################################
2769 20:15:11.213297
2770 20:15:11.487596 00800000 ################################################################
2771 20:15:11.487727
2772 20:15:11.658995 00880000 ####################################### done.
2773 20:15:11.659109
2774 20:15:11.662548 Sending tftp read request... done.
2775 20:15:11.662637
2776 20:15:11.665465 Waiting for the transfer...
2777 20:15:11.665631
2778 20:15:11.665706 00000000 # done.
2779 20:15:11.669349
2780 20:15:11.675727 Command line loaded dynamically from TFTP file: 12402887/tftp-deploy-9qoloh1n/kernel/cmdline
2781 20:15:11.675916
2782 20:15:11.692632 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2783 20:15:11.698094
2784 20:15:11.701135 Shutting down all USB controllers.
2785 20:15:11.701361
2786 20:15:11.701519 Removing current net device
2787 20:15:11.701665
2788 20:15:11.704552 Finalizing coreboot
2789 20:15:11.704834
2790 20:15:11.711053 Exiting depthcharge with code 4 at timestamp: 23836432
2791 20:15:11.711468
2792 20:15:11.711715
2793 20:15:11.711934 Starting kernel ...
2794 20:15:11.712140
2795 20:15:11.712343
2796 20:15:11.713264 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2797 20:15:11.713601 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2798 20:15:11.713856 Setting prompt string to ['Linux version [0-9]']
2799 20:15:11.714096 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2800 20:15:11.714339 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2802 20:19:38.714616 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2804 20:19:38.715744 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2806 20:19:38.716603 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2809 20:19:38.717972 end: 2 depthcharge-action (duration 00:05:00) [common]
2811 20:19:38.718912 Cleaning after the job
2812 20:19:38.719003 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12402887/tftp-deploy-9qoloh1n/ramdisk
2813 20:19:38.720739 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12402887/tftp-deploy-9qoloh1n/kernel
2814 20:19:38.722466 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12402887/tftp-deploy-9qoloh1n/modules
2815 20:19:38.723337 start: 5.1 power-off (timeout 00:00:30) [common]
2816 20:19:38.723510 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-5' '--port=1' '--command=off'
2817 20:19:38.804840 >> Command sent successfully.
2818 20:19:38.815673 Returned 0 in 0 seconds
2819 20:19:38.916945 end: 5.1 power-off (duration 00:00:00) [common]
2821 20:19:38.918651 start: 5.2 read-feedback (timeout 00:10:00) [common]
2822 20:19:38.919945 Listened to connection for namespace 'common' for up to 1s
2824 20:19:38.921419 Listened to connection for namespace 'common' for up to 1s
2825 20:19:39.920595 Finalising connection for namespace 'common'
2826 20:19:39.921253 Disconnecting from shell: Finalise
2827 20:19:39.921659