Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
1 20:14:26.294917 lava-dispatcher, installed at version: 2023.10
2 20:14:26.295169 start: 0 validate
3 20:14:26.295319 Start time: 2023-12-28 20:14:26.295310+00:00 (UTC)
4 20:14:26.295455 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:14:26.295611 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 20:14:26.558721 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:14:26.559060 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.299-cip105-1134-gc868d5e4adaa%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:14:30.067786 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:14:30.068505 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.299-cip105-1134-gc868d5e4adaa%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 20:14:30.573684 validate duration: 4.28
12 20:14:30.574042 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:14:30.574191 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:14:30.574321 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:14:30.574496 Not decompressing ramdisk as can be used compressed.
16 20:14:30.574605 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 20:14:30.574694 saving as /var/lib/lava/dispatcher/tmp/12402844/tftp-deploy-h6bgyvbh/ramdisk/rootfs.cpio.gz
18 20:14:30.574780 total size: 8418130 (8 MB)
19 20:14:30.575946 progress 0 % (0 MB)
20 20:14:30.578500 progress 5 % (0 MB)
21 20:14:30.581134 progress 10 % (0 MB)
22 20:14:30.583773 progress 15 % (1 MB)
23 20:14:30.586512 progress 20 % (1 MB)
24 20:14:30.589167 progress 25 % (2 MB)
25 20:14:30.591891 progress 30 % (2 MB)
26 20:14:30.594341 progress 35 % (2 MB)
27 20:14:30.597105 progress 40 % (3 MB)
28 20:14:30.599674 progress 45 % (3 MB)
29 20:14:30.602317 progress 50 % (4 MB)
30 20:14:30.604868 progress 55 % (4 MB)
31 20:14:30.607371 progress 60 % (4 MB)
32 20:14:30.609668 progress 65 % (5 MB)
33 20:14:30.612144 progress 70 % (5 MB)
34 20:14:30.614638 progress 75 % (6 MB)
35 20:14:30.617147 progress 80 % (6 MB)
36 20:14:30.619712 progress 85 % (6 MB)
37 20:14:30.622214 progress 90 % (7 MB)
38 20:14:30.624696 progress 95 % (7 MB)
39 20:14:30.627002 progress 100 % (8 MB)
40 20:14:30.627260 8 MB downloaded in 0.05 s (152.98 MB/s)
41 20:14:30.627442 end: 1.1.1 http-download (duration 00:00:00) [common]
43 20:14:30.627716 end: 1.1 download-retry (duration 00:00:00) [common]
44 20:14:30.627831 start: 1.2 download-retry (timeout 00:10:00) [common]
45 20:14:30.627928 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 20:14:30.628083 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.299-cip105-1134-gc868d5e4adaa/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 20:14:30.628165 saving as /var/lib/lava/dispatcher/tmp/12402844/tftp-deploy-h6bgyvbh/kernel/bzImage
48 20:14:30.628236 total size: 11579904 (11 MB)
49 20:14:30.628304 No compression specified
50 20:14:30.629579 progress 0 % (0 MB)
51 20:14:30.632986 progress 5 % (0 MB)
52 20:14:30.636468 progress 10 % (1 MB)
53 20:14:30.640050 progress 15 % (1 MB)
54 20:14:30.643402 progress 20 % (2 MB)
55 20:14:30.646927 progress 25 % (2 MB)
56 20:14:30.650486 progress 30 % (3 MB)
57 20:14:30.653909 progress 35 % (3 MB)
58 20:14:30.657402 progress 40 % (4 MB)
59 20:14:30.660898 progress 45 % (5 MB)
60 20:14:30.664175 progress 50 % (5 MB)
61 20:14:30.667662 progress 55 % (6 MB)
62 20:14:30.671136 progress 60 % (6 MB)
63 20:14:30.674433 progress 65 % (7 MB)
64 20:14:30.677848 progress 70 % (7 MB)
65 20:14:30.681320 progress 75 % (8 MB)
66 20:14:30.684527 progress 80 % (8 MB)
67 20:14:30.688035 progress 85 % (9 MB)
68 20:14:30.691516 progress 90 % (9 MB)
69 20:14:30.694800 progress 95 % (10 MB)
70 20:14:30.698259 progress 100 % (11 MB)
71 20:14:30.698441 11 MB downloaded in 0.07 s (157.31 MB/s)
72 20:14:30.698602 end: 1.2.1 http-download (duration 00:00:00) [common]
74 20:14:30.698861 end: 1.2 download-retry (duration 00:00:00) [common]
75 20:14:30.698962 start: 1.3 download-retry (timeout 00:10:00) [common]
76 20:14:30.699057 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 20:14:30.699197 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.299-cip105-1134-gc868d5e4adaa/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 20:14:30.699280 saving as /var/lib/lava/dispatcher/tmp/12402844/tftp-deploy-h6bgyvbh/modules/modules.tar
79 20:14:30.699350 total size: 484260 (0 MB)
80 20:14:30.699419 Using unxz to decompress xz
81 20:14:30.704063 progress 6 % (0 MB)
82 20:14:30.704542 progress 13 % (0 MB)
83 20:14:30.704820 progress 20 % (0 MB)
84 20:14:30.706563 progress 27 % (0 MB)
85 20:14:30.708822 progress 33 % (0 MB)
86 20:14:30.711078 progress 40 % (0 MB)
87 20:14:30.713252 progress 47 % (0 MB)
88 20:14:30.715395 progress 54 % (0 MB)
89 20:14:30.717596 progress 60 % (0 MB)
90 20:14:30.719853 progress 67 % (0 MB)
91 20:14:30.722132 progress 74 % (0 MB)
92 20:14:30.724442 progress 81 % (0 MB)
93 20:14:30.726560 progress 87 % (0 MB)
94 20:14:30.728748 progress 94 % (0 MB)
95 20:14:30.731452 progress 100 % (0 MB)
96 20:14:30.738670 0 MB downloaded in 0.04 s (11.75 MB/s)
97 20:14:30.738992 end: 1.3.1 http-download (duration 00:00:00) [common]
99 20:14:30.739295 end: 1.3 download-retry (duration 00:00:00) [common]
100 20:14:30.739402 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 20:14:30.739513 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 20:14:30.739607 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 20:14:30.739704 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 20:14:30.739967 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5
105 20:14:30.740124 makedir: /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin
106 20:14:30.740245 makedir: /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/tests
107 20:14:30.740357 makedir: /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/results
108 20:14:30.740542 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-add-keys
109 20:14:30.740755 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-add-sources
110 20:14:30.740908 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-background-process-start
111 20:14:30.741055 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-background-process-stop
112 20:14:30.741200 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-common-functions
113 20:14:30.741352 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-echo-ipv4
114 20:14:30.741497 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-install-packages
115 20:14:30.741638 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-installed-packages
116 20:14:30.741785 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-os-build
117 20:14:30.741927 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-probe-channel
118 20:14:30.742069 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-probe-ip
119 20:14:30.742261 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-target-ip
120 20:14:30.742442 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-target-mac
121 20:14:30.742626 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-target-storage
122 20:14:30.742810 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-test-case
123 20:14:30.742992 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-test-event
124 20:14:30.743136 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-test-feedback
125 20:14:30.743279 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-test-raise
126 20:14:30.743429 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-test-reference
127 20:14:30.743571 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-test-runner
128 20:14:30.743713 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-test-set
129 20:14:30.743882 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-test-shell
130 20:14:30.744080 Updating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-install-packages (oe)
131 20:14:30.744276 Updating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/bin/lava-installed-packages (oe)
132 20:14:30.744417 Creating /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/environment
133 20:14:30.744536 LAVA metadata
134 20:14:30.744628 - LAVA_JOB_ID=12402844
135 20:14:30.744712 - LAVA_DISPATCHER_IP=192.168.201.1
136 20:14:30.744834 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 20:14:30.744915 skipped lava-vland-overlay
138 20:14:30.745000 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 20:14:30.745092 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 20:14:30.745170 skipped lava-multinode-overlay
141 20:14:30.745253 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 20:14:30.745344 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 20:14:30.745430 Loading test definitions
144 20:14:30.745537 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 20:14:30.745670 Using /lava-12402844 at stage 0
146 20:14:30.746082 uuid=12402844_1.4.2.3.1 testdef=None
147 20:14:30.746183 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 20:14:30.746281 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 20:14:30.746888 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 20:14:30.747147 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 20:14:30.747988 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 20:14:30.748254 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 20:14:30.749120 runner path: /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/0/tests/0_dmesg test_uuid 12402844_1.4.2.3.1
156 20:14:30.749335 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 20:14:30.749731 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 20:14:30.749821 Using /lava-12402844 at stage 1
160 20:14:30.750171 uuid=12402844_1.4.2.3.5 testdef=None
161 20:14:30.750271 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 20:14:30.750365 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 20:14:30.751015 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 20:14:30.751377 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 20:14:30.752330 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 20:14:30.752726 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 20:14:30.753459 runner path: /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/1/tests/1_bootrr test_uuid 12402844_1.4.2.3.5
170 20:14:30.753636 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 20:14:30.753871 Creating lava-test-runner.conf files
173 20:14:30.753942 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/0 for stage 0
174 20:14:30.754041 - 0_dmesg
175 20:14:30.754139 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12402844/lava-overlay-5p3fcwb5/lava-12402844/1 for stage 1
176 20:14:30.754291 - 1_bootrr
177 20:14:30.754429 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 20:14:30.754526 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 20:14:30.764434 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 20:14:30.764569 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 20:14:30.764678 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 20:14:30.764775 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 20:14:30.764890 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 20:14:31.059180 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 20:14:31.059871 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 20:14:31.060134 extracting modules file /var/lib/lava/dispatcher/tmp/12402844/tftp-deploy-h6bgyvbh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12402844/extract-overlay-ramdisk-muqurutz/ramdisk
187 20:14:31.105139 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 20:14:31.105322 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 20:14:31.105429 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12402844/compress-overlay-iz7j2c7_/overlay-1.4.2.4.tar.gz to ramdisk
190 20:14:31.105515 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12402844/compress-overlay-iz7j2c7_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12402844/extract-overlay-ramdisk-muqurutz/ramdisk
191 20:14:31.114708 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 20:14:31.114837 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 20:14:31.114935 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 20:14:31.115032 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 20:14:31.115124 Building ramdisk /var/lib/lava/dispatcher/tmp/12402844/extract-overlay-ramdisk-muqurutz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12402844/extract-overlay-ramdisk-muqurutz/ramdisk
196 20:14:31.274996 >> 53983 blocks
197 20:14:32.269743 rename /var/lib/lava/dispatcher/tmp/12402844/extract-overlay-ramdisk-muqurutz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12402844/tftp-deploy-h6bgyvbh/ramdisk/ramdisk.cpio.gz
198 20:14:32.270239 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 20:14:32.270376 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 20:14:32.270488 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 20:14:32.270596 No mkimage arch provided, not using FIT.
202 20:14:32.270696 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 20:14:32.270790 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 20:14:32.270908 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
205 20:14:32.271009 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 20:14:32.271092 No LXC device requested
207 20:14:32.271182 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 20:14:32.271276 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 20:14:32.271364 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 20:14:32.271447 Checking files for TFTP limit of 4294967296 bytes.
211 20:14:32.271894 end: 1 tftp-deploy (duration 00:00:02) [common]
212 20:14:32.272024 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 20:14:32.272125 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 20:14:32.272257 substitutions:
215 20:14:32.272331 - {DTB}: None
216 20:14:32.272403 - {INITRD}: 12402844/tftp-deploy-h6bgyvbh/ramdisk/ramdisk.cpio.gz
217 20:14:32.272471 - {KERNEL}: 12402844/tftp-deploy-h6bgyvbh/kernel/bzImage
218 20:14:32.272535 - {LAVA_MAC}: None
219 20:14:32.272597 - {PRESEED_CONFIG}: None
220 20:14:32.272668 - {PRESEED_LOCAL}: None
221 20:14:32.272729 - {RAMDISK}: 12402844/tftp-deploy-h6bgyvbh/ramdisk/ramdisk.cpio.gz
222 20:14:32.272789 - {ROOT_PART}: None
223 20:14:32.272849 - {ROOT}: None
224 20:14:32.272909 - {SERVER_IP}: 192.168.201.1
225 20:14:32.272969 - {TEE}: None
226 20:14:32.273029 Parsed boot commands:
227 20:14:32.273088 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 20:14:32.273282 Parsed boot commands: tftpboot 192.168.201.1 12402844/tftp-deploy-h6bgyvbh/kernel/bzImage 12402844/tftp-deploy-h6bgyvbh/kernel/cmdline 12402844/tftp-deploy-h6bgyvbh/ramdisk/ramdisk.cpio.gz
229 20:14:32.273377 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 20:14:32.273468 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 20:14:32.273570 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 20:14:32.273668 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 20:14:32.273744 Not connected, no need to disconnect.
234 20:14:32.273826 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 20:14:32.273912 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 20:14:32.273988 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-11'
237 20:14:32.278411 Setting prompt string to ['lava-test: # ']
238 20:14:32.278932 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 20:14:32.279098 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 20:14:32.279244 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 20:14:32.279378 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 20:14:32.279739 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
243 20:14:37.414298 >> Command sent successfully.
244 20:14:37.416932 Returned 0 in 5 seconds
245 20:14:37.517374 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 20:14:37.517760 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 20:14:37.517877 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 20:14:37.517978 Setting prompt string to 'Starting depthcharge on Voema...'
250 20:14:37.518055 Changing prompt to 'Starting depthcharge on Voema...'
251 20:14:37.518148 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 20:14:37.518431 [Enter `^Ec?' for help]
253 20:14:39.112568
254 20:14:39.112772
255 20:14:39.122285 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 20:14:39.125691 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
257 20:14:39.132773 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 20:14:39.135844 CPU: AES supported, TXT NOT supported, VT supported
259 20:14:39.142541 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 20:14:39.146363 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 20:14:39.153511 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 20:14:39.156479 VBOOT: Loading verstage.
263 20:14:39.159855 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 20:14:39.167541 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 20:14:39.169826 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 20:14:39.180143 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 20:14:39.186701 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 20:14:39.186826
269 20:14:39.186966
270 20:14:39.196866 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 20:14:39.213296 Probing TPM: . done!
272 20:14:39.216252 TPM ready after 0 ms
273 20:14:39.219811 Connected to device vid:did:rid of 1ae0:0028:00
274 20:14:39.231222 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
275 20:14:39.238469 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 20:14:39.241478 Initialized TPM device CR50 revision 0
277 20:14:39.297324 tlcl_send_startup: Startup return code is 0
278 20:14:39.297472 TPM: setup succeeded
279 20:14:39.311728 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 20:14:39.326399 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 20:14:39.338867 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 20:14:39.348899 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 20:14:39.352298 Chrome EC: UHEPI supported
284 20:14:39.355882 Phase 1
285 20:14:39.358718 FMAP: area GBB found @ 1805000 (458752 bytes)
286 20:14:39.369484 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 20:14:39.375712 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 20:14:39.381929 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 20:14:39.388800 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 20:14:39.392549 Recovery requested (1009000e)
291 20:14:39.395410 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 20:14:39.407092 tlcl_extend: response is 0
293 20:14:39.413464 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 20:14:39.423415 tlcl_extend: response is 0
295 20:14:39.430368 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 20:14:39.437073 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 20:14:39.443230 BS: verstage times (exec / console): total (unknown) / 142 ms
298 20:14:39.443325
299 20:14:39.443403
300 20:14:39.457527 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 20:14:39.463229 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 20:14:39.466908 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 20:14:39.470153 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 20:14:39.476716 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 20:14:39.479743 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 20:14:39.483591 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 20:14:39.486719 TCO_STS: 0000 0000
308 20:14:39.489806 GEN_PMCON: d0015038 00002200
309 20:14:39.493366 GBLRST_CAUSE: 00000000 00000000
310 20:14:39.493461 HPR_CAUSE0: 00000000
311 20:14:39.496734 prev_sleep_state 5
312 20:14:39.500207 Boot Count incremented to 23635
313 20:14:39.506898 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 20:14:39.513690 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 20:14:39.520065 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 20:14:39.526616 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 20:14:39.531360 Chrome EC: UHEPI supported
318 20:14:39.538385 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 20:14:39.550815 Probing TPM: done!
320 20:14:39.557697 Connected to device vid:did:rid of 1ae0:0028:00
321 20:14:39.567600 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
322 20:14:39.570841 Initialized TPM device CR50 revision 0
323 20:14:39.585718 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 20:14:39.592634 MRC: Hash idx 0x100b comparison successful.
325 20:14:39.595799 MRC cache found, size faa8
326 20:14:39.595936 bootmode is set to: 2
327 20:14:39.599311 SPD index = 2
328 20:14:39.606589 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 20:14:39.609359 SPD: module type is LPDDR4X
330 20:14:39.612598 SPD: module part number is MT53D1G64D4NW-046
331 20:14:39.619160 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
332 20:14:39.622443 SPD: device width 16 bits, bus width 16 bits
333 20:14:39.629434 SPD: module size is 2048 MB (per channel)
334 20:14:40.057831 CBMEM:
335 20:14:40.061047 IMD: root @ 0x76fff000 254 entries.
336 20:14:40.064204 IMD: root @ 0x76ffec00 62 entries.
337 20:14:40.067974 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 20:14:40.074425 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 20:14:40.077825 External stage cache:
340 20:14:40.080963 IMD: root @ 0x7b3ff000 254 entries.
341 20:14:40.084198 IMD: root @ 0x7b3fec00 62 entries.
342 20:14:40.099728 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 20:14:40.106127 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 20:14:40.113041 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 20:14:40.126115 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 20:14:40.132729 cse_lite: Skip switching to RW in the recovery path
347 20:14:40.132850 8 DIMMs found
348 20:14:40.132928 SMM Memory Map
349 20:14:40.136346 SMRAM : 0x7b000000 0x800000
350 20:14:40.139433 Subregion 0: 0x7b000000 0x200000
351 20:14:40.145946 Subregion 1: 0x7b200000 0x200000
352 20:14:40.149318 Subregion 2: 0x7b400000 0x400000
353 20:14:40.149414 top_of_ram = 0x77000000
354 20:14:40.156032 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 20:14:40.162290 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 20:14:40.165929 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 20:14:40.172476 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 20:14:40.179476 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 20:14:40.186020 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 20:14:40.195695 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 20:14:40.199154 Processing 211 relocs. Offset value of 0x74c0b000
362 20:14:40.208578 BS: romstage times (exec / console): total (unknown) / 277 ms
363 20:14:40.215345
364 20:14:40.215482
365 20:14:40.225777 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 20:14:40.228729 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 20:14:40.235248 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 20:14:40.245241 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 20:14:40.251712 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 20:14:40.258717 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 20:14:40.301559 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 20:14:40.307834 Processing 5008 relocs. Offset value of 0x75d98000
373 20:14:40.311576 BS: postcar times (exec / console): total (unknown) / 59 ms
374 20:14:40.314706
375 20:14:40.314808
376 20:14:40.324344 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 20:14:40.324449 Normal boot
378 20:14:40.328046 FW_CONFIG value is 0x804c02
379 20:14:40.331490 PCI: 00:07.0 disabled by fw_config
380 20:14:40.334916 PCI: 00:07.1 disabled by fw_config
381 20:14:40.337667 PCI: 00:0d.2 disabled by fw_config
382 20:14:40.341650 PCI: 00:1c.7 disabled by fw_config
383 20:14:40.348108 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 20:14:40.354494 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 20:14:40.357548 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 20:14:40.361473 GENERIC: 0.0 disabled by fw_config
387 20:14:40.367863 GENERIC: 1.0 disabled by fw_config
388 20:14:40.371076 fw_config match found: DB_USB=USB3_ACTIVE
389 20:14:40.374304 fw_config match found: DB_USB=USB3_ACTIVE
390 20:14:40.377639 fw_config match found: DB_USB=USB3_ACTIVE
391 20:14:40.384042 fw_config match found: DB_USB=USB3_ACTIVE
392 20:14:40.387378 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 20:14:40.394722 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 20:14:40.403802 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 20:14:40.410860 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 20:14:40.414042 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 20:14:40.420982 microcode: Update skipped, already up-to-date
398 20:14:40.427187 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 20:14:40.454802 Detected 4 core, 8 thread CPU.
400 20:14:40.457969 Setting up SMI for CPU
401 20:14:40.461625 IED base = 0x7b400000
402 20:14:40.461729 IED size = 0x00400000
403 20:14:40.464818 Will perform SMM setup.
404 20:14:40.471894 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
405 20:14:40.478370 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 20:14:40.484932 Processing 16 relocs. Offset value of 0x00030000
407 20:14:40.488223 Attempting to start 7 APs
408 20:14:40.491349 Waiting for 10ms after sending INIT.
409 20:14:40.506830 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 20:14:40.506950 done.
411 20:14:40.510462 AP: slot 2 apic_id 3.
412 20:14:40.513570 AP: slot 6 apic_id 2.
413 20:14:40.513666 AP: slot 3 apic_id 7.
414 20:14:40.520273 Waiting for 2nd SIPI to complete...done.
415 20:14:40.520371 AP: slot 4 apic_id 5.
416 20:14:40.523148 AP: slot 5 apic_id 4.
417 20:14:40.527034 AP: slot 7 apic_id 6.
418 20:14:40.533056 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 20:14:40.539650 Processing 13 relocs. Offset value of 0x00038000
420 20:14:40.543276 Unable to locate Global NVS
421 20:14:40.550078 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 20:14:40.553133 Installing permanent SMM handler to 0x7b000000
423 20:14:40.562952 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 20:14:40.566306 Processing 794 relocs. Offset value of 0x7b010000
425 20:14:40.576458 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 20:14:40.579573 Processing 13 relocs. Offset value of 0x7b008000
427 20:14:40.586840 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 20:14:40.592986 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 20:14:40.596058 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 20:14:40.602972 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 20:14:40.609380 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 20:14:40.616461 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 20:14:40.622797 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 20:14:40.622919 Unable to locate Global NVS
435 20:14:40.632570 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 20:14:40.636170 Clearing SMI status registers
437 20:14:40.636275 SMI_STS: PM1
438 20:14:40.639587 PM1_STS: PWRBTN
439 20:14:40.646479 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 20:14:40.650152 In relocation handler: CPU 0
441 20:14:40.652877 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 20:14:40.659678 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 20:14:40.659788 Relocation complete.
444 20:14:40.669873 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 20:14:40.670000 In relocation handler: CPU 1
446 20:14:40.676057 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 20:14:40.676160 Relocation complete.
448 20:14:40.682709 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
449 20:14:40.686775 In relocation handler: CPU 2
450 20:14:40.692520 New SMBASE=0x7afff800 IEDBASE=0x7b400000
451 20:14:40.692686 Relocation complete.
452 20:14:40.699239 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
453 20:14:40.702920 In relocation handler: CPU 6
454 20:14:40.709417 New SMBASE=0x7affe800 IEDBASE=0x7b400000
455 20:14:40.713234 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 20:14:40.716307 Relocation complete.
457 20:14:40.722374 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
458 20:14:40.725918 In relocation handler: CPU 7
459 20:14:40.729153 New SMBASE=0x7affe400 IEDBASE=0x7b400000
460 20:14:40.733319 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 20:14:40.736201 Relocation complete.
462 20:14:40.742644 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
463 20:14:40.746185 In relocation handler: CPU 3
464 20:14:40.749574 New SMBASE=0x7afff400 IEDBASE=0x7b400000
465 20:14:40.753163 Relocation complete.
466 20:14:40.760041 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
467 20:14:40.762708 In relocation handler: CPU 4
468 20:14:40.766719 New SMBASE=0x7afff000 IEDBASE=0x7b400000
469 20:14:40.769376 Relocation complete.
470 20:14:40.776724 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
471 20:14:40.779328 In relocation handler: CPU 5
472 20:14:40.782513 New SMBASE=0x7affec00 IEDBASE=0x7b400000
473 20:14:40.789044 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 20:14:40.789142 Relocation complete.
475 20:14:40.792600 Initializing CPU #0
476 20:14:40.795866 CPU: vendor Intel device 806c1
477 20:14:40.799121 CPU: family 06, model 8c, stepping 01
478 20:14:40.802550 Clearing out pending MCEs
479 20:14:40.805822 Setting up local APIC...
480 20:14:40.805916 apic_id: 0x00 done.
481 20:14:40.809149 Turbo is available but hidden
482 20:14:40.812961 Turbo is available and visible
483 20:14:40.819284 microcode: Update skipped, already up-to-date
484 20:14:40.819404 CPU #0 initialized
485 20:14:40.822169 Initializing CPU #3
486 20:14:40.826023 Initializing CPU #7
487 20:14:40.828871 CPU: vendor Intel device 806c1
488 20:14:40.832584 CPU: family 06, model 8c, stepping 01
489 20:14:40.836167 CPU: vendor Intel device 806c1
490 20:14:40.838680 CPU: family 06, model 8c, stepping 01
491 20:14:40.842219 Clearing out pending MCEs
492 20:14:40.842326 Initializing CPU #6
493 20:14:40.845291 Initializing CPU #2
494 20:14:40.849291 CPU: vendor Intel device 806c1
495 20:14:40.851948 CPU: family 06, model 8c, stepping 01
496 20:14:40.856223 Initializing CPU #5
497 20:14:40.856331 Initializing CPU #4
498 20:14:40.858771 CPU: vendor Intel device 806c1
499 20:14:40.861947 CPU: family 06, model 8c, stepping 01
500 20:14:40.865130 CPU: vendor Intel device 806c1
501 20:14:40.868562 CPU: family 06, model 8c, stepping 01
502 20:14:40.871862 Clearing out pending MCEs
503 20:14:40.875514 Clearing out pending MCEs
504 20:14:40.878593 Setting up local APIC...
505 20:14:40.878694 Setting up local APIC...
506 20:14:40.881890 apic_id: 0x04 done.
507 20:14:40.885867 Setting up local APIC...
508 20:14:40.889053 Clearing out pending MCEs
509 20:14:40.889148 Initializing CPU #1
510 20:14:40.893232 Clearing out pending MCEs
511 20:14:40.893357 apic_id: 0x07 done.
512 20:14:40.896107 Setting up local APIC...
513 20:14:40.899983 apic_id: 0x05 done.
514 20:14:40.903061 CPU: vendor Intel device 806c1
515 20:14:40.906985 CPU: family 06, model 8c, stepping 01
516 20:14:40.909736 Setting up local APIC...
517 20:14:40.909829 Clearing out pending MCEs
518 20:14:40.916193 microcode: Update skipped, already up-to-date
519 20:14:40.919630 microcode: Update skipped, already up-to-date
520 20:14:40.922792 CPU #4 initialized
521 20:14:40.922886 CPU #5 initialized
522 20:14:40.926446 CPU: vendor Intel device 806c1
523 20:14:40.929702 CPU: family 06, model 8c, stepping 01
524 20:14:40.933337 apic_id: 0x02 done.
525 20:14:40.936570 Setting up local APIC...
526 20:14:40.936689 apic_id: 0x06 done.
527 20:14:40.942808 microcode: Update skipped, already up-to-date
528 20:14:40.946301 microcode: Update skipped, already up-to-date
529 20:14:40.949621 CPU #3 initialized
530 20:14:40.949730 CPU #7 initialized
531 20:14:40.952607 Clearing out pending MCEs
532 20:14:40.959796 microcode: Update skipped, already up-to-date
533 20:14:40.959890 apic_id: 0x03 done.
534 20:14:40.962906 CPU #6 initialized
535 20:14:40.966527 microcode: Update skipped, already up-to-date
536 20:14:40.969610 Setting up local APIC...
537 20:14:40.972820 CPU #2 initialized
538 20:14:40.972915 apic_id: 0x01 done.
539 20:14:40.979220 microcode: Update skipped, already up-to-date
540 20:14:40.979322 CPU #1 initialized
541 20:14:40.985846 bsp_do_flight_plan done after 461 msecs.
542 20:14:40.985940 CPU: frequency set to 4400 MHz
543 20:14:40.988986 Enabling SMIs.
544 20:14:40.996573 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 20:14:41.011401 SATAXPCIE1 indicates PCIe NVMe is present
546 20:14:41.014683 Probing TPM: done!
547 20:14:41.018070 Connected to device vid:did:rid of 1ae0:0028:00
548 20:14:41.029184 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
549 20:14:41.032467 Initialized TPM device CR50 revision 0
550 20:14:41.035463 Enabling S0i3.4
551 20:14:41.042506 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 20:14:41.045646 Found a VBT of 8704 bytes after decompression
553 20:14:41.052467 cse_lite: CSE RO boot. HybridStorageMode disabled
554 20:14:41.058637 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 20:14:41.134218 FSPS returned 0
556 20:14:41.137108 Executing Phase 1 of FspMultiPhaseSiInit
557 20:14:41.146489 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 20:14:41.149755 port C0 DISC req: usage 1 usb3 1 usb2 5
559 20:14:41.153147 Raw Buffer output 0 00000511
560 20:14:41.156809 Raw Buffer output 1 00000000
561 20:14:41.160238 pmc_send_ipc_cmd succeeded
562 20:14:41.167111 port C1 DISC req: usage 1 usb3 2 usb2 3
563 20:14:41.167207 Raw Buffer output 0 00000321
564 20:14:41.170144 Raw Buffer output 1 00000000
565 20:14:41.174578 pmc_send_ipc_cmd succeeded
566 20:14:41.179827 Detected 4 core, 8 thread CPU.
567 20:14:41.183074 Detected 4 core, 8 thread CPU.
568 20:14:41.383102 Display FSP Version Info HOB
569 20:14:41.386671 Reference Code - CPU = a.0.4c.31
570 20:14:41.389624 uCode Version = 0.0.0.86
571 20:14:41.393391 TXT ACM version = ff.ff.ff.ffff
572 20:14:41.396407 Reference Code - ME = a.0.4c.31
573 20:14:41.399942 MEBx version = 0.0.0.0
574 20:14:41.403178 ME Firmware Version = Consumer SKU
575 20:14:41.406662 Reference Code - PCH = a.0.4c.31
576 20:14:41.410575 PCH-CRID Status = Disabled
577 20:14:41.413168 PCH-CRID Original Value = ff.ff.ff.ffff
578 20:14:41.416509 PCH-CRID New Value = ff.ff.ff.ffff
579 20:14:41.419728 OPROM - RST - RAID = ff.ff.ff.ffff
580 20:14:41.423637 PCH Hsio Version = 4.0.0.0
581 20:14:41.426715 Reference Code - SA - System Agent = a.0.4c.31
582 20:14:41.429508 Reference Code - MRC = 2.0.0.1
583 20:14:41.433467 SA - PCIe Version = a.0.4c.31
584 20:14:41.436292 SA-CRID Status = Disabled
585 20:14:41.439815 SA-CRID Original Value = 0.0.0.1
586 20:14:41.442976 SA-CRID New Value = 0.0.0.1
587 20:14:41.447160 OPROM - VBIOS = ff.ff.ff.ffff
588 20:14:41.450018 IO Manageability Engine FW Version = 11.1.4.0
589 20:14:41.453158 PHY Build Version = 0.0.0.e0
590 20:14:41.456121 Thunderbolt(TM) FW Version = 0.0.0.0
591 20:14:41.462907 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 20:14:41.467154 ITSS IRQ Polarities Before:
593 20:14:41.467248 IPC0: 0xffffffff
594 20:14:41.470390 IPC1: 0xffffffff
595 20:14:41.470485 IPC2: 0xffffffff
596 20:14:41.474409 IPC3: 0xffffffff
597 20:14:41.474501 ITSS IRQ Polarities After:
598 20:14:41.477663 IPC0: 0xffffffff
599 20:14:41.477755 IPC1: 0xffffffff
600 20:14:41.481255 IPC2: 0xffffffff
601 20:14:41.481348 IPC3: 0xffffffff
602 20:14:41.487702 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 20:14:41.497345 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 20:14:41.511017 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 20:14:41.520877 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 20:14:41.527372 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
607 20:14:41.530542 Enumerating buses...
608 20:14:41.534256 Show all devs... Before device enumeration.
609 20:14:41.537436 Root Device: enabled 1
610 20:14:41.540591 DOMAIN: 0000: enabled 1
611 20:14:41.543745 CPU_CLUSTER: 0: enabled 1
612 20:14:41.543838 PCI: 00:00.0: enabled 1
613 20:14:41.547763 PCI: 00:02.0: enabled 1
614 20:14:41.550633 PCI: 00:04.0: enabled 1
615 20:14:41.553770 PCI: 00:05.0: enabled 1
616 20:14:41.553863 PCI: 00:06.0: enabled 0
617 20:14:41.556889 PCI: 00:07.0: enabled 0
618 20:14:41.560796 PCI: 00:07.1: enabled 0
619 20:14:41.563614 PCI: 00:07.2: enabled 0
620 20:14:41.563708 PCI: 00:07.3: enabled 0
621 20:14:41.567015 PCI: 00:08.0: enabled 1
622 20:14:41.570379 PCI: 00:09.0: enabled 0
623 20:14:41.573891 PCI: 00:0a.0: enabled 0
624 20:14:41.573984 PCI: 00:0d.0: enabled 1
625 20:14:41.577318 PCI: 00:0d.1: enabled 0
626 20:14:41.580738 PCI: 00:0d.2: enabled 0
627 20:14:41.580830 PCI: 00:0d.3: enabled 0
628 20:14:41.583541 PCI: 00:0e.0: enabled 0
629 20:14:41.587111 PCI: 00:10.2: enabled 1
630 20:14:41.590119 PCI: 00:10.6: enabled 0
631 20:14:41.590214 PCI: 00:10.7: enabled 0
632 20:14:41.594431 PCI: 00:12.0: enabled 0
633 20:14:41.597520 PCI: 00:12.6: enabled 0
634 20:14:41.600679 PCI: 00:13.0: enabled 0
635 20:14:41.600775 PCI: 00:14.0: enabled 1
636 20:14:41.603363 PCI: 00:14.1: enabled 0
637 20:14:41.606847 PCI: 00:14.2: enabled 1
638 20:14:41.610200 PCI: 00:14.3: enabled 1
639 20:14:41.610294 PCI: 00:15.0: enabled 1
640 20:14:41.613349 PCI: 00:15.1: enabled 1
641 20:14:41.616909 PCI: 00:15.2: enabled 1
642 20:14:41.617002 PCI: 00:15.3: enabled 1
643 20:14:41.620640 PCI: 00:16.0: enabled 1
644 20:14:41.623570 PCI: 00:16.1: enabled 0
645 20:14:41.626673 PCI: 00:16.2: enabled 0
646 20:14:41.626766 PCI: 00:16.3: enabled 0
647 20:14:41.630532 PCI: 00:16.4: enabled 0
648 20:14:41.633713 PCI: 00:16.5: enabled 0
649 20:14:41.636771 PCI: 00:17.0: enabled 1
650 20:14:41.636864 PCI: 00:19.0: enabled 0
651 20:14:41.640044 PCI: 00:19.1: enabled 1
652 20:14:41.643316 PCI: 00:19.2: enabled 0
653 20:14:41.646828 PCI: 00:1c.0: enabled 1
654 20:14:41.646921 PCI: 00:1c.1: enabled 0
655 20:14:41.649875 PCI: 00:1c.2: enabled 0
656 20:14:41.653217 PCI: 00:1c.3: enabled 0
657 20:14:41.653309 PCI: 00:1c.4: enabled 0
658 20:14:41.656829 PCI: 00:1c.5: enabled 0
659 20:14:41.659985 PCI: 00:1c.6: enabled 1
660 20:14:41.663366 PCI: 00:1c.7: enabled 0
661 20:14:41.663459 PCI: 00:1d.0: enabled 1
662 20:14:41.666810 PCI: 00:1d.1: enabled 0
663 20:14:41.670145 PCI: 00:1d.2: enabled 1
664 20:14:41.673288 PCI: 00:1d.3: enabled 0
665 20:14:41.673382 PCI: 00:1e.0: enabled 1
666 20:14:41.676550 PCI: 00:1e.1: enabled 0
667 20:14:41.680805 PCI: 00:1e.2: enabled 1
668 20:14:41.683710 PCI: 00:1e.3: enabled 1
669 20:14:41.683803 PCI: 00:1f.0: enabled 1
670 20:14:41.686552 PCI: 00:1f.1: enabled 0
671 20:14:41.690027 PCI: 00:1f.2: enabled 1
672 20:14:41.693163 PCI: 00:1f.3: enabled 1
673 20:14:41.693257 PCI: 00:1f.4: enabled 0
674 20:14:41.696425 PCI: 00:1f.5: enabled 1
675 20:14:41.699819 PCI: 00:1f.6: enabled 0
676 20:14:41.699911 PCI: 00:1f.7: enabled 0
677 20:14:41.703539 APIC: 00: enabled 1
678 20:14:41.706933 GENERIC: 0.0: enabled 1
679 20:14:41.709954 GENERIC: 0.0: enabled 1
680 20:14:41.710047 GENERIC: 1.0: enabled 1
681 20:14:41.713310 GENERIC: 0.0: enabled 1
682 20:14:41.716808 GENERIC: 1.0: enabled 1
683 20:14:41.716903 USB0 port 0: enabled 1
684 20:14:41.719993 GENERIC: 0.0: enabled 1
685 20:14:41.723039 USB0 port 0: enabled 1
686 20:14:41.726245 GENERIC: 0.0: enabled 1
687 20:14:41.726340 I2C: 00:1a: enabled 1
688 20:14:41.729793 I2C: 00:31: enabled 1
689 20:14:41.733301 I2C: 00:32: enabled 1
690 20:14:41.733395 I2C: 00:10: enabled 1
691 20:14:41.736538 I2C: 00:15: enabled 1
692 20:14:41.739818 GENERIC: 0.0: enabled 0
693 20:14:41.739912 GENERIC: 1.0: enabled 0
694 20:14:41.743060 GENERIC: 0.0: enabled 1
695 20:14:41.746725 SPI: 00: enabled 1
696 20:14:41.746819 SPI: 00: enabled 1
697 20:14:41.750094 PNP: 0c09.0: enabled 1
698 20:14:41.752717 GENERIC: 0.0: enabled 1
699 20:14:41.756719 USB3 port 0: enabled 1
700 20:14:41.756817 USB3 port 1: enabled 1
701 20:14:41.759717 USB3 port 2: enabled 0
702 20:14:41.762902 USB3 port 3: enabled 0
703 20:14:41.763000 USB2 port 0: enabled 0
704 20:14:41.766303 USB2 port 1: enabled 1
705 20:14:41.769537 USB2 port 2: enabled 1
706 20:14:41.769663 USB2 port 3: enabled 0
707 20:14:41.773144 USB2 port 4: enabled 1
708 20:14:41.776312 USB2 port 5: enabled 0
709 20:14:41.780200 USB2 port 6: enabled 0
710 20:14:41.780326 USB2 port 7: enabled 0
711 20:14:41.782868 USB2 port 8: enabled 0
712 20:14:41.786317 USB2 port 9: enabled 0
713 20:14:41.786446 USB3 port 0: enabled 0
714 20:14:41.789361 USB3 port 1: enabled 1
715 20:14:41.793047 USB3 port 2: enabled 0
716 20:14:41.796190 USB3 port 3: enabled 0
717 20:14:41.796315 GENERIC: 0.0: enabled 1
718 20:14:41.799828 GENERIC: 1.0: enabled 1
719 20:14:41.802873 APIC: 01: enabled 1
720 20:14:41.802971 APIC: 03: enabled 1
721 20:14:41.806062 APIC: 07: enabled 1
722 20:14:41.806160 APIC: 05: enabled 1
723 20:14:41.809191 APIC: 04: enabled 1
724 20:14:41.812551 APIC: 02: enabled 1
725 20:14:41.812676 APIC: 06: enabled 1
726 20:14:41.816139 Compare with tree...
727 20:14:41.819515 Root Device: enabled 1
728 20:14:41.819610 DOMAIN: 0000: enabled 1
729 20:14:41.823225 PCI: 00:00.0: enabled 1
730 20:14:41.825885 PCI: 00:02.0: enabled 1
731 20:14:41.829583 PCI: 00:04.0: enabled 1
732 20:14:41.832828 GENERIC: 0.0: enabled 1
733 20:14:41.832921 PCI: 00:05.0: enabled 1
734 20:14:41.836423 PCI: 00:06.0: enabled 0
735 20:14:41.839463 PCI: 00:07.0: enabled 0
736 20:14:41.842677 GENERIC: 0.0: enabled 1
737 20:14:41.846199 PCI: 00:07.1: enabled 0
738 20:14:41.846293 GENERIC: 1.0: enabled 1
739 20:14:41.849830 PCI: 00:07.2: enabled 0
740 20:14:41.853115 GENERIC: 0.0: enabled 1
741 20:14:41.855967 PCI: 00:07.3: enabled 0
742 20:14:41.859362 GENERIC: 1.0: enabled 1
743 20:14:41.862660 PCI: 00:08.0: enabled 1
744 20:14:41.862753 PCI: 00:09.0: enabled 0
745 20:14:41.865964 PCI: 00:0a.0: enabled 0
746 20:14:41.869442 PCI: 00:0d.0: enabled 1
747 20:14:41.872260 USB0 port 0: enabled 1
748 20:14:41.875999 USB3 port 0: enabled 1
749 20:14:41.876092 USB3 port 1: enabled 1
750 20:14:41.879624 USB3 port 2: enabled 0
751 20:14:41.883766 USB3 port 3: enabled 0
752 20:14:41.886338 PCI: 00:0d.1: enabled 0
753 20:14:41.889172 PCI: 00:0d.2: enabled 0
754 20:14:41.889265 GENERIC: 0.0: enabled 1
755 20:14:41.893116 PCI: 00:0d.3: enabled 0
756 20:14:41.895858 PCI: 00:0e.0: enabled 0
757 20:14:41.899306 PCI: 00:10.2: enabled 1
758 20:14:41.902407 PCI: 00:10.6: enabled 0
759 20:14:41.902501 PCI: 00:10.7: enabled 0
760 20:14:41.905896 PCI: 00:12.0: enabled 0
761 20:14:41.909031 PCI: 00:12.6: enabled 0
762 20:14:41.912357 PCI: 00:13.0: enabled 0
763 20:14:41.915574 PCI: 00:14.0: enabled 1
764 20:14:41.915672 USB0 port 0: enabled 1
765 20:14:41.918707 USB2 port 0: enabled 0
766 20:14:41.922618 USB2 port 1: enabled 1
767 20:14:41.925769 USB2 port 2: enabled 1
768 20:14:41.929028 USB2 port 3: enabled 0
769 20:14:41.929137 USB2 port 4: enabled 1
770 20:14:41.932462 USB2 port 5: enabled 0
771 20:14:41.935545 USB2 port 6: enabled 0
772 20:14:41.939406 USB2 port 7: enabled 0
773 20:14:41.942620 USB2 port 8: enabled 0
774 20:14:41.945703 USB2 port 9: enabled 0
775 20:14:41.945803 USB3 port 0: enabled 0
776 20:14:41.949032 USB3 port 1: enabled 1
777 20:14:41.952229 USB3 port 2: enabled 0
778 20:14:41.955826 USB3 port 3: enabled 0
779 20:14:41.958993 PCI: 00:14.1: enabled 0
780 20:14:41.959169 PCI: 00:14.2: enabled 1
781 20:14:41.962457 PCI: 00:14.3: enabled 1
782 20:14:41.965314 GENERIC: 0.0: enabled 1
783 20:14:41.968909 PCI: 00:15.0: enabled 1
784 20:14:41.972226 I2C: 00:1a: enabled 1
785 20:14:41.972319 I2C: 00:31: enabled 1
786 20:14:41.975504 I2C: 00:32: enabled 1
787 20:14:41.978833 PCI: 00:15.1: enabled 1
788 20:14:41.982394 I2C: 00:10: enabled 1
789 20:14:41.985897 PCI: 00:15.2: enabled 1
790 20:14:41.986083 PCI: 00:15.3: enabled 1
791 20:14:41.989021 PCI: 00:16.0: enabled 1
792 20:14:41.992127 PCI: 00:16.1: enabled 0
793 20:14:41.995656 PCI: 00:16.2: enabled 0
794 20:14:41.995790 PCI: 00:16.3: enabled 0
795 20:14:41.999094 PCI: 00:16.4: enabled 0
796 20:14:42.001984 PCI: 00:16.5: enabled 0
797 20:14:42.005241 PCI: 00:17.0: enabled 1
798 20:14:42.008828 PCI: 00:19.0: enabled 0
799 20:14:42.009149 PCI: 00:19.1: enabled 1
800 20:14:42.012425 I2C: 00:15: enabled 1
801 20:14:42.015477 PCI: 00:19.2: enabled 0
802 20:14:42.018906 PCI: 00:1d.0: enabled 1
803 20:14:42.022077 GENERIC: 0.0: enabled 1
804 20:14:42.022512 PCI: 00:1e.0: enabled 1
805 20:14:42.025874 PCI: 00:1e.1: enabled 0
806 20:14:42.028692 PCI: 00:1e.2: enabled 1
807 20:14:42.032487 SPI: 00: enabled 1
808 20:14:42.033029 PCI: 00:1e.3: enabled 1
809 20:14:42.035235 SPI: 00: enabled 1
810 20:14:42.039827 PCI: 00:1f.0: enabled 1
811 20:14:42.042093 PNP: 0c09.0: enabled 1
812 20:14:42.045274 PCI: 00:1f.1: enabled 0
813 20:14:42.045677 PCI: 00:1f.2: enabled 1
814 20:14:42.048590 GENERIC: 0.0: enabled 1
815 20:14:42.052150 GENERIC: 0.0: enabled 1
816 20:14:42.055741 GENERIC: 1.0: enabled 1
817 20:14:42.059362 PCI: 00:1f.3: enabled 1
818 20:14:42.059765 PCI: 00:1f.4: enabled 0
819 20:14:42.061917 PCI: 00:1f.5: enabled 1
820 20:14:42.065544 PCI: 00:1f.6: enabled 0
821 20:14:42.068522 PCI: 00:1f.7: enabled 0
822 20:14:42.071715 CPU_CLUSTER: 0: enabled 1
823 20:14:42.072093 APIC: 00: enabled 1
824 20:14:42.075833 APIC: 01: enabled 1
825 20:14:42.078423 APIC: 03: enabled 1
826 20:14:42.078793 APIC: 07: enabled 1
827 20:14:42.082022 APIC: 05: enabled 1
828 20:14:42.133982 APIC: 04: enabled 1
829 20:14:42.134515 APIC: 02: enabled 1
830 20:14:42.134874 APIC: 06: enabled 1
831 20:14:42.135237 Root Device scanning...
832 20:14:42.135547 scan_static_bus for Root Device
833 20:14:42.136165 DOMAIN: 0000 enabled
834 20:14:42.136658 CPU_CLUSTER: 0 enabled
835 20:14:42.136962 DOMAIN: 0000 scanning...
836 20:14:42.137236 PCI: pci_scan_bus for bus 00
837 20:14:42.137504 PCI: 00:00.0 [8086/0000] ops
838 20:14:42.137788 PCI: 00:00.0 [8086/9a12] enabled
839 20:14:42.138077 PCI: 00:02.0 [8086/0000] bus ops
840 20:14:42.138347 PCI: 00:02.0 [8086/9a40] enabled
841 20:14:42.138602 PCI: 00:04.0 [8086/0000] bus ops
842 20:14:42.138861 PCI: 00:04.0 [8086/9a03] enabled
843 20:14:42.139119 PCI: 00:05.0 [8086/9a19] enabled
844 20:14:42.139453 PCI: 00:07.0 [0000/0000] hidden
845 20:14:42.150375 PCI: 00:08.0 [8086/9a11] enabled
846 20:14:42.150852 PCI: 00:0a.0 [8086/9a0d] disabled
847 20:14:42.151530 PCI: 00:0d.0 [8086/0000] bus ops
848 20:14:42.151852 PCI: 00:0d.0 [8086/9a13] enabled
849 20:14:42.154502 PCI: 00:14.0 [8086/0000] bus ops
850 20:14:42.154991 PCI: 00:14.0 [8086/a0ed] enabled
851 20:14:42.157288 PCI: 00:14.2 [8086/a0ef] enabled
852 20:14:42.160879 PCI: 00:14.3 [8086/0000] bus ops
853 20:14:42.164681 PCI: 00:14.3 [8086/a0f0] enabled
854 20:14:42.167281 PCI: 00:15.0 [8086/0000] bus ops
855 20:14:42.170532 PCI: 00:15.0 [8086/a0e8] enabled
856 20:14:42.174115 PCI: 00:15.1 [8086/0000] bus ops
857 20:14:42.177144 PCI: 00:15.1 [8086/a0e9] enabled
858 20:14:42.180365 PCI: 00:15.2 [8086/0000] bus ops
859 20:14:42.183755 PCI: 00:15.2 [8086/a0ea] enabled
860 20:14:42.187609 PCI: 00:15.3 [8086/0000] bus ops
861 20:14:42.191202 PCI: 00:15.3 [8086/a0eb] enabled
862 20:14:42.194407 PCI: 00:16.0 [8086/0000] ops
863 20:14:42.197059 PCI: 00:16.0 [8086/a0e0] enabled
864 20:14:42.200528 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 20:14:42.204264 PCI: 00:19.0 [8086/0000] bus ops
866 20:14:42.207953 PCI: 00:19.0 [8086/a0c5] disabled
867 20:14:42.210400 PCI: 00:19.1 [8086/0000] bus ops
868 20:14:42.213804 PCI: 00:19.1 [8086/a0c6] enabled
869 20:14:42.217218 PCI: 00:1d.0 [8086/0000] bus ops
870 20:14:42.220252 PCI: 00:1d.0 [8086/a0b0] enabled
871 20:14:42.224354 PCI: 00:1e.0 [8086/0000] ops
872 20:14:42.227349 PCI: 00:1e.0 [8086/a0a8] enabled
873 20:14:42.230294 PCI: 00:1e.2 [8086/0000] bus ops
874 20:14:42.233646 PCI: 00:1e.2 [8086/a0aa] enabled
875 20:14:42.236879 PCI: 00:1e.3 [8086/0000] bus ops
876 20:14:42.240127 PCI: 00:1e.3 [8086/a0ab] enabled
877 20:14:42.243646 PCI: 00:1f.0 [8086/0000] bus ops
878 20:14:42.247409 PCI: 00:1f.0 [8086/a087] enabled
879 20:14:42.247882 RTC Init
880 20:14:42.254468 Set power on after power failure.
881 20:14:42.254969 Disabling Deep S3
882 20:14:42.257161 Disabling Deep S3
883 20:14:42.257667 Disabling Deep S4
884 20:14:42.260907 Disabling Deep S4
885 20:14:42.261304 Disabling Deep S5
886 20:14:42.263769 Disabling Deep S5
887 20:14:42.267060 PCI: 00:1f.2 [0000/0000] hidden
888 20:14:42.270392 PCI: 00:1f.3 [8086/0000] bus ops
889 20:14:42.273650 PCI: 00:1f.3 [8086/a0c8] enabled
890 20:14:42.277474 PCI: 00:1f.5 [8086/0000] bus ops
891 20:14:42.280587 PCI: 00:1f.5 [8086/a0a4] enabled
892 20:14:42.284159 PCI: Leftover static devices:
893 20:14:42.284521 PCI: 00:10.2
894 20:14:42.287094 PCI: 00:10.6
895 20:14:42.287453 PCI: 00:10.7
896 20:14:42.287735 PCI: 00:06.0
897 20:14:42.290668 PCI: 00:07.1
898 20:14:42.291027 PCI: 00:07.2
899 20:14:42.293980 PCI: 00:07.3
900 20:14:42.294440 PCI: 00:09.0
901 20:14:42.297097 PCI: 00:0d.1
902 20:14:42.297557 PCI: 00:0d.2
903 20:14:42.297854 PCI: 00:0d.3
904 20:14:42.300463 PCI: 00:0e.0
905 20:14:42.300955 PCI: 00:12.0
906 20:14:42.303668 PCI: 00:12.6
907 20:14:42.304031 PCI: 00:13.0
908 20:14:42.304324 PCI: 00:14.1
909 20:14:42.307081 PCI: 00:16.1
910 20:14:42.307448 PCI: 00:16.2
911 20:14:42.310748 PCI: 00:16.3
912 20:14:42.311241 PCI: 00:16.4
913 20:14:42.311548 PCI: 00:16.5
914 20:14:42.314084 PCI: 00:17.0
915 20:14:42.314561 PCI: 00:19.2
916 20:14:42.316977 PCI: 00:1e.1
917 20:14:42.317483 PCI: 00:1f.1
918 20:14:42.320871 PCI: 00:1f.4
919 20:14:42.321354 PCI: 00:1f.6
920 20:14:42.321656 PCI: 00:1f.7
921 20:14:42.324133 PCI: Check your devicetree.cb.
922 20:14:42.327204 PCI: 00:02.0 scanning...
923 20:14:42.330216 scan_generic_bus for PCI: 00:02.0
924 20:14:42.333566 scan_generic_bus for PCI: 00:02.0 done
925 20:14:42.340586 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 20:14:42.343948 PCI: 00:04.0 scanning...
927 20:14:42.346858 scan_generic_bus for PCI: 00:04.0
928 20:14:42.347248 GENERIC: 0.0 enabled
929 20:14:42.353944 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 20:14:42.360446 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 20:14:42.360877 PCI: 00:0d.0 scanning...
932 20:14:42.363561 scan_static_bus for PCI: 00:0d.0
933 20:14:42.366885 USB0 port 0 enabled
934 20:14:42.370324 USB0 port 0 scanning...
935 20:14:42.373625 scan_static_bus for USB0 port 0
936 20:14:42.374026 USB3 port 0 enabled
937 20:14:42.376776 USB3 port 1 enabled
938 20:14:42.380145 USB3 port 2 disabled
939 20:14:42.380699 USB3 port 3 disabled
940 20:14:42.383572 USB3 port 0 scanning...
941 20:14:42.387287 scan_static_bus for USB3 port 0
942 20:14:42.390478 scan_static_bus for USB3 port 0 done
943 20:14:42.396897 scan_bus: bus USB3 port 0 finished in 6 msecs
944 20:14:42.397372 USB3 port 1 scanning...
945 20:14:42.400139 scan_static_bus for USB3 port 1
946 20:14:42.403812 scan_static_bus for USB3 port 1 done
947 20:14:42.410254 scan_bus: bus USB3 port 1 finished in 6 msecs
948 20:14:42.413403 scan_static_bus for USB0 port 0 done
949 20:14:42.416946 scan_bus: bus USB0 port 0 finished in 43 msecs
950 20:14:42.420804 scan_static_bus for PCI: 00:0d.0 done
951 20:14:42.426439 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 20:14:42.430171 PCI: 00:14.0 scanning...
953 20:14:42.433700 scan_static_bus for PCI: 00:14.0
954 20:14:42.434093 USB0 port 0 enabled
955 20:14:42.436590 USB0 port 0 scanning...
956 20:14:42.440007 scan_static_bus for USB0 port 0
957 20:14:42.443658 USB2 port 0 disabled
958 20:14:42.444024 USB2 port 1 enabled
959 20:14:42.447149 USB2 port 2 enabled
960 20:14:42.449965 USB2 port 3 disabled
961 20:14:42.450329 USB2 port 4 enabled
962 20:14:42.453282 USB2 port 5 disabled
963 20:14:42.457119 USB2 port 6 disabled
964 20:14:42.457488 USB2 port 7 disabled
965 20:14:42.459781 USB2 port 8 disabled
966 20:14:42.463420 USB2 port 9 disabled
967 20:14:42.463765 USB3 port 0 disabled
968 20:14:42.466903 USB3 port 1 enabled
969 20:14:42.467382 USB3 port 2 disabled
970 20:14:42.470109 USB3 port 3 disabled
971 20:14:42.473151 USB2 port 1 scanning...
972 20:14:42.476685 scan_static_bus for USB2 port 1
973 20:14:42.480143 scan_static_bus for USB2 port 1 done
974 20:14:42.483402 scan_bus: bus USB2 port 1 finished in 6 msecs
975 20:14:42.486398 USB2 port 2 scanning...
976 20:14:42.490090 scan_static_bus for USB2 port 2
977 20:14:42.492965 scan_static_bus for USB2 port 2 done
978 20:14:42.499560 scan_bus: bus USB2 port 2 finished in 6 msecs
979 20:14:42.500265 USB2 port 4 scanning...
980 20:14:42.503286 scan_static_bus for USB2 port 4
981 20:14:42.509991 scan_static_bus for USB2 port 4 done
982 20:14:42.512940 scan_bus: bus USB2 port 4 finished in 6 msecs
983 20:14:42.516741 USB3 port 1 scanning...
984 20:14:42.519499 scan_static_bus for USB3 port 1
985 20:14:42.523393 scan_static_bus for USB3 port 1 done
986 20:14:42.526713 scan_bus: bus USB3 port 1 finished in 6 msecs
987 20:14:42.530082 scan_static_bus for USB0 port 0 done
988 20:14:42.536251 scan_bus: bus USB0 port 0 finished in 93 msecs
989 20:14:42.539911 scan_static_bus for PCI: 00:14.0 done
990 20:14:42.543120 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
991 20:14:42.546133 PCI: 00:14.3 scanning...
992 20:14:42.549556 scan_static_bus for PCI: 00:14.3
993 20:14:42.553038 GENERIC: 0.0 enabled
994 20:14:42.556109 scan_static_bus for PCI: 00:14.3 done
995 20:14:42.559849 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 20:14:42.563145 PCI: 00:15.0 scanning...
997 20:14:42.566229 scan_static_bus for PCI: 00:15.0
998 20:14:42.569563 I2C: 00:1a enabled
999 20:14:42.569964 I2C: 00:31 enabled
1000 20:14:42.573205 I2C: 00:32 enabled
1001 20:14:42.576113 scan_static_bus for PCI: 00:15.0 done
1002 20:14:42.582921 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 20:14:42.583375 PCI: 00:15.1 scanning...
1004 20:14:42.586817 scan_static_bus for PCI: 00:15.1
1005 20:14:42.589637 I2C: 00:10 enabled
1006 20:14:42.592869 scan_static_bus for PCI: 00:15.1 done
1007 20:14:42.599737 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 20:14:42.600368 PCI: 00:15.2 scanning...
1009 20:14:42.602555 scan_static_bus for PCI: 00:15.2
1010 20:14:42.609357 scan_static_bus for PCI: 00:15.2 done
1011 20:14:42.612684 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 20:14:42.616046 PCI: 00:15.3 scanning...
1013 20:14:42.619193 scan_static_bus for PCI: 00:15.3
1014 20:14:42.622637 scan_static_bus for PCI: 00:15.3 done
1015 20:14:42.626380 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 20:14:42.629496 PCI: 00:19.1 scanning...
1017 20:14:42.632776 scan_static_bus for PCI: 00:19.1
1018 20:14:42.635944 I2C: 00:15 enabled
1019 20:14:42.639276 scan_static_bus for PCI: 00:19.1 done
1020 20:14:42.642774 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 20:14:42.645700 PCI: 00:1d.0 scanning...
1022 20:14:42.649124 do_pci_scan_bridge for PCI: 00:1d.0
1023 20:14:42.652755 PCI: pci_scan_bus for bus 01
1024 20:14:42.656024 PCI: 01:00.0 [15b7/5009] enabled
1025 20:14:42.659457 GENERIC: 0.0 enabled
1026 20:14:42.662889 Enabling Common Clock Configuration
1027 20:14:42.666247 L1 Sub-State supported from root port 29
1028 20:14:42.669021 L1 Sub-State Support = 0x5
1029 20:14:42.672828 CommonModeRestoreTime = 0x28
1030 20:14:42.675637 Power On Value = 0x16, Power On Scale = 0x0
1031 20:14:42.679360 ASPM: Enabled L1
1032 20:14:42.682971 PCIe: Max_Payload_Size adjusted to 128
1033 20:14:42.685839 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 20:14:42.688953 PCI: 00:1e.2 scanning...
1035 20:14:42.692219 scan_generic_bus for PCI: 00:1e.2
1036 20:14:42.695676 SPI: 00 enabled
1037 20:14:42.702227 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 20:14:42.705447 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 20:14:42.709479 PCI: 00:1e.3 scanning...
1040 20:14:42.712272 scan_generic_bus for PCI: 00:1e.3
1041 20:14:42.712839 SPI: 00 enabled
1042 20:14:42.720144 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 20:14:42.723203 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 20:14:42.726691 PCI: 00:1f.0 scanning...
1045 20:14:42.729710 scan_static_bus for PCI: 00:1f.0
1046 20:14:42.733157 PNP: 0c09.0 enabled
1047 20:14:42.736257 PNP: 0c09.0 scanning...
1048 20:14:42.739974 scan_static_bus for PNP: 0c09.0
1049 20:14:42.743427 scan_static_bus for PNP: 0c09.0 done
1050 20:14:42.746564 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 20:14:42.749768 scan_static_bus for PCI: 00:1f.0 done
1052 20:14:42.756237 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 20:14:42.756817 PCI: 00:1f.2 scanning...
1054 20:14:42.759659 scan_static_bus for PCI: 00:1f.2
1055 20:14:42.762869 GENERIC: 0.0 enabled
1056 20:14:42.766380 GENERIC: 0.0 scanning...
1057 20:14:42.769536 scan_static_bus for GENERIC: 0.0
1058 20:14:42.773394 GENERIC: 0.0 enabled
1059 20:14:42.773838 GENERIC: 1.0 enabled
1060 20:14:42.776807 scan_static_bus for GENERIC: 0.0 done
1061 20:14:42.783015 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 20:14:42.786068 scan_static_bus for PCI: 00:1f.2 done
1063 20:14:42.789362 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 20:14:42.793591 PCI: 00:1f.3 scanning...
1065 20:14:42.795975 scan_static_bus for PCI: 00:1f.3
1066 20:14:42.799344 scan_static_bus for PCI: 00:1f.3 done
1067 20:14:42.806008 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 20:14:42.809798 PCI: 00:1f.5 scanning...
1069 20:14:42.812612 scan_generic_bus for PCI: 00:1f.5
1070 20:14:42.816014 scan_generic_bus for PCI: 00:1f.5 done
1071 20:14:42.819625 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 20:14:42.825961 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1073 20:14:42.829636 scan_static_bus for Root Device done
1074 20:14:42.832764 scan_bus: bus Root Device finished in 735 msecs
1075 20:14:42.836210 done
1076 20:14:42.839663 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1077 20:14:42.842790 Chrome EC: UHEPI supported
1078 20:14:42.849592 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 20:14:42.856065 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 20:14:42.859706 SPI flash protection: WPSW=0 SRP0=1
1081 20:14:42.866156 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 20:14:42.869759 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 20:14:42.873037 found VGA at PCI: 00:02.0
1084 20:14:42.876188 Setting up VGA for PCI: 00:02.0
1085 20:14:42.883200 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 20:14:42.887045 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 20:14:42.889419 Allocating resources...
1088 20:14:42.892773 Reading resources...
1089 20:14:42.896257 Root Device read_resources bus 0 link: 0
1090 20:14:42.899620 DOMAIN: 0000 read_resources bus 0 link: 0
1091 20:14:42.906652 PCI: 00:04.0 read_resources bus 1 link: 0
1092 20:14:42.909273 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 20:14:42.916037 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 20:14:42.919383 USB0 port 0 read_resources bus 0 link: 0
1095 20:14:42.926021 USB0 port 0 read_resources bus 0 link: 0 done
1096 20:14:42.929756 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 20:14:42.932663 PCI: 00:14.0 read_resources bus 0 link: 0
1098 20:14:42.939544 USB0 port 0 read_resources bus 0 link: 0
1099 20:14:42.942759 USB0 port 0 read_resources bus 0 link: 0 done
1100 20:14:42.949840 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 20:14:42.953226 PCI: 00:14.3 read_resources bus 0 link: 0
1102 20:14:42.959488 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 20:14:42.962925 PCI: 00:15.0 read_resources bus 0 link: 0
1104 20:14:42.969701 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 20:14:42.973246 PCI: 00:15.1 read_resources bus 0 link: 0
1106 20:14:42.979886 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 20:14:42.983103 PCI: 00:19.1 read_resources bus 0 link: 0
1108 20:14:42.989973 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 20:14:42.993341 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 20:14:42.999833 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 20:14:43.003025 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 20:14:43.010330 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 20:14:43.013486 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 20:14:43.020151 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 20:14:43.023495 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 20:14:43.029926 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 20:14:43.033162 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 20:14:43.036512 GENERIC: 0.0 read_resources bus 0 link: 0
1119 20:14:43.043361 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 20:14:43.046977 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 20:14:43.053934 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 20:14:43.057485 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 20:14:43.063664 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 20:14:43.067037 Root Device read_resources bus 0 link: 0 done
1125 20:14:43.070256 Done reading resources.
1126 20:14:43.076971 Show resources in subtree (Root Device)...After reading.
1127 20:14:43.080692 Root Device child on link 0 DOMAIN: 0000
1128 20:14:43.083937 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 20:14:43.093712 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 20:14:43.103371 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 20:14:43.106974 PCI: 00:00.0
1132 20:14:43.113820 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 20:14:43.123288 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 20:14:43.133666 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 20:14:43.143617 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 20:14:43.153379 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 20:14:43.163212 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 20:14:43.170052 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 20:14:43.179916 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 20:14:43.189711 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 20:14:43.200192 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 20:14:43.209497 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 20:14:43.219775 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 20:14:43.226363 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 20:14:43.236374 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 20:14:43.246502 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 20:14:43.256416 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 20:14:43.266436 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 20:14:43.276015 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 20:14:43.282448 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 20:14:43.292747 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 20:14:43.296466 PCI: 00:02.0
1153 20:14:43.305883 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 20:14:43.315707 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 20:14:43.326019 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 20:14:43.328914 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 20:14:43.339301 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 20:14:43.342778 GENERIC: 0.0
1159 20:14:43.343424 PCI: 00:05.0
1160 20:14:43.352223 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 20:14:43.355821 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 20:14:43.359196 GENERIC: 0.0
1163 20:14:43.362395 PCI: 00:08.0
1164 20:14:43.372030 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 20:14:43.372421 PCI: 00:0a.0
1166 20:14:43.375361 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 20:14:43.385268 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 20:14:43.392331 USB0 port 0 child on link 0 USB3 port 0
1169 20:14:43.392772 USB3 port 0
1170 20:14:43.395470 USB3 port 1
1171 20:14:43.395897 USB3 port 2
1172 20:14:43.399385 USB3 port 3
1173 20:14:43.402241 PCI: 00:14.0 child on link 0 USB0 port 0
1174 20:14:43.412431 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 20:14:43.415627 USB0 port 0 child on link 0 USB2 port 0
1176 20:14:43.419033 USB2 port 0
1177 20:14:43.422331 USB2 port 1
1178 20:14:43.423008 USB2 port 2
1179 20:14:43.425841 USB2 port 3
1180 20:14:43.426265 USB2 port 4
1181 20:14:43.429236 USB2 port 5
1182 20:14:43.429658 USB2 port 6
1183 20:14:43.431988 USB2 port 7
1184 20:14:43.432412 USB2 port 8
1185 20:14:43.436064 USB2 port 9
1186 20:14:43.436573 USB3 port 0
1187 20:14:43.439373 USB3 port 1
1188 20:14:43.439900 USB3 port 2
1189 20:14:43.442317 USB3 port 3
1190 20:14:43.442847 PCI: 00:14.2
1191 20:14:43.452862 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 20:14:43.461754 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 20:14:43.468922 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 20:14:43.478432 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 20:14:43.479026 GENERIC: 0.0
1196 20:14:43.485045 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 20:14:43.495045 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 20:14:43.495546 I2C: 00:1a
1199 20:14:43.498778 I2C: 00:31
1200 20:14:43.499286 I2C: 00:32
1201 20:14:43.502054 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 20:14:43.512516 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 20:14:43.514938 I2C: 00:10
1204 20:14:43.515363 PCI: 00:15.2
1205 20:14:43.525309 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 20:14:43.528509 PCI: 00:15.3
1207 20:14:43.538917 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 20:14:43.539448 PCI: 00:16.0
1209 20:14:43.549067 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 20:14:43.551564 PCI: 00:19.0
1211 20:14:43.554698 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 20:14:43.564719 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 20:14:43.568536 I2C: 00:15
1214 20:14:43.571786 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 20:14:43.578145 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 20:14:43.588030 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 20:14:43.598354 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 20:14:43.601508 GENERIC: 0.0
1219 20:14:43.601936 PCI: 01:00.0
1220 20:14:43.611966 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 20:14:43.621710 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1222 20:14:43.624714 PCI: 00:1e.0
1223 20:14:43.634949 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 20:14:43.638197 PCI: 00:1e.2 child on link 0 SPI: 00
1225 20:14:43.648981 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 20:14:43.651039 SPI: 00
1227 20:14:43.654536 PCI: 00:1e.3 child on link 0 SPI: 00
1228 20:14:43.664363 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 20:14:43.664947 SPI: 00
1230 20:14:43.671156 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 20:14:43.678106 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 20:14:43.681044 PNP: 0c09.0
1233 20:14:43.687642 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 20:14:43.694653 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 20:14:43.704502 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 20:14:43.710632 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 20:14:43.718057 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 20:14:43.718568 GENERIC: 0.0
1239 20:14:43.720840 GENERIC: 1.0
1240 20:14:43.721269 PCI: 00:1f.3
1241 20:14:43.730637 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 20:14:43.741088 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 20:14:43.744114 PCI: 00:1f.5
1244 20:14:43.753933 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 20:14:43.757755 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 20:14:43.758364 APIC: 00
1247 20:14:43.761255 APIC: 01
1248 20:14:43.761796 APIC: 03
1249 20:14:43.762141 APIC: 07
1250 20:14:43.764230 APIC: 05
1251 20:14:43.764799 APIC: 04
1252 20:14:43.767696 APIC: 02
1253 20:14:43.768226 APIC: 06
1254 20:14:43.773908 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 20:14:43.780604 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 20:14:43.787536 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 20:14:43.793712 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 20:14:43.797367 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 20:14:43.800794 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1260 20:14:43.807336 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1261 20:14:43.817010 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1262 20:14:43.824074 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1263 20:14:43.830182 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1264 20:14:43.837317 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1265 20:14:43.843796 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 20:14:43.853765 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1267 20:14:43.860463 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1268 20:14:43.863580 DOMAIN: 0000: Resource ranges:
1269 20:14:43.866702 * Base: 1000, Size: 800, Tag: 100
1270 20:14:43.870331 * Base: 1900, Size: e700, Tag: 100
1271 20:14:43.877390 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1272 20:14:43.883603 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1273 20:14:43.890163 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1274 20:14:43.896673 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1275 20:14:43.903027 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1276 20:14:43.913274 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1277 20:14:43.919815 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1278 20:14:43.928784 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1279 20:14:43.936589 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1280 20:14:43.942720 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1281 20:14:43.949176 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1282 20:14:43.959893 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1283 20:14:43.966071 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1284 20:14:43.972907 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1285 20:14:43.979440 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1286 20:14:43.989167 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1287 20:14:43.996242 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 20:14:44.002738 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 20:14:44.012791 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 20:14:44.019878 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1291 20:14:44.026134 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 20:14:44.036075 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 20:14:44.042935 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1294 20:14:44.049230 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1295 20:14:44.059662 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1296 20:14:44.062632 DOMAIN: 0000: Resource ranges:
1297 20:14:44.066603 * Base: 7fc00000, Size: 40400000, Tag: 200
1298 20:14:44.069310 * Base: d0000000, Size: 28000000, Tag: 200
1299 20:14:44.075841 * Base: fa000000, Size: 1000000, Tag: 200
1300 20:14:44.078949 * Base: fb001000, Size: 2fff000, Tag: 200
1301 20:14:44.082736 * Base: fe010000, Size: 2e000, Tag: 200
1302 20:14:44.085540 * Base: fe03f000, Size: d41000, Tag: 200
1303 20:14:44.092432 * Base: fed88000, Size: 8000, Tag: 200
1304 20:14:44.095772 * Base: fed93000, Size: d000, Tag: 200
1305 20:14:44.099097 * Base: feda2000, Size: 1e000, Tag: 200
1306 20:14:44.102302 * Base: fede0000, Size: 1220000, Tag: 200
1307 20:14:44.108754 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1308 20:14:44.115577 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1309 20:14:44.122102 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1310 20:14:44.129107 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1311 20:14:44.135311 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1312 20:14:44.142184 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1313 20:14:44.148901 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1314 20:14:44.155308 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1315 20:14:44.162359 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1316 20:14:44.169044 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1317 20:14:44.174956 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1318 20:14:44.181796 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1319 20:14:44.188732 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1320 20:14:44.195229 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1321 20:14:44.201948 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1322 20:14:44.207836 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1323 20:14:44.215343 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1324 20:14:44.221258 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1325 20:14:44.228312 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1326 20:14:44.234644 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1327 20:14:44.241443 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1328 20:14:44.248083 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1329 20:14:44.254565 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1330 20:14:44.261318 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1331 20:14:44.271129 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1332 20:14:44.274226 PCI: 00:1d.0: Resource ranges:
1333 20:14:44.277235 * Base: 7fc00000, Size: 100000, Tag: 200
1334 20:14:44.283835 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1335 20:14:44.291005 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1336 20:14:44.301020 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1337 20:14:44.307295 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1338 20:14:44.310863 Root Device assign_resources, bus 0 link: 0
1339 20:14:44.314229 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 20:14:44.324669 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1341 20:14:44.331893 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1342 20:14:44.341350 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1343 20:14:44.347959 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1344 20:14:44.354710 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 20:14:44.358054 PCI: 00:04.0 assign_resources, bus 1 link: 0
1346 20:14:44.364205 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1347 20:14:44.374376 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1348 20:14:44.381288 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1349 20:14:44.388216 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 20:14:44.391515 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1351 20:14:44.401188 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1352 20:14:44.404281 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 20:14:44.407770 PCI: 00:14.0 assign_resources, bus 0 link: 0
1354 20:14:44.417567 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1355 20:14:44.424665 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1356 20:14:44.434613 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1357 20:14:44.437425 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 20:14:44.444017 PCI: 00:14.3 assign_resources, bus 0 link: 0
1359 20:14:44.451310 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1360 20:14:44.453909 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 20:14:44.461173 PCI: 00:15.0 assign_resources, bus 0 link: 0
1362 20:14:44.467877 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1363 20:14:44.474177 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 20:14:44.477221 PCI: 00:15.1 assign_resources, bus 0 link: 0
1365 20:14:44.487320 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1366 20:14:44.494388 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1367 20:14:44.503944 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1368 20:14:44.512019 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1369 20:14:44.514247 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 20:14:44.520592 PCI: 00:19.1 assign_resources, bus 0 link: 0
1371 20:14:44.527276 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1372 20:14:44.536982 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1373 20:14:44.546941 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1374 20:14:44.550672 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 20:14:44.560740 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1376 20:14:44.567226 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1377 20:14:44.573861 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 20:14:44.580274 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 20:14:44.586798 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 20:14:44.590386 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 20:14:44.597278 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 20:14:44.603786 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 20:14:44.606645 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 20:14:44.613715 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 20:14:44.616610 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 20:14:44.623555 LPC: Trying to open IO window from 800 size 1ff
1387 20:14:44.629888 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 20:14:44.639928 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 20:14:44.646896 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 20:14:44.650190 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 20:14:44.656771 Root Device assign_resources, bus 0 link: 0
1392 20:14:44.657200 Done setting resources.
1393 20:14:44.663059 Show resources in subtree (Root Device)...After assigning values.
1394 20:14:44.669798 Root Device child on link 0 DOMAIN: 0000
1395 20:14:44.673344 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 20:14:44.682982 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 20:14:44.693036 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 20:14:44.693500 PCI: 00:00.0
1399 20:14:44.703455 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 20:14:44.713257 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 20:14:44.723024 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 20:14:44.733137 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 20:14:44.742962 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 20:14:44.749251 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1405 20:14:44.759192 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1406 20:14:44.769606 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1407 20:14:44.779492 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1408 20:14:44.789272 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1409 20:14:44.796118 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1410 20:14:44.805755 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1411 20:14:44.815608 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1412 20:14:44.825841 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1413 20:14:44.836298 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1414 20:14:44.845573 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1415 20:14:44.855374 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1416 20:14:44.862012 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1417 20:14:44.872398 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1418 20:14:44.882233 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1419 20:14:44.885669 PCI: 00:02.0
1420 20:14:44.895285 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1421 20:14:44.905069 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1422 20:14:44.915434 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1423 20:14:44.918390 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1424 20:14:44.928831 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1425 20:14:44.931968 GENERIC: 0.0
1426 20:14:44.932363 PCI: 00:05.0
1427 20:14:44.945360 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1428 20:14:44.948426 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1429 20:14:44.948828 GENERIC: 0.0
1430 20:14:44.952133 PCI: 00:08.0
1431 20:14:44.961481 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1432 20:14:44.965576 PCI: 00:0a.0
1433 20:14:44.968333 PCI: 00:0d.0 child on link 0 USB0 port 0
1434 20:14:44.978297 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1435 20:14:44.982029 USB0 port 0 child on link 0 USB3 port 0
1436 20:14:44.984871 USB3 port 0
1437 20:14:44.985232 USB3 port 1
1438 20:14:44.988251 USB3 port 2
1439 20:14:44.988699 USB3 port 3
1440 20:14:44.995152 PCI: 00:14.0 child on link 0 USB0 port 0
1441 20:14:45.004732 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1442 20:14:45.008244 USB0 port 0 child on link 0 USB2 port 0
1443 20:14:45.011652 USB2 port 0
1444 20:14:45.012012 USB2 port 1
1445 20:14:45.015465 USB2 port 2
1446 20:14:45.015849 USB2 port 3
1447 20:14:45.018095 USB2 port 4
1448 20:14:45.018452 USB2 port 5
1449 20:14:45.021827 USB2 port 6
1450 20:14:45.022163 USB2 port 7
1451 20:14:45.024812 USB2 port 8
1452 20:14:45.028255 USB2 port 9
1453 20:14:45.028681 USB3 port 0
1454 20:14:45.031633 USB3 port 1
1455 20:14:45.031995 USB3 port 2
1456 20:14:45.035014 USB3 port 3
1457 20:14:45.035374 PCI: 00:14.2
1458 20:14:45.045134 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1459 20:14:45.054633 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1460 20:14:45.061522 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1461 20:14:45.071025 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1462 20:14:45.071411 GENERIC: 0.0
1463 20:14:45.078056 PCI: 00:15.0 child on link 0 I2C: 00:1a
1464 20:14:45.088029 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1465 20:14:45.088502 I2C: 00:1a
1466 20:14:45.091586 I2C: 00:31
1467 20:14:45.091968 I2C: 00:32
1468 20:14:45.098233 PCI: 00:15.1 child on link 0 I2C: 00:10
1469 20:14:45.107640 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1470 20:14:45.108051 I2C: 00:10
1471 20:14:45.111563 PCI: 00:15.2
1472 20:14:45.120867 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1473 20:14:45.121341 PCI: 00:15.3
1474 20:14:45.131074 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1475 20:14:45.135392 PCI: 00:16.0
1476 20:14:45.144394 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1477 20:14:45.144899 PCI: 00:19.0
1478 20:14:45.150771 PCI: 00:19.1 child on link 0 I2C: 00:15
1479 20:14:45.161054 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1480 20:14:45.161441 I2C: 00:15
1481 20:14:45.167815 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1482 20:14:45.174445 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1483 20:14:45.187696 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1484 20:14:45.197468 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1485 20:14:45.201128 GENERIC: 0.0
1486 20:14:45.201555 PCI: 01:00.0
1487 20:14:45.210969 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1488 20:14:45.220827 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1489 20:14:45.224327 PCI: 00:1e.0
1490 20:14:45.233816 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1491 20:14:45.237619 PCI: 00:1e.2 child on link 0 SPI: 00
1492 20:14:45.251486 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1493 20:14:45.251985 SPI: 00
1494 20:14:45.254247 PCI: 00:1e.3 child on link 0 SPI: 00
1495 20:14:45.263894 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1496 20:14:45.267472 SPI: 00
1497 20:14:45.270472 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1498 20:14:45.280435 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1499 20:14:45.280972 PNP: 0c09.0
1500 20:14:45.290539 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1501 20:14:45.293938 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1502 20:14:45.303647 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1503 20:14:45.313731 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1504 20:14:45.316952 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1505 20:14:45.319825 GENERIC: 0.0
1506 20:14:45.320355 GENERIC: 1.0
1507 20:14:45.323756 PCI: 00:1f.3
1508 20:14:45.333777 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1509 20:14:45.343398 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1510 20:14:45.346712 PCI: 00:1f.5
1511 20:14:45.356462 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1512 20:14:45.359936 CPU_CLUSTER: 0 child on link 0 APIC: 00
1513 20:14:45.360356 APIC: 00
1514 20:14:45.363138 APIC: 01
1515 20:14:45.363556 APIC: 03
1516 20:14:45.366265 APIC: 07
1517 20:14:45.366683 APIC: 05
1518 20:14:45.367015 APIC: 04
1519 20:14:45.369864 APIC: 02
1520 20:14:45.370297 APIC: 06
1521 20:14:45.373423 Done allocating resources.
1522 20:14:45.379973 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1523 20:14:45.386057 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1524 20:14:45.389495 Configure GPIOs for I2S audio on UP4.
1525 20:14:45.396527 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1526 20:14:45.399649 Enabling resources...
1527 20:14:45.402642 PCI: 00:00.0 subsystem <- 8086/9a12
1528 20:14:45.403070 PCI: 00:00.0 cmd <- 06
1529 20:14:45.409704 PCI: 00:02.0 subsystem <- 8086/9a40
1530 20:14:45.410128 PCI: 00:02.0 cmd <- 03
1531 20:14:45.413031 PCI: 00:04.0 subsystem <- 8086/9a03
1532 20:14:45.416080 PCI: 00:04.0 cmd <- 02
1533 20:14:45.419605 PCI: 00:05.0 subsystem <- 8086/9a19
1534 20:14:45.423044 PCI: 00:05.0 cmd <- 02
1535 20:14:45.425908 PCI: 00:08.0 subsystem <- 8086/9a11
1536 20:14:45.429158 PCI: 00:08.0 cmd <- 06
1537 20:14:45.432947 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 20:14:45.435966 PCI: 00:0d.0 cmd <- 02
1539 20:14:45.439345 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 20:14:45.442703 PCI: 00:14.0 cmd <- 02
1541 20:14:45.446118 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 20:14:45.446542 PCI: 00:14.2 cmd <- 02
1543 20:14:45.453655 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 20:14:45.454082 PCI: 00:14.3 cmd <- 02
1545 20:14:45.456092 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 20:14:45.459638 PCI: 00:15.0 cmd <- 02
1547 20:14:45.462976 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 20:14:45.465965 PCI: 00:15.1 cmd <- 02
1549 20:14:45.469356 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 20:14:45.472903 PCI: 00:15.2 cmd <- 02
1551 20:14:45.476136 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 20:14:45.479352 PCI: 00:15.3 cmd <- 02
1553 20:14:45.482531 PCI: 00:16.0 subsystem <- 8086/a0e0
1554 20:14:45.486387 PCI: 00:16.0 cmd <- 02
1555 20:14:45.489558 PCI: 00:19.1 subsystem <- 8086/a0c6
1556 20:14:45.493060 PCI: 00:19.1 cmd <- 02
1557 20:14:45.496297 PCI: 00:1d.0 bridge ctrl <- 0013
1558 20:14:45.499509 PCI: 00:1d.0 subsystem <- 8086/a0b0
1559 20:14:45.500116 PCI: 00:1d.0 cmd <- 06
1560 20:14:45.506041 PCI: 00:1e.0 subsystem <- 8086/a0a8
1561 20:14:45.506587 PCI: 00:1e.0 cmd <- 06
1562 20:14:45.509699 PCI: 00:1e.2 subsystem <- 8086/a0aa
1563 20:14:45.513095 PCI: 00:1e.2 cmd <- 06
1564 20:14:45.516076 PCI: 00:1e.3 subsystem <- 8086/a0ab
1565 20:14:45.519086 PCI: 00:1e.3 cmd <- 02
1566 20:14:45.522898 PCI: 00:1f.0 subsystem <- 8086/a087
1567 20:14:45.525785 PCI: 00:1f.0 cmd <- 407
1568 20:14:45.529090 PCI: 00:1f.3 subsystem <- 8086/a0c8
1569 20:14:45.532514 PCI: 00:1f.3 cmd <- 02
1570 20:14:45.535607 PCI: 00:1f.5 subsystem <- 8086/a0a4
1571 20:14:45.539299 PCI: 00:1f.5 cmd <- 406
1572 20:14:45.542607 PCI: 01:00.0 cmd <- 02
1573 20:14:45.546980 done.
1574 20:14:45.550177 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1575 20:14:45.553395 Initializing devices...
1576 20:14:45.556574 Root Device init
1577 20:14:45.560289 Chrome EC: Set SMI mask to 0x0000000000000000
1578 20:14:45.567718 Chrome EC: clear events_b mask to 0x0000000000000000
1579 20:14:45.573649 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1580 20:14:45.580370 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1581 20:14:45.586883 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1582 20:14:45.590770 Chrome EC: Set WAKE mask to 0x0000000000000000
1583 20:14:45.598240 fw_config match found: DB_USB=USB3_ACTIVE
1584 20:14:45.601542 Configure Right Type-C port orientation for retimer
1585 20:14:45.605136 Root Device init finished in 47 msecs
1586 20:14:45.609232 PCI: 00:00.0 init
1587 20:14:45.613206 CPU TDP = 9 Watts
1588 20:14:45.613665 CPU PL1 = 9 Watts
1589 20:14:45.615866 CPU PL2 = 40 Watts
1590 20:14:45.619309 CPU PL4 = 83 Watts
1591 20:14:45.622577 PCI: 00:00.0 init finished in 8 msecs
1592 20:14:45.622963 PCI: 00:02.0 init
1593 20:14:45.626231 GMA: Found VBT in CBFS
1594 20:14:45.629301 GMA: Found valid VBT in CBFS
1595 20:14:45.635924 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1596 20:14:45.642276 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1597 20:14:45.646136 PCI: 00:02.0 init finished in 18 msecs
1598 20:14:45.649305 PCI: 00:05.0 init
1599 20:14:45.652387 PCI: 00:05.0 init finished in 0 msecs
1600 20:14:45.656191 PCI: 00:08.0 init
1601 20:14:45.658985 PCI: 00:08.0 init finished in 0 msecs
1602 20:14:45.662348 PCI: 00:14.0 init
1603 20:14:45.665878 PCI: 00:14.0 init finished in 0 msecs
1604 20:14:45.669186 PCI: 00:14.2 init
1605 20:14:45.672685 PCI: 00:14.2 init finished in 0 msecs
1606 20:14:45.673072 PCI: 00:15.0 init
1607 20:14:45.675853 I2C bus 0 version 0x3230302a
1608 20:14:45.678933 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1609 20:14:45.685665 PCI: 00:15.0 init finished in 6 msecs
1610 20:14:45.686095 PCI: 00:15.1 init
1611 20:14:45.689377 I2C bus 1 version 0x3230302a
1612 20:14:45.692325 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1613 20:14:45.695811 PCI: 00:15.1 init finished in 6 msecs
1614 20:14:45.699098 PCI: 00:15.2 init
1615 20:14:45.702251 I2C bus 2 version 0x3230302a
1616 20:14:45.705572 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1617 20:14:45.708856 PCI: 00:15.2 init finished in 6 msecs
1618 20:14:45.712244 PCI: 00:15.3 init
1619 20:14:45.715687 I2C bus 3 version 0x3230302a
1620 20:14:45.718863 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1621 20:14:45.722350 PCI: 00:15.3 init finished in 6 msecs
1622 20:14:45.725865 PCI: 00:16.0 init
1623 20:14:45.728896 PCI: 00:16.0 init finished in 0 msecs
1624 20:14:45.732687 PCI: 00:19.1 init
1625 20:14:45.733126 I2C bus 5 version 0x3230302a
1626 20:14:45.739458 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1627 20:14:45.742148 PCI: 00:19.1 init finished in 6 msecs
1628 20:14:45.742597 PCI: 00:1d.0 init
1629 20:14:45.745876 Initializing PCH PCIe bridge.
1630 20:14:45.748917 PCI: 00:1d.0 init finished in 3 msecs
1631 20:14:45.753217 PCI: 00:1f.0 init
1632 20:14:45.756445 IOAPIC: Initializing IOAPIC at 0xfec00000
1633 20:14:45.763351 IOAPIC: Bootstrap Processor Local APIC = 0x00
1634 20:14:45.763880 IOAPIC: ID = 0x02
1635 20:14:45.766398 IOAPIC: Dumping registers
1636 20:14:45.769973 reg 0x0000: 0x02000000
1637 20:14:45.773144 reg 0x0001: 0x00770020
1638 20:14:45.773553 reg 0x0002: 0x00000000
1639 20:14:45.780282 PCI: 00:1f.0 init finished in 21 msecs
1640 20:14:45.780823 PCI: 00:1f.2 init
1641 20:14:45.783046 Disabling ACPI via APMC.
1642 20:14:45.786846 APMC done.
1643 20:14:45.789566 PCI: 00:1f.2 init finished in 5 msecs
1644 20:14:45.801086 PCI: 01:00.0 init
1645 20:14:45.804497 PCI: 01:00.0 init finished in 0 msecs
1646 20:14:45.808158 PNP: 0c09.0 init
1647 20:14:45.811066 Google Chrome EC uptime: 8.277 seconds
1648 20:14:45.817990 Google Chrome AP resets since EC boot: 1
1649 20:14:45.821055 Google Chrome most recent AP reset causes:
1650 20:14:45.824444 0.482: 32775 shutdown: entering G3
1651 20:14:45.830957 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1652 20:14:45.834169 PNP: 0c09.0 init finished in 22 msecs
1653 20:14:45.839607 Devices initialized
1654 20:14:45.842831 Show all devs... After init.
1655 20:14:45.846413 Root Device: enabled 1
1656 20:14:45.846800 DOMAIN: 0000: enabled 1
1657 20:14:45.849883 CPU_CLUSTER: 0: enabled 1
1658 20:14:45.852861 PCI: 00:00.0: enabled 1
1659 20:14:45.856211 PCI: 00:02.0: enabled 1
1660 20:14:45.856602 PCI: 00:04.0: enabled 1
1661 20:14:45.859244 PCI: 00:05.0: enabled 1
1662 20:14:45.862560 PCI: 00:06.0: enabled 0
1663 20:14:45.866113 PCI: 00:07.0: enabled 0
1664 20:14:45.866487 PCI: 00:07.1: enabled 0
1665 20:14:45.869033 PCI: 00:07.2: enabled 0
1666 20:14:45.872355 PCI: 00:07.3: enabled 0
1667 20:14:45.876007 PCI: 00:08.0: enabled 1
1668 20:14:45.876547 PCI: 00:09.0: enabled 0
1669 20:14:45.879451 PCI: 00:0a.0: enabled 0
1670 20:14:45.882816 PCI: 00:0d.0: enabled 1
1671 20:14:45.886344 PCI: 00:0d.1: enabled 0
1672 20:14:45.886828 PCI: 00:0d.2: enabled 0
1673 20:14:45.889107 PCI: 00:0d.3: enabled 0
1674 20:14:45.892506 PCI: 00:0e.0: enabled 0
1675 20:14:45.895627 PCI: 00:10.2: enabled 1
1676 20:14:45.896005 PCI: 00:10.6: enabled 0
1677 20:14:45.898903 PCI: 00:10.7: enabled 0
1678 20:14:45.903011 PCI: 00:12.0: enabled 0
1679 20:14:45.903412 PCI: 00:12.6: enabled 0
1680 20:14:45.905818 PCI: 00:13.0: enabled 0
1681 20:14:45.908820 PCI: 00:14.0: enabled 1
1682 20:14:45.911994 PCI: 00:14.1: enabled 0
1683 20:14:45.912556 PCI: 00:14.2: enabled 1
1684 20:14:45.915310 PCI: 00:14.3: enabled 1
1685 20:14:45.919086 PCI: 00:15.0: enabled 1
1686 20:14:45.922130 PCI: 00:15.1: enabled 1
1687 20:14:45.922535 PCI: 00:15.2: enabled 1
1688 20:14:45.925529 PCI: 00:15.3: enabled 1
1689 20:14:45.928900 PCI: 00:16.0: enabled 1
1690 20:14:45.932219 PCI: 00:16.1: enabled 0
1691 20:14:45.932760 PCI: 00:16.2: enabled 0
1692 20:14:45.935990 PCI: 00:16.3: enabled 0
1693 20:14:45.938733 PCI: 00:16.4: enabled 0
1694 20:14:45.942109 PCI: 00:16.5: enabled 0
1695 20:14:45.942645 PCI: 00:17.0: enabled 0
1696 20:14:45.945228 PCI: 00:19.0: enabled 0
1697 20:14:45.948709 PCI: 00:19.1: enabled 1
1698 20:14:45.949087 PCI: 00:19.2: enabled 0
1699 20:14:45.952036 PCI: 00:1c.0: enabled 1
1700 20:14:45.955442 PCI: 00:1c.1: enabled 0
1701 20:14:45.959128 PCI: 00:1c.2: enabled 0
1702 20:14:45.959657 PCI: 00:1c.3: enabled 0
1703 20:14:45.962005 PCI: 00:1c.4: enabled 0
1704 20:14:45.965041 PCI: 00:1c.5: enabled 0
1705 20:14:45.968410 PCI: 00:1c.6: enabled 1
1706 20:14:45.968897 PCI: 00:1c.7: enabled 0
1707 20:14:45.971839 PCI: 00:1d.0: enabled 1
1708 20:14:45.975058 PCI: 00:1d.1: enabled 0
1709 20:14:45.978496 PCI: 00:1d.2: enabled 1
1710 20:14:45.978898 PCI: 00:1d.3: enabled 0
1711 20:14:45.982040 PCI: 00:1e.0: enabled 1
1712 20:14:45.985779 PCI: 00:1e.1: enabled 0
1713 20:14:45.988333 PCI: 00:1e.2: enabled 1
1714 20:14:45.988921 PCI: 00:1e.3: enabled 1
1715 20:14:45.991840 PCI: 00:1f.0: enabled 1
1716 20:14:45.995480 PCI: 00:1f.1: enabled 0
1717 20:14:45.995873 PCI: 00:1f.2: enabled 1
1718 20:14:45.998191 PCI: 00:1f.3: enabled 1
1719 20:14:46.001935 PCI: 00:1f.4: enabled 0
1720 20:14:46.005259 PCI: 00:1f.5: enabled 1
1721 20:14:46.005790 PCI: 00:1f.6: enabled 0
1722 20:14:46.008858 PCI: 00:1f.7: enabled 0
1723 20:14:46.011802 APIC: 00: enabled 1
1724 20:14:46.014993 GENERIC: 0.0: enabled 1
1725 20:14:46.015465 GENERIC: 0.0: enabled 1
1726 20:14:46.018040 GENERIC: 1.0: enabled 1
1727 20:14:46.021915 GENERIC: 0.0: enabled 1
1728 20:14:46.022356 GENERIC: 1.0: enabled 1
1729 20:14:46.025123 USB0 port 0: enabled 1
1730 20:14:46.028059 GENERIC: 0.0: enabled 1
1731 20:14:46.031589 USB0 port 0: enabled 1
1732 20:14:46.032040 GENERIC: 0.0: enabled 1
1733 20:14:46.035196 I2C: 00:1a: enabled 1
1734 20:14:46.038004 I2C: 00:31: enabled 1
1735 20:14:46.038425 I2C: 00:32: enabled 1
1736 20:14:46.041724 I2C: 00:10: enabled 1
1737 20:14:46.044874 I2C: 00:15: enabled 1
1738 20:14:46.045296 GENERIC: 0.0: enabled 0
1739 20:14:46.048726 GENERIC: 1.0: enabled 0
1740 20:14:46.051615 GENERIC: 0.0: enabled 1
1741 20:14:46.054751 SPI: 00: enabled 1
1742 20:14:46.055174 SPI: 00: enabled 1
1743 20:14:46.058082 PNP: 0c09.0: enabled 1
1744 20:14:46.061600 GENERIC: 0.0: enabled 1
1745 20:14:46.062143 USB3 port 0: enabled 1
1746 20:14:46.064666 USB3 port 1: enabled 1
1747 20:14:46.067679 USB3 port 2: enabled 0
1748 20:14:46.068088 USB3 port 3: enabled 0
1749 20:14:46.071313 USB2 port 0: enabled 0
1750 20:14:46.074675 USB2 port 1: enabled 1
1751 20:14:46.077903 USB2 port 2: enabled 1
1752 20:14:46.078472 USB2 port 3: enabled 0
1753 20:14:46.081578 USB2 port 4: enabled 1
1754 20:14:46.084687 USB2 port 5: enabled 0
1755 20:14:46.085162 USB2 port 6: enabled 0
1756 20:14:46.087743 USB2 port 7: enabled 0
1757 20:14:46.091275 USB2 port 8: enabled 0
1758 20:14:46.092065 USB2 port 9: enabled 0
1759 20:14:46.094741 USB3 port 0: enabled 0
1760 20:14:46.098301 USB3 port 1: enabled 1
1761 20:14:46.101430 USB3 port 2: enabled 0
1762 20:14:46.102077 USB3 port 3: enabled 0
1763 20:14:46.104860 GENERIC: 0.0: enabled 1
1764 20:14:46.107989 GENERIC: 1.0: enabled 1
1765 20:14:46.108506 APIC: 01: enabled 1
1766 20:14:46.111289 APIC: 03: enabled 1
1767 20:14:46.114356 APIC: 07: enabled 1
1768 20:14:46.114799 APIC: 05: enabled 1
1769 20:14:46.117529 APIC: 04: enabled 1
1770 20:14:46.118003 APIC: 02: enabled 1
1771 20:14:46.121408 APIC: 06: enabled 1
1772 20:14:46.124598 PCI: 01:00.0: enabled 1
1773 20:14:46.130753 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1774 20:14:46.134166 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1775 20:14:46.137838 ELOG: NV offset 0xf30000 size 0x1000
1776 20:14:46.145007 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1777 20:14:46.151530 ELOG: Event(17) added with size 13 at 2023-12-28 20:14:45 UTC
1778 20:14:46.158111 ELOG: Event(92) added with size 9 at 2023-12-28 20:14:45 UTC
1779 20:14:46.165127 ELOG: Event(93) added with size 9 at 2023-12-28 20:14:45 UTC
1780 20:14:46.171192 ELOG: Event(9E) added with size 10 at 2023-12-28 20:14:45 UTC
1781 20:14:46.178139 ELOG: Event(9F) added with size 14 at 2023-12-28 20:14:45 UTC
1782 20:14:46.184874 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1783 20:14:46.187784 ELOG: Event(A1) added with size 10 at 2023-12-28 20:14:45 UTC
1784 20:14:46.197688 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1785 20:14:46.204889 ELOG: Event(A0) added with size 9 at 2023-12-28 20:14:45 UTC
1786 20:14:46.207788 elog_add_boot_reason: Logged dev mode boot
1787 20:14:46.214282 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1788 20:14:46.214727 Finalize devices...
1789 20:14:46.217579 Devices finalized
1790 20:14:46.224285 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1791 20:14:46.227862 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1792 20:14:46.234425 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1793 20:14:46.237541 ME: HFSTS1 : 0x80030055
1794 20:14:46.244318 ME: HFSTS2 : 0x30280116
1795 20:14:46.248075 ME: HFSTS3 : 0x00000050
1796 20:14:46.250731 ME: HFSTS4 : 0x00004000
1797 20:14:46.257763 ME: HFSTS5 : 0x00000000
1798 20:14:46.260889 ME: HFSTS6 : 0x40400006
1799 20:14:46.264829 ME: Manufacturing Mode : YES
1800 20:14:46.267604 ME: SPI Protection Mode Enabled : NO
1801 20:14:46.271069 ME: FW Partition Table : OK
1802 20:14:46.274488 ME: Bringup Loader Failure : NO
1803 20:14:46.280573 ME: Firmware Init Complete : NO
1804 20:14:46.284167 ME: Boot Options Present : NO
1805 20:14:46.287626 ME: Update In Progress : NO
1806 20:14:46.290863 ME: D0i3 Support : YES
1807 20:14:46.294203 ME: Low Power State Enabled : NO
1808 20:14:46.297820 ME: CPU Replaced : YES
1809 20:14:46.301022 ME: CPU Replacement Valid : YES
1810 20:14:46.303847 ME: Current Working State : 5
1811 20:14:46.310550 ME: Current Operation State : 1
1812 20:14:46.314251 ME: Current Operation Mode : 3
1813 20:14:46.317401 ME: Error Code : 0
1814 20:14:46.321013 ME: Enhanced Debug Mode : NO
1815 20:14:46.324721 ME: CPU Debug Disabled : YES
1816 20:14:46.327305 ME: TXT Support : NO
1817 20:14:46.334132 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1818 20:14:46.340686 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1819 20:14:46.344119 CBFS: 'fallback/slic' not found.
1820 20:14:46.347684 ACPI: Writing ACPI tables at 76b01000.
1821 20:14:46.350634 ACPI: * FACS
1822 20:14:46.351135 ACPI: * DSDT
1823 20:14:46.357490 Ramoops buffer: 0x100000@0x76a00000.
1824 20:14:46.360600 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1825 20:14:46.363807 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1826 20:14:46.367772 Google Chrome EC: version:
1827 20:14:46.370861 ro: voema_v2.0.10114-a447f03e46
1828 20:14:46.374120 rw: voema_v2.0.10114-a447f03e46
1829 20:14:46.377458 running image: 2
1830 20:14:46.384161 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1831 20:14:46.387553 ACPI: * FADT
1832 20:14:46.387985 SCI is IRQ9
1833 20:14:46.391020 ACPI: added table 1/32, length now 40
1834 20:14:46.394140 ACPI: * SSDT
1835 20:14:46.397481 Found 1 CPU(s) with 8 core(s) each.
1836 20:14:46.404581 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1837 20:14:46.407659 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1838 20:14:46.410986 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1839 20:14:46.414359 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1840 20:14:46.420876 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1841 20:14:46.427197 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1842 20:14:46.430667 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1843 20:14:46.437368 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1844 20:14:46.444329 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1845 20:14:46.447147 \_SB.PCI0.RP09: Added StorageD3Enable property
1846 20:14:46.450549 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1847 20:14:46.457520 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1848 20:14:46.464334 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1849 20:14:46.467430 PS2K: Passing 80 keymaps to kernel
1850 20:14:46.473779 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1851 20:14:46.480067 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1852 20:14:46.486998 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1853 20:14:46.493520 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1854 20:14:46.500379 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1855 20:14:46.507031 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1856 20:14:46.513364 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1857 20:14:46.520329 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1858 20:14:46.523203 ACPI: added table 2/32, length now 44
1859 20:14:46.523295 ACPI: * MCFG
1860 20:14:46.530398 ACPI: added table 3/32, length now 48
1861 20:14:46.530490 ACPI: * TPM2
1862 20:14:46.533220 TPM2 log created at 0x769f0000
1863 20:14:46.536894 ACPI: added table 4/32, length now 52
1864 20:14:46.540062 ACPI: * MADT
1865 20:14:46.540153 SCI is IRQ9
1866 20:14:46.543291 ACPI: added table 5/32, length now 56
1867 20:14:46.546408 current = 76b09850
1868 20:14:46.546500 ACPI: * DMAR
1869 20:14:46.549849 ACPI: added table 6/32, length now 60
1870 20:14:46.556437 ACPI: added table 7/32, length now 64
1871 20:14:46.556530 ACPI: * HPET
1872 20:14:46.559992 ACPI: added table 8/32, length now 68
1873 20:14:46.563099 ACPI: done.
1874 20:14:46.563191 ACPI tables: 35216 bytes.
1875 20:14:46.566241 smbios_write_tables: 769ef000
1876 20:14:46.569801 EC returned error result code 3
1877 20:14:46.573268 Couldn't obtain OEM name from CBI
1878 20:14:46.577755 Create SMBIOS type 16
1879 20:14:46.581016 Create SMBIOS type 17
1880 20:14:46.584927 GENERIC: 0.0 (WIFI Device)
1881 20:14:46.585021 SMBIOS tables: 1734 bytes.
1882 20:14:46.591206 Writing table forward entry at 0x00000500
1883 20:14:46.597798 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1884 20:14:46.601046 Writing coreboot table at 0x76b25000
1885 20:14:46.607811 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1886 20:14:46.610852 1. 0000000000001000-000000000009ffff: RAM
1887 20:14:46.614988 2. 00000000000a0000-00000000000fffff: RESERVED
1888 20:14:46.620740 3. 0000000000100000-00000000769eefff: RAM
1889 20:14:46.624216 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1890 20:14:46.630964 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1891 20:14:46.637841 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1892 20:14:46.641104 7. 0000000077000000-000000007fbfffff: RESERVED
1893 20:14:46.644398 8. 00000000c0000000-00000000cfffffff: RESERVED
1894 20:14:46.651156 9. 00000000f8000000-00000000f9ffffff: RESERVED
1895 20:14:46.654364 10. 00000000fb000000-00000000fb000fff: RESERVED
1896 20:14:46.660896 11. 00000000fe000000-00000000fe00ffff: RESERVED
1897 20:14:46.664151 12. 00000000fed80000-00000000fed87fff: RESERVED
1898 20:14:46.670524 13. 00000000fed90000-00000000fed92fff: RESERVED
1899 20:14:46.674282 14. 00000000feda0000-00000000feda1fff: RESERVED
1900 20:14:46.680935 15. 00000000fedc0000-00000000feddffff: RESERVED
1901 20:14:46.684088 16. 0000000100000000-00000004803fffff: RAM
1902 20:14:46.687259 Passing 4 GPIOs to payload:
1903 20:14:46.690584 NAME | PORT | POLARITY | VALUE
1904 20:14:46.697860 lid | undefined | high | high
1905 20:14:46.701139 power | undefined | high | low
1906 20:14:46.707381 oprom | undefined | high | low
1907 20:14:46.713800 EC in RW | 0x000000e5 | high | high
1908 20:14:46.720591 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1909 20:14:46.720693 coreboot table: 1576 bytes.
1910 20:14:46.727062 IMD ROOT 0. 0x76fff000 0x00001000
1911 20:14:46.731028 IMD SMALL 1. 0x76ffe000 0x00001000
1912 20:14:46.733788 FSP MEMORY 2. 0x76c4e000 0x003b0000
1913 20:14:46.737480 VPD 3. 0x76c4d000 0x00000367
1914 20:14:46.740551 RO MCACHE 4. 0x76c4c000 0x00000fdc
1915 20:14:46.744293 CONSOLE 5. 0x76c2c000 0x00020000
1916 20:14:46.747205 FMAP 6. 0x76c2b000 0x00000578
1917 20:14:46.750617 TIME STAMP 7. 0x76c2a000 0x00000910
1918 20:14:46.754108 VBOOT WORK 8. 0x76c16000 0x00014000
1919 20:14:46.760403 ROMSTG STCK 9. 0x76c15000 0x00001000
1920 20:14:46.763718 AFTER CAR 10. 0x76c0a000 0x0000b000
1921 20:14:46.767289 RAMSTAGE 11. 0x76b97000 0x00073000
1922 20:14:46.770889 REFCODE 12. 0x76b42000 0x00055000
1923 20:14:46.773625 SMM BACKUP 13. 0x76b32000 0x00010000
1924 20:14:46.777004 4f444749 14. 0x76b30000 0x00002000
1925 20:14:46.780358 EXT VBT15. 0x76b2d000 0x0000219f
1926 20:14:46.783658 COREBOOT 16. 0x76b25000 0x00008000
1927 20:14:46.787033 ACPI 17. 0x76b01000 0x00024000
1928 20:14:46.793669 ACPI GNVS 18. 0x76b00000 0x00001000
1929 20:14:46.798043 RAMOOPS 19. 0x76a00000 0x00100000
1930 20:14:46.800728 TPM2 TCGLOG20. 0x769f0000 0x00010000
1931 20:14:46.803988 SMBIOS 21. 0x769ef000 0x00000800
1932 20:14:46.804079 IMD small region:
1933 20:14:46.810545 IMD ROOT 0. 0x76ffec00 0x00000400
1934 20:14:46.814078 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1935 20:14:46.817444 POWER STATE 2. 0x76ffeb80 0x00000044
1936 20:14:46.820594 ROMSTAGE 3. 0x76ffeb60 0x00000004
1937 20:14:46.823978 MEM INFO 4. 0x76ffe980 0x000001e0
1938 20:14:46.830763 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1939 20:14:46.833680 MTRR: Physical address space:
1940 20:14:46.840353 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1941 20:14:46.847362 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1942 20:14:46.853983 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1943 20:14:46.860482 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1944 20:14:46.863999 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1945 20:14:46.870314 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1946 20:14:46.877245 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1947 20:14:46.880368 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 20:14:46.886975 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 20:14:46.890401 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 20:14:46.893915 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 20:14:46.897110 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 20:14:46.903567 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 20:14:46.907202 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 20:14:46.910280 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 20:14:46.913501 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 20:14:46.920133 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 20:14:46.923584 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 20:14:46.926831 call enable_fixed_mtrr()
1959 20:14:46.930062 CPU physical address size: 39 bits
1960 20:14:46.937227 MTRR: default type WB/UC MTRR counts: 6/7.
1961 20:14:46.940225 MTRR: WB selected as default type.
1962 20:14:46.946932 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1963 20:14:46.949968 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1964 20:14:46.957156 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1965 20:14:46.964072 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1966 20:14:46.969837 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1967 20:14:46.976482 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1968 20:14:46.980588
1969 20:14:46.980719 MTRR check
1970 20:14:46.984085 Fixed MTRRs : Enabled
1971 20:14:46.984177 Variable MTRRs: Enabled
1972 20:14:46.984249
1973 20:14:46.990690 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 20:14:46.993844 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 20:14:46.997566 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 20:14:47.000622 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 20:14:47.007074 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 20:14:47.010479 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 20:14:47.013948 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 20:14:47.017248 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 20:14:47.023620 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 20:14:47.027257 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 20:14:47.030347 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 20:14:47.033691 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 20:14:47.036981 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 20:14:47.044068 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 20:14:47.046973 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 20:14:47.050442 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 20:14:47.053759 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 20:14:47.060360 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 20:14:47.063447 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 20:14:47.066756 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 20:14:47.070171 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 20:14:47.076961 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 20:14:47.080230 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 20:14:47.086803 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 20:14:47.090642 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 20:14:47.093700 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 20:14:47.096991 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 20:14:47.103379 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 20:14:47.106470 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 20:14:47.110090 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 20:14:47.113355 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 20:14:47.119814 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 20:14:47.122784 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 20:14:47.126513 call enable_fixed_mtrr()
2007 20:14:47.130052 call enable_fixed_mtrr()
2008 20:14:47.132923 call enable_fixed_mtrr()
2009 20:14:47.136761 CPU physical address size: 39 bits
2010 20:14:47.140292 CPU physical address size: 39 bits
2011 20:14:47.146968 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2012 20:14:47.150369 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 20:14:47.156676 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 20:14:47.160189 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 20:14:47.163464 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 20:14:47.166484 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 20:14:47.173317 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 20:14:47.176639 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 20:14:47.180120 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 20:14:47.183085 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 20:14:47.189933 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 20:14:47.193214 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 20:14:47.196531 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 20:14:47.200121 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 20:14:47.208386 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 20:14:47.208479 call enable_fixed_mtrr()
2027 20:14:47.214633 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 20:14:47.218474 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 20:14:47.221301 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 20:14:47.225356 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 20:14:47.231480 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 20:14:47.235102 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 20:14:47.238182 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 20:14:47.241592 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 20:14:47.247778 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 20:14:47.251556 CPU physical address size: 39 bits
2037 20:14:47.256703 call enable_fixed_mtrr()
2038 20:14:47.260465 Checking cr50 for pending updates
2039 20:14:47.264148 CPU physical address size: 39 bits
2040 20:14:47.267471 CPU physical address size: 39 bits
2041 20:14:47.270853 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 20:14:47.274026 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 20:14:47.280847 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 20:14:47.283893 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 20:14:47.287425 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 20:14:47.290772 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 20:14:47.297062 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 20:14:47.300907 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 20:14:47.304209 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 20:14:47.307145 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 20:14:47.313860 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 20:14:47.317256 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 20:14:47.320782 call enable_fixed_mtrr()
2054 20:14:47.324201 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 20:14:47.330624 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 20:14:47.333840 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 20:14:47.337347 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 20:14:47.340401 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 20:14:47.346824 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 20:14:47.350082 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 20:14:47.353996 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 20:14:47.357163 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 20:14:47.362251 CPU physical address size: 39 bits
2064 20:14:47.368594 call enable_fixed_mtrr()
2065 20:14:47.373340 Reading cr50 TPM mode
2066 20:14:47.373432 CPU physical address size: 39 bits
2067 20:14:47.381269 BS: BS_PAYLOAD_LOAD entry times (exec / console): 222 / 6 ms
2068 20:14:47.390812 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2069 20:14:47.394519 Checking segment from ROM address 0xffc02b38
2070 20:14:47.397635 Checking segment from ROM address 0xffc02b54
2071 20:14:47.404521 Loading segment from ROM address 0xffc02b38
2072 20:14:47.404649 code (compression=0)
2073 20:14:47.414353 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2074 20:14:47.421169 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2075 20:14:47.424302 it's not compressed!
2076 20:14:47.573912 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2077 20:14:47.580625 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2078 20:14:47.587312 Loading segment from ROM address 0xffc02b54
2079 20:14:47.590624 Entry Point 0x30000000
2080 20:14:47.590716 Loaded segments
2081 20:14:47.597803 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2082 20:14:47.642914 Finalizing chipset.
2083 20:14:47.646297 Finalizing SMM.
2084 20:14:47.646390 APMC done.
2085 20:14:47.652942 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2086 20:14:47.655927 mp_park_aps done after 0 msecs.
2087 20:14:47.659536 Jumping to boot code at 0x30000000(0x76b25000)
2088 20:14:47.669173 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2089 20:14:47.669274
2090 20:14:47.669349
2091 20:14:47.672637
2092 20:14:47.672730 Starting depthcharge on Voema...
2093 20:14:47.673101 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2094 20:14:47.673233 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2095 20:14:47.673363 Setting prompt string to ['volteer:']
2096 20:14:47.673492 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2097 20:14:47.675905
2098 20:14:47.682625 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2099 20:14:47.682719
2100 20:14:47.689039 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2101 20:14:47.689132
2102 20:14:47.695867 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2103 20:14:47.695959
2104 20:14:47.699001 Failed to find eMMC card reader
2105 20:14:47.699098
2106 20:14:47.699195 Wipe memory regions:
2107 20:14:47.702637
2108 20:14:47.705763 [0x00000000001000, 0x000000000a0000)
2109 20:14:47.705860
2110 20:14:47.708837 [0x00000000100000, 0x00000030000000)
2111 20:14:47.747926
2112 20:14:47.751717 [0x00000032662db0, 0x000000769ef000)
2113 20:14:47.806359
2114 20:14:47.809421 [0x00000100000000, 0x00000480400000)
2115 20:14:48.487774
2116 20:14:48.490902 ec_init: CrosEC protocol v3 supported (256, 256)
2117 20:14:48.923235
2118 20:14:48.923385 R8152: Initializing
2119 20:14:48.923462
2120 20:14:48.926490 Version 6 (ocp_data = 5c30)
2121 20:14:48.926582
2122 20:14:48.929653 R8152: Done initializing
2123 20:14:48.929751
2124 20:14:48.933178 Adding net device
2125 20:14:49.234917
2126 20:14:49.238335 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2127 20:14:49.238430
2128 20:14:49.238504
2129 20:14:49.238572
2130 20:14:49.241274 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 20:14:49.341666 volteer: tftpboot 192.168.201.1 12402844/tftp-deploy-h6bgyvbh/kernel/bzImage 12402844/tftp-deploy-h6bgyvbh/kernel/cmdline 12402844/tftp-deploy-h6bgyvbh/ramdisk/ramdisk.cpio.gz
2133 20:14:49.341808 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 20:14:49.341910 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2135 20:14:49.346394 tftpboot 192.168.201.1 12402844/tftp-deploy-h6bgyvbh/kernel/bzImloy-h6bgyvbh/kernel/cmdline 12402844/tftp-deploy-h6bgyvbh/ramdisk/ramdisk.cpio.gz
2136 20:14:49.346492
2137 20:14:49.346565 Waiting for link
2138 20:14:49.548821
2139 20:14:49.548967 done.
2140 20:14:49.549043
2141 20:14:49.549146 MAC: 00:24:32:30:77:d1
2142 20:14:49.549217
2143 20:14:49.552463 Sending DHCP discover... done.
2144 20:14:49.552557
2145 20:14:49.555585 Waiting for reply... done.
2146 20:14:49.555678
2147 20:14:49.558872 Sending DHCP request... done.
2148 20:14:49.558966
2149 20:14:49.565652 Waiting for reply... done.
2150 20:14:49.565753
2151 20:14:49.565828 My ip is 192.168.201.13
2152 20:14:49.565898
2153 20:14:49.569063 The DHCP server ip is 192.168.201.1
2154 20:14:49.569156
2155 20:14:49.575275 TFTP server IP predefined by user: 192.168.201.1
2156 20:14:49.575368
2157 20:14:49.581978 Bootfile predefined by user: 12402844/tftp-deploy-h6bgyvbh/kernel/bzImage
2158 20:14:49.582071
2159 20:14:49.585432 Sending tftp read request... done.
2160 20:14:49.585524
2161 20:14:49.588672 Waiting for the transfer...
2162 20:14:49.588765
2163 20:14:50.148893 00000000 ################################################################
2164 20:14:50.149046
2165 20:14:50.725755 00080000 ################################################################
2166 20:14:50.725905
2167 20:14:51.291581 00100000 ################################################################
2168 20:14:51.291731
2169 20:14:51.816001 00180000 ################################################################
2170 20:14:51.816151
2171 20:14:52.341704 00200000 ################################################################
2172 20:14:52.341891
2173 20:14:52.881601 00280000 ################################################################
2174 20:14:52.881755
2175 20:14:53.411136 00300000 ################################################################
2176 20:14:53.411326
2177 20:14:53.940055 00380000 ################################################################
2178 20:14:53.940214
2179 20:14:54.487151 00400000 ################################################################
2180 20:14:54.487304
2181 20:14:55.019381 00480000 ################################################################
2182 20:14:55.019542
2183 20:14:55.570556 00500000 ################################################################
2184 20:14:55.570716
2185 20:14:56.224745 00580000 ################################################################
2186 20:14:56.225279
2187 20:14:56.954411 00600000 ################################################################
2188 20:14:56.955074
2189 20:14:57.642206 00680000 ################################################################
2190 20:14:57.642720
2191 20:14:58.331278 00700000 ################################################################
2192 20:14:58.331779
2193 20:14:59.027205 00780000 ################################################################
2194 20:14:59.027725
2195 20:14:59.726043 00800000 ################################################################
2196 20:14:59.726562
2197 20:15:00.427083 00880000 ################################################################
2198 20:15:00.427615
2199 20:15:01.149258 00900000 ################################################################
2200 20:15:01.149794
2201 20:15:01.847178 00980000 ################################################################
2202 20:15:01.847406
2203 20:15:02.547948 00a00000 ################################################################
2204 20:15:02.548678
2205 20:15:03.254399 00a80000 ################################################################
2206 20:15:03.254571
2207 20:15:03.312022 00b00000 ###### done.
2208 20:15:03.312548
2209 20:15:03.315201 The bootfile was 11579904 bytes long.
2210 20:15:03.315726
2211 20:15:03.318406 Sending tftp read request... done.
2212 20:15:03.318834
2213 20:15:03.321723 Waiting for the transfer...
2214 20:15:03.322251
2215 20:15:03.986841 00000000 ################################################################
2216 20:15:03.987428
2217 20:15:04.559131 00080000 ################################################################
2218 20:15:04.559285
2219 20:15:05.153676 00100000 ################################################################
2220 20:15:05.153859
2221 20:15:05.719583 00180000 ################################################################
2222 20:15:05.719732
2223 20:15:06.262319 00200000 ################################################################
2224 20:15:06.262462
2225 20:15:06.827806 00280000 ################################################################
2226 20:15:06.827947
2227 20:15:07.389585 00300000 ################################################################
2228 20:15:07.389730
2229 20:15:07.955325 00380000 ################################################################
2230 20:15:07.955523
2231 20:15:08.516597 00400000 ################################################################
2232 20:15:08.516754
2233 20:15:09.071999 00480000 ################################################################
2234 20:15:09.072150
2235 20:15:09.614909 00500000 ################################################################
2236 20:15:09.615056
2237 20:15:10.158510 00580000 ################################################################
2238 20:15:10.158652
2239 20:15:10.717269 00600000 ################################################################
2240 20:15:10.717417
2241 20:15:11.357043 00680000 ################################################################
2242 20:15:11.357566
2243 20:15:12.035581 00700000 ################################################################
2244 20:15:12.036094
2245 20:15:12.604364 00780000 ################################################################
2246 20:15:12.604514
2247 20:15:13.207872 00800000 ################################################################
2248 20:15:13.208020
2249 20:15:13.550561 00880000 ####################################### done.
2250 20:15:13.550712
2251 20:15:13.554099 Sending tftp read request... done.
2252 20:15:13.554193
2253 20:15:13.557167 Waiting for the transfer...
2254 20:15:13.557268
2255 20:15:13.557347 00000000 # done.
2256 20:15:13.557424
2257 20:15:13.567943 Command line loaded dynamically from TFTP file: 12402844/tftp-deploy-h6bgyvbh/kernel/cmdline
2258 20:15:13.568064
2259 20:15:13.583547 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2260 20:15:13.587299
2261 20:15:13.591017 Shutting down all USB controllers.
2262 20:15:13.591208
2263 20:15:13.591361 Removing current net device
2264 20:15:13.591503
2265 20:15:13.594270 Finalizing coreboot
2266 20:15:13.594496
2267 20:15:13.600767 Exiting depthcharge with code 4 at timestamp: 34514877
2268 20:15:13.601045
2269 20:15:13.601262
2270 20:15:13.601470 Starting kernel ...
2271 20:15:13.601667
2272 20:15:13.601928
2273 20:15:13.602991 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2274 20:15:13.603410 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2275 20:15:13.603725 Setting prompt string to ['Linux version [0-9]']
2276 20:15:13.604015 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2277 20:15:13.604315 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2279 20:19:32.604695 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2281 20:19:32.605834 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2283 20:19:32.606691 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2286 20:19:32.608181 end: 2 depthcharge-action (duration 00:05:00) [common]
2288 20:19:32.609061 Cleaning after the job
2289 20:19:32.609165 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12402844/tftp-deploy-h6bgyvbh/ramdisk
2290 20:19:32.610644 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12402844/tftp-deploy-h6bgyvbh/kernel
2291 20:19:32.612599 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12402844/tftp-deploy-h6bgyvbh/modules
2292 20:19:32.613269 start: 5.1 power-off (timeout 00:00:30) [common]
2293 20:19:32.613443 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2294 20:19:36.728427 >> Command sent successfully.
2295 20:19:36.738778 Returned 0 in 4 seconds
2296 20:19:36.840047 end: 5.1 power-off (duration 00:00:04) [common]
2298 20:19:36.841492 start: 5.2 read-feedback (timeout 00:09:56) [common]
2299 20:19:36.842692 Listened to connection for namespace 'common' for up to 1s
2300 20:19:37.843529 Finalising connection for namespace 'common'
2301 20:19:37.844220 Disconnecting from shell: Finalise
2302 20:19:37.844666
2303 20:19:37.945634 end: 5.2 read-feedback (duration 00:00:01) [common]
2304 20:19:37.946217 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12402844
2305 20:19:38.000656 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12402844
2306 20:19:38.000883 JobError: Your job cannot terminate cleanly.