Boot log: asus-cx9400-volteer

    1 20:14:31.005900  lava-dispatcher, installed at version: 2023.10
    2 20:14:31.006159  start: 0 validate
    3 20:14:31.006339  Start time: 2023-12-28 20:14:31.006331+00:00 (UTC)
    4 20:14:31.006506  Using caching service: 'http://localhost/cache/?uri=%s'
    5 20:14:31.006692  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
    6 20:14:31.266185  Using caching service: 'http://localhost/cache/?uri=%s'
    7 20:14:31.266361  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.299-cip105-1134-gc868d5e4adaa%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 20:14:31.532009  Using caching service: 'http://localhost/cache/?uri=%s'
    9 20:14:31.532182  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.19.299-cip105-1134-gc868d5e4adaa%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 20:14:31.782558  validate duration: 0.78
   12 20:14:31.782848  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 20:14:31.782977  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 20:14:31.783073  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 20:14:31.783198  Not decompressing ramdisk as can be used compressed.
   16 20:14:31.783282  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
   17 20:14:31.783351  saving as /var/lib/lava/dispatcher/tmp/12402913/tftp-deploy-nd29uic9/ramdisk/rootfs.cpio.gz
   18 20:14:31.783415  total size: 35760064 (34 MB)
   19 20:14:31.784466  progress   0 % (0 MB)
   20 20:14:31.793991  progress   5 % (1 MB)
   21 20:14:31.803642  progress  10 % (3 MB)
   22 20:14:31.813026  progress  15 % (5 MB)
   23 20:14:31.822822  progress  20 % (6 MB)
   24 20:14:31.832261  progress  25 % (8 MB)
   25 20:14:31.841892  progress  30 % (10 MB)
   26 20:14:31.851439  progress  35 % (11 MB)
   27 20:14:31.861080  progress  40 % (13 MB)
   28 20:14:31.870746  progress  45 % (15 MB)
   29 20:14:31.880123  progress  50 % (17 MB)
   30 20:14:31.889715  progress  55 % (18 MB)
   31 20:14:31.899201  progress  60 % (20 MB)
   32 20:14:31.908812  progress  65 % (22 MB)
   33 20:14:31.918233  progress  70 % (23 MB)
   34 20:14:31.927751  progress  75 % (25 MB)
   35 20:14:31.937284  progress  80 % (27 MB)
   36 20:14:31.946717  progress  85 % (29 MB)
   37 20:14:31.956175  progress  90 % (30 MB)
   38 20:14:31.965417  progress  95 % (32 MB)
   39 20:14:31.974805  progress 100 % (34 MB)
   40 20:14:31.975003  34 MB downloaded in 0.19 s (178.01 MB/s)
   41 20:14:31.975179  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 20:14:31.975428  end: 1.1 download-retry (duration 00:00:00) [common]
   44 20:14:31.975516  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 20:14:31.975600  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 20:14:31.975729  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.299-cip105-1134-gc868d5e4adaa/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 20:14:31.975802  saving as /var/lib/lava/dispatcher/tmp/12402913/tftp-deploy-nd29uic9/kernel/bzImage
   48 20:14:31.975865  total size: 11579904 (11 MB)
   49 20:14:31.975928  No compression specified
   50 20:14:31.977110  progress   0 % (0 MB)
   51 20:14:31.980194  progress   5 % (0 MB)
   52 20:14:31.983528  progress  10 % (1 MB)
   53 20:14:31.986683  progress  15 % (1 MB)
   54 20:14:31.989663  progress  20 % (2 MB)
   55 20:14:31.992840  progress  25 % (2 MB)
   56 20:14:31.996041  progress  30 % (3 MB)
   57 20:14:31.999300  progress  35 % (3 MB)
   58 20:14:32.002878  progress  40 % (4 MB)
   59 20:14:32.006681  progress  45 % (5 MB)
   60 20:14:32.010003  progress  50 % (5 MB)
   61 20:14:32.013278  progress  55 % (6 MB)
   62 20:14:32.017055  progress  60 % (6 MB)
   63 20:14:32.020442  progress  65 % (7 MB)
   64 20:14:32.024156  progress  70 % (7 MB)
   65 20:14:32.027654  progress  75 % (8 MB)
   66 20:14:32.031210  progress  80 % (8 MB)
   67 20:14:32.034704  progress  85 % (9 MB)
   68 20:14:32.038475  progress  90 % (9 MB)
   69 20:14:32.041583  progress  95 % (10 MB)
   70 20:14:32.044861  progress 100 % (11 MB)
   71 20:14:32.045087  11 MB downloaded in 0.07 s (159.55 MB/s)
   72 20:14:32.045288  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 20:14:32.045621  end: 1.2 download-retry (duration 00:00:00) [common]
   75 20:14:32.045714  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 20:14:32.045801  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 20:14:32.045937  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.19.299-cip105-1134-gc868d5e4adaa/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 20:14:32.046011  saving as /var/lib/lava/dispatcher/tmp/12402913/tftp-deploy-nd29uic9/modules/modules.tar
   79 20:14:32.046074  total size: 484260 (0 MB)
   80 20:14:32.046138  Using unxz to decompress xz
   81 20:14:32.050876  progress   6 % (0 MB)
   82 20:14:32.051336  progress  13 % (0 MB)
   83 20:14:32.051604  progress  20 % (0 MB)
   84 20:14:32.053375  progress  27 % (0 MB)
   85 20:14:32.055536  progress  33 % (0 MB)
   86 20:14:32.057752  progress  40 % (0 MB)
   87 20:14:32.059796  progress  47 % (0 MB)
   88 20:14:32.061747  progress  54 % (0 MB)
   89 20:14:32.064080  progress  60 % (0 MB)
   90 20:14:32.066267  progress  67 % (0 MB)
   91 20:14:32.068510  progress  74 % (0 MB)
   92 20:14:32.070905  progress  81 % (0 MB)
   93 20:14:32.072958  progress  87 % (0 MB)
   94 20:14:32.075092  progress  94 % (0 MB)
   95 20:14:32.077810  progress 100 % (0 MB)
   96 20:14:32.084965  0 MB downloaded in 0.04 s (11.88 MB/s)
   97 20:14:32.085251  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 20:14:32.085606  end: 1.3 download-retry (duration 00:00:00) [common]
  100 20:14:32.085706  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
  101 20:14:32.085809  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  102 20:14:32.085896  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 20:14:32.085983  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  104 20:14:32.086202  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81
  105 20:14:32.086343  makedir: /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin
  106 20:14:32.086458  makedir: /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/tests
  107 20:14:32.086637  makedir: /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/results
  108 20:14:32.086810  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-add-keys
  109 20:14:32.086972  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-add-sources
  110 20:14:32.087116  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-background-process-start
  111 20:14:32.087253  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-background-process-stop
  112 20:14:32.087392  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-common-functions
  113 20:14:32.087525  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-echo-ipv4
  114 20:14:32.087657  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-install-packages
  115 20:14:32.087788  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-installed-packages
  116 20:14:32.087919  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-os-build
  117 20:14:32.088049  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-probe-channel
  118 20:14:32.088179  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-probe-ip
  119 20:14:32.088310  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-target-ip
  120 20:14:32.088439  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-target-mac
  121 20:14:32.088571  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-target-storage
  122 20:14:32.088706  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-test-case
  123 20:14:32.088836  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-test-event
  124 20:14:32.088965  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-test-feedback
  125 20:14:32.089096  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-test-raise
  126 20:14:32.089227  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-test-reference
  127 20:14:32.089360  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-test-runner
  128 20:14:32.089499  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-test-set
  129 20:14:32.089634  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-test-shell
  130 20:14:32.089770  Updating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-install-packages (oe)
  131 20:14:32.102351  Updating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/bin/lava-installed-packages (oe)
  132 20:14:32.102583  Creating /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/environment
  133 20:14:32.102739  LAVA metadata
  134 20:14:32.102851  - LAVA_JOB_ID=12402913
  135 20:14:32.102956  - LAVA_DISPATCHER_IP=192.168.201.1
  136 20:14:32.103112  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  137 20:14:32.103213  skipped lava-vland-overlay
  138 20:14:32.103328  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 20:14:32.103446  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  140 20:14:32.103541  skipped lava-multinode-overlay
  141 20:14:32.103649  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 20:14:32.103764  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  143 20:14:32.103873  Loading test definitions
  144 20:14:32.104005  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  145 20:14:32.104118  Using /lava-12402913 at stage 0
  146 20:14:32.104556  uuid=12402913_1.4.2.3.1 testdef=None
  147 20:14:32.104679  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 20:14:32.104802  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  149 20:14:32.105577  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 20:14:32.105862  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  152 20:14:32.106488  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 20:14:32.106721  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  155 20:14:32.112411  runner path: /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/0/tests/0_cros-ec test_uuid 12402913_1.4.2.3.1
  156 20:14:32.112644  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 20:14:32.112930  Creating lava-test-runner.conf files
  159 20:14:32.113027  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12402913/lava-overlay-68f94v81/lava-12402913/0 for stage 0
  160 20:14:32.113158  - 0_cros-ec
  161 20:14:32.113301  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  162 20:14:32.113425  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  163 20:14:32.121081  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  164 20:14:32.121322  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  165 20:14:32.121469  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  166 20:14:32.121578  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  167 20:14:32.121669  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  168 20:14:33.220226  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  169 20:14:33.220648  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  170 20:14:33.220772  extracting modules file /var/lib/lava/dispatcher/tmp/12402913/tftp-deploy-nd29uic9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12402913/extract-overlay-ramdisk-z9hi92hm/ramdisk
  171 20:14:33.246687  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  172 20:14:33.246873  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  173 20:14:33.246997  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12402913/compress-overlay-ts933snu/overlay-1.4.2.4.tar.gz to ramdisk
  174 20:14:33.247072  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12402913/compress-overlay-ts933snu/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12402913/extract-overlay-ramdisk-z9hi92hm/ramdisk
  175 20:14:33.254246  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  176 20:14:33.254380  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  177 20:14:33.254475  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  178 20:14:33.254593  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  179 20:14:33.254732  Building ramdisk /var/lib/lava/dispatcher/tmp/12402913/extract-overlay-ramdisk-z9hi92hm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12402913/extract-overlay-ramdisk-z9hi92hm/ramdisk
  180 20:14:33.811866  >> 188278 blocks

  181 20:14:37.411026  rename /var/lib/lava/dispatcher/tmp/12402913/extract-overlay-ramdisk-z9hi92hm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12402913/tftp-deploy-nd29uic9/ramdisk/ramdisk.cpio.gz
  182 20:14:37.411490  end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
  183 20:14:37.411617  start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
  184 20:14:37.411718  start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
  185 20:14:37.411980  No mkimage arch provided, not using FIT.
  186 20:14:37.412071  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  187 20:14:37.412152  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  188 20:14:37.412250  end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
  189 20:14:37.412338  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
  190 20:14:37.412414  No LXC device requested
  191 20:14:37.412491  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  192 20:14:37.412576  start: 1.6 deploy-device-env (timeout 00:09:54) [common]
  193 20:14:37.412656  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  194 20:14:37.412730  Checking files for TFTP limit of 4294967296 bytes.
  195 20:14:37.413128  end: 1 tftp-deploy (duration 00:00:06) [common]
  196 20:14:37.413235  start: 2 depthcharge-action (timeout 00:05:00) [common]
  197 20:14:37.413324  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  198 20:14:37.413447  substitutions:
  199 20:14:37.413561  - {DTB}: None
  200 20:14:37.413624  - {INITRD}: 12402913/tftp-deploy-nd29uic9/ramdisk/ramdisk.cpio.gz
  201 20:14:37.413683  - {KERNEL}: 12402913/tftp-deploy-nd29uic9/kernel/bzImage
  202 20:14:37.413740  - {LAVA_MAC}: None
  203 20:14:37.413797  - {PRESEED_CONFIG}: None
  204 20:14:37.413852  - {PRESEED_LOCAL}: None
  205 20:14:37.413906  - {RAMDISK}: 12402913/tftp-deploy-nd29uic9/ramdisk/ramdisk.cpio.gz
  206 20:14:37.413961  - {ROOT_PART}: None
  207 20:14:37.414015  - {ROOT}: None
  208 20:14:37.414069  - {SERVER_IP}: 192.168.201.1
  209 20:14:37.414122  - {TEE}: None
  210 20:14:37.414175  Parsed boot commands:
  211 20:14:37.414228  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  212 20:14:37.414406  Parsed boot commands: tftpboot 192.168.201.1 12402913/tftp-deploy-nd29uic9/kernel/bzImage 12402913/tftp-deploy-nd29uic9/kernel/cmdline 12402913/tftp-deploy-nd29uic9/ramdisk/ramdisk.cpio.gz
  213 20:14:37.414491  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  214 20:14:37.414574  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  215 20:14:37.414677  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  216 20:14:37.414767  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  217 20:14:37.414845  Not connected, no need to disconnect.
  218 20:14:37.414921  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  219 20:14:37.415002  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  220 20:14:37.415067  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-3'
  221 20:14:37.419132  Setting prompt string to ['lava-test: # ']
  222 20:14:37.419513  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  223 20:14:37.419626  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  224 20:14:37.419722  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  225 20:14:37.419832  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  226 20:14:37.420036  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
  227 20:14:42.556115  >> Command sent successfully.

  228 20:14:42.559072  Returned 0 in 5 seconds
  229 20:14:42.659487  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  231 20:14:42.659819  end: 2.2.2 reset-device (duration 00:00:05) [common]
  232 20:14:42.659918  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  233 20:14:42.660008  Setting prompt string to 'Starting depthcharge on Voema...'
  234 20:14:42.660073  Changing prompt to 'Starting depthcharge on Voema...'
  235 20:14:42.660139  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  236 20:14:42.660405  [Enter `^Ec?' for help]

  237 20:14:44.261115  

  238 20:14:44.261261  

  239 20:14:44.270852  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  240 20:14:44.274064  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  241 20:14:44.280593  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  242 20:14:44.284060  CPU: AES supported, TXT NOT supported, VT supported

  243 20:14:44.290469  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  244 20:14:44.294285  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  245 20:14:44.300543  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  246 20:14:44.303949  VBOOT: Loading verstage.

  247 20:14:44.307461  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  248 20:14:44.314267  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  249 20:14:44.317408  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  250 20:14:44.327629  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  251 20:14:44.334437  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  252 20:14:44.334523  

  253 20:14:44.334589  

  254 20:14:44.348086  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  255 20:14:44.361353  Probing TPM: . done!

  256 20:14:44.364609  TPM ready after 0 ms

  257 20:14:44.367876  Connected to device vid:did:rid of 1ae0:0028:00

  258 20:14:44.379145  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  259 20:14:44.385737  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  260 20:14:44.389264  Initialized TPM device CR50 revision 0

  261 20:14:44.438678  tlcl_send_startup: Startup return code is 0

  262 20:14:44.438779  TPM: setup succeeded

  263 20:14:44.453050  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  264 20:14:44.467127  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  265 20:14:44.479910  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  266 20:14:44.490028  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  267 20:14:44.493721  Chrome EC: UHEPI supported

  268 20:14:44.496724  Phase 1

  269 20:14:44.500491  FMAP: area GBB found @ 1805000 (458752 bytes)

  270 20:14:44.510298  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  271 20:14:44.516965  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  272 20:14:44.523502  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  273 20:14:44.530021  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  274 20:14:44.533579  Recovery requested (1009000e)

  275 20:14:44.536694  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 20:14:44.548041  tlcl_extend: response is 0

  277 20:14:44.555105  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 20:14:44.564716  tlcl_extend: response is 0

  279 20:14:44.571160  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  280 20:14:44.578106  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  281 20:14:44.584646  BS: verstage times (exec / console): total (unknown) / 142 ms

  282 20:14:44.584734  

  283 20:14:44.584800  

  284 20:14:44.598071  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  285 20:14:44.604284  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 20:14:44.607833  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 20:14:44.611488  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  288 20:14:44.617815  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 20:14:44.621213  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  290 20:14:44.624550  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  291 20:14:44.627771  TCO_STS:   0000 0000

  292 20:14:44.630946  GEN_PMCON: d0015038 00002200

  293 20:14:44.634430  GBLRST_CAUSE: 00000000 00000000

  294 20:14:44.634514  HPR_CAUSE0: 00000000

  295 20:14:44.637692  prev_sleep_state 5

  296 20:14:44.641153  Boot Count incremented to 26194

  297 20:14:44.647981  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  298 20:14:44.654556  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  299 20:14:44.661136  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  300 20:14:44.667662  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  301 20:14:44.672052  Chrome EC: UHEPI supported

  302 20:14:44.678694  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  303 20:14:44.691846  Probing TPM:  done!

  304 20:14:44.698530  Connected to device vid:did:rid of 1ae0:0028:00

  305 20:14:44.709302  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  306 20:14:44.716591  Initialized TPM device CR50 revision 0

  307 20:14:44.726624  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  308 20:14:44.733235  MRC: Hash idx 0x100b comparison successful.

  309 20:14:44.736482  MRC cache found, size faa8

  310 20:14:44.736567  bootmode is set to: 2

  311 20:14:44.740293  SPD index = 0

  312 20:14:44.746485  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  313 20:14:44.750279  SPD: module type is LPDDR4X

  314 20:14:44.753146  SPD: module part number is MT53E512M64D4NW-046

  315 20:14:44.759868  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  316 20:14:44.763476  SPD: device width 16 bits, bus width 16 bits

  317 20:14:44.770149  SPD: module size is 1024 MB (per channel)

  318 20:14:45.201756  CBMEM:

  319 20:14:45.204981  IMD: root @ 0x76fff000 254 entries.

  320 20:14:45.208373  IMD: root @ 0x76ffec00 62 entries.

  321 20:14:45.211801  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  322 20:14:45.218307  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  323 20:14:45.221942  External stage cache:

  324 20:14:45.225095  IMD: root @ 0x7b3ff000 254 entries.

  325 20:14:45.228483  IMD: root @ 0x7b3fec00 62 entries.

  326 20:14:45.243652  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  327 20:14:45.250315  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  328 20:14:45.256548  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  329 20:14:45.270523  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  330 20:14:45.277305  cse_lite: Skip switching to RW in the recovery path

  331 20:14:45.277399  8 DIMMs found

  332 20:14:45.277469  SMM Memory Map

  333 20:14:45.281364  SMRAM       : 0x7b000000 0x800000

  334 20:14:45.284861   Subregion 0: 0x7b000000 0x200000

  335 20:14:45.288602   Subregion 1: 0x7b200000 0x200000

  336 20:14:45.291659   Subregion 2: 0x7b400000 0x400000

  337 20:14:45.295111  top_of_ram = 0x77000000

  338 20:14:45.301812  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  339 20:14:45.305128  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  340 20:14:45.311539  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  341 20:14:45.314958  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  342 20:14:45.324639  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  343 20:14:45.328216  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  344 20:14:45.340219  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  345 20:14:45.346793  Processing 211 relocs. Offset value of 0x74c0b000

  346 20:14:45.353622  BS: romstage times (exec / console): total (unknown) / 277 ms

  347 20:14:45.359680  

  348 20:14:45.359766  

  349 20:14:45.369201  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  350 20:14:45.372579  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  351 20:14:45.382609  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  352 20:14:45.389464  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  353 20:14:45.396168  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  354 20:14:45.402489  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  355 20:14:45.449305  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  356 20:14:45.456222  Processing 5008 relocs. Offset value of 0x75d98000

  357 20:14:45.459283  BS: postcar times (exec / console): total (unknown) / 59 ms

  358 20:14:45.462826  

  359 20:14:45.462911  

  360 20:14:45.472672  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  361 20:14:45.472762  Normal boot

  362 20:14:45.476755  FW_CONFIG value is 0x804c02

  363 20:14:45.479556  PCI: 00:07.0 disabled by fw_config

  364 20:14:45.482823  PCI: 00:07.1 disabled by fw_config

  365 20:14:45.486389  PCI: 00:0d.2 disabled by fw_config

  366 20:14:45.489597  PCI: 00:1c.7 disabled by fw_config

  367 20:14:45.496573  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 20:14:45.503291  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  369 20:14:45.506191  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  370 20:14:45.509704  GENERIC: 0.0 disabled by fw_config

  371 20:14:45.512781  GENERIC: 1.0 disabled by fw_config

  372 20:14:45.519783  fw_config match found: DB_USB=USB3_ACTIVE

  373 20:14:45.522829  fw_config match found: DB_USB=USB3_ACTIVE

  374 20:14:45.526114  fw_config match found: DB_USB=USB3_ACTIVE

  375 20:14:45.529615  fw_config match found: DB_USB=USB3_ACTIVE

  376 20:14:45.536250  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  377 20:14:45.543036  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  378 20:14:45.549322  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  379 20:14:45.559481  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  380 20:14:45.562640  microcode: sig=0x806c1 pf=0x80 revision=0x86

  381 20:14:45.569139  microcode: Update skipped, already up-to-date

  382 20:14:45.575882  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  383 20:14:45.602903  Detected 4 core, 8 thread CPU.

  384 20:14:45.606502  Setting up SMI for CPU

  385 20:14:45.609621  IED base = 0x7b400000

  386 20:14:45.609705  IED size = 0x00400000

  387 20:14:45.613218  Will perform SMM setup.

  388 20:14:45.619543  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  389 20:14:45.626016  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  390 20:14:45.632624  Processing 16 relocs. Offset value of 0x00030000

  391 20:14:45.636444  Attempting to start 7 APs

  392 20:14:45.639459  Waiting for 10ms after sending INIT.

  393 20:14:45.655529  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  394 20:14:45.658788  AP: slot 4 apic_id 5.

  395 20:14:45.662216  AP: slot 5 apic_id 4.

  396 20:14:45.662305  AP: slot 6 apic_id 2.

  397 20:14:45.665530  AP: slot 2 apic_id 3.

  398 20:14:45.668866  AP: slot 3 apic_id 6.

  399 20:14:45.668956  AP: slot 7 apic_id 7.

  400 20:14:45.669027  done.

  401 20:14:45.674876  Waiting for 2nd SIPI to complete...done.

  402 20:14:45.681789  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  403 20:14:45.688409  Processing 13 relocs. Offset value of 0x00038000

  404 20:14:45.691693  Unable to locate Global NVS

  405 20:14:45.698554  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  406 20:14:45.701380  Installing permanent SMM handler to 0x7b000000

  407 20:14:45.711737  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  408 20:14:45.714869  Processing 794 relocs. Offset value of 0x7b010000

  409 20:14:45.725130  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  410 20:14:45.728518  Processing 13 relocs. Offset value of 0x7b008000

  411 20:14:45.734959  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  412 20:14:45.741687  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  413 20:14:45.745003  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  414 20:14:45.751523  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  415 20:14:45.758269  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  416 20:14:45.765084  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  417 20:14:45.771618  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  418 20:14:45.772226  Unable to locate Global NVS

  419 20:14:45.781727  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  420 20:14:45.785128  Clearing SMI status registers

  421 20:14:45.785719  SMI_STS: PM1 

  422 20:14:45.788588  PM1_STS: PWRBTN 

  423 20:14:45.794709  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  424 20:14:45.798398  In relocation handler: CPU 0

  425 20:14:45.801415  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  426 20:14:45.808272  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  427 20:14:45.808759  Relocation complete.

  428 20:14:45.817784  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  429 20:14:45.818222  In relocation handler: CPU 1

  430 20:14:45.824989  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  431 20:14:45.825549  Relocation complete.

  432 20:14:45.834438  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  433 20:14:45.835069  In relocation handler: CPU 5

  434 20:14:45.841210  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  435 20:14:45.844556  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  436 20:14:45.848086  Relocation complete.

  437 20:14:45.854397  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  438 20:14:45.857655  In relocation handler: CPU 4

  439 20:14:45.860962  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  440 20:14:45.864651  Relocation complete.

  441 20:14:45.871041  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  442 20:14:45.874407  In relocation handler: CPU 2

  443 20:14:45.877739  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  444 20:14:45.881278  Relocation complete.

  445 20:14:45.887490  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  446 20:14:45.890853  In relocation handler: CPU 6

  447 20:14:45.894194  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  448 20:14:45.900739  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  449 20:14:45.901264  Relocation complete.

  450 20:14:45.907571  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  451 20:14:45.910996  In relocation handler: CPU 3

  452 20:14:45.914192  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  453 20:14:45.921187  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  454 20:14:45.924624  Relocation complete.

  455 20:14:45.931158  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  456 20:14:45.934503  In relocation handler: CPU 7

  457 20:14:45.937891  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  458 20:14:45.940769  Relocation complete.

  459 20:14:45.941316  Initializing CPU #0

  460 20:14:45.944718  CPU: vendor Intel device 806c1

  461 20:14:45.948498  CPU: family 06, model 8c, stepping 01

  462 20:14:45.952207  Clearing out pending MCEs

  463 20:14:45.955566  Setting up local APIC...

  464 20:14:45.956071   apic_id: 0x00 done.

  465 20:14:45.958747  Turbo is available but hidden

  466 20:14:45.962233  Turbo is available and visible

  467 20:14:45.965199  microcode: Update skipped, already up-to-date

  468 20:14:45.968887  CPU #0 initialized

  469 20:14:45.972234  Initializing CPU #1

  470 20:14:45.972712  Initializing CPU #5

  471 20:14:45.975813  Initializing CPU #4

  472 20:14:45.978955  CPU: vendor Intel device 806c1

  473 20:14:45.981983  CPU: family 06, model 8c, stepping 01

  474 20:14:45.985627  CPU: vendor Intel device 806c1

  475 20:14:45.988674  CPU: family 06, model 8c, stepping 01

  476 20:14:45.991935  Clearing out pending MCEs

  477 20:14:45.995279  Clearing out pending MCEs

  478 20:14:45.995734  Setting up local APIC...

  479 20:14:45.998594  CPU: vendor Intel device 806c1

  480 20:14:46.005239  CPU: family 06, model 8c, stepping 01

  481 20:14:46.005741  Initializing CPU #2

  482 20:14:46.008724  Initializing CPU #6

  483 20:14:46.012055  CPU: vendor Intel device 806c1

  484 20:14:46.015564  CPU: family 06, model 8c, stepping 01

  485 20:14:46.019006  Clearing out pending MCEs

  486 20:14:46.021764  CPU: vendor Intel device 806c1

  487 20:14:46.025050  CPU: family 06, model 8c, stepping 01

  488 20:14:46.028377  Clearing out pending MCEs

  489 20:14:46.028915  Clearing out pending MCEs

  490 20:14:46.031966  Setting up local APIC...

  491 20:14:46.035124  Setting up local APIC...

  492 20:14:46.038397  Setting up local APIC...

  493 20:14:46.038890  Initializing CPU #7

  494 20:14:46.041911  Initializing CPU #3

  495 20:14:46.044924  CPU: vendor Intel device 806c1

  496 20:14:46.048389  CPU: family 06, model 8c, stepping 01

  497 20:14:46.051634  CPU: vendor Intel device 806c1

  498 20:14:46.054811  CPU: family 06, model 8c, stepping 01

  499 20:14:46.057984  Clearing out pending MCEs

  500 20:14:46.061455  Clearing out pending MCEs

  501 20:14:46.061579  Setting up local APIC...

  502 20:14:46.064520   apic_id: 0x02 done.

  503 20:14:46.067905   apic_id: 0x03 done.

  504 20:14:46.071124  microcode: Update skipped, already up-to-date

  505 20:14:46.074617  microcode: Update skipped, already up-to-date

  506 20:14:46.078065  CPU #6 initialized

  507 20:14:46.081093  CPU #2 initialized

  508 20:14:46.081178   apic_id: 0x01 done.

  509 20:14:46.084437  Setting up local APIC...

  510 20:14:46.088134   apic_id: 0x04 done.

  511 20:14:46.088219  Setting up local APIC...

  512 20:14:46.091628   apic_id: 0x06 done.

  513 20:14:46.094917   apic_id: 0x07 done.

  514 20:14:46.098137  microcode: Update skipped, already up-to-date

  515 20:14:46.104422  microcode: Update skipped, already up-to-date

  516 20:14:46.104507  CPU #3 initialized

  517 20:14:46.108086  CPU #7 initialized

  518 20:14:46.108170   apic_id: 0x05 done.

  519 20:14:46.114556  microcode: Update skipped, already up-to-date

  520 20:14:46.118099  microcode: Update skipped, already up-to-date

  521 20:14:46.121411  CPU #5 initialized

  522 20:14:46.121536  CPU #4 initialized

  523 20:14:46.127745  microcode: Update skipped, already up-to-date

  524 20:14:46.127854  CPU #1 initialized

  525 20:14:46.134508  bsp_do_flight_plan done after 455 msecs.

  526 20:14:46.137618  CPU: frequency set to 4000 MHz

  527 20:14:46.137703  Enabling SMIs.

  528 20:14:46.144209  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  529 20:14:46.160021  SATAXPCIE1 indicates PCIe NVMe is present

  530 20:14:46.163463  Probing TPM:  done!

  531 20:14:46.166859  Connected to device vid:did:rid of 1ae0:0028:00

  532 20:14:46.177372  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  533 20:14:46.180749  Initialized TPM device CR50 revision 0

  534 20:14:46.184242  Enabling S0i3.4

  535 20:14:46.190743  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  536 20:14:46.194230  Found a VBT of 8704 bytes after decompression

  537 20:14:46.200899  cse_lite: CSE RO boot. HybridStorageMode disabled

  538 20:14:46.207110  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  539 20:14:46.282792  FSPS returned 0

  540 20:14:46.286130  Executing Phase 1 of FspMultiPhaseSiInit

  541 20:14:46.296099  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  542 20:14:46.299381  port C0 DISC req: usage 1 usb3 1 usb2 5

  543 20:14:46.302681  Raw Buffer output 0 00000511

  544 20:14:46.306211  Raw Buffer output 1 00000000

  545 20:14:46.309686  pmc_send_ipc_cmd succeeded

  546 20:14:46.316417  port C1 DISC req: usage 1 usb3 2 usb2 3

  547 20:14:46.316502  Raw Buffer output 0 00000321

  548 20:14:46.319781  Raw Buffer output 1 00000000

  549 20:14:46.323649  pmc_send_ipc_cmd succeeded

  550 20:14:46.329024  Detected 4 core, 8 thread CPU.

  551 20:14:46.332317  Detected 4 core, 8 thread CPU.

  552 20:14:46.566270  Display FSP Version Info HOB

  553 20:14:46.569969  Reference Code - CPU = a.0.4c.31

  554 20:14:46.573434  uCode Version = 0.0.0.86

  555 20:14:46.576229  TXT ACM version = ff.ff.ff.ffff

  556 20:14:46.579531  Reference Code - ME = a.0.4c.31

  557 20:14:46.582806  MEBx version = 0.0.0.0

  558 20:14:46.586610  ME Firmware Version = Consumer SKU

  559 20:14:46.589401  Reference Code - PCH = a.0.4c.31

  560 20:14:46.592799  PCH-CRID Status = Disabled

  561 20:14:46.596076  PCH-CRID Original Value = ff.ff.ff.ffff

  562 20:14:46.599429  PCH-CRID New Value = ff.ff.ff.ffff

  563 20:14:46.602663  OPROM - RST - RAID = ff.ff.ff.ffff

  564 20:14:46.606224  PCH Hsio Version = 4.0.0.0

  565 20:14:46.609584  Reference Code - SA - System Agent = a.0.4c.31

  566 20:14:46.612669  Reference Code - MRC = 2.0.0.1

  567 20:14:46.616080  SA - PCIe Version = a.0.4c.31

  568 20:14:46.619723  SA-CRID Status = Disabled

  569 20:14:46.622896  SA-CRID Original Value = 0.0.0.1

  570 20:14:46.626271  SA-CRID New Value = 0.0.0.1

  571 20:14:46.629513  OPROM - VBIOS = ff.ff.ff.ffff

  572 20:14:46.633030  IO Manageability Engine FW Version = 11.1.4.0

  573 20:14:46.636369  PHY Build Version = 0.0.0.e0

  574 20:14:46.639580  Thunderbolt(TM) FW Version = 0.0.0.0

  575 20:14:46.645857  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  576 20:14:46.649760  ITSS IRQ Polarities Before:

  577 20:14:46.649869  IPC0: 0xffffffff

  578 20:14:46.652652  IPC1: 0xffffffff

  579 20:14:46.652736  IPC2: 0xffffffff

  580 20:14:46.655874  IPC3: 0xffffffff

  581 20:14:46.659300  ITSS IRQ Polarities After:

  582 20:14:46.659384  IPC0: 0xffffffff

  583 20:14:46.662714  IPC1: 0xffffffff

  584 20:14:46.662798  IPC2: 0xffffffff

  585 20:14:46.666522  IPC3: 0xffffffff

  586 20:14:46.669262  Found PCIe Root Port #9 at PCI: 00:1d.0.

  587 20:14:46.682584  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  588 20:14:46.693179  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  589 20:14:46.706012  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  590 20:14:46.712773  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  591 20:14:46.712863  Enumerating buses...

  592 20:14:46.719558  Show all devs... Before device enumeration.

  593 20:14:46.719647  Root Device: enabled 1

  594 20:14:46.722997  DOMAIN: 0000: enabled 1

  595 20:14:46.726082  CPU_CLUSTER: 0: enabled 1

  596 20:14:46.729736  PCI: 00:00.0: enabled 1

  597 20:14:46.729821  PCI: 00:02.0: enabled 1

  598 20:14:46.733050  PCI: 00:04.0: enabled 1

  599 20:14:46.736466  PCI: 00:05.0: enabled 1

  600 20:14:46.739379  PCI: 00:06.0: enabled 0

  601 20:14:46.739463  PCI: 00:07.0: enabled 0

  602 20:14:46.743002  PCI: 00:07.1: enabled 0

  603 20:14:46.746307  PCI: 00:07.2: enabled 0

  604 20:14:46.749598  PCI: 00:07.3: enabled 0

  605 20:14:46.749682  PCI: 00:08.0: enabled 1

  606 20:14:46.753031  PCI: 00:09.0: enabled 0

  607 20:14:46.756449  PCI: 00:0a.0: enabled 0

  608 20:14:46.756533  PCI: 00:0d.0: enabled 1

  609 20:14:46.759304  PCI: 00:0d.1: enabled 0

  610 20:14:46.762598  PCI: 00:0d.2: enabled 0

  611 20:14:46.766044  PCI: 00:0d.3: enabled 0

  612 20:14:46.766157  PCI: 00:0e.0: enabled 0

  613 20:14:46.769312  PCI: 00:10.2: enabled 1

  614 20:14:46.772847  PCI: 00:10.6: enabled 0

  615 20:14:46.776192  PCI: 00:10.7: enabled 0

  616 20:14:46.776276  PCI: 00:12.0: enabled 0

  617 20:14:46.779203  PCI: 00:12.6: enabled 0

  618 20:14:46.782550  PCI: 00:13.0: enabled 0

  619 20:14:46.785845  PCI: 00:14.0: enabled 1

  620 20:14:46.785929  PCI: 00:14.1: enabled 0

  621 20:14:46.789253  PCI: 00:14.2: enabled 1

  622 20:14:46.792541  PCI: 00:14.3: enabled 1

  623 20:14:46.792625  PCI: 00:15.0: enabled 1

  624 20:14:46.796039  PCI: 00:15.1: enabled 1

  625 20:14:46.799426  PCI: 00:15.2: enabled 1

  626 20:14:46.802822  PCI: 00:15.3: enabled 1

  627 20:14:46.802905  PCI: 00:16.0: enabled 1

  628 20:14:46.805758  PCI: 00:16.1: enabled 0

  629 20:14:46.809232  PCI: 00:16.2: enabled 0

  630 20:14:46.812510  PCI: 00:16.3: enabled 0

  631 20:14:46.812593  PCI: 00:16.4: enabled 0

  632 20:14:46.816273  PCI: 00:16.5: enabled 0

  633 20:14:46.819242  PCI: 00:17.0: enabled 1

  634 20:14:46.822455  PCI: 00:19.0: enabled 0

  635 20:14:46.822539  PCI: 00:19.1: enabled 1

  636 20:14:46.825891  PCI: 00:19.2: enabled 0

  637 20:14:46.829347  PCI: 00:1c.0: enabled 1

  638 20:14:46.832591  PCI: 00:1c.1: enabled 0

  639 20:14:46.832676  PCI: 00:1c.2: enabled 0

  640 20:14:46.836049  PCI: 00:1c.3: enabled 0

  641 20:14:46.839361  PCI: 00:1c.4: enabled 0

  642 20:14:46.839444  PCI: 00:1c.5: enabled 0

  643 20:14:46.842367  PCI: 00:1c.6: enabled 1

  644 20:14:46.845912  PCI: 00:1c.7: enabled 0

  645 20:14:46.849115  PCI: 00:1d.0: enabled 1

  646 20:14:46.849199  PCI: 00:1d.1: enabled 0

  647 20:14:46.852263  PCI: 00:1d.2: enabled 1

  648 20:14:46.855623  PCI: 00:1d.3: enabled 0

  649 20:14:46.858987  PCI: 00:1e.0: enabled 1

  650 20:14:46.859071  PCI: 00:1e.1: enabled 0

  651 20:14:46.862415  PCI: 00:1e.2: enabled 1

  652 20:14:46.865743  PCI: 00:1e.3: enabled 1

  653 20:14:46.869030  PCI: 00:1f.0: enabled 1

  654 20:14:46.869113  PCI: 00:1f.1: enabled 0

  655 20:14:46.872410  PCI: 00:1f.2: enabled 1

  656 20:14:46.875620  PCI: 00:1f.3: enabled 1

  657 20:14:46.875704  PCI: 00:1f.4: enabled 0

  658 20:14:46.878954  PCI: 00:1f.5: enabled 1

  659 20:14:46.882376  PCI: 00:1f.6: enabled 0

  660 20:14:46.885663  PCI: 00:1f.7: enabled 0

  661 20:14:46.885772  APIC: 00: enabled 1

  662 20:14:46.888892  GENERIC: 0.0: enabled 1

  663 20:14:46.892177  GENERIC: 0.0: enabled 1

  664 20:14:46.895666  GENERIC: 1.0: enabled 1

  665 20:14:46.895741  GENERIC: 0.0: enabled 1

  666 20:14:46.899187  GENERIC: 1.0: enabled 1

  667 20:14:46.902425  USB0 port 0: enabled 1

  668 20:14:46.902501  GENERIC: 0.0: enabled 1

  669 20:14:46.905356  USB0 port 0: enabled 1

  670 20:14:46.909224  GENERIC: 0.0: enabled 1

  671 20:14:46.912549  I2C: 00:1a: enabled 1

  672 20:14:46.912657  I2C: 00:31: enabled 1

  673 20:14:46.915974  I2C: 00:32: enabled 1

  674 20:14:46.919398  I2C: 00:10: enabled 1

  675 20:14:46.919503  I2C: 00:15: enabled 1

  676 20:14:46.922399  GENERIC: 0.0: enabled 0

  677 20:14:46.926154  GENERIC: 1.0: enabled 0

  678 20:14:46.926256  GENERIC: 0.0: enabled 1

  679 20:14:46.929374  SPI: 00: enabled 1

  680 20:14:46.932742  SPI: 00: enabled 1

  681 20:14:46.932826  PNP: 0c09.0: enabled 1

  682 20:14:46.935947  GENERIC: 0.0: enabled 1

  683 20:14:46.939017  USB3 port 0: enabled 1

  684 20:14:46.939101  USB3 port 1: enabled 1

  685 20:14:46.941974  USB3 port 2: enabled 0

  686 20:14:46.945723  USB3 port 3: enabled 0

  687 20:14:46.948819  USB2 port 0: enabled 0

  688 20:14:46.948903  USB2 port 1: enabled 1

  689 20:14:46.952430  USB2 port 2: enabled 1

  690 20:14:46.955556  USB2 port 3: enabled 0

  691 20:14:46.955640  USB2 port 4: enabled 1

  692 20:14:46.958985  USB2 port 5: enabled 0

  693 20:14:46.962415  USB2 port 6: enabled 0

  694 20:14:46.965601  USB2 port 7: enabled 0

  695 20:14:46.965686  USB2 port 8: enabled 0

  696 20:14:46.968865  USB2 port 9: enabled 0

  697 20:14:46.972436  USB3 port 0: enabled 0

  698 20:14:46.972521  USB3 port 1: enabled 1

  699 20:14:46.975187  USB3 port 2: enabled 0

  700 20:14:46.978466  USB3 port 3: enabled 0

  701 20:14:46.982396  GENERIC: 0.0: enabled 1

  702 20:14:46.982486  GENERIC: 1.0: enabled 1

  703 20:14:46.985688  APIC: 01: enabled 1

  704 20:14:46.985839  APIC: 03: enabled 1

  705 20:14:46.988496  APIC: 06: enabled 1

  706 20:14:46.991912  APIC: 05: enabled 1

  707 20:14:46.992001  APIC: 04: enabled 1

  708 20:14:46.995508  APIC: 02: enabled 1

  709 20:14:46.998345  APIC: 07: enabled 1

  710 20:14:46.998425  Compare with tree...

  711 20:14:47.001674  Root Device: enabled 1

  712 20:14:47.005022   DOMAIN: 0000: enabled 1

  713 20:14:47.005097    PCI: 00:00.0: enabled 1

  714 20:14:47.008459    PCI: 00:02.0: enabled 1

  715 20:14:47.011723    PCI: 00:04.0: enabled 1

  716 20:14:47.015220     GENERIC: 0.0: enabled 1

  717 20:14:47.018653    PCI: 00:05.0: enabled 1

  718 20:14:47.022062    PCI: 00:06.0: enabled 0

  719 20:14:47.022146    PCI: 00:07.0: enabled 0

  720 20:14:47.024989     GENERIC: 0.0: enabled 1

  721 20:14:47.028298    PCI: 00:07.1: enabled 0

  722 20:14:47.031893     GENERIC: 1.0: enabled 1

  723 20:14:47.035133    PCI: 00:07.2: enabled 0

  724 20:14:47.035218     GENERIC: 0.0: enabled 1

  725 20:14:47.038357    PCI: 00:07.3: enabled 0

  726 20:14:47.041782     GENERIC: 1.0: enabled 1

  727 20:14:47.045068    PCI: 00:08.0: enabled 1

  728 20:14:47.048210    PCI: 00:09.0: enabled 0

  729 20:14:47.048294    PCI: 00:0a.0: enabled 0

  730 20:14:47.051335    PCI: 00:0d.0: enabled 1

  731 20:14:47.054690     USB0 port 0: enabled 1

  732 20:14:47.057977      USB3 port 0: enabled 1

  733 20:14:47.061369      USB3 port 1: enabled 1

  734 20:14:47.061501      USB3 port 2: enabled 0

  735 20:14:47.064954      USB3 port 3: enabled 0

  736 20:14:47.068536    PCI: 00:0d.1: enabled 0

  737 20:14:47.071768    PCI: 00:0d.2: enabled 0

  738 20:14:47.074557     GENERIC: 0.0: enabled 1

  739 20:14:47.077869    PCI: 00:0d.3: enabled 0

  740 20:14:47.077950    PCI: 00:0e.0: enabled 0

  741 20:14:47.081365    PCI: 00:10.2: enabled 1

  742 20:14:47.084863    PCI: 00:10.6: enabled 0

  743 20:14:47.088075    PCI: 00:10.7: enabled 0

  744 20:14:47.088160    PCI: 00:12.0: enabled 0

  745 20:14:47.091490    PCI: 00:12.6: enabled 0

  746 20:14:47.094978    PCI: 00:13.0: enabled 0

  747 20:14:47.097979    PCI: 00:14.0: enabled 1

  748 20:14:47.101390     USB0 port 0: enabled 1

  749 20:14:47.101534      USB2 port 0: enabled 0

  750 20:14:47.104751      USB2 port 1: enabled 1

  751 20:14:47.108108      USB2 port 2: enabled 1

  752 20:14:47.111477      USB2 port 3: enabled 0

  753 20:14:47.114376      USB2 port 4: enabled 1

  754 20:14:47.117708      USB2 port 5: enabled 0

  755 20:14:47.117792      USB2 port 6: enabled 0

  756 20:14:47.120998      USB2 port 7: enabled 0

  757 20:14:47.124361      USB2 port 8: enabled 0

  758 20:14:47.127925      USB2 port 9: enabled 0

  759 20:14:47.131321      USB3 port 0: enabled 0

  760 20:14:47.134738      USB3 port 1: enabled 1

  761 20:14:47.134823      USB3 port 2: enabled 0

  762 20:14:47.137949      USB3 port 3: enabled 0

  763 20:14:47.141119    PCI: 00:14.1: enabled 0

  764 20:14:47.144341    PCI: 00:14.2: enabled 1

  765 20:14:47.147630    PCI: 00:14.3: enabled 1

  766 20:14:47.147717     GENERIC: 0.0: enabled 1

  767 20:14:47.151054    PCI: 00:15.0: enabled 1

  768 20:14:47.154461     I2C: 00:1a: enabled 1

  769 20:14:47.157895     I2C: 00:31: enabled 1

  770 20:14:47.157980     I2C: 00:32: enabled 1

  771 20:14:47.161214    PCI: 00:15.1: enabled 1

  772 20:14:47.164276     I2C: 00:10: enabled 1

  773 20:14:47.167895    PCI: 00:15.2: enabled 1

  774 20:14:47.171392    PCI: 00:15.3: enabled 1

  775 20:14:47.171478    PCI: 00:16.0: enabled 1

  776 20:14:47.174734    PCI: 00:16.1: enabled 0

  777 20:14:47.177691    PCI: 00:16.2: enabled 0

  778 20:14:47.180854    PCI: 00:16.3: enabled 0

  779 20:14:47.184731    PCI: 00:16.4: enabled 0

  780 20:14:47.184817    PCI: 00:16.5: enabled 0

  781 20:14:47.187956    PCI: 00:17.0: enabled 1

  782 20:14:47.191914    PCI: 00:19.0: enabled 0

  783 20:14:47.195694    PCI: 00:19.1: enabled 1

  784 20:14:47.195781     I2C: 00:15: enabled 1

  785 20:14:47.198997    PCI: 00:19.2: enabled 0

  786 20:14:47.202072    PCI: 00:1d.0: enabled 1

  787 20:14:47.205530     GENERIC: 0.0: enabled 1

  788 20:14:47.205622    PCI: 00:1e.0: enabled 1

  789 20:14:47.208953    PCI: 00:1e.1: enabled 0

  790 20:14:47.212264    PCI: 00:1e.2: enabled 1

  791 20:14:47.215692     SPI: 00: enabled 1

  792 20:14:47.215777    PCI: 00:1e.3: enabled 1

  793 20:14:47.218852     SPI: 00: enabled 1

  794 20:14:47.222230    PCI: 00:1f.0: enabled 1

  795 20:14:47.225541     PNP: 0c09.0: enabled 1

  796 20:14:47.225655    PCI: 00:1f.1: enabled 0

  797 20:14:47.276943    PCI: 00:1f.2: enabled 1

  798 20:14:47.277084     GENERIC: 0.0: enabled 1

  799 20:14:47.277572      GENERIC: 0.0: enabled 1

  800 20:14:47.277673      GENERIC: 1.0: enabled 1

  801 20:14:47.277925    PCI: 00:1f.3: enabled 1

  802 20:14:47.277995    PCI: 00:1f.4: enabled 0

  803 20:14:47.278058    PCI: 00:1f.5: enabled 1

  804 20:14:47.278130    PCI: 00:1f.6: enabled 0

  805 20:14:47.278192    PCI: 00:1f.7: enabled 0

  806 20:14:47.278262   CPU_CLUSTER: 0: enabled 1

  807 20:14:47.278323    APIC: 00: enabled 1

  808 20:14:47.278393    APIC: 01: enabled 1

  809 20:14:47.278453    APIC: 03: enabled 1

  810 20:14:47.278525    APIC: 06: enabled 1

  811 20:14:47.278606    APIC: 05: enabled 1

  812 20:14:47.278681    APIC: 04: enabled 1

  813 20:14:47.278738    APIC: 02: enabled 1

  814 20:14:47.279286    APIC: 07: enabled 1

  815 20:14:47.279370  Root Device scanning...

  816 20:14:47.282745  scan_static_bus for Root Device

  817 20:14:47.282829  DOMAIN: 0000 enabled

  818 20:14:47.282898  CPU_CLUSTER: 0 enabled

  819 20:14:47.286092  DOMAIN: 0000 scanning...

  820 20:14:47.289746  PCI: pci_scan_bus for bus 00

  821 20:14:47.292833  PCI: 00:00.0 [8086/0000] ops

  822 20:14:47.296264  PCI: 00:00.0 [8086/9a12] enabled

  823 20:14:47.299399  PCI: 00:02.0 [8086/0000] bus ops

  824 20:14:47.302732  PCI: 00:02.0 [8086/9a40] enabled

  825 20:14:47.306342  PCI: 00:04.0 [8086/0000] bus ops

  826 20:14:47.309498  PCI: 00:04.0 [8086/9a03] enabled

  827 20:14:47.312760  PCI: 00:05.0 [8086/9a19] enabled

  828 20:14:47.316222  PCI: 00:07.0 [0000/0000] hidden

  829 20:14:47.319716  PCI: 00:08.0 [8086/9a11] enabled

  830 20:14:47.323124  PCI: 00:0a.0 [8086/9a0d] disabled

  831 20:14:47.326293  PCI: 00:0d.0 [8086/0000] bus ops

  832 20:14:47.329642  PCI: 00:0d.0 [8086/9a13] enabled

  833 20:14:47.332992  PCI: 00:14.0 [8086/0000] bus ops

  834 20:14:47.335830  PCI: 00:14.0 [8086/a0ed] enabled

  835 20:14:47.339243  PCI: 00:14.2 [8086/a0ef] enabled

  836 20:14:47.342527  PCI: 00:14.3 [8086/0000] bus ops

  837 20:14:47.346019  PCI: 00:14.3 [8086/a0f0] enabled

  838 20:14:47.349304  PCI: 00:15.0 [8086/0000] bus ops

  839 20:14:47.352774  PCI: 00:15.0 [8086/a0e8] enabled

  840 20:14:47.356016  PCI: 00:15.1 [8086/0000] bus ops

  841 20:14:47.359655  PCI: 00:15.1 [8086/a0e9] enabled

  842 20:14:47.362772  PCI: 00:15.2 [8086/0000] bus ops

  843 20:14:47.366256  PCI: 00:15.2 [8086/a0ea] enabled

  844 20:14:47.369440  PCI: 00:15.3 [8086/0000] bus ops

  845 20:14:47.372926  PCI: 00:15.3 [8086/a0eb] enabled

  846 20:14:47.376310  PCI: 00:16.0 [8086/0000] ops

  847 20:14:47.379706  PCI: 00:16.0 [8086/a0e0] enabled

  848 20:14:47.386238  PCI: Static device PCI: 00:17.0 not found, disabling it.

  849 20:14:47.389570  PCI: 00:19.0 [8086/0000] bus ops

  850 20:14:47.392738  PCI: 00:19.0 [8086/a0c5] disabled

  851 20:14:47.395875  PCI: 00:19.1 [8086/0000] bus ops

  852 20:14:47.399371  PCI: 00:19.1 [8086/a0c6] enabled

  853 20:14:47.402747  PCI: 00:1d.0 [8086/0000] bus ops

  854 20:14:47.406424  PCI: 00:1d.0 [8086/a0b0] enabled

  855 20:14:47.406509  PCI: 00:1e.0 [8086/0000] ops

  856 20:14:47.409515  PCI: 00:1e.0 [8086/a0a8] enabled

  857 20:14:47.412884  PCI: 00:1e.2 [8086/0000] bus ops

  858 20:14:47.416074  PCI: 00:1e.2 [8086/a0aa] enabled

  859 20:14:47.419167  PCI: 00:1e.3 [8086/0000] bus ops

  860 20:14:47.422804  PCI: 00:1e.3 [8086/a0ab] enabled

  861 20:14:47.425875  PCI: 00:1f.0 [8086/0000] bus ops

  862 20:14:47.429655  PCI: 00:1f.0 [8086/a087] enabled

  863 20:14:47.433343  RTC Init

  864 20:14:47.436320  Set power on after power failure.

  865 20:14:47.436405  Disabling Deep S3

  866 20:14:47.439768  Disabling Deep S3

  867 20:14:47.443110  Disabling Deep S4

  868 20:14:47.443195  Disabling Deep S4

  869 20:14:47.446000  Disabling Deep S5

  870 20:14:47.446084  Disabling Deep S5

  871 20:14:47.449542  PCI: 00:1f.2 [0000/0000] hidden

  872 20:14:47.452877  PCI: 00:1f.3 [8086/0000] bus ops

  873 20:14:47.456351  PCI: 00:1f.3 [8086/a0c8] enabled

  874 20:14:47.459653  PCI: 00:1f.5 [8086/0000] bus ops

  875 20:14:47.462981  PCI: 00:1f.5 [8086/a0a4] enabled

  876 20:14:47.466281  PCI: Leftover static devices:

  877 20:14:47.469208  PCI: 00:10.2

  878 20:14:47.469298  PCI: 00:10.6

  879 20:14:47.469364  PCI: 00:10.7

  880 20:14:47.472616  PCI: 00:06.0

  881 20:14:47.472700  PCI: 00:07.1

  882 20:14:47.476272  PCI: 00:07.2

  883 20:14:47.476357  PCI: 00:07.3

  884 20:14:47.476423  PCI: 00:09.0

  885 20:14:47.479564  PCI: 00:0d.1

  886 20:14:47.479648  PCI: 00:0d.2

  887 20:14:47.482922  PCI: 00:0d.3

  888 20:14:47.483010  PCI: 00:0e.0

  889 20:14:47.486036  PCI: 00:12.0

  890 20:14:47.486121  PCI: 00:12.6

  891 20:14:47.486225  PCI: 00:13.0

  892 20:14:47.489318  PCI: 00:14.1

  893 20:14:47.489429  PCI: 00:16.1

  894 20:14:47.493037  PCI: 00:16.2

  895 20:14:47.493124  PCI: 00:16.3

  896 20:14:47.493227  PCI: 00:16.4

  897 20:14:47.495921  PCI: 00:16.5

  898 20:14:47.496008  PCI: 00:17.0

  899 20:14:47.499792  PCI: 00:19.2

  900 20:14:47.499879  PCI: 00:1e.1

  901 20:14:47.499966  PCI: 00:1f.1

  902 20:14:47.502702  PCI: 00:1f.4

  903 20:14:47.502788  PCI: 00:1f.6

  904 20:14:47.505984  PCI: 00:1f.7

  905 20:14:47.509255  PCI: Check your devicetree.cb.

  906 20:14:47.509366  PCI: 00:02.0 scanning...

  907 20:14:47.516056  scan_generic_bus for PCI: 00:02.0

  908 20:14:47.519370  scan_generic_bus for PCI: 00:02.0 done

  909 20:14:47.522542  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  910 20:14:47.525874  PCI: 00:04.0 scanning...

  911 20:14:47.529076  scan_generic_bus for PCI: 00:04.0

  912 20:14:47.532473  GENERIC: 0.0 enabled

  913 20:14:47.536035  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  914 20:14:47.542421  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  915 20:14:47.546047  PCI: 00:0d.0 scanning...

  916 20:14:47.549230  scan_static_bus for PCI: 00:0d.0

  917 20:14:47.549315  USB0 port 0 enabled

  918 20:14:47.552609  USB0 port 0 scanning...

  919 20:14:47.555898  scan_static_bus for USB0 port 0

  920 20:14:47.559394  USB3 port 0 enabled

  921 20:14:47.559479  USB3 port 1 enabled

  922 20:14:47.562696  USB3 port 2 disabled

  923 20:14:47.566230  USB3 port 3 disabled

  924 20:14:47.566317  USB3 port 0 scanning...

  925 20:14:47.569039  scan_static_bus for USB3 port 0

  926 20:14:47.575954  scan_static_bus for USB3 port 0 done

  927 20:14:47.579564  scan_bus: bus USB3 port 0 finished in 6 msecs

  928 20:14:47.582253  USB3 port 1 scanning...

  929 20:14:47.585636  scan_static_bus for USB3 port 1

  930 20:14:47.588975  scan_static_bus for USB3 port 1 done

  931 20:14:47.592483  scan_bus: bus USB3 port 1 finished in 6 msecs

  932 20:14:47.595718  scan_static_bus for USB0 port 0 done

  933 20:14:47.602294  scan_bus: bus USB0 port 0 finished in 43 msecs

  934 20:14:47.605501  scan_static_bus for PCI: 00:0d.0 done

  935 20:14:47.608899  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  936 20:14:47.612247  PCI: 00:14.0 scanning...

  937 20:14:47.615524  scan_static_bus for PCI: 00:14.0

  938 20:14:47.619035  USB0 port 0 enabled

  939 20:14:47.619145  USB0 port 0 scanning...

  940 20:14:47.622940  scan_static_bus for USB0 port 0

  941 20:14:47.626231  USB2 port 0 disabled

  942 20:14:47.629158  USB2 port 1 enabled

  943 20:14:47.629242  USB2 port 2 enabled

  944 20:14:47.632433  USB2 port 3 disabled

  945 20:14:47.635691  USB2 port 4 enabled

  946 20:14:47.635774  USB2 port 5 disabled

  947 20:14:47.639163  USB2 port 6 disabled

  948 20:14:47.642427  USB2 port 7 disabled

  949 20:14:47.642511  USB2 port 8 disabled

  950 20:14:47.645924  USB2 port 9 disabled

  951 20:14:47.646007  USB3 port 0 disabled

  952 20:14:47.649313  USB3 port 1 enabled

  953 20:14:47.652212  USB3 port 2 disabled

  954 20:14:47.652326  USB3 port 3 disabled

  955 20:14:47.655649  USB2 port 1 scanning...

  956 20:14:47.659252  scan_static_bus for USB2 port 1

  957 20:14:47.662392  scan_static_bus for USB2 port 1 done

  958 20:14:47.668923  scan_bus: bus USB2 port 1 finished in 6 msecs

  959 20:14:47.669009  USB2 port 2 scanning...

  960 20:14:47.672348  scan_static_bus for USB2 port 2

  961 20:14:47.679177  scan_static_bus for USB2 port 2 done

  962 20:14:47.682401  scan_bus: bus USB2 port 2 finished in 6 msecs

  963 20:14:47.685822  USB2 port 4 scanning...

  964 20:14:47.688897  scan_static_bus for USB2 port 4

  965 20:14:47.692482  scan_static_bus for USB2 port 4 done

  966 20:14:47.695963  scan_bus: bus USB2 port 4 finished in 6 msecs

  967 20:14:47.699161  USB3 port 1 scanning...

  968 20:14:47.702533  scan_static_bus for USB3 port 1

  969 20:14:47.705647  scan_static_bus for USB3 port 1 done

  970 20:14:47.709358  scan_bus: bus USB3 port 1 finished in 6 msecs

  971 20:14:47.715387  scan_static_bus for USB0 port 0 done

  972 20:14:47.718714  scan_bus: bus USB0 port 0 finished in 93 msecs

  973 20:14:47.722211  scan_static_bus for PCI: 00:14.0 done

  974 20:14:47.728663  scan_bus: bus PCI: 00:14.0 finished in 109 msecs

  975 20:14:47.728782  PCI: 00:14.3 scanning...

  976 20:14:47.731971  scan_static_bus for PCI: 00:14.3

  977 20:14:47.735281  GENERIC: 0.0 enabled

  978 20:14:47.738980  scan_static_bus for PCI: 00:14.3 done

  979 20:14:47.745449  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  980 20:14:47.745575  PCI: 00:15.0 scanning...

  981 20:14:47.748923  scan_static_bus for PCI: 00:15.0

  982 20:14:47.752522  I2C: 00:1a enabled

  983 20:14:47.755778  I2C: 00:31 enabled

  984 20:14:47.755862  I2C: 00:32 enabled

  985 20:14:47.759066  scan_static_bus for PCI: 00:15.0 done

  986 20:14:47.765361  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

  987 20:14:47.769106  PCI: 00:15.1 scanning...

  988 20:14:47.772787  scan_static_bus for PCI: 00:15.1

  989 20:14:47.772873  I2C: 00:10 enabled

  990 20:14:47.776298  scan_static_bus for PCI: 00:15.1 done

  991 20:14:47.782857  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  992 20:14:47.782944  PCI: 00:15.2 scanning...

  993 20:14:47.786229  scan_static_bus for PCI: 00:15.2

  994 20:14:47.792650  scan_static_bus for PCI: 00:15.2 done

  995 20:14:47.796435  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  996 20:14:47.799552  PCI: 00:15.3 scanning...

  997 20:14:47.802560  scan_static_bus for PCI: 00:15.3

  998 20:14:47.805768  scan_static_bus for PCI: 00:15.3 done

  999 20:14:47.809142  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1000 20:14:47.812576  PCI: 00:19.1 scanning...

 1001 20:14:47.815746  scan_static_bus for PCI: 00:19.1

 1002 20:14:47.819481  I2C: 00:15 enabled

 1003 20:14:47.822853  scan_static_bus for PCI: 00:19.1 done

 1004 20:14:47.826062  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1005 20:14:47.829329  PCI: 00:1d.0 scanning...

 1006 20:14:47.832498  do_pci_scan_bridge for PCI: 00:1d.0

 1007 20:14:47.835715  PCI: pci_scan_bus for bus 01

 1008 20:14:47.839298  PCI: 01:00.0 [1c5c/174a] enabled

 1009 20:14:47.842554  GENERIC: 0.0 enabled

 1010 20:14:47.846020  Enabling Common Clock Configuration

 1011 20:14:47.849266  L1 Sub-State supported from root port 29

 1012 20:14:47.852453  L1 Sub-State Support = 0xf

 1013 20:14:47.855865  CommonModeRestoreTime = 0x28

 1014 20:14:47.859331  Power On Value = 0x16, Power On Scale = 0x0

 1015 20:14:47.862581  ASPM: Enabled L1

 1016 20:14:47.865997  PCIe: Max_Payload_Size adjusted to 128

 1017 20:14:47.869466  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1018 20:14:47.872324  PCI: 00:1e.2 scanning...

 1019 20:14:47.875759  scan_generic_bus for PCI: 00:1e.2

 1020 20:14:47.878984  SPI: 00 enabled

 1021 20:14:47.885795  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1022 20:14:47.889375  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1023 20:14:47.892652  PCI: 00:1e.3 scanning...

 1024 20:14:47.896021  scan_generic_bus for PCI: 00:1e.3

 1025 20:14:47.896109  SPI: 00 enabled

 1026 20:14:47.902524  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1027 20:14:47.908984  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1028 20:14:47.909070  PCI: 00:1f.0 scanning...

 1029 20:14:47.913010  scan_static_bus for PCI: 00:1f.0

 1030 20:14:47.916314  PNP: 0c09.0 enabled

 1031 20:14:47.919639  PNP: 0c09.0 scanning...

 1032 20:14:47.922472  scan_static_bus for PNP: 0c09.0

 1033 20:14:47.926120  scan_static_bus for PNP: 0c09.0 done

 1034 20:14:47.929180  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1035 20:14:47.935846  scan_static_bus for PCI: 00:1f.0 done

 1036 20:14:47.939123  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1037 20:14:47.942348  PCI: 00:1f.2 scanning...

 1038 20:14:47.945976  scan_static_bus for PCI: 00:1f.2

 1039 20:14:47.946060  GENERIC: 0.0 enabled

 1040 20:14:47.949453  GENERIC: 0.0 scanning...

 1041 20:14:47.952927  scan_static_bus for GENERIC: 0.0

 1042 20:14:47.955693  GENERIC: 0.0 enabled

 1043 20:14:47.959551  GENERIC: 1.0 enabled

 1044 20:14:47.962756  scan_static_bus for GENERIC: 0.0 done

 1045 20:14:47.966206  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1046 20:14:47.969736  scan_static_bus for PCI: 00:1f.2 done

 1047 20:14:47.975777  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1048 20:14:47.975860  PCI: 00:1f.3 scanning...

 1049 20:14:47.979656  scan_static_bus for PCI: 00:1f.3

 1050 20:14:47.986007  scan_static_bus for PCI: 00:1f.3 done

 1051 20:14:47.989458  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1052 20:14:47.992584  PCI: 00:1f.5 scanning...

 1053 20:14:47.995856  scan_generic_bus for PCI: 00:1f.5

 1054 20:14:47.999388  scan_generic_bus for PCI: 00:1f.5 done

 1055 20:14:48.002660  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1056 20:14:48.009597  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1057 20:14:48.013102  scan_static_bus for Root Device done

 1058 20:14:48.019528  scan_bus: bus Root Device finished in 737 msecs

 1059 20:14:48.019615  done

 1060 20:14:48.025822  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1061 20:14:48.029070  Chrome EC: UHEPI supported

 1062 20:14:48.035691  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1063 20:14:48.042568  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1064 20:14:48.045928  SPI flash protection: WPSW=0 SRP0=0

 1065 20:14:48.049392  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1066 20:14:48.055910  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1067 20:14:48.059324  found VGA at PCI: 00:02.0

 1068 20:14:48.062742  Setting up VGA for PCI: 00:02.0

 1069 20:14:48.065966  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1070 20:14:48.072566  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1071 20:14:48.072650  Allocating resources...

 1072 20:14:48.075905  Reading resources...

 1073 20:14:48.079665  Root Device read_resources bus 0 link: 0

 1074 20:14:48.085457  DOMAIN: 0000 read_resources bus 0 link: 0

 1075 20:14:48.088927  PCI: 00:04.0 read_resources bus 1 link: 0

 1076 20:14:48.095755  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1077 20:14:48.099118  PCI: 00:0d.0 read_resources bus 0 link: 0

 1078 20:14:48.102074  USB0 port 0 read_resources bus 0 link: 0

 1079 20:14:48.109440  USB0 port 0 read_resources bus 0 link: 0 done

 1080 20:14:48.112719  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1081 20:14:48.119457  PCI: 00:14.0 read_resources bus 0 link: 0

 1082 20:14:48.122760  USB0 port 0 read_resources bus 0 link: 0

 1083 20:14:48.129429  USB0 port 0 read_resources bus 0 link: 0 done

 1084 20:14:48.132920  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1085 20:14:48.139573  PCI: 00:14.3 read_resources bus 0 link: 0

 1086 20:14:48.142866  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1087 20:14:48.149616  PCI: 00:15.0 read_resources bus 0 link: 0

 1088 20:14:48.152607  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1089 20:14:48.159622  PCI: 00:15.1 read_resources bus 0 link: 0

 1090 20:14:48.162856  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1091 20:14:48.169942  PCI: 00:19.1 read_resources bus 0 link: 0

 1092 20:14:48.173382  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1093 20:14:48.179639  PCI: 00:1d.0 read_resources bus 1 link: 0

 1094 20:14:48.183093  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1095 20:14:48.189912  PCI: 00:1e.2 read_resources bus 2 link: 0

 1096 20:14:48.192796  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1097 20:14:48.199488  PCI: 00:1e.3 read_resources bus 3 link: 0

 1098 20:14:48.203050  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1099 20:14:48.209703  PCI: 00:1f.0 read_resources bus 0 link: 0

 1100 20:14:48.212899  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1101 20:14:48.216356  PCI: 00:1f.2 read_resources bus 0 link: 0

 1102 20:14:48.223298  GENERIC: 0.0 read_resources bus 0 link: 0

 1103 20:14:48.226765  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1104 20:14:48.233426  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1105 20:14:48.239761  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1106 20:14:48.243077  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1107 20:14:48.246397  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1108 20:14:48.253067  Root Device read_resources bus 0 link: 0 done

 1109 20:14:48.256416  Done reading resources.

 1110 20:14:48.259679  Show resources in subtree (Root Device)...After reading.

 1111 20:14:48.266679   Root Device child on link 0 DOMAIN: 0000

 1112 20:14:48.269693    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1113 20:14:48.279681    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1114 20:14:48.289924    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1115 20:14:48.290010     PCI: 00:00.0

 1116 20:14:48.300095     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1117 20:14:48.309510     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1118 20:14:48.319630     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1119 20:14:48.329733     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1120 20:14:48.335983     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1121 20:14:48.345971     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1122 20:14:48.356268     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1123 20:14:48.366410     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1124 20:14:48.376017     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1125 20:14:48.386142     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1126 20:14:48.392451     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1127 20:14:48.402809     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1128 20:14:48.412724     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1129 20:14:48.422905     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1130 20:14:48.432393     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1131 20:14:48.439468     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1132 20:14:48.449068     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1133 20:14:48.459107     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1134 20:14:48.469049     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1135 20:14:48.479067     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1136 20:14:48.479498     PCI: 00:02.0

 1137 20:14:48.492114     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1138 20:14:48.502304     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1139 20:14:48.509099     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1140 20:14:48.515396     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1141 20:14:48.525501     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1142 20:14:48.525963      GENERIC: 0.0

 1143 20:14:48.528840     PCI: 00:05.0

 1144 20:14:48.539072     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1145 20:14:48.542433     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1146 20:14:48.545238      GENERIC: 0.0

 1147 20:14:48.545767     PCI: 00:08.0

 1148 20:14:48.555508     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1149 20:14:48.558900     PCI: 00:0a.0

 1150 20:14:48.562044     PCI: 00:0d.0 child on link 0 USB0 port 0

 1151 20:14:48.571949     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1152 20:14:48.575413      USB0 port 0 child on link 0 USB3 port 0

 1153 20:14:48.578802       USB3 port 0

 1154 20:14:48.579238       USB3 port 1

 1155 20:14:48.581955       USB3 port 2

 1156 20:14:48.582406       USB3 port 3

 1157 20:14:48.588628     PCI: 00:14.0 child on link 0 USB0 port 0

 1158 20:14:48.598729     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1159 20:14:48.602253      USB0 port 0 child on link 0 USB2 port 0

 1160 20:14:48.605280       USB2 port 0

 1161 20:14:48.605764       USB2 port 1

 1162 20:14:48.608594       USB2 port 2

 1163 20:14:48.609031       USB2 port 3

 1164 20:14:48.612050       USB2 port 4

 1165 20:14:48.612488       USB2 port 5

 1166 20:14:48.615244       USB2 port 6

 1167 20:14:48.615678       USB2 port 7

 1168 20:14:48.618765       USB2 port 8

 1169 20:14:48.619201       USB2 port 9

 1170 20:14:48.622177       USB3 port 0

 1171 20:14:48.622612       USB3 port 1

 1172 20:14:48.625561       USB3 port 2

 1173 20:14:48.628684       USB3 port 3

 1174 20:14:48.629173     PCI: 00:14.2

 1175 20:14:48.638611     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1176 20:14:48.648609     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1177 20:14:48.652056     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1178 20:14:48.661727     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1179 20:14:48.665542      GENERIC: 0.0

 1180 20:14:48.668871     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1181 20:14:48.678631     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1182 20:14:48.682001      I2C: 00:1a

 1183 20:14:48.682439      I2C: 00:31

 1184 20:14:48.685371      I2C: 00:32

 1185 20:14:48.688780     PCI: 00:15.1 child on link 0 I2C: 00:10

 1186 20:14:48.698299     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1187 20:14:48.698729      I2C: 00:10

 1188 20:14:48.701560     PCI: 00:15.2

 1189 20:14:48.711856     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 20:14:48.712463     PCI: 00:15.3

 1191 20:14:48.721654     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 20:14:48.725007     PCI: 00:16.0

 1193 20:14:48.735005     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 20:14:48.735450     PCI: 00:19.0

 1195 20:14:48.741513     PCI: 00:19.1 child on link 0 I2C: 00:15

 1196 20:14:48.751653     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 20:14:48.752101      I2C: 00:15

 1198 20:14:48.755000     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1199 20:14:48.764935     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1200 20:14:48.774813     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1201 20:14:48.784588     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1202 20:14:48.785219      GENERIC: 0.0

 1203 20:14:48.787975      PCI: 01:00.0

 1204 20:14:48.797950      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 20:14:48.807901      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1206 20:14:48.814304      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1207 20:14:48.817989     PCI: 00:1e.0

 1208 20:14:48.827871     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1209 20:14:48.834590     PCI: 00:1e.2 child on link 0 SPI: 00

 1210 20:14:48.844320     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1211 20:14:48.844486      SPI: 00

 1212 20:14:48.847414     PCI: 00:1e.3 child on link 0 SPI: 00

 1213 20:14:48.857390     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1214 20:14:48.860735      SPI: 00

 1215 20:14:48.864304     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1216 20:14:48.870523     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1217 20:14:48.873729      PNP: 0c09.0

 1218 20:14:48.883522      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1219 20:14:48.887332     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1220 20:14:48.897025     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1221 20:14:48.906880     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1222 20:14:48.910113      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1223 20:14:48.913399       GENERIC: 0.0

 1224 20:14:48.913472       GENERIC: 1.0

 1225 20:14:48.916781     PCI: 00:1f.3

 1226 20:14:48.927299     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1227 20:14:48.937137     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1228 20:14:48.937220     PCI: 00:1f.5

 1229 20:14:48.946617     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1230 20:14:48.950429    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1231 20:14:48.953384     APIC: 00

 1232 20:14:48.953535     APIC: 01

 1233 20:14:48.953605     APIC: 03

 1234 20:14:48.956886     APIC: 06

 1235 20:14:48.956960     APIC: 05

 1236 20:14:48.957021     APIC: 04

 1237 20:14:48.960291     APIC: 02

 1238 20:14:48.960364     APIC: 07

 1239 20:14:48.970325  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1240 20:14:48.973605   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1241 20:14:48.980273   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1242 20:14:48.986576   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1243 20:14:48.989960    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1244 20:14:48.993429    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1245 20:14:49.000033    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1246 20:14:49.006557   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1247 20:14:49.013361   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1248 20:14:49.020109   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1249 20:14:49.029809  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1250 20:14:49.033059  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1251 20:14:49.043287   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1252 20:14:49.049943   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1253 20:14:49.056203   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1254 20:14:49.059875   DOMAIN: 0000: Resource ranges:

 1255 20:14:49.063084   * Base: 1000, Size: 800, Tag: 100

 1256 20:14:49.066532   * Base: 1900, Size: e700, Tag: 100

 1257 20:14:49.073260    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1258 20:14:49.079443  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1259 20:14:49.086748  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1260 20:14:49.092982   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1261 20:14:49.103052   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1262 20:14:49.109579   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1263 20:14:49.115981   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1264 20:14:49.126033   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1265 20:14:49.132994   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1266 20:14:49.139394   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1267 20:14:49.149511   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1268 20:14:49.156136   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1269 20:14:49.162710   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1270 20:14:49.172779   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1271 20:14:49.179444   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1272 20:14:49.185546   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1273 20:14:49.195815   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1274 20:14:49.202582   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1275 20:14:49.209069   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1276 20:14:49.219008   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1277 20:14:49.225612   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1278 20:14:49.232482   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1279 20:14:49.242049   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1280 20:14:49.248933   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1281 20:14:49.255413   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1282 20:14:49.258604   DOMAIN: 0000: Resource ranges:

 1283 20:14:49.265342   * Base: 7fc00000, Size: 40400000, Tag: 200

 1284 20:14:49.268492   * Base: d0000000, Size: 28000000, Tag: 200

 1285 20:14:49.272009   * Base: fa000000, Size: 1000000, Tag: 200

 1286 20:14:49.278607   * Base: fb001000, Size: 2fff000, Tag: 200

 1287 20:14:49.281956   * Base: fe010000, Size: 2e000, Tag: 200

 1288 20:14:49.285263   * Base: fe03f000, Size: d41000, Tag: 200

 1289 20:14:49.288508   * Base: fed88000, Size: 8000, Tag: 200

 1290 20:14:49.292076   * Base: fed93000, Size: d000, Tag: 200

 1291 20:14:49.299186   * Base: feda2000, Size: 1e000, Tag: 200

 1292 20:14:49.302246   * Base: fede0000, Size: 1220000, Tag: 200

 1293 20:14:49.305470   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1294 20:14:49.315459    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1295 20:14:49.322048    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1296 20:14:49.328646    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1297 20:14:49.334910    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1298 20:14:49.341852    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1299 20:14:49.348530    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1300 20:14:49.355318    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1301 20:14:49.361892    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1302 20:14:49.368424    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1303 20:14:49.375046    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1304 20:14:49.381670    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1305 20:14:49.388097    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1306 20:14:49.394844    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1307 20:14:49.401678    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1308 20:14:49.407964    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1309 20:14:49.414654    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1310 20:14:49.421661    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1311 20:14:49.428186    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1312 20:14:49.434965    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1313 20:14:49.441148    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1314 20:14:49.447938    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1315 20:14:49.454357    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1316 20:14:49.461426  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1317 20:14:49.467651  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1318 20:14:49.471213   PCI: 00:1d.0: Resource ranges:

 1319 20:14:49.474495   * Base: 7fc00000, Size: 100000, Tag: 200

 1320 20:14:49.481125    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1321 20:14:49.487583    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1322 20:14:49.494309    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1323 20:14:49.504467  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1324 20:14:49.511243  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1325 20:14:49.514011  Root Device assign_resources, bus 0 link: 0

 1326 20:14:49.520588  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1327 20:14:49.527563  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1328 20:14:49.537337  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1329 20:14:49.544170  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1330 20:14:49.554097  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1331 20:14:49.557386  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1332 20:14:49.560730  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1333 20:14:49.570958  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1334 20:14:49.577952  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1335 20:14:49.587572  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1336 20:14:49.590892  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1337 20:14:49.597650  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1338 20:14:49.604054  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1339 20:14:49.607529  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1340 20:14:49.614488  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1341 20:14:49.620764  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1342 20:14:49.630950  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1343 20:14:49.637621  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1344 20:14:49.644219  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1345 20:14:49.647506  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1346 20:14:49.654063  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1347 20:14:49.660860  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1348 20:14:49.664300  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1349 20:14:49.673877  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1350 20:14:49.677628  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1351 20:14:49.680776  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1352 20:14:49.691087  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1353 20:14:49.697788  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1354 20:14:49.707854  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1355 20:14:49.714561  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1356 20:14:49.720951  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1357 20:14:49.724084  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1358 20:14:49.734485  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1359 20:14:49.744219  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1360 20:14:49.750686  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1361 20:14:49.757314  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1362 20:14:49.763775  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1363 20:14:49.773812  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1364 20:14:49.780485  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1365 20:14:49.783948  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1366 20:14:49.793425  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1367 20:14:49.797080  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1368 20:14:49.803869  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1369 20:14:49.810620  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1370 20:14:49.813942  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1371 20:14:49.820629  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1372 20:14:49.823966  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1373 20:14:49.830296  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1374 20:14:49.833656  LPC: Trying to open IO window from 800 size 1ff

 1375 20:14:49.843520  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1376 20:14:49.850581  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1377 20:14:49.860591  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1378 20:14:49.863476  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1379 20:14:49.867042  Root Device assign_resources, bus 0 link: 0

 1380 20:14:49.870451  Done setting resources.

 1381 20:14:49.876759  Show resources in subtree (Root Device)...After assigning values.

 1382 20:14:49.880234   Root Device child on link 0 DOMAIN: 0000

 1383 20:14:49.886979    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1384 20:14:49.896825    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1385 20:14:49.906525    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1386 20:14:49.906619     PCI: 00:00.0

 1387 20:14:49.916471     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1388 20:14:49.926646     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1389 20:14:49.936633     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1390 20:14:49.942961     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1391 20:14:49.953367     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1392 20:14:49.962958     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1393 20:14:49.973064     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1394 20:14:49.983171     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1395 20:14:49.993334     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1396 20:14:49.999538     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1397 20:14:50.009325     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1398 20:14:50.019344     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1399 20:14:50.029227     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1400 20:14:50.035925     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1401 20:14:50.046014     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1402 20:14:50.056030     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1403 20:14:50.066016     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1404 20:14:50.075719     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1405 20:14:50.085936     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1406 20:14:50.095815     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1407 20:14:50.095913     PCI: 00:02.0

 1408 20:14:50.108936     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1409 20:14:50.119231     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1410 20:14:50.129074     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1411 20:14:50.132241     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1412 20:14:50.142242     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1413 20:14:50.145608      GENERIC: 0.0

 1414 20:14:50.145692     PCI: 00:05.0

 1415 20:14:50.155598     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1416 20:14:50.162454     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1417 20:14:50.162538      GENERIC: 0.0

 1418 20:14:50.165796     PCI: 00:08.0

 1419 20:14:50.175396     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1420 20:14:50.175513     PCI: 00:0a.0

 1421 20:14:50.182030     PCI: 00:0d.0 child on link 0 USB0 port 0

 1422 20:14:50.191864     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1423 20:14:50.195489      USB0 port 0 child on link 0 USB3 port 0

 1424 20:14:50.198852       USB3 port 0

 1425 20:14:50.198930       USB3 port 1

 1426 20:14:50.202122       USB3 port 2

 1427 20:14:50.202226       USB3 port 3

 1428 20:14:50.205327     PCI: 00:14.0 child on link 0 USB0 port 0

 1429 20:14:50.218368     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1430 20:14:50.222095      USB0 port 0 child on link 0 USB2 port 0

 1431 20:14:50.222178       USB2 port 0

 1432 20:14:50.225023       USB2 port 1

 1433 20:14:50.228654       USB2 port 2

 1434 20:14:50.228738       USB2 port 3

 1435 20:14:50.231789       USB2 port 4

 1436 20:14:50.231871       USB2 port 5

 1437 20:14:50.235038       USB2 port 6

 1438 20:14:50.235120       USB2 port 7

 1439 20:14:50.238502       USB2 port 8

 1440 20:14:50.238585       USB2 port 9

 1441 20:14:50.242004       USB3 port 0

 1442 20:14:50.242093       USB3 port 1

 1443 20:14:50.245230       USB3 port 2

 1444 20:14:50.245312       USB3 port 3

 1445 20:14:50.248557     PCI: 00:14.2

 1446 20:14:50.258781     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1447 20:14:50.268747     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1448 20:14:50.271660     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1449 20:14:50.284952     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1450 20:14:50.285033      GENERIC: 0.0

 1451 20:14:50.288227     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1452 20:14:50.301687     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1453 20:14:50.301766      I2C: 00:1a

 1454 20:14:50.301830      I2C: 00:31

 1455 20:14:50.304974      I2C: 00:32

 1456 20:14:50.308240     PCI: 00:15.1 child on link 0 I2C: 00:10

 1457 20:14:50.318585     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1458 20:14:50.321507      I2C: 00:10

 1459 20:14:50.321604     PCI: 00:15.2

 1460 20:14:50.331363     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1461 20:14:50.335042     PCI: 00:15.3

 1462 20:14:50.344973     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1463 20:14:50.348033     PCI: 00:16.0

 1464 20:14:50.358214     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1465 20:14:50.358297     PCI: 00:19.0

 1466 20:14:50.361668     PCI: 00:19.1 child on link 0 I2C: 00:15

 1467 20:14:50.374472     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1468 20:14:50.374553      I2C: 00:15

 1469 20:14:50.378196     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1470 20:14:50.387918     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1471 20:14:50.401414     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1472 20:14:50.411522     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1473 20:14:50.411604      GENERIC: 0.0

 1474 20:14:50.414504      PCI: 01:00.0

 1475 20:14:50.424615      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1476 20:14:50.434552      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1477 20:14:50.444598      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1478 20:14:50.447952     PCI: 00:1e.0

 1479 20:14:50.457393     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1480 20:14:50.460838     PCI: 00:1e.2 child on link 0 SPI: 00

 1481 20:14:50.474285     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1482 20:14:50.474402      SPI: 00

 1483 20:14:50.477815     PCI: 00:1e.3 child on link 0 SPI: 00

 1484 20:14:50.487333     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1485 20:14:50.490576      SPI: 00

 1486 20:14:50.493859     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1487 20:14:50.504210     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1488 20:14:50.504318      PNP: 0c09.0

 1489 20:14:50.514084      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1490 20:14:50.517420     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1491 20:14:50.527598     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1492 20:14:50.537363     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1493 20:14:50.540522      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1494 20:14:50.544071       GENERIC: 0.0

 1495 20:14:50.544176       GENERIC: 1.0

 1496 20:14:50.547543     PCI: 00:1f.3

 1497 20:14:50.556992     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1498 20:14:50.567250     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1499 20:14:50.567361     PCI: 00:1f.5

 1500 20:14:50.580255     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1501 20:14:50.583490    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1502 20:14:50.583597     APIC: 00

 1503 20:14:50.587262     APIC: 01

 1504 20:14:50.587344     APIC: 03

 1505 20:14:50.587409     APIC: 06

 1506 20:14:50.590307     APIC: 05

 1507 20:14:50.590390     APIC: 04

 1508 20:14:50.593835     APIC: 02

 1509 20:14:50.593912     APIC: 07

 1510 20:14:50.597397  Done allocating resources.

 1511 20:14:50.603808  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1512 20:14:50.607186  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1513 20:14:50.613438  Configure GPIOs for I2S audio on UP4.

 1514 20:14:50.620052  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1515 20:14:50.620156  Enabling resources...

 1516 20:14:50.626775  PCI: 00:00.0 subsystem <- 8086/9a12

 1517 20:14:50.626855  PCI: 00:00.0 cmd <- 06

 1518 20:14:50.630233  PCI: 00:02.0 subsystem <- 8086/9a40

 1519 20:14:50.633401  PCI: 00:02.0 cmd <- 03

 1520 20:14:50.636874  PCI: 00:04.0 subsystem <- 8086/9a03

 1521 20:14:50.640269  PCI: 00:04.0 cmd <- 02

 1522 20:14:50.643407  PCI: 00:05.0 subsystem <- 8086/9a19

 1523 20:14:50.647169  PCI: 00:05.0 cmd <- 02

 1524 20:14:50.650310  PCI: 00:08.0 subsystem <- 8086/9a11

 1525 20:14:50.653517  PCI: 00:08.0 cmd <- 06

 1526 20:14:50.657038  PCI: 00:0d.0 subsystem <- 8086/9a13

 1527 20:14:50.660224  PCI: 00:0d.0 cmd <- 02

 1528 20:14:50.663588  PCI: 00:14.0 subsystem <- 8086/a0ed

 1529 20:14:50.663663  PCI: 00:14.0 cmd <- 02

 1530 20:14:50.670218  PCI: 00:14.2 subsystem <- 8086/a0ef

 1531 20:14:50.670302  PCI: 00:14.2 cmd <- 02

 1532 20:14:50.673646  PCI: 00:14.3 subsystem <- 8086/a0f0

 1533 20:14:50.676795  PCI: 00:14.3 cmd <- 02

 1534 20:14:50.680183  PCI: 00:15.0 subsystem <- 8086/a0e8

 1535 20:14:50.683649  PCI: 00:15.0 cmd <- 02

 1536 20:14:50.686905  PCI: 00:15.1 subsystem <- 8086/a0e9

 1537 20:14:50.690182  PCI: 00:15.1 cmd <- 02

 1538 20:14:50.693368  PCI: 00:15.2 subsystem <- 8086/a0ea

 1539 20:14:50.696690  PCI: 00:15.2 cmd <- 02

 1540 20:14:50.699997  PCI: 00:15.3 subsystem <- 8086/a0eb

 1541 20:14:50.703403  PCI: 00:15.3 cmd <- 02

 1542 20:14:50.706739  PCI: 00:16.0 subsystem <- 8086/a0e0

 1543 20:14:50.710201  PCI: 00:16.0 cmd <- 02

 1544 20:14:50.713713  PCI: 00:19.1 subsystem <- 8086/a0c6

 1545 20:14:50.713787  PCI: 00:19.1 cmd <- 02

 1546 20:14:50.716853  PCI: 00:1d.0 bridge ctrl <- 0013

 1547 20:14:50.723492  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1548 20:14:50.723604  PCI: 00:1d.0 cmd <- 06

 1549 20:14:50.726949  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1550 20:14:50.730197  PCI: 00:1e.0 cmd <- 06

 1551 20:14:50.733141  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1552 20:14:50.736477  PCI: 00:1e.2 cmd <- 06

 1553 20:14:50.739857  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1554 20:14:50.743288  PCI: 00:1e.3 cmd <- 02

 1555 20:14:50.746647  PCI: 00:1f.0 subsystem <- 8086/a087

 1556 20:14:50.749941  PCI: 00:1f.0 cmd <- 407

 1557 20:14:50.753105  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1558 20:14:50.756542  PCI: 00:1f.3 cmd <- 02

 1559 20:14:50.759764  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1560 20:14:50.763058  PCI: 00:1f.5 cmd <- 406

 1561 20:14:50.766415  PCI: 01:00.0 cmd <- 02

 1562 20:14:50.770866  done.

 1563 20:14:50.773705  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1564 20:14:50.776980  Initializing devices...

 1565 20:14:50.780258  Root Device init

 1566 20:14:50.783623  Chrome EC: Set SMI mask to 0x0000000000000000

 1567 20:14:50.790861  Chrome EC: clear events_b mask to 0x0000000000000000

 1568 20:14:50.797089  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1569 20:14:50.803730  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1570 20:14:50.807047  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1571 20:14:50.813717  Chrome EC: Set WAKE mask to 0x0000000000000000

 1572 20:14:50.817067  fw_config match found: DB_USB=USB3_ACTIVE

 1573 20:14:50.824004  Configure Right Type-C port orientation for retimer

 1574 20:14:50.827443  Root Device init finished in 44 msecs

 1575 20:14:50.830724  PCI: 00:00.0 init

 1576 20:14:50.833848  CPU TDP = 9 Watts

 1577 20:14:50.833923  CPU PL1 = 9 Watts

 1578 20:14:50.837330  CPU PL2 = 40 Watts

 1579 20:14:50.840255  CPU PL4 = 83 Watts

 1580 20:14:50.844182  PCI: 00:00.0 init finished in 8 msecs

 1581 20:14:50.844261  PCI: 00:02.0 init

 1582 20:14:50.847470  GMA: Found VBT in CBFS

 1583 20:14:50.850359  GMA: Found valid VBT in CBFS

 1584 20:14:50.857042  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1585 20:14:50.863832                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1586 20:14:50.866913  PCI: 00:02.0 init finished in 18 msecs

 1587 20:14:50.870770  PCI: 00:05.0 init

 1588 20:14:50.873716  PCI: 00:05.0 init finished in 0 msecs

 1589 20:14:50.877325  PCI: 00:08.0 init

 1590 20:14:50.880728  PCI: 00:08.0 init finished in 0 msecs

 1591 20:14:50.883626  PCI: 00:14.0 init

 1592 20:14:50.887349  PCI: 00:14.0 init finished in 0 msecs

 1593 20:14:50.890640  PCI: 00:14.2 init

 1594 20:14:50.893995  PCI: 00:14.2 init finished in 0 msecs

 1595 20:14:50.897304  PCI: 00:15.0 init

 1596 20:14:50.897404  I2C bus 0 version 0x3230302a

 1597 20:14:50.904004  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1598 20:14:50.907390  PCI: 00:15.0 init finished in 6 msecs

 1599 20:14:50.907464  PCI: 00:15.1 init

 1600 20:14:50.910380  I2C bus 1 version 0x3230302a

 1601 20:14:50.913681  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1602 20:14:50.917065  PCI: 00:15.1 init finished in 6 msecs

 1603 20:14:50.920845  PCI: 00:15.2 init

 1604 20:14:50.924245  I2C bus 2 version 0x3230302a

 1605 20:14:50.927589  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1606 20:14:50.930870  PCI: 00:15.2 init finished in 6 msecs

 1607 20:14:50.933667  PCI: 00:15.3 init

 1608 20:14:50.937024  I2C bus 3 version 0x3230302a

 1609 20:14:50.940570  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1610 20:14:50.943765  PCI: 00:15.3 init finished in 6 msecs

 1611 20:14:50.947268  PCI: 00:16.0 init

 1612 20:14:50.950548  PCI: 00:16.0 init finished in 0 msecs

 1613 20:14:50.953899  PCI: 00:19.1 init

 1614 20:14:50.953983  I2C bus 5 version 0x3230302a

 1615 20:14:50.960882  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1616 20:14:50.963877  PCI: 00:19.1 init finished in 6 msecs

 1617 20:14:50.963981  PCI: 00:1d.0 init

 1618 20:14:50.966914  Initializing PCH PCIe bridge.

 1619 20:14:50.970270  PCI: 00:1d.0 init finished in 3 msecs

 1620 20:14:50.974551  PCI: 00:1f.0 init

 1621 20:14:50.977745  IOAPIC: Initializing IOAPIC at 0xfec00000

 1622 20:14:50.984493  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1623 20:14:50.984598  IOAPIC: ID = 0x02

 1624 20:14:50.987788  IOAPIC: Dumping registers

 1625 20:14:50.990964    reg 0x0000: 0x02000000

 1626 20:14:50.994360    reg 0x0001: 0x00770020

 1627 20:14:50.994463    reg 0x0002: 0x00000000

 1628 20:14:51.001074  PCI: 00:1f.0 init finished in 21 msecs

 1629 20:14:51.001179  PCI: 00:1f.2 init

 1630 20:14:51.004563  Disabling ACPI via APMC.

 1631 20:14:51.007950  APMC done.

 1632 20:14:51.011470  PCI: 00:1f.2 init finished in 5 msecs

 1633 20:14:51.023171  PCI: 01:00.0 init

 1634 20:14:51.026442  PCI: 01:00.0 init finished in 0 msecs

 1635 20:14:51.029358  PNP: 0c09.0 init

 1636 20:14:51.032693  Google Chrome EC uptime: 8.401 seconds

 1637 20:14:51.039533  Google Chrome AP resets since EC boot: 1

 1638 20:14:51.043017  Google Chrome most recent AP reset causes:

 1639 20:14:51.046275  	0.347: 32775 shutdown: entering G3

 1640 20:14:51.052899  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1641 20:14:51.056176  PNP: 0c09.0 init finished in 22 msecs

 1642 20:14:51.061617  Devices initialized

 1643 20:14:51.065422  Show all devs... After init.

 1644 20:14:51.068322  Root Device: enabled 1

 1645 20:14:51.068397  DOMAIN: 0000: enabled 1

 1646 20:14:51.072021  CPU_CLUSTER: 0: enabled 1

 1647 20:14:51.075458  PCI: 00:00.0: enabled 1

 1648 20:14:51.078698  PCI: 00:02.0: enabled 1

 1649 20:14:51.078782  PCI: 00:04.0: enabled 1

 1650 20:14:51.081899  PCI: 00:05.0: enabled 1

 1651 20:14:51.085094  PCI: 00:06.0: enabled 0

 1652 20:14:51.088304  PCI: 00:07.0: enabled 0

 1653 20:14:51.088408  PCI: 00:07.1: enabled 0

 1654 20:14:51.092042  PCI: 00:07.2: enabled 0

 1655 20:14:51.095222  PCI: 00:07.3: enabled 0

 1656 20:14:51.098337  PCI: 00:08.0: enabled 1

 1657 20:14:51.098421  PCI: 00:09.0: enabled 0

 1658 20:14:51.101774  PCI: 00:0a.0: enabled 0

 1659 20:14:51.105212  PCI: 00:0d.0: enabled 1

 1660 20:14:51.108588  PCI: 00:0d.1: enabled 0

 1661 20:14:51.108671  PCI: 00:0d.2: enabled 0

 1662 20:14:51.111441  PCI: 00:0d.3: enabled 0

 1663 20:14:51.115320  PCI: 00:0e.0: enabled 0

 1664 20:14:51.115428  PCI: 00:10.2: enabled 1

 1665 20:14:51.118209  PCI: 00:10.6: enabled 0

 1666 20:14:51.121440  PCI: 00:10.7: enabled 0

 1667 20:14:51.124768  PCI: 00:12.0: enabled 0

 1668 20:14:51.124851  PCI: 00:12.6: enabled 0

 1669 20:14:51.128089  PCI: 00:13.0: enabled 0

 1670 20:14:51.131352  PCI: 00:14.0: enabled 1

 1671 20:14:51.134887  PCI: 00:14.1: enabled 0

 1672 20:14:51.134970  PCI: 00:14.2: enabled 1

 1673 20:14:51.138130  PCI: 00:14.3: enabled 1

 1674 20:14:51.141522  PCI: 00:15.0: enabled 1

 1675 20:14:51.144702  PCI: 00:15.1: enabled 1

 1676 20:14:51.144814  PCI: 00:15.2: enabled 1

 1677 20:14:51.148124  PCI: 00:15.3: enabled 1

 1678 20:14:51.151548  PCI: 00:16.0: enabled 1

 1679 20:14:51.151631  PCI: 00:16.1: enabled 0

 1680 20:14:51.154918  PCI: 00:16.2: enabled 0

 1681 20:14:51.158264  PCI: 00:16.3: enabled 0

 1682 20:14:51.161317  PCI: 00:16.4: enabled 0

 1683 20:14:51.161414  PCI: 00:16.5: enabled 0

 1684 20:14:51.164651  PCI: 00:17.0: enabled 0

 1685 20:14:51.168030  PCI: 00:19.0: enabled 0

 1686 20:14:51.171384  PCI: 00:19.1: enabled 1

 1687 20:14:51.171468  PCI: 00:19.2: enabled 0

 1688 20:14:51.174806  PCI: 00:1c.0: enabled 1

 1689 20:14:51.178313  PCI: 00:1c.1: enabled 0

 1690 20:14:51.181401  PCI: 00:1c.2: enabled 0

 1691 20:14:51.181507  PCI: 00:1c.3: enabled 0

 1692 20:14:51.184507  PCI: 00:1c.4: enabled 0

 1693 20:14:51.188280  PCI: 00:1c.5: enabled 0

 1694 20:14:51.191337  PCI: 00:1c.6: enabled 1

 1695 20:14:51.191469  PCI: 00:1c.7: enabled 0

 1696 20:14:51.194510  PCI: 00:1d.0: enabled 1

 1697 20:14:51.198188  PCI: 00:1d.1: enabled 0

 1698 20:14:51.198286  PCI: 00:1d.2: enabled 1

 1699 20:14:51.201123  PCI: 00:1d.3: enabled 0

 1700 20:14:51.204639  PCI: 00:1e.0: enabled 1

 1701 20:14:51.208178  PCI: 00:1e.1: enabled 0

 1702 20:14:51.208276  PCI: 00:1e.2: enabled 1

 1703 20:14:51.211083  PCI: 00:1e.3: enabled 1

 1704 20:14:51.214776  PCI: 00:1f.0: enabled 1

 1705 20:14:51.217848  PCI: 00:1f.1: enabled 0

 1706 20:14:51.217933  PCI: 00:1f.2: enabled 1

 1707 20:14:51.221255  PCI: 00:1f.3: enabled 1

 1708 20:14:51.224543  PCI: 00:1f.4: enabled 0

 1709 20:14:51.227844  PCI: 00:1f.5: enabled 1

 1710 20:14:51.227928  PCI: 00:1f.6: enabled 0

 1711 20:14:51.231150  PCI: 00:1f.7: enabled 0

 1712 20:14:51.234387  APIC: 00: enabled 1

 1713 20:14:51.234472  GENERIC: 0.0: enabled 1

 1714 20:14:51.237601  GENERIC: 0.0: enabled 1

 1715 20:14:51.240986  GENERIC: 1.0: enabled 1

 1716 20:14:51.244390  GENERIC: 0.0: enabled 1

 1717 20:14:51.244475  GENERIC: 1.0: enabled 1

 1718 20:14:51.247634  USB0 port 0: enabled 1

 1719 20:14:51.250968  GENERIC: 0.0: enabled 1

 1720 20:14:51.251060  USB0 port 0: enabled 1

 1721 20:14:51.254432  GENERIC: 0.0: enabled 1

 1722 20:14:51.257757  I2C: 00:1a: enabled 1

 1723 20:14:51.261223  I2C: 00:31: enabled 1

 1724 20:14:51.261307  I2C: 00:32: enabled 1

 1725 20:14:51.264494  I2C: 00:10: enabled 1

 1726 20:14:51.267759  I2C: 00:15: enabled 1

 1727 20:14:51.267844  GENERIC: 0.0: enabled 0

 1728 20:14:51.271280  GENERIC: 1.0: enabled 0

 1729 20:14:51.274137  GENERIC: 0.0: enabled 1

 1730 20:14:51.274222  SPI: 00: enabled 1

 1731 20:14:51.277525  SPI: 00: enabled 1

 1732 20:14:51.280847  PNP: 0c09.0: enabled 1

 1733 20:14:51.280931  GENERIC: 0.0: enabled 1

 1734 20:14:51.284189  USB3 port 0: enabled 1

 1735 20:14:51.287780  USB3 port 1: enabled 1

 1736 20:14:51.290983  USB3 port 2: enabled 0

 1737 20:14:51.291068  USB3 port 3: enabled 0

 1738 20:14:51.294207  USB2 port 0: enabled 0

 1739 20:14:51.297877  USB2 port 1: enabled 1

 1740 20:14:51.297962  USB2 port 2: enabled 1

 1741 20:14:51.301067  USB2 port 3: enabled 0

 1742 20:14:51.304304  USB2 port 4: enabled 1

 1743 20:14:51.304388  USB2 port 5: enabled 0

 1744 20:14:51.307591  USB2 port 6: enabled 0

 1745 20:14:51.310755  USB2 port 7: enabled 0

 1746 20:14:51.314186  USB2 port 8: enabled 0

 1747 20:14:51.314270  USB2 port 9: enabled 0

 1748 20:14:51.317608  USB3 port 0: enabled 0

 1749 20:14:51.320870  USB3 port 1: enabled 1

 1750 20:14:51.320955  USB3 port 2: enabled 0

 1751 20:14:51.324259  USB3 port 3: enabled 0

 1752 20:14:51.327808  GENERIC: 0.0: enabled 1

 1753 20:14:51.330627  GENERIC: 1.0: enabled 1

 1754 20:14:51.330711  APIC: 01: enabled 1

 1755 20:14:51.333961  APIC: 03: enabled 1

 1756 20:14:51.334046  APIC: 06: enabled 1

 1757 20:14:51.337544  APIC: 05: enabled 1

 1758 20:14:51.340662  APIC: 04: enabled 1

 1759 20:14:51.340771  APIC: 02: enabled 1

 1760 20:14:51.344017  APIC: 07: enabled 1

 1761 20:14:51.347473  PCI: 01:00.0: enabled 1

 1762 20:14:51.350787  BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms

 1763 20:14:51.357625  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1764 20:14:51.361005  ELOG: NV offset 0xf30000 size 0x1000

 1765 20:14:51.367167  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1766 20:14:51.373874  ELOG: Event(17) added with size 13 at 2023-12-28 20:14:49 UTC

 1767 20:14:51.380581  ELOG: Event(92) added with size 9 at 2023-12-28 20:14:49 UTC

 1768 20:14:51.387394  ELOG: Event(93) added with size 9 at 2023-12-28 20:14:49 UTC

 1769 20:14:51.393762  ELOG: Event(9E) added with size 10 at 2023-12-28 20:14:49 UTC

 1770 20:14:51.400666  ELOG: Event(9F) added with size 14 at 2023-12-28 20:14:49 UTC

 1771 20:14:51.403922  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1772 20:14:51.410494  ELOG: Event(A1) added with size 10 at 2023-12-28 20:14:49 UTC

 1773 20:14:51.417117  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

 1774 20:14:51.423614  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1775 20:14:51.427023  Finalize devices...

 1776 20:14:51.427125  Devices finalized

 1777 20:14:51.433732  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1778 20:14:51.437450  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1779 20:14:51.443685  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1780 20:14:51.447230  ME: HFSTS1                      : 0x80030055

 1781 20:14:51.453783  ME: HFSTS2                      : 0x30280116

 1782 20:14:51.457468  ME: HFSTS3                      : 0x00000050

 1783 20:14:51.460663  ME: HFSTS4                      : 0x00004000

 1784 20:14:51.467261  ME: HFSTS5                      : 0x00000000

 1785 20:14:51.470721  ME: HFSTS6                      : 0x00400006

 1786 20:14:51.473956  ME: Manufacturing Mode          : YES

 1787 20:14:51.477294  ME: SPI Protection Mode Enabled : NO

 1788 20:14:51.483926  ME: FW Partition Table          : OK

 1789 20:14:51.487291  ME: Bringup Loader Failure      : NO

 1790 20:14:51.490542  ME: Firmware Init Complete      : NO

 1791 20:14:51.493959  ME: Boot Options Present        : NO

 1792 20:14:51.497236  ME: Update In Progress          : NO

 1793 20:14:51.500370  ME: D0i3 Support                : YES

 1794 20:14:51.503509  ME: Low Power State Enabled     : NO

 1795 20:14:51.506876  ME: CPU Replaced                : YES

 1796 20:14:51.513437  ME: CPU Replacement Valid       : YES

 1797 20:14:51.516977  ME: Current Working State       : 5

 1798 20:14:51.520551  ME: Current Operation State     : 1

 1799 20:14:51.523414  ME: Current Operation Mode      : 3

 1800 20:14:51.526997  ME: Error Code                  : 0

 1801 20:14:51.530502  ME: Enhanced Debug Mode         : NO

 1802 20:14:51.533854  ME: CPU Debug Disabled          : YES

 1803 20:14:51.536583  ME: TXT Support                 : NO

 1804 20:14:51.543338  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1805 20:14:51.553239  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1806 20:14:51.556524  CBFS: 'fallback/slic' not found.

 1807 20:14:51.559703  ACPI: Writing ACPI tables at 76b01000.

 1808 20:14:51.559805  ACPI:    * FACS

 1809 20:14:51.563484  ACPI:    * DSDT

 1810 20:14:51.566447  Ramoops buffer: 0x100000@0x76a00000.

 1811 20:14:51.569826  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1812 20:14:51.576541  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1813 20:14:51.579781  Google Chrome EC: version:

 1814 20:14:51.583260  	ro: voema_v2.0.7540-147f8d37d1

 1815 20:14:51.586694  	rw: voema_v2.0.7540-147f8d37d1

 1816 20:14:51.589971    running image: 2

 1817 20:14:51.596317  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1818 20:14:51.599756  ACPI:    * FADT

 1819 20:14:51.599857  SCI is IRQ9

 1820 20:14:51.603193  ACPI: added table 1/32, length now 40

 1821 20:14:51.606656  ACPI:     * SSDT

 1822 20:14:51.609778  Found 1 CPU(s) with 8 core(s) each.

 1823 20:14:51.613099  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1824 20:14:51.616395  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1825 20:14:51.623079  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1826 20:14:51.626602  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1827 20:14:51.632928  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1828 20:14:51.636487  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1829 20:14:51.642768  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1830 20:14:51.646114  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1831 20:14:51.656000  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1832 20:14:51.659305  \_SB.PCI0.RP09: Added StorageD3Enable property

 1833 20:14:51.662524  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1834 20:14:51.669202  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1835 20:14:51.672513  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1836 20:14:51.675845  PS2K: Passing 80 keymaps to kernel

 1837 20:14:51.682286  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1838 20:14:51.688778  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1839 20:14:51.695837  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1840 20:14:51.702453  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1841 20:14:51.708700  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1842 20:14:51.715528  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1843 20:14:51.721839  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1844 20:14:51.728682  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1845 20:14:51.731834  ACPI: added table 2/32, length now 44

 1846 20:14:51.735236  ACPI:    * MCFG

 1847 20:14:51.738667  ACPI: added table 3/32, length now 48

 1848 20:14:51.742212  ACPI:    * TPM2

 1849 20:14:51.745562  TPM2 log created at 0x769f0000

 1850 20:14:51.748352  ACPI: added table 4/32, length now 52

 1851 20:14:51.748428  ACPI:    * MADT

 1852 20:14:51.752103  SCI is IRQ9

 1853 20:14:51.755338  ACPI: added table 5/32, length now 56

 1854 20:14:51.755421  current = 76b09850

 1855 20:14:51.758730  ACPI:    * DMAR

 1856 20:14:51.762020  ACPI: added table 6/32, length now 60

 1857 20:14:51.765026  ACPI: added table 7/32, length now 64

 1858 20:14:51.768181  ACPI:    * HPET

 1859 20:14:51.771768  ACPI: added table 8/32, length now 68

 1860 20:14:51.771853  ACPI: done.

 1861 20:14:51.775296  ACPI tables: 35216 bytes.

 1862 20:14:51.778657  smbios_write_tables: 769ef000

 1863 20:14:51.781415  EC returned error result code 3

 1864 20:14:51.784951  Couldn't obtain OEM name from CBI

 1865 20:14:51.788232  Create SMBIOS type 16

 1866 20:14:51.791543  Create SMBIOS type 17

 1867 20:14:51.791627  GENERIC: 0.0 (WIFI Device)

 1868 20:14:51.794805  SMBIOS tables: 1750 bytes.

 1869 20:14:51.801488  Writing table forward entry at 0x00000500

 1870 20:14:51.804985  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1871 20:14:51.811379  Writing coreboot table at 0x76b25000

 1872 20:14:51.814647   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1873 20:14:51.821273   1. 0000000000001000-000000000009ffff: RAM

 1874 20:14:51.824513   2. 00000000000a0000-00000000000fffff: RESERVED

 1875 20:14:51.827738   3. 0000000000100000-00000000769eefff: RAM

 1876 20:14:51.834545   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1877 20:14:51.841353   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1878 20:14:51.844708   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1879 20:14:51.851281   7. 0000000077000000-000000007fbfffff: RESERVED

 1880 20:14:51.854293   8. 00000000c0000000-00000000cfffffff: RESERVED

 1881 20:14:51.860820   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1882 20:14:51.864204  10. 00000000fb000000-00000000fb000fff: RESERVED

 1883 20:14:51.870889  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1884 20:14:51.874442  12. 00000000fed80000-00000000fed87fff: RESERVED

 1885 20:14:51.880622  13. 00000000fed90000-00000000fed92fff: RESERVED

 1886 20:14:51.884033  14. 00000000feda0000-00000000feda1fff: RESERVED

 1887 20:14:51.887650  15. 00000000fedc0000-00000000feddffff: RESERVED

 1888 20:14:51.893971  16. 0000000100000000-00000002803fffff: RAM

 1889 20:14:51.897818  Passing 4 GPIOs to payload:

 1890 20:14:51.900964              NAME |       PORT | POLARITY |     VALUE

 1891 20:14:51.907359               lid |  undefined |     high |      high

 1892 20:14:51.910760             power |  undefined |     high |       low

 1893 20:14:51.917514             oprom |  undefined |     high |       low

 1894 20:14:51.923687          EC in RW | 0x000000e5 |     high |      high

 1895 20:14:51.926965  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 19df

 1896 20:14:51.930352  coreboot table: 1576 bytes.

 1897 20:14:51.933654  IMD ROOT    0. 0x76fff000 0x00001000

 1898 20:14:51.940598  IMD SMALL   1. 0x76ffe000 0x00001000

 1899 20:14:51.944043  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1900 20:14:51.947253  VPD         3. 0x76c4d000 0x00000367

 1901 20:14:51.950391  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1902 20:14:51.953687  CONSOLE     5. 0x76c2c000 0x00020000

 1903 20:14:51.957095  FMAP        6. 0x76c2b000 0x00000578

 1904 20:14:51.960345  TIME STAMP  7. 0x76c2a000 0x00000910

 1905 20:14:51.963701  VBOOT WORK  8. 0x76c16000 0x00014000

 1906 20:14:51.970241  ROMSTG STCK 9. 0x76c15000 0x00001000

 1907 20:14:51.973452  AFTER CAR  10. 0x76c0a000 0x0000b000

 1908 20:14:51.977318  RAMSTAGE   11. 0x76b97000 0x00073000

 1909 20:14:51.980325  REFCODE    12. 0x76b42000 0x00055000

 1910 20:14:51.983240  SMM BACKUP 13. 0x76b32000 0x00010000

 1911 20:14:51.987077  4f444749   14. 0x76b30000 0x00002000

 1912 20:14:51.990178  EXT VBT15. 0x76b2d000 0x0000219f

 1913 20:14:51.993512  COREBOOT   16. 0x76b25000 0x00008000

 1914 20:14:51.997064  ACPI       17. 0x76b01000 0x00024000

 1915 20:14:52.003537  ACPI GNVS  18. 0x76b00000 0x00001000

 1916 20:14:52.006754  RAMOOPS    19. 0x76a00000 0x00100000

 1917 20:14:52.009905  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1918 20:14:52.013202  SMBIOS     21. 0x769ef000 0x00000800

 1919 20:14:52.013284  IMD small region:

 1920 20:14:52.020272    IMD ROOT    0. 0x76ffec00 0x00000400

 1921 20:14:52.023560    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1922 20:14:52.027006    POWER STATE 2. 0x76ffeb80 0x00000044

 1923 20:14:52.030276    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1924 20:14:52.033660    MEM INFO    4. 0x76ffe980 0x000001e0

 1925 20:14:52.039996  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1926 20:14:52.043204  MTRR: Physical address space:

 1927 20:14:52.050238  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1928 20:14:52.056852  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1929 20:14:52.063753  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1930 20:14:52.069987  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1931 20:14:52.073538  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1932 20:14:52.080386  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1933 20:14:52.086897  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1934 20:14:52.090146  MTRR: Fixed MSR 0x250 0x0606060606060606

 1935 20:14:52.096707  MTRR: Fixed MSR 0x258 0x0606060606060606

 1936 20:14:52.100294  MTRR: Fixed MSR 0x259 0x0000000000000000

 1937 20:14:52.102992  MTRR: Fixed MSR 0x268 0x0606060606060606

 1938 20:14:52.106774  MTRR: Fixed MSR 0x269 0x0606060606060606

 1939 20:14:52.113189  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1940 20:14:52.116660  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1941 20:14:52.119994  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1942 20:14:52.123244  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1943 20:14:52.130161  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1944 20:14:52.133374  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1945 20:14:52.136225  call enable_fixed_mtrr()

 1946 20:14:52.139517  CPU physical address size: 39 bits

 1947 20:14:52.142877  MTRR: default type WB/UC MTRR counts: 6/6.

 1948 20:14:52.146089  MTRR: UC selected as default type.

 1949 20:14:52.152748  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1950 20:14:52.159629  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1951 20:14:52.166146  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1952 20:14:52.173035  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1953 20:14:52.179397  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1954 20:14:52.185922  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1955 20:14:52.189171  MTRR: Fixed MSR 0x250 0x0606060606060606

 1956 20:14:52.195930  MTRR: Fixed MSR 0x258 0x0606060606060606

 1957 20:14:52.199746  MTRR: Fixed MSR 0x259 0x0000000000000000

 1958 20:14:52.202672  MTRR: Fixed MSR 0x268 0x0606060606060606

 1959 20:14:52.206056  MTRR: Fixed MSR 0x269 0x0606060606060606

 1960 20:14:52.209293  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1961 20:14:52.215812  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1962 20:14:52.219072  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1963 20:14:52.222693  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1964 20:14:52.225747  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1965 20:14:52.232547  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1966 20:14:52.235948  MTRR: Fixed MSR 0x250 0x0606060606060606

 1967 20:14:52.239373  call enable_fixed_mtrr()

 1968 20:14:52.242858  MTRR: Fixed MSR 0x258 0x0606060606060606

 1969 20:14:52.245657  MTRR: Fixed MSR 0x259 0x0000000000000000

 1970 20:14:52.252189  MTRR: Fixed MSR 0x268 0x0606060606060606

 1971 20:14:52.255989  MTRR: Fixed MSR 0x269 0x0606060606060606

 1972 20:14:52.259421  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1973 20:14:52.262268  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1974 20:14:52.268779  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1975 20:14:52.272652  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1976 20:14:52.275419  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1977 20:14:52.278742  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1978 20:14:52.283279  CPU physical address size: 39 bits

 1979 20:14:52.289630  call enable_fixed_mtrr()

 1980 20:14:52.289712  

 1981 20:14:52.289777  MTRR check

 1982 20:14:52.293066  MTRR: Fixed MSR 0x250 0x0606060606060606

 1983 20:14:52.296384  Fixed MTRRs   : Enabled

 1984 20:14:52.299419  Variable MTRRs: Enabled

 1985 20:14:52.299502  

 1986 20:14:52.302982  MTRR: Fixed MSR 0x258 0x0606060606060606

 1987 20:14:52.306321  MTRR: Fixed MSR 0x259 0x0000000000000000

 1988 20:14:52.309758  MTRR: Fixed MSR 0x268 0x0606060606060606

 1989 20:14:52.316274  MTRR: Fixed MSR 0x269 0x0606060606060606

 1990 20:14:52.319444  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1991 20:14:52.322583  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1992 20:14:52.326046  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1993 20:14:52.333085  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1994 20:14:52.336364  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1995 20:14:52.339123  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1996 20:14:52.346054  BS: BS_WRITE_TABLES exit times (exec / console): 108 / 150 ms

 1997 20:14:52.349379  call enable_fixed_mtrr()

 1998 20:14:52.353381  Checking cr50 for pending updates

 1999 20:14:52.357225  CPU physical address size: 39 bits

 2000 20:14:52.360516  MTRR: Fixed MSR 0x250 0x0606060606060606

 2001 20:14:52.364078  MTRR: Fixed MSR 0x250 0x0606060606060606

 2002 20:14:52.367124  MTRR: Fixed MSR 0x258 0x0606060606060606

 2003 20:14:52.373870  MTRR: Fixed MSR 0x259 0x0000000000000000

 2004 20:14:52.376888  MTRR: Fixed MSR 0x268 0x0606060606060606

 2005 20:14:52.380361  MTRR: Fixed MSR 0x269 0x0606060606060606

 2006 20:14:52.383749  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2007 20:14:52.390520  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2008 20:14:52.393849  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2009 20:14:52.397079  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2010 20:14:52.400327  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2011 20:14:52.406702  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2012 20:14:52.410039  MTRR: Fixed MSR 0x258 0x0606060606060606

 2013 20:14:52.413489  call enable_fixed_mtrr()

 2014 20:14:52.416785  MTRR: Fixed MSR 0x259 0x0000000000000000

 2015 20:14:52.420140  MTRR: Fixed MSR 0x268 0x0606060606060606

 2016 20:14:52.426533  MTRR: Fixed MSR 0x269 0x0606060606060606

 2017 20:14:52.429856  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2018 20:14:52.433310  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2019 20:14:52.436632  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2020 20:14:52.443102  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2021 20:14:52.446615  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2022 20:14:52.449798  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2023 20:14:52.453230  CPU physical address size: 39 bits

 2024 20:14:52.459836  call enable_fixed_mtrr()

 2025 20:14:52.464449  CPU physical address size: 39 bits

 2026 20:14:52.464530  Reading cr50 TPM mode

 2027 20:14:52.467612  MTRR: Fixed MSR 0x250 0x0606060606060606

 2028 20:14:52.471083  MTRR: Fixed MSR 0x250 0x0606060606060606

 2029 20:14:52.478011  MTRR: Fixed MSR 0x258 0x0606060606060606

 2030 20:14:52.481226  MTRR: Fixed MSR 0x259 0x0000000000000000

 2031 20:14:52.484328  MTRR: Fixed MSR 0x268 0x0606060606060606

 2032 20:14:52.487755  MTRR: Fixed MSR 0x269 0x0606060606060606

 2033 20:14:52.491023  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2034 20:14:52.497954  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2035 20:14:52.501273  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2036 20:14:52.504089  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2037 20:14:52.507778  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2038 20:14:52.514262  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2039 20:14:52.517723  MTRR: Fixed MSR 0x258 0x0606060606060606

 2040 20:14:52.520945  MTRR: Fixed MSR 0x259 0x0000000000000000

 2041 20:14:52.527612  MTRR: Fixed MSR 0x268 0x0606060606060606

 2042 20:14:52.530759  MTRR: Fixed MSR 0x269 0x0606060606060606

 2043 20:14:52.534182  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2044 20:14:52.537466  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2045 20:14:52.543963  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2046 20:14:52.547640  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2047 20:14:52.550978  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2048 20:14:52.553829  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2049 20:14:52.558351  call enable_fixed_mtrr()

 2050 20:14:52.561531  call enable_fixed_mtrr()

 2051 20:14:52.564930  CPU physical address size: 39 bits

 2052 20:14:52.568236  CPU physical address size: 39 bits

 2053 20:14:52.571560  CPU physical address size: 39 bits

 2054 20:14:52.578242  BS: BS_PAYLOAD_LOAD entry times (exec / console): 116 / 6 ms

 2055 20:14:52.588187  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2056 20:14:52.591395  Checking segment from ROM address 0xffc02b38

 2057 20:14:52.594943  Checking segment from ROM address 0xffc02b54

 2058 20:14:52.601753  Loading segment from ROM address 0xffc02b38

 2059 20:14:52.601836    code (compression=0)

 2060 20:14:52.611409    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2061 20:14:52.617998  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2062 20:14:52.621406  it's not compressed!

 2063 20:14:52.760788  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2064 20:14:52.767204  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2065 20:14:52.773671  Loading segment from ROM address 0xffc02b54

 2066 20:14:52.773762    Entry Point 0x30000000

 2067 20:14:52.777305  Loaded segments

 2068 20:14:52.783968  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2069 20:14:52.826652  Finalizing chipset.

 2070 20:14:52.830024  Finalizing SMM.

 2071 20:14:52.830106  APMC done.

 2072 20:14:52.836779  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2073 20:14:52.840242  mp_park_aps done after 0 msecs.

 2074 20:14:52.843688  Jumping to boot code at 0x30000000(0x76b25000)

 2075 20:14:52.853417  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2076 20:14:52.853509  

 2077 20:14:52.853583  

 2078 20:14:52.853648  

 2079 20:14:52.856541  Starting depthcharge on Voema...

 2080 20:14:52.856649  

 2081 20:14:52.857000  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2082 20:14:52.857110  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2083 20:14:52.857195  Setting prompt string to ['volteer:']
 2084 20:14:52.857280  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2085 20:14:52.866517  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2086 20:14:52.866601  

 2087 20:14:52.873401  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2088 20:14:52.873492  

 2089 20:14:52.879868  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2090 20:14:52.879952  

 2091 20:14:52.883115  Failed to find eMMC card reader

 2092 20:14:52.883232  

 2093 20:14:52.883324  Wipe memory regions:

 2094 20:14:52.886028  

 2095 20:14:52.889571  	[0x00000000001000, 0x000000000a0000)

 2096 20:14:52.889650  

 2097 20:14:52.892617  	[0x00000000100000, 0x00000030000000)

 2098 20:14:52.918577  

 2099 20:14:52.922095  	[0x00000032662db0, 0x000000769ef000)

 2100 20:14:52.957311  

 2101 20:14:52.960643  	[0x00000100000000, 0x00000280400000)

 2102 20:14:53.160120  

 2103 20:14:53.163725  ec_init: CrosEC protocol v3 supported (256, 256)

 2104 20:14:53.163832  

 2105 20:14:53.170326  update_port_state: port C0 state: usb enable 1 mux conn 0

 2106 20:14:53.170440  

 2107 20:14:53.176704  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2108 20:14:53.181680  

 2109 20:14:53.184620  pmc_check_ipc_sts: STS_BUSY done after 1561 us

 2110 20:14:53.184699  

 2111 20:14:53.187857  send_conn_disc_msg: pmc_send_cmd succeeded

 2112 20:14:53.621641  

 2113 20:14:53.621775  R8152: Initializing

 2114 20:14:53.621872  

 2115 20:14:53.625090  Version 6 (ocp_data = 5c30)

 2116 20:14:53.625163  

 2117 20:14:53.628634  R8152: Done initializing

 2118 20:14:53.628721  

 2119 20:14:53.631437  Adding net device

 2120 20:14:53.933553  

 2121 20:14:53.936306  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2122 20:14:53.936398  

 2123 20:14:53.936474  

 2124 20:14:53.936541  

 2125 20:14:53.940130  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2127 20:14:54.040536  volteer: tftpboot 192.168.201.1 12402913/tftp-deploy-nd29uic9/kernel/bzImage 12402913/tftp-deploy-nd29uic9/kernel/cmdline 12402913/tftp-deploy-nd29uic9/ramdisk/ramdisk.cpio.gz

 2128 20:14:54.040714  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2129 20:14:54.040815  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2130 20:14:54.045227  tftpboot 192.168.201.1 12402913/tftp-deploy-nd29uic9/kernel/bzImploy-nd29uic9/kernel/cmdline 12402913/tftp-deploy-nd29uic9/ramdisk/ramdisk.cpio.gz

 2131 20:14:54.045345  

 2132 20:14:54.045454  Waiting for link

 2133 20:14:54.250423  

 2134 20:14:54.250606  done.

 2135 20:14:54.250712  

 2136 20:14:54.250815  MAC: 00:24:32:30:7c:e4

 2137 20:14:54.250909  

 2138 20:14:54.253441  Sending DHCP discover... done.

 2139 20:14:54.253549  

 2140 20:14:54.256893  Waiting for reply... done.

 2141 20:14:54.256983  

 2142 20:14:54.260232  Sending DHCP request... done.

 2143 20:14:54.260323  

 2144 20:14:54.263976  Waiting for reply... done.

 2145 20:14:54.264093  

 2146 20:14:54.267057  My ip is 192.168.201.23

 2147 20:14:54.267158  

 2148 20:14:54.270246  The DHCP server ip is 192.168.201.1

 2149 20:14:54.270326  

 2150 20:14:54.277172  TFTP server IP predefined by user: 192.168.201.1

 2151 20:14:54.277279  

 2152 20:14:54.283856  Bootfile predefined by user: 12402913/tftp-deploy-nd29uic9/kernel/bzImage

 2153 20:14:54.283952  

 2154 20:14:54.287283  Sending tftp read request... done.

 2155 20:14:54.287370  

 2156 20:14:54.290125  Waiting for the transfer... 

 2157 20:14:54.290214  

 2158 20:14:54.800182  00000000 ################################################################

 2159 20:14:54.800367  

 2160 20:14:55.308761  00080000 ################################################################

 2161 20:14:55.308918  

 2162 20:14:55.824068  00100000 ################################################################

 2163 20:14:55.824208  

 2164 20:14:56.346195  00180000 ################################################################

 2165 20:14:56.346356  

 2166 20:14:56.854951  00200000 ################################################################

 2167 20:14:56.855116  

 2168 20:14:57.359750  00280000 ################################################################

 2169 20:14:57.359891  

 2170 20:14:57.867944  00300000 ################################################################

 2171 20:14:57.868109  

 2172 20:14:58.390399  00380000 ################################################################

 2173 20:14:58.390534  

 2174 20:14:58.900447  00400000 ################################################################

 2175 20:14:58.900583  

 2176 20:14:59.414544  00480000 ################################################################

 2177 20:14:59.414709  

 2178 20:14:59.930573  00500000 ################################################################

 2179 20:14:59.930735  

 2180 20:15:00.450574  00580000 ################################################################

 2181 20:15:00.450710  

 2182 20:15:00.974820  00600000 ################################################################

 2183 20:15:00.974974  

 2184 20:15:01.498880  00680000 ################################################################

 2185 20:15:01.499020  

 2186 20:15:02.024610  00700000 ################################################################

 2187 20:15:02.024762  

 2188 20:15:02.548323  00780000 ################################################################

 2189 20:15:02.548464  

 2190 20:15:03.075295  00800000 ################################################################

 2191 20:15:03.075444  

 2192 20:15:03.617618  00880000 ################################################################

 2193 20:15:03.617767  

 2194 20:15:04.196278  00900000 ################################################################

 2195 20:15:04.196460  

 2196 20:15:04.732570  00980000 ################################################################

 2197 20:15:04.732722  

 2198 20:15:05.331541  00a00000 ################################################################

 2199 20:15:05.331687  

 2200 20:15:05.932527  00a80000 ################################################################

 2201 20:15:05.932674  

 2202 20:15:05.981037  00b00000 ###### done.

 2203 20:15:05.981157  

 2204 20:15:05.984177  The bootfile was 11579904 bytes long.

 2205 20:15:05.984285  

 2206 20:15:05.987460  Sending tftp read request... done.

 2207 20:15:05.987555  

 2208 20:15:05.990719  Waiting for the transfer... 

 2209 20:15:05.990814  

 2210 20:15:06.659619  00000000 ################################################################

 2211 20:15:06.660253  

 2212 20:15:07.284828  00080000 ################################################################

 2213 20:15:07.284962  

 2214 20:15:07.932122  00100000 ################################################################

 2215 20:15:07.932688  

 2216 20:15:08.614936  00180000 ################################################################

 2217 20:15:08.615123  

 2218 20:15:09.283306  00200000 ################################################################

 2219 20:15:09.283880  

 2220 20:15:09.981133  00280000 ################################################################

 2221 20:15:09.981288  

 2222 20:15:10.622203  00300000 ################################################################

 2223 20:15:10.622743  

 2224 20:15:11.325813  00380000 ################################################################

 2225 20:15:11.326355  

 2226 20:15:12.037976  00400000 ################################################################

 2227 20:15:12.038535  

 2228 20:15:12.732703  00480000 ################################################################

 2229 20:15:12.733333  

 2230 20:15:13.438159  00500000 ################################################################

 2231 20:15:13.438817  

 2232 20:15:14.152891  00580000 ################################################################

 2233 20:15:14.153552  

 2234 20:15:14.879699  00600000 ################################################################

 2235 20:15:14.880248  

 2236 20:15:15.543988  00680000 ################################################################

 2237 20:15:15.544491  

 2238 20:15:16.197232  00700000 ################################################################

 2239 20:15:16.197554  

 2240 20:15:16.857961  00780000 ################################################################

 2241 20:15:16.858533  

 2242 20:15:17.520814  00800000 ################################################################

 2243 20:15:17.521348  

 2244 20:15:18.194043  00880000 ################################################################

 2245 20:15:18.194600  

 2246 20:15:18.872808  00900000 ################################################################

 2247 20:15:18.873367  

 2248 20:15:19.561383  00980000 ################################################################

 2249 20:15:19.562037  

 2250 20:15:20.282500  00a00000 ################################################################

 2251 20:15:20.283092  

 2252 20:15:21.016352  00a80000 ################################################################

 2253 20:15:21.016926  

 2254 20:15:21.744515  00b00000 ################################################################

 2255 20:15:21.745090  

 2256 20:15:22.471923  00b80000 ################################################################

 2257 20:15:22.472505  

 2258 20:15:23.193334  00c00000 ################################################################

 2259 20:15:23.193933  

 2260 20:15:23.915408  00c80000 ################################################################

 2261 20:15:23.915955  

 2262 20:15:24.626045  00d00000 ################################################################

 2263 20:15:24.626545  

 2264 20:15:25.357110  00d80000 ################################################################

 2265 20:15:25.357749  

 2266 20:15:26.073646  00e00000 ################################################################

 2267 20:15:26.074028  

 2268 20:15:26.782056  00e80000 ################################################################

 2269 20:15:26.782636  

 2270 20:15:27.515063  00f00000 ################################################################

 2271 20:15:27.515619  

 2272 20:15:28.257564  00f80000 ################################################################

 2273 20:15:28.258125  

 2274 20:15:28.989284  01000000 ################################################################

 2275 20:15:28.989938  

 2276 20:15:29.728816  01080000 ################################################################

 2277 20:15:29.729335  

 2278 20:15:30.445599  01100000 ################################################################

 2279 20:15:30.446118  

 2280 20:15:31.164958  01180000 ################################################################

 2281 20:15:31.165471  

 2282 20:15:31.892021  01200000 ################################################################

 2283 20:15:31.892572  

 2284 20:15:32.615595  01280000 ################################################################

 2285 20:15:32.616187  

 2286 20:15:33.356653  01300000 ################################################################

 2287 20:15:33.357197  

 2288 20:15:34.081072  01380000 ################################################################

 2289 20:15:34.081698  

 2290 20:15:34.796726  01400000 ################################################################

 2291 20:15:34.797254  

 2292 20:15:35.530416  01480000 ################################################################

 2293 20:15:35.531010  

 2294 20:15:36.253645  01500000 ################################################################

 2295 20:15:36.254198  

 2296 20:15:36.985544  01580000 ################################################################

 2297 20:15:36.986184  

 2298 20:15:37.719505  01600000 ################################################################

 2299 20:15:37.720051  

 2300 20:15:38.430648  01680000 ################################################################

 2301 20:15:38.431220  

 2302 20:15:39.166588  01700000 ################################################################

 2303 20:15:39.167156  

 2304 20:15:39.903274  01780000 ################################################################

 2305 20:15:39.903859  

 2306 20:15:40.615353  01800000 ################################################################

 2307 20:15:40.615877  

 2308 20:15:41.332708  01880000 ################################################################

 2309 20:15:41.333050  

 2310 20:15:42.060685  01900000 ################################################################

 2311 20:15:42.061265  

 2312 20:15:42.779089  01980000 ################################################################

 2313 20:15:42.779674  

 2314 20:15:43.491023  01a00000 ################################################################

 2315 20:15:43.491588  

 2316 20:15:44.214547  01a80000 ################################################################

 2317 20:15:44.215112  

 2318 20:15:44.941271  01b00000 ################################################################

 2319 20:15:44.941899  

 2320 20:15:45.670031  01b80000 ################################################################

 2321 20:15:45.670591  

 2322 20:15:46.392300  01c00000 ################################################################

 2323 20:15:46.392876  

 2324 20:15:47.118539  01c80000 ################################################################

 2325 20:15:47.119152  

 2326 20:15:47.850808  01d00000 ################################################################

 2327 20:15:47.851414  

 2328 20:15:48.570044  01d80000 ################################################################

 2329 20:15:48.570655  

 2330 20:15:49.293992  01e00000 ################################################################

 2331 20:15:49.294576  

 2332 20:15:50.031183  01e80000 ################################################################

 2333 20:15:50.031769  

 2334 20:15:50.688649  01f00000 ################################################################

 2335 20:15:50.688816  

 2336 20:15:51.404152  01f80000 ################################################################

 2337 20:15:51.404755  

 2338 20:15:51.982045  02000000 ################################################################

 2339 20:15:51.982186  

 2340 20:15:52.678106  02080000 ################################################################

 2341 20:15:52.678678  

 2342 20:15:53.418671  02100000 ################################################################

 2343 20:15:53.419248  

 2344 20:15:54.144611  02180000 ################################################################

 2345 20:15:54.145191  

 2346 20:15:54.862523  02200000 ################################################################

 2347 20:15:54.863107  

 2348 20:15:55.279909  02280000 ###################################### done.

 2349 20:15:55.280431  

 2350 20:15:55.282706  Sending tftp read request... done.

 2351 20:15:55.283412  

 2352 20:15:55.286419  Waiting for the transfer... 

 2353 20:15:55.286886  

 2354 20:15:55.289574  00000000 # done.

 2355 20:15:55.290049  

 2356 20:15:55.296130  Command line loaded dynamically from TFTP file: 12402913/tftp-deploy-nd29uic9/kernel/cmdline

 2357 20:15:55.299468  

 2358 20:15:55.313364  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2359 20:15:55.320626  

 2360 20:15:55.324266  Shutting down all USB controllers.

 2361 20:15:55.324791  

 2362 20:15:55.325130  Removing current net device

 2363 20:15:55.325443  

 2364 20:15:55.327130  Finalizing coreboot

 2365 20:15:55.327554  

 2366 20:15:55.333969  Exiting depthcharge with code 4 at timestamp: 71129771

 2367 20:15:55.334493  

 2368 20:15:55.334831  

 2369 20:15:55.335141  Starting kernel ...

 2370 20:15:55.335498  

 2371 20:15:55.336014  

 2372 20:15:55.337852  end: 2.2.4 bootloader-commands (duration 00:01:02) [common]
 2373 20:15:55.338345  start: 2.2.5 auto-login-action (timeout 00:03:42) [common]
 2374 20:15:55.338723  Setting prompt string to ['Linux version [0-9]']
 2375 20:15:55.339067  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2376 20:15:55.339411  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2378 20:19:37.338514  end: 2.2.5 auto-login-action (duration 00:03:42) [common]
 2380 20:19:37.338743  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 222 seconds'
 2382 20:19:37.338898  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2385 20:19:37.339148  end: 2 depthcharge-action (duration 00:05:00) [common]
 2387 20:19:37.339416  Cleaning after the job
 2388 20:19:37.339534  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12402913/tftp-deploy-nd29uic9/ramdisk
 2389 20:19:37.344667  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12402913/tftp-deploy-nd29uic9/kernel
 2390 20:19:37.346655  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12402913/tftp-deploy-nd29uic9/modules
 2391 20:19:37.347274  start: 4.1 power-off (timeout 00:00:30) [common]
 2392 20:19:37.347456  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
 2393 20:19:37.428682  >> Command sent successfully.

 2394 20:19:37.431275  Returned 0 in 0 seconds
 2395 20:19:37.531745  end: 4.1 power-off (duration 00:00:00) [common]
 2397 20:19:37.532083  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2398 20:19:37.532401  Listened to connection for namespace 'common' for up to 1s
 2399 20:19:38.533314  Finalising connection for namespace 'common'
 2400 20:19:38.533490  Disconnecting from shell: Finalise
 2401 20:19:38.533569  

 2402 20:19:38.633885  end: 4.2 read-feedback (duration 00:00:01) [common]
 2403 20:19:38.634032  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12402913
 2404 20:19:38.724338  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12402913
 2405 20:19:38.724543  JobError: Your job cannot terminate cleanly.