Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:36:08.893884 lava-dispatcher, installed at version: 2023.01
2 14:36:08.894114 start: 0 validate
3 14:36:08.894264 Start time: 2023-04-20 14:36:08.894256+00:00 (UTC)
4 14:36:08.894407 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:36:08.894553 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230414.0%2Famd64%2Finitrd.cpio.gz exists
6 14:36:09.186839 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:36:09.187034 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-1099-g7b2580e1565dd%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:36:09.477584 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:36:09.477822 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230414.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:36:09.767409 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:36:09.767602 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-1099-g7b2580e1565dd%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:36:10.057436 validate duration: 1.16
14 14:36:10.057794 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:36:10.057945 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:36:10.058046 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:36:10.058187 Not decompressing ramdisk as can be used compressed.
18 14:36:10.058285 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230414.0/amd64/initrd.cpio.gz
19 14:36:10.058358 saving as /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/ramdisk/initrd.cpio.gz
20 14:36:10.058426 total size: 5432117 (5MB)
21 14:36:10.059612 progress 0% (0MB)
22 14:36:10.061357 progress 5% (0MB)
23 14:36:10.062926 progress 10% (0MB)
24 14:36:10.064665 progress 15% (0MB)
25 14:36:10.066424 progress 20% (1MB)
26 14:36:10.068062 progress 25% (1MB)
27 14:36:10.069616 progress 30% (1MB)
28 14:36:10.071392 progress 35% (1MB)
29 14:36:10.072941 progress 40% (2MB)
30 14:36:10.074606 progress 45% (2MB)
31 14:36:10.076134 progress 50% (2MB)
32 14:36:10.077908 progress 55% (2MB)
33 14:36:10.079442 progress 60% (3MB)
34 14:36:10.081024 progress 65% (3MB)
35 14:36:10.082739 progress 70% (3MB)
36 14:36:10.084339 progress 75% (3MB)
37 14:36:10.085874 progress 80% (4MB)
38 14:36:10.087519 progress 85% (4MB)
39 14:36:10.089221 progress 90% (4MB)
40 14:36:10.090820 progress 95% (4MB)
41 14:36:10.092365 progress 100% (5MB)
42 14:36:10.092601 5MB downloaded in 0.03s (151.61MB/s)
43 14:36:10.092774 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:36:10.093047 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:36:10.093144 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:36:10.093240 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:36:10.093427 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-1099-g7b2580e1565dd/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:36:10.093546 saving as /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/kernel/bzImage
50 14:36:10.093655 total size: 7884688 (7MB)
51 14:36:10.093726 No compression specified
52 14:36:10.094967 progress 0% (0MB)
53 14:36:10.097452 progress 5% (0MB)
54 14:36:10.099782 progress 10% (0MB)
55 14:36:10.102248 progress 15% (1MB)
56 14:36:10.104599 progress 20% (1MB)
57 14:36:10.107010 progress 25% (1MB)
58 14:36:10.109287 progress 30% (2MB)
59 14:36:10.111678 progress 35% (2MB)
60 14:36:10.114042 progress 40% (3MB)
61 14:36:10.116376 progress 45% (3MB)
62 14:36:10.118690 progress 50% (3MB)
63 14:36:10.121025 progress 55% (4MB)
64 14:36:10.123422 progress 60% (4MB)
65 14:36:10.125719 progress 65% (4MB)
66 14:36:10.128030 progress 70% (5MB)
67 14:36:10.130357 progress 75% (5MB)
68 14:36:10.132724 progress 80% (6MB)
69 14:36:10.135031 progress 85% (6MB)
70 14:36:10.137437 progress 90% (6MB)
71 14:36:10.139767 progress 95% (7MB)
72 14:36:10.142049 progress 100% (7MB)
73 14:36:10.142287 7MB downloaded in 0.05s (154.64MB/s)
74 14:36:10.142510 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:36:10.142774 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:36:10.142871 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:36:10.142972 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:36:10.143131 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230414.0/amd64/full.rootfs.tar.xz
80 14:36:10.143208 saving as /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/nfsrootfs/full.rootfs.tar
81 14:36:10.143278 total size: 207129528 (197MB)
82 14:36:10.143349 Using unxz to decompress xz
83 14:36:10.147251 progress 0% (0MB)
84 14:36:10.759301 progress 5% (9MB)
85 14:36:11.347904 progress 10% (19MB)
86 14:36:12.027381 progress 15% (29MB)
87 14:36:12.434974 progress 20% (39MB)
88 14:36:12.849287 progress 25% (49MB)
89 14:36:13.569924 progress 30% (59MB)
90 14:36:14.201429 progress 35% (69MB)
91 14:36:14.894644 progress 40% (79MB)
92 14:36:15.563550 progress 45% (88MB)
93 14:36:16.229975 progress 50% (98MB)
94 14:36:16.930028 progress 55% (108MB)
95 14:36:17.685557 progress 60% (118MB)
96 14:36:17.840081 progress 65% (128MB)
97 14:36:17.995641 progress 70% (138MB)
98 14:36:18.097197 progress 75% (148MB)
99 14:36:18.177444 progress 80% (158MB)
100 14:36:18.251705 progress 85% (167MB)
101 14:36:18.369515 progress 90% (177MB)
102 14:36:18.667699 progress 95% (187MB)
103 14:36:19.313187 progress 100% (197MB)
104 14:36:19.318406 197MB downloaded in 9.18s (21.53MB/s)
105 14:36:19.318737 end: 1.3.1 http-download (duration 00:00:09) [common]
107 14:36:19.319037 end: 1.3 download-retry (duration 00:00:09) [common]
108 14:36:19.319143 start: 1.4 download-retry (timeout 00:09:51) [common]
109 14:36:19.319251 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 14:36:19.319427 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-1099-g7b2580e1565dd/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:36:19.319509 saving as /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/modules/modules.tar
112 14:36:19.319578 total size: 251260 (0MB)
113 14:36:19.319648 Using unxz to decompress xz
114 14:36:19.323334 progress 13% (0MB)
115 14:36:19.323793 progress 26% (0MB)
116 14:36:19.324056 progress 39% (0MB)
117 14:36:19.325541 progress 52% (0MB)
118 14:36:19.327930 progress 65% (0MB)
119 14:36:19.329925 progress 78% (0MB)
120 14:36:19.331993 progress 91% (0MB)
121 14:36:19.334082 progress 100% (0MB)
122 14:36:19.340047 0MB downloaded in 0.02s (11.71MB/s)
123 14:36:19.340428 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:36:19.340875 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:36:19.341020 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 14:36:19.341197 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 14:36:22.165338 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10062797/extract-nfsrootfs-tulu85vb
129 14:36:22.165569 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 14:36:22.165705 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 14:36:22.165893 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960
132 14:36:22.166044 makedir: /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin
133 14:36:22.166195 makedir: /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/tests
134 14:36:22.166310 makedir: /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/results
135 14:36:22.166432 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-add-keys
136 14:36:22.166595 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-add-sources
137 14:36:22.166738 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-background-process-start
138 14:36:22.166884 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-background-process-stop
139 14:36:22.167025 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-common-functions
140 14:36:22.167169 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-echo-ipv4
141 14:36:22.167315 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-install-packages
142 14:36:22.167454 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-installed-packages
143 14:36:22.167593 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-os-build
144 14:36:22.167736 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-probe-channel
145 14:36:22.167876 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-probe-ip
146 14:36:22.168023 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-target-ip
147 14:36:22.168160 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-target-mac
148 14:36:22.168299 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-target-storage
149 14:36:22.168479 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-test-case
150 14:36:22.168653 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-test-event
151 14:36:22.168802 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-test-feedback
152 14:36:22.168948 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-test-raise
153 14:36:22.169086 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-test-reference
154 14:36:22.169225 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-test-runner
155 14:36:22.169393 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-test-set
156 14:36:22.169572 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-test-shell
157 14:36:22.169737 Updating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-add-keys (debian)
158 14:36:22.169908 Updating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-add-sources (debian)
159 14:36:22.170074 Updating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-install-packages (debian)
160 14:36:22.170239 Updating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-installed-packages (debian)
161 14:36:22.170401 Updating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/bin/lava-os-build (debian)
162 14:36:22.170541 Creating /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/environment
163 14:36:22.170660 LAVA metadata
164 14:36:22.170741 - LAVA_JOB_ID=10062797
165 14:36:22.170815 - LAVA_DISPATCHER_IP=192.168.201.1
166 14:36:22.170930 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
167 14:36:22.171012 skipped lava-vland-overlay
168 14:36:22.171101 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 14:36:22.171193 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
170 14:36:22.171263 skipped lava-multinode-overlay
171 14:36:22.171346 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 14:36:22.171436 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
173 14:36:22.171528 Loading test definitions
174 14:36:22.171629 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
175 14:36:22.171720 Using /lava-10062797 at stage 0
176 14:36:22.172033 uuid=10062797_1.5.2.3.1 testdef=None
177 14:36:22.172146 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 14:36:22.172278 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
179 14:36:22.172954 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 14:36:22.173212 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
182 14:36:22.173970 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 14:36:22.174235 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
185 14:36:22.174846 runner path: /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/0/tests/0_timesync-off test_uuid 10062797_1.5.2.3.1
186 14:36:22.175021 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 14:36:22.175280 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
189 14:36:22.175373 Using /lava-10062797 at stage 0
190 14:36:22.175505 Fetching tests from https://github.com/kernelci/test-definitions.git
191 14:36:22.175596 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/0/tests/1_kselftest-futex'
192 14:36:25.607126 Running '/usr/bin/git checkout kernelci.org
193 14:36:25.767761 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
194 14:36:25.768803 uuid=10062797_1.5.2.3.5 testdef=None
195 14:36:25.768993 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
197 14:36:25.769431 start: 1.5.2.3.6 test-overlay (timeout 00:09:44) [common]
198 14:36:25.770390 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 14:36:25.770670 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:44) [common]
201 14:36:25.771999 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 14:36:25.772358 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
204 14:36:25.773936 runner path: /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/0/tests/1_kselftest-futex test_uuid 10062797_1.5.2.3.5
205 14:36:25.774041 BOARD='asus-C436FA-Flip-hatch'
206 14:36:25.774117 BRANCH='cip-gitlab'
207 14:36:25.774187 SKIPFILE='/dev/null'
208 14:36:25.774255 SKIP_INSTALL='True'
209 14:36:25.774321 TESTPROG_URL='None'
210 14:36:25.774387 TST_CASENAME=''
211 14:36:25.774452 TST_CMDFILES='futex'
212 14:36:25.774610 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 14:36:25.774843 Creating lava-test-runner.conf files
215 14:36:25.774917 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062797/lava-overlay-t1xj1960/lava-10062797/0 for stage 0
216 14:36:25.775022 - 0_timesync-off
217 14:36:25.775102 - 1_kselftest-futex
218 14:36:25.775214 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
219 14:36:25.775317 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
220 14:36:34.426141 end: 1.5.2.4 compress-overlay (duration 00:00:09) [common]
221 14:36:34.426350 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
222 14:36:34.426474 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 14:36:34.426592 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
224 14:36:34.426714 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
225 14:36:34.572057 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 14:36:34.572525 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
227 14:36:34.572703 extracting modules file /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062797/extract-nfsrootfs-tulu85vb
228 14:36:34.587423 extracting modules file /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062797/extract-overlay-ramdisk-8n6ae2_w/ramdisk
229 14:36:34.601846 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 14:36:34.602013 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
231 14:36:34.602138 [common] Applying overlay to NFS
232 14:36:34.602220 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062797/compress-overlay-8ajq34hz/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062797/extract-nfsrootfs-tulu85vb
233 14:36:35.594268 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 14:36:35.594471 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
235 14:36:35.594610 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 14:36:35.594736 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
237 14:36:35.594842 Building ramdisk /var/lib/lava/dispatcher/tmp/10062797/extract-overlay-ramdisk-8n6ae2_w/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062797/extract-overlay-ramdisk-8n6ae2_w/ramdisk
238 14:36:35.665340 >> 26160 blocks
239 14:36:36.261052 rename /var/lib/lava/dispatcher/tmp/10062797/extract-overlay-ramdisk-8n6ae2_w/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/ramdisk/ramdisk.cpio.gz
240 14:36:36.261560 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 14:36:36.261759 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
242 14:36:36.261927 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
243 14:36:36.262078 No mkimage arch provided, not using FIT.
244 14:36:36.262231 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 14:36:36.262380 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 14:36:36.262562 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
247 14:36:36.262732 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
248 14:36:36.262869 No LXC device requested
249 14:36:36.262972 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 14:36:36.263078 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
251 14:36:36.263176 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 14:36:36.263261 Checking files for TFTP limit of 4294967296 bytes.
253 14:36:36.263770 end: 1 tftp-deploy (duration 00:00:26) [common]
254 14:36:36.263932 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 14:36:36.264069 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 14:36:36.264207 substitutions:
257 14:36:36.264283 - {DTB}: None
258 14:36:36.264354 - {INITRD}: 10062797/tftp-deploy-21or2q6n/ramdisk/ramdisk.cpio.gz
259 14:36:36.264424 - {KERNEL}: 10062797/tftp-deploy-21or2q6n/kernel/bzImage
260 14:36:36.264490 - {LAVA_MAC}: None
261 14:36:36.264554 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10062797/extract-nfsrootfs-tulu85vb
262 14:36:36.264622 - {NFS_SERVER_IP}: 192.168.201.1
263 14:36:36.264686 - {PRESEED_CONFIG}: None
264 14:36:36.264748 - {PRESEED_LOCAL}: None
265 14:36:36.264810 - {RAMDISK}: 10062797/tftp-deploy-21or2q6n/ramdisk/ramdisk.cpio.gz
266 14:36:36.264872 - {ROOT_PART}: None
267 14:36:36.264933 - {ROOT}: None
268 14:36:36.264994 - {SERVER_IP}: 192.168.201.1
269 14:36:36.265055 - {TEE}: None
270 14:36:36.265116 Parsed boot commands:
271 14:36:36.265176 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 14:36:36.265367 Parsed boot commands: tftpboot 192.168.201.1 10062797/tftp-deploy-21or2q6n/kernel/bzImage 10062797/tftp-deploy-21or2q6n/kernel/cmdline 10062797/tftp-deploy-21or2q6n/ramdisk/ramdisk.cpio.gz
273 14:36:36.265467 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 14:36:36.265565 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 14:36:36.265683 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 14:36:36.265789 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 14:36:36.265871 Not connected, no need to disconnect.
278 14:36:36.265956 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 14:36:36.266048 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 14:36:36.266127 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
281 14:36:36.269703 Setting prompt string to ['lava-test: # ']
282 14:36:36.270089 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 14:36:36.270210 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 14:36:36.270318 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 14:36:36.270417 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 14:36:36.270624 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
287 14:36:41.417372 >> Command sent successfully.
288 14:36:41.427866 Returned 0 in 5 seconds
289 14:36:41.529532 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 14:36:41.531122 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 14:36:41.531727 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 14:36:41.532243 Setting prompt string to 'Starting depthcharge on Helios...'
294 14:36:41.532677 Changing prompt to 'Starting depthcharge on Helios...'
295 14:36:41.533135 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 14:36:41.534650 [Enter `^Ec?' for help]
297 14:36:42.140789
298 14:36:42.141306
299 14:36:42.151474 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 14:36:42.154660 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 14:36:42.160787 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 14:36:42.164329 CPU: AES supported, TXT NOT supported, VT supported
303 14:36:42.171390 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 14:36:42.174482 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 14:36:42.181386 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 14:36:42.184418 VBOOT: Loading verstage.
307 14:36:42.187328 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 14:36:42.194526 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 14:36:42.197539 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 14:36:42.200929 CBFS @ c08000 size 3f8000
311 14:36:42.207421 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 14:36:42.211037 CBFS: Locating 'fallback/verstage'
313 14:36:42.214294 CBFS: Found @ offset 10fb80 size 1072c
314 14:36:42.217886
315 14:36:42.218316
316 14:36:42.227651 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 14:36:42.242080 Probing TPM: . done!
318 14:36:42.245265 TPM ready after 0 ms
319 14:36:42.248816 Connected to device vid:did:rid of 1ae0:0028:00
320 14:36:42.258693 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
321 14:36:42.262182 Initialized TPM device CR50 revision 0
322 14:36:42.304866 tlcl_send_startup: Startup return code is 0
323 14:36:42.305325 TPM: setup succeeded
324 14:36:42.317317 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 14:36:42.321024 Chrome EC: UHEPI supported
326 14:36:42.324677 Phase 1
327 14:36:42.327710 FMAP: area GBB found @ c05000 (12288 bytes)
328 14:36:42.334512 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 14:36:42.337547 Phase 2
330 14:36:42.338025 Phase 3
331 14:36:42.341348 FMAP: area GBB found @ c05000 (12288 bytes)
332 14:36:42.347782 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 14:36:42.354624 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
334 14:36:42.357956 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
335 14:36:42.364407 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 14:36:42.379772 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
337 14:36:42.383233 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
338 14:36:42.389974 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 14:36:42.394329 Phase 4
340 14:36:42.397275 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
341 14:36:42.403873 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 14:36:42.583252 VB2:vb2_rsa_verify_digest() Digest check failed!
343 14:36:42.590006 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 14:36:42.590463 Saving nvdata
345 14:36:42.593281 Reboot requested (10020007)
346 14:36:42.596344 board_reset() called!
347 14:36:42.596911 full_reset() called!
348 14:36:47.108112
349 14:36:47.108644
350 14:36:47.118066 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 14:36:47.121230 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 14:36:47.128123 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 14:36:47.131109 CPU: AES supported, TXT NOT supported, VT supported
354 14:36:47.137955 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 14:36:47.141827 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 14:36:47.147392 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 14:36:47.151060 VBOOT: Loading verstage.
358 14:36:47.154148 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 14:36:47.160677 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 14:36:47.167931 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 14:36:47.168468 CBFS @ c08000 size 3f8000
362 14:36:47.174692 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 14:36:47.177673 CBFS: Locating 'fallback/verstage'
364 14:36:47.180910 CBFS: Found @ offset 10fb80 size 1072c
365 14:36:47.184868
366 14:36:47.185297
367 14:36:47.194882 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 14:36:47.209385 Probing TPM: . done!
369 14:36:47.212199 TPM ready after 0 ms
370 14:36:47.216303 Connected to device vid:did:rid of 1ae0:0028:00
371 14:36:47.226330 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
372 14:36:47.229274 Initialized TPM device CR50 revision 0
373 14:36:47.272201 tlcl_send_startup: Startup return code is 0
374 14:36:47.272785 TPM: setup succeeded
375 14:36:47.284877 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 14:36:47.288179 Chrome EC: UHEPI supported
377 14:36:47.291842 Phase 1
378 14:36:47.294779 FMAP: area GBB found @ c05000 (12288 bytes)
379 14:36:47.301728 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 14:36:47.308552 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 14:36:47.311667 Recovery requested (1009000e)
382 14:36:47.317828 Saving nvdata
383 14:36:47.324096 tlcl_extend: response is 0
384 14:36:47.332490 tlcl_extend: response is 0
385 14:36:47.339412 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 14:36:47.342551 CBFS @ c08000 size 3f8000
387 14:36:47.349570 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 14:36:47.352791 CBFS: Locating 'fallback/romstage'
389 14:36:47.356306 CBFS: Found @ offset 80 size 145fc
390 14:36:47.359174 Accumulated console time in verstage 98 ms
391 14:36:47.359673
392 14:36:47.360053
393 14:36:47.372758 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 14:36:47.379188 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 14:36:47.382460 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 14:36:47.386109 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 14:36:47.392254 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 14:36:47.395678 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 14:36:47.398967 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
400 14:36:47.401921 TCO_STS: 0000 0000
401 14:36:47.405670 GEN_PMCON: e0015238 00000200
402 14:36:47.408693 GBLRST_CAUSE: 00000000 00000000
403 14:36:47.409322 prev_sleep_state 5
404 14:36:47.412517 Boot Count incremented to 51156
405 14:36:47.419042 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 14:36:47.422535 CBFS @ c08000 size 3f8000
407 14:36:47.429097 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 14:36:47.429709 CBFS: Locating 'fspm.bin'
409 14:36:47.436039 CBFS: Found @ offset 5ffc0 size 71000
410 14:36:47.438698 Chrome EC: UHEPI supported
411 14:36:47.445156 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 14:36:47.448957 Probing TPM: done!
413 14:36:47.455190 Connected to device vid:did:rid of 1ae0:0028:00
414 14:36:47.465564 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
415 14:36:47.471744 Initialized TPM device CR50 revision 0
416 14:36:47.481045 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 14:36:47.487169 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 14:36:47.490350 MRC cache found, size 1948
419 14:36:47.493762 bootmode is set to: 2
420 14:36:47.496975 PRMRR disabled by config.
421 14:36:47.500560 SPD INDEX = 1
422 14:36:47.503850 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 14:36:47.506944 CBFS @ c08000 size 3f8000
424 14:36:47.513422 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 14:36:47.513949 CBFS: Locating 'spd.bin'
426 14:36:47.516861 CBFS: Found @ offset 5fb80 size 400
427 14:36:47.520254 SPD: module type is LPDDR3
428 14:36:47.523051 SPD: module part is
429 14:36:47.530269 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 14:36:47.533187 SPD: device width 4 bits, bus width 8 bits
431 14:36:47.537299 SPD: module size is 4096 MB (per channel)
432 14:36:47.540055 memory slot: 0 configuration done.
433 14:36:47.543169 memory slot: 2 configuration done.
434 14:36:47.594663 CBMEM:
435 14:36:47.598356 IMD: root @ 99fff000 254 entries.
436 14:36:47.601674 IMD: root @ 99ffec00 62 entries.
437 14:36:47.604623 External stage cache:
438 14:36:47.607893 IMD: root @ 9abff000 254 entries.
439 14:36:47.611373 IMD: root @ 9abfec00 62 entries.
440 14:36:47.614334 Chrome EC: clear events_b mask to 0x0000000020004000
441 14:36:47.630369 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 14:36:47.643894 tlcl_write: response is 0
443 14:36:47.653270 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 14:36:47.659513 MRC: TPM MRC hash updated successfully.
445 14:36:47.660090 2 DIMMs found
446 14:36:47.663169 SMM Memory Map
447 14:36:47.666052 SMRAM : 0x9a000000 0x1000000
448 14:36:47.669261 Subregion 0: 0x9a000000 0xa00000
449 14:36:47.672639 Subregion 1: 0x9aa00000 0x200000
450 14:36:47.676121 Subregion 2: 0x9ac00000 0x400000
451 14:36:47.679030 top_of_ram = 0x9a000000
452 14:36:47.682673 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 14:36:47.689083 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 14:36:47.692495 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 14:36:47.699245 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 14:36:47.702565 CBFS @ c08000 size 3f8000
457 14:36:47.705848 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 14:36:47.709139 CBFS: Locating 'fallback/postcar'
459 14:36:47.715360 CBFS: Found @ offset 107000 size 4b44
460 14:36:47.718965 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 14:36:47.731161 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 14:36:47.734209 Processing 180 relocs. Offset value of 0x97c0c000
463 14:36:47.743223 Accumulated console time in romstage 286 ms
464 14:36:47.743652
465 14:36:47.743992
466 14:36:47.753107 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 14:36:47.760024 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 14:36:47.762814 CBFS @ c08000 size 3f8000
469 14:36:47.766609 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 14:36:47.773155 CBFS: Locating 'fallback/ramstage'
471 14:36:47.776485 CBFS: Found @ offset 43380 size 1b9e8
472 14:36:47.782679 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 14:36:47.814483 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 14:36:47.818284 Processing 3976 relocs. Offset value of 0x98db0000
475 14:36:47.824882 Accumulated console time in postcar 52 ms
476 14:36:47.825358
477 14:36:47.825818
478 14:36:47.834263 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 14:36:47.841530 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 14:36:47.844296 WARNING: RO_VPD is uninitialized or empty.
481 14:36:47.847787 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 14:36:47.854447 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 14:36:47.854880 Normal boot.
484 14:36:47.861772 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 14:36:47.864715 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 14:36:47.867880 CBFS @ c08000 size 3f8000
487 14:36:47.874299 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 14:36:47.877487 CBFS: Locating 'cpu_microcode_blob.bin'
489 14:36:47.880741 CBFS: Found @ offset 14700 size 2ec00
490 14:36:47.884374 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 14:36:47.887584 Skip microcode update
492 14:36:47.894090 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 14:36:47.894526 CBFS @ c08000 size 3f8000
494 14:36:47.901388 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 14:36:47.904601 CBFS: Locating 'fsps.bin'
496 14:36:47.907935 CBFS: Found @ offset d1fc0 size 35000
497 14:36:47.933268 Detected 4 core, 8 thread CPU.
498 14:36:47.936379 Setting up SMI for CPU
499 14:36:47.939213 IED base = 0x9ac00000
500 14:36:47.939693 IED size = 0x00400000
501 14:36:47.942677 Will perform SMM setup.
502 14:36:47.949451 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 14:36:47.956067 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 14:36:47.959363 Processing 16 relocs. Offset value of 0x00030000
505 14:36:47.963044 Attempting to start 7 APs
506 14:36:47.966545 Waiting for 10ms after sending INIT.
507 14:36:47.982521 Waiting for 1st SIPI to complete...AP: slot 5 apic_id 1.
508 14:36:47.983109 done.
509 14:36:47.986034 AP: slot 3 apic_id 2.
510 14:36:47.989369 AP: slot 1 apic_id 3.
511 14:36:47.992511 Waiting for 2nd SIPI to complete...done.
512 14:36:47.996115 AP: slot 4 apic_id 5.
513 14:36:47.996571 AP: slot 2 apic_id 4.
514 14:36:47.998842 AP: slot 7 apic_id 6.
515 14:36:48.002842 AP: slot 6 apic_id 7.
516 14:36:48.009313 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 14:36:48.015862 Processing 13 relocs. Offset value of 0x00038000
518 14:36:48.018777 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 14:36:48.025857 Installing SMM handler to 0x9a000000
520 14:36:48.032107 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 14:36:48.039379 Processing 658 relocs. Offset value of 0x9a010000
522 14:36:48.045521 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 14:36:48.049045 Processing 13 relocs. Offset value of 0x9a008000
524 14:36:48.055575 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 14:36:48.062384 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 14:36:48.068530 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 14:36:48.072009 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 14:36:48.078523 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 14:36:48.085383 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 14:36:48.088175 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 14:36:48.094889 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 14:36:48.098648 Clearing SMI status registers
533 14:36:48.102397 SMI_STS: PM1
534 14:36:48.103049 PM1_STS: PWRBTN
535 14:36:48.105019 TCO_STS: SECOND_TO
536 14:36:48.109319 New SMBASE 0x9a000000
537 14:36:48.112315 In relocation handler: CPU 0
538 14:36:48.115752 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 14:36:48.118834 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 14:36:48.121835 Relocation complete.
541 14:36:48.125296 New SMBASE 0x99ffec00
542 14:36:48.128467 In relocation handler: CPU 5
543 14:36:48.132178 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
544 14:36:48.135130 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 14:36:48.138610 Relocation complete.
546 14:36:48.141991 New SMBASE 0x99fff400
547 14:36:48.142593 In relocation handler: CPU 3
548 14:36:48.148094 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
549 14:36:48.151700 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 14:36:48.155476 Relocation complete.
551 14:36:48.158425 New SMBASE 0x99fffc00
552 14:36:48.158861 In relocation handler: CPU 1
553 14:36:48.165165 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 14:36:48.167873 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 14:36:48.171786 Relocation complete.
556 14:36:48.172217 New SMBASE 0x99fff000
557 14:36:48.175101 In relocation handler: CPU 4
558 14:36:48.181897 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
559 14:36:48.184894 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 14:36:48.187966 Relocation complete.
561 14:36:48.188453 New SMBASE 0x99fff800
562 14:36:48.191031 In relocation handler: CPU 2
563 14:36:48.197587 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
564 14:36:48.201956 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 14:36:48.204811 Relocation complete.
566 14:36:48.205435 New SMBASE 0x99ffe800
567 14:36:48.207655 In relocation handler: CPU 6
568 14:36:48.211332 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
569 14:36:48.218197 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 14:36:48.221220 Relocation complete.
571 14:36:48.221738 New SMBASE 0x99ffe400
572 14:36:48.224262 In relocation handler: CPU 7
573 14:36:48.228428 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
574 14:36:48.234508 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 14:36:48.237693 Relocation complete.
576 14:36:48.238268 Initializing CPU #0
577 14:36:48.241378 CPU: vendor Intel device 806ec
578 14:36:48.244725 CPU: family 06, model 8e, stepping 0c
579 14:36:48.247673 Clearing out pending MCEs
580 14:36:48.251115 Setting up local APIC...
581 14:36:48.254400 apic_id: 0x00 done.
582 14:36:48.254946 Turbo is available but hidden
583 14:36:48.257685 Turbo is available and visible
584 14:36:48.261012 VMX status: enabled
585 14:36:48.264552 IA32_FEATURE_CONTROL status: locked
586 14:36:48.267639 Skip microcode update
587 14:36:48.268174 CPU #0 initialized
588 14:36:48.270581 Initializing CPU #5
589 14:36:48.273909 Initializing CPU #7
590 14:36:48.274343 Initializing CPU #6
591 14:36:48.277803 CPU: vendor Intel device 806ec
592 14:36:48.281225 CPU: family 06, model 8e, stepping 0c
593 14:36:48.284128 CPU: vendor Intel device 806ec
594 14:36:48.287227 CPU: family 06, model 8e, stepping 0c
595 14:36:48.290782 Clearing out pending MCEs
596 14:36:48.294207 Initializing CPU #1
597 14:36:48.294640 Initializing CPU #3
598 14:36:48.297287 CPU: vendor Intel device 806ec
599 14:36:48.304454 CPU: family 06, model 8e, stepping 0c
600 14:36:48.305000 CPU: vendor Intel device 806ec
601 14:36:48.310543 CPU: family 06, model 8e, stepping 0c
602 14:36:48.311121 Clearing out pending MCEs
603 14:36:48.314250 Clearing out pending MCEs
604 14:36:48.317425 Setting up local APIC...
605 14:36:48.320683 Setting up local APIC...
606 14:36:48.321167 apic_id: 0x03 done.
607 14:36:48.323562 Setting up local APIC...
608 14:36:48.327305 Initializing CPU #2
609 14:36:48.327787 Initializing CPU #4
610 14:36:48.330506 apic_id: 0x02 done.
611 14:36:48.333572 VMX status: enabled
612 14:36:48.334037 VMX status: enabled
613 14:36:48.337864 IA32_FEATURE_CONTROL status: locked
614 14:36:48.340690 IA32_FEATURE_CONTROL status: locked
615 14:36:48.343949 Skip microcode update
616 14:36:48.347088 Skip microcode update
617 14:36:48.347526 CPU #1 initialized
618 14:36:48.350247 CPU #3 initialized
619 14:36:48.353716 apic_id: 0x06 done.
620 14:36:48.354170 Clearing out pending MCEs
621 14:36:48.357156 VMX status: enabled
622 14:36:48.360055 Setting up local APIC...
623 14:36:48.363706 CPU: vendor Intel device 806ec
624 14:36:48.366826 CPU: family 06, model 8e, stepping 0c
625 14:36:48.370166 Clearing out pending MCEs
626 14:36:48.370711 apic_id: 0x07 done.
627 14:36:48.373634 IA32_FEATURE_CONTROL status: locked
628 14:36:48.377023 VMX status: enabled
629 14:36:48.380542 Skip microcode update
630 14:36:48.383418 IA32_FEATURE_CONTROL status: locked
631 14:36:48.383990 CPU #7 initialized
632 14:36:48.386883 Skip microcode update
633 14:36:48.390382 Setting up local APIC...
634 14:36:48.393211 CPU: vendor Intel device 806ec
635 14:36:48.397350 CPU: family 06, model 8e, stepping 0c
636 14:36:48.399926 CPU: vendor Intel device 806ec
637 14:36:48.403398 CPU: family 06, model 8e, stepping 0c
638 14:36:48.406845 Clearing out pending MCEs
639 14:36:48.410539 Clearing out pending MCEs
640 14:36:48.410974 Setting up local APIC...
641 14:36:48.413048 apic_id: 0x01 done.
642 14:36:48.417066 Setting up local APIC...
643 14:36:48.417652 CPU #6 initialized
644 14:36:48.420327 VMX status: enabled
645 14:36:48.423046 apic_id: 0x05 done.
646 14:36:48.423476 apic_id: 0x04 done.
647 14:36:48.427101 VMX status: enabled
648 14:36:48.427632 VMX status: enabled
649 14:36:48.433708 IA32_FEATURE_CONTROL status: locked
650 14:36:48.437029 IA32_FEATURE_CONTROL status: locked
651 14:36:48.437631 Skip microcode update
652 14:36:48.439894 Skip microcode update
653 14:36:48.443149 CPU #4 initialized
654 14:36:48.443590 CPU #2 initialized
655 14:36:48.446491 IA32_FEATURE_CONTROL status: locked
656 14:36:48.449544 Skip microcode update
657 14:36:48.453171 CPU #5 initialized
658 14:36:48.456238 bsp_do_flight_plan done after 461 msecs.
659 14:36:48.459326 CPU: frequency set to 4200 MHz
660 14:36:48.459889 Enabling SMIs.
661 14:36:48.463164 Locking SMM.
662 14:36:48.476964 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 14:36:48.480222 CBFS @ c08000 size 3f8000
664 14:36:48.486863 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 14:36:48.487454 CBFS: Locating 'vbt.bin'
666 14:36:48.489831 CBFS: Found @ offset 5f5c0 size 499
667 14:36:48.496804 Found a VBT of 4608 bytes after decompression
668 14:36:48.678369 Display FSP Version Info HOB
669 14:36:48.681802 Reference Code - CPU = 9.0.1e.30
670 14:36:48.685288 uCode Version = 0.0.0.ca
671 14:36:48.688501 TXT ACM version = ff.ff.ff.ffff
672 14:36:48.691440 Display FSP Version Info HOB
673 14:36:48.695130 Reference Code - ME = 9.0.1e.30
674 14:36:48.698378 MEBx version = 0.0.0.0
675 14:36:48.701813 ME Firmware Version = Consumer SKU
676 14:36:48.704836 Display FSP Version Info HOB
677 14:36:48.708576 Reference Code - CML PCH = 9.0.1e.30
678 14:36:48.711756 PCH-CRID Status = Disabled
679 14:36:48.714890 PCH-CRID Original Value = ff.ff.ff.ffff
680 14:36:48.718153 PCH-CRID New Value = ff.ff.ff.ffff
681 14:36:48.721634 OPROM - RST - RAID = ff.ff.ff.ffff
682 14:36:48.724866 ChipsetInit Base Version = ff.ff.ff.ffff
683 14:36:48.728366 ChipsetInit Oem Version = ff.ff.ff.ffff
684 14:36:48.731679 Display FSP Version Info HOB
685 14:36:48.738186 Reference Code - SA - System Agent = 9.0.1e.30
686 14:36:48.741155 Reference Code - MRC = 0.7.1.6c
687 14:36:48.741675 SA - PCIe Version = 9.0.1e.30
688 14:36:48.745125 SA-CRID Status = Disabled
689 14:36:48.748133 SA-CRID Original Value = 0.0.0.c
690 14:36:48.751164 SA-CRID New Value = 0.0.0.c
691 14:36:48.755113 OPROM - VBIOS = ff.ff.ff.ffff
692 14:36:48.758270 RTC Init
693 14:36:48.761670 Set power on after power failure.
694 14:36:48.762293 Disabling Deep S3
695 14:36:48.764533 Disabling Deep S3
696 14:36:48.765016 Disabling Deep S4
697 14:36:48.767689 Disabling Deep S4
698 14:36:48.768204 Disabling Deep S5
699 14:36:48.771483 Disabling Deep S5
700 14:36:48.777714 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 192 exit 1
701 14:36:48.778223 Enumerating buses...
702 14:36:48.784350 Show all devs... Before device enumeration.
703 14:36:48.784790 Root Device: enabled 1
704 14:36:48.787723 CPU_CLUSTER: 0: enabled 1
705 14:36:48.790994 DOMAIN: 0000: enabled 1
706 14:36:48.794084 APIC: 00: enabled 1
707 14:36:48.794546 PCI: 00:00.0: enabled 1
708 14:36:48.797956 PCI: 00:02.0: enabled 1
709 14:36:48.801075 PCI: 00:04.0: enabled 0
710 14:36:48.804212 PCI: 00:05.0: enabled 0
711 14:36:48.804642 PCI: 00:12.0: enabled 1
712 14:36:48.807189 PCI: 00:12.5: enabled 0
713 14:36:48.810941 PCI: 00:12.6: enabled 0
714 14:36:48.811373 PCI: 00:14.0: enabled 1
715 14:36:48.814303 PCI: 00:14.1: enabled 0
716 14:36:48.817520 PCI: 00:14.3: enabled 1
717 14:36:48.820567 PCI: 00:14.5: enabled 0
718 14:36:48.820996 PCI: 00:15.0: enabled 1
719 14:36:48.824019 PCI: 00:15.1: enabled 1
720 14:36:48.827420 PCI: 00:15.2: enabled 0
721 14:36:48.830769 PCI: 00:15.3: enabled 0
722 14:36:48.831282 PCI: 00:16.0: enabled 1
723 14:36:48.834384 PCI: 00:16.1: enabled 0
724 14:36:48.837434 PCI: 00:16.2: enabled 0
725 14:36:48.840821 PCI: 00:16.3: enabled 0
726 14:36:48.841259 PCI: 00:16.4: enabled 0
727 14:36:48.843864 PCI: 00:16.5: enabled 0
728 14:36:48.847280 PCI: 00:17.0: enabled 1
729 14:36:48.847718 PCI: 00:19.0: enabled 1
730 14:36:48.850439 PCI: 00:19.1: enabled 0
731 14:36:48.854141 PCI: 00:19.2: enabled 0
732 14:36:48.857356 PCI: 00:1a.0: enabled 0
733 14:36:48.857853 PCI: 00:1c.0: enabled 0
734 14:36:48.860469 PCI: 00:1c.1: enabled 0
735 14:36:48.863744 PCI: 00:1c.2: enabled 0
736 14:36:48.867077 PCI: 00:1c.3: enabled 0
737 14:36:48.867517 PCI: 00:1c.4: enabled 0
738 14:36:48.870706 PCI: 00:1c.5: enabled 0
739 14:36:48.873384 PCI: 00:1c.6: enabled 0
740 14:36:48.877148 PCI: 00:1c.7: enabled 0
741 14:36:48.877640 PCI: 00:1d.0: enabled 1
742 14:36:48.880368 PCI: 00:1d.1: enabled 0
743 14:36:48.883316 PCI: 00:1d.2: enabled 0
744 14:36:48.883755 PCI: 00:1d.3: enabled 0
745 14:36:48.887050 PCI: 00:1d.4: enabled 0
746 14:36:48.890224 PCI: 00:1d.5: enabled 1
747 14:36:48.893635 PCI: 00:1e.0: enabled 1
748 14:36:48.894079 PCI: 00:1e.1: enabled 0
749 14:36:48.896799 PCI: 00:1e.2: enabled 1
750 14:36:48.900087 PCI: 00:1e.3: enabled 1
751 14:36:48.903267 PCI: 00:1f.0: enabled 1
752 14:36:48.903706 PCI: 00:1f.1: enabled 1
753 14:36:48.906596 PCI: 00:1f.2: enabled 1
754 14:36:48.910302 PCI: 00:1f.3: enabled 1
755 14:36:48.913116 PCI: 00:1f.4: enabled 1
756 14:36:48.913581 PCI: 00:1f.5: enabled 1
757 14:36:48.917124 PCI: 00:1f.6: enabled 0
758 14:36:48.920148 USB0 port 0: enabled 1
759 14:36:48.920591 I2C: 00:15: enabled 1
760 14:36:48.923601 I2C: 00:5d: enabled 1
761 14:36:48.926619 GENERIC: 0.0: enabled 1
762 14:36:48.930254 I2C: 00:1a: enabled 1
763 14:36:48.930692 I2C: 00:38: enabled 1
764 14:36:48.933451 I2C: 00:39: enabled 1
765 14:36:48.936623 I2C: 00:3a: enabled 1
766 14:36:48.937065 I2C: 00:3b: enabled 1
767 14:36:48.940118 PCI: 00:00.0: enabled 1
768 14:36:48.943294 SPI: 00: enabled 1
769 14:36:48.943733 SPI: 01: enabled 1
770 14:36:48.946190 PNP: 0c09.0: enabled 1
771 14:36:48.950229 USB2 port 0: enabled 1
772 14:36:48.950698 USB2 port 1: enabled 1
773 14:36:48.953039 USB2 port 2: enabled 0
774 14:36:48.956327 USB2 port 3: enabled 0
775 14:36:48.956915 USB2 port 5: enabled 0
776 14:36:48.959761 USB2 port 6: enabled 1
777 14:36:48.963101 USB2 port 9: enabled 1
778 14:36:48.963549 USB3 port 0: enabled 1
779 14:36:48.966106 USB3 port 1: enabled 1
780 14:36:48.969065 USB3 port 2: enabled 1
781 14:36:48.972931 USB3 port 3: enabled 1
782 14:36:48.973026 USB3 port 4: enabled 0
783 14:36:48.976028 APIC: 03: enabled 1
784 14:36:48.979171 APIC: 04: enabled 1
785 14:36:48.979265 APIC: 02: enabled 1
786 14:36:48.982395 APIC: 05: enabled 1
787 14:36:48.982490 APIC: 01: enabled 1
788 14:36:48.985596 APIC: 07: enabled 1
789 14:36:48.989182 APIC: 06: enabled 1
790 14:36:48.989277 Compare with tree...
791 14:36:48.992447 Root Device: enabled 1
792 14:36:48.996191 CPU_CLUSTER: 0: enabled 1
793 14:36:48.996286 APIC: 00: enabled 1
794 14:36:48.999368 APIC: 03: enabled 1
795 14:36:49.002485 APIC: 04: enabled 1
796 14:36:49.005529 APIC: 02: enabled 1
797 14:36:49.005632 APIC: 05: enabled 1
798 14:36:49.008921 APIC: 01: enabled 1
799 14:36:49.012761 APIC: 07: enabled 1
800 14:36:49.012856 APIC: 06: enabled 1
801 14:36:49.015721 DOMAIN: 0000: enabled 1
802 14:36:49.018797 PCI: 00:00.0: enabled 1
803 14:36:49.022387 PCI: 00:02.0: enabled 1
804 14:36:49.022482 PCI: 00:04.0: enabled 0
805 14:36:49.025705 PCI: 00:05.0: enabled 0
806 14:36:49.028700 PCI: 00:12.0: enabled 1
807 14:36:49.032578 PCI: 00:12.5: enabled 0
808 14:36:49.035230 PCI: 00:12.6: enabled 0
809 14:36:49.035330 PCI: 00:14.0: enabled 1
810 14:36:49.038508 USB0 port 0: enabled 1
811 14:36:49.041841 USB2 port 0: enabled 1
812 14:36:49.045705 USB2 port 1: enabled 1
813 14:36:49.048662 USB2 port 2: enabled 0
814 14:36:49.048763 USB2 port 3: enabled 0
815 14:36:49.051721 USB2 port 5: enabled 0
816 14:36:49.055253 USB2 port 6: enabled 1
817 14:36:49.059022 USB2 port 9: enabled 1
818 14:36:49.061887 USB3 port 0: enabled 1
819 14:36:49.065500 USB3 port 1: enabled 1
820 14:36:49.065628 USB3 port 2: enabled 1
821 14:36:49.068467 USB3 port 3: enabled 1
822 14:36:49.072173 USB3 port 4: enabled 0
823 14:36:49.075192 PCI: 00:14.1: enabled 0
824 14:36:49.078350 PCI: 00:14.3: enabled 1
825 14:36:49.078461 PCI: 00:14.5: enabled 0
826 14:36:49.081483 PCI: 00:15.0: enabled 1
827 14:36:49.085202 I2C: 00:15: enabled 1
828 14:36:49.088586 PCI: 00:15.1: enabled 1
829 14:36:49.091456 I2C: 00:5d: enabled 1
830 14:36:49.091609 GENERIC: 0.0: enabled 1
831 14:36:49.094862 PCI: 00:15.2: enabled 0
832 14:36:49.098223 PCI: 00:15.3: enabled 0
833 14:36:49.101959 PCI: 00:16.0: enabled 1
834 14:36:49.105033 PCI: 00:16.1: enabled 0
835 14:36:49.105233 PCI: 00:16.2: enabled 0
836 14:36:49.108192 PCI: 00:16.3: enabled 0
837 14:36:49.111531 PCI: 00:16.4: enabled 0
838 14:36:49.114891 PCI: 00:16.5: enabled 0
839 14:36:49.115194 PCI: 00:17.0: enabled 1
840 14:36:49.118543 PCI: 00:19.0: enabled 1
841 14:36:49.121817 I2C: 00:1a: enabled 1
842 14:36:49.124782 I2C: 00:38: enabled 1
843 14:36:49.128090 I2C: 00:39: enabled 1
844 14:36:49.128544 I2C: 00:3a: enabled 1
845 14:36:49.131772 I2C: 00:3b: enabled 1
846 14:36:49.134987 PCI: 00:19.1: enabled 0
847 14:36:49.138449 PCI: 00:19.2: enabled 0
848 14:36:49.138545 PCI: 00:1a.0: enabled 0
849 14:36:49.141495 PCI: 00:1c.0: enabled 0
850 14:36:49.144460 PCI: 00:1c.1: enabled 0
851 14:36:49.147834 PCI: 00:1c.2: enabled 0
852 14:36:49.151535 PCI: 00:1c.3: enabled 0
853 14:36:49.151680 PCI: 00:1c.4: enabled 0
854 14:36:49.154684 PCI: 00:1c.5: enabled 0
855 14:36:49.158566 PCI: 00:1c.6: enabled 0
856 14:36:49.161465 PCI: 00:1c.7: enabled 0
857 14:36:49.165088 PCI: 00:1d.0: enabled 1
858 14:36:49.165527 PCI: 00:1d.1: enabled 0
859 14:36:49.168243 PCI: 00:1d.2: enabled 0
860 14:36:49.171219 PCI: 00:1d.3: enabled 0
861 14:36:49.174815 PCI: 00:1d.4: enabled 0
862 14:36:49.178224 PCI: 00:1d.5: enabled 1
863 14:36:49.178660 PCI: 00:00.0: enabled 1
864 14:36:49.181544 PCI: 00:1e.0: enabled 1
865 14:36:49.184496 PCI: 00:1e.1: enabled 0
866 14:36:49.188210 PCI: 00:1e.2: enabled 1
867 14:36:49.188648 SPI: 00: enabled 1
868 14:36:49.191332 PCI: 00:1e.3: enabled 1
869 14:36:49.194542 SPI: 01: enabled 1
870 14:36:49.198054 PCI: 00:1f.0: enabled 1
871 14:36:49.198492 PNP: 0c09.0: enabled 1
872 14:36:49.201272 PCI: 00:1f.1: enabled 1
873 14:36:49.204478 PCI: 00:1f.2: enabled 1
874 14:36:49.208090 PCI: 00:1f.3: enabled 1
875 14:36:49.211018 PCI: 00:1f.4: enabled 1
876 14:36:49.211456 PCI: 00:1f.5: enabled 1
877 14:36:49.214910 PCI: 00:1f.6: enabled 0
878 14:36:49.218142 Root Device scanning...
879 14:36:49.221309 scan_static_bus for Root Device
880 14:36:49.224913 CPU_CLUSTER: 0 enabled
881 14:36:49.225351 DOMAIN: 0000 enabled
882 14:36:49.227868 DOMAIN: 0000 scanning...
883 14:36:49.230868 PCI: pci_scan_bus for bus 00
884 14:36:49.234716 PCI: 00:00.0 [8086/0000] ops
885 14:36:49.237768 PCI: 00:00.0 [8086/9b61] enabled
886 14:36:49.241046 PCI: 00:02.0 [8086/0000] bus ops
887 14:36:49.244243 PCI: 00:02.0 [8086/9b41] enabled
888 14:36:49.247948 PCI: 00:04.0 [8086/1903] disabled
889 14:36:49.251077 PCI: 00:08.0 [8086/1911] enabled
890 14:36:49.254272 PCI: 00:12.0 [8086/02f9] enabled
891 14:36:49.258072 PCI: 00:14.0 [8086/0000] bus ops
892 14:36:49.261093 PCI: 00:14.0 [8086/02ed] enabled
893 14:36:49.264064 PCI: 00:14.2 [8086/02ef] enabled
894 14:36:49.267756 PCI: 00:14.3 [8086/02f0] enabled
895 14:36:49.271157 PCI: 00:15.0 [8086/0000] bus ops
896 14:36:49.274284 PCI: 00:15.0 [8086/02e8] enabled
897 14:36:49.277387 PCI: 00:15.1 [8086/0000] bus ops
898 14:36:49.281143 PCI: 00:15.1 [8086/02e9] enabled
899 14:36:49.284189 PCI: 00:16.0 [8086/0000] ops
900 14:36:49.287522 PCI: 00:16.0 [8086/02e0] enabled
901 14:36:49.290508 PCI: 00:17.0 [8086/0000] ops
902 14:36:49.293635 PCI: 00:17.0 [8086/02d3] enabled
903 14:36:49.297445 PCI: 00:19.0 [8086/0000] bus ops
904 14:36:49.300475 PCI: 00:19.0 [8086/02c5] enabled
905 14:36:49.304329 PCI: 00:1d.0 [8086/0000] bus ops
906 14:36:49.306859 PCI: 00:1d.0 [8086/02b0] enabled
907 14:36:49.314103 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 14:36:49.314198 PCI: 00:1e.0 [8086/0000] ops
909 14:36:49.317431 PCI: 00:1e.0 [8086/02a8] enabled
910 14:36:49.320569 PCI: 00:1e.2 [8086/0000] bus ops
911 14:36:49.323789 PCI: 00:1e.2 [8086/02aa] enabled
912 14:36:49.326962 PCI: 00:1e.3 [8086/0000] bus ops
913 14:36:49.330124 PCI: 00:1e.3 [8086/02ab] enabled
914 14:36:49.333802 PCI: 00:1f.0 [8086/0000] bus ops
915 14:36:49.337043 PCI: 00:1f.0 [8086/0284] enabled
916 14:36:49.344012 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 14:36:49.350201 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 14:36:49.353892 PCI: 00:1f.3 [8086/0000] bus ops
919 14:36:49.357090 PCI: 00:1f.3 [8086/02c8] enabled
920 14:36:49.360141 PCI: 00:1f.4 [8086/0000] bus ops
921 14:36:49.364326 PCI: 00:1f.4 [8086/02a3] enabled
922 14:36:49.367251 PCI: 00:1f.5 [8086/0000] bus ops
923 14:36:49.370193 PCI: 00:1f.5 [8086/02a4] enabled
924 14:36:49.374009 PCI: Leftover static devices:
925 14:36:49.374551 PCI: 00:05.0
926 14:36:49.377662 PCI: 00:12.5
927 14:36:49.378189 PCI: 00:12.6
928 14:36:49.378536 PCI: 00:14.1
929 14:36:49.380492 PCI: 00:14.5
930 14:36:49.381013 PCI: 00:15.2
931 14:36:49.383619 PCI: 00:15.3
932 14:36:49.384158 PCI: 00:16.1
933 14:36:49.387273 PCI: 00:16.2
934 14:36:49.387803 PCI: 00:16.3
935 14:36:49.388153 PCI: 00:16.4
936 14:36:49.389993 PCI: 00:16.5
937 14:36:49.390504 PCI: 00:19.1
938 14:36:49.393340 PCI: 00:19.2
939 14:36:49.393795 PCI: 00:1a.0
940 14:36:49.394345 PCI: 00:1c.0
941 14:36:49.396852 PCI: 00:1c.1
942 14:36:49.397277 PCI: 00:1c.2
943 14:36:49.400538 PCI: 00:1c.3
944 14:36:49.400963 PCI: 00:1c.4
945 14:36:49.401302 PCI: 00:1c.5
946 14:36:49.403746 PCI: 00:1c.6
947 14:36:49.404172 PCI: 00:1c.7
948 14:36:49.407038 PCI: 00:1d.1
949 14:36:49.407465 PCI: 00:1d.2
950 14:36:49.409988 PCI: 00:1d.3
951 14:36:49.410418 PCI: 00:1d.4
952 14:36:49.410756 PCI: 00:1d.5
953 14:36:49.413077 PCI: 00:1e.1
954 14:36:49.413502 PCI: 00:1f.1
955 14:36:49.417043 PCI: 00:1f.2
956 14:36:49.417468 PCI: 00:1f.6
957 14:36:49.420356 PCI: Check your devicetree.cb.
958 14:36:49.423814 PCI: 00:02.0 scanning...
959 14:36:49.426613 scan_generic_bus for PCI: 00:02.0
960 14:36:49.429762 scan_generic_bus for PCI: 00:02.0 done
961 14:36:49.436748 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
962 14:36:49.437448 PCI: 00:14.0 scanning...
963 14:36:49.440803 scan_static_bus for PCI: 00:14.0
964 14:36:49.443522 USB0 port 0 enabled
965 14:36:49.446465 USB0 port 0 scanning...
966 14:36:49.450035 scan_static_bus for USB0 port 0
967 14:36:49.453524 USB2 port 0 enabled
968 14:36:49.454008 USB2 port 1 enabled
969 14:36:49.456668 USB2 port 2 disabled
970 14:36:49.457103 USB2 port 3 disabled
971 14:36:49.459713 USB2 port 5 disabled
972 14:36:49.463643 USB2 port 6 enabled
973 14:36:49.464080 USB2 port 9 enabled
974 14:36:49.466982 USB3 port 0 enabled
975 14:36:49.470034 USB3 port 1 enabled
976 14:36:49.470472 USB3 port 2 enabled
977 14:36:49.473134 USB3 port 3 enabled
978 14:36:49.473569 USB3 port 4 disabled
979 14:36:49.476267 USB2 port 0 scanning...
980 14:36:49.479860 scan_static_bus for USB2 port 0
981 14:36:49.483448 scan_static_bus for USB2 port 0 done
982 14:36:49.489731 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
983 14:36:49.493385 USB2 port 1 scanning...
984 14:36:49.496763 scan_static_bus for USB2 port 1
985 14:36:49.499660 scan_static_bus for USB2 port 1 done
986 14:36:49.503669 scan_bus: scanning of bus USB2 port 1 took 9696 usecs
987 14:36:49.506490 USB2 port 6 scanning...
988 14:36:49.509508 scan_static_bus for USB2 port 6
989 14:36:49.513513 scan_static_bus for USB2 port 6 done
990 14:36:49.519584 scan_bus: scanning of bus USB2 port 6 took 9701 usecs
991 14:36:49.523010 USB2 port 9 scanning...
992 14:36:49.526171 scan_static_bus for USB2 port 9
993 14:36:49.529548 scan_static_bus for USB2 port 9 done
994 14:36:49.536314 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
995 14:36:49.536836 USB3 port 0 scanning...
996 14:36:49.539487 scan_static_bus for USB3 port 0
997 14:36:49.543232 scan_static_bus for USB3 port 0 done
998 14:36:49.549739 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
999 14:36:49.552697 USB3 port 1 scanning...
1000 14:36:49.556752 scan_static_bus for USB3 port 1
1001 14:36:49.559938 scan_static_bus for USB3 port 1 done
1002 14:36:49.565813 scan_bus: scanning of bus USB3 port 1 took 9704 usecs
1003 14:36:49.566256 USB3 port 2 scanning...
1004 14:36:49.569205 scan_static_bus for USB3 port 2
1005 14:36:49.572974 scan_static_bus for USB3 port 2 done
1006 14:36:49.579255 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
1007 14:36:49.582147 USB3 port 3 scanning...
1008 14:36:49.585888 scan_static_bus for USB3 port 3
1009 14:36:49.588850 scan_static_bus for USB3 port 3 done
1010 14:36:49.595923 scan_bus: scanning of bus USB3 port 3 took 9695 usecs
1011 14:36:49.599012 scan_static_bus for USB0 port 0 done
1012 14:36:49.602457 scan_bus: scanning of bus USB0 port 0 took 155302 usecs
1013 14:36:49.609025 scan_static_bus for PCI: 00:14.0 done
1014 14:36:49.612700 scan_bus: scanning of bus PCI: 00:14.0 took 172913 usecs
1015 14:36:49.615530 PCI: 00:15.0 scanning...
1016 14:36:49.618768 scan_generic_bus for PCI: 00:15.0
1017 14:36:49.622043 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 14:36:49.628414 scan_generic_bus for PCI: 00:15.0 done
1019 14:36:49.632017 scan_bus: scanning of bus PCI: 00:15.0 took 14301 usecs
1020 14:36:49.635673 PCI: 00:15.1 scanning...
1021 14:36:49.638685 scan_generic_bus for PCI: 00:15.1
1022 14:36:49.641934 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 14:36:49.648766 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 14:36:49.651914 scan_generic_bus for PCI: 00:15.1 done
1025 14:36:49.658464 scan_bus: scanning of bus PCI: 00:15.1 took 18600 usecs
1026 14:36:49.658894 PCI: 00:19.0 scanning...
1027 14:36:49.662262 scan_generic_bus for PCI: 00:19.0
1028 14:36:49.668474 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 14:36:49.672207 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 14:36:49.675415 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 14:36:49.678571 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 14:36:49.684833 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 14:36:49.688706 scan_generic_bus for PCI: 00:19.0 done
1034 14:36:49.691596 scan_bus: scanning of bus PCI: 00:19.0 took 30709 usecs
1035 14:36:49.695086 PCI: 00:1d.0 scanning...
1036 14:36:49.698289 do_pci_scan_bridge for PCI: 00:1d.0
1037 14:36:49.701696 PCI: pci_scan_bus for bus 01
1038 14:36:49.705330 PCI: 01:00.0 [1c5c/1327] enabled
1039 14:36:49.708510 Enabling Common Clock Configuration
1040 14:36:49.715080 L1 Sub-State supported from root port 29
1041 14:36:49.718112 L1 Sub-State Support = 0xf
1042 14:36:49.718534 CommonModeRestoreTime = 0x28
1043 14:36:49.725069 Power On Value = 0x16, Power On Scale = 0x0
1044 14:36:49.725493 ASPM: Enabled L1
1045 14:36:49.731426 scan_bus: scanning of bus PCI: 00:1d.0 took 32772 usecs
1046 14:36:49.734613 PCI: 00:1e.2 scanning...
1047 14:36:49.738065 scan_generic_bus for PCI: 00:1e.2
1048 14:36:49.741450 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 14:36:49.744387 scan_generic_bus for PCI: 00:1e.2 done
1050 14:36:49.751434 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1051 14:36:49.754427 PCI: 00:1e.3 scanning...
1052 14:36:49.757833 scan_generic_bus for PCI: 00:1e.3
1053 14:36:49.761649 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 14:36:49.764678 scan_generic_bus for PCI: 00:1e.3 done
1055 14:36:49.771016 scan_bus: scanning of bus PCI: 00:1e.3 took 13998 usecs
1056 14:36:49.771444 PCI: 00:1f.0 scanning...
1057 14:36:49.774531 scan_static_bus for PCI: 00:1f.0
1058 14:36:49.778602 PNP: 0c09.0 enabled
1059 14:36:49.781538 scan_static_bus for PCI: 00:1f.0 done
1060 14:36:49.787871 scan_bus: scanning of bus PCI: 00:1f.0 took 12091 usecs
1061 14:36:49.791135 PCI: 00:1f.3 scanning...
1062 14:36:49.794414 scan_bus: scanning of bus PCI: 00:1f.3 took 2850 usecs
1063 14:36:49.798128 PCI: 00:1f.4 scanning...
1064 14:36:49.801319 scan_generic_bus for PCI: 00:1f.4
1065 14:36:49.804954 scan_generic_bus for PCI: 00:1f.4 done
1066 14:36:49.811018 scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs
1067 14:36:49.814565 PCI: 00:1f.5 scanning...
1068 14:36:49.817828 scan_generic_bus for PCI: 00:1f.5
1069 14:36:49.821363 scan_generic_bus for PCI: 00:1f.5 done
1070 14:36:49.827645 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1071 14:36:49.834829 scan_bus: scanning of bus DOMAIN: 0000 took 604853 usecs
1072 14:36:49.837813 scan_static_bus for Root Device done
1073 14:36:49.841012 scan_bus: scanning of bus Root Device took 624720 usecs
1074 14:36:49.845061 done
1075 14:36:49.847793 Chrome EC: UHEPI supported
1076 14:36:49.850663 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 14:36:49.857612 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 14:36:49.864142 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 14:36:49.871007 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 14:36:49.874514 SPI flash protection: WPSW=0 SRP0=0
1081 14:36:49.881223 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 14:36:49.884233 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1083 14:36:49.887391 found VGA at PCI: 00:02.0
1084 14:36:49.890465 Setting up VGA for PCI: 00:02.0
1085 14:36:49.897005 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 14:36:49.900350 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 14:36:49.903578 Allocating resources...
1088 14:36:49.907142 Reading resources...
1089 14:36:49.910698 Root Device read_resources bus 0 link: 0
1090 14:36:49.913688 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 14:36:49.920301 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 14:36:49.923713 DOMAIN: 0000 read_resources bus 0 link: 0
1093 14:36:49.930891 PCI: 00:14.0 read_resources bus 0 link: 0
1094 14:36:49.933896 USB0 port 0 read_resources bus 0 link: 0
1095 14:36:49.942237 USB0 port 0 read_resources bus 0 link: 0 done
1096 14:36:49.945225 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 14:36:49.952747 PCI: 00:15.0 read_resources bus 1 link: 0
1098 14:36:49.956056 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 14:36:49.963031 PCI: 00:15.1 read_resources bus 2 link: 0
1100 14:36:49.966318 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 14:36:49.973458 PCI: 00:19.0 read_resources bus 3 link: 0
1102 14:36:49.980052 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 14:36:49.983659 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 14:36:49.990026 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 14:36:49.993207 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 14:36:50.000239 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 14:36:50.003418 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 14:36:50.010141 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 14:36:50.013238 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 14:36:50.020128 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 14:36:50.026796 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 14:36:50.029910 Root Device read_resources bus 0 link: 0 done
1113 14:36:50.033488 Done reading resources.
1114 14:36:50.036560 Show resources in subtree (Root Device)...After reading.
1115 14:36:50.043192 Root Device child on link 0 CPU_CLUSTER: 0
1116 14:36:50.046360 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 14:36:50.046791 APIC: 00
1118 14:36:50.050297 APIC: 03
1119 14:36:50.050726 APIC: 04
1120 14:36:50.053123 APIC: 02
1121 14:36:50.053551 APIC: 05
1122 14:36:50.053943 APIC: 01
1123 14:36:50.056321 APIC: 07
1124 14:36:50.056813 APIC: 06
1125 14:36:50.059949 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 14:36:50.069453 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 14:36:50.123054 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 14:36:50.123527 PCI: 00:00.0
1129 14:36:50.123875 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 14:36:50.124529 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 14:36:50.124881 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 14:36:50.125205 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 14:36:50.172540 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 14:36:50.173304 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 14:36:50.173734 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 14:36:50.174131 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 14:36:50.174505 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 14:36:50.222298 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 14:36:50.222749 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 14:36:50.223415 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 14:36:50.223781 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 14:36:50.224117 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 14:36:50.224428 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 14:36:50.249247 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 14:36:50.249343 PCI: 00:02.0
1146 14:36:50.249610 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 14:36:50.252937 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 14:36:50.262991 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 14:36:50.263094 PCI: 00:04.0
1150 14:36:50.266771 PCI: 00:08.0
1151 14:36:50.276141 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 14:36:50.276352 PCI: 00:12.0
1153 14:36:50.286338 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 14:36:50.292476 PCI: 00:14.0 child on link 0 USB0 port 0
1155 14:36:50.302681 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 14:36:50.306307 USB0 port 0 child on link 0 USB2 port 0
1157 14:36:50.306818 USB2 port 0
1158 14:36:50.309298 USB2 port 1
1159 14:36:50.309699 USB2 port 2
1160 14:36:50.313011 USB2 port 3
1161 14:36:50.316403 USB2 port 5
1162 14:36:50.317000 USB2 port 6
1163 14:36:50.319253 USB2 port 9
1164 14:36:50.319764 USB3 port 0
1165 14:36:50.322772 USB3 port 1
1166 14:36:50.323207 USB3 port 2
1167 14:36:50.326502 USB3 port 3
1168 14:36:50.326945 USB3 port 4
1169 14:36:50.329659 PCI: 00:14.2
1170 14:36:50.339360 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 14:36:50.349095 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 14:36:50.349660 PCI: 00:14.3
1173 14:36:50.359509 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 14:36:50.366268 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 14:36:50.375968 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 14:36:50.376498 I2C: 01:15
1177 14:36:50.379688 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 14:36:50.388990 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 14:36:50.392855 I2C: 02:5d
1180 14:36:50.393284 GENERIC: 0.0
1181 14:36:50.395833 PCI: 00:16.0
1182 14:36:50.405906 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 14:36:50.406378 PCI: 00:17.0
1184 14:36:50.415295 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 14:36:50.425266 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 14:36:50.432347 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 14:36:50.442545 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 14:36:50.448852 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 14:36:50.458890 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 14:36:50.461747 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 14:36:50.471944 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 14:36:50.475318 I2C: 03:1a
1193 14:36:50.475836 I2C: 03:38
1194 14:36:50.478496 I2C: 03:39
1195 14:36:50.479024 I2C: 03:3a
1196 14:36:50.482471 I2C: 03:3b
1197 14:36:50.485123 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 14:36:50.494765 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 14:36:50.504897 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 14:36:50.511435 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 14:36:50.514496 PCI: 01:00.0
1202 14:36:50.524694 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 14:36:50.525182 PCI: 00:1e.0
1204 14:36:50.538016 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 14:36:50.548283 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 14:36:50.551740 PCI: 00:1e.2 child on link 0 SPI: 00
1207 14:36:50.561169 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 14:36:50.561740 SPI: 00
1209 14:36:50.568247 PCI: 00:1e.3 child on link 0 SPI: 01
1210 14:36:50.577430 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 14:36:50.578017 SPI: 01
1212 14:36:50.581005 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 14:36:50.591152 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 14:36:50.600584 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 14:36:50.601103 PNP: 0c09.0
1216 14:36:50.611130 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 14:36:50.611659 PCI: 00:1f.3
1218 14:36:50.620753 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 14:36:50.630641 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 14:36:50.634147 PCI: 00:1f.4
1221 14:36:50.640709 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 14:36:50.650449 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 14:36:50.653960 PCI: 00:1f.5
1224 14:36:50.663842 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 14:36:50.670533 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 14:36:50.676879 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 14:36:50.683399 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 14:36:50.686463 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 14:36:50.689919 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 14:36:50.693550 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 14:36:50.696377 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 14:36:50.703511 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 14:36:50.709767 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 14:36:50.716779 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 14:36:50.726504 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 14:36:50.733038 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 14:36:50.736007 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 14:36:50.746594 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 14:36:50.749533 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 14:36:50.752915 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 14:36:50.759188 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 14:36:50.762460 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 14:36:50.769411 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 14:36:50.772427 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 14:36:50.779328 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 14:36:50.782670 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 14:36:50.789038 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 14:36:50.792612 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 14:36:50.799460 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 14:36:50.802239 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 14:36:50.809343 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 14:36:50.812304 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 14:36:50.818919 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 14:36:50.822018 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 14:36:50.825361 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 14:36:50.832574 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 14:36:50.835571 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 14:36:50.842094 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 14:36:50.845746 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 14:36:50.852030 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 14:36:50.854982 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 14:36:50.865360 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 14:36:50.868581 avoid_fixed_resources: DOMAIN: 0000
1264 14:36:50.875382 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 14:36:50.881213 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 14:36:50.888093 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 14:36:50.894515 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 14:36:50.904249 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 14:36:50.911342 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 14:36:50.917582 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 14:36:50.924111 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 14:36:50.934008 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 14:36:50.940718 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 14:36:50.947750 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 14:36:50.954121 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 14:36:50.957211 Setting resources...
1277 14:36:50.964155 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 14:36:50.967179 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 14:36:50.971119 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 14:36:50.977115 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 14:36:50.980763 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 14:36:50.986957 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 14:36:50.993519 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 14:36:51.000471 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 14:36:51.006836 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 14:36:51.010490 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 14:36:51.017216 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 14:36:51.020272 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 14:36:51.026982 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 14:36:51.030284 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 14:36:51.036614 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 14:36:51.040175 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 14:36:51.046913 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 14:36:51.050023 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 14:36:51.056500 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 14:36:51.059780 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 14:36:51.066795 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 14:36:51.069861 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 14:36:51.073501 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 14:36:51.080106 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 14:36:51.083101 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 14:36:51.090163 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 14:36:51.093230 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 14:36:51.099555 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 14:36:51.102855 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 14:36:51.109274 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 14:36:51.112872 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 14:36:51.119570 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 14:36:51.125827 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 14:36:51.132372 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 14:36:51.139596 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 14:36:51.148879 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 14:36:51.152532 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 14:36:51.159182 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 14:36:51.166047 Root Device assign_resources, bus 0 link: 0
1316 14:36:51.169219 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 14:36:51.179183 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 14:36:51.185854 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 14:36:51.195297 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 14:36:51.201775 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 14:36:51.212124 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 14:36:51.218589 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 14:36:51.224877 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 14:36:51.228668 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 14:36:51.234986 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 14:36:51.244786 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 14:36:51.251714 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 14:36:51.261428 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 14:36:51.264952 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 14:36:51.271205 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 14:36:51.278197 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 14:36:51.284493 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 14:36:51.288205 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 14:36:51.297651 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 14:36:51.304503 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 14:36:51.310818 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 14:36:51.320872 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 14:36:51.327775 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 14:36:51.333906 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 14:36:51.344156 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 14:36:51.350337 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 14:36:51.357295 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 14:36:51.360108 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 14:36:51.370462 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 14:36:51.376636 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 14:36:51.386614 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 14:36:51.390250 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 14:36:51.399923 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 14:36:51.402890 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 14:36:51.413087 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 14:36:51.419461 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 14:36:51.425871 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 14:36:51.429519 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 14:36:51.439545 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 14:36:51.442681 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 14:36:51.446004 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 14:36:51.452313 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 14:36:51.456043 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 14:36:51.462203 LPC: Trying to open IO window from 800 size 1ff
1360 14:36:51.468973 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 14:36:51.478661 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 14:36:51.485537 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 14:36:51.495722 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 14:36:51.498688 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 14:36:51.505556 Root Device assign_resources, bus 0 link: 0
1366 14:36:51.505667 Done setting resources.
1367 14:36:51.511765 Show resources in subtree (Root Device)...After assigning values.
1368 14:36:51.518410 Root Device child on link 0 CPU_CLUSTER: 0
1369 14:36:51.521940 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 14:36:51.522051 APIC: 00
1371 14:36:51.525194 APIC: 03
1372 14:36:51.525302 APIC: 04
1373 14:36:51.525410 APIC: 02
1374 14:36:51.528794 APIC: 05
1375 14:36:51.528901 APIC: 01
1376 14:36:51.532022 APIC: 07
1377 14:36:51.532134 APIC: 06
1378 14:36:51.534940 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 14:36:51.545122 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 14:36:51.558407 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 14:36:51.558522 PCI: 00:00.0
1382 14:36:51.568738 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 14:36:51.578428 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 14:36:51.588459 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 14:36:51.594872 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 14:36:51.604727 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 14:36:51.615088 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 14:36:51.624372 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 14:36:51.634640 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 14:36:51.644225 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 14:36:51.651355 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 14:36:51.661057 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 14:36:51.670943 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 14:36:51.680554 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 14:36:51.690492 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 14:36:51.700571 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 14:36:51.707305 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 14:36:51.710405 PCI: 00:02.0
1399 14:36:51.720610 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 14:36:51.730374 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 14:36:51.740280 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 14:36:51.743500 PCI: 00:04.0
1403 14:36:51.743923 PCI: 00:08.0
1404 14:36:51.753557 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 14:36:51.756709 PCI: 00:12.0
1406 14:36:51.766407 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 14:36:51.770354 PCI: 00:14.0 child on link 0 USB0 port 0
1408 14:36:51.779961 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 14:36:51.786423 USB0 port 0 child on link 0 USB2 port 0
1410 14:36:51.786860 USB2 port 0
1411 14:36:51.790034 USB2 port 1
1412 14:36:51.790459 USB2 port 2
1413 14:36:51.792971 USB2 port 3
1414 14:36:51.793394 USB2 port 5
1415 14:36:51.796468 USB2 port 6
1416 14:36:51.796890 USB2 port 9
1417 14:36:51.799930 USB3 port 0
1418 14:36:51.803014 USB3 port 1
1419 14:36:51.803440 USB3 port 2
1420 14:36:51.806133 USB3 port 3
1421 14:36:51.806628 USB3 port 4
1422 14:36:51.809771 PCI: 00:14.2
1423 14:36:51.819915 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 14:36:51.829648 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 14:36:51.830079 PCI: 00:14.3
1426 14:36:51.839401 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 14:36:51.846195 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 14:36:51.855966 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 14:36:51.856393 I2C: 01:15
1430 14:36:51.862325 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 14:36:51.872464 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 14:36:51.873030 I2C: 02:5d
1433 14:36:51.876167 GENERIC: 0.0
1434 14:36:51.876594 PCI: 00:16.0
1435 14:36:51.886119 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 14:36:51.888961 PCI: 00:17.0
1437 14:36:51.899052 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 14:36:51.908796 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 14:36:51.918620 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 14:36:51.928275 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 14:36:51.935091 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 14:36:51.945223 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 14:36:51.951883 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 14:36:51.961713 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 14:36:51.962144 I2C: 03:1a
1446 14:36:51.964910 I2C: 03:38
1447 14:36:51.965337 I2C: 03:39
1448 14:36:51.968072 I2C: 03:3a
1449 14:36:51.968495 I2C: 03:3b
1450 14:36:51.974869 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 14:36:51.981359 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 14:36:51.990926 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 14:36:52.004172 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 14:36:52.004283 PCI: 01:00.0
1455 14:36:52.014033 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 14:36:52.017448 PCI: 00:1e.0
1457 14:36:52.026967 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 14:36:52.037497 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 14:36:52.040808 PCI: 00:1e.2 child on link 0 SPI: 00
1460 14:36:52.053573 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 14:36:52.053676 SPI: 00
1462 14:36:52.056923 PCI: 00:1e.3 child on link 0 SPI: 01
1463 14:36:52.066588 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 14:36:52.070417 SPI: 01
1465 14:36:52.073823 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 14:36:52.083487 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 14:36:52.089898 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 14:36:52.093153 PNP: 0c09.0
1469 14:36:52.100320 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 14:36:52.103331 PCI: 00:1f.3
1471 14:36:52.113155 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 14:36:52.123131 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 14:36:52.126164 PCI: 00:1f.4
1474 14:36:52.136340 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 14:36:52.146087 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 14:36:52.146205 PCI: 00:1f.5
1477 14:36:52.155783 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 14:36:52.159290 Done allocating resources.
1479 14:36:52.165515 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 14:36:52.169134 Enabling resources...
1481 14:36:52.172258 PCI: 00:00.0 subsystem <- 8086/9b61
1482 14:36:52.176262 PCI: 00:00.0 cmd <- 06
1483 14:36:52.179347 PCI: 00:02.0 subsystem <- 8086/9b41
1484 14:36:52.182298 PCI: 00:02.0 cmd <- 03
1485 14:36:52.182390 PCI: 00:08.0 cmd <- 06
1486 14:36:52.189125 PCI: 00:12.0 subsystem <- 8086/02f9
1487 14:36:52.189247 PCI: 00:12.0 cmd <- 02
1488 14:36:52.192310 PCI: 00:14.0 subsystem <- 8086/02ed
1489 14:36:52.195352 PCI: 00:14.0 cmd <- 02
1490 14:36:52.198631 PCI: 00:14.2 cmd <- 02
1491 14:36:52.202627 PCI: 00:14.3 subsystem <- 8086/02f0
1492 14:36:52.205448 PCI: 00:14.3 cmd <- 02
1493 14:36:52.208612 PCI: 00:15.0 subsystem <- 8086/02e8
1494 14:36:52.211833 PCI: 00:15.0 cmd <- 02
1495 14:36:52.215478 PCI: 00:15.1 subsystem <- 8086/02e9
1496 14:36:52.218660 PCI: 00:15.1 cmd <- 02
1497 14:36:52.221529 PCI: 00:16.0 subsystem <- 8086/02e0
1498 14:36:52.225212 PCI: 00:16.0 cmd <- 02
1499 14:36:52.228208 PCI: 00:17.0 subsystem <- 8086/02d3
1500 14:36:52.228301 PCI: 00:17.0 cmd <- 03
1501 14:36:52.235398 PCI: 00:19.0 subsystem <- 8086/02c5
1502 14:36:52.235489 PCI: 00:19.0 cmd <- 02
1503 14:36:52.238943 PCI: 00:1d.0 bridge ctrl <- 0013
1504 14:36:52.241520 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 14:36:52.245426 PCI: 00:1d.0 cmd <- 06
1506 14:36:52.248288 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 14:36:52.251927 PCI: 00:1e.0 cmd <- 06
1508 14:36:52.255242 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 14:36:52.258389 PCI: 00:1e.2 cmd <- 06
1510 14:36:52.261552 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 14:36:52.264798 PCI: 00:1e.3 cmd <- 02
1512 14:36:52.267941 PCI: 00:1f.0 subsystem <- 8086/0284
1513 14:36:52.271702 PCI: 00:1f.0 cmd <- 407
1514 14:36:52.274622 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 14:36:52.278572 PCI: 00:1f.3 cmd <- 02
1516 14:36:52.281474 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 14:36:52.284857 PCI: 00:1f.4 cmd <- 03
1518 14:36:52.287901 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 14:36:52.291477 PCI: 00:1f.5 cmd <- 406
1520 14:36:52.299107 PCI: 01:00.0 cmd <- 02
1521 14:36:52.303578 done.
1522 14:36:52.312644 ME: Version: 14.0.39.1367
1523 14:36:52.319359 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 8
1524 14:36:52.322386 Initializing devices...
1525 14:36:52.322477 Root Device init ...
1526 14:36:52.329391 Chrome EC: Set SMI mask to 0x0000000000000000
1527 14:36:52.332398 Chrome EC: clear events_b mask to 0x0000000000000000
1528 14:36:52.339188 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 14:36:52.345370 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 14:36:52.351908 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 14:36:52.355646 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 14:36:52.358825 Root Device init finished in 35184 usecs
1533 14:36:52.362648 CPU_CLUSTER: 0 init ...
1534 14:36:52.368997 CPU_CLUSTER: 0 init finished in 2448 usecs
1535 14:36:52.373284 PCI: 00:00.0 init ...
1536 14:36:52.376460 CPU TDP: 15 Watts
1537 14:36:52.379534 CPU PL2 = 64 Watts
1538 14:36:52.382634 PCI: 00:00.0 init finished in 7074 usecs
1539 14:36:52.386572 PCI: 00:02.0 init ...
1540 14:36:52.389441 PCI: 00:02.0 init finished in 2255 usecs
1541 14:36:52.392559 PCI: 00:08.0 init ...
1542 14:36:52.396307 PCI: 00:08.0 init finished in 2254 usecs
1543 14:36:52.399489 PCI: 00:12.0 init ...
1544 14:36:52.402738 PCI: 00:12.0 init finished in 2253 usecs
1545 14:36:52.405898 PCI: 00:14.0 init ...
1546 14:36:52.409099 PCI: 00:14.0 init finished in 2253 usecs
1547 14:36:52.412875 PCI: 00:14.2 init ...
1548 14:36:52.415561 PCI: 00:14.2 init finished in 2252 usecs
1549 14:36:52.419084 PCI: 00:14.3 init ...
1550 14:36:52.422321 PCI: 00:14.3 init finished in 2272 usecs
1551 14:36:52.426145 PCI: 00:15.0 init ...
1552 14:36:52.429062 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 14:36:52.432297 PCI: 00:15.0 init finished in 5979 usecs
1554 14:36:52.435797 PCI: 00:15.1 init ...
1555 14:36:52.439393 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 14:36:52.446151 PCI: 00:15.1 init finished in 5978 usecs
1557 14:36:52.446244 PCI: 00:16.0 init ...
1558 14:36:52.452640 PCI: 00:16.0 init finished in 2254 usecs
1559 14:36:52.455690 PCI: 00:19.0 init ...
1560 14:36:52.459243 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 14:36:52.462349 PCI: 00:19.0 init finished in 5977 usecs
1562 14:36:52.465546 PCI: 00:1d.0 init ...
1563 14:36:52.468594 Initializing PCH PCIe bridge.
1564 14:36:52.472552 PCI: 00:1d.0 init finished in 5287 usecs
1565 14:36:52.475815 PCI: 00:1f.0 init ...
1566 14:36:52.478965 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 14:36:52.485485 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 14:36:52.485694 IOAPIC: ID = 0x02
1569 14:36:52.488836 IOAPIC: Dumping registers
1570 14:36:52.492207 reg 0x0000: 0x02000000
1571 14:36:52.495273 reg 0x0001: 0x00770020
1572 14:36:52.495455 reg 0x0002: 0x00000000
1573 14:36:52.502128 PCI: 00:1f.0 init finished in 23553 usecs
1574 14:36:52.505326 PCI: 00:1f.4 init ...
1575 14:36:52.508942 PCI: 00:1f.4 init finished in 2263 usecs
1576 14:36:52.519526 PCI: 01:00.0 init ...
1577 14:36:52.522608 PCI: 01:00.0 init finished in 2254 usecs
1578 14:36:52.526996 PNP: 0c09.0 init ...
1579 14:36:52.530461 Google Chrome EC uptime: 11.042 seconds
1580 14:36:52.537241 Google Chrome AP resets since EC boot: 0
1581 14:36:52.540375 Google Chrome most recent AP reset causes:
1582 14:36:52.546950 Google Chrome EC reset flags at last EC boot: reset-pin
1583 14:36:52.550306 PNP: 0c09.0 init finished in 20579 usecs
1584 14:36:52.553676 Devices initialized
1585 14:36:52.556643 Show all devs... After init.
1586 14:36:52.557069 Root Device: enabled 1
1587 14:36:52.559872 CPU_CLUSTER: 0: enabled 1
1588 14:36:52.563198 DOMAIN: 0000: enabled 1
1589 14:36:52.563623 APIC: 00: enabled 1
1590 14:36:52.566423 PCI: 00:00.0: enabled 1
1591 14:36:52.570194 PCI: 00:02.0: enabled 1
1592 14:36:52.573248 PCI: 00:04.0: enabled 0
1593 14:36:52.573712 PCI: 00:05.0: enabled 0
1594 14:36:52.576469 PCI: 00:12.0: enabled 1
1595 14:36:52.579668 PCI: 00:12.5: enabled 0
1596 14:36:52.583410 PCI: 00:12.6: enabled 0
1597 14:36:52.583836 PCI: 00:14.0: enabled 1
1598 14:36:52.586663 PCI: 00:14.1: enabled 0
1599 14:36:52.590250 PCI: 00:14.3: enabled 1
1600 14:36:52.590675 PCI: 00:14.5: enabled 0
1601 14:36:52.593279 PCI: 00:15.0: enabled 1
1602 14:36:52.596845 PCI: 00:15.1: enabled 1
1603 14:36:52.599668 PCI: 00:15.2: enabled 0
1604 14:36:52.600095 PCI: 00:15.3: enabled 0
1605 14:36:52.602745 PCI: 00:16.0: enabled 1
1606 14:36:52.606274 PCI: 00:16.1: enabled 0
1607 14:36:52.609696 PCI: 00:16.2: enabled 0
1608 14:36:52.610130 PCI: 00:16.3: enabled 0
1609 14:36:52.613303 PCI: 00:16.4: enabled 0
1610 14:36:52.616424 PCI: 00:16.5: enabled 0
1611 14:36:52.619464 PCI: 00:17.0: enabled 1
1612 14:36:52.619894 PCI: 00:19.0: enabled 1
1613 14:36:52.622730 PCI: 00:19.1: enabled 0
1614 14:36:52.625966 PCI: 00:19.2: enabled 0
1615 14:36:52.629254 PCI: 00:1a.0: enabled 0
1616 14:36:52.629714 PCI: 00:1c.0: enabled 0
1617 14:36:52.632861 PCI: 00:1c.1: enabled 0
1618 14:36:52.635976 PCI: 00:1c.2: enabled 0
1619 14:36:52.636408 PCI: 00:1c.3: enabled 0
1620 14:36:52.639814 PCI: 00:1c.4: enabled 0
1621 14:36:52.643257 PCI: 00:1c.5: enabled 0
1622 14:36:52.646194 PCI: 00:1c.6: enabled 0
1623 14:36:52.646622 PCI: 00:1c.7: enabled 0
1624 14:36:52.649048 PCI: 00:1d.0: enabled 1
1625 14:36:52.652618 PCI: 00:1d.1: enabled 0
1626 14:36:52.656350 PCI: 00:1d.2: enabled 0
1627 14:36:52.656861 PCI: 00:1d.3: enabled 0
1628 14:36:52.659140 PCI: 00:1d.4: enabled 0
1629 14:36:52.662769 PCI: 00:1d.5: enabled 0
1630 14:36:52.666283 PCI: 00:1e.0: enabled 1
1631 14:36:52.666714 PCI: 00:1e.1: enabled 0
1632 14:36:52.669326 PCI: 00:1e.2: enabled 1
1633 14:36:52.672354 PCI: 00:1e.3: enabled 1
1634 14:36:52.672784 PCI: 00:1f.0: enabled 1
1635 14:36:52.675907 PCI: 00:1f.1: enabled 0
1636 14:36:52.679189 PCI: 00:1f.2: enabled 0
1637 14:36:52.682346 PCI: 00:1f.3: enabled 1
1638 14:36:52.682775 PCI: 00:1f.4: enabled 1
1639 14:36:52.686043 PCI: 00:1f.5: enabled 1
1640 14:36:52.689232 PCI: 00:1f.6: enabled 0
1641 14:36:52.692875 USB0 port 0: enabled 1
1642 14:36:52.693472 I2C: 01:15: enabled 1
1643 14:36:52.695813 I2C: 02:5d: enabled 1
1644 14:36:52.698765 GENERIC: 0.0: enabled 1
1645 14:36:52.699198 I2C: 03:1a: enabled 1
1646 14:36:52.702349 I2C: 03:38: enabled 1
1647 14:36:52.705704 I2C: 03:39: enabled 1
1648 14:36:52.706374 I2C: 03:3a: enabled 1
1649 14:36:52.708758 I2C: 03:3b: enabled 1
1650 14:36:52.712293 PCI: 00:00.0: enabled 1
1651 14:36:52.712876 SPI: 00: enabled 1
1652 14:36:52.715446 SPI: 01: enabled 1
1653 14:36:52.719091 PNP: 0c09.0: enabled 1
1654 14:36:52.719702 USB2 port 0: enabled 1
1655 14:36:52.722558 USB2 port 1: enabled 1
1656 14:36:52.725647 USB2 port 2: enabled 0
1657 14:36:52.728998 USB2 port 3: enabled 0
1658 14:36:52.729578 USB2 port 5: enabled 0
1659 14:36:52.732061 USB2 port 6: enabled 1
1660 14:36:52.735212 USB2 port 9: enabled 1
1661 14:36:52.735823 USB3 port 0: enabled 1
1662 14:36:52.738925 USB3 port 1: enabled 1
1663 14:36:52.742234 USB3 port 2: enabled 1
1664 14:36:52.742839 USB3 port 3: enabled 1
1665 14:36:52.745276 USB3 port 4: enabled 0
1666 14:36:52.749040 APIC: 03: enabled 1
1667 14:36:52.749642 APIC: 04: enabled 1
1668 14:36:52.752057 APIC: 02: enabled 1
1669 14:36:52.755011 APIC: 05: enabled 1
1670 14:36:52.755576 APIC: 01: enabled 1
1671 14:36:52.758802 APIC: 07: enabled 1
1672 14:36:52.759396 APIC: 06: enabled 1
1673 14:36:52.761579 PCI: 00:08.0: enabled 1
1674 14:36:52.765191 PCI: 00:14.2: enabled 1
1675 14:36:52.768262 PCI: 01:00.0: enabled 1
1676 14:36:52.771848 Disabling ACPI via APMC:
1677 14:36:52.775489 done.
1678 14:36:52.778508 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 14:36:52.781475 ELOG: NV offset 0xaf0000 size 0x4000
1680 14:36:52.788582 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 14:36:52.795365 ELOG: Event(17) added with size 13 at 2023-04-20 14:36:52 UTC
1682 14:36:52.802069 ELOG: Event(92) added with size 9 at 2023-04-20 14:36:52 UTC
1683 14:36:52.808470 ELOG: Event(93) added with size 9 at 2023-04-20 14:36:52 UTC
1684 14:36:52.815415 ELOG: Event(9A) added with size 9 at 2023-04-20 14:36:52 UTC
1685 14:36:52.821859 ELOG: Event(9E) added with size 10 at 2023-04-20 14:36:52 UTC
1686 14:36:52.828522 ELOG: Event(9F) added with size 14 at 2023-04-20 14:36:52 UTC
1687 14:36:52.832056 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1688 14:36:52.838988 ELOG: Event(A1) added with size 10 at 2023-04-20 14:36:52 UTC
1689 14:36:52.849024 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 14:36:52.855455 ELOG: Event(A0) added with size 9 at 2023-04-20 14:36:52 UTC
1691 14:36:52.858661 elog_add_boot_reason: Logged dev mode boot
1692 14:36:52.862245 Finalize devices...
1693 14:36:52.862673 PCI: 00:17.0 final
1694 14:36:52.865263 Devices finalized
1695 14:36:52.868453 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 14:36:52.874877 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 14:36:52.878382 ME: HFSTS1 : 0x90000245
1698 14:36:52.882050 ME: HFSTS2 : 0x3B850126
1699 14:36:52.888409 ME: HFSTS3 : 0x00000020
1700 14:36:52.891576 ME: HFSTS4 : 0x00004800
1701 14:36:52.894841 ME: HFSTS5 : 0x00000000
1702 14:36:52.898018 ME: HFSTS6 : 0x40400006
1703 14:36:52.901751 ME: Manufacturing Mode : NO
1704 14:36:52.904917 ME: FW Partition Table : OK
1705 14:36:52.907989 ME: Bringup Loader Failure : NO
1706 14:36:52.911254 ME: Firmware Init Complete : YES
1707 14:36:52.915000 ME: Boot Options Present : NO
1708 14:36:52.918296 ME: Update In Progress : NO
1709 14:36:52.921046 ME: D0i3 Support : YES
1710 14:36:52.924594 ME: Low Power State Enabled : NO
1711 14:36:52.931475 ME: CPU Replaced : NO
1712 14:36:52.934505 ME: CPU Replacement Valid : YES
1713 14:36:52.937956 ME: Current Working State : 5
1714 14:36:52.938528 ME: Current Operation State : 1
1715 14:36:52.940889 ME: Current Operation Mode : 0
1716 14:36:52.944145 ME: Error Code : 0
1717 14:36:52.947304 ME: CPU Debug Disabled : YES
1718 14:36:52.950483 ME: TXT Support : NO
1719 14:36:52.957495 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 14:36:52.963647 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 14:36:52.967401 CBFS @ c08000 size 3f8000
1722 14:36:52.970396 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 14:36:52.974040 CBFS: Locating 'fallback/dsdt.aml'
1724 14:36:52.980304 CBFS: Found @ offset 10bb80 size 3fa5
1725 14:36:52.984018 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 14:36:52.986940 CBFS @ c08000 size 3f8000
1727 14:36:52.993790 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 14:36:52.997222 CBFS: Locating 'fallback/slic'
1729 14:36:53.000674 CBFS: 'fallback/slic' not found.
1730 14:36:53.003669 ACPI: Writing ACPI tables at 99b3e000.
1731 14:36:53.006637 ACPI: * FACS
1732 14:36:53.007249 ACPI: * DSDT
1733 14:36:53.013482 Ramoops buffer: 0x100000@0x99a3d000.
1734 14:36:53.016764 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 14:36:53.019824 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 14:36:53.023853 Google Chrome EC: version:
1737 14:36:53.027524 ro: helios_v2.0.2659-56403530b
1738 14:36:53.030077 rw: helios_v2.0.2849-c41de27e7d
1739 14:36:53.033904 running image: 1
1740 14:36:53.036724 ACPI: * FADT
1741 14:36:53.037275 SCI is IRQ9
1742 14:36:53.043545 ACPI: added table 1/32, length now 40
1743 14:36:53.044135 ACPI: * SSDT
1744 14:36:53.046570 Found 1 CPU(s) with 8 core(s) each.
1745 14:36:53.049994 Error: Could not locate 'wifi_sar' in VPD.
1746 14:36:53.056605 Checking CBFS for default SAR values
1747 14:36:53.059778 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 14:36:53.063566 CBFS @ c08000 size 3f8000
1749 14:36:53.069872 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 14:36:53.073297 CBFS: Locating 'wifi_sar_defaults.hex'
1751 14:36:53.076379 CBFS: Found @ offset 5fac0 size 77
1752 14:36:53.079637 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 14:36:53.086278 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 14:36:53.089693 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 14:36:53.096311 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 14:36:53.099780 failed to find key in VPD: dsm_calib_r0_0
1757 14:36:53.109922 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 14:36:53.113137 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 14:36:53.116177 failed to find key in VPD: dsm_calib_r0_1
1760 14:36:53.126258 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 14:36:53.132575 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 14:36:53.135709 failed to find key in VPD: dsm_calib_r0_2
1763 14:36:53.146123 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 14:36:53.149399 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 14:36:53.156171 failed to find key in VPD: dsm_calib_r0_3
1766 14:36:53.162631 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 14:36:53.169236 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 14:36:53.172281 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 14:36:53.179262 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 14:36:53.182214 EC returned error result code 1
1771 14:36:53.186317 EC returned error result code 1
1772 14:36:53.189618 EC returned error result code 1
1773 14:36:53.192468 PS2K: Bad resp from EC. Vivaldi disabled!
1774 14:36:53.199467 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 14:36:53.205966 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 14:36:53.209051 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 14:36:53.215870 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 14:36:53.219314 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 14:36:53.225755 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 14:36:53.232232 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 14:36:53.238599 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 14:36:53.241926 ACPI: added table 2/32, length now 44
1783 14:36:53.242451 ACPI: * MCFG
1784 14:36:53.248507 ACPI: added table 3/32, length now 48
1785 14:36:53.248943 ACPI: * TPM2
1786 14:36:53.252397 TPM2 log created at 99a2d000
1787 14:36:53.255501 ACPI: added table 4/32, length now 52
1788 14:36:53.258831 ACPI: * MADT
1789 14:36:53.259252 SCI is IRQ9
1790 14:36:53.261952 ACPI: added table 5/32, length now 56
1791 14:36:53.265047 current = 99b43ac0
1792 14:36:53.265484 ACPI: * DMAR
1793 14:36:53.268680 ACPI: added table 6/32, length now 60
1794 14:36:53.271920 ACPI: * IGD OpRegion
1795 14:36:53.274954 GMA: Found VBT in CBFS
1796 14:36:53.278166 GMA: Found valid VBT in CBFS
1797 14:36:53.281391 ACPI: added table 7/32, length now 64
1798 14:36:53.281483 ACPI: * HPET
1799 14:36:53.284722 ACPI: added table 8/32, length now 68
1800 14:36:53.288306 ACPI: done.
1801 14:36:53.291485 ACPI tables: 31744 bytes.
1802 14:36:53.295055 smbios_write_tables: 99a2c000
1803 14:36:53.297979 EC returned error result code 3
1804 14:36:53.301522 Couldn't obtain OEM name from CBI
1805 14:36:53.305070 Create SMBIOS type 17
1806 14:36:53.308063 PCI: 00:00.0 (Intel Cannonlake)
1807 14:36:53.308156 PCI: 00:14.3 (Intel WiFi)
1808 14:36:53.311541 SMBIOS tables: 939 bytes.
1809 14:36:53.314496 Writing table forward entry at 0x00000500
1810 14:36:53.321331 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 14:36:53.324800 Writing coreboot table at 0x99b62000
1812 14:36:53.330792 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 14:36:53.334771 1. 0000000000001000-000000000009ffff: RAM
1814 14:36:53.341409 2. 00000000000a0000-00000000000fffff: RESERVED
1815 14:36:53.344477 3. 0000000000100000-0000000099a2bfff: RAM
1816 14:36:53.350840 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 14:36:53.353895 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 14:36:53.360872 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 14:36:53.367181 7. 000000009a000000-000000009f7fffff: RESERVED
1820 14:36:53.370594 8. 00000000e0000000-00000000efffffff: RESERVED
1821 14:36:53.377472 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 14:36:53.380672 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 14:36:53.387271 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 14:36:53.390406 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 14:36:53.393633 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 14:36:53.400642 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 14:36:53.403823 15. 0000000100000000-000000045e7fffff: RAM
1828 14:36:53.406877 Graphics framebuffer located at 0xc0000000
1829 14:36:53.410446 Passing 5 GPIOs to payload:
1830 14:36:53.416954 NAME | PORT | POLARITY | VALUE
1831 14:36:53.420302 write protect | undefined | high | low
1832 14:36:53.427229 lid | undefined | high | high
1833 14:36:53.433340 power | undefined | high | low
1834 14:36:53.436726 oprom | undefined | high | low
1835 14:36:53.443502 EC in RW | 0x000000cb | high | low
1836 14:36:53.443595 Board ID: 4
1837 14:36:53.450012 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 14:36:53.453235 CBFS @ c08000 size 3f8000
1839 14:36:53.456737 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 14:36:53.463701 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1841 14:36:53.466676 coreboot table: 1492 bytes.
1842 14:36:53.470186 IMD ROOT 0. 99fff000 00001000
1843 14:36:53.473174 IMD SMALL 1. 99ffe000 00001000
1844 14:36:53.476934 FSP MEMORY 2. 99c4e000 003b0000
1845 14:36:53.479854 CONSOLE 3. 99c2e000 00020000
1846 14:36:53.482984 FMAP 4. 99c2d000 0000054e
1847 14:36:53.486755 TIME STAMP 5. 99c2c000 00000910
1848 14:36:53.490016 VBOOT WORK 6. 99c18000 00014000
1849 14:36:53.493206 MRC DATA 7. 99c16000 00001958
1850 14:36:53.496809 ROMSTG STCK 8. 99c15000 00001000
1851 14:36:53.500101 AFTER CAR 9. 99c0b000 0000a000
1852 14:36:53.503187 RAMSTAGE 10. 99baf000 0005c000
1853 14:36:53.506332 REFCODE 11. 99b7a000 00035000
1854 14:36:53.509623 SMM BACKUP 12. 99b6a000 00010000
1855 14:36:53.512695 COREBOOT 13. 99b62000 00008000
1856 14:36:53.516356 ACPI 14. 99b3e000 00024000
1857 14:36:53.519285 ACPI GNVS 15. 99b3d000 00001000
1858 14:36:53.522790 RAMOOPS 16. 99a3d000 00100000
1859 14:36:53.525739 TPM2 TCGLOG17. 99a2d000 00010000
1860 14:36:53.529304 SMBIOS 18. 99a2c000 00000800
1861 14:36:53.532766 IMD small region:
1862 14:36:53.535620 IMD ROOT 0. 99ffec00 00000400
1863 14:36:53.538928 FSP RUNTIME 1. 99ffebe0 00000004
1864 14:36:53.542285 EC HOSTEVENT 2. 99ffebc0 00000008
1865 14:36:53.545502 POWER STATE 3. 99ffeb80 00000040
1866 14:36:53.549176 ROMSTAGE 4. 99ffeb60 00000004
1867 14:36:53.552342 MEM INFO 5. 99ffe9a0 000001b9
1868 14:36:53.555587 VPD 6. 99ffe920 0000006c
1869 14:36:53.559129 MTRR: Physical address space:
1870 14:36:53.565388 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 14:36:53.572386 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 14:36:53.578998 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 14:36:53.585270 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 14:36:53.592200 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 14:36:53.595516 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 14:36:53.601597 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 14:36:53.608605 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 14:36:53.611772 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 14:36:53.614933 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 14:36:53.618501 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 14:36:53.624914 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 14:36:53.628513 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 14:36:53.631446 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 14:36:53.634866 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 14:36:53.638420 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 14:36:53.644899 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 14:36:53.647839 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 14:36:53.651404 call enable_fixed_mtrr()
1889 14:36:53.655001 CPU physical address size: 39 bits
1890 14:36:53.657999 MTRR: default type WB/UC MTRR counts: 6/8.
1891 14:36:53.661235 MTRR: WB selected as default type.
1892 14:36:53.667753 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 14:36:53.674549 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 14:36:53.680786 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 14:36:53.687722 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 14:36:53.694022 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 14:36:53.700994 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 14:36:53.704079 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 14:36:53.707762 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 14:36:53.714048 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 14:36:53.717598 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 14:36:53.720831 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 14:36:53.723880 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 14:36:53.730832 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 14:36:53.733988 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 14:36:53.737112 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 14:36:53.740789 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 14:36:53.747158 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 14:36:53.747333
1910 14:36:53.747485 MTRR check
1911 14:36:53.750656 Fixed MTRRs : Enabled
1912 14:36:53.753809 Variable MTRRs: Enabled
1913 14:36:53.753971
1914 14:36:53.754120 call enable_fixed_mtrr()
1915 14:36:53.760163 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1916 14:36:53.763745 CPU physical address size: 39 bits
1917 14:36:53.770073 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 14:36:53.773547 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 14:36:53.776754 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 14:36:53.780409 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 14:36:53.786708 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 14:36:53.789915 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 14:36:53.793854 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 14:36:53.797068 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 14:36:53.803210 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 14:36:53.806437 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 14:36:53.810117 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 14:36:53.813171 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 14:36:53.820133 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 14:36:53.823110 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 14:36:53.826218 call enable_fixed_mtrr()
1932 14:36:53.829483 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 14:36:53.833405 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 14:36:53.836391 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 14:36:53.843109 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 14:36:53.846118 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 14:36:53.849739 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 14:36:53.852796 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 14:36:53.859438 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 14:36:53.863009 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 14:36:53.865959 CPU physical address size: 39 bits
1942 14:36:53.869600 call enable_fixed_mtrr()
1943 14:36:53.872721 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 14:36:53.876343 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 14:36:53.879481 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 14:36:53.885778 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 14:36:53.889540 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 14:36:53.892895 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 14:36:53.895941 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 14:36:53.902276 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 14:36:53.905992 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 14:36:53.908940 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 14:36:53.912855 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 14:36:53.919075 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 14:36:53.919203 call enable_fixed_mtrr()
1956 14:36:53.926061 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 14:36:53.929302 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 14:36:53.932204 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 14:36:53.935930 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 14:36:53.942374 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 14:36:53.945648 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 14:36:53.949223 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 14:36:53.952200 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 14:36:53.958924 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 14:36:53.962074 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 14:36:53.965386 CPU physical address size: 39 bits
1967 14:36:53.969177 call enable_fixed_mtrr()
1968 14:36:53.971928 CPU physical address size: 39 bits
1969 14:36:53.975551 CBFS @ c08000 size 3f8000
1970 14:36:53.978976 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1971 14:36:53.984971 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 14:36:53.988636 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 14:36:53.991910 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 14:36:53.995063 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 14:36:54.002073 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 14:36:54.005178 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 14:36:54.008295 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 14:36:54.012105 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 14:36:54.018211 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 14:36:54.021944 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 14:36:54.025064 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 14:36:54.028346 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 14:36:54.035272 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 14:36:54.035372 call enable_fixed_mtrr()
1985 14:36:54.041465 MTRR: Fixed MSR 0x259 0x0000000000000000
1986 14:36:54.044571 MTRR: Fixed MSR 0x268 0x0606060606060606
1987 14:36:54.048192 MTRR: Fixed MSR 0x269 0x0606060606060606
1988 14:36:54.051409 MTRR: Fixed MSR 0x26a 0x0606060606060606
1989 14:36:54.058060 MTRR: Fixed MSR 0x26b 0x0606060606060606
1990 14:36:54.061113 MTRR: Fixed MSR 0x26c 0x0606060606060606
1991 14:36:54.064637 MTRR: Fixed MSR 0x26d 0x0606060606060606
1992 14:36:54.068362 MTRR: Fixed MSR 0x26e 0x0606060606060606
1993 14:36:54.071278 MTRR: Fixed MSR 0x26f 0x0606060606060606
1994 14:36:54.077818 CPU physical address size: 39 bits
1995 14:36:54.077928 call enable_fixed_mtrr()
1996 14:36:54.084366 CPU physical address size: 39 bits
1997 14:36:54.087933 CPU physical address size: 39 bits
1998 14:36:54.090945 CBFS: Locating 'fallback/payload'
1999 14:36:54.094402 CBFS: Found @ offset 1c96c0 size 3f798
2000 14:36:54.097603 Checking segment from ROM address 0xffdd16f8
2001 14:36:54.103994 Checking segment from ROM address 0xffdd1714
2002 14:36:54.107817 Loading segment from ROM address 0xffdd16f8
2003 14:36:54.110984 code (compression=0)
2004 14:36:54.117176 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 14:36:54.127456 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 14:36:54.130673 it's not compressed!
2007 14:36:54.221901 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 14:36:54.228700 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 14:36:54.232323 Loading segment from ROM address 0xffdd1714
2010 14:36:54.235458 Entry Point 0x30000000
2011 14:36:54.238483 Loaded segments
2012 14:36:54.244052 Finalizing chipset.
2013 14:36:54.247811 Finalizing SMM.
2014 14:36:54.250725 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2015 14:36:54.254523 mp_park_aps done after 0 msecs.
2016 14:36:54.260932 Jumping to boot code at 30000000(99b62000)
2017 14:36:54.267384 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 14:36:54.267831
2019 14:36:54.268270
2020 14:36:54.268680
2021 14:36:54.270273 Starting depthcharge on Helios...
2022 14:36:54.270367
2023 14:36:54.270759 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 14:36:54.270883 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 14:36:54.270991 Setting prompt string to ['hatch:']
2026 14:36:54.271097 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 14:36:54.280317 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 14:36:54.280423
2029 14:36:54.286531 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 14:36:54.286655
2031 14:36:54.293142 board_setup: Info: eMMC controller not present; skipping
2032 14:36:54.293241
2033 14:36:54.296803 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 14:36:54.296925
2035 14:36:54.303055 board_setup: Info: SDHCI controller not present; skipping
2036 14:36:54.303148
2037 14:36:54.310080 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 14:36:54.310516
2039 14:36:54.310856 Wipe memory regions:
2040 14:36:54.311170
2041 14:36:54.313100 [0x00000000001000, 0x000000000a0000)
2042 14:36:54.313526
2043 14:36:54.319725 [0x00000000100000, 0x00000030000000)
2044 14:36:54.383244
2045 14:36:54.386728 [0x00000030657430, 0x00000099a2c000)
2046 14:36:54.532998
2047 14:36:54.536714 [0x00000100000000, 0x0000045e800000)
2048 14:36:55.992090
2049 14:36:55.992262 R8152: Initializing
2050 14:36:55.992397
2051 14:36:55.995872 Version 9 (ocp_data = 6010)
2052 14:36:55.999816
2053 14:36:55.999938 R8152: Done initializing
2054 14:36:56.000045
2055 14:36:56.003217 Adding net device
2056 14:36:56.485634
2057 14:36:56.485821 R8152: Initializing
2058 14:36:56.485942
2059 14:36:56.489119 Version 6 (ocp_data = 5c30)
2060 14:36:56.489210
2061 14:36:56.492269 R8152: Done initializing
2062 14:36:56.492350
2063 14:36:56.495902 net_add_device: Attemp to include the same device
2064 14:36:56.499662
2065 14:36:56.506641 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 14:36:56.506759
2067 14:36:56.506884
2068 14:36:56.506984
2069 14:36:56.507331 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 14:36:56.607920 hatch: tftpboot 192.168.201.1 10062797/tftp-deploy-21or2q6n/kernel/bzImage 10062797/tftp-deploy-21or2q6n/kernel/cmdline 10062797/tftp-deploy-21or2q6n/ramdisk/ramdisk.cpio.gz
2072 14:36:56.608086 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 14:36:56.608189 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 14:36:56.612800 tftpboot 192.168.201.1 10062797/tftp-deploy-21or2q6n/kernel/bzIploy-21or2q6n/kernel/cmdline 10062797/tftp-deploy-21or2q6n/ramdisk/ramdisk.cpio.gz
2075 14:36:56.612897
2076 14:36:56.612981 Waiting for link
2077 14:36:56.813948
2078 14:36:56.814111 done.
2079 14:36:56.814189
2080 14:36:56.814276 MAC: 00:24:32:50:1a:59
2081 14:36:56.814344
2082 14:36:56.817158 Sending DHCP discover... done.
2083 14:36:56.817291
2084 14:36:56.820195 Waiting for reply... done.
2085 14:36:56.820283
2086 14:36:56.823384 Sending DHCP request... done.
2087 14:36:56.823471
2088 14:36:56.826766 Waiting for reply... done.
2089 14:36:56.826852
2090 14:36:56.829840 My ip is 192.168.201.14
2091 14:36:56.829928
2092 14:36:56.833594 The DHCP server ip is 192.168.201.1
2093 14:36:56.833694
2094 14:36:56.836798 TFTP server IP predefined by user: 192.168.201.1
2095 14:36:56.836886
2096 14:36:56.843367 Bootfile predefined by user: 10062797/tftp-deploy-21or2q6n/kernel/bzImage
2097 14:36:56.843477
2098 14:36:56.846507 Sending tftp read request... done.
2099 14:36:56.849748
2100 14:36:56.853514 Waiting for the transfer...
2101 14:36:56.853633
2102 14:36:57.385622 00000000 ################################################################
2103 14:36:57.385767
2104 14:36:57.909949 00080000 ################################################################
2105 14:36:57.910100
2106 14:36:58.446265 00100000 ################################################################
2107 14:36:58.446430
2108 14:36:58.988005 00180000 ################################################################
2109 14:36:58.988152
2110 14:36:59.524955 00200000 ################################################################
2111 14:36:59.525111
2112 14:37:00.056136 00280000 ################################################################
2113 14:37:00.056289
2114 14:37:00.594917 00300000 ################################################################
2115 14:37:00.595064
2116 14:37:01.142671 00380000 ################################################################
2117 14:37:01.142823
2118 14:37:01.700576 00400000 ################################################################
2119 14:37:01.700870
2120 14:37:02.240161 00480000 ################################################################
2121 14:37:02.240337
2122 14:37:02.786006 00500000 ################################################################
2123 14:37:02.786159
2124 14:37:03.339667 00580000 ################################################################
2125 14:37:03.339815
2126 14:37:03.900664 00600000 ################################################################
2127 14:37:03.900822
2128 14:37:04.447293 00680000 ################################################################
2129 14:37:04.447439
2130 14:37:05.013249 00700000 ################################################################
2131 14:37:05.013831
2132 14:37:05.041480 00780000 ### done.
2133 14:37:05.042041
2134 14:37:05.044836 The bootfile was 7884688 bytes long.
2135 14:37:05.045384
2136 14:37:05.047743 Sending tftp read request... done.
2137 14:37:05.048175
2138 14:37:05.051663 Waiting for the transfer...
2139 14:37:05.052259
2140 14:37:05.653775 00000000 ################################################################
2141 14:37:05.653926
2142 14:37:06.199189 00080000 ################################################################
2143 14:37:06.199346
2144 14:37:06.819533 00100000 ################################################################
2145 14:37:06.819679
2146 14:37:07.371437 00180000 ################################################################
2147 14:37:07.371589
2148 14:37:07.929337 00200000 ################################################################
2149 14:37:07.929489
2150 14:37:08.478267 00280000 ################################################################
2151 14:37:08.478420
2152 14:37:09.044074 00300000 ################################################################
2153 14:37:09.044230
2154 14:37:09.657862 00380000 ################################################################
2155 14:37:09.658012
2156 14:37:10.188525 00400000 ################################################################
2157 14:37:10.188671
2158 14:37:10.736783 00480000 ################################################################
2159 14:37:10.736939
2160 14:37:11.247833 00500000 ############################################################### done.
2161 14:37:11.248039
2162 14:37:11.250672 Sending tftp read request... done.
2163 14:37:11.250772
2164 14:37:11.254030 Waiting for the transfer...
2165 14:37:11.254129
2166 14:37:11.254203 00000000 # done.
2167 14:37:11.254276
2168 14:37:11.264010 Command line loaded dynamically from TFTP file: 10062797/tftp-deploy-21or2q6n/kernel/cmdline
2169 14:37:11.264161
2170 14:37:11.290789 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10062797/extract-nfsrootfs-tulu85vb,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2171 14:37:11.290943
2172 14:37:11.296877 ec_init(0): CrosEC protocol v3 supported (256, 256)
2173 14:37:11.300449
2174 14:37:11.304370 Shutting down all USB controllers.
2175 14:37:11.304469
2176 14:37:11.304586 Removing current net device
2177 14:37:11.307316
2178 14:37:11.307416 Finalizing coreboot
2179 14:37:11.307535
2180 14:37:11.314248 Exiting depthcharge with code 4 at timestamp: 24358271
2181 14:37:11.314351
2182 14:37:11.314449
2183 14:37:11.314539 Starting kernel ...
2184 14:37:11.314651
2185 14:37:11.315297 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2186 14:37:11.315452 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2187 14:37:11.315578 Setting prompt string to ['Linux version [0-9]']
2188 14:37:11.315676 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 14:37:11.315770 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2190 14:37:11.317547
2192 14:41:36.316668 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2194 14:41:36.318006 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2196 14:41:36.318873 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2199 14:41:36.320308 end: 2 depthcharge-action (duration 00:05:00) [common]
2201 14:41:36.321239 Cleaning after the job
2202 14:41:36.321335 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/ramdisk
2203 14:41:36.322267 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/kernel
2204 14:41:36.323302 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/nfsrootfs
2205 14:41:36.394334 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062797/tftp-deploy-21or2q6n/modules
2206 14:41:36.394791 start: 4.1 power-off (timeout 00:00:30) [common]
2207 14:41:36.394978 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2208 14:41:36.480752 >> Command sent successfully.
2209 14:41:36.491243 Returned 0 in 0 seconds
2210 14:41:36.592941 end: 4.1 power-off (duration 00:00:00) [common]
2212 14:41:36.594394 start: 4.2 read-feedback (timeout 00:10:00) [common]
2213 14:41:36.595516 Listened to connection for namespace 'common' for up to 1s
2215 14:41:36.596777 Listened to connection for namespace 'common' for up to 1s
2216 14:41:37.597814 Finalising connection for namespace 'common'
2217 14:41:37.598558 Disconnecting from shell: Finalise
2218 14:41:37.599020
2219 14:41:37.700404 end: 4.2 read-feedback (duration 00:00:01) [common]
2220 14:41:37.700979 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062797
2221 14:41:38.228940 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062797
2222 14:41:38.229154 JobError: Your job cannot terminate cleanly.