Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:30:13.394087 lava-dispatcher, installed at version: 2023.01
2 14:30:13.394301 start: 0 validate
3 14:30:13.394432 Start time: 2023-04-20 14:30:13.394425+00:00 (UTC)
4 14:30:13.394563 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:30:13.394697 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230414.0%2Famd64%2Finitrd.cpio.gz exists
6 14:30:13.691162 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:30:13.691976 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-1099-g7b2580e1565dd%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:30:16.699216 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:30:16.699998 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230414.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:30:16.993616 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:30:16.994411 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-1099-g7b2580e1565dd%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:30:17.502301 validate duration: 4.11
14 14:30:17.502653 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:30:17.502817 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:30:17.502940 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:30:17.503097 Not decompressing ramdisk as can be used compressed.
18 14:30:17.503221 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230414.0/amd64/initrd.cpio.gz
19 14:30:17.503316 saving as /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/ramdisk/initrd.cpio.gz
20 14:30:17.503411 total size: 5672848 (5MB)
21 14:30:17.504832 progress 0% (0MB)
22 14:30:17.506523 progress 5% (0MB)
23 14:30:17.508183 progress 10% (0MB)
24 14:30:17.509699 progress 15% (0MB)
25 14:30:17.511359 progress 20% (1MB)
26 14:30:17.513042 progress 25% (1MB)
27 14:30:17.514575 progress 30% (1MB)
28 14:30:17.516250 progress 35% (1MB)
29 14:30:17.517909 progress 40% (2MB)
30 14:30:17.519363 progress 45% (2MB)
31 14:30:17.521000 progress 50% (2MB)
32 14:30:17.522671 progress 55% (3MB)
33 14:30:17.524170 progress 60% (3MB)
34 14:30:17.525827 progress 65% (3MB)
35 14:30:17.527470 progress 70% (3MB)
36 14:30:17.528966 progress 75% (4MB)
37 14:30:17.530652 progress 80% (4MB)
38 14:30:17.532390 progress 85% (4MB)
39 14:30:17.533863 progress 90% (4MB)
40 14:30:17.535545 progress 95% (5MB)
41 14:30:17.537219 progress 100% (5MB)
42 14:30:17.537411 5MB downloaded in 0.03s (159.14MB/s)
43 14:30:17.537640 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:30:17.538044 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:30:17.538186 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:30:17.538299 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:30:17.538449 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-1099-g7b2580e1565dd/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:30:17.538548 saving as /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/kernel/bzImage
50 14:30:17.538673 total size: 7884688 (7MB)
51 14:30:17.538764 No compression specified
52 14:30:17.540464 progress 0% (0MB)
53 14:30:17.542852 progress 5% (0MB)
54 14:30:17.545004 progress 10% (0MB)
55 14:30:17.547174 progress 15% (1MB)
56 14:30:17.549415 progress 20% (1MB)
57 14:30:17.551612 progress 25% (1MB)
58 14:30:17.553825 progress 30% (2MB)
59 14:30:17.555982 progress 35% (2MB)
60 14:30:17.558160 progress 40% (3MB)
61 14:30:17.560283 progress 45% (3MB)
62 14:30:17.562433 progress 50% (3MB)
63 14:30:17.564557 progress 55% (4MB)
64 14:30:17.566796 progress 60% (4MB)
65 14:30:17.568925 progress 65% (4MB)
66 14:30:17.571047 progress 70% (5MB)
67 14:30:17.573175 progress 75% (5MB)
68 14:30:17.575300 progress 80% (6MB)
69 14:30:17.577440 progress 85% (6MB)
70 14:30:17.579583 progress 90% (6MB)
71 14:30:17.581821 progress 95% (7MB)
72 14:30:17.584041 progress 100% (7MB)
73 14:30:17.584290 7MB downloaded in 0.05s (164.85MB/s)
74 14:30:17.584482 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:30:17.584779 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:30:17.584897 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:30:17.585015 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:30:17.585176 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230414.0/amd64/full.rootfs.tar.xz
80 14:30:17.585273 saving as /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/nfsrootfs/full.rootfs.tar
81 14:30:17.585366 total size: 125569244 (119MB)
82 14:30:17.585475 Using unxz to decompress xz
83 14:30:17.590004 progress 0% (0MB)
84 14:30:18.090065 progress 5% (6MB)
85 14:30:18.584022 progress 10% (12MB)
86 14:30:19.074586 progress 15% (17MB)
87 14:30:19.578258 progress 20% (23MB)
88 14:30:19.912778 progress 25% (29MB)
89 14:30:20.247491 progress 30% (35MB)
90 14:30:20.502178 progress 35% (41MB)
91 14:30:20.699433 progress 40% (47MB)
92 14:30:21.059235 progress 45% (53MB)
93 14:30:21.426639 progress 50% (59MB)
94 14:30:21.767459 progress 55% (65MB)
95 14:30:22.124669 progress 60% (71MB)
96 14:30:22.461906 progress 65% (77MB)
97 14:30:22.856600 progress 70% (83MB)
98 14:30:23.276515 progress 75% (89MB)
99 14:30:23.754800 progress 80% (95MB)
100 14:30:23.850201 progress 85% (101MB)
101 14:30:24.009983 progress 90% (107MB)
102 14:30:24.353407 progress 95% (113MB)
103 14:30:24.732111 progress 100% (119MB)
104 14:30:24.737285 119MB downloaded in 7.15s (16.74MB/s)
105 14:30:24.737683 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:30:24.738115 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:30:24.738244 start: 1.4 download-retry (timeout 00:09:53) [common]
109 14:30:24.738373 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 14:30:24.738569 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-1099-g7b2580e1565dd/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:30:24.738680 saving as /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/modules/modules.tar
112 14:30:24.738778 total size: 251260 (0MB)
113 14:30:24.738875 Using unxz to decompress xz
114 14:30:24.743573 progress 13% (0MB)
115 14:30:24.744151 progress 26% (0MB)
116 14:30:24.744524 progress 39% (0MB)
117 14:30:24.745847 progress 52% (0MB)
118 14:30:24.747791 progress 65% (0MB)
119 14:30:24.749605 progress 78% (0MB)
120 14:30:24.751497 progress 91% (0MB)
121 14:30:24.753361 progress 100% (0MB)
122 14:30:24.758780 0MB downloaded in 0.02s (11.98MB/s)
123 14:30:24.759114 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:30:24.759513 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:30:24.759655 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 14:30:24.759800 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 14:30:26.851544 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10062741/extract-nfsrootfs-pmas1dw2
129 14:30:26.851737 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 14:30:26.851840 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 14:30:26.852013 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1
132 14:30:26.852178 makedir: /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin
133 14:30:26.852283 makedir: /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/tests
134 14:30:26.852384 makedir: /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/results
135 14:30:26.852489 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-add-keys
136 14:30:26.852631 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-add-sources
137 14:30:26.852759 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-background-process-start
138 14:30:26.852885 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-background-process-stop
139 14:30:26.853011 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-common-functions
140 14:30:26.853134 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-echo-ipv4
141 14:30:26.853265 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-install-packages
142 14:30:26.853389 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-installed-packages
143 14:30:26.853643 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-os-build
144 14:30:26.853776 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-probe-channel
145 14:30:26.853900 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-probe-ip
146 14:30:26.854023 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-target-ip
147 14:30:26.854146 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-target-mac
148 14:30:26.854268 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-target-storage
149 14:30:26.854392 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-test-case
150 14:30:26.854516 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-test-event
151 14:30:26.854640 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-test-feedback
152 14:30:26.854764 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-test-raise
153 14:30:26.854885 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-test-reference
154 14:30:26.855007 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-test-runner
155 14:30:26.855129 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-test-set
156 14:30:26.855251 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-test-shell
157 14:30:26.855374 Updating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-install-packages (oe)
158 14:30:26.855523 Updating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/bin/lava-installed-packages (oe)
159 14:30:26.855650 Creating /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/environment
160 14:30:26.855752 LAVA metadata
161 14:30:26.855825 - LAVA_JOB_ID=10062741
162 14:30:26.855910 - LAVA_DISPATCHER_IP=192.168.201.1
163 14:30:26.856046 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 14:30:26.856132 skipped lava-vland-overlay
165 14:30:26.856210 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 14:30:26.856292 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 14:30:26.856356 skipped lava-multinode-overlay
168 14:30:26.856430 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 14:30:26.856510 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 14:30:26.856585 Loading test definitions
171 14:30:26.856679 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
172 14:30:26.856751 Using /lava-10062741 at stage 0
173 14:30:26.856851 Fetching tests from https://github.com/kernelci/test-definitions
174 14:30:26.856931 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/0/tests/0_ltp-ipc'
175 14:30:32.504004 Running '/usr/bin/git checkout kernelci.org
176 14:30:32.647713 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 14:30:32.648511 uuid=10062741_1.5.2.3.1 testdef=None
178 14:30:32.648676 end: 1.5.2.3.1 git-repo-action (duration 00:00:06) [common]
180 14:30:32.648931 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
181 14:30:32.650318 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 14:30:32.650707 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
184 14:30:32.652392 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 14:30:32.652673 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
187 14:30:32.654104 runner path: /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/0/tests/0_ltp-ipc test_uuid 10062741_1.5.2.3.1
188 14:30:32.654196 SKIPFILE='skipfile-lkft.yaml'
189 14:30:32.654278 SKIP_INSTALL='true'
190 14:30:32.654372 TST_CMDFILES='ipc'
191 14:30:32.654541 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 14:30:32.654761 Creating lava-test-runner.conf files
194 14:30:32.654842 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062741/lava-overlay-5_ogk9n1/lava-10062741/0 for stage 0
195 14:30:32.654937 - 0_ltp-ipc
196 14:30:32.655041 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
197 14:30:32.655130 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
198 14:30:40.214936 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 14:30:40.215082 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
200 14:30:40.215175 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 14:30:40.215282 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
202 14:30:40.215371 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
203 14:30:40.352068 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 14:30:40.352439 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
205 14:30:40.352560 extracting modules file /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062741/extract-nfsrootfs-pmas1dw2
206 14:30:40.361010 extracting modules file /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062741/extract-overlay-ramdisk-troqh7eu/ramdisk
207 14:30:40.369339 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 14:30:40.369519 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
209 14:30:40.369617 [common] Applying overlay to NFS
210 14:30:40.369691 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062741/compress-overlay-uqrox579/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062741/extract-nfsrootfs-pmas1dw2
211 14:30:41.216340 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 14:30:41.216503 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
213 14:30:41.216598 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 14:30:41.216690 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
215 14:30:41.216773 Building ramdisk /var/lib/lava/dispatcher/tmp/10062741/extract-overlay-ramdisk-troqh7eu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062741/extract-overlay-ramdisk-troqh7eu/ramdisk
216 14:30:41.282555 >> 27179 blocks
217 14:30:41.839085 rename /var/lib/lava/dispatcher/tmp/10062741/extract-overlay-ramdisk-troqh7eu/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/ramdisk/ramdisk.cpio.gz
218 14:30:41.839514 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 14:30:41.839637 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
220 14:30:41.839741 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
221 14:30:41.839837 No mkimage arch provided, not using FIT.
222 14:30:41.839929 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 14:30:41.840016 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 14:30:41.840117 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
225 14:30:41.840209 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
226 14:30:41.840293 No LXC device requested
227 14:30:41.840375 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 14:30:41.840461 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
229 14:30:41.840542 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 14:30:41.840664 Checking files for TFTP limit of 4294967296 bytes.
231 14:30:41.841062 end: 1 tftp-deploy (duration 00:00:24) [common]
232 14:30:41.841165 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 14:30:41.841255 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 14:30:41.841377 substitutions:
235 14:30:41.841445 - {DTB}: None
236 14:30:41.841553 - {INITRD}: 10062741/tftp-deploy-9t07rosa/ramdisk/ramdisk.cpio.gz
237 14:30:41.841614 - {KERNEL}: 10062741/tftp-deploy-9t07rosa/kernel/bzImage
238 14:30:41.841673 - {LAVA_MAC}: None
239 14:30:41.841730 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10062741/extract-nfsrootfs-pmas1dw2
240 14:30:41.841787 - {NFS_SERVER_IP}: 192.168.201.1
241 14:30:41.841841 - {PRESEED_CONFIG}: None
242 14:30:41.841896 - {PRESEED_LOCAL}: None
243 14:30:41.841949 - {RAMDISK}: 10062741/tftp-deploy-9t07rosa/ramdisk/ramdisk.cpio.gz
244 14:30:41.842004 - {ROOT_PART}: None
245 14:30:41.842058 - {ROOT}: None
246 14:30:41.842113 - {SERVER_IP}: 192.168.201.1
247 14:30:41.842168 - {TEE}: None
248 14:30:41.842222 Parsed boot commands:
249 14:30:41.842279 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 14:30:41.842454 Parsed boot commands: tftpboot 192.168.201.1 10062741/tftp-deploy-9t07rosa/kernel/bzImage 10062741/tftp-deploy-9t07rosa/kernel/cmdline 10062741/tftp-deploy-9t07rosa/ramdisk/ramdisk.cpio.gz
251 14:30:41.842545 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 14:30:41.842631 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 14:30:41.842721 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 14:30:41.842806 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 14:30:41.842877 Not connected, no need to disconnect.
256 14:30:41.842951 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 14:30:41.843029 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 14:30:41.843097 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
259 14:30:41.846625 Setting prompt string to ['lava-test: # ']
260 14:30:41.846951 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 14:30:41.847057 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 14:30:41.847156 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 14:30:41.847248 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 14:30:41.847432 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
265 14:30:46.981961 >> Command sent successfully.
266 14:30:46.984349 Returned 0 in 5 seconds
267 14:30:47.085170 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 14:30:47.085532 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 14:30:47.085640 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 14:30:47.085732 Setting prompt string to 'Starting depthcharge on Helios...'
272 14:30:47.085801 Changing prompt to 'Starting depthcharge on Helios...'
273 14:30:47.085869 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
274 14:30:47.086120 [Enter `^Ec?' for help]
275 14:30:47.705014
276 14:30:47.705186
277 14:30:47.714937 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
278 14:30:47.718302 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
279 14:30:47.724881 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
280 14:30:47.728520 CPU: AES supported, TXT NOT supported, VT supported
281 14:30:47.735163 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
282 14:30:47.738136 PCH: device id 0284 (rev 00) is Cometlake-U Premium
283 14:30:47.745077 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
284 14:30:47.748555 VBOOT: Loading verstage.
285 14:30:47.751733 FMAP: Found "FLASH" version 1.1 at 0xc04000.
286 14:30:47.758398 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
287 14:30:47.761634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 14:30:47.765176 CBFS @ c08000 size 3f8000
289 14:30:47.771700 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
290 14:30:47.775006 CBFS: Locating 'fallback/verstage'
291 14:30:47.778647 CBFS: Found @ offset 10fb80 size 1072c
292 14:30:47.781667
293 14:30:47.781754
294 14:30:47.791492 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
295 14:30:47.805791 Probing TPM: . done!
296 14:30:47.809344 TPM ready after 0 ms
297 14:30:47.812708 Connected to device vid:did:rid of 1ae0:0028:00
298 14:30:47.822609 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
299 14:30:47.826043 Initialized TPM device CR50 revision 0
300 14:30:47.869999 tlcl_send_startup: Startup return code is 0
301 14:30:47.870099 TPM: setup succeeded
302 14:30:47.882299 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
303 14:30:47.886266 Chrome EC: UHEPI supported
304 14:30:47.889838 Phase 1
305 14:30:47.893245 FMAP: area GBB found @ c05000 (12288 bytes)
306 14:30:47.899484 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 14:30:47.899569 Phase 2
308 14:30:47.903069 Phase 3
309 14:30:47.906697 FMAP: area GBB found @ c05000 (12288 bytes)
310 14:30:47.913034 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 14:30:47.919419 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
312 14:30:47.922924 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
313 14:30:47.929442 VB2:vb2_verify_keyblock() Checking keyblock signature...
314 14:30:47.945163 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 14:30:47.948208 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 14:30:47.955014 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 14:30:47.958964 Phase 4
318 14:30:47.962433 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
319 14:30:47.969553 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 14:30:48.148823 VB2:vb2_rsa_verify_digest() Digest check failed!
321 14:30:48.155442 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
322 14:30:48.155554 Saving nvdata
323 14:30:48.158916 Reboot requested (10020007)
324 14:30:48.161801 board_reset() called!
325 14:30:48.161901 full_reset() called!
326 14:30:52.671813
327 14:30:52.671951
328 14:30:52.681620 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
329 14:30:52.684525 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
330 14:30:52.691493 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
331 14:30:52.694776 CPU: AES supported, TXT NOT supported, VT supported
332 14:30:52.701204 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
333 14:30:52.704950 PCH: device id 0284 (rev 00) is Cometlake-U Premium
334 14:30:52.711387 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
335 14:30:52.714798 VBOOT: Loading verstage.
336 14:30:52.718208 FMAP: Found "FLASH" version 1.1 at 0xc04000.
337 14:30:52.724489 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
338 14:30:52.727787 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
339 14:30:52.731373 CBFS @ c08000 size 3f8000
340 14:30:52.737930 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
341 14:30:52.741374 CBFS: Locating 'fallback/verstage'
342 14:30:52.744452 CBFS: Found @ offset 10fb80 size 1072c
343 14:30:52.748550
344 14:30:52.748650
345 14:30:52.758564 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
346 14:30:52.772920 Probing TPM: . done!
347 14:30:52.776208 TPM ready after 0 ms
348 14:30:52.779787 Connected to device vid:did:rid of 1ae0:0028:00
349 14:30:52.789505 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
350 14:30:52.793075 Initialized TPM device CR50 revision 0
351 14:30:52.836553 tlcl_send_startup: Startup return code is 0
352 14:30:52.836682 TPM: setup succeeded
353 14:30:52.849060 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
354 14:30:52.852674 Chrome EC: UHEPI supported
355 14:30:52.856152 Phase 1
356 14:30:52.859589 FMAP: area GBB found @ c05000 (12288 bytes)
357 14:30:52.866115 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
358 14:30:52.872740 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
359 14:30:52.876182 Recovery requested (1009000e)
360 14:30:52.882146 Saving nvdata
361 14:30:52.888231 tlcl_extend: response is 0
362 14:30:52.897263 tlcl_extend: response is 0
363 14:30:52.904138 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
364 14:30:52.907316 CBFS @ c08000 size 3f8000
365 14:30:52.914053 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
366 14:30:52.917556 CBFS: Locating 'fallback/romstage'
367 14:30:52.920299 CBFS: Found @ offset 80 size 145fc
368 14:30:52.924118 Accumulated console time in verstage 98 ms
369 14:30:52.924206
370 14:30:52.924273
371 14:30:52.937348 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
372 14:30:52.944104 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
373 14:30:52.947148 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 14:30:52.950621 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 14:30:52.957208 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
376 14:30:52.960311 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
377 14:30:52.963907 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
378 14:30:52.966923 TCO_STS: 0000 0000
379 14:30:52.970194 GEN_PMCON: e0015238 00000200
380 14:30:52.973843 GBLRST_CAUSE: 00000000 00000000
381 14:30:52.973931 prev_sleep_state 5
382 14:30:52.976819 Boot Count incremented to 59956
383 14:30:52.983829 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 14:30:52.987526 CBFS @ c08000 size 3f8000
385 14:30:52.993416 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
386 14:30:52.993558 CBFS: Locating 'fspm.bin'
387 14:30:53.000207 CBFS: Found @ offset 5ffc0 size 71000
388 14:30:53.003316 Chrome EC: UHEPI supported
389 14:30:53.010199 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 14:30:53.013639 Probing TPM: done!
391 14:30:53.020231 Connected to device vid:did:rid of 1ae0:0028:00
392 14:30:53.030056 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
393 14:30:53.036317 Initialized TPM device CR50 revision 0
394 14:30:53.045187 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 14:30:53.051619 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 14:30:53.055260 MRC cache found, size 1948
397 14:30:53.058341 bootmode is set to: 2
398 14:30:53.061868 PRMRR disabled by config.
399 14:30:53.061953 SPD INDEX = 1
400 14:30:53.068644 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 14:30:53.071601 CBFS @ c08000 size 3f8000
402 14:30:53.078167 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 14:30:53.078253 CBFS: Locating 'spd.bin'
404 14:30:53.081593 CBFS: Found @ offset 5fb80 size 400
405 14:30:53.085019 SPD: module type is LPDDR3
406 14:30:53.088048 SPD: module part is
407 14:30:53.094608 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
408 14:30:53.098188 SPD: device width 4 bits, bus width 8 bits
409 14:30:53.101073 SPD: module size is 4096 MB (per channel)
410 14:30:53.104761 memory slot: 0 configuration done.
411 14:30:53.108090 memory slot: 2 configuration done.
412 14:30:53.159272 CBMEM:
413 14:30:53.162167 IMD: root @ 99fff000 254 entries.
414 14:30:53.165679 IMD: root @ 99ffec00 62 entries.
415 14:30:53.169194 External stage cache:
416 14:30:53.172174 IMD: root @ 9abff000 254 entries.
417 14:30:53.175640 IMD: root @ 9abfec00 62 entries.
418 14:30:53.179036 Chrome EC: clear events_b mask to 0x0000000020004000
419 14:30:53.195037 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 14:30:53.208283 tlcl_write: response is 0
421 14:30:53.217171 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 14:30:53.223700 MRC: TPM MRC hash updated successfully.
423 14:30:53.223805 2 DIMMs found
424 14:30:53.227367 SMM Memory Map
425 14:30:53.230300 SMRAM : 0x9a000000 0x1000000
426 14:30:53.233643 Subregion 0: 0x9a000000 0xa00000
427 14:30:53.237207 Subregion 1: 0x9aa00000 0x200000
428 14:30:53.240676 Subregion 2: 0x9ac00000 0x400000
429 14:30:53.243740 top_of_ram = 0x9a000000
430 14:30:53.247439 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 14:30:53.253804 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 14:30:53.256965 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 14:30:53.263607 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 14:30:53.267128 CBFS @ c08000 size 3f8000
435 14:30:53.270046 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 14:30:53.273451 CBFS: Locating 'fallback/postcar'
437 14:30:53.279895 CBFS: Found @ offset 107000 size 4b44
438 14:30:53.283469 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 14:30:53.296419 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 14:30:53.299982 Processing 180 relocs. Offset value of 0x97c0c000
441 14:30:53.308104 Accumulated console time in romstage 286 ms
442 14:30:53.308188
443 14:30:53.308254
444 14:30:53.317680 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 14:30:53.324381 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 14:30:53.327863 CBFS @ c08000 size 3f8000
447 14:30:53.334397 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 14:30:53.337681 CBFS: Locating 'fallback/ramstage'
449 14:30:53.341178 CBFS: Found @ offset 43380 size 1b9e8
450 14:30:53.347408 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 14:30:53.379509 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 14:30:53.382873 Processing 3976 relocs. Offset value of 0x98db0000
453 14:30:53.389669 Accumulated console time in postcar 52 ms
454 14:30:53.389753
455 14:30:53.389821
456 14:30:53.399680 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 14:30:53.406406 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 14:30:53.409737 WARNING: RO_VPD is uninitialized or empty.
459 14:30:53.412796 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 14:30:53.419559 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 14:30:53.419645 Normal boot.
462 14:30:53.426263 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 14:30:53.429393 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 14:30:53.432822 CBFS @ c08000 size 3f8000
465 14:30:53.439098 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 14:30:53.442651 CBFS: Locating 'cpu_microcode_blob.bin'
467 14:30:53.446342 CBFS: Found @ offset 14700 size 2ec00
468 14:30:53.449400 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 14:30:53.452596 Skip microcode update
470 14:30:53.459084 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 14:30:53.459169 CBFS @ c08000 size 3f8000
472 14:30:53.465866 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 14:30:53.469069 CBFS: Locating 'fsps.bin'
474 14:30:53.472291 CBFS: Found @ offset d1fc0 size 35000
475 14:30:53.497712 Detected 4 core, 8 thread CPU.
476 14:30:53.501054 Setting up SMI for CPU
477 14:30:53.504575 IED base = 0x9ac00000
478 14:30:53.504666 IED size = 0x00400000
479 14:30:53.507683 Will perform SMM setup.
480 14:30:53.514273 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 14:30:53.521096 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 14:30:53.524226 Processing 16 relocs. Offset value of 0x00030000
483 14:30:53.528324 Attempting to start 7 APs
484 14:30:53.531391 Waiting for 10ms after sending INIT.
485 14:30:53.547784 Waiting for 1st SIPI to complete...AP: slot 5 apic_id 1.
486 14:30:53.547887 done.
487 14:30:53.550665 AP: slot 4 apic_id 5.
488 14:30:53.554073 AP: slot 2 apic_id 4.
489 14:30:53.554168 AP: slot 3 apic_id 2.
490 14:30:53.557592 AP: slot 1 apic_id 3.
491 14:30:53.560544 AP: slot 7 apic_id 6.
492 14:30:53.560630 AP: slot 6 apic_id 7.
493 14:30:53.567876 Waiting for 2nd SIPI to complete...done.
494 14:30:53.574118 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 14:30:53.577583 Processing 13 relocs. Offset value of 0x00038000
496 14:30:53.584068 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
497 14:30:53.590731 Installing SMM handler to 0x9a000000
498 14:30:53.597494 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 14:30:53.600725 Processing 658 relocs. Offset value of 0x9a010000
500 14:30:53.610541 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 14:30:53.614090 Processing 13 relocs. Offset value of 0x9a008000
502 14:30:53.620488 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 14:30:53.626981 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 14:30:53.630466 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 14:30:53.637073 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 14:30:53.644044 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 14:30:53.650176 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 14:30:53.653852 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 14:30:53.660553 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
510 14:30:53.663548 Clearing SMI status registers
511 14:30:53.667244 SMI_STS: PM1
512 14:30:53.667327 PM1_STS: PWRBTN
513 14:30:53.670178 TCO_STS: SECOND_TO
514 14:30:53.673369 New SMBASE 0x9a000000
515 14:30:53.676645 In relocation handler: CPU 0
516 14:30:53.680524 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
517 14:30:53.683791 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 14:30:53.687074 Relocation complete.
519 14:30:53.690391 New SMBASE 0x99ffec00
520 14:30:53.690475 In relocation handler: CPU 5
521 14:30:53.696834 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
522 14:30:53.700115 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 14:30:53.703668 Relocation complete.
524 14:30:53.703778 New SMBASE 0x99fffc00
525 14:30:53.707018 In relocation handler: CPU 1
526 14:30:53.713768 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
527 14:30:53.716819 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 14:30:53.720330 Relocation complete.
529 14:30:53.720414 New SMBASE 0x99fff400
530 14:30:53.723709 In relocation handler: CPU 3
531 14:30:53.730206 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
532 14:30:53.733768 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 14:30:53.736864 Relocation complete.
534 14:30:53.736948 New SMBASE 0x99ffe800
535 14:30:53.740220 In relocation handler: CPU 6
536 14:30:53.743473 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
537 14:30:53.750200 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 14:30:53.754147 Relocation complete.
539 14:30:53.754237 New SMBASE 0x99ffe400
540 14:30:53.756642 In relocation handler: CPU 7
541 14:30:53.760059 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
542 14:30:53.766995 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 14:30:53.767084 Relocation complete.
544 14:30:53.770110 New SMBASE 0x99fff800
545 14:30:53.773540 In relocation handler: CPU 2
546 14:30:53.776732 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
547 14:30:53.783540 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 14:30:53.783628 Relocation complete.
549 14:30:53.786844 New SMBASE 0x99fff000
550 14:30:53.789801 In relocation handler: CPU 4
551 14:30:53.793245 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
552 14:30:53.800021 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 14:30:53.800113 Relocation complete.
554 14:30:53.803151 Initializing CPU #0
555 14:30:53.806630 CPU: vendor Intel device 806ec
556 14:30:53.809693 CPU: family 06, model 8e, stepping 0c
557 14:30:53.812975 Clearing out pending MCEs
558 14:30:53.816616 Setting up local APIC...
559 14:30:53.816708 apic_id: 0x00 done.
560 14:30:53.819635 Turbo is available but hidden
561 14:30:53.823357 Turbo is available and visible
562 14:30:53.826369 VMX status: enabled
563 14:30:53.829798 IA32_FEATURE_CONTROL status: locked
564 14:30:53.833243 Skip microcode update
565 14:30:53.833330 CPU #0 initialized
566 14:30:53.836649 Initializing CPU #5
567 14:30:53.836736 Initializing CPU #7
568 14:30:53.839679 Initializing CPU #6
569 14:30:53.843180 CPU: vendor Intel device 806ec
570 14:30:53.846318 CPU: family 06, model 8e, stepping 0c
571 14:30:53.849513 CPU: vendor Intel device 806ec
572 14:30:53.853039 CPU: family 06, model 8e, stepping 0c
573 14:30:53.856343 Clearing out pending MCEs
574 14:30:53.859407 Clearing out pending MCEs
575 14:30:53.859499 Initializing CPU #2
576 14:30:53.862958 Initializing CPU #4
577 14:30:53.866228 CPU: vendor Intel device 806ec
578 14:30:53.869347 CPU: family 06, model 8e, stepping 0c
579 14:30:53.872822 CPU: vendor Intel device 806ec
580 14:30:53.875899 CPU: family 06, model 8e, stepping 0c
581 14:30:53.879588 Clearing out pending MCEs
582 14:30:53.882977 Clearing out pending MCEs
583 14:30:53.885978 Setting up local APIC...
584 14:30:53.886065 Setting up local APIC...
585 14:30:53.889565 Initializing CPU #1
586 14:30:53.892554 Initializing CPU #3
587 14:30:53.895826 CPU: vendor Intel device 806ec
588 14:30:53.899345 CPU: family 06, model 8e, stepping 0c
589 14:30:53.902691 CPU: vendor Intel device 806ec
590 14:30:53.906220 CPU: family 06, model 8e, stepping 0c
591 14:30:53.906308 Clearing out pending MCEs
592 14:30:53.909650 Clearing out pending MCEs
593 14:30:53.912518 Setting up local APIC...
594 14:30:53.915941 CPU: vendor Intel device 806ec
595 14:30:53.919247 CPU: family 06, model 8e, stepping 0c
596 14:30:53.922743 Clearing out pending MCEs
597 14:30:53.925816 apic_id: 0x02 done.
598 14:30:53.925904 Setting up local APIC...
599 14:30:53.929143 Setting up local APIC...
600 14:30:53.932695 apic_id: 0x03 done.
601 14:30:53.932807 VMX status: enabled
602 14:30:53.936261 VMX status: enabled
603 14:30:53.939049 IA32_FEATURE_CONTROL status: locked
604 14:30:53.942468 IA32_FEATURE_CONTROL status: locked
605 14:30:53.946112 Skip microcode update
606 14:30:53.949216 Skip microcode update
607 14:30:53.949309 CPU #3 initialized
608 14:30:53.952645 CPU #1 initialized
609 14:30:53.952756 Setting up local APIC...
610 14:30:53.955618 Setting up local APIC...
611 14:30:53.959283 apic_id: 0x01 done.
612 14:30:53.962236 apic_id: 0x06 done.
613 14:30:53.962321 apic_id: 0x07 done.
614 14:30:53.965769 VMX status: enabled
615 14:30:53.965854 VMX status: enabled
616 14:30:53.969294 IA32_FEATURE_CONTROL status: locked
617 14:30:53.975716 IA32_FEATURE_CONTROL status: locked
618 14:30:53.975802 Skip microcode update
619 14:30:53.978745 Skip microcode update
620 14:30:53.982224 CPU #7 initialized
621 14:30:53.982328 CPU #6 initialized
622 14:30:53.985866 apic_id: 0x05 done.
623 14:30:53.985952 apic_id: 0x04 done.
624 14:30:53.988933 VMX status: enabled
625 14:30:53.992413 VMX status: enabled
626 14:30:53.995798 IA32_FEATURE_CONTROL status: locked
627 14:30:53.998787 IA32_FEATURE_CONTROL status: locked
628 14:30:53.998873 Skip microcode update
629 14:30:54.002381 Skip microcode update
630 14:30:54.005351 CPU #4 initialized
631 14:30:54.005463 CPU #2 initialized
632 14:30:54.008772 VMX status: enabled
633 14:30:54.012526 IA32_FEATURE_CONTROL status: locked
634 14:30:54.015603 Skip microcode update
635 14:30:54.015688 CPU #5 initialized
636 14:30:54.022156 bsp_do_flight_plan done after 452 msecs.
637 14:30:54.025620 CPU: frequency set to 4200 MHz
638 14:30:54.025706 Enabling SMIs.
639 14:30:54.025786 Locking SMM.
640 14:30:54.041738 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 14:30:54.044962 CBFS @ c08000 size 3f8000
642 14:30:54.051785 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 14:30:54.051872 CBFS: Locating 'vbt.bin'
644 14:30:54.055216 CBFS: Found @ offset 5f5c0 size 499
645 14:30:54.061784 Found a VBT of 4608 bytes after decompression
646 14:30:54.241161 Display FSP Version Info HOB
647 14:30:54.244259 Reference Code - CPU = 9.0.1e.30
648 14:30:54.247281 uCode Version = 0.0.0.ca
649 14:30:54.250684 TXT ACM version = ff.ff.ff.ffff
650 14:30:54.253927 Display FSP Version Info HOB
651 14:30:54.257677 Reference Code - ME = 9.0.1e.30
652 14:30:54.260754 MEBx version = 0.0.0.0
653 14:30:54.264110 ME Firmware Version = Consumer SKU
654 14:30:54.267706 Display FSP Version Info HOB
655 14:30:54.270948 Reference Code - CML PCH = 9.0.1e.30
656 14:30:54.273829 PCH-CRID Status = Disabled
657 14:30:54.277384 PCH-CRID Original Value = ff.ff.ff.ffff
658 14:30:54.280822 PCH-CRID New Value = ff.ff.ff.ffff
659 14:30:54.283919 OPROM - RST - RAID = ff.ff.ff.ffff
660 14:30:54.287347 ChipsetInit Base Version = ff.ff.ff.ffff
661 14:30:54.290999 ChipsetInit Oem Version = ff.ff.ff.ffff
662 14:30:54.293756 Display FSP Version Info HOB
663 14:30:54.300357 Reference Code - SA - System Agent = 9.0.1e.30
664 14:30:54.304041 Reference Code - MRC = 0.7.1.6c
665 14:30:54.304127 SA - PCIe Version = 9.0.1e.30
666 14:30:54.307327 SA-CRID Status = Disabled
667 14:30:54.310686 SA-CRID Original Value = 0.0.0.c
668 14:30:54.313846 SA-CRID New Value = 0.0.0.c
669 14:30:54.317184 OPROM - VBIOS = ff.ff.ff.ffff
670 14:30:54.317279 RTC Init
671 14:30:54.324122 Set power on after power failure.
672 14:30:54.324208 Disabling Deep S3
673 14:30:54.327689 Disabling Deep S3
674 14:30:54.327775 Disabling Deep S4
675 14:30:54.330670 Disabling Deep S4
676 14:30:54.330754 Disabling Deep S5
677 14:30:54.333942 Disabling Deep S5
678 14:30:54.340620 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 190 exit 1
679 14:30:54.340706 Enumerating buses...
680 14:30:54.347786 Show all devs... Before device enumeration.
681 14:30:54.347873 Root Device: enabled 1
682 14:30:54.350638 CPU_CLUSTER: 0: enabled 1
683 14:30:54.354203 DOMAIN: 0000: enabled 1
684 14:30:54.354289 APIC: 00: enabled 1
685 14:30:54.357610 PCI: 00:00.0: enabled 1
686 14:30:54.361252 PCI: 00:02.0: enabled 1
687 14:30:54.364186 PCI: 00:04.0: enabled 0
688 14:30:54.364275 PCI: 00:05.0: enabled 0
689 14:30:54.367775 PCI: 00:12.0: enabled 1
690 14:30:54.370776 PCI: 00:12.5: enabled 0
691 14:30:54.374260 PCI: 00:12.6: enabled 0
692 14:30:54.374346 PCI: 00:14.0: enabled 1
693 14:30:54.377234 PCI: 00:14.1: enabled 0
694 14:30:54.380882 PCI: 00:14.3: enabled 1
695 14:30:54.380968 PCI: 00:14.5: enabled 0
696 14:30:54.384426 PCI: 00:15.0: enabled 1
697 14:30:54.387232 PCI: 00:15.1: enabled 1
698 14:30:54.390856 PCI: 00:15.2: enabled 0
699 14:30:54.390942 PCI: 00:15.3: enabled 0
700 14:30:54.394104 PCI: 00:16.0: enabled 1
701 14:30:54.397510 PCI: 00:16.1: enabled 0
702 14:30:54.400673 PCI: 00:16.2: enabled 0
703 14:30:54.400758 PCI: 00:16.3: enabled 0
704 14:30:54.404256 PCI: 00:16.4: enabled 0
705 14:30:54.407166 PCI: 00:16.5: enabled 0
706 14:30:54.407252 PCI: 00:17.0: enabled 1
707 14:30:54.410897 PCI: 00:19.0: enabled 1
708 14:30:54.413844 PCI: 00:19.1: enabled 0
709 14:30:54.417319 PCI: 00:19.2: enabled 0
710 14:30:54.417405 PCI: 00:1a.0: enabled 0
711 14:30:54.420561 PCI: 00:1c.0: enabled 0
712 14:30:54.424034 PCI: 00:1c.1: enabled 0
713 14:30:54.427353 PCI: 00:1c.2: enabled 0
714 14:30:54.427438 PCI: 00:1c.3: enabled 0
715 14:30:54.430611 PCI: 00:1c.4: enabled 0
716 14:30:54.434332 PCI: 00:1c.5: enabled 0
717 14:30:54.437418 PCI: 00:1c.6: enabled 0
718 14:30:54.437523 PCI: 00:1c.7: enabled 0
719 14:30:54.440804 PCI: 00:1d.0: enabled 1
720 14:30:54.444198 PCI: 00:1d.1: enabled 0
721 14:30:54.444285 PCI: 00:1d.2: enabled 0
722 14:30:54.447250 PCI: 00:1d.3: enabled 0
723 14:30:54.450871 PCI: 00:1d.4: enabled 0
724 14:30:54.454093 PCI: 00:1d.5: enabled 1
725 14:30:54.454178 PCI: 00:1e.0: enabled 1
726 14:30:54.457698 PCI: 00:1e.1: enabled 0
727 14:30:54.460774 PCI: 00:1e.2: enabled 1
728 14:30:54.464413 PCI: 00:1e.3: enabled 1
729 14:30:54.464499 PCI: 00:1f.0: enabled 1
730 14:30:54.467610 PCI: 00:1f.1: enabled 1
731 14:30:54.471178 PCI: 00:1f.2: enabled 1
732 14:30:54.471264 PCI: 00:1f.3: enabled 1
733 14:30:54.474349 PCI: 00:1f.4: enabled 1
734 14:30:54.477822 PCI: 00:1f.5: enabled 1
735 14:30:54.480718 PCI: 00:1f.6: enabled 0
736 14:30:54.480813 USB0 port 0: enabled 1
737 14:30:54.484308 I2C: 00:15: enabled 1
738 14:30:54.487363 I2C: 00:5d: enabled 1
739 14:30:54.487449 GENERIC: 0.0: enabled 1
740 14:30:54.490666 I2C: 00:1a: enabled 1
741 14:30:54.494404 I2C: 00:38: enabled 1
742 14:30:54.494491 I2C: 00:39: enabled 1
743 14:30:54.497314 I2C: 00:3a: enabled 1
744 14:30:54.501115 I2C: 00:3b: enabled 1
745 14:30:54.503934 PCI: 00:00.0: enabled 1
746 14:30:54.504020 SPI: 00: enabled 1
747 14:30:54.507447 SPI: 01: enabled 1
748 14:30:54.507532 PNP: 0c09.0: enabled 1
749 14:30:54.510555 USB2 port 0: enabled 1
750 14:30:54.514052 USB2 port 1: enabled 1
751 14:30:54.517068 USB2 port 2: enabled 0
752 14:30:54.517167 USB2 port 3: enabled 0
753 14:30:54.520528 USB2 port 5: enabled 0
754 14:30:54.523784 USB2 port 6: enabled 1
755 14:30:54.523904 USB2 port 9: enabled 1
756 14:30:54.527409 USB3 port 0: enabled 1
757 14:30:54.530489 USB3 port 1: enabled 1
758 14:30:54.530575 USB3 port 2: enabled 1
759 14:30:54.533918 USB3 port 3: enabled 1
760 14:30:54.537032 USB3 port 4: enabled 0
761 14:30:54.537118 APIC: 03: enabled 1
762 14:30:54.540600 APIC: 04: enabled 1
763 14:30:54.543766 APIC: 02: enabled 1
764 14:30:54.543852 APIC: 05: enabled 1
765 14:30:54.547099 APIC: 01: enabled 1
766 14:30:54.550543 APIC: 07: enabled 1
767 14:30:54.550629 APIC: 06: enabled 1
768 14:30:54.553733 Compare with tree...
769 14:30:54.557368 Root Device: enabled 1
770 14:30:54.557517 CPU_CLUSTER: 0: enabled 1
771 14:30:54.560282 APIC: 00: enabled 1
772 14:30:54.563505 APIC: 03: enabled 1
773 14:30:54.563591 APIC: 04: enabled 1
774 14:30:54.567026 APIC: 02: enabled 1
775 14:30:54.570688 APIC: 05: enabled 1
776 14:30:54.570774 APIC: 01: enabled 1
777 14:30:54.573920 APIC: 07: enabled 1
778 14:30:54.576856 APIC: 06: enabled 1
779 14:30:54.580442 DOMAIN: 0000: enabled 1
780 14:30:54.580529 PCI: 00:00.0: enabled 1
781 14:30:54.583533 PCI: 00:02.0: enabled 1
782 14:30:54.586644 PCI: 00:04.0: enabled 0
783 14:30:54.590203 PCI: 00:05.0: enabled 0
784 14:30:54.593660 PCI: 00:12.0: enabled 1
785 14:30:54.593746 PCI: 00:12.5: enabled 0
786 14:30:54.596998 PCI: 00:12.6: enabled 0
787 14:30:54.600282 PCI: 00:14.0: enabled 1
788 14:30:54.603166 USB0 port 0: enabled 1
789 14:30:54.606691 USB2 port 0: enabled 1
790 14:30:54.606777 USB2 port 1: enabled 1
791 14:30:54.610270 USB2 port 2: enabled 0
792 14:30:54.613301 USB2 port 3: enabled 0
793 14:30:54.616761 USB2 port 5: enabled 0
794 14:30:54.620264 USB2 port 6: enabled 1
795 14:30:54.620349 USB2 port 9: enabled 1
796 14:30:54.623290 USB3 port 0: enabled 1
797 14:30:54.626613 USB3 port 1: enabled 1
798 14:30:54.629878 USB3 port 2: enabled 1
799 14:30:54.633454 USB3 port 3: enabled 1
800 14:30:54.636433 USB3 port 4: enabled 0
801 14:30:54.636520 PCI: 00:14.1: enabled 0
802 14:30:54.639936 PCI: 00:14.3: enabled 1
803 14:30:54.643551 PCI: 00:14.5: enabled 0
804 14:30:54.646607 PCI: 00:15.0: enabled 1
805 14:30:54.646692 I2C: 00:15: enabled 1
806 14:30:54.650014 PCI: 00:15.1: enabled 1
807 14:30:54.653115 I2C: 00:5d: enabled 1
808 14:30:54.656444 GENERIC: 0.0: enabled 1
809 14:30:54.659925 PCI: 00:15.2: enabled 0
810 14:30:54.660011 PCI: 00:15.3: enabled 0
811 14:30:54.663114 PCI: 00:16.0: enabled 1
812 14:30:54.666291 PCI: 00:16.1: enabled 0
813 14:30:54.669655 PCI: 00:16.2: enabled 0
814 14:30:54.672959 PCI: 00:16.3: enabled 0
815 14:30:54.673046 PCI: 00:16.4: enabled 0
816 14:30:54.676260 PCI: 00:16.5: enabled 0
817 14:30:54.679786 PCI: 00:17.0: enabled 1
818 14:30:54.683037 PCI: 00:19.0: enabled 1
819 14:30:54.686163 I2C: 00:1a: enabled 1
820 14:30:54.686249 I2C: 00:38: enabled 1
821 14:30:54.689422 I2C: 00:39: enabled 1
822 14:30:54.692999 I2C: 00:3a: enabled 1
823 14:30:54.696123 I2C: 00:3b: enabled 1
824 14:30:54.696209 PCI: 00:19.1: enabled 0
825 14:30:54.699512 PCI: 00:19.2: enabled 0
826 14:30:54.702938 PCI: 00:1a.0: enabled 0
827 14:30:54.706030 PCI: 00:1c.0: enabled 0
828 14:30:54.709491 PCI: 00:1c.1: enabled 0
829 14:30:54.709593 PCI: 00:1c.2: enabled 0
830 14:30:54.712974 PCI: 00:1c.3: enabled 0
831 14:30:54.716023 PCI: 00:1c.4: enabled 0
832 14:30:54.719454 PCI: 00:1c.5: enabled 0
833 14:30:54.722785 PCI: 00:1c.6: enabled 0
834 14:30:54.722871 PCI: 00:1c.7: enabled 0
835 14:30:54.725797 PCI: 00:1d.0: enabled 1
836 14:30:54.729287 PCI: 00:1d.1: enabled 0
837 14:30:54.732658 PCI: 00:1d.2: enabled 0
838 14:30:54.735866 PCI: 00:1d.3: enabled 0
839 14:30:54.735952 PCI: 00:1d.4: enabled 0
840 14:30:54.739131 PCI: 00:1d.5: enabled 1
841 14:30:54.742591 PCI: 00:00.0: enabled 1
842 14:30:54.746160 PCI: 00:1e.0: enabled 1
843 14:30:54.749033 PCI: 00:1e.1: enabled 0
844 14:30:54.749128 PCI: 00:1e.2: enabled 1
845 14:30:54.752196 SPI: 00: enabled 1
846 14:30:54.755674 PCI: 00:1e.3: enabled 1
847 14:30:54.755759 SPI: 01: enabled 1
848 14:30:54.759231 PCI: 00:1f.0: enabled 1
849 14:30:54.762323 PNP: 0c09.0: enabled 1
850 14:30:54.765698 PCI: 00:1f.1: enabled 1
851 14:30:54.768944 PCI: 00:1f.2: enabled 1
852 14:30:54.769030 PCI: 00:1f.3: enabled 1
853 14:30:54.772540 PCI: 00:1f.4: enabled 1
854 14:30:54.775573 PCI: 00:1f.5: enabled 1
855 14:30:54.779031 PCI: 00:1f.6: enabled 0
856 14:30:54.782415 Root Device scanning...
857 14:30:54.785395 scan_static_bus for Root Device
858 14:30:54.785510 CPU_CLUSTER: 0 enabled
859 14:30:54.788870 DOMAIN: 0000 enabled
860 14:30:54.792085 DOMAIN: 0000 scanning...
861 14:30:54.795584 PCI: pci_scan_bus for bus 00
862 14:30:54.799070 PCI: 00:00.0 [8086/0000] ops
863 14:30:54.802436 PCI: 00:00.0 [8086/9b61] enabled
864 14:30:54.805846 PCI: 00:02.0 [8086/0000] bus ops
865 14:30:54.808800 PCI: 00:02.0 [8086/9b41] enabled
866 14:30:54.811999 PCI: 00:04.0 [8086/1903] disabled
867 14:30:54.815479 PCI: 00:08.0 [8086/1911] enabled
868 14:30:54.819012 PCI: 00:12.0 [8086/02f9] enabled
869 14:30:54.821956 PCI: 00:14.0 [8086/0000] bus ops
870 14:30:54.825353 PCI: 00:14.0 [8086/02ed] enabled
871 14:30:54.828953 PCI: 00:14.2 [8086/02ef] enabled
872 14:30:54.831897 PCI: 00:14.3 [8086/02f0] enabled
873 14:30:54.835219 PCI: 00:15.0 [8086/0000] bus ops
874 14:30:54.838482 PCI: 00:15.0 [8086/02e8] enabled
875 14:30:54.842094 PCI: 00:15.1 [8086/0000] bus ops
876 14:30:54.845272 PCI: 00:15.1 [8086/02e9] enabled
877 14:30:54.848571 PCI: 00:16.0 [8086/0000] ops
878 14:30:54.852261 PCI: 00:16.0 [8086/02e0] enabled
879 14:30:54.852346 PCI: 00:17.0 [8086/0000] ops
880 14:30:54.855164 PCI: 00:17.0 [8086/02d3] enabled
881 14:30:54.858806 PCI: 00:19.0 [8086/0000] bus ops
882 14:30:54.862242 PCI: 00:19.0 [8086/02c5] enabled
883 14:30:54.865366 PCI: 00:1d.0 [8086/0000] bus ops
884 14:30:54.868726 PCI: 00:1d.0 [8086/02b0] enabled
885 14:30:54.875159 PCI: Static device PCI: 00:1d.5 not found, disabling it.
886 14:30:54.878807 PCI: 00:1e.0 [8086/0000] ops
887 14:30:54.881808 PCI: 00:1e.0 [8086/02a8] enabled
888 14:30:54.885199 PCI: 00:1e.2 [8086/0000] bus ops
889 14:30:54.888803 PCI: 00:1e.2 [8086/02aa] enabled
890 14:30:54.891819 PCI: 00:1e.3 [8086/0000] bus ops
891 14:30:54.895276 PCI: 00:1e.3 [8086/02ab] enabled
892 14:30:54.898824 PCI: 00:1f.0 [8086/0000] bus ops
893 14:30:54.901792 PCI: 00:1f.0 [8086/0284] enabled
894 14:30:54.908573 PCI: Static device PCI: 00:1f.1 not found, disabling it.
895 14:30:54.911815 PCI: Static device PCI: 00:1f.2 not found, disabling it.
896 14:30:54.915257 PCI: 00:1f.3 [8086/0000] bus ops
897 14:30:54.918220 PCI: 00:1f.3 [8086/02c8] enabled
898 14:30:54.921777 PCI: 00:1f.4 [8086/0000] bus ops
899 14:30:54.925198 PCI: 00:1f.4 [8086/02a3] enabled
900 14:30:54.928284 PCI: 00:1f.5 [8086/0000] bus ops
901 14:30:54.931592 PCI: 00:1f.5 [8086/02a4] enabled
902 14:30:54.935199 PCI: Leftover static devices:
903 14:30:54.938384 PCI: 00:05.0
904 14:30:54.938470 PCI: 00:12.5
905 14:30:54.941695 PCI: 00:12.6
906 14:30:54.941780 PCI: 00:14.1
907 14:30:54.941848 PCI: 00:14.5
908 14:30:54.945133 PCI: 00:15.2
909 14:30:54.945219 PCI: 00:15.3
910 14:30:54.948611 PCI: 00:16.1
911 14:30:54.948696 PCI: 00:16.2
912 14:30:54.948783 PCI: 00:16.3
913 14:30:54.951588 PCI: 00:16.4
914 14:30:54.951674 PCI: 00:16.5
915 14:30:54.954991 PCI: 00:19.1
916 14:30:54.955086 PCI: 00:19.2
917 14:30:54.958010 PCI: 00:1a.0
918 14:30:54.958095 PCI: 00:1c.0
919 14:30:54.958163 PCI: 00:1c.1
920 14:30:54.961601 PCI: 00:1c.2
921 14:30:54.961687 PCI: 00:1c.3
922 14:30:54.965111 PCI: 00:1c.4
923 14:30:54.965197 PCI: 00:1c.5
924 14:30:54.965265 PCI: 00:1c.6
925 14:30:54.968165 PCI: 00:1c.7
926 14:30:54.968250 PCI: 00:1d.1
927 14:30:54.971528 PCI: 00:1d.2
928 14:30:54.971613 PCI: 00:1d.3
929 14:30:54.971682 PCI: 00:1d.4
930 14:30:54.974920 PCI: 00:1d.5
931 14:30:54.975005 PCI: 00:1e.1
932 14:30:54.977919 PCI: 00:1f.1
933 14:30:54.978016 PCI: 00:1f.2
934 14:30:54.981792 PCI: 00:1f.6
935 14:30:54.981878 PCI: Check your devicetree.cb.
936 14:30:54.984867 PCI: 00:02.0 scanning...
937 14:30:54.987844 scan_generic_bus for PCI: 00:02.0
938 14:30:54.991210 scan_generic_bus for PCI: 00:02.0 done
939 14:30:54.998240 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
940 14:30:55.001237 PCI: 00:14.0 scanning...
941 14:30:55.004866 scan_static_bus for PCI: 00:14.0
942 14:30:55.007847 USB0 port 0 enabled
943 14:30:55.007932 USB0 port 0 scanning...
944 14:30:55.011505 scan_static_bus for USB0 port 0
945 14:30:55.014674 USB2 port 0 enabled
946 14:30:55.018145 USB2 port 1 enabled
947 14:30:55.018230 USB2 port 2 disabled
948 14:30:55.021305 USB2 port 3 disabled
949 14:30:55.024692 USB2 port 5 disabled
950 14:30:55.024776 USB2 port 6 enabled
951 14:30:55.027836 USB2 port 9 enabled
952 14:30:55.027921 USB3 port 0 enabled
953 14:30:55.031363 USB3 port 1 enabled
954 14:30:55.034163 USB3 port 2 enabled
955 14:30:55.034248 USB3 port 3 enabled
956 14:30:55.037712 USB3 port 4 disabled
957 14:30:55.041275 USB2 port 0 scanning...
958 14:30:55.044231 scan_static_bus for USB2 port 0
959 14:30:55.047707 scan_static_bus for USB2 port 0 done
960 14:30:55.051064 scan_bus: scanning of bus USB2 port 0 took 9708 usecs
961 14:30:55.054275 USB2 port 1 scanning...
962 14:30:55.057702 scan_static_bus for USB2 port 1
963 14:30:55.061128 scan_static_bus for USB2 port 1 done
964 14:30:55.067548 scan_bus: scanning of bus USB2 port 1 took 9707 usecs
965 14:30:55.070717 USB2 port 6 scanning...
966 14:30:55.074005 scan_static_bus for USB2 port 6
967 14:30:55.077564 scan_static_bus for USB2 port 6 done
968 14:30:55.084231 scan_bus: scanning of bus USB2 port 6 took 9705 usecs
969 14:30:55.084338 USB2 port 9 scanning...
970 14:30:55.087753 scan_static_bus for USB2 port 9
971 14:30:55.090770 scan_static_bus for USB2 port 9 done
972 14:30:55.097458 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
973 14:30:55.100648 USB3 port 0 scanning...
974 14:30:55.104149 scan_static_bus for USB3 port 0
975 14:30:55.107743 scan_static_bus for USB3 port 0 done
976 14:30:55.113859 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
977 14:30:55.113935 USB3 port 1 scanning...
978 14:30:55.117132 scan_static_bus for USB3 port 1
979 14:30:55.120931 scan_static_bus for USB3 port 1 done
980 14:30:55.127528 scan_bus: scanning of bus USB3 port 1 took 9706 usecs
981 14:30:55.131027 USB3 port 2 scanning...
982 14:30:55.134013 scan_static_bus for USB3 port 2
983 14:30:55.137517 scan_static_bus for USB3 port 2 done
984 14:30:55.144055 scan_bus: scanning of bus USB3 port 2 took 9689 usecs
985 14:30:55.144131 USB3 port 3 scanning...
986 14:30:55.147579 scan_static_bus for USB3 port 3
987 14:30:55.150457 scan_static_bus for USB3 port 3 done
988 14:30:55.157494 scan_bus: scanning of bus USB3 port 3 took 9705 usecs
989 14:30:55.160512 scan_static_bus for USB0 port 0 done
990 14:30:55.167134 scan_bus: scanning of bus USB0 port 0 took 155371 usecs
991 14:30:55.170703 scan_static_bus for PCI: 00:14.0 done
992 14:30:55.177449 scan_bus: scanning of bus PCI: 00:14.0 took 172984 usecs
993 14:30:55.177569 PCI: 00:15.0 scanning...
994 14:30:55.184185 scan_generic_bus for PCI: 00:15.0
995 14:30:55.187530 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
996 14:30:55.190727 scan_generic_bus for PCI: 00:15.0 done
997 14:30:55.197418 scan_bus: scanning of bus PCI: 00:15.0 took 14309 usecs
998 14:30:55.197539 PCI: 00:15.1 scanning...
999 14:30:55.200714 scan_generic_bus for PCI: 00:15.1
1000 14:30:55.207329 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1001 14:30:55.210788 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1002 14:30:55.213677 scan_generic_bus for PCI: 00:15.1 done
1003 14:30:55.220197 scan_bus: scanning of bus PCI: 00:15.1 took 18588 usecs
1004 14:30:55.223614 PCI: 00:19.0 scanning...
1005 14:30:55.227013 scan_generic_bus for PCI: 00:19.0
1006 14:30:55.230074 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1007 14:30:55.233444 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1008 14:30:55.240031 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1009 14:30:55.243447 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1010 14:30:55.247090 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1011 14:30:55.250105 scan_generic_bus for PCI: 00:19.0 done
1012 14:30:55.256950 scan_bus: scanning of bus PCI: 00:19.0 took 30737 usecs
1013 14:30:55.260024 PCI: 00:1d.0 scanning...
1014 14:30:55.263439 do_pci_scan_bridge for PCI: 00:1d.0
1015 14:30:55.266987 PCI: pci_scan_bus for bus 01
1016 14:30:55.269899 PCI: 01:00.0 [1c5c/1327] enabled
1017 14:30:55.273637 Enabling Common Clock Configuration
1018 14:30:55.276604 L1 Sub-State supported from root port 29
1019 14:30:55.279834 L1 Sub-State Support = 0xf
1020 14:30:55.283484 CommonModeRestoreTime = 0x28
1021 14:30:55.286923 Power On Value = 0x16, Power On Scale = 0x0
1022 14:30:55.289905 ASPM: Enabled L1
1023 14:30:55.293507 scan_bus: scanning of bus PCI: 00:1d.0 took 32798 usecs
1024 14:30:55.296879 PCI: 00:1e.2 scanning...
1025 14:30:55.300171 scan_generic_bus for PCI: 00:1e.2
1026 14:30:55.303050 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1027 14:30:55.309753 scan_generic_bus for PCI: 00:1e.2 done
1028 14:30:55.313020 scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs
1029 14:30:55.316424 PCI: 00:1e.3 scanning...
1030 14:30:55.319966 scan_generic_bus for PCI: 00:1e.3
1031 14:30:55.322985 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1032 14:30:55.326553 scan_generic_bus for PCI: 00:1e.3 done
1033 14:30:55.332882 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1034 14:30:55.336280 PCI: 00:1f.0 scanning...
1035 14:30:55.339821 scan_static_bus for PCI: 00:1f.0
1036 14:30:55.342926 PNP: 0c09.0 enabled
1037 14:30:55.346490 scan_static_bus for PCI: 00:1f.0 done
1038 14:30:55.349646 scan_bus: scanning of bus PCI: 00:1f.0 took 12057 usecs
1039 14:30:55.353321 PCI: 00:1f.3 scanning...
1040 14:30:55.359589 scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs
1041 14:30:55.363217 PCI: 00:1f.4 scanning...
1042 14:30:55.366158 scan_generic_bus for PCI: 00:1f.4
1043 14:30:55.369710 scan_generic_bus for PCI: 00:1f.4 done
1044 14:30:55.376263 scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
1045 14:30:55.376348 PCI: 00:1f.5 scanning...
1046 14:30:55.382520 scan_generic_bus for PCI: 00:1f.5
1047 14:30:55.386174 scan_generic_bus for PCI: 00:1f.5 done
1048 14:30:55.389578 scan_bus: scanning of bus PCI: 00:1f.5 took 10195 usecs
1049 14:30:55.396083 scan_bus: scanning of bus DOMAIN: 0000 took 605042 usecs
1050 14:30:55.399540 scan_static_bus for Root Device done
1051 14:30:55.405846 scan_bus: scanning of bus Root Device took 624905 usecs
1052 14:30:55.405930 done
1053 14:30:55.409197 Chrome EC: UHEPI supported
1054 14:30:55.416151 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1055 14:30:55.423037 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 14:30:55.425688 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1057 14:30:55.433958 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1058 14:30:55.437378 SPI flash protection: WPSW=0 SRP0=0
1059 14:30:55.443972 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 14:30:55.447499 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1061 14:30:55.450485 found VGA at PCI: 00:02.0
1062 14:30:55.454066 Setting up VGA for PCI: 00:02.0
1063 14:30:55.460599 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 14:30:55.464055 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 14:30:55.466991 Allocating resources...
1066 14:30:55.470126 Reading resources...
1067 14:30:55.473616 Root Device read_resources bus 0 link: 0
1068 14:30:55.477187 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1069 14:30:55.483932 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1070 14:30:55.486808 DOMAIN: 0000 read_resources bus 0 link: 0
1071 14:30:55.494440 PCI: 00:14.0 read_resources bus 0 link: 0
1072 14:30:55.497340 USB0 port 0 read_resources bus 0 link: 0
1073 14:30:55.505560 USB0 port 0 read_resources bus 0 link: 0 done
1074 14:30:55.509023 PCI: 00:14.0 read_resources bus 0 link: 0 done
1075 14:30:55.516483 PCI: 00:15.0 read_resources bus 1 link: 0
1076 14:30:55.519870 PCI: 00:15.0 read_resources bus 1 link: 0 done
1077 14:30:55.526267 PCI: 00:15.1 read_resources bus 2 link: 0
1078 14:30:55.529373 PCI: 00:15.1 read_resources bus 2 link: 0 done
1079 14:30:55.537259 PCI: 00:19.0 read_resources bus 3 link: 0
1080 14:30:55.543589 PCI: 00:19.0 read_resources bus 3 link: 0 done
1081 14:30:55.547102 PCI: 00:1d.0 read_resources bus 1 link: 0
1082 14:30:55.553666 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1083 14:30:55.557266 PCI: 00:1e.2 read_resources bus 4 link: 0
1084 14:30:55.563855 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1085 14:30:55.566763 PCI: 00:1e.3 read_resources bus 5 link: 0
1086 14:30:55.573559 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1087 14:30:55.576988 PCI: 00:1f.0 read_resources bus 0 link: 0
1088 14:30:55.583538 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1089 14:30:55.590241 DOMAIN: 0000 read_resources bus 0 link: 0 done
1090 14:30:55.593659 Root Device read_resources bus 0 link: 0 done
1091 14:30:55.596595 Done reading resources.
1092 14:30:55.600258 Show resources in subtree (Root Device)...After reading.
1093 14:30:55.606791 Root Device child on link 0 CPU_CLUSTER: 0
1094 14:30:55.610491 CPU_CLUSTER: 0 child on link 0 APIC: 00
1095 14:30:55.610575 APIC: 00
1096 14:30:55.613414 APIC: 03
1097 14:30:55.613522 APIC: 04
1098 14:30:55.616511 APIC: 02
1099 14:30:55.616595 APIC: 05
1100 14:30:55.616663 APIC: 01
1101 14:30:55.620148 APIC: 07
1102 14:30:55.620233 APIC: 06
1103 14:30:55.623222 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1104 14:30:55.633445 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1105 14:30:55.643484 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1106 14:30:55.693120 PCI: 00:00.0
1107 14:30:55.693526 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1108 14:30:55.693664 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1109 14:30:55.693807 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1110 14:30:55.694146 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1111 14:30:55.694587 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1112 14:30:55.743478 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1113 14:30:55.743984 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1114 14:30:55.744433 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1115 14:30:55.744776 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1116 14:30:55.745149 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1117 14:30:55.760825 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1118 14:30:55.764257 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1119 14:30:55.767691 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1120 14:30:55.777560 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1121 14:30:55.787072 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1122 14:30:55.796910 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1123 14:30:55.797384 PCI: 00:02.0
1124 14:30:55.807111 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 14:30:55.817437 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 14:30:55.827060 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 14:30:55.827498 PCI: 00:04.0
1128 14:30:55.830542 PCI: 00:08.0
1129 14:30:55.840257 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 14:30:55.840727 PCI: 00:12.0
1131 14:30:55.850279 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 14:30:55.857137 PCI: 00:14.0 child on link 0 USB0 port 0
1133 14:30:55.867331 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1134 14:30:55.870063 USB0 port 0 child on link 0 USB2 port 0
1135 14:30:55.870541 USB2 port 0
1136 14:30:55.873590 USB2 port 1
1137 14:30:55.876561 USB2 port 2
1138 14:30:55.877000 USB2 port 3
1139 14:30:55.880078 USB2 port 5
1140 14:30:55.880512 USB2 port 6
1141 14:30:55.883537 USB2 port 9
1142 14:30:55.883973 USB3 port 0
1143 14:30:55.886685 USB3 port 1
1144 14:30:55.887139 USB3 port 2
1145 14:30:55.890324 USB3 port 3
1146 14:30:55.890762 USB3 port 4
1147 14:30:55.893513 PCI: 00:14.2
1148 14:30:55.903240 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1149 14:30:55.912901 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1150 14:30:55.912986 PCI: 00:14.3
1151 14:30:55.922923 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 14:30:55.929406 PCI: 00:15.0 child on link 0 I2C: 01:15
1153 14:30:55.939497 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 14:30:55.939583 I2C: 01:15
1155 14:30:55.943162 PCI: 00:15.1 child on link 0 I2C: 02:5d
1156 14:30:55.952919 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 14:30:55.956194 I2C: 02:5d
1158 14:30:55.956278 GENERIC: 0.0
1159 14:30:55.959391 PCI: 00:16.0
1160 14:30:55.969478 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 14:30:55.969612 PCI: 00:17.0
1162 14:30:55.979436 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1163 14:30:55.989390 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1164 14:30:55.995918 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1165 14:30:56.005576 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1166 14:30:56.012329 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1167 14:30:56.022354 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1168 14:30:56.025359 PCI: 00:19.0 child on link 0 I2C: 03:1a
1169 14:30:56.035541 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 14:30:56.038781 I2C: 03:1a
1171 14:30:56.038867 I2C: 03:38
1172 14:30:56.041973 I2C: 03:39
1173 14:30:56.042060 I2C: 03:3a
1174 14:30:56.045349 I2C: 03:3b
1175 14:30:56.048711 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1176 14:30:56.058732 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 14:30:56.068534 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 14:30:56.075386 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 14:30:56.078563 PCI: 01:00.0
1180 14:30:56.088746 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 14:30:56.088841 PCI: 00:1e.0
1182 14:30:56.101834 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1183 14:30:56.111399 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 14:30:56.115162 PCI: 00:1e.2 child on link 0 SPI: 00
1185 14:30:56.124638 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 14:30:56.124724 SPI: 00
1187 14:30:56.128395 PCI: 00:1e.3 child on link 0 SPI: 01
1188 14:30:56.137805 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 14:30:56.141276 SPI: 01
1190 14:30:56.145136 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1191 14:30:56.154693 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1192 14:30:56.164298 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1193 14:30:56.164383 PNP: 0c09.0
1194 14:30:56.174947 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1195 14:30:56.175033 PCI: 00:1f.3
1196 14:30:56.184086 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 14:30:56.194680 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1198 14:30:56.197566 PCI: 00:1f.4
1199 14:30:56.204106 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1200 14:30:56.213998 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1201 14:30:56.217603 PCI: 00:1f.5
1202 14:30:56.227250 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1203 14:30:56.233857 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1204 14:30:56.240486 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1205 14:30:56.247220 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1206 14:30:56.250834 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1207 14:30:56.253728 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1208 14:30:56.257223 PCI: 00:17.0 18 * [0x60 - 0x67] io
1209 14:30:56.260612 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1210 14:30:56.267209 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1211 14:30:56.273652 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1212 14:30:56.280195 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1213 14:30:56.290268 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1214 14:30:56.296741 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1215 14:30:56.300002 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1216 14:30:56.310213 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1217 14:30:56.313616 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1218 14:30:56.316738 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1219 14:30:56.323308 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1220 14:30:56.326765 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1221 14:30:56.333390 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1222 14:30:56.336360 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1223 14:30:56.342911 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1224 14:30:56.346400 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1225 14:30:56.353257 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1226 14:30:56.356334 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1227 14:30:56.363320 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1228 14:30:56.366762 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1229 14:30:56.369815 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1230 14:30:56.376428 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1231 14:30:56.379474 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1232 14:30:56.386396 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1233 14:30:56.389628 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1234 14:30:56.396250 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1235 14:30:56.399336 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1236 14:30:56.406200 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1237 14:30:56.409540 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1238 14:30:56.415977 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1239 14:30:56.419340 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1240 14:30:56.429581 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1241 14:30:56.432643 avoid_fixed_resources: DOMAIN: 0000
1242 14:30:56.439307 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 14:30:56.442671 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 14:30:56.452759 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 14:30:56.459147 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1246 14:30:56.465642 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1247 14:30:56.475792 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1248 14:30:56.482477 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1249 14:30:56.488853 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 14:30:56.498723 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 14:30:56.505808 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 14:30:56.512230 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 14:30:56.518870 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 14:30:56.522262 Setting resources...
1255 14:30:56.528628 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 14:30:56.532370 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 14:30:56.535228 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 14:30:56.538722 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 14:30:56.545434 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 14:30:56.551827 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 14:30:56.555407 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 14:30:56.561846 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 14:30:56.571714 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1264 14:30:56.575175 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1265 14:30:56.581940 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1266 14:30:56.584973 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1267 14:30:56.591645 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1268 14:30:56.595207 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1269 14:30:56.601847 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1270 14:30:56.605080 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1271 14:30:56.608448 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1272 14:30:56.614921 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1273 14:30:56.618211 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1274 14:30:56.625029 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1275 14:30:56.627999 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1276 14:30:56.635125 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1277 14:30:56.638117 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1278 14:30:56.644860 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1279 14:30:56.647945 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1280 14:30:56.655062 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1281 14:30:56.657955 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1282 14:30:56.664883 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1283 14:30:56.668249 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1284 14:30:56.674590 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1285 14:30:56.677829 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1286 14:30:56.681458 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 14:30:56.691042 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 14:30:56.697604 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 14:30:56.704324 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 14:30:56.711226 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 14:30:56.718034 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 14:30:56.724260 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 14:30:56.727370 Root Device assign_resources, bus 0 link: 0
1294 14:30:56.734092 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 14:30:56.740864 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 14:30:56.751070 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 14:30:56.757525 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 14:30:56.767398 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 14:30:56.773958 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 14:30:56.783900 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 14:30:56.787262 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 14:30:56.794007 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 14:30:56.800316 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 14:30:56.807279 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 14:30:56.817611 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 14:30:56.824336 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 14:30:56.830915 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 14:30:56.834125 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 14:30:56.844169 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 14:30:56.847217 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 14:30:56.850662 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 14:30:56.861066 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 14:30:56.867269 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 14:30:56.877379 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 14:30:56.884079 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 14:30:56.891029 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 14:30:56.900640 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 14:30:56.907164 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 14:30:56.913791 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 14:30:56.920420 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 14:30:56.923699 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 14:30:56.934027 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1323 14:30:56.943699 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1324 14:30:56.949964 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1325 14:30:56.953610 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1326 14:30:56.963706 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1327 14:30:56.967312 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 14:30:56.977272 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1329 14:30:56.983552 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1330 14:30:56.990586 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1331 14:30:56.993747 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 14:30:57.003533 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1333 14:30:57.007087 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1334 14:30:57.010216 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 14:30:57.016880 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1336 14:30:57.020397 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 14:30:57.027037 LPC: Trying to open IO window from 800 size 1ff
1338 14:30:57.033777 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1339 14:30:57.043612 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1340 14:30:57.050565 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1341 14:30:57.060344 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1342 14:30:57.063324 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 14:30:57.070166 Root Device assign_resources, bus 0 link: 0
1344 14:30:57.070586 Done setting resources.
1345 14:30:57.076683 Show resources in subtree (Root Device)...After assigning values.
1346 14:30:57.083195 Root Device child on link 0 CPU_CLUSTER: 0
1347 14:30:57.086563 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 14:30:57.086993 APIC: 00
1349 14:30:57.090030 APIC: 03
1350 14:30:57.090458 APIC: 04
1351 14:30:57.090800 APIC: 02
1352 14:30:57.093015 APIC: 05
1353 14:30:57.093439 APIC: 01
1354 14:30:57.096496 APIC: 07
1355 14:30:57.096921 APIC: 06
1356 14:30:57.099935 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1357 14:30:57.109652 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1358 14:30:57.122919 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1359 14:30:57.123345 PCI: 00:00.0
1360 14:30:57.133007 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1361 14:30:57.142762 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1362 14:30:57.153096 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1363 14:30:57.159107 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1364 14:30:57.169287 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1365 14:30:57.179123 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1366 14:30:57.188959 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1367 14:30:57.198245 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1368 14:30:57.208388 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1369 14:30:57.214954 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1370 14:30:57.224490 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1371 14:30:57.234663 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1372 14:30:57.244404 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1373 14:30:57.254167 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1374 14:30:57.263931 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1375 14:30:57.274123 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1376 14:30:57.274209 PCI: 00:02.0
1377 14:30:57.284110 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1378 14:30:57.296963 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1379 14:30:57.304079 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1380 14:30:57.307187 PCI: 00:04.0
1381 14:30:57.307271 PCI: 00:08.0
1382 14:30:57.316905 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1383 14:30:57.320280 PCI: 00:12.0
1384 14:30:57.330313 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1385 14:30:57.333380 PCI: 00:14.0 child on link 0 USB0 port 0
1386 14:30:57.346662 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1387 14:30:57.350293 USB0 port 0 child on link 0 USB2 port 0
1388 14:30:57.350378 USB2 port 0
1389 14:30:57.353658 USB2 port 1
1390 14:30:57.353743 USB2 port 2
1391 14:30:57.356685 USB2 port 3
1392 14:30:57.360292 USB2 port 5
1393 14:30:57.360377 USB2 port 6
1394 14:30:57.363522 USB2 port 9
1395 14:30:57.363607 USB3 port 0
1396 14:30:57.366566 USB3 port 1
1397 14:30:57.366651 USB3 port 2
1398 14:30:57.370170 USB3 port 3
1399 14:30:57.370255 USB3 port 4
1400 14:30:57.373412 PCI: 00:14.2
1401 14:30:57.382970 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1402 14:30:57.393290 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1403 14:30:57.393377 PCI: 00:14.3
1404 14:30:57.406248 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1405 14:30:57.409858 PCI: 00:15.0 child on link 0 I2C: 01:15
1406 14:30:57.419640 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1407 14:30:57.419726 I2C: 01:15
1408 14:30:57.426262 PCI: 00:15.1 child on link 0 I2C: 02:5d
1409 14:30:57.436344 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1410 14:30:57.436434 I2C: 02:5d
1411 14:30:57.439466 GENERIC: 0.0
1412 14:30:57.439551 PCI: 00:16.0
1413 14:30:57.449313 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1414 14:30:57.452567 PCI: 00:17.0
1415 14:30:57.462814 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1416 14:30:57.472591 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1417 14:30:57.482542 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1418 14:30:57.492308 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1419 14:30:57.498813 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1420 14:30:57.508768 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1421 14:30:57.515797 PCI: 00:19.0 child on link 0 I2C: 03:1a
1422 14:30:57.525577 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1423 14:30:57.525664 I2C: 03:1a
1424 14:30:57.528610 I2C: 03:38
1425 14:30:57.528695 I2C: 03:39
1426 14:30:57.532032 I2C: 03:3a
1427 14:30:57.532117 I2C: 03:3b
1428 14:30:57.538871 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1429 14:30:57.545370 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 14:30:57.555226 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 14:30:57.568193 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1432 14:30:57.568279 PCI: 01:00.0
1433 14:30:57.578479 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1434 14:30:57.581581 PCI: 00:1e.0
1435 14:30:57.591508 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1436 14:30:57.601375 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1437 14:30:57.605020 PCI: 00:1e.2 child on link 0 SPI: 00
1438 14:30:57.618090 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1439 14:30:57.618176 SPI: 00
1440 14:30:57.620992 PCI: 00:1e.3 child on link 0 SPI: 01
1441 14:30:57.630989 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1442 14:30:57.634532 SPI: 01
1443 14:30:57.637638 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1444 14:30:57.647498 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1445 14:30:57.654013 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1446 14:30:57.657648 PNP: 0c09.0
1447 14:30:57.664022 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 14:30:57.667731 PCI: 00:1f.3
1449 14:30:57.677192 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 14:30:57.687325 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 14:30:57.690874 PCI: 00:1f.4
1452 14:30:57.697561 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 14:30:57.710539 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 14:30:57.710621 PCI: 00:1f.5
1455 14:30:57.720448 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1456 14:30:57.723917 Done allocating resources.
1457 14:30:57.730179 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1458 14:30:57.730263 Enabling resources...
1459 14:30:57.737636 PCI: 00:00.0 subsystem <- 8086/9b61
1460 14:30:57.737720 PCI: 00:00.0 cmd <- 06
1461 14:30:57.741207 PCI: 00:02.0 subsystem <- 8086/9b41
1462 14:30:57.744276 PCI: 00:02.0 cmd <- 03
1463 14:30:57.747766 PCI: 00:08.0 cmd <- 06
1464 14:30:57.751167 PCI: 00:12.0 subsystem <- 8086/02f9
1465 14:30:57.754245 PCI: 00:12.0 cmd <- 02
1466 14:30:57.757811 PCI: 00:14.0 subsystem <- 8086/02ed
1467 14:30:57.760886 PCI: 00:14.0 cmd <- 02
1468 14:30:57.764204 PCI: 00:14.2 cmd <- 02
1469 14:30:57.767656 PCI: 00:14.3 subsystem <- 8086/02f0
1470 14:30:57.767740 PCI: 00:14.3 cmd <- 02
1471 14:30:57.774278 PCI: 00:15.0 subsystem <- 8086/02e8
1472 14:30:57.774361 PCI: 00:15.0 cmd <- 02
1473 14:30:57.777331 PCI: 00:15.1 subsystem <- 8086/02e9
1474 14:30:57.781001 PCI: 00:15.1 cmd <- 02
1475 14:30:57.784519 PCI: 00:16.0 subsystem <- 8086/02e0
1476 14:30:57.787679 PCI: 00:16.0 cmd <- 02
1477 14:30:57.791119 PCI: 00:17.0 subsystem <- 8086/02d3
1478 14:30:57.794005 PCI: 00:17.0 cmd <- 03
1479 14:30:57.797755 PCI: 00:19.0 subsystem <- 8086/02c5
1480 14:30:57.801137 PCI: 00:19.0 cmd <- 02
1481 14:30:57.804141 PCI: 00:1d.0 bridge ctrl <- 0013
1482 14:30:57.807768 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 14:30:57.810734 PCI: 00:1d.0 cmd <- 06
1484 14:30:57.814227 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 14:30:57.817422 PCI: 00:1e.0 cmd <- 06
1486 14:30:57.820796 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 14:30:57.820879 PCI: 00:1e.2 cmd <- 06
1488 14:30:57.827809 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 14:30:57.827892 PCI: 00:1e.3 cmd <- 02
1490 14:30:57.830945 PCI: 00:1f.0 subsystem <- 8086/0284
1491 14:30:57.834321 PCI: 00:1f.0 cmd <- 407
1492 14:30:57.837726 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 14:30:57.840735 PCI: 00:1f.3 cmd <- 02
1494 14:30:57.844294 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 14:30:57.847411 PCI: 00:1f.4 cmd <- 03
1496 14:30:57.850888 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 14:30:57.854317 PCI: 00:1f.5 cmd <- 406
1498 14:30:57.862788 PCI: 01:00.0 cmd <- 02
1499 14:30:57.868334 done.
1500 14:30:57.881381 ME: Version: 14.0.39.1367
1501 14:30:57.887870 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1502 14:30:57.891812 Initializing devices...
1503 14:30:57.891895 Root Device init ...
1504 14:30:57.897976 Chrome EC: Set SMI mask to 0x0000000000000000
1505 14:30:57.900844 Chrome EC: clear events_b mask to 0x0000000000000000
1506 14:30:57.907967 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1507 14:30:57.914767 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1508 14:30:57.920965 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1509 14:30:57.924239 Chrome EC: Set WAKE mask to 0x0000000000000000
1510 14:30:57.927685 Root Device init finished in 35265 usecs
1511 14:30:57.931462 CPU_CLUSTER: 0 init ...
1512 14:30:57.937869 CPU_CLUSTER: 0 init finished in 2446 usecs
1513 14:30:57.942133 PCI: 00:00.0 init ...
1514 14:30:57.945555 CPU TDP: 15 Watts
1515 14:30:57.948591 CPU PL2 = 64 Watts
1516 14:30:57.952305 PCI: 00:00.0 init finished in 7073 usecs
1517 14:30:57.955080 PCI: 00:02.0 init ...
1518 14:30:57.958797 PCI: 00:02.0 init finished in 2253 usecs
1519 14:30:57.962184 PCI: 00:08.0 init ...
1520 14:30:57.965388 PCI: 00:08.0 init finished in 2252 usecs
1521 14:30:57.968362 PCI: 00:12.0 init ...
1522 14:30:57.971643 PCI: 00:12.0 init finished in 2252 usecs
1523 14:30:57.975312 PCI: 00:14.0 init ...
1524 14:30:57.978443 PCI: 00:14.0 init finished in 2243 usecs
1525 14:30:57.981511 PCI: 00:14.2 init ...
1526 14:30:57.985083 PCI: 00:14.2 init finished in 2252 usecs
1527 14:30:57.988616 PCI: 00:14.3 init ...
1528 14:30:57.991695 PCI: 00:14.3 init finished in 2268 usecs
1529 14:30:57.995275 PCI: 00:15.0 init ...
1530 14:30:57.998517 DW I2C bus 0 at 0xd121f000 (400 KHz)
1531 14:30:58.001856 PCI: 00:15.0 init finished in 5974 usecs
1532 14:30:58.004731 PCI: 00:15.1 init ...
1533 14:30:58.008364 DW I2C bus 1 at 0xd1220000 (400 KHz)
1534 14:30:58.014907 PCI: 00:15.1 init finished in 5975 usecs
1535 14:30:58.014991 PCI: 00:16.0 init ...
1536 14:30:58.021386 PCI: 00:16.0 init finished in 2251 usecs
1537 14:30:58.025121 PCI: 00:19.0 init ...
1538 14:30:58.028375 DW I2C bus 4 at 0xd1222000 (400 KHz)
1539 14:30:58.031380 PCI: 00:19.0 init finished in 5974 usecs
1540 14:30:58.034887 PCI: 00:1d.0 init ...
1541 14:30:58.037847 Initializing PCH PCIe bridge.
1542 14:30:58.041373 PCI: 00:1d.0 init finished in 5283 usecs
1543 14:30:58.044445 PCI: 00:1f.0 init ...
1544 14:30:58.047607 IOAPIC: Initializing IOAPIC at 0xfec00000
1545 14:30:58.054748 IOAPIC: Bootstrap Processor Local APIC = 0x00
1546 14:30:58.054833 IOAPIC: ID = 0x02
1547 14:30:58.057731 IOAPIC: Dumping registers
1548 14:30:58.061384 reg 0x0000: 0x02000000
1549 14:30:58.064252 reg 0x0001: 0x00770020
1550 14:30:58.064336 reg 0x0002: 0x00000000
1551 14:30:58.070828 PCI: 00:1f.0 init finished in 23537 usecs
1552 14:30:58.074186 PCI: 00:1f.4 init ...
1553 14:30:58.077536 PCI: 00:1f.4 init finished in 2261 usecs
1554 14:30:58.088288 PCI: 01:00.0 init ...
1555 14:30:58.091294 PCI: 01:00.0 init finished in 2251 usecs
1556 14:30:58.095723 PNP: 0c09.0 init ...
1557 14:30:58.099125 Google Chrome EC uptime: 11.093 seconds
1558 14:30:58.105698 Google Chrome AP resets since EC boot: 0
1559 14:30:58.109310 Google Chrome most recent AP reset causes:
1560 14:30:58.115366 Google Chrome EC reset flags at last EC boot: reset-pin
1561 14:30:58.119089 PNP: 0c09.0 init finished in 20647 usecs
1562 14:30:58.122237 Devices initialized
1563 14:30:58.125264 Show all devs... After init.
1564 14:30:58.125349 Root Device: enabled 1
1565 14:30:58.128537 CPU_CLUSTER: 0: enabled 1
1566 14:30:58.131967 DOMAIN: 0000: enabled 1
1567 14:30:58.132059 APIC: 00: enabled 1
1568 14:30:58.135286 PCI: 00:00.0: enabled 1
1569 14:30:58.138495 PCI: 00:02.0: enabled 1
1570 14:30:58.141441 PCI: 00:04.0: enabled 0
1571 14:30:58.141535 PCI: 00:05.0: enabled 0
1572 14:30:58.145160 PCI: 00:12.0: enabled 1
1573 14:30:58.148787 PCI: 00:12.5: enabled 0
1574 14:30:58.151436 PCI: 00:12.6: enabled 0
1575 14:30:58.151524 PCI: 00:14.0: enabled 1
1576 14:30:58.154886 PCI: 00:14.1: enabled 0
1577 14:30:58.158442 PCI: 00:14.3: enabled 1
1578 14:30:58.161425 PCI: 00:14.5: enabled 0
1579 14:30:58.161540 PCI: 00:15.0: enabled 1
1580 14:30:58.164921 PCI: 00:15.1: enabled 1
1581 14:30:58.168364 PCI: 00:15.2: enabled 0
1582 14:30:58.168438 PCI: 00:15.3: enabled 0
1583 14:30:58.171411 PCI: 00:16.0: enabled 1
1584 14:30:58.174918 PCI: 00:16.1: enabled 0
1585 14:30:58.177990 PCI: 00:16.2: enabled 0
1586 14:30:58.178066 PCI: 00:16.3: enabled 0
1587 14:30:58.181820 PCI: 00:16.4: enabled 0
1588 14:30:58.184736 PCI: 00:16.5: enabled 0
1589 14:30:58.188228 PCI: 00:17.0: enabled 1
1590 14:30:58.188313 PCI: 00:19.0: enabled 1
1591 14:30:58.191177 PCI: 00:19.1: enabled 0
1592 14:30:58.194299 PCI: 00:19.2: enabled 0
1593 14:30:58.197697 PCI: 00:1a.0: enabled 0
1594 14:30:58.197782 PCI: 00:1c.0: enabled 0
1595 14:30:58.201304 PCI: 00:1c.1: enabled 0
1596 14:30:58.204240 PCI: 00:1c.2: enabled 0
1597 14:30:58.207772 PCI: 00:1c.3: enabled 0
1598 14:30:58.207857 PCI: 00:1c.4: enabled 0
1599 14:30:58.211152 PCI: 00:1c.5: enabled 0
1600 14:30:58.214122 PCI: 00:1c.6: enabled 0
1601 14:30:58.217536 PCI: 00:1c.7: enabled 0
1602 14:30:58.217621 PCI: 00:1d.0: enabled 1
1603 14:30:58.221285 PCI: 00:1d.1: enabled 0
1604 14:30:58.224261 PCI: 00:1d.2: enabled 0
1605 14:30:58.224346 PCI: 00:1d.3: enabled 0
1606 14:30:58.227656 PCI: 00:1d.4: enabled 0
1607 14:30:58.230809 PCI: 00:1d.5: enabled 0
1608 14:30:58.234026 PCI: 00:1e.0: enabled 1
1609 14:30:58.234110 PCI: 00:1e.1: enabled 0
1610 14:30:58.237586 PCI: 00:1e.2: enabled 1
1611 14:30:58.240692 PCI: 00:1e.3: enabled 1
1612 14:30:58.243882 PCI: 00:1f.0: enabled 1
1613 14:30:58.243967 PCI: 00:1f.1: enabled 0
1614 14:30:58.247473 PCI: 00:1f.2: enabled 0
1615 14:30:58.250583 PCI: 00:1f.3: enabled 1
1616 14:30:58.253970 PCI: 00:1f.4: enabled 1
1617 14:30:58.254062 PCI: 00:1f.5: enabled 1
1618 14:30:58.257435 PCI: 00:1f.6: enabled 0
1619 14:30:58.260518 USB0 port 0: enabled 1
1620 14:30:58.260599 I2C: 01:15: enabled 1
1621 14:30:58.264070 I2C: 02:5d: enabled 1
1622 14:30:58.267438 GENERIC: 0.0: enabled 1
1623 14:30:58.267518 I2C: 03:1a: enabled 1
1624 14:30:58.270554 I2C: 03:38: enabled 1
1625 14:30:58.274018 I2C: 03:39: enabled 1
1626 14:30:58.277137 I2C: 03:3a: enabled 1
1627 14:30:58.277213 I2C: 03:3b: enabled 1
1628 14:30:58.280142 PCI: 00:00.0: enabled 1
1629 14:30:58.283661 SPI: 00: enabled 1
1630 14:30:58.283744 SPI: 01: enabled 1
1631 14:30:58.287208 PNP: 0c09.0: enabled 1
1632 14:30:58.290532 USB2 port 0: enabled 1
1633 14:30:58.290610 USB2 port 1: enabled 1
1634 14:30:58.293616 USB2 port 2: enabled 0
1635 14:30:58.297076 USB2 port 3: enabled 0
1636 14:30:58.297153 USB2 port 5: enabled 0
1637 14:30:58.300252 USB2 port 6: enabled 1
1638 14:30:58.303370 USB2 port 9: enabled 1
1639 14:30:58.303448 USB3 port 0: enabled 1
1640 14:30:58.306795 USB3 port 1: enabled 1
1641 14:30:58.310277 USB3 port 2: enabled 1
1642 14:30:58.313755 USB3 port 3: enabled 1
1643 14:30:58.313834 USB3 port 4: enabled 0
1644 14:30:58.316749 APIC: 03: enabled 1
1645 14:30:58.320025 APIC: 04: enabled 1
1646 14:30:58.320103 APIC: 02: enabled 1
1647 14:30:58.323778 APIC: 05: enabled 1
1648 14:30:58.323859 APIC: 01: enabled 1
1649 14:30:58.326798 APIC: 07: enabled 1
1650 14:30:58.330097 APIC: 06: enabled 1
1651 14:30:58.330173 PCI: 00:08.0: enabled 1
1652 14:30:58.333212 PCI: 00:14.2: enabled 1
1653 14:30:58.336754 PCI: 01:00.0: enabled 1
1654 14:30:58.340257 Disabling ACPI via APMC:
1655 14:30:58.343165 done.
1656 14:30:58.346871 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 14:30:58.349957 ELOG: NV offset 0xaf0000 size 0x4000
1658 14:30:58.357054 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 14:30:58.363883 ELOG: Event(17) added with size 13 at 2023-04-20 14:30:57 UTC
1660 14:30:58.370182 ELOG: Event(92) added with size 9 at 2023-04-20 14:30:57 UTC
1661 14:30:58.377312 ELOG: Event(93) added with size 9 at 2023-04-20 14:30:57 UTC
1662 14:30:58.383479 ELOG: Event(9A) added with size 9 at 2023-04-20 14:30:57 UTC
1663 14:30:58.390362 ELOG: Event(9E) added with size 10 at 2023-04-20 14:30:57 UTC
1664 14:30:58.396886 ELOG: Event(9F) added with size 14 at 2023-04-20 14:30:57 UTC
1665 14:30:58.399912 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1666 14:30:58.407691 ELOG: Event(A1) added with size 10 at 2023-04-20 14:30:57 UTC
1667 14:30:58.417262 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1668 14:30:58.423798 ELOG: Event(A0) added with size 9 at 2023-04-20 14:30:57 UTC
1669 14:30:58.427324 elog_add_boot_reason: Logged dev mode boot
1670 14:30:58.430370 Finalize devices...
1671 14:30:58.430454 PCI: 00:17.0 final
1672 14:30:58.433709 Devices finalized
1673 14:30:58.437334 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1674 14:30:58.443705 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1675 14:30:58.447355 ME: HFSTS1 : 0x90000245
1676 14:30:58.450489 ME: HFSTS2 : 0x3B850126
1677 14:30:58.456677 ME: HFSTS3 : 0x00000020
1678 14:30:58.460242 ME: HFSTS4 : 0x00004800
1679 14:30:58.463485 ME: HFSTS5 : 0x00000000
1680 14:30:58.466658 ME: HFSTS6 : 0x40400006
1681 14:30:58.470372 ME: Manufacturing Mode : NO
1682 14:30:58.473815 ME: FW Partition Table : OK
1683 14:30:58.476834 ME: Bringup Loader Failure : NO
1684 14:30:58.480311 ME: Firmware Init Complete : YES
1685 14:30:58.483327 ME: Boot Options Present : NO
1686 14:30:58.486920 ME: Update In Progress : NO
1687 14:30:58.489945 ME: D0i3 Support : YES
1688 14:30:58.493420 ME: Low Power State Enabled : NO
1689 14:30:58.496712 ME: CPU Replaced : NO
1690 14:30:58.499888 ME: CPU Replacement Valid : YES
1691 14:30:58.503512 ME: Current Working State : 5
1692 14:30:58.506475 ME: Current Operation State : 1
1693 14:30:58.509972 ME: Current Operation Mode : 0
1694 14:30:58.513037 ME: Error Code : 0
1695 14:30:58.516450 ME: CPU Debug Disabled : YES
1696 14:30:58.519569 ME: TXT Support : NO
1697 14:30:58.526469 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1698 14:30:58.532959 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 14:30:58.533043 CBFS @ c08000 size 3f8000
1700 14:30:58.539394 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 14:30:58.542900 CBFS: Locating 'fallback/dsdt.aml'
1702 14:30:58.546337 CBFS: Found @ offset 10bb80 size 3fa5
1703 14:30:58.552928 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 14:30:58.555928 CBFS @ c08000 size 3f8000
1705 14:30:58.562567 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 14:30:58.562692 CBFS: Locating 'fallback/slic'
1707 14:30:58.568425 CBFS: 'fallback/slic' not found.
1708 14:30:58.575008 ACPI: Writing ACPI tables at 99b3e000.
1709 14:30:58.575141 ACPI: * FACS
1710 14:30:58.578006 ACPI: * DSDT
1711 14:30:58.581326 Ramoops buffer: 0x100000@0x99a3d000.
1712 14:30:58.584908 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1713 14:30:58.591424 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1714 14:30:58.594556 Google Chrome EC: version:
1715 14:30:58.597787 ro: helios_v2.0.2659-56403530b
1716 14:30:58.601394 rw: helios_v2.0.2849-c41de27e7d
1717 14:30:58.601630 running image: 1
1718 14:30:58.605395 ACPI: * FADT
1719 14:30:58.605644 SCI is IRQ9
1720 14:30:58.612007 ACPI: added table 1/32, length now 40
1721 14:30:58.612255 ACPI: * SSDT
1722 14:30:58.615619 Found 1 CPU(s) with 8 core(s) each.
1723 14:30:58.619229 Error: Could not locate 'wifi_sar' in VPD.
1724 14:30:58.625733 Checking CBFS for default SAR values
1725 14:30:58.628826 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 14:30:58.632301 CBFS @ c08000 size 3f8000
1727 14:30:58.638843 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 14:30:58.642290 CBFS: Locating 'wifi_sar_defaults.hex'
1729 14:30:58.645302 CBFS: Found @ offset 5fac0 size 77
1730 14:30:58.648778 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1731 14:30:58.655301 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1732 14:30:58.658504 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1733 14:30:58.665502 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1734 14:30:58.668620 failed to find key in VPD: dsm_calib_r0_0
1735 14:30:58.678650 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1736 14:30:58.681764 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1737 14:30:58.685413 failed to find key in VPD: dsm_calib_r0_1
1738 14:30:58.695358 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1739 14:30:58.701954 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1740 14:30:58.704891 failed to find key in VPD: dsm_calib_r0_2
1741 14:30:58.714986 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1742 14:30:58.718452 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1743 14:30:58.725230 failed to find key in VPD: dsm_calib_r0_3
1744 14:30:58.731728 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1745 14:30:58.738038 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1746 14:30:58.741506 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1747 14:30:58.744576 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1748 14:30:58.748636 EC returned error result code 1
1749 14:30:58.752480 EC returned error result code 1
1750 14:30:58.756444 EC returned error result code 1
1751 14:30:58.763102 PS2K: Bad resp from EC. Vivaldi disabled!
1752 14:30:58.765991 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1753 14:30:58.772876 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1754 14:30:58.779459 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1755 14:30:58.782712 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1756 14:30:58.789372 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1757 14:30:58.796090 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1758 14:30:58.802548 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1759 14:30:58.805525 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1760 14:30:58.809033 ACPI: added table 2/32, length now 44
1761 14:30:58.812662 ACPI: * MCFG
1762 14:30:58.815503 ACPI: added table 3/32, length now 48
1763 14:30:58.819052 ACPI: * TPM2
1764 14:30:58.822138 TPM2 log created at 99a2d000
1765 14:30:58.825716 ACPI: added table 4/32, length now 52
1766 14:30:58.826227 ACPI: * MADT
1767 14:30:58.829247 SCI is IRQ9
1768 14:30:58.832207 ACPI: added table 5/32, length now 56
1769 14:30:58.832719 current = 99b43ac0
1770 14:30:58.836039 ACPI: * DMAR
1771 14:30:58.838994 ACPI: added table 6/32, length now 60
1772 14:30:58.842294 ACPI: * IGD OpRegion
1773 14:30:58.842777 GMA: Found VBT in CBFS
1774 14:30:58.845687 GMA: Found valid VBT in CBFS
1775 14:30:58.848779 ACPI: added table 7/32, length now 64
1776 14:30:58.852395 ACPI: * HPET
1777 14:30:58.855391 ACPI: added table 8/32, length now 68
1778 14:30:58.856016 ACPI: done.
1779 14:30:58.858996 ACPI tables: 31744 bytes.
1780 14:30:58.862670 smbios_write_tables: 99a2c000
1781 14:30:58.865955 EC returned error result code 3
1782 14:30:58.868941 Couldn't obtain OEM name from CBI
1783 14:30:58.872672 Create SMBIOS type 17
1784 14:30:58.875771 PCI: 00:00.0 (Intel Cannonlake)
1785 14:30:58.879142 PCI: 00:14.3 (Intel WiFi)
1786 14:30:58.882622 SMBIOS tables: 939 bytes.
1787 14:30:58.885955 Writing table forward entry at 0x00000500
1788 14:30:58.892182 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1789 14:30:58.895387 Writing coreboot table at 0x99b62000
1790 14:30:58.902168 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1791 14:30:58.905675 1. 0000000000001000-000000000009ffff: RAM
1792 14:30:58.908836 2. 00000000000a0000-00000000000fffff: RESERVED
1793 14:30:58.915393 3. 0000000000100000-0000000099a2bfff: RAM
1794 14:30:58.918746 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1795 14:30:58.925251 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1796 14:30:58.931642 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1797 14:30:58.935167 7. 000000009a000000-000000009f7fffff: RESERVED
1798 14:30:58.941633 8. 00000000e0000000-00000000efffffff: RESERVED
1799 14:30:58.945156 9. 00000000fc000000-00000000fc000fff: RESERVED
1800 14:30:58.948803 10. 00000000fe000000-00000000fe00ffff: RESERVED
1801 14:30:58.955091 11. 00000000fed10000-00000000fed17fff: RESERVED
1802 14:30:58.958216 12. 00000000fed80000-00000000fed83fff: RESERVED
1803 14:30:58.964804 13. 00000000fed90000-00000000fed91fff: RESERVED
1804 14:30:58.968232 14. 00000000feda0000-00000000feda1fff: RESERVED
1805 14:30:58.971657 15. 0000000100000000-000000045e7fffff: RAM
1806 14:30:58.978392 Graphics framebuffer located at 0xc0000000
1807 14:30:58.981372 Passing 5 GPIOs to payload:
1808 14:30:58.984666 NAME | PORT | POLARITY | VALUE
1809 14:30:58.991283 write protect | undefined | high | low
1810 14:30:58.994883 lid | undefined | high | high
1811 14:30:59.001242 power | undefined | high | low
1812 14:30:59.008035 oprom | undefined | high | low
1813 14:30:59.011173 EC in RW | 0x000000cb | high | low
1814 14:30:59.014595 Board ID: 4
1815 14:30:59.018351 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1816 14:30:59.021591 CBFS @ c08000 size 3f8000
1817 14:30:59.028163 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1818 14:30:59.031168 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1819 14:30:59.034450 coreboot table: 1492 bytes.
1820 14:30:59.037764 IMD ROOT 0. 99fff000 00001000
1821 14:30:59.040964 IMD SMALL 1. 99ffe000 00001000
1822 14:30:59.044254 FSP MEMORY 2. 99c4e000 003b0000
1823 14:30:59.047739 CONSOLE 3. 99c2e000 00020000
1824 14:30:59.051329 FMAP 4. 99c2d000 0000054e
1825 14:30:59.054192 TIME STAMP 5. 99c2c000 00000910
1826 14:30:59.057562 VBOOT WORK 6. 99c18000 00014000
1827 14:30:59.060768 MRC DATA 7. 99c16000 00001958
1828 14:30:59.064262 ROMSTG STCK 8. 99c15000 00001000
1829 14:30:59.067882 AFTER CAR 9. 99c0b000 0000a000
1830 14:30:59.071170 RAMSTAGE 10. 99baf000 0005c000
1831 14:30:59.074179 REFCODE 11. 99b7a000 00035000
1832 14:30:59.077545 SMM BACKUP 12. 99b6a000 00010000
1833 14:30:59.080758 COREBOOT 13. 99b62000 00008000
1834 14:30:59.084458 ACPI 14. 99b3e000 00024000
1835 14:30:59.087402 ACPI GNVS 15. 99b3d000 00001000
1836 14:30:59.090971 RAMOOPS 16. 99a3d000 00100000
1837 14:30:59.094112 TPM2 TCGLOG17. 99a2d000 00010000
1838 14:30:59.097567 SMBIOS 18. 99a2c000 00000800
1839 14:30:59.100987 IMD small region:
1840 14:30:59.103905 IMD ROOT 0. 99ffec00 00000400
1841 14:30:59.107255 FSP RUNTIME 1. 99ffebe0 00000004
1842 14:30:59.110711 EC HOSTEVENT 2. 99ffebc0 00000008
1843 14:30:59.114086 POWER STATE 3. 99ffeb80 00000040
1844 14:30:59.117233 ROMSTAGE 4. 99ffeb60 00000004
1845 14:30:59.120659 MEM INFO 5. 99ffe9a0 000001b9
1846 14:30:59.124221 VPD 6. 99ffe920 0000006c
1847 14:30:59.127353 MTRR: Physical address space:
1848 14:30:59.134309 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1849 14:30:59.140653 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1850 14:30:59.147341 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1851 14:30:59.154165 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1852 14:30:59.160773 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1853 14:30:59.167245 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1854 14:30:59.170835 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1855 14:30:59.177139 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 14:30:59.180245 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 14:30:59.183814 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 14:30:59.186881 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 14:30:59.193789 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 14:30:59.197222 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 14:30:59.200486 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 14:30:59.203465 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 14:30:59.210144 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 14:30:59.213490 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 14:30:59.216752 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 14:30:59.219912 call enable_fixed_mtrr()
1867 14:30:59.223408 CPU physical address size: 39 bits
1868 14:30:59.226754 MTRR: default type WB/UC MTRR counts: 6/8.
1869 14:30:59.229836 MTRR: WB selected as default type.
1870 14:30:59.236881 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1871 14:30:59.243622 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1872 14:30:59.249925 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1873 14:30:59.256416 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1874 14:30:59.262727 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1875 14:30:59.270032 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1876 14:30:59.272962 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 14:30:59.279333 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 14:30:59.282856 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 14:30:59.285922 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 14:30:59.289438 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 14:30:59.292616 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 14:30:59.299277 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 14:30:59.302565 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 14:30:59.305687 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 14:30:59.309266 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 14:30:59.315812 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 14:30:59.316426
1888 14:30:59.316897 MTRR check
1889 14:30:59.319173 Fixed MTRRs : Enabled
1890 14:30:59.322216 Variable MTRRs: Enabled
1891 14:30:59.322721
1892 14:30:59.325746 call enable_fixed_mtrr()
1893 14:30:59.328919 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1894 14:30:59.332200 CPU physical address size: 39 bits
1895 14:30:59.339016 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1896 14:30:59.342410 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 14:30:59.345324 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 14:30:59.351921 MTRR: Fixed MSR 0x258 0x0606060606060606
1899 14:30:59.355468 MTRR: Fixed MSR 0x259 0x0000000000000000
1900 14:30:59.358577 MTRR: Fixed MSR 0x268 0x0606060606060606
1901 14:30:59.362010 MTRR: Fixed MSR 0x269 0x0606060606060606
1902 14:30:59.365490 MTRR: Fixed MSR 0x26a 0x0606060606060606
1903 14:30:59.372076 MTRR: Fixed MSR 0x26b 0x0606060606060606
1904 14:30:59.375216 MTRR: Fixed MSR 0x26c 0x0606060606060606
1905 14:30:59.378656 MTRR: Fixed MSR 0x26d 0x0606060606060606
1906 14:30:59.382186 MTRR: Fixed MSR 0x26e 0x0606060606060606
1907 14:30:59.388405 MTRR: Fixed MSR 0x26f 0x0606060606060606
1908 14:30:59.391761 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 14:30:59.395299 call enable_fixed_mtrr()
1910 14:30:59.398385 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 14:30:59.401898 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 14:30:59.404975 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 14:30:59.411605 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 14:30:59.415175 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 14:30:59.418509 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 14:30:59.421348 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 14:30:59.428200 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 14:30:59.431402 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 14:30:59.434676 CPU physical address size: 39 bits
1920 14:30:59.437760 call enable_fixed_mtrr()
1921 14:30:59.441090 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 14:30:59.444797 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 14:30:59.450982 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 14:30:59.454521 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 14:30:59.458081 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 14:30:59.461039 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 14:30:59.467782 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 14:30:59.471288 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 14:30:59.474341 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 14:30:59.477511 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 14:30:59.484362 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 14:30:59.487485 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 14:30:59.490965 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 14:30:59.494252 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 14:30:59.500475 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 14:30:59.504085 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 14:30:59.507152 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 14:30:59.510877 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 14:30:59.516947 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 14:30:59.520571 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 14:30:59.523585 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 14:30:59.527373 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 14:30:59.530668 call enable_fixed_mtrr()
1944 14:30:59.533848 call enable_fixed_mtrr()
1945 14:30:59.537398 CPU physical address size: 39 bits
1946 14:30:59.540381 CPU physical address size: 39 bits
1947 14:30:59.543847 CPU physical address size: 39 bits
1948 14:30:59.547197 CBFS @ c08000 size 3f8000
1949 14:30:59.553705 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1950 14:30:59.556853 CBFS: Locating 'fallback/payload'
1951 14:30:59.560335 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 14:30:59.563704 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 14:30:59.567000 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 14:30:59.573673 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 14:30:59.577009 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 14:30:59.580304 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 14:30:59.583311 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 14:30:59.589952 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 14:30:59.593570 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 14:30:59.596705 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 14:30:59.600039 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 14:30:59.606914 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 14:30:59.607388 call enable_fixed_mtrr()
1964 14:30:59.613422 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 14:30:59.616949 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 14:30:59.620292 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 14:30:59.623415 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 14:30:59.630009 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 14:30:59.633774 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 14:30:59.636664 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 14:30:59.639882 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 14:30:59.643336 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 14:30:59.650081 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 14:30:59.653605 CPU physical address size: 39 bits
1975 14:30:59.656948 call enable_fixed_mtrr()
1976 14:30:59.659955 CBFS: Found @ offset 1c96c0 size 3f798
1977 14:30:59.663166 CPU physical address size: 39 bits
1978 14:30:59.666778 Checking segment from ROM address 0xffdd16f8
1979 14:30:59.673075 Checking segment from ROM address 0xffdd1714
1980 14:30:59.676761 Loading segment from ROM address 0xffdd16f8
1981 14:30:59.679778 code (compression=0)
1982 14:30:59.686629 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1983 14:30:59.696365 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1984 14:30:59.696845 it's not compressed!
1985 14:30:59.789863 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1986 14:30:59.796316 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1987 14:30:59.799914 Loading segment from ROM address 0xffdd1714
1988 14:30:59.803101 Entry Point 0x30000000
1989 14:30:59.806131 Loaded segments
1990 14:30:59.812175 Finalizing chipset.
1991 14:30:59.815588 Finalizing SMM.
1992 14:30:59.818519 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1993 14:30:59.821940 mp_park_aps done after 0 msecs.
1994 14:30:59.828389 Jumping to boot code at 30000000(99b62000)
1995 14:30:59.835031 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1996 14:30:59.835116
1997 14:30:59.835182
1998 14:30:59.835243
1999 14:30:59.838112 Starting depthcharge on Helios...
2000 14:30:59.838196
2001 14:30:59.838543 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2002 14:30:59.838640 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2003 14:30:59.838723 Setting prompt string to ['hatch:']
2004 14:30:59.838802 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2005 14:30:59.848162 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 14:30:59.848246
2007 14:30:59.854671 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2008 14:30:59.854754
2009 14:30:59.861300 board_setup: Info: eMMC controller not present; skipping
2010 14:30:59.861384
2011 14:30:59.864942 New NVMe Controller 0x30053ac0 @ 00:1d:00
2012 14:30:59.865032
2013 14:30:59.871575 board_setup: Info: SDHCI controller not present; skipping
2014 14:30:59.871671
2015 14:30:59.878319 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2016 14:30:59.878436
2017 14:30:59.878525 Wipe memory regions:
2018 14:30:59.878609
2019 14:30:59.881326 [0x00000000001000, 0x000000000a0000)
2020 14:30:59.881438
2021 14:30:59.884710 [0x00000000100000, 0x00000030000000)
2022 14:30:59.951241
2023 14:30:59.954278 [0x00000030657430, 0x00000099a2c000)
2024 14:31:00.091880
2025 14:31:00.095232 [0x00000100000000, 0x0000045e800000)
2026 14:31:01.478075
2027 14:31:01.478646 R8152: Initializing
2028 14:31:01.479028
2029 14:31:01.480776 Version 9 (ocp_data = 6010)
2030 14:31:01.485665
2031 14:31:01.486237 R8152: Done initializing
2032 14:31:01.486627
2033 14:31:01.488294 Adding net device
2034 14:31:02.098085
2035 14:31:02.098669 R8152: Initializing
2036 14:31:02.099044
2037 14:31:02.100915 Version 6 (ocp_data = 5c30)
2038 14:31:02.101383
2039 14:31:02.104054 R8152: Done initializing
2040 14:31:02.104148
2041 14:31:02.107712 net_add_device: Attemp to include the same device
2042 14:31:02.111064
2043 14:31:02.117877 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2044 14:31:02.118049
2045 14:31:02.118129
2046 14:31:02.118204
2047 14:31:02.118513 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2049 14:31:02.219579 hatch: tftpboot 192.168.201.1 10062741/tftp-deploy-9t07rosa/kernel/bzImage 10062741/tftp-deploy-9t07rosa/kernel/cmdline 10062741/tftp-deploy-9t07rosa/ramdisk/ramdisk.cpio.gz
2050 14:31:02.220250 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2051 14:31:02.220807 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2052 14:31:02.225644 tftpboot 192.168.201.1 10062741/tftp-deploy-9t07rosa/kernel/bzImploy-9t07rosa/kernel/cmdline 10062741/tftp-deploy-9t07rosa/ramdisk/ramdisk.cpio.gz
2053 14:31:02.226125
2054 14:31:02.226499 Waiting for link
2055 14:31:02.426646
2056 14:31:02.427212 done.
2057 14:31:02.427655
2058 14:31:02.428028 MAC: 00:24:32:50:1a:5f
2059 14:31:02.428379
2060 14:31:02.429519 Sending DHCP discover... done.
2061 14:31:02.429940
2062 14:31:02.433022 Waiting for reply... done.
2063 14:31:02.433769
2064 14:31:02.436183 Sending DHCP request... done.
2065 14:31:02.436665
2066 14:31:02.452156 Waiting for reply... done.
2067 14:31:02.452729
2068 14:31:02.453113 My ip is 192.168.201.21
2069 14:31:02.453596
2070 14:31:02.455677 The DHCP server ip is 192.168.201.1
2071 14:31:02.458741
2072 14:31:02.461997 TFTP server IP predefined by user: 192.168.201.1
2073 14:31:02.462488
2074 14:31:02.468946 Bootfile predefined by user: 10062741/tftp-deploy-9t07rosa/kernel/bzImage
2075 14:31:02.469573
2076 14:31:02.471979 Sending tftp read request... done.
2077 14:31:02.472549
2078 14:31:02.481057 Waiting for the transfer...
2079 14:31:02.481687
2080 14:31:03.138608 00000000 ################################################################
2081 14:31:03.139131
2082 14:31:03.814198 00080000 ################################################################
2083 14:31:03.814812
2084 14:31:04.461458 00100000 ################################################################
2085 14:31:04.462007
2086 14:31:05.101556 00180000 ################################################################
2087 14:31:05.102248
2088 14:31:05.698601 00200000 ################################################################
2089 14:31:05.698751
2090 14:31:06.307250 00280000 ################################################################
2091 14:31:06.307402
2092 14:31:06.931455 00300000 ################################################################
2093 14:31:06.931987
2094 14:31:07.590781 00380000 ################################################################
2095 14:31:07.591357
2096 14:31:08.267705 00400000 ################################################################
2097 14:31:08.268282
2098 14:31:08.940389 00480000 ################################################################
2099 14:31:08.940958
2100 14:31:09.560708 00500000 ################################################################
2101 14:31:09.560856
2102 14:31:10.202533 00580000 ################################################################
2103 14:31:10.202685
2104 14:31:10.874515 00600000 ################################################################
2105 14:31:10.875040
2106 14:31:11.483798 00680000 ################################################################
2107 14:31:11.483953
2108 14:31:12.135028 00700000 ################################################################
2109 14:31:12.135588
2110 14:31:12.158153 00780000 ### done.
2111 14:31:12.158246
2112 14:31:12.161115 The bootfile was 7884688 bytes long.
2113 14:31:12.161200
2114 14:31:12.164577 Sending tftp read request... done.
2115 14:31:12.164662
2116 14:31:12.167602 Waiting for the transfer...
2117 14:31:12.167686
2118 14:31:12.767572 00000000 ################################################################
2119 14:31:12.767915
2120 14:31:13.474689 00080000 ################################################################
2121 14:31:13.475294
2122 14:31:14.197537 00100000 ################################################################
2123 14:31:14.198130
2124 14:31:14.920669 00180000 ################################################################
2125 14:31:14.921250
2126 14:31:15.649076 00200000 ################################################################
2127 14:31:15.649685
2128 14:31:16.359954 00280000 ################################################################
2129 14:31:16.360485
2130 14:31:17.074583 00300000 ################################################################
2131 14:31:17.075122
2132 14:31:17.775897 00380000 ################################################################
2133 14:31:17.776478
2134 14:31:18.485922 00400000 ################################################################
2135 14:31:18.486460
2136 14:31:19.193321 00480000 ################################################################
2137 14:31:19.193930
2138 14:31:19.911850 00500000 ################################################################
2139 14:31:19.912445
2140 14:31:20.225687 00580000 ############################# done.
2141 14:31:20.226282
2142 14:31:20.228900 Sending tftp read request... done.
2143 14:31:20.229399
2144 14:31:20.231872 Waiting for the transfer...
2145 14:31:20.232364
2146 14:31:20.235550 00000000 # done.
2147 14:31:20.236055
2148 14:31:20.245528 Command line loaded dynamically from TFTP file: 10062741/tftp-deploy-9t07rosa/kernel/cmdline
2149 14:31:20.246112
2150 14:31:20.272106 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10062741/extract-nfsrootfs-pmas1dw2,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2151 14:31:20.272688
2152 14:31:20.275149 ec_init(0): CrosEC protocol v3 supported (256, 256)
2153 14:31:20.280905
2154 14:31:20.284361 Shutting down all USB controllers.
2155 14:31:20.284960
2156 14:31:20.285340 Removing current net device
2157 14:31:20.292260
2158 14:31:20.292837 Finalizing coreboot
2159 14:31:20.293223
2160 14:31:20.298811 Exiting depthcharge with code 4 at timestamp: 27797692
2161 14:31:20.299387
2162 14:31:20.299763
2163 14:31:20.300114 Starting kernel ...
2164 14:31:20.300451
2165 14:31:20.300779
2166 14:31:20.302040 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2167 14:31:20.302572 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2168 14:31:20.302981 Setting prompt string to ['Linux version [0-9]']
2169 14:31:20.303359 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2170 14:31:20.303736 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2172 14:35:42.303453 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2174 14:35:42.304620 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2176 14:35:42.305691 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2179 14:35:42.307363 end: 2 depthcharge-action (duration 00:05:00) [common]
2181 14:35:42.308067 Cleaning after the job
2182 14:35:42.308153 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/ramdisk
2183 14:35:42.308946 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/kernel
2184 14:35:42.309917 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/nfsrootfs
2185 14:35:42.393674 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062741/tftp-deploy-9t07rosa/modules
2186 14:35:42.394114 start: 4.1 power-off (timeout 00:00:30) [common]
2187 14:35:42.394285 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2188 14:35:42.475677 >> Command sent successfully.
2189 14:35:42.487065 Returned 0 in 0 seconds
2190 14:35:42.588755 end: 4.1 power-off (duration 00:00:00) [common]
2192 14:35:42.590345 start: 4.2 read-feedback (timeout 00:10:00) [common]
2193 14:35:42.591598 Listened to connection for namespace 'common' for up to 1s
2195 14:35:42.592945 Listened to connection for namespace 'common' for up to 1s
2196 14:35:43.596399 Finalising connection for namespace 'common'
2197 14:35:43.597107 Disconnecting from shell: Finalise
2198 14:35:43.597612
2199 14:35:43.699057 end: 4.2 read-feedback (duration 00:00:01) [common]
2200 14:35:43.699763 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062741
2201 14:35:44.083244 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062741
2202 14:35:44.083442 JobError: Your job cannot terminate cleanly.