Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 14:49:43.249650 lava-dispatcher, installed at version: 2022.06
2 14:49:43.249865 start: 0 validate
3 14:49:43.250008 Start time: 2022-09-18 14:49:43.250000+00:00 (UTC)
4 14:49:43.250153 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:49:43.250294 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 14:49:43.544871 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:49:43.545691 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-231-g7349cef09ddd2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:49:43.834770 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:49:43.835493 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:49:44.132952 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:49:44.133701 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-231-g7349cef09ddd2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:49:44.429608 validate duration: 1.18
14 14:49:44.430978 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:49:44.431534 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:49:44.432033 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:49:44.432541 Not decompressing ramdisk as can be used compressed.
18 14:49:44.433092 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/initrd.cpio.gz
19 14:49:44.433498 saving as /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/ramdisk/initrd.cpio.gz
20 14:49:44.433849 total size: 5411075 (5MB)
21 14:49:44.439286 progress 0% (0MB)
22 14:49:44.447168 progress 5% (0MB)
23 14:49:44.453413 progress 10% (0MB)
24 14:49:44.457776 progress 15% (0MB)
25 14:49:44.461773 progress 20% (1MB)
26 14:49:44.465387 progress 25% (1MB)
27 14:49:44.469718 progress 30% (1MB)
28 14:49:44.472306 progress 35% (1MB)
29 14:49:44.474609 progress 40% (2MB)
30 14:49:44.476635 progress 45% (2MB)
31 14:49:44.478452 progress 50% (2MB)
32 14:49:44.480254 progress 55% (2MB)
33 14:49:44.482209 progress 60% (3MB)
34 14:49:44.483795 progress 65% (3MB)
35 14:49:44.485404 progress 70% (3MB)
36 14:49:44.486980 progress 75% (3MB)
37 14:49:44.488593 progress 80% (4MB)
38 14:49:44.490042 progress 85% (4MB)
39 14:49:44.491476 progress 90% (4MB)
40 14:49:44.492884 progress 95% (4MB)
41 14:49:44.494509 progress 100% (5MB)
42 14:49:44.494692 5MB downloaded in 0.06s (84.81MB/s)
43 14:49:44.494849 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:49:44.495113 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:49:44.495208 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:49:44.495300 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:49:44.495412 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-231-g7349cef09ddd2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:49:44.495486 saving as /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/kernel/bzImage
50 14:49:44.495553 total size: 6815632 (6MB)
51 14:49:44.495618 No compression specified
52 14:49:44.496717 progress 0% (0MB)
53 14:49:44.498706 progress 5% (0MB)
54 14:49:44.500625 progress 10% (0MB)
55 14:49:44.502683 progress 15% (1MB)
56 14:49:44.504467 progress 20% (1MB)
57 14:49:44.506269 progress 25% (1MB)
58 14:49:44.508215 progress 30% (1MB)
59 14:49:44.510025 progress 35% (2MB)
60 14:49:44.511946 progress 40% (2MB)
61 14:49:44.513686 progress 45% (2MB)
62 14:49:44.515440 progress 50% (3MB)
63 14:49:44.517396 progress 55% (3MB)
64 14:49:44.519141 progress 60% (3MB)
65 14:49:44.521031 progress 65% (4MB)
66 14:49:44.522832 progress 70% (4MB)
67 14:49:44.524634 progress 75% (4MB)
68 14:49:44.526635 progress 80% (5MB)
69 14:49:44.528387 progress 85% (5MB)
70 14:49:44.530327 progress 90% (5MB)
71 14:49:44.532072 progress 95% (6MB)
72 14:49:44.533876 progress 100% (6MB)
73 14:49:44.534182 6MB downloaded in 0.04s (168.28MB/s)
74 14:49:44.534337 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:49:44.534594 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:49:44.534690 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:49:44.534784 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:49:44.534895 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/full.rootfs.tar.xz
80 14:49:44.534988 saving as /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/nfsrootfs/full.rootfs.tar
81 14:49:44.535064 total size: 122682368 (116MB)
82 14:49:44.535131 Using unxz to decompress xz
83 14:49:44.538744 progress 0% (0MB)
84 14:49:45.023980 progress 5% (5MB)
85 14:49:45.525868 progress 10% (11MB)
86 14:49:46.027045 progress 15% (17MB)
87 14:49:46.536810 progress 20% (23MB)
88 14:49:46.885798 progress 25% (29MB)
89 14:49:47.256755 progress 30% (35MB)
90 14:49:47.515052 progress 35% (40MB)
91 14:49:47.745464 progress 40% (46MB)
92 14:49:48.126598 progress 45% (52MB)
93 14:49:48.516464 progress 50% (58MB)
94 14:49:48.886241 progress 55% (64MB)
95 14:49:49.267168 progress 60% (70MB)
96 14:49:49.628463 progress 65% (76MB)
97 14:49:50.049803 progress 70% (81MB)
98 14:49:50.506886 progress 75% (87MB)
99 14:49:50.968219 progress 80% (93MB)
100 14:49:51.093997 progress 85% (99MB)
101 14:49:51.276108 progress 90% (105MB)
102 14:49:51.645352 progress 95% (111MB)
103 14:49:52.058808 progress 100% (116MB)
104 14:49:52.066377 116MB downloaded in 7.53s (15.54MB/s)
105 14:49:52.066716 end: 1.3.1 http-download (duration 00:00:08) [common]
107 14:49:52.067037 end: 1.3 download-retry (duration 00:00:08) [common]
108 14:49:52.067148 start: 1.4 download-retry (timeout 00:09:52) [common]
109 14:49:52.067255 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 14:49:52.067389 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-231-g7349cef09ddd2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:49:52.067473 saving as /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/modules/modules.tar
112 14:49:52.067546 total size: 51904 (0MB)
113 14:49:52.067630 Using unxz to decompress xz
114 14:49:52.071225 progress 63% (0MB)
115 14:49:52.071645 progress 100% (0MB)
116 14:49:52.075256 0MB downloaded in 0.01s (6.43MB/s)
117 14:49:52.075526 end: 1.4.1 http-download (duration 00:00:00) [common]
119 14:49:52.075837 end: 1.4 download-retry (duration 00:00:00) [common]
120 14:49:52.075953 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 14:49:52.076072 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 14:49:53.942619 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7305269/extract-nfsrootfs-weslp_8s
123 14:49:53.942854 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 14:49:53.942974 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 14:49:53.943129 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg
126 14:49:53.943245 makedir: /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin
127 14:49:53.943340 makedir: /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/tests
128 14:49:53.943434 makedir: /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/results
129 14:49:53.943546 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-add-keys
130 14:49:53.943702 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-add-sources
131 14:49:53.943834 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-background-process-start
132 14:49:53.943961 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-background-process-stop
133 14:49:53.944087 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-common-functions
134 14:49:53.944211 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-echo-ipv4
135 14:49:53.944335 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-install-packages
136 14:49:53.944457 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-installed-packages
137 14:49:53.944577 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-os-build
138 14:49:53.944697 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-probe-channel
139 14:49:53.944817 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-probe-ip
140 14:49:53.944937 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-target-ip
141 14:49:53.945057 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-target-mac
142 14:49:53.945182 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-target-storage
143 14:49:53.945304 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-test-case
144 14:49:53.945427 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-test-event
145 14:49:53.945547 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-test-feedback
146 14:49:53.945666 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-test-raise
147 14:49:53.945785 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-test-reference
148 14:49:53.945905 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-test-runner
149 14:49:53.946025 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-test-set
150 14:49:53.946145 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-test-shell
151 14:49:53.946269 Updating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-install-packages (oe)
152 14:49:53.946399 Updating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/bin/lava-installed-packages (oe)
153 14:49:53.946507 Creating /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/environment
154 14:49:53.946601 LAVA metadata
155 14:49:53.946674 - LAVA_JOB_ID=7305269
156 14:49:53.946744 - LAVA_DISPATCHER_IP=192.168.201.1
157 14:49:53.946855 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 14:49:53.946927 skipped lava-vland-overlay
159 14:49:53.947013 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 14:49:53.947104 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 14:49:53.947173 skipped lava-multinode-overlay
162 14:49:53.947255 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 14:49:53.947346 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 14:49:53.947426 Loading test definitions
165 14:49:53.947525 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
166 14:49:53.947608 Using /lava-7305269 at stage 0
167 14:49:53.947714 Fetching tests from https://github.com/kernelci/test-definitions
168 14:49:53.947803 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/0/tests/0_ltp-mm'
169 14:49:57.212566 Running '/usr/bin/git checkout kernelci.org
170 14:49:57.363425 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 14:49:57.364228 uuid=7305269_1.5.2.3.1 testdef=None
172 14:49:57.364412 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 14:49:57.364697 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
175 14:49:57.365553 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 14:49:57.365826 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
178 14:49:57.366892 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 14:49:57.367171 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
181 14:49:57.368190 runner path: /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/0/tests/0_ltp-mm test_uuid 7305269_1.5.2.3.1
182 14:49:57.368294 SKIPFILE='skipfile-lkft.yaml'
183 14:49:57.368371 SKIP_INSTALL='true'
184 14:49:57.368440 TST_CMDFILES='mm'
185 14:49:57.368593 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 14:49:57.368837 Creating lava-test-runner.conf files
188 14:49:57.368911 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7305269/lava-overlay-0kc710eg/lava-7305269/0 for stage 0
189 14:49:57.369006 - 0_ltp-mm
190 14:49:57.369126 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
191 14:49:57.369227 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
192 14:50:05.432009 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 14:50:05.432186 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
194 14:50:05.432292 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 14:50:05.432408 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 14:50:05.432507 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
197 14:50:05.545763 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 14:50:05.546138 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
199 14:50:05.546263 extracting modules file /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7305269/extract-nfsrootfs-weslp_8s
200 14:50:05.550753 extracting modules file /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7305269/extract-overlay-ramdisk-381df80o/ramdisk
201 14:50:05.554850 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 14:50:05.554971 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
203 14:50:05.555066 [common] Applying overlay to NFS
204 14:50:05.555147 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7305269/compress-overlay-oyvifaqg/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7305269/extract-nfsrootfs-weslp_8s
205 14:50:06.041418 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 14:50:06.041604 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
207 14:50:06.041713 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 14:50:06.041818 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
209 14:50:06.041908 Building ramdisk /var/lib/lava/dispatcher/tmp/7305269/extract-overlay-ramdisk-381df80o/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7305269/extract-overlay-ramdisk-381df80o/ramdisk
210 14:50:06.078614 >> 24431 blocks
211 14:50:06.601626 rename /var/lib/lava/dispatcher/tmp/7305269/extract-overlay-ramdisk-381df80o/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/ramdisk/ramdisk.cpio.gz
212 14:50:06.602071 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 14:50:06.602207 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
214 14:50:06.602327 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
215 14:50:06.602433 No mkimage arch provided, not using FIT.
216 14:50:06.602535 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 14:50:06.602630 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 14:50:06.602746 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
219 14:50:06.602851 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
220 14:50:06.602938 No LXC device requested
221 14:50:06.603032 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 14:50:06.603129 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
223 14:50:06.603223 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 14:50:06.603302 Checking files for TFTP limit of 4294967296 bytes.
225 14:50:06.603714 end: 1 tftp-deploy (duration 00:00:22) [common]
226 14:50:06.603830 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 14:50:06.603939 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 14:50:06.604089 substitutions:
229 14:50:06.604169 - {DTB}: None
230 14:50:06.604242 - {INITRD}: 7305269/tftp-deploy-_wufz9af/ramdisk/ramdisk.cpio.gz
231 14:50:06.604313 - {KERNEL}: 7305269/tftp-deploy-_wufz9af/kernel/bzImage
232 14:50:06.604382 - {LAVA_MAC}: None
233 14:50:06.604449 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7305269/extract-nfsrootfs-weslp_8s
234 14:50:06.604516 - {NFS_SERVER_IP}: 192.168.201.1
235 14:50:06.604581 - {PRESEED_CONFIG}: None
236 14:50:06.604648 - {PRESEED_LOCAL}: None
237 14:50:06.604711 - {RAMDISK}: 7305269/tftp-deploy-_wufz9af/ramdisk/ramdisk.cpio.gz
238 14:50:06.604775 - {ROOT_PART}: None
239 14:50:06.604838 - {ROOT}: None
240 14:50:06.604901 - {SERVER_IP}: 192.168.201.1
241 14:50:06.604963 - {TEE}: None
242 14:50:06.605026 Parsed boot commands:
243 14:50:06.605096 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 14:50:06.605269 Parsed boot commands: tftpboot 192.168.201.1 7305269/tftp-deploy-_wufz9af/kernel/bzImage 7305269/tftp-deploy-_wufz9af/kernel/cmdline 7305269/tftp-deploy-_wufz9af/ramdisk/ramdisk.cpio.gz
245 14:50:06.605376 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 14:50:06.605478 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 14:50:06.605582 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 14:50:06.605679 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 14:50:06.605759 Not connected, no need to disconnect.
250 14:50:06.605846 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 14:50:06.605936 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 14:50:06.606013 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
253 14:50:06.608924 Setting prompt string to ['lava-test: # ']
254 14:50:06.609249 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 14:50:06.609365 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 14:50:06.609477 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 14:50:06.609583 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 14:50:06.609778 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
259 14:50:06.630235 >> Command sent successfully.
260 14:50:06.632279 Returned 0 in 0 seconds
261 14:50:06.733392 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 14:50:06.734591 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 14:50:06.735031 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 14:50:06.735412 Setting prompt string to 'Starting depthcharge on Helios...'
266 14:50:06.735705 Changing prompt to 'Starting depthcharge on Helios...'
267 14:50:06.736001 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 14:50:06.737025 [Enter `^Ec?' for help]
269 14:50:13.612014
270 14:50:13.612652
271 14:50:13.621733 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 14:50:13.625060 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 14:50:13.632249 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 14:50:13.634976 CPU: AES supported, TXT NOT supported, VT supported
275 14:50:13.642028 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 14:50:13.644893 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 14:50:13.651906 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 14:50:13.655422 VBOOT: Loading verstage.
279 14:50:13.658273 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
280 14:50:13.665208 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 14:50:13.668192 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 14:50:13.671661 CBFS @ c08000 size 3f8000
283 14:50:13.678369 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 14:50:13.682285 CBFS: Locating 'fallback/verstage'
285 14:50:13.685104 CBFS: Found @ offset 10fb80 size 1072c
286 14:50:13.688791
287 14:50:13.689266
288 14:50:13.699080 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 14:50:13.713103 Probing TPM: . done!
290 14:50:13.716655 TPM ready after 0 ms
291 14:50:13.719964 Connected to device vid:did:rid of 1ae0:0028:00
292 14:50:13.730115 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
293 14:50:13.733570 Initialized TPM device CR50 revision 0
294 14:50:13.779502 tlcl_send_startup: Startup return code is 0
295 14:50:13.780034 TPM: setup succeeded
296 14:50:13.793165 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 14:50:13.796828 Chrome EC: UHEPI supported
298 14:50:13.800539 Phase 1
299 14:50:13.804112 FMAP: area GBB found @ c05000 (12288 bytes)
300 14:50:13.810638 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 14:50:13.811178 Phase 2
302 14:50:13.814153 Phase 3
303 14:50:13.817184 FMAP: area GBB found @ c05000 (12288 bytes)
304 14:50:13.823688 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 14:50:13.830215 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
306 14:50:13.833783 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 14:50:13.840051 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 14:50:13.856217 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 14:50:13.859167 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 14:50:13.865375 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 14:50:13.869750 Phase 4
312 14:50:13.873190 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
313 14:50:13.879881 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 14:50:14.059872 VB2:vb2_rsa_verify_digest() Digest check failed!
315 14:50:14.066116 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 14:50:14.066750 Saving nvdata
317 14:50:14.069412 Reboot requested (10020007)
318 14:50:14.072646 board_reset() called!
319 14:50:14.073171 full_reset() called!
320 14:50:18.579455
321 14:50:18.580103
322 14:50:18.589200 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 14:50:18.592765 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 14:50:18.599222 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 14:50:18.602458 CPU: AES supported, TXT NOT supported, VT supported
326 14:50:18.609276 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 14:50:18.612827 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 14:50:18.618998 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 14:50:18.622207 VBOOT: Loading verstage.
330 14:50:18.625676 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
331 14:50:18.632279 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 14:50:18.635792 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 14:50:18.639300 CBFS @ c08000 size 3f8000
334 14:50:18.645414 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 14:50:18.648647 CBFS: Locating 'fallback/verstage'
336 14:50:18.652169 CBFS: Found @ offset 10fb80 size 1072c
337 14:50:18.656169
338 14:50:18.656447
339 14:50:18.666233 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 14:50:18.680678 Probing TPM: . done!
341 14:50:18.684264 TPM ready after 0 ms
342 14:50:18.687443 Connected to device vid:did:rid of 1ae0:0028:00
343 14:50:18.697544 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
344 14:50:18.700852 Initialized TPM device CR50 revision 0
345 14:50:18.746746 tlcl_send_startup: Startup return code is 0
346 14:50:18.747309 TPM: setup succeeded
347 14:50:18.760523 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 14:50:18.764920 Chrome EC: UHEPI supported
349 14:50:18.767908 Phase 1
350 14:50:18.771555 FMAP: area GBB found @ c05000 (12288 bytes)
351 14:50:18.777926 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 14:50:18.784437 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 14:50:18.787866 Recovery requested (1009000e)
354 14:50:18.793355 Saving nvdata
355 14:50:18.799407 tlcl_extend: response is 0
356 14:50:18.808239 tlcl_extend: response is 0
357 14:50:18.815538 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 14:50:18.818499 CBFS @ c08000 size 3f8000
359 14:50:18.821736 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 14:50:18.828581 CBFS: Locating 'fallback/romstage'
361 14:50:18.832076 CBFS: Found @ offset 80 size 145fc
362 14:50:18.835435 Accumulated console time in verstage 98 ms
363 14:50:18.836013
364 14:50:18.836404
365 14:50:18.848276 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 14:50:18.855682 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 14:50:18.858437 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 14:50:18.861704 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 14:50:18.868289 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 14:50:18.872166 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 14:50:18.874837 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
372 14:50:18.878295 TCO_STS: 0000 0000
373 14:50:18.881930 GEN_PMCON: e0015238 00000200
374 14:50:18.884927 GBLRST_CAUSE: 00000000 00000000
375 14:50:18.885541 prev_sleep_state 5
376 14:50:18.888449 Boot Count incremented to 28974
377 14:50:18.895344 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 14:50:18.898292 CBFS @ c08000 size 3f8000
379 14:50:18.905238 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 14:50:18.905847 CBFS: Locating 'fspm.bin'
381 14:50:18.911299 CBFS: Found @ offset 5ffc0 size 71000
382 14:50:18.914923 Chrome EC: UHEPI supported
383 14:50:18.921430 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 14:50:18.924680 Probing TPM: done!
385 14:50:18.931522 Connected to device vid:did:rid of 1ae0:0028:00
386 14:50:18.941596 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
387 14:50:18.948003 Initialized TPM device CR50 revision 0
388 14:50:18.957380 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 14:50:18.963947 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 14:50:18.967661 MRC cache found, size 1948
391 14:50:18.971002 bootmode is set to: 2
392 14:50:18.974526 PRMRR disabled by config.
393 14:50:18.975110 SPD INDEX = 1
394 14:50:18.981143 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 14:50:18.984230 CBFS @ c08000 size 3f8000
396 14:50:18.991025 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 14:50:18.991618 CBFS: Locating 'spd.bin'
398 14:50:18.993692 CBFS: Found @ offset 5fb80 size 400
399 14:50:18.997422 SPD: module type is LPDDR3
400 14:50:19.000549 SPD: module part is
401 14:50:19.007275 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 14:50:19.010309 SPD: device width 4 bits, bus width 8 bits
403 14:50:19.013997 SPD: module size is 4096 MB (per channel)
404 14:50:19.017701 memory slot: 0 configuration done.
405 14:50:19.020510 memory slot: 2 configuration done.
406 14:50:19.071620 CBMEM:
407 14:50:19.074754 IMD: root @ 99fff000 254 entries.
408 14:50:19.078395 IMD: root @ 99ffec00 62 entries.
409 14:50:19.081582 External stage cache:
410 14:50:19.085130 IMD: root @ 9abff000 254 entries.
411 14:50:19.088152 IMD: root @ 9abfec00 62 entries.
412 14:50:19.091592 Chrome EC: clear events_b mask to 0x0000000020004000
413 14:50:19.109055 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 14:50:19.120313 tlcl_write: response is 0
415 14:50:19.133558 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 14:50:19.139968 MRC: TPM MRC hash updated successfully.
417 14:50:19.140569 2 DIMMs found
418 14:50:19.143341 SMM Memory Map
419 14:50:19.146209 SMRAM : 0x9a000000 0x1000000
420 14:50:19.149640 Subregion 0: 0x9a000000 0xa00000
421 14:50:19.152999 Subregion 1: 0x9aa00000 0x200000
422 14:50:19.156294 Subregion 2: 0x9ac00000 0x400000
423 14:50:19.159651 top_of_ram = 0x9a000000
424 14:50:19.162830 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 14:50:19.169744 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 14:50:19.172797 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 14:50:19.179606 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 14:50:19.182587 CBFS @ c08000 size 3f8000
429 14:50:19.186323 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 14:50:19.189312 CBFS: Locating 'fallback/postcar'
431 14:50:19.196023 CBFS: Found @ offset 107000 size 4b44
432 14:50:19.202604 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 14:50:19.212194 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 14:50:19.216183 Processing 180 relocs. Offset value of 0x97c0c000
435 14:50:19.223337 Accumulated console time in romstage 286 ms
436 14:50:19.223926
437 14:50:19.224334
438 14:50:19.233590 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 14:50:19.239874 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 14:50:19.243031 CBFS @ c08000 size 3f8000
441 14:50:19.249575 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 14:50:19.253233 CBFS: Locating 'fallback/ramstage'
443 14:50:19.256417 CBFS: Found @ offset 43380 size 1b9e8
444 14:50:19.262644 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 14:50:19.295320 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 14:50:19.298578 Processing 3976 relocs. Offset value of 0x98db0000
447 14:50:19.305449 Accumulated console time in postcar 52 ms
448 14:50:19.306088
449 14:50:19.306510
450 14:50:19.315347 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 14:50:19.321745 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 14:50:19.325338 WARNING: RO_VPD is uninitialized or empty.
453 14:50:19.328528 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 14:50:19.335011 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 14:50:19.335595 Normal boot.
456 14:50:19.341480 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 14:50:19.344924 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 14:50:19.348454 CBFS @ c08000 size 3f8000
459 14:50:19.354733 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 14:50:19.358123 CBFS: Locating 'cpu_microcode_blob.bin'
461 14:50:19.361915 CBFS: Found @ offset 14700 size 2ec00
462 14:50:19.364522 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 14:50:19.368152 Skip microcode update
464 14:50:19.374881 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 14:50:19.375467 CBFS @ c08000 size 3f8000
466 14:50:19.381780 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 14:50:19.384902 CBFS: Locating 'fsps.bin'
468 14:50:19.388457 CBFS: Found @ offset d1fc0 size 35000
469 14:50:19.413312 Detected 4 core, 8 thread CPU.
470 14:50:19.416712 Setting up SMI for CPU
471 14:50:19.420126 IED base = 0x9ac00000
472 14:50:19.420710 IED size = 0x00400000
473 14:50:19.423418 Will perform SMM setup.
474 14:50:19.429911 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 14:50:19.436798 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 14:50:19.439933 Processing 16 relocs. Offset value of 0x00030000
477 14:50:19.443512 Attempting to start 7 APs
478 14:50:19.447161 Waiting for 10ms after sending INIT.
479 14:50:19.463210 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
480 14:50:19.463832 done.
481 14:50:19.466789 AP: slot 6 apic_id 2.
482 14:50:19.470082 AP: slot 7 apic_id 3.
483 14:50:19.470566 AP: slot 5 apic_id 6.
484 14:50:19.472785 AP: slot 2 apic_id 7.
485 14:50:19.476186 Waiting for 2nd SIPI to complete...done.
486 14:50:19.479876 AP: slot 4 apic_id 4.
487 14:50:19.483275 AP: slot 1 apic_id 5.
488 14:50:19.490020 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 14:50:19.493130 Processing 13 relocs. Offset value of 0x00038000
490 14:50:19.500061 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 14:50:19.506329 Installing SMM handler to 0x9a000000
492 14:50:19.512901 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 14:50:19.516469 Processing 658 relocs. Offset value of 0x9a010000
494 14:50:19.526381 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 14:50:19.529509 Processing 13 relocs. Offset value of 0x9a008000
496 14:50:19.536188 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 14:50:19.542416 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 14:50:19.549370 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 14:50:19.552354 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 14:50:19.558907 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 14:50:19.565760 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 14:50:19.568672 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 14:50:19.575480 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 14:50:19.579169 Clearing SMI status registers
505 14:50:19.582326 SMI_STS: PM1
506 14:50:19.582764 PM1_STS: PWRBTN
507 14:50:19.585833 TCO_STS: SECOND_TO
508 14:50:19.589118 New SMBASE 0x9a000000
509 14:50:19.592535 In relocation handler: CPU 0
510 14:50:19.595684 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 14:50:19.599391 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 14:50:19.602570 Relocation complete.
513 14:50:19.605607 New SMBASE 0x99fff400
514 14:50:19.609052 In relocation handler: CPU 3
515 14:50:19.612012 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
516 14:50:19.615625 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 14:50:19.618826 Relocation complete.
518 14:50:19.622172 New SMBASE 0x99fff000
519 14:50:19.622694 In relocation handler: CPU 4
520 14:50:19.628813 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
521 14:50:19.632402 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 14:50:19.635600 Relocation complete.
523 14:50:19.636037 New SMBASE 0x99fffc00
524 14:50:19.638732 In relocation handler: CPU 1
525 14:50:19.645351 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
526 14:50:19.648667 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 14:50:19.651966 Relocation complete.
528 14:50:19.652410 New SMBASE 0x99ffe400
529 14:50:19.655681 In relocation handler: CPU 7
530 14:50:19.661992 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
531 14:50:19.665426 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 14:50:19.668989 Relocation complete.
533 14:50:19.669571 New SMBASE 0x99ffe800
534 14:50:19.672120 In relocation handler: CPU 6
535 14:50:19.675302 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
536 14:50:19.681809 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 14:50:19.685394 Relocation complete.
538 14:50:19.685833 New SMBASE 0x99fff800
539 14:50:19.688458 In relocation handler: CPU 2
540 14:50:19.692008 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
541 14:50:19.698655 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 14:50:19.702168 Relocation complete.
543 14:50:19.702717 New SMBASE 0x99ffec00
544 14:50:19.705182 In relocation handler: CPU 5
545 14:50:19.708626 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
546 14:50:19.714947 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 14:50:19.715483 Relocation complete.
548 14:50:19.718709 Initializing CPU #0
549 14:50:19.721767 CPU: vendor Intel device 806ec
550 14:50:19.725033 CPU: family 06, model 8e, stepping 0c
551 14:50:19.728467 Clearing out pending MCEs
552 14:50:19.731725 Setting up local APIC...
553 14:50:19.732272 apic_id: 0x00 done.
554 14:50:19.734985 Turbo is available but hidden
555 14:50:19.738310 Turbo is available and visible
556 14:50:19.741608 VMX status: enabled
557 14:50:19.745003 IA32_FEATURE_CONTROL status: locked
558 14:50:19.748074 Skip microcode update
559 14:50:19.748516 CPU #0 initialized
560 14:50:19.751511 Initializing CPU #3
561 14:50:19.755002 Initializing CPU #2
562 14:50:19.755444 Initializing CPU #5
563 14:50:19.757920 CPU: vendor Intel device 806ec
564 14:50:19.761457 CPU: family 06, model 8e, stepping 0c
565 14:50:19.764496 Initializing CPU #4
566 14:50:19.764936 Initializing CPU #1
567 14:50:19.768220 CPU: vendor Intel device 806ec
568 14:50:19.774767 CPU: family 06, model 8e, stepping 0c
569 14:50:19.775320 Clearing out pending MCEs
570 14:50:19.778266 CPU: vendor Intel device 806ec
571 14:50:19.781626 CPU: family 06, model 8e, stepping 0c
572 14:50:19.784630 Clearing out pending MCEs
573 14:50:19.788248 Setting up local APIC...
574 14:50:19.791321 Initializing CPU #6
575 14:50:19.791883 Initializing CPU #7
576 14:50:19.794764 CPU: vendor Intel device 806ec
577 14:50:19.798228 CPU: family 06, model 8e, stepping 0c
578 14:50:19.801084 CPU: vendor Intel device 806ec
579 14:50:19.804983 CPU: family 06, model 8e, stepping 0c
580 14:50:19.807871 Clearing out pending MCEs
581 14:50:19.811127 Clearing out pending MCEs
582 14:50:19.814478 Setting up local APIC...
583 14:50:19.817913 Setting up local APIC...
584 14:50:19.818473 CPU: vendor Intel device 806ec
585 14:50:19.824143 CPU: family 06, model 8e, stepping 0c
586 14:50:19.824693 Clearing out pending MCEs
587 14:50:19.827694 Setting up local APIC...
588 14:50:19.831443 Setting up local APIC...
589 14:50:19.834182 apic_id: 0x06 done.
590 14:50:19.834625 apic_id: 0x07 done.
591 14:50:19.837621 VMX status: enabled
592 14:50:19.838063 VMX status: enabled
593 14:50:19.844181 IA32_FEATURE_CONTROL status: locked
594 14:50:19.848043 IA32_FEATURE_CONTROL status: locked
595 14:50:19.848592 Skip microcode update
596 14:50:19.850820 apic_id: 0x02 done.
597 14:50:19.854034 apic_id: 0x03 done.
598 14:50:19.854502 VMX status: enabled
599 14:50:19.857389 VMX status: enabled
600 14:50:19.861167 IA32_FEATURE_CONTROL status: locked
601 14:50:19.864133 IA32_FEATURE_CONTROL status: locked
602 14:50:19.867333 Skip microcode update
603 14:50:19.867813 Skip microcode update
604 14:50:19.870993 CPU #6 initialized
605 14:50:19.874299 CPU #7 initialized
606 14:50:19.874778 apic_id: 0x01 done.
607 14:50:19.877175 Clearing out pending MCEs
608 14:50:19.880673 CPU: vendor Intel device 806ec
609 14:50:19.884338 CPU: family 06, model 8e, stepping 0c
610 14:50:19.887795 Setting up local APIC...
611 14:50:19.888376 VMX status: enabled
612 14:50:19.890819 Clearing out pending MCEs
613 14:50:19.893994 apic_id: 0x04 done.
614 14:50:19.896972 IA32_FEATURE_CONTROL status: locked
615 14:50:19.900745 CPU #5 initialized
616 14:50:19.901261 Skip microcode update
617 14:50:19.903665 VMX status: enabled
618 14:50:19.907640 Setting up local APIC...
619 14:50:19.908172 Skip microcode update
620 14:50:19.910714 IA32_FEATURE_CONTROL status: locked
621 14:50:19.913596 apic_id: 0x05 done.
622 14:50:19.916901 Skip microcode update
623 14:50:19.917363 VMX status: enabled
624 14:50:19.920736 CPU #4 initialized
625 14:50:19.923403 IA32_FEATURE_CONTROL status: locked
626 14:50:19.926956 CPU #2 initialized
627 14:50:19.927515 Skip microcode update
628 14:50:19.930303 CPU #3 initialized
629 14:50:19.930735 CPU #1 initialized
630 14:50:19.936841 bsp_do_flight_plan done after 456 msecs.
631 14:50:19.940360 CPU: frequency set to 4200 MHz
632 14:50:19.940806 Enabling SMIs.
633 14:50:19.943533 Locking SMM.
634 14:50:19.956756 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 14:50:19.960580 CBFS @ c08000 size 3f8000
636 14:50:19.967019 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 14:50:19.967455 CBFS: Locating 'vbt.bin'
638 14:50:19.970016 CBFS: Found @ offset 5f5c0 size 499
639 14:50:19.977104 Found a VBT of 4608 bytes after decompression
640 14:50:20.160752 Display FSP Version Info HOB
641 14:50:20.164248 Reference Code - CPU = 9.0.1e.30
642 14:50:20.167301 uCode Version = 0.0.0.ca
643 14:50:20.170769 TXT ACM version = ff.ff.ff.ffff
644 14:50:20.174301 Display FSP Version Info HOB
645 14:50:20.177231 Reference Code - ME = 9.0.1e.30
646 14:50:20.180932 MEBx version = 0.0.0.0
647 14:50:20.184187 ME Firmware Version = Consumer SKU
648 14:50:20.187690 Display FSP Version Info HOB
649 14:50:20.190617 Reference Code - CML PCH = 9.0.1e.30
650 14:50:20.193967 PCH-CRID Status = Disabled
651 14:50:20.197162 PCH-CRID Original Value = ff.ff.ff.ffff
652 14:50:20.200741 PCH-CRID New Value = ff.ff.ff.ffff
653 14:50:20.203528 OPROM - RST - RAID = ff.ff.ff.ffff
654 14:50:20.207053 ChipsetInit Base Version = ff.ff.ff.ffff
655 14:50:20.210428 ChipsetInit Oem Version = ff.ff.ff.ffff
656 14:50:20.213956 Display FSP Version Info HOB
657 14:50:20.220766 Reference Code - SA - System Agent = 9.0.1e.30
658 14:50:20.223836 Reference Code - MRC = 0.7.1.6c
659 14:50:20.224324 SA - PCIe Version = 9.0.1e.30
660 14:50:20.226972 SA-CRID Status = Disabled
661 14:50:20.230499 SA-CRID Original Value = 0.0.0.c
662 14:50:20.233980 SA-CRID New Value = 0.0.0.c
663 14:50:20.236707 OPROM - VBIOS = ff.ff.ff.ffff
664 14:50:20.240310 RTC Init
665 14:50:20.243616 Set power on after power failure.
666 14:50:20.244194 Disabling Deep S3
667 14:50:20.246581 Disabling Deep S3
668 14:50:20.246998 Disabling Deep S4
669 14:50:20.249906 Disabling Deep S4
670 14:50:20.250390 Disabling Deep S5
671 14:50:20.253369 Disabling Deep S5
672 14:50:20.260190 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
673 14:50:20.260682 Enumerating buses...
674 14:50:20.266606 Show all devs... Before device enumeration.
675 14:50:20.267063 Root Device: enabled 1
676 14:50:20.270244 CPU_CLUSTER: 0: enabled 1
677 14:50:20.273715 DOMAIN: 0000: enabled 1
678 14:50:20.276374 APIC: 00: enabled 1
679 14:50:20.276883 PCI: 00:00.0: enabled 1
680 14:50:20.279823 PCI: 00:02.0: enabled 1
681 14:50:20.283774 PCI: 00:04.0: enabled 0
682 14:50:20.286858 PCI: 00:05.0: enabled 0
683 14:50:20.287413 PCI: 00:12.0: enabled 1
684 14:50:20.289912 PCI: 00:12.5: enabled 0
685 14:50:20.293374 PCI: 00:12.6: enabled 0
686 14:50:20.293815 PCI: 00:14.0: enabled 1
687 14:50:20.296476 PCI: 00:14.1: enabled 0
688 14:50:20.299988 PCI: 00:14.3: enabled 1
689 14:50:20.303572 PCI: 00:14.5: enabled 0
690 14:50:20.304122 PCI: 00:15.0: enabled 1
691 14:50:20.306486 PCI: 00:15.1: enabled 1
692 14:50:20.309856 PCI: 00:15.2: enabled 0
693 14:50:20.313220 PCI: 00:15.3: enabled 0
694 14:50:20.313767 PCI: 00:16.0: enabled 1
695 14:50:20.316445 PCI: 00:16.1: enabled 0
696 14:50:20.320013 PCI: 00:16.2: enabled 0
697 14:50:20.322967 PCI: 00:16.3: enabled 0
698 14:50:20.323410 PCI: 00:16.4: enabled 0
699 14:50:20.326613 PCI: 00:16.5: enabled 0
700 14:50:20.329975 PCI: 00:17.0: enabled 1
701 14:50:20.330523 PCI: 00:19.0: enabled 1
702 14:50:20.333213 PCI: 00:19.1: enabled 0
703 14:50:20.336010 PCI: 00:19.2: enabled 0
704 14:50:20.339679 PCI: 00:1a.0: enabled 0
705 14:50:20.340259 PCI: 00:1c.0: enabled 0
706 14:50:20.342813 PCI: 00:1c.1: enabled 0
707 14:50:20.346570 PCI: 00:1c.2: enabled 0
708 14:50:20.349667 PCI: 00:1c.3: enabled 0
709 14:50:20.350246 PCI: 00:1c.4: enabled 0
710 14:50:20.352930 PCI: 00:1c.5: enabled 0
711 14:50:20.356220 PCI: 00:1c.6: enabled 0
712 14:50:20.359576 PCI: 00:1c.7: enabled 0
713 14:50:20.360014 PCI: 00:1d.0: enabled 1
714 14:50:20.362728 PCI: 00:1d.1: enabled 0
715 14:50:20.366057 PCI: 00:1d.2: enabled 0
716 14:50:20.369614 PCI: 00:1d.3: enabled 0
717 14:50:20.370189 PCI: 00:1d.4: enabled 0
718 14:50:20.372702 PCI: 00:1d.5: enabled 1
719 14:50:20.376134 PCI: 00:1e.0: enabled 1
720 14:50:20.376725 PCI: 00:1e.1: enabled 0
721 14:50:20.379649 PCI: 00:1e.2: enabled 1
722 14:50:20.382632 PCI: 00:1e.3: enabled 1
723 14:50:20.385894 PCI: 00:1f.0: enabled 1
724 14:50:20.386336 PCI: 00:1f.1: enabled 1
725 14:50:20.389474 PCI: 00:1f.2: enabled 1
726 14:50:20.392492 PCI: 00:1f.3: enabled 1
727 14:50:20.396060 PCI: 00:1f.4: enabled 1
728 14:50:20.396615 PCI: 00:1f.5: enabled 1
729 14:50:20.399156 PCI: 00:1f.6: enabled 0
730 14:50:20.402275 USB0 port 0: enabled 1
731 14:50:20.402742 I2C: 00:15: enabled 1
732 14:50:20.405995 I2C: 00:5d: enabled 1
733 14:50:20.409332 GENERIC: 0.0: enabled 1
734 14:50:20.412579 I2C: 00:1a: enabled 1
735 14:50:20.413158 I2C: 00:38: enabled 1
736 14:50:20.416014 I2C: 00:39: enabled 1
737 14:50:20.418918 I2C: 00:3a: enabled 1
738 14:50:20.419358 I2C: 00:3b: enabled 1
739 14:50:20.422303 PCI: 00:00.0: enabled 1
740 14:50:20.425728 SPI: 00: enabled 1
741 14:50:20.426167 SPI: 01: enabled 1
742 14:50:20.428790 PNP: 0c09.0: enabled 1
743 14:50:20.432124 USB2 port 0: enabled 1
744 14:50:20.432563 USB2 port 1: enabled 1
745 14:50:20.435646 USB2 port 2: enabled 0
746 14:50:20.438903 USB2 port 3: enabled 0
747 14:50:20.439342 USB2 port 5: enabled 0
748 14:50:20.442287 USB2 port 6: enabled 1
749 14:50:20.445594 USB2 port 9: enabled 1
750 14:50:20.446032 USB3 port 0: enabled 1
751 14:50:20.448790 USB3 port 1: enabled 1
752 14:50:20.452282 USB3 port 2: enabled 1
753 14:50:20.455552 USB3 port 3: enabled 1
754 14:50:20.456042 USB3 port 4: enabled 0
755 14:50:20.458765 APIC: 05: enabled 1
756 14:50:20.462016 APIC: 07: enabled 1
757 14:50:20.462459 APIC: 01: enabled 1
758 14:50:20.465091 APIC: 04: enabled 1
759 14:50:20.465543 APIC: 06: enabled 1
760 14:50:20.468392 APIC: 02: enabled 1
761 14:50:20.471900 APIC: 03: enabled 1
762 14:50:20.472342 Compare with tree...
763 14:50:20.475507 Root Device: enabled 1
764 14:50:20.478488 CPU_CLUSTER: 0: enabled 1
765 14:50:20.478930 APIC: 00: enabled 1
766 14:50:20.481667 APIC: 05: enabled 1
767 14:50:20.485091 APIC: 07: enabled 1
768 14:50:20.488213 APIC: 01: enabled 1
769 14:50:20.488730 APIC: 04: enabled 1
770 14:50:20.491577 APIC: 06: enabled 1
771 14:50:20.494981 APIC: 02: enabled 1
772 14:50:20.495499 APIC: 03: enabled 1
773 14:50:20.498099 DOMAIN: 0000: enabled 1
774 14:50:20.501939 PCI: 00:00.0: enabled 1
775 14:50:20.505454 PCI: 00:02.0: enabled 1
776 14:50:20.506004 PCI: 00:04.0: enabled 0
777 14:50:20.508140 PCI: 00:05.0: enabled 0
778 14:50:20.511734 PCI: 00:12.0: enabled 1
779 14:50:20.515464 PCI: 00:12.5: enabled 0
780 14:50:20.518205 PCI: 00:12.6: enabled 0
781 14:50:20.518649 PCI: 00:14.0: enabled 1
782 14:50:20.521912 USB0 port 0: enabled 1
783 14:50:20.524666 USB2 port 0: enabled 1
784 14:50:20.528284 USB2 port 1: enabled 1
785 14:50:20.531741 USB2 port 2: enabled 0
786 14:50:20.532294 USB2 port 3: enabled 0
787 14:50:20.535101 USB2 port 5: enabled 0
788 14:50:20.537940 USB2 port 6: enabled 1
789 14:50:20.541306 USB2 port 9: enabled 1
790 14:50:20.545030 USB3 port 0: enabled 1
791 14:50:20.548179 USB3 port 1: enabled 1
792 14:50:20.548622 USB3 port 2: enabled 1
793 14:50:20.551463 USB3 port 3: enabled 1
794 14:50:20.554331 USB3 port 4: enabled 0
795 14:50:20.557642 PCI: 00:14.1: enabled 0
796 14:50:20.561035 PCI: 00:14.3: enabled 1
797 14:50:20.561512 PCI: 00:14.5: enabled 0
798 14:50:20.564539 PCI: 00:15.0: enabled 1
799 14:50:20.567825 I2C: 00:15: enabled 1
800 14:50:20.571054 PCI: 00:15.1: enabled 1
801 14:50:20.575045 I2C: 00:5d: enabled 1
802 14:50:20.575595 GENERIC: 0.0: enabled 1
803 14:50:20.577646 PCI: 00:15.2: enabled 0
804 14:50:20.581090 PCI: 00:15.3: enabled 0
805 14:50:20.584992 PCI: 00:16.0: enabled 1
806 14:50:20.587504 PCI: 00:16.1: enabled 0
807 14:50:20.587944 PCI: 00:16.2: enabled 0
808 14:50:20.591366 PCI: 00:16.3: enabled 0
809 14:50:20.594724 PCI: 00:16.4: enabled 0
810 14:50:20.597801 PCI: 00:16.5: enabled 0
811 14:50:20.598350 PCI: 00:17.0: enabled 1
812 14:50:20.601106 PCI: 00:19.0: enabled 1
813 14:50:20.604351 I2C: 00:1a: enabled 1
814 14:50:20.607710 I2C: 00:38: enabled 1
815 14:50:20.611167 I2C: 00:39: enabled 1
816 14:50:20.611708 I2C: 00:3a: enabled 1
817 14:50:20.614167 I2C: 00:3b: enabled 1
818 14:50:20.617811 PCI: 00:19.1: enabled 0
819 14:50:20.620998 PCI: 00:19.2: enabled 0
820 14:50:20.621575 PCI: 00:1a.0: enabled 0
821 14:50:20.624258 PCI: 00:1c.0: enabled 0
822 14:50:20.627870 PCI: 00:1c.1: enabled 0
823 14:50:20.630547 PCI: 00:1c.2: enabled 0
824 14:50:20.634255 PCI: 00:1c.3: enabled 0
825 14:50:20.634896 PCI: 00:1c.4: enabled 0
826 14:50:20.637600 PCI: 00:1c.5: enabled 0
827 14:50:20.640559 PCI: 00:1c.6: enabled 0
828 14:50:20.644142 PCI: 00:1c.7: enabled 0
829 14:50:20.647338 PCI: 00:1d.0: enabled 1
830 14:50:20.647808 PCI: 00:1d.1: enabled 0
831 14:50:20.650423 PCI: 00:1d.2: enabled 0
832 14:50:20.653882 PCI: 00:1d.3: enabled 0
833 14:50:20.657166 PCI: 00:1d.4: enabled 0
834 14:50:20.660460 PCI: 00:1d.5: enabled 1
835 14:50:20.660890 PCI: 00:00.0: enabled 1
836 14:50:20.663962 PCI: 00:1e.0: enabled 1
837 14:50:20.667221 PCI: 00:1e.1: enabled 0
838 14:50:20.670331 PCI: 00:1e.2: enabled 1
839 14:50:20.670767 SPI: 00: enabled 1
840 14:50:20.673990 PCI: 00:1e.3: enabled 1
841 14:50:20.677492 SPI: 01: enabled 1
842 14:50:20.680538 PCI: 00:1f.0: enabled 1
843 14:50:20.683957 PNP: 0c09.0: enabled 1
844 14:50:20.684502 PCI: 00:1f.1: enabled 1
845 14:50:20.687173 PCI: 00:1f.2: enabled 1
846 14:50:20.690848 PCI: 00:1f.3: enabled 1
847 14:50:20.693899 PCI: 00:1f.4: enabled 1
848 14:50:20.694442 PCI: 00:1f.5: enabled 1
849 14:50:20.697391 PCI: 00:1f.6: enabled 0
850 14:50:20.700040 Root Device scanning...
851 14:50:20.703622 scan_static_bus for Root Device
852 14:50:20.707013 CPU_CLUSTER: 0 enabled
853 14:50:20.707579 DOMAIN: 0000 enabled
854 14:50:20.710286 DOMAIN: 0000 scanning...
855 14:50:20.713529 PCI: pci_scan_bus for bus 00
856 14:50:20.716956 PCI: 00:00.0 [8086/0000] ops
857 14:50:20.720392 PCI: 00:00.0 [8086/9b61] enabled
858 14:50:20.724166 PCI: 00:02.0 [8086/0000] bus ops
859 14:50:20.726898 PCI: 00:02.0 [8086/9b41] enabled
860 14:50:20.730445 PCI: 00:04.0 [8086/1903] disabled
861 14:50:20.733886 PCI: 00:08.0 [8086/1911] enabled
862 14:50:20.736834 PCI: 00:12.0 [8086/02f9] enabled
863 14:50:20.740029 PCI: 00:14.0 [8086/0000] bus ops
864 14:50:20.743183 PCI: 00:14.0 [8086/02ed] enabled
865 14:50:20.746618 PCI: 00:14.2 [8086/02ef] enabled
866 14:50:20.749994 PCI: 00:14.3 [8086/02f0] enabled
867 14:50:20.753430 PCI: 00:15.0 [8086/0000] bus ops
868 14:50:20.756399 PCI: 00:15.0 [8086/02e8] enabled
869 14:50:20.759828 PCI: 00:15.1 [8086/0000] bus ops
870 14:50:20.763095 PCI: 00:15.1 [8086/02e9] enabled
871 14:50:20.767131 PCI: 00:16.0 [8086/0000] ops
872 14:50:20.770100 PCI: 00:16.0 [8086/02e0] enabled
873 14:50:20.773195 PCI: 00:17.0 [8086/0000] ops
874 14:50:20.776660 PCI: 00:17.0 [8086/02d3] enabled
875 14:50:20.780050 PCI: 00:19.0 [8086/0000] bus ops
876 14:50:20.783093 PCI: 00:19.0 [8086/02c5] enabled
877 14:50:20.786457 PCI: 00:1d.0 [8086/0000] bus ops
878 14:50:20.790120 PCI: 00:1d.0 [8086/02b0] enabled
879 14:50:20.796598 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 14:50:20.800127 PCI: 00:1e.0 [8086/0000] ops
881 14:50:20.802873 PCI: 00:1e.0 [8086/02a8] enabled
882 14:50:20.806580 PCI: 00:1e.2 [8086/0000] bus ops
883 14:50:20.809681 PCI: 00:1e.2 [8086/02aa] enabled
884 14:50:20.813175 PCI: 00:1e.3 [8086/0000] bus ops
885 14:50:20.816675 PCI: 00:1e.3 [8086/02ab] enabled
886 14:50:20.819352 PCI: 00:1f.0 [8086/0000] bus ops
887 14:50:20.823179 PCI: 00:1f.0 [8086/0284] enabled
888 14:50:20.825885 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 14:50:20.832643 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 14:50:20.836277 PCI: 00:1f.3 [8086/0000] bus ops
891 14:50:20.839590 PCI: 00:1f.3 [8086/02c8] enabled
892 14:50:20.842870 PCI: 00:1f.4 [8086/0000] bus ops
893 14:50:20.846317 PCI: 00:1f.4 [8086/02a3] enabled
894 14:50:20.849981 PCI: 00:1f.5 [8086/0000] bus ops
895 14:50:20.852621 PCI: 00:1f.5 [8086/02a4] enabled
896 14:50:20.855808 PCI: Leftover static devices:
897 14:50:20.856291 PCI: 00:05.0
898 14:50:20.859303 PCI: 00:12.5
899 14:50:20.859740 PCI: 00:12.6
900 14:50:20.862725 PCI: 00:14.1
901 14:50:20.863177 PCI: 00:14.5
902 14:50:20.863523 PCI: 00:15.2
903 14:50:20.866043 PCI: 00:15.3
904 14:50:20.866475 PCI: 00:16.1
905 14:50:20.869423 PCI: 00:16.2
906 14:50:20.869881 PCI: 00:16.3
907 14:50:20.870406 PCI: 00:16.4
908 14:50:20.872462 PCI: 00:16.5
909 14:50:20.872899 PCI: 00:19.1
910 14:50:20.875844 PCI: 00:19.2
911 14:50:20.876547 PCI: 00:1a.0
912 14:50:20.879138 PCI: 00:1c.0
913 14:50:20.879573 PCI: 00:1c.1
914 14:50:20.879917 PCI: 00:1c.2
915 14:50:20.882507 PCI: 00:1c.3
916 14:50:20.883026 PCI: 00:1c.4
917 14:50:20.885924 PCI: 00:1c.5
918 14:50:20.886362 PCI: 00:1c.6
919 14:50:20.886702 PCI: 00:1c.7
920 14:50:20.888927 PCI: 00:1d.1
921 14:50:20.889389 PCI: 00:1d.2
922 14:50:20.892493 PCI: 00:1d.3
923 14:50:20.893014 PCI: 00:1d.4
924 14:50:20.893396 PCI: 00:1d.5
925 14:50:20.895982 PCI: 00:1e.1
926 14:50:20.896497 PCI: 00:1f.1
927 14:50:20.898853 PCI: 00:1f.2
928 14:50:20.899286 PCI: 00:1f.6
929 14:50:20.902120 PCI: Check your devicetree.cb.
930 14:50:20.905532 PCI: 00:02.0 scanning...
931 14:50:20.909160 scan_generic_bus for PCI: 00:02.0
932 14:50:20.912409 scan_generic_bus for PCI: 00:02.0 done
933 14:50:20.918884 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
934 14:50:20.922390 PCI: 00:14.0 scanning...
935 14:50:20.925560 scan_static_bus for PCI: 00:14.0
936 14:50:20.926078 USB0 port 0 enabled
937 14:50:20.929004 USB0 port 0 scanning...
938 14:50:20.931941 scan_static_bus for USB0 port 0
939 14:50:20.935664 USB2 port 0 enabled
940 14:50:20.936180 USB2 port 1 enabled
941 14:50:20.938773 USB2 port 2 disabled
942 14:50:20.941655 USB2 port 3 disabled
943 14:50:20.942092 USB2 port 5 disabled
944 14:50:20.945123 USB2 port 6 enabled
945 14:50:20.945557 USB2 port 9 enabled
946 14:50:20.948490 USB3 port 0 enabled
947 14:50:20.952090 USB3 port 1 enabled
948 14:50:20.952548 USB3 port 2 enabled
949 14:50:20.955615 USB3 port 3 enabled
950 14:50:20.958183 USB3 port 4 disabled
951 14:50:20.958617 USB2 port 0 scanning...
952 14:50:20.962038 scan_static_bus for USB2 port 0
953 14:50:20.968365 scan_static_bus for USB2 port 0 done
954 14:50:20.971958 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
955 14:50:20.975313 USB2 port 1 scanning...
956 14:50:20.978531 scan_static_bus for USB2 port 1
957 14:50:20.981971 scan_static_bus for USB2 port 1 done
958 14:50:20.988176 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
959 14:50:20.988611 USB2 port 6 scanning...
960 14:50:20.992039 scan_static_bus for USB2 port 6
961 14:50:20.998707 scan_static_bus for USB2 port 6 done
962 14:50:21.001534 scan_bus: scanning of bus USB2 port 6 took 9692 usecs
963 14:50:21.005484 USB2 port 9 scanning...
964 14:50:21.008676 scan_static_bus for USB2 port 9
965 14:50:21.011753 scan_static_bus for USB2 port 9 done
966 14:50:21.018430 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
967 14:50:21.018984 USB3 port 0 scanning...
968 14:50:21.021531 scan_static_bus for USB3 port 0
969 14:50:21.028363 scan_static_bus for USB3 port 0 done
970 14:50:21.031792 scan_bus: scanning of bus USB3 port 0 took 9707 usecs
971 14:50:21.035009 USB3 port 1 scanning...
972 14:50:21.038015 scan_static_bus for USB3 port 1
973 14:50:21.041627 scan_static_bus for USB3 port 1 done
974 14:50:21.048326 scan_bus: scanning of bus USB3 port 1 took 9688 usecs
975 14:50:21.048872 USB3 port 2 scanning...
976 14:50:21.051871 scan_static_bus for USB3 port 2
977 14:50:21.058211 scan_static_bus for USB3 port 2 done
978 14:50:21.061618 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
979 14:50:21.065057 USB3 port 3 scanning...
980 14:50:21.068319 scan_static_bus for USB3 port 3
981 14:50:21.071268 scan_static_bus for USB3 port 3 done
982 14:50:21.077942 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
983 14:50:21.081545 scan_static_bus for USB0 port 0 done
984 14:50:21.084781 scan_bus: scanning of bus USB0 port 0 took 155332 usecs
985 14:50:21.091820 scan_static_bus for PCI: 00:14.0 done
986 14:50:21.094906 scan_bus: scanning of bus PCI: 00:14.0 took 172948 usecs
987 14:50:21.098538 PCI: 00:15.0 scanning...
988 14:50:21.101355 scan_generic_bus for PCI: 00:15.0
989 14:50:21.104891 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 14:50:21.111180 scan_generic_bus for PCI: 00:15.0 done
991 14:50:21.114596 scan_bus: scanning of bus PCI: 00:15.0 took 14287 usecs
992 14:50:21.117925 PCI: 00:15.1 scanning...
993 14:50:21.121146 scan_generic_bus for PCI: 00:15.1
994 14:50:21.124783 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 14:50:21.131389 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 14:50:21.134706 scan_generic_bus for PCI: 00:15.1 done
997 14:50:21.141635 scan_bus: scanning of bus PCI: 00:15.1 took 18595 usecs
998 14:50:21.142203 PCI: 00:19.0 scanning...
999 14:50:21.144852 scan_generic_bus for PCI: 00:19.0
1000 14:50:21.151424 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 14:50:21.154406 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 14:50:21.157686 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 14:50:21.160792 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 14:50:21.167622 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 14:50:21.171020 scan_generic_bus for PCI: 00:19.0 done
1006 14:50:21.174667 scan_bus: scanning of bus PCI: 00:19.0 took 30719 usecs
1007 14:50:21.177994 PCI: 00:1d.0 scanning...
1008 14:50:21.180854 do_pci_scan_bridge for PCI: 00:1d.0
1009 14:50:21.184589 PCI: pci_scan_bus for bus 01
1010 14:50:21.187382 PCI: 01:00.0 [1c5c/1327] enabled
1011 14:50:21.190976 Enabling Common Clock Configuration
1012 14:50:21.197299 L1 Sub-State supported from root port 29
1013 14:50:21.201039 L1 Sub-State Support = 0xf
1014 14:50:21.201606 CommonModeRestoreTime = 0x28
1015 14:50:21.207495 Power On Value = 0x16, Power On Scale = 0x0
1016 14:50:21.208038 ASPM: Enabled L1
1017 14:50:21.214014 scan_bus: scanning of bus PCI: 00:1d.0 took 32768 usecs
1018 14:50:21.217454 PCI: 00:1e.2 scanning...
1019 14:50:21.220864 scan_generic_bus for PCI: 00:1e.2
1020 14:50:21.224076 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 14:50:21.227102 scan_generic_bus for PCI: 00:1e.2 done
1022 14:50:21.234267 scan_bus: scanning of bus PCI: 00:1e.2 took 13995 usecs
1023 14:50:21.237158 PCI: 00:1e.3 scanning...
1024 14:50:21.240940 scan_generic_bus for PCI: 00:1e.3
1025 14:50:21.243972 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 14:50:21.247385 scan_generic_bus for PCI: 00:1e.3 done
1027 14:50:21.253798 scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs
1028 14:50:21.254245 PCI: 00:1f.0 scanning...
1029 14:50:21.257294 scan_static_bus for PCI: 00:1f.0
1030 14:50:21.260647 PNP: 0c09.0 enabled
1031 14:50:21.264049 scan_static_bus for PCI: 00:1f.0 done
1032 14:50:21.270675 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1033 14:50:21.274019 PCI: 00:1f.3 scanning...
1034 14:50:21.277031 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1035 14:50:21.280728 PCI: 00:1f.4 scanning...
1036 14:50:21.284149 scan_generic_bus for PCI: 00:1f.4
1037 14:50:21.290178 scan_generic_bus for PCI: 00:1f.4 done
1038 14:50:21.293589 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1039 14:50:21.297163 PCI: 00:1f.5 scanning...
1040 14:50:21.300415 scan_generic_bus for PCI: 00:1f.5
1041 14:50:21.303658 scan_generic_bus for PCI: 00:1f.5 done
1042 14:50:21.310500 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1043 14:50:21.316658 scan_bus: scanning of bus DOMAIN: 0000 took 604873 usecs
1044 14:50:21.320212 scan_static_bus for Root Device done
1045 14:50:21.323358 scan_bus: scanning of bus Root Device took 624788 usecs
1046 14:50:21.326671 done
1047 14:50:21.330294 Chrome EC: UHEPI supported
1048 14:50:21.333709 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 14:50:21.340218 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 14:50:21.346921 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 14:50:21.353343 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 14:50:21.356537 SPI flash protection: WPSW=0 SRP0=0
1053 14:50:21.363143 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 14:50:21.366277 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1055 14:50:21.369935 found VGA at PCI: 00:02.0
1056 14:50:21.373503 Setting up VGA for PCI: 00:02.0
1057 14:50:21.380004 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 14:50:21.383036 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 14:50:21.386635 Allocating resources...
1060 14:50:21.389475 Reading resources...
1061 14:50:21.392780 Root Device read_resources bus 0 link: 0
1062 14:50:21.396454 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 14:50:21.402838 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 14:50:21.407054 DOMAIN: 0000 read_resources bus 0 link: 0
1065 14:50:21.413408 PCI: 00:14.0 read_resources bus 0 link: 0
1066 14:50:21.416549 USB0 port 0 read_resources bus 0 link: 0
1067 14:50:21.424566 USB0 port 0 read_resources bus 0 link: 0 done
1068 14:50:21.428392 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 14:50:21.435349 PCI: 00:15.0 read_resources bus 1 link: 0
1070 14:50:21.438888 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 14:50:21.445187 PCI: 00:15.1 read_resources bus 2 link: 0
1072 14:50:21.448783 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 14:50:21.456239 PCI: 00:19.0 read_resources bus 3 link: 0
1074 14:50:21.462912 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 14:50:21.466097 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 14:50:21.472807 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 14:50:21.476138 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 14:50:21.482904 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 14:50:21.486100 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 14:50:21.492170 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 14:50:21.496083 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 14:50:21.502758 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 14:50:21.509197 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 14:50:21.512550 Root Device read_resources bus 0 link: 0 done
1085 14:50:21.516072 Done reading resources.
1086 14:50:21.519081 Show resources in subtree (Root Device)...After reading.
1087 14:50:21.525891 Root Device child on link 0 CPU_CLUSTER: 0
1088 14:50:21.528970 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 14:50:21.529765 APIC: 00
1090 14:50:21.532115 APIC: 05
1091 14:50:21.532672 APIC: 07
1092 14:50:21.535798 APIC: 01
1093 14:50:21.536386 APIC: 04
1094 14:50:21.536771 APIC: 06
1095 14:50:21.538922 APIC: 02
1096 14:50:21.539407 APIC: 03
1097 14:50:21.542568 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 14:50:21.598655 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 14:50:21.599305 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 14:50:21.599709 PCI: 00:00.0
1101 14:50:21.600483 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 14:50:21.600878 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 14:50:21.601294 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 14:50:21.648311 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 14:50:21.648852 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 14:50:21.649681 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 14:50:21.650064 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 14:50:21.650398 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 14:50:21.650720 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 14:50:21.698014 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 14:50:21.698925 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 14:50:21.699305 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 14:50:21.699646 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 14:50:21.700314 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 14:50:21.735002 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 14:50:21.736020 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 14:50:21.736414 PCI: 00:02.0
1118 14:50:21.736757 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 14:50:21.737119 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 14:50:21.745546 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 14:50:21.746060 PCI: 00:04.0
1122 14:50:21.749087 PCI: 00:08.0
1123 14:50:21.759131 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 14:50:21.759581 PCI: 00:12.0
1125 14:50:21.768975 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 14:50:21.775371 PCI: 00:14.0 child on link 0 USB0 port 0
1127 14:50:21.785350 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 14:50:21.788603 USB0 port 0 child on link 0 USB2 port 0
1129 14:50:21.789044 USB2 port 0
1130 14:50:21.792187 USB2 port 1
1131 14:50:21.792645 USB2 port 2
1132 14:50:21.795318 USB2 port 3
1133 14:50:21.798871 USB2 port 5
1134 14:50:21.799433 USB2 port 6
1135 14:50:21.801878 USB2 port 9
1136 14:50:21.802323 USB3 port 0
1137 14:50:21.805481 USB3 port 1
1138 14:50:21.806027 USB3 port 2
1139 14:50:21.808835 USB3 port 3
1140 14:50:21.809385 USB3 port 4
1141 14:50:21.812216 PCI: 00:14.2
1142 14:50:21.822037 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 14:50:21.832360 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 14:50:21.832916 PCI: 00:14.3
1145 14:50:21.841774 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 14:50:21.848397 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 14:50:21.858564 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 14:50:21.859162 I2C: 01:15
1149 14:50:21.861821 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 14:50:21.871630 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 14:50:21.874816 I2C: 02:5d
1152 14:50:21.875252 GENERIC: 0.0
1153 14:50:21.878415 PCI: 00:16.0
1154 14:50:21.888478 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 14:50:21.889097 PCI: 00:17.0
1156 14:50:21.898318 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 14:50:21.908130 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 14:50:21.914723 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 14:50:21.924910 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 14:50:21.931756 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 14:50:21.941498 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 14:50:21.944717 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 14:50:21.954671 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 14:50:21.957744 I2C: 03:1a
1165 14:50:21.958382 I2C: 03:38
1166 14:50:21.961057 I2C: 03:39
1167 14:50:21.961575 I2C: 03:3a
1168 14:50:21.964440 I2C: 03:3b
1169 14:50:21.967919 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 14:50:21.977510 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 14:50:21.987521 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 14:50:21.994040 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 14:50:21.997184 PCI: 01:00.0
1174 14:50:22.007128 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 14:50:22.007683 PCI: 00:1e.0
1176 14:50:22.020512 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 14:50:22.030329 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 14:50:22.033590 PCI: 00:1e.2 child on link 0 SPI: 00
1179 14:50:22.043862 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 14:50:22.044435 SPI: 00
1181 14:50:22.046659 PCI: 00:1e.3 child on link 0 SPI: 01
1182 14:50:22.056727 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 14:50:22.060064 SPI: 01
1184 14:50:22.063578 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 14:50:22.073424 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 14:50:22.080211 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 14:50:22.083647 PNP: 0c09.0
1188 14:50:22.093147 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 14:50:22.093711 PCI: 00:1f.3
1190 14:50:22.103506 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 14:50:22.113445 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 14:50:22.116584 PCI: 00:1f.4
1193 14:50:22.123418 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 14:50:22.133390 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 14:50:22.136632 PCI: 00:1f.5
1196 14:50:22.146059 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 14:50:22.152815 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 14:50:22.156641 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 14:50:22.166088 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 14:50:22.169523 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 14:50:22.172572 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 14:50:22.176163 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 14:50:22.179702 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 14:50:22.185998 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 14:50:22.192544 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 14:50:22.199364 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 14:50:22.209256 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 14:50:22.215571 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 14:50:22.219200 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 14:50:22.228770 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 14:50:22.232373 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 14:50:22.235174 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 14:50:22.242153 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 14:50:22.245201 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 14:50:22.251898 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 14:50:22.255590 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 14:50:22.261984 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 14:50:22.264995 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 14:50:22.271951 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 14:50:22.274987 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 14:50:22.281734 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 14:50:22.285295 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 14:50:22.291837 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 14:50:22.295212 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 14:50:22.298541 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 14:50:22.305164 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 14:50:22.308402 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 14:50:22.314826 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 14:50:22.318077 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 14:50:22.325151 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 14:50:22.328109 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 14:50:22.334694 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 14:50:22.338610 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 14:50:22.348114 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 14:50:22.351066 avoid_fixed_resources: DOMAIN: 0000
1236 14:50:22.357995 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 14:50:22.361282 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 14:50:22.371467 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 14:50:22.377517 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 14:50:22.384572 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 14:50:22.394328 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 14:50:22.401489 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 14:50:22.407437 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 14:50:22.417562 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 14:50:22.424270 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 14:50:22.430788 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 14:50:22.437363 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 14:50:22.441098 Setting resources...
1249 14:50:22.447643 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 14:50:22.450823 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 14:50:22.454295 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 14:50:22.457372 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 14:50:22.464203 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 14:50:22.470272 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 14:50:22.473777 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 14:50:22.480609 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 14:50:22.490377 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 14:50:22.493347 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 14:50:22.500078 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 14:50:22.503546 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 14:50:22.510170 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 14:50:22.513599 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 14:50:22.520013 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 14:50:22.523441 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 14:50:22.526781 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 14:50:22.533439 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 14:50:22.536775 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 14:50:22.543150 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 14:50:22.546554 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 14:50:22.553436 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 14:50:22.556388 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 14:50:22.563349 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 14:50:22.566820 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 14:50:22.573309 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 14:50:22.576813 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 14:50:22.583338 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 14:50:22.586695 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 14:50:22.593320 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 14:50:22.596607 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 14:50:22.600008 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 14:50:22.610174 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 14:50:22.616647 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 14:50:22.623315 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 14:50:22.629922 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 14:50:22.636809 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 14:50:22.643262 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 14:50:22.646499 Root Device assign_resources, bus 0 link: 0
1288 14:50:22.653117 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 14:50:22.659904 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 14:50:22.669347 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 14:50:22.676491 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 14:50:22.686085 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 14:50:22.692979 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 14:50:22.702717 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 14:50:22.706395 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 14:50:22.712653 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 14:50:22.719234 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 14:50:22.725897 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 14:50:22.736241 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 14:50:22.742827 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 14:50:22.749093 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 14:50:22.752497 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 14:50:22.762921 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 14:50:22.766019 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 14:50:22.769323 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 14:50:22.779546 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 14:50:22.786486 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 14:50:22.795744 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 14:50:22.802400 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 14:50:22.808897 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 14:50:22.819156 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 14:50:22.825920 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 14:50:22.835583 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 14:50:22.839069 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 14:50:22.842082 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 14:50:22.851932 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 14:50:22.862209 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 14:50:22.868499 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 14:50:22.875367 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 14:50:22.881552 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 14:50:22.888314 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 14:50:22.894688 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 14:50:22.904588 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 14:50:22.908147 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 14:50:22.911757 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 14:50:22.921700 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 14:50:22.924944 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 14:50:22.931337 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 14:50:22.934674 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 14:50:22.941309 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 14:50:22.944622 LPC: Trying to open IO window from 800 size 1ff
1332 14:50:22.954318 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 14:50:22.960693 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 14:50:22.970759 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 14:50:22.977307 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 14:50:22.980733 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 14:50:22.987390 Root Device assign_resources, bus 0 link: 0
1338 14:50:22.990994 Done setting resources.
1339 14:50:22.997248 Show resources in subtree (Root Device)...After assigning values.
1340 14:50:23.000984 Root Device child on link 0 CPU_CLUSTER: 0
1341 14:50:23.003953 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 14:50:23.004397 APIC: 00
1343 14:50:23.007179 APIC: 05
1344 14:50:23.007683 APIC: 07
1345 14:50:23.010517 APIC: 01
1346 14:50:23.010943 APIC: 04
1347 14:50:23.011280 APIC: 06
1348 14:50:23.014015 APIC: 02
1349 14:50:23.014439 APIC: 03
1350 14:50:23.017376 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 14:50:23.026979 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 14:50:23.040516 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 14:50:23.040995 PCI: 00:00.0
1354 14:50:23.050122 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 14:50:23.060258 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 14:50:23.070120 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 14:50:23.080243 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 14:50:23.090119 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 14:50:23.096214 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 14:50:23.106432 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 14:50:23.116083 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 14:50:23.126429 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 14:50:23.136256 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 14:50:23.143110 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 14:50:23.153160 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 14:50:23.162321 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 14:50:23.172635 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 14:50:23.182395 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 14:50:23.192362 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 14:50:23.192903 PCI: 00:02.0
1371 14:50:23.202331 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 14:50:23.215522 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 14:50:23.221869 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 14:50:23.225262 PCI: 00:04.0
1375 14:50:23.225723 PCI: 00:08.0
1376 14:50:23.238652 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 14:50:23.239211 PCI: 00:12.0
1378 14:50:23.248296 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 14:50:23.251604 PCI: 00:14.0 child on link 0 USB0 port 0
1380 14:50:23.265025 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 14:50:23.267943 USB0 port 0 child on link 0 USB2 port 0
1382 14:50:23.268384 USB2 port 0
1383 14:50:23.271292 USB2 port 1
1384 14:50:23.274758 USB2 port 2
1385 14:50:23.275199 USB2 port 3
1386 14:50:23.278187 USB2 port 5
1387 14:50:23.278628 USB2 port 6
1388 14:50:23.281669 USB2 port 9
1389 14:50:23.282117 USB3 port 0
1390 14:50:23.284643 USB3 port 1
1391 14:50:23.285124 USB3 port 2
1392 14:50:23.288053 USB3 port 3
1393 14:50:23.288488 USB3 port 4
1394 14:50:23.291136 PCI: 00:14.2
1395 14:50:23.301555 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 14:50:23.311437 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 14:50:23.314620 PCI: 00:14.3
1398 14:50:23.324476 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 14:50:23.327882 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 14:50:23.337641 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 14:50:23.341231 I2C: 01:15
1402 14:50:23.344702 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 14:50:23.354110 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 14:50:23.354621 I2C: 02:5d
1405 14:50:23.357832 GENERIC: 0.0
1406 14:50:23.358397 PCI: 00:16.0
1407 14:50:23.370764 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 14:50:23.371232 PCI: 00:17.0
1409 14:50:23.380755 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 14:50:23.390767 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 14:50:23.400555 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 14:50:23.410411 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 14:50:23.420415 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 14:50:23.429909 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 14:50:23.433560 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 14:50:23.443524 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 14:50:23.446801 I2C: 03:1a
1418 14:50:23.447342 I2C: 03:38
1419 14:50:23.447692 I2C: 03:39
1420 14:50:23.449850 I2C: 03:3a
1421 14:50:23.450293 I2C: 03:3b
1422 14:50:23.456359 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 14:50:23.466069 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 14:50:23.476494 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 14:50:23.486491 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 14:50:23.487039 PCI: 01:00.0
1427 14:50:23.496274 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 14:50:23.499169 PCI: 00:1e.0
1429 14:50:23.509115 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 14:50:23.519611 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 14:50:23.525987 PCI: 00:1e.2 child on link 0 SPI: 00
1432 14:50:23.535633 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 14:50:23.536081 SPI: 00
1434 14:50:23.539094 PCI: 00:1e.3 child on link 0 SPI: 01
1435 14:50:23.548861 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 14:50:23.552588 SPI: 01
1437 14:50:23.556059 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 14:50:23.565654 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 14:50:23.572208 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 14:50:23.575503 PNP: 0c09.0
1441 14:50:23.585396 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 14:50:23.585847 PCI: 00:1f.3
1443 14:50:23.595561 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 14:50:23.605505 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 14:50:23.608422 PCI: 00:1f.4
1446 14:50:23.618219 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 14:50:23.628080 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 14:50:23.628609 PCI: 00:1f.5
1449 14:50:23.638332 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 14:50:23.641903 Done allocating resources.
1451 14:50:23.648055 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 14:50:23.651539 Enabling resources...
1453 14:50:23.654528 PCI: 00:00.0 subsystem <- 8086/9b61
1454 14:50:23.658009 PCI: 00:00.0 cmd <- 06
1455 14:50:23.661521 PCI: 00:02.0 subsystem <- 8086/9b41
1456 14:50:23.664768 PCI: 00:02.0 cmd <- 03
1457 14:50:23.667920 PCI: 00:08.0 cmd <- 06
1458 14:50:23.670874 PCI: 00:12.0 subsystem <- 8086/02f9
1459 14:50:23.671371 PCI: 00:12.0 cmd <- 02
1460 14:50:23.677744 PCI: 00:14.0 subsystem <- 8086/02ed
1461 14:50:23.678207 PCI: 00:14.0 cmd <- 02
1462 14:50:23.681253 PCI: 00:14.2 cmd <- 02
1463 14:50:23.684166 PCI: 00:14.3 subsystem <- 8086/02f0
1464 14:50:23.687814 PCI: 00:14.3 cmd <- 02
1465 14:50:23.691403 PCI: 00:15.0 subsystem <- 8086/02e8
1466 14:50:23.694300 PCI: 00:15.0 cmd <- 02
1467 14:50:23.697626 PCI: 00:15.1 subsystem <- 8086/02e9
1468 14:50:23.700600 PCI: 00:15.1 cmd <- 02
1469 14:50:23.703996 PCI: 00:16.0 subsystem <- 8086/02e0
1470 14:50:23.707584 PCI: 00:16.0 cmd <- 02
1471 14:50:23.710903 PCI: 00:17.0 subsystem <- 8086/02d3
1472 14:50:23.714118 PCI: 00:17.0 cmd <- 03
1473 14:50:23.716972 PCI: 00:19.0 subsystem <- 8086/02c5
1474 14:50:23.720788 PCI: 00:19.0 cmd <- 02
1475 14:50:23.723692 PCI: 00:1d.0 bridge ctrl <- 0013
1476 14:50:23.727108 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 14:50:23.727652 PCI: 00:1d.0 cmd <- 06
1478 14:50:23.733853 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 14:50:23.734293 PCI: 00:1e.0 cmd <- 06
1480 14:50:23.736935 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 14:50:23.740573 PCI: 00:1e.2 cmd <- 06
1482 14:50:23.744104 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 14:50:23.747247 PCI: 00:1e.3 cmd <- 02
1484 14:50:23.750585 PCI: 00:1f.0 subsystem <- 8086/0284
1485 14:50:23.753636 PCI: 00:1f.0 cmd <- 407
1486 14:50:23.757309 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 14:50:23.760182 PCI: 00:1f.3 cmd <- 02
1488 14:50:23.763909 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 14:50:23.766672 PCI: 00:1f.4 cmd <- 03
1490 14:50:23.770024 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 14:50:23.773551 PCI: 00:1f.5 cmd <- 406
1492 14:50:23.781690 PCI: 01:00.0 cmd <- 02
1493 14:50:23.786994 done.
1494 14:50:23.800605 ME: Version: 14.0.39.1367
1495 14:50:23.807035 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1496 14:50:23.810822 Initializing devices...
1497 14:50:23.811368 Root Device init ...
1498 14:50:23.816956 Chrome EC: Set SMI mask to 0x0000000000000000
1499 14:50:23.819999 Chrome EC: clear events_b mask to 0x0000000000000000
1500 14:50:23.826735 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 14:50:23.833547 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 14:50:23.840171 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 14:50:23.843498 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 14:50:23.847087 Root Device init finished in 35242 usecs
1505 14:50:23.850443 CPU_CLUSTER: 0 init ...
1506 14:50:23.857184 CPU_CLUSTER: 0 init finished in 2448 usecs
1507 14:50:23.861753 PCI: 00:00.0 init ...
1508 14:50:23.864390 CPU TDP: 15 Watts
1509 14:50:23.868019 CPU PL2 = 64 Watts
1510 14:50:23.870947 PCI: 00:00.0 init finished in 7084 usecs
1511 14:50:23.874532 PCI: 00:02.0 init ...
1512 14:50:23.877937 PCI: 00:02.0 init finished in 2254 usecs
1513 14:50:23.880798 PCI: 00:08.0 init ...
1514 14:50:23.884333 PCI: 00:08.0 init finished in 2253 usecs
1515 14:50:23.887764 PCI: 00:12.0 init ...
1516 14:50:23.890702 PCI: 00:12.0 init finished in 2254 usecs
1517 14:50:23.894241 PCI: 00:14.0 init ...
1518 14:50:23.897579 PCI: 00:14.0 init finished in 2254 usecs
1519 14:50:23.900909 PCI: 00:14.2 init ...
1520 14:50:23.904269 PCI: 00:14.2 init finished in 2253 usecs
1521 14:50:23.907745 PCI: 00:14.3 init ...
1522 14:50:23.911087 PCI: 00:14.3 init finished in 2274 usecs
1523 14:50:23.914190 PCI: 00:15.0 init ...
1524 14:50:23.917051 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 14:50:23.920570 PCI: 00:15.0 init finished in 5980 usecs
1526 14:50:23.924437 PCI: 00:15.1 init ...
1527 14:50:23.927421 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 14:50:23.934171 PCI: 00:15.1 init finished in 5972 usecs
1529 14:50:23.934688 PCI: 00:16.0 init ...
1530 14:50:23.940566 PCI: 00:16.0 init finished in 2253 usecs
1531 14:50:23.943706 PCI: 00:19.0 init ...
1532 14:50:23.947351 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 14:50:23.950754 PCI: 00:19.0 init finished in 5971 usecs
1534 14:50:23.953828 PCI: 00:1d.0 init ...
1535 14:50:23.956919 Initializing PCH PCIe bridge.
1536 14:50:23.960463 PCI: 00:1d.0 init finished in 5288 usecs
1537 14:50:23.963941 PCI: 00:1f.0 init ...
1538 14:50:23.966981 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 14:50:23.973408 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 14:50:23.973842 IOAPIC: ID = 0x02
1541 14:50:23.977175 IOAPIC: Dumping registers
1542 14:50:23.980371 reg 0x0000: 0x02000000
1543 14:50:23.983317 reg 0x0001: 0x00770020
1544 14:50:23.983748 reg 0x0002: 0x00000000
1545 14:50:23.990299 PCI: 00:1f.0 init finished in 23552 usecs
1546 14:50:23.993132 PCI: 00:1f.4 init ...
1547 14:50:23.996685 PCI: 00:1f.4 init finished in 2262 usecs
1548 14:50:24.007885 PCI: 01:00.0 init ...
1549 14:50:24.010895 PCI: 01:00.0 init finished in 2253 usecs
1550 14:50:24.014991 PNP: 0c09.0 init ...
1551 14:50:24.018525 Google Chrome EC uptime: 11.063 seconds
1552 14:50:24.024740 Google Chrome AP resets since EC boot: 0
1553 14:50:24.028350 Google Chrome most recent AP reset causes:
1554 14:50:24.034979 Google Chrome EC reset flags at last EC boot: reset-pin
1555 14:50:24.038262 PNP: 0c09.0 init finished in 20578 usecs
1556 14:50:24.041205 Devices initialized
1557 14:50:24.041687 Show all devs... After init.
1558 14:50:24.044567 Root Device: enabled 1
1559 14:50:24.048165 CPU_CLUSTER: 0: enabled 1
1560 14:50:24.051457 DOMAIN: 0000: enabled 1
1561 14:50:24.051900 APIC: 00: enabled 1
1562 14:50:24.054894 PCI: 00:00.0: enabled 1
1563 14:50:24.057797 PCI: 00:02.0: enabled 1
1564 14:50:24.061019 PCI: 00:04.0: enabled 0
1565 14:50:24.061493 PCI: 00:05.0: enabled 0
1566 14:50:24.064780 PCI: 00:12.0: enabled 1
1567 14:50:24.067687 PCI: 00:12.5: enabled 0
1568 14:50:24.068126 PCI: 00:12.6: enabled 0
1569 14:50:24.071219 PCI: 00:14.0: enabled 1
1570 14:50:24.074745 PCI: 00:14.1: enabled 0
1571 14:50:24.077645 PCI: 00:14.3: enabled 1
1572 14:50:24.078082 PCI: 00:14.5: enabled 0
1573 14:50:24.081084 PCI: 00:15.0: enabled 1
1574 14:50:24.084551 PCI: 00:15.1: enabled 1
1575 14:50:24.088053 PCI: 00:15.2: enabled 0
1576 14:50:24.088490 PCI: 00:15.3: enabled 0
1577 14:50:24.091431 PCI: 00:16.0: enabled 1
1578 14:50:24.094710 PCI: 00:16.1: enabled 0
1579 14:50:24.097696 PCI: 00:16.2: enabled 0
1580 14:50:24.098140 PCI: 00:16.3: enabled 0
1581 14:50:24.101340 PCI: 00:16.4: enabled 0
1582 14:50:24.104378 PCI: 00:16.5: enabled 0
1583 14:50:24.107854 PCI: 00:17.0: enabled 1
1584 14:50:24.108335 PCI: 00:19.0: enabled 1
1585 14:50:24.111032 PCI: 00:19.1: enabled 0
1586 14:50:24.114352 PCI: 00:19.2: enabled 0
1587 14:50:24.114861 PCI: 00:1a.0: enabled 0
1588 14:50:24.117509 PCI: 00:1c.0: enabled 0
1589 14:50:24.121087 PCI: 00:1c.1: enabled 0
1590 14:50:24.124624 PCI: 00:1c.2: enabled 0
1591 14:50:24.125214 PCI: 00:1c.3: enabled 0
1592 14:50:24.127302 PCI: 00:1c.4: enabled 0
1593 14:50:24.131130 PCI: 00:1c.5: enabled 0
1594 14:50:24.133868 PCI: 00:1c.6: enabled 0
1595 14:50:24.134303 PCI: 00:1c.7: enabled 0
1596 14:50:24.137235 PCI: 00:1d.0: enabled 1
1597 14:50:24.140697 PCI: 00:1d.1: enabled 0
1598 14:50:24.144282 PCI: 00:1d.2: enabled 0
1599 14:50:24.144870 PCI: 00:1d.3: enabled 0
1600 14:50:24.147212 PCI: 00:1d.4: enabled 0
1601 14:50:24.150347 PCI: 00:1d.5: enabled 0
1602 14:50:24.153891 PCI: 00:1e.0: enabled 1
1603 14:50:24.154328 PCI: 00:1e.1: enabled 0
1604 14:50:24.156849 PCI: 00:1e.2: enabled 1
1605 14:50:24.160308 PCI: 00:1e.3: enabled 1
1606 14:50:24.160746 PCI: 00:1f.0: enabled 1
1607 14:50:24.163842 PCI: 00:1f.1: enabled 0
1608 14:50:24.167104 PCI: 00:1f.2: enabled 0
1609 14:50:24.170326 PCI: 00:1f.3: enabled 1
1610 14:50:24.170789 PCI: 00:1f.4: enabled 1
1611 14:50:24.173820 PCI: 00:1f.5: enabled 1
1612 14:50:24.176831 PCI: 00:1f.6: enabled 0
1613 14:50:24.180345 USB0 port 0: enabled 1
1614 14:50:24.180782 I2C: 01:15: enabled 1
1615 14:50:24.183795 I2C: 02:5d: enabled 1
1616 14:50:24.186916 GENERIC: 0.0: enabled 1
1617 14:50:24.187354 I2C: 03:1a: enabled 1
1618 14:50:24.190507 I2C: 03:38: enabled 1
1619 14:50:24.193580 I2C: 03:39: enabled 1
1620 14:50:24.194020 I2C: 03:3a: enabled 1
1621 14:50:24.196990 I2C: 03:3b: enabled 1
1622 14:50:24.200414 PCI: 00:00.0: enabled 1
1623 14:50:24.200977 SPI: 00: enabled 1
1624 14:50:24.203469 SPI: 01: enabled 1
1625 14:50:24.207240 PNP: 0c09.0: enabled 1
1626 14:50:24.207789 USB2 port 0: enabled 1
1627 14:50:24.210185 USB2 port 1: enabled 1
1628 14:50:24.213723 USB2 port 2: enabled 0
1629 14:50:24.217085 USB2 port 3: enabled 0
1630 14:50:24.217647 USB2 port 5: enabled 0
1631 14:50:24.220130 USB2 port 6: enabled 1
1632 14:50:24.223741 USB2 port 9: enabled 1
1633 14:50:24.224288 USB3 port 0: enabled 1
1634 14:50:24.226425 USB3 port 1: enabled 1
1635 14:50:24.229698 USB3 port 2: enabled 1
1636 14:50:24.230202 USB3 port 3: enabled 1
1637 14:50:24.233219 USB3 port 4: enabled 0
1638 14:50:24.236569 APIC: 05: enabled 1
1639 14:50:24.237004 APIC: 07: enabled 1
1640 14:50:24.239602 APIC: 01: enabled 1
1641 14:50:24.243224 APIC: 04: enabled 1
1642 14:50:24.243788 APIC: 06: enabled 1
1643 14:50:24.246610 APIC: 02: enabled 1
1644 14:50:24.249633 APIC: 03: enabled 1
1645 14:50:24.250085 PCI: 00:08.0: enabled 1
1646 14:50:24.253326 PCI: 00:14.2: enabled 1
1647 14:50:24.256125 PCI: 01:00.0: enabled 1
1648 14:50:24.260225 Disabling ACPI via APMC:
1649 14:50:24.262940 done.
1650 14:50:24.266528 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 14:50:24.269656 ELOG: NV offset 0xaf0000 size 0x4000
1652 14:50:24.276573 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 14:50:24.283045 ELOG: Event(17) added with size 13 at 2022-09-18 14:50:11 UTC
1654 14:50:24.290095 ELOG: Event(92) added with size 9 at 2022-09-18 14:50:11 UTC
1655 14:50:24.296282 ELOG: Event(93) added with size 9 at 2022-09-18 14:50:11 UTC
1656 14:50:24.303016 ELOG: Event(9A) added with size 9 at 2022-09-18 14:50:11 UTC
1657 14:50:24.309631 ELOG: Event(9E) added with size 10 at 2022-09-18 14:50:11 UTC
1658 14:50:24.316480 ELOG: Event(9F) added with size 14 at 2022-09-18 14:50:11 UTC
1659 14:50:24.319958 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1660 14:50:24.327031 ELOG: Event(A1) added with size 10 at 2022-09-18 14:50:11 UTC
1661 14:50:24.336805 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1662 14:50:24.343483 ELOG: Event(A0) added with size 9 at 2022-09-18 14:50:11 UTC
1663 14:50:24.346911 elog_add_boot_reason: Logged dev mode boot
1664 14:50:24.349964 Finalize devices...
1665 14:50:24.350411 PCI: 00:17.0 final
1666 14:50:24.353276 Devices finalized
1667 14:50:24.356612 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1668 14:50:24.362855 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1669 14:50:24.366621 ME: HFSTS1 : 0x90000245
1670 14:50:24.369885 ME: HFSTS2 : 0x3B850126
1671 14:50:24.376626 ME: HFSTS3 : 0x00000020
1672 14:50:24.379502 ME: HFSTS4 : 0x00004800
1673 14:50:24.382965 ME: HFSTS5 : 0x00000000
1674 14:50:24.386267 ME: HFSTS6 : 0x40400006
1675 14:50:24.389629 ME: Manufacturing Mode : NO
1676 14:50:24.392579 ME: FW Partition Table : OK
1677 14:50:24.396232 ME: Bringup Loader Failure : NO
1678 14:50:24.399573 ME: Firmware Init Complete : YES
1679 14:50:24.402488 ME: Boot Options Present : NO
1680 14:50:24.405934 ME: Update In Progress : NO
1681 14:50:24.409630 ME: D0i3 Support : YES
1682 14:50:24.412671 ME: Low Power State Enabled : NO
1683 14:50:24.416040 ME: CPU Replaced : NO
1684 14:50:24.419411 ME: CPU Replacement Valid : YES
1685 14:50:24.422730 ME: Current Working State : 5
1686 14:50:24.426117 ME: Current Operation State : 1
1687 14:50:24.429164 ME: Current Operation Mode : 0
1688 14:50:24.432502 ME: Error Code : 0
1689 14:50:24.435555 ME: CPU Debug Disabled : YES
1690 14:50:24.438952 ME: TXT Support : NO
1691 14:50:24.445679 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1692 14:50:24.452234 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 14:50:24.452741 CBFS @ c08000 size 3f8000
1694 14:50:24.458717 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 14:50:24.462199 CBFS: Locating 'fallback/dsdt.aml'
1696 14:50:24.465706 CBFS: Found @ offset 10bb80 size 3fa5
1697 14:50:24.472257 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1698 14:50:24.475718 CBFS @ c08000 size 3f8000
1699 14:50:24.482373 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1700 14:50:24.482820 CBFS: Locating 'fallback/slic'
1701 14:50:24.487467 CBFS: 'fallback/slic' not found.
1702 14:50:24.494202 ACPI: Writing ACPI tables at 99b3e000.
1703 14:50:24.494740 ACPI: * FACS
1704 14:50:24.497650 ACPI: * DSDT
1705 14:50:24.501262 Ramoops buffer: 0x100000@0x99a3d000.
1706 14:50:24.503868 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1707 14:50:24.510899 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1708 14:50:24.513774 Google Chrome EC: version:
1709 14:50:24.517424 ro: helios_v2.0.2659-56403530b
1710 14:50:24.520434 rw: helios_v2.0.2849-c41de27e7d
1711 14:50:24.520982 running image: 1
1712 14:50:24.524803 ACPI: * FADT
1713 14:50:24.525355 SCI is IRQ9
1714 14:50:24.531688 ACPI: added table 1/32, length now 40
1715 14:50:24.532145 ACPI: * SSDT
1716 14:50:24.534699 Found 1 CPU(s) with 8 core(s) each.
1717 14:50:24.538328 Error: Could not locate 'wifi_sar' in VPD.
1718 14:50:24.544557 Checking CBFS for default SAR values
1719 14:50:24.548167 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1720 14:50:24.551349 CBFS @ c08000 size 3f8000
1721 14:50:24.557839 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1722 14:50:24.561296 CBFS: Locating 'wifi_sar_defaults.hex'
1723 14:50:24.564350 CBFS: Found @ offset 5fac0 size 77
1724 14:50:24.567831 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1725 14:50:24.574482 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1726 14:50:24.578100 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1727 14:50:24.584239 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1728 14:50:24.587637 failed to find key in VPD: dsm_calib_r0_0
1729 14:50:24.598074 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1730 14:50:24.601091 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1731 14:50:24.604368 failed to find key in VPD: dsm_calib_r0_1
1732 14:50:24.614643 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1733 14:50:24.621152 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1734 14:50:24.624635 failed to find key in VPD: dsm_calib_r0_2
1735 14:50:24.633914 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1736 14:50:24.637156 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1737 14:50:24.644132 failed to find key in VPD: dsm_calib_r0_3
1738 14:50:24.650619 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1739 14:50:24.656986 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1740 14:50:24.660390 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1741 14:50:24.663595 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1742 14:50:24.667429 EC returned error result code 1
1743 14:50:24.671354 EC returned error result code 1
1744 14:50:24.675295 EC returned error result code 1
1745 14:50:24.681739 PS2K: Bad resp from EC. Vivaldi disabled!
1746 14:50:24.685294 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1747 14:50:24.692035 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1748 14:50:24.698455 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1749 14:50:24.701520 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1750 14:50:24.708671 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1751 14:50:24.715226 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1752 14:50:24.721569 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1753 14:50:24.725204 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1754 14:50:24.731492 ACPI: added table 2/32, length now 44
1755 14:50:24.732004 ACPI: * MCFG
1756 14:50:24.735272 ACPI: added table 3/32, length now 48
1757 14:50:24.737916 ACPI: * TPM2
1758 14:50:24.741443 TPM2 log created at 99a2d000
1759 14:50:24.744810 ACPI: added table 4/32, length now 52
1760 14:50:24.745386 ACPI: * MADT
1761 14:50:24.747631 SCI is IRQ9
1762 14:50:24.751251 ACPI: added table 5/32, length now 56
1763 14:50:24.751692 current = 99b43ac0
1764 14:50:24.754660 ACPI: * DMAR
1765 14:50:24.757631 ACPI: added table 6/32, length now 60
1766 14:50:24.761327 ACPI: * IGD OpRegion
1767 14:50:24.761935 GMA: Found VBT in CBFS
1768 14:50:24.764300 GMA: Found valid VBT in CBFS
1769 14:50:24.767633 ACPI: added table 7/32, length now 64
1770 14:50:24.771234 ACPI: * HPET
1771 14:50:24.774381 ACPI: added table 8/32, length now 68
1772 14:50:24.774831 ACPI: done.
1773 14:50:24.777954 ACPI tables: 31744 bytes.
1774 14:50:24.781134 smbios_write_tables: 99a2c000
1775 14:50:24.784688 EC returned error result code 3
1776 14:50:24.788152 Couldn't obtain OEM name from CBI
1777 14:50:24.791273 Create SMBIOS type 17
1778 14:50:24.794684 PCI: 00:00.0 (Intel Cannonlake)
1779 14:50:24.797835 PCI: 00:14.3 (Intel WiFi)
1780 14:50:24.801374 SMBIOS tables: 939 bytes.
1781 14:50:24.804412 Writing table forward entry at 0x00000500
1782 14:50:24.811130 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1783 14:50:24.814655 Writing coreboot table at 0x99b62000
1784 14:50:24.821038 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1785 14:50:24.824356 1. 0000000000001000-000000000009ffff: RAM
1786 14:50:24.827704 2. 00000000000a0000-00000000000fffff: RESERVED
1787 14:50:24.834338 3. 0000000000100000-0000000099a2bfff: RAM
1788 14:50:24.837340 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1789 14:50:24.844312 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1790 14:50:24.850951 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1791 14:50:24.854067 7. 000000009a000000-000000009f7fffff: RESERVED
1792 14:50:24.860541 8. 00000000e0000000-00000000efffffff: RESERVED
1793 14:50:24.863897 9. 00000000fc000000-00000000fc000fff: RESERVED
1794 14:50:24.867259 10. 00000000fe000000-00000000fe00ffff: RESERVED
1795 14:50:24.873879 11. 00000000fed10000-00000000fed17fff: RESERVED
1796 14:50:24.877288 12. 00000000fed80000-00000000fed83fff: RESERVED
1797 14:50:24.883632 13. 00000000fed90000-00000000fed91fff: RESERVED
1798 14:50:24.887059 14. 00000000feda0000-00000000feda1fff: RESERVED
1799 14:50:24.893563 15. 0000000100000000-000000045e7fffff: RAM
1800 14:50:24.897679 Graphics framebuffer located at 0xc0000000
1801 14:50:24.900433 Passing 5 GPIOs to payload:
1802 14:50:24.903851 NAME | PORT | POLARITY | VALUE
1803 14:50:24.910252 write protect | undefined | high | low
1804 14:50:24.913565 lid | undefined | high | high
1805 14:50:24.920366 power | undefined | high | low
1806 14:50:24.926985 oprom | undefined | high | low
1807 14:50:24.930570 EC in RW | 0x000000cb | high | low
1808 14:50:24.933336 Board ID: 4
1809 14:50:24.936859 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1810 14:50:24.940302 CBFS @ c08000 size 3f8000
1811 14:50:24.946847 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1812 14:50:24.953823 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1813 14:50:24.954338 coreboot table: 1492 bytes.
1814 14:50:24.956565 IMD ROOT 0. 99fff000 00001000
1815 14:50:24.959717 IMD SMALL 1. 99ffe000 00001000
1816 14:50:24.963416 FSP MEMORY 2. 99c4e000 003b0000
1817 14:50:24.966781 CONSOLE 3. 99c2e000 00020000
1818 14:50:24.970182 FMAP 4. 99c2d000 0000054e
1819 14:50:24.973461 TIME STAMP 5. 99c2c000 00000910
1820 14:50:24.976896 VBOOT WORK 6. 99c18000 00014000
1821 14:50:24.979916 MRC DATA 7. 99c16000 00001958
1822 14:50:24.983324 ROMSTG STCK 8. 99c15000 00001000
1823 14:50:24.986701 AFTER CAR 9. 99c0b000 0000a000
1824 14:50:24.990198 RAMSTAGE 10. 99baf000 0005c000
1825 14:50:24.993129 REFCODE 11. 99b7a000 00035000
1826 14:50:24.996693 SMM BACKUP 12. 99b6a000 00010000
1827 14:50:25.000128 COREBOOT 13. 99b62000 00008000
1828 14:50:25.003245 ACPI 14. 99b3e000 00024000
1829 14:50:25.006848 ACPI GNVS 15. 99b3d000 00001000
1830 14:50:25.009709 RAMOOPS 16. 99a3d000 00100000
1831 14:50:25.013163 TPM2 TCGLOG17. 99a2d000 00010000
1832 14:50:25.016829 SMBIOS 18. 99a2c000 00000800
1833 14:50:25.019573 IMD small region:
1834 14:50:25.023011 IMD ROOT 0. 99ffec00 00000400
1835 14:50:25.026762 FSP RUNTIME 1. 99ffebe0 00000004
1836 14:50:25.029604 EC HOSTEVENT 2. 99ffebc0 00000008
1837 14:50:25.033127 POWER STATE 3. 99ffeb80 00000040
1838 14:50:25.036703 ROMSTAGE 4. 99ffeb60 00000004
1839 14:50:25.039725 MEM INFO 5. 99ffe9a0 000001b9
1840 14:50:25.043009 VPD 6. 99ffe920 0000006c
1841 14:50:25.046013 MTRR: Physical address space:
1842 14:50:25.052985 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1843 14:50:25.059630 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1844 14:50:25.066215 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1845 14:50:25.072624 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1846 14:50:25.079584 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1847 14:50:25.086104 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1848 14:50:25.092577 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1849 14:50:25.095876 MTRR: Fixed MSR 0x250 0x0606060606060606
1850 14:50:25.099433 MTRR: Fixed MSR 0x258 0x0606060606060606
1851 14:50:25.102930 MTRR: Fixed MSR 0x259 0x0000000000000000
1852 14:50:25.109440 MTRR: Fixed MSR 0x268 0x0606060606060606
1853 14:50:25.112725 MTRR: Fixed MSR 0x269 0x0606060606060606
1854 14:50:25.115659 MTRR: Fixed MSR 0x26a 0x0606060606060606
1855 14:50:25.119243 MTRR: Fixed MSR 0x26b 0x0606060606060606
1856 14:50:25.122829 MTRR: Fixed MSR 0x26c 0x0606060606060606
1857 14:50:25.128894 MTRR: Fixed MSR 0x26d 0x0606060606060606
1858 14:50:25.132184 MTRR: Fixed MSR 0x26e 0x0606060606060606
1859 14:50:25.135503 MTRR: Fixed MSR 0x26f 0x0606060606060606
1860 14:50:25.138834 call enable_fixed_mtrr()
1861 14:50:25.142499 CPU physical address size: 39 bits
1862 14:50:25.149039 MTRR: default type WB/UC MTRR counts: 6/8.
1863 14:50:25.152146 MTRR: WB selected as default type.
1864 14:50:25.155656 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1865 14:50:25.161736 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1866 14:50:25.168652 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1867 14:50:25.174994 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1868 14:50:25.181799 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1869 14:50:25.188348 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1870 14:50:25.191566 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 14:50:25.198246 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 14:50:25.201607 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 14:50:25.205103 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 14:50:25.207922 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 14:50:25.214781 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 14:50:25.218279 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 14:50:25.221244 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 14:50:25.224669 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 14:50:25.231151 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 14:50:25.234605 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 14:50:25.235042
1882 14:50:25.235391 MTRR check
1883 14:50:25.237773 call enable_fixed_mtrr()
1884 14:50:25.241175 Fixed MTRRs : Enabled
1885 14:50:25.244743 Variable MTRRs: Enabled
1886 14:50:25.245279
1887 14:50:25.247699 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 14:50:25.251082 MTRR: Fixed MSR 0x258 0x0606060606060606
1889 14:50:25.254224 MTRR: Fixed MSR 0x259 0x0000000000000000
1890 14:50:25.261258 MTRR: Fixed MSR 0x268 0x0606060606060606
1891 14:50:25.264407 MTRR: Fixed MSR 0x269 0x0606060606060606
1892 14:50:25.267967 MTRR: Fixed MSR 0x26a 0x0606060606060606
1893 14:50:25.270738 MTRR: Fixed MSR 0x26b 0x0606060606060606
1894 14:50:25.277559 MTRR: Fixed MSR 0x26c 0x0606060606060606
1895 14:50:25.280958 MTRR: Fixed MSR 0x26d 0x0606060606060606
1896 14:50:25.284300 MTRR: Fixed MSR 0x26e 0x0606060606060606
1897 14:50:25.287271 MTRR: Fixed MSR 0x26f 0x0606060606060606
1898 14:50:25.294105 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 14:50:25.294547 call enable_fixed_mtrr()
1900 14:50:25.300614 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 14:50:25.304084 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 14:50:25.307269 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 14:50:25.310680 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 14:50:25.317518 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 14:50:25.320398 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 14:50:25.323868 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 14:50:25.327478 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 14:50:25.330542 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 14:50:25.336838 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 14:50:25.340319 CPU physical address size: 39 bits
1911 14:50:25.343848 call enable_fixed_mtrr()
1912 14:50:25.346778 CPU physical address size: 39 bits
1913 14:50:25.350311 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1914 14:50:25.356786 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 14:50:25.360317 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 14:50:25.363416 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 14:50:25.366886 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 14:50:25.373183 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 14:50:25.376559 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 14:50:25.379956 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 14:50:25.383289 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 14:50:25.390038 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 14:50:25.392957 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 14:50:25.396556 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 14:50:25.400131 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 14:50:25.403101 call enable_fixed_mtrr()
1927 14:50:25.406346 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 14:50:25.413022 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 14:50:25.416317 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 14:50:25.419600 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 14:50:25.422692 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 14:50:25.429467 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 14:50:25.432837 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 14:50:25.436177 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 14:50:25.439211 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 14:50:25.445897 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 14:50:25.449342 CPU physical address size: 39 bits
1938 14:50:25.452503 call enable_fixed_mtrr()
1939 14:50:25.455971 CPU physical address size: 39 bits
1940 14:50:25.459129 CPU physical address size: 39 bits
1941 14:50:25.462266 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 14:50:25.465860 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 14:50:25.469339 MTRR: Fixed MSR 0x258 0x0606060606060606
1944 14:50:25.475638 MTRR: Fixed MSR 0x259 0x0000000000000000
1945 14:50:25.479020 MTRR: Fixed MSR 0x268 0x0606060606060606
1946 14:50:25.482381 MTRR: Fixed MSR 0x269 0x0606060606060606
1947 14:50:25.485673 MTRR: Fixed MSR 0x26a 0x0606060606060606
1948 14:50:25.491996 MTRR: Fixed MSR 0x26b 0x0606060606060606
1949 14:50:25.495579 MTRR: Fixed MSR 0x26c 0x0606060606060606
1950 14:50:25.498852 MTRR: Fixed MSR 0x26d 0x0606060606060606
1951 14:50:25.502726 MTRR: Fixed MSR 0x26e 0x0606060606060606
1952 14:50:25.508725 MTRR: Fixed MSR 0x26f 0x0606060606060606
1953 14:50:25.512195 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 14:50:25.515377 call enable_fixed_mtrr()
1955 14:50:25.518619 MTRR: Fixed MSR 0x259 0x0000000000000000
1956 14:50:25.522141 MTRR: Fixed MSR 0x268 0x0606060606060606
1957 14:50:25.525209 MTRR: Fixed MSR 0x269 0x0606060606060606
1958 14:50:25.531871 MTRR: Fixed MSR 0x26a 0x0606060606060606
1959 14:50:25.535016 MTRR: Fixed MSR 0x26b 0x0606060606060606
1960 14:50:25.538938 MTRR: Fixed MSR 0x26c 0x0606060606060606
1961 14:50:25.541739 MTRR: Fixed MSR 0x26d 0x0606060606060606
1962 14:50:25.548686 MTRR: Fixed MSR 0x26e 0x0606060606060606
1963 14:50:25.551622 MTRR: Fixed MSR 0x26f 0x0606060606060606
1964 14:50:25.555000 CPU physical address size: 39 bits
1965 14:50:25.558556 call enable_fixed_mtrr()
1966 14:50:25.561582 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1967 14:50:25.564840 CPU physical address size: 39 bits
1968 14:50:25.568242 CBFS @ c08000 size 3f8000
1969 14:50:25.574627 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1970 14:50:25.577995 CBFS: Locating 'fallback/payload'
1971 14:50:25.581481 CBFS: Found @ offset 1c96c0 size 3f798
1972 14:50:25.588264 Checking segment from ROM address 0xffdd16f8
1973 14:50:25.591034 Checking segment from ROM address 0xffdd1714
1974 14:50:25.598065 Loading segment from ROM address 0xffdd16f8
1975 14:50:25.598508 code (compression=0)
1976 14:50:25.607943 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1977 14:50:25.614526 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1978 14:50:25.617429 it's not compressed!
1979 14:50:25.710068 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1980 14:50:25.716574 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1981 14:50:25.720183 Loading segment from ROM address 0xffdd1714
1982 14:50:25.723121 Entry Point 0x30000000
1983 14:50:25.726643 Loaded segments
1984 14:50:25.732316 Finalizing chipset.
1985 14:50:25.735466 Finalizing SMM.
1986 14:50:25.738976 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1987 14:50:25.742148 mp_park_aps done after 0 msecs.
1988 14:50:25.748954 Jumping to boot code at 30000000(99b62000)
1989 14:50:25.755260 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1990 14:50:25.755816
1991 14:50:25.758775 Starting depthcharge on Helios...
1992 14:50:25.760169 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1993 14:50:25.760741 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1994 14:50:25.761250 Setting prompt string to ['hatch:']
1995 14:50:25.761698 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1996 14:50:25.768700 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1997 14:50:25.775008 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1998 14:50:25.781333 board_setup: Info: eMMC controller not present; skipping
1999 14:50:25.784901 New NVMe Controller 0x30053ac0 @ 00:1d:00
2000 14:50:25.792039 board_setup: Info: SDHCI controller not present; skipping
2001 14:50:25.798367 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2002 14:50:25.798811 Wipe memory regions:
2003 14:50:25.801398 [0x00000000001000, 0x000000000a0000)
2004 14:50:25.804751 [0x00000000100000, 0x00000030000000)
2005 14:50:25.874291 [0x00000030657430, 0x00000099a2c000)
2006 14:50:26.024023 [0x00000100000000, 0x0000045e800000)
2007 14:50:27.480536 R8152: Initializing
2008 14:50:27.483889 Version 9 (ocp_data = 6010)
2009 14:50:27.488027 R8152: Done initializing
2010 14:50:27.491152 Adding net device
2011 14:50:27.866346 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2012 14:50:27.866927
2013 14:50:27.867871 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2015 14:50:27.969708 hatch: tftpboot 192.168.201.1 7305269/tftp-deploy-_wufz9af/kernel/bzImage 7305269/tftp-deploy-_wufz9af/kernel/cmdline 7305269/tftp-deploy-_wufz9af/ramdisk/ramdisk.cpio.gz
2016 14:50:27.970382 Setting prompt string to 'Starting kernel'
2017 14:50:27.970781 Setting prompt string to ['Starting kernel']
2018 14:50:27.971157 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2019 14:50:27.971543 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:39)
2020 14:50:27.975418 tftpboot 192.168.201.1 7305269/tftp-deploy-_wufz9af/kernel/bzImy-_wufz9af/kernel/cmdline 7305269/tftp-deploy-_wufz9af/ramdisk/ramdisk.cpio.gz
2021 14:50:27.975536 Waiting for link
2022 14:50:28.176298 done.
2023 14:50:28.176882 MAC: f4:f5:e8:50:e3:ec
2024 14:50:28.179313 Sending DHCP discover... done.
2025 14:50:28.182648 Waiting for reply... done.
2026 14:50:28.186093 Sending DHCP request... done.
2027 14:50:28.193523 Waiting for reply... done.
2028 14:50:28.194003 My ip is 192.168.201.14
2029 14:50:28.196913 The DHCP server ip is 192.168.201.1
2030 14:50:28.204067 TFTP server IP predefined by user: 192.168.201.1
2031 14:50:28.210333 Bootfile predefined by user: 7305269/tftp-deploy-_wufz9af/kernel/bzImage
2032 14:50:28.213329 Sending tftp read request... done.
2033 14:50:28.220094 Waiting for the transfer...
2034 14:50:28.533548 00000000 ################################################################
2035 14:50:28.774491 00080000 ################################################################
2036 14:50:29.033791 00100000 ################################################################
2037 14:50:29.296997 00180000 ################################################################
2038 14:50:29.548266 00200000 ################################################################
2039 14:50:29.781380 00280000 ################################################################
2040 14:50:30.012979 00300000 ################################################################
2041 14:50:30.271347 00380000 ################################################################
2042 14:50:30.517036 00400000 ################################################################
2043 14:50:30.753018 00480000 ################################################################
2044 14:50:30.990418 00500000 ################################################################
2045 14:50:31.224440 00580000 ################################################################
2046 14:50:31.457453 00600000 ################################################################ done.
2047 14:50:31.460874 The bootfile was 6815632 bytes long.
2048 14:50:31.463869 Sending tftp read request... done.
2049 14:50:31.467179 Waiting for the transfer...
2050 14:50:31.703181 00000000 ################################################################
2051 14:50:31.949112 00080000 ################################################################
2052 14:50:32.193638 00100000 ################################################################
2053 14:50:32.430903 00180000 ################################################################
2054 14:50:32.703229 00200000 ################################################################
2055 14:50:32.968540 00280000 ################################################################
2056 14:50:33.245567 00300000 ################################################################
2057 14:50:33.487474 00380000 ################################################################
2058 14:50:33.745514 00400000 ################################################################
2059 14:50:33.987541 00480000 ################################################################
2060 14:50:34.104739 00500000 ############################# done.
2061 14:50:34.108172 Sending tftp read request... done.
2062 14:50:34.111037 Waiting for the transfer...
2063 14:50:34.111133 00000000 # done.
2064 14:50:34.120918 Command line loaded dynamically from TFTP file: 7305269/tftp-deploy-_wufz9af/kernel/cmdline
2065 14:50:34.147245 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7305269/extract-nfsrootfs-weslp_8s,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2066 14:50:34.154006 ec_init(0): CrosEC protocol v3 supported (256, 256)
2067 14:50:34.157017 Shutting down all USB controllers.
2068 14:50:34.160432 Removing current net device
2069 14:50:34.163869 Finalizing coreboot
2070 14:50:34.170635 Exiting depthcharge with code 4 at timestamp: 15694105
2071 14:50:34.170728
2072 14:50:34.170804 Starting kernel ...
2073 14:50:34.170875
2074 14:50:34.171202 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2075 14:50:34.171318 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2076 14:50:34.171403 Setting prompt string to ['Linux version [0-9]']
2077 14:50:34.171497 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2078 14:50:34.171578 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
2079 14:50:34.173603
2081 14:55:06.172299 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2083 14:55:06.173511 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2085 14:55:06.174421 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2088 14:55:06.175931 end: 2 depthcharge-action (duration 00:05:00) [common]
2090 14:55:06.176491 Cleaning after the job
2091 14:55:06.176580 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/ramdisk
2092 14:55:06.177100 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/kernel
2093 14:55:06.177649 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/nfsrootfs
2094 14:55:06.230457 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305269/tftp-deploy-_wufz9af/modules
2095 14:55:06.230768 start: 4.1 power-off (timeout 00:00:30) [common]
2096 14:55:06.230949 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2097 14:55:06.251664 >> Command sent successfully.
2098 14:55:06.253681 Returned 0 in 0 seconds
2099 14:55:06.354863 end: 4.1 power-off (duration 00:00:00) [common]
2101 14:55:06.356293 start: 4.2 read-feedback (timeout 00:10:00) [common]
2102 14:55:06.357377 Listened to connection for namespace 'common' for up to 1s
2103 14:55:07.361204 Finalising connection for namespace 'common'
2104 14:55:07.361495 Disconnecting from shell: Finalise
2105 14:55:07.462409 end: 4.2 read-feedback (duration 00:00:01) [common]
2106 14:55:07.462594 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7305269
2107 14:55:07.631508 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7305269
2108 14:55:07.631694 JobError: Your job cannot terminate cleanly.