Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:37:37.589900 lava-dispatcher, installed at version: 2023.06
2 14:37:37.590125 start: 0 validate
3 14:37:37.590251 Start time: 2023-08-16 14:37:37.590243+00:00 (UTC)
4 14:37:37.590383 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:37:37.590526 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 14:37:37.851773 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:37:37.852541 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:37:38.107532 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:37:38.108232 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:37:41.495555 validate duration: 3.91
12 14:37:41.495815 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:37:41.495911 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:37:41.495997 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:37:41.496125 Not decompressing ramdisk as can be used compressed.
16 14:37:41.496209 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 14:37:41.496277 saving as /var/lib/lava/dispatcher/tmp/11299753/tftp-deploy-m4loc14m/ramdisk/rootfs.cpio.gz
18 14:37:41.496344 total size: 8418130 (8 MB)
19 14:37:42.004014 progress 0 % (0 MB)
20 14:37:42.017991 progress 5 % (0 MB)
21 14:37:42.030961 progress 10 % (0 MB)
22 14:37:42.041693 progress 15 % (1 MB)
23 14:37:42.048100 progress 20 % (1 MB)
24 14:37:42.053132 progress 25 % (2 MB)
25 14:37:42.057503 progress 30 % (2 MB)
26 14:37:42.060974 progress 35 % (2 MB)
27 14:37:42.064382 progress 40 % (3 MB)
28 14:37:42.067574 progress 45 % (3 MB)
29 14:37:42.070453 progress 50 % (4 MB)
30 14:37:42.073183 progress 55 % (4 MB)
31 14:37:42.075750 progress 60 % (4 MB)
32 14:37:42.078007 progress 65 % (5 MB)
33 14:37:42.080311 progress 70 % (5 MB)
34 14:37:42.082588 progress 75 % (6 MB)
35 14:37:42.084741 progress 80 % (6 MB)
36 14:37:42.086935 progress 85 % (6 MB)
37 14:37:42.089094 progress 90 % (7 MB)
38 14:37:42.091290 progress 95 % (7 MB)
39 14:37:42.093310 progress 100 % (8 MB)
40 14:37:42.093536 8 MB downloaded in 0.60 s (13.44 MB/s)
41 14:37:42.093704 end: 1.1.1 http-download (duration 00:00:01) [common]
43 14:37:42.093940 end: 1.1 download-retry (duration 00:00:01) [common]
44 14:37:42.094026 start: 1.2 download-retry (timeout 00:09:59) [common]
45 14:37:42.094109 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 14:37:42.094260 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:37:42.094333 saving as /var/lib/lava/dispatcher/tmp/11299753/tftp-deploy-m4loc14m/kernel/bzImage
48 14:37:42.094394 total size: 8490896 (8 MB)
49 14:37:42.094455 No compression specified
50 14:37:42.095574 progress 0 % (0 MB)
51 14:37:42.097770 progress 5 % (0 MB)
52 14:37:42.099993 progress 10 % (0 MB)
53 14:37:42.102275 progress 15 % (1 MB)
54 14:37:42.104501 progress 20 % (1 MB)
55 14:37:42.106774 progress 25 % (2 MB)
56 14:37:42.108985 progress 30 % (2 MB)
57 14:37:42.111248 progress 35 % (2 MB)
58 14:37:42.113454 progress 40 % (3 MB)
59 14:37:42.115703 progress 45 % (3 MB)
60 14:37:42.117964 progress 50 % (4 MB)
61 14:37:42.120151 progress 55 % (4 MB)
62 14:37:42.122428 progress 60 % (4 MB)
63 14:37:42.124598 progress 65 % (5 MB)
64 14:37:42.126894 progress 70 % (5 MB)
65 14:37:42.129086 progress 75 % (6 MB)
66 14:37:42.131332 progress 80 % (6 MB)
67 14:37:42.133491 progress 85 % (6 MB)
68 14:37:42.135713 progress 90 % (7 MB)
69 14:37:42.137920 progress 95 % (7 MB)
70 14:37:42.140091 progress 100 % (8 MB)
71 14:37:42.140207 8 MB downloaded in 0.05 s (176.77 MB/s)
72 14:37:42.140350 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:37:42.140575 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:37:42.140663 start: 1.3 download-retry (timeout 00:09:59) [common]
76 14:37:42.140751 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 14:37:42.140922 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:37:42.141027 saving as /var/lib/lava/dispatcher/tmp/11299753/tftp-deploy-m4loc14m/modules/modules.tar
79 14:37:42.141089 total size: 253808 (0 MB)
80 14:37:42.141150 Using unxz to decompress xz
81 14:37:42.145189 progress 12 % (0 MB)
82 14:37:42.145608 progress 25 % (0 MB)
83 14:37:42.145871 progress 38 % (0 MB)
84 14:37:42.147470 progress 51 % (0 MB)
85 14:37:42.149439 progress 64 % (0 MB)
86 14:37:42.151427 progress 77 % (0 MB)
87 14:37:42.153306 progress 90 % (0 MB)
88 14:37:42.155114 progress 100 % (0 MB)
89 14:37:42.160797 0 MB downloaded in 0.02 s (12.28 MB/s)
90 14:37:42.161076 end: 1.3.1 http-download (duration 00:00:00) [common]
92 14:37:42.161333 end: 1.3 download-retry (duration 00:00:00) [common]
93 14:37:42.161425 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 14:37:42.161518 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 14:37:42.161680 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 14:37:42.161766 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 14:37:42.161985 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9
98 14:37:42.162128 makedir: /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin
99 14:37:42.162237 makedir: /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/tests
100 14:37:42.162339 makedir: /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/results
101 14:37:42.162453 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-add-keys
102 14:37:42.162600 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-add-sources
103 14:37:42.162738 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-background-process-start
104 14:37:42.162886 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-background-process-stop
105 14:37:42.163106 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-common-functions
106 14:37:42.163262 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-echo-ipv4
107 14:37:42.163388 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-install-packages
108 14:37:42.163512 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-installed-packages
109 14:37:42.163637 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-os-build
110 14:37:42.163762 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-probe-channel
111 14:37:42.163886 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-probe-ip
112 14:37:42.164015 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-target-ip
113 14:37:42.164140 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-target-mac
114 14:37:42.164264 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-target-storage
115 14:37:42.164392 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-test-case
116 14:37:42.164553 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-test-event
117 14:37:42.164682 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-test-feedback
118 14:37:42.164811 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-test-raise
119 14:37:42.164989 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-test-reference
120 14:37:42.165121 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-test-runner
121 14:37:42.165249 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-test-set
122 14:37:42.165376 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-test-shell
123 14:37:42.165505 Updating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-install-packages (oe)
124 14:37:42.165723 Updating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/bin/lava-installed-packages (oe)
125 14:37:42.165855 Creating /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/environment
126 14:37:42.165963 LAVA metadata
127 14:37:42.166038 - LAVA_JOB_ID=11299753
128 14:37:42.166103 - LAVA_DISPATCHER_IP=192.168.201.1
129 14:37:42.166208 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 14:37:42.166278 skipped lava-vland-overlay
131 14:37:42.166355 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 14:37:42.166433 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 14:37:42.166494 skipped lava-multinode-overlay
134 14:37:42.166570 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 14:37:42.166649 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 14:37:42.166723 Loading test definitions
137 14:37:42.166814 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 14:37:42.166912 Using /lava-11299753 at stage 0
139 14:37:42.167305 uuid=11299753_1.4.2.3.1 testdef=None
140 14:37:42.167393 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 14:37:42.167480 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 14:37:42.168011 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 14:37:42.168233 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 14:37:42.168890 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 14:37:42.169176 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 14:37:42.169859 runner path: /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/0/tests/0_dmesg test_uuid 11299753_1.4.2.3.1
149 14:37:42.170015 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 14:37:42.170241 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 14:37:42.170312 Using /lava-11299753 at stage 1
153 14:37:42.170621 uuid=11299753_1.4.2.3.5 testdef=None
154 14:37:42.170709 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 14:37:42.170792 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 14:37:42.171424 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 14:37:42.171636 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 14:37:42.172275 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 14:37:42.172500 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 14:37:42.173132 runner path: /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/1/tests/1_bootrr test_uuid 11299753_1.4.2.3.5
163 14:37:42.173285 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 14:37:42.173516 Creating lava-test-runner.conf files
166 14:37:42.173590 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/0 for stage 0
167 14:37:42.173704 - 0_dmesg
168 14:37:42.173786 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299753/lava-overlay-9wbc9uc9/lava-11299753/1 for stage 1
169 14:37:42.173876 - 1_bootrr
170 14:37:42.173971 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 14:37:42.174054 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 14:37:42.182430 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 14:37:42.182530 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 14:37:42.182613 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 14:37:42.182698 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 14:37:42.182782 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 14:37:42.429351 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 14:37:42.429812 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 14:37:42.429946 extracting modules file /var/lib/lava/dispatcher/tmp/11299753/tftp-deploy-m4loc14m/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299753/extract-overlay-ramdisk-jkwdacif/ramdisk
180 14:37:42.443483 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 14:37:42.443595 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 14:37:42.443686 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299753/compress-overlay-qaim23j_/overlay-1.4.2.4.tar.gz to ramdisk
183 14:37:42.443756 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299753/compress-overlay-qaim23j_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299753/extract-overlay-ramdisk-jkwdacif/ramdisk
184 14:37:42.452630 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 14:37:42.452742 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 14:37:42.452833 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 14:37:42.452922 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 14:37:42.452996 Building ramdisk /var/lib/lava/dispatcher/tmp/11299753/extract-overlay-ramdisk-jkwdacif/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299753/extract-overlay-ramdisk-jkwdacif/ramdisk
189 14:37:42.577029 >> 49827 blocks
190 14:37:43.402367 rename /var/lib/lava/dispatcher/tmp/11299753/extract-overlay-ramdisk-jkwdacif/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299753/tftp-deploy-m4loc14m/ramdisk/ramdisk.cpio.gz
191 14:37:43.402801 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 14:37:43.402928 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 14:37:43.403027 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 14:37:43.403125 No mkimage arch provided, not using FIT.
195 14:37:43.403213 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 14:37:43.403298 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 14:37:43.403399 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 14:37:43.403496 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 14:37:43.403576 No LXC device requested
200 14:37:43.403652 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 14:37:43.403739 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 14:37:43.403818 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 14:37:43.403887 Checking files for TFTP limit of 4294967296 bytes.
204 14:37:43.404277 end: 1 tftp-deploy (duration 00:00:02) [common]
205 14:37:43.404378 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 14:37:43.404468 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 14:37:43.404583 substitutions:
208 14:37:43.404648 - {DTB}: None
209 14:37:43.404709 - {INITRD}: 11299753/tftp-deploy-m4loc14m/ramdisk/ramdisk.cpio.gz
210 14:37:43.404766 - {KERNEL}: 11299753/tftp-deploy-m4loc14m/kernel/bzImage
211 14:37:43.404859 - {LAVA_MAC}: None
212 14:37:43.404914 - {PRESEED_CONFIG}: None
213 14:37:43.404966 - {PRESEED_LOCAL}: None
214 14:37:43.405019 - {RAMDISK}: 11299753/tftp-deploy-m4loc14m/ramdisk/ramdisk.cpio.gz
215 14:37:43.405073 - {ROOT_PART}: None
216 14:37:43.405126 - {ROOT}: None
217 14:37:43.405178 - {SERVER_IP}: 192.168.201.1
218 14:37:43.405231 - {TEE}: None
219 14:37:43.405283 Parsed boot commands:
220 14:37:43.405336 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 14:37:43.405512 Parsed boot commands: tftpboot 192.168.201.1 11299753/tftp-deploy-m4loc14m/kernel/bzImage 11299753/tftp-deploy-m4loc14m/kernel/cmdline 11299753/tftp-deploy-m4loc14m/ramdisk/ramdisk.cpio.gz
222 14:37:43.405649 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 14:37:43.405745 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 14:37:43.405835 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 14:37:43.405923 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 14:37:43.405994 Not connected, no need to disconnect.
227 14:37:43.406067 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 14:37:43.406263 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 14:37:43.406334 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-9'
230 14:37:43.410386 Setting prompt string to ['lava-test: # ']
231 14:37:43.410753 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 14:37:43.410861 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 14:37:43.410957 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 14:37:43.411065 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 14:37:43.411286 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=reboot'
236 14:37:48.563906 >> Command sent successfully.
237 14:37:48.575593 Returned 0 in 5 seconds
238 14:37:48.677026 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 14:37:48.678706 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 14:37:48.679254 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 14:37:48.679746 Setting prompt string to 'Starting depthcharge on Magolor...'
243 14:37:48.680123 Changing prompt to 'Starting depthcharge on Magolor...'
244 14:37:48.680498 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 14:37:48.681911 [Enter `^Ec?' for help]
246 14:37:49.811709
247 14:37:49.812306
248 14:37:49.822446 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 14:37:49.825642 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 14:37:49.828832 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 14:37:49.835934 CPU: AES supported, TXT NOT supported, VT supported
252 14:37:49.839079 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 14:37:49.845706 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 14:37:49.848858 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 14:37:49.852217 VBOOT: Loading verstage.
256 14:37:49.858836 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 14:37:49.862706 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 14:37:49.869369 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 14:37:49.873084 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 14:37:49.873558
261 14:37:49.874047
262 14:37:49.886711 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 14:37:49.900352 Probing TPM: . done!
264 14:37:49.903227 TPM ready after 0 ms
265 14:37:49.906655 Connected to device vid:did:rid of 1ae0:0028:00
266 14:37:49.917337 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
267 14:37:49.925390 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 14:37:49.972891 Initialized TPM device CR50 revision 0
269 14:37:49.982480 tlcl_send_startup: Startup return code is 0
270 14:37:49.983036 TPM: setup succeeded
271 14:37:49.997277 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 14:37:50.011157 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 14:37:50.026175 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 14:37:50.036654 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 14:37:50.039815 Chrome EC: UHEPI supported
276 14:37:50.040388 Phase 1
277 14:37:50.048445 FMAP: area GBB found @ c05000 (12288 bytes)
278 14:37:50.051776 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 14:37:50.058223 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 14:37:50.061298 Recovery requested (1009000e)
281 14:37:50.073716 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 14:37:50.079844 tlcl_extend: response is 0
283 14:37:50.086050 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 14:37:50.095555 tlcl_extend: response is 0
285 14:37:50.102023 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 14:37:50.105623 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 14:37:50.112042 BS: verstage times (exec / console): total (unknown) / 124 ms
288 14:37:50.112622
289 14:37:50.115580
290 14:37:50.126933 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 14:37:50.130049 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 14:37:50.137231 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 14:37:50.139922 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 14:37:50.143588 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 14:37:50.150278 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 14:37:50.153614 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
297 14:37:50.156534 TCO_STS: 0000 0001
298 14:37:50.157000 GEN_PMCON: d0015038 00002200
299 14:37:50.160030 GBLRST_CAUSE: 00000000 00000000
300 14:37:50.163441 prev_sleep_state 5
301 14:37:50.166186 Boot Count incremented to 4111
302 14:37:50.173025 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 14:37:50.176554 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 14:37:50.179654 Chrome EC: UHEPI supported
305 14:37:50.186151 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 14:37:50.192749 Probing TPM: done!
307 14:37:50.199740 Connected to device vid:did:rid of 1ae0:0028:00
308 14:37:50.209808 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
309 14:37:50.217293 Initialized TPM device CR50 revision 0
310 14:37:50.228130 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 14:37:50.231661 MRC: Hash idx 0x100b comparison successful.
312 14:37:50.235135 MRC cache found, size 5458
313 14:37:50.238750 bootmode is set to: 2
314 14:37:50.239313 SPD INDEX = 0
315 14:37:50.242982 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 14:37:50.246242 SPD: module type is LPDDR4X
317 14:37:50.253122 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 14:37:50.259927 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 14:37:50.262660 SPD: device width 16 bits, bus width 32 bits
320 14:37:50.265927 SPD: module size is 4096 MB (per channel)
321 14:37:50.272415 meminit_channels: DRAM half-populated
322 14:37:50.353799 CBMEM:
323 14:37:50.357090 IMD: root @ 0x76fff000 254 entries.
324 14:37:50.360627 IMD: root @ 0x76ffec00 62 entries.
325 14:37:50.364132 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 14:37:50.370497 WARNING: RO_VPD is uninitialized or empty.
327 14:37:50.373668 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 14:37:50.377602 External stage cache:
329 14:37:50.380604 IMD: root @ 0x7b3ff000 254 entries.
330 14:37:50.383939 IMD: root @ 0x7b3fec00 62 entries.
331 14:37:50.393885 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 14:37:50.401109 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 14:37:50.406763 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 14:37:50.415619 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 14:37:50.419156 cse_lite: Skip switching to RW in the recovery path
336 14:37:50.422090 1 DIMMs found
337 14:37:50.422718 SMM Memory Map
338 14:37:50.426018 SMRAM : 0x7b000000 0x800000
339 14:37:50.428710 Subregion 0: 0x7b000000 0x200000
340 14:37:50.432217 Subregion 1: 0x7b200000 0x200000
341 14:37:50.438720 Subregion 2: 0x7b400000 0x400000
342 14:37:50.439290 top_of_ram = 0x77000000
343 14:37:50.445318 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 14:37:50.452305 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 14:37:50.455278 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 14:37:50.462169 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 14:37:50.465223 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 14:37:50.477252 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 14:37:50.483641 Processing 188 relocs. Offset value of 0x74c0e000
350 14:37:50.491200 BS: romstage times (exec / console): total (unknown) / 255 ms
351 14:37:50.495469
352 14:37:50.496033
353 14:37:50.505825 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 14:37:50.511931 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 14:37:50.515063 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 14:37:50.521638 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 14:37:50.578034 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 14:37:50.584735 Processing 4805 relocs. Offset value of 0x75da8000
359 14:37:50.588015 BS: postcar times (exec / console): total (unknown) / 42 ms
360 14:37:50.591164
361 14:37:50.591629
362 14:37:50.600787 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 14:37:50.601341 Normal boot
364 14:37:50.605044 EC returned error result code 3
365 14:37:50.608200 FW_CONFIG value is 0x204
366 14:37:50.611692 GENERIC: 0.0 disabled by fw_config
367 14:37:50.618178 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 14:37:50.622047 I2C: 00:10 disabled by fw_config
369 14:37:50.625176 I2C: 00:10 disabled by fw_config
370 14:37:50.628242 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 14:37:50.634779 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 14:37:50.638024 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 14:37:50.644823 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 14:37:50.647871 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 14:37:50.651336 I2C: 00:10 disabled by fw_config
376 14:37:50.658045 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 14:37:50.664411 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 14:37:50.667703 I2C: 00:1a disabled by fw_config
379 14:37:50.671045 I2C: 00:1a disabled by fw_config
380 14:37:50.677674 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 14:37:50.680910 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 14:37:50.683970 GENERIC: 0.0 disabled by fw_config
383 14:37:50.691173 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 14:37:50.694296 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 14:37:50.701143 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 14:37:50.704147 microcode: Update skipped, already up-to-date
387 14:37:50.710831 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 14:37:50.736700 Detected 2 core, 2 thread CPU.
389 14:37:50.740211 Setting up SMI for CPU
390 14:37:50.743587 IED base = 0x7b400000
391 14:37:50.744208 IED size = 0x00400000
392 14:37:50.746307 Will perform SMM setup.
393 14:37:50.750252 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 14:37:50.760097 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 14:37:50.762822 Processing 16 relocs. Offset value of 0x00030000
396 14:37:50.766780 Attempting to start 1 APs
397 14:37:50.769979 Waiting for 10ms after sending INIT.
398 14:37:50.786523 Waiting for 1st SIPI to complete...done.
399 14:37:50.787110 AP: slot 1 apic_id 2.
400 14:37:50.793284 Waiting for 2nd SIPI to complete...done.
401 14:37:50.799473 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 14:37:50.806401 Processing 13 relocs. Offset value of 0x00038000
403 14:37:50.806961 Unable to locate Global NVS
404 14:37:50.816733 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 14:37:50.820043 Installing permanent SMM handler to 0x7b000000
406 14:37:50.829726 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 14:37:50.832709 Processing 704 relocs. Offset value of 0x7b010000
408 14:37:50.842540 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 14:37:50.845757 Processing 13 relocs. Offset value of 0x7b008000
410 14:37:50.853200 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 14:37:50.855925 Unable to locate Global NVS
412 14:37:50.862362 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 14:37:50.865676 Clearing SMI status registers
414 14:37:50.866265 SMI_STS: PM1
415 14:37:50.869554 PM1_STS: PWRBTN
416 14:37:50.870161 TCO_STS: INTRD_DET
417 14:37:50.872254 GPE0 STD STS:
418 14:37:50.879187 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 14:37:50.882441 In relocation handler: CPU 0
420 14:37:50.885813 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 14:37:50.892317 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 14:37:50.892888 Relocation complete.
423 14:37:50.902526 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 14:37:50.903112 In relocation handler: CPU 1
425 14:37:50.909637 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 14:37:50.913330 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 14:37:50.914045 Relocation complete.
428 14:37:50.916648 Initializing CPU #0
429 14:37:50.919750 CPU: vendor Intel device 906c0
430 14:37:50.923214 CPU: family 06, model 9c, stepping 00
431 14:37:50.926577 Clearing out pending MCEs
432 14:37:50.929886 Setting up local APIC...
433 14:37:50.930469 apic_id: 0x00 done.
434 14:37:50.933159 Turbo is available but hidden
435 14:37:50.936612 Turbo is available and visible
436 14:37:50.943406 microcode: Update skipped, already up-to-date
437 14:37:50.943993 CPU #0 initialized
438 14:37:50.946326 Initializing CPU #1
439 14:37:50.949219 CPU: vendor Intel device 906c0
440 14:37:50.952971 CPU: family 06, model 9c, stepping 00
441 14:37:50.956156 Clearing out pending MCEs
442 14:37:50.959395 Setting up local APIC...
443 14:37:50.959979 apic_id: 0x02 done.
444 14:37:50.966154 microcode: Update skipped, already up-to-date
445 14:37:50.966733 CPU #1 initialized
446 14:37:50.972588 bsp_do_flight_plan done after 175 msecs.
447 14:37:50.973173 CPU: frequency set to 2800 MHz
448 14:37:50.976023 Enabling SMIs.
449 14:37:50.982692 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 288 ms
450 14:37:50.992174 Probing TPM: done!
451 14:37:50.998798 Connected to device vid:did:rid of 1ae0:0028:00
452 14:37:51.008495 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
453 14:37:51.012405 Initialized TPM device CR50 revision 0
454 14:37:51.015252 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 14:37:51.022479 Found a VBT of 7680 bytes after decompression
456 14:37:51.028799 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 14:37:51.064239 Detected 2 core, 2 thread CPU.
458 14:37:51.067709 Detected 2 core, 2 thread CPU.
459 14:37:51.429269 Display FSP Version Info HOB
460 14:37:51.432158 Reference Code - CPU = 8.7.22.30
461 14:37:51.435479 uCode Version = 24.0.0.1f
462 14:37:51.438805 TXT ACM version = ff.ff.ff.ffff
463 14:37:51.442326 Reference Code - ME = 8.7.22.30
464 14:37:51.445227 MEBx version = 0.0.0.0
465 14:37:51.448720 ME Firmware Version = Consumer SKU
466 14:37:51.452137 Reference Code - PCH = 8.7.22.30
467 14:37:51.455288 PCH-CRID Status = Disabled
468 14:37:51.458653 PCH-CRID Original Value = ff.ff.ff.ffff
469 14:37:51.461993 PCH-CRID New Value = ff.ff.ff.ffff
470 14:37:51.465105 OPROM - RST - RAID = ff.ff.ff.ffff
471 14:37:51.468721 PCH Hsio Version = 4.0.0.0
472 14:37:51.471694 Reference Code - SA - System Agent = 8.7.22.30
473 14:37:51.475010 Reference Code - MRC = 0.0.4.68
474 14:37:51.478431 SA - PCIe Version = 8.7.22.30
475 14:37:51.481662 SA-CRID Status = Disabled
476 14:37:51.485051 SA-CRID Original Value = 0.0.0.0
477 14:37:51.489148 SA-CRID New Value = 0.0.0.0
478 14:37:51.489664 OPROM - VBIOS = ff.ff.ff.ffff
479 14:37:51.495879 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 14:37:51.499239 PHY Build Version = ff.ff.ff.ffff
481 14:37:51.502459 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 14:37:51.510144 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 14:37:51.513510 ITSS IRQ Polarities Before:
484 14:37:51.514024 IPC0: 0xffffffff
485 14:37:51.516987 IPC1: 0xffffffff
486 14:37:51.517447 IPC2: 0xffffffff
487 14:37:51.520179 IPC3: 0xffffffff
488 14:37:51.523578 ITSS IRQ Polarities After:
489 14:37:51.524000 IPC0: 0xffffffff
490 14:37:51.526944 IPC1: 0xffffffff
491 14:37:51.527382 IPC2: 0xffffffff
492 14:37:51.529991 IPC3: 0xffffffff
493 14:37:51.540142 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 14:37:51.546977 BS: BS_DEV_INIT_CHIPS run times (exec / console): 403 / 156 ms
495 14:37:51.549764 Enumerating buses...
496 14:37:51.553192 Show all devs... Before device enumeration.
497 14:37:51.557058 Root Device: enabled 1
498 14:37:51.560171 CPU_CLUSTER: 0: enabled 1
499 14:37:51.560593 DOMAIN: 0000: enabled 1
500 14:37:51.563065 PCI: 00:00.0: enabled 1
501 14:37:51.566681 PCI: 00:02.0: enabled 1
502 14:37:51.569809 PCI: 00:04.0: enabled 1
503 14:37:51.570367 PCI: 00:05.0: enabled 1
504 14:37:51.573372 PCI: 00:09.0: enabled 0
505 14:37:51.576266 PCI: 00:12.6: enabled 0
506 14:37:51.579803 PCI: 00:14.0: enabled 1
507 14:37:51.580398 PCI: 00:14.1: enabled 0
508 14:37:51.583207 PCI: 00:14.2: enabled 0
509 14:37:51.586861 PCI: 00:14.3: enabled 1
510 14:37:51.587393 PCI: 00:14.5: enabled 1
511 14:37:51.589937 PCI: 00:15.0: enabled 1
512 14:37:51.593043 PCI: 00:15.1: enabled 1
513 14:37:51.596268 PCI: 00:15.2: enabled 1
514 14:37:51.596838 PCI: 00:15.3: enabled 1
515 14:37:51.599980 PCI: 00:16.0: enabled 1
516 14:37:51.602562 PCI: 00:16.1: enabled 0
517 14:37:51.606199 PCI: 00:16.4: enabled 0
518 14:37:51.606743 PCI: 00:16.5: enabled 0
519 14:37:51.609981 PCI: 00:17.0: enabled 0
520 14:37:51.612730 PCI: 00:19.0: enabled 1
521 14:37:51.616593 PCI: 00:19.1: enabled 0
522 14:37:51.617123 PCI: 00:19.2: enabled 1
523 14:37:51.619464 PCI: 00:1a.0: enabled 1
524 14:37:51.622659 PCI: 00:1c.0: enabled 0
525 14:37:51.626416 PCI: 00:1c.1: enabled 0
526 14:37:51.626946 PCI: 00:1c.2: enabled 0
527 14:37:51.629889 PCI: 00:1c.3: enabled 0
528 14:37:51.632596 PCI: 00:1c.4: enabled 0
529 14:37:51.633122 PCI: 00:1c.5: enabled 0
530 14:37:51.636099 PCI: 00:1c.6: enabled 0
531 14:37:51.639123 PCI: 00:1c.7: enabled 1
532 14:37:51.643124 PCI: 00:1e.0: enabled 0
533 14:37:51.643660 PCI: 00:1e.1: enabled 0
534 14:37:51.646077 PCI: 00:1e.2: enabled 1
535 14:37:51.649524 PCI: 00:1e.3: enabled 0
536 14:37:51.652251 PCI: 00:1f.0: enabled 1
537 14:37:51.652693 PCI: 00:1f.1: enabled 1
538 14:37:51.655826 PCI: 00:1f.2: enabled 1
539 14:37:51.658759 PCI: 00:1f.3: enabled 1
540 14:37:51.662507 PCI: 00:1f.4: enabled 0
541 14:37:51.663044 PCI: 00:1f.5: enabled 1
542 14:37:51.665407 PCI: 00:1f.7: enabled 0
543 14:37:51.668754 GENERIC: 0.0: enabled 1
544 14:37:51.669177 GENERIC: 0.0: enabled 1
545 14:37:51.671997 USB0 port 0: enabled 1
546 14:37:51.675631 GENERIC: 0.0: enabled 1
547 14:37:51.678699 I2C: 00:2c: enabled 1
548 14:37:51.679261 I2C: 00:15: enabled 1
549 14:37:51.682321 GENERIC: 0.0: enabled 0
550 14:37:51.686094 I2C: 00:15: enabled 1
551 14:37:51.686658 I2C: 00:10: enabled 0
552 14:37:51.689060 I2C: 00:10: enabled 0
553 14:37:51.692657 I2C: 00:2c: enabled 1
554 14:37:51.693221 I2C: 00:40: enabled 1
555 14:37:51.695781 I2C: 00:10: enabled 1
556 14:37:51.699149 I2C: 00:39: enabled 1
557 14:37:51.699712 I2C: 00:36: enabled 1
558 14:37:51.702146 I2C: 00:10: enabled 0
559 14:37:51.705529 I2C: 00:0c: enabled 1
560 14:37:51.706030 I2C: 00:50: enabled 1
561 14:37:51.709100 I2C: 00:1a: enabled 1
562 14:37:51.712042 I2C: 00:1a: enabled 0
563 14:37:51.712507 I2C: 00:1a: enabled 0
564 14:37:51.715515 I2C: 00:28: enabled 1
565 14:37:51.718839 I2C: 00:29: enabled 1
566 14:37:51.722572 PCI: 00:00.0: enabled 1
567 14:37:51.723133 SPI: 00: enabled 1
568 14:37:51.725515 PNP: 0c09.0: enabled 1
569 14:37:51.728562 GENERIC: 0.0: enabled 0
570 14:37:51.729027 USB2 port 0: enabled 1
571 14:37:51.731954 USB2 port 1: enabled 1
572 14:37:51.735440 USB2 port 2: enabled 1
573 14:37:51.736003 USB2 port 3: enabled 1
574 14:37:51.739113 USB2 port 4: enabled 0
575 14:37:51.742304 USB2 port 5: enabled 1
576 14:37:51.742769 USB2 port 6: enabled 0
577 14:37:51.745142 USB2 port 7: enabled 1
578 14:37:51.748358 USB3 port 0: enabled 1
579 14:37:51.752065 USB3 port 1: enabled 1
580 14:37:51.752626 USB3 port 2: enabled 1
581 14:37:51.755238 USB3 port 3: enabled 1
582 14:37:51.758535 APIC: 00: enabled 1
583 14:37:51.759151 APIC: 02: enabled 1
584 14:37:51.762227 Compare with tree...
585 14:37:51.765082 Root Device: enabled 1
586 14:37:51.765692 CPU_CLUSTER: 0: enabled 1
587 14:37:51.768923 APIC: 00: enabled 1
588 14:37:51.771529 APIC: 02: enabled 1
589 14:37:51.774913 DOMAIN: 0000: enabled 1
590 14:37:51.775393 PCI: 00:00.0: enabled 1
591 14:37:51.778427 PCI: 00:02.0: enabled 1
592 14:37:51.781746 PCI: 00:04.0: enabled 1
593 14:37:51.784605 GENERIC: 0.0: enabled 1
594 14:37:51.788179 PCI: 00:05.0: enabled 1
595 14:37:51.788759 GENERIC: 0.0: enabled 1
596 14:37:51.791424 PCI: 00:09.0: enabled 0
597 14:37:51.794717 PCI: 00:12.6: enabled 0
598 14:37:51.797856 PCI: 00:14.0: enabled 1
599 14:37:51.801336 USB0 port 0: enabled 1
600 14:37:51.801990 USB2 port 0: enabled 1
601 14:37:51.804673 USB2 port 1: enabled 1
602 14:37:51.807701 USB2 port 2: enabled 1
603 14:37:51.811115 USB2 port 3: enabled 1
604 14:37:51.815289 USB2 port 4: enabled 0
605 14:37:51.815842 USB2 port 5: enabled 1
606 14:37:51.817515 USB2 port 6: enabled 0
607 14:37:51.821258 USB2 port 7: enabled 1
608 14:37:51.824714 USB3 port 0: enabled 1
609 14:37:51.827892 USB3 port 1: enabled 1
610 14:37:51.831143 USB3 port 2: enabled 1
611 14:37:51.831614 USB3 port 3: enabled 1
612 14:37:51.834919 PCI: 00:14.1: enabled 0
613 14:37:51.837700 PCI: 00:14.2: enabled 0
614 14:37:51.840624 PCI: 00:14.3: enabled 1
615 14:37:51.844282 GENERIC: 0.0: enabled 1
616 14:37:51.844843 PCI: 00:14.5: enabled 1
617 14:37:51.847522 PCI: 00:15.0: enabled 1
618 14:37:51.851035 I2C: 00:2c: enabled 1
619 14:37:51.854031 I2C: 00:15: enabled 1
620 14:37:51.857333 PCI: 00:15.1: enabled 1
621 14:37:51.857848 PCI: 00:15.2: enabled 1
622 14:37:51.860560 GENERIC: 0.0: enabled 0
623 14:37:51.863818 I2C: 00:15: enabled 1
624 14:37:51.867140 I2C: 00:10: enabled 0
625 14:37:51.867608 I2C: 00:10: enabled 0
626 14:37:51.870358 I2C: 00:2c: enabled 1
627 14:37:51.874102 I2C: 00:40: enabled 1
628 14:37:51.877204 I2C: 00:10: enabled 1
629 14:37:51.880624 I2C: 00:39: enabled 1
630 14:37:51.881245 PCI: 00:15.3: enabled 1
631 14:37:51.883866 I2C: 00:36: enabled 1
632 14:37:51.887004 I2C: 00:10: enabled 0
633 14:37:51.890540 I2C: 00:0c: enabled 1
634 14:37:51.891011 I2C: 00:50: enabled 1
635 14:37:51.894354 PCI: 00:16.0: enabled 1
636 14:37:51.896944 PCI: 00:16.1: enabled 0
637 14:37:51.900388 PCI: 00:16.4: enabled 0
638 14:37:51.903634 PCI: 00:16.5: enabled 0
639 14:37:51.904215 PCI: 00:17.0: enabled 0
640 14:37:51.906982 PCI: 00:19.0: enabled 1
641 14:37:51.910843 I2C: 00:1a: enabled 1
642 14:37:51.913912 I2C: 00:1a: enabled 0
643 14:37:51.914382 I2C: 00:1a: enabled 0
644 14:37:51.916807 I2C: 00:28: enabled 1
645 14:37:51.921323 I2C: 00:29: enabled 1
646 14:37:51.923808 PCI: 00:19.1: enabled 0
647 14:37:51.927025 PCI: 00:19.2: enabled 1
648 14:37:51.927696 PCI: 00:1a.0: enabled 1
649 14:37:51.930381 PCI: 00:1e.0: enabled 0
650 14:37:51.933657 PCI: 00:1e.1: enabled 0
651 14:37:51.936678 PCI: 00:1e.2: enabled 1
652 14:37:51.937143 SPI: 00: enabled 1
653 14:37:51.940354 PCI: 00:1e.3: enabled 0
654 14:37:51.943481 PCI: 00:1f.0: enabled 1
655 14:37:51.946487 PNP: 0c09.0: enabled 1
656 14:37:51.949774 PCI: 00:1f.1: enabled 1
657 14:37:51.950247 PCI: 00:1f.2: enabled 1
658 14:37:51.953477 PCI: 00:1f.3: enabled 1
659 14:37:51.956642 GENERIC: 0.0: enabled 0
660 14:37:51.959994 PCI: 00:1f.4: enabled 0
661 14:37:51.963199 PCI: 00:1f.5: enabled 1
662 14:37:51.963663 PCI: 00:1f.7: enabled 0
663 14:37:51.966854 Root Device scanning...
664 14:37:51.969905 scan_static_bus for Root Device
665 14:37:51.973424 CPU_CLUSTER: 0 enabled
666 14:37:51.973944 DOMAIN: 0000 enabled
667 14:37:51.976490 DOMAIN: 0000 scanning...
668 14:37:51.979844 PCI: pci_scan_bus for bus 00
669 14:37:51.984500 PCI: 00:00.0 [8086/0000] ops
670 14:37:51.986177 PCI: 00:00.0 [8086/4e22] enabled
671 14:37:51.989822 PCI: 00:02.0 [8086/0000] bus ops
672 14:37:51.993283 PCI: 00:02.0 [8086/4e55] enabled
673 14:37:51.996351 PCI: 00:04.0 [8086/0000] bus ops
674 14:37:51.999670 PCI: 00:04.0 [8086/4e03] enabled
675 14:37:52.002996 PCI: 00:05.0 [8086/0000] bus ops
676 14:37:52.006779 PCI: 00:05.0 [8086/4e19] enabled
677 14:37:52.010021 PCI: 00:08.0 [8086/4e11] enabled
678 14:37:52.012618 PCI: 00:14.0 [8086/0000] bus ops
679 14:37:52.016300 PCI: 00:14.0 [8086/4ded] enabled
680 14:37:52.019601 PCI: 00:14.2 [8086/4def] disabled
681 14:37:52.023280 PCI: 00:14.3 [8086/0000] bus ops
682 14:37:52.026661 PCI: 00:14.3 [8086/4df0] enabled
683 14:37:52.029375 PCI: 00:14.5 [8086/0000] ops
684 14:37:52.032536 PCI: 00:14.5 [8086/4df8] enabled
685 14:37:52.035993 PCI: 00:15.0 [8086/0000] bus ops
686 14:37:52.039619 PCI: 00:15.0 [8086/4de8] enabled
687 14:37:52.043622 PCI: 00:15.1 [8086/0000] bus ops
688 14:37:52.045783 PCI: 00:15.1 [8086/4de9] enabled
689 14:37:52.049657 PCI: 00:15.2 [8086/0000] bus ops
690 14:37:52.052697 PCI: 00:15.2 [8086/4dea] enabled
691 14:37:52.056318 PCI: 00:15.3 [8086/0000] bus ops
692 14:37:52.059114 PCI: 00:15.3 [8086/4deb] enabled
693 14:37:52.062225 PCI: 00:16.0 [8086/0000] ops
694 14:37:52.065856 PCI: 00:16.0 [8086/4de0] enabled
695 14:37:52.069009 PCI: 00:19.0 [8086/0000] bus ops
696 14:37:52.072600 PCI: 00:19.0 [8086/4dc5] enabled
697 14:37:52.075821 PCI: 00:19.2 [8086/0000] ops
698 14:37:52.078772 PCI: 00:19.2 [8086/4dc7] enabled
699 14:37:52.082828 PCI: 00:1a.0 [8086/0000] ops
700 14:37:52.085498 PCI: 00:1a.0 [8086/4dc4] enabled
701 14:37:52.088803 PCI: 00:1e.0 [8086/0000] ops
702 14:37:52.092040 PCI: 00:1e.0 [8086/4da8] disabled
703 14:37:52.095438 PCI: 00:1e.2 [8086/0000] bus ops
704 14:37:52.098901 PCI: 00:1e.2 [8086/4daa] enabled
705 14:37:52.102047 PCI: 00:1f.0 [8086/0000] bus ops
706 14:37:52.105626 PCI: 00:1f.0 [8086/4d87] enabled
707 14:37:52.108933 PCI: Static device PCI: 00:1f.1 not found, disabling it.
708 14:37:52.112210 RTC Init
709 14:37:52.115679 Set power on after power failure.
710 14:37:52.116446 Disabling Deep S3
711 14:37:52.118939 Disabling Deep S3
712 14:37:52.119522 Disabling Deep S4
713 14:37:52.122024 Disabling Deep S4
714 14:37:52.122498 Disabling Deep S5
715 14:37:52.125445 Disabling Deep S5
716 14:37:52.128714 PCI: 00:1f.2 [0000/0000] hidden
717 14:37:52.132027 PCI: 00:1f.3 [8086/0000] bus ops
718 14:37:52.135395 PCI: 00:1f.3 [8086/4dc8] enabled
719 14:37:52.138726 PCI: 00:1f.5 [8086/0000] bus ops
720 14:37:52.141803 PCI: 00:1f.5 [8086/4da4] enabled
721 14:37:52.145818 PCI: Leftover static devices:
722 14:37:52.146398 PCI: 00:12.6
723 14:37:52.148933 PCI: 00:09.0
724 14:37:52.149423 PCI: 00:14.1
725 14:37:52.152496 PCI: 00:16.1
726 14:37:52.152956 PCI: 00:16.4
727 14:37:52.153324 PCI: 00:16.5
728 14:37:52.155714 PCI: 00:17.0
729 14:37:52.156309 PCI: 00:19.1
730 14:37:52.158912 PCI: 00:1e.1
731 14:37:52.159474 PCI: 00:1e.3
732 14:37:52.159840 PCI: 00:1f.1
733 14:37:52.162466 PCI: 00:1f.4
734 14:37:52.163033 PCI: 00:1f.7
735 14:37:52.165110 PCI: Check your devicetree.cb.
736 14:37:52.168475 PCI: 00:02.0 scanning...
737 14:37:52.172603 scan_generic_bus for PCI: 00:02.0
738 14:37:52.175619 scan_generic_bus for PCI: 00:02.0 done
739 14:37:52.179852 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
740 14:37:52.182862 PCI: 00:04.0 scanning...
741 14:37:52.186280 scan_generic_bus for PCI: 00:04.0
742 14:37:52.189746 GENERIC: 0.0 enabled
743 14:37:52.196129 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
744 14:37:52.199475 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
745 14:37:52.203109 PCI: 00:05.0 scanning...
746 14:37:52.206556 scan_generic_bus for PCI: 00:05.0
747 14:37:52.209458 GENERIC: 0.0 enabled
748 14:37:52.213082 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
749 14:37:52.219324 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
750 14:37:52.222845 PCI: 00:14.0 scanning...
751 14:37:52.225797 scan_static_bus for PCI: 00:14.0
752 14:37:52.226263 USB0 port 0 enabled
753 14:37:52.229738 USB0 port 0 scanning...
754 14:37:52.232779 scan_static_bus for USB0 port 0
755 14:37:52.236526 USB2 port 0 enabled
756 14:37:52.237089 USB2 port 1 enabled
757 14:37:52.239471 USB2 port 2 enabled
758 14:37:52.240033 USB2 port 3 enabled
759 14:37:52.242925 USB2 port 4 disabled
760 14:37:52.246109 USB2 port 5 enabled
761 14:37:52.246670 USB2 port 6 disabled
762 14:37:52.249341 USB2 port 7 enabled
763 14:37:52.252893 USB3 port 0 enabled
764 14:37:52.253453 USB3 port 1 enabled
765 14:37:52.256089 USB3 port 2 enabled
766 14:37:52.256650 USB3 port 3 enabled
767 14:37:52.259115 USB2 port 0 scanning...
768 14:37:52.263134 scan_static_bus for USB2 port 0
769 14:37:52.265710 scan_static_bus for USB2 port 0 done
770 14:37:52.272572 scan_bus: bus USB2 port 0 finished in 6 msecs
771 14:37:52.273133 USB2 port 1 scanning...
772 14:37:52.275799 scan_static_bus for USB2 port 1
773 14:37:52.282192 scan_static_bus for USB2 port 1 done
774 14:37:52.285817 scan_bus: bus USB2 port 1 finished in 6 msecs
775 14:37:52.289238 USB2 port 2 scanning...
776 14:37:52.292246 scan_static_bus for USB2 port 2
777 14:37:52.295233 scan_static_bus for USB2 port 2 done
778 14:37:52.299429 scan_bus: bus USB2 port 2 finished in 6 msecs
779 14:37:52.302001 USB2 port 3 scanning...
780 14:37:52.305613 scan_static_bus for USB2 port 3
781 14:37:52.309027 scan_static_bus for USB2 port 3 done
782 14:37:52.311673 scan_bus: bus USB2 port 3 finished in 6 msecs
783 14:37:52.315222 USB2 port 5 scanning...
784 14:37:52.318435 scan_static_bus for USB2 port 5
785 14:37:52.322272 scan_static_bus for USB2 port 5 done
786 14:37:52.328649 scan_bus: bus USB2 port 5 finished in 6 msecs
787 14:37:52.329215 USB2 port 7 scanning...
788 14:37:52.331627 scan_static_bus for USB2 port 7
789 14:37:52.338786 scan_static_bus for USB2 port 7 done
790 14:37:52.342420 scan_bus: bus USB2 port 7 finished in 6 msecs
791 14:37:52.345325 USB3 port 0 scanning...
792 14:37:52.348628 scan_static_bus for USB3 port 0
793 14:37:52.351692 scan_static_bus for USB3 port 0 done
794 14:37:52.354979 scan_bus: bus USB3 port 0 finished in 6 msecs
795 14:37:52.358007 USB3 port 1 scanning...
796 14:37:52.361550 scan_static_bus for USB3 port 1
797 14:37:52.365230 scan_static_bus for USB3 port 1 done
798 14:37:52.368287 scan_bus: bus USB3 port 1 finished in 6 msecs
799 14:37:52.371244 USB3 port 2 scanning...
800 14:37:52.375369 scan_static_bus for USB3 port 2
801 14:37:52.378533 scan_static_bus for USB3 port 2 done
802 14:37:52.384694 scan_bus: bus USB3 port 2 finished in 6 msecs
803 14:37:52.385244 USB3 port 3 scanning...
804 14:37:52.388035 scan_static_bus for USB3 port 3
805 14:37:52.395036 scan_static_bus for USB3 port 3 done
806 14:37:52.398020 scan_bus: bus USB3 port 3 finished in 6 msecs
807 14:37:52.401141 scan_static_bus for USB0 port 0 done
808 14:37:52.409160 scan_bus: bus USB0 port 0 finished in 172 msecs
809 14:37:52.411518 scan_static_bus for PCI: 00:14.0 done
810 14:37:52.415034 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
811 14:37:52.418519 PCI: 00:14.3 scanning...
812 14:37:52.421169 scan_static_bus for PCI: 00:14.3
813 14:37:52.424640 GENERIC: 0.0 enabled
814 14:37:52.427818 scan_static_bus for PCI: 00:14.3 done
815 14:37:52.430985 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
816 14:37:52.434270 PCI: 00:15.0 scanning...
817 14:37:52.437831 scan_static_bus for PCI: 00:15.0
818 14:37:52.441141 I2C: 00:2c enabled
819 14:37:52.441753 I2C: 00:15 enabled
820 14:37:52.444417 scan_static_bus for PCI: 00:15.0 done
821 14:37:52.451182 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
822 14:37:52.454211 PCI: 00:15.1 scanning...
823 14:37:52.458154 scan_static_bus for PCI: 00:15.1
824 14:37:52.460892 scan_static_bus for PCI: 00:15.1 done
825 14:37:52.464227 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
826 14:37:52.467987 PCI: 00:15.2 scanning...
827 14:37:52.470979 scan_static_bus for PCI: 00:15.2
828 14:37:52.474151 GENERIC: 0.0 disabled
829 14:37:52.474712 I2C: 00:15 enabled
830 14:37:52.477716 I2C: 00:10 disabled
831 14:37:52.478182 I2C: 00:10 disabled
832 14:37:52.481378 I2C: 00:2c enabled
833 14:37:52.483786 I2C: 00:40 enabled
834 14:37:52.484253 I2C: 00:10 enabled
835 14:37:52.487766 I2C: 00:39 enabled
836 14:37:52.490893 scan_static_bus for PCI: 00:15.2 done
837 14:37:52.494169 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
838 14:37:52.497295 PCI: 00:15.3 scanning...
839 14:37:52.500549 scan_static_bus for PCI: 00:15.3
840 14:37:52.503968 I2C: 00:36 enabled
841 14:37:52.504531 I2C: 00:10 disabled
842 14:37:52.507671 I2C: 00:0c enabled
843 14:37:52.510605 I2C: 00:50 enabled
844 14:37:52.514057 scan_static_bus for PCI: 00:15.3 done
845 14:37:52.516984 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
846 14:37:52.520573 PCI: 00:19.0 scanning...
847 14:37:52.523719 scan_static_bus for PCI: 00:19.0
848 14:37:52.526863 I2C: 00:1a enabled
849 14:37:52.527423 I2C: 00:1a disabled
850 14:37:52.530171 I2C: 00:1a disabled
851 14:37:52.530732 I2C: 00:28 enabled
852 14:37:52.533477 I2C: 00:29 enabled
853 14:37:52.537057 scan_static_bus for PCI: 00:19.0 done
854 14:37:52.543765 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
855 14:37:52.544326 PCI: 00:1e.2 scanning...
856 14:37:52.547091 scan_generic_bus for PCI: 00:1e.2
857 14:37:52.550307 SPI: 00 enabled
858 14:37:52.557094 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
859 14:37:52.560530 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
860 14:37:52.563613 PCI: 00:1f.0 scanning...
861 14:37:52.566933 scan_static_bus for PCI: 00:1f.0
862 14:37:52.570059 PNP: 0c09.0 enabled
863 14:37:52.570528 PNP: 0c09.0 scanning...
864 14:37:52.573407 scan_static_bus for PNP: 0c09.0
865 14:37:52.576647 scan_static_bus for PNP: 0c09.0 done
866 14:37:52.583289 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
867 14:37:52.586311 scan_static_bus for PCI: 00:1f.0 done
868 14:37:52.589874 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
869 14:37:52.593122 PCI: 00:1f.3 scanning...
870 14:37:52.596415 scan_static_bus for PCI: 00:1f.3
871 14:37:52.601620 GENERIC: 0.0 disabled
872 14:37:52.602946 scan_static_bus for PCI: 00:1f.3 done
873 14:37:52.609847 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
874 14:37:52.610313 PCI: 00:1f.5 scanning...
875 14:37:52.613258 scan_generic_bus for PCI: 00:1f.5
876 14:37:52.619932 scan_generic_bus for PCI: 00:1f.5 done
877 14:37:52.623116 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
878 14:37:52.626325 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
879 14:37:52.633279 scan_static_bus for Root Device done
880 14:37:52.636652 scan_bus: bus Root Device finished in 664 msecs
881 14:37:52.637230 done
882 14:37:52.642830 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1084 ms
883 14:37:52.645929 Chrome EC: UHEPI supported
884 14:37:52.653244 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
885 14:37:52.659306 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
886 14:37:52.662559 SPI flash protection: WPSW=0 SRP0=0
887 14:37:52.665870 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
888 14:37:52.672973 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
889 14:37:52.676356 found VGA at PCI: 00:02.0
890 14:37:52.679534 Setting up VGA for PCI: 00:02.0
891 14:37:52.682732 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 14:37:52.689041 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 14:37:52.689511 Allocating resources...
894 14:37:52.692630 Reading resources...
895 14:37:52.695954 Root Device read_resources bus 0 link: 0
896 14:37:52.702350 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 14:37:52.706728 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 14:37:52.709710 DOMAIN: 0000 read_resources bus 0 link: 0
899 14:37:52.716974 PCI: 00:04.0 read_resources bus 1 link: 0
900 14:37:52.720298 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 14:37:52.726991 PCI: 00:05.0 read_resources bus 2 link: 0
902 14:37:52.730226 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 14:37:52.736965 PCI: 00:14.0 read_resources bus 0 link: 0
904 14:37:52.740684 USB0 port 0 read_resources bus 0 link: 0
905 14:37:52.746509 USB0 port 0 read_resources bus 0 link: 0 done
906 14:37:52.750405 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 14:37:52.753647 PCI: 00:14.3 read_resources bus 0 link: 0
908 14:37:52.761347 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 14:37:52.764423 PCI: 00:15.0 read_resources bus 0 link: 0
910 14:37:52.808919 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 14:37:52.809691 PCI: 00:15.2 read_resources bus 0 link: 0
912 14:37:52.810630 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 14:37:52.811208 PCI: 00:15.3 read_resources bus 0 link: 0
914 14:37:52.811729 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 14:37:52.812247 PCI: 00:19.0 read_resources bus 0 link: 0
916 14:37:52.812638 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 14:37:52.812966 PCI: 00:1e.2 read_resources bus 3 link: 0
918 14:37:52.813350 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 14:37:52.816593 PCI: 00:1f.0 read_resources bus 0 link: 0
920 14:37:52.819596 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 14:37:52.823366 PCI: 00:1f.3 read_resources bus 0 link: 0
922 14:37:52.829932 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 14:37:52.832626 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 14:37:52.839431 Root Device read_resources bus 0 link: 0 done
925 14:37:52.842795 Done reading resources.
926 14:37:52.846284 Show resources in subtree (Root Device)...After reading.
927 14:37:52.853080 Root Device child on link 0 CPU_CLUSTER: 0
928 14:37:52.855994 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 14:37:52.856552 APIC: 00
930 14:37:52.859121 APIC: 02
931 14:37:52.862567 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 14:37:52.873015 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 14:37:52.882243 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 14:37:52.882802 PCI: 00:00.0
935 14:37:52.892805 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 14:37:52.902801 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 14:37:52.912690 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 14:37:52.922410 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 14:37:52.928837 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 14:37:52.938551 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 14:37:52.948652 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 14:37:52.958757 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 14:37:52.968701 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 14:37:52.975405 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 14:37:52.985416 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 14:37:52.995006 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 14:37:53.004780 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 14:37:53.014773 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 14:37:53.021447 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 14:37:53.031457 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 14:37:53.041121 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 14:37:53.051383 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 14:37:53.060831 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 14:37:53.061391 PCI: 00:02.0
955 14:37:53.071286 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 14:37:53.084550 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 14:37:53.090830 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 14:37:53.094292 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 14:37:53.107257 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 14:37:53.107733 GENERIC: 0.0
961 14:37:53.110785 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 14:37:53.120545 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 14:37:53.124138 GENERIC: 0.0
964 14:37:53.127696 PCI: 00:08.0
965 14:37:53.137192 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 14:37:53.140681 PCI: 00:14.0 child on link 0 USB0 port 0
967 14:37:53.150980 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 14:37:53.154260 USB0 port 0 child on link 0 USB2 port 0
969 14:37:53.157104 USB2 port 0
970 14:37:53.157611 USB2 port 1
971 14:37:53.160127 USB2 port 2
972 14:37:53.160585 USB2 port 3
973 14:37:53.163253 USB2 port 4
974 14:37:53.163716 USB2 port 5
975 14:37:53.166645 USB2 port 6
976 14:37:53.167108 USB2 port 7
977 14:37:53.170429 USB3 port 0
978 14:37:53.171010 USB3 port 1
979 14:37:53.173960 USB3 port 2
980 14:37:53.174534 USB3 port 3
981 14:37:53.177417 PCI: 00:14.2
982 14:37:53.180516 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 14:37:53.189984 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 14:37:53.193722 GENERIC: 0.0
985 14:37:53.194289 PCI: 00:14.5
986 14:37:53.203806 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 14:37:53.209968 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 14:37:53.220210 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 14:37:53.220787 I2C: 00:2c
990 14:37:53.222902 I2C: 00:15
991 14:37:53.223362 PCI: 00:15.1
992 14:37:53.233091 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 14:37:53.239783 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 14:37:53.249782 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 14:37:53.250375 GENERIC: 0.0
996 14:37:53.252860 I2C: 00:15
997 14:37:53.253428 I2C: 00:10
998 14:37:53.253865 I2C: 00:10
999 14:37:53.256621 I2C: 00:2c
1000 14:37:53.257258 I2C: 00:40
1001 14:37:53.259319 I2C: 00:10
1002 14:37:53.259782 I2C: 00:39
1003 14:37:53.266405 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 14:37:53.276244 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 14:37:53.276819 I2C: 00:36
1006 14:37:53.279192 I2C: 00:10
1007 14:37:53.279657 I2C: 00:0c
1008 14:37:53.282397 I2C: 00:50
1009 14:37:53.282861 PCI: 00:16.0
1010 14:37:53.292935 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 14:37:53.295581 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 14:37:53.305911 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 14:37:53.309052 I2C: 00:1a
1014 14:37:53.309666 I2C: 00:1a
1015 14:37:53.312970 I2C: 00:1a
1016 14:37:53.313531 I2C: 00:28
1017 14:37:53.315659 I2C: 00:29
1018 14:37:53.316226 PCI: 00:19.2
1019 14:37:53.325729 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 14:37:53.338951 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 14:37:53.339522 PCI: 00:1a.0
1022 14:37:53.348977 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 14:37:53.349553 PCI: 00:1e.0
1024 14:37:53.355390 PCI: 00:1e.2 child on link 0 SPI: 00
1025 14:37:53.365498 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 14:37:53.366106 SPI: 00
1027 14:37:53.368559 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 14:37:53.378395 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 14:37:53.381414 PNP: 0c09.0
1030 14:37:53.388269 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 14:37:53.391499 PCI: 00:1f.2
1032 14:37:53.401401 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 14:37:53.407705 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 14:37:53.414347 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 14:37:53.424381 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 14:37:53.434019 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 14:37:53.434483 GENERIC: 0.0
1038 14:37:53.437963 PCI: 00:1f.5
1039 14:37:53.445110 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 14:37:53.452288 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 14:37:53.461806 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 14:37:53.468782 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 14:37:53.474923 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 14:37:53.481734 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 14:37:53.488238 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 14:37:53.491496 DOMAIN: 0000: Resource ranges:
1047 14:37:53.495100 * Base: 1000, Size: 800, Tag: 100
1048 14:37:53.498657 * Base: 1900, Size: e700, Tag: 100
1049 14:37:53.505289 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 14:37:53.511785 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 14:37:53.518025 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 14:37:53.524785 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 14:37:53.534353 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 14:37:53.541501 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 14:37:53.548133 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 14:37:53.558358 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 14:37:53.564219 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 14:37:53.571097 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 14:37:53.581226 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 14:37:53.588237 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 14:37:53.594440 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 14:37:53.604280 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 14:37:53.610912 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 14:37:53.617545 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 14:37:53.627664 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 14:37:53.633696 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 14:37:53.640923 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 14:37:53.650265 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 14:37:53.656900 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 14:37:53.663493 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 14:37:53.673843 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 14:37:53.680178 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 14:37:53.683140 DOMAIN: 0000: Resource ranges:
1074 14:37:53.687214 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 14:37:53.693299 * Base: d0000000, Size: 2b000000, Tag: 200
1076 14:37:53.696825 * Base: fb001000, Size: 2fff000, Tag: 200
1077 14:37:53.699760 * Base: fe010000, Size: 22000, Tag: 200
1078 14:37:53.703634 * Base: fe033000, Size: a4d000, Tag: 200
1079 14:37:53.710093 * Base: fea88000, Size: 2f8000, Tag: 200
1080 14:37:53.713352 * Base: fed88000, Size: 8000, Tag: 200
1081 14:37:53.716551 * Base: fed93000, Size: d000, Tag: 200
1082 14:37:53.719929 * Base: feda2000, Size: 125e000, Tag: 200
1083 14:37:53.726512 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 14:37:53.733055 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 14:37:53.739600 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 14:37:53.746329 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 14:37:53.753347 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 14:37:53.759628 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 14:37:53.766290 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 14:37:53.772754 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 14:37:53.779524 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 14:37:53.785919 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 14:37:53.792489 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 14:37:53.798831 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 14:37:53.805787 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 14:37:53.812395 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 14:37:53.819017 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 14:37:53.825257 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 14:37:53.832235 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 14:37:53.838477 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 14:37:53.845247 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 14:37:53.852019 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 14:37:53.858568 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 14:37:53.865248 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 14:37:53.871752 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 14:37:53.878244 Root Device assign_resources, bus 0 link: 0
1107 14:37:53.882121 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 14:37:53.888173 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 14:37:53.897877 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 14:37:53.904669 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 14:37:53.914890 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 14:37:53.918128 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 14:37:53.925266 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 14:37:53.931569 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 14:37:53.934620 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 14:37:53.941044 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 14:37:53.947871 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 14:37:53.957357 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 14:37:53.961002 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 14:37:53.964111 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 14:37:53.974516 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 14:37:53.977948 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 14:37:53.984699 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 14:37:53.990641 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 14:37:54.000849 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 14:37:54.004332 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 14:37:54.007230 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 14:37:54.018212 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 14:37:54.024830 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 14:37:54.028339 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 14:37:54.034624 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 14:37:54.041028 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 14:37:54.047685 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 14:37:54.051412 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 14:37:54.057808 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 14:37:54.067876 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 14:37:54.071284 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 14:37:54.077872 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 14:37:54.084500 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 14:37:54.094185 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 14:37:54.100767 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 14:37:54.103988 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 14:37:54.110849 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 14:37:54.114754 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 14:37:54.120269 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 14:37:54.124039 LPC: Trying to open IO window from 800 size 1ff
1147 14:37:54.133478 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 14:37:54.140486 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 14:37:54.143420 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 14:37:54.150019 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 14:37:54.156794 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 14:37:54.163191 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 14:37:54.166683 Root Device assign_resources, bus 0 link: 0
1154 14:37:54.169799 Done setting resources.
1155 14:37:54.176767 Show resources in subtree (Root Device)...After assigning values.
1156 14:37:54.179928 Root Device child on link 0 CPU_CLUSTER: 0
1157 14:37:54.183982 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 14:37:54.186282 APIC: 00
1159 14:37:54.186741 APIC: 02
1160 14:37:54.189789 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 14:37:54.200035 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 14:37:54.209456 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 14:37:54.213630 PCI: 00:00.0
1164 14:37:54.223305 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 14:37:54.229906 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 14:37:54.239715 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 14:37:54.249654 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 14:37:54.259212 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 14:37:54.269370 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 14:37:54.275544 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 14:37:54.285880 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 14:37:54.295507 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 14:37:54.305443 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 14:37:54.315748 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 14:37:54.325716 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 14:37:54.332523 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 14:37:54.342162 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 14:37:54.351852 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 14:37:54.361721 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 14:37:54.372195 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 14:37:54.381749 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 14:37:54.388165 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 14:37:54.391839 PCI: 00:02.0
1184 14:37:54.402137 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 14:37:54.411571 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 14:37:54.421448 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 14:37:54.424531 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 14:37:54.434524 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 14:37:54.437773 GENERIC: 0.0
1190 14:37:54.441421 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 14:37:54.454330 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 14:37:54.454896 GENERIC: 0.0
1193 14:37:54.457406 PCI: 00:08.0
1194 14:37:54.468059 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 14:37:54.471436 PCI: 00:14.0 child on link 0 USB0 port 0
1196 14:37:54.480793 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 14:37:54.487435 USB0 port 0 child on link 0 USB2 port 0
1198 14:37:54.488022 USB2 port 0
1199 14:37:54.491027 USB2 port 1
1200 14:37:54.491637 USB2 port 2
1201 14:37:54.494395 USB2 port 3
1202 14:37:54.495001 USB2 port 4
1203 14:37:54.497436 USB2 port 5
1204 14:37:54.498076 USB2 port 6
1205 14:37:54.501072 USB2 port 7
1206 14:37:54.501695 USB3 port 0
1207 14:37:54.504195 USB3 port 1
1208 14:37:54.504773 USB3 port 2
1209 14:37:54.508023 USB3 port 3
1210 14:37:54.508598 PCI: 00:14.2
1211 14:37:54.514312 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 14:37:54.524003 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 14:37:54.524602 GENERIC: 0.0
1214 14:37:54.527576 PCI: 00:14.5
1215 14:37:54.537197 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 14:37:54.541016 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 14:37:54.550207 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 14:37:54.554029 I2C: 00:2c
1219 14:37:54.554608 I2C: 00:15
1220 14:37:54.557138 PCI: 00:15.1
1221 14:37:54.566977 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 14:37:54.569921 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 14:37:54.580216 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 14:37:54.583627 GENERIC: 0.0
1225 14:37:54.584198 I2C: 00:15
1226 14:37:54.586268 I2C: 00:10
1227 14:37:54.586744 I2C: 00:10
1228 14:37:54.589548 I2C: 00:2c
1229 14:37:54.590058 I2C: 00:40
1230 14:37:54.593481 I2C: 00:10
1231 14:37:54.594104 I2C: 00:39
1232 14:37:54.599854 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 14:37:54.609410 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 14:37:54.609920 I2C: 00:36
1235 14:37:54.613131 I2C: 00:10
1236 14:37:54.613758 I2C: 00:0c
1237 14:37:54.616382 I2C: 00:50
1238 14:37:54.616959 PCI: 00:16.0
1239 14:37:54.626123 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 14:37:54.629626 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 14:37:54.643025 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 14:37:54.643609 I2C: 00:1a
1243 14:37:54.645992 I2C: 00:1a
1244 14:37:54.646566 I2C: 00:1a
1245 14:37:54.647054 I2C: 00:28
1246 14:37:54.649203 I2C: 00:29
1247 14:37:54.649720 PCI: 00:19.2
1248 14:37:54.662975 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 14:37:54.672496 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 14:37:54.673079 PCI: 00:1a.0
1251 14:37:54.685685 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 14:37:54.686267 PCI: 00:1e.0
1253 14:37:54.688666 PCI: 00:1e.2 child on link 0 SPI: 00
1254 14:37:54.698510 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 14:37:54.701783 SPI: 00
1256 14:37:54.705915 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 14:37:54.715200 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 14:37:54.715780 PNP: 0c09.0
1259 14:37:54.725475 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 14:37:54.726081 PCI: 00:1f.2
1261 14:37:54.735303 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 14:37:54.745561 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 14:37:54.748635 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 14:37:54.759056 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 14:37:54.771645 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 14:37:54.772226 GENERIC: 0.0
1267 14:37:54.774707 PCI: 00:1f.5
1268 14:37:54.784981 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 14:37:54.788698 Done allocating resources.
1270 14:37:54.791300 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2094 ms
1271 14:37:54.794571 Enabling resources...
1272 14:37:54.797959 PCI: 00:00.0 subsystem <- 8086/4e22
1273 14:37:54.801349 PCI: 00:00.0 cmd <- 06
1274 14:37:54.804685 PCI: 00:02.0 subsystem <- 8086/4e55
1275 14:37:54.807969 PCI: 00:02.0 cmd <- 03
1276 14:37:54.811991 PCI: 00:04.0 subsystem <- 8086/4e03
1277 14:37:54.814704 PCI: 00:04.0 cmd <- 02
1278 14:37:54.818194 PCI: 00:05.0 bridge ctrl <- 0003
1279 14:37:54.821636 PCI: 00:05.0 subsystem <- 8086/4e19
1280 14:37:54.824735 PCI: 00:05.0 cmd <- 02
1281 14:37:54.825315 PCI: 00:08.0 cmd <- 06
1282 14:37:54.830910 PCI: 00:14.0 subsystem <- 8086/4ded
1283 14:37:54.831470 PCI: 00:14.0 cmd <- 02
1284 14:37:54.834329 PCI: 00:14.3 subsystem <- 8086/4df0
1285 14:37:54.837872 PCI: 00:14.3 cmd <- 02
1286 14:37:54.841037 PCI: 00:14.5 subsystem <- 8086/4df8
1287 14:37:54.844216 PCI: 00:14.5 cmd <- 06
1288 14:37:54.847832 PCI: 00:15.0 subsystem <- 8086/4de8
1289 14:37:54.851183 PCI: 00:15.0 cmd <- 02
1290 14:37:54.853968 PCI: 00:15.1 subsystem <- 8086/4de9
1291 14:37:54.857854 PCI: 00:15.1 cmd <- 02
1292 14:37:54.860903 PCI: 00:15.2 subsystem <- 8086/4dea
1293 14:37:54.864229 PCI: 00:15.2 cmd <- 02
1294 14:37:54.867242 PCI: 00:15.3 subsystem <- 8086/4deb
1295 14:37:54.867719 PCI: 00:15.3 cmd <- 02
1296 14:37:54.874049 PCI: 00:16.0 subsystem <- 8086/4de0
1297 14:37:54.874703 PCI: 00:16.0 cmd <- 02
1298 14:37:54.877095 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 14:37:54.880468 PCI: 00:19.0 cmd <- 02
1300 14:37:54.883742 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 14:37:54.886939 PCI: 00:19.2 cmd <- 06
1302 14:37:54.890481 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 14:37:54.893650 PCI: 00:1a.0 cmd <- 06
1304 14:37:54.896856 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 14:37:54.900520 PCI: 00:1e.2 cmd <- 06
1306 14:37:54.904011 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 14:37:54.906728 PCI: 00:1f.0 cmd <- 407
1308 14:37:54.910151 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 14:37:54.910629 PCI: 00:1f.3 cmd <- 02
1310 14:37:54.916923 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 14:37:54.917495 PCI: 00:1f.5 cmd <- 406
1312 14:37:54.921700 done.
1313 14:37:54.926133 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1314 14:37:54.928703 Initializing devices...
1315 14:37:54.932399 Root Device init
1316 14:37:54.932972 mainboard: EC init
1317 14:37:54.938474 Chrome EC: Set SMI mask to 0x0000000000000000
1318 14:37:54.945436 Chrome EC: clear events_b mask to 0x0000000000000000
1319 14:37:54.952163 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 14:37:54.955398 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 14:37:54.961936 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 14:37:54.968515 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 14:37:54.971964 Root Device init finished in 38 msecs
1324 14:37:54.975993 PCI: 00:00.0 init
1325 14:37:54.979323 CPU TDP = 6 Watts
1326 14:37:54.979793 CPU PL1 = 7 Watts
1327 14:37:54.982508 CPU PL2 = 12 Watts
1328 14:37:54.986519 PCI: 00:00.0 init finished in 6 msecs
1329 14:37:54.990139 PCI: 00:02.0 init
1330 14:37:54.990725 GMA: Found VBT in CBFS
1331 14:37:54.993120 GMA: Found valid VBT in CBFS
1332 14:37:54.999422 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 14:37:55.006899 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 14:37:55.012995 PCI: 00:02.0 init finished in 18 msecs
1335 14:37:55.013625 PCI: 00:08.0 init
1336 14:37:55.016320 PCI: 00:08.0 init finished in 0 msecs
1337 14:37:55.019370 PCI: 00:14.0 init
1338 14:37:55.022407 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 14:37:55.029661 PCI: 00:14.0 init finished in 4 msecs
1340 14:37:55.030234 PCI: 00:15.0 init
1341 14:37:55.032813 I2C bus 0 version 0x3230302a
1342 14:37:55.036029 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 14:37:55.042422 PCI: 00:15.0 init finished in 6 msecs
1344 14:37:55.042880 PCI: 00:15.1 init
1345 14:37:55.045885 I2C bus 1 version 0x3230302a
1346 14:37:55.049657 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 14:37:55.052154 PCI: 00:15.1 init finished in 6 msecs
1348 14:37:55.055915 PCI: 00:15.2 init
1349 14:37:55.059184 I2C bus 2 version 0x3230302a
1350 14:37:55.062269 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 14:37:55.066414 PCI: 00:15.2 init finished in 6 msecs
1352 14:37:55.068747 PCI: 00:15.3 init
1353 14:37:55.072357 I2C bus 3 version 0x3230302a
1354 14:37:55.075148 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 14:37:55.078885 PCI: 00:15.3 init finished in 6 msecs
1356 14:37:55.082395 PCI: 00:16.0 init
1357 14:37:55.085423 PCI: 00:16.0 init finished in 0 msecs
1358 14:37:55.086022 PCI: 00:19.0 init
1359 14:37:55.088886 I2C bus 4 version 0x3230302a
1360 14:37:55.092272 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 14:37:55.098703 PCI: 00:19.0 init finished in 6 msecs
1362 14:37:55.099323 PCI: 00:1a.0 init
1363 14:37:55.101977 PCI: 00:1a.0 init finished in 0 msecs
1364 14:37:55.106303 PCI: 00:1f.0 init
1365 14:37:55.108698 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 14:37:55.115847 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 14:37:55.116419 IOAPIC: ID = 0x02
1368 14:37:55.119122 IOAPIC: Dumping registers
1369 14:37:55.121794 reg 0x0000: 0x02000000
1370 14:37:55.125839 reg 0x0001: 0x00770020
1371 14:37:55.126411 reg 0x0002: 0x00000000
1372 14:37:55.132115 PCI: 00:1f.0 init finished in 21 msecs
1373 14:37:55.132686 PCI: 00:1f.2 init
1374 14:37:55.135365 Disabling ACPI via APMC.
1375 14:37:55.140043 APMC done.
1376 14:37:55.143394 PCI: 00:1f.2 init finished in 6 msecs
1377 14:37:55.154870 PNP: 0c09.0 init
1378 14:37:55.157529 Google Chrome EC uptime: 6.504 seconds
1379 14:37:55.164235 Google Chrome AP resets since EC boot: 0
1380 14:37:55.167629 Google Chrome most recent AP reset causes:
1381 14:37:55.174074 Google Chrome EC reset flags at last EC boot: reset-pin
1382 14:37:55.177843 PNP: 0c09.0 init finished in 18 msecs
1383 14:37:55.178415 Devices initialized
1384 14:37:55.181202 Show all devs... After init.
1385 14:37:55.184465 Root Device: enabled 1
1386 14:37:55.187904 CPU_CLUSTER: 0: enabled 1
1387 14:37:55.191257 DOMAIN: 0000: enabled 1
1388 14:37:55.191842 PCI: 00:00.0: enabled 1
1389 14:37:55.194879 PCI: 00:02.0: enabled 1
1390 14:37:55.197806 PCI: 00:04.0: enabled 1
1391 14:37:55.200456 PCI: 00:05.0: enabled 1
1392 14:37:55.200932 PCI: 00:09.0: enabled 0
1393 14:37:55.204311 PCI: 00:12.6: enabled 0
1394 14:37:55.207672 PCI: 00:14.0: enabled 1
1395 14:37:55.208250 PCI: 00:14.1: enabled 0
1396 14:37:55.210547 PCI: 00:14.2: enabled 0
1397 14:37:55.214178 PCI: 00:14.3: enabled 1
1398 14:37:55.218039 PCI: 00:14.5: enabled 1
1399 14:37:55.218635 PCI: 00:15.0: enabled 1
1400 14:37:55.220811 PCI: 00:15.1: enabled 1
1401 14:37:55.223929 PCI: 00:15.2: enabled 1
1402 14:37:55.227185 PCI: 00:15.3: enabled 1
1403 14:37:55.227786 PCI: 00:16.0: enabled 1
1404 14:37:55.230775 PCI: 00:16.1: enabled 0
1405 14:37:55.234339 PCI: 00:16.4: enabled 0
1406 14:37:55.236620 PCI: 00:16.5: enabled 0
1407 14:37:55.237151 PCI: 00:17.0: enabled 0
1408 14:37:55.240424 PCI: 00:19.0: enabled 1
1409 14:37:55.244731 PCI: 00:19.1: enabled 0
1410 14:37:55.246865 PCI: 00:19.2: enabled 1
1411 14:37:55.247341 PCI: 00:1a.0: enabled 1
1412 14:37:55.250178 PCI: 00:1c.0: enabled 0
1413 14:37:55.253494 PCI: 00:1c.1: enabled 0
1414 14:37:55.254114 PCI: 00:1c.2: enabled 0
1415 14:37:55.256710 PCI: 00:1c.3: enabled 0
1416 14:37:55.260489 PCI: 00:1c.4: enabled 0
1417 14:37:55.263175 PCI: 00:1c.5: enabled 0
1418 14:37:55.263647 PCI: 00:1c.6: enabled 0
1419 14:37:55.266671 PCI: 00:1c.7: enabled 1
1420 14:37:55.269977 PCI: 00:1e.0: enabled 0
1421 14:37:55.273231 PCI: 00:1e.1: enabled 0
1422 14:37:55.273862 PCI: 00:1e.2: enabled 1
1423 14:37:55.276822 PCI: 00:1e.3: enabled 0
1424 14:37:55.280307 PCI: 00:1f.0: enabled 1
1425 14:37:55.283460 PCI: 00:1f.1: enabled 0
1426 14:37:55.283933 PCI: 00:1f.2: enabled 1
1427 14:37:55.286838 PCI: 00:1f.3: enabled 1
1428 14:37:55.289926 PCI: 00:1f.4: enabled 0
1429 14:37:55.293040 PCI: 00:1f.5: enabled 1
1430 14:37:55.293642 PCI: 00:1f.7: enabled 0
1431 14:37:55.296464 GENERIC: 0.0: enabled 1
1432 14:37:55.299497 GENERIC: 0.0: enabled 1
1433 14:37:55.299977 USB0 port 0: enabled 1
1434 14:37:55.303194 GENERIC: 0.0: enabled 1
1435 14:37:55.306568 I2C: 00:2c: enabled 1
1436 14:37:55.309939 I2C: 00:15: enabled 1
1437 14:37:55.310517 GENERIC: 0.0: enabled 0
1438 14:37:55.313025 I2C: 00:15: enabled 1
1439 14:37:55.316447 I2C: 00:10: enabled 0
1440 14:37:55.317021 I2C: 00:10: enabled 0
1441 14:37:55.319394 I2C: 00:2c: enabled 1
1442 14:37:55.323047 I2C: 00:40: enabled 1
1443 14:37:55.323637 I2C: 00:10: enabled 1
1444 14:37:55.325942 I2C: 00:39: enabled 1
1445 14:37:55.329923 I2C: 00:36: enabled 1
1446 14:37:55.330497 I2C: 00:10: enabled 0
1447 14:37:55.332959 I2C: 00:0c: enabled 1
1448 14:37:55.335923 I2C: 00:50: enabled 1
1449 14:37:55.336399 I2C: 00:1a: enabled 1
1450 14:37:55.339610 I2C: 00:1a: enabled 0
1451 14:37:55.343083 I2C: 00:1a: enabled 0
1452 14:37:55.343659 I2C: 00:28: enabled 1
1453 14:37:55.346198 I2C: 00:29: enabled 1
1454 14:37:55.349455 PCI: 00:00.0: enabled 1
1455 14:37:55.350075 SPI: 00: enabled 1
1456 14:37:55.352524 PNP: 0c09.0: enabled 1
1457 14:37:55.355782 GENERIC: 0.0: enabled 0
1458 14:37:55.359231 USB2 port 0: enabled 1
1459 14:37:55.359824 USB2 port 1: enabled 1
1460 14:37:55.362185 USB2 port 2: enabled 1
1461 14:37:55.366023 USB2 port 3: enabled 1
1462 14:37:55.366601 USB2 port 4: enabled 0
1463 14:37:55.368713 USB2 port 5: enabled 1
1464 14:37:55.372413 USB2 port 6: enabled 0
1465 14:37:55.372990 USB2 port 7: enabled 1
1466 14:37:55.375550 USB3 port 0: enabled 1
1467 14:37:55.379407 USB3 port 1: enabled 1
1468 14:37:55.382292 USB3 port 2: enabled 1
1469 14:37:55.382888 USB3 port 3: enabled 1
1470 14:37:55.385396 APIC: 00: enabled 1
1471 14:37:55.388847 APIC: 02: enabled 1
1472 14:37:55.389405 PCI: 00:08.0: enabled 1
1473 14:37:55.396150 BS: BS_DEV_INIT run times (exec / console): 26 / 437 ms
1474 14:37:55.399045 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 14:37:55.402153 ELOG: NV offset 0xbfa000 size 0x1000
1476 14:37:55.410610 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 14:37:55.417507 ELOG: Event(17) added with size 13 at 2023-08-16 14:37:55 UTC
1478 14:37:55.423582 ELOG: Event(92) added with size 9 at 2023-08-16 14:37:55 UTC
1479 14:37:55.430780 ELOG: Event(93) added with size 9 at 2023-08-16 14:37:55 UTC
1480 14:37:55.437049 ELOG: Event(9E) added with size 10 at 2023-08-16 14:37:55 UTC
1481 14:37:55.443983 ELOG: Event(9F) added with size 14 at 2023-08-16 14:37:55 UTC
1482 14:37:55.447598 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 14:37:55.453942 ELOG: Event(A1) added with size 10 at 2023-08-16 14:37:55 UTC
1484 14:37:55.463536 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 14:37:55.470178 ELOG: Event(A0) added with size 9 at 2023-08-16 14:37:55 UTC
1486 14:37:55.473530 elog_add_boot_reason: Logged dev mode boot
1487 14:37:55.480667 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1488 14:37:55.481227 Finalize devices...
1489 14:37:55.483594 Devices finalized
1490 14:37:55.487346 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1491 14:37:55.493756 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1492 14:37:55.500012 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1493 14:37:55.503773 ME: HFSTS1 : 0x80030045
1494 14:37:55.507120 ME: HFSTS2 : 0x30280136
1495 14:37:55.510104 ME: HFSTS3 : 0x00000050
1496 14:37:55.516922 ME: HFSTS4 : 0x00004000
1497 14:37:55.519923 ME: HFSTS5 : 0x00000000
1498 14:37:55.523106 ME: HFSTS6 : 0x40400006
1499 14:37:55.526727 ME: Manufacturing Mode : NO
1500 14:37:55.529986 ME: FW Partition Table : OK
1501 14:37:55.533698 ME: Bringup Loader Failure : NO
1502 14:37:55.536507 ME: Firmware Init Complete : NO
1503 14:37:55.539703 ME: Boot Options Present : NO
1504 14:37:55.542669 ME: Update In Progress : NO
1505 14:37:55.546708 ME: D0i3 Support : YES
1506 14:37:55.549966 ME: Low Power State Enabled : NO
1507 14:37:55.553320 ME: CPU Replaced : YES
1508 14:37:55.556822 ME: CPU Replacement Valid : YES
1509 14:37:55.559060 ME: Current Working State : 5
1510 14:37:55.562815 ME: Current Operation State : 1
1511 14:37:55.566004 ME: Current Operation Mode : 3
1512 14:37:55.569354 ME: Error Code : 0
1513 14:37:55.572533 ME: CPU Debug Disabled : YES
1514 14:37:55.575637 ME: TXT Support : NO
1515 14:37:55.583328 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1516 14:37:55.589048 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1517 14:37:55.592615 ACPI: Writing ACPI tables at 76b27000.
1518 14:37:55.593199 ACPI: * FACS
1519 14:37:55.596172 ACPI: * DSDT
1520 14:37:55.599041 Ramoops buffer: 0x100000@0x76a26000.
1521 14:37:55.602444 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1522 14:37:55.608954 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1523 14:37:55.612635 Google Chrome EC: version:
1524 14:37:55.615830 ro: magolor_1.1.9999-103b6f9
1525 14:37:55.619026 rw: magolor_1.1.9999-103b6f9
1526 14:37:55.619497 running image: 1
1527 14:37:55.625642 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1528 14:37:55.629932 ACPI: * FADT
1529 14:37:55.630498 SCI is IRQ9
1530 14:37:55.636718 ACPI: added table 1/32, length now 40
1531 14:37:55.637297 ACPI: * SSDT
1532 14:37:55.640072 Found 1 CPU(s) with 2 core(s) each.
1533 14:37:55.643574 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1534 14:37:55.650527 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1535 14:37:55.653328 Could not locate 'wifi_sar' in VPD.
1536 14:37:55.656301 Checking CBFS for default SAR values
1537 14:37:55.663199 wifi_sar_defaults.hex has bad len in CBFS
1538 14:37:55.666240 failed from getting SAR limits!
1539 14:37:55.669866 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1540 14:37:55.676529 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1541 14:37:55.679515 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1542 14:37:55.686414 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1543 14:37:55.689283 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1544 14:37:55.696296 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1545 14:37:55.699877 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1546 14:37:55.705686 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1547 14:37:55.712591 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1548 14:37:55.718847 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1549 14:37:55.725521 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1550 14:37:55.729332 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1551 14:37:55.735784 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1552 14:37:55.738834 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1553 14:37:55.742160 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1554 14:37:55.750304 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1555 14:37:55.753473 PS2K: Passing 101 keymaps to kernel
1556 14:37:55.759626 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1557 14:37:55.766492 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1558 14:37:55.769775 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1559 14:37:55.776804 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1560 14:37:55.782882 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1561 14:37:55.786630 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1562 14:37:55.793040 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1563 14:37:55.799854 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1564 14:37:55.802784 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1565 14:37:55.809959 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1566 14:37:55.812761 ACPI: added table 2/32, length now 44
1567 14:37:55.816533 ACPI: * MCFG
1568 14:37:55.819594 ACPI: added table 3/32, length now 48
1569 14:37:55.820072 ACPI: * TPM2
1570 14:37:55.822804 TPM2 log created at 0x76a16000
1571 14:37:55.826271 ACPI: added table 4/32, length now 52
1572 14:37:55.829668 ACPI: * MADT
1573 14:37:55.830192 SCI is IRQ9
1574 14:37:55.832941 ACPI: added table 5/32, length now 56
1575 14:37:55.836067 current = 76b2d580
1576 14:37:55.839356 ACPI: * DMAR
1577 14:37:55.842583 ACPI: added table 6/32, length now 60
1578 14:37:55.845962 ACPI: added table 7/32, length now 64
1579 14:37:55.846419 ACPI: * HPET
1580 14:37:55.849307 ACPI: added table 8/32, length now 68
1581 14:37:55.852691 ACPI: done.
1582 14:37:55.856029 ACPI tables: 26304 bytes.
1583 14:37:55.859228 smbios_write_tables: 76a15000
1584 14:37:55.862348 EC returned error result code 3
1585 14:37:55.866057 Couldn't obtain OEM name from CBI
1586 14:37:55.869329 Create SMBIOS type 16
1587 14:37:55.870139 Create SMBIOS type 17
1588 14:37:55.872563 GENERIC: 0.0 (WIFI Device)
1589 14:37:55.875737 SMBIOS tables: 913 bytes.
1590 14:37:55.879456 Writing table forward entry at 0x00000500
1591 14:37:55.885755 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1592 14:37:55.889126 Writing coreboot table at 0x76b4b000
1593 14:37:55.895628 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1594 14:37:55.899566 1. 0000000000001000-000000000009ffff: RAM
1595 14:37:55.905939 2. 00000000000a0000-00000000000fffff: RESERVED
1596 14:37:55.908731 3. 0000000000100000-0000000076a14fff: RAM
1597 14:37:55.915473 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1598 14:37:55.918904 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1599 14:37:55.925418 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1600 14:37:55.931989 7. 0000000077000000-000000007fbfffff: RESERVED
1601 14:37:55.935495 8. 00000000c0000000-00000000cfffffff: RESERVED
1602 14:37:55.938550 9. 00000000fb000000-00000000fb000fff: RESERVED
1603 14:37:55.945008 10. 00000000fe000000-00000000fe00ffff: RESERVED
1604 14:37:55.948610 11. 00000000fea80000-00000000fea87fff: RESERVED
1605 14:37:55.955216 12. 00000000fed80000-00000000fed87fff: RESERVED
1606 14:37:55.958468 13. 00000000fed90000-00000000fed92fff: RESERVED
1607 14:37:55.965361 14. 00000000feda0000-00000000feda1fff: RESERVED
1608 14:37:55.968839 15. 0000000100000000-00000001803fffff: RAM
1609 14:37:55.971851 Passing 4 GPIOs to payload:
1610 14:37:55.975372 NAME | PORT | POLARITY | VALUE
1611 14:37:55.981893 lid | undefined | high | high
1612 14:37:55.984914 power | undefined | high | low
1613 14:37:55.991830 oprom | undefined | high | low
1614 14:37:55.998778 EC in RW | 0x000000b9 | high | low
1615 14:37:56.005106 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum b8da
1616 14:37:56.005598 coreboot table: 1504 bytes.
1617 14:37:56.012063 IMD ROOT 0. 0x76fff000 0x00001000
1618 14:37:56.015215 IMD SMALL 1. 0x76ffe000 0x00001000
1619 14:37:56.018120 FSP MEMORY 2. 0x76c4e000 0x003b0000
1620 14:37:56.021869 CONSOLE 3. 0x76c2e000 0x00020000
1621 14:37:56.024982 FMAP 4. 0x76c2d000 0x00000578
1622 14:37:56.028532 TIME STAMP 5. 0x76c2c000 0x00000910
1623 14:37:56.031548 VBOOT WORK 6. 0x76c18000 0x00014000
1624 14:37:56.034580 ROMSTG STCK 7. 0x76c17000 0x00001000
1625 14:37:56.038263 AFTER CAR 8. 0x76c0d000 0x0000a000
1626 14:37:56.045011 RAMSTAGE 9. 0x76ba7000 0x00066000
1627 14:37:56.048235 REFCODE 10. 0x76b67000 0x00040000
1628 14:37:56.052031 SMM BACKUP 11. 0x76b57000 0x00010000
1629 14:37:56.054724 4f444749 12. 0x76b55000 0x00002000
1630 14:37:56.058549 EXT VBT13. 0x76b53000 0x00001c43
1631 14:37:56.061249 COREBOOT 14. 0x76b4b000 0x00008000
1632 14:37:56.064642 ACPI 15. 0x76b27000 0x00024000
1633 14:37:56.068215 ACPI GNVS 16. 0x76b26000 0x00001000
1634 14:37:56.071204 RAMOOPS 17. 0x76a26000 0x00100000
1635 14:37:56.077963 TPM2 TCGLOG18. 0x76a16000 0x00010000
1636 14:37:56.080918 SMBIOS 19. 0x76a15000 0x00000800
1637 14:37:56.081377 IMD small region:
1638 14:37:56.084265 IMD ROOT 0. 0x76ffec00 0x00000400
1639 14:37:56.091472 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1640 14:37:56.094489 VPD 2. 0x76ffeb80 0x00000047
1641 14:37:56.097956 POWER STATE 3. 0x76ffeb40 0x00000040
1642 14:37:56.101151 ROMSTAGE 4. 0x76ffeb20 0x00000004
1643 14:37:56.104234 MEM INFO 5. 0x76ffe940 0x000001e0
1644 14:37:56.111070 BS: BS_WRITE_TABLES run times (exec / console): 7 / 516 ms
1645 14:37:56.114396 MTRR: Physical address space:
1646 14:37:56.121198 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1647 14:37:56.127837 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1648 14:37:56.135246 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1649 14:37:56.137539 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1650 14:37:56.144151 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1651 14:37:56.151136 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1652 14:37:56.157362 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1653 14:37:56.161255 MTRR: Fixed MSR 0x250 0x0606060606060606
1654 14:37:56.167354 MTRR: Fixed MSR 0x258 0x0606060606060606
1655 14:37:56.170705 MTRR: Fixed MSR 0x259 0x0000000000000000
1656 14:37:56.173847 MTRR: Fixed MSR 0x268 0x0606060606060606
1657 14:37:56.177139 MTRR: Fixed MSR 0x269 0x0606060606060606
1658 14:37:56.180457 MTRR: Fixed MSR 0x26a 0x0606060606060606
1659 14:37:56.187309 MTRR: Fixed MSR 0x26b 0x0606060606060606
1660 14:37:56.190350 MTRR: Fixed MSR 0x26c 0x0606060606060606
1661 14:37:56.193995 MTRR: Fixed MSR 0x26d 0x0606060606060606
1662 14:37:56.197022 MTRR: Fixed MSR 0x26e 0x0606060606060606
1663 14:37:56.204043 MTRR: Fixed MSR 0x26f 0x0606060606060606
1664 14:37:56.206756 call enable_fixed_mtrr()
1665 14:37:56.210930 CPU physical address size: 39 bits
1666 14:37:56.213856 MTRR: default type WB/UC MTRR counts: 6/5.
1667 14:37:56.216946 MTRR: UC selected as default type.
1668 14:37:56.223730 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1669 14:37:56.230268 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1670 14:37:56.236465 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1671 14:37:56.243685 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1672 14:37:56.246448 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1673 14:37:56.249972
1674 14:37:56.250423 MTRR check
1675 14:37:56.253397 Fixed MTRRs : Enabled
1676 14:37:56.253909 Variable MTRRs: Enabled
1677 14:37:56.254279
1678 14:37:56.260145 MTRR: Fixed MSR 0x250 0x0606060606060606
1679 14:37:56.263454 MTRR: Fixed MSR 0x258 0x0606060606060606
1680 14:37:56.266579 MTRR: Fixed MSR 0x259 0x0000000000000000
1681 14:37:56.270276 MTRR: Fixed MSR 0x268 0x0606060606060606
1682 14:37:56.276605 MTRR: Fixed MSR 0x269 0x0606060606060606
1683 14:37:56.279861 MTRR: Fixed MSR 0x26a 0x0606060606060606
1684 14:37:56.283076 MTRR: Fixed MSR 0x26b 0x0606060606060606
1685 14:37:56.286525 MTRR: Fixed MSR 0x26c 0x0606060606060606
1686 14:37:56.293517 MTRR: Fixed MSR 0x26d 0x0606060606060606
1687 14:37:56.296712 MTRR: Fixed MSR 0x26e 0x0606060606060606
1688 14:37:56.299929 MTRR: Fixed MSR 0x26f 0x0606060606060606
1689 14:37:56.306551 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1690 14:37:56.309457 call enable_fixed_mtrr()
1691 14:37:56.313869 Checking cr50 for pending updates
1692 14:37:56.314417 CPU physical address size: 39 bits
1693 14:37:56.318896 Reading cr50 TPM mode
1694 14:37:56.328868 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1695 14:37:56.337101 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1696 14:37:56.339366 Checking segment from ROM address 0xfff9d5b8
1697 14:37:56.346151 Checking segment from ROM address 0xfff9d5d4
1698 14:37:56.350475 Loading segment from ROM address 0xfff9d5b8
1699 14:37:56.353349 code (compression=0)
1700 14:37:56.359714 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1701 14:37:56.369156 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1702 14:37:56.372540 it's not compressed!
1703 14:37:56.497478 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1704 14:37:56.504103 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1705 14:37:56.511355 Loading segment from ROM address 0xfff9d5d4
1706 14:37:56.514768 Entry Point 0x30000000
1707 14:37:56.515261 Loaded segments
1708 14:37:56.521415 BS: BS_PAYLOAD_LOAD run times (exec / console): 125 / 60 ms
1709 14:37:56.537553 Finalizing chipset.
1710 14:37:56.540538 Finalizing SMM.
1711 14:37:56.540995 APMC done.
1712 14:37:56.547221 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1713 14:37:56.550766 mp_park_aps done after 0 msecs.
1714 14:37:56.553712 Jumping to boot code at 0x30000000(0x76b4b000)
1715 14:37:56.564006 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1716 14:37:56.564560
1717 14:37:56.564924
1718 14:37:56.565260
1719 14:37:56.567073 Starting depthcharge on Magolor...
1720 14:37:56.567553
1721 14:37:56.568650 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1722 14:37:56.569177 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1723 14:37:56.569658 Setting prompt string to ['dedede:']
1724 14:37:56.570300 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1725 14:37:56.576997 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1726 14:37:56.577520
1727 14:37:56.583828 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1728 14:37:56.584381
1729 14:37:56.586967 fw_config match found: AUDIO_AMP=UNPROVISIONED
1730 14:37:56.587526
1731 14:37:56.590134 Wipe memory regions:
1732 14:37:56.590584
1733 14:37:56.593703 [0x00000000001000, 0x000000000a0000)
1734 14:37:56.594158
1735 14:37:56.596930 [0x00000000100000, 0x00000030000000)
1736 14:37:56.725939
1737 14:37:56.729422 [0x00000031062170, 0x00000076a15000)
1738 14:37:56.897875
1739 14:37:56.901520 [0x00000100000000, 0x00000180400000)
1740 14:37:57.963761
1741 14:37:57.964313 R8152: Initializing
1742 14:37:57.964681
1743 14:37:57.966533 Version 9 (ocp_data = 6010)
1744 14:37:57.966992
1745 14:37:57.970002 R8152: Done initializing
1746 14:37:57.970639
1747 14:37:57.973925 Adding net device
1748 14:37:57.974481
1749 14:37:57.976905 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1750 14:37:57.977404
1751 14:37:57.977823
1752 14:37:57.980306
1753 14:37:57.981327 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1755 14:37:58.082878 dedede: tftpboot 192.168.201.1 11299753/tftp-deploy-m4loc14m/kernel/bzImage 11299753/tftp-deploy-m4loc14m/kernel/cmdline 11299753/tftp-deploy-m4loc14m/ramdisk/ramdisk.cpio.gz
1756 14:37:58.083536 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 14:37:58.083990 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1758 14:37:58.088303 tftpboot 192.168.201.1 11299753/tftp-deploy-m4loc14m/kernel/bzImloy-m4loc14m/kernel/cmdline 11299753/tftp-deploy-m4loc14m/ramdisk/ramdisk.cpio.gz
1759 14:37:58.088843
1760 14:37:58.089206 Waiting for link
1761 14:37:58.290390
1762 14:37:58.290944 done.
1763 14:37:58.291305
1764 14:37:58.291647 MAC: 00:e0:4c:72:3d:b7
1765 14:37:58.291979
1766 14:37:58.293643 Sending DHCP discover... done.
1767 14:37:58.294103
1768 14:37:58.297300 Waiting for reply... done.
1769 14:37:58.297961
1770 14:37:58.300362 Sending DHCP request... done.
1771 14:37:58.300816
1772 14:37:58.303741 Waiting for reply... done.
1773 14:37:58.304198
1774 14:37:58.306868 My ip is 192.168.201.22
1775 14:37:58.307324
1776 14:37:58.310410 The DHCP server ip is 192.168.201.1
1777 14:37:58.310886
1778 14:37:58.317480 TFTP server IP predefined by user: 192.168.201.1
1779 14:37:58.318275
1780 14:37:58.323498 Bootfile predefined by user: 11299753/tftp-deploy-m4loc14m/kernel/bzImage
1781 14:37:58.324057
1782 14:37:58.326633 Sending tftp read request... done.
1783 14:37:58.327090
1784 14:37:58.334989 Waiting for the transfer...
1785 14:37:58.335544
1786 14:37:58.664184 00000000 ################################################################
1787 14:37:58.664323
1788 14:37:58.951392 00080000 ################################################################
1789 14:37:58.951564
1790 14:37:59.250434 00100000 ################################################################
1791 14:37:59.250578
1792 14:37:59.579754 00180000 ################################################################
1793 14:37:59.580136
1794 14:37:59.902346 00200000 ################################################################
1795 14:37:59.902486
1796 14:38:00.167214 00280000 ################################################################
1797 14:38:00.167349
1798 14:38:00.466679 00300000 ################################################################
1799 14:38:00.466817
1800 14:38:00.766709 00380000 ################################################################
1801 14:38:00.766848
1802 14:38:01.067090 00400000 ################################################################
1803 14:38:01.067234
1804 14:38:01.370957 00480000 ################################################################
1805 14:38:01.371101
1806 14:38:01.675138 00500000 ################################################################
1807 14:38:01.675278
1808 14:38:01.978502 00580000 ################################################################
1809 14:38:01.978641
1810 14:38:02.283479 00600000 ################################################################
1811 14:38:02.283613
1812 14:38:02.627537 00680000 ################################################################
1813 14:38:02.628089
1814 14:38:03.030259 00700000 ################################################################
1815 14:38:03.030802
1816 14:38:03.439674 00780000 ################################################################
1817 14:38:03.440214
1818 14:38:03.521181 00800000 ############# done.
1819 14:38:03.521749
1820 14:38:03.524658 The bootfile was 8490896 bytes long.
1821 14:38:03.525195
1822 14:38:03.527887 Sending tftp read request... done.
1823 14:38:03.528387
1824 14:38:03.531390 Waiting for the transfer...
1825 14:38:03.531971
1826 14:38:03.918952 00000000 ################################################################
1827 14:38:03.919526
1828 14:38:04.356985 00080000 ################################################################
1829 14:38:04.357528
1830 14:38:04.759625 00100000 ################################################################
1831 14:38:04.760248
1832 14:38:05.179778 00180000 ################################################################
1833 14:38:05.180365
1834 14:38:05.611679 00200000 ################################################################
1835 14:38:05.612261
1836 14:38:05.995287 00280000 ################################################################
1837 14:38:05.995431
1838 14:38:06.293741 00300000 ################################################################
1839 14:38:06.293875
1840 14:38:06.594396 00380000 ################################################################
1841 14:38:06.594542
1842 14:38:06.895639 00400000 ################################################################
1843 14:38:06.895773
1844 14:38:07.202299 00480000 ################################################################
1845 14:38:07.202436
1846 14:38:07.500178 00500000 ################################################################
1847 14:38:07.500318
1848 14:38:07.764760 00580000 ################################################################
1849 14:38:07.764907
1850 14:38:08.023798 00600000 ################################################################
1851 14:38:08.023928
1852 14:38:08.302289 00680000 ################################################################
1853 14:38:08.302422
1854 14:38:08.589195 00700000 ################################################################
1855 14:38:08.589341
1856 14:38:08.847454 00780000 ################################################################
1857 14:38:08.847585
1858 14:38:09.061606 00800000 ##################################################### done.
1859 14:38:09.062081
1860 14:38:09.064540 Sending tftp read request... done.
1861 14:38:09.065039
1862 14:38:09.068299 Waiting for the transfer...
1863 14:38:09.068751
1864 14:38:09.069314 00000000 # done.
1865 14:38:09.069773
1866 14:38:09.078029 Command line loaded dynamically from TFTP file: 11299753/tftp-deploy-m4loc14m/kernel/cmdline
1867 14:38:09.078560
1868 14:38:09.094135 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1869 14:38:09.094670
1870 14:38:09.097392 ec_init: CrosEC protocol v3 supported (256, 256)
1871 14:38:09.104600
1872 14:38:09.108040 Shutting down all USB controllers.
1873 14:38:09.108588
1874 14:38:09.108948 Removing current net device
1875 14:38:09.109280
1876 14:38:09.111434 Finalizing coreboot
1877 14:38:09.112005
1878 14:38:09.117689 Exiting depthcharge with code 4 at timestamp: 19344581
1879 14:38:09.118298
1880 14:38:09.118676
1881 14:38:09.119014 Starting kernel ...
1882 14:38:09.119341
1883 14:38:09.119657
1884 14:38:09.120940 end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
1885 14:38:09.121441 start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
1886 14:38:09.121896 Setting prompt string to ['Linux version [0-9]']
1887 14:38:09.122268 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1888 14:38:09.122640 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1890 14:42:43.122510 end: 2.2.5 auto-login-action (duration 00:04:34) [common]
1892 14:42:43.123606 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
1894 14:42:43.124440 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1897 14:42:43.125873 end: 2 depthcharge-action (duration 00:05:00) [common]
1899 14:42:43.127011 Cleaning after the job
1900 14:42:43.127101 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299753/tftp-deploy-m4loc14m/ramdisk
1901 14:42:43.128472 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299753/tftp-deploy-m4loc14m/kernel
1902 14:42:43.129882 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299753/tftp-deploy-m4loc14m/modules
1903 14:42:43.130243 start: 5.1 power-off (timeout 00:00:30) [common]
1904 14:42:43.130408 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=off'
1905 14:42:43.210462 >> Command sent successfully.
1906 14:42:43.222563 Returned 0 in 0 seconds
1907 14:42:43.324010 end: 5.1 power-off (duration 00:00:00) [common]
1909 14:42:43.325649 start: 5.2 read-feedback (timeout 00:10:00) [common]
1910 14:42:43.326980 Listened to connection for namespace 'common' for up to 1s
1912 14:42:43.328418 Listened to connection for namespace 'common' for up to 1s
1913 14:42:44.327619 Finalising connection for namespace 'common'
1914 14:42:44.328269 Disconnecting from shell: Finalise
1915 14:42:44.328762
1916 14:42:44.429870 end: 5.2 read-feedback (duration 00:00:01) [common]
1917 14:42:44.430481 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299753
1918 14:42:44.484810 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299753
1919 14:42:44.485060 JobError: Your job cannot terminate cleanly.