Boot log: acer-cbv514-1h-34uz-brya

    1 14:37:16.024589  lava-dispatcher, installed at version: 2023.06
    2 14:37:16.024811  start: 0 validate
    3 14:37:16.024954  Start time: 2023-08-16 14:37:16.024941+00:00 (UTC)
    4 14:37:16.025089  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:37:16.025235  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 14:37:16.279136  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:37:16.279954  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:37:16.534018  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:37:16.534827  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 14:37:19.049495  validate duration: 3.02
   12 14:37:19.049758  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 14:37:19.049852  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 14:37:19.049969  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 14:37:19.050089  Not decompressing ramdisk as can be used compressed.
   16 14:37:19.050172  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 14:37:19.050244  saving as /var/lib/lava/dispatcher/tmp/11299728/tftp-deploy-brhvjn35/ramdisk/rootfs.cpio.gz
   18 14:37:19.050307  total size: 8418130 (8 MB)
   19 14:37:19.561570  progress   0 % (0 MB)
   20 14:37:19.567224  progress   5 % (0 MB)
   21 14:37:19.569478  progress  10 % (0 MB)
   22 14:37:19.571773  progress  15 % (1 MB)
   23 14:37:19.573991  progress  20 % (1 MB)
   24 14:37:19.576249  progress  25 % (2 MB)
   25 14:37:19.578459  progress  30 % (2 MB)
   26 14:37:19.580599  progress  35 % (2 MB)
   27 14:37:19.582892  progress  40 % (3 MB)
   28 14:37:19.585146  progress  45 % (3 MB)
   29 14:37:19.587425  progress  50 % (4 MB)
   30 14:37:19.589615  progress  55 % (4 MB)
   31 14:37:19.591829  progress  60 % (4 MB)
   32 14:37:19.593822  progress  65 % (5 MB)
   33 14:37:19.596028  progress  70 % (5 MB)
   34 14:37:19.598189  progress  75 % (6 MB)
   35 14:37:19.600383  progress  80 % (6 MB)
   36 14:37:19.602542  progress  85 % (6 MB)
   37 14:37:19.604746  progress  90 % (7 MB)
   38 14:37:19.606904  progress  95 % (7 MB)
   39 14:37:19.608923  progress 100 % (8 MB)
   40 14:37:19.609148  8 MB downloaded in 0.56 s (14.37 MB/s)
   41 14:37:19.609306  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 14:37:19.609541  end: 1.1 download-retry (duration 00:00:01) [common]
   44 14:37:19.609626  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 14:37:19.609708  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 14:37:19.609844  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 14:37:19.609915  saving as /var/lib/lava/dispatcher/tmp/11299728/tftp-deploy-brhvjn35/kernel/bzImage
   48 14:37:19.609974  total size: 8490896 (8 MB)
   49 14:37:19.610034  No compression specified
   50 14:37:19.611181  progress   0 % (0 MB)
   51 14:37:19.613350  progress   5 % (0 MB)
   52 14:37:19.615603  progress  10 % (0 MB)
   53 14:37:19.617847  progress  15 % (1 MB)
   54 14:37:19.620146  progress  20 % (1 MB)
   55 14:37:19.622347  progress  25 % (2 MB)
   56 14:37:19.624768  progress  30 % (2 MB)
   57 14:37:19.627204  progress  35 % (2 MB)
   58 14:37:19.629404  progress  40 % (3 MB)
   59 14:37:19.631673  progress  45 % (3 MB)
   60 14:37:19.633893  progress  50 % (4 MB)
   61 14:37:19.636123  progress  55 % (4 MB)
   62 14:37:19.638290  progress  60 % (4 MB)
   63 14:37:19.640742  progress  65 % (5 MB)
   64 14:37:19.642912  progress  70 % (5 MB)
   65 14:37:19.645106  progress  75 % (6 MB)
   66 14:37:19.647268  progress  80 % (6 MB)
   67 14:37:19.649432  progress  85 % (6 MB)
   68 14:37:19.651649  progress  90 % (7 MB)
   69 14:37:19.653806  progress  95 % (7 MB)
   70 14:37:19.656086  progress 100 % (8 MB)
   71 14:37:19.656202  8 MB downloaded in 0.05 s (175.18 MB/s)
   72 14:37:19.656344  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 14:37:19.656566  end: 1.2 download-retry (duration 00:00:00) [common]
   75 14:37:19.656652  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 14:37:19.656739  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 14:37:19.656873  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 14:37:19.656948  saving as /var/lib/lava/dispatcher/tmp/11299728/tftp-deploy-brhvjn35/modules/modules.tar
   79 14:37:19.657009  total size: 253808 (0 MB)
   80 14:37:19.657069  Using unxz to decompress xz
   81 14:37:19.661284  progress  12 % (0 MB)
   82 14:37:19.661667  progress  25 % (0 MB)
   83 14:37:19.661928  progress  38 % (0 MB)
   84 14:37:19.663572  progress  51 % (0 MB)
   85 14:37:19.665380  progress  64 % (0 MB)
   86 14:37:19.667286  progress  77 % (0 MB)
   87 14:37:19.669115  progress  90 % (0 MB)
   88 14:37:19.670839  progress 100 % (0 MB)
   89 14:37:19.676416  0 MB downloaded in 0.02 s (12.48 MB/s)
   90 14:37:19.676640  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 14:37:19.676892  end: 1.3 download-retry (duration 00:00:00) [common]
   93 14:37:19.676985  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 14:37:19.677081  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 14:37:19.677161  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 14:37:19.677242  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 14:37:19.677457  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m
   98 14:37:19.677593  makedir: /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin
   99 14:37:19.677697  makedir: /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/tests
  100 14:37:19.677796  makedir: /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/results
  101 14:37:19.677910  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-add-keys
  102 14:37:19.678053  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-add-sources
  103 14:37:19.678184  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-background-process-start
  104 14:37:19.678313  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-background-process-stop
  105 14:37:19.678438  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-common-functions
  106 14:37:19.678592  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-echo-ipv4
  107 14:37:19.678735  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-install-packages
  108 14:37:19.678858  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-installed-packages
  109 14:37:19.678981  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-os-build
  110 14:37:19.679105  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-probe-channel
  111 14:37:19.679228  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-probe-ip
  112 14:37:19.679351  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-target-ip
  113 14:37:19.679472  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-target-mac
  114 14:37:19.679596  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-target-storage
  115 14:37:19.679723  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-test-case
  116 14:37:19.679846  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-test-event
  117 14:37:19.679966  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-test-feedback
  118 14:37:19.680088  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-test-raise
  119 14:37:19.680210  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-test-reference
  120 14:37:19.680337  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-test-runner
  121 14:37:19.680461  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-test-set
  122 14:37:19.680586  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-test-shell
  123 14:37:19.680712  Updating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-install-packages (oe)
  124 14:37:19.680865  Updating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/bin/lava-installed-packages (oe)
  125 14:37:19.680986  Creating /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/environment
  126 14:37:19.681146  LAVA metadata
  127 14:37:19.681220  - LAVA_JOB_ID=11299728
  128 14:37:19.681286  - LAVA_DISPATCHER_IP=192.168.201.1
  129 14:37:19.681387  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 14:37:19.681453  skipped lava-vland-overlay
  131 14:37:19.681529  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 14:37:19.681606  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 14:37:19.681667  skipped lava-multinode-overlay
  134 14:37:19.681739  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 14:37:19.681818  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 14:37:19.681890  Loading test definitions
  137 14:37:19.681976  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 14:37:19.682051  Using /lava-11299728 at stage 0
  139 14:37:19.682364  uuid=11299728_1.4.2.3.1 testdef=None
  140 14:37:19.682451  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 14:37:19.682537  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 14:37:19.683143  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 14:37:19.683374  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 14:37:19.684009  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 14:37:19.684231  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 14:37:19.684839  runner path: /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/0/tests/0_dmesg test_uuid 11299728_1.4.2.3.1
  149 14:37:19.684992  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 14:37:19.685235  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 14:37:19.685334  Using /lava-11299728 at stage 1
  153 14:37:19.685642  uuid=11299728_1.4.2.3.5 testdef=None
  154 14:37:19.685730  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 14:37:19.685811  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 14:37:19.686278  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 14:37:19.686488  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 14:37:19.687179  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 14:37:19.687401  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 14:37:19.688017  runner path: /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/1/tests/1_bootrr test_uuid 11299728_1.4.2.3.5
  163 14:37:19.688167  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 14:37:19.688368  Creating lava-test-runner.conf files
  166 14:37:19.688431  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/0 for stage 0
  167 14:37:19.688519  - 0_dmesg
  168 14:37:19.688597  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299728/lava-overlay-41jbq12m/lava-11299728/1 for stage 1
  169 14:37:19.688685  - 1_bootrr
  170 14:37:19.688778  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 14:37:19.688859  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 14:37:19.697460  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 14:37:19.697561  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 14:37:19.697643  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 14:37:19.697729  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 14:37:19.697815  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 14:37:19.942906  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 14:37:19.943284  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 14:37:19.943403  extracting modules file /var/lib/lava/dispatcher/tmp/11299728/tftp-deploy-brhvjn35/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299728/extract-overlay-ramdisk-nzax3zwl/ramdisk
  180 14:37:19.956718  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 14:37:19.956833  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 14:37:19.956918  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299728/compress-overlay-mjlu6p5e/overlay-1.4.2.4.tar.gz to ramdisk
  183 14:37:19.956992  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299728/compress-overlay-mjlu6p5e/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299728/extract-overlay-ramdisk-nzax3zwl/ramdisk
  184 14:37:19.965999  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 14:37:19.966111  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 14:37:19.966202  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 14:37:19.966290  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 14:37:19.966368  Building ramdisk /var/lib/lava/dispatcher/tmp/11299728/extract-overlay-ramdisk-nzax3zwl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299728/extract-overlay-ramdisk-nzax3zwl/ramdisk
  189 14:37:20.104394  >> 49827 blocks

  190 14:37:20.963651  rename /var/lib/lava/dispatcher/tmp/11299728/extract-overlay-ramdisk-nzax3zwl/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299728/tftp-deploy-brhvjn35/ramdisk/ramdisk.cpio.gz
  191 14:37:20.964084  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 14:37:20.964204  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 14:37:20.964302  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 14:37:20.964395  No mkimage arch provided, not using FIT.
  195 14:37:20.964481  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 14:37:20.964564  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 14:37:20.964664  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 14:37:20.964765  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 14:37:20.964847  No LXC device requested
  200 14:37:20.964920  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 14:37:20.965004  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 14:37:20.965080  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 14:37:20.965149  Checking files for TFTP limit of 4294967296 bytes.
  204 14:37:20.965543  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 14:37:20.965643  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 14:37:20.965728  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 14:37:20.965853  substitutions:
  208 14:37:20.965917  - {DTB}: None
  209 14:37:20.965976  - {INITRD}: 11299728/tftp-deploy-brhvjn35/ramdisk/ramdisk.cpio.gz
  210 14:37:20.966033  - {KERNEL}: 11299728/tftp-deploy-brhvjn35/kernel/bzImage
  211 14:37:20.966089  - {LAVA_MAC}: None
  212 14:37:20.966142  - {PRESEED_CONFIG}: None
  213 14:37:20.966196  - {PRESEED_LOCAL}: None
  214 14:37:20.966248  - {RAMDISK}: 11299728/tftp-deploy-brhvjn35/ramdisk/ramdisk.cpio.gz
  215 14:37:20.966301  - {ROOT_PART}: None
  216 14:37:20.966354  - {ROOT}: None
  217 14:37:20.966407  - {SERVER_IP}: 192.168.201.1
  218 14:37:20.966458  - {TEE}: None
  219 14:37:20.966511  Parsed boot commands:
  220 14:37:20.966593  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 14:37:20.966792  Parsed boot commands: tftpboot 192.168.201.1 11299728/tftp-deploy-brhvjn35/kernel/bzImage 11299728/tftp-deploy-brhvjn35/kernel/cmdline 11299728/tftp-deploy-brhvjn35/ramdisk/ramdisk.cpio.gz
  222 14:37:20.966877  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 14:37:20.966961  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 14:37:20.967050  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 14:37:20.967132  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 14:37:20.967202  Not connected, no need to disconnect.
  227 14:37:20.967274  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 14:37:20.967465  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 14:37:20.967532  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-7'
  230 14:37:20.971444  Setting prompt string to ['lava-test: # ']
  231 14:37:20.971772  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 14:37:20.971881  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 14:37:20.971976  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 14:37:20.972085  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 14:37:20.972310  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=reboot'
  236 14:37:26.126520  >> Command sent successfully.

  237 14:37:26.138460  Returned 0 in 5 seconds
  238 14:37:26.239797  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 14:37:26.241337  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 14:37:26.241882  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 14:37:26.242365  Setting prompt string to 'Starting depthcharge on Volmar...'
  243 14:37:26.242788  Changing prompt to 'Starting depthcharge on Volmar...'
  244 14:37:26.243159  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  245 14:37:26.244479  [Enter `^Ec?' for help]

  246 14:37:27.613469  

  247 14:37:27.614051  

  248 14:37:27.620260  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  249 14:37:27.623508  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  250 14:37:27.629837  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  251 14:37:27.633256  CPU: AES supported, TXT NOT supported, VT supported

  252 14:37:27.640827  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  253 14:37:27.643967  Cache size = 10 MiB

  254 14:37:27.647863  MCH: device id 4609 (rev 04) is Alderlake-P

  255 14:37:27.654693  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  256 14:37:27.658616  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  257 14:37:27.662423  VBOOT: Loading verstage.

  258 14:37:27.667133  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  259 14:37:27.669431  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  260 14:37:27.676021  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  261 14:37:27.683252  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  262 14:37:27.689869  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  263 14:37:27.694198  

  264 14:37:27.694893  

  265 14:37:27.701519  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  266 14:37:27.708485  Probing TPM I2C: I2C bus 1 version 0x3230302a

  267 14:37:27.712378  DW I2C bus 1 at 0xfe022000 (400 KHz)

  268 14:37:27.715598  I2C TX abort detected (00000001)

  269 14:37:27.718607  cr50_i2c_read: Address write failed

  270 14:37:27.729417  .done! DID_VID 0x00281ae0

  271 14:37:27.732718  TPM ready after 0 ms

  272 14:37:27.736061  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  273 14:37:27.749935  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  274 14:37:27.756893  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  275 14:37:27.813674  tlcl_send_startup: Startup return code is 0

  276 14:37:27.814339  TPM: setup succeeded

  277 14:37:27.836033  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  278 14:37:27.857926  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  279 14:37:27.861723  Chrome EC: UHEPI supported

  280 14:37:27.865241  Reading cr50 boot mode

  281 14:37:27.880759  Cr50 says boot_mode is VERIFIED_RW(0x00).

  282 14:37:27.881334  Phase 1

  283 14:37:27.887343  FMAP: area GBB found @ 1805000 (458752 bytes)

  284 14:37:27.894005  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  285 14:37:27.900326  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  286 14:37:27.907306  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  287 14:37:27.907888  Phase 2

  288 14:37:27.910963  Phase 3

  289 14:37:27.914398  FMAP: area GBB found @ 1805000 (458752 bytes)

  290 14:37:27.920727  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  291 14:37:27.924114  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  292 14:37:27.931191  VB2:vb2_verify_keyblock() Checking keyblock signature...

  293 14:37:27.937345  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  294 14:37:27.944184  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  295 14:37:27.951064  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  296 14:37:27.965786  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  297 14:37:27.968939  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  298 14:37:27.975277  VB2:vb2_verify_fw_preamble() Verifying preamble.

  299 14:37:27.982423  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  300 14:37:27.988924  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  301 14:37:27.995737  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  302 14:37:27.999156  Phase 4

  303 14:37:28.002966  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  304 14:37:28.009346  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  305 14:37:28.221944  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  306 14:37:28.228818  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  307 14:37:28.232398  Saving vboot hash.

  308 14:37:28.238483  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  309 14:37:28.254238  tlcl_extend: response is 0

  310 14:37:28.261392  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  311 14:37:28.264672  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  312 14:37:28.284082  tlcl_extend: response is 0

  313 14:37:28.290848  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  314 14:37:28.310346  tlcl_lock_nv_write: response is 0

  315 14:37:28.329217  tlcl_lock_nv_write: response is 0

  316 14:37:28.329797  Slot A is selected

  317 14:37:28.335760  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  318 14:37:28.342833  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  319 14:37:28.349023  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  320 14:37:28.355793  BS: verstage times (exec / console): total (unknown) / 263 ms

  321 14:37:28.356397  

  322 14:37:28.356773  

  323 14:37:28.362476  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  324 14:37:28.367292  Google Chrome EC: version:

  325 14:37:28.370846  	ro: volmar_v2.0.14126-e605144e9c

  326 14:37:28.373979  	rw: volmar_v0.0.55-22d1557

  327 14:37:28.376995    running image: 2

  328 14:37:28.380342  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  329 14:37:28.390791  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  330 14:37:28.397223  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  331 14:37:28.403926  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  332 14:37:28.414031  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  333 14:37:28.423845  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  334 14:37:28.427454  EC took 1121us to calculate image hash

  335 14:37:28.437903  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  336 14:37:28.440794  VB2:sync_ec() select_rw=RW(active)

  337 14:37:28.452308  Waited 275us to clear limit power flag.

  338 14:37:28.455590  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  339 14:37:28.458703  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  340 14:37:28.461906  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  341 14:37:28.468936  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  342 14:37:28.472234  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  343 14:37:28.475741  TCO_STS:   0000 0000

  344 14:37:28.476362  GEN_PMCON: d0015038 00002200

  345 14:37:28.478748  GBLRST_CAUSE: 00000000 00000000

  346 14:37:28.482314  HPR_CAUSE0: 00000000

  347 14:37:28.485615  prev_sleep_state 5

  348 14:37:28.489282  Abort disabling TXT, as CPU is not TXT capable.

  349 14:37:28.497322  cse_lite: Number of partitions = 3

  350 14:37:28.500381  cse_lite: Current partition = RO

  351 14:37:28.500875  cse_lite: Next partition = RO

  352 14:37:28.503640  cse_lite: Flags = 0x7

  353 14:37:28.510839  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  354 14:37:28.520673  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  355 14:37:28.524366  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  356 14:37:28.530638  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  357 14:37:28.537680  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  358 14:37:28.544337  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  359 14:37:28.547397  cse_lite: CSE CBFS RW version : 16.1.25.2049

  360 14:37:28.551218  cse_lite: Set Boot Partition Info Command (RW)

  361 14:37:28.559456  HECI: Global Reset(Type:1) Command

  362 14:37:30.000112  �ސ= 10 Partitions = 1 Line Size = 64 Sets = 16384

  363 14:37:30.002307  Cache size = 10 MiB

  364 14:37:30.006476  MCH: device id 4609 (rev 04) is Alderlake-P

  365 14:37:30.009705  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  366 14:37:30.016494  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  367 14:37:30.020198  VBOOT: Loading verstage.

  368 14:37:30.023937  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  369 14:37:30.027181  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  370 14:37:30.034262  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  371 14:37:30.041584  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  372 14:37:30.048298  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  373 14:37:30.048880  

  374 14:37:30.049253  

  375 14:37:30.058608  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  376 14:37:30.064788  Probing TPM I2C: I2C bus 1 version 0x3230302a

  377 14:37:30.068583  DW I2C bus 1 at 0xfe022000 (400 KHz)

  378 14:37:30.071624  done! DID_VID 0x00281ae0

  379 14:37:30.072198  TPM ready after 0 ms

  380 14:37:30.076022  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  381 14:37:30.090748  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  382 14:37:30.094285  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  383 14:37:30.157183  tlcl_send_startup: Startup return code is 0

  384 14:37:30.157746  TPM: setup succeeded

  385 14:37:30.178603  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  386 14:37:30.201081  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  387 14:37:30.204100  Chrome EC: UHEPI supported

  388 14:37:30.207385  Reading cr50 boot mode

  389 14:37:30.222436  Cr50 says boot_mode is VERIFIED_RW(0x00).

  390 14:37:30.223032  Phase 1

  391 14:37:30.229462  FMAP: area GBB found @ 1805000 (458752 bytes)

  392 14:37:30.236255  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  393 14:37:30.242619  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  394 14:37:30.249132  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  395 14:37:30.249715  Phase 2

  396 14:37:30.252687  Phase 3

  397 14:37:30.256048  FMAP: area GBB found @ 1805000 (458752 bytes)

  398 14:37:30.263521  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  399 14:37:30.265984  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  400 14:37:30.272923  VB2:vb2_verify_keyblock() Checking keyblock signature...

  401 14:37:30.279502  VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW

  402 14:37:30.286345  VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW

  403 14:37:30.292959  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW

  404 14:37:30.307764  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  405 14:37:30.311017  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  406 14:37:30.317722  VB2:vb2_verify_fw_preamble() Verifying preamble.

  407 14:37:30.324295  VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2

  408 14:37:30.331099  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  409 14:37:30.337606  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  410 14:37:30.341445  Phase 4

  411 14:37:30.344840  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  412 14:37:30.351713  VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2

  413 14:37:30.564187  VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW

  414 14:37:30.570690  VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW

  415 14:37:30.573840  Saving vboot hash.

  416 14:37:30.581111  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  417 14:37:30.596753  tlcl_extend: response is 0

  418 14:37:30.603396  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  419 14:37:30.606703  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  420 14:37:30.624579  tlcl_extend: response is 0

  421 14:37:30.631191  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  422 14:37:30.651168  tlcl_lock_nv_write: response is 0

  423 14:37:30.669987  tlcl_lock_nv_write: response is 0

  424 14:37:30.670601  Slot A is selected

  425 14:37:30.676730  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  426 14:37:30.683734  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  427 14:37:30.690309  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  428 14:37:30.697102  BS: verstage times (exec / console): total (unknown) / 257 ms

  429 14:37:30.697676  

  430 14:37:30.698051  

  431 14:37:30.703604  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  432 14:37:30.707319  Google Chrome EC: version:

  433 14:37:30.710708  	ro: volmar_v2.0.14126-e605144e9c

  434 14:37:30.713823  	rw: volmar_v0.0.55-22d1557

  435 14:37:30.717226    running image: 2

  436 14:37:30.720578  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  437 14:37:30.730616  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  438 14:37:30.737778  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  439 14:37:30.743978  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  440 14:37:30.753755  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  441 14:37:30.764093  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  442 14:37:30.767400  EC took 941us to calculate image hash

  443 14:37:30.777561  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  444 14:37:30.780339  VB2:sync_ec() select_rw=RW(active)

  445 14:37:30.801600  Waited 275us to clear limit power flag.

  446 14:37:30.804855  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  447 14:37:30.808386  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  448 14:37:30.811646  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  449 14:37:30.818338  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  450 14:37:30.821813  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  451 14:37:30.825049  TCO_STS:   0000 0000

  452 14:37:30.825629  GEN_PMCON: d1001038 00002200

  453 14:37:30.828434  GBLRST_CAUSE: 00000040 00000000

  454 14:37:30.832352  HPR_CAUSE0: 00000000

  455 14:37:30.834846  prev_sleep_state 5

  456 14:37:30.838736  Abort disabling TXT, as CPU is not TXT capable.

  457 14:37:30.846540  cse_lite: Number of partitions = 3

  458 14:37:30.849816  cse_lite: Current partition = RW

  459 14:37:30.850393  cse_lite: Next partition = RW

  460 14:37:30.853530  cse_lite: Flags = 0x7

  461 14:37:30.859634  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  462 14:37:30.869619  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  463 14:37:30.873195  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  464 14:37:30.879338  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  465 14:37:30.886272  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  466 14:37:30.893355  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  467 14:37:30.896546  cse_lite: CSE CBFS RW version : 16.1.25.2049

  468 14:37:30.899792  Boot Count incremented to 38

  469 14:37:30.906943  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  470 14:37:30.913551  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  471 14:37:30.925629  Probing TPM I2C: done! DID_VID 0x00281ae0

  472 14:37:30.928758  Locality already claimed

  473 14:37:30.932219  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  474 14:37:30.951898  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  475 14:37:30.958618  MRC: Hash idx 0x100d comparison successful.

  476 14:37:30.961892  MRC cache found, size f6c8

  477 14:37:30.962471  bootmode is set to: 2

  478 14:37:30.965067  EC returned error result code 3

  479 14:37:30.968417  FW_CONFIG value from CBI is 0x131

  480 14:37:30.975344  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  481 14:37:30.978376  SPD index = 0

  482 14:37:30.985091  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  483 14:37:30.985582  SPD: module type is LPDDR4X

  484 14:37:30.992352  SPD: module part number is K4U6E3S4AB-MGCL

  485 14:37:30.998443  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  486 14:37:31.002148  SPD: device width 16 bits, bus width 16 bits

  487 14:37:31.005225  SPD: module size is 1024 MB (per channel)

  488 14:37:31.075018  CBMEM:

  489 14:37:31.078374  IMD: root @ 0x76fff000 254 entries.

  490 14:37:31.081413  IMD: root @ 0x76ffec00 62 entries.

  491 14:37:31.089201  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  492 14:37:31.092759  RO_VPD is uninitialized or empty.

  493 14:37:31.095935  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  494 14:37:31.099598  RW_VPD is uninitialized or empty.

  495 14:37:31.105939  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  496 14:37:31.109299  External stage cache:

  497 14:37:31.112851  IMD: root @ 0x7bbff000 254 entries.

  498 14:37:31.116074  IMD: root @ 0x7bbfec00 62 entries.

  499 14:37:31.122711  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  500 14:37:31.129785  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  501 14:37:31.132462  MRC: 'RW_MRC_CACHE' does not need update.

  502 14:37:31.133023  8 DIMMs found

  503 14:37:31.136046  SMM Memory Map

  504 14:37:31.139196  SMRAM       : 0x7b800000 0x800000

  505 14:37:31.142613   Subregion 0: 0x7b800000 0x200000

  506 14:37:31.146055   Subregion 1: 0x7ba00000 0x200000

  507 14:37:31.149554   Subregion 2: 0x7bc00000 0x400000

  508 14:37:31.152404  top_of_ram = 0x77000000

  509 14:37:31.155741  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  510 14:37:31.163077  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  511 14:37:31.169335  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  512 14:37:31.172962  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  513 14:37:31.173532  Normal boot

  514 14:37:31.182746  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  515 14:37:31.189397  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  516 14:37:31.196702  Processing 237 relocs. Offset value of 0x74ab9000

  517 14:37:31.203685  BS: romstage times (exec / console): total (unknown) / 380 ms

  518 14:37:31.211095  

  519 14:37:31.211675  

  520 14:37:31.217457  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  521 14:37:31.217940  Normal boot

  522 14:37:31.224406  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  523 14:37:31.231224  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  524 14:37:31.238004  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  525 14:37:31.248305  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  526 14:37:31.296189  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  527 14:37:31.302647  Processing 5931 relocs. Offset value of 0x72a2f000

  528 14:37:31.306144  BS: postcar times (exec / console): total (unknown) / 51 ms

  529 14:37:31.306764  

  530 14:37:31.309612  

  531 14:37:31.315960  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  532 14:37:31.319115  Reserving BERT start 76a1e000, size 10000

  533 14:37:31.322590  Normal boot

  534 14:37:31.325779  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  535 14:37:31.332934  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  536 14:37:31.339369  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  537 14:37:31.346243  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  538 14:37:31.349467  Google Chrome EC: version:

  539 14:37:31.352751  	ro: volmar_v2.0.14126-e605144e9c

  540 14:37:31.355995  	rw: volmar_v0.0.55-22d1557

  541 14:37:31.356582    running image: 2

  542 14:37:31.362734  ACPI _SWS is PM1 Index 8 GPE Index -1

  543 14:37:31.366203  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  544 14:37:31.370901  EC returned error result code 3

  545 14:37:31.374182  FW_CONFIG value from CBI is 0x131

  546 14:37:31.381238  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  547 14:37:31.384081  PCI: 00:1c.2 disabled by fw_config

  548 14:37:31.391250  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  549 14:37:31.394638  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  550 14:37:31.400859  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  551 14:37:31.404231  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  552 14:37:31.411463  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  553 14:37:31.418038  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  554 14:37:31.421012  microcode: sig=0x906a4 pf=0x80 revision=0x423

  555 14:37:31.427856  microcode: Update skipped, already up-to-date

  556 14:37:31.434154  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  557 14:37:31.466722  Detected 6 core, 8 thread CPU.

  558 14:37:31.469808  Setting up SMI for CPU

  559 14:37:31.472932  IED base = 0x7bc00000

  560 14:37:31.473409  IED size = 0x00400000

  561 14:37:31.476802  Will perform SMM setup.

  562 14:37:31.479600  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  563 14:37:31.483322  LAPIC 0x0 in XAPIC mode.

  564 14:37:31.493650  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  565 14:37:31.496367  Processing 18 relocs. Offset value of 0x00030000

  566 14:37:31.501896  Attempting to start 7 APs

  567 14:37:31.504899  Waiting for 10ms after sending INIT.

  568 14:37:31.517819  Waiting for SIPI to complete...

  569 14:37:31.520622  done.

  570 14:37:31.521105  LAPIC 0x1 in XAPIC mode.

  571 14:37:31.524371  LAPIC 0x16 in XAPIC mode.

  572 14:37:31.527426  AP: slot 6 apic_id 1, MCU rev: 0x00000423

  573 14:37:31.530732  LAPIC 0x12 in XAPIC mode.

  574 14:37:31.534360  LAPIC 0x8 in XAPIC mode.

  575 14:37:31.537765  LAPIC 0x10 in XAPIC mode.

  576 14:37:31.540985  Waiting for SIPI to complete...

  577 14:37:31.541557  done.

  578 14:37:31.543920  LAPIC 0x14 in XAPIC mode.

  579 14:37:31.547142  AP: slot 2 apic_id 16, MCU rev: 0x00000423

  580 14:37:31.550976  AP: slot 1 apic_id 14, MCU rev: 0x00000423

  581 14:37:31.557601  AP: slot 3 apic_id 12, MCU rev: 0x00000423

  582 14:37:31.560949  AP: slot 4 apic_id 10, MCU rev: 0x00000423

  583 14:37:31.564316  AP: slot 7 apic_id 8, MCU rev: 0x00000423

  584 14:37:31.567432  LAPIC 0x9 in XAPIC mode.

  585 14:37:31.570982  AP: slot 5 apic_id 9, MCU rev: 0x00000423

  586 14:37:31.574211  smm_setup_relocation_handler: enter

  587 14:37:31.577568  smm_setup_relocation_handler: exit

  588 14:37:31.587339  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  589 14:37:31.591036  Processing 11 relocs. Offset value of 0x00038000

  590 14:37:31.597603  smm_module_setup_stub: stack_top = 0x7b804000

  591 14:37:31.600942  smm_module_setup_stub: per cpu stack_size = 0x800

  592 14:37:31.607478  smm_module_setup_stub: runtime.start32_offset = 0x4c

  593 14:37:31.611070  smm_module_setup_stub: runtime.smm_size = 0x10000

  594 14:37:31.617762  SMM Module: stub loaded at 38000. Will call 0x76a52094

  595 14:37:31.620941  Installing permanent SMM handler to 0x7b800000

  596 14:37:31.627670  smm_load_module: total_smm_space_needed e468, available -> 200000

  597 14:37:31.637754  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  598 14:37:31.641685  Processing 255 relocs. Offset value of 0x7b9f6000

  599 14:37:31.644621  smm_load_module: smram_start: 0x7b800000

  600 14:37:31.647893  smm_load_module: smram_end: 7ba00000

  601 14:37:31.654323  smm_load_module: handler start 0x7b9f6d5f

  602 14:37:31.658243  smm_load_module: handler_size 98d0

  603 14:37:31.661295  smm_load_module: fxsave_area 0x7b9ff000

  604 14:37:31.664119  smm_load_module: fxsave_size 1000

  605 14:37:31.667398  smm_load_module: CONFIG_MSEG_SIZE 0x0

  606 14:37:31.674415  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  607 14:37:31.677599  smm_load_module: handler_mod_params.smbase = 0x7b800000

  608 14:37:31.684715  smm_load_module: per_cpu_save_state_size = 0x400

  609 14:37:31.688211  smm_load_module: num_cpus = 0x8

  610 14:37:31.694323  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  611 14:37:31.698037  smm_load_module: total_save_state_size = 0x2000

  612 14:37:31.701385  smm_load_module: cpu0 entry: 7b9e6000

  613 14:37:31.708171  smm_create_map: cpus allowed in one segment 30

  614 14:37:31.711223  smm_create_map: min # of segments needed 1

  615 14:37:31.711793  CPU 0x0

  616 14:37:31.714499      smbase 7b9e6000  entry 7b9ee000

  617 14:37:31.721384             ss_start 7b9f5c00  code_end 7b9ee208

  618 14:37:31.721983  CPU 0x1

  619 14:37:31.724890      smbase 7b9e5c00  entry 7b9edc00

  620 14:37:31.728148             ss_start 7b9f5800  code_end 7b9ede08

  621 14:37:31.731236  CPU 0x2

  622 14:37:31.735072      smbase 7b9e5800  entry 7b9ed800

  623 14:37:31.738336             ss_start 7b9f5400  code_end 7b9eda08

  624 14:37:31.738966  CPU 0x3

  625 14:37:31.741660      smbase 7b9e5400  entry 7b9ed400

  626 14:37:31.748265             ss_start 7b9f5000  code_end 7b9ed608

  627 14:37:31.748839  CPU 0x4

  628 14:37:31.751368      smbase 7b9e5000  entry 7b9ed000

  629 14:37:31.758355             ss_start 7b9f4c00  code_end 7b9ed208

  630 14:37:31.758961  CPU 0x5

  631 14:37:31.761401      smbase 7b9e4c00  entry 7b9ecc00

  632 14:37:31.764722             ss_start 7b9f4800  code_end 7b9ece08

  633 14:37:31.767955  CPU 0x6

  634 14:37:31.771566      smbase 7b9e4800  entry 7b9ec800

  635 14:37:31.775004             ss_start 7b9f4400  code_end 7b9eca08

  636 14:37:31.775576  CPU 0x7

  637 14:37:31.781723      smbase 7b9e4400  entry 7b9ec400

  638 14:37:31.785241             ss_start 7b9f4000  code_end 7b9ec608

  639 14:37:31.792178  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  640 14:37:31.798538  Processing 11 relocs. Offset value of 0x7b9ee000

  641 14:37:31.805296  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  642 14:37:31.808651  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  643 14:37:31.815235  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  644 14:37:31.821903  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  645 14:37:31.829050  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  646 14:37:31.835336  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  647 14:37:31.842218  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  648 14:37:31.848537  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  649 14:37:31.855453  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  650 14:37:31.859113  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  651 14:37:31.865393  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  652 14:37:31.872060  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  653 14:37:31.878612  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  654 14:37:31.885719  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  655 14:37:31.892078  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  656 14:37:31.895879  smm_module_setup_stub: stack_top = 0x7b804000

  657 14:37:31.902477  smm_module_setup_stub: per cpu stack_size = 0x800

  658 14:37:31.905848  smm_module_setup_stub: runtime.start32_offset = 0x4c

  659 14:37:31.912227  smm_module_setup_stub: runtime.smm_size = 0x200000

  660 14:37:31.919252  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  661 14:37:31.922273  Clearing SMI status registers

  662 14:37:31.925950  SMI_STS: PM1 

  663 14:37:31.926519  PM1_STS: WAK PWRBTN 

  664 14:37:31.932062  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  665 14:37:31.935777  In relocation handler: CPU 0

  666 14:37:31.942190  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  667 14:37:31.945655  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  668 14:37:31.948922  Relocation complete.

  669 14:37:31.955496  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  670 14:37:31.959175  In relocation handler: CPU 6

  671 14:37:31.962381  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  672 14:37:31.965719  Relocation complete.

  673 14:37:31.972375  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  674 14:37:31.975614  In relocation handler: CPU 1

  675 14:37:31.979033  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  676 14:37:31.982518  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  677 14:37:31.985902  Relocation complete.

  678 14:37:31.992369  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  679 14:37:31.995518  In relocation handler: CPU 2

  680 14:37:31.999164  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  681 14:37:32.005835  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  682 14:37:32.006425  Relocation complete.

  683 14:37:32.012559  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  684 14:37:32.015394  In relocation handler: CPU 3

  685 14:37:32.018873  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  686 14:37:32.025519  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  687 14:37:32.028995  Relocation complete.

  688 14:37:32.035492  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  689 14:37:32.038905  In relocation handler: CPU 4

  690 14:37:32.042215  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  691 14:37:32.045669  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  692 14:37:32.048886  Relocation complete.

  693 14:37:32.055831  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  694 14:37:32.059084  In relocation handler: CPU 7

  695 14:37:32.062521  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  696 14:37:32.069070  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  697 14:37:32.069642  Relocation complete.

  698 14:37:32.075885  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  699 14:37:32.079394  In relocation handler: CPU 5

  700 14:37:32.085971  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  701 14:37:32.086599  Relocation complete.

  702 14:37:32.089000  Initializing CPU #0

  703 14:37:32.092365  CPU: vendor Intel device 906a4

  704 14:37:32.096219  CPU: family 06, model 9a, stepping 04

  705 14:37:32.099496  Clearing out pending MCEs

  706 14:37:32.102714  cpu: energy policy set to 7

  707 14:37:32.103288  Turbo is available but hidden

  708 14:37:32.105973  Turbo is available and visible

  709 14:37:32.112846  microcode: Update skipped, already up-to-date

  710 14:37:32.113412  CPU #0 initialized

  711 14:37:32.116160  Initializing CPU #6

  712 14:37:32.119402  Initializing CPU #1

  713 14:37:32.120062  Initializing CPU #4

  714 14:37:32.122689  Initializing CPU #3

  715 14:37:32.126069  CPU: vendor Intel device 906a4

  716 14:37:32.129644  CPU: family 06, model 9a, stepping 04

  717 14:37:32.132350  CPU: vendor Intel device 906a4

  718 14:37:32.135955  CPU: family 06, model 9a, stepping 04

  719 14:37:32.139775  Initializing CPU #2

  720 14:37:32.140344  Clearing out pending MCEs

  721 14:37:32.142430  Clearing out pending MCEs

  722 14:37:32.146206  Initializing CPU #7

  723 14:37:32.149463  CPU: vendor Intel device 906a4

  724 14:37:32.153230  CPU: family 06, model 9a, stepping 04

  725 14:37:32.155629  CPU: vendor Intel device 906a4

  726 14:37:32.159436  CPU: family 06, model 9a, stepping 04

  727 14:37:32.162386  CPU: vendor Intel device 906a4

  728 14:37:32.165739  CPU: family 06, model 9a, stepping 04

  729 14:37:32.168938  Clearing out pending MCEs

  730 14:37:32.172420  cpu: energy policy set to 7

  731 14:37:32.172892  cpu: energy policy set to 7

  732 14:37:32.175752  cpu: energy policy set to 7

  733 14:37:32.179390  Clearing out pending MCEs

  734 14:37:32.185702  microcode: Update skipped, already up-to-date

  735 14:37:32.186274  CPU #4 initialized

  736 14:37:32.189220  microcode: Update skipped, already up-to-date

  737 14:37:32.192747  CPU #3 initialized

  738 14:37:32.195891  CPU: vendor Intel device 906a4

  739 14:37:32.199499  CPU: family 06, model 9a, stepping 04

  740 14:37:32.202731  cpu: energy policy set to 7

  741 14:37:32.205833  microcode: Update skipped, already up-to-date

  742 14:37:32.209884  CPU #1 initialized

  743 14:37:32.212574  microcode: Update skipped, already up-to-date

  744 14:37:32.216388  CPU #2 initialized

  745 14:37:32.219763  Clearing out pending MCEs

  746 14:37:32.220345  Initializing CPU #5

  747 14:37:32.222869  Clearing out pending MCEs

  748 14:37:32.226162  CPU: vendor Intel device 906a4

  749 14:37:32.229522  CPU: family 06, model 9a, stepping 04

  750 14:37:32.232600  cpu: energy policy set to 7

  751 14:37:32.236513  Clearing out pending MCEs

  752 14:37:32.239925  microcode: Update skipped, already up-to-date

  753 14:37:32.243234  CPU #7 initialized

  754 14:37:32.243806  cpu: energy policy set to 7

  755 14:37:32.246200  cpu: energy policy set to 7

  756 14:37:32.253107  microcode: Update skipped, already up-to-date

  757 14:37:32.253677  CPU #5 initialized

  758 14:37:32.259962  microcode: Update skipped, already up-to-date

  759 14:37:32.260544  CPU #6 initialized

  760 14:37:32.262913  bsp_do_flight_plan done after 719 msecs.

  761 14:37:32.266691  CPU: frequency set to 4400 MHz

  762 14:37:32.270186  Enabling SMIs.

  763 14:37:32.276325  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms

  764 14:37:32.291904  Probing TPM I2C: done! DID_VID 0x00281ae0

  765 14:37:32.295132  Locality already claimed

  766 14:37:32.298473  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  767 14:37:32.309802  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  768 14:37:32.313561  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  769 14:37:32.319995  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  770 14:37:32.326679  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  771 14:37:32.330072  Found a VBT of 9216 bytes after decompression

  772 14:37:32.333504  PCI  1.0, PIN A, using IRQ #16

  773 14:37:32.336914  PCI  2.0, PIN A, using IRQ #17

  774 14:37:32.340347  PCI  4.0, PIN A, using IRQ #18

  775 14:37:32.343187  PCI  5.0, PIN A, using IRQ #16

  776 14:37:32.346853  PCI  6.0, PIN A, using IRQ #16

  777 14:37:32.350214  PCI  6.2, PIN C, using IRQ #18

  778 14:37:32.353598  PCI  7.0, PIN A, using IRQ #19

  779 14:37:32.357848  PCI  7.1, PIN B, using IRQ #20

  780 14:37:32.360413  PCI  7.2, PIN C, using IRQ #21

  781 14:37:32.363490  PCI  7.3, PIN D, using IRQ #22

  782 14:37:32.366824  PCI  8.0, PIN A, using IRQ #23

  783 14:37:32.367390  PCI  D.0, PIN A, using IRQ #17

  784 14:37:32.370241  PCI  D.1, PIN B, using IRQ #19

  785 14:37:32.373760  PCI 10.0, PIN A, using IRQ #24

  786 14:37:32.377056  PCI 10.1, PIN B, using IRQ #25

  787 14:37:32.380470  PCI 10.6, PIN C, using IRQ #20

  788 14:37:32.383518  PCI 10.7, PIN D, using IRQ #21

  789 14:37:32.387326  PCI 11.0, PIN A, using IRQ #26

  790 14:37:32.390069  PCI 11.1, PIN B, using IRQ #27

  791 14:37:32.393734  PCI 11.2, PIN C, using IRQ #28

  792 14:37:32.397067  PCI 11.3, PIN D, using IRQ #29

  793 14:37:32.400108  PCI 12.0, PIN A, using IRQ #30

  794 14:37:32.404048  PCI 12.6, PIN B, using IRQ #31

  795 14:37:32.407047  PCI 12.7, PIN C, using IRQ #22

  796 14:37:32.410517  PCI 13.0, PIN A, using IRQ #32

  797 14:37:32.413843  PCI 13.1, PIN B, using IRQ #33

  798 14:37:32.414430  PCI 13.2, PIN C, using IRQ #34

  799 14:37:32.417187  PCI 13.3, PIN D, using IRQ #35

  800 14:37:32.421061  PCI 14.0, PIN B, using IRQ #23

  801 14:37:32.423419  PCI 14.1, PIN A, using IRQ #36

  802 14:37:32.426890  PCI 14.3, PIN C, using IRQ #17

  803 14:37:32.430723  PCI 15.0, PIN A, using IRQ #37

  804 14:37:32.434036  PCI 15.1, PIN B, using IRQ #38

  805 14:37:32.437267  PCI 15.2, PIN C, using IRQ #39

  806 14:37:32.440551  PCI 15.3, PIN D, using IRQ #40

  807 14:37:32.444241  PCI 16.0, PIN A, using IRQ #18

  808 14:37:32.447112  PCI 16.1, PIN B, using IRQ #19

  809 14:37:32.450429  PCI 16.2, PIN C, using IRQ #20

  810 14:37:32.453918  PCI 16.3, PIN D, using IRQ #21

  811 14:37:32.457427  PCI 16.4, PIN A, using IRQ #18

  812 14:37:32.460863  PCI 16.5, PIN B, using IRQ #19

  813 14:37:32.461432  PCI 17.0, PIN A, using IRQ #22

  814 14:37:32.464107  PCI 19.0, PIN A, using IRQ #41

  815 14:37:32.467312  PCI 19.1, PIN B, using IRQ #42

  816 14:37:32.470662  PCI 19.2, PIN C, using IRQ #43

  817 14:37:32.474204  PCI 1C.0, PIN A, using IRQ #16

  818 14:37:32.477644  PCI 1C.1, PIN B, using IRQ #17

  819 14:37:32.480942  PCI 1C.2, PIN C, using IRQ #18

  820 14:37:32.484200  PCI 1C.3, PIN D, using IRQ #19

  821 14:37:32.487311  PCI 1C.4, PIN A, using IRQ #16

  822 14:37:32.490842  PCI 1C.5, PIN B, using IRQ #17

  823 14:37:32.493982  PCI 1C.6, PIN C, using IRQ #18

  824 14:37:32.497959  PCI 1C.7, PIN D, using IRQ #19

  825 14:37:32.500973  PCI 1D.0, PIN A, using IRQ #16

  826 14:37:32.503938  PCI 1D.1, PIN B, using IRQ #17

  827 14:37:32.504411  PCI 1D.2, PIN C, using IRQ #18

  828 14:37:32.508503  PCI 1D.3, PIN D, using IRQ #19

  829 14:37:32.510949  PCI 1E.0, PIN A, using IRQ #23

  830 14:37:32.514266  PCI 1E.1, PIN B, using IRQ #20

  831 14:37:32.517632  PCI 1E.2, PIN C, using IRQ #44

  832 14:37:32.520906  PCI 1E.3, PIN D, using IRQ #45

  833 14:37:32.524337  PCI 1F.3, PIN B, using IRQ #22

  834 14:37:32.528097  PCI 1F.4, PIN C, using IRQ #23

  835 14:37:32.531055  PCI 1F.6, PIN D, using IRQ #20

  836 14:37:32.534124  PCI 1F.7, PIN A, using IRQ #21

  837 14:37:32.537844  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  838 14:37:32.547403  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  839 14:37:32.729316  FSPS returned 0

  840 14:37:32.732135  Executing Phase 1 of FspMultiPhaseSiInit

  841 14:37:32.742373  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  842 14:37:32.745350  port C0 DISC req: usage 1 usb3 1 usb2 1

  843 14:37:32.749223  Raw Buffer output 0 00000111

  844 14:37:32.752690  Raw Buffer output 1 00000000

  845 14:37:32.755985  pmc_send_ipc_cmd succeeded

  846 14:37:32.762533  port C1 DISC req: usage 1 usb3 3 usb2 3

  847 14:37:32.763142  Raw Buffer output 0 00000331

  848 14:37:32.765612  Raw Buffer output 1 00000000

  849 14:37:32.769460  pmc_send_ipc_cmd succeeded

  850 14:37:32.773969  Detected 6 core, 8 thread CPU.

  851 14:37:32.776814  Detected 6 core, 8 thread CPU.

  852 14:37:32.782246  Detected 6 core, 8 thread CPU.

  853 14:37:32.785500  Detected 6 core, 8 thread CPU.

  854 14:37:32.789205  Detected 6 core, 8 thread CPU.

  855 14:37:32.792193  Detected 6 core, 8 thread CPU.

  856 14:37:32.795550  Detected 6 core, 8 thread CPU.

  857 14:37:32.798980  Detected 6 core, 8 thread CPU.

  858 14:37:32.802426  Detected 6 core, 8 thread CPU.

  859 14:37:32.805790  Detected 6 core, 8 thread CPU.

  860 14:37:32.809176  Detected 6 core, 8 thread CPU.

  861 14:37:32.813126  Detected 6 core, 8 thread CPU.

  862 14:37:32.816203  Detected 6 core, 8 thread CPU.

  863 14:37:32.819606  Detected 6 core, 8 thread CPU.

  864 14:37:32.822361  Detected 6 core, 8 thread CPU.

  865 14:37:32.826410  Detected 6 core, 8 thread CPU.

  866 14:37:32.829259  Detected 6 core, 8 thread CPU.

  867 14:37:32.832624  Detected 6 core, 8 thread CPU.

  868 14:37:32.833096  Detected 6 core, 8 thread CPU.

  869 14:37:32.835727  Detected 6 core, 8 thread CPU.

  870 14:37:32.839959  Detected 6 core, 8 thread CPU.

  871 14:37:32.842375  Detected 6 core, 8 thread CPU.

  872 14:37:33.135664  Detected 6 core, 8 thread CPU.

  873 14:37:33.138981  Detected 6 core, 8 thread CPU.

  874 14:37:33.142331  Detected 6 core, 8 thread CPU.

  875 14:37:33.145726  Detected 6 core, 8 thread CPU.

  876 14:37:33.148898  Detected 6 core, 8 thread CPU.

  877 14:37:33.152629  Detected 6 core, 8 thread CPU.

  878 14:37:33.155297  Detected 6 core, 8 thread CPU.

  879 14:37:33.158786  Detected 6 core, 8 thread CPU.

  880 14:37:33.162383  Detected 6 core, 8 thread CPU.

  881 14:37:33.166162  Detected 6 core, 8 thread CPU.

  882 14:37:33.168873  Detected 6 core, 8 thread CPU.

  883 14:37:33.172605  Detected 6 core, 8 thread CPU.

  884 14:37:33.176023  Detected 6 core, 8 thread CPU.

  885 14:37:33.178933  Detected 6 core, 8 thread CPU.

  886 14:37:33.182443  Detected 6 core, 8 thread CPU.

  887 14:37:33.185862  Detected 6 core, 8 thread CPU.

  888 14:37:33.189316  Detected 6 core, 8 thread CPU.

  889 14:37:33.192034  Detected 6 core, 8 thread CPU.

  890 14:37:33.195825  Detected 6 core, 8 thread CPU.

  891 14:37:33.196385  Detected 6 core, 8 thread CPU.

  892 14:37:33.199921  Display FSP Version Info HOB

  893 14:37:33.202483  Reference Code - CPU = c.0.65.70

  894 14:37:33.206083  uCode Version = 0.0.4.23

  895 14:37:33.209458  TXT ACM version = ff.ff.ff.ffff

  896 14:37:33.212708  Reference Code - ME = c.0.65.70

  897 14:37:33.215995  MEBx version = 0.0.0.0

  898 14:37:33.219722  ME Firmware Version = Lite SKU

  899 14:37:33.222660  Reference Code - PCH = c.0.65.70

  900 14:37:33.223232  PCH-CRID Status = Disabled

  901 14:37:33.229179  PCH-CRID Original Value = ff.ff.ff.ffff

  902 14:37:33.233057  PCH-CRID New Value = ff.ff.ff.ffff

  903 14:37:33.236692  OPROM - RST - RAID = ff.ff.ff.ffff

  904 14:37:33.239549  PCH Hsio Version = 4.0.0.0

  905 14:37:33.242728  Reference Code - SA - System Agent = c.0.65.70

  906 14:37:33.246187  Reference Code - MRC = 0.0.3.80

  907 14:37:33.249526  SA - PCIe Version = c.0.65.70

  908 14:37:33.252936  SA-CRID Status = Disabled

  909 14:37:33.256387  SA-CRID Original Value = 0.0.0.4

  910 14:37:33.259828  SA-CRID New Value = 0.0.0.4

  911 14:37:33.260397  OPROM - VBIOS = ff.ff.ff.ffff

  912 14:37:33.266336  IO Manageability Engine FW Version = 24.0.4.0

  913 14:37:33.270068  PHY Build Version = 0.0.0.2016

  914 14:37:33.273479  Thunderbolt(TM) FW Version = 0.0.0.0

  915 14:37:33.279516  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  916 14:37:33.286126  BS: BS_DEV_INIT_CHIPS run times (exec / console): 495 / 507 ms

  917 14:37:33.286750  Enumerating buses...

  918 14:37:33.293263  Show all devs... Before device enumeration.

  919 14:37:33.293836  Root Device: enabled 1

  920 14:37:33.295843  CPU_CLUSTER: 0: enabled 1

  921 14:37:33.299793  DOMAIN: 0000: enabled 1

  922 14:37:33.300359  GPIO: 0: enabled 1

  923 14:37:33.303332  PCI: 00:00.0: enabled 1

  924 14:37:33.306358  PCI: 00:01.0: enabled 0

  925 14:37:33.309495  PCI: 00:01.1: enabled 0

  926 14:37:33.310062  PCI: 00:02.0: enabled 1

  927 14:37:33.312897  PCI: 00:04.0: enabled 1

  928 14:37:33.316088  PCI: 00:05.0: enabled 0

  929 14:37:33.319597  PCI: 00:06.0: enabled 1

  930 14:37:33.320165  PCI: 00:06.2: enabled 0

  931 14:37:33.323079  PCI: 00:07.0: enabled 0

  932 14:37:33.326616  PCI: 00:07.1: enabled 0

  933 14:37:33.327191  PCI: 00:07.2: enabled 0

  934 14:37:33.329801  PCI: 00:07.3: enabled 0

  935 14:37:33.333286  PCI: 00:08.0: enabled 0

  936 14:37:33.336358  PCI: 00:09.0: enabled 0

  937 14:37:33.336926  PCI: 00:0a.0: enabled 1

  938 14:37:33.339472  PCI: 00:0d.0: enabled 1

  939 14:37:33.343096  PCI: 00:0d.1: enabled 0

  940 14:37:33.346229  PCI: 00:0d.2: enabled 0

  941 14:37:33.346863  PCI: 00:0d.3: enabled 0

  942 14:37:33.349409  PCI: 00:0e.0: enabled 0

  943 14:37:33.352931  PCI: 00:10.0: enabled 0

  944 14:37:33.355977  PCI: 00:10.1: enabled 0

  945 14:37:33.356449  PCI: 00:10.6: enabled 0

  946 14:37:33.360108  PCI: 00:10.7: enabled 0

  947 14:37:33.363258  PCI: 00:12.0: enabled 0

  948 14:37:33.363725  PCI: 00:12.6: enabled 0

  949 14:37:33.366599  PCI: 00:12.7: enabled 0

  950 14:37:33.369505  PCI: 00:13.0: enabled 0

  951 14:37:33.373364  PCI: 00:14.0: enabled 1

  952 14:37:33.373932  PCI: 00:14.1: enabled 0

  953 14:37:33.376450  PCI: 00:14.2: enabled 1

  954 14:37:33.380163  PCI: 00:14.3: enabled 1

  955 14:37:33.383115  PCI: 00:15.0: enabled 1

  956 14:37:33.383693  PCI: 00:15.1: enabled 1

  957 14:37:33.386845  PCI: 00:15.2: enabled 0

  958 14:37:33.389947  PCI: 00:15.3: enabled 1

  959 14:37:33.390608  PCI: 00:16.0: enabled 1

  960 14:37:33.392984  PCI: 00:16.1: enabled 0

  961 14:37:33.396597  PCI: 00:16.2: enabled 0

  962 14:37:33.400242  PCI: 00:16.3: enabled 0

  963 14:37:33.400806  PCI: 00:16.4: enabled 0

  964 14:37:33.402923  PCI: 00:16.5: enabled 0

  965 14:37:33.406874  PCI: 00:17.0: enabled 1

  966 14:37:33.409969  PCI: 00:19.0: enabled 0

  967 14:37:33.410533  PCI: 00:19.1: enabled 1

  968 14:37:33.413546  PCI: 00:19.2: enabled 0

  969 14:37:33.416765  PCI: 00:1a.0: enabled 0

  970 14:37:33.420018  PCI: 00:1c.0: enabled 0

  971 14:37:33.420588  PCI: 00:1c.1: enabled 0

  972 14:37:33.422969  PCI: 00:1c.2: enabled 0

  973 14:37:33.427009  PCI: 00:1c.3: enabled 0

  974 14:37:33.427574  PCI: 00:1c.4: enabled 0

  975 14:37:33.430387  PCI: 00:1c.5: enabled 0

  976 14:37:33.433252  PCI: 00:1c.6: enabled 0

  977 14:37:33.436470  PCI: 00:1c.7: enabled 0

  978 14:37:33.437035  PCI: 00:1d.0: enabled 0

  979 14:37:33.439761  PCI: 00:1d.1: enabled 0

  980 14:37:33.443509  PCI: 00:1d.2: enabled 0

  981 14:37:33.446817  PCI: 00:1d.3: enabled 0

  982 14:37:33.447378  PCI: 00:1e.0: enabled 1

  983 14:37:33.450245  PCI: 00:1e.1: enabled 0

  984 14:37:33.453202  PCI: 00:1e.2: enabled 0

  985 14:37:33.453765  PCI: 00:1e.3: enabled 1

  986 14:37:33.456745  PCI: 00:1f.0: enabled 1

  987 14:37:33.459977  PCI: 00:1f.1: enabled 0

  988 14:37:33.463281  PCI: 00:1f.2: enabled 1

  989 14:37:33.463856  PCI: 00:1f.3: enabled 1

  990 14:37:33.466665  PCI: 00:1f.4: enabled 0

  991 14:37:33.470070  PCI: 00:1f.5: enabled 1

  992 14:37:33.473087  PCI: 00:1f.6: enabled 0

  993 14:37:33.473557  PCI: 00:1f.7: enabled 0

  994 14:37:33.476864  GENERIC: 0.0: enabled 1

  995 14:37:33.480066  GENERIC: 0.0: enabled 1

  996 14:37:33.483884  GENERIC: 1.0: enabled 1

  997 14:37:33.484474  GENERIC: 0.0: enabled 1

  998 14:37:33.486955  GENERIC: 1.0: enabled 1

  999 14:37:33.490411  USB0 port 0: enabled 1

 1000 14:37:33.491037  USB0 port 0: enabled 1

 1001 14:37:33.493343  GENERIC: 0.0: enabled 1

 1002 14:37:33.496603  I2C: 00:1a: enabled 1

 1003 14:37:33.497227  I2C: 00:31: enabled 1

 1004 14:37:33.500170  I2C: 00:32: enabled 1

 1005 14:37:33.503406  I2C: 00:50: enabled 1

 1006 14:37:33.503972  I2C: 00:10: enabled 1

 1007 14:37:33.507149  I2C: 00:15: enabled 1

 1008 14:37:33.510103  I2C: 00:2c: enabled 1

 1009 14:37:33.513439  GENERIC: 0.0: enabled 1

 1010 14:37:33.514055  SPI: 00: enabled 1

 1011 14:37:33.517187  PNP: 0c09.0: enabled 1

 1012 14:37:33.520346  GENERIC: 0.0: enabled 1

 1013 14:37:33.520917  USB3 port 0: enabled 1

 1014 14:37:33.523064  USB3 port 1: enabled 0

 1015 14:37:33.526661  USB3 port 2: enabled 1

 1016 14:37:33.527133  USB3 port 3: enabled 0

 1017 14:37:33.529834  USB2 port 0: enabled 1

 1018 14:37:33.533457  USB2 port 1: enabled 0

 1019 14:37:33.536719  USB2 port 2: enabled 1

 1020 14:37:33.537283  USB2 port 3: enabled 0

 1021 14:37:33.539808  USB2 port 4: enabled 0

 1022 14:37:33.543122  USB2 port 5: enabled 1

 1023 14:37:33.543590  USB2 port 6: enabled 0

 1024 14:37:33.546831  USB2 port 7: enabled 0

 1025 14:37:33.550089  USB2 port 8: enabled 1

 1026 14:37:33.550678  USB2 port 9: enabled 1

 1027 14:37:33.553370  USB3 port 0: enabled 1

 1028 14:37:33.556859  USB3 port 1: enabled 0

 1029 14:37:33.560316  USB3 port 2: enabled 0

 1030 14:37:33.560884  USB3 port 3: enabled 0

 1031 14:37:33.563479  GENERIC: 0.0: enabled 1

 1032 14:37:33.567223  GENERIC: 1.0: enabled 1

 1033 14:37:33.567785  APIC: 00: enabled 1

 1034 14:37:33.570052  APIC: 14: enabled 1

 1035 14:37:33.573461  APIC: 16: enabled 1

 1036 14:37:33.574020  APIC: 12: enabled 1

 1037 14:37:33.577047  APIC: 10: enabled 1

 1038 14:37:33.577616  APIC: 09: enabled 1

 1039 14:37:33.579961  APIC: 01: enabled 1

 1040 14:37:33.583482  APIC: 08: enabled 1

 1041 14:37:33.584043  Compare with tree...

 1042 14:37:33.586967  Root Device: enabled 1

 1043 14:37:33.590421   CPU_CLUSTER: 0: enabled 1

 1044 14:37:33.591035    APIC: 00: enabled 1

 1045 14:37:33.593755    APIC: 14: enabled 1

 1046 14:37:33.596590    APIC: 16: enabled 1

 1047 14:37:33.597114    APIC: 12: enabled 1

 1048 14:37:33.600418    APIC: 10: enabled 1

 1049 14:37:33.603527    APIC: 09: enabled 1

 1050 14:37:33.606970    APIC: 01: enabled 1

 1051 14:37:33.607538    APIC: 08: enabled 1

 1052 14:37:33.610049   DOMAIN: 0000: enabled 1

 1053 14:37:33.613885    GPIO: 0: enabled 1

 1054 14:37:33.614446    PCI: 00:00.0: enabled 1

 1055 14:37:33.616733    PCI: 00:01.0: enabled 0

 1056 14:37:33.619974    PCI: 00:01.1: enabled 0

 1057 14:37:33.623497    PCI: 00:02.0: enabled 1

 1058 14:37:33.626998    PCI: 00:04.0: enabled 1

 1059 14:37:33.627566     GENERIC: 0.0: enabled 1

 1060 14:37:33.630132    PCI: 00:05.0: enabled 0

 1061 14:37:33.633448    PCI: 00:06.0: enabled 1

 1062 14:37:33.637069    PCI: 00:06.2: enabled 0

 1063 14:37:33.640141    PCI: 00:08.0: enabled 0

 1064 14:37:33.640706    PCI: 00:09.0: enabled 0

 1065 14:37:33.643446    PCI: 00:0a.0: enabled 1

 1066 14:37:33.647261    PCI: 00:0d.0: enabled 1

 1067 14:37:33.650073     USB0 port 0: enabled 1

 1068 14:37:33.650675      USB3 port 0: enabled 1

 1069 14:37:33.653503      USB3 port 1: enabled 0

 1070 14:37:33.656926      USB3 port 2: enabled 1

 1071 14:37:33.660308      USB3 port 3: enabled 0

 1072 14:37:33.663589    PCI: 00:0d.1: enabled 0

 1073 14:37:33.667115    PCI: 00:0d.2: enabled 0

 1074 14:37:33.667677    PCI: 00:0d.3: enabled 0

 1075 14:37:33.670197    PCI: 00:0e.0: enabled 0

 1076 14:37:33.673689    PCI: 00:10.0: enabled 0

 1077 14:37:33.677096    PCI: 00:10.1: enabled 0

 1078 14:37:33.677662    PCI: 00:10.6: enabled 0

 1079 14:37:33.680146    PCI: 00:10.7: enabled 0

 1080 14:37:33.683462    PCI: 00:12.0: enabled 0

 1081 14:37:33.687157    PCI: 00:12.6: enabled 0

 1082 14:37:33.690339    PCI: 00:12.7: enabled 0

 1083 14:37:33.690943    PCI: 00:13.0: enabled 0

 1084 14:37:33.693441    PCI: 00:14.0: enabled 1

 1085 14:37:33.696991     USB0 port 0: enabled 1

 1086 14:37:33.700515      USB2 port 0: enabled 1

 1087 14:37:33.703873      USB2 port 1: enabled 0

 1088 14:37:33.704442      USB2 port 2: enabled 1

 1089 14:37:33.707027      USB2 port 3: enabled 0

 1090 14:37:33.710101      USB2 port 4: enabled 0

 1091 14:37:33.714112      USB2 port 5: enabled 1

 1092 14:37:33.717276      USB2 port 6: enabled 0

 1093 14:37:33.720312      USB2 port 7: enabled 0

 1094 14:37:33.720881      USB2 port 8: enabled 1

 1095 14:37:33.723440      USB2 port 9: enabled 1

 1096 14:37:33.727017      USB3 port 0: enabled 1

 1097 14:37:33.730290      USB3 port 1: enabled 0

 1098 14:37:33.733839      USB3 port 2: enabled 0

 1099 14:37:33.734310      USB3 port 3: enabled 0

 1100 14:37:33.736631    PCI: 00:14.1: enabled 0

 1101 14:37:33.740622    PCI: 00:14.2: enabled 1

 1102 14:37:33.743812    PCI: 00:14.3: enabled 1

 1103 14:37:33.746951     GENERIC: 0.0: enabled 1

 1104 14:37:33.747422    PCI: 00:15.0: enabled 1

 1105 14:37:33.750656     I2C: 00:1a: enabled 1

 1106 14:37:33.754047     I2C: 00:31: enabled 1

 1107 14:37:33.757083     I2C: 00:32: enabled 1

 1108 14:37:33.760542    PCI: 00:15.1: enabled 1

 1109 14:37:33.761103     I2C: 00:50: enabled 1

 1110 14:37:33.763763    PCI: 00:15.2: enabled 0

 1111 14:37:33.767252    PCI: 00:15.3: enabled 1

 1112 14:37:33.770594     I2C: 00:10: enabled 1

 1113 14:37:33.771459    PCI: 00:16.0: enabled 1

 1114 14:37:33.773697    PCI: 00:16.1: enabled 0

 1115 14:37:33.777159    PCI: 00:16.2: enabled 0

 1116 14:37:33.780703    PCI: 00:16.3: enabled 0

 1117 14:37:33.783435    PCI: 00:16.4: enabled 0

 1118 14:37:33.784003    PCI: 00:16.5: enabled 0

 1119 14:37:33.787306    PCI: 00:17.0: enabled 1

 1120 14:37:33.790471    PCI: 00:19.0: enabled 0

 1121 14:37:33.793693    PCI: 00:19.1: enabled 1

 1122 14:37:33.797001     I2C: 00:15: enabled 1

 1123 14:37:33.797562     I2C: 00:2c: enabled 1

 1124 14:37:33.800615    PCI: 00:19.2: enabled 0

 1125 14:37:33.803754    PCI: 00:1a.0: enabled 0

 1126 14:37:33.807172    PCI: 00:1e.0: enabled 1

 1127 14:37:33.807641    PCI: 00:1e.1: enabled 0

 1128 14:37:33.810888    PCI: 00:1e.2: enabled 0

 1129 14:37:33.813812    PCI: 00:1e.3: enabled 1

 1130 14:37:33.817173     SPI: 00: enabled 1

 1131 14:37:33.817734    PCI: 00:1f.0: enabled 1

 1132 14:37:33.820483     PNP: 0c09.0: enabled 1

 1133 14:37:33.823523    PCI: 00:1f.1: enabled 0

 1134 14:37:33.827484    PCI: 00:1f.2: enabled 1

 1135 14:37:33.830462     GENERIC: 0.0: enabled 1

 1136 14:37:33.830976      GENERIC: 0.0: enabled 1

 1137 14:37:33.833764      GENERIC: 1.0: enabled 1

 1138 14:37:33.837308    PCI: 00:1f.3: enabled 1

 1139 14:37:33.840798    PCI: 00:1f.4: enabled 0

 1140 14:37:33.843691    PCI: 00:1f.5: enabled 1

 1141 14:37:33.846849    PCI: 00:1f.6: enabled 0

 1142 14:37:33.847315    PCI: 00:1f.7: enabled 0

 1143 14:37:33.850503  Root Device scanning...

 1144 14:37:33.853736  scan_static_bus for Root Device

 1145 14:37:33.857373  CPU_CLUSTER: 0 enabled

 1146 14:37:33.857939  DOMAIN: 0000 enabled

 1147 14:37:33.860957  DOMAIN: 0000 scanning...

 1148 14:37:33.864121  PCI: pci_scan_bus for bus 00

 1149 14:37:33.867122  PCI: 00:00.0 [8086/0000] ops

 1150 14:37:33.870980  PCI: 00:00.0 [8086/4609] enabled

 1151 14:37:33.874426  PCI: 00:02.0 [8086/0000] bus ops

 1152 14:37:33.877533  PCI: 00:02.0 [8086/46b3] enabled

 1153 14:37:33.880621  PCI: 00:04.0 [8086/0000] bus ops

 1154 14:37:33.884444  PCI: 00:04.0 [8086/461d] enabled

 1155 14:37:33.887571  PCI: 00:06.0 [8086/0000] bus ops

 1156 14:37:33.890747  PCI: 00:06.0 [8086/464d] enabled

 1157 14:37:33.893862  PCI: 00:08.0 [8086/464f] disabled

 1158 14:37:33.897420  PCI: 00:0a.0 [8086/467d] enabled

 1159 14:37:33.900643  PCI: 00:0d.0 [8086/0000] bus ops

 1160 14:37:33.904076  PCI: 00:0d.0 [8086/461e] enabled

 1161 14:37:33.907436  PCI: 00:14.0 [8086/0000] bus ops

 1162 14:37:33.910536  PCI: 00:14.0 [8086/51ed] enabled

 1163 14:37:33.913927  PCI: 00:14.2 [8086/51ef] enabled

 1164 14:37:33.917435  PCI: 00:14.3 [8086/0000] bus ops

 1165 14:37:33.920462  PCI: 00:14.3 [8086/51f0] enabled

 1166 14:37:33.924395  PCI: 00:15.0 [8086/0000] bus ops

 1167 14:37:33.927257  PCI: 00:15.0 [8086/51e8] enabled

 1168 14:37:33.930926  PCI: 00:15.1 [8086/0000] bus ops

 1169 14:37:33.933735  PCI: 00:15.1 [8086/51e9] enabled

 1170 14:37:33.937185  PCI: 00:15.2 [8086/0000] bus ops

 1171 14:37:33.940576  PCI: 00:15.2 [8086/51ea] disabled

 1172 14:37:33.943694  PCI: 00:15.3 [8086/0000] bus ops

 1173 14:37:33.947682  PCI: 00:15.3 [8086/51eb] enabled

 1174 14:37:33.950761  PCI: 00:16.0 [8086/0000] ops

 1175 14:37:33.953996  PCI: 00:16.0 [8086/51e0] enabled

 1176 14:37:33.960750  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1177 14:37:33.963976  PCI: 00:19.0 [8086/0000] bus ops

 1178 14:37:33.967497  PCI: 00:19.0 [8086/51c5] disabled

 1179 14:37:33.970479  PCI: 00:19.1 [8086/0000] bus ops

 1180 14:37:33.973615  PCI: 00:19.1 [8086/51c6] enabled

 1181 14:37:33.977187  PCI: 00:1e.0 [8086/0000] ops

 1182 14:37:33.980693  PCI: 00:1e.0 [8086/51a8] enabled

 1183 14:37:33.984061  PCI: 00:1e.3 [8086/0000] bus ops

 1184 14:37:33.987295  PCI: 00:1e.3 [8086/51ab] enabled

 1185 14:37:33.991036  PCI: 00:1f.0 [8086/0000] bus ops

 1186 14:37:33.994072  PCI: 00:1f.0 [8086/5182] enabled

 1187 14:37:33.994664  RTC Init

 1188 14:37:33.997496  Set power on after power failure.

 1189 14:37:34.000852  Disabling Deep S3

 1190 14:37:34.004080  Disabling Deep S3

 1191 14:37:34.004636  Disabling Deep S4

 1192 14:37:34.007816  Disabling Deep S4

 1193 14:37:34.008378  Disabling Deep S5

 1194 14:37:34.010810  Disabling Deep S5

 1195 14:37:34.014493  PCI: 00:1f.2 [0000/0000] hidden

 1196 14:37:34.017874  PCI: 00:1f.3 [8086/0000] bus ops

 1197 14:37:34.020997  PCI: 00:1f.3 [8086/51c8] enabled

 1198 14:37:34.024588  PCI: 00:1f.5 [8086/0000] bus ops

 1199 14:37:34.027612  PCI: 00:1f.5 [8086/51a4] enabled

 1200 14:37:34.028175  GPIO: 0 enabled

 1201 14:37:34.031240  PCI: Leftover static devices:

 1202 14:37:34.034302  PCI: 00:01.0

 1203 14:37:34.034825  PCI: 00:01.1

 1204 14:37:34.035198  PCI: 00:05.0

 1205 14:37:34.037397  PCI: 00:06.2

 1206 14:37:34.037860  PCI: 00:09.0

 1207 14:37:34.041257  PCI: 00:0d.1

 1208 14:37:34.041816  PCI: 00:0d.2

 1209 14:37:34.042182  PCI: 00:0d.3

 1210 14:37:34.044776  PCI: 00:0e.0

 1211 14:37:34.045338  PCI: 00:10.0

 1212 14:37:34.047818  PCI: 00:10.1

 1213 14:37:34.048380  PCI: 00:10.6

 1214 14:37:34.051004  PCI: 00:10.7

 1215 14:37:34.051470  PCI: 00:12.0

 1216 14:37:34.051831  PCI: 00:12.6

 1217 14:37:34.054041  PCI: 00:12.7

 1218 14:37:34.054504  PCI: 00:13.0

 1219 14:37:34.057776  PCI: 00:14.1

 1220 14:37:34.058335  PCI: 00:16.1

 1221 14:37:34.058779  PCI: 00:16.2

 1222 14:37:34.060990  PCI: 00:16.3

 1223 14:37:34.061545  PCI: 00:16.4

 1224 14:37:34.064169  PCI: 00:16.5

 1225 14:37:34.064729  PCI: 00:17.0

 1226 14:37:34.065099  PCI: 00:19.2

 1227 14:37:34.067692  PCI: 00:1a.0

 1228 14:37:34.068255  PCI: 00:1e.1

 1229 14:37:34.070801  PCI: 00:1e.2

 1230 14:37:34.071345  PCI: 00:1f.1

 1231 14:37:34.071965  PCI: 00:1f.4

 1232 14:37:34.074021  PCI: 00:1f.6

 1233 14:37:34.074485  PCI: 00:1f.7

 1234 14:37:34.077791  PCI: Check your devicetree.cb.

 1235 14:37:34.081109  PCI: 00:02.0 scanning...

 1236 14:37:34.084812  scan_generic_bus for PCI: 00:02.0

 1237 14:37:34.087736  scan_generic_bus for PCI: 00:02.0 done

 1238 14:37:34.094333  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1239 14:37:34.094848  PCI: 00:04.0 scanning...

 1240 14:37:34.098090  scan_generic_bus for PCI: 00:04.0

 1241 14:37:34.101330  GENERIC: 0.0 enabled

 1242 14:37:34.108280  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1243 14:37:34.111219  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1244 14:37:34.114760  PCI: 00:06.0 scanning...

 1245 14:37:34.117829  do_pci_scan_bridge for PCI: 00:06.0

 1246 14:37:34.121435  PCI: pci_scan_bus for bus 01

 1247 14:37:34.124961  PCI: 01:00.0 [15b7/5009] enabled

 1248 14:37:34.128049  Enabling Common Clock Configuration

 1249 14:37:34.131333  L1 Sub-State supported from root port 6

 1250 14:37:34.134609  L1 Sub-State Support = 0x5

 1251 14:37:34.137753  CommonModeRestoreTime = 0x6e

 1252 14:37:34.141623  Power On Value = 0x5, Power On Scale = 0x2

 1253 14:37:34.144641  ASPM: Enabled L1

 1254 14:37:34.148065  PCIe: Max_Payload_Size adjusted to 256

 1255 14:37:34.151176  PCI: 01:00.0: Enabled LTR

 1256 14:37:34.155154  PCI: 01:00.0: Programmed LTR max latencies

 1257 14:37:34.157989  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1258 14:37:34.161653  PCI: 00:0d.0 scanning...

 1259 14:37:34.164782  scan_static_bus for PCI: 00:0d.0

 1260 14:37:34.168105  USB0 port 0 enabled

 1261 14:37:34.171339  USB0 port 0 scanning...

 1262 14:37:34.174679  scan_static_bus for USB0 port 0

 1263 14:37:34.175145  USB3 port 0 enabled

 1264 14:37:34.178271  USB3 port 1 disabled

 1265 14:37:34.178882  USB3 port 2 enabled

 1266 14:37:34.181395  USB3 port 3 disabled

 1267 14:37:34.184583  USB3 port 0 scanning...

 1268 14:37:34.188142  scan_static_bus for USB3 port 0

 1269 14:37:34.191500  scan_static_bus for USB3 port 0 done

 1270 14:37:34.194708  scan_bus: bus USB3 port 0 finished in 6 msecs

 1271 14:37:34.198286  USB3 port 2 scanning...

 1272 14:37:34.201818  scan_static_bus for USB3 port 2

 1273 14:37:34.205243  scan_static_bus for USB3 port 2 done

 1274 14:37:34.208466  scan_bus: bus USB3 port 2 finished in 6 msecs

 1275 14:37:34.211876  scan_static_bus for USB0 port 0 done

 1276 14:37:34.218537  scan_bus: bus USB0 port 0 finished in 43 msecs

 1277 14:37:34.221884  scan_static_bus for PCI: 00:0d.0 done

 1278 14:37:34.225327  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1279 14:37:34.228139  PCI: 00:14.0 scanning...

 1280 14:37:34.231921  scan_static_bus for PCI: 00:14.0

 1281 14:37:34.235200  USB0 port 0 enabled

 1282 14:37:34.238360  USB0 port 0 scanning...

 1283 14:37:34.238854  scan_static_bus for USB0 port 0

 1284 14:37:34.241779  USB2 port 0 enabled

 1285 14:37:34.245337  USB2 port 1 disabled

 1286 14:37:34.245900  USB2 port 2 enabled

 1287 14:37:34.248833  USB2 port 3 disabled

 1288 14:37:34.251632  USB2 port 4 disabled

 1289 14:37:34.252098  USB2 port 5 enabled

 1290 14:37:34.255090  USB2 port 6 disabled

 1291 14:37:34.258179  USB2 port 7 disabled

 1292 14:37:34.258673  USB2 port 8 enabled

 1293 14:37:34.261876  USB2 port 9 enabled

 1294 14:37:34.262338  USB3 port 0 enabled

 1295 14:37:34.265010  USB3 port 1 disabled

 1296 14:37:34.268527  USB3 port 2 disabled

 1297 14:37:34.269092  USB3 port 3 disabled

 1298 14:37:34.271720  USB2 port 0 scanning...

 1299 14:37:34.274886  scan_static_bus for USB2 port 0

 1300 14:37:34.278407  scan_static_bus for USB2 port 0 done

 1301 14:37:34.282263  scan_bus: bus USB2 port 0 finished in 6 msecs

 1302 14:37:34.285315  USB2 port 2 scanning...

 1303 14:37:34.288809  scan_static_bus for USB2 port 2

 1304 14:37:34.292207  scan_static_bus for USB2 port 2 done

 1305 14:37:34.298730  scan_bus: bus USB2 port 2 finished in 6 msecs

 1306 14:37:34.299300  USB2 port 5 scanning...

 1307 14:37:34.301934  scan_static_bus for USB2 port 5

 1308 14:37:34.305128  scan_static_bus for USB2 port 5 done

 1309 14:37:34.311909  scan_bus: bus USB2 port 5 finished in 6 msecs

 1310 14:37:34.315329  USB2 port 8 scanning...

 1311 14:37:34.319250  scan_static_bus for USB2 port 8

 1312 14:37:34.322180  scan_static_bus for USB2 port 8 done

 1313 14:37:34.325439  scan_bus: bus USB2 port 8 finished in 6 msecs

 1314 14:37:34.328850  USB2 port 9 scanning...

 1315 14:37:34.332264  scan_static_bus for USB2 port 9

 1316 14:37:34.335133  scan_static_bus for USB2 port 9 done

 1317 14:37:34.338797  scan_bus: bus USB2 port 9 finished in 6 msecs

 1318 14:37:34.341897  USB3 port 0 scanning...

 1319 14:37:34.345674  scan_static_bus for USB3 port 0

 1320 14:37:34.348920  scan_static_bus for USB3 port 0 done

 1321 14:37:34.351936  scan_bus: bus USB3 port 0 finished in 6 msecs

 1322 14:37:34.355387  scan_static_bus for USB0 port 0 done

 1323 14:37:34.362143  scan_bus: bus USB0 port 0 finished in 120 msecs

 1324 14:37:34.365282  scan_static_bus for PCI: 00:14.0 done

 1325 14:37:34.372160  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1326 14:37:34.372806  PCI: 00:14.3 scanning...

 1327 14:37:34.375690  scan_static_bus for PCI: 00:14.3

 1328 14:37:34.378999  GENERIC: 0.0 enabled

 1329 14:37:34.381964  scan_static_bus for PCI: 00:14.3 done

 1330 14:37:34.385237  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1331 14:37:34.388606  PCI: 00:15.0 scanning...

 1332 14:37:34.391930  scan_static_bus for PCI: 00:15.0

 1333 14:37:34.395441  I2C: 00:1a enabled

 1334 14:37:34.395902  I2C: 00:31 enabled

 1335 14:37:34.398655  I2C: 00:32 enabled

 1336 14:37:34.402027  scan_static_bus for PCI: 00:15.0 done

 1337 14:37:34.409176  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

 1338 14:37:34.409739  PCI: 00:15.1 scanning...

 1339 14:37:34.412167  scan_static_bus for PCI: 00:15.1

 1340 14:37:34.415544  I2C: 00:50 enabled

 1341 14:37:34.419002  scan_static_bus for PCI: 00:15.1 done

 1342 14:37:34.422704  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1343 14:37:34.425512  PCI: 00:15.3 scanning...

 1344 14:37:34.429286  scan_static_bus for PCI: 00:15.3

 1345 14:37:34.432015  I2C: 00:10 enabled

 1346 14:37:34.435735  scan_static_bus for PCI: 00:15.3 done

 1347 14:37:34.438738  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1348 14:37:34.442297  PCI: 00:19.1 scanning...

 1349 14:37:34.445909  scan_static_bus for PCI: 00:19.1

 1350 14:37:34.449212  I2C: 00:15 enabled

 1351 14:37:34.449774  I2C: 00:2c enabled

 1352 14:37:34.452192  scan_static_bus for PCI: 00:19.1 done

 1353 14:37:34.458963  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1354 14:37:34.462663  PCI: 00:1e.3 scanning...

 1355 14:37:34.465952  scan_generic_bus for PCI: 00:1e.3

 1356 14:37:34.466511  SPI: 00 enabled

 1357 14:37:34.472300  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1358 14:37:34.475710  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1359 14:37:34.479217  PCI: 00:1f.0 scanning...

 1360 14:37:34.482746  scan_static_bus for PCI: 00:1f.0

 1361 14:37:34.485990  PNP: 0c09.0 enabled

 1362 14:37:34.486583  PNP: 0c09.0 scanning...

 1363 14:37:34.489378  scan_static_bus for PNP: 0c09.0

 1364 14:37:34.492794  scan_static_bus for PNP: 0c09.0 done

 1365 14:37:34.499305  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1366 14:37:34.502805  scan_static_bus for PCI: 00:1f.0 done

 1367 14:37:34.506044  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1368 14:37:34.509175  PCI: 00:1f.2 scanning...

 1369 14:37:34.512738  scan_static_bus for PCI: 00:1f.2

 1370 14:37:34.516159  GENERIC: 0.0 enabled

 1371 14:37:34.519333  GENERIC: 0.0 scanning...

 1372 14:37:34.522778  scan_static_bus for GENERIC: 0.0

 1373 14:37:34.523346  GENERIC: 0.0 enabled

 1374 14:37:34.526294  GENERIC: 1.0 enabled

 1375 14:37:34.529404  scan_static_bus for GENERIC: 0.0 done

 1376 14:37:34.532837  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1377 14:37:34.538994  scan_static_bus for PCI: 00:1f.2 done

 1378 14:37:34.542217  scan_bus: bus PCI: 00:1f.2 finished in 27 msecs

 1379 14:37:34.546118  PCI: 00:1f.3 scanning...

 1380 14:37:34.549214  scan_static_bus for PCI: 00:1f.3

 1381 14:37:34.552446  scan_static_bus for PCI: 00:1f.3 done

 1382 14:37:34.555895  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1383 14:37:34.558996  PCI: 00:1f.5 scanning...

 1384 14:37:34.562420  scan_generic_bus for PCI: 00:1f.5

 1385 14:37:34.565785  scan_generic_bus for PCI: 00:1f.5 done

 1386 14:37:34.572480  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1387 14:37:34.576033  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1388 14:37:34.579018  scan_static_bus for Root Device done

 1389 14:37:34.585924  scan_bus: bus Root Device finished in 729 msecs

 1390 14:37:34.586512  done

 1391 14:37:34.592468  BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms

 1392 14:37:34.595632  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1393 14:37:34.602772  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1394 14:37:34.605966  SPI flash protection: WPSW=1 SRP0=0

 1395 14:37:34.612445  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1396 14:37:34.619414  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1397 14:37:34.619980  found VGA at PCI: 00:02.0

 1398 14:37:34.622713  Setting up VGA for PCI: 00:02.0

 1399 14:37:34.629353  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1400 14:37:34.633127  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1401 14:37:34.635798  Allocating resources...

 1402 14:37:34.639135  Reading resources...

 1403 14:37:34.642519  Root Device read_resources bus 0 link: 0

 1404 14:37:34.646087  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1405 14:37:34.652577  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1406 14:37:34.656287  DOMAIN: 0000 read_resources bus 0 link: 0

 1407 14:37:34.663166  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1408 14:37:34.669880  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1409 14:37:34.672377  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1410 14:37:34.679511  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1411 14:37:34.686148  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1412 14:37:34.692754  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1413 14:37:34.699489  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1414 14:37:34.706363  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1415 14:37:34.713235  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1416 14:37:34.719523  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1417 14:37:34.726277  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1418 14:37:34.732969  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1419 14:37:34.739416  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1420 14:37:34.743188  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1421 14:37:34.750093  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1422 14:37:34.756902  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1423 14:37:34.763482  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1424 14:37:34.770197  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1425 14:37:34.776860  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1426 14:37:34.783328  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1427 14:37:34.786389  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1428 14:37:34.793649  PCI: 00:04.0 read_resources bus 1 link: 0

 1429 14:37:34.796620  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1430 14:37:34.800283  PCI: 00:06.0 read_resources bus 1 link: 0

 1431 14:37:34.807032  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1432 14:37:34.810043  PCI: 00:0d.0 read_resources bus 0 link: 0

 1433 14:37:34.813480  USB0 port 0 read_resources bus 0 link: 0

 1434 14:37:34.820335  USB0 port 0 read_resources bus 0 link: 0 done

 1435 14:37:34.823506  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1436 14:37:34.826703  PCI: 00:14.0 read_resources bus 0 link: 0

 1437 14:37:34.833578  USB0 port 0 read_resources bus 0 link: 0

 1438 14:37:34.837319  USB0 port 0 read_resources bus 0 link: 0 done

 1439 14:37:34.840096  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1440 14:37:34.846987  PCI: 00:14.3 read_resources bus 0 link: 0

 1441 14:37:34.850232  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1442 14:37:34.853567  PCI: 00:15.0 read_resources bus 0 link: 0

 1443 14:37:34.860719  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1444 14:37:34.864036  PCI: 00:15.1 read_resources bus 0 link: 0

 1445 14:37:34.867067  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1446 14:37:34.873431  PCI: 00:15.3 read_resources bus 0 link: 0

 1447 14:37:34.877161  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1448 14:37:34.880690  PCI: 00:19.1 read_resources bus 0 link: 0

 1449 14:37:34.887119  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1450 14:37:34.890622  PCI: 00:1e.3 read_resources bus 2 link: 0

 1451 14:37:34.897002  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1452 14:37:34.900236  PCI: 00:1f.0 read_resources bus 0 link: 0

 1453 14:37:34.903755  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1454 14:37:34.910717  PCI: 00:1f.2 read_resources bus 0 link: 0

 1455 14:37:34.913755  GENERIC: 0.0 read_resources bus 0 link: 0

 1456 14:37:34.917397  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1457 14:37:34.924220  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1458 14:37:34.927265  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1459 14:37:34.931164  Root Device read_resources bus 0 link: 0 done

 1460 14:37:34.934052  Done reading resources.

 1461 14:37:34.940731  Show resources in subtree (Root Device)...After reading.

 1462 14:37:34.943864   Root Device child on link 0 CPU_CLUSTER: 0

 1463 14:37:34.947337    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1464 14:37:34.950949     APIC: 00

 1465 14:37:34.951508     APIC: 14

 1466 14:37:34.954224     APIC: 16

 1467 14:37:34.954847     APIC: 12

 1468 14:37:34.955223     APIC: 10

 1469 14:37:34.957465     APIC: 09

 1470 14:37:34.958052     APIC: 01

 1471 14:37:34.960573     APIC: 08

 1472 14:37:34.963991    DOMAIN: 0000 child on link 0 GPIO: 0

 1473 14:37:34.974231    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1474 14:37:34.980702    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1475 14:37:34.983848     GPIO: 0

 1476 14:37:34.984309     PCI: 00:00.0

 1477 14:37:34.994092     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1478 14:37:35.004175     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1479 14:37:35.014349     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1480 14:37:35.021076     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1481 14:37:35.031075     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1482 14:37:35.040774     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1483 14:37:35.050671     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1484 14:37:35.061437     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1485 14:37:35.071061     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1486 14:37:35.081076     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1487 14:37:35.087558     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1488 14:37:35.097831     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1489 14:37:35.108030     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1490 14:37:35.118357     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1491 14:37:35.125019     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1492 14:37:35.135432     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1493 14:37:35.144910     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1494 14:37:35.155206     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1495 14:37:35.164957     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1496 14:37:35.174603     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1497 14:37:35.184781     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1498 14:37:35.191384     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1499 14:37:35.201523     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1500 14:37:35.211525     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1501 14:37:35.221938     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1502 14:37:35.231780     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1503 14:37:35.241591     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1504 14:37:35.251843     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1505 14:37:35.252404     PCI: 00:02.0

 1506 14:37:35.262098     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1507 14:37:35.272069     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1508 14:37:35.282235     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1509 14:37:35.285833     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1510 14:37:35.295675     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1511 14:37:35.298725      GENERIC: 0.0

 1512 14:37:35.302026     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1513 14:37:35.312746     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1514 14:37:35.319173     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1515 14:37:35.329401     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1516 14:37:35.332611      PCI: 01:00.0

 1517 14:37:35.342217      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1518 14:37:35.351944      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1519 14:37:35.352505     PCI: 00:08.0

 1520 14:37:35.355950     PCI: 00:0a.0

 1521 14:37:35.365764     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1522 14:37:35.369192     PCI: 00:0d.0 child on link 0 USB0 port 0

 1523 14:37:35.378963     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1524 14:37:35.382812      USB0 port 0 child on link 0 USB3 port 0

 1525 14:37:35.385672       USB3 port 0

 1526 14:37:35.386228       USB3 port 1

 1527 14:37:35.389222       USB3 port 2

 1528 14:37:35.389777       USB3 port 3

 1529 14:37:35.395915     PCI: 00:14.0 child on link 0 USB0 port 0

 1530 14:37:35.405595     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1531 14:37:35.409099      USB0 port 0 child on link 0 USB2 port 0

 1532 14:37:35.412353       USB2 port 0

 1533 14:37:35.412913       USB2 port 1

 1534 14:37:35.415710       USB2 port 2

 1535 14:37:35.416268       USB2 port 3

 1536 14:37:35.419089       USB2 port 4

 1537 14:37:35.419552       USB2 port 5

 1538 14:37:35.422705       USB2 port 6

 1539 14:37:35.423274       USB2 port 7

 1540 14:37:35.425800       USB2 port 8

 1541 14:37:35.426507       USB2 port 9

 1542 14:37:35.429065       USB3 port 0

 1543 14:37:35.429622       USB3 port 1

 1544 14:37:35.432842       USB3 port 2

 1545 14:37:35.433405       USB3 port 3

 1546 14:37:35.435730     PCI: 00:14.2

 1547 14:37:35.445721     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1548 14:37:35.455747     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1549 14:37:35.459248     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1550 14:37:35.469308     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1551 14:37:35.472823      GENERIC: 0.0

 1552 14:37:35.476029     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1553 14:37:35.486049     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1554 14:37:35.486675      I2C: 00:1a

 1555 14:37:35.489176      I2C: 00:31

 1556 14:37:35.489747      I2C: 00:32

 1557 14:37:35.496107     PCI: 00:15.1 child on link 0 I2C: 00:50

 1558 14:37:35.506279     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1559 14:37:35.506910      I2C: 00:50

 1560 14:37:35.509398     PCI: 00:15.2

 1561 14:37:35.512724     PCI: 00:15.3 child on link 0 I2C: 00:10

 1562 14:37:35.522851     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1563 14:37:35.523426      I2C: 00:10

 1564 14:37:35.526245     PCI: 00:16.0

 1565 14:37:35.536368     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1566 14:37:35.536945     PCI: 00:19.0

 1567 14:37:35.542525     PCI: 00:19.1 child on link 0 I2C: 00:15

 1568 14:37:35.552884     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1569 14:37:35.553458      I2C: 00:15

 1570 14:37:35.556158      I2C: 00:2c

 1571 14:37:35.556727     PCI: 00:1e.0

 1572 14:37:35.566207     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1573 14:37:35.573057     PCI: 00:1e.3 child on link 0 SPI: 00

 1574 14:37:35.582739     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1575 14:37:35.583323      SPI: 00

 1576 14:37:35.586400     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1577 14:37:35.596498     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1578 14:37:35.597079      PNP: 0c09.0

 1579 14:37:35.606908      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1580 14:37:35.610128     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1581 14:37:35.619892     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1582 14:37:35.629856     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1583 14:37:35.633211      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1584 14:37:35.636480       GENERIC: 0.0

 1585 14:37:35.636968       GENERIC: 1.0

 1586 14:37:35.640472     PCI: 00:1f.3

 1587 14:37:35.650216     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1588 14:37:35.659746     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1589 14:37:35.660316     PCI: 00:1f.5

 1590 14:37:35.670375     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1591 14:37:35.676824  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1592 14:37:35.683333   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1593 14:37:35.690380   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1594 14:37:35.696975   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1595 14:37:35.700229    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1596 14:37:35.703433    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1597 14:37:35.710012   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1598 14:37:35.717078   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1599 14:37:35.727054   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1600 14:37:35.733799  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1601 14:37:35.740513  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1602 14:37:35.746935   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1603 14:37:35.754037   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1604 14:37:35.760795   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1605 14:37:35.763927   DOMAIN: 0000: Resource ranges:

 1606 14:37:35.767203   * Base: 1000, Size: 800, Tag: 100

 1607 14:37:35.774126   * Base: 1900, Size: e700, Tag: 100

 1608 14:37:35.777735    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1609 14:37:35.784204  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1610 14:37:35.790766  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1611 14:37:35.800684   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1612 14:37:35.807401   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1613 14:37:35.814112   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1614 14:37:35.820520   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1615 14:37:35.830931   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1616 14:37:35.837712   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1617 14:37:35.844241   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1618 14:37:35.854423   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1619 14:37:35.860769   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1620 14:37:35.867799   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1621 14:37:35.877912   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1622 14:37:35.884276   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1623 14:37:35.891015   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1624 14:37:35.897921   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1625 14:37:35.908229   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1626 14:37:35.914764   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1627 14:37:35.921456   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1628 14:37:35.931291   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1629 14:37:35.937846   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1630 14:37:35.944596   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1631 14:37:35.954845   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1632 14:37:35.961324   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1633 14:37:35.968199   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1634 14:37:35.974996   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1635 14:37:35.984896   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1636 14:37:35.991837   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1637 14:37:35.998636   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1638 14:37:36.008806   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1639 14:37:36.015205   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1640 14:37:36.021740   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1641 14:37:36.025276   DOMAIN: 0000: Resource ranges:

 1642 14:37:36.031622   * Base: 80400000, Size: 3fc00000, Tag: 200

 1643 14:37:36.035841   * Base: d0000000, Size: 28000000, Tag: 200

 1644 14:37:36.038681   * Base: fa000000, Size: 1000000, Tag: 200

 1645 14:37:36.041944   * Base: fb001000, Size: 17ff000, Tag: 200

 1646 14:37:36.048158   * Base: fe800000, Size: 300000, Tag: 200

 1647 14:37:36.051949   * Base: feb80000, Size: 80000, Tag: 200

 1648 14:37:36.054629   * Base: fed00000, Size: 40000, Tag: 200

 1649 14:37:36.058269   * Base: fed70000, Size: 10000, Tag: 200

 1650 14:37:36.065252   * Base: fed88000, Size: 8000, Tag: 200

 1651 14:37:36.068635   * Base: fed93000, Size: d000, Tag: 200

 1652 14:37:36.071454   * Base: feda2000, Size: 1e000, Tag: 200

 1653 14:37:36.074926   * Base: fede0000, Size: 1220000, Tag: 200

 1654 14:37:36.081645   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1655 14:37:36.088161    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1656 14:37:36.095130    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1657 14:37:36.101763    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1658 14:37:36.108102    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1659 14:37:36.115135    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1660 14:37:36.121757    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1661 14:37:36.128776    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1662 14:37:36.134867    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1663 14:37:36.141420    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1664 14:37:36.148178    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1665 14:37:36.154940    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1666 14:37:36.161467    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1667 14:37:36.168026    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1668 14:37:36.174964    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1669 14:37:36.181539    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1670 14:37:36.188116    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1671 14:37:36.194731    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1672 14:37:36.201197    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1673 14:37:36.208281    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1674 14:37:36.214627  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1675 14:37:36.221422  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1676 14:37:36.225037   PCI: 00:06.0: Resource ranges:

 1677 14:37:36.231347   * Base: 80400000, Size: 100000, Tag: 200

 1678 14:37:36.238373    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1679 14:37:36.244111    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1680 14:37:36.251095  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1681 14:37:36.257848  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1682 14:37:36.264676  Root Device assign_resources, bus 0 link: 0

 1683 14:37:36.267779  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1684 14:37:36.274520  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1685 14:37:36.284512  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1686 14:37:36.291252  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1687 14:37:36.301077  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1688 14:37:36.304762  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1689 14:37:36.310969  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1690 14:37:36.317982  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1691 14:37:36.327317  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1692 14:37:36.337629  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1693 14:37:36.340642  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1694 14:37:36.347224  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1695 14:37:36.357245  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1696 14:37:36.360878  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1697 14:37:36.371027  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1698 14:37:36.377587  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1699 14:37:36.384072  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1700 14:37:36.387017  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1701 14:37:36.394415  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1702 14:37:36.400663  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1703 14:37:36.404605  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1704 14:37:36.414058  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1705 14:37:36.420921  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1706 14:37:36.430625  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1707 14:37:36.433864  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1708 14:37:36.437369  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1709 14:37:36.447023  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1710 14:37:36.450407  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1711 14:37:36.456961  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1712 14:37:36.463600  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1713 14:37:36.467060  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1714 14:37:36.474085  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1715 14:37:36.480606  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1716 14:37:36.487516  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1717 14:37:36.490644  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1718 14:37:36.500489  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1719 14:37:36.506931  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1720 14:37:36.510410  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1721 14:37:36.516703  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1722 14:37:36.523492  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1723 14:37:36.530011  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1724 14:37:36.533416  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1725 14:37:36.536939  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1726 14:37:36.543689  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1727 14:37:36.546890  LPC: Trying to open IO window from 800 size 1ff

 1728 14:37:36.556831  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1729 14:37:36.563537  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1730 14:37:36.573854  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1731 14:37:36.576331  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1732 14:37:36.583328  Root Device assign_resources, bus 0 link: 0 done

 1733 14:37:36.583819  Done setting resources.

 1734 14:37:36.589806  Show resources in subtree (Root Device)...After assigning values.

 1735 14:37:36.596713   Root Device child on link 0 CPU_CLUSTER: 0

 1736 14:37:36.600166    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1737 14:37:36.600734     APIC: 00

 1738 14:37:36.603187     APIC: 14

 1739 14:37:36.603659     APIC: 16

 1740 14:37:36.604028     APIC: 12

 1741 14:37:36.606814     APIC: 10

 1742 14:37:36.607285     APIC: 09

 1743 14:37:36.607655     APIC: 01

 1744 14:37:36.609751     APIC: 08

 1745 14:37:36.613968    DOMAIN: 0000 child on link 0 GPIO: 0

 1746 14:37:36.623148    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1747 14:37:36.633112    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1748 14:37:36.633678     GPIO: 0

 1749 14:37:36.636562     PCI: 00:00.0

 1750 14:37:36.646616     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1751 14:37:36.653056     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1752 14:37:36.663449     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1753 14:37:36.673419     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1754 14:37:36.683291     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1755 14:37:36.692696     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1756 14:37:36.699698     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1757 14:37:36.709686     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1758 14:37:36.719582     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1759 14:37:36.729992     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1760 14:37:36.739419     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1761 14:37:36.749526     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1762 14:37:36.756450     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1763 14:37:36.766772     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1764 14:37:36.776247     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1765 14:37:36.786422     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1766 14:37:36.796070     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1767 14:37:36.806298     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1768 14:37:36.816099     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1769 14:37:36.826692     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1770 14:37:36.832797     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1771 14:37:36.843097     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1772 14:37:36.852689     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1773 14:37:36.863131     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1774 14:37:36.872531     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1775 14:37:36.882869     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1776 14:37:36.892736     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1777 14:37:36.899408     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1778 14:37:36.902349     PCI: 00:02.0

 1779 14:37:36.913103     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1780 14:37:36.922469     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1781 14:37:36.932478     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1782 14:37:36.939192     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1783 14:37:36.949394     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1784 14:37:36.949980      GENERIC: 0.0

 1785 14:37:36.955665     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1786 14:37:36.962183     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1787 14:37:36.975712     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1788 14:37:36.985943     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1789 14:37:36.988814      PCI: 01:00.0

 1790 14:37:36.999149      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1791 14:37:37.009276      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1792 14:37:37.009845     PCI: 00:08.0

 1793 14:37:37.012231     PCI: 00:0a.0

 1794 14:37:37.022587     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1795 14:37:37.025551     PCI: 00:0d.0 child on link 0 USB0 port 0

 1796 14:37:37.035784     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1797 14:37:37.041980      USB0 port 0 child on link 0 USB3 port 0

 1798 14:37:37.042540       USB3 port 0

 1799 14:37:37.045347       USB3 port 1

 1800 14:37:37.045808       USB3 port 2

 1801 14:37:37.048769       USB3 port 3

 1802 14:37:37.052127     PCI: 00:14.0 child on link 0 USB0 port 0

 1803 14:37:37.062121     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1804 14:37:37.068655      USB0 port 0 child on link 0 USB2 port 0

 1805 14:37:37.069219       USB2 port 0

 1806 14:37:37.071983       USB2 port 1

 1807 14:37:37.072449       USB2 port 2

 1808 14:37:37.075413       USB2 port 3

 1809 14:37:37.075972       USB2 port 4

 1810 14:37:37.078582       USB2 port 5

 1811 14:37:37.079070       USB2 port 6

 1812 14:37:37.082128       USB2 port 7

 1813 14:37:37.082638       USB2 port 8

 1814 14:37:37.085145       USB2 port 9

 1815 14:37:37.085695       USB3 port 0

 1816 14:37:37.088760       USB3 port 1

 1817 14:37:37.089323       USB3 port 2

 1818 14:37:37.092167       USB3 port 3

 1819 14:37:37.092725     PCI: 00:14.2

 1820 14:37:37.105518     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1821 14:37:37.115233     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1822 14:37:37.118350     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1823 14:37:37.128452     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1824 14:37:37.132116      GENERIC: 0.0

 1825 14:37:37.134767     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1826 14:37:37.145791     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1827 14:37:37.148421      I2C: 00:1a

 1828 14:37:37.148983      I2C: 00:31

 1829 14:37:37.151514      I2C: 00:32

 1830 14:37:37.155213     PCI: 00:15.1 child on link 0 I2C: 00:50

 1831 14:37:37.165134     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1832 14:37:37.165712      I2C: 00:50

 1833 14:37:37.168243     PCI: 00:15.2

 1834 14:37:37.172013     PCI: 00:15.3 child on link 0 I2C: 00:10

 1835 14:37:37.181410     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1836 14:37:37.184798      I2C: 00:10

 1837 14:37:37.185359     PCI: 00:16.0

 1838 14:37:37.195162     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1839 14:37:37.198213     PCI: 00:19.0

 1840 14:37:37.201880     PCI: 00:19.1 child on link 0 I2C: 00:15

 1841 14:37:37.211533     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1842 14:37:37.215098      I2C: 00:15

 1843 14:37:37.215665      I2C: 00:2c

 1844 14:37:37.218387     PCI: 00:1e.0

 1845 14:37:37.228541     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1846 14:37:37.231575     PCI: 00:1e.3 child on link 0 SPI: 00

 1847 14:37:37.241390     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1848 14:37:37.244757      SPI: 00

 1849 14:37:37.248194     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1850 14:37:37.257936     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1851 14:37:37.258527      PNP: 0c09.0

 1852 14:37:37.268452      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1853 14:37:37.271364     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1854 14:37:37.281209     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1855 14:37:37.291291     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1856 14:37:37.294946      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1857 14:37:37.298155       GENERIC: 0.0

 1858 14:37:37.298652       GENERIC: 1.0

 1859 14:37:37.301450     PCI: 00:1f.3

 1860 14:37:37.311850     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1861 14:37:37.321604     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1862 14:37:37.324953     PCI: 00:1f.5

 1863 14:37:37.334817     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1864 14:37:37.337968  Done allocating resources.

 1865 14:37:37.341094  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2716 ms

 1866 14:37:37.347856  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1867 14:37:37.354202  Configure audio over I2S with MAX98373 NAU88L25B.

 1868 14:37:37.357765  Enabling BT offload

 1869 14:37:37.364722  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1870 14:37:37.367703  Enabling resources...

 1871 14:37:37.371116  PCI: 00:00.0 subsystem <- 8086/4609

 1872 14:37:37.374720  PCI: 00:00.0 cmd <- 06

 1873 14:37:37.377896  PCI: 00:02.0 subsystem <- 8086/46b3

 1874 14:37:37.381001  PCI: 00:02.0 cmd <- 03

 1875 14:37:37.384716  PCI: 00:04.0 subsystem <- 8086/461d

 1876 14:37:37.385276  PCI: 00:04.0 cmd <- 02

 1877 14:37:37.387915  PCI: 00:06.0 bridge ctrl <- 0013

 1878 14:37:37.391340  PCI: 00:06.0 subsystem <- 8086/464d

 1879 14:37:37.394779  PCI: 00:06.0 cmd <- 106

 1880 14:37:37.398067  PCI: 00:0a.0 subsystem <- 8086/467d

 1881 14:37:37.401025  PCI: 00:0a.0 cmd <- 02

 1882 14:37:37.404180  PCI: 00:0d.0 subsystem <- 8086/461e

 1883 14:37:37.407735  PCI: 00:0d.0 cmd <- 02

 1884 14:37:37.411233  PCI: 00:14.0 subsystem <- 8086/51ed

 1885 14:37:37.414656  PCI: 00:14.0 cmd <- 02

 1886 14:37:37.417827  PCI: 00:14.2 subsystem <- 8086/51ef

 1887 14:37:37.418383  PCI: 00:14.2 cmd <- 02

 1888 14:37:37.424438  PCI: 00:14.3 subsystem <- 8086/51f0

 1889 14:37:37.425174  PCI: 00:14.3 cmd <- 02

 1890 14:37:37.427807  PCI: 00:15.0 subsystem <- 8086/51e8

 1891 14:37:37.431195  PCI: 00:15.0 cmd <- 02

 1892 14:37:37.434804  PCI: 00:15.1 subsystem <- 8086/51e9

 1893 14:37:37.438003  PCI: 00:15.1 cmd <- 06

 1894 14:37:37.441040  PCI: 00:15.3 subsystem <- 8086/51eb

 1895 14:37:37.444031  PCI: 00:15.3 cmd <- 02

 1896 14:37:37.448053  PCI: 00:16.0 subsystem <- 8086/51e0

 1897 14:37:37.448618  PCI: 00:16.0 cmd <- 02

 1898 14:37:37.454245  PCI: 00:19.1 subsystem <- 8086/51c6

 1899 14:37:37.454790  PCI: 00:19.1 cmd <- 02

 1900 14:37:37.457819  PCI: 00:1e.0 subsystem <- 8086/51a8

 1901 14:37:37.461030  PCI: 00:1e.0 cmd <- 06

 1902 14:37:37.464379  PCI: 00:1e.3 subsystem <- 8086/51ab

 1903 14:37:37.467461  PCI: 00:1e.3 cmd <- 02

 1904 14:37:37.470740  PCI: 00:1f.0 subsystem <- 8086/5182

 1905 14:37:37.474287  PCI: 00:1f.0 cmd <- 407

 1906 14:37:37.477691  PCI: 00:1f.3 subsystem <- 8086/51c8

 1907 14:37:37.478276  PCI: 00:1f.3 cmd <- 02

 1908 14:37:37.484097  PCI: 00:1f.5 subsystem <- 8086/51a4

 1909 14:37:37.484687  PCI: 00:1f.5 cmd <- 406

 1910 14:37:37.487723  PCI: 01:00.0 cmd <- 02

 1911 14:37:37.488307  done.

 1912 14:37:37.494413  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1913 14:37:37.497620  ME: Version: Unavailable

 1914 14:37:37.501076  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1915 14:37:37.504082  Initializing devices...

 1916 14:37:37.507403  Root Device init

 1917 14:37:37.507989  mainboard: EC init

 1918 14:37:37.514259  Chrome EC: Set SMI mask to 0x0000000000000000

 1919 14:37:37.514893  Chrome EC: UHEPI supported

 1920 14:37:37.521537  Chrome EC: clear events_b mask to 0x0000000000000000

 1921 14:37:37.528424  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1922 14:37:37.534794  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1923 14:37:37.538111  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1924 14:37:37.544661  Chrome EC: Set WAKE mask to 0x0000000000000000

 1925 14:37:37.548093  Root Device init finished in 38 msecs

 1926 14:37:37.551641  PCI: 00:00.0 init

 1927 14:37:37.554749  CPU TDP = 15 Watts

 1928 14:37:37.555235  CPU PL1 = 15 Watts

 1929 14:37:37.558318  CPU PL2 = 55 Watts

 1930 14:37:37.558956  CPU PL4 = 123 Watts

 1931 14:37:37.564705  PCI: 00:00.0 init finished in 8 msecs

 1932 14:37:37.565301  PCI: 00:02.0 init

 1933 14:37:37.568200  GMA: Found VBT in CBFS

 1934 14:37:37.571448  GMA: Found valid VBT in CBFS

 1935 14:37:37.574542  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1936 14:37:37.584318                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1937 14:37:37.587856  PCI: 00:02.0 init finished in 18 msecs

 1938 14:37:37.588361  PCI: 00:06.0 init

 1939 14:37:37.591083  Initializing PCH PCIe bridge.

 1940 14:37:37.594876  PCI: 00:06.0 init finished in 3 msecs

 1941 14:37:37.597761  PCI: 00:0a.0 init

 1942 14:37:37.601066  PCI: 00:0a.0 init finished in 0 msecs

 1943 14:37:37.604367  PCI: 00:14.0 init

 1944 14:37:37.607970  PCI: 00:14.0 init finished in 0 msecs

 1945 14:37:37.608567  PCI: 00:14.2 init

 1946 14:37:37.614530  PCI: 00:14.2 init finished in 0 msecs

 1947 14:37:37.615141  PCI: 00:15.0 init

 1948 14:37:37.618266  I2C bus 0 version 0x3230302a

 1949 14:37:37.620874  DW I2C bus 0 at 0x80655000 (400 KHz)

 1950 14:37:37.624495  PCI: 00:15.0 init finished in 6 msecs

 1951 14:37:37.628160  PCI: 00:15.1 init

 1952 14:37:37.631339  I2C bus 1 version 0x3230302a

 1953 14:37:37.634935  DW I2C bus 1 at 0x80656000 (400 KHz)

 1954 14:37:37.638313  PCI: 00:15.1 init finished in 6 msecs

 1955 14:37:37.640907  PCI: 00:15.3 init

 1956 14:37:37.641393  I2C bus 3 version 0x3230302a

 1957 14:37:37.647615  DW I2C bus 3 at 0x80657000 (400 KHz)

 1958 14:37:37.651221  PCI: 00:15.3 init finished in 6 msecs

 1959 14:37:37.651711  PCI: 00:16.0 init

 1960 14:37:37.654271  PCI: 00:16.0 init finished in 0 msecs

 1961 14:37:37.657802  PCI: 00:19.1 init

 1962 14:37:37.661107  I2C bus 5 version 0x3230302a

 1963 14:37:37.664875  DW I2C bus 5 at 0x80659000 (400 KHz)

 1964 14:37:37.668276  PCI: 00:19.1 init finished in 6 msecs

 1965 14:37:37.671572  PCI: 00:1f.0 init

 1966 14:37:37.675096  IOAPIC: Initializing IOAPIC at 0xfec00000

 1967 14:37:37.677770  IOAPIC: ID = 0x02

 1968 14:37:37.678250  IOAPIC: Dumping registers

 1969 14:37:37.681205    reg 0x0000: 0x02000000

 1970 14:37:37.684492    reg 0x0001: 0x00770020

 1971 14:37:37.687877    reg 0x0002: 0x00000000

 1972 14:37:37.688346  IOAPIC: 120 interrupts

 1973 14:37:37.691212  IOAPIC: Clearing IOAPIC at 0xfec00000

 1974 14:37:37.697687  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1975 14:37:37.701297  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1976 14:37:37.707997  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1977 14:37:37.711289  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1978 14:37:37.717943  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1979 14:37:37.721308  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1980 14:37:37.728155  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1981 14:37:37.731471  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1982 14:37:37.734850  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1983 14:37:37.741555  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1984 14:37:37.744880  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1985 14:37:37.751230  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 1986 14:37:37.754624  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 1987 14:37:37.761301  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 1988 14:37:37.764416  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 1989 14:37:37.770800  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 1990 14:37:37.774518  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 1991 14:37:37.778498  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 1992 14:37:37.784508  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 1993 14:37:37.788207  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 1994 14:37:37.794780  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 1995 14:37:37.797697  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 1996 14:37:37.804546  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 1997 14:37:37.807724  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 1998 14:37:37.811210  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 1999 14:37:37.817785  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2000 14:37:37.821312  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2001 14:37:37.827602  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2002 14:37:37.831262  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2003 14:37:37.837556  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2004 14:37:37.840897  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2005 14:37:37.847825  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2006 14:37:37.851227  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2007 14:37:37.854390  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2008 14:37:37.861074  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2009 14:37:37.864578  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2010 14:37:37.871428  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2011 14:37:37.874711  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2012 14:37:37.881403  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2013 14:37:37.884603  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2014 14:37:37.887999  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2015 14:37:37.894419  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2016 14:37:37.898111  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2017 14:37:37.904238  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2018 14:37:37.907772  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2019 14:37:37.914591  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2020 14:37:37.917633  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2021 14:37:37.924404  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2022 14:37:37.928090  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2023 14:37:37.931014  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2024 14:37:37.937987  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2025 14:37:37.941273  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2026 14:37:37.948005  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2027 14:37:37.951330  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2028 14:37:37.957542  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2029 14:37:37.961092  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2030 14:37:37.964823  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2031 14:37:37.971070  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2032 14:37:37.974468  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2033 14:37:37.981007  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2034 14:37:37.984312  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2035 14:37:37.991168  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2036 14:37:37.994090  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2037 14:37:38.001079  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2038 14:37:38.003963  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2039 14:37:38.007424  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2040 14:37:38.014243  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2041 14:37:38.017793  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2042 14:37:38.024651  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2043 14:37:38.027911  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2044 14:37:38.034326  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2045 14:37:38.038284  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2046 14:37:38.041049  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2047 14:37:38.048042  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2048 14:37:38.050998  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2049 14:37:38.057938  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2050 14:37:38.061158  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2051 14:37:38.067325  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2052 14:37:38.070925  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2053 14:37:38.077759  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2054 14:37:38.080900  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2055 14:37:38.084248  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2056 14:37:38.091188  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2057 14:37:38.093901  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2058 14:37:38.100849  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2059 14:37:38.104094  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2060 14:37:38.110730  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2061 14:37:38.114138  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2062 14:37:38.117482  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2063 14:37:38.124125  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2064 14:37:38.127638  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2065 14:37:38.134252  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2066 14:37:38.137363  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2067 14:37:38.144227  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2068 14:37:38.147411  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2069 14:37:38.154433  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2070 14:37:38.157480  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2071 14:37:38.161064  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2072 14:37:38.167338  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2073 14:37:38.170750  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2074 14:37:38.177581  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2075 14:37:38.180775  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2076 14:37:38.187513  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2077 14:37:38.190997  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2078 14:37:38.197304  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2079 14:37:38.201416  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2080 14:37:38.204327  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2081 14:37:38.211080  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2082 14:37:38.214354  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2083 14:37:38.220607  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2084 14:37:38.224052  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2085 14:37:38.230810  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2086 14:37:38.233926  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2087 14:37:38.237185  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2088 14:37:38.243937  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2089 14:37:38.247272  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2090 14:37:38.253808  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2091 14:37:38.256916  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2092 14:37:38.263762  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2093 14:37:38.267270  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2094 14:37:38.273962  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2095 14:37:38.277371  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2096 14:37:38.280643  PCI: 00:1f.0 init finished in 607 msecs

 2097 14:37:38.283736  PCI: 00:1f.2 init

 2098 14:37:38.287693  apm_control: Disabling ACPI.

 2099 14:37:38.290762  APMC done.

 2100 14:37:38.294390  PCI: 00:1f.2 init finished in 6 msecs

 2101 14:37:38.295027  PCI: 00:1f.3 init

 2102 14:37:38.301199  PCI: 00:1f.3 init finished in 0 msecs

 2103 14:37:38.301773  PCI: 01:00.0 init

 2104 14:37:38.304320  PCI: 01:00.0 init finished in 0 msecs

 2105 14:37:38.307328  PNP: 0c09.0 init

 2106 14:37:38.310721  Google Chrome EC uptime: 12.072 seconds

 2107 14:37:38.313994  Google Chrome AP resets since EC boot: 1

 2108 14:37:38.321073  Google Chrome most recent AP reset causes:

 2109 14:37:38.324076  	0.339: 32775 shutdown: entering G3

 2110 14:37:38.330879  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2111 14:37:38.334204  PNP: 0c09.0 init finished in 23 msecs

 2112 14:37:38.334813  GENERIC: 0.0 init

 2113 14:37:38.340917  GENERIC: 0.0 init finished in 0 msecs

 2114 14:37:38.341490  GENERIC: 1.0 init

 2115 14:37:38.344716  GENERIC: 1.0 init finished in 0 msecs

 2116 14:37:38.347638  Devices initialized

 2117 14:37:38.350715  Show all devs... After init.

 2118 14:37:38.354005  Root Device: enabled 1

 2119 14:37:38.354468  CPU_CLUSTER: 0: enabled 1

 2120 14:37:38.357334  DOMAIN: 0000: enabled 1

 2121 14:37:38.360798  GPIO: 0: enabled 1

 2122 14:37:38.361333  PCI: 00:00.0: enabled 1

 2123 14:37:38.363992  PCI: 00:01.0: enabled 0

 2124 14:37:38.367135  PCI: 00:01.1: enabled 0

 2125 14:37:38.370420  PCI: 00:02.0: enabled 1

 2126 14:37:38.370919  PCI: 00:04.0: enabled 1

 2127 14:37:38.374122  PCI: 00:05.0: enabled 0

 2128 14:37:38.377121  PCI: 00:06.0: enabled 1

 2129 14:37:38.380443  PCI: 00:06.2: enabled 0

 2130 14:37:38.380911  PCI: 00:07.0: enabled 0

 2131 14:37:38.383574  PCI: 00:07.1: enabled 0

 2132 14:37:38.387292  PCI: 00:07.2: enabled 0

 2133 14:37:38.387758  PCI: 00:07.3: enabled 0

 2134 14:37:38.390416  PCI: 00:08.0: enabled 0

 2135 14:37:38.394680  PCI: 00:09.0: enabled 0

 2136 14:37:38.397227  PCI: 00:0a.0: enabled 1

 2137 14:37:38.397790  PCI: 00:0d.0: enabled 1

 2138 14:37:38.400581  PCI: 00:0d.1: enabled 0

 2139 14:37:38.403986  PCI: 00:0d.2: enabled 0

 2140 14:37:38.407119  PCI: 00:0d.3: enabled 0

 2141 14:37:38.407584  PCI: 00:0e.0: enabled 0

 2142 14:37:38.410528  PCI: 00:10.0: enabled 0

 2143 14:37:38.414283  PCI: 00:10.1: enabled 0

 2144 14:37:38.417454  PCI: 00:10.6: enabled 0

 2145 14:37:38.418017  PCI: 00:10.7: enabled 0

 2146 14:37:38.420769  PCI: 00:12.0: enabled 0

 2147 14:37:38.424334  PCI: 00:12.6: enabled 0

 2148 14:37:38.424892  PCI: 00:12.7: enabled 0

 2149 14:37:38.427341  PCI: 00:13.0: enabled 0

 2150 14:37:38.430381  PCI: 00:14.0: enabled 1

 2151 14:37:38.434207  PCI: 00:14.1: enabled 0

 2152 14:37:38.434856  PCI: 00:14.2: enabled 1

 2153 14:37:38.437419  PCI: 00:14.3: enabled 1

 2154 14:37:38.440798  PCI: 00:15.0: enabled 1

 2155 14:37:38.443991  PCI: 00:15.1: enabled 1

 2156 14:37:38.444552  PCI: 00:15.2: enabled 0

 2157 14:37:38.447321  PCI: 00:15.3: enabled 1

 2158 14:37:38.450757  PCI: 00:16.0: enabled 1

 2159 14:37:38.453882  PCI: 00:16.1: enabled 0

 2160 14:37:38.454441  PCI: 00:16.2: enabled 0

 2161 14:37:38.457470  PCI: 00:16.3: enabled 0

 2162 14:37:38.460223  PCI: 00:16.4: enabled 0

 2163 14:37:38.463814  PCI: 00:16.5: enabled 0

 2164 14:37:38.464376  PCI: 00:17.0: enabled 0

 2165 14:37:38.467220  PCI: 00:19.0: enabled 0

 2166 14:37:38.470539  PCI: 00:19.1: enabled 1

 2167 14:37:38.471051  PCI: 00:19.2: enabled 0

 2168 14:37:38.474028  PCI: 00:1a.0: enabled 0

 2169 14:37:38.477168  PCI: 00:1c.0: enabled 0

 2170 14:37:38.480231  PCI: 00:1c.1: enabled 0

 2171 14:37:38.480879  PCI: 00:1c.2: enabled 0

 2172 14:37:38.483506  PCI: 00:1c.3: enabled 0

 2173 14:37:38.487213  PCI: 00:1c.4: enabled 0

 2174 14:37:38.490474  PCI: 00:1c.5: enabled 0

 2175 14:37:38.491113  PCI: 00:1c.6: enabled 0

 2176 14:37:38.493730  PCI: 00:1c.7: enabled 0

 2177 14:37:38.497161  PCI: 00:1d.0: enabled 0

 2178 14:37:38.500462  PCI: 00:1d.1: enabled 0

 2179 14:37:38.501041  PCI: 00:1d.2: enabled 0

 2180 14:37:38.504056  PCI: 00:1d.3: enabled 0

 2181 14:37:38.506845  PCI: 00:1e.0: enabled 1

 2182 14:37:38.507312  PCI: 00:1e.1: enabled 0

 2183 14:37:38.510754  PCI: 00:1e.2: enabled 0

 2184 14:37:38.514059  PCI: 00:1e.3: enabled 1

 2185 14:37:38.517562  PCI: 00:1f.0: enabled 1

 2186 14:37:38.518119  PCI: 00:1f.1: enabled 0

 2187 14:37:38.520146  PCI: 00:1f.2: enabled 1

 2188 14:37:38.524293  PCI: 00:1f.3: enabled 1

 2189 14:37:38.527226  PCI: 00:1f.4: enabled 0

 2190 14:37:38.527784  PCI: 00:1f.5: enabled 1

 2191 14:37:38.530638  PCI: 00:1f.6: enabled 0

 2192 14:37:38.533942  PCI: 00:1f.7: enabled 0

 2193 14:37:38.537358  GENERIC: 0.0: enabled 1

 2194 14:37:38.537918  GENERIC: 0.0: enabled 1

 2195 14:37:38.540156  GENERIC: 1.0: enabled 1

 2196 14:37:38.543599  GENERIC: 0.0: enabled 1

 2197 14:37:38.544162  GENERIC: 1.0: enabled 1

 2198 14:37:38.547260  USB0 port 0: enabled 1

 2199 14:37:38.550849  USB0 port 0: enabled 1

 2200 14:37:38.553598  GENERIC: 0.0: enabled 1

 2201 14:37:38.554157  I2C: 00:1a: enabled 1

 2202 14:37:38.557169  I2C: 00:31: enabled 1

 2203 14:37:38.560429  I2C: 00:32: enabled 1

 2204 14:37:38.560893  I2C: 00:50: enabled 1

 2205 14:37:38.563987  I2C: 00:10: enabled 1

 2206 14:37:38.567231  I2C: 00:15: enabled 1

 2207 14:37:38.567796  I2C: 00:2c: enabled 1

 2208 14:37:38.571219  GENERIC: 0.0: enabled 1

 2209 14:37:38.574820  SPI: 00: enabled 1

 2210 14:37:38.575388  PNP: 0c09.0: enabled 1

 2211 14:37:38.577219  GENERIC: 0.0: enabled 1

 2212 14:37:38.580599  USB3 port 0: enabled 1

 2213 14:37:38.581180  USB3 port 1: enabled 0

 2214 14:37:38.583637  USB3 port 2: enabled 1

 2215 14:37:38.587028  USB3 port 3: enabled 0

 2216 14:37:38.590725  USB2 port 0: enabled 1

 2217 14:37:38.591286  USB2 port 1: enabled 0

 2218 14:37:38.593821  USB2 port 2: enabled 1

 2219 14:37:38.597542  USB2 port 3: enabled 0

 2220 14:37:38.598101  USB2 port 4: enabled 0

 2221 14:37:38.600289  USB2 port 5: enabled 1

 2222 14:37:38.604657  USB2 port 6: enabled 0

 2223 14:37:38.605217  USB2 port 7: enabled 0

 2224 14:37:38.607123  USB2 port 8: enabled 1

 2225 14:37:38.611378  USB2 port 9: enabled 1

 2226 14:37:38.613817  USB3 port 0: enabled 1

 2227 14:37:38.614377  USB3 port 1: enabled 0

 2228 14:37:38.617236  USB3 port 2: enabled 0

 2229 14:37:38.620321  USB3 port 3: enabled 0

 2230 14:37:38.620799  GENERIC: 0.0: enabled 1

 2231 14:37:38.623477  GENERIC: 1.0: enabled 1

 2232 14:37:38.626998  APIC: 00: enabled 1

 2233 14:37:38.627462  APIC: 14: enabled 1

 2234 14:37:38.630914  APIC: 16: enabled 1

 2235 14:37:38.634064  APIC: 12: enabled 1

 2236 14:37:38.634667  APIC: 10: enabled 1

 2237 14:37:38.637533  APIC: 09: enabled 1

 2238 14:37:38.638104  APIC: 01: enabled 1

 2239 14:37:38.640834  APIC: 08: enabled 1

 2240 14:37:38.643777  PCI: 01:00.0: enabled 1

 2241 14:37:38.650712  BS: BS_DEV_INIT run times (exec / console): 8 / 1133 ms

 2242 14:37:38.653413  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2243 14:37:38.656360  ELOG: NV offset 0xf20000 size 0x4000

 2244 14:37:38.663661  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2245 14:37:38.670471  ELOG: Event(17) added with size 13 at 2023-02-16 06:00:09 UTC

 2246 14:37:38.677366  ELOG: Event(9E) added with size 10 at 2023-02-16 06:00:09 UTC

 2247 14:37:38.683952  ELOG: Event(9F) added with size 14 at 2023-02-16 06:00:09 UTC

 2248 14:37:38.690816  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2249 14:37:38.697530  ELOG: Event(A0) added with size 9 at 2023-02-16 06:00:09 UTC

 2250 14:37:38.701047  elog_add_boot_reason: Logged dev mode boot

 2251 14:37:38.707727  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2252 14:37:38.708277  Finalize devices...

 2253 14:37:38.711212  PCI: 00:16.0 final

 2254 14:37:38.714703  PCI: 00:1f.2 final

 2255 14:37:38.715263  GENERIC: 0.0 final

 2256 14:37:38.721292  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2257 14:37:38.724277  GENERIC: 1.0 final

 2258 14:37:38.727889  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2259 14:37:38.730884  Devices finalized

 2260 14:37:38.738088  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2261 14:37:38.741350  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2262 14:37:38.747280  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2263 14:37:38.751374  ME: HFSTS1                      : 0x90000245

 2264 14:37:38.758003  ME: HFSTS2                      : 0x82100116

 2265 14:37:38.760700  ME: HFSTS3                      : 0x00000050

 2266 14:37:38.764220  ME: HFSTS4                      : 0x00004000

 2267 14:37:38.771271  ME: HFSTS5                      : 0x00000000

 2268 14:37:38.774473  ME: HFSTS6                      : 0x40600006

 2269 14:37:38.777492  ME: Manufacturing Mode          : NO

 2270 14:37:38.780715  ME: SPI Protection Mode Enabled : YES

 2271 14:37:38.787616  ME: FPFs Committed              : YES

 2272 14:37:38.791127  ME: Manufacturing Vars Locked   : YES

 2273 14:37:38.793896  ME: FW Partition Table          : OK

 2274 14:37:38.797757  ME: Bringup Loader Failure      : NO

 2275 14:37:38.801051  ME: Firmware Init Complete      : YES

 2276 14:37:38.804007  ME: Boot Options Present        : NO

 2277 14:37:38.807416  ME: Update In Progress          : NO

 2278 14:37:38.814527  ME: D0i3 Support                : YES

 2279 14:37:38.817267  ME: Low Power State Enabled     : NO

 2280 14:37:38.820807  ME: CPU Replaced                : YES

 2281 14:37:38.824385  ME: CPU Replacement Valid       : YES

 2282 14:37:38.827564  ME: Current Working State       : 5

 2283 14:37:38.830673  ME: Current Operation State     : 1

 2284 14:37:38.833796  ME: Current Operation Mode      : 0

 2285 14:37:38.837294  ME: Error Code                  : 0

 2286 14:37:38.840644  ME: Enhanced Debug Mode         : NO

 2287 14:37:38.847260  ME: CPU Debug Disabled          : YES

 2288 14:37:38.850859  ME: TXT Support                 : NO

 2289 14:37:38.853965  ME: WP for RO is enabled        : YES

 2290 14:37:38.860648  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2291 14:37:38.863822  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2292 14:37:38.870790  Ramoops buffer: 0x100000@0x76899000.

 2293 14:37:38.873667  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2294 14:37:38.883846  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2295 14:37:38.887869  CBFS: 'fallback/slic' not found.

 2296 14:37:38.890344  ACPI: Writing ACPI tables at 7686d000.

 2297 14:37:38.890842  ACPI:    * FACS

 2298 14:37:38.893960  ACPI:    * DSDT

 2299 14:37:38.900428  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2300 14:37:38.903817  ACPI:    * FADT

 2301 14:37:38.904406  SCI is IRQ9

 2302 14:37:38.907254  ACPI: added table 1/32, length now 40

 2303 14:37:38.910486  ACPI:     * SSDT

 2304 14:37:38.914133  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2305 14:37:38.921707  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2306 14:37:38.924815  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2307 14:37:38.928192  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2308 14:37:38.935294  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2309 14:37:38.941664  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2310 14:37:38.948189  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2311 14:37:38.951260  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2312 14:37:38.957858  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2313 14:37:38.960995  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2314 14:37:38.968060  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2315 14:37:38.971500  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2316 14:37:38.978058  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2317 14:37:38.981190  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2318 14:37:38.988358  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2319 14:37:38.991661  PS2K: Passing 80 keymaps to kernel

 2320 14:37:38.998695  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2321 14:37:39.004893  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2322 14:37:39.011460  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2323 14:37:39.017992  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2324 14:37:39.024904  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2325 14:37:39.031506  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2326 14:37:39.034815  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2327 14:37:39.041978  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2328 14:37:39.048045  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2329 14:37:39.055201  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2330 14:37:39.058168  ACPI: added table 2/32, length now 44

 2331 14:37:39.060999  ACPI:    * MCFG

 2332 14:37:39.064311  ACPI: added table 3/32, length now 48

 2333 14:37:39.064776  ACPI:    * TPM2

 2334 14:37:39.068154  TPM2 log created at 0x7685d000

 2335 14:37:39.071176  ACPI: added table 4/32, length now 52

 2336 14:37:39.074482  ACPI:     * LPIT

 2337 14:37:39.077823  ACPI: added table 5/32, length now 56

 2338 14:37:39.080897  ACPI:    * MADT

 2339 14:37:39.081360  SCI is IRQ9

 2340 14:37:39.084412  ACPI: added table 6/32, length now 60

 2341 14:37:39.087915  cmd_reg from pmc_make_ipc_cmd 1052838

 2342 14:37:39.095003  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2343 14:37:39.101403  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2344 14:37:39.108160  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2345 14:37:39.111120  PMC CrashLog size in discovery mode: 0xC00

 2346 14:37:39.114472  cpu crashlog bar addr: 0x80640000

 2347 14:37:39.118179  cpu discovery table offset: 0x6030

 2348 14:37:39.124794  cpu_crashlog_discovery_table buffer count: 0x3

 2349 14:37:39.131478  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2350 14:37:39.137821  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2351 14:37:39.144474  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2352 14:37:39.147884  PMC crashLog size in discovery mode : 0xC00

 2353 14:37:39.154799  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2354 14:37:39.157861  discover mode PMC crashlog size adjusted to: 0x200

 2355 14:37:39.167957  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2356 14:37:39.170827  discover mode PMC crashlog size adjusted to: 0x0

 2357 14:37:39.174249  m_cpu_crashLog_size : 0x3480 bytes

 2358 14:37:39.177582  CPU crashLog present.

 2359 14:37:39.180795  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2360 14:37:39.187615  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2361 14:37:39.190886  current = 76876550

 2362 14:37:39.191347  ACPI:    * DMAR

 2363 14:37:39.197688  ACPI: added table 7/32, length now 64

 2364 14:37:39.201331  ACPI: added table 8/32, length now 68

 2365 14:37:39.201902  ACPI:    * HPET

 2366 14:37:39.204856  ACPI: added table 9/32, length now 72

 2367 14:37:39.207743  ACPI: done.

 2368 14:37:39.211279  ACPI tables: 38528 bytes.

 2369 14:37:39.214708  smbios_write_tables: 76857000

 2370 14:37:39.217671  EC returned error result code 3

 2371 14:37:39.221537  Couldn't obtain OEM name from CBI

 2372 14:37:39.222103  Create SMBIOS type 16

 2373 14:37:39.224752  Create SMBIOS type 17

 2374 14:37:39.228224  Create SMBIOS type 20

 2375 14:37:39.231412  GENERIC: 0.0 (WIFI Device)

 2376 14:37:39.231976  SMBIOS tables: 2156 bytes.

 2377 14:37:39.238245  Writing table forward entry at 0x00000500

 2378 14:37:39.244704  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2379 14:37:39.248037  Writing coreboot table at 0x76891000

 2380 14:37:39.254905   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2381 14:37:39.258026   1. 0000000000001000-000000000009ffff: RAM

 2382 14:37:39.261748   2. 00000000000a0000-00000000000fffff: RESERVED

 2383 14:37:39.264514   3. 0000000000100000-0000000076856fff: RAM

 2384 14:37:39.271386   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2385 14:37:39.278585   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2386 14:37:39.281423   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2387 14:37:39.288078   7. 0000000077000000-00000000803fffff: RESERVED

 2388 14:37:39.291176   8. 00000000c0000000-00000000cfffffff: RESERVED

 2389 14:37:39.298247   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2390 14:37:39.301520  10. 00000000fb000000-00000000fb000fff: RESERVED

 2391 14:37:39.308184  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2392 14:37:39.311226  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2393 14:37:39.315138  13. 00000000fec00000-00000000fecfffff: RESERVED

 2394 14:37:39.321532  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2395 14:37:39.325400  15. 00000000fed80000-00000000fed87fff: RESERVED

 2396 14:37:39.331826  16. 00000000fed90000-00000000fed92fff: RESERVED

 2397 14:37:39.335248  17. 00000000feda0000-00000000feda1fff: RESERVED

 2398 14:37:39.341948  18. 00000000fedc0000-00000000feddffff: RESERVED

 2399 14:37:39.344958  19. 0000000100000000-000000027fbfffff: RAM

 2400 14:37:39.348468  Passing 4 GPIOs to payload:

 2401 14:37:39.351750              NAME |       PORT | POLARITY |     VALUE

 2402 14:37:39.358239               lid |  undefined |     high |      high

 2403 14:37:39.365844             power |  undefined |     high |       low

 2404 14:37:39.368562             oprom |  undefined |     high |       low

 2405 14:37:39.374849          EC in RW | 0x00000151 |     high |      high

 2406 14:37:39.375411  Board ID: 3

 2407 14:37:39.378617  FW config: 0x131

 2408 14:37:39.384962  Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 7d29

 2409 14:37:39.385516  coreboot table: 1748 bytes.

 2410 14:37:39.388178  IMD ROOT    0. 0x76fff000 0x00001000

 2411 14:37:39.394650  IMD SMALL   1. 0x76ffe000 0x00001000

 2412 14:37:39.397831  FSP MEMORY  2. 0x76afe000 0x00500000

 2413 14:37:39.401286  CONSOLE     3. 0x76ade000 0x00020000

 2414 14:37:39.404850  RW MCACHE   4. 0x76add000 0x0000043c

 2415 14:37:39.408468  RO MCACHE   5. 0x76adc000 0x00000fd8

 2416 14:37:39.411412  FMAP        6. 0x76adb000 0x0000064a

 2417 14:37:39.414972  TIME STAMP  7. 0x76ada000 0x00000910

 2418 14:37:39.418057  VBOOT WORK  8. 0x76ac6000 0x00014000

 2419 14:37:39.424788  MEM INFO    9. 0x76ac5000 0x000003b8

 2420 14:37:39.428232  ROMSTG STCK10. 0x76ac4000 0x00001000

 2421 14:37:39.431585  AFTER CAR  11. 0x76ab8000 0x0000c000

 2422 14:37:39.434889  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2423 14:37:39.438371  ACPI BERT  13. 0x76a1e000 0x00010000

 2424 14:37:39.441774  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2425 14:37:39.445142  REFCODE    15. 0x769ae000 0x0006f000

 2426 14:37:39.448590  SMM BACKUP 16. 0x7699e000 0x00010000

 2427 14:37:39.455371  IGD OPREGION17. 0x76999000 0x00004203

 2428 14:37:39.458124  RAMOOPS    18. 0x76899000 0x00100000

 2429 14:37:39.462085  COREBOOT   19. 0x76891000 0x00008000

 2430 14:37:39.465012  ACPI       20. 0x7686d000 0x00024000

 2431 14:37:39.468316  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2432 14:37:39.471783  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2433 14:37:39.474815  CPU CRASHLOG23. 0x76858000 0x00003480

 2434 14:37:39.478767  SMBIOS     24. 0x76857000 0x00001000

 2435 14:37:39.481652  IMD small region:

 2436 14:37:39.485086    IMD ROOT    0. 0x76ffec00 0x00000400

 2437 14:37:39.488411    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2438 14:37:39.495335    POWER STATE 2. 0x76ffeb80 0x00000044

 2439 14:37:39.498514    ROMSTAGE    3. 0x76ffeb60 0x00000004

 2440 14:37:39.501809    ACPI GNVS   4. 0x76ffeb00 0x00000048

 2441 14:37:39.505004    TYPE_C INFO 5. 0x76ffeae0 0x0000000c

 2442 14:37:39.511607  BS: BS_WRITE_TABLES run times (exec / console): 6 / 624 ms

 2443 14:37:39.514973  MTRR: Physical address space:

 2444 14:37:39.521975  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2445 14:37:39.525496  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2446 14:37:39.531630  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2447 14:37:39.538735  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2448 14:37:39.545072  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2449 14:37:39.551545  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2450 14:37:39.558694  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2451 14:37:39.561597  MTRR: Fixed MSR 0x250 0x0606060606060606

 2452 14:37:39.564769  MTRR: Fixed MSR 0x258 0x0606060606060606

 2453 14:37:39.571568  MTRR: Fixed MSR 0x259 0x0000000000000000

 2454 14:37:39.575021  MTRR: Fixed MSR 0x268 0x0606060606060606

 2455 14:37:39.578382  MTRR: Fixed MSR 0x269 0x0606060606060606

 2456 14:37:39.581541  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2457 14:37:39.587977  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2458 14:37:39.591521  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2459 14:37:39.595071  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2460 14:37:39.598385  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2461 14:37:39.601785  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2462 14:37:39.606655  call enable_fixed_mtrr()

 2463 14:37:39.609545  CPU physical address size: 39 bits

 2464 14:37:39.616432  MTRR: default type WB/UC MTRR counts: 6/6.

 2465 14:37:39.619299  MTRR: UC selected as default type.

 2466 14:37:39.626412  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2467 14:37:39.629744  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2468 14:37:39.636156  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2469 14:37:39.643180  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2470 14:37:39.649940  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2471 14:37:39.656335  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2472 14:37:39.662845  MTRR: Fixed MSR 0x250 0x0606060606060606

 2473 14:37:39.665983  MTRR: Fixed MSR 0x258 0x0606060606060606

 2474 14:37:39.669619  MTRR: Fixed MSR 0x259 0x0000000000000000

 2475 14:37:39.672751  MTRR: Fixed MSR 0x268 0x0606060606060606

 2476 14:37:39.679287  MTRR: Fixed MSR 0x269 0x0606060606060606

 2477 14:37:39.682711  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2478 14:37:39.686234  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2479 14:37:39.689750  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2480 14:37:39.692675  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2481 14:37:39.699646  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2482 14:37:39.702955  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2483 14:37:39.705903  MTRR: Fixed MSR 0x250 0x0606060606060606

 2484 14:37:39.709060  MTRR: Fixed MSR 0x250 0x0606060606060606

 2485 14:37:39.715863  MTRR: Fixed MSR 0x250 0x0606060606060606

 2486 14:37:39.718995  MTRR: Fixed MSR 0x258 0x0606060606060606

 2487 14:37:39.722682  MTRR: Fixed MSR 0x259 0x0000000000000000

 2488 14:37:39.726131  MTRR: Fixed MSR 0x268 0x0606060606060606

 2489 14:37:39.732295  MTRR: Fixed MSR 0x269 0x0606060606060606

 2490 14:37:39.736014  MTRR: Fixed MSR 0x250 0x0606060606060606

 2491 14:37:39.739273  MTRR: Fixed MSR 0x258 0x0606060606060606

 2492 14:37:39.742609  MTRR: Fixed MSR 0x259 0x0000000000000000

 2493 14:37:39.746083  MTRR: Fixed MSR 0x268 0x0606060606060606

 2494 14:37:39.752574  MTRR: Fixed MSR 0x269 0x0606060606060606

 2495 14:37:39.753090  call enable_fixed_mtrr()

 2496 14:37:39.759207  MTRR: Fixed MSR 0x250 0x0606060606060606

 2497 14:37:39.762360  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2498 14:37:39.766056  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2499 14:37:39.769843  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2500 14:37:39.775808  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2501 14:37:39.779184  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2502 14:37:39.783069  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2503 14:37:39.786106  MTRR: Fixed MSR 0x258 0x0606060606060606

 2504 14:37:39.792973  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2505 14:37:39.796290  MTRR: Fixed MSR 0x258 0x0606060606060606

 2506 14:37:39.799318  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2507 14:37:39.802949  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2508 14:37:39.806398  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2509 14:37:39.812549  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2510 14:37:39.816243  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2511 14:37:39.819505  MTRR: Fixed MSR 0x250 0x0606060606060606

 2512 14:37:39.822511  call enable_fixed_mtrr()

 2513 14:37:39.826245  MTRR: Fixed MSR 0x258 0x0606060606060606

 2514 14:37:39.829506  MTRR: Fixed MSR 0x259 0x0000000000000000

 2515 14:37:39.832772  CPU physical address size: 39 bits

 2516 14:37:39.839859  MTRR: Fixed MSR 0x268 0x0606060606060606

 2517 14:37:39.842725  MTRR: Fixed MSR 0x259 0x0000000000000000

 2518 14:37:39.846162  MTRR: Fixed MSR 0x268 0x0606060606060606

 2519 14:37:39.849597  MTRR: Fixed MSR 0x269 0x0606060606060606

 2520 14:37:39.855794  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2521 14:37:39.859203  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2522 14:37:39.862689  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2523 14:37:39.865559  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2524 14:37:39.872532  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2525 14:37:39.875902  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2526 14:37:39.879252  CPU physical address size: 39 bits

 2527 14:37:39.882250  call enable_fixed_mtrr()

 2528 14:37:39.885714  MTRR: Fixed MSR 0x259 0x0000000000000000

 2529 14:37:39.889808  CPU physical address size: 39 bits

 2530 14:37:39.892791  MTRR: Fixed MSR 0x269 0x0606060606060606

 2531 14:37:39.895499  MTRR: Fixed MSR 0x268 0x0606060606060606

 2532 14:37:39.902338  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2533 14:37:39.906274  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2534 14:37:39.908937  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2535 14:37:39.912772  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2536 14:37:39.915860  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2537 14:37:39.922655  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2538 14:37:39.926054  MTRR: Fixed MSR 0x269 0x0606060606060606

 2539 14:37:39.929442  call enable_fixed_mtrr()

 2540 14:37:39.932488  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2541 14:37:39.935909  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2542 14:37:39.939191  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2543 14:37:39.945972  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2544 14:37:39.949274  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2545 14:37:39.952296  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2546 14:37:39.955863  CPU physical address size: 39 bits

 2547 14:37:39.959229  call enable_fixed_mtrr()

 2548 14:37:39.962528  call enable_fixed_mtrr()

 2549 14:37:39.965573  CPU physical address size: 39 bits

 2550 14:37:39.968784  CPU physical address size: 39 bits

 2551 14:37:39.972362  MTRR: Fixed MSR 0x258 0x0606060606060606

 2552 14:37:39.975723  MTRR: Fixed MSR 0x259 0x0000000000000000

 2553 14:37:39.982311  MTRR: Fixed MSR 0x268 0x0606060606060606

 2554 14:37:39.985466  MTRR: Fixed MSR 0x269 0x0606060606060606

 2555 14:37:39.988652  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2556 14:37:39.992473  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2557 14:37:39.998786  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2558 14:37:40.002186  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2559 14:37:40.005733  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2560 14:37:40.008721  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2561 14:37:40.013028  call enable_fixed_mtrr()

 2562 14:37:40.016742  CPU physical address size: 39 bits

 2563 14:37:40.020823  

 2564 14:37:40.021392  MTRR check

 2565 14:37:40.024725  Fixed MTRRs   : Enabled

 2566 14:37:40.025311  Variable MTRRs: Enabled

 2567 14:37:40.025684  

 2568 14:37:40.031332  BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms

 2569 14:37:40.034539  Checking cr50 for pending updates

 2570 14:37:40.046603  Reading cr50 TPM mode

 2571 14:37:40.061652  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2572 14:37:40.071552  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2573 14:37:40.074939  Checking segment from ROM address 0xf96cbe6c

 2574 14:37:40.078465  Checking segment from ROM address 0xf96cbe88

 2575 14:37:40.085027  Loading segment from ROM address 0xf96cbe6c

 2576 14:37:40.085579    code (compression=1)

 2577 14:37:40.096100    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2578 14:37:40.102097  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2579 14:37:40.105075  using LZMA

 2580 14:37:40.127320  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2581 14:37:40.134343  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2582 14:37:40.142115  Loading segment from ROM address 0xf96cbe88

 2583 14:37:40.145203    Entry Point 0x30000000

 2584 14:37:40.145762  Loaded segments

 2585 14:37:40.151970  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2586 14:37:40.158823  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2587 14:37:40.162328  Finalizing chipset.

 2588 14:37:40.162937  apm_control: Finalizing SMM.

 2589 14:37:40.165415  APMC done.

 2590 14:37:40.168659  HECI: CSE device 16.1 is disabled

 2591 14:37:40.172239  HECI: CSE device 16.2 is disabled

 2592 14:37:40.175195  HECI: CSE device 16.3 is disabled

 2593 14:37:40.178472  HECI: CSE device 16.4 is disabled

 2594 14:37:40.182173  HECI: CSE device 16.5 is disabled

 2595 14:37:40.185193  HECI: Sending End-of-Post

 2596 14:37:40.193868  CSE: EOP requested action: continue boot

 2597 14:37:40.197054  CSE EOP successful, continuing boot

 2598 14:37:40.203617  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2599 14:37:40.207236  mp_park_aps done after 0 msecs.

 2600 14:37:40.210384  Jumping to boot code at 0x30000000(0x76891000)

 2601 14:37:40.220288  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2602 14:37:40.224605  

 2603 14:37:40.225175  

 2604 14:37:40.225543  

 2605 14:37:40.227299  Starting depthcharge on Volmar...

 2606 14:37:40.227768  

 2607 14:37:40.229585  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2608 14:37:40.230152  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2609 14:37:40.230620  Setting prompt string to ['brya:']
 2610 14:37:40.231055  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2611 14:37:40.234644  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2612 14:37:40.235218  

 2613 14:37:40.241399  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2614 14:37:40.241964  

 2615 14:37:40.247428  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2616 14:37:40.247991  

 2617 14:37:40.250729  configure_storage: Failed to remap 1C:2

 2618 14:37:40.251196  

 2619 14:37:40.251570  Wipe memory regions:

 2620 14:37:40.254337  

 2621 14:37:40.257795  	[0x00000000001000, 0x000000000a0000)

 2622 14:37:40.258358  

 2623 14:37:40.260918  	[0x00000000100000, 0x00000030000000)

 2624 14:37:40.368529  

 2625 14:37:40.371531  	[0x00000032668e60, 0x00000076857000)

 2626 14:37:40.522949  

 2627 14:37:40.526320  	[0x00000100000000, 0x0000027fc00000)

 2628 14:37:41.369652  

 2629 14:37:41.372743  ec_init: CrosEC protocol v3 supported (256, 256)

 2630 14:37:41.980332  

 2631 14:37:41.980897  R8152: Initializing

 2632 14:37:41.981331  

 2633 14:37:41.983686  Version 9 (ocp_data = 6010)

 2634 14:37:41.984150  

 2635 14:37:41.986533  R8152: Done initializing

 2636 14:37:41.987033  

 2637 14:37:41.990230  Adding net device

 2638 14:37:42.291378  

 2639 14:37:42.294337  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2640 14:37:42.294845  

 2641 14:37:42.295351  

 2642 14:37:42.295722  

 2643 14:37:42.296519  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2645 14:37:42.397893  brya: tftpboot 192.168.201.1 11299728/tftp-deploy-brhvjn35/kernel/bzImage 11299728/tftp-deploy-brhvjn35/kernel/cmdline 11299728/tftp-deploy-brhvjn35/ramdisk/ramdisk.cpio.gz

 2646 14:37:42.398595  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2647 14:37:42.399068  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2648 14:37:42.403961  tftpboot 192.168.201.1 11299728/tftp-deploy-brhvjn35/kernel/bzIploy-brhvjn35/kernel/cmdline 11299728/tftp-deploy-brhvjn35/ramdisk/ramdisk.cpio.gz

 2649 14:37:42.404542  

 2650 14:37:42.404909  Waiting for link

 2651 14:37:42.606710  

 2652 14:37:42.607265  done.

 2653 14:37:42.607636  

 2654 14:37:42.607977  MAC: 00:e0:4c:68:02:37

 2655 14:37:42.608303  

 2656 14:37:42.609638  Sending DHCP discover... done.

 2657 14:37:42.610105  

 2658 14:37:42.613418  Waiting for reply... done.

 2659 14:37:42.613987  

 2660 14:37:42.616784  Sending DHCP request... done.

 2661 14:37:42.617343  

 2662 14:37:42.619466  Waiting for reply... done.

 2663 14:37:42.620077  

 2664 14:37:42.622920  My ip is 192.168.201.15

 2665 14:37:42.623381  

 2666 14:37:42.626677  The DHCP server ip is 192.168.201.1

 2667 14:37:42.627238  

 2668 14:37:42.630022  TFTP server IP predefined by user: 192.168.201.1

 2669 14:37:42.630614  

 2670 14:37:42.636643  Bootfile predefined by user: 11299728/tftp-deploy-brhvjn35/kernel/bzImage

 2671 14:37:42.637200  

 2672 14:37:42.639447  Sending tftp read request... done.

 2673 14:37:42.639910  

 2674 14:37:42.649917  Waiting for the transfer... 

 2675 14:37:42.650476  

 2676 14:37:42.919786  00000000 ################################################################

 2677 14:37:42.919924  

 2678 14:37:43.211739  00080000 ################################################################

 2679 14:37:43.211880  

 2680 14:37:43.471157  00100000 ################################################################

 2681 14:37:43.471292  

 2682 14:37:43.739588  00180000 ################################################################

 2683 14:37:43.739723  

 2684 14:37:44.011096  00200000 ################################################################

 2685 14:37:44.011235  

 2686 14:37:44.297531  00280000 ################################################################

 2687 14:37:44.297669  

 2688 14:37:44.563133  00300000 ################################################################

 2689 14:37:44.563269  

 2690 14:37:44.848305  00380000 ################################################################

 2691 14:37:44.848455  

 2692 14:37:45.130755  00400000 ################################################################

 2693 14:37:45.130895  

 2694 14:37:45.417408  00480000 ################################################################

 2695 14:37:45.417540  

 2696 14:37:45.713492  00500000 ################################################################

 2697 14:37:45.713629  

 2698 14:37:46.009212  00580000 ################################################################

 2699 14:37:46.009366  

 2700 14:37:46.286827  00600000 ################################################################

 2701 14:37:46.286961  

 2702 14:37:46.581316  00680000 ################################################################

 2703 14:37:46.581464  

 2704 14:37:46.867620  00700000 ################################################################

 2705 14:37:46.867756  

 2706 14:37:47.148408  00780000 ################################################################

 2707 14:37:47.148546  

 2708 14:37:47.204751  00800000 ############# done.

 2709 14:37:47.204842  

 2710 14:37:47.208005  The bootfile was 8490896 bytes long.

 2711 14:37:47.208089  

 2712 14:37:47.211458  Sending tftp read request... done.

 2713 14:37:47.214697  

 2714 14:37:47.214790  Waiting for the transfer... 

 2715 14:37:47.214863  

 2716 14:37:47.482544  00000000 ################################################################

 2717 14:37:47.482724  

 2718 14:37:47.770347  00080000 ################################################################

 2719 14:37:47.770482  

 2720 14:37:48.063319  00100000 ################################################################

 2721 14:37:48.063459  

 2722 14:37:48.359858  00180000 ################################################################

 2723 14:37:48.360006  

 2724 14:37:48.637069  00200000 ################################################################

 2725 14:37:48.637205  

 2726 14:37:48.905665  00280000 ################################################################

 2727 14:37:48.905797  

 2728 14:37:49.177420  00300000 ################################################################

 2729 14:37:49.177553  

 2730 14:37:49.451322  00380000 ################################################################

 2731 14:37:49.451455  

 2732 14:37:49.718071  00400000 ################################################################

 2733 14:37:49.718225  

 2734 14:37:50.003178  00480000 ################################################################

 2735 14:37:50.003354  

 2736 14:37:50.293736  00500000 ################################################################

 2737 14:37:50.293873  

 2738 14:37:50.579285  00580000 ################################################################

 2739 14:37:50.579420  

 2740 14:37:50.861672  00600000 ################################################################

 2741 14:37:50.861804  

 2742 14:37:51.139036  00680000 ################################################################

 2743 14:37:51.139185  

 2744 14:37:51.426600  00700000 ################################################################

 2745 14:37:51.426726  

 2746 14:37:51.694746  00780000 ################################################################

 2747 14:37:51.694881  

 2748 14:37:51.942021  00800000 ######################################################## done.

 2749 14:37:51.942155  

 2750 14:37:51.945173  Sending tftp read request... done.

 2751 14:37:51.945263  

 2752 14:37:51.948493  Waiting for the transfer... 

 2753 14:37:51.948659  

 2754 14:37:51.948740  00000000 # done.

 2755 14:37:51.948830  

 2756 14:37:51.958643  Command line loaded dynamically from TFTP file: 11299728/tftp-deploy-brhvjn35/kernel/cmdline

 2757 14:37:51.958841  

 2758 14:37:51.975161  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2759 14:37:51.980274  

 2760 14:37:51.983559  Shutting down all USB controllers.

 2761 14:37:51.983822  

 2762 14:37:51.983989  Removing current net device

 2763 14:37:51.984143  

 2764 14:37:51.986853  Finalizing coreboot

 2765 14:37:51.987129  

 2766 14:37:51.993052  Exiting depthcharge with code 4 at timestamp: 22034111

 2767 14:37:51.993370  

 2768 14:37:51.993559  

 2769 14:37:51.993730  Starting kernel ...

 2770 14:37:51.993937  

 2771 14:37:51.994135  

 2772 14:37:51.994990  end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
 2773 14:37:51.995306  start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
 2774 14:37:51.995557  Setting prompt string to ['Linux version [0-9]']
 2775 14:37:51.995782  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2776 14:37:51.996006  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2778 14:42:20.996249  end: 2.2.5 auto-login-action (duration 00:04:29) [common]
 2780 14:42:20.997636  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
 2782 14:42:20.998514  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2785 14:42:20.999961  end: 2 depthcharge-action (duration 00:05:00) [common]
 2787 14:42:21.001078  Cleaning after the job
 2788 14:42:21.001165  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299728/tftp-deploy-brhvjn35/ramdisk
 2789 14:42:21.002458  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299728/tftp-deploy-brhvjn35/kernel
 2790 14:42:21.003743  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299728/tftp-deploy-brhvjn35/modules
 2791 14:42:21.004213  start: 5.1 power-off (timeout 00:00:30) [common]
 2792 14:42:21.004370  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=off'
 2793 14:42:21.082882  >> Command sent successfully.

 2794 14:42:21.088241  Returned 0 in 0 seconds
 2795 14:42:21.189219  end: 5.1 power-off (duration 00:00:00) [common]
 2797 14:42:21.190764  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2798 14:42:21.192065  Listened to connection for namespace 'common' for up to 1s
 2800 14:42:21.193456  Listened to connection for namespace 'common' for up to 1s
 2801 14:42:22.192720  Finalising connection for namespace 'common'
 2802 14:42:22.193373  Disconnecting from shell: Finalise
 2803 14:42:22.193769  
 2804 14:42:22.294960  end: 5.2 read-feedback (duration 00:00:01) [common]
 2805 14:42:22.295600  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299728
 2806 14:42:22.315716  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299728
 2807 14:42:22.315854  JobError: Your job cannot terminate cleanly.