Boot log: dell-latitude-5400-4305U-sarien
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:37:19.004815 lava-dispatcher, installed at version: 2023.06
2 14:37:19.005059 start: 0 validate
3 14:37:19.005215 Start time: 2023-08-16 14:37:19.005206+00:00 (UTC)
4 14:37:19.005375 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:37:19.005548 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 14:37:19.278666 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:37:19.278880 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:37:19.541950 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:37:19.542610 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:37:23.559892 validate duration: 4.55
12 14:37:23.560175 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:37:23.560282 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:37:23.560376 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:37:23.560515 Not decompressing ramdisk as can be used compressed.
16 14:37:23.560611 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 14:37:23.560687 saving as /var/lib/lava/dispatcher/tmp/11299701/tftp-deploy-b4dgo6kr/ramdisk/rootfs.cpio.gz
18 14:37:23.560759 total size: 8418130 (8 MB)
19 14:37:24.071833 progress 0 % (0 MB)
20 14:37:24.074590 progress 5 % (0 MB)
21 14:37:24.077181 progress 10 % (0 MB)
22 14:37:24.079752 progress 15 % (1 MB)
23 14:37:24.082359 progress 20 % (1 MB)
24 14:37:24.084970 progress 25 % (2 MB)
25 14:37:24.087536 progress 30 % (2 MB)
26 14:37:24.089883 progress 35 % (2 MB)
27 14:37:24.092440 progress 40 % (3 MB)
28 14:37:24.094993 progress 45 % (3 MB)
29 14:37:24.097655 progress 50 % (4 MB)
30 14:37:24.100196 progress 55 % (4 MB)
31 14:37:24.102700 progress 60 % (4 MB)
32 14:37:24.105004 progress 65 % (5 MB)
33 14:37:24.107489 progress 70 % (5 MB)
34 14:37:24.110043 progress 75 % (6 MB)
35 14:37:24.112540 progress 80 % (6 MB)
36 14:37:24.115030 progress 85 % (6 MB)
37 14:37:24.117599 progress 90 % (7 MB)
38 14:37:24.120123 progress 95 % (7 MB)
39 14:37:24.122448 progress 100 % (8 MB)
40 14:37:24.122706 8 MB downloaded in 0.56 s (14.29 MB/s)
41 14:37:24.122876 end: 1.1.1 http-download (duration 00:00:01) [common]
43 14:37:24.123136 end: 1.1 download-retry (duration 00:00:01) [common]
44 14:37:24.123238 start: 1.2 download-retry (timeout 00:09:59) [common]
45 14:37:24.123336 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 14:37:24.123489 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:37:24.123568 saving as /var/lib/lava/dispatcher/tmp/11299701/tftp-deploy-b4dgo6kr/kernel/bzImage
48 14:37:24.123635 total size: 8490896 (8 MB)
49 14:37:24.123702 No compression specified
50 14:37:24.124893 progress 0 % (0 MB)
51 14:37:24.127352 progress 5 % (0 MB)
52 14:37:24.129875 progress 10 % (0 MB)
53 14:37:24.132426 progress 15 % (1 MB)
54 14:37:24.135093 progress 20 % (1 MB)
55 14:37:24.137645 progress 25 % (2 MB)
56 14:37:24.140189 progress 30 % (2 MB)
57 14:37:24.142750 progress 35 % (2 MB)
58 14:37:24.145337 progress 40 % (3 MB)
59 14:37:24.147898 progress 45 % (3 MB)
60 14:37:24.150422 progress 50 % (4 MB)
61 14:37:24.152943 progress 55 % (4 MB)
62 14:37:24.155438 progress 60 % (4 MB)
63 14:37:24.157914 progress 65 % (5 MB)
64 14:37:24.160399 progress 70 % (5 MB)
65 14:37:24.162884 progress 75 % (6 MB)
66 14:37:24.165375 progress 80 % (6 MB)
67 14:37:24.167869 progress 85 % (6 MB)
68 14:37:24.170410 progress 90 % (7 MB)
69 14:37:24.173004 progress 95 % (7 MB)
70 14:37:24.175522 progress 100 % (8 MB)
71 14:37:24.175655 8 MB downloaded in 0.05 s (155.68 MB/s)
72 14:37:24.175817 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:37:24.176073 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:37:24.176168 start: 1.3 download-retry (timeout 00:09:59) [common]
76 14:37:24.176264 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 14:37:24.176423 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:37:24.176503 saving as /var/lib/lava/dispatcher/tmp/11299701/tftp-deploy-b4dgo6kr/modules/modules.tar
79 14:37:24.176569 total size: 253808 (0 MB)
80 14:37:24.176637 Using unxz to decompress xz
81 14:37:24.181114 progress 12 % (0 MB)
82 14:37:24.181568 progress 25 % (0 MB)
83 14:37:24.181830 progress 38 % (0 MB)
84 14:37:24.183412 progress 51 % (0 MB)
85 14:37:24.185626 progress 64 % (0 MB)
86 14:37:24.187967 progress 77 % (0 MB)
87 14:37:24.190203 progress 90 % (0 MB)
88 14:37:24.192334 progress 100 % (0 MB)
89 14:37:24.199345 0 MB downloaded in 0.02 s (10.63 MB/s)
90 14:37:24.199623 end: 1.3.1 http-download (duration 00:00:00) [common]
92 14:37:24.199919 end: 1.3 download-retry (duration 00:00:00) [common]
93 14:37:24.200021 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 14:37:24.200127 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 14:37:24.200216 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 14:37:24.200343 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 14:37:24.200627 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag
98 14:37:24.200785 makedir: /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin
99 14:37:24.200907 makedir: /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/tests
100 14:37:24.201024 makedir: /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/results
101 14:37:24.201155 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-add-keys
102 14:37:24.201324 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-add-sources
103 14:37:24.201472 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-background-process-start
104 14:37:24.201618 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-background-process-stop
105 14:37:24.201760 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-common-functions
106 14:37:24.201905 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-echo-ipv4
107 14:37:24.202046 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-install-packages
108 14:37:24.202187 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-installed-packages
109 14:37:24.202326 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-os-build
110 14:37:24.202465 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-probe-channel
111 14:37:24.202610 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-probe-ip
112 14:37:24.202757 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-target-ip
113 14:37:24.202907 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-target-mac
114 14:37:24.203050 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-target-storage
115 14:37:24.203195 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-test-case
116 14:37:24.203371 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-test-event
117 14:37:24.203512 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-test-feedback
118 14:37:24.203654 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-test-raise
119 14:37:24.203797 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-test-reference
120 14:37:24.203940 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-test-runner
121 14:37:24.204080 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-test-set
122 14:37:24.204222 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-test-shell
123 14:37:24.204364 Updating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-install-packages (oe)
124 14:37:24.204537 Updating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/bin/lava-installed-packages (oe)
125 14:37:24.204678 Creating /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/environment
126 14:37:24.204788 LAVA metadata
127 14:37:24.204881 - LAVA_JOB_ID=11299701
128 14:37:24.204961 - LAVA_DISPATCHER_IP=192.168.201.1
129 14:37:24.205077 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 14:37:24.205151 skipped lava-vland-overlay
131 14:37:24.205237 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 14:37:24.205326 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 14:37:24.205397 skipped lava-multinode-overlay
134 14:37:24.205478 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 14:37:24.205567 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 14:37:24.205649 Loading test definitions
137 14:37:24.205750 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 14:37:24.205834 Using /lava-11299701 at stage 0
139 14:37:24.206194 uuid=11299701_1.4.2.3.1 testdef=None
140 14:37:24.206293 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 14:37:24.206390 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 14:37:24.207002 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 14:37:24.207258 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 14:37:24.208017 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 14:37:24.208275 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 14:37:24.208978 runner path: /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/0/tests/0_dmesg test_uuid 11299701_1.4.2.3.1
149 14:37:24.209159 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 14:37:24.209413 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 14:37:24.209492 Using /lava-11299701 at stage 1
153 14:37:24.209836 uuid=11299701_1.4.2.3.5 testdef=None
154 14:37:24.209935 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 14:37:24.210026 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 14:37:24.210560 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 14:37:24.210809 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 14:37:24.211561 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 14:37:24.211815 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 14:37:24.212537 runner path: /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/1/tests/1_bootrr test_uuid 11299701_1.4.2.3.5
163 14:37:24.212709 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 14:37:24.212939 Creating lava-test-runner.conf files
166 14:37:24.213008 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/0 for stage 0
167 14:37:24.213116 - 0_dmesg
168 14:37:24.213203 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299701/lava-overlay-ooy1s0ag/lava-11299701/1 for stage 1
169 14:37:24.213303 - 1_bootrr
170 14:37:24.213407 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 14:37:24.213499 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 14:37:24.223248 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 14:37:24.223387 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 14:37:24.223483 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 14:37:24.223576 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 14:37:24.223670 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 14:37:24.518816 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 14:37:24.519353 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 14:37:24.519529 extracting modules file /var/lib/lava/dispatcher/tmp/11299701/tftp-deploy-b4dgo6kr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299701/extract-overlay-ramdisk-wkiik264/ramdisk
180 14:37:24.543627 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 14:37:24.543849 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 14:37:24.544004 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299701/compress-overlay-azs5xy13/overlay-1.4.2.4.tar.gz to ramdisk
183 14:37:24.544134 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299701/compress-overlay-azs5xy13/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299701/extract-overlay-ramdisk-wkiik264/ramdisk
184 14:37:24.559344 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 14:37:24.559503 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 14:37:24.559632 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 14:37:24.559738 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 14:37:24.559826 Building ramdisk /var/lib/lava/dispatcher/tmp/11299701/extract-overlay-ramdisk-wkiik264/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299701/extract-overlay-ramdisk-wkiik264/ramdisk
189 14:37:24.708865 >> 49827 blocks
190 14:37:25.714811 rename /var/lib/lava/dispatcher/tmp/11299701/extract-overlay-ramdisk-wkiik264/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299701/tftp-deploy-b4dgo6kr/ramdisk/ramdisk.cpio.gz
191 14:37:25.715370 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 14:37:25.715533 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 14:37:25.715712 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 14:37:25.715887 No mkimage arch provided, not using FIT.
195 14:37:25.716033 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 14:37:25.716185 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 14:37:25.716360 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
198 14:37:25.716544 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 14:37:25.716699 No LXC device requested
200 14:37:25.716837 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 14:37:25.716991 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 14:37:25.717131 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 14:37:25.717250 Checking files for TFTP limit of 4294967296 bytes.
204 14:37:25.717886 end: 1 tftp-deploy (duration 00:00:02) [common]
205 14:37:25.718064 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 14:37:25.718234 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 14:37:25.718452 substitutions:
208 14:37:25.718536 - {DTB}: None
209 14:37:25.718608 - {INITRD}: 11299701/tftp-deploy-b4dgo6kr/ramdisk/ramdisk.cpio.gz
210 14:37:25.718684 - {KERNEL}: 11299701/tftp-deploy-b4dgo6kr/kernel/bzImage
211 14:37:25.718758 - {LAVA_MAC}: None
212 14:37:25.718873 - {PRESEED_CONFIG}: None
213 14:37:25.718967 - {PRESEED_LOCAL}: None
214 14:37:25.719071 - {RAMDISK}: 11299701/tftp-deploy-b4dgo6kr/ramdisk/ramdisk.cpio.gz
215 14:37:25.719175 - {ROOT_PART}: None
216 14:37:25.719272 - {ROOT}: None
217 14:37:25.719335 - {SERVER_IP}: 192.168.201.1
218 14:37:25.719394 - {TEE}: None
219 14:37:25.719464 Parsed boot commands:
220 14:37:25.719559 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 14:37:25.719823 Parsed boot commands: tftpboot 192.168.201.1 11299701/tftp-deploy-b4dgo6kr/kernel/bzImage 11299701/tftp-deploy-b4dgo6kr/kernel/cmdline 11299701/tftp-deploy-b4dgo6kr/ramdisk/ramdisk.cpio.gz
222 14:37:25.719987 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 14:37:25.720118 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 14:37:25.720260 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 14:37:25.720416 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 14:37:25.720544 Not connected, no need to disconnect.
227 14:37:25.720661 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 14:37:25.720960 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 14:37:25.721070 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-4305U-sarien-cbg-1'
230 14:37:25.725539 Setting prompt string to ['lava-test: # ']
231 14:37:25.725991 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 14:37:25.726175 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 14:37:25.726322 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 14:37:25.726443 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 14:37:25.726832 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=reboot'
236 14:37:42.622667 >> Command sent successfully.
237 14:37:42.625317 Returned 0 in 16 seconds
238 14:37:42.725756 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 14:37:42.726271 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 14:37:42.726439 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 14:37:42.726581 Setting prompt string to 'Starting depthcharge on sarien...'
243 14:37:42.726703 Changing prompt to 'Starting depthcharge on sarien...'
244 14:37:42.726827 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 14:37:42.727300 [Enter `^Ec?' for help]
246 14:37:42.727457
247 14:37:42.727590
248 14:37:42.727721 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 14:37:42.727827 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
250 14:37:42.727932 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 14:37:42.728043 CPU: AES supported, TXT NOT supported, VT supported
252 14:37:42.728144 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
253 14:37:42.728242 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 14:37:42.728337 IGD: device id 3ea1 (rev 02) is Unknown
255 14:37:42.728435 VBOOT: Loading verstage.
256 14:37:42.728534 CBFS @ 1d00000 size 300000
257 14:37:42.728635 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 14:37:42.728733 CBFS: Locating 'fallback/verstage'
259 14:37:42.728839 CBFS: Found @ offset 10f6c0 size 1435c
260 14:37:42.728935
261 14:37:42.729027
262 14:37:42.729126 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 14:37:42.729221 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 14:37:42.729314 done! DID_VID 0x00281ae0
265 14:37:42.729413 TPM ready after 0 ms
266 14:37:42.729510 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 14:37:42.729607 tlcl_send_startup: Startup return code is 0
268 14:37:42.729703 TPM: setup succeeded
269 14:37:42.729797 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 14:37:42.729895 Checking cr50 for recovery request
271 14:37:42.730001 Phase 1
272 14:37:42.730105 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 14:37:42.730202 FMAP: base = fe000000 size = 2000000 #areas = 37
274 14:37:42.730296 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 14:37:42.730374 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 14:37:42.730435 Phase 2
277 14:37:42.730500 Phase 3
278 14:37:42.730599 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 14:37:42.730695 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 14:37:42.730790 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
281 14:37:42.730888 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
282 14:37:42.730981 VB2:vb2_verify_keyblock() Checking key block signature...
283 14:37:42.731091 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
284 14:37:42.731185 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
285 14:37:42.731290 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 14:37:42.731362 Phase 4
287 14:37:42.731423 FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
288 14:37:42.731484 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 14:37:42.731549 VB2:vb2_rsa_verify_digest() Digest check failed!
290 14:37:42.731618 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 14:37:42.731711 Saving nvdata
292 14:37:42.731808 Reboot requested (10020007)
293 14:37:42.731922 board_reset() called!
294 14:37:42.732078 full_reset() called!
295 14:37:46.917309
296 14:37:46.917480
297 14:37:46.925472 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 14:37:46.930501 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
299 14:37:46.934937 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 14:37:46.940216 CPU: AES supported, TXT NOT supported, VT supported
301 14:37:46.945547 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
302 14:37:46.950783 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 14:37:46.954743 IGD: device id 3ea1 (rev 02) is Unknown
304 14:37:46.958231 VBOOT: Loading verstage.
305 14:37:46.960931 CBFS @ 1d00000 size 300000
306 14:37:46.966948 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 14:37:46.970806 CBFS: Locating 'fallback/verstage'
308 14:37:46.974377 CBFS: Found @ offset 10f6c0 size 1435c
309 14:37:46.988567
310 14:37:46.988883
311 14:37:46.997442 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 14:37:47.004029 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 14:37:47.006435 done! DID_VID 0x00281ae0
314 14:37:47.008686 TPM ready after 0 ms
315 14:37:47.013293 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 14:37:47.106969 tlcl_send_startup: Startup return code is 0
317 14:37:47.108680 TPM: setup succeeded
318 14:37:47.127621 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 14:37:47.130735 Checking cr50 for recovery request
320 14:37:47.141248 Phase 1
321 14:37:47.145549 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 14:37:47.150051 FMAP: base = fe000000 size = 2000000 #areas = 37
323 14:37:47.155302 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 14:37:47.161888 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 14:37:47.168439 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 14:37:47.171376 Recovery requested (1009000e)
327 14:37:47.172674 Saving nvdata
328 14:37:47.189430 tlcl_extend: response is 0
329 14:37:47.204755 tlcl_extend: response is 0
330 14:37:47.209072 CBFS @ 1d00000 size 300000
331 14:37:47.214922 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 14:37:47.218200 CBFS: Locating 'fallback/romstage'
333 14:37:47.221886 CBFS: Found @ offset 80 size 15b2c
334 14:37:47.223667
335 14:37:47.223791
336 14:37:47.231801 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 14:37:47.236852 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 14:37:47.241434 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 14:37:47.245846 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 14:37:47.249783 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 14:37:47.254022 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 14:37:47.256040 TCO_STS: 0000 0004
343 14:37:47.258982 GEN_PMCON: d0015209 00002200
344 14:37:47.262091 GBLRST_CAUSE: 00000000 00000000
345 14:37:47.264258 prev_sleep_state 5
346 14:37:47.268519 Boot Count incremented to 26435
347 14:37:47.271257 CBFS @ 1d00000 size 300000
348 14:37:47.277083 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 14:37:47.280284 CBFS: Locating 'fspm.bin'
350 14:37:47.283840 CBFS: Found @ offset 60fc0 size 70000
351 14:37:47.289023 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 14:37:47.294311 FMAP: base = fe000000 size = 2000000 #areas = 37
353 14:37:47.299673 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 14:37:47.306050 Probing TPM I2C: done! DID_VID 0x00281ae0
355 14:37:47.308827 Locality already claimed
356 14:37:47.312705 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 14:37:47.331424 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 14:37:47.338216 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 14:37:47.340884 MRC cache found, size 18e0
360 14:37:47.343125 bootmode is set to :2
361 14:37:47.432168 CBMEM:
362 14:37:47.435417 IMD: root @ 89fff000 254 entries.
363 14:37:47.438800 IMD: root @ 89ffec00 62 entries.
364 14:37:47.441195 External stage cache:
365 14:37:47.444957 IMD: root @ 8abff000 254 entries.
366 14:37:47.448310 IMD: root @ 8abfec00 62 entries.
367 14:37:47.454544 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 14:37:47.457607 creating vboot_handoff structure
369 14:37:47.478560 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 14:37:47.493825 tlcl_write: response is 0
371 14:37:47.513192 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 14:37:47.517293 MRC: TPM MRC hash updated successfully.
373 14:37:47.519580 1 DIMMs found
374 14:37:47.520944 top_of_ram = 0x8a000000
375 14:37:47.526814 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 14:37:47.531217 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 14:37:47.534160 CBFS @ 1d00000 size 300000
378 14:37:47.540266 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 14:37:47.544114 CBFS: Locating 'fallback/postcar'
380 14:37:47.547589 CBFS: Found @ offset 107000 size 41a4
381 14:37:47.553659 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 14:37:47.564740 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 14:37:47.569181 Processing 126 relocs. Offset value of 0x87cdd000
384 14:37:47.571470
385 14:37:47.571588
386 14:37:47.579844 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 14:37:47.583071 CBFS @ 1d00000 size 300000
388 14:37:47.589227 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 14:37:47.592822 CBFS: Locating 'fallback/ramstage'
390 14:37:47.596413 CBFS: Found @ offset 458c0 size 1a8a8
391 14:37:47.602983 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 14:37:47.629886 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 14:37:47.635580 Processing 3754 relocs. Offset value of 0x88e81000
394 14:37:47.640888
395 14:37:47.641003
396 14:37:47.649015 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 14:37:47.653614 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 14:37:47.658523 FMAP: base = fe000000 size = 2000000 #areas = 37
399 14:37:47.663394 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 14:37:47.668329 WARNING: RO_VPD is uninitialized or empty.
401 14:37:47.672884 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 14:37:47.677308 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 14:37:47.678493 Normal boot.
404 14:37:47.685258 BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1161
405 14:37:47.688279 CBFS @ 1d00000 size 300000
406 14:37:47.694194 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 14:37:47.698101 CBFS: Locating 'cpu_microcode_blob.bin'
408 14:37:47.702101 CBFS: Found @ offset 15c40 size 2fc00
409 14:37:47.706245 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 14:37:47.708822 Skip microcode update
411 14:37:47.711603 CBFS @ 1d00000 size 300000
412 14:37:47.718149 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 14:37:47.720370 CBFS: Locating 'fsps.bin'
414 14:37:47.724176 CBFS: Found @ offset d1fc0 size 35000
415 14:37:47.759013 Detected 2 core, 2 thread CPU.
416 14:37:47.761486 Setting up SMI for CPU
417 14:37:47.763715 IED base = 0x8ac00000
418 14:37:47.765758 IED size = 0x00400000
419 14:37:47.769281 Will perform SMM setup.
420 14:37:47.772942 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
421 14:37:47.780896 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 14:37:47.785792 Processing 16 relocs. Offset value of 0x00030000
423 14:37:47.788668 Attempting to start 1 APs
424 14:37:47.792259 Waiting for 10ms after sending INIT.
425 14:37:47.806642 Waiting for 1st SIPI to complete...done.
426 14:37:47.808900 AP: slot 1 apic_id 2.
427 14:37:47.812839 Waiting for 2nd SIPI to complete...done.
428 14:37:47.822365 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
429 14:37:47.825781 Processing 13 relocs. Offset value of 0x00038000
430 14:37:47.831578 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
431 14:37:47.835477 Installing SMM handler to 0x8a000000
432 14:37:47.843395 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
433 14:37:47.848934 Processing 867 relocs. Offset value of 0x8a010000
434 14:37:47.856822 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
435 14:37:47.861898 Processing 13 relocs. Offset value of 0x8a008000
436 14:37:47.867859 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
437 14:37:47.874677 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
438 14:37:47.877096 Clearing SMI status registers
439 14:37:47.879130 SMI_STS: PM1
440 14:37:47.880854 PM1_STS: WAK PWRBTN
441 14:37:47.883821 TCO_STS: BOOT SECOND_TO
442 14:37:47.885529 GPE0 STD STS: eSPI
443 14:37:47.888535 New SMBASE 0x8a000000
444 14:37:47.890978 In relocation handler: CPU 0
445 14:37:47.894923 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
446 14:37:47.899724 Writing SMRR. base = 0x8a000006, mask=0xff000800
447 14:37:47.902125 Relocation complete.
448 14:37:47.903741 New SMBASE 0x89fffc00
449 14:37:47.906747 In relocation handler: CPU 1
450 14:37:47.911154 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
451 14:37:47.916042 Writing SMRR. base = 0x8a000006, mask=0xff000800
452 14:37:47.918102 Relocation complete.
453 14:37:47.920254 Initializing CPU #0
454 14:37:47.923412 CPU: vendor Intel device 806ec
455 14:37:47.926987 CPU: family 06, model 8e, stepping 0c
456 14:37:47.929910 Clearing out pending MCEs
457 14:37:47.934483 Setting up local APIC... apic_id: 0x00 done.
458 14:37:47.937499 Turbo is available but hidden
459 14:37:47.939806 Turbo has been enabled
460 14:37:47.942099 VMX status: enabled
461 14:37:47.945626 IA32_FEATURE_CONTROL status: locked
462 14:37:47.947756 Skip microcode update
463 14:37:47.949708 CPU #0 initialized
464 14:37:47.951895 Initializing CPU #1
465 14:37:47.954670 CPU: vendor Intel device 806ec
466 14:37:47.958541 CPU: family 06, model 8e, stepping 0c
467 14:37:47.961931 Clearing out pending MCEs
468 14:37:47.965999 Setting up local APIC... apic_id: 0x02 done.
469 14:37:47.968208 VMX status: enabled
470 14:37:47.972319 IA32_FEATURE_CONTROL status: locked
471 14:37:47.974077 Skip microcode update
472 14:37:47.976311 CPU #1 initialized
473 14:37:47.980248 bsp_do_flight_plan done after 163 msecs.
474 14:37:47.983549 CPU: frequency set to 2200 MHz
475 14:37:47.984891 Enabling SMIs.
476 14:37:47.985935 Locking SMM.
477 14:37:47.989654 CBFS @ 1d00000 size 300000
478 14:37:47.995600 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
479 14:37:47.998416 CBFS: Locating 'vbt.bin'
480 14:37:48.001681 CBFS: Found @ offset 60a40 size 4a0
481 14:37:48.006823 Found a VBT of 4608 bytes after decompression
482 14:37:48.020632 FMAP: area GBB found @ 1c11000 (978944 bytes)
483 14:37:48.137646 Detected 2 core, 2 thread CPU.
484 14:37:48.141174 Detected 2 core, 2 thread CPU.
485 14:37:48.368847 Display FSP Version Info HOB
486 14:37:48.371918 Reference Code - CPU = 7.0.5e.40
487 14:37:48.373763 uCode Version = 0.0.0.b8
488 14:37:48.377226 Display FSP Version Info HOB
489 14:37:48.380095 Reference Code - ME = 7.0.5e.40
490 14:37:48.382597 MEBx version = 0.0.0.0
491 14:37:48.386219 ME Firmware Version = Consumer SKU
492 14:37:48.389168 Display FSP Version Info HOB
493 14:37:48.392654 Reference Code - CNL PCH = 7.0.5e.40
494 14:37:48.395415 PCH-CRID Status = Disabled
495 14:37:48.398849 CNL PCH H A0 Hsio Version = 2.0.0.0
496 14:37:48.402414 CNL PCH H Ax Hsio Version = 9.0.0.0
497 14:37:48.406179 CNL PCH H Bx Hsio Version = a.0.0.0
498 14:37:48.409988 CNL PCH LP B0 Hsio Version = 7.0.0.0
499 14:37:48.414046 CNL PCH LP Bx Hsio Version = 6.0.0.0
500 14:37:48.417205 CNL PCH LP Dx Hsio Version = 7.0.0.0
501 14:37:48.420122 Display FSP Version Info HOB
502 14:37:48.425538 Reference Code - SA - System Agent = 7.0.5e.40
503 14:37:48.428427 Reference Code - MRC = 0.7.1.68
504 14:37:48.430942 SA - PCIe Version = 7.0.5e.40
505 14:37:48.433445 SA-CRID Status = Disabled
506 14:37:48.436869 SA-CRID Original Value = 0.0.0.c
507 14:37:48.440250 SA-CRID New Value = 0.0.0.c
508 14:37:48.458173 RTC Init
509 14:37:48.461867 Set power off after power failure.
510 14:37:48.463696 Disabling Deep S3
511 14:37:48.465923 Disabling Deep S3
512 14:37:48.467773 Disabling Deep S4
513 14:37:48.469611 Disabling Deep S4
514 14:37:48.471479 Disabling Deep S5
515 14:37:48.473131 Disabling Deep S5
516 14:37:48.480206 BS: BS_DEV_INIT_CHIPS times (us): entry 301009 run 470814 exit 16232
517 14:37:48.482287 Enumerating buses...
518 14:37:48.486995 Show all devs... Before device enumeration.
519 14:37:48.488958 Root Device: enabled 1
520 14:37:48.491726 CPU_CLUSTER: 0: enabled 1
521 14:37:48.494079 DOMAIN: 0000: enabled 1
522 14:37:48.496212 APIC: 00: enabled 1
523 14:37:48.498229 PCI: 00:00.0: enabled 1
524 14:37:48.501606 PCI: 00:02.0: enabled 1
525 14:37:48.503419 PCI: 00:04.0: enabled 1
526 14:37:48.505687 PCI: 00:12.0: enabled 1
527 14:37:48.508142 PCI: 00:12.5: enabled 0
528 14:37:48.510451 PCI: 00:12.6: enabled 0
529 14:37:48.513502 PCI: 00:13.0: enabled 0
530 14:37:48.515535 PCI: 00:14.0: enabled 1
531 14:37:48.518010 PCI: 00:14.1: enabled 0
532 14:37:48.520777 PCI: 00:14.3: enabled 1
533 14:37:48.522540 PCI: 00:14.5: enabled 0
534 14:37:48.525841 PCI: 00:15.0: enabled 1
535 14:37:48.527730 PCI: 00:15.1: enabled 1
536 14:37:48.529947 PCI: 00:15.2: enabled 0
537 14:37:48.532721 PCI: 00:15.3: enabled 0
538 14:37:48.535637 PCI: 00:16.0: enabled 1
539 14:37:48.537663 PCI: 00:16.1: enabled 0
540 14:37:48.539808 PCI: 00:16.2: enabled 0
541 14:37:48.542465 PCI: 00:16.3: enabled 0
542 14:37:48.544838 PCI: 00:16.4: enabled 0
543 14:37:48.546951 PCI: 00:16.5: enabled 0
544 14:37:48.549701 PCI: 00:17.0: enabled 1
545 14:37:48.551913 PCI: 00:19.0: enabled 1
546 14:37:48.554837 PCI: 00:19.1: enabled 0
547 14:37:48.557136 PCI: 00:19.2: enabled 1
548 14:37:48.559164 PCI: 00:1a.0: enabled 0
549 14:37:48.561410 PCI: 00:1c.0: enabled 1
550 14:37:48.563956 PCI: 00:1c.1: enabled 0
551 14:37:48.566745 PCI: 00:1c.2: enabled 0
552 14:37:48.568649 PCI: 00:1c.3: enabled 0
553 14:37:48.571701 PCI: 00:1c.4: enabled 0
554 14:37:48.573577 PCI: 00:1c.5: enabled 0
555 14:37:48.575938 PCI: 00:1c.6: enabled 0
556 14:37:48.579101 PCI: 00:1c.7: enabled 1
557 14:37:48.581660 PCI: 00:1d.0: enabled 1
558 14:37:48.583657 PCI: 00:1d.1: enabled 1
559 14:37:48.585993 PCI: 00:1d.2: enabled 0
560 14:37:48.588130 PCI: 00:1d.3: enabled 0
561 14:37:48.590702 PCI: 00:1d.4: enabled 1
562 14:37:48.593436 PCI: 00:1e.0: enabled 0
563 14:37:48.595656 PCI: 00:1e.1: enabled 0
564 14:37:48.598793 PCI: 00:1e.2: enabled 0
565 14:37:48.601049 PCI: 00:1e.3: enabled 0
566 14:37:48.603008 PCI: 00:1f.0: enabled 1
567 14:37:48.605648 PCI: 00:1f.1: enabled 1
568 14:37:48.608040 PCI: 00:1f.2: enabled 1
569 14:37:48.610706 PCI: 00:1f.3: enabled 1
570 14:37:48.612453 PCI: 00:1f.4: enabled 1
571 14:37:48.615196 PCI: 00:1f.5: enabled 1
572 14:37:48.617665 PCI: 00:1f.6: enabled 1
573 14:37:48.619982 USB0 port 0: enabled 1
574 14:37:48.621937 I2C: 00:10: enabled 1
575 14:37:48.624284 I2C: 00:10: enabled 1
576 14:37:48.626603 I2C: 00:34: enabled 1
577 14:37:48.629000 I2C: 00:2c: enabled 1
578 14:37:48.630999 I2C: 00:50: enabled 1
579 14:37:48.633248 PNP: 0c09.0: enabled 1
580 14:37:48.635647 USB2 port 0: enabled 1
581 14:37:48.637849 USB2 port 1: enabled 1
582 14:37:48.640136 USB2 port 2: enabled 1
583 14:37:48.642539 USB2 port 4: enabled 1
584 14:37:48.644802 USB2 port 5: enabled 1
585 14:37:48.647184 USB2 port 6: enabled 1
586 14:37:48.650325 USB2 port 7: enabled 1
587 14:37:48.652645 USB2 port 8: enabled 1
588 14:37:48.654544 USB2 port 9: enabled 1
589 14:37:48.656978 USB3 port 0: enabled 1
590 14:37:48.659603 USB3 port 1: enabled 1
591 14:37:48.661426 USB3 port 2: enabled 1
592 14:37:48.663831 USB3 port 3: enabled 1
593 14:37:48.666283 USB3 port 4: enabled 1
594 14:37:48.668284 APIC: 02: enabled 1
595 14:37:48.670038 Compare with tree...
596 14:37:48.672831 Root Device: enabled 1
597 14:37:48.675714 CPU_CLUSTER: 0: enabled 1
598 14:37:48.677370 APIC: 00: enabled 1
599 14:37:48.679949 APIC: 02: enabled 1
600 14:37:48.682674 DOMAIN: 0000: enabled 1
601 14:37:48.685625 PCI: 00:00.0: enabled 1
602 14:37:48.687595 PCI: 00:02.0: enabled 1
603 14:37:48.690214 PCI: 00:04.0: enabled 1
604 14:37:48.692572 PCI: 00:12.0: enabled 1
605 14:37:48.695661 PCI: 00:12.5: enabled 0
606 14:37:48.697988 PCI: 00:12.6: enabled 0
607 14:37:48.700596 PCI: 00:13.0: enabled 0
608 14:37:48.702968 PCI: 00:14.0: enabled 1
609 14:37:48.705692 USB0 port 0: enabled 1
610 14:37:48.708490 USB2 port 0: enabled 1
611 14:37:48.711360 USB2 port 1: enabled 1
612 14:37:48.713958 USB2 port 2: enabled 1
613 14:37:48.716903 USB2 port 4: enabled 1
614 14:37:48.720005 USB2 port 5: enabled 1
615 14:37:48.722546 USB2 port 6: enabled 1
616 14:37:48.724958 USB2 port 7: enabled 1
617 14:37:48.727931 USB2 port 8: enabled 1
618 14:37:48.730266 USB2 port 9: enabled 1
619 14:37:48.732969 USB3 port 0: enabled 1
620 14:37:48.736090 USB3 port 1: enabled 1
621 14:37:48.738793 USB3 port 2: enabled 1
622 14:37:48.741302 USB3 port 3: enabled 1
623 14:37:48.743935 USB3 port 4: enabled 1
624 14:37:48.747185 PCI: 00:14.1: enabled 0
625 14:37:48.749732 PCI: 00:14.3: enabled 1
626 14:37:48.752461 PCI: 00:14.5: enabled 0
627 14:37:48.754385 PCI: 00:15.0: enabled 1
628 14:37:48.757333 I2C: 00:10: enabled 1
629 14:37:48.759443 I2C: 00:10: enabled 1
630 14:37:48.762236 I2C: 00:34: enabled 1
631 14:37:48.764958 PCI: 00:15.1: enabled 1
632 14:37:48.767838 I2C: 00:2c: enabled 1
633 14:37:48.769763 PCI: 00:15.2: enabled 0
634 14:37:48.772947 PCI: 00:15.3: enabled 0
635 14:37:48.774897 PCI: 00:16.0: enabled 1
636 14:37:48.778114 PCI: 00:16.1: enabled 0
637 14:37:48.780613 PCI: 00:16.2: enabled 0
638 14:37:48.782998 PCI: 00:16.3: enabled 0
639 14:37:48.785432 PCI: 00:16.4: enabled 0
640 14:37:48.788270 PCI: 00:16.5: enabled 0
641 14:37:48.790787 PCI: 00:17.0: enabled 1
642 14:37:48.793480 PCI: 00:19.0: enabled 1
643 14:37:48.796420 I2C: 00:50: enabled 1
644 14:37:48.798772 PCI: 00:19.1: enabled 0
645 14:37:48.801132 PCI: 00:19.2: enabled 1
646 14:37:48.803685 PCI: 00:1a.0: enabled 0
647 14:37:48.806593 PCI: 00:1c.0: enabled 1
648 14:37:48.809482 PCI: 00:1c.1: enabled 0
649 14:37:48.811762 PCI: 00:1c.2: enabled 0
650 14:37:48.814342 PCI: 00:1c.3: enabled 0
651 14:37:48.817155 PCI: 00:1c.4: enabled 0
652 14:37:48.819856 PCI: 00:1c.5: enabled 0
653 14:37:48.822711 PCI: 00:1c.6: enabled 0
654 14:37:48.824713 PCI: 00:1c.7: enabled 1
655 14:37:48.827902 PCI: 00:1d.0: enabled 1
656 14:37:48.830012 PCI: 00:1d.1: enabled 1
657 14:37:48.832872 PCI: 00:1d.2: enabled 0
658 14:37:48.835659 PCI: 00:1d.3: enabled 0
659 14:37:48.838449 PCI: 00:1d.4: enabled 1
660 14:37:48.840956 PCI: 00:1e.0: enabled 0
661 14:37:48.843267 PCI: 00:1e.1: enabled 0
662 14:37:48.845583 PCI: 00:1e.2: enabled 0
663 14:37:48.848805 PCI: 00:1e.3: enabled 0
664 14:37:48.851569 PCI: 00:1f.0: enabled 1
665 14:37:48.853721 PNP: 0c09.0: enabled 1
666 14:37:48.856208 PCI: 00:1f.1: enabled 1
667 14:37:48.859276 PCI: 00:1f.2: enabled 1
668 14:37:48.862003 PCI: 00:1f.3: enabled 1
669 14:37:48.864261 PCI: 00:1f.4: enabled 1
670 14:37:48.866765 PCI: 00:1f.5: enabled 1
671 14:37:48.869414 PCI: 00:1f.6: enabled 1
672 14:37:48.871843 Root Device scanning...
673 14:37:48.875944 root_dev_scan_bus for Root Device
674 14:37:48.878571 CPU_CLUSTER: 0 enabled
675 14:37:48.879827 DOMAIN: 0000 enabled
676 14:37:48.882700 DOMAIN: 0000 scanning...
677 14:37:48.885592 PCI: pci_scan_bus for bus 00
678 14:37:48.888822 PCI: 00:00.0 [8086/0000] ops
679 14:37:48.892060 PCI: 00:00.0 [8086/3e35] enabled
680 14:37:48.895197 PCI: 00:02.0 [8086/0000] ops
681 14:37:48.898894 PCI: 00:02.0 [8086/3ea1] enabled
682 14:37:48.902028 PCI: 00:04.0 [8086/1903] enabled
683 14:37:48.905046 PCI: 00:08.0 [8086/1911] enabled
684 14:37:48.908458 PCI: 00:12.0 [8086/9df9] enabled
685 14:37:48.911796 PCI: 00:14.0 [8086/0000] bus ops
686 14:37:48.915352 PCI: 00:14.0 [8086/9ded] enabled
687 14:37:48.918805 PCI: 00:14.2 [8086/9def] enabled
688 14:37:48.921909 PCI: 00:14.3 [8086/9df0] enabled
689 14:37:48.925131 PCI: 00:15.0 [8086/0000] bus ops
690 14:37:48.928624 PCI: 00:15.0 [8086/9de8] enabled
691 14:37:48.931846 PCI: 00:15.1 [8086/0000] bus ops
692 14:37:48.934828 PCI: 00:15.1 [8086/9de9] enabled
693 14:37:48.937893 PCI: 00:16.0 [8086/0000] ops
694 14:37:48.941331 PCI: 00:16.0 [8086/9de0] enabled
695 14:37:48.944254 PCI: 00:17.0 [8086/0000] ops
696 14:37:48.947637 PCI: 00:17.0 [8086/9dd3] enabled
697 14:37:48.950970 PCI: 00:19.0 [8086/0000] bus ops
698 14:37:48.953959 PCI: 00:19.0 [8086/9dc5] enabled
699 14:37:48.957018 PCI: 00:19.2 [8086/0000] ops
700 14:37:48.960476 PCI: 00:19.2 [8086/9dc7] enabled
701 14:37:48.964295 PCI: 00:1c.0 [8086/0000] bus ops
702 14:37:48.967379 PCI: 00:1c.0 [8086/9dbf] enabled
703 14:37:48.973523 PCI: Static device PCI: 00:1c.7 not found, disabling it.
704 14:37:48.975787 PCI: 00:1d.0 [8086/0000] bus ops
705 14:37:48.979847 PCI: 00:1d.0 [8086/9db4] enabled
706 14:37:48.985185 PCI: Static device PCI: 00:1d.1 not found, disabling it.
707 14:37:48.990730 PCI: Static device PCI: 00:1d.4 not found, disabling it.
708 14:37:48.993795 PCI: 00:1f.0 [8086/0000] bus ops
709 14:37:48.997142 PCI: 00:1f.0 [8086/9d84] enabled
710 14:37:49.003249 PCI: Static device PCI: 00:1f.1 not found, disabling it.
711 14:37:49.008641 PCI: Static device PCI: 00:1f.2 not found, disabling it.
712 14:37:49.011921 PCI: 00:1f.3 [8086/0000] bus ops
713 14:37:49.015810 PCI: 00:1f.3 [8086/9dc8] enabled
714 14:37:49.018724 PCI: 00:1f.4 [8086/0000] bus ops
715 14:37:49.021816 PCI: 00:1f.4 [8086/9da3] enabled
716 14:37:49.025281 PCI: 00:1f.5 [8086/0000] bus ops
717 14:37:49.028476 PCI: 00:1f.5 [8086/9da4] enabled
718 14:37:49.031539 PCI: 00:1f.6 [8086/15be] enabled
719 14:37:49.034915 PCI: Leftover static devices:
720 14:37:49.036762 PCI: 00:12.5
721 14:37:49.037452 PCI: 00:12.6
722 14:37:49.039064 PCI: 00:13.0
723 14:37:49.040393 PCI: 00:14.1
724 14:37:49.041925 PCI: 00:14.5
725 14:37:49.043622 PCI: 00:15.2
726 14:37:49.044922 PCI: 00:15.3
727 14:37:49.046103 PCI: 00:16.1
728 14:37:49.046756 PCI: 00:16.2
729 14:37:49.048778 PCI: 00:16.3
730 14:37:49.049646 PCI: 00:16.4
731 14:37:49.051420 PCI: 00:16.5
732 14:37:49.052499 PCI: 00:19.1
733 14:37:49.054271 PCI: 00:1a.0
734 14:37:49.055221 PCI: 00:1c.1
735 14:37:49.056494 PCI: 00:1c.2
736 14:37:49.058196 PCI: 00:1c.3
737 14:37:49.059603 PCI: 00:1c.4
738 14:37:49.060814 PCI: 00:1c.5
739 14:37:49.062027 PCI: 00:1c.6
740 14:37:49.063467 PCI: 00:1c.7
741 14:37:49.065054 PCI: 00:1d.1
742 14:37:49.066336 PCI: 00:1d.2
743 14:37:49.067312 PCI: 00:1d.3
744 14:37:49.069362 PCI: 00:1d.4
745 14:37:49.070495 PCI: 00:1e.0
746 14:37:49.071834 PCI: 00:1e.1
747 14:37:49.073288 PCI: 00:1e.2
748 14:37:49.075073 PCI: 00:1e.3
749 14:37:49.075878 PCI: 00:1f.1
750 14:37:49.077023 PCI: 00:1f.2
751 14:37:49.080302 PCI: Check your devicetree.cb.
752 14:37:49.083257 PCI: 00:14.0 scanning...
753 14:37:49.086758 scan_usb_bus for PCI: 00:14.0
754 14:37:49.088056 USB0 port 0 enabled
755 14:37:49.090651 USB0 port 0 scanning...
756 14:37:49.094188 scan_usb_bus for USB0 port 0
757 14:37:49.095645 USB2 port 0 enabled
758 14:37:49.097864 USB2 port 1 enabled
759 14:37:49.099683 USB2 port 2 enabled
760 14:37:49.101872 USB2 port 4 enabled
761 14:37:49.104560 USB2 port 5 enabled
762 14:37:49.106009 USB2 port 6 enabled
763 14:37:49.107923 USB2 port 7 enabled
764 14:37:49.110550 USB2 port 8 enabled
765 14:37:49.112486 USB2 port 9 enabled
766 14:37:49.114619 USB3 port 0 enabled
767 14:37:49.116473 USB3 port 1 enabled
768 14:37:49.118260 USB3 port 2 enabled
769 14:37:49.120610 USB3 port 3 enabled
770 14:37:49.122086 USB3 port 4 enabled
771 14:37:49.124592 USB2 port 0 scanning...
772 14:37:49.128438 scan_usb_bus for USB2 port 0
773 14:37:49.131463 scan_usb_bus for USB2 port 0 done
774 14:37:49.136568 scan_bus: scanning of bus USB2 port 0 took 9060 usecs
775 14:37:49.139099 USB2 port 1 scanning...
776 14:37:49.142703 scan_usb_bus for USB2 port 1
777 14:37:49.145851 scan_usb_bus for USB2 port 1 done
778 14:37:49.151068 scan_bus: scanning of bus USB2 port 1 took 9063 usecs
779 14:37:49.153426 USB2 port 2 scanning...
780 14:37:49.156773 scan_usb_bus for USB2 port 2
781 14:37:49.160211 scan_usb_bus for USB2 port 2 done
782 14:37:49.165446 scan_bus: scanning of bus USB2 port 2 took 9061 usecs
783 14:37:49.167872 USB2 port 4 scanning...
784 14:37:49.171327 scan_usb_bus for USB2 port 4
785 14:37:49.174956 scan_usb_bus for USB2 port 4 done
786 14:37:49.180599 scan_bus: scanning of bus USB2 port 4 took 9063 usecs
787 14:37:49.182403 USB2 port 5 scanning...
788 14:37:49.185844 scan_usb_bus for USB2 port 5
789 14:37:49.189189 scan_usb_bus for USB2 port 5 done
790 14:37:49.194864 scan_bus: scanning of bus USB2 port 5 took 9062 usecs
791 14:37:49.196575 USB2 port 6 scanning...
792 14:37:49.200762 scan_usb_bus for USB2 port 6
793 14:37:49.203684 scan_usb_bus for USB2 port 6 done
794 14:37:49.208597 scan_bus: scanning of bus USB2 port 6 took 9060 usecs
795 14:37:49.211857 USB2 port 7 scanning...
796 14:37:49.214676 scan_usb_bus for USB2 port 7
797 14:37:49.217965 scan_usb_bus for USB2 port 7 done
798 14:37:49.223686 scan_bus: scanning of bus USB2 port 7 took 9061 usecs
799 14:37:49.225636 USB2 port 8 scanning...
800 14:37:49.228599 scan_usb_bus for USB2 port 8
801 14:37:49.232847 scan_usb_bus for USB2 port 8 done
802 14:37:49.238119 scan_bus: scanning of bus USB2 port 8 took 9063 usecs
803 14:37:49.240597 USB2 port 9 scanning...
804 14:37:49.243717 scan_usb_bus for USB2 port 9
805 14:37:49.246843 scan_usb_bus for USB2 port 9 done
806 14:37:49.252021 scan_bus: scanning of bus USB2 port 9 took 9060 usecs
807 14:37:49.254218 USB3 port 0 scanning...
808 14:37:49.258181 scan_usb_bus for USB3 port 0
809 14:37:49.261796 scan_usb_bus for USB3 port 0 done
810 14:37:49.266348 scan_bus: scanning of bus USB3 port 0 took 9059 usecs
811 14:37:49.268814 USB3 port 1 scanning...
812 14:37:49.271962 scan_usb_bus for USB3 port 1
813 14:37:49.275561 scan_usb_bus for USB3 port 1 done
814 14:37:49.280641 scan_bus: scanning of bus USB3 port 1 took 9061 usecs
815 14:37:49.283446 USB3 port 2 scanning...
816 14:37:49.286242 scan_usb_bus for USB3 port 2
817 14:37:49.289740 scan_usb_bus for USB3 port 2 done
818 14:37:49.295114 scan_bus: scanning of bus USB3 port 2 took 9060 usecs
819 14:37:49.297443 USB3 port 3 scanning...
820 14:37:49.301311 scan_usb_bus for USB3 port 3
821 14:37:49.304179 scan_usb_bus for USB3 port 3 done
822 14:37:49.309458 scan_bus: scanning of bus USB3 port 3 took 9061 usecs
823 14:37:49.312236 USB3 port 4 scanning...
824 14:37:49.315538 scan_usb_bus for USB3 port 4
825 14:37:49.319121 scan_usb_bus for USB3 port 4 done
826 14:37:49.324066 scan_bus: scanning of bus USB3 port 4 took 9061 usecs
827 14:37:49.327502 scan_usb_bus for USB0 port 0 done
828 14:37:49.333262 scan_bus: scanning of bus USB0 port 0 took 239310 usecs
829 14:37:49.337202 scan_usb_bus for PCI: 00:14.0 done
830 14:37:49.342063 scan_bus: scanning of bus PCI: 00:14.0 took 256242 usecs
831 14:37:49.344575 PCI: 00:15.0 scanning...
832 14:37:49.348704 scan_generic_bus for PCI: 00:15.0
833 14:37:49.352190 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
834 14:37:49.356423 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
835 14:37:49.361022 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
836 14:37:49.364697 scan_generic_bus for PCI: 00:15.0 done
837 14:37:49.369994 scan_bus: scanning of bus PCI: 00:15.0 took 22382 usecs
838 14:37:49.372771 PCI: 00:15.1 scanning...
839 14:37:49.376481 scan_generic_bus for PCI: 00:15.1
840 14:37:49.380535 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
841 14:37:49.384151 scan_generic_bus for PCI: 00:15.1 done
842 14:37:49.389585 scan_bus: scanning of bus PCI: 00:15.1 took 14215 usecs
843 14:37:49.392875 PCI: 00:19.0 scanning...
844 14:37:49.395943 scan_generic_bus for PCI: 00:19.0
845 14:37:49.399941 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
846 14:37:49.404261 scan_generic_bus for PCI: 00:19.0 done
847 14:37:49.409629 scan_bus: scanning of bus PCI: 00:19.0 took 14215 usecs
848 14:37:49.412381 PCI: 00:1c.0 scanning...
849 14:37:49.415920 do_pci_scan_bridge for PCI: 00:1c.0
850 14:37:49.418745 PCI: pci_scan_bus for bus 01
851 14:37:49.422422 PCI: 01:00.0 [10ec/525a] enabled
852 14:37:49.425690 Capability: type 0x01 @ 0x80
853 14:37:49.428851 Capability: type 0x05 @ 0x90
854 14:37:49.431572 Capability: type 0x10 @ 0xb0
855 14:37:49.434638 Capability: type 0x10 @ 0x40
856 14:37:49.438135 Enabling Common Clock Configuration
857 14:37:49.442127 L1 Sub-State supported from root port 28
858 14:37:49.445071 L1 Sub-State Support = 0xf
859 14:37:49.448160 CommonModeRestoreTime = 0x3c
860 14:37:49.452155 Power On Value = 0x6, Power On Scale = 0x1
861 14:37:49.454245 ASPM: Enabled L0s and L1
862 14:37:49.457547 Capability: type 0x01 @ 0x80
863 14:37:49.460056 Capability: type 0x05 @ 0x90
864 14:37:49.463415 Capability: type 0x10 @ 0xb0
865 14:37:49.469241 scan_bus: scanning of bus PCI: 00:1c.0 took 53670 usecs
866 14:37:49.471404 PCI: 00:1d.0 scanning...
867 14:37:49.475421 do_pci_scan_bridge for PCI: 00:1d.0
868 14:37:49.477934 PCI: pci_scan_bus for bus 02
869 14:37:49.481958 PCI: 02:00.0 [1e95/9100] enabled
870 14:37:49.484473 Capability: type 0x01 @ 0x40
871 14:37:49.487882 Capability: type 0x05 @ 0x50
872 14:37:49.490701 Capability: type 0x10 @ 0x70
873 14:37:49.494039 Capability: type 0x10 @ 0x40
874 14:37:49.497407 Enabling Common Clock Configuration
875 14:37:49.500989 L1 Sub-State supported from root port 29
876 14:37:49.504264 L1 Sub-State Support = 0xf
877 14:37:49.506998 CommonModeRestoreTime = 0x28
878 14:37:49.510891 Power On Value = 0x16, Power On Scale = 0x0
879 14:37:49.513063 ASPM: Enabled L1
880 14:37:49.515935 Capability: type 0x01 @ 0x40
881 14:37:49.519419 Capability: type 0x05 @ 0x50
882 14:37:49.521534 Capability: type 0x10 @ 0x70
883 14:37:49.527260 scan_bus: scanning of bus PCI: 00:1d.0 took 52970 usecs
884 14:37:49.529681 PCI: 00:1f.0 scanning...
885 14:37:49.533444 scan_lpc_bus for PCI: 00:1f.0
886 14:37:49.535737 PNP: 0c09.0 enabled
887 14:37:49.539042 scan_lpc_bus for PCI: 00:1f.0 done
888 14:37:49.544070 scan_bus: scanning of bus PCI: 00:1f.0 took 11394 usecs
889 14:37:49.546956 PCI: 00:1f.3 scanning...
890 14:37:49.552573 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
891 14:37:49.555328 PCI: 00:1f.4 scanning...
892 14:37:49.558838 scan_generic_bus for PCI: 00:1f.4
893 14:37:49.562862 scan_generic_bus for PCI: 00:1f.4 done
894 14:37:49.567822 scan_bus: scanning of bus PCI: 00:1f.4 took 10131 usecs
895 14:37:49.570596 PCI: 00:1f.5 scanning...
896 14:37:49.574253 scan_generic_bus for PCI: 00:1f.5
897 14:37:49.578377 scan_generic_bus for PCI: 00:1f.5 done
898 14:37:49.583927 scan_bus: scanning of bus PCI: 00:1f.5 took 10129 usecs
899 14:37:49.589850 scan_bus: scanning of bus DOMAIN: 0000 took 703712 usecs
900 14:37:49.593627 root_dev_scan_bus for Root Device done
901 14:37:49.599206 scan_bus: scanning of bus Root Device took 723854 usecs
902 14:37:49.599810 done
903 14:37:49.605908 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
904 14:37:49.611812 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
905 14:37:49.619745 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
906 14:37:49.626508 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
907 14:37:49.630196 SPI flash protection: WPSW=1 SRP0=1
908 14:37:49.637814 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
909 14:37:49.642693 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
910 14:37:49.648671 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1119859 exit 42604
911 14:37:49.651679 found VGA at PCI: 00:02.0
912 14:37:49.654940 Setting up VGA for PCI: 00:02.0
913 14:37:49.660026 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
914 14:37:49.664770 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
915 14:37:49.666894 Allocating resources...
916 14:37:49.668966 Reading resources...
917 14:37:49.673261 Root Device read_resources bus 0 link: 0
918 14:37:49.678244 CPU_CLUSTER: 0 read_resources bus 0 link: 0
919 14:37:49.683307 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
920 14:37:49.687975 DOMAIN: 0000 read_resources bus 0 link: 0
921 14:37:49.693790 PCI: 00:14.0 read_resources bus 0 link: 0
922 14:37:49.698288 USB0 port 0 read_resources bus 0 link: 0
923 14:37:49.707777 USB0 port 0 read_resources bus 0 link: 0 done
924 14:37:49.712419 PCI: 00:14.0 read_resources bus 0 link: 0 done
925 14:37:49.718258 PCI: 00:15.0 read_resources bus 1 link: 0
926 14:37:49.723664 PCI: 00:15.0 read_resources bus 1 link: 0 done
927 14:37:49.728126 PCI: 00:15.1 read_resources bus 2 link: 0
928 14:37:49.733742 PCI: 00:15.1 read_resources bus 2 link: 0 done
929 14:37:49.738781 PCI: 00:19.0 read_resources bus 3 link: 0
930 14:37:49.744467 PCI: 00:19.0 read_resources bus 3 link: 0 done
931 14:37:49.749234 PCI: 00:1c.0 read_resources bus 1 link: 0
932 14:37:49.755165 PCI: 00:1c.0 read_resources bus 1 link: 0 done
933 14:37:49.758681 PCI: 00:1d.0 read_resources bus 2 link: 0
934 14:37:49.764508 PCI: 00:1d.0 read_resources bus 2 link: 0 done
935 14:37:49.769344 PCI: 00:1f.0 read_resources bus 0 link: 0
936 14:37:49.774099 PCI: 00:1f.0 read_resources bus 0 link: 0 done
937 14:37:49.780596 DOMAIN: 0000 read_resources bus 0 link: 0 done
938 14:37:49.785555 Root Device read_resources bus 0 link: 0 done
939 14:37:49.788197 Done reading resources.
940 14:37:49.793655 Show resources in subtree (Root Device)...After reading.
941 14:37:49.797994 Root Device child on link 0 CPU_CLUSTER: 0
942 14:37:49.802267 CPU_CLUSTER: 0 child on link 0 APIC: 00
943 14:37:49.803027 APIC: 00
944 14:37:49.805150 APIC: 02
945 14:37:49.809152 DOMAIN: 0000 child on link 0 PCI: 00:00.0
946 14:37:49.818633 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
947 14:37:49.827855 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
948 14:37:49.829602 PCI: 00:00.0
949 14:37:49.839235 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
950 14:37:49.848555 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
951 14:37:49.858000 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
952 14:37:49.867262 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
953 14:37:49.876727 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
954 14:37:49.886200 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
955 14:37:49.895821 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
956 14:37:49.903745 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
957 14:37:49.914115 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
958 14:37:49.923202 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
959 14:37:49.933376 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
960 14:37:49.942443 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
961 14:37:49.951794 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
962 14:37:49.960945 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
963 14:37:49.962741 PCI: 00:02.0
964 14:37:49.972517 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
965 14:37:49.983851 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
966 14:37:49.991747 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
967 14:37:49.993184 PCI: 00:04.0
968 14:37:50.003621 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
969 14:37:50.004829 PCI: 00:08.0
970 14:37:50.014867 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
971 14:37:50.016666 PCI: 00:12.0
972 14:37:50.026170 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
973 14:37:50.030308 PCI: 00:14.0 child on link 0 USB0 port 0
974 14:37:50.040669 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
975 14:37:50.044962 USB0 port 0 child on link 0 USB2 port 0
976 14:37:50.046783 USB2 port 0
977 14:37:50.048103 USB2 port 1
978 14:37:50.049960 USB2 port 2
979 14:37:50.051761 USB2 port 4
980 14:37:50.053399 USB2 port 5
981 14:37:50.055411 USB2 port 6
982 14:37:50.056961 USB2 port 7
983 14:37:50.058872 USB2 port 8
984 14:37:50.061281 USB2 port 9
985 14:37:50.062561 USB3 port 0
986 14:37:50.063867 USB3 port 1
987 14:37:50.066470 USB3 port 2
988 14:37:50.067757 USB3 port 3
989 14:37:50.069267 USB3 port 4
990 14:37:50.070830 PCI: 00:14.2
991 14:37:50.081598 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
992 14:37:50.091198 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
993 14:37:50.092415 PCI: 00:14.3
994 14:37:50.102424 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
995 14:37:50.106520 PCI: 00:15.0 child on link 0 I2C: 01:10
996 14:37:50.116992 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
997 14:37:50.117917 I2C: 01:10
998 14:37:50.120139 I2C: 01:10
999 14:37:50.121536 I2C: 01:34
1000 14:37:50.126047 PCI: 00:15.1 child on link 0 I2C: 02:2c
1001 14:37:50.135535 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1002 14:37:50.137101 I2C: 02:2c
1003 14:37:50.139303 PCI: 00:16.0
1004 14:37:50.148499 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 14:37:50.150640 PCI: 00:17.0
1006 14:37:50.159252 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1007 14:37:50.168064 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1008 14:37:50.177121 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1009 14:37:50.184900 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1010 14:37:50.193218 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1011 14:37:50.201976 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1012 14:37:50.206642 PCI: 00:19.0 child on link 0 I2C: 03:50
1013 14:37:50.217109 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1014 14:37:50.226615 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1015 14:37:50.227876 I2C: 03:50
1016 14:37:50.229630 PCI: 00:19.2
1017 14:37:50.240991 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1018 14:37:50.251111 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1019 14:37:50.255347 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1020 14:37:50.263760 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1021 14:37:50.273359 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1022 14:37:50.282610 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1023 14:37:50.284746 PCI: 01:00.0
1024 14:37:50.294064 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1025 14:37:50.297857 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1026 14:37:50.306446 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1027 14:37:50.316412 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1028 14:37:50.325779 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1029 14:37:50.327114 PCI: 02:00.0
1030 14:37:50.337444 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1031 14:37:50.341510 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1032 14:37:50.350323 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1033 14:37:50.359338 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1034 14:37:50.361602 PNP: 0c09.0
1035 14:37:50.369165 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1036 14:37:50.378031 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1037 14:37:50.386766 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1038 14:37:50.387950 PCI: 00:1f.3
1039 14:37:50.398106 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1040 14:37:50.408738 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1041 14:37:50.410030 PCI: 00:1f.4
1042 14:37:50.419102 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1043 14:37:50.429401 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1044 14:37:50.430572 PCI: 00:1f.5
1045 14:37:50.439635 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 14:37:50.441393 PCI: 00:1f.6
1047 14:37:50.450567 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1048 14:37:50.456827 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 14:37:50.463508 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1050 14:37:50.470125 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1051 14:37:50.476371 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1052 14:37:50.483035 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1053 14:37:50.486772 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1054 14:37:50.490538 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1055 14:37:50.494530 PCI: 00:17.0 18 * [0x60 - 0x67] io
1056 14:37:50.497609 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1057 14:37:50.504455 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1058 14:37:50.510893 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1059 14:37:50.518803 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1060 14:37:50.527110 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1061 14:37:50.533919 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1062 14:37:50.538009 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1063 14:37:50.545747 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1064 14:37:50.553425 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1065 14:37:50.562319 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1066 14:37:50.569393 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1067 14:37:50.572524 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1068 14:37:50.581431 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1069 14:37:50.585673 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1070 14:37:50.589890 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1071 14:37:50.594778 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1072 14:37:50.599944 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1073 14:37:50.604718 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1074 14:37:50.609786 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1075 14:37:50.614853 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1076 14:37:50.619636 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1077 14:37:50.624768 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1078 14:37:50.629148 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1079 14:37:50.633950 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1080 14:37:50.639197 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1081 14:37:50.643777 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1082 14:37:50.648425 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1083 14:37:50.653569 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1084 14:37:50.658619 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1085 14:37:50.663062 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1086 14:37:50.667690 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1087 14:37:50.672916 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1088 14:37:50.677891 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1089 14:37:50.682936 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1090 14:37:50.687788 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1091 14:37:50.692137 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1092 14:37:50.697157 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1093 14:37:50.702483 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1094 14:37:50.710374 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1095 14:37:50.714037 avoid_fixed_resources: DOMAIN: 0000
1096 14:37:50.720115 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1097 14:37:50.726041 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1098 14:37:50.733412 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1099 14:37:50.741318 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1100 14:37:50.748958 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1101 14:37:50.756729 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1102 14:37:50.764692 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1103 14:37:50.772387 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1104 14:37:50.779991 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1105 14:37:50.787184 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1106 14:37:50.794258 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1107 14:37:50.801364 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1108 14:37:50.803687 Setting resources...
1109 14:37:50.810527 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1110 14:37:50.813964 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1111 14:37:50.818126 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1112 14:37:50.822556 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1113 14:37:50.826422 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1114 14:37:50.832376 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1115 14:37:50.838448 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1116 14:37:50.845236 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1117 14:37:50.851178 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1118 14:37:50.857461 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1119 14:37:50.865004 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1120 14:37:50.870812 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1121 14:37:50.875298 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1122 14:37:50.879937 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1123 14:37:50.884772 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1124 14:37:50.889713 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1125 14:37:50.894664 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1126 14:37:50.899622 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1127 14:37:50.904805 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1128 14:37:50.909499 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1129 14:37:50.914371 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1130 14:37:50.919072 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1131 14:37:50.923460 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1132 14:37:50.928872 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1133 14:37:50.933324 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1134 14:37:50.938537 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1135 14:37:50.943343 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1136 14:37:50.948140 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1137 14:37:50.953395 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1138 14:37:50.957559 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1139 14:37:50.962782 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1140 14:37:50.967381 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1141 14:37:50.972531 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1142 14:37:50.977110 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1143 14:37:50.982597 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1144 14:37:50.987150 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1145 14:37:50.994476 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1146 14:37:51.001584 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1147 14:37:51.009079 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1148 14:37:51.016716 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1149 14:37:51.021542 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1150 14:37:51.029264 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1151 14:37:51.036105 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1152 14:37:51.043769 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1153 14:37:51.051554 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1154 14:37:51.055533 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1155 14:37:51.063252 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1156 14:37:51.067642 Root Device assign_resources, bus 0 link: 0
1157 14:37:51.072870 DOMAIN: 0000 assign_resources, bus 0 link: 0
1158 14:37:51.081537 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1159 14:37:51.089308 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1160 14:37:51.097426 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1161 14:37:51.105454 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1162 14:37:51.113186 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1163 14:37:51.121856 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1164 14:37:51.130102 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1165 14:37:51.134737 PCI: 00:14.0 assign_resources, bus 0 link: 0
1166 14:37:51.139256 PCI: 00:14.0 assign_resources, bus 0 link: 0
1167 14:37:51.147708 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1168 14:37:51.155747 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1169 14:37:51.163634 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1170 14:37:51.172433 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1171 14:37:51.176838 PCI: 00:15.0 assign_resources, bus 1 link: 0
1172 14:37:51.181579 PCI: 00:15.0 assign_resources, bus 1 link: 0
1173 14:37:51.189764 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1174 14:37:51.194274 PCI: 00:15.1 assign_resources, bus 2 link: 0
1175 14:37:51.198809 PCI: 00:15.1 assign_resources, bus 2 link: 0
1176 14:37:51.207799 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1177 14:37:51.215259 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1178 14:37:51.223137 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1179 14:37:51.230638 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1180 14:37:51.238250 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1181 14:37:51.246322 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1182 14:37:51.253817 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1183 14:37:51.262650 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1184 14:37:51.269807 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1185 14:37:51.274666 PCI: 00:19.0 assign_resources, bus 3 link: 0
1186 14:37:51.279826 PCI: 00:19.0 assign_resources, bus 3 link: 0
1187 14:37:51.287802 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1188 14:37:51.296600 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1189 14:37:51.305080 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1190 14:37:51.313794 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1191 14:37:51.317877 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1192 14:37:51.326284 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1193 14:37:51.331063 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1194 14:37:51.340346 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1195 14:37:51.348128 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1196 14:37:51.356865 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1197 14:37:51.361638 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1198 14:37:51.369874 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1199 14:37:51.375109 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1200 14:37:51.379536 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1201 14:37:51.384340 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1202 14:37:51.388842 LPC: Trying to open IO window from 930 size 8
1203 14:37:51.393784 LPC: Trying to open IO window from 940 size 8
1204 14:37:51.398395 LPC: Trying to open IO window from 950 size 10
1205 14:37:51.406723 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1206 14:37:51.414428 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1207 14:37:51.422993 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1208 14:37:51.430924 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1209 14:37:51.439309 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1210 14:37:51.443980 DOMAIN: 0000 assign_resources, bus 0 link: 0
1211 14:37:51.448526 Root Device assign_resources, bus 0 link: 0
1212 14:37:51.450764 Done setting resources.
1213 14:37:51.457145 Show resources in subtree (Root Device)...After assigning values.
1214 14:37:51.461993 Root Device child on link 0 CPU_CLUSTER: 0
1215 14:37:51.466066 CPU_CLUSTER: 0 child on link 0 APIC: 00
1216 14:37:51.467543 APIC: 00
1217 14:37:51.468114 APIC: 02
1218 14:37:51.472936 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1219 14:37:51.482828 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1220 14:37:51.493559 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1221 14:37:51.495109 PCI: 00:00.0
1222 14:37:51.505155 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1223 14:37:51.514175 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1224 14:37:51.523602 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1225 14:37:51.532662 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1226 14:37:51.542233 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1227 14:37:51.551744 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1228 14:37:51.561078 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1229 14:37:51.570063 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1230 14:37:51.579139 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1231 14:37:51.588939 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1232 14:37:51.598842 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1233 14:37:51.607942 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1234 14:37:51.617418 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1235 14:37:51.626422 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1236 14:37:51.628614 PCI: 00:02.0
1237 14:37:51.638440 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1238 14:37:51.648970 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1239 14:37:51.658723 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1240 14:37:51.659920 PCI: 00:04.0
1241 14:37:51.670663 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1242 14:37:51.672369 PCI: 00:08.0
1243 14:37:51.682655 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1244 14:37:51.684399 PCI: 00:12.0
1245 14:37:51.694088 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1246 14:37:51.698362 PCI: 00:14.0 child on link 0 USB0 port 0
1247 14:37:51.709513 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1248 14:37:51.713215 USB0 port 0 child on link 0 USB2 port 0
1249 14:37:51.715012 USB2 port 0
1250 14:37:51.716740 USB2 port 1
1251 14:37:51.718674 USB2 port 2
1252 14:37:51.720279 USB2 port 4
1253 14:37:51.721898 USB2 port 5
1254 14:37:51.724022 USB2 port 6
1255 14:37:51.725626 USB2 port 7
1256 14:37:51.727565 USB2 port 8
1257 14:37:51.728838 USB2 port 9
1258 14:37:51.731212 USB3 port 0
1259 14:37:51.732400 USB3 port 1
1260 14:37:51.734606 USB3 port 2
1261 14:37:51.736259 USB3 port 3
1262 14:37:51.738150 USB3 port 4
1263 14:37:51.739807 PCI: 00:14.2
1264 14:37:51.750447 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1265 14:37:51.760612 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1266 14:37:51.761782 PCI: 00:14.3
1267 14:37:51.771985 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1268 14:37:51.776511 PCI: 00:15.0 child on link 0 I2C: 01:10
1269 14:37:51.786456 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1270 14:37:51.788725 I2C: 01:10
1271 14:37:51.790302 I2C: 01:10
1272 14:37:51.791097 I2C: 01:34
1273 14:37:51.795822 PCI: 00:15.1 child on link 0 I2C: 02:2c
1274 14:37:51.806173 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1275 14:37:51.807523 I2C: 02:2c
1276 14:37:51.809293 PCI: 00:16.0
1277 14:37:51.819528 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1278 14:37:51.821264 PCI: 00:17.0
1279 14:37:51.831069 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1280 14:37:51.841231 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1281 14:37:51.850712 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1282 14:37:51.859654 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1283 14:37:51.868989 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1284 14:37:51.879267 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1285 14:37:51.883026 PCI: 00:19.0 child on link 0 I2C: 03:50
1286 14:37:51.893565 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1287 14:37:51.904107 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1288 14:37:51.905014 I2C: 03:50
1289 14:37:51.907147 PCI: 00:19.2
1290 14:37:51.917902 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1291 14:37:51.928896 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1292 14:37:51.932694 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1293 14:37:51.942081 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1294 14:37:51.952570 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1295 14:37:51.962499 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1296 14:37:51.964123 PCI: 01:00.0
1297 14:37:51.974909 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1298 14:37:51.979156 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1299 14:37:51.988841 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1300 14:37:51.998299 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1301 14:37:52.009033 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1302 14:37:52.010646 PCI: 02:00.0
1303 14:37:52.021359 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1304 14:37:52.025783 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1305 14:37:52.034393 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1306 14:37:52.043578 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1307 14:37:52.044926 PNP: 0c09.0
1308 14:37:52.052961 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1309 14:37:52.061945 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1310 14:37:52.070922 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1311 14:37:52.072580 PCI: 00:1f.3
1312 14:37:52.082396 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1313 14:37:52.093009 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1314 14:37:52.094876 PCI: 00:1f.4
1315 14:37:52.103742 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1316 14:37:52.113861 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1317 14:37:52.115285 PCI: 00:1f.5
1318 14:37:52.125970 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1319 14:37:52.127035 PCI: 00:1f.6
1320 14:37:52.138224 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1321 14:37:52.140139 Done allocating resources.
1322 14:37:52.146930 BS: BS_DEV_RESOURCES times (us): entry 0 run 2491660 exit 13
1323 14:37:52.149458 Enabling resources...
1324 14:37:52.154140 PCI: 00:00.0 subsystem <- 1028/3e35
1325 14:37:52.156451 PCI: 00:00.0 cmd <- 06
1326 14:37:52.160374 PCI: 00:02.0 subsystem <- 1028/3ea1
1327 14:37:52.162612 PCI: 00:02.0 cmd <- 03
1328 14:37:52.166360 PCI: 00:04.0 subsystem <- 1028/1903
1329 14:37:52.168933 PCI: 00:04.0 cmd <- 02
1330 14:37:52.171255 PCI: 00:08.0 cmd <- 06
1331 14:37:52.175886 PCI: 00:12.0 subsystem <- 1028/9df9
1332 14:37:52.177396 PCI: 00:12.0 cmd <- 02
1333 14:37:52.181485 PCI: 00:14.0 subsystem <- 1028/9ded
1334 14:37:52.183803 PCI: 00:14.0 cmd <- 02
1335 14:37:52.186640 PCI: 00:14.2 cmd <- 02
1336 14:37:52.190435 PCI: 00:14.3 subsystem <- 1028/9df0
1337 14:37:52.192767 PCI: 00:14.3 cmd <- 02
1338 14:37:52.196954 PCI: 00:15.0 subsystem <- 1028/9de8
1339 14:37:52.199063 PCI: 00:15.0 cmd <- 02
1340 14:37:52.203191 PCI: 00:15.1 subsystem <- 1028/9de9
1341 14:37:52.205214 PCI: 00:15.1 cmd <- 02
1342 14:37:52.209006 PCI: 00:16.0 subsystem <- 1028/9de0
1343 14:37:52.211976 PCI: 00:16.0 cmd <- 02
1344 14:37:52.215255 PCI: 00:17.0 subsystem <- 1028/9dd3
1345 14:37:52.217572 PCI: 00:17.0 cmd <- 03
1346 14:37:52.221937 PCI: 00:19.0 subsystem <- 1028/9dc5
1347 14:37:52.224113 PCI: 00:19.0 cmd <- 06
1348 14:37:52.228233 PCI: 00:19.2 subsystem <- 1028/9dc7
1349 14:37:52.230261 PCI: 00:19.2 cmd <- 06
1350 14:37:52.234169 PCI: 00:1c.0 bridge ctrl <- 0003
1351 14:37:52.237570 PCI: 00:1c.0 subsystem <- 1028/9dbf
1352 14:37:52.240562 Capability: type 0x10 @ 0x40
1353 14:37:52.243659 Capability: type 0x05 @ 0x80
1354 14:37:52.246564 Capability: type 0x0d @ 0x90
1355 14:37:52.248324 PCI: 00:1c.0 cmd <- 06
1356 14:37:52.252035 PCI: 00:1d.0 bridge ctrl <- 0003
1357 14:37:52.255494 PCI: 00:1d.0 subsystem <- 1028/9db4
1358 14:37:52.258868 Capability: type 0x10 @ 0x40
1359 14:37:52.262055 Capability: type 0x05 @ 0x80
1360 14:37:52.264611 Capability: type 0x0d @ 0x90
1361 14:37:52.266971 PCI: 00:1d.0 cmd <- 06
1362 14:37:52.270487 PCI: 00:1f.0 subsystem <- 1028/9d84
1363 14:37:52.273123 PCI: 00:1f.0 cmd <- 407
1364 14:37:52.277569 PCI: 00:1f.3 subsystem <- 1028/9dc8
1365 14:37:52.279260 PCI: 00:1f.3 cmd <- 02
1366 14:37:52.283254 PCI: 00:1f.4 subsystem <- 1028/9da3
1367 14:37:52.285620 PCI: 00:1f.4 cmd <- 03
1368 14:37:52.289710 PCI: 00:1f.5 subsystem <- 1028/9da4
1369 14:37:52.291930 PCI: 00:1f.5 cmd <- 406
1370 14:37:52.295921 PCI: 00:1f.6 subsystem <- 1028/15be
1371 14:37:52.298766 PCI: 00:1f.6 cmd <- 02
1372 14:37:52.309222 PCI: 01:00.0 cmd <- 02
1373 14:37:52.311757 PCI: 02:00.0 cmd <- 02
1374 14:37:52.314281 done.
1375 14:37:52.320328 BS: BS_DEV_ENABLE times (us): entry 490 run 167125 exit 0
1376 14:37:52.322820 Initializing devices...
1377 14:37:52.324773 Root Device init ...
1378 14:37:52.328369 Root Device init finished in 2140 usecs
1379 14:37:52.331619 CPU_CLUSTER: 0 init ...
1380 14:37:52.335786 CPU_CLUSTER: 0 init finished in 2430 usecs
1381 14:37:52.339579 PCI: 00:00.0 init ...
1382 14:37:52.342486 CPU TDP: 15 Watts
1383 14:37:52.344086 CPU PL2 = 51 Watts
1384 14:37:52.348703 PCI: 00:00.0 init finished in 7038 usecs
1385 14:37:52.351372 PCI: 00:02.0 init ...
1386 14:37:52.355190 PCI: 00:02.0 init finished in 2237 usecs
1387 14:37:52.358131 PCI: 00:04.0 init ...
1388 14:37:52.361800 PCI: 00:04.0 init finished in 2236 usecs
1389 14:37:52.364806 PCI: 00:08.0 init ...
1390 14:37:52.368331 PCI: 00:08.0 init finished in 2236 usecs
1391 14:37:52.371558 PCI: 00:12.0 init ...
1392 14:37:52.375455 PCI: 00:12.0 init finished in 2236 usecs
1393 14:37:52.377826 PCI: 00:14.0 init ...
1394 14:37:52.381947 PCI: 00:14.0 init finished in 2235 usecs
1395 14:37:52.385140 PCI: 00:14.2 init ...
1396 14:37:52.388657 PCI: 00:14.2 init finished in 2235 usecs
1397 14:37:52.391574 PCI: 00:14.3 init ...
1398 14:37:52.395154 PCI: 00:14.3 init finished in 2242 usecs
1399 14:37:52.398484 PCI: 00:15.0 init ...
1400 14:37:52.401940 DW I2C bus 0 at 0xd1347000 (400 KHz)
1401 14:37:52.406262 PCI: 00:15.0 init finished in 5924 usecs
1402 14:37:52.409286 PCI: 00:15.1 init ...
1403 14:37:52.412408 DW I2C bus 1 at 0xd1348000 (400 KHz)
1404 14:37:52.416467 PCI: 00:15.1 init finished in 5934 usecs
1405 14:37:52.419193 PCI: 00:16.0 init ...
1406 14:37:52.422847 PCI: 00:16.0 init finished in 2236 usecs
1407 14:37:52.425851 PCI: 00:19.0 init ...
1408 14:37:52.429754 DW I2C bus 4 at 0xd134a000 (400 KHz)
1409 14:37:52.434094 PCI: 00:19.0 init finished in 5932 usecs
1410 14:37:52.437532 PCI: 00:1c.0 init ...
1411 14:37:52.440289 Initializing PCH PCIe bridge.
1412 14:37:52.444012 PCI: 00:1c.0 init finished in 5249 usecs
1413 14:37:52.446959 PCI: 00:1d.0 init ...
1414 14:37:52.449807 Initializing PCH PCIe bridge.
1415 14:37:52.454344 PCI: 00:1d.0 init finished in 5248 usecs
1416 14:37:52.456786 PCI: 00:1f.0 init ...
1417 14:37:52.460887 IOAPIC: Initializing IOAPIC at 0xfec00000
1418 14:37:52.465456 IOAPIC: Bootstrap Processor Local APIC = 0x00
1419 14:37:52.466859 IOAPIC: ID = 0x02
1420 14:37:52.469817 IOAPIC: Dumping registers
1421 14:37:52.472132 reg 0x0000: 0x02000000
1422 14:37:52.474532 reg 0x0001: 0x00770020
1423 14:37:52.477451 reg 0x0002: 0x00000000
1424 14:37:52.482161 PCI: 00:1f.0 init finished in 23318 usecs
1425 14:37:52.484133 PCI: 00:1f.3 init ...
1426 14:37:52.489807 HDA: codec_mask = 05
1427 14:37:52.492248 HDA: Initializing codec #2
1428 14:37:52.495730 HDA: codec viddid: 8086280b
1429 14:37:52.498157 HDA: No verb table entry found
1430 14:37:52.501408 HDA: Initializing codec #0
1431 14:37:52.503717 HDA: codec viddid: 10ec0236
1432 14:37:52.510868 HDA: verb loaded.
1433 14:37:52.515210 PCI: 00:1f.3 init finished in 28835 usecs
1434 14:37:52.517671 PCI: 00:1f.4 init ...
1435 14:37:52.521834 PCI: 00:1f.4 init finished in 2245 usecs
1436 14:37:52.524790 PCI: 00:1f.6 init ...
1437 14:37:52.529020 PCI: 00:1f.6 init finished in 2237 usecs
1438 14:37:52.540043 PCI: 01:00.0 init ...
1439 14:37:52.543650 PCI: 01:00.0 init finished in 2236 usecs
1440 14:37:52.547153 PCI: 02:00.0 init ...
1441 14:37:52.550460 PCI: 02:00.0 init finished in 2236 usecs
1442 14:37:52.553490 PNP: 0c09.0 init ...
1443 14:37:52.557356 EC Label : 00.00.20
1444 14:37:52.561369 EC Revision : 9ca674bba
1445 14:37:52.564888 EC Model Num : 08B9
1446 14:37:52.568300 EC Build Date : 05/10/19
1447 14:37:52.579026 PNP: 0c09.0 init finished in 23774 usecs
1448 14:37:52.581433 Devices initialized
1449 14:37:52.584035 Show all devs... After init.
1450 14:37:52.586801 Root Device: enabled 1
1451 14:37:52.589327 CPU_CLUSTER: 0: enabled 1
1452 14:37:52.592155 DOMAIN: 0000: enabled 1
1453 14:37:52.593792 APIC: 00: enabled 1
1454 14:37:52.596794 PCI: 00:00.0: enabled 1
1455 14:37:52.598949 PCI: 00:02.0: enabled 1
1456 14:37:52.601371 PCI: 00:04.0: enabled 1
1457 14:37:52.603473 PCI: 00:12.0: enabled 1
1458 14:37:52.605739 PCI: 00:12.5: enabled 0
1459 14:37:52.608111 PCI: 00:12.6: enabled 0
1460 14:37:52.610954 PCI: 00:13.0: enabled 0
1461 14:37:52.613434 PCI: 00:14.0: enabled 1
1462 14:37:52.615519 PCI: 00:14.1: enabled 0
1463 14:37:52.617996 PCI: 00:14.3: enabled 1
1464 14:37:52.620372 PCI: 00:14.5: enabled 0
1465 14:37:52.622836 PCI: 00:15.0: enabled 1
1466 14:37:52.624892 PCI: 00:15.1: enabled 1
1467 14:37:52.627450 PCI: 00:15.2: enabled 0
1468 14:37:52.630489 PCI: 00:15.3: enabled 0
1469 14:37:52.632776 PCI: 00:16.0: enabled 1
1470 14:37:52.635157 PCI: 00:16.1: enabled 0
1471 14:37:52.637197 PCI: 00:16.2: enabled 0
1472 14:37:52.640160 PCI: 00:16.3: enabled 0
1473 14:37:52.642447 PCI: 00:16.4: enabled 0
1474 14:37:52.645093 PCI: 00:16.5: enabled 0
1475 14:37:52.647439 PCI: 00:17.0: enabled 1
1476 14:37:52.649628 PCI: 00:19.0: enabled 1
1477 14:37:52.652286 PCI: 00:19.1: enabled 0
1478 14:37:52.654666 PCI: 00:19.2: enabled 1
1479 14:37:52.656733 PCI: 00:1a.0: enabled 0
1480 14:37:52.659192 PCI: 00:1c.0: enabled 1
1481 14:37:52.661613 PCI: 00:1c.1: enabled 0
1482 14:37:52.664259 PCI: 00:1c.2: enabled 0
1483 14:37:52.666695 PCI: 00:1c.3: enabled 0
1484 14:37:52.669098 PCI: 00:1c.4: enabled 0
1485 14:37:52.671255 PCI: 00:1c.5: enabled 0
1486 14:37:52.674117 PCI: 00:1c.6: enabled 0
1487 14:37:52.676899 PCI: 00:1c.7: enabled 0
1488 14:37:52.678902 PCI: 00:1d.0: enabled 1
1489 14:37:52.681181 PCI: 00:1d.1: enabled 0
1490 14:37:52.683475 PCI: 00:1d.2: enabled 0
1491 14:37:52.686069 PCI: 00:1d.3: enabled 0
1492 14:37:52.688366 PCI: 00:1d.4: enabled 0
1493 14:37:52.691692 PCI: 00:1e.0: enabled 0
1494 14:37:52.693053 PCI: 00:1e.1: enabled 0
1495 14:37:52.696050 PCI: 00:1e.2: enabled 0
1496 14:37:52.698329 PCI: 00:1e.3: enabled 0
1497 14:37:52.701054 PCI: 00:1f.0: enabled 1
1498 14:37:52.703172 PCI: 00:1f.1: enabled 0
1499 14:37:52.705687 PCI: 00:1f.2: enabled 0
1500 14:37:52.708249 PCI: 00:1f.3: enabled 1
1501 14:37:52.710274 PCI: 00:1f.4: enabled 1
1502 14:37:52.712618 PCI: 00:1f.5: enabled 1
1503 14:37:52.715555 PCI: 00:1f.6: enabled 1
1504 14:37:52.717808 USB0 port 0: enabled 1
1505 14:37:52.720389 I2C: 01:10: enabled 1
1506 14:37:52.722633 I2C: 01:10: enabled 1
1507 14:37:52.724547 I2C: 01:34: enabled 1
1508 14:37:52.726555 I2C: 02:2c: enabled 1
1509 14:37:52.728600 I2C: 03:50: enabled 1
1510 14:37:52.730822 PNP: 0c09.0: enabled 1
1511 14:37:52.733178 USB2 port 0: enabled 1
1512 14:37:52.736036 USB2 port 1: enabled 1
1513 14:37:52.737784 USB2 port 2: enabled 1
1514 14:37:52.740789 USB2 port 4: enabled 1
1515 14:37:52.742753 USB2 port 5: enabled 1
1516 14:37:52.745009 USB2 port 6: enabled 1
1517 14:37:52.747930 USB2 port 7: enabled 1
1518 14:37:52.749900 USB2 port 8: enabled 1
1519 14:37:52.752281 USB2 port 9: enabled 1
1520 14:37:52.754983 USB3 port 0: enabled 1
1521 14:37:52.757362 USB3 port 1: enabled 1
1522 14:37:52.758906 USB3 port 2: enabled 1
1523 14:37:52.761750 USB3 port 3: enabled 1
1524 14:37:52.763609 USB3 port 4: enabled 1
1525 14:37:52.765790 APIC: 02: enabled 1
1526 14:37:52.768243 PCI: 00:08.0: enabled 1
1527 14:37:52.770823 PCI: 00:14.2: enabled 1
1528 14:37:52.773106 PCI: 01:00.0: enabled 1
1529 14:37:52.775417 PCI: 02:00.0: enabled 1
1530 14:37:52.780702 Disabling ACPI via APMC:
1531 14:37:52.782457 done.
1532 14:37:52.787486 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1533 14:37:52.791079 ELOG: NV offset 0x1bf0000 size 0x4000
1534 14:37:52.799707 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1535 14:37:52.805655 ELOG: Event(17) added with size 13 at 2023-08-16 14:37:41 UTC
1536 14:37:52.811155 POST: Unexpected post code in previous boot: 0x75
1537 14:37:52.817030 ELOG: Event(A3) added with size 11 at 2023-08-16 14:37:41 UTC
1538 14:37:52.823351 ELOG: Event(A6) added with size 13 at 2023-08-16 14:37:41 UTC
1539 14:37:52.829948 ELOG: Event(92) added with size 9 at 2023-08-16 14:37:41 UTC
1540 14:37:52.835990 ELOG: Event(93) added with size 9 at 2023-08-16 14:37:41 UTC
1541 14:37:52.842575 ELOG: Event(9A) added with size 9 at 2023-08-16 14:37:41 UTC
1542 14:37:52.848525 ELOG: Event(9E) added with size 10 at 2023-08-16 14:37:41 UTC
1543 14:37:52.854430 ELOG: Event(9F) added with size 14 at 2023-08-16 14:37:41 UTC
1544 14:37:52.860060 BS: BS_DEV_INIT times (us): entry 0 run 455600 exit 78859
1545 14:37:52.866844 ELOG: Event(A1) added with size 10 at 2023-08-16 14:37:41 UTC
1546 14:37:52.874673 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1547 14:37:52.880832 ELOG: Event(A0) added with size 9 at 2023-08-16 14:37:41 UTC
1548 14:37:52.884839 elog_add_boot_reason: Logged dev mode boot
1549 14:37:52.887656 Finalize devices...
1550 14:37:52.889897 PCI: 00:17.0 final
1551 14:37:52.891774 Devices finalized
1552 14:37:52.896723 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1553 14:37:52.902953 BS: BS_POST_DEVICE times (us): entry 24782 run 5935 exit 5362
1554 14:37:52.908193 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 97 exit 0
1555 14:37:52.916871 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1556 14:37:52.921537 disable_unused_touchscreen: Disable ACPI0C50
1557 14:37:52.925702 disable_unused_touchscreen: Enable ELAN900C
1558 14:37:52.928876 CBFS @ 1d00000 size 300000
1559 14:37:52.934825 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1560 14:37:52.938391 CBFS: Locating 'fallback/dsdt.aml'
1561 14:37:52.942661 CBFS: Found @ offset 10b200 size 4448
1562 14:37:52.945780 CBFS @ 1d00000 size 300000
1563 14:37:52.951962 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1564 14:37:52.954546 CBFS: Locating 'fallback/slic'
1565 14:37:52.959802 CBFS: 'fallback/slic' not found.
1566 14:37:52.963828 ACPI: Writing ACPI tables at 89c0f000.
1567 14:37:52.965275 ACPI: * FACS
1568 14:37:52.967645 ACPI: * DSDT
1569 14:37:52.970657 Ramoops buffer: 0x100000@0x89b0e000.
1570 14:37:52.976054 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1571 14:37:52.980843 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1572 14:37:52.984212 ACPI: * FADT
1573 14:37:52.985104 SCI is IRQ9
1574 14:37:52.988789 ACPI: added table 1/32, length now 40
1575 14:37:52.990975 ACPI: * SSDT
1576 14:37:52.994106 Found 1 CPU(s) with 2 core(s) each.
1577 14:37:52.998817 Error: Could not locate 'wifi_sar' in VPD.
1578 14:37:53.002767 Error: failed from getting SAR limits!
1579 14:37:53.006426 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1580 14:37:53.010776 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1581 14:37:53.014720 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1582 14:37:53.018682 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1583 14:37:53.023815 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1584 14:37:53.029846 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1585 14:37:53.034249 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1586 14:37:53.038419 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1587 14:37:53.044508 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1588 14:37:53.050298 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1589 14:37:53.055755 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1590 14:37:53.062360 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1591 14:37:53.067126 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1592 14:37:53.071841 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1593 14:37:53.076052 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1594 14:37:53.080985 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1595 14:37:53.086357 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1596 14:37:53.092147 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1597 14:37:53.098163 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1598 14:37:53.103782 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1599 14:37:53.109856 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1600 14:37:53.114584 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1601 14:37:53.117949 ACPI: added table 2/32, length now 44
1602 14:37:53.119646 ACPI: * MCFG
1603 14:37:53.123383 ACPI: added table 3/32, length now 48
1604 14:37:53.125141 ACPI: * TPM2
1605 14:37:53.127758 TPM2 log created at 89afe000
1606 14:37:53.132293 ACPI: added table 4/32, length now 52
1607 14:37:53.133084 ACPI: * MADT
1608 14:37:53.134643 SCI is IRQ9
1609 14:37:53.138469 ACPI: added table 5/32, length now 56
1610 14:37:53.140721 current = 89c14720
1611 14:37:53.143115 ACPI: * IGD OpRegion
1612 14:37:53.145107 GMA: Found VBT in CBFS
1613 14:37:53.148073 GMA: Found valid VBT in CBFS
1614 14:37:53.151694 ACPI: added table 6/32, length now 60
1615 14:37:53.153597 ACPI: * HPET
1616 14:37:53.157673 ACPI: added table 7/32, length now 64
1617 14:37:53.158379 ACPI: done.
1618 14:37:53.161454 ACPI tables: 30672 bytes.
1619 14:37:53.164107 smbios_write_tables: 89afd000
1620 14:37:53.166832 recv_ec_data: 0x01
1621 14:37:53.168846 Create SMBIOS type 17
1622 14:37:53.171152 PCI: 00:14.3 (Intel WiFi)
1623 14:37:53.173647 SMBIOS tables: 707 bytes.
1624 14:37:53.178098 Writing table forward entry at 0x00000500
1625 14:37:53.184139 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1626 14:37:53.188018 Writing coreboot table at 0x89c33000
1627 14:37:53.193777 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1628 14:37:53.197948 1. 0000000000001000-000000000009ffff: RAM
1629 14:37:53.203081 2. 00000000000a0000-00000000000fffff: RESERVED
1630 14:37:53.207072 3. 0000000000100000-0000000089afcfff: RAM
1631 14:37:53.213514 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1632 14:37:53.217751 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1633 14:37:53.223541 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1634 14:37:53.228731 7. 000000008a000000-000000008f7fffff: RESERVED
1635 14:37:53.233217 8. 00000000e0000000-00000000efffffff: RESERVED
1636 14:37:53.238136 9. 00000000fc000000-00000000fc000fff: RESERVED
1637 14:37:53.243024 10. 00000000fe000000-00000000fe00ffff: RESERVED
1638 14:37:53.247475 11. 00000000fed10000-00000000fed17fff: RESERVED
1639 14:37:53.252547 12. 00000000fed80000-00000000fed83fff: RESERVED
1640 14:37:53.256852 13. 00000000feda0000-00000000feda1fff: RESERVED
1641 14:37:53.261056 14. 0000000100000000-000000016e7fffff: RAM
1642 14:37:53.265701 Graphics framebuffer located at 0xc0000000
1643 14:37:53.268566 Passing 6 GPIOs to payload:
1644 14:37:53.273501 NAME | PORT | POLARITY | VALUE
1645 14:37:53.278992 write protect | 0x000000dc | high | high
1646 14:37:53.284176 recovery | 0x000000d5 | low | high
1647 14:37:53.290097 lid | undefined | high | high
1648 14:37:53.294841 power | undefined | high | low
1649 14:37:53.299752 oprom | undefined | high | low
1650 14:37:53.305833 EC in RW | undefined | high | low
1651 14:37:53.307606 recv_ec_data: 0x01
1652 14:37:53.308879 SKU ID: 3
1653 14:37:53.311174 CBFS @ 1d00000 size 300000
1654 14:37:53.317694 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1655 14:37:53.323762 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum d668
1656 14:37:53.326513 coreboot table: 1484 bytes.
1657 14:37:53.329761 IMD ROOT 0. 89fff000 00001000
1658 14:37:53.333246 IMD SMALL 1. 89ffe000 00001000
1659 14:37:53.336713 FSP MEMORY 2. 89d0e000 002f0000
1660 14:37:53.339876 CONSOLE 3. 89cee000 00020000
1661 14:37:53.343208 TIME STAMP 4. 89ced000 00000910
1662 14:37:53.346157 VBOOT WORK 5. 89cea000 00003000
1663 14:37:53.350030 VBOOT 6. 89ce9000 00000c0c
1664 14:37:53.353195 MRC DATA 7. 89ce7000 000018f0
1665 14:37:53.356213 ROMSTG STCK 8. 89ce6000 00000400
1666 14:37:53.359570 AFTER CAR 9. 89cdc000 0000a000
1667 14:37:53.363531 RAMSTAGE 10. 89c80000 0005c000
1668 14:37:53.366159 REFCODE 11. 89c4b000 00035000
1669 14:37:53.369501 SMM BACKUP 12. 89c3b000 00010000
1670 14:37:53.373320 COREBOOT 13. 89c33000 00008000
1671 14:37:53.376223 ACPI 14. 89c0f000 00024000
1672 14:37:53.380070 ACPI GNVS 15. 89c0e000 00001000
1673 14:37:53.383027 RAMOOPS 16. 89b0e000 00100000
1674 14:37:53.386139 TPM2 TCGLOG17. 89afe000 00010000
1675 14:37:53.389711 SMBIOS 18. 89afd000 00000800
1676 14:37:53.391840 IMD small region:
1677 14:37:53.394983 IMD ROOT 0. 89ffec00 00000400
1678 14:37:53.398784 FSP RUNTIME 1. 89ffebe0 00000004
1679 14:37:53.401833 POWER STATE 2. 89ffeba0 00000040
1680 14:37:53.405294 ROMSTAGE 3. 89ffeb80 00000004
1681 14:37:53.409279 MEM INFO 4. 89ffe9c0 000001a9
1682 14:37:53.412337 VPD 5. 89ffe960 00000047
1683 14:37:53.415920 COREBOOTFWD 6. 89ffe920 00000028
1684 14:37:53.419014 MTRR: Physical address space:
1685 14:37:53.424848 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1686 14:37:53.431258 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1687 14:37:53.437383 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1688 14:37:53.443607 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1689 14:37:53.450454 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1690 14:37:53.456205 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1691 14:37:53.462110 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
1692 14:37:53.466706 MTRR: Fixed MSR 0x250 0x0606060606060606
1693 14:37:53.470817 MTRR: Fixed MSR 0x258 0x0606060606060606
1694 14:37:53.475291 MTRR: Fixed MSR 0x259 0x0000000000000000
1695 14:37:53.478941 MTRR: Fixed MSR 0x268 0x0606060606060606
1696 14:37:53.482785 MTRR: Fixed MSR 0x269 0x0606060606060606
1697 14:37:53.487316 MTRR: Fixed MSR 0x26a 0x0606060606060606
1698 14:37:53.490936 MTRR: Fixed MSR 0x26b 0x0606060606060606
1699 14:37:53.495480 MTRR: Fixed MSR 0x26c 0x0606060606060606
1700 14:37:53.499255 MTRR: Fixed MSR 0x26d 0x0606060606060606
1701 14:37:53.503311 MTRR: Fixed MSR 0x26e 0x0606060606060606
1702 14:37:53.507257 MTRR: Fixed MSR 0x26f 0x0606060606060606
1703 14:37:53.510146 call enable_fixed_mtrr()
1704 14:37:53.513693 CPU physical address size: 39 bits
1705 14:37:53.517854 MTRR: default type WB/UC MTRR counts: 7/6.
1706 14:37:53.521341 MTRR: UC selected as default type.
1707 14:37:53.527768 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1708 14:37:53.533923 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1709 14:37:53.540132 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1710 14:37:53.546162 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1711 14:37:53.552574 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1712 14:37:53.558884 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
1713 14:37:53.559235
1714 14:37:53.560501 MTRR check
1715 14:37:53.563965 Fixed MTRRs : Enabled
1716 14:37:53.565379 Variable MTRRs: Enabled
1717 14:37:53.565810
1718 14:37:53.569912 MTRR: Fixed MSR 0x250 0x0606060606060606
1719 14:37:53.574533 MTRR: Fixed MSR 0x258 0x0606060606060606
1720 14:37:53.577881 MTRR: Fixed MSR 0x259 0x0000000000000000
1721 14:37:53.581871 MTRR: Fixed MSR 0x268 0x0606060606060606
1722 14:37:53.586248 MTRR: Fixed MSR 0x269 0x0606060606060606
1723 14:37:53.590046 MTRR: Fixed MSR 0x26a 0x0606060606060606
1724 14:37:53.594328 MTRR: Fixed MSR 0x26b 0x0606060606060606
1725 14:37:53.598574 MTRR: Fixed MSR 0x26c 0x0606060606060606
1726 14:37:53.602763 MTRR: Fixed MSR 0x26d 0x0606060606060606
1727 14:37:53.606703 MTRR: Fixed MSR 0x26e 0x0606060606060606
1728 14:37:53.610749 MTRR: Fixed MSR 0x26f 0x0606060606060606
1729 14:37:53.617124 BS: BS_WRITE_TABLES times (us): entry 17197 run 490297 exit 150007
1730 14:37:53.620002 call enable_fixed_mtrr()
1731 14:37:53.622747 CBFS @ 1d00000 size 300000
1732 14:37:53.628995 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1733 14:37:53.631939 CBFS: Locating 'fallback/payload'
1734 14:37:53.635835 CPU physical address size: 39 bits
1735 14:37:53.639943 CBFS: Found @ offset 1cf4c0 size 3a954
1736 14:37:53.644381 Checking segment from ROM address 0xffecf4f8
1737 14:37:53.648771 Checking segment from ROM address 0xffecf514
1738 14:37:53.652819 Loading segment from ROM address 0xffecf4f8
1739 14:37:53.655616 code (compression=0)
1740 14:37:53.663660 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1741 14:37:53.672511 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1742 14:37:53.674947 it's not compressed!
1743 14:37:53.756468 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1744 14:37:53.762950 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1745 14:37:53.771677 Loading segment from ROM address 0xffecf514
1746 14:37:53.774122 Entry Point 0x30100018
1747 14:37:53.776037 Loaded segments
1748 14:37:53.785373 Finalizing chipset.
1749 14:37:53.787314 Finalizing SMM.
1750 14:37:53.793182 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 158436 exit 11518
1751 14:37:53.796571 mp_park_aps done after 0 msecs.
1752 14:37:53.801525 Jumping to boot code at 30100018(89c33000)
1753 14:37:53.809908 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1754 14:37:53.810035
1755 14:37:53.810144
1756 14:37:53.810436
1757 14:37:53.813833 Starting depthcharge on sarien...
1758 14:37:53.813970
1759 14:37:53.814688 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1760 14:37:53.814818 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
1761 14:37:53.814958 Setting prompt string to ['sarien:']
1762 14:37:53.815087 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:32)
1763 14:37:53.821037 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1764 14:37:53.821337
1765 14:37:53.828359 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1766 14:37:53.828899
1767 14:37:53.836660 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1768 14:37:53.836930
1769 14:37:53.838127 BIOS MMAP details:
1770 14:37:53.839124
1771 14:37:53.841582 IFD Base Offset : 0x1000000
1772 14:37:53.841666
1773 14:37:53.844480 IFD End Offset : 0x2000000
1774 14:37:53.844564
1775 14:37:53.847499 MMAP Size : 0x1000000
1776 14:37:53.847589
1777 14:37:53.850953 MMAP Start : 0xff000000
1778 14:37:53.851254
1779 14:37:53.856706 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1780 14:37:53.859645
1781 14:37:53.863834 Failed to find BH720 with VID/DID 1217:8620
1782 14:37:53.864657
1783 14:37:53.868629 New NVMe Controller 0x3214e050 @ 00:1d:04
1784 14:37:53.868744
1785 14:37:53.872828 New NVMe Controller 0x3214e118 @ 00:1d:00
1786 14:37:53.873096
1787 14:37:53.878708 The GBB signature is at 0x30000014 and is: 24 47 42 42
1788 14:37:53.882464
1789 14:37:53.884655 Wipe memory regions:
1790 14:37:53.884745
1791 14:37:53.888605 [0x00000000001000, 0x000000000a0000)
1792 14:37:53.888887
1793 14:37:53.891897 [0x00000000100000, 0x00000030000000)
1794 14:37:53.974720
1795 14:37:53.977943 [0x00000032751910, 0x00000089afd000)
1796 14:37:54.128648
1797 14:37:54.132130 [0x00000100000000, 0x0000016e800000)
1798 14:37:54.902205
1799 14:37:54.904383 R8152: Initializing
1800 14:37:54.905027
1801 14:37:54.907010 Version 6 (ocp_data = 5c30)
1802 14:37:54.907924
1803 14:37:54.910585 R8152: Done initializing
1804 14:37:54.910670
1805 14:37:54.912318 Adding net device
1806 14:37:54.912600
1807 14:37:54.918242 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1808 14:37:54.918605
1809 14:37:54.918855
1810 14:37:54.918925
1811 14:37:54.919576 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1813 14:37:55.019923 sarien: tftpboot 192.168.201.1 11299701/tftp-deploy-b4dgo6kr/kernel/bzImage 11299701/tftp-deploy-b4dgo6kr/kernel/cmdline 11299701/tftp-deploy-b4dgo6kr/ramdisk/ramdisk.cpio.gz
1814 14:37:55.020093 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1815 14:37:55.020185 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
1816 14:37:55.063328 tftpboot 192.168.201.1 11299701/tftp-deploy-b4dgo6kr/kernel/bzImage 11299701/tftp-deploy-b4dgo6kr/kernel/cmdline 11299701/tftp-deploy-b4dgo6kr/ramdisk/ramdisk.cpio.gz
1817 14:37:55.063470
1818 14:37:55.063545 Waiting for link
1819 14:37:55.223015
1820 14:37:55.223354 done.
1821 14:37:55.223626
1822 14:37:55.225673 MAC: 00:24:32:30:77:df
1823 14:37:55.226018
1824 14:37:55.229150 Sending DHCP discover... done.
1825 14:37:55.229273
1826 14:37:55.231543 Waiting for reply... done.
1827 14:37:55.232101
1828 14:37:55.235159 Sending DHCP request... done.
1829 14:37:55.235286
1830 14:37:55.238686 Waiting for reply... done.
1831 14:37:55.238806
1832 14:37:55.241130 My ip is 192.168.201.221
1833 14:37:55.241679
1834 14:37:55.244839 The DHCP server ip is 192.168.201.1
1835 14:37:55.245175
1836 14:37:55.249866 TFTP server IP predefined by user: 192.168.201.1
1837 14:37:55.250206
1838 14:37:55.256948 Bootfile predefined by user: 11299701/tftp-deploy-b4dgo6kr/kernel/bzImage
1839 14:37:55.257545
1840 14:37:55.260601 Sending tftp read request... done.
1841 14:37:55.260951
1842 14:37:55.264361 Waiting for the transfer...
1843 14:37:55.264726
1844 14:37:55.844612 00000000 ################################################################
1845 14:37:55.844969
1846 14:37:56.443614 00080000 ################################################################
1847 14:37:56.444046
1848 14:37:57.029815 00100000 ################################################################
1849 14:37:57.030279
1850 14:37:57.607755 00180000 ################################################################
1851 14:37:57.607942
1852 14:37:58.183032 00200000 ################################################################
1853 14:37:58.183482
1854 14:37:58.789668 00280000 ################################################################
1855 14:37:58.790390
1856 14:37:59.340823 00300000 ################################################################
1857 14:37:59.341290
1858 14:37:59.887845 00380000 ################################################################
1859 14:37:59.888352
1860 14:38:00.428762 00400000 ################################################################
1861 14:38:00.429370
1862 14:38:00.994485 00480000 ################################################################
1863 14:38:00.994958
1864 14:38:01.571176 00500000 ################################################################
1865 14:38:01.571788
1866 14:38:02.138039 00580000 ################################################################
1867 14:38:02.138618
1868 14:38:02.693537 00600000 ################################################################
1869 14:38:02.694030
1870 14:38:03.249570 00680000 ################################################################
1871 14:38:03.250073
1872 14:38:03.805410 00700000 ################################################################
1873 14:38:03.806028
1874 14:38:04.390771 00780000 ################################################################
1875 14:38:04.391383
1876 14:38:04.499765 00800000 ############# done.
1877 14:38:04.500276
1878 14:38:04.503555 The bootfile was 8490896 bytes long.
1879 14:38:04.504172
1880 14:38:04.507197 Sending tftp read request... done.
1881 14:38:04.507660
1882 14:38:04.510257 Waiting for the transfer...
1883 14:38:04.510373
1884 14:38:05.078254 00000000 ################################################################
1885 14:38:05.078774
1886 14:38:05.662584 00080000 ################################################################
1887 14:38:05.663103
1888 14:38:06.245677 00100000 ################################################################
1889 14:38:06.246206
1890 14:38:06.832689 00180000 ################################################################
1891 14:38:06.833071
1892 14:38:07.455453 00200000 ################################################################
1893 14:38:07.455936
1894 14:38:08.063032 00280000 ################################################################
1895 14:38:08.063599
1896 14:38:08.621698 00300000 ################################################################
1897 14:38:08.622123
1898 14:38:09.191861 00380000 ################################################################
1899 14:38:09.192347
1900 14:38:09.758079 00400000 ################################################################
1901 14:38:09.758720
1902 14:38:10.355587 00480000 ################################################################
1903 14:38:10.355978
1904 14:38:10.946792 00500000 ################################################################
1905 14:38:10.947320
1906 14:38:11.497718 00580000 ################################################################
1907 14:38:11.498327
1908 14:38:12.077171 00600000 ################################################################
1909 14:38:12.077588
1910 14:38:12.631513 00680000 ################################################################
1911 14:38:12.631674
1912 14:38:13.183519 00700000 ################################################################
1913 14:38:13.184027
1914 14:38:13.738177 00780000 ################################################################
1915 14:38:13.738824
1916 14:38:14.203447 00800000 ###################################################### done.
1917 14:38:14.204099
1918 14:38:14.206463 Sending tftp read request... done.
1919 14:38:14.206563
1920 14:38:14.209618 Waiting for the transfer...
1921 14:38:14.209709
1922 14:38:14.210948 00000000 # done.
1923 14:38:14.211042
1924 14:38:14.220500 Command line loaded dynamically from TFTP file: 11299701/tftp-deploy-b4dgo6kr/kernel/cmdline
1925 14:38:14.221077
1926 14:38:14.240593 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1927 14:38:14.243906
1928 14:38:14.247849 Shutting down all USB controllers.
1929 14:38:14.247970
1930 14:38:14.250050 Removing current net device
1931 14:38:14.255548
1932 14:38:14.258237 EC: exit firmware mode
1933 14:38:14.259374
1934 14:38:14.261539 Finalizing coreboot
1935 14:38:14.261665
1936 14:38:14.266420 Exiting depthcharge with code 4 at timestamp: 27369505
1937 14:38:14.267034
1938 14:38:14.267153
1939 14:38:14.268856 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
1940 14:38:14.269025 start: 2.2.5 auto-login-action (timeout 00:04:11) [common]
1941 14:38:14.269150 Setting prompt string to ['Linux version [0-9]']
1942 14:38:14.269274 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1943 14:38:14.269389 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1944 14:38:14.269694 Starting kernel ...
1945 14:38:14.269816
1946 14:38:14.269921
1948 14:42:25.270152 end: 2.2.5 auto-login-action (duration 00:04:11) [common]
1950 14:42:25.271552 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 251 seconds'
1952 14:42:25.272360 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1955 14:42:25.273691 end: 2 depthcharge-action (duration 00:05:00) [common]
1957 14:42:25.274837 Cleaning after the job
1958 14:42:25.275303 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299701/tftp-deploy-b4dgo6kr/ramdisk
1959 14:42:25.281283 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299701/tftp-deploy-b4dgo6kr/kernel
1960 14:42:25.286947 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299701/tftp-deploy-b4dgo6kr/modules
1961 14:42:25.288926 start: 5.1 power-off (timeout 00:00:30) [common]
1962 14:42:25.289658 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=off'
1963 14:42:30.442136 >> Command sent successfully.
1964 14:42:30.452502 Returned 0 in 5 seconds
1965 14:42:30.553847 end: 5.1 power-off (duration 00:00:05) [common]
1967 14:42:30.555399 start: 5.2 read-feedback (timeout 00:09:55) [common]
1968 14:42:30.556629 Listened to connection for namespace 'common' for up to 1s
1969 14:42:31.557274 Finalising connection for namespace 'common'
1970 14:42:31.557921 Disconnecting from shell: Finalise
1971 14:42:31.558392
1972 14:42:31.659486 end: 5.2 read-feedback (duration 00:00:01) [common]
1973 14:42:31.660065 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299701
1974 14:42:31.712459 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299701
1975 14:42:31.712677 JobError: Your job cannot terminate cleanly.