Boot log: dell-latitude-5400-8665U-sarien

    1 14:50:39.450039  lava-dispatcher, installed at version: 2023.06
    2 14:50:39.450302  start: 0 validate
    3 14:50:39.450459  Start time: 2023-08-16 14:50:39.450451+00:00 (UTC)
    4 14:50:39.450620  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:50:39.450789  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 14:50:39.702289  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:50:39.702513  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:50:39.967937  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:50:39.968134  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 14:50:40.225207  validate duration: 0.77
   12 14:50:40.225553  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 14:50:40.225663  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 14:50:40.225758  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 14:50:40.225897  Not decompressing ramdisk as can be used compressed.
   16 14:50:40.225993  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 14:50:40.226069  saving as /var/lib/lava/dispatcher/tmp/11299698/tftp-deploy-f8vs_t3h/ramdisk/rootfs.cpio.gz
   18 14:50:40.226141  total size: 8418130 (8 MB)
   19 14:50:40.227304  progress   0 % (0 MB)
   20 14:50:40.230000  progress   5 % (0 MB)
   21 14:50:40.232681  progress  10 % (0 MB)
   22 14:50:40.235271  progress  15 % (1 MB)
   23 14:50:40.237776  progress  20 % (1 MB)
   24 14:50:40.240380  progress  25 % (2 MB)
   25 14:50:40.242992  progress  30 % (2 MB)
   26 14:50:40.245333  progress  35 % (2 MB)
   27 14:50:40.247877  progress  40 % (3 MB)
   28 14:50:40.250417  progress  45 % (3 MB)
   29 14:50:40.252924  progress  50 % (4 MB)
   30 14:50:40.255444  progress  55 % (4 MB)
   31 14:50:40.257957  progress  60 % (4 MB)
   32 14:50:40.260242  progress  65 % (5 MB)
   33 14:50:40.262677  progress  70 % (5 MB)
   34 14:50:40.265139  progress  75 % (6 MB)
   35 14:50:40.267670  progress  80 % (6 MB)
   36 14:50:40.270223  progress  85 % (6 MB)
   37 14:50:40.272724  progress  90 % (7 MB)
   38 14:50:40.275142  progress  95 % (7 MB)
   39 14:50:40.277463  progress 100 % (8 MB)
   40 14:50:40.277721  8 MB downloaded in 0.05 s (155.64 MB/s)
   41 14:50:40.277905  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 14:50:40.278171  end: 1.1 download-retry (duration 00:00:00) [common]
   44 14:50:40.278268  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 14:50:40.278364  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 14:50:40.278517  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 14:50:40.278598  saving as /var/lib/lava/dispatcher/tmp/11299698/tftp-deploy-f8vs_t3h/kernel/bzImage
   48 14:50:40.278664  total size: 8490896 (8 MB)
   49 14:50:40.278730  No compression specified
   50 14:50:40.280031  progress   0 % (0 MB)
   51 14:50:40.282508  progress   5 % (0 MB)
   52 14:50:40.285069  progress  10 % (0 MB)
   53 14:50:40.287763  progress  15 % (1 MB)
   54 14:50:40.290238  progress  20 % (1 MB)
   55 14:50:40.292825  progress  25 % (2 MB)
   56 14:50:40.295379  progress  30 % (2 MB)
   57 14:50:40.297959  progress  35 % (2 MB)
   58 14:50:40.300508  progress  40 % (3 MB)
   59 14:50:40.303003  progress  45 % (3 MB)
   60 14:50:40.305543  progress  50 % (4 MB)
   61 14:50:40.308068  progress  55 % (4 MB)
   62 14:50:40.310535  progress  60 % (4 MB)
   63 14:50:40.313121  progress  65 % (5 MB)
   64 14:50:40.315652  progress  70 % (5 MB)
   65 14:50:40.318135  progress  75 % (6 MB)
   66 14:50:40.320666  progress  80 % (6 MB)
   67 14:50:40.323152  progress  85 % (6 MB)
   68 14:50:40.325843  progress  90 % (7 MB)
   69 14:50:40.328330  progress  95 % (7 MB)
   70 14:50:40.330843  progress 100 % (8 MB)
   71 14:50:40.330982  8 MB downloaded in 0.05 s (154.79 MB/s)
   72 14:50:40.331147  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 14:50:40.331421  end: 1.2 download-retry (duration 00:00:00) [common]
   75 14:50:40.331521  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 14:50:40.331620  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 14:50:40.331780  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 14:50:40.331866  saving as /var/lib/lava/dispatcher/tmp/11299698/tftp-deploy-f8vs_t3h/modules/modules.tar
   79 14:50:40.331936  total size: 253808 (0 MB)
   80 14:50:40.332006  Using unxz to decompress xz
   81 14:50:40.336710  progress  12 % (0 MB)
   82 14:50:40.337184  progress  25 % (0 MB)
   83 14:50:40.337454  progress  38 % (0 MB)
   84 14:50:40.339207  progress  51 % (0 MB)
   85 14:50:40.341295  progress  64 % (0 MB)
   86 14:50:40.343424  progress  77 % (0 MB)
   87 14:50:40.345568  progress  90 % (0 MB)
   88 14:50:40.347509  progress 100 % (0 MB)
   89 14:50:40.353936  0 MB downloaded in 0.02 s (11.01 MB/s)
   90 14:50:40.354238  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 14:50:40.354550  end: 1.3 download-retry (duration 00:00:00) [common]
   93 14:50:40.354656  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   94 14:50:40.354766  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   95 14:50:40.354863  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 14:50:40.354960  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   97 14:50:40.355215  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a
   98 14:50:40.355406  makedir: /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin
   99 14:50:40.355529  makedir: /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/tests
  100 14:50:40.355665  makedir: /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/results
  101 14:50:40.355804  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-add-keys
  102 14:50:40.355972  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-add-sources
  103 14:50:40.356120  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-background-process-start
  104 14:50:40.356272  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-background-process-stop
  105 14:50:40.356415  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-common-functions
  106 14:50:40.356558  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-echo-ipv4
  107 14:50:40.356702  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-install-packages
  108 14:50:40.356844  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-installed-packages
  109 14:50:40.356987  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-os-build
  110 14:50:40.357129  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-probe-channel
  111 14:50:40.357272  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-probe-ip
  112 14:50:40.357421  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-target-ip
  113 14:50:40.357569  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-target-mac
  114 14:50:40.357727  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-target-storage
  115 14:50:40.357878  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-test-case
  116 14:50:40.358022  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-test-event
  117 14:50:40.358164  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-test-feedback
  118 14:50:40.358306  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-test-raise
  119 14:50:40.358452  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-test-reference
  120 14:50:40.358602  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-test-runner
  121 14:50:40.358747  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-test-set
  122 14:50:40.358895  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-test-shell
  123 14:50:40.359041  Updating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-install-packages (oe)
  124 14:50:40.359218  Updating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/bin/lava-installed-packages (oe)
  125 14:50:40.359374  Creating /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/environment
  126 14:50:40.359489  LAVA metadata
  127 14:50:40.359575  - LAVA_JOB_ID=11299698
  128 14:50:40.359688  - LAVA_DISPATCHER_IP=192.168.201.1
  129 14:50:40.359848  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  130 14:50:40.359927  skipped lava-vland-overlay
  131 14:50:40.360016  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 14:50:40.360116  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  133 14:50:40.360188  skipped lava-multinode-overlay
  134 14:50:40.360273  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 14:50:40.360366  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  136 14:50:40.360451  Loading test definitions
  137 14:50:40.360556  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  138 14:50:40.360645  Using /lava-11299698 at stage 0
  139 14:50:40.361010  uuid=11299698_1.4.2.3.1 testdef=None
  140 14:50:40.361110  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 14:50:40.361212  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  142 14:50:40.361822  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 14:50:40.362082  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  145 14:50:40.362820  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 14:50:40.363079  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  148 14:50:40.363797  runner path: /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/0/tests/0_dmesg test_uuid 11299698_1.4.2.3.1
  149 14:50:40.363974  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 14:50:40.364232  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  152 14:50:40.364314  Using /lava-11299698 at stage 1
  153 14:50:40.364659  uuid=11299698_1.4.2.3.5 testdef=None
  154 14:50:40.364759  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 14:50:40.364855  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  156 14:50:40.365404  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 14:50:40.365647  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  159 14:50:40.366387  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 14:50:40.366645  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  162 14:50:40.367370  runner path: /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/1/tests/1_bootrr test_uuid 11299698_1.4.2.3.5
  163 14:50:40.367543  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 14:50:40.367778  Creating lava-test-runner.conf files
  166 14:50:40.367850  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/0 for stage 0
  167 14:50:40.367953  - 0_dmesg
  168 14:50:40.368045  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299698/lava-overlay-dndfb_7a/lava-11299698/1 for stage 1
  169 14:50:40.368148  - 1_bootrr
  170 14:50:40.368257  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 14:50:40.368354  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  172 14:50:40.377896  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 14:50:40.378058  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  174 14:50:40.378163  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 14:50:40.378264  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 14:50:40.378363  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  177 14:50:40.660724  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 14:50:40.661162  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  179 14:50:40.661294  extracting modules file /var/lib/lava/dispatcher/tmp/11299698/tftp-deploy-f8vs_t3h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299698/extract-overlay-ramdisk-yqf4genf/ramdisk
  180 14:50:40.676855  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 14:50:40.677038  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  182 14:50:40.677149  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299698/compress-overlay-ommwek65/overlay-1.4.2.4.tar.gz to ramdisk
  183 14:50:40.677234  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299698/compress-overlay-ommwek65/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299698/extract-overlay-ramdisk-yqf4genf/ramdisk
  184 14:50:40.687477  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 14:50:40.687656  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  186 14:50:40.687764  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 14:50:40.687864  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  188 14:50:40.687954  Building ramdisk /var/lib/lava/dispatcher/tmp/11299698/extract-overlay-ramdisk-yqf4genf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299698/extract-overlay-ramdisk-yqf4genf/ramdisk
  189 14:50:40.833026  >> 49827 blocks

  190 14:50:41.765507  rename /var/lib/lava/dispatcher/tmp/11299698/extract-overlay-ramdisk-yqf4genf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299698/tftp-deploy-f8vs_t3h/ramdisk/ramdisk.cpio.gz
  191 14:50:41.766050  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 14:50:41.766195  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 14:50:41.766312  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 14:50:41.766422  No mkimage arch provided, not using FIT.
  195 14:50:41.766526  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 14:50:41.766622  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 14:50:41.766742  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 14:50:41.766848  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 14:50:41.766935  No LXC device requested
  200 14:50:41.767024  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 14:50:41.767124  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 14:50:41.767215  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 14:50:41.767306  Checking files for TFTP limit of 4294967296 bytes.
  204 14:50:41.767763  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 14:50:41.767880  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 14:50:41.767983  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 14:50:41.768120  substitutions:
  208 14:50:41.768194  - {DTB}: None
  209 14:50:41.768267  - {INITRD}: 11299698/tftp-deploy-f8vs_t3h/ramdisk/ramdisk.cpio.gz
  210 14:50:41.768335  - {KERNEL}: 11299698/tftp-deploy-f8vs_t3h/kernel/bzImage
  211 14:50:41.768400  - {LAVA_MAC}: None
  212 14:50:41.768464  - {PRESEED_CONFIG}: None
  213 14:50:41.768526  - {PRESEED_LOCAL}: None
  214 14:50:41.768587  - {RAMDISK}: 11299698/tftp-deploy-f8vs_t3h/ramdisk/ramdisk.cpio.gz
  215 14:50:41.768649  - {ROOT_PART}: None
  216 14:50:41.768710  - {ROOT}: None
  217 14:50:41.768772  - {SERVER_IP}: 192.168.201.1
  218 14:50:41.768833  - {TEE}: None
  219 14:50:41.768894  Parsed boot commands:
  220 14:50:41.768955  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 14:50:41.769161  Parsed boot commands: tftpboot 192.168.201.1 11299698/tftp-deploy-f8vs_t3h/kernel/bzImage 11299698/tftp-deploy-f8vs_t3h/kernel/cmdline 11299698/tftp-deploy-f8vs_t3h/ramdisk/ramdisk.cpio.gz
  222 14:50:41.769259  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 14:50:41.769355  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 14:50:41.769459  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 14:50:41.769556  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 14:50:41.769636  Not connected, no need to disconnect.
  227 14:50:41.769719  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 14:50:41.769937  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 14:50:41.770016  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-0'
  230 14:50:41.774448  Setting prompt string to ['lava-test: # ']
  231 14:50:41.774874  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 14:50:41.775002  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 14:50:41.775116  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 14:50:41.775220  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 14:50:41.775460  Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=reboot'
  236 14:50:58.704773  >> Command sent successfully.

  237 14:50:58.715507  Returned 0 in 16 seconds
  238 14:50:58.816819  end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
  240 14:50:58.818262  end: 2.2.2 reset-device (duration 00:00:17) [common]
  241 14:50:58.818766  start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
  242 14:50:58.819341  Setting prompt string to 'Starting depthcharge on sarien...'
  243 14:50:58.819874  Changing prompt to 'Starting depthcharge on sarien...'
  244 14:50:58.820316  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  245 14:50:58.821065  [Enter `^Ec?' for help]

  246 14:50:58.821157  

  247 14:50:58.821228  

  248 14:50:58.821296  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  249 14:50:58.821363  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz

  250 14:50:58.821428  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  251 14:50:58.821492  CPU: AES supported, TXT supported, VT supported

  252 14:50:58.821555  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)

  253 14:50:58.821619  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  254 14:50:58.821681  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1

  255 14:50:58.821742  VBOOT: Loading verstage.

  256 14:50:58.821805  CBFS @ 1d00000 size 300000

  257 14:50:58.821867  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  258 14:50:58.821929  CBFS: Locating 'fallback/verstage'

  259 14:50:58.821991  CBFS: Found @ offset 10f6c0 size 1435c

  260 14:50:58.822053  

  261 14:50:58.822113  

  262 14:50:58.822174  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  263 14:50:58.822237  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  264 14:50:58.822299  done! DID_VID 0x00281ae0

  265 14:50:58.822361  TPM ready after 0 ms

  266 14:50:58.822422  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  267 14:50:58.822484  tlcl_send_startup: Startup return code is 0

  268 14:50:58.822545  TPM: setup succeeded

  269 14:50:58.822607  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  270 14:50:58.822669  Checking cr50 for recovery request

  271 14:50:58.822730  Phase 1

  272 14:50:58.822791  FMAP: Found "FLASH" version 1.1 at 1c10000.

  273 14:50:58.822852  FMAP: base = fe000000 size = 2000000 #areas = 37

  274 14:50:58.822914  FMAP: area GBB found @ 1c11000 (978944 bytes)

  275 14:50:58.822976  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  276 14:50:58.823037  Phase 2

  277 14:50:58.823098  Phase 3

  278 14:50:58.823158  FMAP: area GBB found @ 1c11000 (978944 bytes)

  279 14:50:58.823220  VB2:vb2_report_dev_firmware() This is developer signed firmware

  280 14:50:58.823293  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  281 14:50:58.823356  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  282 14:50:58.823417  VB2:vb2_verify_keyblock() Checking key block signature...

  283 14:50:58.823478  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  284 14:50:58.823539  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  285 14:50:58.823600  VB2:vb2_verify_fw_preamble() Verifying preamble.

  286 14:50:58.823661  Phase 4

  287 14:50:58.823721  FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)

  288 14:50:58.823782  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  289 14:50:58.823844  VB2:vb2_rsa_verify_digest() Digest check failed!

  290 14:50:58.823905  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7

  291 14:50:58.823965  Saving nvdata

  292 14:50:58.824025  Reboot requested (10020007)

  293 14:50:58.824086  board_reset() called!

  294 14:50:58.824148  full_reset() called!

  295 14:51:02.932426  

  296 14:51:02.932645  

  297 14:51:02.940544  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  298 14:51:02.945668  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz

  299 14:51:02.949719  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  300 14:51:02.954799  CPU: AES supported, TXT supported, VT supported

  301 14:51:02.960154  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)

  302 14:51:02.965138  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  303 14:51:02.970015  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1

  304 14:51:02.974321  VBOOT: Loading verstage.

  305 14:51:02.976742  CBFS @ 1d00000 size 300000

  306 14:51:02.983085  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  307 14:51:02.986584  CBFS: Locating 'fallback/verstage'

  308 14:51:02.990387  CBFS: Found @ offset 10f6c0 size 1435c

  309 14:51:03.004966  

  310 14:51:03.005091  

  311 14:51:03.013789  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  312 14:51:03.020645  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  313 14:51:03.143731  .done! DID_VID 0x00281ae0

  314 14:51:03.146193  TPM ready after 0 ms

  315 14:51:03.149971  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  316 14:51:03.226167  tlcl_send_startup: Startup return code is 0

  317 14:51:03.228180  TPM: setup succeeded

  318 14:51:03.245886  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  319 14:51:03.248997  Checking cr50 for recovery request

  320 14:51:03.258411  Phase 1

  321 14:51:03.263688  FMAP: Found "FLASH" version 1.1 at 1c10000.

  322 14:51:03.268140  FMAP: base = fe000000 size = 2000000 #areas = 37

  323 14:51:03.273356  FMAP: area GBB found @ 1c11000 (978944 bytes)

  324 14:51:03.280772  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  325 14:51:03.286647  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  326 14:51:03.289445  Recovery requested (1009000e)

  327 14:51:03.291098  Saving nvdata

  328 14:51:03.305805  tlcl_extend: response is 0

  329 14:51:03.320045  tlcl_extend: response is 0

  330 14:51:03.324356  CBFS @ 1d00000 size 300000

  331 14:51:03.330759  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  332 14:51:03.334294  CBFS: Locating 'fallback/romstage'

  333 14:51:03.337404  CBFS: Found @ offset 80 size 15b2c

  334 14:51:03.338638  

  335 14:51:03.339034  

  336 14:51:03.347465  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...

  337 14:51:03.352212  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  338 14:51:03.356619  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  339 14:51:03.361150  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  340 14:51:03.365177  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  341 14:51:03.369194  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000

  342 14:51:03.371680  TCO_STS:   0000 0004

  343 14:51:03.375139  GEN_PMCON: d0015209 00002200

  344 14:51:03.378216  GBLRST_CAUSE: 00000000 00000000

  345 14:51:03.379281  prev_sleep_state 5

  346 14:51:03.383730  Boot Count incremented to 33319

  347 14:51:03.386216  CBFS @ 1d00000 size 300000

  348 14:51:03.392640  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  349 14:51:03.395357  CBFS: Locating 'fspm.bin'

  350 14:51:03.399280  CBFS: Found @ offset 60fc0 size 70000

  351 14:51:03.405032  FMAP: Found "FLASH" version 1.1 at 1c10000.

  352 14:51:03.409763  FMAP: base = fe000000 size = 2000000 #areas = 37

  353 14:51:03.416066  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

  354 14:51:03.421884  Probing TPM I2C: done! DID_VID 0x00281ae0

  355 14:51:03.424559  Locality already claimed

  356 14:51:03.427201  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  357 14:51:03.447379  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  358 14:51:03.453823  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  359 14:51:03.456621  MRC cache found, size 18e0

  360 14:51:03.458880  bootmode is set to :2

  361 14:51:21.222023  CBMEM:

  362 14:51:21.225423  IMD: root @ 89fff000 254 entries.

  363 14:51:21.228891  IMD: root @ 89ffec00 62 entries.

  364 14:51:21.231638  External stage cache:

  365 14:51:21.234820  IMD: root @ 8abff000 254 entries.

  366 14:51:21.238747  IMD: root @ 8abfec00 62 entries.

  367 14:51:21.244141  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...

  368 14:51:21.247547  creating vboot_handoff structure

  369 14:51:21.270310  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  370 14:51:21.319459  tlcl_write: response is 0

  371 14:51:21.339876  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  372 14:51:21.344372  MRC: TPM MRC hash updated successfully.

  373 14:51:21.345409  1 DIMMs found

  374 14:51:21.347984  top_of_ram = 0x8a000000

  375 14:51:21.353357  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)

  376 14:51:21.357809  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  377 14:51:21.361205  CBFS @ 1d00000 size 300000

  378 14:51:21.367697  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  379 14:51:21.370665  CBFS: Locating 'fallback/postcar'

  380 14:51:21.375087  CBFS: Found @ offset 107000 size 41a4

  381 14:51:21.380446  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)

  382 14:51:21.391301  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210

  383 14:51:21.395738  Processing 126 relocs. Offset value of 0x87cdd000

  384 14:51:21.398546  

  385 14:51:21.398973  

  386 14:51:21.407149  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...

  387 14:51:21.409649  CBFS @ 1d00000 size 300000

  388 14:51:21.415977  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  389 14:51:21.419392  CBFS: Locating 'fallback/ramstage'

  390 14:51:21.423558  CBFS: Found @ offset 458c0 size 1a8a8

  391 14:51:21.430425  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)

  392 14:51:21.457831  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0

  393 14:51:21.462633  Processing 3754 relocs. Offset value of 0x88e81000

  394 14:51:21.469345  

  395 14:51:21.470070  

  396 14:51:21.478079  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...

  397 14:51:21.481846  FMAP: Found "FLASH" version 1.1 at 1c10000.

  398 14:51:21.487594  FMAP: base = fe000000 size = 2000000 #areas = 37

  399 14:51:21.491826  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

  400 14:51:21.496178  WARNING: RO_VPD is uninitialized or empty.

  401 14:51:21.501233  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  402 14:51:21.505766  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  403 14:51:21.507618  Normal boot.

  404 14:51:21.513703  BS: BS_PRE_DEVICE times (us): entry 0 run 58 exit 1164

  405 14:51:21.517042  CBFS @ 1d00000 size 300000

  406 14:51:21.523480  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  407 14:51:21.526725  CBFS: Locating 'cpu_microcode_blob.bin'

  408 14:51:21.531137  CBFS: Found @ offset 15c40 size 2fc00

  409 14:51:21.535557  microcode: sig=0x806ec pf=0x80 revision=0xb7

  410 14:51:21.537256  Skip microcode update

  411 14:51:21.539823  CBFS @ 1d00000 size 300000

  412 14:51:21.546506  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  413 14:51:21.548530  CBFS: Locating 'fsps.bin'

  414 14:51:21.552906  CBFS: Found @ offset d1fc0 size 35000

  415 14:51:21.583326  Detected 4 core, 8 thread CPU.

  416 14:51:21.585097  Setting up SMI for CPU

  417 14:51:21.587416  IED base = 0x8ac00000

  418 14:51:21.589684  IED size = 0x00400000

  419 14:51:21.592583  Will perform SMM setup.

  420 14:51:21.597466  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.

  421 14:51:21.605496  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  422 14:51:21.609959  Processing 16 relocs. Offset value of 0x00030000

  423 14:51:21.613636  Attempting to start 7 APs

  424 14:51:21.617068  Waiting for 10ms after sending INIT.

  425 14:51:21.632945  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  426 14:51:21.633805  done.

  427 14:51:21.635746  AP: slot 1 apic_id 3.

  428 14:51:21.638611  AP: slot 4 apic_id 2.

  429 14:51:21.640557  AP: slot 2 apic_id 6.

  430 14:51:21.642005  AP: slot 5 apic_id 7.

  431 14:51:21.644735  AP: slot 6 apic_id 4.

  432 14:51:21.646890  AP: slot 7 apic_id 5.

  433 14:51:21.651160  Waiting for 2nd SIPI to complete...done.

  434 14:51:21.658222  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  435 14:51:21.662925  Processing 13 relocs. Offset value of 0x00038000

  436 14:51:21.669678  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)

  437 14:51:21.673379  Installing SMM handler to 0x8a000000

  438 14:51:21.681310  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40

  439 14:51:21.687418  Processing 867 relocs. Offset value of 0x8a010000

  440 14:51:21.694935  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8

  441 14:51:21.700092  Processing 13 relocs. Offset value of 0x8a008000

  442 14:51:21.705502  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd

  443 14:51:21.711569  SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd

  444 14:51:21.717404  SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd

  445 14:51:21.722740  SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd

  446 14:51:21.728460  SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd

  447 14:51:21.734323  SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd

  448 14:51:21.740448  SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd

  449 14:51:21.747478  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)

  450 14:51:21.750441  Clearing SMI status registers

  451 14:51:21.751455  SMI_STS: PM1 

  452 14:51:21.754509  PM1_STS: WAK PWRBTN TMROF 

  453 14:51:21.756870  TCO_STS: BOOT SECOND_TO 

  454 14:51:21.758904  GPE0 STD STS: eSPI 

  455 14:51:21.760998  New SMBASE 0x8a000000

  456 14:51:21.764523  In relocation handler: CPU 0

  457 14:51:21.768289  New SMBASE=0x8a000000 IEDBASE=0x8ac00000

  458 14:51:21.773206  Writing SMRR. base = 0x8a000006, mask=0xff000800

  459 14:51:21.775541  Relocation complete.

  460 14:51:21.778106  New SMBASE 0x89fff400

  461 14:51:21.780473  In relocation handler: CPU 3

  462 14:51:21.785019  New SMBASE=0x89fff400 IEDBASE=0x8ac00000

  463 14:51:21.789371  Writing SMRR. base = 0x8a000006, mask=0xff000800

  464 14:51:21.792121  Relocation complete.

  465 14:51:21.794183  New SMBASE 0x89fffc00

  466 14:51:21.796701  In relocation handler: CPU 1

  467 14:51:21.801486  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000

  468 14:51:21.805473  Writing SMRR. base = 0x8a000006, mask=0xff000800

  469 14:51:21.807756  Relocation complete.

  470 14:51:21.810330  New SMBASE 0x89fff000

  471 14:51:21.812750  In relocation handler: CPU 4

  472 14:51:21.817769  New SMBASE=0x89fff000 IEDBASE=0x8ac00000

  473 14:51:21.821799  Writing SMRR. base = 0x8a000006, mask=0xff000800

  474 14:51:21.823711  Relocation complete.

  475 14:51:21.826545  New SMBASE 0x89fff800

  476 14:51:21.829375  In relocation handler: CPU 2

  477 14:51:21.833342  New SMBASE=0x89fff800 IEDBASE=0x8ac00000

  478 14:51:21.838421  Writing SMRR. base = 0x8a000006, mask=0xff000800

  479 14:51:21.840400  Relocation complete.

  480 14:51:21.842727  New SMBASE 0x89ffec00

  481 14:51:21.845476  In relocation handler: CPU 5

  482 14:51:21.849726  New SMBASE=0x89ffec00 IEDBASE=0x8ac00000

  483 14:51:21.854781  Writing SMRR. base = 0x8a000006, mask=0xff000800

  484 14:51:21.856596  Relocation complete.

  485 14:51:21.859547  New SMBASE 0x89ffe400

  486 14:51:21.861951  In relocation handler: CPU 7

  487 14:51:21.865852  New SMBASE=0x89ffe400 IEDBASE=0x8ac00000

  488 14:51:21.871028  Writing SMRR. base = 0x8a000006, mask=0xff000800

  489 14:51:21.872737  Relocation complete.

  490 14:51:21.875447  New SMBASE 0x89ffe800

  491 14:51:21.878229  In relocation handler: CPU 6

  492 14:51:21.882209  New SMBASE=0x89ffe800 IEDBASE=0x8ac00000

  493 14:51:21.887203  Writing SMRR. base = 0x8a000006, mask=0xff000800

  494 14:51:21.889108  Relocation complete.

  495 14:51:21.891356  Initializing CPU #0

  496 14:51:21.894962  CPU: vendor Intel device 806ec

  497 14:51:21.898366  CPU: family 06, model 8e, stepping 0c

  498 14:51:21.900933  Clearing out pending MCEs

  499 14:51:21.906157  Setting up local APIC... apic_id: 0x00 done.

  500 14:51:21.908622  Turbo is available but hidden

  501 14:51:21.910865  Turbo has been enabled

  502 14:51:21.913491  VMX status: enabled

  503 14:51:21.916486  IA32_FEATURE_CONTROL status: locked

  504 14:51:21.919548  Skip microcode update

  505 14:51:21.920836  CPU #0 initialized

  506 14:51:21.922785  Initializing CPU #3

  507 14:51:21.925498  Initializing CPU #2

  508 14:51:21.927200  Initializing CPU #5

  509 14:51:21.930736  CPU: vendor Intel device 806ec

  510 14:51:21.934373  CPU: family 06, model 8e, stepping 0c

  511 14:51:21.937211  CPU: vendor Intel device 806ec

  512 14:51:21.940850  CPU: family 06, model 8e, stepping 0c

  513 14:51:21.943415  Clearing out pending MCEs

  514 14:51:21.946218  Clearing out pending MCEs

  515 14:51:21.950403  Setting up local APIC...Initializing CPU #6

  516 14:51:21.952633  Initializing CPU #4

  517 14:51:21.955596  CPU: vendor Intel device 806ec

  518 14:51:21.959357  CPU: family 06, model 8e, stepping 0c

  519 14:51:21.961906  Clearing out pending MCEs

  520 14:51:21.964495  Initializing CPU #1

  521 14:51:21.967548  CPU: vendor Intel device 806ec

  522 14:51:21.970643  CPU: vendor Intel device 806ec

  523 14:51:21.974836  CPU: family 06, model 8e, stepping 0c

  524 14:51:21.978061  CPU: family 06, model 8e, stepping 0c

  525 14:51:21.980669  Clearing out pending MCEs

  526 14:51:21.983387  Clearing out pending MCEs

  527 14:51:21.988598  Setting up local APIC...CPU: vendor Intel device 806ec

  528 14:51:21.992860  CPU: family 06, model 8e, stepping 0c

  529 14:51:21.994411  Initializing CPU #7

  530 14:51:21.997505  Clearing out pending MCEs

  531 14:51:21.999942  CPU: vendor Intel device 806ec

  532 14:51:22.003848  CPU: family 06, model 8e, stepping 0c

  533 14:51:22.008194  Setting up local APIC... apic_id: 0x02 done.

  534 14:51:22.015623  Setting up local APIC...Setting up local APIC... apic_id: 0x06 done.

  535 14:51:22.020283  Setting up local APIC...Clearing out pending MCEs

  536 14:51:22.022556   apic_id: 0x04 done.

  537 14:51:22.026918  Setting up local APIC... apic_id: 0x01 done.

  538 14:51:22.029394   apic_id: 0x03 done.

  539 14:51:22.031404  VMX status: enabled

  540 14:51:22.033380  VMX status: enabled

  541 14:51:22.036774  IA32_FEATURE_CONTROL status: locked

  542 14:51:22.040211  IA32_FEATURE_CONTROL status: locked

  543 14:51:22.042870  Skip microcode update

  544 14:51:22.044993  Skip microcode update

  545 14:51:22.046327  CPU #4 initialized

  546 14:51:22.048683  CPU #1 initialized

  547 14:51:22.050819  VMX status: enabled

  548 14:51:22.053661   apic_id: 0x07 done.

  549 14:51:22.054758  VMX status: enabled

  550 14:51:22.056828  VMX status: enabled

  551 14:51:22.060553  IA32_FEATURE_CONTROL status: locked

  552 14:51:22.064452  IA32_FEATURE_CONTROL status: locked

  553 14:51:22.066352  Skip microcode update

  554 14:51:22.068474  Skip microcode update

  555 14:51:22.071221  CPU #2 initialized

  556 14:51:22.073174  CPU #5 initialized

  557 14:51:22.075965  IA32_FEATURE_CONTROL status: locked

  558 14:51:22.078159   apic_id: 0x05 done.

  559 14:51:22.080260  VMX status: enabled

  560 14:51:22.082855  VMX status: enabled

  561 14:51:22.085570  IA32_FEATURE_CONTROL status: locked

  562 14:51:22.089665  IA32_FEATURE_CONTROL status: locked

  563 14:51:22.091518  Skip microcode update

  564 14:51:22.093584  Skip microcode update

  565 14:51:22.095536  CPU #6 initialized

  566 14:51:22.097886  CPU #7 initialized

  567 14:51:22.100133  Skip microcode update

  568 14:51:22.102154  CPU #3 initialized

  569 14:51:22.106527  bsp_do_flight_plan done after 451 msecs.

  570 14:51:22.109400  CPU: frequency set to 4800 MHz

  571 14:51:22.110850  Enabling SMIs.

  572 14:51:22.112404  Locking SMM.

  573 14:51:22.116042  CBFS @ 1d00000 size 300000

  574 14:51:22.121566  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  575 14:51:22.123958  CBFS: Locating 'vbt.bin'

  576 14:51:22.128281  CBFS: Found @ offset 60a40 size 4a0

  577 14:51:22.133456  Found a VBT of 4608 bytes after decompression

  578 14:51:22.146614  FMAP: area GBB found @ 1c11000 (978944 bytes)

  579 14:51:22.177854  Detected 4 core, 8 thread CPU.

  580 14:51:22.181067  Detected 4 core, 8 thread CPU.

  581 14:51:22.407827  Display FSP Version Info HOB

  582 14:51:22.411259  Reference Code - CPU = 7.0.5e.40

  583 14:51:22.414260  uCode Version = 0.0.0.b8

  584 14:51:22.416196  Display FSP Version Info HOB

  585 14:51:22.419959  Reference Code - ME = 7.0.5e.40

  586 14:51:22.422739  MEBx version = 0.0.0.0

  587 14:51:22.425670  ME Firmware Version = Consumer SKU

  588 14:51:22.428914  Display FSP Version Info HOB

  589 14:51:22.432695  Reference Code - CNL PCH = 7.0.5e.40

  590 14:51:22.435035  PCH-CRID Status = Disabled

  591 14:51:22.438466  CNL PCH H A0 Hsio Version = 2.0.0.0

  592 14:51:22.442247  CNL PCH H Ax Hsio Version = 9.0.0.0

  593 14:51:22.446168  CNL PCH H Bx Hsio Version = a.0.0.0

  594 14:51:22.449641  CNL PCH LP B0 Hsio Version = 7.0.0.0

  595 14:51:22.453662  CNL PCH LP Bx Hsio Version = 6.0.0.0

  596 14:51:22.457066  CNL PCH LP Dx Hsio Version = 7.0.0.0

  597 14:51:22.460016  Display FSP Version Info HOB

  598 14:51:22.464691  Reference Code - SA - System Agent = 7.0.5e.40

  599 14:51:22.468158  Reference Code - MRC = 0.7.1.68

  600 14:51:22.471092  SA - PCIe Version = 7.0.5e.40

  601 14:51:22.473057  SA-CRID Status = Disabled

  602 14:51:22.477032  SA-CRID Original Value = 0.0.0.c

  603 14:51:22.479714  SA-CRID New Value = 0.0.0.c

  604 14:51:22.497799  RTC Init

  605 14:51:22.501494  Set power off after power failure.

  606 14:51:22.503185  Disabling Deep S3

  607 14:51:22.505231  Disabling Deep S3

  608 14:51:22.506747  Disabling Deep S4

  609 14:51:22.509113  Disabling Deep S4

  610 14:51:22.510312  Disabling Deep S5

  611 14:51:22.512213  Disabling Deep S5

  612 14:51:22.519270  BS: BS_DEV_INIT_CHIPS times (us): entry 598728 run 383955 exit 16217

  613 14:51:22.521775  Enumerating buses...

  614 14:51:22.526460  Show all devs... Before device enumeration.

  615 14:51:22.528227  Root Device: enabled 1

  616 14:51:22.530967  CPU_CLUSTER: 0: enabled 1

  617 14:51:22.533569  DOMAIN: 0000: enabled 1

  618 14:51:22.535623  APIC: 00: enabled 1

  619 14:51:22.538193  PCI: 00:00.0: enabled 1

  620 14:51:22.540005  PCI: 00:02.0: enabled 1

  621 14:51:22.543041  PCI: 00:04.0: enabled 1

  622 14:51:22.545316  PCI: 00:12.0: enabled 1

  623 14:51:22.548055  PCI: 00:12.5: enabled 0

  624 14:51:22.550439  PCI: 00:12.6: enabled 0

  625 14:51:22.552316  PCI: 00:13.0: enabled 0

  626 14:51:22.555143  PCI: 00:14.0: enabled 1

  627 14:51:22.557743  PCI: 00:14.1: enabled 0

  628 14:51:22.559987  PCI: 00:14.3: enabled 1

  629 14:51:22.562853  PCI: 00:14.5: enabled 0

  630 14:51:22.564991  PCI: 00:15.0: enabled 1

  631 14:51:22.567700  PCI: 00:15.1: enabled 1

  632 14:51:22.569354  PCI: 00:15.2: enabled 0

  633 14:51:22.571768  PCI: 00:15.3: enabled 0

  634 14:51:22.574041  PCI: 00:16.0: enabled 1

  635 14:51:22.577147  PCI: 00:16.1: enabled 0

  636 14:51:22.579529  PCI: 00:16.2: enabled 0

  637 14:51:22.581893  PCI: 00:16.3: enabled 0

  638 14:51:22.583966  PCI: 00:16.4: enabled 0

  639 14:51:22.586151  PCI: 00:16.5: enabled 0

  640 14:51:22.589012  PCI: 00:17.0: enabled 1

  641 14:51:22.591610  PCI: 00:19.0: enabled 1

  642 14:51:22.594330  PCI: 00:19.1: enabled 0

  643 14:51:22.596330  PCI: 00:19.2: enabled 1

  644 14:51:22.598777  PCI: 00:1a.0: enabled 0

  645 14:51:22.601346  PCI: 00:1c.0: enabled 1

  646 14:51:22.603383  PCI: 00:1c.1: enabled 0

  647 14:51:22.605483  PCI: 00:1c.2: enabled 0

  648 14:51:22.608075  PCI: 00:1c.3: enabled 0

  649 14:51:22.610468  PCI: 00:1c.4: enabled 0

  650 14:51:22.613272  PCI: 00:1c.5: enabled 0

  651 14:51:22.615852  PCI: 00:1c.6: enabled 0

  652 14:51:22.617977  PCI: 00:1c.7: enabled 1

  653 14:51:22.620649  PCI: 00:1d.0: enabled 1

  654 14:51:22.622580  PCI: 00:1d.1: enabled 1

  655 14:51:22.625039  PCI: 00:1d.2: enabled 0

  656 14:51:22.627669  PCI: 00:1d.3: enabled 0

  657 14:51:22.629969  PCI: 00:1d.4: enabled 1

  658 14:51:22.633142  PCI: 00:1e.0: enabled 0

  659 14:51:22.634718  PCI: 00:1e.1: enabled 0

  660 14:51:22.637670  PCI: 00:1e.2: enabled 0

  661 14:51:22.640112  PCI: 00:1e.3: enabled 0

  662 14:51:22.642074  PCI: 00:1f.0: enabled 1

  663 14:51:22.644492  PCI: 00:1f.1: enabled 1

  664 14:51:22.647278  PCI: 00:1f.2: enabled 1

  665 14:51:22.649378  PCI: 00:1f.3: enabled 1

  666 14:51:22.651868  PCI: 00:1f.4: enabled 1

  667 14:51:22.654123  PCI: 00:1f.5: enabled 1

  668 14:51:22.657093  PCI: 00:1f.6: enabled 1

  669 14:51:22.659363  USB0 port 0: enabled 1

  670 14:51:22.661831  I2C: 00:10: enabled 1

  671 14:51:22.663732  I2C: 00:10: enabled 1

  672 14:51:22.666432  I2C: 00:34: enabled 1

  673 14:51:22.668690  I2C: 00:2c: enabled 1

  674 14:51:22.670221  I2C: 00:50: enabled 1

  675 14:51:22.672487  PNP: 0c09.0: enabled 1

  676 14:51:22.674807  USB2 port 0: enabled 1

  677 14:51:22.677410  USB2 port 1: enabled 1

  678 14:51:22.679545  USB2 port 2: enabled 1

  679 14:51:22.682009  USB2 port 4: enabled 1

  680 14:51:22.684534  USB2 port 5: enabled 1

  681 14:51:22.687266  USB2 port 6: enabled 1

  682 14:51:22.689248  USB2 port 7: enabled 1

  683 14:51:22.691407  USB2 port 8: enabled 1

  684 14:51:22.693592  USB2 port 9: enabled 1

  685 14:51:22.695945  USB3 port 0: enabled 1

  686 14:51:22.698990  USB3 port 1: enabled 1

  687 14:51:22.701452  USB3 port 2: enabled 1

  688 14:51:22.703054  USB3 port 3: enabled 1

  689 14:51:22.705406  USB3 port 4: enabled 1

  690 14:51:22.707423  APIC: 03: enabled 1

  691 14:51:22.709652  APIC: 06: enabled 1

  692 14:51:22.711244  APIC: 01: enabled 1

  693 14:51:22.713768  APIC: 02: enabled 1

  694 14:51:22.715893  APIC: 07: enabled 1

  695 14:51:22.717780  APIC: 04: enabled 1

  696 14:51:22.719846  APIC: 05: enabled 1

  697 14:51:22.721641  Compare with tree...

  698 14:51:22.724384  Root Device: enabled 1

  699 14:51:22.726597   CPU_CLUSTER: 0: enabled 1

  700 14:51:22.729638    APIC: 00: enabled 1

  701 14:51:22.731172    APIC: 03: enabled 1

  702 14:51:22.733486    APIC: 06: enabled 1

  703 14:51:22.735867    APIC: 01: enabled 1

  704 14:51:22.737732    APIC: 02: enabled 1

  705 14:51:22.740206    APIC: 07: enabled 1

  706 14:51:22.742530    APIC: 04: enabled 1

  707 14:51:22.744652    APIC: 05: enabled 1

  708 14:51:22.747326   DOMAIN: 0000: enabled 1

  709 14:51:22.749680    PCI: 00:00.0: enabled 1

  710 14:51:22.752252    PCI: 00:02.0: enabled 1

  711 14:51:22.755782    PCI: 00:04.0: enabled 1

  712 14:51:22.758037    PCI: 00:12.0: enabled 1

  713 14:51:22.760522    PCI: 00:12.5: enabled 0

  714 14:51:22.763417    PCI: 00:12.6: enabled 0

  715 14:51:22.765388    PCI: 00:13.0: enabled 0

  716 14:51:22.768395    PCI: 00:14.0: enabled 1

  717 14:51:22.770745     USB0 port 0: enabled 1

  718 14:51:22.774114      USB2 port 0: enabled 1

  719 14:51:22.776425      USB2 port 1: enabled 1

  720 14:51:22.778897      USB2 port 2: enabled 1

  721 14:51:22.781632      USB2 port 4: enabled 1

  722 14:51:22.784169      USB2 port 5: enabled 1

  723 14:51:22.786921      USB2 port 6: enabled 1

  724 14:51:22.790150      USB2 port 7: enabled 1

  725 14:51:22.792660      USB2 port 8: enabled 1

  726 14:51:22.795207      USB2 port 9: enabled 1

  727 14:51:22.798063      USB3 port 0: enabled 1

  728 14:51:22.801337      USB3 port 1: enabled 1

  729 14:51:22.803260      USB3 port 2: enabled 1

  730 14:51:22.806804      USB3 port 3: enabled 1

  731 14:51:22.808938      USB3 port 4: enabled 1

  732 14:51:22.811377    PCI: 00:14.1: enabled 0

  733 14:51:22.814571    PCI: 00:14.3: enabled 1

  734 14:51:22.816631    PCI: 00:14.5: enabled 0

  735 14:51:22.819660    PCI: 00:15.0: enabled 1

  736 14:51:22.821882     I2C: 00:10: enabled 1

  737 14:51:22.825040     I2C: 00:10: enabled 1

  738 14:51:22.827674     I2C: 00:34: enabled 1

  739 14:51:22.830196    PCI: 00:15.1: enabled 1

  740 14:51:22.832780     I2C: 00:2c: enabled 1

  741 14:51:22.835221    PCI: 00:15.2: enabled 0

  742 14:51:22.837356    PCI: 00:15.3: enabled 0

  743 14:51:22.840211    PCI: 00:16.0: enabled 1

  744 14:51:22.843185    PCI: 00:16.1: enabled 0

  745 14:51:22.845083    PCI: 00:16.2: enabled 0

  746 14:51:22.847703    PCI: 00:16.3: enabled 0

  747 14:51:22.851028    PCI: 00:16.4: enabled 0

  748 14:51:22.853474    PCI: 00:16.5: enabled 0

  749 14:51:22.855576    PCI: 00:17.0: enabled 1

  750 14:51:22.858708    PCI: 00:19.0: enabled 1

  751 14:51:22.861278     I2C: 00:50: enabled 1

  752 14:51:22.863330    PCI: 00:19.1: enabled 0

  753 14:51:22.866158    PCI: 00:19.2: enabled 1

  754 14:51:22.868766    PCI: 00:1a.0: enabled 0

  755 14:51:22.871469    PCI: 00:1c.0: enabled 1

  756 14:51:22.874535    PCI: 00:1c.1: enabled 0

  757 14:51:22.876943    PCI: 00:1c.2: enabled 0

  758 14:51:22.879172    PCI: 00:1c.3: enabled 0

  759 14:51:22.881901    PCI: 00:1c.4: enabled 0

  760 14:51:22.884733    PCI: 00:1c.5: enabled 0

  761 14:51:22.887625    PCI: 00:1c.6: enabled 0

  762 14:51:22.889677    PCI: 00:1c.7: enabled 1

  763 14:51:22.892555    PCI: 00:1d.0: enabled 1

  764 14:51:22.895261    PCI: 00:1d.1: enabled 1

  765 14:51:22.897909    PCI: 00:1d.2: enabled 0

  766 14:51:22.900058    PCI: 00:1d.3: enabled 0

  767 14:51:22.903567    PCI: 00:1d.4: enabled 1

  768 14:51:22.905379    PCI: 00:1e.0: enabled 0

  769 14:51:22.908382    PCI: 00:1e.1: enabled 0

  770 14:51:22.911197    PCI: 00:1e.2: enabled 0

  771 14:51:22.913627    PCI: 00:1e.3: enabled 0

  772 14:51:22.916103    PCI: 00:1f.0: enabled 1

  773 14:51:22.919337     PNP: 0c09.0: enabled 1

  774 14:51:22.921966    PCI: 00:1f.1: enabled 1

  775 14:51:22.924142    PCI: 00:1f.2: enabled 1

  776 14:51:22.926520    PCI: 00:1f.3: enabled 1

  777 14:51:22.928988    PCI: 00:1f.4: enabled 1

  778 14:51:22.931879    PCI: 00:1f.5: enabled 1

  779 14:51:22.934802    PCI: 00:1f.6: enabled 1

  780 14:51:22.937288  Root Device scanning...

  781 14:51:22.941369  root_dev_scan_bus for Root Device

  782 14:51:22.943188  CPU_CLUSTER: 0 enabled

  783 14:51:22.945419  DOMAIN: 0000 enabled

  784 14:51:22.947439  DOMAIN: 0000 scanning...

  785 14:51:22.951050  PCI: pci_scan_bus for bus 00

  786 14:51:22.954242  PCI: 00:00.0 [8086/0000] ops

  787 14:51:22.956843  PCI: 00:00.0 [8086/3e34] enabled

  788 14:51:22.960212  PCI: 00:02.0 [8086/0000] ops

  789 14:51:22.964048  PCI: 00:02.0 [8086/3ea0] enabled

  790 14:51:22.966607  PCI: 00:04.0 [8086/1903] enabled

  791 14:51:22.970160  PCI: 00:08.0 [8086/1911] enabled

  792 14:51:22.973808  PCI: 00:12.0 [8086/9df9] enabled

  793 14:51:22.976825  PCI: 00:14.0 [8086/0000] bus ops

  794 14:51:22.979959  PCI: 00:14.0 [8086/9ded] enabled

  795 14:51:22.983650  PCI: 00:14.2 [8086/9def] enabled

  796 14:51:22.986987  PCI: 00:14.3 [8086/9df0] enabled

  797 14:51:22.990435  PCI: 00:15.0 [8086/0000] bus ops

  798 14:51:22.993564  PCI: 00:15.0 [8086/9de8] enabled

  799 14:51:22.997154  PCI: 00:15.1 [8086/0000] bus ops

  800 14:51:23.000067  PCI: 00:15.1 [8086/9de9] enabled

  801 14:51:23.005586  PCI: Static device PCI: 00:16.0 not found, disabling it.

  802 14:51:23.008408  PCI: 00:17.0 [8086/0000] ops

  803 14:51:23.011988  PCI: 00:17.0 [8086/9dd3] enabled

  804 14:51:23.014829  PCI: 00:19.0 [8086/0000] bus ops

  805 14:51:23.018840  PCI: 00:19.0 [8086/9dc5] enabled

  806 14:51:23.021448  PCI: 00:19.2 [8086/0000] ops

  807 14:51:23.025248  PCI: 00:19.2 [8086/9dc7] enabled

  808 14:51:23.028173  PCI: 00:1c.0 [8086/0000] bus ops

  809 14:51:23.031789  PCI: 00:1c.0 [8086/9dbf] enabled

  810 14:51:23.037220  PCI: Static device PCI: 00:1c.7 not found, disabling it.

  811 14:51:23.040218  PCI: 00:1d.0 [8086/0000] bus ops

  812 14:51:23.044144  PCI: 00:1d.0 [8086/9db4] enabled

  813 14:51:23.049207  PCI: Static device PCI: 00:1d.1 not found, disabling it.

  814 14:51:23.055326  PCI: Static device PCI: 00:1d.4 not found, disabling it.

  815 14:51:23.058255  PCI: 00:1f.0 [8086/0000] bus ops

  816 14:51:23.061715  PCI: 00:1f.0 [8086/9d84] enabled

  817 14:51:23.067254  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  818 14:51:23.073032  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  819 14:51:23.076209  PCI: 00:1f.3 [8086/0000] bus ops

  820 14:51:23.079413  PCI: 00:1f.3 [8086/9dc8] enabled

  821 14:51:23.083171  PCI: 00:1f.4 [8086/0000] bus ops

  822 14:51:23.086457  PCI: 00:1f.4 [8086/9da3] enabled

  823 14:51:23.089176  PCI: 00:1f.5 [8086/0000] bus ops

  824 14:51:23.093307  PCI: 00:1f.5 [8086/9da4] enabled

  825 14:51:23.095939  PCI: 00:1f.6 [8086/15be] enabled

  826 14:51:23.099761  PCI: Leftover static devices:

  827 14:51:23.100331  PCI: 00:12.5

  828 14:51:23.102050  PCI: 00:12.6

  829 14:51:23.103011  PCI: 00:13.0

  830 14:51:23.104757  PCI: 00:14.1

  831 14:51:23.105893  PCI: 00:14.5

  832 14:51:23.107199  PCI: 00:15.2

  833 14:51:23.108822  PCI: 00:15.3

  834 14:51:23.109887  PCI: 00:16.0

  835 14:51:23.111239  PCI: 00:16.1

  836 14:51:23.113038  PCI: 00:16.2

  837 14:51:23.114496  PCI: 00:16.3

  838 14:51:23.115784  PCI: 00:16.4

  839 14:51:23.116932  PCI: 00:16.5

  840 14:51:23.118091  PCI: 00:19.1

  841 14:51:23.120426  PCI: 00:1a.0

  842 14:51:23.121156  PCI: 00:1c.1

  843 14:51:23.122618  PCI: 00:1c.2

  844 14:51:23.123615  PCI: 00:1c.3

  845 14:51:23.125125  PCI: 00:1c.4

  846 14:51:23.126528  PCI: 00:1c.5

  847 14:51:23.127919  PCI: 00:1c.6

  848 14:51:23.129707  PCI: 00:1c.7

  849 14:51:23.130781  PCI: 00:1d.1

  850 14:51:23.132342  PCI: 00:1d.2

  851 14:51:23.133058  PCI: 00:1d.3

  852 14:51:23.134603  PCI: 00:1d.4

  853 14:51:23.136211  PCI: 00:1e.0

  854 14:51:23.137135  PCI: 00:1e.1

  855 14:51:23.138536  PCI: 00:1e.2

  856 14:51:23.139779  PCI: 00:1e.3

  857 14:51:23.141196  PCI: 00:1f.1

  858 14:51:23.143078  PCI: 00:1f.2

  859 14:51:23.145871  PCI: Check your devicetree.cb.

  860 14:51:23.148740  PCI: 00:14.0 scanning...

  861 14:51:23.152005  scan_usb_bus for PCI: 00:14.0

  862 14:51:23.153605  USB0 port 0 enabled

  863 14:51:23.156871  USB0 port 0 scanning...

  864 14:51:23.159136  scan_usb_bus for USB0 port 0

  865 14:51:23.161356  USB2 port 0 enabled

  866 14:51:23.163674  USB2 port 1 enabled

  867 14:51:23.165409  USB2 port 2 enabled

  868 14:51:23.168010  USB2 port 4 enabled

  869 14:51:23.169585  USB2 port 5 enabled

  870 14:51:23.172165  USB2 port 6 enabled

  871 14:51:23.174101  USB2 port 7 enabled

  872 14:51:23.176133  USB2 port 8 enabled

  873 14:51:23.178396  USB2 port 9 enabled

  874 14:51:23.180232  USB3 port 0 enabled

  875 14:51:23.182270  USB3 port 1 enabled

  876 14:51:23.184818  USB3 port 2 enabled

  877 14:51:23.186234  USB3 port 3 enabled

  878 14:51:23.188327  USB3 port 4 enabled

  879 14:51:23.190340  USB2 port 0 scanning...

  880 14:51:23.193642  scan_usb_bus for USB2 port 0

  881 14:51:23.196804  scan_usb_bus for USB2 port 0 done

  882 14:51:23.202766  scan_bus: scanning of bus USB2 port 0 took 9059 usecs

  883 14:51:23.205056  USB2 port 1 scanning...

  884 14:51:23.208386  scan_usb_bus for USB2 port 1

  885 14:51:23.211662  scan_usb_bus for USB2 port 1 done

  886 14:51:23.217426  scan_bus: scanning of bus USB2 port 1 took 9058 usecs

  887 14:51:23.219200  USB2 port 2 scanning...

  888 14:51:23.222456  scan_usb_bus for USB2 port 2

  889 14:51:23.225949  scan_usb_bus for USB2 port 2 done

  890 14:51:23.231558  scan_bus: scanning of bus USB2 port 2 took 9054 usecs

  891 14:51:23.233712  USB2 port 4 scanning...

  892 14:51:23.236872  scan_usb_bus for USB2 port 4

  893 14:51:23.240722  scan_usb_bus for USB2 port 4 done

  894 14:51:23.246288  scan_bus: scanning of bus USB2 port 4 took 9059 usecs

  895 14:51:23.247882  USB2 port 5 scanning...

  896 14:51:23.251259  scan_usb_bus for USB2 port 5

  897 14:51:23.254598  scan_usb_bus for USB2 port 5 done

  898 14:51:23.259909  scan_bus: scanning of bus USB2 port 5 took 9054 usecs

  899 14:51:23.262716  USB2 port 6 scanning...

  900 14:51:23.265828  scan_usb_bus for USB2 port 6

  901 14:51:23.269302  scan_usb_bus for USB2 port 6 done

  902 14:51:23.274364  scan_bus: scanning of bus USB2 port 6 took 9058 usecs

  903 14:51:23.277131  USB2 port 7 scanning...

  904 14:51:23.280159  scan_usb_bus for USB2 port 7

  905 14:51:23.283739  scan_usb_bus for USB2 port 7 done

  906 14:51:23.289082  scan_bus: scanning of bus USB2 port 7 took 9059 usecs

  907 14:51:23.291590  USB2 port 8 scanning...

  908 14:51:23.294548  scan_usb_bus for USB2 port 8

  909 14:51:23.298306  scan_usb_bus for USB2 port 8 done

  910 14:51:23.303662  scan_bus: scanning of bus USB2 port 8 took 9059 usecs

  911 14:51:23.305603  USB2 port 9 scanning...

  912 14:51:23.308984  scan_usb_bus for USB2 port 9

  913 14:51:23.312145  scan_usb_bus for USB2 port 9 done

  914 14:51:23.317556  scan_bus: scanning of bus USB2 port 9 took 9047 usecs

  915 14:51:23.320082  USB3 port 0 scanning...

  916 14:51:23.323907  scan_usb_bus for USB3 port 0

  917 14:51:23.326503  scan_usb_bus for USB3 port 0 done

  918 14:51:23.332047  scan_bus: scanning of bus USB3 port 0 took 9060 usecs

  919 14:51:23.334622  USB3 port 1 scanning...

  920 14:51:23.337455  scan_usb_bus for USB3 port 1

  921 14:51:23.340992  scan_usb_bus for USB3 port 1 done

  922 14:51:23.346341  scan_bus: scanning of bus USB3 port 1 took 9061 usecs

  923 14:51:23.348919  USB3 port 2 scanning...

  924 14:51:23.352265  scan_usb_bus for USB3 port 2

  925 14:51:23.355415  scan_usb_bus for USB3 port 2 done

  926 14:51:23.361083  scan_bus: scanning of bus USB3 port 2 took 9059 usecs

  927 14:51:23.363640  USB3 port 3 scanning...

  928 14:51:23.367091  scan_usb_bus for USB3 port 3

  929 14:51:23.369697  scan_usb_bus for USB3 port 3 done

  930 14:51:23.375967  scan_bus: scanning of bus USB3 port 3 took 9060 usecs

  931 14:51:23.377801  USB3 port 4 scanning...

  932 14:51:23.381217  scan_usb_bus for USB3 port 4

  933 14:51:23.384447  scan_usb_bus for USB3 port 4 done

  934 14:51:23.389898  scan_bus: scanning of bus USB3 port 4 took 9059 usecs

  935 14:51:23.393551  scan_usb_bus for USB0 port 0 done

  936 14:51:23.398892  scan_bus: scanning of bus USB0 port 0 took 239244 usecs

  937 14:51:23.402293  scan_usb_bus for PCI: 00:14.0 done

  938 14:51:23.408377  scan_bus: scanning of bus PCI: 00:14.0 took 256175 usecs

  939 14:51:23.410835  PCI: 00:15.0 scanning...

  940 14:51:23.414311  scan_generic_bus for PCI: 00:15.0

  941 14:51:23.417953  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  942 14:51:23.422841  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  943 14:51:23.426295  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled

  944 14:51:23.430063  scan_generic_bus for PCI: 00:15.0 done

  945 14:51:23.435352  scan_bus: scanning of bus PCI: 00:15.0 took 22382 usecs

  946 14:51:23.438608  PCI: 00:15.1 scanning...

  947 14:51:23.442057  scan_generic_bus for PCI: 00:15.1

  948 14:51:23.445833  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled

  949 14:51:23.450362  scan_generic_bus for PCI: 00:15.1 done

  950 14:51:23.455184  scan_bus: scanning of bus PCI: 00:15.1 took 14212 usecs

  951 14:51:23.458123  PCI: 00:19.0 scanning...

  952 14:51:23.461492  scan_generic_bus for PCI: 00:19.0

  953 14:51:23.465701  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled

  954 14:51:23.469848  scan_generic_bus for PCI: 00:19.0 done

  955 14:51:23.475270  scan_bus: scanning of bus PCI: 00:19.0 took 14205 usecs

  956 14:51:23.477854  PCI: 00:1c.0 scanning...

  957 14:51:23.481718  do_pci_scan_bridge for PCI: 00:1c.0

  958 14:51:23.484553  PCI: pci_scan_bus for bus 01

  959 14:51:23.488581  PCI: 01:00.0 [10ec/525a] enabled

  960 14:51:23.491316  Capability: type 0x01 @ 0x80

  961 14:51:23.493761  Capability: type 0x05 @ 0x90

  962 14:51:23.497022  Capability: type 0x10 @ 0xb0

  963 14:51:23.499968  Capability: type 0x10 @ 0x40

  964 14:51:23.503544  Enabling Common Clock Configuration

  965 14:51:23.507731  L1 Sub-State supported from root port 28

  966 14:51:23.510818  L1 Sub-State Support = 0xf

  967 14:51:23.513795  CommonModeRestoreTime = 0x3c

  968 14:51:23.517924  Power On Value = 0x6, Power On Scale = 0x1

  969 14:51:23.520182  ASPM: Enabled L0s and L1

  970 14:51:23.523361  Capability: type 0x01 @ 0x80

  971 14:51:23.526559  Capability: type 0x05 @ 0x90

  972 14:51:23.528922  Capability: type 0x10 @ 0xb0

  973 14:51:23.534134  scan_bus: scanning of bus PCI: 00:1c.0 took 53641 usecs

  974 14:51:23.536691  PCI: 00:1d.0 scanning...

  975 14:51:23.540426  do_pci_scan_bridge for PCI: 00:1d.0

  976 14:51:23.543610  PCI: pci_scan_bus for bus 02

  977 14:51:23.547266  PCI: 02:00.0 [1217/8620] enabled

  978 14:51:23.550241  Capability: type 0x01 @ 0x6c

  979 14:51:23.552819  Capability: type 0x05 @ 0x48

  980 14:51:23.556195  Capability: type 0x10 @ 0x80

  981 14:51:23.559878  Capability: type 0x10 @ 0x40

  982 14:51:23.562829  L1 Sub-State supported from root port 29

  983 14:51:23.565615  L1 Sub-State Support = 0xf

  984 14:51:23.569136  CommonModeRestoreTime = 0x78

  985 14:51:23.573006  Power On Value = 0x16, Power On Scale = 0x0

  986 14:51:23.574928  ASPM: Enabled L1

  987 14:51:23.579173  Capability: type 0x01 @ 0x6c

  988 14:51:23.583841  Capability: type 0x05 @ 0x48

  989 14:51:23.588903  Capability: type 0x10 @ 0x80

  990 14:51:23.595717  scan_bus: scanning of bus PCI: 00:1d.0 took 55999 usecs

  991 14:51:23.598413  PCI: 00:1f.0 scanning...

  992 14:51:23.601665  scan_lpc_bus for PCI: 00:1f.0

  993 14:51:23.603743  PNP: 0c09.0 enabled

  994 14:51:23.607235  scan_lpc_bus for PCI: 00:1f.0 done

  995 14:51:23.612706  scan_bus: scanning of bus PCI: 00:1f.0 took 11393 usecs

  996 14:51:23.615083  PCI: 00:1f.3 scanning...

  997 14:51:23.621606  scan_bus: scanning of bus PCI: 00:1f.3 took 2838 usecs

  998 14:51:23.624290  PCI: 00:1f.4 scanning...

  999 14:51:23.627723  scan_generic_bus for PCI: 00:1f.4

 1000 14:51:23.631511  scan_generic_bus for PCI: 00:1f.4 done

 1001 14:51:23.636609  scan_bus: scanning of bus PCI: 00:1f.4 took 10126 usecs

 1002 14:51:23.639416  PCI: 00:1f.5 scanning...

 1003 14:51:23.643012  scan_generic_bus for PCI: 00:1f.5

 1004 14:51:23.646726  scan_generic_bus for PCI: 00:1f.5 done

 1005 14:51:23.652048  scan_bus: scanning of bus PCI: 00:1f.5 took 10125 usecs

 1006 14:51:23.658136  scan_bus: scanning of bus DOMAIN: 0000 took 707428 usecs

 1007 14:51:23.661977  root_dev_scan_bus for Root Device done

 1008 14:51:23.668163  scan_bus: scanning of bus Root Device took 727561 usecs

 1009 14:51:23.668600  done

 1010 14:51:23.674318  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

 1011 14:51:23.680612  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1012 14:51:23.688292  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000

 1013 14:51:23.694217  MRC: cache data 'RECOVERY_MRC_CACHE' needs update.

 1014 14:51:23.711428  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)

 1015 14:51:23.715271  ELOG: NV offset 0x1bf0000 size 0x4000

 1016 14:51:23.723147  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1017 14:51:23.729041  ELOG: Event(17) added with size 13 at 2023-08-16 14:51:12 UTC

 1018 14:51:23.735826  ELOG: Event(AA) added with size 11 at 2023-08-16 14:51:12 UTC

 1019 14:51:23.741557  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)

 1020 14:51:23.745360  SPI flash protection: WPSW=0 SRP0=0

 1021 14:51:23.749765  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1022 14:51:23.755933  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1149221 exit 75665

 1023 14:51:23.758769  found VGA at PCI: 00:02.0

 1024 14:51:23.762629  Setting up VGA for PCI: 00:02.0

 1025 14:51:23.767427  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1026 14:51:23.772128  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1027 14:51:23.774694  Allocating resources...

 1028 14:51:23.776459  Reading resources...

 1029 14:51:23.780871  Root Device read_resources bus 0 link: 0

 1030 14:51:23.785316  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1031 14:51:23.790939  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1032 14:51:23.795071  DOMAIN: 0000 read_resources bus 0 link: 0

 1033 14:51:23.801435  PCI: 00:14.0 read_resources bus 0 link: 0

 1034 14:51:23.805962  USB0 port 0 read_resources bus 0 link: 0

 1035 14:51:23.815595  USB0 port 0 read_resources bus 0 link: 0 done

 1036 14:51:23.820596  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1037 14:51:23.825380  PCI: 00:15.0 read_resources bus 1 link: 0

 1038 14:51:23.831143  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1039 14:51:23.835914  PCI: 00:15.1 read_resources bus 2 link: 0

 1040 14:51:23.841723  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1041 14:51:23.845595  PCI: 00:19.0 read_resources bus 3 link: 0

 1042 14:51:23.850968  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1043 14:51:23.856394  PCI: 00:1c.0 read_resources bus 1 link: 0

 1044 14:51:23.861328  PCI: 00:1c.0 read_resources bus 1 link: 0 done

 1045 14:51:23.866172  PCI: 00:1d.0 read_resources bus 2 link: 0

 1046 14:51:23.873294  PCI: 00:1d.0 read_resources bus 2 link: 0 done

 1047 14:51:23.877314  PCI: 00:1f.0 read_resources bus 0 link: 0

 1048 14:51:23.882583  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1049 14:51:23.889654  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1050 14:51:23.894404  Root Device read_resources bus 0 link: 0 done

 1051 14:51:23.896461  Done reading resources.

 1052 14:51:23.902415  Show resources in subtree (Root Device)...After reading.

 1053 14:51:23.906746   Root Device child on link 0 CPU_CLUSTER: 0

 1054 14:51:23.911152    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1055 14:51:23.912342     APIC: 00

 1056 14:51:23.913567     APIC: 03

 1057 14:51:23.914604     APIC: 06

 1058 14:51:23.915772     APIC: 01

 1059 14:51:23.917428     APIC: 02

 1060 14:51:23.918527     APIC: 07

 1061 14:51:23.920287     APIC: 04

 1062 14:51:23.921297     APIC: 05

 1063 14:51:23.925631    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1064 14:51:23.934953    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1065 14:51:23.944346    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1066 14:51:23.945865     PCI: 00:00.0

 1067 14:51:23.955345     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1068 14:51:23.964863     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1069 14:51:23.973946     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1070 14:51:23.983190     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1071 14:51:23.993224     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1072 14:51:24.002170     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1073 14:51:24.011750     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1074 14:51:24.019981     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1075 14:51:24.029897     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1076 14:51:24.039465     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1077 14:51:24.048988     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1078 14:51:24.059148     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1079 14:51:24.068066     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1080 14:51:24.077510     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1081 14:51:24.078485     PCI: 00:02.0

 1082 14:51:24.088819     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1083 14:51:24.099134     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1084 14:51:24.108117     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1085 14:51:24.110008     PCI: 00:04.0

 1086 14:51:24.119362     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1087 14:51:24.120819     PCI: 00:08.0

 1088 14:51:24.131384     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1089 14:51:24.133257     PCI: 00:12.0

 1090 14:51:24.142888     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1091 14:51:24.147462     PCI: 00:14.0 child on link 0 USB0 port 0

 1092 14:51:24.157538     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1093 14:51:24.161605      USB0 port 0 child on link 0 USB2 port 0

 1094 14:51:24.163558       USB2 port 0

 1095 14:51:24.165397       USB2 port 1

 1096 14:51:24.166915       USB2 port 2

 1097 14:51:24.168809       USB2 port 4

 1098 14:51:24.169750       USB2 port 5

 1099 14:51:24.172060       USB2 port 6

 1100 14:51:24.173986       USB2 port 7

 1101 14:51:24.175105       USB2 port 8

 1102 14:51:24.177792       USB2 port 9

 1103 14:51:24.179092       USB3 port 0

 1104 14:51:24.180318       USB3 port 1

 1105 14:51:24.182655       USB3 port 2

 1106 14:51:24.183921       USB3 port 3

 1107 14:51:24.185635       USB3 port 4

 1108 14:51:24.187352     PCI: 00:14.2

 1109 14:51:24.197796     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1110 14:51:24.207658     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1111 14:51:24.209573     PCI: 00:14.3

 1112 14:51:24.218829     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1113 14:51:24.222735     PCI: 00:15.0 child on link 0 I2C: 01:10

 1114 14:51:24.233085     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1115 14:51:24.234386      I2C: 01:10

 1116 14:51:24.235702      I2C: 01:10

 1117 14:51:24.238287      I2C: 01:34

 1118 14:51:24.242301     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1119 14:51:24.252194     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1120 14:51:24.253431      I2C: 02:2c

 1121 14:51:24.254795     PCI: 00:17.0

 1122 14:51:24.264472     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1123 14:51:24.272884     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1124 14:51:24.281262     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1125 14:51:24.289797     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1126 14:51:24.298189     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1127 14:51:24.306647     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1128 14:51:24.311095     PCI: 00:19.0 child on link 0 I2C: 03:50

 1129 14:51:24.321207     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1130 14:51:24.331234     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1131 14:51:24.332576      I2C: 03:50

 1132 14:51:24.334679     PCI: 00:19.2

 1133 14:51:24.345471     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1134 14:51:24.355633     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1135 14:51:24.360184     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1136 14:51:24.368190     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1137 14:51:24.378494     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1138 14:51:24.388130     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1139 14:51:24.389056      PCI: 01:00.0

 1140 14:51:24.398588      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14

 1141 14:51:24.403282     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1142 14:51:24.411553     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1143 14:51:24.421048     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1144 14:51:24.430779     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1145 14:51:24.432577      PCI: 02:00.0

 1146 14:51:24.441579      PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1147 14:51:24.450649      PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14

 1148 14:51:24.455149     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1149 14:51:24.463861     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1150 14:51:24.472082     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1151 14:51:24.474178      PNP: 0c09.0

 1152 14:51:24.482478      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1153 14:51:24.491846      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1154 14:51:24.499970      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1155 14:51:24.501623     PCI: 00:1f.3

 1156 14:51:24.511806     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1157 14:51:24.521656     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1158 14:51:24.523713     PCI: 00:1f.4

 1159 14:51:24.532213     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1160 14:51:24.541569     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1161 14:51:24.543782     PCI: 00:1f.5

 1162 14:51:24.552474     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1163 14:51:24.554598     PCI: 00:1f.6

 1164 14:51:24.563764     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10

 1165 14:51:24.570270  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1166 14:51:24.576253  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1167 14:51:24.583106  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1168 14:51:24.589140  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1169 14:51:24.595913  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1170 14:51:24.599860  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1171 14:51:24.603644  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1172 14:51:24.606459  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1173 14:51:24.610130  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1174 14:51:24.617850  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1175 14:51:24.624517  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1176 14:51:24.632183  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1177 14:51:24.640287  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1178 14:51:24.647939  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1179 14:51:24.651357  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem

 1180 14:51:24.658791  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1181 14:51:24.666725  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1182 14:51:24.675614  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1183 14:51:24.682331  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1184 14:51:24.686038  PCI: 02:00.0 10 *  [0x0 - 0xfff] mem

 1185 14:51:24.689602  PCI: 02:00.0 14 *  [0x1000 - 0x17ff] mem

 1186 14:51:24.698171  PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1187 14:51:24.701970  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1188 14:51:24.707191  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1189 14:51:24.711725  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem

 1190 14:51:24.717254  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem

 1191 14:51:24.721621  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem

 1192 14:51:24.726867  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem

 1193 14:51:24.731417  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem

 1194 14:51:24.736310  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem

 1195 14:51:24.741362  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem

 1196 14:51:24.745926  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem

 1197 14:51:24.750542  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem

 1198 14:51:24.755317  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem

 1199 14:51:24.760454  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem

 1200 14:51:24.765091  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem

 1201 14:51:24.770050  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem

 1202 14:51:24.775180  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem

 1203 14:51:24.780019  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem

 1204 14:51:24.784915  PCI: 00:19.0 10 *  [0x11349000 - 0x11349fff] mem

 1205 14:51:24.789352  PCI: 00:19.0 18 *  [0x1134a000 - 0x1134afff] mem

 1206 14:51:24.794506  PCI: 00:19.2 18 *  [0x1134b000 - 0x1134bfff] mem

 1207 14:51:24.799438  PCI: 00:1f.5 10 *  [0x1134c000 - 0x1134cfff] mem

 1208 14:51:24.804109  PCI: 00:17.0 24 *  [0x1134d000 - 0x1134d7ff] mem

 1209 14:51:24.809090  PCI: 00:17.0 14 *  [0x1134e000 - 0x1134e0ff] mem

 1210 14:51:24.813899  PCI: 00:1f.4 10 *  [0x1134f000 - 0x1134f0ff] mem

 1211 14:51:24.822614  DOMAIN: 0000 mem: base: 1134f100 size: 1134f100 align: 28 gran: 0 limit: ffffffff done

 1212 14:51:24.825788  avoid_fixed_resources: DOMAIN: 0000

 1213 14:51:24.832295  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1214 14:51:24.838015  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1215 14:51:24.845879  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1216 14:51:24.853069  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)

 1217 14:51:24.860946  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)

 1218 14:51:24.868692  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)

 1219 14:51:24.876307  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)

 1220 14:51:24.883634  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1221 14:51:24.891876  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1222 14:51:24.898893  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1223 14:51:24.906883  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1224 14:51:24.913716  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1225 14:51:24.915725  Setting resources...

 1226 14:51:24.922232  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1227 14:51:24.926663  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1228 14:51:24.930445  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1229 14:51:24.934427  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1230 14:51:24.937832  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1231 14:51:24.944836  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1232 14:51:24.950839  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1233 14:51:24.957472  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1234 14:51:24.963347  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1235 14:51:24.969813  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1236 14:51:24.976564  DOMAIN: 0000 mem: base:c0000000 size:1134f100 align:28 gran:0 limit:dfffffff

 1237 14:51:24.982359  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1238 14:51:24.987211  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1239 14:51:24.992511  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1240 14:51:24.996982  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem

 1241 14:51:25.001921  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem

 1242 14:51:25.006393  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem

 1243 14:51:25.011081  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem

 1244 14:51:25.015946  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem

 1245 14:51:25.020736  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem

 1246 14:51:25.025961  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem

 1247 14:51:25.031001  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem

 1248 14:51:25.035673  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem

 1249 14:51:25.040078  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem

 1250 14:51:25.045142  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem

 1251 14:51:25.050239  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem

 1252 14:51:25.054895  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem

 1253 14:51:25.060370  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem

 1254 14:51:25.065140  PCI: 00:19.0 10 *  [0xd1349000 - 0xd1349fff] mem

 1255 14:51:25.069560  PCI: 00:19.0 18 *  [0xd134a000 - 0xd134afff] mem

 1256 14:51:25.075054  PCI: 00:19.2 18 *  [0xd134b000 - 0xd134bfff] mem

 1257 14:51:25.079242  PCI: 00:1f.5 10 *  [0xd134c000 - 0xd134cfff] mem

 1258 14:51:25.084147  PCI: 00:17.0 24 *  [0xd134d000 - 0xd134d7ff] mem

 1259 14:51:25.089231  PCI: 00:17.0 14 *  [0xd134e000 - 0xd134e0ff] mem

 1260 14:51:25.094479  PCI: 00:1f.4 10 *  [0xd134f000 - 0xd134f0ff] mem

 1261 14:51:25.101211  DOMAIN: 0000 mem: next_base: d134f100 size: 1134f100 align: 28 gran: 0 done

 1262 14:51:25.109077  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1263 14:51:25.116236  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1264 14:51:25.123709  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1265 14:51:25.128284  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem

 1266 14:51:25.135821  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done

 1267 14:51:25.143183  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1268 14:51:25.150933  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1269 14:51:25.157498  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff

 1270 14:51:25.162949  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1100fff] mem

 1271 14:51:25.167612  PCI: 02:00.0 14 *  [0xd1101000 - 0xd11017ff] mem

 1272 14:51:25.175860  PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done

 1273 14:51:25.179168  Root Device assign_resources, bus 0 link: 0

 1274 14:51:25.183859  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1275 14:51:25.192933  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1276 14:51:25.201695  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1277 14:51:25.208726  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1278 14:51:25.217784  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64

 1279 14:51:25.224987  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64

 1280 14:51:25.233364  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64

 1281 14:51:25.241954  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64

 1282 14:51:25.246363  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1283 14:51:25.251403  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1284 14:51:25.259374  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64

 1285 14:51:25.267105  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64

 1286 14:51:25.275647  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64

 1287 14:51:25.283604  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64

 1288 14:51:25.288213  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1289 14:51:25.293012  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1290 14:51:25.301851  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64

 1291 14:51:25.305844  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1292 14:51:25.310932  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1293 14:51:25.318553  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem

 1294 14:51:25.326552  PCI: 00:17.0 14 <- [0x00d134e000 - 0x00d134e0ff] size 0x00000100 gran 0x08 mem

 1295 14:51:25.333992  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1296 14:51:25.341954  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1297 14:51:25.349515  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1298 14:51:25.357210  PCI: 00:17.0 24 <- [0x00d134d000 - 0x00d134d7ff] size 0x00000800 gran 0x0b mem

 1299 14:51:25.365461  PCI: 00:19.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64

 1300 14:51:25.373877  PCI: 00:19.0 18 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64

 1301 14:51:25.377817  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1302 14:51:25.383332  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1303 14:51:25.391501  PCI: 00:19.2 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64

 1304 14:51:25.399493  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1305 14:51:25.408779  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1306 14:51:25.417034  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1307 14:51:25.421286  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1308 14:51:25.429430  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem

 1309 14:51:25.434352  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1310 14:51:25.443560  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io

 1311 14:51:25.451837  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem

 1312 14:51:25.460857  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem

 1313 14:51:25.464657  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1314 14:51:25.474834  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem

 1315 14:51:25.484223  PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem

 1316 14:51:25.490294  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1317 14:51:25.495234  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1318 14:51:25.500320  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1319 14:51:25.505418  LPC: Trying to open IO window from 930 size 8

 1320 14:51:25.509381  LPC: Trying to open IO window from 940 size 8

 1321 14:51:25.514741  LPC: Trying to open IO window from 950 size 10

 1322 14:51:25.522637  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64

 1323 14:51:25.530207  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64

 1324 14:51:25.538728  PCI: 00:1f.4 10 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem64

 1325 14:51:25.546649  PCI: 00:1f.5 10 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem

 1326 14:51:25.555219  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem

 1327 14:51:25.560368  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1328 14:51:25.564614  Root Device assign_resources, bus 0 link: 0

 1329 14:51:25.566540  Done setting resources.

 1330 14:51:25.573208  Show resources in subtree (Root Device)...After assigning values.

 1331 14:51:25.577377   Root Device child on link 0 CPU_CLUSTER: 0

 1332 14:51:25.582133    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1333 14:51:25.583529     APIC: 00

 1334 14:51:25.584351     APIC: 03

 1335 14:51:25.585560     APIC: 06

 1336 14:51:25.587330     APIC: 01

 1337 14:51:25.588312     APIC: 02

 1338 14:51:25.589608     APIC: 07

 1339 14:51:25.590546     APIC: 04

 1340 14:51:25.592575     APIC: 05

 1341 14:51:25.596458    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1342 14:51:25.606386    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1343 14:51:25.617018    DOMAIN: 0000 resource base c0000000 size 1134f100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1344 14:51:25.618828     PCI: 00:00.0

 1345 14:51:25.628772     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1346 14:51:25.638151     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1347 14:51:25.647004     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1348 14:51:25.656864     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1349 14:51:25.665625     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1350 14:51:25.674957     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1351 14:51:25.684339     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1352 14:51:25.692916     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1353 14:51:25.703183     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1354 14:51:25.713199     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1355 14:51:25.722096     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1356 14:51:25.731916     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1357 14:51:25.741271     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1358 14:51:25.749942     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1359 14:51:25.751789     PCI: 00:02.0

 1360 14:51:25.762496     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1361 14:51:25.772705     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1362 14:51:25.782310     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1363 14:51:25.783634     PCI: 00:04.0

 1364 14:51:25.794516     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10

 1365 14:51:25.795654     PCI: 00:08.0

 1366 14:51:25.806073     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10

 1367 14:51:25.807458     PCI: 00:12.0

 1368 14:51:25.818475     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10

 1369 14:51:25.822608     PCI: 00:14.0 child on link 0 USB0 port 0

 1370 14:51:25.833226     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10

 1371 14:51:25.837499      USB0 port 0 child on link 0 USB2 port 0

 1372 14:51:25.839450       USB2 port 0

 1373 14:51:25.840992       USB2 port 1

 1374 14:51:25.842239       USB2 port 2

 1375 14:51:25.844152       USB2 port 4

 1376 14:51:25.845899       USB2 port 5

 1377 14:51:25.847897       USB2 port 6

 1378 14:51:25.849318       USB2 port 7

 1379 14:51:25.851537       USB2 port 8

 1380 14:51:25.853210       USB2 port 9

 1381 14:51:25.854761       USB3 port 0

 1382 14:51:25.857007       USB3 port 1

 1383 14:51:25.858154       USB3 port 2

 1384 14:51:25.860100       USB3 port 3

 1385 14:51:25.861875       USB3 port 4

 1386 14:51:25.863614     PCI: 00:14.2

 1387 14:51:25.873737     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10

 1388 14:51:25.884473     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18

 1389 14:51:25.886108     PCI: 00:14.3

 1390 14:51:25.896056     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10

 1391 14:51:25.900499     PCI: 00:15.0 child on link 0 I2C: 01:10

 1392 14:51:25.910475     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10

 1393 14:51:25.912617      I2C: 01:10

 1394 14:51:25.913335      I2C: 01:10

 1395 14:51:25.914999      I2C: 01:34

 1396 14:51:25.919657     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1397 14:51:25.929589     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10

 1398 14:51:25.931592      I2C: 02:2c

 1399 14:51:25.932677     PCI: 00:17.0

 1400 14:51:25.943068     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10

 1401 14:51:25.953364     PCI: 00:17.0 resource base d134e000 size 100 align 12 gran 8 limit d134e0ff flags 60000200 index 14

 1402 14:51:25.962709     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1403 14:51:25.972040     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1404 14:51:25.980191     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1405 14:51:25.990949     PCI: 00:17.0 resource base d134d000 size 800 align 12 gran 11 limit d134d7ff flags 60000200 index 24

 1406 14:51:25.995118     PCI: 00:19.0 child on link 0 I2C: 03:50

 1407 14:51:26.005286     PCI: 00:19.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10

 1408 14:51:26.015621     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 18

 1409 14:51:26.017338      I2C: 03:50

 1410 14:51:26.019271     PCI: 00:19.2

 1411 14:51:26.030225     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1412 14:51:26.040709     PCI: 00:19.2 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18

 1413 14:51:26.045067     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1414 14:51:26.053922     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1415 14:51:26.063952     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1416 14:51:26.074591     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1417 14:51:26.076777      PCI: 01:00.0

 1418 14:51:26.086648      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14

 1419 14:51:26.091655     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1420 14:51:26.100377     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1421 14:51:26.110414     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1422 14:51:26.121140     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20

 1423 14:51:26.123339      PCI: 02:00.0

 1424 14:51:26.132793      PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10

 1425 14:51:26.143346      PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14

 1426 14:51:26.147735     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1427 14:51:26.156145     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1428 14:51:26.165205     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1429 14:51:26.166498      PNP: 0c09.0

 1430 14:51:26.175510      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1431 14:51:26.183558      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1432 14:51:26.192747      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1433 14:51:26.194223     PCI: 00:1f.3

 1434 14:51:26.204777     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10

 1435 14:51:26.214607     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20

 1436 14:51:26.216660     PCI: 00:1f.4

 1437 14:51:26.225589     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1438 14:51:26.236078     PCI: 00:1f.4 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000201 index 10

 1439 14:51:26.237150     PCI: 00:1f.5

 1440 14:51:26.247695     PCI: 00:1f.5 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000200 index 10

 1441 14:51:26.249580     PCI: 00:1f.6

 1442 14:51:26.259784     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10

 1443 14:51:26.262252  Done allocating resources.

 1444 14:51:26.268533  BS: BS_DEV_RESOURCES times (us): entry 0 run 2506207 exit 15

 1445 14:51:26.271550  Enabling resources...

 1446 14:51:26.275628  PCI: 00:00.0 subsystem <- 1028/3e34

 1447 14:51:26.277929  PCI: 00:00.0 cmd <- 06

 1448 14:51:26.282481  PCI: 00:02.0 subsystem <- 1028/3ea0

 1449 14:51:26.284288  PCI: 00:02.0 cmd <- 03

 1450 14:51:26.288256  PCI: 00:04.0 subsystem <- 1028/1903

 1451 14:51:26.290862  PCI: 00:04.0 cmd <- 02

 1452 14:51:26.293059  PCI: 00:08.0 cmd <- 06

 1453 14:51:26.296969  PCI: 00:12.0 subsystem <- 1028/9df9

 1454 14:51:26.300068  PCI: 00:12.0 cmd <- 02

 1455 14:51:26.303952  PCI: 00:14.0 subsystem <- 1028/9ded

 1456 14:51:26.306234  PCI: 00:14.0 cmd <- 02

 1457 14:51:26.308808  PCI: 00:14.2 cmd <- 02

 1458 14:51:26.312159  PCI: 00:14.3 subsystem <- 1028/9df0

 1459 14:51:26.315060  PCI: 00:14.3 cmd <- 02

 1460 14:51:26.318535  PCI: 00:15.0 subsystem <- 1028/9de8

 1461 14:51:26.320972  PCI: 00:15.0 cmd <- 02

 1462 14:51:26.324627  PCI: 00:15.1 subsystem <- 1028/9de9

 1463 14:51:26.327555  PCI: 00:15.1 cmd <- 02

 1464 14:51:26.331188  PCI: 00:17.0 subsystem <- 1028/9dd3

 1465 14:51:26.333331  PCI: 00:17.0 cmd <- 03

 1466 14:51:26.337688  PCI: 00:19.0 subsystem <- 1028/9dc5

 1467 14:51:26.339993  PCI: 00:19.0 cmd <- 06

 1468 14:51:26.343944  PCI: 00:19.2 subsystem <- 1028/9dc7

 1469 14:51:26.346220  PCI: 00:19.2 cmd <- 06

 1470 14:51:26.349508  PCI: 00:1c.0 bridge ctrl <- 0003

 1471 14:51:26.352956  PCI: 00:1c.0 subsystem <- 1028/9dbf

 1472 14:51:26.356685  Capability: type 0x10 @ 0x40

 1473 14:51:26.359483  Capability: type 0x05 @ 0x80

 1474 14:51:26.361966  Capability: type 0x0d @ 0x90

 1475 14:51:26.365049  PCI: 00:1c.0 cmd <- 06

 1476 14:51:26.368510  PCI: 00:1d.0 bridge ctrl <- 0003

 1477 14:51:26.371427  PCI: 00:1d.0 subsystem <- 1028/9db4

 1478 14:51:26.374634  Capability: type 0x10 @ 0x40

 1479 14:51:26.378044  Capability: type 0x05 @ 0x80

 1480 14:51:26.380487  Capability: type 0x0d @ 0x90

 1481 14:51:26.382556  PCI: 00:1d.0 cmd <- 06

 1482 14:51:26.386541  PCI: 00:1f.0 subsystem <- 1028/9d84

 1483 14:51:26.388840  PCI: 00:1f.0 cmd <- 407

 1484 14:51:26.393568  PCI: 00:1f.3 subsystem <- 1028/9dc8

 1485 14:51:26.395467  PCI: 00:1f.3 cmd <- 02

 1486 14:51:26.399367  PCI: 00:1f.4 subsystem <- 1028/9da3

 1487 14:51:26.401560  PCI: 00:1f.4 cmd <- 03

 1488 14:51:26.405726  PCI: 00:1f.5 subsystem <- 1028/9da4

 1489 14:51:26.408019  PCI: 00:1f.5 cmd <- 406

 1490 14:51:26.411816  PCI: 00:1f.6 subsystem <- 1028/15be

 1491 14:51:26.414078  PCI: 00:1f.6 cmd <- 02

 1492 14:51:26.424467  PCI: 01:00.0 cmd <- 02

 1493 14:51:26.429777  PCI: 02:00.0 cmd <- 06

 1494 14:51:26.433610  done.

 1495 14:51:26.439807  BS: BS_DEV_ENABLE times (us): entry 440 run 164264 exit 0

 1496 14:51:26.441634  Initializing devices...

 1497 14:51:26.443940  Root Device init ...

 1498 14:51:26.447680  Root Device init finished in 2139 usecs

 1499 14:51:26.450769  CPU_CLUSTER: 0 init ...

 1500 14:51:26.455083  CPU_CLUSTER: 0 init finished in 2431 usecs

 1501 14:51:26.461822  PCI: 00:00.0 init ...

 1502 14:51:26.463809  CPU TDP: 15 Watts

 1503 14:51:26.466150  CPU PL2 = 51 Watts

 1504 14:51:26.470582  PCI: 00:00.0 init finished in 7040 usecs

 1505 14:51:26.473099  PCI: 00:02.0 init ...

 1506 14:51:26.476992  PCI: 00:02.0 init finished in 2229 usecs

 1507 14:51:26.480586  PCI: 00:04.0 init ...

 1508 14:51:26.483317  PCI: 00:04.0 init finished in 2236 usecs

 1509 14:51:26.486458  PCI: 00:08.0 init ...

 1510 14:51:26.490310  PCI: 00:08.0 init finished in 2236 usecs

 1511 14:51:26.493142  PCI: 00:12.0 init ...

 1512 14:51:26.497205  PCI: 00:12.0 init finished in 2236 usecs

 1513 14:51:26.499288  PCI: 00:14.0 init ...

 1514 14:51:26.503536  PCI: 00:14.0 init finished in 2237 usecs

 1515 14:51:26.506653  PCI: 00:14.2 init ...

 1516 14:51:26.510577  PCI: 00:14.2 init finished in 2237 usecs

 1517 14:51:26.512696  PCI: 00:14.3 init ...

 1518 14:51:26.517074  PCI: 00:14.3 init finished in 2243 usecs

 1519 14:51:26.519760  PCI: 00:15.0 init ...

 1520 14:51:26.523026  DW I2C bus 0 at 0xd1347000 (400 KHz)

 1521 14:51:26.527335  PCI: 00:15.0 init finished in 5936 usecs

 1522 14:51:26.530321  PCI: 00:15.1 init ...

 1523 14:51:26.534007  DW I2C bus 1 at 0xd1348000 (400 KHz)

 1524 14:51:26.537765  PCI: 00:15.1 init finished in 5937 usecs

 1525 14:51:26.540819  PCI: 00:19.0 init ...

 1526 14:51:26.544590  DW I2C bus 4 at 0xd1349000 (400 KHz)

 1527 14:51:26.548738  PCI: 00:19.0 init finished in 5936 usecs

 1528 14:51:26.552010  PCI: 00:1c.0 init ...

 1529 14:51:26.554822  Initializing PCH PCIe bridge.

 1530 14:51:26.558720  PCI: 00:1c.0 init finished in 5282 usecs

 1531 14:51:26.561477  PCI: 00:1d.0 init ...

 1532 14:51:26.564673  Initializing PCH PCIe bridge.

 1533 14:51:26.568649  PCI: 00:1d.0 init finished in 5250 usecs

 1534 14:51:26.572209  PCI: 00:1f.0 init ...

 1535 14:51:26.575677  IOAPIC: Initializing IOAPIC at 0xfec00000

 1536 14:51:26.580089  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1537 14:51:26.582629  IOAPIC: ID = 0x02

 1538 14:51:26.584859  IOAPIC: Dumping registers

 1539 14:51:26.587369    reg 0x0000: 0x02000000

 1540 14:51:26.590109    reg 0x0001: 0x00770020

 1541 14:51:26.592844    reg 0x0002: 0x00000000

 1542 14:51:26.598237  PCI: 00:1f.0 init finished in 25026 usecs

 1543 14:51:26.601331  PCI: 00:1f.3 init ...

 1544 14:51:26.606312  HDA: codec_mask = 05

 1545 14:51:26.609677  HDA: Initializing codec #2

 1546 14:51:26.612288  HDA: codec viddid: 8086280b

 1547 14:51:26.614854  HDA: No verb table entry found

 1548 14:51:26.617556  HDA: Initializing codec #0

 1549 14:51:26.620732  HDA: codec viddid: 10ec0236

 1550 14:51:26.627653  HDA: verb loaded.

 1551 14:51:26.631786  PCI: 00:1f.3 init finished in 28838 usecs

 1552 14:51:26.634323  PCI: 00:1f.4 init ...

 1553 14:51:26.638592  PCI: 00:1f.4 init finished in 2247 usecs

 1554 14:51:26.641241  PCI: 00:1f.6 init ...

 1555 14:51:26.645610  PCI: 00:1f.6 init finished in 2236 usecs

 1556 14:51:26.656514  PCI: 01:00.0 init ...

 1557 14:51:26.660131  PCI: 01:00.0 init finished in 2237 usecs

 1558 14:51:26.662954  PCI: 02:00.0 init ...

 1559 14:51:26.667331  PCI: 02:00.0 init finished in 2237 usecs

 1560 14:51:26.669305  PNP: 0c09.0 init ...

 1561 14:51:26.677357  EC Label      : 00.00.20

 1562 14:51:26.681121  EC Revision   : 9ca674bba

 1563 14:51:26.684581  EC Model Num  : 08B9

 1564 14:51:26.687970  EC Build Date : 05/10/19

 1565 14:51:26.696562  PNP: 0c09.0 init finished in 25184 usecs

 1566 14:51:26.698608  Devices initialized

 1567 14:51:26.702389  Show all devs... After init.

 1568 14:51:26.704138  Root Device: enabled 1

 1569 14:51:26.706635  CPU_CLUSTER: 0: enabled 1

 1570 14:51:26.709187  DOMAIN: 0000: enabled 1

 1571 14:51:26.711318  APIC: 00: enabled 1

 1572 14:51:26.713434  PCI: 00:00.0: enabled 1

 1573 14:51:26.716189  PCI: 00:02.0: enabled 1

 1574 14:51:26.718253  PCI: 00:04.0: enabled 1

 1575 14:51:26.721154  PCI: 00:12.0: enabled 1

 1576 14:51:26.723429  PCI: 00:12.5: enabled 0

 1577 14:51:26.725579  PCI: 00:12.6: enabled 0

 1578 14:51:26.728161  PCI: 00:13.0: enabled 0

 1579 14:51:26.730521  PCI: 00:14.0: enabled 1

 1580 14:51:26.733743  PCI: 00:14.1: enabled 0

 1581 14:51:26.735434  PCI: 00:14.3: enabled 1

 1582 14:51:26.738117  PCI: 00:14.5: enabled 0

 1583 14:51:26.740176  PCI: 00:15.0: enabled 1

 1584 14:51:26.742593  PCI: 00:15.1: enabled 1

 1585 14:51:26.745887  PCI: 00:15.2: enabled 0

 1586 14:51:26.747459  PCI: 00:15.3: enabled 0

 1587 14:51:26.750038  PCI: 00:16.0: enabled 0

 1588 14:51:26.752872  PCI: 00:16.1: enabled 0

 1589 14:51:26.755111  PCI: 00:16.2: enabled 0

 1590 14:51:26.757298  PCI: 00:16.3: enabled 0

 1591 14:51:26.759649  PCI: 00:16.4: enabled 0

 1592 14:51:26.762535  PCI: 00:16.5: enabled 0

 1593 14:51:26.764739  PCI: 00:17.0: enabled 1

 1594 14:51:26.767136  PCI: 00:19.0: enabled 1

 1595 14:51:26.769611  PCI: 00:19.1: enabled 0

 1596 14:51:26.772062  PCI: 00:19.2: enabled 1

 1597 14:51:26.774615  PCI: 00:1a.0: enabled 0

 1598 14:51:26.776859  PCI: 00:1c.0: enabled 1

 1599 14:51:26.779697  PCI: 00:1c.1: enabled 0

 1600 14:51:26.781502  PCI: 00:1c.2: enabled 0

 1601 14:51:26.784025  PCI: 00:1c.3: enabled 0

 1602 14:51:26.787255  PCI: 00:1c.4: enabled 0

 1603 14:51:26.789321  PCI: 00:1c.5: enabled 0

 1604 14:51:26.791879  PCI: 00:1c.6: enabled 0

 1605 14:51:26.794209  PCI: 00:1c.7: enabled 0

 1606 14:51:26.796195  PCI: 00:1d.0: enabled 1

 1607 14:51:26.799062  PCI: 00:1d.1: enabled 0

 1608 14:51:26.801575  PCI: 00:1d.2: enabled 0

 1609 14:51:26.803816  PCI: 00:1d.3: enabled 0

 1610 14:51:26.806463  PCI: 00:1d.4: enabled 0

 1611 14:51:26.808725  PCI: 00:1e.0: enabled 0

 1612 14:51:26.811055  PCI: 00:1e.1: enabled 0

 1613 14:51:26.813324  PCI: 00:1e.2: enabled 0

 1614 14:51:26.816295  PCI: 00:1e.3: enabled 0

 1615 14:51:26.818159  PCI: 00:1f.0: enabled 1

 1616 14:51:26.820806  PCI: 00:1f.1: enabled 0

 1617 14:51:26.823291  PCI: 00:1f.2: enabled 0

 1618 14:51:26.825550  PCI: 00:1f.3: enabled 1

 1619 14:51:26.828432  PCI: 00:1f.4: enabled 1

 1620 14:51:26.830742  PCI: 00:1f.5: enabled 1

 1621 14:51:26.832869  PCI: 00:1f.6: enabled 1

 1622 14:51:26.835968  USB0 port 0: enabled 1

 1623 14:51:26.837957  I2C: 01:10: enabled 1

 1624 14:51:26.839560  I2C: 01:10: enabled 1

 1625 14:51:26.842108  I2C: 01:34: enabled 1

 1626 14:51:26.844496  I2C: 02:2c: enabled 1

 1627 14:51:26.846604  I2C: 03:50: enabled 1

 1628 14:51:26.848749  PNP: 0c09.0: enabled 1

 1629 14:51:26.850845  USB2 port 0: enabled 1

 1630 14:51:26.853565  USB2 port 1: enabled 1

 1631 14:51:26.855724  USB2 port 2: enabled 1

 1632 14:51:26.858052  USB2 port 4: enabled 1

 1633 14:51:26.860487  USB2 port 5: enabled 1

 1634 14:51:26.862994  USB2 port 6: enabled 1

 1635 14:51:26.865563  USB2 port 7: enabled 1

 1636 14:51:26.867559  USB2 port 8: enabled 1

 1637 14:51:26.870237  USB2 port 9: enabled 1

 1638 14:51:26.872013  USB3 port 0: enabled 1

 1639 14:51:26.874779  USB3 port 1: enabled 1

 1640 14:51:26.877113  USB3 port 2: enabled 1

 1641 14:51:26.878895  USB3 port 3: enabled 1

 1642 14:51:26.881250  USB3 port 4: enabled 1

 1643 14:51:26.883384  APIC: 03: enabled 1

 1644 14:51:26.886258  APIC: 06: enabled 1

 1645 14:51:26.887383  APIC: 01: enabled 1

 1646 14:51:26.889670  APIC: 02: enabled 1

 1647 14:51:26.891851  APIC: 07: enabled 1

 1648 14:51:26.894115  APIC: 04: enabled 1

 1649 14:51:26.896109  APIC: 05: enabled 1

 1650 14:51:26.898036  PCI: 00:08.0: enabled 1

 1651 14:51:26.900960  PCI: 00:14.2: enabled 1

 1652 14:51:26.903150  PCI: 01:00.0: enabled 1

 1653 14:51:26.905413  PCI: 02:00.0: enabled 1

 1654 14:51:26.910798  Disabling ACPI via APMC:

 1655 14:51:26.912576  done.

 1656 14:51:26.919276  ELOG: Event(92) added with size 9 at 2023-08-16 14:51:15 UTC

 1657 14:51:26.925354  ELOG: Event(93) added with size 9 at 2023-08-16 14:51:15 UTC

 1658 14:51:26.931345  ELOG: Event(9A) added with size 9 at 2023-08-16 14:51:15 UTC

 1659 14:51:26.937744  ELOG: Event(9E) added with size 10 at 2023-08-16 14:51:15 UTC

 1660 14:51:26.944251  ELOG: Event(9F) added with size 14 at 2023-08-16 14:51:15 UTC

 1661 14:51:26.950164  BS: BS_DEV_INIT times (us): entry 0 run 466397 exit 38350

 1662 14:51:26.956414  ELOG: Event(A1) added with size 10 at 2023-08-16 14:51:15 UTC

 1663 14:51:26.964558  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1664 14:51:26.970326  ELOG: Event(A0) added with size 9 at 2023-08-16 14:51:15 UTC

 1665 14:51:26.974753  elog_add_boot_reason: Logged dev mode boot

 1666 14:51:26.976411  Finalize devices...

 1667 14:51:26.978819  PCI: 00:17.0 final

 1668 14:51:26.980824  Devices finalized

 1669 14:51:26.985770  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)

 1670 14:51:26.992369  BS: BS_POST_DEVICE times (us): entry 24788 run 5940 exit 5387

 1671 14:51:26.997378  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0

 1672 14:51:27.006228  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C

 1673 14:51:27.010891  disable_unused_touchscreen: Disable ACPI0C50

 1674 14:51:27.014811  disable_unused_touchscreen: Enable ELAN900C

 1675 14:51:27.018420  CBFS @ 1d00000 size 300000

 1676 14:51:27.024111  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1677 14:51:27.027901  CBFS: Locating 'fallback/dsdt.aml'

 1678 14:51:27.031811  CBFS: Found @ offset 10b200 size 4448

 1679 14:51:27.034850  CBFS @ 1d00000 size 300000

 1680 14:51:27.041028  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1681 14:51:27.043925  CBFS: Locating 'fallback/slic'

 1682 14:51:27.049615  CBFS: 'fallback/slic' not found.

 1683 14:51:27.052944  ACPI: Writing ACPI tables at 89c0f000.

 1684 14:51:27.055038  ACPI:    * FACS

 1685 14:51:27.056595  ACPI:    * DSDT

 1686 14:51:27.060586  Ramoops buffer: 0x100000@0x89b0e000.

 1687 14:51:27.065387  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

 1688 14:51:27.069083  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

 1689 14:51:27.073306  ACPI:    * FADT

 1690 14:51:27.075091  SCI is IRQ9

 1691 14:51:27.078530  ACPI: added table 1/32, length now 40

 1692 14:51:27.080176  ACPI:     * SSDT

 1693 14:51:27.083561  Found 1 CPU(s) with 8 core(s) each.

 1694 14:51:27.087627  Error: Could not locate 'wifi_sar' in VPD.

 1695 14:51:27.091392  Error: failed from getting SAR limits!

 1696 14:51:27.095508  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3

 1697 14:51:27.099657  dw_i2c: bad counts. hcnt = -14 lcnt = 30

 1698 14:51:27.103669  dw_i2c: bad counts. hcnt = -20 lcnt = 40

 1699 14:51:27.108286  dw_i2c: bad counts. hcnt = -18 lcnt = 48

 1700 14:51:27.113092  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10

 1701 14:51:27.118371  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34

 1702 14:51:27.123934  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c

 1703 14:51:27.127665  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50

 1704 14:51:27.133033  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1705 14:51:27.139423  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1

 1706 14:51:27.145671  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1707 14:51:27.152033  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4

 1708 14:51:27.155909  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1709 14:51:27.160859  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6

 1710 14:51:27.164963  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7

 1711 14:51:27.170405  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8

 1712 14:51:27.175574  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1713 14:51:27.181471  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1714 14:51:27.187189  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1

 1715 14:51:27.193518  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1716 14:51:27.198968  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3

 1717 14:51:27.203435  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4

 1718 14:51:27.207595  ACPI: added table 2/32, length now 44

 1719 14:51:27.208894  ACPI:    * MCFG

 1720 14:51:27.213326  ACPI: added table 3/32, length now 48

 1721 14:51:27.215057  ACPI:    * TPM2

 1722 14:51:27.217705  TPM2 log created at 89afe000

 1723 14:51:27.221172  ACPI: added table 4/32, length now 52

 1724 14:51:27.222485  ACPI:    * MADT

 1725 14:51:27.224292  SCI is IRQ9

 1726 14:51:27.227735  ACPI: added table 5/32, length now 56

 1727 14:51:27.230397  current = 89c14bd0

 1728 14:51:27.232250  ACPI:    * IGD OpRegion

 1729 14:51:27.235492  GMA: Found VBT in CBFS

 1730 14:51:27.238155  GMA: Found valid VBT in CBFS

 1731 14:51:27.241250  ACPI: added table 6/32, length now 60

 1732 14:51:27.242769  ACPI:    * HPET

 1733 14:51:27.246529  ACPI: added table 7/32, length now 64

 1734 14:51:27.247789  ACPI: done.

 1735 14:51:27.250501  ACPI tables: 31872 bytes.

 1736 14:51:27.253921  smbios_write_tables: 89afd000

 1737 14:51:27.256194  recv_ec_data: 0x01

 1738 14:51:27.258600  Create SMBIOS type 17

 1739 14:51:27.261116  PCI: 00:14.3 (Intel WiFi)

 1740 14:51:27.263942  SMBIOS tables: 708 bytes.

 1741 14:51:27.267655  Writing table forward entry at 0x00000500

 1742 14:51:27.273833  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b

 1743 14:51:27.277145  Writing coreboot table at 0x89c33000

 1744 14:51:27.283188   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1745 14:51:27.287853   1. 0000000000001000-000000000009ffff: RAM

 1746 14:51:27.291856   2. 00000000000a0000-00000000000fffff: RESERVED

 1747 14:51:27.296776   3. 0000000000100000-0000000089afcfff: RAM

 1748 14:51:27.302022   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES

 1749 14:51:27.307432   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE

 1750 14:51:27.313257   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES

 1751 14:51:27.317475   7. 000000008a000000-000000008f7fffff: RESERVED

 1752 14:51:27.322699   8. 00000000e0000000-00000000efffffff: RESERVED

 1753 14:51:27.327173   9. 00000000fc000000-00000000fc000fff: RESERVED

 1754 14:51:27.331974  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1755 14:51:27.337700  11. 00000000fed10000-00000000fed17fff: RESERVED

 1756 14:51:27.341548  12. 00000000fed80000-00000000fed83fff: RESERVED

 1757 14:51:27.346055  13. 00000000feda0000-00000000feda1fff: RESERVED

 1758 14:51:27.350610  14. 0000000100000000-000000026e7fffff: RAM

 1759 14:51:27.354757  Graphics framebuffer located at 0xc0000000

 1760 14:51:27.357938  Passing 6 GPIOs to payload:

 1761 14:51:27.362904              NAME |       PORT | POLARITY |     VALUE

 1762 14:51:27.368397     write protect | 0x000000dc |     high |       low

 1763 14:51:27.373533          recovery | 0x000000d5 |      low |      high

 1764 14:51:27.378857               lid |  undefined |     high |      high

 1765 14:51:27.383869             power |  undefined |     high |       low

 1766 14:51:27.389266             oprom |  undefined |     high |       low

 1767 14:51:27.394923          EC in RW |  undefined |     high |       low

 1768 14:51:27.396451  recv_ec_data: 0x01

 1769 14:51:27.397854  SKU ID: 3

 1770 14:51:27.400254  CBFS @ 1d00000 size 300000

 1771 14:51:27.406736  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1772 14:51:27.412768  Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum a0a7

 1773 14:51:27.416159  coreboot table: 1484 bytes.

 1774 14:51:27.418976  IMD ROOT    0. 89fff000 00001000

 1775 14:51:27.422613  IMD SMALL   1. 89ffe000 00001000

 1776 14:51:27.426218  FSP MEMORY  2. 89d0e000 002f0000

 1777 14:51:27.428809  CONSOLE     3. 89cee000 00020000

 1778 14:51:27.432510  TIME STAMP  4. 89ced000 00000910

 1779 14:51:27.435603  VBOOT WORK  5. 89cea000 00003000

 1780 14:51:27.439407  VBOOT       6. 89ce9000 00000c0c

 1781 14:51:27.442272  MRC DATA    7. 89ce7000 000018f0

 1782 14:51:27.445670  ROMSTG STCK 8. 89ce6000 00000400

 1783 14:51:27.449321  AFTER CAR   9. 89cdc000 0000a000

 1784 14:51:27.452799  RAMSTAGE   10. 89c80000 0005c000

 1785 14:51:27.455651  REFCODE    11. 89c4b000 00035000

 1786 14:51:27.459262  SMM BACKUP 12. 89c3b000 00010000

 1787 14:51:27.462605  COREBOOT   13. 89c33000 00008000

 1788 14:51:27.465872  ACPI       14. 89c0f000 00024000

 1789 14:51:27.469317  ACPI GNVS  15. 89c0e000 00001000

 1790 14:51:27.472125  RAMOOPS    16. 89b0e000 00100000

 1791 14:51:27.475851  TPM2 TCGLOG17. 89afe000 00010000

 1792 14:51:27.479219  SMBIOS     18. 89afd000 00000800

 1793 14:51:27.481196  IMD small region:

 1794 14:51:27.484189    IMD ROOT    0. 89ffec00 00000400

 1795 14:51:27.487829    FSP RUNTIME 1. 89ffebe0 00000004

 1796 14:51:27.490973    POWER STATE 2. 89ffeba0 00000040

 1797 14:51:27.494652    ROMSTAGE    3. 89ffeb80 00000004

 1798 14:51:27.498014    MEM INFO    4. 89ffe9c0 000001a9

 1799 14:51:27.501561    VPD         5. 89ffe960 00000047

 1800 14:51:27.505403    COREBOOTFWD 6. 89ffe920 00000028

 1801 14:51:27.508038  MTRR: Physical address space:

 1802 14:51:27.514717  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1803 14:51:27.521065  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1804 14:51:27.527092  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6

 1805 14:51:27.532875  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0

 1806 14:51:27.539161  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1807 14:51:27.546103  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1808 14:51:27.552315  0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6

 1809 14:51:27.556309  MTRR: Fixed MSR 0x250 0x0606060606060606

 1810 14:51:27.560548  MTRR: Fixed MSR 0x258 0x0606060606060606

 1811 14:51:27.564701  MTRR: Fixed MSR 0x259 0x0000000000000000

 1812 14:51:27.568212  MTRR: Fixed MSR 0x268 0x0606060606060606

 1813 14:51:27.572346  MTRR: Fixed MSR 0x269 0x0606060606060606

 1814 14:51:27.577191  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1815 14:51:27.580678  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1816 14:51:27.585151  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1817 14:51:27.588478  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1818 14:51:27.593390  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1819 14:51:27.597537  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1820 14:51:27.600684  call enable_fixed_mtrr()

 1821 14:51:27.603918  CPU physical address size: 39 bits

 1822 14:51:27.607827  MTRR: default type WB/UC MTRR counts: 7/7.

 1823 14:51:27.611831  MTRR: UC selected as default type.

 1824 14:51:27.617697  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1825 14:51:27.624171  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6

 1826 14:51:27.630186  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6

 1827 14:51:27.636528  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6

 1828 14:51:27.642800  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1829 14:51:27.648856  MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1830 14:51:27.655350  MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 1831 14:51:27.656032  

 1832 14:51:27.657400  MTRR check

 1833 14:51:27.659745  Fixed MTRRs   : Enabled

 1834 14:51:27.661982  Variable MTRRs: Enabled

 1835 14:51:27.662757  

 1836 14:51:27.666918  MTRR: Fixed MSR 0x250 0x0606060606060606

 1837 14:51:27.671245  MTRR: Fixed MSR 0x258 0x0606060606060606

 1838 14:51:27.674407  MTRR: Fixed MSR 0x259 0x0000000000000000

 1839 14:51:27.678893  MTRR: Fixed MSR 0x268 0x0606060606060606

 1840 14:51:27.683344  MTRR: Fixed MSR 0x269 0x0606060606060606

 1841 14:51:27.686502  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1842 14:51:27.690791  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1843 14:51:27.694798  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1844 14:51:27.698813  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1845 14:51:27.703350  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1846 14:51:27.707279  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1847 14:51:27.714242  BS: BS_WRITE_TABLES times (us): entry 17203 run 490482 exit 157257

 1848 14:51:27.717155  call enable_fixed_mtrr()

 1849 14:51:27.719320  CBFS @ 1d00000 size 300000

 1850 14:51:27.723049  CPU physical address size: 39 bits

 1851 14:51:27.729709  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1852 14:51:27.733977  MTRR: Fixed MSR 0x250 0x0606060606060606

 1853 14:51:27.737819  MTRR: Fixed MSR 0x250 0x0606060606060606

 1854 14:51:27.742141  MTRR: Fixed MSR 0x258 0x0606060606060606

 1855 14:51:27.745726  MTRR: Fixed MSR 0x259 0x0000000000000000

 1856 14:51:27.749803  MTRR: Fixed MSR 0x268 0x0606060606060606

 1857 14:51:27.754645  MTRR: Fixed MSR 0x269 0x0606060606060606

 1858 14:51:27.757766  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1859 14:51:27.762008  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1860 14:51:27.766087  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1861 14:51:27.770686  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1862 14:51:27.774781  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1863 14:51:27.778781  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1864 14:51:27.783642  MTRR: Fixed MSR 0x258 0x0606060606060606

 1865 14:51:27.785285  call enable_fixed_mtrr()

 1866 14:51:27.789563  MTRR: Fixed MSR 0x259 0x0000000000000000

 1867 14:51:27.793945  MTRR: Fixed MSR 0x268 0x0606060606060606

 1868 14:51:27.798183  MTRR: Fixed MSR 0x269 0x0606060606060606

 1869 14:51:27.802246  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1870 14:51:27.806284  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1871 14:51:27.809931  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1872 14:51:27.814336  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1873 14:51:27.818478  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1874 14:51:27.822702  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1875 14:51:27.826270  CPU physical address size: 39 bits

 1876 14:51:27.829365  call enable_fixed_mtrr()

 1877 14:51:27.833247  MTRR: Fixed MSR 0x250 0x0606060606060606

 1878 14:51:27.837126  MTRR: Fixed MSR 0x250 0x0606060606060606

 1879 14:51:27.841396  MTRR: Fixed MSR 0x258 0x0606060606060606

 1880 14:51:27.845514  MTRR: Fixed MSR 0x259 0x0000000000000000

 1881 14:51:27.849573  MTRR: Fixed MSR 0x268 0x0606060606060606

 1882 14:51:27.853733  MTRR: Fixed MSR 0x269 0x0606060606060606

 1883 14:51:27.857585  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1884 14:51:27.861578  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1885 14:51:27.865458  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1886 14:51:27.869822  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1887 14:51:27.873724  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1888 14:51:27.877797  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1889 14:51:27.882650  MTRR: Fixed MSR 0x258 0x0606060606060606

 1890 14:51:27.884907  call enable_fixed_mtrr()

 1891 14:51:27.889284  MTRR: Fixed MSR 0x259 0x0000000000000000

 1892 14:51:27.893041  MTRR: Fixed MSR 0x268 0x0606060606060606

 1893 14:51:27.897326  MTRR: Fixed MSR 0x269 0x0606060606060606

 1894 14:51:27.901533  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1895 14:51:27.905548  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1896 14:51:27.909832  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1897 14:51:27.913735  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1898 14:51:27.917646  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1899 14:51:27.921772  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1900 14:51:27.925545  CPU physical address size: 39 bits

 1901 14:51:27.928696  call enable_fixed_mtrr()

 1902 14:51:27.932384  CPU physical address size: 39 bits

 1903 14:51:27.935657  CBFS: Locating 'fallback/payload'

 1904 14:51:27.939544  MTRR: Fixed MSR 0x250 0x0606060606060606

 1905 14:51:27.943688  MTRR: Fixed MSR 0x258 0x0606060606060606

 1906 14:51:27.947439  MTRR: Fixed MSR 0x259 0x0000000000000000

 1907 14:51:27.951420  MTRR: Fixed MSR 0x268 0x0606060606060606

 1908 14:51:27.955697  MTRR: Fixed MSR 0x269 0x0606060606060606

 1909 14:51:27.959864  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1910 14:51:27.964592  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1911 14:51:27.968343  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1912 14:51:27.972354  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1913 14:51:27.976217  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1914 14:51:27.980278  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1915 14:51:27.984329  MTRR: Fixed MSR 0x250 0x0606060606060606

 1916 14:51:27.986989  call enable_fixed_mtrr()

 1917 14:51:27.991445  MTRR: Fixed MSR 0x258 0x0606060606060606

 1918 14:51:27.995372  MTRR: Fixed MSR 0x259 0x0000000000000000

 1919 14:51:27.999794  MTRR: Fixed MSR 0x268 0x0606060606060606

 1920 14:51:28.003600  MTRR: Fixed MSR 0x269 0x0606060606060606

 1921 14:51:28.007951  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1922 14:51:28.011456  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1923 14:51:28.016136  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1924 14:51:28.020223  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1925 14:51:28.023915  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1926 14:51:28.028260  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1927 14:51:28.031884  CPU physical address size: 39 bits

 1928 14:51:28.034729  call enable_fixed_mtrr()

 1929 14:51:28.038203  CPU physical address size: 39 bits

 1930 14:51:28.042336  CPU physical address size: 39 bits

 1931 14:51:28.046073  CBFS: Found @ offset 1cf4c0 size 3a954

 1932 14:51:28.050589  Checking segment from ROM address 0xffecf4f8

 1933 14:51:28.054975  Checking segment from ROM address 0xffecf514

 1934 14:51:28.059244  Loading segment from ROM address 0xffecf4f8

 1935 14:51:28.061548    code (compression=0)

 1936 14:51:28.069653    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c

 1937 14:51:28.078485  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c

 1938 14:51:28.080489  it's not compressed!

 1939 14:51:28.162811  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530

 1940 14:51:28.169796  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc

 1941 14:51:28.177116  Loading segment from ROM address 0xffecf514

 1942 14:51:28.179904    Entry Point 0x30100018

 1943 14:51:28.181835  Loaded segments

 1944 14:51:28.186074  Finalizing chipset.

 1945 14:51:28.187320  Finalizing SMM.

 1946 14:51:28.193554  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 467134 exit 5992

 1947 14:51:28.197582  mp_park_aps done after 0 msecs.

 1948 14:51:28.201727  Jumping to boot code at 30100018(89c33000)

 1949 14:51:28.209741  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes

 1950 14:51:28.210165  

 1951 14:51:28.210797  

 1952 14:51:28.211179  

 1953 14:51:28.213693  Starting depthcharge on sarien...

 1954 14:51:28.214108  

 1955 14:51:28.216485  end: 2.2.3 depthcharge-start (duration 00:00:29) [common]
 1956 14:51:28.217030  start: 2.2.4 bootloader-commands (timeout 00:04:14) [common]
 1957 14:51:28.217454  Setting prompt string to ['sarien:']
 1958 14:51:28.217833  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:14)
 1959 14:51:28.220778  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1960 14:51:28.221490  

 1961 14:51:28.228585  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1962 14:51:28.229312  

 1963 14:51:28.236739  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!

 1964 14:51:28.237173  

 1965 14:51:28.238532  BIOS MMAP details:

 1966 14:51:28.238927  

 1967 14:51:28.241404  IFD Base Offset  : 0x1000000

 1968 14:51:28.242178  

 1969 14:51:28.244750  IFD End Offset   : 0x2000000

 1970 14:51:28.245214  

 1971 14:51:28.247284  MMAP Size        : 0x1000000

 1972 14:51:28.247737  

 1973 14:51:28.250805  MMAP Start       : 0xff000000

 1974 14:51:28.251687  

 1975 14:51:28.257456  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff

 1976 14:51:28.261794  

 1977 14:51:28.265458  New NVMe Controller 0x3214e128 @ 00:1d:04

 1978 14:51:28.266078  

 1979 14:51:28.269942  New NVMe Controller 0x3214e1f0 @ 00:1d:00

 1980 14:51:28.270655  

 1981 14:51:28.275859  The GBB signature is at 0x30000014 and is:  24 47 42 42

 1982 14:51:28.279710  

 1983 14:51:28.281765  Wipe memory regions:

 1984 14:51:28.282185  

 1985 14:51:28.286198  	[0x00000000001000, 0x000000000a0000)

 1986 14:51:28.286619  

 1987 14:51:28.289578  	[0x00000000100000, 0x00000030000000)

 1988 14:51:28.371957  

 1989 14:51:28.375175  	[0x00000032751910, 0x00000089afd000)

 1990 14:51:28.525687  

 1991 14:51:28.528985  	[0x00000100000000, 0x0000026e800000)

 1992 14:51:29.538882  

 1993 14:51:29.540515  R8152: Initializing

 1994 14:51:29.541298  

 1995 14:51:29.542855  Version 6 (ocp_data = 5c30)

 1996 14:51:29.544060  

 1997 14:51:29.546584  R8152: Done initializing

 1998 14:51:29.547062  

 1999 14:51:29.548477  Adding net device

 2000 14:51:29.549970  

 2001 14:51:29.554482  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38

 2002 14:51:29.555037  

 2003 14:51:29.555574  

 2004 14:51:29.556042  

 2005 14:51:29.557056  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2007 14:51:29.658343  sarien: tftpboot 192.168.201.1 11299698/tftp-deploy-f8vs_t3h/kernel/bzImage 11299698/tftp-deploy-f8vs_t3h/kernel/cmdline 11299698/tftp-deploy-f8vs_t3h/ramdisk/ramdisk.cpio.gz

 2008 14:51:29.659044  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2009 14:51:29.659821  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:12)
 2010 14:51:29.703788  tftpboot 192.168.201.1 11299698/tftp-deploy-f8vs_t3h/kernel/bzImage 11299698/tftp-deploy-f8vs_t3h/kernel/cmdline 11299698/tftp-deploy-f8vs_t3h/ramdisk/ramdisk.cpio.gz

 2011 14:51:29.704359  

 2012 14:51:29.704832  Waiting for link

 2013 14:51:29.863086  

 2014 14:51:29.864178  done.

 2015 14:51:29.864786  

 2016 14:51:29.865720  MAC: 00:24:32:30:7b:ce

 2017 14:51:29.866173  

 2018 14:51:29.868545  Sending DHCP discover... done.

 2019 14:51:29.868981  

 2020 14:51:29.871784  Waiting for reply... done.

 2021 14:51:29.872514  

 2022 14:51:29.874499  Sending DHCP request... done.

 2023 14:51:29.874934  

 2024 14:51:29.881242  Waiting for reply... done.

 2025 14:51:29.882002  

 2026 14:51:29.883624  My ip is 192.168.201.162

 2027 14:51:29.884478  

 2028 14:51:29.887915  The DHCP server ip is 192.168.201.1

 2029 14:51:29.888349  

 2030 14:51:29.892604  TFTP server IP predefined by user: 192.168.201.1

 2031 14:51:29.893376  

 2032 14:51:29.900221  Bootfile predefined by user: 11299698/tftp-deploy-f8vs_t3h/kernel/bzImage

 2033 14:51:29.900652  

 2034 14:51:29.903445  Sending tftp read request... done.

 2035 14:51:29.903878  

 2036 14:51:29.910328  Waiting for the transfer... 

 2037 14:51:29.910825  

 2038 14:51:30.648086  00000000 ################################################################

 2039 14:51:30.649233  

 2040 14:51:31.374352  00080000 ################################################################

 2041 14:51:31.374831  

 2042 14:51:32.116954  00100000 ################################################################

 2043 14:51:32.117509  

 2044 14:51:32.848034  00180000 ################################################################

 2045 14:51:32.848615  

 2046 14:51:33.578765  00200000 ################################################################

 2047 14:51:33.579446  

 2048 14:51:34.314342  00280000 ################################################################

 2049 14:51:34.315468  

 2050 14:51:35.049460  00300000 ################################################################

 2051 14:51:35.050404  

 2052 14:51:35.764555  00380000 ################################################################

 2053 14:51:35.765046  

 2054 14:51:36.480135  00400000 ################################################################

 2055 14:51:36.480730  

 2056 14:51:37.217088  00480000 ################################################################

 2057 14:51:37.217646  

 2058 14:51:37.957592  00500000 ################################################################

 2059 14:51:37.958633  

 2060 14:51:38.637205  00580000 ################################################################

 2061 14:51:38.637705  

 2062 14:51:39.266114  00600000 ################################################################

 2063 14:51:39.266623  

 2064 14:51:39.865234  00680000 ################################################################

 2065 14:51:39.866266  

 2066 14:51:40.600587  00700000 ################################################################

 2067 14:51:40.601117  

 2068 14:51:41.331184  00780000 ################################################################

 2069 14:51:41.332267  

 2070 14:51:41.468614  00800000 ############# done.

 2071 14:51:41.469641  

 2072 14:51:41.472396  The bootfile was 8490896 bytes long.

 2073 14:51:41.472975  

 2074 14:51:41.475680  Sending tftp read request... done.

 2075 14:51:41.476370  

 2076 14:51:41.480227  Waiting for the transfer... 

 2077 14:51:41.480720  

 2078 14:51:42.168153  00000000 ################################################################

 2079 14:51:42.168649  

 2080 14:51:42.833313  00080000 ################################################################

 2081 14:51:42.833694  

 2082 14:51:43.459728  00100000 ################################################################

 2083 14:51:43.460267  

 2084 14:51:44.069212  00180000 ################################################################

 2085 14:51:44.069734  

 2086 14:51:44.738562  00200000 ################################################################

 2087 14:51:44.739626  

 2088 14:51:45.397671  00280000 ################################################################

 2089 14:51:45.398260  

 2090 14:51:45.991771  00300000 ################################################################

 2091 14:51:45.992346  

 2092 14:51:46.541400  00380000 ################################################################

 2093 14:51:46.541926  

 2094 14:51:47.106884  00400000 ################################################################

 2095 14:51:47.107301  

 2096 14:51:47.671374  00480000 ################################################################

 2097 14:51:47.671773  

 2098 14:51:48.220945  00500000 ################################################################

 2099 14:51:48.221341  

 2100 14:51:48.759999  00580000 ################################################################

 2101 14:51:48.760496  

 2102 14:51:49.298720  00600000 ################################################################

 2103 14:51:49.299189  

 2104 14:51:49.869225  00680000 ################################################################

 2105 14:51:49.869628  

 2106 14:51:50.446277  00700000 ################################################################

 2107 14:51:50.446730  

 2108 14:51:50.983787  00780000 ################################################################

 2109 14:51:50.984200  

 2110 14:51:51.509865  00800000 ###################################################### done.

 2111 14:51:51.510440  

 2112 14:51:51.512622  Sending tftp read request... done.

 2113 14:51:51.513122  

 2114 14:51:51.516113  Waiting for the transfer... 

 2115 14:51:51.516716  

 2116 14:51:51.518867  00000000 # done.

 2117 14:51:51.519544  

 2118 14:51:51.526741  Command line loaded dynamically from TFTP file: 11299698/tftp-deploy-f8vs_t3h/kernel/cmdline

 2119 14:51:51.527202  

 2120 14:51:51.546535  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2121 14:51:51.550496  

 2122 14:51:51.554033  Shutting down all USB controllers.

 2123 14:51:51.554267  

 2124 14:51:51.556748  Removing current net device

 2125 14:51:51.558298  

 2126 14:51:51.560256  EC: exit firmware mode

 2127 14:51:51.561526  

 2128 14:51:51.563080  Finalizing coreboot

 2129 14:51:51.564047  

 2130 14:51:51.569576  Exiting depthcharge with code 4 at timestamp: 48653880

 2131 14:51:51.569778  

 2132 14:51:51.569952  

 2133 14:51:51.570982  end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
 2134 14:51:51.571203  start: 2.2.5 auto-login-action (timeout 00:03:50) [common]
 2135 14:51:51.571432  Setting prompt string to ['Linux version [0-9]']
 2136 14:51:51.571567  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2137 14:51:51.571696  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2138 14:51:51.571984  Starting kernel ...

 2139 14:51:51.572113  

 2140 14:51:51.572213  

 2142 14:55:41.572247  end: 2.2.5 auto-login-action (duration 00:03:50) [common]
 2144 14:55:41.573172  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 230 seconds'
 2146 14:55:41.573904  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2149 14:55:41.575453  end: 2 depthcharge-action (duration 00:05:00) [common]
 2151 14:55:41.576501  Cleaning after the job
 2152 14:55:41.576915  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299698/tftp-deploy-f8vs_t3h/ramdisk
 2153 14:55:41.582185  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299698/tftp-deploy-f8vs_t3h/kernel
 2154 14:55:41.587984  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299698/tftp-deploy-f8vs_t3h/modules
 2155 14:55:41.589528  start: 5.1 power-off (timeout 00:00:30) [common]
 2156 14:55:41.590273  Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=off'
 2157 14:55:46.744003  >> Command sent successfully.

 2158 14:55:46.746683  Returned 0 in 5 seconds
 2159 14:55:46.847102  end: 5.1 power-off (duration 00:00:05) [common]
 2161 14:55:46.847469  start: 5.2 read-feedback (timeout 00:09:55) [common]
 2162 14:55:46.847754  Listened to connection for namespace 'common' for up to 1s
 2163 14:55:47.848685  Finalising connection for namespace 'common'
 2164 14:55:47.848867  Disconnecting from shell: Finalise
 2165 14:55:47.848973  

 2166 14:55:47.949310  end: 5.2 read-feedback (duration 00:00:01) [common]
 2167 14:55:47.949488  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299698
 2168 14:55:47.970017  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299698
 2169 14:55:47.970187  JobError: Your job cannot terminate cleanly.