Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:37:31.858498 lava-dispatcher, installed at version: 2023.06
2 14:37:31.858710 start: 0 validate
3 14:37:31.858843 Start time: 2023-08-16 14:37:31.858836+00:00 (UTC)
4 14:37:31.858977 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:37:31.859126 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 14:37:32.110537 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:37:32.110724 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:37:32.365184 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:37:32.365355 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:37:36.601476 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:37:36.601648 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:37:36.865885 validate duration: 5.01
14 14:37:36.866156 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:37:36.866287 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:37:36.866389 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:37:36.866522 Not decompressing ramdisk as can be used compressed.
18 14:37:36.866642 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 14:37:36.866706 saving as /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/ramdisk/initrd.cpio.gz
20 14:37:36.866769 total size: 5432690 (5 MB)
21 14:37:37.374914 progress 0 % (0 MB)
22 14:37:37.376529 progress 5 % (0 MB)
23 14:37:37.378079 progress 10 % (0 MB)
24 14:37:37.379502 progress 15 % (0 MB)
25 14:37:37.381105 progress 20 % (1 MB)
26 14:37:37.382688 progress 25 % (1 MB)
27 14:37:37.384233 progress 30 % (1 MB)
28 14:37:37.385983 progress 35 % (1 MB)
29 14:37:37.387500 progress 40 % (2 MB)
30 14:37:37.389057 progress 45 % (2 MB)
31 14:37:37.390565 progress 50 % (2 MB)
32 14:37:37.392117 progress 55 % (2 MB)
33 14:37:37.393587 progress 60 % (3 MB)
34 14:37:37.394982 progress 65 % (3 MB)
35 14:37:37.396530 progress 70 % (3 MB)
36 14:37:37.398101 progress 75 % (3 MB)
37 14:37:37.399497 progress 80 % (4 MB)
38 14:37:37.400898 progress 85 % (4 MB)
39 14:37:37.402469 progress 90 % (4 MB)
40 14:37:37.403878 progress 95 % (4 MB)
41 14:37:37.405349 progress 100 % (5 MB)
42 14:37:37.405592 5 MB downloaded in 0.54 s (9.62 MB/s)
43 14:37:37.405786 end: 1.1.1 http-download (duration 00:00:01) [common]
45 14:37:37.406124 end: 1.1 download-retry (duration 00:00:01) [common]
46 14:37:37.406244 start: 1.2 download-retry (timeout 00:09:59) [common]
47 14:37:37.406362 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 14:37:37.406525 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:37:37.406601 saving as /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/kernel/bzImage
50 14:37:37.406665 total size: 8490896 (8 MB)
51 14:37:37.406730 No compression specified
52 14:37:37.407818 progress 0 % (0 MB)
53 14:37:37.409994 progress 5 % (0 MB)
54 14:37:37.412261 progress 10 % (0 MB)
55 14:37:37.414555 progress 15 % (1 MB)
56 14:37:37.416807 progress 20 % (1 MB)
57 14:37:37.419045 progress 25 % (2 MB)
58 14:37:37.421287 progress 30 % (2 MB)
59 14:37:37.423539 progress 35 % (2 MB)
60 14:37:37.425776 progress 40 % (3 MB)
61 14:37:37.428017 progress 45 % (3 MB)
62 14:37:37.430321 progress 50 % (4 MB)
63 14:37:37.432576 progress 55 % (4 MB)
64 14:37:37.434842 progress 60 % (4 MB)
65 14:37:37.437074 progress 65 % (5 MB)
66 14:37:37.439277 progress 70 % (5 MB)
67 14:37:37.441537 progress 75 % (6 MB)
68 14:37:37.443755 progress 80 % (6 MB)
69 14:37:37.445982 progress 85 % (6 MB)
70 14:37:37.448183 progress 90 % (7 MB)
71 14:37:37.450404 progress 95 % (7 MB)
72 14:37:37.452636 progress 100 % (8 MB)
73 14:37:37.452764 8 MB downloaded in 0.05 s (175.67 MB/s)
74 14:37:37.452915 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:37:37.453158 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:37:37.453249 start: 1.3 download-retry (timeout 00:09:59) [common]
78 14:37:37.453339 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 14:37:37.453474 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 14:37:37.453545 saving as /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/nfsrootfs/full.rootfs.tar
81 14:37:37.453608 total size: 133380384 (127 MB)
82 14:37:37.453673 Using unxz to decompress xz
83 14:37:37.456927 progress 0 % (0 MB)
84 14:37:37.800360 progress 5 % (6 MB)
85 14:37:38.156173 progress 10 % (12 MB)
86 14:37:38.446284 progress 15 % (19 MB)
87 14:37:38.632997 progress 20 % (25 MB)
88 14:37:38.879446 progress 25 % (31 MB)
89 14:37:39.231079 progress 30 % (38 MB)
90 14:37:39.585160 progress 35 % (44 MB)
91 14:37:40.004081 progress 40 % (50 MB)
92 14:37:40.413808 progress 45 % (57 MB)
93 14:37:40.782589 progress 50 % (63 MB)
94 14:37:41.164994 progress 55 % (69 MB)
95 14:37:41.544196 progress 60 % (76 MB)
96 14:37:41.926288 progress 65 % (82 MB)
97 14:37:42.296203 progress 70 % (89 MB)
98 14:37:42.703049 progress 75 % (95 MB)
99 14:37:43.160178 progress 80 % (101 MB)
100 14:37:43.601894 progress 85 % (108 MB)
101 14:37:43.869465 progress 90 % (114 MB)
102 14:37:44.217271 progress 95 % (120 MB)
103 14:37:44.612705 progress 100 % (127 MB)
104 14:37:44.618124 127 MB downloaded in 7.16 s (17.75 MB/s)
105 14:37:44.618463 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:37:44.618953 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:37:44.619137 start: 1.4 download-retry (timeout 00:09:52) [common]
109 14:37:44.619287 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 14:37:44.619552 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:37:44.619677 saving as /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/modules/modules.tar
112 14:37:44.619792 total size: 253808 (0 MB)
113 14:37:44.619912 Using unxz to decompress xz
114 14:37:44.624007 progress 12 % (0 MB)
115 14:37:44.624533 progress 25 % (0 MB)
116 14:37:44.624919 progress 38 % (0 MB)
117 14:37:44.626200 progress 51 % (0 MB)
118 14:37:44.627985 progress 64 % (0 MB)
119 14:37:44.629894 progress 77 % (0 MB)
120 14:37:44.631730 progress 90 % (0 MB)
121 14:37:44.633434 progress 100 % (0 MB)
122 14:37:44.638971 0 MB downloaded in 0.02 s (12.62 MB/s)
123 14:37:44.639283 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:37:44.639726 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:37:44.639876 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 14:37:44.640031 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 14:37:46.615678 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11299758/extract-nfsrootfs-ur1sj8s3
129 14:37:46.615881 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 14:37:46.615986 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 14:37:46.616150 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp
132 14:37:46.616277 makedir: /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin
133 14:37:46.616379 makedir: /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/tests
134 14:37:46.616476 makedir: /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/results
135 14:37:46.616580 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-add-keys
136 14:37:46.616721 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-add-sources
137 14:37:46.616857 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-background-process-start
138 14:37:46.616981 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-background-process-stop
139 14:37:46.617104 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-common-functions
140 14:37:46.617224 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-echo-ipv4
141 14:37:46.617346 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-install-packages
142 14:37:46.617467 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-installed-packages
143 14:37:46.617588 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-os-build
144 14:37:46.617713 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-probe-channel
145 14:37:46.617836 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-probe-ip
146 14:37:46.617960 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-target-ip
147 14:37:46.618145 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-target-mac
148 14:37:46.618267 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-target-storage
149 14:37:46.618389 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-test-case
150 14:37:46.618510 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-test-event
151 14:37:46.618660 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-test-feedback
152 14:37:46.618781 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-test-raise
153 14:37:46.618899 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-test-reference
154 14:37:46.619020 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-test-runner
155 14:37:46.619145 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-test-set
156 14:37:46.619266 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-test-shell
157 14:37:46.619387 Updating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-install-packages (oe)
158 14:37:46.619539 Updating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/bin/lava-installed-packages (oe)
159 14:37:46.619665 Creating /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/environment
160 14:37:46.619770 LAVA metadata
161 14:37:46.619841 - LAVA_JOB_ID=11299758
162 14:37:46.619905 - LAVA_DISPATCHER_IP=192.168.201.1
163 14:37:46.620003 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 14:37:46.620069 skipped lava-vland-overlay
165 14:37:46.620145 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 14:37:46.620223 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 14:37:46.620285 skipped lava-multinode-overlay
168 14:37:46.620357 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 14:37:46.620435 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 14:37:46.620508 Loading test definitions
171 14:37:46.620633 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 14:37:46.620735 Using /lava-11299758 at stage 0
173 14:37:46.621204 uuid=11299758_1.5.2.3.1 testdef=None
174 14:37:46.621296 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 14:37:46.621384 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 14:37:46.621877 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 14:37:46.622101 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 14:37:46.622772 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 14:37:46.623008 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 14:37:46.623619 runner path: /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/0/tests/0_dmesg test_uuid 11299758_1.5.2.3.1
183 14:37:46.623773 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 14:37:46.624002 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 14:37:46.624075 Using /lava-11299758 at stage 1
187 14:37:46.624366 uuid=11299758_1.5.2.3.5 testdef=None
188 14:37:46.624456 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 14:37:46.624600 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 14:37:46.625090 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 14:37:46.625310 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 14:37:46.625937 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 14:37:46.626168 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 14:37:46.626779 runner path: /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/1/tests/1_bootrr test_uuid 11299758_1.5.2.3.5
197 14:37:46.626928 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 14:37:46.627134 Creating lava-test-runner.conf files
200 14:37:46.627199 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/0 for stage 0
201 14:37:46.627287 - 0_dmesg
202 14:37:46.627366 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299758/lava-overlay-bm9rycqp/lava-11299758/1 for stage 1
203 14:37:46.627458 - 1_bootrr
204 14:37:46.627552 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 14:37:46.627637 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 14:37:46.634742 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 14:37:46.634845 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 14:37:46.634932 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 14:37:46.635017 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 14:37:46.635102 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 14:37:46.763052 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 14:37:46.763518 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 14:37:46.763696 extracting modules file /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299758/extract-nfsrootfs-ur1sj8s3
214 14:37:46.787426 extracting modules file /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299758/extract-overlay-ramdisk-ahwhd1ov/ramdisk
215 14:37:46.803916 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 14:37:46.804042 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 14:37:46.804134 [common] Applying overlay to NFS
218 14:37:46.804207 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299758/compress-overlay-wzwu12vw/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299758/extract-nfsrootfs-ur1sj8s3
219 14:37:46.811952 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 14:37:46.812064 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 14:37:46.812156 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 14:37:46.812242 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 14:37:46.812319 Building ramdisk /var/lib/lava/dispatcher/tmp/11299758/extract-overlay-ramdisk-ahwhd1ov/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299758/extract-overlay-ramdisk-ahwhd1ov/ramdisk
224 14:37:46.873440 >> 26198 blocks
225 14:37:47.414613 rename /var/lib/lava/dispatcher/tmp/11299758/extract-overlay-ramdisk-ahwhd1ov/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/ramdisk/ramdisk.cpio.gz
226 14:37:47.415011 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 14:37:47.415128 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 14:37:47.415231 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 14:37:47.415329 No mkimage arch provided, not using FIT.
230 14:37:47.415417 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 14:37:47.415504 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 14:37:47.415610 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 14:37:47.415698 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 14:37:47.415778 No LXC device requested
235 14:37:47.415854 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 14:37:47.415941 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 14:37:47.416023 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 14:37:47.416092 Checking files for TFTP limit of 4294967296 bytes.
239 14:37:47.416501 end: 1 tftp-deploy (duration 00:00:11) [common]
240 14:37:47.416613 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 14:37:47.416712 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 14:37:47.416861 substitutions:
243 14:37:47.416928 - {DTB}: None
244 14:37:47.416989 - {INITRD}: 11299758/tftp-deploy-7p3mufuz/ramdisk/ramdisk.cpio.gz
245 14:37:47.417048 - {KERNEL}: 11299758/tftp-deploy-7p3mufuz/kernel/bzImage
246 14:37:47.417105 - {LAVA_MAC}: None
247 14:37:47.417162 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11299758/extract-nfsrootfs-ur1sj8s3
248 14:37:47.417218 - {NFS_SERVER_IP}: 192.168.201.1
249 14:37:47.417274 - {PRESEED_CONFIG}: None
250 14:37:47.417328 - {PRESEED_LOCAL}: None
251 14:37:47.417382 - {RAMDISK}: 11299758/tftp-deploy-7p3mufuz/ramdisk/ramdisk.cpio.gz
252 14:37:47.417436 - {ROOT_PART}: None
253 14:37:47.417490 - {ROOT}: None
254 14:37:47.417544 - {SERVER_IP}: 192.168.201.1
255 14:37:47.417598 - {TEE}: None
256 14:37:47.417651 Parsed boot commands:
257 14:37:47.417703 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 14:37:47.417869 Parsed boot commands: tftpboot 192.168.201.1 11299758/tftp-deploy-7p3mufuz/kernel/bzImage 11299758/tftp-deploy-7p3mufuz/kernel/cmdline 11299758/tftp-deploy-7p3mufuz/ramdisk/ramdisk.cpio.gz
259 14:37:47.417959 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 14:37:47.418043 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 14:37:47.418132 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 14:37:47.418220 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 14:37:47.418287 Not connected, no need to disconnect.
264 14:37:47.418361 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 14:37:47.418443 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 14:37:47.418509 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-1'
267 14:37:47.421455 Setting prompt string to ['lava-test: # ']
268 14:37:47.421768 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 14:37:47.421874 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 14:37:47.421971 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 14:37:47.422062 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 14:37:47.422314 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
273 14:37:52.555649 >> Command sent successfully.
274 14:37:52.557933 Returned 0 in 5 seconds
275 14:37:52.658287 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 14:37:52.658587 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 14:37:52.658687 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 14:37:52.658774 Setting prompt string to 'Starting depthcharge on Voema...'
280 14:37:52.658845 Changing prompt to 'Starting depthcharge on Voema...'
281 14:37:52.658912 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 14:37:52.659176 [Enter `^Ec?' for help]
283 14:37:54.261886
284 14:37:54.262047
285 14:37:54.272121 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 14:37:54.275186 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 14:37:54.282169 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 14:37:54.285265 CPU: AES supported, TXT NOT supported, VT supported
289 14:37:54.292018 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 14:37:54.295156 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 14:37:54.302097 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 14:37:54.305300 VBOOT: Loading verstage.
293 14:37:54.308931 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 14:37:54.315250 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 14:37:54.318642 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 14:37:54.328769 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 14:37:54.335609 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 14:37:54.335695
299 14:37:54.335763
300 14:37:54.348947 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 14:37:54.362343 Probing TPM: . done!
302 14:37:54.366141 TPM ready after 0 ms
303 14:37:54.369070 Connected to device vid:did:rid of 1ae0:0028:00
304 14:37:54.380350 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
305 14:37:54.386864 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 14:37:54.390464 Initialized TPM device CR50 revision 0
307 14:37:54.442166 tlcl_send_startup: Startup return code is 0
308 14:37:54.442256 TPM: setup succeeded
309 14:37:54.457482 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 14:37:54.471543 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 14:37:54.484425 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 14:37:54.494510 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 14:37:54.498244 Chrome EC: UHEPI supported
314 14:37:54.502131 Phase 1
315 14:37:54.505501 FMAP: area GBB found @ 1805000 (458752 bytes)
316 14:37:54.515795 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 14:37:54.522546 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 14:37:54.529354 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 14:37:54.535713 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 14:37:54.538776 Recovery requested (1009000e)
321 14:37:54.542550 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 14:37:54.554134 tlcl_extend: response is 0
323 14:37:54.560695 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 14:37:54.570863 tlcl_extend: response is 0
325 14:37:54.577315 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 14:37:54.583645 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 14:37:54.590246 BS: verstage times (exec / console): total (unknown) / 142 ms
328 14:37:54.590332
329 14:37:54.590401
330 14:37:54.603706 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 14:37:54.610230 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 14:37:54.613708 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 14:37:54.617320 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 14:37:54.623969 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 14:37:54.627250 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 14:37:54.630275 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 14:37:54.633587 TCO_STS: 0000 0000
338 14:37:54.636992 GEN_PMCON: d0015038 00002200
339 14:37:54.640416 GBLRST_CAUSE: 00000000 00000000
340 14:37:54.640546 HPR_CAUSE0: 00000000
341 14:37:54.643496 prev_sleep_state 5
342 14:37:54.647021 Boot Count incremented to 25063
343 14:37:54.653814 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 14:37:54.660345 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 14:37:54.666857 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 14:37:54.673681 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 14:37:54.677907 Chrome EC: UHEPI supported
348 14:37:54.684915 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 14:37:54.697527 Probing TPM: done!
350 14:37:54.705138 Connected to device vid:did:rid of 1ae0:0028:00
351 14:37:54.715543 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
352 14:37:54.722240 Initialized TPM device CR50 revision 0
353 14:37:54.732531 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 14:37:54.739133 MRC: Hash idx 0x100b comparison successful.
355 14:37:54.742714 MRC cache found, size faa8
356 14:37:54.742841 bootmode is set to: 2
357 14:37:54.745855 SPD index = 0
358 14:37:54.752940 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 14:37:54.756019 SPD: module type is LPDDR4X
360 14:37:54.759678 SPD: module part number is MT53E512M64D4NW-046
361 14:37:54.766074 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 14:37:54.769538 SPD: device width 16 bits, bus width 16 bits
363 14:37:54.776010 SPD: module size is 1024 MB (per channel)
364 14:37:55.208661 CBMEM:
365 14:37:55.211738 IMD: root @ 0x76fff000 254 entries.
366 14:37:55.215305 IMD: root @ 0x76ffec00 62 entries.
367 14:37:55.218859 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 14:37:55.225393 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 14:37:55.229034 External stage cache:
370 14:37:55.232030 IMD: root @ 0x7b3ff000 254 entries.
371 14:37:55.235314 IMD: root @ 0x7b3fec00 62 entries.
372 14:37:55.250321 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 14:37:55.257079 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 14:37:55.263378 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 14:37:55.278125 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 14:37:55.282064 cse_lite: Skip switching to RW in the recovery path
377 14:37:55.285450 8 DIMMs found
378 14:37:55.285537 SMM Memory Map
379 14:37:55.288725 SMRAM : 0x7b000000 0x800000
380 14:37:55.291844 Subregion 0: 0x7b000000 0x200000
381 14:37:55.295395 Subregion 1: 0x7b200000 0x200000
382 14:37:55.298720 Subregion 2: 0x7b400000 0x400000
383 14:37:55.301865 top_of_ram = 0x77000000
384 14:37:55.308614 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 14:37:55.312154 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 14:37:55.318937 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 14:37:55.321869 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 14:37:55.331912 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 14:37:55.335232 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 14:37:55.347264 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 14:37:55.353752 Processing 211 relocs. Offset value of 0x74c0b000
392 14:37:55.360569 BS: romstage times (exec / console): total (unknown) / 277 ms
393 14:37:55.366333
394 14:37:55.366417
395 14:37:55.376557 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 14:37:55.379756 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 14:37:55.389533 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 14:37:55.396453 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 14:37:55.403092 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 14:37:55.409499 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 14:37:55.456698 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 14:37:55.463262 Processing 5008 relocs. Offset value of 0x75d98000
403 14:37:55.466886 BS: postcar times (exec / console): total (unknown) / 59 ms
404 14:37:55.466973
405 14:37:55.469963
406 14:37:55.480515 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 14:37:55.480601 Normal boot
408 14:37:55.483824 FW_CONFIG value is 0x804c02
409 14:37:55.487125 PCI: 00:07.0 disabled by fw_config
410 14:37:55.490435 PCI: 00:07.1 disabled by fw_config
411 14:37:55.493815 PCI: 00:0d.2 disabled by fw_config
412 14:37:55.497036 PCI: 00:1c.7 disabled by fw_config
413 14:37:55.503802 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 14:37:55.510720 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 14:37:55.513787 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 14:37:55.517055 GENERIC: 0.0 disabled by fw_config
417 14:37:55.520516 GENERIC: 1.0 disabled by fw_config
418 14:37:55.527182 fw_config match found: DB_USB=USB3_ACTIVE
419 14:37:55.530544 fw_config match found: DB_USB=USB3_ACTIVE
420 14:37:55.534131 fw_config match found: DB_USB=USB3_ACTIVE
421 14:37:55.537074 fw_config match found: DB_USB=USB3_ACTIVE
422 14:37:55.543703 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 14:37:55.550730 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 14:37:55.557626 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 14:37:55.567264 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 14:37:55.570477 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 14:37:55.573657 microcode: Update skipped, already up-to-date
428 14:37:55.580403 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 14:37:55.610274 Detected 4 core, 8 thread CPU.
430 14:37:55.613748 Setting up SMI for CPU
431 14:37:55.616991 IED base = 0x7b400000
432 14:37:55.617077 IED size = 0x00400000
433 14:37:55.620220 Will perform SMM setup.
434 14:37:55.626739 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 14:37:55.633404 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 14:37:55.640053 Processing 16 relocs. Offset value of 0x00030000
437 14:37:55.643610 Attempting to start 7 APs
438 14:37:55.646753 Waiting for 10ms after sending INIT.
439 14:37:55.662282 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 14:37:55.665874 AP: slot 3 apic_id 7.
441 14:37:55.669067 AP: slot 6 apic_id 6.
442 14:37:55.669152 AP: slot 7 apic_id 5.
443 14:37:55.672368 AP: slot 4 apic_id 4.
444 14:37:55.675684 AP: slot 2 apic_id 3.
445 14:37:55.675795 AP: slot 5 apic_id 2.
446 14:37:55.675884 done.
447 14:37:55.681949 Waiting for 2nd SIPI to complete...done.
448 14:37:55.688787 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 14:37:55.695441 Processing 13 relocs. Offset value of 0x00038000
450 14:37:55.695527 Unable to locate Global NVS
451 14:37:55.705664 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 14:37:55.708634 Installing permanent SMM handler to 0x7b000000
453 14:37:55.718757 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 14:37:55.721865 Processing 794 relocs. Offset value of 0x7b010000
455 14:37:55.732298 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 14:37:55.735143 Processing 13 relocs. Offset value of 0x7b008000
457 14:37:55.741863 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 14:37:55.748410 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 14:37:55.752017 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 14:37:55.758640 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 14:37:55.765334 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 14:37:55.771865 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 14:37:55.775557 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 14:37:55.778905 Unable to locate Global NVS
465 14:37:55.785439 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 14:37:55.790456 Clearing SMI status registers
467 14:37:55.793665 SMI_STS: PM1
468 14:37:55.793750 PM1_STS: PWRBTN
469 14:37:55.803373 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 14:37:55.803459 In relocation handler: CPU 0
471 14:37:55.810225 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 14:37:55.813578 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 14:37:55.816849 Relocation complete.
474 14:37:55.823436 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 14:37:55.826925 In relocation handler: CPU 1
476 14:37:55.830156 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 14:37:55.833426 Relocation complete.
478 14:37:55.840092 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
479 14:37:55.843848 In relocation handler: CPU 7
480 14:37:55.846792 New SMBASE=0x7affe400 IEDBASE=0x7b400000
481 14:37:55.850534 Relocation complete.
482 14:37:55.856638 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
483 14:37:55.860127 In relocation handler: CPU 4
484 14:37:55.863703 New SMBASE=0x7afff000 IEDBASE=0x7b400000
485 14:37:55.867018 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 14:37:55.870144 Relocation complete.
487 14:37:55.876657 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
488 14:37:55.880106 In relocation handler: CPU 2
489 14:37:55.883584 New SMBASE=0x7afff800 IEDBASE=0x7b400000
490 14:37:55.886844 Relocation complete.
491 14:37:55.893642 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
492 14:37:55.896823 In relocation handler: CPU 5
493 14:37:55.900313 New SMBASE=0x7affec00 IEDBASE=0x7b400000
494 14:37:55.906847 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 14:37:55.906932 Relocation complete.
496 14:37:55.916574 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
497 14:37:55.920167 In relocation handler: CPU 3
498 14:37:55.923071 New SMBASE=0x7afff400 IEDBASE=0x7b400000
499 14:37:55.923157 Relocation complete.
500 14:37:55.933564 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
501 14:37:55.933649 In relocation handler: CPU 6
502 14:37:55.939844 New SMBASE=0x7affe800 IEDBASE=0x7b400000
503 14:37:55.943871 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 14:37:55.947931 Relocation complete.
505 14:37:55.948016 Initializing CPU #0
506 14:37:55.950942 CPU: vendor Intel device 806c1
507 14:37:55.954635 CPU: family 06, model 8c, stepping 01
508 14:37:55.957681 Clearing out pending MCEs
509 14:37:55.960895 Setting up local APIC...
510 14:37:55.964276 apic_id: 0x00 done.
511 14:37:55.964361 Turbo is available but hidden
512 14:37:55.967923 Turbo is available and visible
513 14:37:55.974475 microcode: Update skipped, already up-to-date
514 14:37:55.974560 CPU #0 initialized
515 14:37:55.977599 Initializing CPU #2
516 14:37:55.980947 Initializing CPU #5
517 14:37:55.984247 CPU: vendor Intel device 806c1
518 14:37:55.987908 CPU: family 06, model 8c, stepping 01
519 14:37:55.991083 CPU: vendor Intel device 806c1
520 14:37:55.994457 CPU: family 06, model 8c, stepping 01
521 14:37:55.997694 Clearing out pending MCEs
522 14:37:55.997782 Clearing out pending MCEs
523 14:37:56.001586 Setting up local APIC...
524 14:37:56.004357 Initializing CPU #4
525 14:37:56.004442 Initializing CPU #7
526 14:37:56.007804 CPU: vendor Intel device 806c1
527 14:37:56.010916 CPU: family 06, model 8c, stepping 01
528 14:37:56.014428 Initializing CPU #6
529 14:37:56.017420 Initializing CPU #3
530 14:37:56.021021 CPU: vendor Intel device 806c1
531 14:37:56.024285 CPU: family 06, model 8c, stepping 01
532 14:37:56.027478 CPU: vendor Intel device 806c1
533 14:37:56.030722 CPU: family 06, model 8c, stepping 01
534 14:37:56.034257 Clearing out pending MCEs
535 14:37:56.037607 CPU: vendor Intel device 806c1
536 14:37:56.040993 CPU: family 06, model 8c, stepping 01
537 14:37:56.044457 Clearing out pending MCEs
538 14:37:56.044542 Setting up local APIC...
539 14:37:56.047570 apic_id: 0x03 done.
540 14:37:56.050863 Setting up local APIC...
541 14:37:56.050948 Clearing out pending MCEs
542 14:37:56.054376 Setting up local APIC...
543 14:37:56.060929 microcode: Update skipped, already up-to-date
544 14:37:56.061015 apic_id: 0x02 done.
545 14:37:56.064442 CPU #2 initialized
546 14:37:56.067836 microcode: Update skipped, already up-to-date
547 14:37:56.070893 apic_id: 0x04 done.
548 14:37:56.074385 Setting up local APIC...
549 14:37:56.074470 Initializing CPU #1
550 14:37:56.077407 CPU #5 initialized
551 14:37:56.080938 CPU: vendor Intel device 806c1
552 14:37:56.084248 CPU: family 06, model 8c, stepping 01
553 14:37:56.087823 Clearing out pending MCEs
554 14:37:56.087908 apic_id: 0x06 done.
555 14:37:56.090854 Setting up local APIC...
556 14:37:56.097584 microcode: Update skipped, already up-to-date
557 14:37:56.097669 apic_id: 0x05 done.
558 14:37:56.100928 Clearing out pending MCEs
559 14:37:56.104347 microcode: Update skipped, already up-to-date
560 14:37:56.107396 apic_id: 0x07 done.
561 14:37:56.110923 CPU #6 initialized
562 14:37:56.114230 microcode: Update skipped, already up-to-date
563 14:37:56.117585 Setting up local APIC...
564 14:37:56.117716 CPU #4 initialized
565 14:37:56.124618 microcode: Update skipped, already up-to-date
566 14:37:56.124744 CPU #3 initialized
567 14:37:56.127814 apic_id: 0x01 done.
568 14:37:56.127922 CPU #7 initialized
569 14:37:56.134435 microcode: Update skipped, already up-to-date
570 14:37:56.134537 CPU #1 initialized
571 14:37:56.141121 bsp_do_flight_plan done after 455 msecs.
572 14:37:56.144242 CPU: frequency set to 4000 MHz
573 14:37:56.144327 Enabling SMIs.
574 14:37:56.151024 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 14:37:56.167211 SATAXPCIE1 indicates PCIe NVMe is present
576 14:37:56.170668 Probing TPM: done!
577 14:37:56.173938 Connected to device vid:did:rid of 1ae0:0028:00
578 14:37:56.184564 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
579 14:37:56.188040 Initialized TPM device CR50 revision 0
580 14:37:56.191167 Enabling S0i3.4
581 14:37:56.197893 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 14:37:56.201388 Found a VBT of 8704 bytes after decompression
583 14:37:56.208019 cse_lite: CSE RO boot. HybridStorageMode disabled
584 14:37:56.214698 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 14:37:56.289659 FSPS returned 0
586 14:37:56.293388 Executing Phase 1 of FspMultiPhaseSiInit
587 14:37:56.303115 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 14:37:56.306461 port C0 DISC req: usage 1 usb3 1 usb2 5
589 14:37:56.309538 Raw Buffer output 0 00000511
590 14:37:56.313136 Raw Buffer output 1 00000000
591 14:37:56.316594 pmc_send_ipc_cmd succeeded
592 14:37:56.323300 port C1 DISC req: usage 1 usb3 2 usb2 3
593 14:37:56.323386 Raw Buffer output 0 00000321
594 14:37:56.326508 Raw Buffer output 1 00000000
595 14:37:56.330983 pmc_send_ipc_cmd succeeded
596 14:37:56.336108 Detected 4 core, 8 thread CPU.
597 14:37:56.339214 Detected 4 core, 8 thread CPU.
598 14:37:56.573281 Display FSP Version Info HOB
599 14:37:56.576827 Reference Code - CPU = a.0.4c.31
600 14:37:56.580172 uCode Version = 0.0.0.86
601 14:37:56.583763 TXT ACM version = ff.ff.ff.ffff
602 14:37:56.586983 Reference Code - ME = a.0.4c.31
603 14:37:56.590345 MEBx version = 0.0.0.0
604 14:37:56.593483 ME Firmware Version = Consumer SKU
605 14:37:56.597263 Reference Code - PCH = a.0.4c.31
606 14:37:56.600180 PCH-CRID Status = Disabled
607 14:37:56.603570 PCH-CRID Original Value = ff.ff.ff.ffff
608 14:37:56.607113 PCH-CRID New Value = ff.ff.ff.ffff
609 14:37:56.610385 OPROM - RST - RAID = ff.ff.ff.ffff
610 14:37:56.613403 PCH Hsio Version = 4.0.0.0
611 14:37:56.616793 Reference Code - SA - System Agent = a.0.4c.31
612 14:37:56.620053 Reference Code - MRC = 2.0.0.1
613 14:37:56.623816 SA - PCIe Version = a.0.4c.31
614 14:37:56.626857 SA-CRID Status = Disabled
615 14:37:56.630382 SA-CRID Original Value = 0.0.0.1
616 14:37:56.633722 SA-CRID New Value = 0.0.0.1
617 14:37:56.636692 OPROM - VBIOS = ff.ff.ff.ffff
618 14:37:56.640444 IO Manageability Engine FW Version = 11.1.4.0
619 14:37:56.643577 PHY Build Version = 0.0.0.e0
620 14:37:56.646952 Thunderbolt(TM) FW Version = 0.0.0.0
621 14:37:56.653603 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 14:37:56.657054 ITSS IRQ Polarities Before:
623 14:37:56.657139 IPC0: 0xffffffff
624 14:37:56.660204 IPC1: 0xffffffff
625 14:37:56.660287 IPC2: 0xffffffff
626 14:37:56.663949 IPC3: 0xffffffff
627 14:37:56.664032 ITSS IRQ Polarities After:
628 14:37:56.667019 IPC0: 0xffffffff
629 14:37:56.670821 IPC1: 0xffffffff
630 14:37:56.670904 IPC2: 0xffffffff
631 14:37:56.673799 IPC3: 0xffffffff
632 14:37:56.677026 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 14:37:56.687082 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 14:37:56.700348 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 14:37:56.713985 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 14:37:56.720383 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
637 14:37:56.720490 Enumerating buses...
638 14:37:56.726926 Show all devs... Before device enumeration.
639 14:37:56.727010 Root Device: enabled 1
640 14:37:56.730412 DOMAIN: 0000: enabled 1
641 14:37:56.733579 CPU_CLUSTER: 0: enabled 1
642 14:37:56.737195 PCI: 00:00.0: enabled 1
643 14:37:56.737279 PCI: 00:02.0: enabled 1
644 14:37:56.740390 PCI: 00:04.0: enabled 1
645 14:37:56.743560 PCI: 00:05.0: enabled 1
646 14:37:56.743644 PCI: 00:06.0: enabled 0
647 14:37:56.746924 PCI: 00:07.0: enabled 0
648 14:37:56.750470 PCI: 00:07.1: enabled 0
649 14:37:56.753769 PCI: 00:07.2: enabled 0
650 14:37:56.753852 PCI: 00:07.3: enabled 0
651 14:37:56.757396 PCI: 00:08.0: enabled 1
652 14:37:56.760475 PCI: 00:09.0: enabled 0
653 14:37:56.763662 PCI: 00:0a.0: enabled 0
654 14:37:56.763746 PCI: 00:0d.0: enabled 1
655 14:37:56.767086 PCI: 00:0d.1: enabled 0
656 14:37:56.770544 PCI: 00:0d.2: enabled 0
657 14:37:56.770627 PCI: 00:0d.3: enabled 0
658 14:37:56.773571 PCI: 00:0e.0: enabled 0
659 14:37:56.776919 PCI: 00:10.2: enabled 1
660 14:37:56.780490 PCI: 00:10.6: enabled 0
661 14:37:56.780575 PCI: 00:10.7: enabled 0
662 14:37:56.783629 PCI: 00:12.0: enabled 0
663 14:37:56.787002 PCI: 00:12.6: enabled 0
664 14:37:56.790532 PCI: 00:13.0: enabled 0
665 14:37:56.790663 PCI: 00:14.0: enabled 1
666 14:37:56.793593 PCI: 00:14.1: enabled 0
667 14:37:56.797233 PCI: 00:14.2: enabled 1
668 14:37:56.800062 PCI: 00:14.3: enabled 1
669 14:37:56.800185 PCI: 00:15.0: enabled 1
670 14:37:56.803806 PCI: 00:15.1: enabled 1
671 14:37:56.806925 PCI: 00:15.2: enabled 1
672 14:37:56.810074 PCI: 00:15.3: enabled 1
673 14:37:56.810197 PCI: 00:16.0: enabled 1
674 14:37:56.813936 PCI: 00:16.1: enabled 0
675 14:37:56.816955 PCI: 00:16.2: enabled 0
676 14:37:56.817079 PCI: 00:16.3: enabled 0
677 14:37:56.820138 PCI: 00:16.4: enabled 0
678 14:37:56.823314 PCI: 00:16.5: enabled 0
679 14:37:56.826954 PCI: 00:17.0: enabled 1
680 14:37:56.827075 PCI: 00:19.0: enabled 0
681 14:37:56.830513 PCI: 00:19.1: enabled 1
682 14:37:56.833784 PCI: 00:19.2: enabled 0
683 14:37:56.836891 PCI: 00:1c.0: enabled 1
684 14:37:56.836994 PCI: 00:1c.1: enabled 0
685 14:37:56.840190 PCI: 00:1c.2: enabled 0
686 14:37:56.843454 PCI: 00:1c.3: enabled 0
687 14:37:56.846970 PCI: 00:1c.4: enabled 0
688 14:37:56.847055 PCI: 00:1c.5: enabled 0
689 14:37:56.849972 PCI: 00:1c.6: enabled 1
690 14:37:56.853391 PCI: 00:1c.7: enabled 0
691 14:37:56.853475 PCI: 00:1d.0: enabled 1
692 14:37:56.856668 PCI: 00:1d.1: enabled 0
693 14:37:56.859984 PCI: 00:1d.2: enabled 1
694 14:37:56.863728 PCI: 00:1d.3: enabled 0
695 14:37:56.863811 PCI: 00:1e.0: enabled 1
696 14:37:56.866671 PCI: 00:1e.1: enabled 0
697 14:37:56.870194 PCI: 00:1e.2: enabled 1
698 14:37:56.873200 PCI: 00:1e.3: enabled 1
699 14:37:56.873286 PCI: 00:1f.0: enabled 1
700 14:37:56.876644 PCI: 00:1f.1: enabled 0
701 14:37:56.880286 PCI: 00:1f.2: enabled 1
702 14:37:56.883066 PCI: 00:1f.3: enabled 1
703 14:37:56.883152 PCI: 00:1f.4: enabled 0
704 14:37:56.886709 PCI: 00:1f.5: enabled 1
705 14:37:56.889812 PCI: 00:1f.6: enabled 0
706 14:37:56.893342 PCI: 00:1f.7: enabled 0
707 14:37:56.893429 APIC: 00: enabled 1
708 14:37:56.896406 GENERIC: 0.0: enabled 1
709 14:37:56.900024 GENERIC: 0.0: enabled 1
710 14:37:56.900110 GENERIC: 1.0: enabled 1
711 14:37:56.903116 GENERIC: 0.0: enabled 1
712 14:37:56.906363 GENERIC: 1.0: enabled 1
713 14:37:56.909948 USB0 port 0: enabled 1
714 14:37:56.910079 GENERIC: 0.0: enabled 1
715 14:37:56.913435 USB0 port 0: enabled 1
716 14:37:56.916347 GENERIC: 0.0: enabled 1
717 14:37:56.916474 I2C: 00:1a: enabled 1
718 14:37:56.919816 I2C: 00:31: enabled 1
719 14:37:56.923162 I2C: 00:32: enabled 1
720 14:37:56.923285 I2C: 00:10: enabled 1
721 14:37:56.926590 I2C: 00:15: enabled 1
722 14:37:56.929846 GENERIC: 0.0: enabled 0
723 14:37:56.932856 GENERIC: 1.0: enabled 0
724 14:37:56.932964 GENERIC: 0.0: enabled 1
725 14:37:56.936490 SPI: 00: enabled 1
726 14:37:56.936590 SPI: 00: enabled 1
727 14:37:56.939599 PNP: 0c09.0: enabled 1
728 14:37:56.943188 GENERIC: 0.0: enabled 1
729 14:37:56.946376 USB3 port 0: enabled 1
730 14:37:56.946462 USB3 port 1: enabled 1
731 14:37:56.949553 USB3 port 2: enabled 0
732 14:37:56.952749 USB3 port 3: enabled 0
733 14:37:56.952841 USB2 port 0: enabled 0
734 14:37:56.956514 USB2 port 1: enabled 1
735 14:37:56.959711 USB2 port 2: enabled 1
736 14:37:56.962890 USB2 port 3: enabled 0
737 14:37:56.962976 USB2 port 4: enabled 1
738 14:37:56.966299 USB2 port 5: enabled 0
739 14:37:56.969636 USB2 port 6: enabled 0
740 14:37:56.969722 USB2 port 7: enabled 0
741 14:37:56.972862 USB2 port 8: enabled 0
742 14:37:56.976432 USB2 port 9: enabled 0
743 14:37:56.979674 USB3 port 0: enabled 0
744 14:37:56.979760 USB3 port 1: enabled 1
745 14:37:56.982724 USB3 port 2: enabled 0
746 14:37:56.986180 USB3 port 3: enabled 0
747 14:37:56.986265 GENERIC: 0.0: enabled 1
748 14:37:56.989282 GENERIC: 1.0: enabled 1
749 14:37:56.992977 APIC: 01: enabled 1
750 14:37:56.993086 APIC: 03: enabled 1
751 14:37:56.996030 APIC: 07: enabled 1
752 14:37:56.999592 APIC: 04: enabled 1
753 14:37:56.999677 APIC: 02: enabled 1
754 14:37:57.002630 APIC: 06: enabled 1
755 14:37:57.002715 APIC: 05: enabled 1
756 14:37:57.006099 Compare with tree...
757 14:37:57.009556 Root Device: enabled 1
758 14:37:57.012646 DOMAIN: 0000: enabled 1
759 14:37:57.012778 PCI: 00:00.0: enabled 1
760 14:37:57.015892 PCI: 00:02.0: enabled 1
761 14:37:57.019477 PCI: 00:04.0: enabled 1
762 14:37:57.022940 GENERIC: 0.0: enabled 1
763 14:37:57.026210 PCI: 00:05.0: enabled 1
764 14:37:57.026296 PCI: 00:06.0: enabled 0
765 14:37:57.029273 PCI: 00:07.0: enabled 0
766 14:37:57.032453 GENERIC: 0.0: enabled 1
767 14:37:57.035924 PCI: 00:07.1: enabled 0
768 14:37:57.039138 GENERIC: 1.0: enabled 1
769 14:37:57.039226 PCI: 00:07.2: enabled 0
770 14:37:57.042620 GENERIC: 0.0: enabled 1
771 14:37:57.045839 PCI: 00:07.3: enabled 0
772 14:37:57.049192 GENERIC: 1.0: enabled 1
773 14:37:57.052383 PCI: 00:08.0: enabled 1
774 14:37:57.052468 PCI: 00:09.0: enabled 0
775 14:37:57.055815 PCI: 00:0a.0: enabled 0
776 14:37:57.058945 PCI: 00:0d.0: enabled 1
777 14:37:57.062393 USB0 port 0: enabled 1
778 14:37:57.065721 USB3 port 0: enabled 1
779 14:37:57.065807 USB3 port 1: enabled 1
780 14:37:57.069409 USB3 port 2: enabled 0
781 14:37:57.072533 USB3 port 3: enabled 0
782 14:37:57.075898 PCI: 00:0d.1: enabled 0
783 14:37:57.078999 PCI: 00:0d.2: enabled 0
784 14:37:57.082527 GENERIC: 0.0: enabled 1
785 14:37:57.082613 PCI: 00:0d.3: enabled 0
786 14:37:57.085613 PCI: 00:0e.0: enabled 0
787 14:37:57.089117 PCI: 00:10.2: enabled 1
788 14:37:57.092531 PCI: 00:10.6: enabled 0
789 14:37:57.095895 PCI: 00:10.7: enabled 0
790 14:37:57.095981 PCI: 00:12.0: enabled 0
791 14:37:57.098964 PCI: 00:12.6: enabled 0
792 14:37:57.102445 PCI: 00:13.0: enabled 0
793 14:37:57.105567 PCI: 00:14.0: enabled 1
794 14:37:57.105652 USB0 port 0: enabled 1
795 14:37:57.109117 USB2 port 0: enabled 0
796 14:37:57.112484 USB2 port 1: enabled 1
797 14:37:57.115689 USB2 port 2: enabled 1
798 14:37:57.119019 USB2 port 3: enabled 0
799 14:37:57.122381 USB2 port 4: enabled 1
800 14:37:57.122466 USB2 port 5: enabled 0
801 14:37:57.125686 USB2 port 6: enabled 0
802 14:37:57.129309 USB2 port 7: enabled 0
803 14:37:57.132376 USB2 port 8: enabled 0
804 14:37:57.136077 USB2 port 9: enabled 0
805 14:37:57.136161 USB3 port 0: enabled 0
806 14:37:57.139228 USB3 port 1: enabled 1
807 14:37:57.142364 USB3 port 2: enabled 0
808 14:37:57.145546 USB3 port 3: enabled 0
809 14:37:57.149164 PCI: 00:14.1: enabled 0
810 14:37:57.152356 PCI: 00:14.2: enabled 1
811 14:37:57.152441 PCI: 00:14.3: enabled 1
812 14:37:57.155557 GENERIC: 0.0: enabled 1
813 14:37:57.159176 PCI: 00:15.0: enabled 1
814 14:37:57.162227 I2C: 00:1a: enabled 1
815 14:37:57.162312 I2C: 00:31: enabled 1
816 14:37:57.165611 I2C: 00:32: enabled 1
817 14:37:57.168927 PCI: 00:15.1: enabled 1
818 14:37:57.172338 I2C: 00:10: enabled 1
819 14:37:57.175770 PCI: 00:15.2: enabled 1
820 14:37:57.175855 PCI: 00:15.3: enabled 1
821 14:37:57.178874 PCI: 00:16.0: enabled 1
822 14:37:57.182283 PCI: 00:16.1: enabled 0
823 14:37:57.186179 PCI: 00:16.2: enabled 0
824 14:37:57.186264 PCI: 00:16.3: enabled 0
825 14:37:57.190103 PCI: 00:16.4: enabled 0
826 14:37:57.193713 PCI: 00:16.5: enabled 0
827 14:37:57.193798 PCI: 00:17.0: enabled 1
828 14:37:57.197074 PCI: 00:19.0: enabled 0
829 14:37:57.200735 PCI: 00:19.1: enabled 1
830 14:37:57.203791 I2C: 00:15: enabled 1
831 14:37:57.207223 PCI: 00:19.2: enabled 0
832 14:37:57.207308 PCI: 00:1d.0: enabled 1
833 14:37:57.210789 GENERIC: 0.0: enabled 1
834 14:37:57.213693 PCI: 00:1e.0: enabled 1
835 14:37:57.217253 PCI: 00:1e.1: enabled 0
836 14:37:57.220688 PCI: 00:1e.2: enabled 1
837 14:37:57.220807 SPI: 00: enabled 1
838 14:37:57.223725 PCI: 00:1e.3: enabled 1
839 14:37:57.227263 SPI: 00: enabled 1
840 14:37:57.230323 PCI: 00:1f.0: enabled 1
841 14:37:57.230408 PNP: 0c09.0: enabled 1
842 14:37:57.282069 PCI: 00:1f.1: enabled 0
843 14:37:57.282153 PCI: 00:1f.2: enabled 1
844 14:37:57.282577 GENERIC: 0.0: enabled 1
845 14:37:57.282661 GENERIC: 0.0: enabled 1
846 14:37:57.283053 GENERIC: 1.0: enabled 1
847 14:37:57.283145 PCI: 00:1f.3: enabled 1
848 14:37:57.283212 PCI: 00:1f.4: enabled 0
849 14:37:57.283480 PCI: 00:1f.5: enabled 1
850 14:37:57.283562 PCI: 00:1f.6: enabled 0
851 14:37:57.283624 PCI: 00:1f.7: enabled 0
852 14:37:57.283683 CPU_CLUSTER: 0: enabled 1
853 14:37:57.283741 APIC: 00: enabled 1
854 14:37:57.283825 APIC: 01: enabled 1
855 14:37:57.283926 APIC: 03: enabled 1
856 14:37:57.283997 APIC: 07: enabled 1
857 14:37:57.284055 APIC: 04: enabled 1
858 14:37:57.284112 APIC: 02: enabled 1
859 14:37:57.284469 APIC: 06: enabled 1
860 14:37:57.284601 APIC: 05: enabled 1
861 14:37:57.284700 Root Device scanning...
862 14:37:57.310693 scan_static_bus for Root Device
863 14:37:57.310824 DOMAIN: 0000 enabled
864 14:37:57.311115 CPU_CLUSTER: 0 enabled
865 14:37:57.311213 DOMAIN: 0000 scanning...
866 14:37:57.311305 PCI: pci_scan_bus for bus 00
867 14:37:57.311395 PCI: 00:00.0 [8086/0000] ops
868 14:37:57.311498 PCI: 00:00.0 [8086/9a12] enabled
869 14:37:57.311588 PCI: 00:02.0 [8086/0000] bus ops
870 14:37:57.314526 PCI: 00:02.0 [8086/9a40] enabled
871 14:37:57.314611 PCI: 00:04.0 [8086/0000] bus ops
872 14:37:57.317897 PCI: 00:04.0 [8086/9a03] enabled
873 14:37:57.321073 PCI: 00:05.0 [8086/9a19] enabled
874 14:37:57.324567 PCI: 00:07.0 [0000/0000] hidden
875 14:37:57.327852 PCI: 00:08.0 [8086/9a11] enabled
876 14:37:57.331262 PCI: 00:0a.0 [8086/9a0d] disabled
877 14:37:57.334244 PCI: 00:0d.0 [8086/0000] bus ops
878 14:37:57.337711 PCI: 00:0d.0 [8086/9a13] enabled
879 14:37:57.341118 PCI: 00:14.0 [8086/0000] bus ops
880 14:37:57.344267 PCI: 00:14.0 [8086/a0ed] enabled
881 14:37:57.347903 PCI: 00:14.2 [8086/a0ef] enabled
882 14:37:57.351304 PCI: 00:14.3 [8086/0000] bus ops
883 14:37:57.354355 PCI: 00:14.3 [8086/a0f0] enabled
884 14:37:57.357505 PCI: 00:15.0 [8086/0000] bus ops
885 14:37:57.361015 PCI: 00:15.0 [8086/a0e8] enabled
886 14:37:57.364253 PCI: 00:15.1 [8086/0000] bus ops
887 14:37:57.367791 PCI: 00:15.1 [8086/a0e9] enabled
888 14:37:57.370990 PCI: 00:15.2 [8086/0000] bus ops
889 14:37:57.374331 PCI: 00:15.2 [8086/a0ea] enabled
890 14:37:57.377576 PCI: 00:15.3 [8086/0000] bus ops
891 14:37:57.380685 PCI: 00:15.3 [8086/a0eb] enabled
892 14:37:57.384032 PCI: 00:16.0 [8086/0000] ops
893 14:37:57.387436 PCI: 00:16.0 [8086/a0e0] enabled
894 14:37:57.390876 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 14:37:57.394335 PCI: 00:19.0 [8086/0000] bus ops
896 14:37:57.397556 PCI: 00:19.0 [8086/a0c5] disabled
897 14:37:57.400782 PCI: 00:19.1 [8086/0000] bus ops
898 14:37:57.404134 PCI: 00:19.1 [8086/a0c6] enabled
899 14:37:57.407494 PCI: 00:1d.0 [8086/0000] bus ops
900 14:37:57.410965 PCI: 00:1d.0 [8086/a0b0] enabled
901 14:37:57.414452 PCI: 00:1e.0 [8086/0000] ops
902 14:37:57.417537 PCI: 00:1e.0 [8086/a0a8] enabled
903 14:37:57.420915 PCI: 00:1e.2 [8086/0000] bus ops
904 14:37:57.424091 PCI: 00:1e.2 [8086/a0aa] enabled
905 14:37:57.427848 PCI: 00:1e.3 [8086/0000] bus ops
906 14:37:57.431002 PCI: 00:1e.3 [8086/a0ab] enabled
907 14:37:57.434204 PCI: 00:1f.0 [8086/0000] bus ops
908 14:37:57.437407 PCI: 00:1f.0 [8086/a087] enabled
909 14:37:57.440741 RTC Init
910 14:37:57.444267 Set power on after power failure.
911 14:37:57.444352 Disabling Deep S3
912 14:37:57.447583 Disabling Deep S3
913 14:37:57.447666 Disabling Deep S4
914 14:37:57.450590 Disabling Deep S4
915 14:37:57.450673 Disabling Deep S5
916 14:37:57.454172 Disabling Deep S5
917 14:37:57.457902 PCI: 00:1f.2 [0000/0000] hidden
918 14:37:57.460606 PCI: 00:1f.3 [8086/0000] bus ops
919 14:37:57.464301 PCI: 00:1f.3 [8086/a0c8] enabled
920 14:37:57.467649 PCI: 00:1f.5 [8086/0000] bus ops
921 14:37:57.470786 PCI: 00:1f.5 [8086/a0a4] enabled
922 14:37:57.474207 PCI: Leftover static devices:
923 14:37:57.474291 PCI: 00:10.2
924 14:37:57.477417 PCI: 00:10.6
925 14:37:57.477501 PCI: 00:10.7
926 14:37:57.480788 PCI: 00:06.0
927 14:37:57.480870 PCI: 00:07.1
928 14:37:57.480937 PCI: 00:07.2
929 14:37:57.484027 PCI: 00:07.3
930 14:37:57.484111 PCI: 00:09.0
931 14:37:57.487727 PCI: 00:0d.1
932 14:37:57.487810 PCI: 00:0d.2
933 14:37:57.487876 PCI: 00:0d.3
934 14:37:57.490924 PCI: 00:0e.0
935 14:37:57.491007 PCI: 00:12.0
936 14:37:57.494071 PCI: 00:12.6
937 14:37:57.494154 PCI: 00:13.0
938 14:37:57.494221 PCI: 00:14.1
939 14:37:57.497600 PCI: 00:16.1
940 14:37:57.497683 PCI: 00:16.2
941 14:37:57.500669 PCI: 00:16.3
942 14:37:57.500775 PCI: 00:16.4
943 14:37:57.504304 PCI: 00:16.5
944 14:37:57.504387 PCI: 00:17.0
945 14:37:57.504454 PCI: 00:19.2
946 14:37:57.507340 PCI: 00:1e.1
947 14:37:57.507438 PCI: 00:1f.1
948 14:37:57.510734 PCI: 00:1f.4
949 14:37:57.510820 PCI: 00:1f.6
950 14:37:57.510887 PCI: 00:1f.7
951 14:37:57.514138 PCI: Check your devicetree.cb.
952 14:37:57.517564 PCI: 00:02.0 scanning...
953 14:37:57.520713 scan_generic_bus for PCI: 00:02.0
954 14:37:57.524041 scan_generic_bus for PCI: 00:02.0 done
955 14:37:57.530804 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 14:37:57.534037 PCI: 00:04.0 scanning...
957 14:37:57.537237 scan_generic_bus for PCI: 00:04.0
958 14:37:57.537322 GENERIC: 0.0 enabled
959 14:37:57.543895 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 14:37:57.550618 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 14:37:57.550703 PCI: 00:0d.0 scanning...
962 14:37:57.554307 scan_static_bus for PCI: 00:0d.0
963 14:37:57.557510 USB0 port 0 enabled
964 14:37:57.560704 USB0 port 0 scanning...
965 14:37:57.564325 scan_static_bus for USB0 port 0
966 14:37:57.564407 USB3 port 0 enabled
967 14:37:57.567542 USB3 port 1 enabled
968 14:37:57.570707 USB3 port 2 disabled
969 14:37:57.570789 USB3 port 3 disabled
970 14:37:57.574315 USB3 port 0 scanning...
971 14:37:57.577418 scan_static_bus for USB3 port 0
972 14:37:57.581002 scan_static_bus for USB3 port 0 done
973 14:37:57.587716 scan_bus: bus USB3 port 0 finished in 6 msecs
974 14:37:57.587798 USB3 port 1 scanning...
975 14:37:57.590943 scan_static_bus for USB3 port 1
976 14:37:57.594054 scan_static_bus for USB3 port 1 done
977 14:37:57.601057 scan_bus: bus USB3 port 1 finished in 6 msecs
978 14:37:57.603986 scan_static_bus for USB0 port 0 done
979 14:37:57.607365 scan_bus: bus USB0 port 0 finished in 43 msecs
980 14:37:57.610671 scan_static_bus for PCI: 00:0d.0 done
981 14:37:57.617258 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 14:37:57.620664 PCI: 00:14.0 scanning...
983 14:37:57.623977 scan_static_bus for PCI: 00:14.0
984 14:37:57.624060 USB0 port 0 enabled
985 14:37:57.627333 USB0 port 0 scanning...
986 14:37:57.630863 scan_static_bus for USB0 port 0
987 14:37:57.634276 USB2 port 0 disabled
988 14:37:57.634358 USB2 port 1 enabled
989 14:37:57.637722 USB2 port 2 enabled
990 14:37:57.641077 USB2 port 3 disabled
991 14:37:57.641160 USB2 port 4 enabled
992 14:37:57.644220 USB2 port 5 disabled
993 14:37:57.644301 USB2 port 6 disabled
994 14:37:57.647872 USB2 port 7 disabled
995 14:37:57.651114 USB2 port 8 disabled
996 14:37:57.651196 USB2 port 9 disabled
997 14:37:57.654250 USB3 port 0 disabled
998 14:37:57.657772 USB3 port 1 enabled
999 14:37:57.657860 USB3 port 2 disabled
1000 14:37:57.660947 USB3 port 3 disabled
1001 14:37:57.664180 USB2 port 1 scanning...
1002 14:37:57.667832 scan_static_bus for USB2 port 1
1003 14:37:57.671220 scan_static_bus for USB2 port 1 done
1004 14:37:57.674237 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 14:37:57.677397 USB2 port 2 scanning...
1006 14:37:57.680972 scan_static_bus for USB2 port 2
1007 14:37:57.684106 scan_static_bus for USB2 port 2 done
1008 14:37:57.687664 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 14:37:57.690842 USB2 port 4 scanning...
1010 14:37:57.694087 scan_static_bus for USB2 port 4
1011 14:37:57.697398 scan_static_bus for USB2 port 4 done
1012 14:37:57.703796 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 14:37:57.707076 USB3 port 1 scanning...
1014 14:37:57.710484 scan_static_bus for USB3 port 1
1015 14:37:57.714144 scan_static_bus for USB3 port 1 done
1016 14:37:57.717210 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 14:37:57.720409 scan_static_bus for USB0 port 0 done
1018 14:37:57.727262 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 14:37:57.730419 scan_static_bus for PCI: 00:14.0 done
1020 14:37:57.733785 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 14:37:57.737149 PCI: 00:14.3 scanning...
1022 14:37:57.740554 scan_static_bus for PCI: 00:14.3
1023 14:37:57.743804 GENERIC: 0.0 enabled
1024 14:37:57.747031 scan_static_bus for PCI: 00:14.3 done
1025 14:37:57.750753 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 14:37:57.753869 PCI: 00:15.0 scanning...
1027 14:37:57.757050 scan_static_bus for PCI: 00:15.0
1028 14:37:57.760716 I2C: 00:1a enabled
1029 14:37:57.760874 I2C: 00:31 enabled
1030 14:37:57.764242 I2C: 00:32 enabled
1031 14:37:57.767744 scan_static_bus for PCI: 00:15.0 done
1032 14:37:57.771220 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 14:37:57.774974 PCI: 00:15.1 scanning...
1034 14:37:57.777998 scan_static_bus for PCI: 00:15.1
1035 14:37:57.781246 I2C: 00:10 enabled
1036 14:37:57.784367 scan_static_bus for PCI: 00:15.1 done
1037 14:37:57.788092 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 14:37:57.791376 PCI: 00:15.2 scanning...
1039 14:37:57.794740 scan_static_bus for PCI: 00:15.2
1040 14:37:57.797926 scan_static_bus for PCI: 00:15.2 done
1041 14:37:57.804580 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 14:37:57.804705 PCI: 00:15.3 scanning...
1043 14:37:57.807735 scan_static_bus for PCI: 00:15.3
1044 14:37:57.814472 scan_static_bus for PCI: 00:15.3 done
1045 14:37:57.817610 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 14:37:57.821094 PCI: 00:19.1 scanning...
1047 14:37:57.824564 scan_static_bus for PCI: 00:19.1
1048 14:37:57.824672 I2C: 00:15 enabled
1049 14:37:57.831323 scan_static_bus for PCI: 00:19.1 done
1050 14:37:57.834626 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 14:37:57.838142 PCI: 00:1d.0 scanning...
1052 14:37:57.841056 do_pci_scan_bridge for PCI: 00:1d.0
1053 14:37:57.844348 PCI: pci_scan_bus for bus 01
1054 14:37:57.848051 PCI: 01:00.0 [1c5c/174a] enabled
1055 14:37:57.848134 GENERIC: 0.0 enabled
1056 14:37:57.854464 Enabling Common Clock Configuration
1057 14:37:57.857903 L1 Sub-State supported from root port 29
1058 14:37:57.861064 L1 Sub-State Support = 0xf
1059 14:37:57.861160 CommonModeRestoreTime = 0x28
1060 14:37:57.867886 Power On Value = 0x16, Power On Scale = 0x0
1061 14:37:57.867969 ASPM: Enabled L1
1062 14:37:57.874575 PCIe: Max_Payload_Size adjusted to 128
1063 14:37:57.877938 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 14:37:57.881056 PCI: 00:1e.2 scanning...
1065 14:37:57.884588 scan_generic_bus for PCI: 00:1e.2
1066 14:37:57.884672 SPI: 00 enabled
1067 14:37:57.891306 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 14:37:57.898012 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 14:37:57.898096 PCI: 00:1e.3 scanning...
1070 14:37:57.901323 scan_generic_bus for PCI: 00:1e.3
1071 14:37:57.904459 SPI: 00 enabled
1072 14:37:57.911066 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 14:37:57.914522 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 14:37:57.917877 PCI: 00:1f.0 scanning...
1075 14:37:57.921566 scan_static_bus for PCI: 00:1f.0
1076 14:37:57.924636 PNP: 0c09.0 enabled
1077 14:37:57.924744 PNP: 0c09.0 scanning...
1078 14:37:57.927828 scan_static_bus for PNP: 0c09.0
1079 14:37:57.931543 scan_static_bus for PNP: 0c09.0 done
1080 14:37:57.937773 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 14:37:57.941674 scan_static_bus for PCI: 00:1f.0 done
1082 14:37:57.945026 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 14:37:57.948239 PCI: 00:1f.2 scanning...
1084 14:37:57.951540 scan_static_bus for PCI: 00:1f.2
1085 14:37:57.954584 GENERIC: 0.0 enabled
1086 14:37:57.957819 GENERIC: 0.0 scanning...
1087 14:37:57.961289 scan_static_bus for GENERIC: 0.0
1088 14:37:57.961374 GENERIC: 0.0 enabled
1089 14:37:57.964914 GENERIC: 1.0 enabled
1090 14:37:57.968476 scan_static_bus for GENERIC: 0.0 done
1091 14:37:57.974771 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 14:37:57.977856 scan_static_bus for PCI: 00:1f.2 done
1093 14:37:57.981636 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 14:37:57.984895 PCI: 00:1f.3 scanning...
1095 14:37:57.988010 scan_static_bus for PCI: 00:1f.3
1096 14:37:57.991291 scan_static_bus for PCI: 00:1f.3 done
1097 14:37:57.998322 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 14:37:57.998405 PCI: 00:1f.5 scanning...
1099 14:37:58.001816 scan_generic_bus for PCI: 00:1f.5
1100 14:37:58.008010 scan_generic_bus for PCI: 00:1f.5 done
1101 14:37:58.011556 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 14:37:58.014685 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 14:37:58.021338 scan_static_bus for Root Device done
1104 14:37:58.024610 scan_bus: bus Root Device finished in 736 msecs
1105 14:37:58.024692 done
1106 14:37:58.031611 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 14:37:58.034919 Chrome EC: UHEPI supported
1108 14:37:58.041600 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 14:37:58.047991 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 14:37:58.051396 SPI flash protection: WPSW=0 SRP0=0
1111 14:37:58.054646 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 14:37:58.061369 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 14:37:58.064986 found VGA at PCI: 00:02.0
1114 14:37:58.068155 Setting up VGA for PCI: 00:02.0
1115 14:37:58.071721 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 14:37:58.078172 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 14:37:58.078296 Allocating resources...
1118 14:37:58.081407 Reading resources...
1119 14:37:58.084931 Root Device read_resources bus 0 link: 0
1120 14:37:58.091622 DOMAIN: 0000 read_resources bus 0 link: 0
1121 14:37:58.094826 PCI: 00:04.0 read_resources bus 1 link: 0
1122 14:37:58.101799 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 14:37:58.104986 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 14:37:58.111347 USB0 port 0 read_resources bus 0 link: 0
1125 14:37:58.114569 USB0 port 0 read_resources bus 0 link: 0 done
1126 14:37:58.121472 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 14:37:58.125015 PCI: 00:14.0 read_resources bus 0 link: 0
1128 14:37:58.127940 USB0 port 0 read_resources bus 0 link: 0
1129 14:37:58.135647 USB0 port 0 read_resources bus 0 link: 0 done
1130 14:37:58.138733 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 14:37:58.145484 PCI: 00:14.3 read_resources bus 0 link: 0
1132 14:37:58.148993 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 14:37:58.155529 PCI: 00:15.0 read_resources bus 0 link: 0
1134 14:37:58.159105 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 14:37:58.165714 PCI: 00:15.1 read_resources bus 0 link: 0
1136 14:37:58.168735 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 14:37:58.176116 PCI: 00:19.1 read_resources bus 0 link: 0
1138 14:37:58.179468 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 14:37:58.186016 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 14:37:58.189058 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 14:37:58.195891 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 14:37:58.199392 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 14:37:58.206022 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 14:37:58.209396 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 14:37:58.216127 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 14:37:58.219138 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 14:37:58.222660 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 14:37:58.229839 GENERIC: 0.0 read_resources bus 0 link: 0
1149 14:37:58.232511 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 14:37:58.239603 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 14:37:58.246376 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 14:37:58.249193 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 14:37:58.252620 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 14:37:58.259400 Root Device read_resources bus 0 link: 0 done
1155 14:37:58.262838 Done reading resources.
1156 14:37:58.265889 Show resources in subtree (Root Device)...After reading.
1157 14:37:58.272853 Root Device child on link 0 DOMAIN: 0000
1158 14:37:58.276061 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 14:37:58.285858 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 14:37:58.296242 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 14:37:58.296326 PCI: 00:00.0
1162 14:37:58.306302 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 14:37:58.315842 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 14:37:58.325832 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 14:37:58.335753 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 14:37:58.342573 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 14:37:58.352690 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 14:37:58.362571 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 14:37:58.372714 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 14:37:58.382464 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 14:37:58.389031 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 14:37:58.398949 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 14:37:58.409303 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 14:37:58.419071 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 14:37:58.429184 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 14:37:58.435940 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 14:37:58.445676 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 14:37:58.456066 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 14:37:58.465846 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 14:37:58.475805 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 14:37:58.485896 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 14:37:58.485980 PCI: 00:02.0
1183 14:37:58.495883 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 14:37:58.505606 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 14:37:58.515505 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 14:37:58.518945 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 14:37:58.529162 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 14:37:58.532419 GENERIC: 0.0
1189 14:37:58.532527 PCI: 00:05.0
1190 14:37:58.542091 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 14:37:58.548989 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 14:37:58.549074 GENERIC: 0.0
1193 14:37:58.552211 PCI: 00:08.0
1194 14:37:58.562045 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 14:37:58.562130 PCI: 00:0a.0
1196 14:37:58.568934 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 14:37:58.578667 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 14:37:58.582131 USB0 port 0 child on link 0 USB3 port 0
1199 14:37:58.585417 USB3 port 0
1200 14:37:58.585501 USB3 port 1
1201 14:37:58.588617 USB3 port 2
1202 14:37:58.588700 USB3 port 3
1203 14:37:58.591989 PCI: 00:14.0 child on link 0 USB0 port 0
1204 14:37:58.605345 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 14:37:58.608806 USB0 port 0 child on link 0 USB2 port 0
1206 14:37:58.608894 USB2 port 0
1207 14:37:58.612024 USB2 port 1
1208 14:37:58.612107 USB2 port 2
1209 14:37:58.615835 USB2 port 3
1210 14:37:58.615936 USB2 port 4
1211 14:37:58.618817 USB2 port 5
1212 14:37:58.621886 USB2 port 6
1213 14:37:58.621969 USB2 port 7
1214 14:37:58.625453 USB2 port 8
1215 14:37:58.625536 USB2 port 9
1216 14:37:58.628538 USB3 port 0
1217 14:37:58.628620 USB3 port 1
1218 14:37:58.632192 USB3 port 2
1219 14:37:58.632274 USB3 port 3
1220 14:37:58.635171 PCI: 00:14.2
1221 14:37:58.645145 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 14:37:58.655210 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 14:37:58.658451 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 14:37:58.668840 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 14:37:58.671740 GENERIC: 0.0
1226 14:37:58.675482 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 14:37:58.685009 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 14:37:58.685093 I2C: 00:1a
1229 14:37:58.688334 I2C: 00:31
1230 14:37:58.688416 I2C: 00:32
1231 14:37:58.694957 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 14:37:58.704922 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 14:37:58.705006 I2C: 00:10
1234 14:37:58.708172 PCI: 00:15.2
1235 14:37:58.718142 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 14:37:58.718226 PCI: 00:15.3
1237 14:37:58.728365 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 14:37:58.731799 PCI: 00:16.0
1239 14:37:58.741512 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 14:37:58.741596 PCI: 00:19.0
1241 14:37:58.745145 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 14:37:58.755000 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 14:37:58.758022 I2C: 00:15
1244 14:37:58.761491 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 14:37:58.771384 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 14:37:58.781401 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 14:37:58.788338 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 14:37:58.791492 GENERIC: 0.0
1249 14:37:58.794899 PCI: 01:00.0
1250 14:37:58.805046 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 14:37:58.811694 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 14:37:58.821331 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 14:37:58.824856 PCI: 00:1e.0
1254 14:37:58.835065 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 14:37:58.838257 PCI: 00:1e.2 child on link 0 SPI: 00
1256 14:37:58.848155 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 14:37:58.851451 SPI: 00
1258 14:37:58.854908 PCI: 00:1e.3 child on link 0 SPI: 00
1259 14:37:58.864896 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 14:37:58.864981 SPI: 00
1261 14:37:58.868195 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 14:37:58.878414 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 14:37:58.881559 PNP: 0c09.0
1264 14:37:58.888083 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 14:37:58.894759 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 14:37:58.901472 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 14:37:58.911168 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 14:37:58.917974 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 14:37:58.918059 GENERIC: 0.0
1270 14:37:58.921549 GENERIC: 1.0
1271 14:37:58.921632 PCI: 00:1f.3
1272 14:37:58.931536 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 14:37:58.941360 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 14:37:58.944784 PCI: 00:1f.5
1275 14:37:58.951794 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 14:37:58.958000 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 14:37:58.958084 APIC: 00
1278 14:37:58.958151 APIC: 01
1279 14:37:58.961702 APIC: 03
1280 14:37:58.961787 APIC: 07
1281 14:37:58.964565 APIC: 04
1282 14:37:58.964648 APIC: 02
1283 14:37:58.964714 APIC: 06
1284 14:37:58.968197 APIC: 05
1285 14:37:58.975009 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 14:37:58.981667 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 14:37:58.988062 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 14:37:58.991940 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 14:37:58.998034 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 14:37:59.001307 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 14:37:59.005210 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 14:37:59.011332 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 14:37:59.021503 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 14:37:59.027816 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 14:37:59.034728 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 14:37:59.041301 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 14:37:59.048269 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 14:37:59.054542 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 14:37:59.064373 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 14:37:59.067681 DOMAIN: 0000: Resource ranges:
1301 14:37:59.071231 * Base: 1000, Size: 800, Tag: 100
1302 14:37:59.074794 * Base: 1900, Size: e700, Tag: 100
1303 14:37:59.081122 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 14:37:59.087808 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 14:37:59.094470 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 14:37:59.101100 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 14:37:59.107638 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 14:37:59.117646 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 14:37:59.124468 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 14:37:59.131029 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 14:37:59.137583 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 14:37:59.147722 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 14:37:59.154638 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 14:37:59.161159 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 14:37:59.170947 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 14:37:59.177799 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 14:37:59.184524 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 14:37:59.194666 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 14:37:59.201170 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 14:37:59.208122 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 14:37:59.215004 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 14:37:59.224533 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 14:37:59.231617 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 14:37:59.237968 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 14:37:59.247725 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 14:37:59.254484 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 14:37:59.261035 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 14:37:59.264723 DOMAIN: 0000: Resource ranges:
1329 14:37:59.271322 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 14:37:59.274442 * Base: d0000000, Size: 28000000, Tag: 200
1331 14:37:59.278198 * Base: fa000000, Size: 1000000, Tag: 200
1332 14:37:59.284634 * Base: fb001000, Size: 2fff000, Tag: 200
1333 14:37:59.287591 * Base: fe010000, Size: 2e000, Tag: 200
1334 14:37:59.291061 * Base: fe03f000, Size: d41000, Tag: 200
1335 14:37:59.294160 * Base: fed88000, Size: 8000, Tag: 200
1336 14:37:59.301081 * Base: fed93000, Size: d000, Tag: 200
1337 14:37:59.304274 * Base: feda2000, Size: 1e000, Tag: 200
1338 14:37:59.307481 * Base: fede0000, Size: 1220000, Tag: 200
1339 14:37:59.314254 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 14:37:59.321093 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 14:37:59.327459 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 14:37:59.334297 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 14:37:59.340641 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 14:37:59.347349 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 14:37:59.354274 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 14:37:59.360966 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 14:37:59.367707 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 14:37:59.373945 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 14:37:59.380909 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 14:37:59.387529 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 14:37:59.394074 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 14:37:59.400679 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 14:37:59.407390 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 14:37:59.414213 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 14:37:59.420884 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 14:37:59.427480 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 14:37:59.434103 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 14:37:59.440470 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 14:37:59.447080 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 14:37:59.453837 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 14:37:59.460177 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 14:37:59.467112 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 14:37:59.473798 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 14:37:59.476999 PCI: 00:1d.0: Resource ranges:
1365 14:37:59.480167 * Base: 7fc00000, Size: 100000, Tag: 200
1366 14:37:59.487029 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 14:37:59.493873 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 14:37:59.500218 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 14:37:59.510214 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 14:37:59.516956 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 14:37:59.520095 Root Device assign_resources, bus 0 link: 0
1372 14:37:59.526988 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 14:37:59.533670 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 14:37:59.543804 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 14:37:59.550758 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 14:37:59.560615 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 14:37:59.563938 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 14:37:59.567650 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 14:37:59.577614 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 14:37:59.584099 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 14:37:59.594366 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 14:37:59.597513 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 14:37:59.604284 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 14:37:59.610861 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 14:37:59.614007 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 14:37:59.620639 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 14:37:59.627509 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 14:37:59.637390 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 14:37:59.644110 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 14:37:59.647640 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 14:37:59.654156 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 14:37:59.660960 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 14:37:59.667754 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 14:37:59.670921 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 14:37:59.680763 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 14:37:59.684391 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 14:37:59.687782 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 14:37:59.697778 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 14:37:59.704095 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 14:37:59.714161 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 14:37:59.720964 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 14:37:59.727546 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 14:37:59.731155 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 14:37:59.741108 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 14:37:59.750855 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 14:37:59.757452 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 14:37:59.760974 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 14:37:59.771082 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 14:37:59.778067 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 14:37:59.787745 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 14:37:59.791298 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 14:37:59.801447 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 14:37:59.804681 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 14:37:59.807846 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 14:37:59.817956 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 14:37:59.821168 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 14:37:59.827782 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 14:37:59.831037 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 14:37:59.834614 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 14:37:59.841115 LPC: Trying to open IO window from 800 size 1ff
1421 14:37:59.847952 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 14:37:59.857742 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 14:37:59.864383 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 14:37:59.870945 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 14:37:59.874237 Root Device assign_resources, bus 0 link: 0
1426 14:37:59.877707 Done setting resources.
1427 14:37:59.884746 Show resources in subtree (Root Device)...After assigning values.
1428 14:37:59.887678 Root Device child on link 0 DOMAIN: 0000
1429 14:37:59.890699 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 14:37:59.900973 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 14:37:59.911317 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 14:37:59.914021 PCI: 00:00.0
1433 14:37:59.924094 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 14:37:59.930568 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 14:37:59.940862 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 14:37:59.950606 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 14:37:59.960527 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 14:37:59.970302 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 14:37:59.980498 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 14:37:59.986974 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 14:37:59.996944 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 14:38:00.007330 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 14:38:00.017031 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 14:38:00.026769 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 14:38:00.036903 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 14:38:00.043391 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 14:38:00.053575 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 14:38:00.063642 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 14:38:00.073359 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 14:38:00.083307 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 14:38:00.093451 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 14:38:00.099872 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 14:38:00.103210 PCI: 00:02.0
1454 14:38:00.113182 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 14:38:00.123439 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 14:38:00.133464 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 14:38:00.136576 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 14:38:00.150017 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 14:38:00.150138 GENERIC: 0.0
1460 14:38:00.153359 PCI: 00:05.0
1461 14:38:00.163364 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 14:38:00.166791 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 14:38:00.170317 GENERIC: 0.0
1464 14:38:00.170399 PCI: 00:08.0
1465 14:38:00.180451 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 14:38:00.183347 PCI: 00:0a.0
1467 14:38:00.186863 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 14:38:00.196550 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 14:38:00.203459 USB0 port 0 child on link 0 USB3 port 0
1470 14:38:00.203542 USB3 port 0
1471 14:38:00.206564 USB3 port 1
1472 14:38:00.206646 USB3 port 2
1473 14:38:00.209982 USB3 port 3
1474 14:38:00.213438 PCI: 00:14.0 child on link 0 USB0 port 0
1475 14:38:00.223152 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 14:38:00.226689 USB0 port 0 child on link 0 USB2 port 0
1477 14:38:00.229949 USB2 port 0
1478 14:38:00.233220 USB2 port 1
1479 14:38:00.233302 USB2 port 2
1480 14:38:00.236766 USB2 port 3
1481 14:38:00.236862 USB2 port 4
1482 14:38:00.239970 USB2 port 5
1483 14:38:00.240052 USB2 port 6
1484 14:38:00.243080 USB2 port 7
1485 14:38:00.243162 USB2 port 8
1486 14:38:00.246677 USB2 port 9
1487 14:38:00.246758 USB3 port 0
1488 14:38:00.249780 USB3 port 1
1489 14:38:00.249862 USB3 port 2
1490 14:38:00.253476 USB3 port 3
1491 14:38:00.253558 PCI: 00:14.2
1492 14:38:00.263408 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 14:38:00.276539 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 14:38:00.280007 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 14:38:00.290016 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 14:38:00.293263 GENERIC: 0.0
1497 14:38:00.296710 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 14:38:00.306708 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 14:38:00.306833 I2C: 00:1a
1500 14:38:00.309898 I2C: 00:31
1501 14:38:00.310017 I2C: 00:32
1502 14:38:00.316718 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 14:38:00.326731 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 14:38:00.326855 I2C: 00:10
1505 14:38:00.330011 PCI: 00:15.2
1506 14:38:00.340111 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 14:38:00.340235 PCI: 00:15.3
1508 14:38:00.350286 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 14:38:00.353318 PCI: 00:16.0
1510 14:38:00.363225 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 14:38:00.363309 PCI: 00:19.0
1512 14:38:00.370011 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 14:38:00.380147 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 14:38:00.380231 I2C: 00:15
1515 14:38:00.386721 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 14:38:00.393447 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 14:38:00.407034 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 14:38:00.416649 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 14:38:00.420199 GENERIC: 0.0
1520 14:38:00.420281 PCI: 01:00.0
1521 14:38:00.430260 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 14:38:00.440190 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 14:38:00.453823 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 14:38:00.453907 PCI: 00:1e.0
1525 14:38:00.463527 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 14:38:00.470421 PCI: 00:1e.2 child on link 0 SPI: 00
1527 14:38:00.479967 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 14:38:00.480051 SPI: 00
1529 14:38:00.483606 PCI: 00:1e.3 child on link 0 SPI: 00
1530 14:38:00.493701 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 14:38:00.496773 SPI: 00
1532 14:38:00.499983 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 14:38:00.510361 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 14:38:00.510445 PNP: 0c09.0
1535 14:38:00.519990 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 14:38:00.523371 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 14:38:00.533729 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 14:38:00.543586 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 14:38:00.546641 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 14:38:00.550084 GENERIC: 0.0
1541 14:38:00.550166 GENERIC: 1.0
1542 14:38:00.553571 PCI: 00:1f.3
1543 14:38:00.563420 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 14:38:00.573379 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 14:38:00.573463 PCI: 00:1f.5
1546 14:38:00.586636 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 14:38:00.589921 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 14:38:00.590003 APIC: 00
1549 14:38:00.593559 APIC: 01
1550 14:38:00.593641 APIC: 03
1551 14:38:00.593707 APIC: 07
1552 14:38:00.596750 APIC: 04
1553 14:38:00.596871 APIC: 02
1554 14:38:00.599940 APIC: 06
1555 14:38:00.600027 APIC: 05
1556 14:38:00.603154 Done allocating resources.
1557 14:38:00.610066 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 14:38:00.613133 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 14:38:00.619945 Configure GPIOs for I2S audio on UP4.
1560 14:38:00.626630 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 14:38:00.626713 Enabling resources...
1562 14:38:00.633444 PCI: 00:00.0 subsystem <- 8086/9a12
1563 14:38:00.633571 PCI: 00:00.0 cmd <- 06
1564 14:38:00.636448 PCI: 00:02.0 subsystem <- 8086/9a40
1565 14:38:00.640001 PCI: 00:02.0 cmd <- 03
1566 14:38:00.643483 PCI: 00:04.0 subsystem <- 8086/9a03
1567 14:38:00.646616 PCI: 00:04.0 cmd <- 02
1568 14:38:00.650104 PCI: 00:05.0 subsystem <- 8086/9a19
1569 14:38:00.653152 PCI: 00:05.0 cmd <- 02
1570 14:38:00.656540 PCI: 00:08.0 subsystem <- 8086/9a11
1571 14:38:00.659842 PCI: 00:08.0 cmd <- 06
1572 14:38:00.663616 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 14:38:00.666572 PCI: 00:0d.0 cmd <- 02
1574 14:38:00.670120 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 14:38:00.670244 PCI: 00:14.0 cmd <- 02
1576 14:38:00.676705 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 14:38:00.676846 PCI: 00:14.2 cmd <- 02
1578 14:38:00.680389 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 14:38:00.683499 PCI: 00:14.3 cmd <- 02
1580 14:38:00.687225 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 14:38:00.690264 PCI: 00:15.0 cmd <- 02
1582 14:38:00.693869 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 14:38:00.697196 PCI: 00:15.1 cmd <- 02
1584 14:38:00.700133 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 14:38:00.703946 PCI: 00:15.2 cmd <- 02
1586 14:38:00.707183 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 14:38:00.710548 PCI: 00:15.3 cmd <- 02
1588 14:38:00.713628 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 14:38:00.713711 PCI: 00:16.0 cmd <- 02
1590 14:38:00.720095 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 14:38:00.720204 PCI: 00:19.1 cmd <- 02
1592 14:38:00.723775 PCI: 00:1d.0 bridge ctrl <- 0013
1593 14:38:00.726839 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 14:38:00.730192 PCI: 00:1d.0 cmd <- 06
1595 14:38:00.733570 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 14:38:00.736763 PCI: 00:1e.0 cmd <- 06
1597 14:38:00.740133 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 14:38:00.743787 PCI: 00:1e.2 cmd <- 06
1599 14:38:00.746881 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 14:38:00.750528 PCI: 00:1e.3 cmd <- 02
1601 14:38:00.753515 PCI: 00:1f.0 subsystem <- 8086/a087
1602 14:38:00.757090 PCI: 00:1f.0 cmd <- 407
1603 14:38:00.760723 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 14:38:00.760844 PCI: 00:1f.3 cmd <- 02
1605 14:38:00.767011 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 14:38:00.767095 PCI: 00:1f.5 cmd <- 406
1607 14:38:00.772375 PCI: 01:00.0 cmd <- 02
1608 14:38:00.776792 done.
1609 14:38:00.780527 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 14:38:00.783473 Initializing devices...
1611 14:38:00.787195 Root Device init
1612 14:38:00.790286 Chrome EC: Set SMI mask to 0x0000000000000000
1613 14:38:00.797157 Chrome EC: clear events_b mask to 0x0000000000000000
1614 14:38:00.803916 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 14:38:00.810658 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 14:38:00.817506 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 14:38:00.820699 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 14:38:00.828728 fw_config match found: DB_USB=USB3_ACTIVE
1619 14:38:00.831815 Configure Right Type-C port orientation for retimer
1620 14:38:00.835171 Root Device init finished in 46 msecs
1621 14:38:00.839659 PCI: 00:00.0 init
1622 14:38:00.842769 CPU TDP = 9 Watts
1623 14:38:00.842850 CPU PL1 = 9 Watts
1624 14:38:00.846378 CPU PL2 = 40 Watts
1625 14:38:00.849726 CPU PL4 = 83 Watts
1626 14:38:00.852703 PCI: 00:00.0 init finished in 8 msecs
1627 14:38:00.852835 PCI: 00:02.0 init
1628 14:38:00.855886 GMA: Found VBT in CBFS
1629 14:38:00.859416 GMA: Found valid VBT in CBFS
1630 14:38:00.866031 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 14:38:00.872682 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 14:38:00.875805 PCI: 00:02.0 init finished in 18 msecs
1633 14:38:00.879495 PCI: 00:05.0 init
1634 14:38:00.882697 PCI: 00:05.0 init finished in 0 msecs
1635 14:38:00.885852 PCI: 00:08.0 init
1636 14:38:00.889435 PCI: 00:08.0 init finished in 0 msecs
1637 14:38:00.892605 PCI: 00:14.0 init
1638 14:38:00.896377 PCI: 00:14.0 init finished in 0 msecs
1639 14:38:00.899083 PCI: 00:14.2 init
1640 14:38:00.902864 PCI: 00:14.2 init finished in 0 msecs
1641 14:38:00.906145 PCI: 00:15.0 init
1642 14:38:00.906230 I2C bus 0 version 0x3230302a
1643 14:38:00.912464 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 14:38:00.916044 PCI: 00:15.0 init finished in 6 msecs
1645 14:38:00.916127 PCI: 00:15.1 init
1646 14:38:00.919566 I2C bus 1 version 0x3230302a
1647 14:38:00.922829 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 14:38:00.925841 PCI: 00:15.1 init finished in 6 msecs
1649 14:38:00.929213 PCI: 00:15.2 init
1650 14:38:00.932557 I2C bus 2 version 0x3230302a
1651 14:38:00.935884 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 14:38:00.939542 PCI: 00:15.2 init finished in 6 msecs
1653 14:38:00.942775 PCI: 00:15.3 init
1654 14:38:00.946080 I2C bus 3 version 0x3230302a
1655 14:38:00.949797 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 14:38:00.952615 PCI: 00:15.3 init finished in 6 msecs
1657 14:38:00.956053 PCI: 00:16.0 init
1658 14:38:00.959356 PCI: 00:16.0 init finished in 0 msecs
1659 14:38:00.962620 PCI: 00:19.1 init
1660 14:38:00.962703 I2C bus 5 version 0x3230302a
1661 14:38:00.969284 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 14:38:00.972718 PCI: 00:19.1 init finished in 6 msecs
1663 14:38:00.972821 PCI: 00:1d.0 init
1664 14:38:00.975891 Initializing PCH PCIe bridge.
1665 14:38:00.979249 PCI: 00:1d.0 init finished in 3 msecs
1666 14:38:00.983639 PCI: 00:1f.0 init
1667 14:38:00.986814 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 14:38:00.993619 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 14:38:00.993701 IOAPIC: ID = 0x02
1670 14:38:00.996610 IOAPIC: Dumping registers
1671 14:38:00.999959 reg 0x0000: 0x02000000
1672 14:38:01.003424 reg 0x0001: 0x00770020
1673 14:38:01.003510 reg 0x0002: 0x00000000
1674 14:38:01.010185 PCI: 00:1f.0 init finished in 21 msecs
1675 14:38:01.010268 PCI: 00:1f.2 init
1676 14:38:01.013939 Disabling ACPI via APMC.
1677 14:38:01.017006 APMC done.
1678 14:38:01.020184 PCI: 00:1f.2 init finished in 5 msecs
1679 14:38:01.031711 PCI: 01:00.0 init
1680 14:38:01.035215 PCI: 01:00.0 init finished in 0 msecs
1681 14:38:01.038277 PNP: 0c09.0 init
1682 14:38:01.041931 Google Chrome EC uptime: 8.424 seconds
1683 14:38:01.048430 Google Chrome AP resets since EC boot: 1
1684 14:38:01.051780 Google Chrome most recent AP reset causes:
1685 14:38:01.054898 0.349: 32775 shutdown: entering G3
1686 14:38:01.061732 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 14:38:01.065109 PNP: 0c09.0 init finished in 22 msecs
1688 14:38:01.070570 Devices initialized
1689 14:38:01.073997 Show all devs... After init.
1690 14:38:01.077303 Root Device: enabled 1
1691 14:38:01.077424 DOMAIN: 0000: enabled 1
1692 14:38:01.080597 CPU_CLUSTER: 0: enabled 1
1693 14:38:01.084189 PCI: 00:00.0: enabled 1
1694 14:38:01.087404 PCI: 00:02.0: enabled 1
1695 14:38:01.087524 PCI: 00:04.0: enabled 1
1696 14:38:01.090658 PCI: 00:05.0: enabled 1
1697 14:38:01.093819 PCI: 00:06.0: enabled 0
1698 14:38:01.097555 PCI: 00:07.0: enabled 0
1699 14:38:01.097679 PCI: 00:07.1: enabled 0
1700 14:38:01.100308 PCI: 00:07.2: enabled 0
1701 14:38:01.103795 PCI: 00:07.3: enabled 0
1702 14:38:01.107177 PCI: 00:08.0: enabled 1
1703 14:38:01.107301 PCI: 00:09.0: enabled 0
1704 14:38:01.110650 PCI: 00:0a.0: enabled 0
1705 14:38:01.113833 PCI: 00:0d.0: enabled 1
1706 14:38:01.117329 PCI: 00:0d.1: enabled 0
1707 14:38:01.117451 PCI: 00:0d.2: enabled 0
1708 14:38:01.120468 PCI: 00:0d.3: enabled 0
1709 14:38:01.123947 PCI: 00:0e.0: enabled 0
1710 14:38:01.124072 PCI: 00:10.2: enabled 1
1711 14:38:01.127197 PCI: 00:10.6: enabled 0
1712 14:38:01.130688 PCI: 00:10.7: enabled 0
1713 14:38:01.134254 PCI: 00:12.0: enabled 0
1714 14:38:01.134336 PCI: 00:12.6: enabled 0
1715 14:38:01.137255 PCI: 00:13.0: enabled 0
1716 14:38:01.140548 PCI: 00:14.0: enabled 1
1717 14:38:01.144083 PCI: 00:14.1: enabled 0
1718 14:38:01.144166 PCI: 00:14.2: enabled 1
1719 14:38:01.147413 PCI: 00:14.3: enabled 1
1720 14:38:01.150587 PCI: 00:15.0: enabled 1
1721 14:38:01.153844 PCI: 00:15.1: enabled 1
1722 14:38:01.153927 PCI: 00:15.2: enabled 1
1723 14:38:01.157195 PCI: 00:15.3: enabled 1
1724 14:38:01.160398 PCI: 00:16.0: enabled 1
1725 14:38:01.160506 PCI: 00:16.1: enabled 0
1726 14:38:01.163840 PCI: 00:16.2: enabled 0
1727 14:38:01.167234 PCI: 00:16.3: enabled 0
1728 14:38:01.170377 PCI: 00:16.4: enabled 0
1729 14:38:01.170461 PCI: 00:16.5: enabled 0
1730 14:38:01.173832 PCI: 00:17.0: enabled 0
1731 14:38:01.177192 PCI: 00:19.0: enabled 0
1732 14:38:01.180410 PCI: 00:19.1: enabled 1
1733 14:38:01.180493 PCI: 00:19.2: enabled 0
1734 14:38:01.184045 PCI: 00:1c.0: enabled 1
1735 14:38:01.187273 PCI: 00:1c.1: enabled 0
1736 14:38:01.190430 PCI: 00:1c.2: enabled 0
1737 14:38:01.190514 PCI: 00:1c.3: enabled 0
1738 14:38:01.193530 PCI: 00:1c.4: enabled 0
1739 14:38:01.197078 PCI: 00:1c.5: enabled 0
1740 14:38:01.197161 PCI: 00:1c.6: enabled 1
1741 14:38:01.200258 PCI: 00:1c.7: enabled 0
1742 14:38:01.203556 PCI: 00:1d.0: enabled 1
1743 14:38:01.207085 PCI: 00:1d.1: enabled 0
1744 14:38:01.207168 PCI: 00:1d.2: enabled 1
1745 14:38:01.210077 PCI: 00:1d.3: enabled 0
1746 14:38:01.213553 PCI: 00:1e.0: enabled 1
1747 14:38:01.216691 PCI: 00:1e.1: enabled 0
1748 14:38:01.216818 PCI: 00:1e.2: enabled 1
1749 14:38:01.220286 PCI: 00:1e.3: enabled 1
1750 14:38:01.223670 PCI: 00:1f.0: enabled 1
1751 14:38:01.226866 PCI: 00:1f.1: enabled 0
1752 14:38:01.226950 PCI: 00:1f.2: enabled 1
1753 14:38:01.230628 PCI: 00:1f.3: enabled 1
1754 14:38:01.233657 PCI: 00:1f.4: enabled 0
1755 14:38:01.236721 PCI: 00:1f.5: enabled 1
1756 14:38:01.236838 PCI: 00:1f.6: enabled 0
1757 14:38:01.240223 PCI: 00:1f.7: enabled 0
1758 14:38:01.243374 APIC: 00: enabled 1
1759 14:38:01.243458 GENERIC: 0.0: enabled 1
1760 14:38:01.246689 GENERIC: 0.0: enabled 1
1761 14:38:01.250420 GENERIC: 1.0: enabled 1
1762 14:38:01.253333 GENERIC: 0.0: enabled 1
1763 14:38:01.253416 GENERIC: 1.0: enabled 1
1764 14:38:01.256936 USB0 port 0: enabled 1
1765 14:38:01.260234 GENERIC: 0.0: enabled 1
1766 14:38:01.260317 USB0 port 0: enabled 1
1767 14:38:01.263545 GENERIC: 0.0: enabled 1
1768 14:38:01.266739 I2C: 00:1a: enabled 1
1769 14:38:01.269953 I2C: 00:31: enabled 1
1770 14:38:01.270036 I2C: 00:32: enabled 1
1771 14:38:01.273216 I2C: 00:10: enabled 1
1772 14:38:01.276613 I2C: 00:15: enabled 1
1773 14:38:01.276696 GENERIC: 0.0: enabled 0
1774 14:38:01.280249 GENERIC: 1.0: enabled 0
1775 14:38:01.283337 GENERIC: 0.0: enabled 1
1776 14:38:01.283420 SPI: 00: enabled 1
1777 14:38:01.286965 SPI: 00: enabled 1
1778 14:38:01.289956 PNP: 0c09.0: enabled 1
1779 14:38:01.290039 GENERIC: 0.0: enabled 1
1780 14:38:01.293780 USB3 port 0: enabled 1
1781 14:38:01.296680 USB3 port 1: enabled 1
1782 14:38:01.296810 USB3 port 2: enabled 0
1783 14:38:01.299940 USB3 port 3: enabled 0
1784 14:38:01.303702 USB2 port 0: enabled 0
1785 14:38:01.306888 USB2 port 1: enabled 1
1786 14:38:01.306971 USB2 port 2: enabled 1
1787 14:38:01.310278 USB2 port 3: enabled 0
1788 14:38:01.313416 USB2 port 4: enabled 1
1789 14:38:01.313500 USB2 port 5: enabled 0
1790 14:38:01.316711 USB2 port 6: enabled 0
1791 14:38:01.320338 USB2 port 7: enabled 0
1792 14:38:01.320422 USB2 port 8: enabled 0
1793 14:38:01.323342 USB2 port 9: enabled 0
1794 14:38:01.326940 USB3 port 0: enabled 0
1795 14:38:01.330160 USB3 port 1: enabled 1
1796 14:38:01.330275 USB3 port 2: enabled 0
1797 14:38:01.333333 USB3 port 3: enabled 0
1798 14:38:01.337056 GENERIC: 0.0: enabled 1
1799 14:38:01.337140 GENERIC: 1.0: enabled 1
1800 14:38:01.340246 APIC: 01: enabled 1
1801 14:38:01.343756 APIC: 03: enabled 1
1802 14:38:01.343840 APIC: 07: enabled 1
1803 14:38:01.346734 APIC: 04: enabled 1
1804 14:38:01.346818 APIC: 02: enabled 1
1805 14:38:01.350315 APIC: 06: enabled 1
1806 14:38:01.353354 APIC: 05: enabled 1
1807 14:38:01.353437 PCI: 01:00.0: enabled 1
1808 14:38:01.360149 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1809 14:38:01.367023 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 14:38:01.370105 ELOG: NV offset 0xf30000 size 0x1000
1811 14:38:01.376646 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 14:38:01.383380 ELOG: Event(17) added with size 13 at 2023-08-16 14:37:55 UTC
1813 14:38:01.389952 ELOG: Event(92) added with size 9 at 2023-08-16 14:37:55 UTC
1814 14:38:01.396565 ELOG: Event(93) added with size 9 at 2023-08-16 14:37:55 UTC
1815 14:38:01.403381 ELOG: Event(9E) added with size 10 at 2023-08-16 14:37:55 UTC
1816 14:38:01.410205 ELOG: Event(9F) added with size 14 at 2023-08-16 14:37:55 UTC
1817 14:38:01.413330 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1818 14:38:01.419983 ELOG: Event(A1) added with size 10 at 2023-08-16 14:37:55 UTC
1819 14:38:01.426907 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1820 14:38:01.433392 ELOG: Event(A0) added with size 9 at 2023-08-16 14:37:55 UTC
1821 14:38:01.440238 elog_add_boot_reason: Logged dev mode boot
1822 14:38:01.443537 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1823 14:38:01.447037 Finalize devices...
1824 14:38:01.450256 Devices finalized
1825 14:38:01.453534 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1826 14:38:01.460281 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1827 14:38:01.463545 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1828 14:38:01.470316 ME: HFSTS1 : 0x80030055
1829 14:38:01.473978 ME: HFSTS2 : 0x30280116
1830 14:38:01.480033 ME: HFSTS3 : 0x00000050
1831 14:38:01.483562 ME: HFSTS4 : 0x00004000
1832 14:38:01.486878 ME: HFSTS5 : 0x00000000
1833 14:38:01.493482 ME: HFSTS6 : 0x00400006
1834 14:38:01.497072 ME: Manufacturing Mode : YES
1835 14:38:01.500285 ME: SPI Protection Mode Enabled : NO
1836 14:38:01.503423 ME: FW Partition Table : OK
1837 14:38:01.507139 ME: Bringup Loader Failure : NO
1838 14:38:01.510257 ME: Firmware Init Complete : NO
1839 14:38:01.513694 ME: Boot Options Present : NO
1840 14:38:01.516922 ME: Update In Progress : NO
1841 14:38:01.523497 ME: D0i3 Support : YES
1842 14:38:01.527085 ME: Low Power State Enabled : NO
1843 14:38:01.530212 ME: CPU Replaced : YES
1844 14:38:01.533302 ME: CPU Replacement Valid : YES
1845 14:38:01.536693 ME: Current Working State : 5
1846 14:38:01.539821 ME: Current Operation State : 1
1847 14:38:01.543487 ME: Current Operation Mode : 3
1848 14:38:01.546644 ME: Error Code : 0
1849 14:38:01.550212 ME: Enhanced Debug Mode : NO
1850 14:38:01.556684 ME: CPU Debug Disabled : YES
1851 14:38:01.560179 ME: TXT Support : NO
1852 14:38:01.566618 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1853 14:38:01.573515 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1854 14:38:01.576718 CBFS: 'fallback/slic' not found.
1855 14:38:01.580301 ACPI: Writing ACPI tables at 76b01000.
1856 14:38:01.580386 ACPI: * FACS
1857 14:38:01.583440 ACPI: * DSDT
1858 14:38:01.586710 Ramoops buffer: 0x100000@0x76a00000.
1859 14:38:01.593303 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1860 14:38:01.597056 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1861 14:38:01.599890 Google Chrome EC: version:
1862 14:38:01.603299 ro: voema_v2.0.7540-147f8d37d1
1863 14:38:01.606791 rw: voema_v2.0.7540-147f8d37d1
1864 14:38:01.609968 running image: 2
1865 14:38:01.616801 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1866 14:38:01.619766 ACPI: * FADT
1867 14:38:01.619849 SCI is IRQ9
1868 14:38:01.623393 ACPI: added table 1/32, length now 40
1869 14:38:01.626367 ACPI: * SSDT
1870 14:38:01.629821 Found 1 CPU(s) with 8 core(s) each.
1871 14:38:01.633241 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1872 14:38:01.639875 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1873 14:38:01.643551 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1874 14:38:01.646607 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1875 14:38:01.653333 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1876 14:38:01.656532 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1877 14:38:01.663376 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1878 14:38:01.666708 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1879 14:38:01.676558 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1880 14:38:01.680016 \_SB.PCI0.RP09: Added StorageD3Enable property
1881 14:38:01.683631 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1882 14:38:01.689935 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1883 14:38:01.693509 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1884 14:38:01.696532 PS2K: Passing 80 keymaps to kernel
1885 14:38:01.703265 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1886 14:38:01.710221 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1887 14:38:01.716604 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1888 14:38:01.723174 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1889 14:38:01.729645 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1890 14:38:01.736533 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1891 14:38:01.743121 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1892 14:38:01.749627 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1893 14:38:01.753018 ACPI: added table 2/32, length now 44
1894 14:38:01.756507 ACPI: * MCFG
1895 14:38:01.759663 ACPI: added table 3/32, length now 48
1896 14:38:01.759746 ACPI: * TPM2
1897 14:38:01.762909 TPM2 log created at 0x769f0000
1898 14:38:01.769793 ACPI: added table 4/32, length now 52
1899 14:38:01.769876 ACPI: * MADT
1900 14:38:01.769944 SCI is IRQ9
1901 14:38:01.776339 ACPI: added table 5/32, length now 56
1902 14:38:01.776422 current = 76b09850
1903 14:38:01.779582 ACPI: * DMAR
1904 14:38:01.782808 ACPI: added table 6/32, length now 60
1905 14:38:01.786401 ACPI: added table 7/32, length now 64
1906 14:38:01.789500 ACPI: * HPET
1907 14:38:01.793051 ACPI: added table 8/32, length now 68
1908 14:38:01.793134 ACPI: done.
1909 14:38:01.796473 ACPI tables: 35216 bytes.
1910 14:38:01.799510 smbios_write_tables: 769ef000
1911 14:38:01.802903 EC returned error result code 3
1912 14:38:01.806621 Couldn't obtain OEM name from CBI
1913 14:38:01.809701 Create SMBIOS type 16
1914 14:38:01.809791 Create SMBIOS type 17
1915 14:38:01.812957 GENERIC: 0.0 (WIFI Device)
1916 14:38:01.816502 SMBIOS tables: 1750 bytes.
1917 14:38:01.819605 Writing table forward entry at 0x00000500
1918 14:38:01.826383 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1919 14:38:01.829374 Writing coreboot table at 0x76b25000
1920 14:38:01.836410 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1921 14:38:01.839399 1. 0000000000001000-000000000009ffff: RAM
1922 14:38:01.846262 2. 00000000000a0000-00000000000fffff: RESERVED
1923 14:38:01.849698 3. 0000000000100000-00000000769eefff: RAM
1924 14:38:01.855955 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1925 14:38:01.859229 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1926 14:38:01.865783 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1927 14:38:01.872436 7. 0000000077000000-000000007fbfffff: RESERVED
1928 14:38:01.875738 8. 00000000c0000000-00000000cfffffff: RESERVED
1929 14:38:01.879207 9. 00000000f8000000-00000000f9ffffff: RESERVED
1930 14:38:01.885645 10. 00000000fb000000-00000000fb000fff: RESERVED
1931 14:38:01.889237 11. 00000000fe000000-00000000fe00ffff: RESERVED
1932 14:38:01.895461 12. 00000000fed80000-00000000fed87fff: RESERVED
1933 14:38:01.899046 13. 00000000fed90000-00000000fed92fff: RESERVED
1934 14:38:01.905699 14. 00000000feda0000-00000000feda1fff: RESERVED
1935 14:38:01.909080 15. 00000000fedc0000-00000000feddffff: RESERVED
1936 14:38:01.912428 16. 0000000100000000-00000002803fffff: RAM
1937 14:38:01.915746 Passing 4 GPIOs to payload:
1938 14:38:01.922758 NAME | PORT | POLARITY | VALUE
1939 14:38:01.925916 lid | undefined | high | high
1940 14:38:01.932686 power | undefined | high | low
1941 14:38:01.939352 oprom | undefined | high | low
1942 14:38:01.942471 EC in RW | 0x000000e5 | high | high
1943 14:38:01.949033 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 9fc6
1944 14:38:01.952671 coreboot table: 1576 bytes.
1945 14:38:01.955822 IMD ROOT 0. 0x76fff000 0x00001000
1946 14:38:01.959258 IMD SMALL 1. 0x76ffe000 0x00001000
1947 14:38:01.962493 FSP MEMORY 2. 0x76c4e000 0x003b0000
1948 14:38:01.965938 VPD 3. 0x76c4d000 0x00000367
1949 14:38:01.972361 RO MCACHE 4. 0x76c4c000 0x00000fdc
1950 14:38:01.975831 CONSOLE 5. 0x76c2c000 0x00020000
1951 14:38:01.979051 FMAP 6. 0x76c2b000 0x00000578
1952 14:38:01.982712 TIME STAMP 7. 0x76c2a000 0x00000910
1953 14:38:01.985839 VBOOT WORK 8. 0x76c16000 0x00014000
1954 14:38:01.989342 ROMSTG STCK 9. 0x76c15000 0x00001000
1955 14:38:01.992628 AFTER CAR 10. 0x76c0a000 0x0000b000
1956 14:38:01.995783 RAMSTAGE 11. 0x76b97000 0x00073000
1957 14:38:01.999205 REFCODE 12. 0x76b42000 0x00055000
1958 14:38:02.005837 SMM BACKUP 13. 0x76b32000 0x00010000
1959 14:38:02.009213 4f444749 14. 0x76b30000 0x00002000
1960 14:38:02.012574 EXT VBT15. 0x76b2d000 0x0000219f
1961 14:38:02.015863 COREBOOT 16. 0x76b25000 0x00008000
1962 14:38:02.019319 ACPI 17. 0x76b01000 0x00024000
1963 14:38:02.022609 ACPI GNVS 18. 0x76b00000 0x00001000
1964 14:38:02.025743 RAMOOPS 19. 0x76a00000 0x00100000
1965 14:38:02.029221 TPM2 TCGLOG20. 0x769f0000 0x00010000
1966 14:38:02.032395 SMBIOS 21. 0x769ef000 0x00000800
1967 14:38:02.036082 IMD small region:
1968 14:38:02.039115 IMD ROOT 0. 0x76ffec00 0x00000400
1969 14:38:02.042331 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1970 14:38:02.046015 POWER STATE 2. 0x76ffeb80 0x00000044
1971 14:38:02.052734 ROMSTAGE 3. 0x76ffeb60 0x00000004
1972 14:38:02.055892 MEM INFO 4. 0x76ffe980 0x000001e0
1973 14:38:02.062423 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1974 14:38:02.062505 MTRR: Physical address space:
1975 14:38:02.068934 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1976 14:38:02.076010 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1977 14:38:02.082345 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1978 14:38:02.089120 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1979 14:38:02.095627 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1980 14:38:02.102485 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1981 14:38:02.108911 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1982 14:38:02.112376 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 14:38:02.115716 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 14:38:02.119084 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 14:38:02.125631 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 14:38:02.128867 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 14:38:02.132617 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 14:38:02.135776 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 14:38:02.139297 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 14:38:02.145500 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 14:38:02.149157 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 14:38:02.152467 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 14:38:02.155960 call enable_fixed_mtrr()
1994 14:38:02.159502 CPU physical address size: 39 bits
1995 14:38:02.166068 MTRR: default type WB/UC MTRR counts: 6/6.
1996 14:38:02.169439 MTRR: UC selected as default type.
1997 14:38:02.176431 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1998 14:38:02.179420 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1999 14:38:02.186025 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2000 14:38:02.192776 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2001 14:38:02.199416 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2002 14:38:02.206337 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2003 14:38:02.206418
2004 14:38:02.209633 MTRR check
2005 14:38:02.209713 Fixed MTRRs : Enabled
2006 14:38:02.212741 Variable MTRRs: Enabled
2007 14:38:02.212861
2008 14:38:02.215956 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 14:38:02.223158 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 14:38:02.226200 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 14:38:02.229319 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 14:38:02.232625 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 14:38:02.239683 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 14:38:02.242796 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 14:38:02.246268 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 14:38:02.249496 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 14:38:02.252918 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 14:38:02.259512 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 14:38:02.266064 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2020 14:38:02.269753 call enable_fixed_mtrr()
2021 14:38:02.274125 Checking cr50 for pending updates
2022 14:38:02.274208 CPU physical address size: 39 bits
2023 14:38:02.277718 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 14:38:02.284409 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 14:38:02.287410 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 14:38:02.290764 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 14:38:02.294337 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 14:38:02.301051 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 14:38:02.304611 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 14:38:02.307729 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 14:38:02.311380 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 14:38:02.314214 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 14:38:02.320788 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 14:38:02.324299 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 14:38:02.330898 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 14:38:02.331001 call enable_fixed_mtrr()
2037 14:38:02.334279 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 14:38:02.340798 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 14:38:02.344288 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 14:38:02.347616 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 14:38:02.350911 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 14:38:02.357728 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 14:38:02.360933 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 14:38:02.364376 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 14:38:02.367481 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 14:38:02.371856 CPU physical address size: 39 bits
2047 14:38:02.378239 call enable_fixed_mtrr()
2048 14:38:02.381778 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 14:38:02.384966 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 14:38:02.388174 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 14:38:02.391457 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 14:38:02.398371 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 14:38:02.401989 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 14:38:02.405173 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 14:38:02.408332 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 14:38:02.414881 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 14:38:02.418434 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 14:38:02.421844 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 14:38:02.425002 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 14:38:02.432419 MTRR: Fixed MSR 0x258 0x0606060606060606
2061 14:38:02.432503 call enable_fixed_mtrr()
2062 14:38:02.438808 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 14:38:02.442534 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 14:38:02.445730 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 14:38:02.448933 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 14:38:02.455711 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 14:38:02.459039 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 14:38:02.462588 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 14:38:02.465815 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 14:38:02.472169 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 14:38:02.475588 CPU physical address size: 39 bits
2072 14:38:02.478700 call enable_fixed_mtrr()
2073 14:38:02.483409 Reading cr50 TPM mode
2074 14:38:02.483491 CPU physical address size: 39 bits
2075 14:38:02.486978 CPU physical address size: 39 bits
2076 14:38:02.493244 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2077 14:38:02.496953 MTRR: Fixed MSR 0x250 0x0606060606060606
2078 14:38:02.503305 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 14:38:02.506612 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 14:38:02.509943 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 14:38:02.513290 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 14:38:02.519992 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 14:38:02.523361 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 14:38:02.526992 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 14:38:02.529891 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 14:38:02.536743 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 14:38:02.540072 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 14:38:02.543206 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 14:38:02.549857 MTRR: Fixed MSR 0x258 0x0606060606060606
2090 14:38:02.553426 MTRR: Fixed MSR 0x259 0x0000000000000000
2091 14:38:02.556775 MTRR: Fixed MSR 0x268 0x0606060606060606
2092 14:38:02.559875 MTRR: Fixed MSR 0x269 0x0606060606060606
2093 14:38:02.563344 MTRR: Fixed MSR 0x26a 0x0606060606060606
2094 14:38:02.570205 MTRR: Fixed MSR 0x26b 0x0606060606060606
2095 14:38:02.573285 MTRR: Fixed MSR 0x26c 0x0606060606060606
2096 14:38:02.576636 MTRR: Fixed MSR 0x26d 0x0606060606060606
2097 14:38:02.579894 MTRR: Fixed MSR 0x26e 0x0606060606060606
2098 14:38:02.586510 MTRR: Fixed MSR 0x26f 0x0606060606060606
2099 14:38:02.590092 call enable_fixed_mtrr()
2100 14:38:02.590174 call enable_fixed_mtrr()
2101 14:38:02.600183 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 14:38:02.603561 CPU physical address size: 39 bits
2103 14:38:02.606758 CPU physical address size: 39 bits
2104 14:38:02.609937 Checking segment from ROM address 0xffc02b38
2105 14:38:02.616611 Checking segment from ROM address 0xffc02b54
2106 14:38:02.620205 Loading segment from ROM address 0xffc02b38
2107 14:38:02.623242 code (compression=0)
2108 14:38:02.630076 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2109 14:38:02.639929 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2110 14:38:02.643453 it's not compressed!
2111 14:38:02.781200 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2112 14:38:02.787695 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2113 14:38:02.794268 Loading segment from ROM address 0xffc02b54
2114 14:38:02.794394 Entry Point 0x30000000
2115 14:38:02.797682 Loaded segments
2116 14:38:02.804541 BS: BS_PAYLOAD_LOAD run times (exec / console): 241 / 63 ms
2117 14:38:02.847356 Finalizing chipset.
2118 14:38:02.850575 Finalizing SMM.
2119 14:38:02.850658 APMC done.
2120 14:38:02.857280 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2121 14:38:02.860513 mp_park_aps done after 0 msecs.
2122 14:38:02.864012 Jumping to boot code at 0x30000000(0x76b25000)
2123 14:38:02.873802 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2124 14:38:02.873886
2125 14:38:02.873951
2126 14:38:02.874010
2127 14:38:02.877320 Starting depthcharge on Voema...
2128 14:38:02.877403
2129 14:38:02.877745 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2130 14:38:02.877843 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2131 14:38:02.877932 Setting prompt string to ['volteer:']
2132 14:38:02.878011 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2133 14:38:02.887108 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2134 14:38:02.887211
2135 14:38:02.894126 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2136 14:38:02.894209
2137 14:38:02.897225 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2138 14:38:02.901414
2139 14:38:02.901496 Failed to find eMMC card reader
2140 14:38:02.901563
2141 14:38:02.904706 Wipe memory regions:
2142 14:38:02.904825
2143 14:38:02.907906 [0x00000000001000, 0x000000000a0000)
2144 14:38:02.907988
2145 14:38:02.911297 [0x00000000100000, 0x00000030000000)
2146 14:38:02.938701
2147 14:38:02.941981 [0x00000032662db0, 0x000000769ef000)
2148 14:38:02.978169
2149 14:38:02.981250 [0x00000100000000, 0x00000280400000)
2150 14:38:03.180567
2151 14:38:03.183999 ec_init: CrosEC protocol v3 supported (256, 256)
2152 14:38:03.184087
2153 14:38:03.190791 update_port_state: port C0 state: usb enable 1 mux conn 0
2154 14:38:03.190876
2155 14:38:03.197153 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2156 14:38:03.202060
2157 14:38:03.205359 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2158 14:38:03.205485
2159 14:38:03.208537 send_conn_disc_msg: pmc_send_cmd succeeded
2160 14:38:03.641559
2161 14:38:03.641709 R8152: Initializing
2162 14:38:03.641779
2163 14:38:03.644625 Version 6 (ocp_data = 5c30)
2164 14:38:03.644736
2165 14:38:03.648172 R8152: Done initializing
2166 14:38:03.648256
2167 14:38:03.651460 Adding net device
2168 14:38:03.952915
2169 14:38:03.956354 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2170 14:38:03.956441
2171 14:38:03.956506
2172 14:38:03.956566
2173 14:38:03.959588 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 14:38:04.059954 volteer: tftpboot 192.168.201.1 11299758/tftp-deploy-7p3mufuz/kernel/bzImage 11299758/tftp-deploy-7p3mufuz/kernel/cmdline 11299758/tftp-deploy-7p3mufuz/ramdisk/ramdisk.cpio.gz
2176 14:38:04.060081 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2177 14:38:04.060177 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2178 14:38:04.064732 tftpboot 192.168.201.1 11299758/tftp-deploy-7p3mufuz/kernel/bzImploy-7p3mufuz/kernel/cmdline 11299758/tftp-deploy-7p3mufuz/ramdisk/ramdisk.cpio.gz
2179 14:38:04.064865
2180 14:38:04.064934 Waiting for link
2181 14:38:04.267891
2182 14:38:04.268013 done.
2183 14:38:04.268081
2184 14:38:04.268143 MAC: 00:24:32:30:78:74
2185 14:38:04.268203
2186 14:38:04.271231 Sending DHCP discover... done.
2187 14:38:04.271315
2188 14:38:04.274446 Waiting for reply... done.
2189 14:38:04.274528
2190 14:38:04.277742 Sending DHCP request... done.
2191 14:38:04.277825
2192 14:38:04.281081 Waiting for reply... done.
2193 14:38:04.281163
2194 14:38:04.284529 My ip is 192.168.201.14
2195 14:38:04.284612
2196 14:38:04.287808 The DHCP server ip is 192.168.201.1
2197 14:38:04.287892
2198 14:38:04.291027 TFTP server IP predefined by user: 192.168.201.1
2199 14:38:04.291147
2200 14:38:04.297656 Bootfile predefined by user: 11299758/tftp-deploy-7p3mufuz/kernel/bzImage
2201 14:38:04.297740
2202 14:38:04.301146 Sending tftp read request... done.
2203 14:38:04.301229
2204 14:38:04.307756 Waiting for the transfer...
2205 14:38:04.307839
2206 14:38:04.867215 00000000 ################################################################
2207 14:38:04.867353
2208 14:38:05.419616 00080000 ################################################################
2209 14:38:05.419760
2210 14:38:05.954317 00100000 ################################################################
2211 14:38:05.954454
2212 14:38:06.481898 00180000 ################################################################
2213 14:38:06.482090
2214 14:38:07.022647 00200000 ################################################################
2215 14:38:07.022852
2216 14:38:07.542589 00280000 ################################################################
2217 14:38:07.542739
2218 14:38:08.079541 00300000 ################################################################
2219 14:38:08.079755
2220 14:38:08.611503 00380000 ################################################################
2221 14:38:08.611654
2222 14:38:09.155564 00400000 ################################################################
2223 14:38:09.155718
2224 14:38:09.692048 00480000 ################################################################
2225 14:38:09.692193
2226 14:38:10.236617 00500000 ################################################################
2227 14:38:10.236863
2228 14:38:10.782090 00580000 ################################################################
2229 14:38:10.782306
2230 14:38:11.306492 00600000 ################################################################
2231 14:38:11.306642
2232 14:38:11.852813 00680000 ################################################################
2233 14:38:11.852951
2234 14:38:12.370554 00700000 ################################################################
2235 14:38:12.370697
2236 14:38:12.902767 00780000 ################################################################
2237 14:38:12.902915
2238 14:38:13.003799 00800000 ############# done.
2239 14:38:13.003949
2240 14:38:13.007146 The bootfile was 8490896 bytes long.
2241 14:38:13.007232
2242 14:38:13.010457 Sending tftp read request... done.
2243 14:38:13.010542
2244 14:38:13.013558 Waiting for the transfer...
2245 14:38:13.013643
2246 14:38:13.563681 00000000 ################################################################
2247 14:38:13.563823
2248 14:38:14.111598 00080000 ################################################################
2249 14:38:14.111809
2250 14:38:14.662691 00100000 ################################################################
2251 14:38:14.662836
2252 14:38:15.230545 00180000 ################################################################
2253 14:38:15.230696
2254 14:38:15.776381 00200000 ################################################################
2255 14:38:15.776531
2256 14:38:16.304642 00280000 ################################################################
2257 14:38:16.304812
2258 14:38:16.854215 00300000 ################################################################
2259 14:38:16.854361
2260 14:38:17.416822 00380000 ################################################################
2261 14:38:17.417027
2262 14:38:17.977201 00400000 ################################################################
2263 14:38:17.977410
2264 14:38:18.508291 00480000 ################################################################
2265 14:38:18.508443
2266 14:38:19.054274 00500000 ################################################################ done.
2267 14:38:19.054424
2268 14:38:19.057530 Sending tftp read request... done.
2269 14:38:19.057618
2270 14:38:19.061234 Waiting for the transfer...
2271 14:38:19.061320
2272 14:38:19.061387 00000000 # done.
2273 14:38:19.061480
2274 14:38:19.070849 Command line loaded dynamically from TFTP file: 11299758/tftp-deploy-7p3mufuz/kernel/cmdline
2275 14:38:19.071007
2276 14:38:19.094009 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11299758/extract-nfsrootfs-ur1sj8s3,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2277 14:38:19.099981
2278 14:38:19.103534 Shutting down all USB controllers.
2279 14:38:19.103618
2280 14:38:19.103685 Removing current net device
2281 14:38:19.103748
2282 14:38:19.106664 Finalizing coreboot
2283 14:38:19.106749
2284 14:38:19.113438 Exiting depthcharge with code 4 at timestamp: 24889206
2285 14:38:19.113579
2286 14:38:19.113646
2287 14:38:19.113709 Starting kernel ...
2288 14:38:19.113768
2289 14:38:19.113826
2290 14:38:19.114180 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2291 14:38:19.114275 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2292 14:38:19.114353 Setting prompt string to ['Linux version [0-9]']
2293 14:38:19.114422 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2294 14:38:19.114490 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2296 14:42:47.114526 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2298 14:42:47.114735 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2300 14:42:47.114892 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2303 14:42:47.115150 end: 2 depthcharge-action (duration 00:05:00) [common]
2305 14:42:47.115369 Cleaning after the job
2306 14:42:47.115465 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/ramdisk
2307 14:42:47.116354 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/kernel
2308 14:42:47.117339 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/nfsrootfs
2309 14:42:47.170020 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299758/tftp-deploy-7p3mufuz/modules
2310 14:42:47.170426 start: 5.1 power-off (timeout 00:00:30) [common]
2311 14:42:47.170596 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2312 14:42:51.269998 >> Command sent successfully.
2313 14:42:51.272807 Returned 0 in 4 seconds
2314 14:42:51.373149 end: 5.1 power-off (duration 00:00:04) [common]
2316 14:42:51.373451 start: 5.2 read-feedback (timeout 00:09:56) [common]
2317 14:42:51.373701 Listened to connection for namespace 'common' for up to 1s
2318 14:42:52.374679 Finalising connection for namespace 'common'
2319 14:42:52.374866 Disconnecting from shell: Finalise
2320 14:42:52.374946
2321 14:42:52.475263 end: 5.2 read-feedback (duration 00:00:01) [common]
2322 14:42:52.475395 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299758
2323 14:42:52.727654 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299758
2324 14:42:52.727848 JobError: Your job cannot terminate cleanly.