Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:37:17.950863 lava-dispatcher, installed at version: 2023.06
2 14:37:17.951075 start: 0 validate
3 14:37:17.951205 Start time: 2023-08-16 14:37:17.951196+00:00 (UTC)
4 14:37:17.951367 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:37:17.951562 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 14:37:18.205072 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:37:18.205871 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:37:18.467165 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:37:18.467939 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:37:25.120815 validate duration: 7.17
12 14:37:25.121077 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:37:25.121174 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:37:25.121261 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:37:25.121391 Not decompressing ramdisk as can be used compressed.
16 14:37:25.121479 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 14:37:25.121604 saving as /var/lib/lava/dispatcher/tmp/11299716/tftp-deploy-uf0v7fi4/ramdisk/rootfs.cpio.gz
18 14:37:25.121669 total size: 35760064 (34 MB)
19 14:37:25.616527 progress 0 % (0 MB)
20 14:37:25.628613 progress 5 % (1 MB)
21 14:37:25.637694 progress 10 % (3 MB)
22 14:37:25.646625 progress 15 % (5 MB)
23 14:37:25.655749 progress 20 % (6 MB)
24 14:37:25.664699 progress 25 % (8 MB)
25 14:37:25.673969 progress 30 % (10 MB)
26 14:37:25.683359 progress 35 % (11 MB)
27 14:37:25.692577 progress 40 % (13 MB)
28 14:37:25.702173 progress 45 % (15 MB)
29 14:37:25.711409 progress 50 % (17 MB)
30 14:37:25.720798 progress 55 % (18 MB)
31 14:37:25.730016 progress 60 % (20 MB)
32 14:37:25.739708 progress 65 % (22 MB)
33 14:37:25.748802 progress 70 % (23 MB)
34 14:37:25.758044 progress 75 % (25 MB)
35 14:37:25.767253 progress 80 % (27 MB)
36 14:37:25.776443 progress 85 % (29 MB)
37 14:37:25.785711 progress 90 % (30 MB)
38 14:37:25.794657 progress 95 % (32 MB)
39 14:37:25.803708 progress 100 % (34 MB)
40 14:37:25.803862 34 MB downloaded in 0.68 s (49.99 MB/s)
41 14:37:25.804024 end: 1.1.1 http-download (duration 00:00:01) [common]
43 14:37:25.804264 end: 1.1 download-retry (duration 00:00:01) [common]
44 14:37:25.804352 start: 1.2 download-retry (timeout 00:09:59) [common]
45 14:37:25.804434 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 14:37:25.804575 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:37:25.804644 saving as /var/lib/lava/dispatcher/tmp/11299716/tftp-deploy-uf0v7fi4/kernel/bzImage
48 14:37:25.804704 total size: 8490896 (8 MB)
49 14:37:25.804764 No compression specified
50 14:37:25.805884 progress 0 % (0 MB)
51 14:37:25.808046 progress 5 % (0 MB)
52 14:37:25.810342 progress 10 % (0 MB)
53 14:37:25.812630 progress 15 % (1 MB)
54 14:37:25.814868 progress 20 % (1 MB)
55 14:37:25.817308 progress 25 % (2 MB)
56 14:37:25.819549 progress 30 % (2 MB)
57 14:37:25.821857 progress 35 % (2 MB)
58 14:37:25.824186 progress 40 % (3 MB)
59 14:37:25.826417 progress 45 % (3 MB)
60 14:37:25.828714 progress 50 % (4 MB)
61 14:37:25.830927 progress 55 % (4 MB)
62 14:37:25.833250 progress 60 % (4 MB)
63 14:37:25.835513 progress 65 % (5 MB)
64 14:37:25.837764 progress 70 % (5 MB)
65 14:37:25.840028 progress 75 % (6 MB)
66 14:37:25.842227 progress 80 % (6 MB)
67 14:37:25.844456 progress 85 % (6 MB)
68 14:37:25.846638 progress 90 % (7 MB)
69 14:37:25.848872 progress 95 % (7 MB)
70 14:37:25.851073 progress 100 % (8 MB)
71 14:37:25.851186 8 MB downloaded in 0.05 s (174.23 MB/s)
72 14:37:25.851329 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:37:25.851558 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:37:25.851676 start: 1.3 download-retry (timeout 00:09:59) [common]
76 14:37:25.851780 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 14:37:25.851919 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:37:25.851990 saving as /var/lib/lava/dispatcher/tmp/11299716/tftp-deploy-uf0v7fi4/modules/modules.tar
79 14:37:25.852051 total size: 253808 (0 MB)
80 14:37:25.852113 Using unxz to decompress xz
81 14:37:25.856146 progress 12 % (0 MB)
82 14:37:25.856545 progress 25 % (0 MB)
83 14:37:25.856778 progress 38 % (0 MB)
84 14:37:25.858336 progress 51 % (0 MB)
85 14:37:25.860170 progress 64 % (0 MB)
86 14:37:25.862045 progress 77 % (0 MB)
87 14:37:25.863901 progress 90 % (0 MB)
88 14:37:25.865605 progress 100 % (0 MB)
89 14:37:25.871249 0 MB downloaded in 0.02 s (12.61 MB/s)
90 14:37:25.871477 end: 1.3.1 http-download (duration 00:00:00) [common]
92 14:37:25.871785 end: 1.3 download-retry (duration 00:00:00) [common]
93 14:37:25.871879 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 14:37:25.871973 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 14:37:25.872054 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 14:37:25.872137 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 14:37:25.872355 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv
98 14:37:25.872495 makedir: /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin
99 14:37:25.872604 makedir: /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/tests
100 14:37:25.872708 makedir: /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/results
101 14:37:25.872822 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-add-keys
102 14:37:25.872971 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-add-sources
103 14:37:25.873109 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-background-process-start
104 14:37:25.873246 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-background-process-stop
105 14:37:25.873373 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-common-functions
106 14:37:25.873498 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-echo-ipv4
107 14:37:25.873624 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-install-packages
108 14:37:25.873749 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-installed-packages
109 14:37:25.873873 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-os-build
110 14:37:25.873997 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-probe-channel
111 14:37:25.874124 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-probe-ip
112 14:37:25.874248 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-target-ip
113 14:37:25.874372 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-target-mac
114 14:37:25.874496 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-target-storage
115 14:37:25.874628 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-test-case
116 14:37:25.874761 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-test-event
117 14:37:25.874885 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-test-feedback
118 14:37:25.875011 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-test-raise
119 14:37:25.875138 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-test-reference
120 14:37:25.875266 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-test-runner
121 14:37:25.875393 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-test-set
122 14:37:25.875518 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-test-shell
123 14:37:25.875688 Updating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-install-packages (oe)
124 14:37:25.875846 Updating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/bin/lava-installed-packages (oe)
125 14:37:25.875973 Creating /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/environment
126 14:37:25.876082 LAVA metadata
127 14:37:25.876155 - LAVA_JOB_ID=11299716
128 14:37:25.876221 - LAVA_DISPATCHER_IP=192.168.201.1
129 14:37:25.876324 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 14:37:25.876391 skipped lava-vland-overlay
131 14:37:25.876488 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 14:37:25.876573 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 14:37:25.876637 skipped lava-multinode-overlay
134 14:37:25.876710 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 14:37:25.876791 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 14:37:25.876866 Loading test definitions
137 14:37:25.876961 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 14:37:25.877036 Using /lava-11299716 at stage 0
139 14:37:25.877345 uuid=11299716_1.4.2.3.1 testdef=None
140 14:37:25.877433 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 14:37:25.877519 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 14:37:25.878043 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 14:37:25.878262 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 14:37:25.878857 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 14:37:25.879081 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 14:37:25.879745 runner path: /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/0/tests/0_cros-ec test_uuid 11299716_1.4.2.3.1
149 14:37:25.879899 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 14:37:25.880105 Creating lava-test-runner.conf files
152 14:37:25.880168 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299716/lava-overlay-3v2lezvv/lava-11299716/0 for stage 0
153 14:37:25.880258 - 0_cros-ec
154 14:37:25.880355 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 14:37:25.880439 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
156 14:37:25.887112 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 14:37:25.887214 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
158 14:37:25.887299 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 14:37:25.887383 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 14:37:25.887466 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
161 14:37:26.931291 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 14:37:26.931726 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
163 14:37:26.931844 extracting modules file /var/lib/lava/dispatcher/tmp/11299716/tftp-deploy-uf0v7fi4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299716/extract-overlay-ramdisk-6wmo71ik/ramdisk
164 14:37:26.948082 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 14:37:26.948249 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
166 14:37:26.948375 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299716/compress-overlay-d4tctz8w/overlay-1.4.2.4.tar.gz to ramdisk
167 14:37:26.948474 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299716/compress-overlay-d4tctz8w/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299716/extract-overlay-ramdisk-6wmo71ik/ramdisk
168 14:37:26.956739 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 14:37:26.956856 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
170 14:37:26.956947 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 14:37:26.957036 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
172 14:37:26.957117 Building ramdisk /var/lib/lava/dispatcher/tmp/11299716/extract-overlay-ramdisk-6wmo71ik/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299716/extract-overlay-ramdisk-6wmo71ik/ramdisk
173 14:37:27.451546 >> 184121 blocks
174 14:37:30.919120 rename /var/lib/lava/dispatcher/tmp/11299716/extract-overlay-ramdisk-6wmo71ik/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299716/tftp-deploy-uf0v7fi4/ramdisk/ramdisk.cpio.gz
175 14:37:30.919572 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 14:37:30.919746 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
177 14:37:30.919841 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
178 14:37:30.919937 No mkimage arch provided, not using FIT.
179 14:37:30.920026 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 14:37:30.920115 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 14:37:30.920257 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 14:37:30.920409 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
183 14:37:30.920486 No LXC device requested
184 14:37:30.920560 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 14:37:30.920646 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
186 14:37:30.920725 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 14:37:30.920794 Checking files for TFTP limit of 4294967296 bytes.
188 14:37:30.921189 end: 1 tftp-deploy (duration 00:00:06) [common]
189 14:37:30.921289 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 14:37:30.921377 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 14:37:30.921496 substitutions:
192 14:37:30.921561 - {DTB}: None
193 14:37:30.921622 - {INITRD}: 11299716/tftp-deploy-uf0v7fi4/ramdisk/ramdisk.cpio.gz
194 14:37:30.921679 - {KERNEL}: 11299716/tftp-deploy-uf0v7fi4/kernel/bzImage
195 14:37:30.921735 - {LAVA_MAC}: None
196 14:37:30.921789 - {PRESEED_CONFIG}: None
197 14:37:30.921843 - {PRESEED_LOCAL}: None
198 14:37:30.921897 - {RAMDISK}: 11299716/tftp-deploy-uf0v7fi4/ramdisk/ramdisk.cpio.gz
199 14:37:30.921950 - {ROOT_PART}: None
200 14:37:30.922002 - {ROOT}: None
201 14:37:30.922054 - {SERVER_IP}: 192.168.201.1
202 14:37:30.922106 - {TEE}: None
203 14:37:30.922158 Parsed boot commands:
204 14:37:30.922210 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 14:37:30.922380 Parsed boot commands: tftpboot 192.168.201.1 11299716/tftp-deploy-uf0v7fi4/kernel/bzImage 11299716/tftp-deploy-uf0v7fi4/kernel/cmdline 11299716/tftp-deploy-uf0v7fi4/ramdisk/ramdisk.cpio.gz
206 14:37:30.922465 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 14:37:30.922547 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 14:37:30.922635 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 14:37:30.922719 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 14:37:30.922787 Not connected, no need to disconnect.
211 14:37:30.922861 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 14:37:30.922943 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 14:37:30.923006 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-10'
214 14:37:30.926769 Setting prompt string to ['lava-test: # ']
215 14:37:30.927122 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 14:37:30.927225 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 14:37:30.927321 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 14:37:30.927408 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 14:37:30.927617 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
220 14:37:36.060890 >> Command sent successfully.
221 14:37:36.063168 Returned 0 in 5 seconds
222 14:37:36.163570 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 14:37:36.163981 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 14:37:36.164128 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 14:37:36.164248 Setting prompt string to 'Starting depthcharge on Voema...'
227 14:37:36.164342 Changing prompt to 'Starting depthcharge on Voema...'
228 14:37:36.164438 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 14:37:36.164791 [Enter `^Ec?' for help]
230 14:37:37.826694
231 14:37:37.826892
232 14:37:37.837788 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 14:37:37.841161 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
234 14:37:37.845190 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 14:37:37.852093 CPU: AES supported, TXT NOT supported, VT supported
236 14:37:37.856097 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 14:37:37.863902 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 14:37:37.867483 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 14:37:37.870856 VBOOT: Loading verstage.
240 14:37:37.874710 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 14:37:37.878289 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 14:37:37.885594 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 14:37:37.893367 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 14:37:37.900640 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 14:37:37.900727
246 14:37:37.900792
247 14:37:37.911594 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 14:37:37.927625 Probing TPM: . done!
249 14:37:37.931898 TPM ready after 0 ms
250 14:37:37.936082 Connected to device vid:did:rid of 1ae0:0028:00
251 14:37:37.946717 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
252 14:37:37.954737 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 14:37:38.012392 Initialized TPM device CR50 revision 0
254 14:37:38.021706 tlcl_send_startup: Startup return code is 0
255 14:37:38.021799 TPM: setup succeeded
256 14:37:38.037137 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 14:37:38.051256 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 14:37:38.064045 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 14:37:38.074295 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 14:37:38.077994 Chrome EC: UHEPI supported
261 14:37:38.081226 Phase 1
262 14:37:38.084473 FMAP: area GBB found @ 1805000 (458752 bytes)
263 14:37:38.094142 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 14:37:38.101088 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 14:37:38.107391 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 14:37:38.114233 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 14:37:38.117390 Recovery requested (1009000e)
268 14:37:38.120945 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 14:37:38.132399 tlcl_extend: response is 0
270 14:37:38.138854 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 14:37:38.149069 tlcl_extend: response is 0
272 14:37:38.155658 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 14:37:38.162156 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 14:37:38.168940 BS: verstage times (exec / console): total (unknown) / 142 ms
275 14:37:38.169025
276 14:37:38.169091
277 14:37:38.181870 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 14:37:38.188537 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 14:37:38.191698 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 14:37:38.195229 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 14:37:38.201693 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 14:37:38.204863 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 14:37:38.208320 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 14:37:38.211920 TCO_STS: 0000 0000
285 14:37:38.214897 GEN_PMCON: d0015038 00002200
286 14:37:38.218301 GBLRST_CAUSE: 00000000 00000000
287 14:37:38.221801 HPR_CAUSE0: 00000000
288 14:37:38.221884 prev_sleep_state 5
289 14:37:38.224762 Boot Count incremented to 20168
290 14:37:38.231469 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 14:37:38.238288 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 14:37:38.245436 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 14:37:38.252520 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 14:37:38.256312 Chrome EC: UHEPI supported
295 14:37:38.263034 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 14:37:38.275902 Probing TPM: done!
297 14:37:38.282413 Connected to device vid:did:rid of 1ae0:0028:00
298 14:37:38.292601 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 14:37:38.295475 Initialized TPM device CR50 revision 0
300 14:37:38.310772 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 14:37:38.317106 MRC: Hash idx 0x100b comparison successful.
302 14:37:38.320568 MRC cache found, size faa8
303 14:37:38.320651 bootmode is set to: 2
304 14:37:38.323908 SPD index = 2
305 14:37:38.330686 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 14:37:38.333967 SPD: module type is LPDDR4X
307 14:37:38.337529 SPD: module part number is MT53D1G64D4NW-046
308 14:37:38.343827 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
309 14:37:38.346810 SPD: device width 16 bits, bus width 16 bits
310 14:37:38.353896 SPD: module size is 2048 MB (per channel)
311 14:37:38.782820 CBMEM:
312 14:37:38.786225 IMD: root @ 0x76fff000 254 entries.
313 14:37:38.789862 IMD: root @ 0x76ffec00 62 entries.
314 14:37:38.793219 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 14:37:38.799477 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 14:37:38.802901 External stage cache:
317 14:37:38.806197 IMD: root @ 0x7b3ff000 254 entries.
318 14:37:38.809069 IMD: root @ 0x7b3fec00 62 entries.
319 14:37:38.824782 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 14:37:38.831459 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 14:37:38.838074 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 14:37:38.851353 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 14:37:38.858124 cse_lite: Skip switching to RW in the recovery path
324 14:37:38.858208 8 DIMMs found
325 14:37:38.858275 SMM Memory Map
326 14:37:38.864095 SMRAM : 0x7b000000 0x800000
327 14:37:38.867927 Subregion 0: 0x7b000000 0x200000
328 14:37:38.870866 Subregion 1: 0x7b200000 0x200000
329 14:37:38.873979 Subregion 2: 0x7b400000 0x400000
330 14:37:38.874062 top_of_ram = 0x77000000
331 14:37:38.880872 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 14:37:38.887349 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 14:37:38.890774 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 14:37:38.897215 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 14:37:38.903823 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 14:37:38.910256 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 14:37:38.920450 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 14:37:38.927585 Processing 211 relocs. Offset value of 0x74c0b000
339 14:37:38.933918 BS: romstage times (exec / console): total (unknown) / 277 ms
340 14:37:38.939611
341 14:37:38.939715
342 14:37:38.949347 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 14:37:38.952931 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 14:37:38.962869 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 14:37:38.969550 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 14:37:38.975728 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 14:37:38.982754 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 14:37:39.026576 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 14:37:39.033837 Processing 5008 relocs. Offset value of 0x75d98000
350 14:37:39.037302 BS: postcar times (exec / console): total (unknown) / 59 ms
351 14:37:39.037401
352 14:37:39.037469
353 14:37:39.049968 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 14:37:39.050058 Normal boot
355 14:37:39.053854 FW_CONFIG value is 0x804c02
356 14:37:39.056665 PCI: 00:07.0 disabled by fw_config
357 14:37:39.059981 PCI: 00:07.1 disabled by fw_config
358 14:37:39.063449 PCI: 00:0d.2 disabled by fw_config
359 14:37:39.066768 PCI: 00:1c.7 disabled by fw_config
360 14:37:39.073023 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 14:37:39.079608 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 14:37:39.083592 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 14:37:39.086515 GENERIC: 0.0 disabled by fw_config
364 14:37:39.092893 GENERIC: 1.0 disabled by fw_config
365 14:37:39.096726 fw_config match found: DB_USB=USB3_ACTIVE
366 14:37:39.099590 fw_config match found: DB_USB=USB3_ACTIVE
367 14:37:39.103154 fw_config match found: DB_USB=USB3_ACTIVE
368 14:37:39.109535 fw_config match found: DB_USB=USB3_ACTIVE
369 14:37:39.112816 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 14:37:39.119228 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 14:37:39.129740 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 14:37:39.136306 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 14:37:39.139437 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 14:37:39.145850 microcode: Update skipped, already up-to-date
375 14:37:39.152353 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 14:37:39.180300 Detected 4 core, 8 thread CPU.
377 14:37:39.183459 Setting up SMI for CPU
378 14:37:39.186763 IED base = 0x7b400000
379 14:37:39.190230 IED size = 0x00400000
380 14:37:39.190311 Will perform SMM setup.
381 14:37:39.196717 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
382 14:37:39.203331 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 14:37:39.209669 Processing 16 relocs. Offset value of 0x00030000
384 14:37:39.213056 Attempting to start 7 APs
385 14:37:39.216181 Waiting for 10ms after sending INIT.
386 14:37:39.232085 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 14:37:39.232171 done.
388 14:37:39.235658 AP: slot 4 apic_id 7.
389 14:37:39.238689 AP: slot 5 apic_id 6.
390 14:37:39.238795 AP: slot 3 apic_id 3.
391 14:37:39.241899 AP: slot 7 apic_id 2.
392 14:37:39.245374 AP: slot 2 apic_id 5.
393 14:37:39.245479 AP: slot 6 apic_id 4.
394 14:37:39.251975 Waiting for 2nd SIPI to complete...done.
395 14:37:39.258441 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 14:37:39.265109 Processing 13 relocs. Offset value of 0x00038000
397 14:37:39.268573 Unable to locate Global NVS
398 14:37:39.275080 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 14:37:39.278518 Installing permanent SMM handler to 0x7b000000
400 14:37:39.288275 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 14:37:39.291548 Processing 794 relocs. Offset value of 0x7b010000
402 14:37:39.301698 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 14:37:39.305041 Processing 13 relocs. Offset value of 0x7b008000
404 14:37:39.311428 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 14:37:39.318021 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 14:37:39.324448 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 14:37:39.328054 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 14:37:39.334971 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 14:37:39.341331 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 14:37:39.347846 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 14:37:39.351234 Unable to locate Global NVS
412 14:37:39.357989 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 14:37:39.361115 Clearing SMI status registers
414 14:37:39.364388 SMI_STS: PM1
415 14:37:39.364489 PM1_STS: PWRBTN
416 14:37:39.370854 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 14:37:39.374131 In relocation handler: CPU 0
418 14:37:39.377460 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 14:37:39.384071 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 14:37:39.387108 Relocation complete.
421 14:37:39.394161 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 14:37:39.397544 In relocation handler: CPU 1
423 14:37:39.400625 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 14:37:39.403764 Relocation complete.
425 14:37:39.410491 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
426 14:37:39.413815 In relocation handler: CPU 4
427 14:37:39.416725 New SMBASE=0x7afff000 IEDBASE=0x7b400000
428 14:37:39.420100 Relocation complete.
429 14:37:39.426787 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
430 14:37:39.430210 In relocation handler: CPU 5
431 14:37:39.433209 New SMBASE=0x7affec00 IEDBASE=0x7b400000
432 14:37:39.436855 Writing SMRR. base = 0x7b000006, mask=0xff800c00
433 14:37:39.439968 Relocation complete.
434 14:37:39.446766 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
435 14:37:39.450147 In relocation handler: CPU 3
436 14:37:39.453063 New SMBASE=0x7afff400 IEDBASE=0x7b400000
437 14:37:39.456744 Relocation complete.
438 14:37:39.463130 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
439 14:37:39.466743 In relocation handler: CPU 7
440 14:37:39.469828 New SMBASE=0x7affe400 IEDBASE=0x7b400000
441 14:37:39.476534 Writing SMRR. base = 0x7b000006, mask=0xff800c00
442 14:37:39.479603 Relocation complete.
443 14:37:39.487309 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
444 14:37:39.487421 In relocation handler: CPU 2
445 14:37:39.493544 New SMBASE=0x7afff800 IEDBASE=0x7b400000
446 14:37:39.493655 Relocation complete.
447 14:37:39.500507 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
448 14:37:39.503746 In relocation handler: CPU 6
449 14:37:39.510507 New SMBASE=0x7affe800 IEDBASE=0x7b400000
450 14:37:39.513478 Writing SMRR. base = 0x7b000006, mask=0xff800c00
451 14:37:39.517129 Relocation complete.
452 14:37:39.517218 Initializing CPU #0
453 14:37:39.520601 CPU: vendor Intel device 806c1
454 14:37:39.526877 CPU: family 06, model 8c, stepping 01
455 14:37:39.526965 Clearing out pending MCEs
456 14:37:39.529716 Setting up local APIC...
457 14:37:39.533434 apic_id: 0x00 done.
458 14:37:39.536335 Turbo is available but hidden
459 14:37:39.539605 Turbo is available and visible
460 14:37:39.543115 microcode: Update skipped, already up-to-date
461 14:37:39.546490 CPU #0 initialized
462 14:37:39.546578 Initializing CPU #7
463 14:37:39.549623 Initializing CPU #4
464 14:37:39.553242 Initializing CPU #5
465 14:37:39.556152 CPU: vendor Intel device 806c1
466 14:37:39.559329 CPU: family 06, model 8c, stepping 01
467 14:37:39.559437 Initializing CPU #2
468 14:37:39.562777 Initializing CPU #6
469 14:37:39.566122 CPU: vendor Intel device 806c1
470 14:37:39.569620 CPU: family 06, model 8c, stepping 01
471 14:37:39.572899 CPU: vendor Intel device 806c1
472 14:37:39.576129 CPU: family 06, model 8c, stepping 01
473 14:37:39.579239 Clearing out pending MCEs
474 14:37:39.582972 Clearing out pending MCEs
475 14:37:39.583050 Setting up local APIC...
476 14:37:39.586156 Initializing CPU #3
477 14:37:39.589324 CPU: vendor Intel device 806c1
478 14:37:39.592692 CPU: family 06, model 8c, stepping 01
479 14:37:39.596056 CPU: vendor Intel device 806c1
480 14:37:39.599408 CPU: family 06, model 8c, stepping 01
481 14:37:39.602209 apic_id: 0x05 done.
482 14:37:39.605628 Setting up local APIC...
483 14:37:39.605715 Initializing CPU #1
484 14:37:39.608886 Clearing out pending MCEs
485 14:37:39.612442 CPU: vendor Intel device 806c1
486 14:37:39.615532 CPU: family 06, model 8c, stepping 01
487 14:37:39.618799 Setting up local APIC...
488 14:37:39.622157 apic_id: 0x04 done.
489 14:37:39.625457 microcode: Update skipped, already up-to-date
490 14:37:39.632014 microcode: Update skipped, already up-to-date
491 14:37:39.632101 CPU #2 initialized
492 14:37:39.635421 CPU #6 initialized
493 14:37:39.638841 CPU: vendor Intel device 806c1
494 14:37:39.641789 CPU: family 06, model 8c, stepping 01
495 14:37:39.645356 Clearing out pending MCEs
496 14:37:39.645443 Clearing out pending MCEs
497 14:37:39.648501 Clearing out pending MCEs
498 14:37:39.652286 Setting up local APIC...
499 14:37:39.655030 Clearing out pending MCEs
500 14:37:39.658306 Setting up local APIC...
501 14:37:39.658394 Setting up local APIC...
502 14:37:39.661548 Setting up local APIC...
503 14:37:39.665089 apic_id: 0x07 done.
504 14:37:39.665168 apic_id: 0x06 done.
505 14:37:39.672247 microcode: Update skipped, already up-to-date
506 14:37:39.674749 microcode: Update skipped, already up-to-date
507 14:37:39.678476 CPU #4 initialized
508 14:37:39.678555 CPU #5 initialized
509 14:37:39.681312 apic_id: 0x02 done.
510 14:37:39.684865 apic_id: 0x03 done.
511 14:37:39.688006 microcode: Update skipped, already up-to-date
512 14:37:39.691581 microcode: Update skipped, already up-to-date
513 14:37:39.694452 CPU #7 initialized
514 14:37:39.697788 CPU #3 initialized
515 14:37:39.697896 apic_id: 0x01 done.
516 14:37:39.704657 microcode: Update skipped, already up-to-date
517 14:37:39.704766 CPU #1 initialized
518 14:37:39.710829 bsp_do_flight_plan done after 454 msecs.
519 14:37:39.714236 CPU: frequency set to 4400 MHz
520 14:37:39.714344 Enabling SMIs.
521 14:37:39.720913 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 14:37:39.736669 SATAXPCIE1 indicates PCIe NVMe is present
523 14:37:39.740358 Probing TPM: done!
524 14:37:39.743372 Connected to device vid:did:rid of 1ae0:0028:00
525 14:37:39.754306 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
526 14:37:39.757308 Initialized TPM device CR50 revision 0
527 14:37:39.760582 Enabling S0i3.4
528 14:37:39.767573 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 14:37:39.771051 Found a VBT of 8704 bytes after decompression
530 14:37:39.777322 cse_lite: CSE RO boot. HybridStorageMode disabled
531 14:37:39.783799 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 14:37:39.858862 FSPS returned 0
533 14:37:39.861833 Executing Phase 1 of FspMultiPhaseSiInit
534 14:37:39.871976 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 14:37:39.875122 port C0 DISC req: usage 1 usb3 1 usb2 5
536 14:37:39.878437 Raw Buffer output 0 00000511
537 14:37:39.882009 Raw Buffer output 1 00000000
538 14:37:39.885739 pmc_send_ipc_cmd succeeded
539 14:37:39.892419 port C1 DISC req: usage 1 usb3 2 usb2 3
540 14:37:39.892499 Raw Buffer output 0 00000321
541 14:37:39.895857 Raw Buffer output 1 00000000
542 14:37:39.899761 pmc_send_ipc_cmd succeeded
543 14:37:39.905044 Detected 4 core, 8 thread CPU.
544 14:37:39.908002 Detected 4 core, 8 thread CPU.
545 14:37:40.108786 Display FSP Version Info HOB
546 14:37:40.112086 Reference Code - CPU = a.0.4c.31
547 14:37:40.115212 uCode Version = 0.0.0.86
548 14:37:40.118403 TXT ACM version = ff.ff.ff.ffff
549 14:37:40.121261 Reference Code - ME = a.0.4c.31
550 14:37:40.125015 MEBx version = 0.0.0.0
551 14:37:40.127948 ME Firmware Version = Consumer SKU
552 14:37:40.131315 Reference Code - PCH = a.0.4c.31
553 14:37:40.135085 PCH-CRID Status = Disabled
554 14:37:40.138175 PCH-CRID Original Value = ff.ff.ff.ffff
555 14:37:40.141605 PCH-CRID New Value = ff.ff.ff.ffff
556 14:37:40.144594 OPROM - RST - RAID = ff.ff.ff.ffff
557 14:37:40.147818 PCH Hsio Version = 4.0.0.0
558 14:37:40.151273 Reference Code - SA - System Agent = a.0.4c.31
559 14:37:40.154585 Reference Code - MRC = 2.0.0.1
560 14:37:40.157820 SA - PCIe Version = a.0.4c.31
561 14:37:40.160965 SA-CRID Status = Disabled
562 14:37:40.164910 SA-CRID Original Value = 0.0.0.1
563 14:37:40.167707 SA-CRID New Value = 0.0.0.1
564 14:37:40.170994 OPROM - VBIOS = ff.ff.ff.ffff
565 14:37:40.174389 IO Manageability Engine FW Version = 11.1.4.0
566 14:37:40.177619 PHY Build Version = 0.0.0.e0
567 14:37:40.180789 Thunderbolt(TM) FW Version = 0.0.0.0
568 14:37:40.187334 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 14:37:40.190792 ITSS IRQ Polarities Before:
570 14:37:40.190868 IPC0: 0xffffffff
571 14:37:40.193885 IPC1: 0xffffffff
572 14:37:40.197540 IPC2: 0xffffffff
573 14:37:40.197648 IPC3: 0xffffffff
574 14:37:40.200468 ITSS IRQ Polarities After:
575 14:37:40.200568 IPC0: 0xffffffff
576 14:37:40.203823 IPC1: 0xffffffff
577 14:37:40.207179 IPC2: 0xffffffff
578 14:37:40.207268 IPC3: 0xffffffff
579 14:37:40.210345 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 14:37:40.223999 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 14:37:40.236785 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 14:37:40.247008 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 14:37:40.253469 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
584 14:37:40.256828 Enumerating buses...
585 14:37:40.260075 Show all devs... Before device enumeration.
586 14:37:40.263622 Root Device: enabled 1
587 14:37:40.266571 DOMAIN: 0000: enabled 1
588 14:37:40.266677 CPU_CLUSTER: 0: enabled 1
589 14:37:40.270490 PCI: 00:00.0: enabled 1
590 14:37:40.273055 PCI: 00:02.0: enabled 1
591 14:37:40.276845 PCI: 00:04.0: enabled 1
592 14:37:40.276952 PCI: 00:05.0: enabled 1
593 14:37:40.279985 PCI: 00:06.0: enabled 0
594 14:37:40.283265 PCI: 00:07.0: enabled 0
595 14:37:40.286387 PCI: 00:07.1: enabled 0
596 14:37:40.286485 PCI: 00:07.2: enabled 0
597 14:37:40.290024 PCI: 00:07.3: enabled 0
598 14:37:40.293275 PCI: 00:08.0: enabled 1
599 14:37:40.296434 PCI: 00:09.0: enabled 0
600 14:37:40.296539 PCI: 00:0a.0: enabled 0
601 14:37:40.299365 PCI: 00:0d.0: enabled 1
602 14:37:40.303076 PCI: 00:0d.1: enabled 0
603 14:37:40.306274 PCI: 00:0d.2: enabled 0
604 14:37:40.306362 PCI: 00:0d.3: enabled 0
605 14:37:40.309610 PCI: 00:0e.0: enabled 0
606 14:37:40.312886 PCI: 00:10.2: enabled 1
607 14:37:40.312974 PCI: 00:10.6: enabled 0
608 14:37:40.316396 PCI: 00:10.7: enabled 0
609 14:37:40.319765 PCI: 00:12.0: enabled 0
610 14:37:40.322732 PCI: 00:12.6: enabled 0
611 14:37:40.322818 PCI: 00:13.0: enabled 0
612 14:37:40.326246 PCI: 00:14.0: enabled 1
613 14:37:40.329299 PCI: 00:14.1: enabled 0
614 14:37:40.332539 PCI: 00:14.2: enabled 1
615 14:37:40.332626 PCI: 00:14.3: enabled 1
616 14:37:40.335992 PCI: 00:15.0: enabled 1
617 14:37:40.338978 PCI: 00:15.1: enabled 1
618 14:37:40.342489 PCI: 00:15.2: enabled 1
619 14:37:40.342562 PCI: 00:15.3: enabled 1
620 14:37:40.345639 PCI: 00:16.0: enabled 1
621 14:37:40.349333 PCI: 00:16.1: enabled 0
622 14:37:40.352557 PCI: 00:16.2: enabled 0
623 14:37:40.352660 PCI: 00:16.3: enabled 0
624 14:37:40.355793 PCI: 00:16.4: enabled 0
625 14:37:40.359396 PCI: 00:16.5: enabled 0
626 14:37:40.362699 PCI: 00:17.0: enabled 1
627 14:37:40.362791 PCI: 00:19.0: enabled 0
628 14:37:40.365699 PCI: 00:19.1: enabled 1
629 14:37:40.369143 PCI: 00:19.2: enabled 0
630 14:37:40.369245 PCI: 00:1c.0: enabled 1
631 14:37:40.372318 PCI: 00:1c.1: enabled 0
632 14:37:40.375630 PCI: 00:1c.2: enabled 0
633 14:37:40.379205 PCI: 00:1c.3: enabled 0
634 14:37:40.379312 PCI: 00:1c.4: enabled 0
635 14:37:40.382258 PCI: 00:1c.5: enabled 0
636 14:37:40.385448 PCI: 00:1c.6: enabled 1
637 14:37:40.388746 PCI: 00:1c.7: enabled 0
638 14:37:40.388824 PCI: 00:1d.0: enabled 1
639 14:37:40.392211 PCI: 00:1d.1: enabled 0
640 14:37:40.395477 PCI: 00:1d.2: enabled 1
641 14:37:40.398683 PCI: 00:1d.3: enabled 0
642 14:37:40.398770 PCI: 00:1e.0: enabled 1
643 14:37:40.401769 PCI: 00:1e.1: enabled 0
644 14:37:40.405457 PCI: 00:1e.2: enabled 1
645 14:37:40.408587 PCI: 00:1e.3: enabled 1
646 14:37:40.408697 PCI: 00:1f.0: enabled 1
647 14:37:40.412081 PCI: 00:1f.1: enabled 0
648 14:37:40.415276 PCI: 00:1f.2: enabled 1
649 14:37:40.418357 PCI: 00:1f.3: enabled 1
650 14:37:40.418462 PCI: 00:1f.4: enabled 0
651 14:37:40.422305 PCI: 00:1f.5: enabled 1
652 14:37:40.425211 PCI: 00:1f.6: enabled 0
653 14:37:40.425314 PCI: 00:1f.7: enabled 0
654 14:37:40.428209 APIC: 00: enabled 1
655 14:37:40.431786 GENERIC: 0.0: enabled 1
656 14:37:40.435137 GENERIC: 0.0: enabled 1
657 14:37:40.435208 GENERIC: 1.0: enabled 1
658 14:37:40.438465 GENERIC: 0.0: enabled 1
659 14:37:40.441978 GENERIC: 1.0: enabled 1
660 14:37:40.444756 USB0 port 0: enabled 1
661 14:37:40.444863 GENERIC: 0.0: enabled 1
662 14:37:40.448038 USB0 port 0: enabled 1
663 14:37:40.451355 GENERIC: 0.0: enabled 1
664 14:37:40.451455 I2C: 00:1a: enabled 1
665 14:37:40.454901 I2C: 00:31: enabled 1
666 14:37:40.457945 I2C: 00:32: enabled 1
667 14:37:40.458049 I2C: 00:10: enabled 1
668 14:37:40.461350 I2C: 00:15: enabled 1
669 14:37:40.464817 GENERIC: 0.0: enabled 0
670 14:37:40.468140 GENERIC: 1.0: enabled 0
671 14:37:40.468248 GENERIC: 0.0: enabled 1
672 14:37:40.471458 SPI: 00: enabled 1
673 14:37:40.474640 SPI: 00: enabled 1
674 14:37:40.474717 PNP: 0c09.0: enabled 1
675 14:37:40.477852 GENERIC: 0.0: enabled 1
676 14:37:40.481130 USB3 port 0: enabled 1
677 14:37:40.481236 USB3 port 1: enabled 1
678 14:37:40.484591 USB3 port 2: enabled 0
679 14:37:40.487739 USB3 port 3: enabled 0
680 14:37:40.491143 USB2 port 0: enabled 0
681 14:37:40.491243 USB2 port 1: enabled 1
682 14:37:40.494524 USB2 port 2: enabled 1
683 14:37:40.497484 USB2 port 3: enabled 0
684 14:37:40.497560 USB2 port 4: enabled 1
685 14:37:40.500783 USB2 port 5: enabled 0
686 14:37:40.504799 USB2 port 6: enabled 0
687 14:37:40.507516 USB2 port 7: enabled 0
688 14:37:40.507625 USB2 port 8: enabled 0
689 14:37:40.510947 USB2 port 9: enabled 0
690 14:37:40.513999 USB3 port 0: enabled 0
691 14:37:40.514086 USB3 port 1: enabled 1
692 14:37:40.517298 USB3 port 2: enabled 0
693 14:37:40.521085 USB3 port 3: enabled 0
694 14:37:40.521172 GENERIC: 0.0: enabled 1
695 14:37:40.524108 GENERIC: 1.0: enabled 1
696 14:37:40.527344 APIC: 01: enabled 1
697 14:37:40.527431 APIC: 05: enabled 1
698 14:37:40.530847 APIC: 03: enabled 1
699 14:37:40.534199 APIC: 07: enabled 1
700 14:37:40.534286 APIC: 06: enabled 1
701 14:37:40.537328 APIC: 04: enabled 1
702 14:37:40.540904 APIC: 02: enabled 1
703 14:37:40.540991 Compare with tree...
704 14:37:40.543943 Root Device: enabled 1
705 14:37:40.547086 DOMAIN: 0000: enabled 1
706 14:37:40.550287 PCI: 00:00.0: enabled 1
707 14:37:40.550374 PCI: 00:02.0: enabled 1
708 14:37:40.553831 PCI: 00:04.0: enabled 1
709 14:37:40.556889 GENERIC: 0.0: enabled 1
710 14:37:40.560375 PCI: 00:05.0: enabled 1
711 14:37:40.563854 PCI: 00:06.0: enabled 0
712 14:37:40.563961 PCI: 00:07.0: enabled 0
713 14:37:40.566895 GENERIC: 0.0: enabled 1
714 14:37:40.570491 PCI: 00:07.1: enabled 0
715 14:37:40.573507 GENERIC: 1.0: enabled 1
716 14:37:40.576858 PCI: 00:07.2: enabled 0
717 14:37:40.576963 GENERIC: 0.0: enabled 1
718 14:37:40.580144 PCI: 00:07.3: enabled 0
719 14:37:40.583694 GENERIC: 1.0: enabled 1
720 14:37:40.586779 PCI: 00:08.0: enabled 1
721 14:37:40.589818 PCI: 00:09.0: enabled 0
722 14:37:40.589893 PCI: 00:0a.0: enabled 0
723 14:37:40.593212 PCI: 00:0d.0: enabled 1
724 14:37:40.596701 USB0 port 0: enabled 1
725 14:37:40.599839 USB3 port 0: enabled 1
726 14:37:40.603284 USB3 port 1: enabled 1
727 14:37:40.606500 USB3 port 2: enabled 0
728 14:37:40.606573 USB3 port 3: enabled 0
729 14:37:40.609767 PCI: 00:0d.1: enabled 0
730 14:37:40.613163 PCI: 00:0d.2: enabled 0
731 14:37:40.616418 GENERIC: 0.0: enabled 1
732 14:37:40.619797 PCI: 00:0d.3: enabled 0
733 14:37:40.619874 PCI: 00:0e.0: enabled 0
734 14:37:40.622958 PCI: 00:10.2: enabled 1
735 14:37:40.626284 PCI: 00:10.6: enabled 0
736 14:37:40.629454 PCI: 00:10.7: enabled 0
737 14:37:40.632861 PCI: 00:12.0: enabled 0
738 14:37:40.632968 PCI: 00:12.6: enabled 0
739 14:37:40.635877 PCI: 00:13.0: enabled 0
740 14:37:40.639239 PCI: 00:14.0: enabled 1
741 14:37:40.642767 USB0 port 0: enabled 1
742 14:37:40.645840 USB2 port 0: enabled 0
743 14:37:40.645911 USB2 port 1: enabled 1
744 14:37:40.649405 USB2 port 2: enabled 1
745 14:37:40.652485 USB2 port 3: enabled 0
746 14:37:40.655854 USB2 port 4: enabled 1
747 14:37:40.659214 USB2 port 5: enabled 0
748 14:37:40.662194 USB2 port 6: enabled 0
749 14:37:40.662296 USB2 port 7: enabled 0
750 14:37:40.665713 USB2 port 8: enabled 0
751 14:37:40.669078 USB2 port 9: enabled 0
752 14:37:40.672662 USB3 port 0: enabled 0
753 14:37:40.675681 USB3 port 1: enabled 1
754 14:37:40.679086 USB3 port 2: enabled 0
755 14:37:40.679186 USB3 port 3: enabled 0
756 14:37:40.682048 PCI: 00:14.1: enabled 0
757 14:37:40.685254 PCI: 00:14.2: enabled 1
758 14:37:40.688921 PCI: 00:14.3: enabled 1
759 14:37:40.692236 GENERIC: 0.0: enabled 1
760 14:37:40.692341 PCI: 00:15.0: enabled 1
761 14:37:40.695375 I2C: 00:1a: enabled 1
762 14:37:40.698789 I2C: 00:31: enabled 1
763 14:37:40.702352 I2C: 00:32: enabled 1
764 14:37:40.705127 PCI: 00:15.1: enabled 1
765 14:37:40.705225 I2C: 00:10: enabled 1
766 14:37:40.708570 PCI: 00:15.2: enabled 1
767 14:37:40.712220 PCI: 00:15.3: enabled 1
768 14:37:40.715323 PCI: 00:16.0: enabled 1
769 14:37:40.718351 PCI: 00:16.1: enabled 0
770 14:37:40.718451 PCI: 00:16.2: enabled 0
771 14:37:40.721831 PCI: 00:16.3: enabled 0
772 14:37:40.725381 PCI: 00:16.4: enabled 0
773 14:37:40.729667 PCI: 00:16.5: enabled 0
774 14:37:40.729775 PCI: 00:17.0: enabled 1
775 14:37:40.732998 PCI: 00:19.0: enabled 0
776 14:37:40.736141 PCI: 00:19.1: enabled 1
777 14:37:40.739514 I2C: 00:15: enabled 1
778 14:37:40.739620 PCI: 00:19.2: enabled 0
779 14:37:40.742863 PCI: 00:1d.0: enabled 1
780 14:37:40.746136 GENERIC: 0.0: enabled 1
781 14:37:40.749324 PCI: 00:1e.0: enabled 1
782 14:37:40.753043 PCI: 00:1e.1: enabled 0
783 14:37:40.753148 PCI: 00:1e.2: enabled 1
784 14:37:40.756186 SPI: 00: enabled 1
785 14:37:40.759447 PCI: 00:1e.3: enabled 1
786 14:37:40.759562 SPI: 00: enabled 1
787 14:37:40.762973 PCI: 00:1f.0: enabled 1
788 14:37:40.765965 PNP: 0c09.0: enabled 1
789 14:37:40.769258 PCI: 00:1f.1: enabled 0
790 14:37:40.772430 PCI: 00:1f.2: enabled 1
791 14:37:40.775729 GENERIC: 0.0: enabled 1
792 14:37:40.775808 GENERIC: 0.0: enabled 1
793 14:37:40.827483 GENERIC: 1.0: enabled 1
794 14:37:40.827611 PCI: 00:1f.3: enabled 1
795 14:37:40.827907 PCI: 00:1f.4: enabled 0
796 14:37:40.827987 PCI: 00:1f.5: enabled 1
797 14:37:40.828050 PCI: 00:1f.6: enabled 0
798 14:37:40.828109 PCI: 00:1f.7: enabled 0
799 14:37:40.828175 CPU_CLUSTER: 0: enabled 1
800 14:37:40.828232 APIC: 00: enabled 1
801 14:37:40.828288 APIC: 01: enabled 1
802 14:37:40.828380 APIC: 05: enabled 1
803 14:37:40.828467 APIC: 03: enabled 1
804 14:37:40.828557 APIC: 07: enabled 1
805 14:37:40.828660 APIC: 06: enabled 1
806 14:37:40.828752 APIC: 04: enabled 1
807 14:37:40.828837 APIC: 02: enabled 1
808 14:37:40.828924 Root Device scanning...
809 14:37:40.829010 scan_static_bus for Root Device
810 14:37:40.829109 DOMAIN: 0000 enabled
811 14:37:40.829199 CPU_CLUSTER: 0 enabled
812 14:37:40.829285 DOMAIN: 0000 scanning...
813 14:37:40.853910 PCI: pci_scan_bus for bus 00
814 14:37:40.854025 PCI: 00:00.0 [8086/0000] ops
815 14:37:40.854300 PCI: 00:00.0 [8086/9a12] enabled
816 14:37:40.854379 PCI: 00:02.0 [8086/0000] bus ops
817 14:37:40.854634 PCI: 00:02.0 [8086/9a40] enabled
818 14:37:40.854702 PCI: 00:04.0 [8086/0000] bus ops
819 14:37:40.854950 PCI: 00:04.0 [8086/9a03] enabled
820 14:37:40.855016 PCI: 00:05.0 [8086/9a19] enabled
821 14:37:40.860482 PCI: 00:07.0 [0000/0000] hidden
822 14:37:40.863930 PCI: 00:08.0 [8086/9a11] enabled
823 14:37:40.864003 PCI: 00:0a.0 [8086/9a0d] disabled
824 14:37:40.867351 PCI: 00:0d.0 [8086/0000] bus ops
825 14:37:40.870338 PCI: 00:0d.0 [8086/9a13] enabled
826 14:37:40.873808 PCI: 00:14.0 [8086/0000] bus ops
827 14:37:40.877475 PCI: 00:14.0 [8086/a0ed] enabled
828 14:37:40.880338 PCI: 00:14.2 [8086/a0ef] enabled
829 14:37:40.883783 PCI: 00:14.3 [8086/0000] bus ops
830 14:37:40.887337 PCI: 00:14.3 [8086/a0f0] enabled
831 14:37:40.890167 PCI: 00:15.0 [8086/0000] bus ops
832 14:37:40.893504 PCI: 00:15.0 [8086/a0e8] enabled
833 14:37:40.897022 PCI: 00:15.1 [8086/0000] bus ops
834 14:37:40.900198 PCI: 00:15.1 [8086/a0e9] enabled
835 14:37:40.903521 PCI: 00:15.2 [8086/0000] bus ops
836 14:37:40.906920 PCI: 00:15.2 [8086/a0ea] enabled
837 14:37:40.910029 PCI: 00:15.3 [8086/0000] bus ops
838 14:37:40.913438 PCI: 00:15.3 [8086/a0eb] enabled
839 14:37:40.916804 PCI: 00:16.0 [8086/0000] ops
840 14:37:40.920212 PCI: 00:16.0 [8086/a0e0] enabled
841 14:37:40.926684 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 14:37:40.929786 PCI: 00:19.0 [8086/0000] bus ops
843 14:37:40.933339 PCI: 00:19.0 [8086/a0c5] disabled
844 14:37:40.936535 PCI: 00:19.1 [8086/0000] bus ops
845 14:37:40.939879 PCI: 00:19.1 [8086/a0c6] enabled
846 14:37:40.942765 PCI: 00:1d.0 [8086/0000] bus ops
847 14:37:40.946369 PCI: 00:1d.0 [8086/a0b0] enabled
848 14:37:40.949815 PCI: 00:1e.0 [8086/0000] ops
849 14:37:40.953036 PCI: 00:1e.0 [8086/a0a8] enabled
850 14:37:40.956187 PCI: 00:1e.2 [8086/0000] bus ops
851 14:37:40.959485 PCI: 00:1e.2 [8086/a0aa] enabled
852 14:37:40.962956 PCI: 00:1e.3 [8086/0000] bus ops
853 14:37:40.966044 PCI: 00:1e.3 [8086/a0ab] enabled
854 14:37:40.969635 PCI: 00:1f.0 [8086/0000] bus ops
855 14:37:40.972807 PCI: 00:1f.0 [8086/a087] enabled
856 14:37:40.972914 RTC Init
857 14:37:40.976214 Set power on after power failure.
858 14:37:40.979311 Disabling Deep S3
859 14:37:40.982592 Disabling Deep S3
860 14:37:40.982695 Disabling Deep S4
861 14:37:40.985851 Disabling Deep S4
862 14:37:40.985949 Disabling Deep S5
863 14:37:40.989014 Disabling Deep S5
864 14:37:40.992424 PCI: 00:1f.2 [0000/0000] hidden
865 14:37:40.995468 PCI: 00:1f.3 [8086/0000] bus ops
866 14:37:40.998879 PCI: 00:1f.3 [8086/a0c8] enabled
867 14:37:41.002405 PCI: 00:1f.5 [8086/0000] bus ops
868 14:37:41.005964 PCI: 00:1f.5 [8086/a0a4] enabled
869 14:37:41.008856 PCI: Leftover static devices:
870 14:37:41.008940 PCI: 00:10.2
871 14:37:41.011959 PCI: 00:10.6
872 14:37:41.012032 PCI: 00:10.7
873 14:37:41.012094 PCI: 00:06.0
874 14:37:41.015396 PCI: 00:07.1
875 14:37:41.015500 PCI: 00:07.2
876 14:37:41.018443 PCI: 00:07.3
877 14:37:41.018542 PCI: 00:09.0
878 14:37:41.022010 PCI: 00:0d.1
879 14:37:41.022106 PCI: 00:0d.2
880 14:37:41.022200 PCI: 00:0d.3
881 14:37:41.025496 PCI: 00:0e.0
882 14:37:41.025596 PCI: 00:12.0
883 14:37:41.028718 PCI: 00:12.6
884 14:37:41.028794 PCI: 00:13.0
885 14:37:41.028856 PCI: 00:14.1
886 14:37:41.031590 PCI: 00:16.1
887 14:37:41.031714 PCI: 00:16.2
888 14:37:41.035318 PCI: 00:16.3
889 14:37:41.035418 PCI: 00:16.4
890 14:37:41.035511 PCI: 00:16.5
891 14:37:41.038598 PCI: 00:17.0
892 14:37:41.038704 PCI: 00:19.2
893 14:37:41.041913 PCI: 00:1e.1
894 14:37:41.042011 PCI: 00:1f.1
895 14:37:41.045002 PCI: 00:1f.4
896 14:37:41.045074 PCI: 00:1f.6
897 14:37:41.045141 PCI: 00:1f.7
898 14:37:41.048151 PCI: Check your devicetree.cb.
899 14:37:41.051691 PCI: 00:02.0 scanning...
900 14:37:41.055049 scan_generic_bus for PCI: 00:02.0
901 14:37:41.058209 scan_generic_bus for PCI: 00:02.0 done
902 14:37:41.065012 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 14:37:41.068491 PCI: 00:04.0 scanning...
904 14:37:41.071626 scan_generic_bus for PCI: 00:04.0
905 14:37:41.071715 GENERIC: 0.0 enabled
906 14:37:41.078552 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 14:37:41.084773 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 14:37:41.084878 PCI: 00:0d.0 scanning...
909 14:37:41.087789 scan_static_bus for PCI: 00:0d.0
910 14:37:41.091185 USB0 port 0 enabled
911 14:37:41.094528 USB0 port 0 scanning...
912 14:37:41.098056 scan_static_bus for USB0 port 0
913 14:37:41.100981 USB3 port 0 enabled
914 14:37:41.101052 USB3 port 1 enabled
915 14:37:41.104634 USB3 port 2 disabled
916 14:37:41.104708 USB3 port 3 disabled
917 14:37:41.107875 USB3 port 0 scanning...
918 14:37:41.110940 scan_static_bus for USB3 port 0
919 14:37:41.114407 scan_static_bus for USB3 port 0 done
920 14:37:41.120632 scan_bus: bus USB3 port 0 finished in 6 msecs
921 14:37:41.120758 USB3 port 1 scanning...
922 14:37:41.124696 scan_static_bus for USB3 port 1
923 14:37:41.130989 scan_static_bus for USB3 port 1 done
924 14:37:41.134290 scan_bus: bus USB3 port 1 finished in 6 msecs
925 14:37:41.137800 scan_static_bus for USB0 port 0 done
926 14:37:41.143998 scan_bus: bus USB0 port 0 finished in 43 msecs
927 14:37:41.147782 scan_static_bus for PCI: 00:0d.0 done
928 14:37:41.150662 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 14:37:41.153957 PCI: 00:14.0 scanning...
930 14:37:41.157415 scan_static_bus for PCI: 00:14.0
931 14:37:41.160930 USB0 port 0 enabled
932 14:37:41.161036 USB0 port 0 scanning...
933 14:37:41.164041 scan_static_bus for USB0 port 0
934 14:37:41.167521 USB2 port 0 disabled
935 14:37:41.170413 USB2 port 1 enabled
936 14:37:41.170512 USB2 port 2 enabled
937 14:37:41.173832 USB2 port 3 disabled
938 14:37:41.177466 USB2 port 4 enabled
939 14:37:41.177569 USB2 port 5 disabled
940 14:37:41.180592 USB2 port 6 disabled
941 14:37:41.183872 USB2 port 7 disabled
942 14:37:41.183945 USB2 port 8 disabled
943 14:37:41.186959 USB2 port 9 disabled
944 14:37:41.187061 USB3 port 0 disabled
945 14:37:41.190543 USB3 port 1 enabled
946 14:37:41.193644 USB3 port 2 disabled
947 14:37:41.193729 USB3 port 3 disabled
948 14:37:41.196760 USB2 port 1 scanning...
949 14:37:41.200460 scan_static_bus for USB2 port 1
950 14:37:41.203409 scan_static_bus for USB2 port 1 done
951 14:37:41.210418 scan_bus: bus USB2 port 1 finished in 6 msecs
952 14:37:41.210528 USB2 port 2 scanning...
953 14:37:41.213775 scan_static_bus for USB2 port 2
954 14:37:41.220267 scan_static_bus for USB2 port 2 done
955 14:37:41.223366 scan_bus: bus USB2 port 2 finished in 6 msecs
956 14:37:41.227001 USB2 port 4 scanning...
957 14:37:41.230167 scan_static_bus for USB2 port 4
958 14:37:41.233482 scan_static_bus for USB2 port 4 done
959 14:37:41.236874 scan_bus: bus USB2 port 4 finished in 6 msecs
960 14:37:41.239825 USB3 port 1 scanning...
961 14:37:41.243484 scan_static_bus for USB3 port 1
962 14:37:41.246673 scan_static_bus for USB3 port 1 done
963 14:37:41.253280 scan_bus: bus USB3 port 1 finished in 6 msecs
964 14:37:41.256687 scan_static_bus for USB0 port 0 done
965 14:37:41.259877 scan_bus: bus USB0 port 0 finished in 93 msecs
966 14:37:41.263043 scan_static_bus for PCI: 00:14.0 done
967 14:37:41.269656 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
968 14:37:41.269761 PCI: 00:14.3 scanning...
969 14:37:41.273344 scan_static_bus for PCI: 00:14.3
970 14:37:41.276691 GENERIC: 0.0 enabled
971 14:37:41.279750 scan_static_bus for PCI: 00:14.3 done
972 14:37:41.286596 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 14:37:41.289598 PCI: 00:15.0 scanning...
974 14:37:41.293290 scan_static_bus for PCI: 00:15.0
975 14:37:41.293394 I2C: 00:1a enabled
976 14:37:41.296403 I2C: 00:31 enabled
977 14:37:41.296481 I2C: 00:32 enabled
978 14:37:41.303186 scan_static_bus for PCI: 00:15.0 done
979 14:37:41.307098 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 14:37:41.307186 PCI: 00:15.1 scanning...
981 14:37:41.310593 scan_static_bus for PCI: 00:15.1
982 14:37:41.313680 I2C: 00:10 enabled
983 14:37:41.317119 scan_static_bus for PCI: 00:15.1 done
984 14:37:41.323704 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 14:37:41.323787 PCI: 00:15.2 scanning...
986 14:37:41.327280 scan_static_bus for PCI: 00:15.2
987 14:37:41.333773 scan_static_bus for PCI: 00:15.2 done
988 14:37:41.337245 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 14:37:41.340318 PCI: 00:15.3 scanning...
990 14:37:41.343558 scan_static_bus for PCI: 00:15.3
991 14:37:41.346794 scan_static_bus for PCI: 00:15.3 done
992 14:37:41.350274 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 14:37:41.353659 PCI: 00:19.1 scanning...
994 14:37:41.357073 scan_static_bus for PCI: 00:19.1
995 14:37:41.360335 I2C: 00:15 enabled
996 14:37:41.363829 scan_static_bus for PCI: 00:19.1 done
997 14:37:41.367138 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 14:37:41.370021 PCI: 00:1d.0 scanning...
999 14:37:41.373280 do_pci_scan_bridge for PCI: 00:1d.0
1000 14:37:41.376695 PCI: pci_scan_bus for bus 01
1001 14:37:41.379778 PCI: 01:00.0 [15b7/5009] enabled
1002 14:37:41.383538 GENERIC: 0.0 enabled
1003 14:37:41.386705 Enabling Common Clock Configuration
1004 14:37:41.390042 L1 Sub-State supported from root port 29
1005 14:37:41.393131 L1 Sub-State Support = 0x5
1006 14:37:41.396509 CommonModeRestoreTime = 0x28
1007 14:37:41.399867 Power On Value = 0x16, Power On Scale = 0x0
1008 14:37:41.402714 ASPM: Enabled L1
1009 14:37:41.406191 PCIe: Max_Payload_Size adjusted to 128
1010 14:37:41.413081 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 14:37:41.413167 PCI: 00:1e.2 scanning...
1012 14:37:41.419533 scan_generic_bus for PCI: 00:1e.2
1013 14:37:41.419618 SPI: 00 enabled
1014 14:37:41.426206 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 14:37:41.429365 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 14:37:41.432726 PCI: 00:1e.3 scanning...
1017 14:37:41.436048 scan_generic_bus for PCI: 00:1e.3
1018 14:37:41.439348 SPI: 00 enabled
1019 14:37:41.446170 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 14:37:41.449428 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 14:37:41.452381 PCI: 00:1f.0 scanning...
1022 14:37:41.455707 scan_static_bus for PCI: 00:1f.0
1023 14:37:41.455791 PNP: 0c09.0 enabled
1024 14:37:41.459394 PNP: 0c09.0 scanning...
1025 14:37:41.462185 scan_static_bus for PNP: 0c09.0
1026 14:37:41.466044 scan_static_bus for PNP: 0c09.0 done
1027 14:37:41.472372 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 14:37:41.476100 scan_static_bus for PCI: 00:1f.0 done
1029 14:37:41.479401 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 14:37:41.482214 PCI: 00:1f.2 scanning...
1031 14:37:41.485489 scan_static_bus for PCI: 00:1f.2
1032 14:37:41.489176 GENERIC: 0.0 enabled
1033 14:37:41.492269 GENERIC: 0.0 scanning...
1034 14:37:41.495853 scan_static_bus for GENERIC: 0.0
1035 14:37:41.495936 GENERIC: 0.0 enabled
1036 14:37:41.498823 GENERIC: 1.0 enabled
1037 14:37:41.502339 scan_static_bus for GENERIC: 0.0 done
1038 14:37:41.508784 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 14:37:41.511937 scan_static_bus for PCI: 00:1f.2 done
1040 14:37:41.515373 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 14:37:41.518690 PCI: 00:1f.3 scanning...
1042 14:37:41.521987 scan_static_bus for PCI: 00:1f.3
1043 14:37:41.525148 scan_static_bus for PCI: 00:1f.3 done
1044 14:37:41.531843 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 14:37:41.531926 PCI: 00:1f.5 scanning...
1046 14:37:41.535234 scan_generic_bus for PCI: 00:1f.5
1047 14:37:41.541495 scan_generic_bus for PCI: 00:1f.5 done
1048 14:37:41.544808 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 14:37:41.551742 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1050 14:37:41.554745 scan_static_bus for Root Device done
1051 14:37:41.558310 scan_bus: bus Root Device finished in 736 msecs
1052 14:37:41.558393 done
1053 14:37:41.564863 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1054 14:37:41.567979 Chrome EC: UHEPI supported
1055 14:37:41.575095 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 14:37:41.581524 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 14:37:41.584529 SPI flash protection: WPSW=0 SRP0=1
1058 14:37:41.587618 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 14:37:41.594435 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 14:37:41.597562 found VGA at PCI: 00:02.0
1061 14:37:41.601123 Setting up VGA for PCI: 00:02.0
1062 14:37:41.607589 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 14:37:41.610815 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 14:37:41.614463 Allocating resources...
1065 14:37:41.614545 Reading resources...
1066 14:37:41.621093 Root Device read_resources bus 0 link: 0
1067 14:37:41.624223 DOMAIN: 0000 read_resources bus 0 link: 0
1068 14:37:41.630468 PCI: 00:04.0 read_resources bus 1 link: 0
1069 14:37:41.633848 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 14:37:41.640433 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 14:37:41.643685 USB0 port 0 read_resources bus 0 link: 0
1072 14:37:41.650304 USB0 port 0 read_resources bus 0 link: 0 done
1073 14:37:41.653924 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 14:37:41.657144 PCI: 00:14.0 read_resources bus 0 link: 0
1075 14:37:41.663549 USB0 port 0 read_resources bus 0 link: 0
1076 14:37:41.667041 USB0 port 0 read_resources bus 0 link: 0 done
1077 14:37:41.673829 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 14:37:41.677188 PCI: 00:14.3 read_resources bus 0 link: 0
1079 14:37:41.683771 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 14:37:41.686944 PCI: 00:15.0 read_resources bus 0 link: 0
1081 14:37:41.693920 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 14:37:41.696984 PCI: 00:15.1 read_resources bus 0 link: 0
1083 14:37:41.704152 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 14:37:41.706746 PCI: 00:19.1 read_resources bus 0 link: 0
1085 14:37:41.714100 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 14:37:41.717235 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 14:37:41.723925 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 14:37:41.727429 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 14:37:41.733812 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 14:37:41.737165 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 14:37:41.743746 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 14:37:41.746854 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 14:37:41.753573 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 14:37:41.756720 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 14:37:41.760268 GENERIC: 0.0 read_resources bus 0 link: 0
1096 14:37:41.767421 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 14:37:41.770644 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 14:37:41.778266 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 14:37:41.781921 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 14:37:41.788131 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 14:37:41.791144 Root Device read_resources bus 0 link: 0 done
1102 14:37:41.794257 Done reading resources.
1103 14:37:41.801187 Show resources in subtree (Root Device)...After reading.
1104 14:37:41.804405 Root Device child on link 0 DOMAIN: 0000
1105 14:37:41.807849 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 14:37:41.817860 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 14:37:41.827779 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 14:37:41.830634 PCI: 00:00.0
1109 14:37:41.841194 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 14:37:41.847696 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 14:37:41.857426 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 14:37:41.867469 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 14:37:41.877042 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 14:37:41.887423 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 14:37:41.896941 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 14:37:41.903549 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 14:37:41.913437 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 14:37:41.923695 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 14:37:41.933690 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 14:37:41.943268 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 14:37:41.952976 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 14:37:41.959932 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 14:37:41.969708 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 14:37:41.979320 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 14:37:41.989573 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 14:37:41.999506 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 14:37:42.008992 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 14:37:42.018839 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 14:37:42.018924 PCI: 00:02.0
1130 14:37:42.029044 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 14:37:42.039075 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 14:37:42.048598 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 14:37:42.052094 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 14:37:42.065563 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 14:37:42.065647 GENERIC: 0.0
1136 14:37:42.068676 PCI: 00:05.0
1137 14:37:42.078365 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 14:37:42.081336 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 14:37:42.084828 GENERIC: 0.0
1140 14:37:42.084910 PCI: 00:08.0
1141 14:37:42.094662 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 14:37:42.097817 PCI: 00:0a.0
1143 14:37:42.101660 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 14:37:42.111453 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 14:37:42.114391 USB0 port 0 child on link 0 USB3 port 0
1146 14:37:42.117910 USB3 port 0
1147 14:37:42.117992 USB3 port 1
1148 14:37:42.121052 USB3 port 2
1149 14:37:42.121135 USB3 port 3
1150 14:37:42.127871 PCI: 00:14.0 child on link 0 USB0 port 0
1151 14:37:42.137579 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 14:37:42.140854 USB0 port 0 child on link 0 USB2 port 0
1153 14:37:42.143969 USB2 port 0
1154 14:37:42.144052 USB2 port 1
1155 14:37:42.147201 USB2 port 2
1156 14:37:42.147283 USB2 port 3
1157 14:37:42.151027 USB2 port 4
1158 14:37:42.151110 USB2 port 5
1159 14:37:42.154112 USB2 port 6
1160 14:37:42.154194 USB2 port 7
1161 14:37:42.157511 USB2 port 8
1162 14:37:42.160440 USB2 port 9
1163 14:37:42.160523 USB3 port 0
1164 14:37:42.163839 USB3 port 1
1165 14:37:42.163922 USB3 port 2
1166 14:37:42.167435 USB3 port 3
1167 14:37:42.167546 PCI: 00:14.2
1168 14:37:42.177103 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 14:37:42.186979 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 14:37:42.193426 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 14:37:42.203466 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 14:37:42.203577 GENERIC: 0.0
1173 14:37:42.206657 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 14:37:42.216914 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 14:37:42.220315 I2C: 00:1a
1176 14:37:42.220401 I2C: 00:31
1177 14:37:42.223162 I2C: 00:32
1178 14:37:42.226749 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 14:37:42.236385 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 14:37:42.239629 I2C: 00:10
1181 14:37:42.239761 PCI: 00:15.2
1182 14:37:42.249539 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 14:37:42.253281 PCI: 00:15.3
1184 14:37:42.262814 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 14:37:42.262898 PCI: 00:16.0
1186 14:37:42.272547 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 14:37:42.275868 PCI: 00:19.0
1188 14:37:42.279554 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 14:37:42.289248 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 14:37:42.292249 I2C: 00:15
1191 14:37:42.295894 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 14:37:42.305435 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 14:37:42.315369 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 14:37:42.322210 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 14:37:42.325762 GENERIC: 0.0
1196 14:37:42.325845 PCI: 01:00.0
1197 14:37:42.336177 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 14:37:42.345215 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1199 14:37:42.348447 PCI: 00:1e.0
1200 14:37:42.358213 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1201 14:37:42.361599 PCI: 00:1e.2 child on link 0 SPI: 00
1202 14:37:42.371734 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 14:37:42.375000 SPI: 00
1204 14:37:42.378454 PCI: 00:1e.3 child on link 0 SPI: 00
1205 14:37:42.388276 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 14:37:42.388362 SPI: 00
1207 14:37:42.394909 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1208 14:37:42.401577 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1209 14:37:42.404383 PNP: 0c09.0
1210 14:37:42.414608 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1211 14:37:42.417984 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1212 14:37:42.427908 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1213 14:37:42.437254 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1214 14:37:42.440863 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1215 14:37:42.444498 GENERIC: 0.0
1216 14:37:42.444581 GENERIC: 1.0
1217 14:37:42.447310 PCI: 00:1f.3
1218 14:37:42.457515 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 14:37:42.467160 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 14:37:42.467245 PCI: 00:1f.5
1221 14:37:42.476960 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1222 14:37:42.480372 CPU_CLUSTER: 0 child on link 0 APIC: 00
1223 14:37:42.483582 APIC: 00
1224 14:37:42.483699 APIC: 01
1225 14:37:42.487080 APIC: 05
1226 14:37:42.487162 APIC: 03
1227 14:37:42.487226 APIC: 07
1228 14:37:42.489986 APIC: 06
1229 14:37:42.490069 APIC: 04
1230 14:37:42.490134 APIC: 02
1231 14:37:42.500029 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1232 14:37:42.506654 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1233 14:37:42.509914 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1234 14:37:42.516786 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1235 14:37:42.519951 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1236 14:37:42.526408 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1237 14:37:42.533192 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1238 14:37:42.539759 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1239 14:37:42.546031 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1240 14:37:42.556181 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1241 14:37:42.562630 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1242 14:37:42.569241 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1243 14:37:42.575951 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1244 14:37:42.582583 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1245 14:37:42.586124 DOMAIN: 0000: Resource ranges:
1246 14:37:42.589405 * Base: 1000, Size: 800, Tag: 100
1247 14:37:42.595832 * Base: 1900, Size: e700, Tag: 100
1248 14:37:42.599136 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1249 14:37:42.605601 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1250 14:37:42.611979 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1251 14:37:42.621781 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1252 14:37:42.628538 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1253 14:37:42.635073 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1254 14:37:42.645322 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1255 14:37:42.651462 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1256 14:37:42.658403 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1257 14:37:42.668291 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1258 14:37:42.674480 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1259 14:37:42.681362 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1260 14:37:42.691052 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1261 14:37:42.697691 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1262 14:37:42.704570 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1263 14:37:42.714236 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1264 14:37:42.720964 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1265 14:37:42.727563 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1266 14:37:42.737054 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1267 14:37:42.744329 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1268 14:37:42.750999 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1269 14:37:42.760392 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1270 14:37:42.766899 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1271 14:37:42.773271 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1272 14:37:42.783291 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1273 14:37:42.786637 DOMAIN: 0000: Resource ranges:
1274 14:37:42.790004 * Base: 7fc00000, Size: 40400000, Tag: 200
1275 14:37:42.793182 * Base: d0000000, Size: 28000000, Tag: 200
1276 14:37:42.799872 * Base: fa000000, Size: 1000000, Tag: 200
1277 14:37:42.803308 * Base: fb001000, Size: 2fff000, Tag: 200
1278 14:37:42.806561 * Base: fe010000, Size: 2e000, Tag: 200
1279 14:37:42.813433 * Base: fe03f000, Size: d41000, Tag: 200
1280 14:37:42.816489 * Base: fed88000, Size: 8000, Tag: 200
1281 14:37:42.819766 * Base: fed93000, Size: d000, Tag: 200
1282 14:37:42.823179 * Base: feda2000, Size: 1e000, Tag: 200
1283 14:37:42.829887 * Base: fede0000, Size: 1220000, Tag: 200
1284 14:37:42.833117 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1285 14:37:42.839626 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1286 14:37:42.846325 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1287 14:37:42.852870 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1288 14:37:42.859241 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1289 14:37:42.865868 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1290 14:37:42.872360 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1291 14:37:42.879301 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1292 14:37:42.885801 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1293 14:37:42.892409 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1294 14:37:42.898699 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1295 14:37:42.905473 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1296 14:37:42.911728 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1297 14:37:42.918698 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1298 14:37:42.925241 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1299 14:37:42.931889 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1300 14:37:42.938517 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1301 14:37:42.944950 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1302 14:37:42.951468 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1303 14:37:42.957804 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1304 14:37:42.964552 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1305 14:37:42.971238 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1306 14:37:42.977723 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1307 14:37:42.987901 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1308 14:37:42.994290 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1309 14:37:42.997255 PCI: 00:1d.0: Resource ranges:
1310 14:37:43.001009 * Base: 7fc00000, Size: 100000, Tag: 200
1311 14:37:43.007817 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1312 14:37:43.013666 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1313 14:37:43.023822 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1314 14:37:43.030299 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1315 14:37:43.037016 Root Device assign_resources, bus 0 link: 0
1316 14:37:43.039922 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 14:37:43.050398 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1318 14:37:43.056876 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1319 14:37:43.062776 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1320 14:37:43.073303 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1321 14:37:43.076494 PCI: 00:04.0 assign_resources, bus 1 link: 0
1322 14:37:43.083034 PCI: 00:04.0 assign_resources, bus 1 link: 0
1323 14:37:43.089712 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1324 14:37:43.099186 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1325 14:37:43.105915 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1326 14:37:43.112123 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1327 14:37:43.115540 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1328 14:37:43.125443 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1329 14:37:43.128801 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 14:37:43.131532 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 14:37:43.141633 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1332 14:37:43.148505 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1333 14:37:43.158065 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1334 14:37:43.161370 PCI: 00:14.3 assign_resources, bus 0 link: 0
1335 14:37:43.168122 PCI: 00:14.3 assign_resources, bus 0 link: 0
1336 14:37:43.174745 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1337 14:37:43.178271 PCI: 00:15.0 assign_resources, bus 0 link: 0
1338 14:37:43.184703 PCI: 00:15.0 assign_resources, bus 0 link: 0
1339 14:37:43.191459 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1340 14:37:43.197946 PCI: 00:15.1 assign_resources, bus 0 link: 0
1341 14:37:43.201063 PCI: 00:15.1 assign_resources, bus 0 link: 0
1342 14:37:43.210770 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1343 14:37:43.217529 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1344 14:37:43.227389 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1345 14:37:43.234320 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1346 14:37:43.240503 PCI: 00:19.1 assign_resources, bus 0 link: 0
1347 14:37:43.243866 PCI: 00:19.1 assign_resources, bus 0 link: 0
1348 14:37:43.253823 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1349 14:37:43.263461 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1350 14:37:43.270451 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1351 14:37:43.276704 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 14:37:43.283417 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1353 14:37:43.292868 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1354 14:37:43.296495 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 14:37:43.306107 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1356 14:37:43.309915 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1357 14:37:43.312785 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1358 14:37:43.322697 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1359 14:37:43.326033 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1360 14:37:43.332295 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1361 14:37:43.335700 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1362 14:37:43.342259 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1363 14:37:43.345680 LPC: Trying to open IO window from 800 size 1ff
1364 14:37:43.355572 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1365 14:37:43.361979 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1366 14:37:43.371809 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1367 14:37:43.375141 DOMAIN: 0000 assign_resources, bus 0 link: 0
1368 14:37:43.378701 Root Device assign_resources, bus 0 link: 0
1369 14:37:43.382183 Done setting resources.
1370 14:37:43.388215 Show resources in subtree (Root Device)...After assigning values.
1371 14:37:43.394648 Root Device child on link 0 DOMAIN: 0000
1372 14:37:43.398393 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1373 14:37:43.407816 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1374 14:37:43.417714 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1375 14:37:43.417824 PCI: 00:00.0
1376 14:37:43.427759 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1377 14:37:43.437478 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1378 14:37:43.447390 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1379 14:37:43.457307 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1380 14:37:43.467200 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1381 14:37:43.473748 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1382 14:37:43.483790 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1383 14:37:43.493828 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1384 14:37:43.503689 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1385 14:37:43.513448 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1386 14:37:43.520499 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1387 14:37:43.530218 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1388 14:37:43.539600 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1389 14:37:43.549867 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1390 14:37:43.559475 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1391 14:37:43.569707 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1392 14:37:43.579698 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1393 14:37:43.586484 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1394 14:37:43.595748 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1395 14:37:43.605848 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1396 14:37:43.608927 PCI: 00:02.0
1397 14:37:43.619390 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1398 14:37:43.629302 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1399 14:37:43.638696 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1400 14:37:43.642042 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1401 14:37:43.655207 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1402 14:37:43.655291 GENERIC: 0.0
1403 14:37:43.658594 PCI: 00:05.0
1404 14:37:43.668595 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1405 14:37:43.671596 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1406 14:37:43.675204 GENERIC: 0.0
1407 14:37:43.675285 PCI: 00:08.0
1408 14:37:43.684791 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1409 14:37:43.688503 PCI: 00:0a.0
1410 14:37:43.691471 PCI: 00:0d.0 child on link 0 USB0 port 0
1411 14:37:43.701438 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1412 14:37:43.708090 USB0 port 0 child on link 0 USB3 port 0
1413 14:37:43.708172 USB3 port 0
1414 14:37:43.711331 USB3 port 1
1415 14:37:43.711413 USB3 port 2
1416 14:37:43.714937 USB3 port 3
1417 14:37:43.717783 PCI: 00:14.0 child on link 0 USB0 port 0
1418 14:37:43.728135 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1419 14:37:43.734531 USB0 port 0 child on link 0 USB2 port 0
1420 14:37:43.734628 USB2 port 0
1421 14:37:43.737616 USB2 port 1
1422 14:37:43.737698 USB2 port 2
1423 14:37:43.741054 USB2 port 3
1424 14:37:43.741135 USB2 port 4
1425 14:37:43.744598 USB2 port 5
1426 14:37:43.744679 USB2 port 6
1427 14:37:43.748241 USB2 port 7
1428 14:37:43.748322 USB2 port 8
1429 14:37:43.751089 USB2 port 9
1430 14:37:43.754235 USB3 port 0
1431 14:37:43.754317 USB3 port 1
1432 14:37:43.757674 USB3 port 2
1433 14:37:43.757755 USB3 port 3
1434 14:37:43.760651 PCI: 00:14.2
1435 14:37:43.771020 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1436 14:37:43.780703 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1437 14:37:43.783842 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1438 14:37:43.793854 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1439 14:37:43.797313 GENERIC: 0.0
1440 14:37:43.800452 PCI: 00:15.0 child on link 0 I2C: 00:1a
1441 14:37:43.810407 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1442 14:37:43.813855 I2C: 00:1a
1443 14:37:43.813944 I2C: 00:31
1444 14:37:43.816928 I2C: 00:32
1445 14:37:43.820133 PCI: 00:15.1 child on link 0 I2C: 00:10
1446 14:37:43.830059 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1447 14:37:43.833498 I2C: 00:10
1448 14:37:43.833579 PCI: 00:15.2
1449 14:37:43.843516 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1450 14:37:43.846655 PCI: 00:15.3
1451 14:37:43.856456 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1452 14:37:43.856539 PCI: 00:16.0
1453 14:37:43.869805 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1454 14:37:43.869888 PCI: 00:19.0
1455 14:37:43.873310 PCI: 00:19.1 child on link 0 I2C: 00:15
1456 14:37:43.885893 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1457 14:37:43.886006 I2C: 00:15
1458 14:37:43.889261 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1459 14:37:43.899465 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1460 14:37:43.912491 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1461 14:37:43.922354 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1462 14:37:43.922440 GENERIC: 0.0
1463 14:37:43.925713 PCI: 01:00.0
1464 14:37:43.935924 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1465 14:37:43.945954 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1466 14:37:43.948694 PCI: 00:1e.0
1467 14:37:43.958756 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1468 14:37:43.961937 PCI: 00:1e.2 child on link 0 SPI: 00
1469 14:37:43.971859 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1470 14:37:43.975177 SPI: 00
1471 14:37:43.978445 PCI: 00:1e.3 child on link 0 SPI: 00
1472 14:37:43.988221 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1473 14:37:43.991458 SPI: 00
1474 14:37:43.994835 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1475 14:37:44.004565 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1476 14:37:44.004649 PNP: 0c09.0
1477 14:37:44.014756 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1478 14:37:44.017923 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1479 14:37:44.027984 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1480 14:37:44.037757 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1481 14:37:44.040921 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1482 14:37:44.044435 GENERIC: 0.0
1483 14:37:44.044538 GENERIC: 1.0
1484 14:37:44.047818 PCI: 00:1f.3
1485 14:37:44.057785 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1486 14:37:44.067542 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1487 14:37:44.071121 PCI: 00:1f.5
1488 14:37:44.080756 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1489 14:37:44.084238 CPU_CLUSTER: 0 child on link 0 APIC: 00
1490 14:37:44.084345 APIC: 00
1491 14:37:44.087471 APIC: 01
1492 14:37:44.087567 APIC: 05
1493 14:37:44.090462 APIC: 03
1494 14:37:44.090562 APIC: 07
1495 14:37:44.090651 APIC: 06
1496 14:37:44.093795 APIC: 04
1497 14:37:44.093891 APIC: 02
1498 14:37:44.097339 Done allocating resources.
1499 14:37:44.103768 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1500 14:37:44.110264 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1501 14:37:44.113834 Configure GPIOs for I2S audio on UP4.
1502 14:37:44.120504 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1503 14:37:44.123473 Enabling resources...
1504 14:37:44.126950 PCI: 00:00.0 subsystem <- 8086/9a12
1505 14:37:44.127030 PCI: 00:00.0 cmd <- 06
1506 14:37:44.133601 PCI: 00:02.0 subsystem <- 8086/9a40
1507 14:37:44.133708 PCI: 00:02.0 cmd <- 03
1508 14:37:44.136942 PCI: 00:04.0 subsystem <- 8086/9a03
1509 14:37:44.140203 PCI: 00:04.0 cmd <- 02
1510 14:37:44.143354 PCI: 00:05.0 subsystem <- 8086/9a19
1511 14:37:44.146902 PCI: 00:05.0 cmd <- 02
1512 14:37:44.149712 PCI: 00:08.0 subsystem <- 8086/9a11
1513 14:37:44.153175 PCI: 00:08.0 cmd <- 06
1514 14:37:44.156624 PCI: 00:0d.0 subsystem <- 8086/9a13
1515 14:37:44.159863 PCI: 00:0d.0 cmd <- 02
1516 14:37:44.163334 PCI: 00:14.0 subsystem <- 8086/a0ed
1517 14:37:44.166198 PCI: 00:14.0 cmd <- 02
1518 14:37:44.169588 PCI: 00:14.2 subsystem <- 8086/a0ef
1519 14:37:44.172966 PCI: 00:14.2 cmd <- 02
1520 14:37:44.176449 PCI: 00:14.3 subsystem <- 8086/a0f0
1521 14:37:44.179323 PCI: 00:14.3 cmd <- 02
1522 14:37:44.182524 PCI: 00:15.0 subsystem <- 8086/a0e8
1523 14:37:44.182626 PCI: 00:15.0 cmd <- 02
1524 14:37:44.189517 PCI: 00:15.1 subsystem <- 8086/a0e9
1525 14:37:44.189617 PCI: 00:15.1 cmd <- 02
1526 14:37:44.192700 PCI: 00:15.2 subsystem <- 8086/a0ea
1527 14:37:44.196046 PCI: 00:15.2 cmd <- 02
1528 14:37:44.199233 PCI: 00:15.3 subsystem <- 8086/a0eb
1529 14:37:44.202686 PCI: 00:15.3 cmd <- 02
1530 14:37:44.205768 PCI: 00:16.0 subsystem <- 8086/a0e0
1531 14:37:44.209037 PCI: 00:16.0 cmd <- 02
1532 14:37:44.212349 PCI: 00:19.1 subsystem <- 8086/a0c6
1533 14:37:44.215529 PCI: 00:19.1 cmd <- 02
1534 14:37:44.218993 PCI: 00:1d.0 bridge ctrl <- 0013
1535 14:37:44.222317 PCI: 00:1d.0 subsystem <- 8086/a0b0
1536 14:37:44.225495 PCI: 00:1d.0 cmd <- 06
1537 14:37:44.228966 PCI: 00:1e.0 subsystem <- 8086/a0a8
1538 14:37:44.231999 PCI: 00:1e.0 cmd <- 06
1539 14:37:44.235297 PCI: 00:1e.2 subsystem <- 8086/a0aa
1540 14:37:44.235403 PCI: 00:1e.2 cmd <- 06
1541 14:37:44.242114 PCI: 00:1e.3 subsystem <- 8086/a0ab
1542 14:37:44.242215 PCI: 00:1e.3 cmd <- 02
1543 14:37:44.248637 PCI: 00:1f.0 subsystem <- 8086/a087
1544 14:37:44.248710 PCI: 00:1f.0 cmd <- 407
1545 14:37:44.252030 PCI: 00:1f.3 subsystem <- 8086/a0c8
1546 14:37:44.255114 PCI: 00:1f.3 cmd <- 02
1547 14:37:44.258494 PCI: 00:1f.5 subsystem <- 8086/a0a4
1548 14:37:44.261798 PCI: 00:1f.5 cmd <- 406
1549 14:37:44.266274 PCI: 01:00.0 cmd <- 02
1550 14:37:44.270583 done.
1551 14:37:44.274004 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1552 14:37:44.277093 Initializing devices...
1553 14:37:44.280340 Root Device init
1554 14:37:44.284349 Chrome EC: Set SMI mask to 0x0000000000000000
1555 14:37:44.290344 Chrome EC: clear events_b mask to 0x0000000000000000
1556 14:37:44.297239 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1557 14:37:44.303910 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1558 14:37:44.309991 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1559 14:37:44.313443 Chrome EC: Set WAKE mask to 0x0000000000000000
1560 14:37:44.320668 fw_config match found: DB_USB=USB3_ACTIVE
1561 14:37:44.324024 Configure Right Type-C port orientation for retimer
1562 14:37:44.326967 Root Device init finished in 44 msecs
1563 14:37:44.330940 PCI: 00:00.0 init
1564 14:37:44.334280 CPU TDP = 9 Watts
1565 14:37:44.334377 CPU PL1 = 9 Watts
1566 14:37:44.337607 CPU PL2 = 40 Watts
1567 14:37:44.341471 CPU PL4 = 83 Watts
1568 14:37:44.344553 PCI: 00:00.0 init finished in 8 msecs
1569 14:37:44.344625 PCI: 00:02.0 init
1570 14:37:44.348085 GMA: Found VBT in CBFS
1571 14:37:44.350994 GMA: Found valid VBT in CBFS
1572 14:37:44.357357 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1573 14:37:44.364365 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1574 14:37:44.367534 PCI: 00:02.0 init finished in 18 msecs
1575 14:37:44.370643 PCI: 00:05.0 init
1576 14:37:44.374066 PCI: 00:05.0 init finished in 0 msecs
1577 14:37:44.377103 PCI: 00:08.0 init
1578 14:37:44.380542 PCI: 00:08.0 init finished in 0 msecs
1579 14:37:44.383988 PCI: 00:14.0 init
1580 14:37:44.387178 PCI: 00:14.0 init finished in 0 msecs
1581 14:37:44.390184 PCI: 00:14.2 init
1582 14:37:44.393709 PCI: 00:14.2 init finished in 0 msecs
1583 14:37:44.396999 PCI: 00:15.0 init
1584 14:37:44.400723 I2C bus 0 version 0x3230302a
1585 14:37:44.403367 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1586 14:37:44.406662 PCI: 00:15.0 init finished in 6 msecs
1587 14:37:44.409918 PCI: 00:15.1 init
1588 14:37:44.410015 I2C bus 1 version 0x3230302a
1589 14:37:44.417007 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1590 14:37:44.420171 PCI: 00:15.1 init finished in 6 msecs
1591 14:37:44.420253 PCI: 00:15.2 init
1592 14:37:44.423371 I2C bus 2 version 0x3230302a
1593 14:37:44.426596 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1594 14:37:44.433271 PCI: 00:15.2 init finished in 6 msecs
1595 14:37:44.433353 PCI: 00:15.3 init
1596 14:37:44.436638 I2C bus 3 version 0x3230302a
1597 14:37:44.439699 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1598 14:37:44.442886 PCI: 00:15.3 init finished in 6 msecs
1599 14:37:44.446446 PCI: 00:16.0 init
1600 14:37:44.449613 PCI: 00:16.0 init finished in 0 msecs
1601 14:37:44.452864 PCI: 00:19.1 init
1602 14:37:44.456268 I2C bus 5 version 0x3230302a
1603 14:37:44.459496 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1604 14:37:44.463081 PCI: 00:19.1 init finished in 6 msecs
1605 14:37:44.466009 PCI: 00:1d.0 init
1606 14:37:44.469429 Initializing PCH PCIe bridge.
1607 14:37:44.472863 PCI: 00:1d.0 init finished in 3 msecs
1608 14:37:44.475706 PCI: 00:1f.0 init
1609 14:37:44.479103 IOAPIC: Initializing IOAPIC at 0xfec00000
1610 14:37:44.485964 IOAPIC: Bootstrap Processor Local APIC = 0x00
1611 14:37:44.486094 IOAPIC: ID = 0x02
1612 14:37:44.489031 IOAPIC: Dumping registers
1613 14:37:44.492440 reg 0x0000: 0x02000000
1614 14:37:44.492642 reg 0x0001: 0x00770020
1615 14:37:44.495794 reg 0x0002: 0x00000000
1616 14:37:44.498929 PCI: 00:1f.0 init finished in 21 msecs
1617 14:37:44.502402 PCI: 00:1f.2 init
1618 14:37:44.505655 Disabling ACPI via APMC.
1619 14:37:44.509692 APMC done.
1620 14:37:44.512960 PCI: 00:1f.2 init finished in 6 msecs
1621 14:37:44.525043 PCI: 01:00.0 init
1622 14:37:44.527792 PCI: 01:00.0 init finished in 0 msecs
1623 14:37:44.531549 PNP: 0c09.0 init
1624 14:37:44.537740 Google Chrome EC uptime: 8.421 seconds
1625 14:37:44.541095 Google Chrome AP resets since EC boot: 1
1626 14:37:44.544323 Google Chrome most recent AP reset causes:
1627 14:37:44.547592 0.456: 32775 shutdown: entering G3
1628 14:37:44.554084 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1629 14:37:44.557543 PNP: 0c09.0 init finished in 23 msecs
1630 14:37:44.564159 Devices initialized
1631 14:37:44.567596 Show all devs... After init.
1632 14:37:44.570874 Root Device: enabled 1
1633 14:37:44.570970 DOMAIN: 0000: enabled 1
1634 14:37:44.574044 CPU_CLUSTER: 0: enabled 1
1635 14:37:44.577276 PCI: 00:00.0: enabled 1
1636 14:37:44.581082 PCI: 00:02.0: enabled 1
1637 14:37:44.584250 PCI: 00:04.0: enabled 1
1638 14:37:44.584332 PCI: 00:05.0: enabled 1
1639 14:37:44.587144 PCI: 00:06.0: enabled 0
1640 14:37:44.590556 PCI: 00:07.0: enabled 0
1641 14:37:44.590638 PCI: 00:07.1: enabled 0
1642 14:37:44.594217 PCI: 00:07.2: enabled 0
1643 14:37:44.597601 PCI: 00:07.3: enabled 0
1644 14:37:44.600398 PCI: 00:08.0: enabled 1
1645 14:37:44.600479 PCI: 00:09.0: enabled 0
1646 14:37:44.603624 PCI: 00:0a.0: enabled 0
1647 14:37:44.606918 PCI: 00:0d.0: enabled 1
1648 14:37:44.610604 PCI: 00:0d.1: enabled 0
1649 14:37:44.610685 PCI: 00:0d.2: enabled 0
1650 14:37:44.613544 PCI: 00:0d.3: enabled 0
1651 14:37:44.616985 PCI: 00:0e.0: enabled 0
1652 14:37:44.620049 PCI: 00:10.2: enabled 1
1653 14:37:44.620130 PCI: 00:10.6: enabled 0
1654 14:37:44.623529 PCI: 00:10.7: enabled 0
1655 14:37:44.626823 PCI: 00:12.0: enabled 0
1656 14:37:44.630252 PCI: 00:12.6: enabled 0
1657 14:37:44.630338 PCI: 00:13.0: enabled 0
1658 14:37:44.633780 PCI: 00:14.0: enabled 1
1659 14:37:44.636968 PCI: 00:14.1: enabled 0
1660 14:37:44.640332 PCI: 00:14.2: enabled 1
1661 14:37:44.640413 PCI: 00:14.3: enabled 1
1662 14:37:44.643047 PCI: 00:15.0: enabled 1
1663 14:37:44.646504 PCI: 00:15.1: enabled 1
1664 14:37:44.649955 PCI: 00:15.2: enabled 1
1665 14:37:44.650036 PCI: 00:15.3: enabled 1
1666 14:37:44.653128 PCI: 00:16.0: enabled 1
1667 14:37:44.656822 PCI: 00:16.1: enabled 0
1668 14:37:44.656903 PCI: 00:16.2: enabled 0
1669 14:37:44.659784 PCI: 00:16.3: enabled 0
1670 14:37:44.663046 PCI: 00:16.4: enabled 0
1671 14:37:44.666790 PCI: 00:16.5: enabled 0
1672 14:37:44.666879 PCI: 00:17.0: enabled 0
1673 14:37:44.669957 PCI: 00:19.0: enabled 0
1674 14:37:44.673088 PCI: 00:19.1: enabled 1
1675 14:37:44.676216 PCI: 00:19.2: enabled 0
1676 14:37:44.676298 PCI: 00:1c.0: enabled 1
1677 14:37:44.679902 PCI: 00:1c.1: enabled 0
1678 14:37:44.682733 PCI: 00:1c.2: enabled 0
1679 14:37:44.686446 PCI: 00:1c.3: enabled 0
1680 14:37:44.686527 PCI: 00:1c.4: enabled 0
1681 14:37:44.689208 PCI: 00:1c.5: enabled 0
1682 14:37:44.692689 PCI: 00:1c.6: enabled 1
1683 14:37:44.696109 PCI: 00:1c.7: enabled 0
1684 14:37:44.696190 PCI: 00:1d.0: enabled 1
1685 14:37:44.699352 PCI: 00:1d.1: enabled 0
1686 14:37:44.702909 PCI: 00:1d.2: enabled 1
1687 14:37:44.705906 PCI: 00:1d.3: enabled 0
1688 14:37:44.705987 PCI: 00:1e.0: enabled 1
1689 14:37:44.709006 PCI: 00:1e.1: enabled 0
1690 14:37:44.712809 PCI: 00:1e.2: enabled 1
1691 14:37:44.715776 PCI: 00:1e.3: enabled 1
1692 14:37:44.715858 PCI: 00:1f.0: enabled 1
1693 14:37:44.718960 PCI: 00:1f.1: enabled 0
1694 14:37:44.722777 PCI: 00:1f.2: enabled 1
1695 14:37:44.722858 PCI: 00:1f.3: enabled 1
1696 14:37:44.725867 PCI: 00:1f.4: enabled 0
1697 14:37:44.728827 PCI: 00:1f.5: enabled 1
1698 14:37:44.732236 PCI: 00:1f.6: enabled 0
1699 14:37:44.732317 PCI: 00:1f.7: enabled 0
1700 14:37:44.735627 APIC: 00: enabled 1
1701 14:37:44.738851 GENERIC: 0.0: enabled 1
1702 14:37:44.742242 GENERIC: 0.0: enabled 1
1703 14:37:44.742324 GENERIC: 1.0: enabled 1
1704 14:37:44.745356 GENERIC: 0.0: enabled 1
1705 14:37:44.748926 GENERIC: 1.0: enabled 1
1706 14:37:44.749008 USB0 port 0: enabled 1
1707 14:37:44.751985 GENERIC: 0.0: enabled 1
1708 14:37:44.755322 USB0 port 0: enabled 1
1709 14:37:44.758695 GENERIC: 0.0: enabled 1
1710 14:37:44.758776 I2C: 00:1a: enabled 1
1711 14:37:44.761842 I2C: 00:31: enabled 1
1712 14:37:44.765464 I2C: 00:32: enabled 1
1713 14:37:44.765546 I2C: 00:10: enabled 1
1714 14:37:44.768609 I2C: 00:15: enabled 1
1715 14:37:44.771667 GENERIC: 0.0: enabled 0
1716 14:37:44.775004 GENERIC: 1.0: enabled 0
1717 14:37:44.775091 GENERIC: 0.0: enabled 1
1718 14:37:44.778519 SPI: 00: enabled 1
1719 14:37:44.778600 SPI: 00: enabled 1
1720 14:37:44.781996 PNP: 0c09.0: enabled 1
1721 14:37:44.785027 GENERIC: 0.0: enabled 1
1722 14:37:44.788159 USB3 port 0: enabled 1
1723 14:37:44.788251 USB3 port 1: enabled 1
1724 14:37:44.791352 USB3 port 2: enabled 0
1725 14:37:44.794756 USB3 port 3: enabled 0
1726 14:37:44.794861 USB2 port 0: enabled 0
1727 14:37:44.798608 USB2 port 1: enabled 1
1728 14:37:44.801439 USB2 port 2: enabled 1
1729 14:37:44.804803 USB2 port 3: enabled 0
1730 14:37:44.804903 USB2 port 4: enabled 1
1731 14:37:44.807912 USB2 port 5: enabled 0
1732 14:37:44.811455 USB2 port 6: enabled 0
1733 14:37:44.811554 USB2 port 7: enabled 0
1734 14:37:44.814466 USB2 port 8: enabled 0
1735 14:37:44.817892 USB2 port 9: enabled 0
1736 14:37:44.821083 USB3 port 0: enabled 0
1737 14:37:44.821187 USB3 port 1: enabled 1
1738 14:37:44.824462 USB3 port 2: enabled 0
1739 14:37:44.827761 USB3 port 3: enabled 0
1740 14:37:44.827841 GENERIC: 0.0: enabled 1
1741 14:37:44.831194 GENERIC: 1.0: enabled 1
1742 14:37:44.834727 APIC: 01: enabled 1
1743 14:37:44.834829 APIC: 05: enabled 1
1744 14:37:44.837816 APIC: 03: enabled 1
1745 14:37:44.840994 APIC: 07: enabled 1
1746 14:37:44.841093 APIC: 06: enabled 1
1747 14:37:44.844094 APIC: 04: enabled 1
1748 14:37:44.847336 APIC: 02: enabled 1
1749 14:37:44.847440 PCI: 01:00.0: enabled 1
1750 14:37:44.854035 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1751 14:37:44.857353 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1752 14:37:44.863846 ELOG: NV offset 0xf30000 size 0x1000
1753 14:37:44.870139 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1754 14:37:44.877330 ELOG: Event(17) added with size 13 at 2023-08-16 14:37:45 UTC
1755 14:37:44.883420 ELOG: Event(92) added with size 9 at 2023-08-16 14:37:45 UTC
1756 14:37:44.890175 ELOG: Event(16) added with size 11 at 2023-08-16 14:37:45 UTC
1757 14:37:44.893187 Erasing flash addr f30000 + 4 KiB
1758 14:37:44.948287 ELOG: Event(93) added with size 9 at 2023-08-16 14:37:45 UTC
1759 14:37:44.954885 ELOG: Event(9E) added with size 10 at 2023-08-16 14:37:45 UTC
1760 14:37:44.961859 ELOG: Event(9F) added with size 14 at 2023-08-16 14:37:45 UTC
1761 14:37:44.968336 BS: BS_DEV_INIT exit times (exec / console): 40 / 55 ms
1762 14:37:44.974690 ELOG: Event(A1) added with size 10 at 2023-08-16 14:37:45 UTC
1763 14:37:44.981615 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1764 14:37:44.987970 ELOG: Event(A0) added with size 9 at 2023-08-16 14:37:45 UTC
1765 14:37:44.991614 elog_add_boot_reason: Logged dev mode boot
1766 14:37:44.997935 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1767 14:37:45.001315 Finalize devices...
1768 14:37:45.001424 Devices finalized
1769 14:37:45.007914 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1770 14:37:45.014506 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1771 14:37:45.017832 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1772 14:37:45.024250 ME: HFSTS1 : 0x80030055
1773 14:37:45.027349 ME: HFSTS2 : 0x30280116
1774 14:37:45.030956 ME: HFSTS3 : 0x00000050
1775 14:37:45.037432 ME: HFSTS4 : 0x00004000
1776 14:37:45.040720 ME: HFSTS5 : 0x00000000
1777 14:37:45.044096 ME: HFSTS6 : 0x40400006
1778 14:37:45.050779 ME: Manufacturing Mode : YES
1779 14:37:45.054027 ME: SPI Protection Mode Enabled : NO
1780 14:37:45.057407 ME: FW Partition Table : OK
1781 14:37:45.060853 ME: Bringup Loader Failure : NO
1782 14:37:45.063810 ME: Firmware Init Complete : NO
1783 14:37:45.067585 ME: Boot Options Present : NO
1784 14:37:45.070343 ME: Update In Progress : NO
1785 14:37:45.073715 ME: D0i3 Support : YES
1786 14:37:45.080589 ME: Low Power State Enabled : NO
1787 14:37:45.083963 ME: CPU Replaced : YES
1788 14:37:45.086958 ME: CPU Replacement Valid : YES
1789 14:37:45.090313 ME: Current Working State : 5
1790 14:37:45.093547 ME: Current Operation State : 1
1791 14:37:45.097199 ME: Current Operation Mode : 3
1792 14:37:45.100308 ME: Error Code : 0
1793 14:37:45.103398 ME: Enhanced Debug Mode : NO
1794 14:37:45.110368 ME: CPU Debug Disabled : YES
1795 14:37:45.113355 ME: TXT Support : NO
1796 14:37:45.119753 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1797 14:37:45.126650 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1798 14:37:45.129778 CBFS: 'fallback/slic' not found.
1799 14:37:45.133185 ACPI: Writing ACPI tables at 76b01000.
1800 14:37:45.136742 ACPI: * FACS
1801 14:37:45.136843 ACPI: * DSDT
1802 14:37:45.140099 Ramoops buffer: 0x100000@0x76a00000.
1803 14:37:45.146530 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1804 14:37:45.149624 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1805 14:37:45.153567 Google Chrome EC: version:
1806 14:37:45.156929 ro: voema_v2.0.10114-a447f03e46
1807 14:37:45.160086 rw: voema_v2.0.10114-a447f03e46
1808 14:37:45.163339 running image: 2
1809 14:37:45.169430 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1810 14:37:45.173247 ACPI: * FADT
1811 14:37:45.173348 SCI is IRQ9
1812 14:37:45.179942 ACPI: added table 1/32, length now 40
1813 14:37:45.180046 ACPI: * SSDT
1814 14:37:45.183075 Found 1 CPU(s) with 8 core(s) each.
1815 14:37:45.189290 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1816 14:37:45.192787 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1817 14:37:45.195875 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1818 14:37:45.202401 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1819 14:37:45.205656 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1820 14:37:45.212317 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1821 14:37:45.215965 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1822 14:37:45.222058 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1823 14:37:45.229044 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1824 14:37:45.232388 \_SB.PCI0.RP09: Added StorageD3Enable property
1825 14:37:45.238797 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1826 14:37:45.242130 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1827 14:37:45.249410 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1828 14:37:45.252499 PS2K: Passing 80 keymaps to kernel
1829 14:37:45.259287 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1830 14:37:45.265807 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1831 14:37:45.272897 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1832 14:37:45.278941 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1833 14:37:45.285401 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1834 14:37:45.292227 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1835 14:37:45.298751 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1836 14:37:45.305329 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1837 14:37:45.308734 ACPI: added table 2/32, length now 44
1838 14:37:45.311863 ACPI: * MCFG
1839 14:37:45.315175 ACPI: added table 3/32, length now 48
1840 14:37:45.315283 ACPI: * TPM2
1841 14:37:45.318543 TPM2 log created at 0x769f0000
1842 14:37:45.321930 ACPI: added table 4/32, length now 52
1843 14:37:45.324925 ACPI: * MADT
1844 14:37:45.325032 SCI is IRQ9
1845 14:37:45.328521 ACPI: added table 5/32, length now 56
1846 14:37:45.331787 current = 76b09850
1847 14:37:45.334959 ACPI: * DMAR
1848 14:37:45.338208 ACPI: added table 6/32, length now 60
1849 14:37:45.341726 ACPI: added table 7/32, length now 64
1850 14:37:45.341911 ACPI: * HPET
1851 14:37:45.345043 ACPI: added table 8/32, length now 68
1852 14:37:45.348428 ACPI: done.
1853 14:37:45.351609 ACPI tables: 35216 bytes.
1854 14:37:45.354706 smbios_write_tables: 769ef000
1855 14:37:45.358175 EC returned error result code 3
1856 14:37:45.361713 Couldn't obtain OEM name from CBI
1857 14:37:45.364638 Create SMBIOS type 16
1858 14:37:45.364737 Create SMBIOS type 17
1859 14:37:45.368148 GENERIC: 0.0 (WIFI Device)
1860 14:37:45.371646 SMBIOS tables: 1734 bytes.
1861 14:37:45.374475 Writing table forward entry at 0x00000500
1862 14:37:45.381195 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1863 14:37:45.384502 Writing coreboot table at 0x76b25000
1864 14:37:45.391266 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1865 14:37:45.397594 1. 0000000000001000-000000000009ffff: RAM
1866 14:37:45.401103 2. 00000000000a0000-00000000000fffff: RESERVED
1867 14:37:45.404476 3. 0000000000100000-00000000769eefff: RAM
1868 14:37:45.410911 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1869 14:37:45.417808 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1870 14:37:45.420932 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1871 14:37:45.428059 7. 0000000077000000-000000007fbfffff: RESERVED
1872 14:37:45.430740 8. 00000000c0000000-00000000cfffffff: RESERVED
1873 14:37:45.437394 9. 00000000f8000000-00000000f9ffffff: RESERVED
1874 14:37:45.440902 10. 00000000fb000000-00000000fb000fff: RESERVED
1875 14:37:45.447274 11. 00000000fe000000-00000000fe00ffff: RESERVED
1876 14:37:45.450809 12. 00000000fed80000-00000000fed87fff: RESERVED
1877 14:37:45.453960 13. 00000000fed90000-00000000fed92fff: RESERVED
1878 14:37:45.460493 14. 00000000feda0000-00000000feda1fff: RESERVED
1879 14:37:45.464066 15. 00000000fedc0000-00000000feddffff: RESERVED
1880 14:37:45.470423 16. 0000000100000000-00000004803fffff: RAM
1881 14:37:45.470506 Passing 4 GPIOs to payload:
1882 14:37:45.477389 NAME | PORT | POLARITY | VALUE
1883 14:37:45.484059 lid | undefined | high | high
1884 14:37:45.486929 power | undefined | high | low
1885 14:37:45.493538 oprom | undefined | high | low
1886 14:37:45.496849 EC in RW | 0x000000e5 | high | high
1887 14:37:45.503744 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1888 14:37:45.506834 coreboot table: 1576 bytes.
1889 14:37:45.510342 IMD ROOT 0. 0x76fff000 0x00001000
1890 14:37:45.516628 IMD SMALL 1. 0x76ffe000 0x00001000
1891 14:37:45.520110 FSP MEMORY 2. 0x76c4e000 0x003b0000
1892 14:37:45.523500 VPD 3. 0x76c4d000 0x00000367
1893 14:37:45.526449 RO MCACHE 4. 0x76c4c000 0x00000fdc
1894 14:37:45.530072 CONSOLE 5. 0x76c2c000 0x00020000
1895 14:37:45.533459 FMAP 6. 0x76c2b000 0x00000578
1896 14:37:45.536928 TIME STAMP 7. 0x76c2a000 0x00000910
1897 14:37:45.540097 VBOOT WORK 8. 0x76c16000 0x00014000
1898 14:37:45.546711 ROMSTG STCK 9. 0x76c15000 0x00001000
1899 14:37:45.550513 AFTER CAR 10. 0x76c0a000 0x0000b000
1900 14:37:45.553514 RAMSTAGE 11. 0x76b97000 0x00073000
1901 14:37:45.556213 REFCODE 12. 0x76b42000 0x00055000
1902 14:37:45.559744 SMM BACKUP 13. 0x76b32000 0x00010000
1903 14:37:45.562812 4f444749 14. 0x76b30000 0x00002000
1904 14:37:45.566217 EXT VBT15. 0x76b2d000 0x0000219f
1905 14:37:45.570276 COREBOOT 16. 0x76b25000 0x00008000
1906 14:37:45.573115 ACPI 17. 0x76b01000 0x00024000
1907 14:37:45.579874 ACPI GNVS 18. 0x76b00000 0x00001000
1908 14:37:45.582845 RAMOOPS 19. 0x76a00000 0x00100000
1909 14:37:45.586192 TPM2 TCGLOG20. 0x769f0000 0x00010000
1910 14:37:45.589646 SMBIOS 21. 0x769ef000 0x00000800
1911 14:37:45.592756 IMD small region:
1912 14:37:45.595782 IMD ROOT 0. 0x76ffec00 0x00000400
1913 14:37:45.599410 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1914 14:37:45.602623 POWER STATE 2. 0x76ffeb80 0x00000044
1915 14:37:45.605990 ROMSTAGE 3. 0x76ffeb60 0x00000004
1916 14:37:45.609039 MEM INFO 4. 0x76ffe980 0x000001e0
1917 14:37:45.615627 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1918 14:37:45.619214 MTRR: Physical address space:
1919 14:37:45.625728 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1920 14:37:45.632210 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1921 14:37:45.639083 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1922 14:37:45.645674 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1923 14:37:45.652245 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1924 14:37:45.655832 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1925 14:37:45.662474 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1926 14:37:45.668450 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 14:37:45.672062 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 14:37:45.675665 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 14:37:45.678709 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 14:37:45.685414 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 14:37:45.688378 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 14:37:45.692046 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 14:37:45.695307 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 14:37:45.701611 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 14:37:45.705365 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 14:37:45.708068 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 14:37:45.712435 call enable_fixed_mtrr()
1938 14:37:45.716049 CPU physical address size: 39 bits
1939 14:37:45.722558 MTRR: default type WB/UC MTRR counts: 6/7.
1940 14:37:45.725703 MTRR: WB selected as default type.
1941 14:37:45.732393 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1942 14:37:45.735393 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1943 14:37:45.742329 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1944 14:37:45.748930 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1945 14:37:45.755232 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1946 14:37:45.761436 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1947 14:37:45.765727
1948 14:37:45.765835 MTRR check
1949 14:37:45.769143 Fixed MTRRs : Enabled
1950 14:37:45.769247 Variable MTRRs: Enabled
1951 14:37:45.769339
1952 14:37:45.775618 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 14:37:45.778880 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 14:37:45.782476 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 14:37:45.785915 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 14:37:45.792380 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 14:37:45.795622 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 14:37:45.799140 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 14:37:45.802531 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 14:37:45.808783 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 14:37:45.812377 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 14:37:45.815323 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 14:37:45.823185 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 14:37:45.823291 call enable_fixed_mtrr()
1965 14:37:45.829264 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 14:37:45.833284 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 14:37:45.835906 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 14:37:45.839444 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 14:37:45.846084 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 14:37:45.849338 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 14:37:45.852698 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 14:37:45.855894 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 14:37:45.862330 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 14:37:45.865831 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 14:37:45.869197 CPU physical address size: 39 bits
1976 14:37:45.875401 call enable_fixed_mtrr()
1977 14:37:45.878852 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 14:37:45.882136 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 14:37:45.889066 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 14:37:45.892348 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 14:37:45.895389 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 14:37:45.898409 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 14:37:45.905261 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 14:37:45.908453 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 14:37:45.911807 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 14:37:45.915213 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 14:37:45.918497 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 14:37:45.925228 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 14:37:45.931665 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 14:37:45.931764 call enable_fixed_mtrr()
1991 14:37:45.938365 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 14:37:45.941596 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 14:37:45.944631 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 14:37:45.948085 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 14:37:45.954708 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 14:37:45.957809 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 14:37:45.960949 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 14:37:45.964350 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 14:37:45.970675 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 14:37:45.974426 CPU physical address size: 39 bits
2001 14:37:45.978612 call enable_fixed_mtrr()
2002 14:37:45.982223 CPU physical address size: 39 bits
2003 14:37:45.988312 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 14:37:45.991763 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2005 14:37:45.998402 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 14:37:46.001795 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 14:37:46.004684 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 14:37:46.008221 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 14:37:46.014508 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 14:37:46.017861 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 14:37:46.021422 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 14:37:46.024231 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 14:37:46.031072 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 14:37:46.034221 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 14:37:46.038003 Checking cr50 for pending updates
2016 14:37:46.041402 call enable_fixed_mtrr()
2017 14:37:46.044878 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 14:37:46.051542 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 14:37:46.054628 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 14:37:46.058114 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 14:37:46.061686 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 14:37:46.064539 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 14:37:46.071298 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 14:37:46.074774 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 14:37:46.077899 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 14:37:46.081026 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 14:37:46.087615 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 14:37:46.091231 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 14:37:46.097872 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 14:37:46.101277 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 14:37:46.104436 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 14:37:46.107790 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 14:37:46.114329 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 14:37:46.117430 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 14:37:46.120828 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 14:37:46.124188 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 14:37:46.130741 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 14:37:46.133922 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 14:37:46.137965 call enable_fixed_mtrr()
2040 14:37:46.140520 call enable_fixed_mtrr()
2041 14:37:46.143864 CPU physical address size: 39 bits
2042 14:37:46.147522 CPU physical address size: 39 bits
2043 14:37:46.151316 CPU physical address size: 39 bits
2044 14:37:46.158400 CPU physical address size: 39 bits
2045 14:37:46.161195 Reading cr50 TPM mode
2046 14:37:46.170649 BS: BS_PAYLOAD_LOAD entry times (exec / console): 163 / 9 ms
2047 14:37:46.180755 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2048 14:37:46.183765 Checking segment from ROM address 0xffc02b38
2049 14:37:46.186927 Checking segment from ROM address 0xffc02b54
2050 14:37:46.193493 Loading segment from ROM address 0xffc02b38
2051 14:37:46.193579 code (compression=0)
2052 14:37:46.203321 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2053 14:37:46.213662 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2054 14:37:46.213748 it's not compressed!
2055 14:37:46.354456 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2056 14:37:46.361399 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2057 14:37:46.367619 Loading segment from ROM address 0xffc02b54
2058 14:37:46.371021 Entry Point 0x30000000
2059 14:37:46.371113 Loaded segments
2060 14:37:46.377440 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2061 14:37:46.422585 Finalizing chipset.
2062 14:37:46.425953 Finalizing SMM.
2063 14:37:46.426043 APMC done.
2064 14:37:46.432419 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2065 14:37:46.435870 mp_park_aps done after 0 msecs.
2066 14:37:46.439069 Jumping to boot code at 0x30000000(0x76b25000)
2067 14:37:46.449445 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2068 14:37:46.449533
2069 14:37:46.449620
2070 14:37:46.452486
2071 14:37:46.452571 Starting depthcharge on Voema...
2072 14:37:46.452935 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2073 14:37:46.453050 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2074 14:37:46.453142 Setting prompt string to ['volteer:']
2075 14:37:46.453235 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2076 14:37:46.455781
2077 14:37:46.462654 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2078 14:37:46.462740
2079 14:37:46.468751 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2080 14:37:46.468837
2081 14:37:46.475338 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2082 14:37:46.475424
2083 14:37:46.478715 Failed to find eMMC card reader
2084 14:37:46.478816
2085 14:37:46.481996 Wipe memory regions:
2086 14:37:46.482082
2087 14:37:46.485188 [0x00000000001000, 0x000000000a0000)
2088 14:37:46.485272
2089 14:37:46.488575 [0x00000000100000, 0x00000030000000)
2090 14:37:46.524192
2091 14:37:46.527439 [0x00000032662db0, 0x000000769ef000)
2092 14:37:46.577310
2093 14:37:46.580369 [0x00000100000000, 0x00000480400000)
2094 14:37:47.212170
2095 14:37:47.215265 ec_init: CrosEC protocol v3 supported (256, 256)
2096 14:37:47.647391
2097 14:37:47.647554 R8152: Initializing
2098 14:37:47.647659
2099 14:37:47.650401 Version 6 (ocp_data = 5c30)
2100 14:37:47.650488
2101 14:37:47.653964 R8152: Done initializing
2102 14:37:47.654050
2103 14:37:47.657157 Adding net device
2104 14:37:47.958769
2105 14:37:47.961704 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2106 14:37:47.961792
2107 14:37:47.961879
2108 14:37:47.961960
2109 14:37:47.965339 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 14:37:48.065764 volteer: tftpboot 192.168.201.1 11299716/tftp-deploy-uf0v7fi4/kernel/bzImage 11299716/tftp-deploy-uf0v7fi4/kernel/cmdline 11299716/tftp-deploy-uf0v7fi4/ramdisk/ramdisk.cpio.gz
2112 14:37:48.065920 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2113 14:37:48.066065 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2114 14:37:48.070504 tftpboot 192.168.201.1 11299716/tftp-deploy-uf0v7fi4/kernel/bzImploy-uf0v7fi4/kernel/cmdline 11299716/tftp-deploy-uf0v7fi4/ramdisk/ramdisk.cpio.gz
2115 14:37:48.070595
2116 14:37:48.070683 Waiting for link
2117 14:37:48.273090
2118 14:37:48.273244 done.
2119 14:37:48.273341
2120 14:37:48.273425 MAC: 00:24:32:30:7a:04
2121 14:37:48.273507
2122 14:37:48.276831 Sending DHCP discover... done.
2123 14:37:48.276918
2124 14:37:48.279617 Waiting for reply... done.
2125 14:37:48.279727
2126 14:37:48.282890 Sending DHCP request... done.
2127 14:37:48.282991
2128 14:37:48.286345 Waiting for reply... done.
2129 14:37:48.286431
2130 14:37:48.289649 My ip is 192.168.201.22
2131 14:37:48.289735
2132 14:37:48.292656 The DHCP server ip is 192.168.201.1
2133 14:37:48.292742
2134 14:37:48.296036 TFTP server IP predefined by user: 192.168.201.1
2135 14:37:48.296123
2136 14:37:48.302432 Bootfile predefined by user: 11299716/tftp-deploy-uf0v7fi4/kernel/bzImage
2137 14:37:48.305980
2138 14:37:48.309074 Sending tftp read request... done.
2139 14:37:48.309160
2140 14:37:48.312972 Waiting for the transfer...
2141 14:37:48.313057
2142 14:37:48.856516 00000000 ################################################################
2143 14:37:48.856668
2144 14:37:49.393085 00080000 ################################################################
2145 14:37:49.393264
2146 14:37:49.940294 00100000 ################################################################
2147 14:37:49.940444
2148 14:37:50.485359 00180000 ################################################################
2149 14:37:50.485543
2150 14:37:51.009922 00200000 ################################################################
2151 14:37:51.010072
2152 14:37:51.541822 00280000 ################################################################
2153 14:37:51.541975
2154 14:37:52.076461 00300000 ################################################################
2155 14:37:52.076614
2156 14:37:52.608676 00380000 ################################################################
2157 14:37:52.608835
2158 14:37:53.140913 00400000 ################################################################
2159 14:37:53.141067
2160 14:37:53.671250 00480000 ################################################################
2161 14:37:53.671398
2162 14:37:54.204926 00500000 ################################################################
2163 14:37:54.205076
2164 14:37:54.720941 00580000 ################################################################
2165 14:37:54.721092
2166 14:37:55.256176 00600000 ################################################################
2167 14:37:55.256365
2168 14:37:55.796977 00680000 ################################################################
2169 14:37:55.797166
2170 14:37:56.328024 00700000 ################################################################
2171 14:37:56.328229
2172 14:37:56.858243 00780000 ################################################################
2173 14:37:56.858398
2174 14:37:56.961145 00800000 ############# done.
2175 14:37:56.961313
2176 14:37:56.964248 The bootfile was 8490896 bytes long.
2177 14:37:56.964350
2178 14:37:56.967554 Sending tftp read request... done.
2179 14:37:56.967700
2180 14:37:56.970573 Waiting for the transfer...
2181 14:37:56.970688
2182 14:37:57.505969 00000000 ################################################################
2183 14:37:57.506124
2184 14:37:58.048581 00080000 ################################################################
2185 14:37:58.048737
2186 14:37:58.688221 00100000 ################################################################
2187 14:37:58.688380
2188 14:37:59.130421 00180000 ################################################################
2189 14:37:59.130586
2190 14:37:59.663845 00200000 ################################################################
2191 14:37:59.663996
2192 14:38:00.188149 00280000 ################################################################
2193 14:38:00.188301
2194 14:38:00.703530 00300000 ################################################################
2195 14:38:00.703740
2196 14:38:01.232226 00380000 ################################################################
2197 14:38:01.232360
2198 14:38:01.750232 00400000 ################################################################
2199 14:38:01.750415
2200 14:38:02.288622 00480000 ################################################################
2201 14:38:02.288766
2202 14:38:02.824538 00500000 ################################################################
2203 14:38:02.824692
2204 14:38:03.340755 00580000 ################################################################
2205 14:38:03.340925
2206 14:38:03.860755 00600000 ################################################################
2207 14:38:03.860900
2208 14:38:04.415292 00680000 ################################################################
2209 14:38:04.415446
2210 14:38:04.958439 00700000 ################################################################
2211 14:38:04.958595
2212 14:38:05.498516 00780000 ################################################################
2213 14:38:05.498684
2214 14:38:06.023492 00800000 ################################################################
2215 14:38:06.023712
2216 14:38:06.560672 00880000 ################################################################
2217 14:38:06.560828
2218 14:38:07.099364 00900000 ################################################################
2219 14:38:07.099518
2220 14:38:07.637479 00980000 ################################################################
2221 14:38:07.637639
2222 14:38:08.165207 00a00000 ################################################################
2223 14:38:08.165363
2224 14:38:08.677998 00a80000 ################################################################
2225 14:38:08.678166
2226 14:38:09.199868 00b00000 ################################################################
2227 14:38:09.200043
2228 14:38:09.714796 00b80000 ################################################################
2229 14:38:09.714970
2230 14:38:10.231850 00c00000 ################################################################
2231 14:38:10.231993
2232 14:38:10.750534 00c80000 ################################################################
2233 14:38:10.750675
2234 14:38:11.281497 00d00000 ################################################################
2235 14:38:11.281640
2236 14:38:11.806739 00d80000 ################################################################
2237 14:38:11.806881
2238 14:38:12.339611 00e00000 ################################################################
2239 14:38:12.339787
2240 14:38:12.873414 00e80000 ################################################################
2241 14:38:12.873558
2242 14:38:13.408922 00f00000 ################################################################
2243 14:38:13.409103
2244 14:38:13.944354 00f80000 ################################################################
2245 14:38:13.944554
2246 14:38:14.486787 01000000 ################################################################
2247 14:38:14.486964
2248 14:38:15.041683 01080000 ################################################################
2249 14:38:15.041831
2250 14:38:15.597806 01100000 ################################################################
2251 14:38:15.597962
2252 14:38:16.129605 01180000 ################################################################
2253 14:38:16.129801
2254 14:38:16.645603 01200000 ################################################################
2255 14:38:16.645767
2256 14:38:17.174591 01280000 ################################################################
2257 14:38:17.174751
2258 14:38:17.716062 01300000 ################################################################
2259 14:38:17.716217
2260 14:38:18.254153 01380000 ################################################################
2261 14:38:18.254324
2262 14:38:18.803223 01400000 ################################################################
2263 14:38:18.803405
2264 14:38:19.320598 01480000 ################################################################
2265 14:38:19.320755
2266 14:38:19.849624 01500000 ################################################################
2267 14:38:19.849782
2268 14:38:20.374670 01580000 ################################################################
2269 14:38:20.374824
2270 14:38:20.941274 01600000 ################################################################
2271 14:38:20.941440
2272 14:38:21.579543 01680000 ################################################################
2273 14:38:21.579736
2274 14:38:22.165794 01700000 ################################################################
2275 14:38:22.166314
2276 14:38:22.824700 01780000 ################################################################
2277 14:38:22.825333
2278 14:38:23.500618 01800000 ################################################################
2279 14:38:23.500753
2280 14:38:24.114778 01880000 ################################################################
2281 14:38:24.114928
2282 14:38:24.715068 01900000 ################################################################
2283 14:38:24.715673
2284 14:38:25.406711 01980000 ################################################################
2285 14:38:25.407287
2286 14:38:25.945854 01a00000 ################################################################
2287 14:38:25.946035
2288 14:38:26.470035 01a80000 ################################################################
2289 14:38:26.470184
2290 14:38:26.995057 01b00000 ################################################################
2291 14:38:26.995210
2292 14:38:27.545160 01b80000 ################################################################
2293 14:38:27.545300
2294 14:38:28.093656 01c00000 ################################################################
2295 14:38:28.093795
2296 14:38:28.652523 01c80000 ################################################################
2297 14:38:28.652669
2298 14:38:29.201945 01d00000 ################################################################
2299 14:38:29.202092
2300 14:38:29.826332 01d80000 ################################################################
2301 14:38:29.826561
2302 14:38:30.411052 01e00000 ################################################################
2303 14:38:30.411199
2304 14:38:30.962828 01e80000 ################################################################
2305 14:38:30.962969
2306 14:38:31.572142 01f00000 ################################################################
2307 14:38:31.572278
2308 14:38:32.173115 01f80000 ################################################################
2309 14:38:32.173267
2310 14:38:32.809902 02000000 ################################################################
2311 14:38:32.810595
2312 14:38:33.477082 02080000 ################################################################
2313 14:38:33.477700
2314 14:38:34.189813 02100000 ################################################################
2315 14:38:34.190414
2316 14:38:34.896491 02180000 ################################################################
2317 14:38:34.897071
2318 14:38:35.490665 02200000 ####################################################### done.
2319 14:38:35.491232
2320 14:38:35.494273 Sending tftp read request... done.
2321 14:38:35.494740
2322 14:38:35.497270 Waiting for the transfer...
2323 14:38:35.497738
2324 14:38:35.498106 00000000 # done.
2325 14:38:35.500429
2326 14:38:35.507435 Command line loaded dynamically from TFTP file: 11299716/tftp-deploy-uf0v7fi4/kernel/cmdline
2327 14:38:35.508080
2328 14:38:35.523407 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2329 14:38:35.530637
2330 14:38:35.533996 Shutting down all USB controllers.
2331 14:38:35.534562
2332 14:38:35.534932 Removing current net device
2333 14:38:35.535274
2334 14:38:35.536766 Finalizing coreboot
2335 14:38:35.537169
2336 14:38:35.543486 Exiting depthcharge with code 4 at timestamp: 57743219
2337 14:38:35.544106
2338 14:38:35.544478
2339 14:38:35.544825 Starting kernel ...
2340 14:38:35.545154
2341 14:38:35.545478
2342 14:38:35.546976 end: 2.2.4 bootloader-commands (duration 00:00:49) [common]
2343 14:38:35.547502 start: 2.2.5 auto-login-action (timeout 00:03:55) [common]
2344 14:38:35.547974 Setting prompt string to ['Linux version [0-9]']
2345 14:38:35.548349 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2346 14:38:35.548723 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2348 14:42:30.548554 end: 2.2.5 auto-login-action (duration 00:03:55) [common]
2350 14:42:30.549665 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 235 seconds'
2352 14:42:30.550526 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2355 14:42:30.551971 end: 2 depthcharge-action (duration 00:05:00) [common]
2357 14:42:30.553130 Cleaning after the job
2358 14:42:30.553219 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299716/tftp-deploy-uf0v7fi4/ramdisk
2359 14:42:30.557906 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299716/tftp-deploy-uf0v7fi4/kernel
2360 14:42:30.559151 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299716/tftp-deploy-uf0v7fi4/modules
2361 14:42:30.559530 start: 4.1 power-off (timeout 00:00:30) [common]
2362 14:42:30.559732 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2363 14:42:30.643100 >> Command sent successfully.
2364 14:42:30.655113 Returned 0 in 0 seconds
2365 14:42:30.756498 end: 4.1 power-off (duration 00:00:00) [common]
2367 14:42:30.758087 start: 4.2 read-feedback (timeout 00:10:00) [common]
2368 14:42:30.759420 Listened to connection for namespace 'common' for up to 1s
2369 14:42:31.759942 Finalising connection for namespace 'common'
2370 14:42:31.760648 Disconnecting from shell: Finalise
2371 14:42:31.761061
2372 14:42:31.862160 end: 4.2 read-feedback (duration 00:00:01) [common]
2373 14:42:31.862767 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299716
2374 14:42:31.994133 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299716
2375 14:42:31.994328 JobError: Your job cannot terminate cleanly.