Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:57:59.933217 lava-dispatcher, installed at version: 2023.06
2 14:57:59.933495 start: 0 validate
3 14:57:59.933657 Start time: 2023-08-16 14:57:59.933648+00:00 (UTC)
4 14:57:59.933814 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:57:59.933987 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 14:58:00.225745 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:58:00.225951 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:58:00.475237 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:58:00.475513 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:58:00.724802 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:58:00.725031 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3262-g667bb8d8b2cb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:58:00.984249 validate duration: 1.05
14 14:58:00.984936 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:58:00.985218 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:58:00.985470 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:58:00.985814 Not decompressing ramdisk as can be used compressed.
18 14:58:00.986067 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 14:58:00.986272 saving as /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/ramdisk/initrd.cpio.gz
20 14:58:00.986463 total size: 5432480 (5 MB)
21 14:58:00.989670 progress 0 % (0 MB)
22 14:58:00.995906 progress 5 % (0 MB)
23 14:58:01.001042 progress 10 % (0 MB)
24 14:58:01.006227 progress 15 % (0 MB)
25 14:58:01.011963 progress 20 % (1 MB)
26 14:58:01.016344 progress 25 % (1 MB)
27 14:58:01.019925 progress 30 % (1 MB)
28 14:58:01.023360 progress 35 % (1 MB)
29 14:58:01.025965 progress 40 % (2 MB)
30 14:58:01.028574 progress 45 % (2 MB)
31 14:58:01.030854 progress 50 % (2 MB)
32 14:58:01.033328 progress 55 % (2 MB)
33 14:58:01.035329 progress 60 % (3 MB)
34 14:58:01.037263 progress 65 % (3 MB)
35 14:58:01.039360 progress 70 % (3 MB)
36 14:58:01.041077 progress 75 % (3 MB)
37 14:58:01.042789 progress 80 % (4 MB)
38 14:58:01.044459 progress 85 % (4 MB)
39 14:58:01.046230 progress 90 % (4 MB)
40 14:58:01.047817 progress 95 % (4 MB)
41 14:58:01.049393 progress 100 % (5 MB)
42 14:58:01.049633 5 MB downloaded in 0.06 s (82.00 MB/s)
43 14:58:01.049807 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:58:01.050076 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:58:01.050176 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:58:01.050275 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:58:01.050425 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:58:01.050506 saving as /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/kernel/bzImage
50 14:58:01.050573 total size: 8490896 (8 MB)
51 14:58:01.050644 No compression specified
52 14:58:01.051927 progress 0 % (0 MB)
53 14:58:01.054343 progress 5 % (0 MB)
54 14:58:01.057015 progress 10 % (0 MB)
55 14:58:01.059593 progress 15 % (1 MB)
56 14:58:01.062161 progress 20 % (1 MB)
57 14:58:01.064715 progress 25 % (2 MB)
58 14:58:01.067239 progress 30 % (2 MB)
59 14:58:01.069753 progress 35 % (2 MB)
60 14:58:01.072286 progress 40 % (3 MB)
61 14:58:01.074790 progress 45 % (3 MB)
62 14:58:01.077325 progress 50 % (4 MB)
63 14:58:01.079849 progress 55 % (4 MB)
64 14:58:01.082312 progress 60 % (4 MB)
65 14:58:01.084789 progress 65 % (5 MB)
66 14:58:01.087280 progress 70 % (5 MB)
67 14:58:01.089742 progress 75 % (6 MB)
68 14:58:01.092222 progress 80 % (6 MB)
69 14:58:01.094684 progress 85 % (6 MB)
70 14:58:01.097155 progress 90 % (7 MB)
71 14:58:01.099642 progress 95 % (7 MB)
72 14:58:01.102115 progress 100 % (8 MB)
73 14:58:01.102244 8 MB downloaded in 0.05 s (156.73 MB/s)
74 14:58:01.102402 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:58:01.102657 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:58:01.102752 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:58:01.102851 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:58:01.103006 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 14:58:01.103083 saving as /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/nfsrootfs/full.rootfs.tar
81 14:58:01.103151 total size: 207157356 (197 MB)
82 14:58:01.103219 Using unxz to decompress xz
83 14:58:01.110823 progress 0 % (0 MB)
84 14:58:01.743322 progress 5 % (9 MB)
85 14:58:02.327845 progress 10 % (19 MB)
86 14:58:03.003030 progress 15 % (29 MB)
87 14:58:03.407338 progress 20 % (39 MB)
88 14:58:03.809233 progress 25 % (49 MB)
89 14:58:04.483153 progress 30 % (59 MB)
90 14:58:05.094496 progress 35 % (69 MB)
91 14:58:05.771758 progress 40 % (79 MB)
92 14:58:06.394424 progress 45 % (88 MB)
93 14:58:07.051413 progress 50 % (98 MB)
94 14:58:07.772792 progress 55 % (108 MB)
95 14:58:08.561255 progress 60 % (118 MB)
96 14:58:08.714200 progress 65 % (128 MB)
97 14:58:08.868118 progress 70 % (138 MB)
98 14:58:08.972170 progress 75 % (148 MB)
99 14:58:09.048865 progress 80 % (158 MB)
100 14:58:09.126122 progress 85 % (167 MB)
101 14:58:09.237330 progress 90 % (177 MB)
102 14:58:09.552776 progress 95 % (187 MB)
103 14:58:10.238806 progress 100 % (197 MB)
104 14:58:10.246064 197 MB downloaded in 9.14 s (21.61 MB/s)
105 14:58:10.246368 end: 1.3.1 http-download (duration 00:00:09) [common]
107 14:58:10.246692 end: 1.3 download-retry (duration 00:00:09) [common]
108 14:58:10.246808 start: 1.4 download-retry (timeout 00:09:51) [common]
109 14:58:10.246912 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 14:58:10.247099 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3262-g667bb8d8b2cb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:58:10.247212 saving as /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/modules/modules.tar
112 14:58:10.247319 total size: 253808 (0 MB)
113 14:58:10.247393 Using unxz to decompress xz
114 14:58:10.252217 progress 12 % (0 MB)
115 14:58:10.252688 progress 25 % (0 MB)
116 14:58:10.253016 progress 38 % (0 MB)
117 14:58:10.254665 progress 51 % (0 MB)
118 14:58:10.256797 progress 64 % (0 MB)
119 14:58:10.258937 progress 77 % (0 MB)
120 14:58:10.261119 progress 90 % (0 MB)
121 14:58:10.263023 progress 100 % (0 MB)
122 14:58:10.269582 0 MB downloaded in 0.02 s (10.88 MB/s)
123 14:58:10.269894 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:58:10.270342 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:58:10.270479 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 14:58:10.270621 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 14:58:14.938607 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11299752/extract-nfsrootfs-htah48jf
129 14:58:14.938878 end: 1.5.1 extract-nfsrootfs (duration 00:00:05) [common]
130 14:58:14.939026 start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
131 14:58:14.939266 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7
132 14:58:14.939421 makedir: /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin
133 14:58:14.939539 makedir: /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/tests
134 14:58:14.939653 makedir: /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/results
135 14:58:14.939767 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-add-keys
136 14:58:14.939928 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-add-sources
137 14:58:14.940077 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-background-process-start
138 14:58:14.940223 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-background-process-stop
139 14:58:14.940366 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-common-functions
140 14:58:14.940507 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-echo-ipv4
141 14:58:14.940650 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-install-packages
142 14:58:14.940790 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-installed-packages
143 14:58:14.940951 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-os-build
144 14:58:14.941094 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-probe-channel
145 14:58:14.941237 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-probe-ip
146 14:58:14.941378 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-target-ip
147 14:58:14.941521 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-target-mac
148 14:58:14.941662 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-target-storage
149 14:58:14.941810 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-test-case
150 14:58:14.941952 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-test-event
151 14:58:14.942101 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-test-feedback
152 14:58:14.942251 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-test-raise
153 14:58:14.942392 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-test-reference
154 14:58:14.942532 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-test-runner
155 14:58:14.942672 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-test-set
156 14:58:14.942813 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-test-shell
157 14:58:14.942956 Updating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-add-keys (debian)
158 14:58:14.943127 Updating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-add-sources (debian)
159 14:58:14.943311 Updating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-install-packages (debian)
160 14:58:14.943469 Updating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-installed-packages (debian)
161 14:58:14.943635 Updating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/bin/lava-os-build (debian)
162 14:58:14.943777 Creating /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/environment
163 14:58:14.943889 LAVA metadata
164 14:58:14.943972 - LAVA_JOB_ID=11299752
165 14:58:14.944044 - LAVA_DISPATCHER_IP=192.168.201.1
166 14:58:14.944156 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
167 14:58:14.944230 skipped lava-vland-overlay
168 14:58:14.944313 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 14:58:14.944400 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
170 14:58:14.944467 skipped lava-multinode-overlay
171 14:58:14.944546 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 14:58:14.944631 start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
173 14:58:14.944711 Loading test definitions
174 14:58:14.944811 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
175 14:58:14.944887 Using /lava-11299752 at stage 0
176 14:58:14.945207 uuid=11299752_1.5.2.3.1 testdef=None
177 14:58:14.945307 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 14:58:14.945400 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
179 14:58:14.945912 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 14:58:14.946158 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
182 14:58:14.946783 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 14:58:14.947040 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
185 14:58:14.947702 runner path: /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/0/tests/0_timesync-off test_uuid 11299752_1.5.2.3.1
186 14:58:14.947874 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 14:58:14.948122 start: 1.5.2.3.5 git-repo-action (timeout 00:09:46) [common]
189 14:58:14.948202 Using /lava-11299752 at stage 0
190 14:58:14.948311 Fetching tests from https://github.com/kernelci/test-definitions.git
191 14:58:14.948398 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/0/tests/1_kselftest-filesystems'
192 14:58:21.174989 Running '/usr/bin/git checkout kernelci.org
193 14:58:21.300002 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
194 14:58:21.300873 uuid=11299752_1.5.2.3.5 testdef=None
195 14:58:21.301054 end: 1.5.2.3.5 git-repo-action (duration 00:00:06) [common]
197 14:58:21.301339 start: 1.5.2.3.6 test-overlay (timeout 00:09:40) [common]
198 14:58:21.302185 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 14:58:21.302460 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:40) [common]
201 14:58:21.303553 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 14:58:21.303817 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:40) [common]
204 14:58:21.304914 runner path: /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/0/tests/1_kselftest-filesystems test_uuid 11299752_1.5.2.3.5
205 14:58:21.305017 BOARD='asus-C436FA-Flip-hatch'
206 14:58:21.305089 BRANCH='cip-gitlab'
207 14:58:21.305156 SKIPFILE='/dev/null'
208 14:58:21.305220 SKIP_INSTALL='True'
209 14:58:21.305282 TESTPROG_URL='None'
210 14:58:21.305343 TST_CASENAME=''
211 14:58:21.305403 TST_CMDFILES='filesystems'
212 14:58:21.305559 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 14:58:21.305815 Creating lava-test-runner.conf files
215 14:58:21.305890 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299752/lava-overlay-xqu0a7u7/lava-11299752/0 for stage 0
216 14:58:21.305996 - 0_timesync-off
217 14:58:21.306072 - 1_kselftest-filesystems
218 14:58:21.306179 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
219 14:58:21.306273 start: 1.5.2.4 compress-overlay (timeout 00:09:40) [common]
220 14:58:29.851000 end: 1.5.2.4 compress-overlay (duration 00:00:09) [common]
221 14:58:29.851181 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:31) [common]
222 14:58:29.851350 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 14:58:29.851466 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
224 14:58:29.851597 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:31) [common]
225 14:58:30.007902 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 14:58:30.008385 start: 1.5.4 extract-modules (timeout 00:09:31) [common]
227 14:58:30.008553 extracting modules file /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299752/extract-nfsrootfs-htah48jf
228 14:58:30.027002 extracting modules file /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299752/extract-overlay-ramdisk-2rj0af3n/ramdisk
229 14:58:30.045322 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 14:58:30.045532 start: 1.5.5 apply-overlay-tftp (timeout 00:09:31) [common]
231 14:58:30.045639 [common] Applying overlay to NFS
232 14:58:30.045721 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299752/compress-overlay-gpkwqk0l/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299752/extract-nfsrootfs-htah48jf
233 14:58:31.101830 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 14:58:31.102021 start: 1.5.6 configure-preseed-file (timeout 00:09:30) [common]
235 14:58:31.102126 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 14:58:31.102222 start: 1.5.7 compress-ramdisk (timeout 00:09:30) [common]
237 14:58:31.102313 Building ramdisk /var/lib/lava/dispatcher/tmp/11299752/extract-overlay-ramdisk-2rj0af3n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299752/extract-overlay-ramdisk-2rj0af3n/ramdisk
238 14:58:31.211318 >> 26198 blocks
239 14:58:31.880012 rename /var/lib/lava/dispatcher/tmp/11299752/extract-overlay-ramdisk-2rj0af3n/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/ramdisk/ramdisk.cpio.gz
240 14:58:31.880523 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 14:58:31.880662 start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
242 14:58:31.880776 start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
243 14:58:31.880880 No mkimage arch provided, not using FIT.
244 14:58:31.880975 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 14:58:31.881077 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 14:58:31.881196 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
247 14:58:31.881301 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
248 14:58:31.881387 No LXC device requested
249 14:58:31.881474 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 14:58:31.881572 start: 1.7 deploy-device-env (timeout 00:09:29) [common]
251 14:58:31.881662 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 14:58:31.881743 Checking files for TFTP limit of 4294967296 bytes.
253 14:58:31.882197 end: 1 tftp-deploy (duration 00:00:31) [common]
254 14:58:31.882314 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 14:58:31.882413 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 14:58:31.882551 substitutions:
257 14:58:31.882629 - {DTB}: None
258 14:58:31.882697 - {INITRD}: 11299752/tftp-deploy-2nog7zrj/ramdisk/ramdisk.cpio.gz
259 14:58:31.882762 - {KERNEL}: 11299752/tftp-deploy-2nog7zrj/kernel/bzImage
260 14:58:31.882824 - {LAVA_MAC}: None
261 14:58:31.882886 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11299752/extract-nfsrootfs-htah48jf
262 14:58:31.882949 - {NFS_SERVER_IP}: 192.168.201.1
263 14:58:31.883009 - {PRESEED_CONFIG}: None
264 14:58:31.883069 - {PRESEED_LOCAL}: None
265 14:58:31.883129 - {RAMDISK}: 11299752/tftp-deploy-2nog7zrj/ramdisk/ramdisk.cpio.gz
266 14:58:31.883189 - {ROOT_PART}: None
267 14:58:31.883264 - {ROOT}: None
268 14:58:31.883326 - {SERVER_IP}: 192.168.201.1
269 14:58:31.883385 - {TEE}: None
270 14:58:31.883444 Parsed boot commands:
271 14:58:31.883503 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 14:58:31.883701 Parsed boot commands: tftpboot 192.168.201.1 11299752/tftp-deploy-2nog7zrj/kernel/bzImage 11299752/tftp-deploy-2nog7zrj/kernel/cmdline 11299752/tftp-deploy-2nog7zrj/ramdisk/ramdisk.cpio.gz
273 14:58:31.883803 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 14:58:31.883895 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 14:58:31.883998 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 14:58:31.884093 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 14:58:31.884174 Not connected, no need to disconnect.
278 14:58:31.884258 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 14:58:31.884351 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 14:58:31.884424 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
281 14:58:31.888855 Setting prompt string to ['lava-test: # ']
282 14:58:31.889269 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 14:58:31.889389 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 14:58:31.889498 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 14:58:31.889606 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 14:58:31.889834 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
287 14:58:37.034680 >> Command sent successfully.
288 14:58:37.045087 Returned 0 in 5 seconds
289 14:58:37.146390 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 14:58:37.147182 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 14:58:37.147498 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 14:58:37.147744 Setting prompt string to 'Starting depthcharge on Helios...'
294 14:58:37.147935 Changing prompt to 'Starting depthcharge on Helios...'
295 14:58:37.148129 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 14:58:37.148818 [Enter `^Ec?' for help]
297 14:58:37.759282
298 14:58:37.759445
299 14:58:37.769240 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 14:58:37.772487 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 14:58:37.779327 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 14:58:37.782370 CPU: AES supported, TXT NOT supported, VT supported
303 14:58:37.789399 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 14:58:37.792447 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 14:58:37.799450 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 14:58:37.802450 VBOOT: Loading verstage.
307 14:58:37.805846 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 14:58:37.812692 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 14:58:37.815659 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 14:58:37.819254 CBFS @ c08000 size 3f8000
311 14:58:37.825828 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 14:58:37.828972 CBFS: Locating 'fallback/verstage'
313 14:58:37.832337 CBFS: Found @ offset 10fb80 size 1072c
314 14:58:37.835667
315 14:58:37.835759
316 14:58:37.846075 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 14:58:37.860082 Probing TPM: . done!
318 14:58:37.863376 TPM ready after 0 ms
319 14:58:37.866863 Connected to device vid:did:rid of 1ae0:0028:00
320 14:58:37.876636 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 14:58:37.880509 Initialized TPM device CR50 revision 0
322 14:58:37.923799 tlcl_send_startup: Startup return code is 0
323 14:58:37.923917 TPM: setup succeeded
324 14:58:37.936785 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 14:58:37.940665 Chrome EC: UHEPI supported
326 14:58:37.943999 Phase 1
327 14:58:37.947170 FMAP: area GBB found @ c05000 (12288 bytes)
328 14:58:37.953801 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 14:58:37.953899 Phase 2
330 14:58:37.957152 Phase 3
331 14:58:37.960415 FMAP: area GBB found @ c05000 (12288 bytes)
332 14:58:37.967139 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 14:58:37.973768 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
334 14:58:37.976856 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
335 14:58:37.983594 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 14:58:37.999029 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
337 14:58:38.002356 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
338 14:58:38.009102 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 14:58:38.012962 Phase 4
340 14:58:38.016330 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
341 14:58:38.023157 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 14:58:38.203074 VB2:vb2_rsa_verify_digest() Digest check failed!
343 14:58:38.209330 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 14:58:38.209429 Saving nvdata
345 14:58:38.212977 Reboot requested (10020007)
346 14:58:38.216298 board_reset() called!
347 14:58:38.216392 full_reset() called!
348 14:58:42.726567
349 14:58:42.726742
350 14:58:42.736379 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 14:58:42.739830 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 14:58:42.746149 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 14:58:42.749833 CPU: AES supported, TXT NOT supported, VT supported
354 14:58:42.756326 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 14:58:42.759690 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 14:58:42.766056 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 14:58:42.769418 VBOOT: Loading verstage.
358 14:58:42.772703 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 14:58:42.779844 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 14:58:42.782766 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 14:58:42.786182 CBFS @ c08000 size 3f8000
362 14:58:42.792754 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 14:58:42.796218 CBFS: Locating 'fallback/verstage'
364 14:58:42.799684 CBFS: Found @ offset 10fb80 size 1072c
365 14:58:42.802799
366 14:58:42.802928
367 14:58:42.812853 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 14:58:42.827381 Probing TPM: . done!
369 14:58:42.830406 TPM ready after 0 ms
370 14:58:42.834155 Connected to device vid:did:rid of 1ae0:0028:00
371 14:58:42.844256 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 14:58:42.847625 Initialized TPM device CR50 revision 0
373 14:58:42.891433 tlcl_send_startup: Startup return code is 0
374 14:58:42.891600 TPM: setup succeeded
375 14:58:42.904213 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 14:58:42.907571 Chrome EC: UHEPI supported
377 14:58:42.910931 Phase 1
378 14:58:42.914653 FMAP: area GBB found @ c05000 (12288 bytes)
379 14:58:42.920827 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 14:58:42.927740 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 14:58:42.931112 Recovery requested (1009000e)
382 14:58:42.936965 Saving nvdata
383 14:58:42.943195 tlcl_extend: response is 0
384 14:58:42.951584 tlcl_extend: response is 0
385 14:58:42.958682 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 14:58:42.961852 CBFS @ c08000 size 3f8000
387 14:58:42.968557 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 14:58:42.972290 CBFS: Locating 'fallback/romstage'
389 14:58:42.975179 CBFS: Found @ offset 80 size 145fc
390 14:58:42.978540 Accumulated console time in verstage 98 ms
391 14:58:42.978651
392 14:58:42.978725
393 14:58:42.991725 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 14:58:42.998813 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 14:58:43.002207 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 14:58:43.005350 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 14:58:43.011935 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 14:58:43.014806 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 14:58:43.018239 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
400 14:58:43.021549 TCO_STS: 0000 0000
401 14:58:43.025013 GEN_PMCON: e0015238 00000200
402 14:58:43.028045 GBLRST_CAUSE: 00000000 00000000
403 14:58:43.028145 prev_sleep_state 5
404 14:58:43.031557 Boot Count incremented to 63127
405 14:58:43.038365 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 14:58:43.041596 CBFS @ c08000 size 3f8000
407 14:58:43.048255 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 14:58:43.048409 CBFS: Locating 'fspm.bin'
409 14:58:43.054881 CBFS: Found @ offset 5ffc0 size 71000
410 14:58:43.058504 Chrome EC: UHEPI supported
411 14:58:43.064958 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 14:58:43.068359 Probing TPM: done!
413 14:58:43.075436 Connected to device vid:did:rid of 1ae0:0028:00
414 14:58:43.084882 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 14:58:43.091040 Initialized TPM device CR50 revision 0
416 14:58:43.099690 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 14:58:43.106536 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 14:58:43.109906 MRC cache found, size 1948
419 14:58:43.113254 bootmode is set to: 2
420 14:58:43.116450 PRMRR disabled by config.
421 14:58:43.116548 SPD INDEX = 1
422 14:58:43.123186 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 14:58:43.126696 CBFS @ c08000 size 3f8000
424 14:58:43.130016 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 14:58:43.133147 CBFS: Locating 'spd.bin'
426 14:58:43.136285 CBFS: Found @ offset 5fb80 size 400
427 14:58:43.139917 SPD: module type is LPDDR3
428 14:58:43.142953 SPD: module part is
429 14:58:43.149614 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 14:58:43.153125 SPD: device width 4 bits, bus width 8 bits
431 14:58:43.156471 SPD: module size is 4096 MB (per channel)
432 14:58:43.160133 memory slot: 0 configuration done.
433 14:58:43.163410 memory slot: 2 configuration done.
434 14:58:43.214669 CBMEM:
435 14:58:43.217839 IMD: root @ 99fff000 254 entries.
436 14:58:43.221304 IMD: root @ 99ffec00 62 entries.
437 14:58:43.224774 External stage cache:
438 14:58:43.227511 IMD: root @ 9abff000 254 entries.
439 14:58:43.231344 IMD: root @ 9abfec00 62 entries.
440 14:58:43.234640 Chrome EC: clear events_b mask to 0x0000000020004000
441 14:58:43.250505 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 14:58:43.260912 tlcl_write: response is 0
443 14:58:43.272794 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 14:58:43.279340 MRC: TPM MRC hash updated successfully.
445 14:58:43.279471 2 DIMMs found
446 14:58:43.282517 SMM Memory Map
447 14:58:43.285999 SMRAM : 0x9a000000 0x1000000
448 14:58:43.289437 Subregion 0: 0x9a000000 0xa00000
449 14:58:43.292611 Subregion 1: 0x9aa00000 0x200000
450 14:58:43.296134 Subregion 2: 0x9ac00000 0x400000
451 14:58:43.299481 top_of_ram = 0x9a000000
452 14:58:43.302824 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 14:58:43.309057 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 14:58:43.312911 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 14:58:43.319462 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 14:58:43.322533 CBFS @ c08000 size 3f8000
457 14:58:43.325993 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 14:58:43.329310 CBFS: Locating 'fallback/postcar'
459 14:58:43.332807 CBFS: Found @ offset 107000 size 4b44
460 14:58:43.339527 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 14:58:43.351735 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 14:58:43.354512 Processing 180 relocs. Offset value of 0x97c0c000
463 14:58:43.363075 Accumulated console time in romstage 286 ms
464 14:58:43.363247
465 14:58:43.363332
466 14:58:43.373398 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 14:58:43.379987 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 14:58:43.383266 CBFS @ c08000 size 3f8000
469 14:58:43.386468 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 14:58:43.390032 CBFS: Locating 'fallback/ramstage'
471 14:58:43.396678 CBFS: Found @ offset 43380 size 1b9e8
472 14:58:43.403460 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 14:58:43.434951 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 14:58:43.438421 Processing 3976 relocs. Offset value of 0x98db0000
475 14:58:43.445006 Accumulated console time in postcar 52 ms
476 14:58:43.445156
477 14:58:43.445264
478 14:58:43.454861 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 14:58:43.462008 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 14:58:43.465181 WARNING: RO_VPD is uninitialized or empty.
481 14:58:43.468469 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 14:58:43.475263 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 14:58:43.475393 Normal boot.
484 14:58:43.481716 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 14:58:43.484912 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 14:58:43.488166 CBFS @ c08000 size 3f8000
487 14:58:43.494801 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 14:58:43.498211 CBFS: Locating 'cpu_microcode_blob.bin'
489 14:58:43.501304 CBFS: Found @ offset 14700 size 2ec00
490 14:58:43.504789 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 14:58:43.508362 Skip microcode update
492 14:58:43.511615 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 14:58:43.514847 CBFS @ c08000 size 3f8000
494 14:58:43.521583 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 14:58:43.524994 CBFS: Locating 'fsps.bin'
496 14:58:43.527803 CBFS: Found @ offset d1fc0 size 35000
497 14:58:43.553182 Detected 4 core, 8 thread CPU.
498 14:58:43.556827 Setting up SMI for CPU
499 14:58:43.560117 IED base = 0x9ac00000
500 14:58:43.560217 IED size = 0x00400000
501 14:58:43.562907 Will perform SMM setup.
502 14:58:43.570141 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 14:58:43.576626 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 14:58:43.580004 Processing 16 relocs. Offset value of 0x00030000
505 14:58:43.583155 Attempting to start 7 APs
506 14:58:43.586553 Waiting for 10ms after sending INIT.
507 14:58:43.603111 Waiting for 1st SIPI to complete...done.
508 14:58:43.603293 AP: slot 1 apic_id 1.
509 14:58:43.609707 Waiting for 2nd SIPI to complete...done.
510 14:58:43.609819 AP: slot 7 apic_id 4.
511 14:58:43.613187 AP: slot 5 apic_id 5.
512 14:58:43.616145 AP: slot 3 apic_id 7.
513 14:58:43.616249 AP: slot 4 apic_id 3.
514 14:58:43.619382 AP: slot 6 apic_id 2.
515 14:58:43.622859 AP: slot 2 apic_id 6.
516 14:58:43.629529 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 14:58:43.635807 Processing 13 relocs. Offset value of 0x00038000
518 14:58:43.643057 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 14:58:43.646002 Installing SMM handler to 0x9a000000
520 14:58:43.653144 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 14:58:43.655852 Processing 658 relocs. Offset value of 0x9a010000
522 14:58:43.666190 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 14:58:43.669516 Processing 13 relocs. Offset value of 0x9a008000
524 14:58:43.675764 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 14:58:43.682577 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 14:58:43.688907 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 14:58:43.692333 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 14:58:43.699110 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 14:58:43.705427 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 14:58:43.711986 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 14:58:43.715223 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 14:58:43.719014 Clearing SMI status registers
533 14:58:43.722272 SMI_STS: PM1
534 14:58:43.722375 PM1_STS: PWRBTN
535 14:58:43.725903 TCO_STS: SECOND_TO
536 14:58:43.728962 New SMBASE 0x9a000000
537 14:58:43.732302 In relocation handler: CPU 0
538 14:58:43.736055 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 14:58:43.738942 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 14:58:43.742396 Relocation complete.
541 14:58:43.745836 New SMBASE 0x99fffc00
542 14:58:43.745941 In relocation handler: CPU 1
543 14:58:43.752377 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
544 14:58:43.755968 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 14:58:43.759031 Relocation complete.
546 14:58:43.762353 New SMBASE 0x99fff800
547 14:58:43.762461 In relocation handler: CPU 2
548 14:58:43.768898 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
549 14:58:43.772428 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 14:58:43.775634 Relocation complete.
551 14:58:43.775733 New SMBASE 0x99ffec00
552 14:58:43.778721 In relocation handler: CPU 5
553 14:58:43.785858 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
554 14:58:43.789142 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 14:58:43.792205 Relocation complete.
556 14:58:43.792328 New SMBASE 0x99fff000
557 14:58:43.795654 In relocation handler: CPU 4
558 14:58:43.799068 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
559 14:58:43.805864 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 14:58:43.808914 Relocation complete.
561 14:58:43.809022 New SMBASE 0x99ffe800
562 14:58:43.812315 In relocation handler: CPU 6
563 14:58:43.815638 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
564 14:58:43.822310 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 14:58:43.822424 Relocation complete.
566 14:58:43.825554 New SMBASE 0x99ffe400
567 14:58:43.828881 In relocation handler: CPU 7
568 14:58:43.832590 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
569 14:58:43.839153 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 14:58:43.839282 Relocation complete.
571 14:58:43.842336 New SMBASE 0x99fff400
572 14:58:43.845392 In relocation handler: CPU 3
573 14:58:43.849040 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
574 14:58:43.855694 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 14:58:43.855817 Relocation complete.
576 14:58:43.858731 Initializing CPU #0
577 14:58:43.862440 CPU: vendor Intel device 806ec
578 14:58:43.865342 CPU: family 06, model 8e, stepping 0c
579 14:58:43.868989 Clearing out pending MCEs
580 14:58:43.872120 Setting up local APIC...
581 14:58:43.872223 apic_id: 0x00 done.
582 14:58:43.875189 Turbo is available but hidden
583 14:58:43.878693 Turbo is available and visible
584 14:58:43.882391 VMX status: enabled
585 14:58:43.885553 IA32_FEATURE_CONTROL status: locked
586 14:58:43.888917 Skip microcode update
587 14:58:43.889016 CPU #0 initialized
588 14:58:43.892325 Initializing CPU #1
589 14:58:43.892421 Initializing CPU #3
590 14:58:43.895518 Initializing CPU #2
591 14:58:43.898723 CPU: vendor Intel device 806ec
592 14:58:43.902055 CPU: family 06, model 8e, stepping 0c
593 14:58:43.905501 CPU: vendor Intel device 806ec
594 14:58:43.908802 CPU: family 06, model 8e, stepping 0c
595 14:58:43.912096 Clearing out pending MCEs
596 14:58:43.915388 Clearing out pending MCEs
597 14:58:43.918819 Setting up local APIC...
598 14:58:43.918920 Initializing CPU #7
599 14:58:43.921686 Initializing CPU #5
600 14:58:43.925164 CPU: vendor Intel device 806ec
601 14:58:43.928907 CPU: family 06, model 8e, stepping 0c
602 14:58:43.931974 CPU: vendor Intel device 806ec
603 14:58:43.935336 CPU: family 06, model 8e, stepping 0c
604 14:58:43.938748 Clearing out pending MCEs
605 14:58:43.941814 Clearing out pending MCEs
606 14:58:43.941911 Setting up local APIC...
607 14:58:43.945201 apic_id: 0x07 done.
608 14:58:43.948716 Setting up local APIC...
609 14:58:43.951429 CPU: vendor Intel device 806ec
610 14:58:43.955188 CPU: family 06, model 8e, stepping 0c
611 14:58:43.958459 Clearing out pending MCEs
612 14:58:43.958562 Initializing CPU #4
613 14:58:43.961899 Initializing CPU #6
614 14:58:43.964888 CPU: vendor Intel device 806ec
615 14:58:43.968823 CPU: family 06, model 8e, stepping 0c
616 14:58:43.971884 CPU: vendor Intel device 806ec
617 14:58:43.974978 CPU: family 06, model 8e, stepping 0c
618 14:58:43.978490 Clearing out pending MCEs
619 14:58:43.982026 Clearing out pending MCEs
620 14:58:43.982130 Setting up local APIC...
621 14:58:43.985366 apic_id: 0x06 done.
622 14:58:43.988386 VMX status: enabled
623 14:58:43.988499 VMX status: enabled
624 14:58:43.991923 Setting up local APIC...
625 14:58:43.994860 Setting up local APIC...
626 14:58:43.998588 IA32_FEATURE_CONTROL status: locked
627 14:58:44.001808 IA32_FEATURE_CONTROL status: locked
628 14:58:44.005445 Skip microcode update
629 14:58:44.005547 Skip microcode update
630 14:58:44.008512 CPU #2 initialized
631 14:58:44.008611 CPU #3 initialized
632 14:58:44.011927 Setting up local APIC...
633 14:58:44.014794 apic_id: 0x02 done.
634 14:58:44.014896 apic_id: 0x03 done.
635 14:58:44.018345 VMX status: enabled
636 14:58:44.021589 VMX status: enabled
637 14:58:44.025005 IA32_FEATURE_CONTROL status: locked
638 14:58:44.028360 IA32_FEATURE_CONTROL status: locked
639 14:58:44.031414 Skip microcode update
640 14:58:44.031515 Skip microcode update
641 14:58:44.034828 CPU #6 initialized
642 14:58:44.034927 CPU #4 initialized
643 14:58:44.037985 apic_id: 0x05 done.
644 14:58:44.041245 apic_id: 0x04 done.
645 14:58:44.041368 VMX status: enabled
646 14:58:44.044930 VMX status: enabled
647 14:58:44.048232 IA32_FEATURE_CONTROL status: locked
648 14:58:44.051737 IA32_FEATURE_CONTROL status: locked
649 14:58:44.054841 Skip microcode update
650 14:58:44.054963 Skip microcode update
651 14:58:44.058020 CPU #5 initialized
652 14:58:44.061302 CPU #7 initialized
653 14:58:44.061424 apic_id: 0x01 done.
654 14:58:44.064872 VMX status: enabled
655 14:58:44.068126 IA32_FEATURE_CONTROL status: locked
656 14:58:44.071336 Skip microcode update
657 14:58:44.071467 CPU #1 initialized
658 14:58:44.078181 bsp_do_flight_plan done after 466 msecs.
659 14:58:44.078313 CPU: frequency set to 4200 MHz
660 14:58:44.081070 Enabling SMIs.
661 14:58:44.081191 Locking SMM.
662 14:58:44.097236 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 14:58:44.100594 CBFS @ c08000 size 3f8000
664 14:58:44.107214 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 14:58:44.107348 CBFS: Locating 'vbt.bin'
666 14:58:44.110611 CBFS: Found @ offset 5f5c0 size 499
667 14:58:44.117202 Found a VBT of 4608 bytes after decompression
668 14:58:44.297846 Display FSP Version Info HOB
669 14:58:44.300911 Reference Code - CPU = 9.0.1e.30
670 14:58:44.304163 uCode Version = 0.0.0.ca
671 14:58:44.307882 TXT ACM version = ff.ff.ff.ffff
672 14:58:44.310797 Display FSP Version Info HOB
673 14:58:44.314223 Reference Code - ME = 9.0.1e.30
674 14:58:44.317506 MEBx version = 0.0.0.0
675 14:58:44.320944 ME Firmware Version = Consumer SKU
676 14:58:44.324229 Display FSP Version Info HOB
677 14:58:44.327672 Reference Code - CML PCH = 9.0.1e.30
678 14:58:44.331031 PCH-CRID Status = Disabled
679 14:58:44.334107 PCH-CRID Original Value = ff.ff.ff.ffff
680 14:58:44.337654 PCH-CRID New Value = ff.ff.ff.ffff
681 14:58:44.341102 OPROM - RST - RAID = ff.ff.ff.ffff
682 14:58:44.344195 ChipsetInit Base Version = ff.ff.ff.ffff
683 14:58:44.347412 ChipsetInit Oem Version = ff.ff.ff.ffff
684 14:58:44.351249 Display FSP Version Info HOB
685 14:58:44.357990 Reference Code - SA - System Agent = 9.0.1e.30
686 14:58:44.358110 Reference Code - MRC = 0.7.1.6c
687 14:58:44.361102 SA - PCIe Version = 9.0.1e.30
688 14:58:44.364331 SA-CRID Status = Disabled
689 14:58:44.367376 SA-CRID Original Value = 0.0.0.c
690 14:58:44.371045 SA-CRID New Value = 0.0.0.c
691 14:58:44.374089 OPROM - VBIOS = ff.ff.ff.ffff
692 14:58:44.374193 RTC Init
693 14:58:44.381313 Set power on after power failure.
694 14:58:44.381439 Disabling Deep S3
695 14:58:44.384187 Disabling Deep S3
696 14:58:44.384286 Disabling Deep S4
697 14:58:44.387928 Disabling Deep S4
698 14:58:44.388027 Disabling Deep S5
699 14:58:44.390874 Disabling Deep S5
700 14:58:44.397582 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 191 exit 1
701 14:58:44.397694 Enumerating buses...
702 14:58:44.404579 Show all devs... Before device enumeration.
703 14:58:44.404735 Root Device: enabled 1
704 14:58:44.407568 CPU_CLUSTER: 0: enabled 1
705 14:58:44.411156 DOMAIN: 0000: enabled 1
706 14:58:44.411289 APIC: 00: enabled 1
707 14:58:44.413966 PCI: 00:00.0: enabled 1
708 14:58:44.417313 PCI: 00:02.0: enabled 1
709 14:58:44.420756 PCI: 00:04.0: enabled 0
710 14:58:44.420860 PCI: 00:05.0: enabled 0
711 14:58:44.424039 PCI: 00:12.0: enabled 1
712 14:58:44.427525 PCI: 00:12.5: enabled 0
713 14:58:44.430762 PCI: 00:12.6: enabled 0
714 14:58:44.430862 PCI: 00:14.0: enabled 1
715 14:58:44.434220 PCI: 00:14.1: enabled 0
716 14:58:44.437426 PCI: 00:14.3: enabled 1
717 14:58:44.440804 PCI: 00:14.5: enabled 0
718 14:58:44.440905 PCI: 00:15.0: enabled 1
719 14:58:44.444148 PCI: 00:15.1: enabled 1
720 14:58:44.447481 PCI: 00:15.2: enabled 0
721 14:58:44.447583 PCI: 00:15.3: enabled 0
722 14:58:44.450653 PCI: 00:16.0: enabled 1
723 14:58:44.454318 PCI: 00:16.1: enabled 0
724 14:58:44.457491 PCI: 00:16.2: enabled 0
725 14:58:44.457594 PCI: 00:16.3: enabled 0
726 14:58:44.460712 PCI: 00:16.4: enabled 0
727 14:58:44.464109 PCI: 00:16.5: enabled 0
728 14:58:44.467591 PCI: 00:17.0: enabled 1
729 14:58:44.467693 PCI: 00:19.0: enabled 1
730 14:58:44.470482 PCI: 00:19.1: enabled 0
731 14:58:44.474061 PCI: 00:19.2: enabled 0
732 14:58:44.477165 PCI: 00:1a.0: enabled 0
733 14:58:44.477267 PCI: 00:1c.0: enabled 0
734 14:58:44.480600 PCI: 00:1c.1: enabled 0
735 14:58:44.484169 PCI: 00:1c.2: enabled 0
736 14:58:44.484274 PCI: 00:1c.3: enabled 0
737 14:58:44.487492 PCI: 00:1c.4: enabled 0
738 14:58:44.490580 PCI: 00:1c.5: enabled 0
739 14:58:44.493876 PCI: 00:1c.6: enabled 0
740 14:58:44.494007 PCI: 00:1c.7: enabled 0
741 14:58:44.497220 PCI: 00:1d.0: enabled 1
742 14:58:44.500435 PCI: 00:1d.1: enabled 0
743 14:58:44.503948 PCI: 00:1d.2: enabled 0
744 14:58:44.504050 PCI: 00:1d.3: enabled 0
745 14:58:44.507250 PCI: 00:1d.4: enabled 0
746 14:58:44.510494 PCI: 00:1d.5: enabled 1
747 14:58:44.510628 PCI: 00:1e.0: enabled 1
748 14:58:44.514128 PCI: 00:1e.1: enabled 0
749 14:58:44.517066 PCI: 00:1e.2: enabled 1
750 14:58:44.520511 PCI: 00:1e.3: enabled 1
751 14:58:44.520610 PCI: 00:1f.0: enabled 1
752 14:58:44.524114 PCI: 00:1f.1: enabled 1
753 14:58:44.527301 PCI: 00:1f.2: enabled 1
754 14:58:44.530792 PCI: 00:1f.3: enabled 1
755 14:58:44.530888 PCI: 00:1f.4: enabled 1
756 14:58:44.534008 PCI: 00:1f.5: enabled 1
757 14:58:44.537543 PCI: 00:1f.6: enabled 0
758 14:58:44.537641 USB0 port 0: enabled 1
759 14:58:44.540969 I2C: 00:15: enabled 1
760 14:58:44.544187 I2C: 00:5d: enabled 1
761 14:58:44.546896 GENERIC: 0.0: enabled 1
762 14:58:44.547021 I2C: 00:1a: enabled 1
763 14:58:44.550199 I2C: 00:38: enabled 1
764 14:58:44.553645 I2C: 00:39: enabled 1
765 14:58:44.553742 I2C: 00:3a: enabled 1
766 14:58:44.557055 I2C: 00:3b: enabled 1
767 14:58:44.560281 PCI: 00:00.0: enabled 1
768 14:58:44.560378 SPI: 00: enabled 1
769 14:58:44.563898 SPI: 01: enabled 1
770 14:58:44.566995 PNP: 0c09.0: enabled 1
771 14:58:44.567092 USB2 port 0: enabled 1
772 14:58:44.570387 USB2 port 1: enabled 1
773 14:58:44.573831 USB2 port 2: enabled 0
774 14:58:44.573935 USB2 port 3: enabled 0
775 14:58:44.576962 USB2 port 5: enabled 0
776 14:58:44.580292 USB2 port 6: enabled 1
777 14:58:44.580387 USB2 port 9: enabled 1
778 14:58:44.583516 USB3 port 0: enabled 1
779 14:58:44.587214 USB3 port 1: enabled 1
780 14:58:44.590173 USB3 port 2: enabled 1
781 14:58:44.590269 USB3 port 3: enabled 1
782 14:58:44.593823 USB3 port 4: enabled 0
783 14:58:44.597050 APIC: 01: enabled 1
784 14:58:44.597175 APIC: 06: enabled 1
785 14:58:44.600192 APIC: 07: enabled 1
786 14:58:44.600317 APIC: 03: enabled 1
787 14:58:44.603345 APIC: 05: enabled 1
788 14:58:44.606799 APIC: 02: enabled 1
789 14:58:44.606894 APIC: 04: enabled 1
790 14:58:44.610209 Compare with tree...
791 14:58:44.613621 Root Device: enabled 1
792 14:58:44.613752 CPU_CLUSTER: 0: enabled 1
793 14:58:44.616946 APIC: 00: enabled 1
794 14:58:44.620470 APIC: 01: enabled 1
795 14:58:44.623637 APIC: 06: enabled 1
796 14:58:44.623759 APIC: 07: enabled 1
797 14:58:44.626558 APIC: 03: enabled 1
798 14:58:44.630200 APIC: 05: enabled 1
799 14:58:44.630299 APIC: 02: enabled 1
800 14:58:44.633540 APIC: 04: enabled 1
801 14:58:44.636767 DOMAIN: 0000: enabled 1
802 14:58:44.636863 PCI: 00:00.0: enabled 1
803 14:58:44.640165 PCI: 00:02.0: enabled 1
804 14:58:44.643437 PCI: 00:04.0: enabled 0
805 14:58:44.646759 PCI: 00:05.0: enabled 0
806 14:58:44.650181 PCI: 00:12.0: enabled 1
807 14:58:44.650282 PCI: 00:12.5: enabled 0
808 14:58:44.653618 PCI: 00:12.6: enabled 0
809 14:58:44.656913 PCI: 00:14.0: enabled 1
810 14:58:44.660412 USB0 port 0: enabled 1
811 14:58:44.663606 USB2 port 0: enabled 1
812 14:58:44.663703 USB2 port 1: enabled 1
813 14:58:44.666896 USB2 port 2: enabled 0
814 14:58:44.669817 USB2 port 3: enabled 0
815 14:58:44.673209 USB2 port 5: enabled 0
816 14:58:44.676520 USB2 port 6: enabled 1
817 14:58:44.676618 USB2 port 9: enabled 1
818 14:58:44.679822 USB3 port 0: enabled 1
819 14:58:44.683596 USB3 port 1: enabled 1
820 14:58:44.686722 USB3 port 2: enabled 1
821 14:58:44.690182 USB3 port 3: enabled 1
822 14:58:44.693347 USB3 port 4: enabled 0
823 14:58:44.693448 PCI: 00:14.1: enabled 0
824 14:58:44.696784 PCI: 00:14.3: enabled 1
825 14:58:44.699596 PCI: 00:14.5: enabled 0
826 14:58:44.703405 PCI: 00:15.0: enabled 1
827 14:58:44.706518 I2C: 00:15: enabled 1
828 14:58:44.706651 PCI: 00:15.1: enabled 1
829 14:58:44.709735 I2C: 00:5d: enabled 1
830 14:58:44.712747 GENERIC: 0.0: enabled 1
831 14:58:44.716382 PCI: 00:15.2: enabled 0
832 14:58:44.719386 PCI: 00:15.3: enabled 0
833 14:58:44.719487 PCI: 00:16.0: enabled 1
834 14:58:44.722953 PCI: 00:16.1: enabled 0
835 14:58:44.725909 PCI: 00:16.2: enabled 0
836 14:58:44.729599 PCI: 00:16.3: enabled 0
837 14:58:44.729701 PCI: 00:16.4: enabled 0
838 14:58:44.732934 PCI: 00:16.5: enabled 0
839 14:58:44.736122 PCI: 00:17.0: enabled 1
840 14:58:44.739467 PCI: 00:19.0: enabled 1
841 14:58:44.742780 I2C: 00:1a: enabled 1
842 14:58:44.742881 I2C: 00:38: enabled 1
843 14:58:44.746252 I2C: 00:39: enabled 1
844 14:58:44.749757 I2C: 00:3a: enabled 1
845 14:58:44.752642 I2C: 00:3b: enabled 1
846 14:58:44.752740 PCI: 00:19.1: enabled 0
847 14:58:44.756140 PCI: 00:19.2: enabled 0
848 14:58:44.759454 PCI: 00:1a.0: enabled 0
849 14:58:44.762988 PCI: 00:1c.0: enabled 0
850 14:58:44.766067 PCI: 00:1c.1: enabled 0
851 14:58:44.766163 PCI: 00:1c.2: enabled 0
852 14:58:44.769458 PCI: 00:1c.3: enabled 0
853 14:58:44.772615 PCI: 00:1c.4: enabled 0
854 14:58:44.776119 PCI: 00:1c.5: enabled 0
855 14:58:44.779434 PCI: 00:1c.6: enabled 0
856 14:58:44.779541 PCI: 00:1c.7: enabled 0
857 14:58:44.782904 PCI: 00:1d.0: enabled 1
858 14:58:44.785906 PCI: 00:1d.1: enabled 0
859 14:58:44.789119 PCI: 00:1d.2: enabled 0
860 14:58:44.792461 PCI: 00:1d.3: enabled 0
861 14:58:44.792559 PCI: 00:1d.4: enabled 0
862 14:58:44.795766 PCI: 00:1d.5: enabled 1
863 14:58:44.799019 PCI: 00:00.0: enabled 1
864 14:58:44.802313 PCI: 00:1e.0: enabled 1
865 14:58:44.806024 PCI: 00:1e.1: enabled 0
866 14:58:44.806122 PCI: 00:1e.2: enabled 1
867 14:58:44.809227 SPI: 00: enabled 1
868 14:58:44.812407 PCI: 00:1e.3: enabled 1
869 14:58:44.812505 SPI: 01: enabled 1
870 14:58:44.815688 PCI: 00:1f.0: enabled 1
871 14:58:44.818912 PNP: 0c09.0: enabled 1
872 14:58:44.822292 PCI: 00:1f.1: enabled 1
873 14:58:44.826054 PCI: 00:1f.2: enabled 1
874 14:58:44.826184 PCI: 00:1f.3: enabled 1
875 14:58:44.828966 PCI: 00:1f.4: enabled 1
876 14:58:44.832123 PCI: 00:1f.5: enabled 1
877 14:58:44.835423 PCI: 00:1f.6: enabled 0
878 14:58:44.839222 Root Device scanning...
879 14:58:44.842128 scan_static_bus for Root Device
880 14:58:44.842227 CPU_CLUSTER: 0 enabled
881 14:58:44.845418 DOMAIN: 0000 enabled
882 14:58:44.848883 DOMAIN: 0000 scanning...
883 14:58:44.852361 PCI: pci_scan_bus for bus 00
884 14:58:44.855514 PCI: 00:00.0 [8086/0000] ops
885 14:58:44.858721 PCI: 00:00.0 [8086/9b61] enabled
886 14:58:44.862002 PCI: 00:02.0 [8086/0000] bus ops
887 14:58:44.865624 PCI: 00:02.0 [8086/9b41] enabled
888 14:58:44.869034 PCI: 00:04.0 [8086/1903] disabled
889 14:58:44.871854 PCI: 00:08.0 [8086/1911] enabled
890 14:58:44.875282 PCI: 00:12.0 [8086/02f9] enabled
891 14:58:44.879007 PCI: 00:14.0 [8086/0000] bus ops
892 14:58:44.882036 PCI: 00:14.0 [8086/02ed] enabled
893 14:58:44.885403 PCI: 00:14.2 [8086/02ef] enabled
894 14:58:44.888617 PCI: 00:14.3 [8086/02f0] enabled
895 14:58:44.892391 PCI: 00:15.0 [8086/0000] bus ops
896 14:58:44.895433 PCI: 00:15.0 [8086/02e8] enabled
897 14:58:44.898629 PCI: 00:15.1 [8086/0000] bus ops
898 14:58:44.902107 PCI: 00:15.1 [8086/02e9] enabled
899 14:58:44.905500 PCI: 00:16.0 [8086/0000] ops
900 14:58:44.908980 PCI: 00:16.0 [8086/02e0] enabled
901 14:58:44.909081 PCI: 00:17.0 [8086/0000] ops
902 14:58:44.912238 PCI: 00:17.0 [8086/02d3] enabled
903 14:58:44.915262 PCI: 00:19.0 [8086/0000] bus ops
904 14:58:44.918626 PCI: 00:19.0 [8086/02c5] enabled
905 14:58:44.922290 PCI: 00:1d.0 [8086/0000] bus ops
906 14:58:44.925463 PCI: 00:1d.0 [8086/02b0] enabled
907 14:58:44.931844 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 14:58:44.935063 PCI: 00:1e.0 [8086/0000] ops
909 14:58:44.938441 PCI: 00:1e.0 [8086/02a8] enabled
910 14:58:44.941807 PCI: 00:1e.2 [8086/0000] bus ops
911 14:58:44.945161 PCI: 00:1e.2 [8086/02aa] enabled
912 14:58:44.948430 PCI: 00:1e.3 [8086/0000] bus ops
913 14:58:44.952234 PCI: 00:1e.3 [8086/02ab] enabled
914 14:58:44.955317 PCI: 00:1f.0 [8086/0000] bus ops
915 14:58:44.958535 PCI: 00:1f.0 [8086/0284] enabled
916 14:58:44.965208 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 14:58:44.968806 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 14:58:44.971849 PCI: 00:1f.3 [8086/0000] bus ops
919 14:58:44.975215 PCI: 00:1f.3 [8086/02c8] enabled
920 14:58:44.978379 PCI: 00:1f.4 [8086/0000] bus ops
921 14:58:44.982135 PCI: 00:1f.4 [8086/02a3] enabled
922 14:58:44.985224 PCI: 00:1f.5 [8086/0000] bus ops
923 14:58:44.988561 PCI: 00:1f.5 [8086/02a4] enabled
924 14:58:44.991997 PCI: Leftover static devices:
925 14:58:44.995144 PCI: 00:05.0
926 14:58:44.995286 PCI: 00:12.5
927 14:58:44.995362 PCI: 00:12.6
928 14:58:44.998486 PCI: 00:14.1
929 14:58:44.998608 PCI: 00:14.5
930 14:58:45.001784 PCI: 00:15.2
931 14:58:45.001880 PCI: 00:15.3
932 14:58:45.005358 PCI: 00:16.1
933 14:58:45.005482 PCI: 00:16.2
934 14:58:45.005587 PCI: 00:16.3
935 14:58:45.008618 PCI: 00:16.4
936 14:58:45.008712 PCI: 00:16.5
937 14:58:45.012046 PCI: 00:19.1
938 14:58:45.012141 PCI: 00:19.2
939 14:58:45.012214 PCI: 00:1a.0
940 14:58:45.015383 PCI: 00:1c.0
941 14:58:45.015478 PCI: 00:1c.1
942 14:58:45.018526 PCI: 00:1c.2
943 14:58:45.018650 PCI: 00:1c.3
944 14:58:45.018754 PCI: 00:1c.4
945 14:58:45.021817 PCI: 00:1c.5
946 14:58:45.021941 PCI: 00:1c.6
947 14:58:45.025172 PCI: 00:1c.7
948 14:58:45.025293 PCI: 00:1d.1
949 14:58:45.028466 PCI: 00:1d.2
950 14:58:45.028592 PCI: 00:1d.3
951 14:58:45.028726 PCI: 00:1d.4
952 14:58:45.031768 PCI: 00:1d.5
953 14:58:45.031863 PCI: 00:1e.1
954 14:58:45.035138 PCI: 00:1f.1
955 14:58:45.035269 PCI: 00:1f.2
956 14:58:45.035345 PCI: 00:1f.6
957 14:58:45.038490 PCI: Check your devicetree.cb.
958 14:58:45.041672 PCI: 00:02.0 scanning...
959 14:58:45.045052 scan_generic_bus for PCI: 00:02.0
960 14:58:45.048212 scan_generic_bus for PCI: 00:02.0 done
961 14:58:45.054940 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
962 14:58:45.058299 PCI: 00:14.0 scanning...
963 14:58:45.061545 scan_static_bus for PCI: 00:14.0
964 14:58:45.064913 USB0 port 0 enabled
965 14:58:45.065016 USB0 port 0 scanning...
966 14:58:45.068225 scan_static_bus for USB0 port 0
967 14:58:45.071511 USB2 port 0 enabled
968 14:58:45.074955 USB2 port 1 enabled
969 14:58:45.075057 USB2 port 2 disabled
970 14:58:45.078105 USB2 port 3 disabled
971 14:58:45.078201 USB2 port 5 disabled
972 14:58:45.081403 USB2 port 6 enabled
973 14:58:45.084664 USB2 port 9 enabled
974 14:58:45.084765 USB3 port 0 enabled
975 14:58:45.088714 USB3 port 1 enabled
976 14:58:45.091651 USB3 port 2 enabled
977 14:58:45.091749 USB3 port 3 enabled
978 14:58:45.094747 USB3 port 4 disabled
979 14:58:45.098370 USB2 port 0 scanning...
980 14:58:45.101516 scan_static_bus for USB2 port 0
981 14:58:45.104931 scan_static_bus for USB2 port 0 done
982 14:58:45.108568 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
983 14:58:45.111855 USB2 port 1 scanning...
984 14:58:45.115133 scan_static_bus for USB2 port 1
985 14:58:45.118390 scan_static_bus for USB2 port 1 done
986 14:58:45.124852 scan_bus: scanning of bus USB2 port 1 took 9694 usecs
987 14:58:45.128137 USB2 port 6 scanning...
988 14:58:45.131383 scan_static_bus for USB2 port 6
989 14:58:45.134790 scan_static_bus for USB2 port 6 done
990 14:58:45.138184 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
991 14:58:45.141489 USB2 port 9 scanning...
992 14:58:45.144793 scan_static_bus for USB2 port 9
993 14:58:45.148145 scan_static_bus for USB2 port 9 done
994 14:58:45.154922 scan_bus: scanning of bus USB2 port 9 took 9706 usecs
995 14:58:45.157839 USB3 port 0 scanning...
996 14:58:45.161359 scan_static_bus for USB3 port 0
997 14:58:45.164612 scan_static_bus for USB3 port 0 done
998 14:58:45.168037 scan_bus: scanning of bus USB3 port 0 took 9694 usecs
999 14:58:45.171247 USB3 port 1 scanning...
1000 14:58:45.174790 scan_static_bus for USB3 port 1
1001 14:58:45.178209 scan_static_bus for USB3 port 1 done
1002 14:58:45.184600 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
1003 14:58:45.187754 USB3 port 2 scanning...
1004 14:58:45.191082 scan_static_bus for USB3 port 2
1005 14:58:45.194514 scan_static_bus for USB3 port 2 done
1006 14:58:45.197996 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
1007 14:58:45.201186 USB3 port 3 scanning...
1008 14:58:45.204474 scan_static_bus for USB3 port 3
1009 14:58:45.207612 scan_static_bus for USB3 port 3 done
1010 14:58:45.214647 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
1011 14:58:45.217840 scan_static_bus for USB0 port 0 done
1012 14:58:45.224222 scan_bus: scanning of bus USB0 port 0 took 155349 usecs
1013 14:58:45.227427 scan_static_bus for PCI: 00:14.0 done
1014 14:58:45.234717 scan_bus: scanning of bus PCI: 00:14.0 took 172951 usecs
1015 14:58:45.234849 PCI: 00:15.0 scanning...
1016 14:58:45.237847 scan_generic_bus for PCI: 00:15.0
1017 14:58:45.244410 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 14:58:45.247822 scan_generic_bus for PCI: 00:15.0 done
1019 14:58:45.250940 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
1020 14:58:45.254236 PCI: 00:15.1 scanning...
1021 14:58:45.257489 scan_generic_bus for PCI: 00:15.1
1022 14:58:45.264014 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 14:58:45.267370 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 14:58:45.271179 scan_generic_bus for PCI: 00:15.1 done
1025 14:58:45.277427 scan_bus: scanning of bus PCI: 00:15.1 took 18589 usecs
1026 14:58:45.277562 PCI: 00:19.0 scanning...
1027 14:58:45.284791 scan_generic_bus for PCI: 00:19.0
1028 14:58:45.288125 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 14:58:45.291247 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 14:58:45.294515 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 14:58:45.297806 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 14:58:45.304578 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 14:58:45.307901 scan_generic_bus for PCI: 00:19.0 done
1034 14:58:45.311107 scan_bus: scanning of bus PCI: 00:19.0 took 30708 usecs
1035 14:58:45.314408 PCI: 00:1d.0 scanning...
1036 14:58:45.317754 do_pci_scan_bridge for PCI: 00:1d.0
1037 14:58:45.321115 PCI: pci_scan_bus for bus 01
1038 14:58:45.324221 PCI: 01:00.0 [1c5c/1327] enabled
1039 14:58:45.327829 Enabling Common Clock Configuration
1040 14:58:45.334499 L1 Sub-State supported from root port 29
1041 14:58:45.338026 L1 Sub-State Support = 0xf
1042 14:58:45.338127 CommonModeRestoreTime = 0x28
1043 14:58:45.344344 Power On Value = 0x16, Power On Scale = 0x0
1044 14:58:45.344457 ASPM: Enabled L1
1045 14:58:45.350990 scan_bus: scanning of bus PCI: 00:1d.0 took 32771 usecs
1046 14:58:45.354515 PCI: 00:1e.2 scanning...
1047 14:58:45.358002 scan_generic_bus for PCI: 00:1e.2
1048 14:58:45.361239 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 14:58:45.364629 scan_generic_bus for PCI: 00:1e.2 done
1050 14:58:45.371198 scan_bus: scanning of bus PCI: 00:1e.2 took 13998 usecs
1051 14:58:45.374439 PCI: 00:1e.3 scanning...
1052 14:58:45.377715 scan_generic_bus for PCI: 00:1e.3
1053 14:58:45.381125 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 14:58:45.384319 scan_generic_bus for PCI: 00:1e.3 done
1055 14:58:45.391220 scan_bus: scanning of bus PCI: 00:1e.3 took 13996 usecs
1056 14:58:45.391354 PCI: 00:1f.0 scanning...
1057 14:58:45.394046 scan_static_bus for PCI: 00:1f.0
1058 14:58:45.397786 PNP: 0c09.0 enabled
1059 14:58:45.400760 scan_static_bus for PCI: 00:1f.0 done
1060 14:58:45.407615 scan_bus: scanning of bus PCI: 00:1f.0 took 12025 usecs
1061 14:58:45.411150 PCI: 00:1f.3 scanning...
1062 14:58:45.414389 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1063 14:58:45.417841 PCI: 00:1f.4 scanning...
1064 14:58:45.420560 scan_generic_bus for PCI: 00:1f.4
1065 14:58:45.424296 scan_generic_bus for PCI: 00:1f.4 done
1066 14:58:45.430909 scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
1067 14:58:45.434302 PCI: 00:1f.5 scanning...
1068 14:58:45.437170 scan_generic_bus for PCI: 00:1f.5
1069 14:58:45.440361 scan_generic_bus for PCI: 00:1f.5 done
1070 14:58:45.447241 scan_bus: scanning of bus PCI: 00:1f.5 took 10184 usecs
1071 14:58:45.453837 scan_bus: scanning of bus DOMAIN: 0000 took 604732 usecs
1072 14:58:45.457161 scan_static_bus for Root Device done
1073 14:58:45.460765 scan_bus: scanning of bus Root Device took 624635 usecs
1074 14:58:45.463965 done
1075 14:58:45.467411 Chrome EC: UHEPI supported
1076 14:58:45.470848 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 14:58:45.477348 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 14:58:45.483951 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 14:58:45.490231 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 14:58:45.494043 SPI flash protection: WPSW=0 SRP0=0
1081 14:58:45.500212 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 14:58:45.503916 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1083 14:58:45.507353 found VGA at PCI: 00:02.0
1084 14:58:45.510570 Setting up VGA for PCI: 00:02.0
1085 14:58:45.517359 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 14:58:45.520707 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 14:58:45.523389 Allocating resources...
1088 14:58:45.523488 Reading resources...
1089 14:58:45.530624 Root Device read_resources bus 0 link: 0
1090 14:58:45.533754 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 14:58:45.540080 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 14:58:45.543369 DOMAIN: 0000 read_resources bus 0 link: 0
1093 14:58:45.550348 PCI: 00:14.0 read_resources bus 0 link: 0
1094 14:58:45.553897 USB0 port 0 read_resources bus 0 link: 0
1095 14:58:45.561470 USB0 port 0 read_resources bus 0 link: 0 done
1096 14:58:45.564741 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 14:58:45.572263 PCI: 00:15.0 read_resources bus 1 link: 0
1098 14:58:45.575747 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 14:58:45.582287 PCI: 00:15.1 read_resources bus 2 link: 0
1100 14:58:45.585742 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 14:58:45.592882 PCI: 00:19.0 read_resources bus 3 link: 0
1102 14:58:45.599806 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 14:58:45.603099 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 14:58:45.609454 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 14:58:45.612912 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 14:58:45.619484 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 14:58:45.622930 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 14:58:45.629592 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 14:58:45.632865 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 14:58:45.639877 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 14:58:45.645901 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 14:58:45.649314 Root Device read_resources bus 0 link: 0 done
1113 14:58:45.653056 Done reading resources.
1114 14:58:45.656483 Show resources in subtree (Root Device)...After reading.
1115 14:58:45.663150 Root Device child on link 0 CPU_CLUSTER: 0
1116 14:58:45.666216 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 14:58:45.666342 APIC: 00
1118 14:58:45.669363 APIC: 01
1119 14:58:45.669458 APIC: 06
1120 14:58:45.672723 APIC: 07
1121 14:58:45.672817 APIC: 03
1122 14:58:45.672889 APIC: 05
1123 14:58:45.675911 APIC: 02
1124 14:58:45.676047 APIC: 04
1125 14:58:45.679607 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 14:58:45.689618 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 14:58:45.745842 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 14:58:45.746015 PCI: 00:00.0
1129 14:58:45.746295 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 14:58:45.746847 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 14:58:45.747123 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 14:58:45.747201 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 14:58:45.776210 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 14:58:45.776747 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 14:58:45.777396 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 14:58:45.777672 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 14:58:45.784315 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 14:58:45.794325 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 14:58:45.804037 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 14:58:45.814030 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 14:58:45.823977 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 14:58:45.834170 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 14:58:45.840507 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 14:58:45.850515 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 14:58:45.853856 PCI: 00:02.0
1146 14:58:45.863861 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 14:58:45.873741 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 14:58:45.880514 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 14:58:45.883860 PCI: 00:04.0
1150 14:58:45.883953 PCI: 00:08.0
1151 14:58:45.894028 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 14:58:45.896860 PCI: 00:12.0
1153 14:58:45.906893 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 14:58:45.910524 PCI: 00:14.0 child on link 0 USB0 port 0
1155 14:58:45.920162 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 14:58:45.923944 USB0 port 0 child on link 0 USB2 port 0
1157 14:58:45.927298 USB2 port 0
1158 14:58:45.930114 USB2 port 1
1159 14:58:45.930234 USB2 port 2
1160 14:58:45.934018 USB2 port 3
1161 14:58:45.934127 USB2 port 5
1162 14:58:45.937262 USB2 port 6
1163 14:58:45.937353 USB2 port 9
1164 14:58:45.940353 USB3 port 0
1165 14:58:45.940463 USB3 port 1
1166 14:58:45.943465 USB3 port 2
1167 14:58:45.943558 USB3 port 3
1168 14:58:45.946993 USB3 port 4
1169 14:58:45.947085 PCI: 00:14.2
1170 14:58:45.956865 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 14:58:45.966785 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 14:58:45.970639 PCI: 00:14.3
1173 14:58:45.980255 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 14:58:45.983689 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 14:58:45.993763 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 14:58:45.993877 I2C: 01:15
1177 14:58:46.000409 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 14:58:46.010294 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 14:58:46.010411 I2C: 02:5d
1180 14:58:46.013587 GENERIC: 0.0
1181 14:58:46.013670 PCI: 00:16.0
1182 14:58:46.023982 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 14:58:46.026686 PCI: 00:17.0
1184 14:58:46.039752 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 14:58:46.043674 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 14:58:46.053409 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 14:58:46.059968 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 14:58:46.070219 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 14:58:46.076807 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 14:58:46.083827 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 14:58:46.093628 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 14:58:46.093752 I2C: 03:1a
1193 14:58:46.096640 I2C: 03:38
1194 14:58:46.096735 I2C: 03:39
1195 14:58:46.099952 I2C: 03:3a
1196 14:58:46.100047 I2C: 03:3b
1197 14:58:46.103358 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 14:58:46.113226 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 14:58:46.123186 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 14:58:46.133138 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 14:58:46.133245 PCI: 01:00.0
1202 14:58:46.143501 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 14:58:46.146360 PCI: 00:1e.0
1204 14:58:46.156195 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 14:58:46.166193 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 14:58:46.169517 PCI: 00:1e.2 child on link 0 SPI: 00
1207 14:58:46.179692 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 14:58:46.182895 SPI: 00
1209 14:58:46.186045 PCI: 00:1e.3 child on link 0 SPI: 01
1210 14:58:46.196023 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 14:58:46.196140 SPI: 01
1212 14:58:46.202523 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 14:58:46.209217 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 14:58:46.219351 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 14:58:46.219470 PNP: 0c09.0
1216 14:58:46.229254 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 14:58:46.229373 PCI: 00:1f.3
1218 14:58:46.238870 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 14:58:46.252609 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 14:58:46.252737 PCI: 00:1f.4
1221 14:58:46.262006 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 14:58:46.271915 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 14:58:46.272041 PCI: 00:1f.5
1224 14:58:46.282174 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 14:58:46.288913 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 14:58:46.295396 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 14:58:46.302046 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 14:58:46.305174 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 14:58:46.308787 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 14:58:46.311849 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 14:58:46.315138 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 14:58:46.322000 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 14:58:46.328635 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 14:58:46.338494 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 14:58:46.345246 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 14:58:46.351710 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 14:58:46.355434 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 14:58:46.365259 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 14:58:46.368181 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 14:58:46.374983 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 14:58:46.378318 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 14:58:46.385170 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 14:58:46.388429 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 14:58:46.391391 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 14:58:46.398034 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 14:58:46.401355 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 14:58:46.408186 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 14:58:46.411421 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 14:58:46.418031 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 14:58:46.421361 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 14:58:46.427917 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 14:58:46.431051 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 14:58:46.438005 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 14:58:46.441071 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 14:58:46.447961 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 14:58:46.451019 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 14:58:46.457664 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 14:58:46.461124 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 14:58:46.464392 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 14:58:46.471139 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 14:58:46.474469 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 14:58:46.484219 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 14:58:46.487596 avoid_fixed_resources: DOMAIN: 0000
1264 14:58:46.494258 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 14:58:46.500938 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 14:58:46.507724 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 14:58:46.514268 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 14:58:46.524173 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 14:58:46.531088 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 14:58:46.537377 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 14:58:46.544361 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 14:58:46.554323 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 14:58:46.560864 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 14:58:46.567410 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 14:58:46.573920 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 14:58:46.577567 Setting resources...
1277 14:58:46.584383 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 14:58:46.587823 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 14:58:46.591166 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 14:58:46.597355 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 14:58:46.600627 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 14:58:46.607194 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 14:58:46.614327 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 14:58:46.617537 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 14:58:46.627071 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 14:58:46.630367 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 14:58:46.637600 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 14:58:46.640256 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 14:58:46.647248 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 14:58:46.650247 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 14:58:46.656921 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 14:58:46.660464 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 14:58:46.666997 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 14:58:46.670178 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 14:58:46.676902 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 14:58:46.680044 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 14:58:46.683269 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 14:58:46.690031 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 14:58:46.693338 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 14:58:46.699985 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 14:58:46.703266 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 14:58:46.710082 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 14:58:46.713305 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 14:58:46.720297 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 14:58:46.723497 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 14:58:46.730108 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 14:58:46.733380 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 14:58:46.740131 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 14:58:46.746561 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 14:58:46.753236 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 14:58:46.759961 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 14:58:46.766361 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 14:58:46.773299 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 14:58:46.779686 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 14:58:46.783379 Root Device assign_resources, bus 0 link: 0
1316 14:58:46.789858 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 14:58:46.796765 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 14:58:46.807024 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 14:58:46.813135 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 14:58:46.823669 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 14:58:46.829869 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 14:58:46.839866 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 14:58:46.843361 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 14:58:46.846830 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 14:58:46.856987 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 14:58:46.863871 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 14:58:46.873396 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 14:58:46.880277 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 14:58:46.886891 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 14:58:46.890186 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 14:58:46.900156 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 14:58:46.903517 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 14:58:46.906744 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 14:58:46.916830 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 14:58:46.923219 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 14:58:46.933370 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 14:58:46.939909 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 14:58:46.947039 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 14:58:46.956878 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 14:58:46.963152 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 14:58:46.970220 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 14:58:46.976796 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 14:58:46.979796 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 14:58:46.989852 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 14:58:46.996625 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 14:58:47.006781 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 14:58:47.010108 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 14:58:47.019534 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 14:58:47.023180 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 14:58:47.032992 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 14:58:47.039664 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 14:58:47.046136 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 14:58:47.049508 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 14:58:47.059367 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 14:58:47.062853 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 14:58:47.066114 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 14:58:47.072861 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 14:58:47.076188 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 14:58:47.082784 LPC: Trying to open IO window from 800 size 1ff
1360 14:58:47.089324 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 14:58:47.099206 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 14:58:47.105970 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 14:58:47.115580 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 14:58:47.118877 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 14:58:47.122476 Root Device assign_resources, bus 0 link: 0
1366 14:58:47.125712 Done setting resources.
1367 14:58:47.132401 Show resources in subtree (Root Device)...After assigning values.
1368 14:58:47.139197 Root Device child on link 0 CPU_CLUSTER: 0
1369 14:58:47.142216 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 14:58:47.142341 APIC: 00
1371 14:58:47.145656 APIC: 01
1372 14:58:47.145764 APIC: 06
1373 14:58:47.145839 APIC: 07
1374 14:58:47.149212 APIC: 03
1375 14:58:47.149308 APIC: 05
1376 14:58:47.149380 APIC: 02
1377 14:58:47.152316 APIC: 04
1378 14:58:47.155859 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 14:58:47.165436 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 14:58:47.175753 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 14:58:47.178825 PCI: 00:00.0
1382 14:58:47.188736 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 14:58:47.198901 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 14:58:47.205456 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 14:58:47.215697 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 14:58:47.225122 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 14:58:47.235130 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 14:58:47.245232 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 14:58:47.254804 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 14:58:47.261605 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 14:58:47.271638 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 14:58:47.281347 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 14:58:47.291488 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 14:58:47.301187 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 14:58:47.311110 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 14:58:47.320830 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 14:58:47.327521 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 14:58:47.330824 PCI: 00:02.0
1399 14:58:47.341012 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 14:58:47.350619 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 14:58:47.360714 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 14:58:47.360879 PCI: 00:04.0
1403 14:58:47.364227 PCI: 00:08.0
1404 14:58:47.374113 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 14:58:47.377168 PCI: 00:12.0
1406 14:58:47.387232 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 14:58:47.390297 PCI: 00:14.0 child on link 0 USB0 port 0
1408 14:58:47.400277 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 14:58:47.403723 USB0 port 0 child on link 0 USB2 port 0
1410 14:58:47.407185 USB2 port 0
1411 14:58:47.410550 USB2 port 1
1412 14:58:47.410657 USB2 port 2
1413 14:58:47.413939 USB2 port 3
1414 14:58:47.414038 USB2 port 5
1415 14:58:47.416966 USB2 port 6
1416 14:58:47.417081 USB2 port 9
1417 14:58:47.420197 USB3 port 0
1418 14:58:47.420314 USB3 port 1
1419 14:58:47.423887 USB3 port 2
1420 14:58:47.423988 USB3 port 3
1421 14:58:47.427324 USB3 port 4
1422 14:58:47.427418 PCI: 00:14.2
1423 14:58:47.437044 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 14:58:47.450150 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 14:58:47.450295 PCI: 00:14.3
1426 14:58:47.460425 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 14:58:47.463250 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 14:58:47.476828 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 14:58:47.476963 I2C: 01:15
1430 14:58:47.480198 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 14:58:47.489660 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 14:58:47.493405 I2C: 02:5d
1433 14:58:47.493513 GENERIC: 0.0
1434 14:58:47.496497 PCI: 00:16.0
1435 14:58:47.506447 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 14:58:47.510073 PCI: 00:17.0
1437 14:58:47.519927 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 14:58:47.529585 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 14:58:47.539307 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 14:58:47.546148 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 14:58:47.556012 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 14:58:47.565850 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 14:58:47.569419 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 14:58:47.582335 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 14:58:47.582549 I2C: 03:1a
1446 14:58:47.582660 I2C: 03:38
1447 14:58:47.585619 I2C: 03:39
1448 14:58:47.585731 I2C: 03:3a
1449 14:58:47.589190 I2C: 03:3b
1450 14:58:47.592267 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 14:58:47.602132 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 14:58:47.612202 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 14:58:47.621952 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 14:58:47.625627 PCI: 01:00.0
1455 14:58:47.635409 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 14:58:47.635523 PCI: 00:1e.0
1457 14:58:47.648999 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 14:58:47.658807 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 14:58:47.662137 PCI: 00:1e.2 child on link 0 SPI: 00
1460 14:58:47.671887 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 14:58:47.675249 SPI: 00
1462 14:58:47.678421 PCI: 00:1e.3 child on link 0 SPI: 01
1463 14:58:47.688380 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 14:58:47.688489 SPI: 01
1465 14:58:47.695043 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 14:58:47.701885 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 14:58:47.711659 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 14:58:47.711774 PNP: 0c09.0
1469 14:58:47.721420 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 14:58:47.725082 PCI: 00:1f.3
1471 14:58:47.734878 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 14:58:47.744760 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 14:58:47.744871 PCI: 00:1f.4
1474 14:58:47.754882 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 14:58:47.764624 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 14:58:47.767868 PCI: 00:1f.5
1477 14:58:47.777661 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 14:58:47.780908 Done allocating resources.
1479 14:58:47.784306 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 14:58:47.787945 Enabling resources...
1481 14:58:47.790714 PCI: 00:00.0 subsystem <- 8086/9b61
1482 14:58:47.793965 PCI: 00:00.0 cmd <- 06
1483 14:58:47.797464 PCI: 00:02.0 subsystem <- 8086/9b41
1484 14:58:47.800840 PCI: 00:02.0 cmd <- 03
1485 14:58:47.804315 PCI: 00:08.0 cmd <- 06
1486 14:58:47.807561 PCI: 00:12.0 subsystem <- 8086/02f9
1487 14:58:47.811022 PCI: 00:12.0 cmd <- 02
1488 14:58:47.814536 PCI: 00:14.0 subsystem <- 8086/02ed
1489 14:58:47.817407 PCI: 00:14.0 cmd <- 02
1490 14:58:47.817500 PCI: 00:14.2 cmd <- 02
1491 14:58:47.824039 PCI: 00:14.3 subsystem <- 8086/02f0
1492 14:58:47.824139 PCI: 00:14.3 cmd <- 02
1493 14:58:47.827740 PCI: 00:15.0 subsystem <- 8086/02e8
1494 14:58:47.831114 PCI: 00:15.0 cmd <- 02
1495 14:58:47.834181 PCI: 00:15.1 subsystem <- 8086/02e9
1496 14:58:47.837348 PCI: 00:15.1 cmd <- 02
1497 14:58:47.840473 PCI: 00:16.0 subsystem <- 8086/02e0
1498 14:58:47.843962 PCI: 00:16.0 cmd <- 02
1499 14:58:47.847722 PCI: 00:17.0 subsystem <- 8086/02d3
1500 14:58:47.850600 PCI: 00:17.0 cmd <- 03
1501 14:58:47.853962 PCI: 00:19.0 subsystem <- 8086/02c5
1502 14:58:47.857339 PCI: 00:19.0 cmd <- 02
1503 14:58:47.860422 PCI: 00:1d.0 bridge ctrl <- 0013
1504 14:58:47.863758 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 14:58:47.867039 PCI: 00:1d.0 cmd <- 06
1506 14:58:47.870377 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 14:58:47.873664 PCI: 00:1e.0 cmd <- 06
1508 14:58:47.876884 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 14:58:47.876978 PCI: 00:1e.2 cmd <- 06
1510 14:58:47.883627 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 14:58:47.883726 PCI: 00:1e.3 cmd <- 02
1512 14:58:47.886952 PCI: 00:1f.0 subsystem <- 8086/0284
1513 14:58:47.890137 PCI: 00:1f.0 cmd <- 407
1514 14:58:47.893918 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 14:58:47.897325 PCI: 00:1f.3 cmd <- 02
1516 14:58:47.900446 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 14:58:47.903930 PCI: 00:1f.4 cmd <- 03
1518 14:58:47.906828 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 14:58:47.910200 PCI: 00:1f.5 cmd <- 406
1520 14:58:47.918782 PCI: 01:00.0 cmd <- 02
1521 14:58:47.923907 done.
1522 14:58:47.932427 ME: Version: 14.0.39.1367
1523 14:58:47.939141 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1524 14:58:47.942502 Initializing devices...
1525 14:58:47.942598 Root Device init ...
1526 14:58:47.949134 Chrome EC: Set SMI mask to 0x0000000000000000
1527 14:58:47.951967 Chrome EC: clear events_b mask to 0x0000000000000000
1528 14:58:47.959033 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 14:58:47.965396 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 14:58:47.972375 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 14:58:47.975735 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 14:58:47.978827 Root Device init finished in 35197 usecs
1533 14:58:47.982217 CPU_CLUSTER: 0 init ...
1534 14:58:47.988943 CPU_CLUSTER: 0 init finished in 2449 usecs
1535 14:58:47.993519 PCI: 00:00.0 init ...
1536 14:58:47.996462 CPU TDP: 15 Watts
1537 14:58:47.999831 CPU PL2 = 64 Watts
1538 14:58:48.002971 PCI: 00:00.0 init finished in 7083 usecs
1539 14:58:48.006355 PCI: 00:02.0 init ...
1540 14:58:48.009731 PCI: 00:02.0 init finished in 2254 usecs
1541 14:58:48.013192 PCI: 00:08.0 init ...
1542 14:58:48.016569 PCI: 00:08.0 init finished in 2251 usecs
1543 14:58:48.019786 PCI: 00:12.0 init ...
1544 14:58:48.022956 PCI: 00:12.0 init finished in 2253 usecs
1545 14:58:48.026207 PCI: 00:14.0 init ...
1546 14:58:48.029496 PCI: 00:14.0 init finished in 2252 usecs
1547 14:58:48.032716 PCI: 00:14.2 init ...
1548 14:58:48.036247 PCI: 00:14.2 init finished in 2253 usecs
1549 14:58:48.039782 PCI: 00:14.3 init ...
1550 14:58:48.043006 PCI: 00:14.3 init finished in 2271 usecs
1551 14:58:48.046691 PCI: 00:15.0 init ...
1552 14:58:48.049368 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 14:58:48.052866 PCI: 00:15.0 init finished in 5978 usecs
1554 14:58:48.056110 PCI: 00:15.1 init ...
1555 14:58:48.059765 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 14:58:48.062858 PCI: 00:15.1 init finished in 5979 usecs
1557 14:58:48.066535 PCI: 00:16.0 init ...
1558 14:58:48.069856 PCI: 00:16.0 init finished in 2244 usecs
1559 14:58:48.073651 PCI: 00:19.0 init ...
1560 14:58:48.077339 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 14:58:48.083736 PCI: 00:19.0 init finished in 5977 usecs
1562 14:58:48.083835 PCI: 00:1d.0 init ...
1563 14:58:48.087105 Initializing PCH PCIe bridge.
1564 14:58:48.090359 PCI: 00:1d.0 init finished in 5285 usecs
1565 14:58:48.094793 PCI: 00:1f.0 init ...
1566 14:58:48.098436 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 14:58:48.104716 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 14:58:48.104811 IOAPIC: ID = 0x02
1569 14:58:48.108066 IOAPIC: Dumping registers
1570 14:58:48.111432 reg 0x0000: 0x02000000
1571 14:58:48.114845 reg 0x0001: 0x00770020
1572 14:58:48.114938 reg 0x0002: 0x00000000
1573 14:58:48.121576 PCI: 00:1f.0 init finished in 23550 usecs
1574 14:58:48.124821 PCI: 00:1f.4 init ...
1575 14:58:48.128455 PCI: 00:1f.4 init finished in 2263 usecs
1576 14:58:48.139007 PCI: 01:00.0 init ...
1577 14:58:48.142826 PCI: 01:00.0 init finished in 2244 usecs
1578 14:58:48.146742 PNP: 0c09.0 init ...
1579 14:58:48.150101 Google Chrome EC uptime: 11.040 seconds
1580 14:58:48.157032 Google Chrome AP resets since EC boot: 0
1581 14:58:48.160636 Google Chrome most recent AP reset causes:
1582 14:58:48.166697 Google Chrome EC reset flags at last EC boot: reset-pin
1583 14:58:48.170093 PNP: 0c09.0 init finished in 20580 usecs
1584 14:58:48.173162 Devices initialized
1585 14:58:48.173256 Show all devs... After init.
1586 14:58:48.176716 Root Device: enabled 1
1587 14:58:48.179985 CPU_CLUSTER: 0: enabled 1
1588 14:58:48.183498 DOMAIN: 0000: enabled 1
1589 14:58:48.183598 APIC: 00: enabled 1
1590 14:58:48.186382 PCI: 00:00.0: enabled 1
1591 14:58:48.189970 PCI: 00:02.0: enabled 1
1592 14:58:48.193254 PCI: 00:04.0: enabled 0
1593 14:58:48.193349 PCI: 00:05.0: enabled 0
1594 14:58:48.196951 PCI: 00:12.0: enabled 1
1595 14:58:48.199980 PCI: 00:12.5: enabled 0
1596 14:58:48.200073 PCI: 00:12.6: enabled 0
1597 14:58:48.203314 PCI: 00:14.0: enabled 1
1598 14:58:48.206732 PCI: 00:14.1: enabled 0
1599 14:58:48.209870 PCI: 00:14.3: enabled 1
1600 14:58:48.209961 PCI: 00:14.5: enabled 0
1601 14:58:48.212966 PCI: 00:15.0: enabled 1
1602 14:58:48.216341 PCI: 00:15.1: enabled 1
1603 14:58:48.219769 PCI: 00:15.2: enabled 0
1604 14:58:48.219860 PCI: 00:15.3: enabled 0
1605 14:58:48.223238 PCI: 00:16.0: enabled 1
1606 14:58:48.226639 PCI: 00:16.1: enabled 0
1607 14:58:48.229904 PCI: 00:16.2: enabled 0
1608 14:58:48.229997 PCI: 00:16.3: enabled 0
1609 14:58:48.233200 PCI: 00:16.4: enabled 0
1610 14:58:48.236062 PCI: 00:16.5: enabled 0
1611 14:58:48.239339 PCI: 00:17.0: enabled 1
1612 14:58:48.239432 PCI: 00:19.0: enabled 1
1613 14:58:48.242921 PCI: 00:19.1: enabled 0
1614 14:58:48.246323 PCI: 00:19.2: enabled 0
1615 14:58:48.246416 PCI: 00:1a.0: enabled 0
1616 14:58:48.249783 PCI: 00:1c.0: enabled 0
1617 14:58:48.252563 PCI: 00:1c.1: enabled 0
1618 14:58:48.256001 PCI: 00:1c.2: enabled 0
1619 14:58:48.256093 PCI: 00:1c.3: enabled 0
1620 14:58:48.259592 PCI: 00:1c.4: enabled 0
1621 14:58:48.262871 PCI: 00:1c.5: enabled 0
1622 14:58:48.266137 PCI: 00:1c.6: enabled 0
1623 14:58:48.266230 PCI: 00:1c.7: enabled 0
1624 14:58:48.269306 PCI: 00:1d.0: enabled 1
1625 14:58:48.272814 PCI: 00:1d.1: enabled 0
1626 14:58:48.276198 PCI: 00:1d.2: enabled 0
1627 14:58:48.276294 PCI: 00:1d.3: enabled 0
1628 14:58:48.279558 PCI: 00:1d.4: enabled 0
1629 14:58:48.282363 PCI: 00:1d.5: enabled 0
1630 14:58:48.282456 PCI: 00:1e.0: enabled 1
1631 14:58:48.285798 PCI: 00:1e.1: enabled 0
1632 14:58:48.289489 PCI: 00:1e.2: enabled 1
1633 14:58:48.292531 PCI: 00:1e.3: enabled 1
1634 14:58:48.292654 PCI: 00:1f.0: enabled 1
1635 14:58:48.295738 PCI: 00:1f.1: enabled 0
1636 14:58:48.299215 PCI: 00:1f.2: enabled 0
1637 14:58:48.302558 PCI: 00:1f.3: enabled 1
1638 14:58:48.302650 PCI: 00:1f.4: enabled 1
1639 14:58:48.305553 PCI: 00:1f.5: enabled 1
1640 14:58:48.308835 PCI: 00:1f.6: enabled 0
1641 14:58:48.312502 USB0 port 0: enabled 1
1642 14:58:48.312596 I2C: 01:15: enabled 1
1643 14:58:48.315784 I2C: 02:5d: enabled 1
1644 14:58:48.318887 GENERIC: 0.0: enabled 1
1645 14:58:48.318979 I2C: 03:1a: enabled 1
1646 14:58:48.322320 I2C: 03:38: enabled 1
1647 14:58:48.325624 I2C: 03:39: enabled 1
1648 14:58:48.325717 I2C: 03:3a: enabled 1
1649 14:58:48.329136 I2C: 03:3b: enabled 1
1650 14:58:48.332341 PCI: 00:00.0: enabled 1
1651 14:58:48.332433 SPI: 00: enabled 1
1652 14:58:48.335507 SPI: 01: enabled 1
1653 14:58:48.338836 PNP: 0c09.0: enabled 1
1654 14:58:48.338928 USB2 port 0: enabled 1
1655 14:58:48.342018 USB2 port 1: enabled 1
1656 14:58:48.345617 USB2 port 2: enabled 0
1657 14:58:48.345711 USB2 port 3: enabled 0
1658 14:58:48.349045 USB2 port 5: enabled 0
1659 14:58:48.352343 USB2 port 6: enabled 1
1660 14:58:48.355216 USB2 port 9: enabled 1
1661 14:58:48.355318 USB3 port 0: enabled 1
1662 14:58:48.358781 USB3 port 1: enabled 1
1663 14:58:48.362416 USB3 port 2: enabled 1
1664 14:58:48.362583 USB3 port 3: enabled 1
1665 14:58:48.365333 USB3 port 4: enabled 0
1666 14:58:48.368466 APIC: 01: enabled 1
1667 14:58:48.368630 APIC: 06: enabled 1
1668 14:58:48.371755 APIC: 07: enabled 1
1669 14:58:48.375150 APIC: 03: enabled 1
1670 14:58:48.375278 APIC: 05: enabled 1
1671 14:58:48.378772 APIC: 02: enabled 1
1672 14:58:48.378864 APIC: 04: enabled 1
1673 14:58:48.381739 PCI: 00:08.0: enabled 1
1674 14:58:48.385081 PCI: 00:14.2: enabled 1
1675 14:58:48.388610 PCI: 01:00.0: enabled 1
1676 14:58:48.392408 Disabling ACPI via APMC:
1677 14:58:48.392499 done.
1678 14:58:48.398730 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 14:58:48.402154 ELOG: NV offset 0xaf0000 size 0x4000
1680 14:58:48.408921 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 14:58:48.415400 ELOG: Event(17) added with size 13 at 2023-08-16 14:58:35 UTC
1682 14:58:48.421958 ELOG: Event(92) added with size 9 at 2023-08-16 14:58:35 UTC
1683 14:58:48.428873 ELOG: Event(93) added with size 9 at 2023-08-16 14:58:35 UTC
1684 14:58:48.435324 ELOG: Event(9A) added with size 9 at 2023-08-16 14:58:35 UTC
1685 14:58:48.441830 ELOG: Event(9E) added with size 10 at 2023-08-16 14:58:35 UTC
1686 14:58:48.448612 ELOG: Event(9F) added with size 14 at 2023-08-16 14:58:35 UTC
1687 14:58:48.451831 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1688 14:58:48.459078 ELOG: Event(A1) added with size 10 at 2023-08-16 14:58:35 UTC
1689 14:58:48.468892 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 14:58:48.475437 ELOG: Event(A0) added with size 9 at 2023-08-16 14:58:35 UTC
1691 14:58:48.478714 elog_add_boot_reason: Logged dev mode boot
1692 14:58:48.478825 Finalize devices...
1693 14:58:48.482316 PCI: 00:17.0 final
1694 14:58:48.485400 Devices finalized
1695 14:58:48.488827 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 14:58:48.495405 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 14:58:48.498768 ME: HFSTS1 : 0x90000245
1698 14:58:48.501972 ME: HFSTS2 : 0x3B850126
1699 14:58:48.505532 ME: HFSTS3 : 0x00000020
1700 14:58:48.511893 ME: HFSTS4 : 0x00004800
1701 14:58:48.515518 ME: HFSTS5 : 0x00000000
1702 14:58:48.518436 ME: HFSTS6 : 0x40400006
1703 14:58:48.521677 ME: Manufacturing Mode : NO
1704 14:58:48.525216 ME: FW Partition Table : OK
1705 14:58:48.528571 ME: Bringup Loader Failure : NO
1706 14:58:48.531589 ME: Firmware Init Complete : YES
1707 14:58:48.534848 ME: Boot Options Present : NO
1708 14:58:48.538573 ME: Update In Progress : NO
1709 14:58:48.541782 ME: D0i3 Support : YES
1710 14:58:48.544868 ME: Low Power State Enabled : NO
1711 14:58:48.548318 ME: CPU Replaced : NO
1712 14:58:48.551621 ME: CPU Replacement Valid : YES
1713 14:58:48.555156 ME: Current Working State : 5
1714 14:58:48.558138 ME: Current Operation State : 1
1715 14:58:48.561340 ME: Current Operation Mode : 0
1716 14:58:48.564715 ME: Error Code : 0
1717 14:58:48.568196 ME: CPU Debug Disabled : YES
1718 14:58:48.571524 ME: TXT Support : NO
1719 14:58:48.578060 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 14:58:48.581411 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 14:58:48.584924 CBFS @ c08000 size 3f8000
1722 14:58:48.591661 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 14:58:48.594771 CBFS: Locating 'fallback/dsdt.aml'
1724 14:58:48.598103 CBFS: Found @ offset 10bb80 size 3fa5
1725 14:58:48.604573 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 14:58:48.608017 CBFS @ c08000 size 3f8000
1727 14:58:48.611197 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 14:58:48.614595 CBFS: Locating 'fallback/slic'
1729 14:58:48.619103 CBFS: 'fallback/slic' not found.
1730 14:58:48.625876 ACPI: Writing ACPI tables at 99b3e000.
1731 14:58:48.625970 ACPI: * FACS
1732 14:58:48.629408 ACPI: * DSDT
1733 14:58:48.632529 Ramoops buffer: 0x100000@0x99a3d000.
1734 14:58:48.635781 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 14:58:48.642314 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 14:58:48.646139 Google Chrome EC: version:
1737 14:58:48.648874 ro: helios_v2.0.2659-56403530b
1738 14:58:48.652249 rw: helios_v2.0.2849-c41de27e7d
1739 14:58:48.652341 running image: 1
1740 14:58:48.656791 ACPI: * FADT
1741 14:58:48.656882 SCI is IRQ9
1742 14:58:48.663512 ACPI: added table 1/32, length now 40
1743 14:58:48.663604 ACPI: * SSDT
1744 14:58:48.666628 Found 1 CPU(s) with 8 core(s) each.
1745 14:58:48.670131 Error: Could not locate 'wifi_sar' in VPD.
1746 14:58:48.676665 Checking CBFS for default SAR values
1747 14:58:48.680119 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 14:58:48.683505 CBFS @ c08000 size 3f8000
1749 14:58:48.690202 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 14:58:48.693565 CBFS: Locating 'wifi_sar_defaults.hex'
1751 14:58:48.697057 CBFS: Found @ offset 5fac0 size 77
1752 14:58:48.699877 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 14:58:48.706442 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 14:58:48.709989 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 14:58:48.717141 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 14:58:48.719875 failed to find key in VPD: dsm_calib_r0_0
1757 14:58:48.730201 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 14:58:48.732880 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 14:58:48.736506 failed to find key in VPD: dsm_calib_r0_1
1760 14:58:48.746357 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 14:58:48.752928 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 14:58:48.756498 failed to find key in VPD: dsm_calib_r0_2
1763 14:58:48.766458 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 14:58:48.769742 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 14:58:48.776116 failed to find key in VPD: dsm_calib_r0_3
1766 14:58:48.782596 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 14:58:48.789226 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 14:58:48.792565 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 14:58:48.795855 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 14:58:48.800180 EC returned error result code 1
1771 14:58:48.804009 EC returned error result code 1
1772 14:58:48.807711 EC returned error result code 1
1773 14:58:48.814269 PS2K: Bad resp from EC. Vivaldi disabled!
1774 14:58:48.817373 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 14:58:48.823748 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 14:58:48.831049 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 14:58:48.834094 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 14:58:48.840800 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 14:58:48.846910 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 14:58:48.853813 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 14:58:48.857111 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 14:58:48.863943 ACPI: added table 2/32, length now 44
1783 14:58:48.864434 ACPI: * MCFG
1784 14:58:48.867554 ACPI: added table 3/32, length now 48
1785 14:58:48.870067 ACPI: * TPM2
1786 14:58:48.873641 TPM2 log created at 99a2d000
1787 14:58:48.876928 ACPI: added table 4/32, length now 52
1788 14:58:48.877366 ACPI: * MADT
1789 14:58:48.880257 SCI is IRQ9
1790 14:58:48.883578 ACPI: added table 5/32, length now 56
1791 14:58:48.883963 current = 99b43ac0
1792 14:58:48.886974 ACPI: * DMAR
1793 14:58:48.889947 ACPI: added table 6/32, length now 60
1794 14:58:48.893276 ACPI: * IGD OpRegion
1795 14:58:48.893663 GMA: Found VBT in CBFS
1796 14:58:48.896909 GMA: Found valid VBT in CBFS
1797 14:58:48.900273 ACPI: added table 7/32, length now 64
1798 14:58:48.903739 ACPI: * HPET
1799 14:58:48.906569 ACPI: added table 8/32, length now 68
1800 14:58:48.906956 ACPI: done.
1801 14:58:48.909760 ACPI tables: 31744 bytes.
1802 14:58:48.913602 smbios_write_tables: 99a2c000
1803 14:58:48.916703 EC returned error result code 3
1804 14:58:48.920582 Couldn't obtain OEM name from CBI
1805 14:58:48.923351 Create SMBIOS type 17
1806 14:58:48.926672 PCI: 00:00.0 (Intel Cannonlake)
1807 14:58:48.930227 PCI: 00:14.3 (Intel WiFi)
1808 14:58:48.933269 SMBIOS tables: 939 bytes.
1809 14:58:48.936698 Writing table forward entry at 0x00000500
1810 14:58:48.943252 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 14:58:48.946383 Writing coreboot table at 0x99b62000
1812 14:58:48.953883 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 14:58:48.956808 1. 0000000000001000-000000000009ffff: RAM
1814 14:58:48.960079 2. 00000000000a0000-00000000000fffff: RESERVED
1815 14:58:48.966465 3. 0000000000100000-0000000099a2bfff: RAM
1816 14:58:48.970161 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 14:58:48.976532 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 14:58:48.983211 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 14:58:48.986164 7. 000000009a000000-000000009f7fffff: RESERVED
1820 14:58:48.992972 8. 00000000e0000000-00000000efffffff: RESERVED
1821 14:58:48.996586 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 14:58:48.999508 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 14:58:49.006056 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 14:58:49.009447 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 14:58:49.016198 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 14:58:49.019389 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 14:58:49.022758 15. 0000000100000000-000000045e7fffff: RAM
1828 14:58:49.029285 Graphics framebuffer located at 0xc0000000
1829 14:58:49.032635 Passing 5 GPIOs to payload:
1830 14:58:49.035963 NAME | PORT | POLARITY | VALUE
1831 14:58:49.042455 write protect | undefined | high | low
1832 14:58:49.045677 lid | undefined | high | high
1833 14:58:49.052364 power | undefined | high | low
1834 14:58:49.058840 oprom | undefined | high | low
1835 14:58:49.062572 EC in RW | 0x000000cb | high | low
1836 14:58:49.065802 Board ID: 4
1837 14:58:49.069051 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 14:58:49.072328 CBFS @ c08000 size 3f8000
1839 14:58:49.078769 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 14:58:49.081855 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1841 14:58:49.085193 coreboot table: 1492 bytes.
1842 14:58:49.088452 IMD ROOT 0. 99fff000 00001000
1843 14:58:49.091824 IMD SMALL 1. 99ffe000 00001000
1844 14:58:49.095351 FSP MEMORY 2. 99c4e000 003b0000
1845 14:58:49.098926 CONSOLE 3. 99c2e000 00020000
1846 14:58:49.101830 FMAP 4. 99c2d000 0000054e
1847 14:58:49.105083 TIME STAMP 5. 99c2c000 00000910
1848 14:58:49.108296 VBOOT WORK 6. 99c18000 00014000
1849 14:58:49.112160 MRC DATA 7. 99c16000 00001958
1850 14:58:49.115549 ROMSTG STCK 8. 99c15000 00001000
1851 14:58:49.118828 AFTER CAR 9. 99c0b000 0000a000
1852 14:58:49.121662 RAMSTAGE 10. 99baf000 0005c000
1853 14:58:49.125067 REFCODE 11. 99b7a000 00035000
1854 14:58:49.128320 SMM BACKUP 12. 99b6a000 00010000
1855 14:58:49.131861 COREBOOT 13. 99b62000 00008000
1856 14:58:49.135399 ACPI 14. 99b3e000 00024000
1857 14:58:49.138590 ACPI GNVS 15. 99b3d000 00001000
1858 14:58:49.142100 RAMOOPS 16. 99a3d000 00100000
1859 14:58:49.145331 TPM2 TCGLOG17. 99a2d000 00010000
1860 14:58:49.148414 SMBIOS 18. 99a2c000 00000800
1861 14:58:49.151834 IMD small region:
1862 14:58:49.155241 IMD ROOT 0. 99ffec00 00000400
1863 14:58:49.158518 FSP RUNTIME 1. 99ffebe0 00000004
1864 14:58:49.162232 EC HOSTEVENT 2. 99ffebc0 00000008
1865 14:58:49.165379 POWER STATE 3. 99ffeb80 00000040
1866 14:58:49.168559 ROMSTAGE 4. 99ffeb60 00000004
1867 14:58:49.172004 MEM INFO 5. 99ffe9a0 000001b9
1868 14:58:49.175292 VPD 6. 99ffe920 0000006c
1869 14:58:49.178554 MTRR: Physical address space:
1870 14:58:49.185280 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 14:58:49.191474 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 14:58:49.198259 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 14:58:49.205061 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 14:58:49.211744 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 14:58:49.218117 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 14:58:49.221541 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 14:58:49.228082 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 14:58:49.231513 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 14:58:49.234979 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 14:58:49.238278 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 14:58:49.245005 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 14:58:49.248457 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 14:58:49.251029 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 14:58:49.254422 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 14:58:49.261426 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 14:58:49.264756 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 14:58:49.268029 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 14:58:49.271127 call enable_fixed_mtrr()
1889 14:58:49.274005 CPU physical address size: 39 bits
1890 14:58:49.277467 MTRR: default type WB/UC MTRR counts: 6/8.
1891 14:58:49.280691 MTRR: WB selected as default type.
1892 14:58:49.287678 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 14:58:49.294199 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 14:58:49.300843 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 14:58:49.307356 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 14:58:49.313924 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 14:58:49.320221 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 14:58:49.323784 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 14:58:49.327114 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 14:58:49.333705 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 14:58:49.337002 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 14:58:49.340404 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 14:58:49.343808 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 14:58:49.350125 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 14:58:49.353391 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 14:58:49.356567 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 14:58:49.359937 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 14:58:49.366375 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 14:58:49.366468
1910 14:58:49.366541 MTRR check
1911 14:58:49.369729 Fixed MTRRs : Enabled
1912 14:58:49.373196 Variable MTRRs: Enabled
1913 14:58:49.373288
1914 14:58:49.376644 call enable_fixed_mtrr()
1915 14:58:49.379887 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1916 14:58:49.383241 CPU physical address size: 39 bits
1917 14:58:49.389865 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 14:58:49.393248 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 14:58:49.396790 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 14:58:49.399564 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 14:58:49.406434 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 14:58:49.409750 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 14:58:49.413054 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 14:58:49.416111 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 14:58:49.422779 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 14:58:49.426199 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 14:58:49.429544 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 14:58:49.432956 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 14:58:49.439784 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 14:58:49.442806 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 14:58:49.446164 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 14:58:49.449292 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 14:58:49.455817 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 14:58:49.459498 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 14:58:49.462704 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 14:58:49.466032 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 14:58:49.472956 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 14:58:49.476132 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 14:58:49.479511 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 14:58:49.482314 call enable_fixed_mtrr()
1941 14:58:49.486028 call enable_fixed_mtrr()
1942 14:58:49.489427 CPU physical address size: 39 bits
1943 14:58:49.492510 CPU physical address size: 39 bits
1944 14:58:49.496007 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 14:58:49.499143 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 14:58:49.505923 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 14:58:49.508849 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 14:58:49.512500 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 14:58:49.515392 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 14:58:49.522434 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 14:58:49.525349 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 14:58:49.528958 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 14:58:49.531847 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 14:58:49.535114 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 14:58:49.541793 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 14:58:49.545293 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 14:58:49.548455 call enable_fixed_mtrr()
1958 14:58:49.551597 MTRR: Fixed MSR 0x259 0x0000000000000000
1959 14:58:49.554992 MTRR: Fixed MSR 0x268 0x0606060606060606
1960 14:58:49.558361 MTRR: Fixed MSR 0x269 0x0606060606060606
1961 14:58:49.564858 MTRR: Fixed MSR 0x26a 0x0606060606060606
1962 14:58:49.568460 MTRR: Fixed MSR 0x26b 0x0606060606060606
1963 14:58:49.571576 MTRR: Fixed MSR 0x26c 0x0606060606060606
1964 14:58:49.574795 MTRR: Fixed MSR 0x26d 0x0606060606060606
1965 14:58:49.581739 MTRR: Fixed MSR 0x26e 0x0606060606060606
1966 14:58:49.585105 MTRR: Fixed MSR 0x26f 0x0606060606060606
1967 14:58:49.588348 CPU physical address size: 39 bits
1968 14:58:49.591905 call enable_fixed_mtrr()
1969 14:58:49.595119 CBFS @ c08000 size 3f8000
1970 14:58:49.598407 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1971 14:58:49.605141 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 14:58:49.608282 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 14:58:49.611342 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 14:58:49.614870 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 14:58:49.621653 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 14:58:49.624772 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 14:58:49.628371 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 14:58:49.631281 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 14:58:49.638053 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 14:58:49.641331 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 14:58:49.644941 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 14:58:49.647747 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 14:58:49.654331 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 14:58:49.657787 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 14:58:49.661494 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 14:58:49.664414 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 14:58:49.671207 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 14:58:49.674052 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 14:58:49.677804 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 14:58:49.680903 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 14:58:49.684256 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 14:58:49.690895 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 14:58:49.694147 call enable_fixed_mtrr()
1994 14:58:49.694239 call enable_fixed_mtrr()
1995 14:58:49.697550 CPU physical address size: 39 bits
1996 14:58:49.704179 CPU physical address size: 39 bits
1997 14:58:49.707518 CPU physical address size: 39 bits
1998 14:58:49.710900 CBFS: Locating 'fallback/payload'
1999 14:58:49.714149 CBFS: Found @ offset 1c96c0 size 3f798
2000 14:58:49.717185 Checking segment from ROM address 0xffdd16f8
2001 14:58:49.723834 Checking segment from ROM address 0xffdd1714
2002 14:58:49.727546 Loading segment from ROM address 0xffdd16f8
2003 14:58:49.730766 code (compression=0)
2004 14:58:49.737172 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 14:58:49.746772 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 14:58:49.750351 it's not compressed!
2007 14:58:49.841419 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 14:58:49.848464 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 14:58:49.851493 Loading segment from ROM address 0xffdd1714
2010 14:58:49.855100 Entry Point 0x30000000
2011 14:58:49.858157 Loaded segments
2012 14:58:49.863828 Finalizing chipset.
2013 14:58:49.867119 Finalizing SMM.
2014 14:58:49.870702 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2015 14:58:49.874068 mp_park_aps done after 0 msecs.
2016 14:58:49.880544 Jumping to boot code at 30000000(99b62000)
2017 14:58:49.887122 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 14:58:49.887532
2019 14:58:49.887813
2020 14:58:49.888073
2021 14:58:49.890378 Starting depthcharge on Helios...
2022 14:58:49.890933
2023 14:58:49.891948 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 14:58:49.892381 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 14:58:49.892726 Setting prompt string to ['hatch:']
2026 14:58:49.893060 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 14:58:49.900753 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 14:58:49.901247
2029 14:58:49.906812 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 14:58:49.907204
2031 14:58:49.914045 board_setup: Info: eMMC controller not present; skipping
2032 14:58:49.914535
2033 14:58:49.916653 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 14:58:49.917044
2035 14:58:49.923618 board_setup: Info: SDHCI controller not present; skipping
2036 14:58:49.924106
2037 14:58:49.926960 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 14:58:49.930071
2039 14:58:49.930573 Wipe memory regions:
2040 14:58:49.930899
2041 14:58:49.934067 [0x00000000001000, 0x000000000a0000)
2042 14:58:49.934554
2043 14:58:49.936510 [0x00000000100000, 0x00000030000000)
2044 14:58:50.003564
2045 14:58:50.006779 [0x00000030657430, 0x00000099a2c000)
2046 14:58:50.153017
2047 14:58:50.156003 [0x00000100000000, 0x0000045e800000)
2048 14:58:51.612164
2049 14:58:51.612615 R8152: Initializing
2050 14:58:51.612922
2051 14:58:51.615579 Version 9 (ocp_data = 6010)
2052 14:58:51.619929
2053 14:58:51.620314 R8152: Done initializing
2054 14:58:51.620617
2055 14:58:51.622757 Adding net device
2056 14:58:52.105701
2057 14:58:52.106171 R8152: Initializing
2058 14:58:52.106494
2059 14:58:52.109031 Version 6 (ocp_data = 5c30)
2060 14:58:52.109372
2061 14:58:52.112452 R8152: Done initializing
2062 14:58:52.112850
2063 14:58:52.115609 net_add_device: Attemp to include the same device
2064 14:58:52.119290
2065 14:58:52.126973 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 14:58:52.127476
2067 14:58:52.127767
2068 14:58:52.128026
2069 14:58:52.128692 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 14:58:52.229706 hatch: tftpboot 192.168.201.1 11299752/tftp-deploy-2nog7zrj/kernel/bzImage 11299752/tftp-deploy-2nog7zrj/kernel/cmdline 11299752/tftp-deploy-2nog7zrj/ramdisk/ramdisk.cpio.gz
2072 14:58:52.230360 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 14:58:52.230887 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 14:58:52.235533 tftpboot 192.168.201.1 11299752/tftp-deploy-2nog7zrj/kernel/bzImloy-2nog7zrj/kernel/cmdline 11299752/tftp-deploy-2nog7zrj/ramdisk/ramdisk.cpio.gz
2075 14:58:52.235976
2076 14:58:52.236305 Waiting for link
2077 14:58:52.436414
2078 14:58:52.436924 done.
2079 14:58:52.437311
2080 14:58:52.437914 MAC: 00:24:32:50:1a:59
2081 14:58:52.438378
2082 14:58:52.439524 Sending DHCP discover... done.
2083 14:58:52.439945
2084 14:58:52.443065 Waiting for reply... done.
2085 14:58:52.443758
2086 14:58:52.446163 Sending DHCP request... done.
2087 14:58:52.446581
2088 14:58:52.453776 Waiting for reply... done.
2089 14:58:52.454214
2090 14:58:52.454544 My ip is 192.168.201.14
2091 14:58:52.454850
2092 14:58:52.457172 The DHCP server ip is 192.168.201.1
2093 14:58:52.460116
2094 14:58:52.463914 TFTP server IP predefined by user: 192.168.201.1
2095 14:58:52.464341
2096 14:58:52.469963 Bootfile predefined by user: 11299752/tftp-deploy-2nog7zrj/kernel/bzImage
2097 14:58:52.470352
2098 14:58:52.473312 Sending tftp read request... done.
2099 14:58:52.473698
2100 14:58:52.482097 Waiting for the transfer...
2101 14:58:52.482482
2102 14:58:53.116917 00000000 ################################################################
2103 14:58:53.117412
2104 14:58:53.759343 00080000 ################################################################
2105 14:58:53.759494
2106 14:58:54.317772 00100000 ################################################################
2107 14:58:54.317921
2108 14:58:54.880955 00180000 ################################################################
2109 14:58:54.881110
2110 14:58:55.464340 00200000 ################################################################
2111 14:58:55.464497
2112 14:58:56.049839 00280000 ################################################################
2113 14:58:56.049984
2114 14:58:56.638047 00300000 ################################################################
2115 14:58:56.638194
2116 14:58:57.239007 00380000 ################################################################
2117 14:58:57.239584
2118 14:58:57.811578 00400000 ################################################################
2119 14:58:57.811730
2120 14:58:58.374333 00480000 ################################################################
2121 14:58:58.374490
2122 14:58:58.901841 00500000 ################################################################
2123 14:58:58.902039
2124 14:58:59.427328 00580000 ################################################################
2125 14:58:59.427486
2126 14:58:59.951411 00600000 ################################################################
2127 14:58:59.951572
2128 14:59:00.478389 00680000 ################################################################
2129 14:59:00.478546
2130 14:59:01.015532 00700000 ################################################################
2131 14:59:01.015698
2132 14:59:01.552577 00780000 ################################################################
2133 14:59:01.552738
2134 14:59:01.658591 00800000 ############# done.
2135 14:59:01.658737
2136 14:59:01.661697 The bootfile was 8490896 bytes long.
2137 14:59:01.661811
2138 14:59:01.664930 Sending tftp read request... done.
2139 14:59:01.665019
2140 14:59:01.668317 Waiting for the transfer...
2141 14:59:01.668397
2142 14:59:02.189085 00000000 ################################################################
2143 14:59:02.189247
2144 14:59:02.705546 00080000 ################################################################
2145 14:59:02.705711
2146 14:59:03.222099 00100000 ################################################################
2147 14:59:03.222278
2148 14:59:03.843837 00180000 ################################################################
2149 14:59:03.844384
2150 14:59:04.568161 00200000 ################################################################
2151 14:59:04.568660
2152 14:59:05.284112 00280000 ################################################################
2153 14:59:05.284676
2154 14:59:05.997488 00300000 ################################################################
2155 14:59:05.998060
2156 14:59:06.718922 00380000 ################################################################
2157 14:59:06.719576
2158 14:59:07.439074 00400000 ################################################################
2159 14:59:07.439610
2160 14:59:08.148002 00480000 ################################################################
2161 14:59:08.148574
2162 14:59:08.874765 00500000 ################################################################ done.
2163 14:59:08.875306
2164 14:59:08.877636 Sending tftp read request... done.
2165 14:59:08.878053
2166 14:59:08.881132 Waiting for the transfer...
2167 14:59:08.881554
2168 14:59:08.881885 00000000 # done.
2169 14:59:08.882202
2170 14:59:08.891138 Command line loaded dynamically from TFTP file: 11299752/tftp-deploy-2nog7zrj/kernel/cmdline
2171 14:59:08.891755
2172 14:59:08.920942 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11299752/extract-nfsrootfs-htah48jf,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2173 14:59:08.921469
2174 14:59:08.927220 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 14:59:08.930696
2176 14:59:08.934123 Shutting down all USB controllers.
2177 14:59:08.934579
2178 14:59:08.934941 Removing current net device
2179 14:59:08.938217
2180 14:59:08.938730 Finalizing coreboot
2181 14:59:08.939222
2182 14:59:08.944537 Exiting depthcharge with code 4 at timestamp: 26381045
2183 14:59:08.944959
2184 14:59:08.945287
2185 14:59:08.945600 Starting kernel ...
2186 14:59:08.945901
2187 14:59:08.946190
2188 14:59:08.947632 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2189 14:59:08.948122 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2190 14:59:08.948493 Setting prompt string to ['Linux version [0-9]']
2191 14:59:08.948834 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 14:59:08.949178 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2194 15:03:31.948330 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2196 15:03:31.948573 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2198 15:03:31.948823 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2201 15:03:31.949272 end: 2 depthcharge-action (duration 00:05:00) [common]
2203 15:03:31.949652 Cleaning after the job
2204 15:03:31.949805 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/ramdisk
2205 15:03:31.950867 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/kernel
2206 15:03:31.952506 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/nfsrootfs
2207 15:03:32.051126 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299752/tftp-deploy-2nog7zrj/modules
2208 15:03:32.051679 start: 4.1 power-off (timeout 00:00:30) [common]
2209 15:03:32.051895 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2210 15:03:32.133071 >> Command sent successfully.
2211 15:03:32.138415 Returned 0 in 0 seconds
2212 15:03:32.238852 end: 4.1 power-off (duration 00:00:00) [common]
2214 15:03:32.239367 start: 4.2 read-feedback (timeout 00:10:00) [common]
2215 15:03:32.239694 Listened to connection for namespace 'common' for up to 1s
2217 15:03:32.240149 Listened to connection for namespace 'common' for up to 1s
2218 15:03:33.240812 Finalising connection for namespace 'common'
2219 15:03:33.241463 Disconnecting from shell: Finalise
2220 15:03:33.241901
2221 15:03:33.343139 end: 4.2 read-feedback (duration 00:00:01) [common]
2222 15:03:33.343779 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299752
2223 15:03:34.029684 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299752
2224 15:03:34.029909 JobError: Your job cannot terminate cleanly.