Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 13:42:46.438192 lava-dispatcher, installed at version: 2023.08
2 13:42:46.438369 start: 0 validate
3 13:42:46.438501 Start time: 2023-10-26 13:42:46.438494+00:00 (UTC)
4 13:42:46.438608 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:42:46.438765 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 13:42:46.692630 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:42:46.692796 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:42:46.693732 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:42:46.693846 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 13:42:46.953328 validate duration: 0.51
12 13:42:46.953636 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:42:46.953730 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:42:46.953801 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:42:46.953909 Not decompressing ramdisk as can be used compressed.
16 13:42:46.953985 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 13:42:46.954038 saving as /var/lib/lava/dispatcher/tmp/11884128/tftp-deploy-rp3u64le/ramdisk/rootfs.cpio.gz
18 13:42:46.954089 total size: 8418130 (8 MB)
19 13:42:46.955059 progress 0 % (0 MB)
20 13:42:46.956775 progress 5 % (0 MB)
21 13:42:46.958353 progress 10 % (0 MB)
22 13:42:46.959904 progress 15 % (1 MB)
23 13:42:46.961477 progress 20 % (1 MB)
24 13:42:46.963037 progress 25 % (2 MB)
25 13:42:46.964591 progress 30 % (2 MB)
26 13:42:46.966027 progress 35 % (2 MB)
27 13:42:46.967551 progress 40 % (3 MB)
28 13:42:46.969067 progress 45 % (3 MB)
29 13:42:46.970609 progress 50 % (4 MB)
30 13:42:46.972124 progress 55 % (4 MB)
31 13:42:46.973653 progress 60 % (4 MB)
32 13:42:46.975061 progress 65 % (5 MB)
33 13:42:46.976592 progress 70 % (5 MB)
34 13:42:46.978114 progress 75 % (6 MB)
35 13:42:46.979626 progress 80 % (6 MB)
36 13:42:46.981149 progress 85 % (6 MB)
37 13:42:46.982672 progress 90 % (7 MB)
38 13:42:46.984182 progress 95 % (7 MB)
39 13:42:46.985616 progress 100 % (8 MB)
40 13:42:46.985783 8 MB downloaded in 0.03 s (253.31 MB/s)
41 13:42:46.985911 end: 1.1.1 http-download (duration 00:00:00) [common]
43 13:42:46.986113 end: 1.1 download-retry (duration 00:00:00) [common]
44 13:42:46.986181 start: 1.2 download-retry (timeout 00:10:00) [common]
45 13:42:46.986247 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 13:42:46.986360 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 13:42:46.986419 saving as /var/lib/lava/dispatcher/tmp/11884128/tftp-deploy-rp3u64le/kernel/bzImage
48 13:42:46.986466 total size: 8576912 (8 MB)
49 13:42:46.986515 No compression specified
50 13:42:46.987405 progress 0 % (0 MB)
51 13:42:46.989068 progress 5 % (0 MB)
52 13:42:46.990638 progress 10 % (0 MB)
53 13:42:46.992205 progress 15 % (1 MB)
54 13:42:46.993761 progress 20 % (1 MB)
55 13:42:46.995321 progress 25 % (2 MB)
56 13:42:46.996889 progress 30 % (2 MB)
57 13:42:46.998454 progress 35 % (2 MB)
58 13:42:46.999977 progress 40 % (3 MB)
59 13:42:47.001528 progress 45 % (3 MB)
60 13:42:47.003055 progress 50 % (4 MB)
61 13:42:47.004578 progress 55 % (4 MB)
62 13:42:47.006221 progress 60 % (4 MB)
63 13:42:47.007763 progress 65 % (5 MB)
64 13:42:47.009286 progress 70 % (5 MB)
65 13:42:47.010812 progress 75 % (6 MB)
66 13:42:47.012355 progress 80 % (6 MB)
67 13:42:47.013931 progress 85 % (6 MB)
68 13:42:47.015473 progress 90 % (7 MB)
69 13:42:47.017020 progress 95 % (7 MB)
70 13:42:47.018577 progress 100 % (8 MB)
71 13:42:47.018731 8 MB downloaded in 0.03 s (253.54 MB/s)
72 13:42:47.018854 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:42:47.019042 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:42:47.019111 start: 1.3 download-retry (timeout 00:10:00) [common]
76 13:42:47.019180 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 13:42:47.019296 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 13:42:47.019360 saving as /var/lib/lava/dispatcher/tmp/11884128/tftp-deploy-rp3u64le/modules/modules.tar
79 13:42:47.019408 total size: 253872 (0 MB)
80 13:42:47.019457 Using unxz to decompress xz
81 13:42:47.022839 progress 12 % (0 MB)
82 13:42:47.023140 progress 25 % (0 MB)
83 13:42:47.023339 progress 38 % (0 MB)
84 13:42:47.024919 progress 51 % (0 MB)
85 13:42:47.026526 progress 64 % (0 MB)
86 13:42:47.028300 progress 77 % (0 MB)
87 13:42:47.029928 progress 90 % (0 MB)
88 13:42:47.031422 progress 100 % (0 MB)
89 13:42:47.036397 0 MB downloaded in 0.02 s (14.26 MB/s)
90 13:42:47.036581 end: 1.3.1 http-download (duration 00:00:00) [common]
92 13:42:47.036802 end: 1.3 download-retry (duration 00:00:00) [common]
93 13:42:47.036877 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 13:42:47.036958 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 13:42:47.037034 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 13:42:47.037101 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 13:42:47.037275 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl
98 13:42:47.037384 makedir: /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin
99 13:42:47.037477 makedir: /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/tests
100 13:42:47.037555 makedir: /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/results
101 13:42:47.037644 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-add-keys
102 13:42:47.037757 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-add-sources
103 13:42:47.037854 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-background-process-start
104 13:42:47.037950 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-background-process-stop
105 13:42:47.038043 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-common-functions
106 13:42:47.038133 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-echo-ipv4
107 13:42:47.038226 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-install-packages
108 13:42:47.038316 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-installed-packages
109 13:42:47.038410 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-os-build
110 13:42:47.038502 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-probe-channel
111 13:42:47.038593 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-probe-ip
112 13:42:47.038684 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-target-ip
113 13:42:47.038775 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-target-mac
114 13:42:47.038867 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-target-storage
115 13:42:47.038964 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-test-case
116 13:42:47.039056 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-test-event
117 13:42:47.039148 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-test-feedback
118 13:42:47.039240 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-test-raise
119 13:42:47.039331 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-test-reference
120 13:42:47.039425 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-test-runner
121 13:42:47.039518 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-test-set
122 13:42:47.039610 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-test-shell
123 13:42:47.039703 Updating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-install-packages (oe)
124 13:42:47.039823 Updating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/bin/lava-installed-packages (oe)
125 13:42:47.039916 Creating /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/environment
126 13:42:47.039993 LAVA metadata
127 13:42:47.040051 - LAVA_JOB_ID=11884128
128 13:42:47.040103 - LAVA_DISPATCHER_IP=192.168.201.1
129 13:42:47.040184 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 13:42:47.040241 skipped lava-vland-overlay
131 13:42:47.040302 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 13:42:47.040366 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 13:42:47.040416 skipped lava-multinode-overlay
134 13:42:47.040476 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 13:42:47.040539 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 13:42:47.040596 Loading test definitions
137 13:42:47.040674 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 13:42:47.040736 Using /lava-11884128 at stage 0
139 13:42:47.040976 uuid=11884128_1.4.2.3.1 testdef=None
140 13:42:47.041046 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 13:42:47.041122 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 13:42:47.041549 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 13:42:47.041722 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 13:42:47.042231 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 13:42:47.042421 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 13:42:47.042917 runner path: /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/0/tests/0_dmesg test_uuid 11884128_1.4.2.3.1
149 13:42:47.043036 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 13:42:47.043217 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 13:42:47.043271 Using /lava-11884128 at stage 1
153 13:42:47.043493 uuid=11884128_1.4.2.3.5 testdef=None
154 13:42:47.043560 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 13:42:47.043622 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 13:42:47.043980 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 13:42:47.044154 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 13:42:47.044653 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 13:42:47.044832 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 13:42:47.045307 runner path: /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/1/tests/1_bootrr test_uuid 11884128_1.4.2.3.5
163 13:42:47.045429 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 13:42:47.045595 Creating lava-test-runner.conf files
166 13:42:47.045644 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/0 for stage 0
167 13:42:47.045711 - 0_dmesg
168 13:42:47.045777 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11884128/lava-overlay-rum4llkl/lava-11884128/1 for stage 1
169 13:42:47.045846 - 1_bootrr
170 13:42:47.045921 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 13:42:47.045990 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 13:42:47.052659 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 13:42:47.052768 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 13:42:47.052839 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 13:42:47.052906 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 13:42:47.052972 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 13:42:47.222028 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 13:42:47.222289 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 13:42:47.222385 extracting modules file /var/lib/lava/dispatcher/tmp/11884128/tftp-deploy-rp3u64le/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884128/extract-overlay-ramdisk-cm5snsk_/ramdisk
180 13:42:47.231314 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 13:42:47.231442 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 13:42:47.231524 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11884128/compress-overlay-r7vd4g4n/overlay-1.4.2.4.tar.gz to ramdisk
183 13:42:47.231582 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11884128/compress-overlay-r7vd4g4n/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11884128/extract-overlay-ramdisk-cm5snsk_/ramdisk
184 13:42:47.237923 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 13:42:47.238042 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 13:42:47.238122 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 13:42:47.238194 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 13:42:47.238263 Building ramdisk /var/lib/lava/dispatcher/tmp/11884128/extract-overlay-ramdisk-cm5snsk_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11884128/extract-overlay-ramdisk-cm5snsk_/ramdisk
189 13:42:47.297765 >> 49827 blocks
190 13:42:48.051663 rename /var/lib/lava/dispatcher/tmp/11884128/extract-overlay-ramdisk-cm5snsk_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11884128/tftp-deploy-rp3u64le/ramdisk/ramdisk.cpio.gz
191 13:42:48.052088 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 13:42:48.052232 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 13:42:48.052345 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 13:42:48.052456 No mkimage arch provided, not using FIT.
195 13:42:48.052527 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 13:42:48.052596 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 13:42:48.052679 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 13:42:48.052755 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 13:42:48.052818 No LXC device requested
200 13:42:48.052881 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 13:42:48.052952 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 13:42:48.053018 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 13:42:48.053080 Checking files for TFTP limit of 4294967296 bytes.
204 13:42:48.053473 end: 1 tftp-deploy (duration 00:00:01) [common]
205 13:42:48.053579 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 13:42:48.053681 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 13:42:48.053789 substitutions:
208 13:42:48.053843 - {DTB}: None
209 13:42:48.053892 - {INITRD}: 11884128/tftp-deploy-rp3u64le/ramdisk/ramdisk.cpio.gz
210 13:42:48.053937 - {KERNEL}: 11884128/tftp-deploy-rp3u64le/kernel/bzImage
211 13:42:48.053982 - {LAVA_MAC}: None
212 13:42:48.054034 - {PRESEED_CONFIG}: None
213 13:42:48.054077 - {PRESEED_LOCAL}: None
214 13:42:48.054119 - {RAMDISK}: 11884128/tftp-deploy-rp3u64le/ramdisk/ramdisk.cpio.gz
215 13:42:48.054162 - {ROOT_PART}: None
216 13:42:48.054205 - {ROOT}: None
217 13:42:48.054253 - {SERVER_IP}: 192.168.201.1
218 13:42:48.054302 - {TEE}: None
219 13:42:48.054344 Parsed boot commands:
220 13:42:48.054388 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 13:42:48.054538 Parsed boot commands: tftpboot 192.168.201.1 11884128/tftp-deploy-rp3u64le/kernel/bzImage 11884128/tftp-deploy-rp3u64le/kernel/cmdline 11884128/tftp-deploy-rp3u64le/ramdisk/ramdisk.cpio.gz
222 13:42:48.054611 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 13:42:48.054679 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 13:42:48.054749 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 13:42:48.054813 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 13:42:48.054867 Not connected, no need to disconnect.
227 13:42:48.054923 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 13:42:48.055078 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 13:42:48.055132 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
230 13:42:48.057990 Setting prompt string to ['lava-test: # ']
231 13:42:48.058244 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 13:42:48.058335 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 13:42:48.058413 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 13:42:48.058486 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 13:42:48.058644 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=reboot'
236 13:42:53.189443 >> Command sent successfully.
237 13:42:53.191595 Returned 0 in 5 seconds
238 13:42:53.291983 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 13:42:53.292340 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 13:42:53.292452 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 13:42:53.292527 Setting prompt string to 'Starting depthcharge on Volmar...'
243 13:42:53.292587 Changing prompt to 'Starting depthcharge on Volmar...'
244 13:42:53.292651 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 13:42:53.292880 [Enter `^Ec?' for help]
246 13:42:54.668293
247 13:42:54.668455
248 13:42:54.676675 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 13:42:54.680138 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 13:42:54.684041 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 13:42:54.688194 CPU: AES supported, TXT NOT supported, VT supported
252 13:42:54.696348 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 13:42:54.699810 Cache size = 10 MiB
254 13:42:54.703662 MCH: device id 4609 (rev 04) is Alderlake-P
255 13:42:54.710561 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 13:42:54.714121 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 13:42:54.717770 VBOOT: Loading verstage.
258 13:42:54.721697 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 13:42:54.726200 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 13:42:54.729299 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 13:42:54.737207 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 13:42:54.747235 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 13:42:54.747350
264 13:42:54.747409
265 13:42:54.757291 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 13:42:54.761032 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 13:42:54.767438 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 13:42:54.770663 I2C TX abort detected (00000001)
269 13:42:54.773894 cr50_i2c_read: Address write failed
270 13:42:54.785249 .done! DID_VID 0x00281ae0
271 13:42:54.788548 TPM ready after 0 ms
272 13:42:54.792086 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
273 13:42:54.805054 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
274 13:42:54.811485 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 13:42:54.864192 tlcl_send_startup: Startup return code is 0
276 13:42:54.864348 TPM: setup succeeded
277 13:42:54.884476 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
278 13:42:54.907001 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
279 13:42:54.914382 Chrome EC: UHEPI supported
280 13:42:54.920280 Reading cr50 boot mode
281 13:42:54.935696 Cr50 says boot_mode is VERIFIED_RW(0x00).
282 13:42:54.935809 Phase 1
283 13:42:54.942236 FMAP: area GBB found @ 1805000 (458752 bytes)
284 13:42:54.948995 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
285 13:42:54.955504 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
286 13:42:54.962166 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
287 13:42:54.965408 Phase 2
288 13:42:54.965500 Phase 3
289 13:42:54.968989 FMAP: area GBB found @ 1805000 (458752 bytes)
290 13:42:54.976006 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
291 13:42:54.978638 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
292 13:42:54.985520 VB2:vb2_verify_keyblock() Checking keyblock signature...
293 13:42:54.991986 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
294 13:42:54.998623 VB2:vb2_verify_digest() HW RSA forbidden, using SW
295 13:42:55.001901 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
296 13:42:55.016288 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 13:42:55.019688 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 13:42:55.026204 VB2:vb2_verify_fw_preamble() Verifying preamble.
299 13:42:55.032907 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
300 13:42:55.036196 VB2:vb2_verify_digest() HW RSA forbidden, using SW
301 13:42:55.042752 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
302 13:42:55.047202 Phase 4
303 13:42:55.050369 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
304 13:42:55.057192 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
305 13:42:55.282826 VB2:vb2_verify_digest() HW RSA forbidden, using SW
306 13:42:55.289724 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
307 13:42:55.292677 Saving vboot hash.
308 13:42:55.298998 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
309 13:42:55.314959 tlcl_extend: response is 0
310 13:42:55.321314 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
311 13:42:55.328662 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
312 13:42:55.342999 tlcl_extend: response is 0
313 13:42:55.349173 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
314 13:42:55.367768 tlcl_lock_nv_write: response is 0
315 13:42:55.386958 tlcl_lock_nv_write: response is 0
316 13:42:55.387082 Slot A is selected
317 13:42:55.393541 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
318 13:42:55.400233 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
319 13:42:55.406871 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
320 13:42:55.413359 BS: verstage times (exec / console): total (unknown) / 253 ms
321 13:42:55.413430
322 13:42:55.413493
323 13:42:55.420154 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
324 13:42:55.424066 Google Chrome EC: version:
325 13:42:55.427288 ro: volmar_v2.0.14126-e605144e9c
326 13:42:55.430896 rw: volmar_v0.0.55-22d1557
327 13:42:55.434162 running image: 2
328 13:42:55.437129 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
329 13:42:55.447313 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
330 13:42:55.453971 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
331 13:42:55.460925 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
332 13:42:55.470992 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
333 13:42:55.480818 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 13:42:55.484321 EC took 941us to calculate image hash
335 13:42:55.494146 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
336 13:42:55.497389 VB2:sync_ec() select_rw=RW(active)
337 13:42:55.506903 Waited 270us to clear limit power flag.
338 13:42:55.513578 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 13:42:55.516970 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 13:42:55.520314 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 13:42:55.527027 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
342 13:42:55.530489 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
343 13:42:55.533206 TCO_STS: 0000 0000
344 13:42:55.536834 GEN_PMCON: d0015038 00002200
345 13:42:55.536911 GBLRST_CAUSE: 00000000 00000000
346 13:42:55.540202 HPR_CAUSE0: 00000000
347 13:42:55.543364 prev_sleep_state 5
348 13:42:55.546665 Abort disabling TXT, as CPU is not TXT capable.
349 13:42:55.554522 cse_lite: Number of partitions = 3
350 13:42:55.558019 cse_lite: Current partition = RO
351 13:42:55.558094 cse_lite: Next partition = RO
352 13:42:55.561264 cse_lite: Flags = 0x7
353 13:42:55.568069 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
354 13:42:55.577962 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
355 13:42:55.581145 FMAP: area SI_ME found @ 1000 (5238784 bytes)
356 13:42:55.587878 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
357 13:42:55.594696 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
358 13:42:55.601115 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
359 13:42:55.604340 cse_lite: CSE CBFS RW version : 16.1.25.2049
360 13:42:55.611021 cse_lite: Set Boot Partition Info Command (RW)
361 13:42:55.614597 HECI: Global Reset(Type:1) Command
362 13:42:57.054044 : Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
363 13:42:57.057151 Cache size = 10 MiB
364 13:42:57.060561 MCH: device id 4609 (rev 04) is Alderlake-P
365 13:42:57.067555 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
366 13:42:57.070914 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
367 13:42:57.074345 VBOOT: Loading verstage.
368 13:42:57.078318 FMAP: Found "FLASH" version 1.1 at 0x1804000.
369 13:42:57.085458 FMAP: base = 0x0 size = 0x2000000 #areas = 37
370 13:42:57.088581 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
371 13:42:57.095595 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
372 13:42:57.105872 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
373 13:42:57.106348
374 13:42:57.106604
375 13:42:57.115899 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
376 13:42:57.119521 Probing TPM I2C: I2C bus 1 version 0x3230302a
377 13:42:57.122399 DW I2C bus 1 at 0xfe022000 (400 KHz)
378 13:42:57.126389 done! DID_VID 0x00281ae0
379 13:42:57.129758 TPM ready after 0 ms
380 13:42:57.133683 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
381 13:42:57.147316 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
382 13:42:57.150750 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
383 13:42:57.209524 tlcl_send_startup: Startup return code is 0
384 13:42:57.209960 TPM: setup succeeded
385 13:42:57.229761 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
386 13:42:57.251795 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
387 13:42:57.255647 Chrome EC: UHEPI supported
388 13:42:57.259067 Reading cr50 boot mode
389 13:42:57.273374 Cr50 says boot_mode is VERIFIED_RW(0x00).
390 13:42:57.273875 Phase 1
391 13:42:57.280111 FMAP: area GBB found @ 1805000 (458752 bytes)
392 13:42:57.286921 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
393 13:42:57.293223 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
394 13:42:57.300369 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
395 13:42:57.303215 Phase 2
396 13:42:57.303571 Phase 3
397 13:42:57.306619 FMAP: area GBB found @ 1805000 (458752 bytes)
398 13:42:57.313248 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
399 13:42:57.316924 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
400 13:42:57.323439 VB2:vb2_verify_keyblock() Checking keyblock signature...
401 13:42:57.329957 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
402 13:42:57.336896 VB2:vb2_verify_digest() HW RSA forbidden, using SW
403 13:42:57.339997 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
404 13:42:57.354350 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
405 13:42:57.357867 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
406 13:42:57.364239 VB2:vb2_verify_fw_preamble() Verifying preamble.
407 13:42:57.370932 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
408 13:42:57.374383 VB2:vb2_verify_digest() HW RSA forbidden, using SW
409 13:42:57.380923 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
410 13:42:57.385023 Phase 4
411 13:42:57.388143 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
412 13:42:57.394706 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
413 13:42:57.621181 VB2:vb2_verify_digest() HW RSA forbidden, using SW
414 13:42:57.627967 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
415 13:42:57.631568 Saving vboot hash.
416 13:42:57.637557 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
417 13:42:57.653785 tlcl_extend: response is 0
418 13:42:57.660532 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
419 13:42:57.667278 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
420 13:42:57.681735 tlcl_extend: response is 0
421 13:42:57.688089 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
422 13:42:57.707015 tlcl_lock_nv_write: response is 0
423 13:42:57.725931 tlcl_lock_nv_write: response is 0
424 13:42:57.726437 Slot A is selected
425 13:42:57.733306 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
426 13:42:57.739394 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
427 13:42:57.745750 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
428 13:42:57.752595 BS: verstage times (exec / console): total (unknown) / 246 ms
429 13:42:57.753097
430 13:42:57.753360
431 13:42:57.758731 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
432 13:42:57.763807 Google Chrome EC: version:
433 13:42:57.766550 ro: volmar_v2.0.14126-e605144e9c
434 13:42:57.769186 rw: volmar_v0.0.55-22d1557
435 13:42:57.773244 running image: 2
436 13:42:57.776459 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
437 13:42:57.786608 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
438 13:42:57.793013 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
439 13:42:57.799111 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
440 13:42:57.809372 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
441 13:42:57.819725 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
442 13:42:57.823086 EC took 941us to calculate image hash
443 13:42:57.834033 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
444 13:42:57.837148 VB2:sync_ec() select_rw=RW(active)
445 13:42:57.848212 Waited 270us to clear limit power flag.
446 13:42:57.852091 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
447 13:42:57.854484 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
448 13:42:57.858064 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
449 13:42:57.864613 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
450 13:42:57.867947 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
451 13:42:57.871484 TCO_STS: 0000 0000
452 13:42:57.871988 GEN_PMCON: d1001038 00002200
453 13:42:57.874326 GBLRST_CAUSE: 00000040 00000000
454 13:42:57.877703 HPR_CAUSE0: 00000000
455 13:42:57.880988 prev_sleep_state 5
456 13:42:57.884516 Abort disabling TXT, as CPU is not TXT capable.
457 13:42:57.892816 cse_lite: Number of partitions = 3
458 13:42:57.896013 cse_lite: Current partition = RW
459 13:42:57.896479 cse_lite: Next partition = RW
460 13:42:57.899574 cse_lite: Flags = 0x7
461 13:42:57.906069 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
462 13:42:57.916348 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
463 13:42:57.919115 FMAP: area SI_ME found @ 1000 (5238784 bytes)
464 13:42:57.925927 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
465 13:42:57.932843 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
466 13:42:57.939374 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
467 13:42:57.942713 cse_lite: CSE CBFS RW version : 16.1.25.2049
468 13:42:57.946168 Boot Count incremented to 1938
469 13:42:57.952813 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
470 13:42:57.958995 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
471 13:42:57.972295 Probing TPM I2C: done! DID_VID 0x00281ae0
472 13:42:57.975278 Locality already claimed
473 13:42:57.978586 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
474 13:42:57.998267 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
475 13:42:58.005133 MRC: Hash idx 0x100d comparison successful.
476 13:42:58.008028 MRC cache found, size f6c8
477 13:42:58.008518 bootmode is set to: 2
478 13:42:58.012056 EC returned error result code 3
479 13:42:58.016160 FW_CONFIG value from CBI is 0x131
480 13:42:58.021907 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
481 13:42:58.025052 SPD index = 0
482 13:42:58.031763 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
483 13:42:58.032273 SPD: module type is LPDDR4X
484 13:42:58.039313 SPD: module part number is K4U6E3S4AB-MGCL
485 13:42:58.045145 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
486 13:42:58.049030 SPD: device width 16 bits, bus width 16 bits
487 13:42:58.051625 SPD: module size is 1024 MB (per channel)
488 13:42:58.121432 CBMEM:
489 13:42:58.124157 IMD: root @ 0x76fff000 254 entries.
490 13:42:58.127603 IMD: root @ 0x76ffec00 62 entries.
491 13:42:58.135583 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
492 13:42:58.138790 RO_VPD is uninitialized or empty.
493 13:42:58.141866 FMAP: area RW_VPD found @ f29000 (8192 bytes)
494 13:42:58.149064 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
495 13:42:58.152163 External stage cache:
496 13:42:58.155294 IMD: root @ 0x7bbff000 254 entries.
497 13:42:58.158745 IMD: root @ 0x7bbfec00 62 entries.
498 13:42:58.165320 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
499 13:42:58.172362 MRC: Checking cached data update for 'RW_MRC_CACHE'.
500 13:42:58.175532 MRC: 'RW_MRC_CACHE' does not need update.
501 13:42:58.176153 8 DIMMs found
502 13:42:58.178561 SMM Memory Map
503 13:42:58.182291 SMRAM : 0x7b800000 0x800000
504 13:42:58.185731 Subregion 0: 0x7b800000 0x200000
505 13:42:58.188916 Subregion 1: 0x7ba00000 0x200000
506 13:42:58.192115 Subregion 2: 0x7bc00000 0x400000
507 13:42:58.195753 top_of_ram = 0x77000000
508 13:42:58.199059 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
509 13:42:58.205930 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
510 13:42:58.212700 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
511 13:42:58.215874 MTRR Range: Start=ff000000 End=0 (Size 1000000)
512 13:42:58.216373 Normal boot
513 13:42:58.225736 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
514 13:42:58.232401 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
515 13:42:58.239054 Processing 237 relocs. Offset value of 0x74ab9000
516 13:42:58.246439 BS: romstage times (exec / console): total (unknown) / 377 ms
517 13:42:58.254310
518 13:42:58.254790
519 13:42:58.260795 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
520 13:42:58.261283 Normal boot
521 13:42:58.267597 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
522 13:42:58.274037 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
523 13:42:58.280718 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
524 13:42:58.290396 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
525 13:42:58.338261 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
526 13:42:58.345368 Processing 5931 relocs. Offset value of 0x72a2f000
527 13:42:58.348161 BS: postcar times (exec / console): total (unknown) / 51 ms
528 13:42:58.351534
529 13:42:58.352036
530 13:42:58.358163 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
531 13:42:58.361722 Reserving BERT start 76a1e000, size 10000
532 13:42:58.365142 Normal boot
533 13:42:58.368191 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
534 13:42:58.374907 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
535 13:42:58.385034 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
536 13:42:58.388584 FMAP: area RW_VPD found @ f29000 (8192 bytes)
537 13:42:58.391211 Google Chrome EC: version:
538 13:42:58.394984 ro: volmar_v2.0.14126-e605144e9c
539 13:42:58.397781 rw: volmar_v0.0.55-22d1557
540 13:42:58.401297 running image: 2
541 13:42:58.404710 ACPI _SWS is PM1 Index 8 GPE Index -1
542 13:42:58.408251 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
543 13:42:58.412530 EC returned error result code 3
544 13:42:58.416196 FW_CONFIG value from CBI is 0x131
545 13:42:58.422287 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
546 13:42:58.425829 PCI: 00:1c.2 disabled by fw_config
547 13:42:58.432744 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
548 13:42:58.435306 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
549 13:42:58.441983 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
550 13:42:58.445295 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
551 13:42:58.452589 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
552 13:42:58.458990 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
553 13:42:58.462268 microcode: sig=0x906a4 pf=0x80 revision=0x423
554 13:42:58.469288 microcode: Update skipped, already up-to-date
555 13:42:58.475977 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
556 13:42:58.507803 Detected 6 core, 8 thread CPU.
557 13:42:58.511156 Setting up SMI for CPU
558 13:42:58.513957 IED base = 0x7bc00000
559 13:42:58.514349 IED size = 0x00400000
560 13:42:58.517484 Will perform SMM setup.
561 13:42:58.524398 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
562 13:42:58.524889 LAPIC 0x0 in XAPIC mode.
563 13:42:58.534177 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
564 13:42:58.537222 Processing 18 relocs. Offset value of 0x00030000
565 13:42:58.542142 Attempting to start 7 APs
566 13:42:58.545353 Waiting for 10ms after sending INIT.
567 13:42:58.558877 Waiting for SIPI to complete...
568 13:42:58.562191 LAPIC 0x1 in XAPIC mode.
569 13:42:58.565300 LAPIC 0x10 in XAPIC mode.
570 13:42:58.568350 LAPIC 0x12 in XAPIC mode.
571 13:42:58.571858 LAPIC 0x14 in XAPIC mode.
572 13:42:58.575187 AP: slot 4 apic_id 10, MCU rev: 0x00000423
573 13:42:58.578574 AP: slot 2 apic_id 14, MCU rev: 0x00000423
574 13:42:58.581962 LAPIC 0x16 in XAPIC mode.
575 13:42:58.584747 LAPIC 0x9 in XAPIC mode.
576 13:42:58.588545 AP: slot 3 apic_id 16, MCU rev: 0x00000423
577 13:42:58.592075 AP: slot 1 apic_id 12, MCU rev: 0x00000423
578 13:42:58.598402 AP: slot 6 apic_id 1, MCU rev: 0x00000423
579 13:42:58.598911 done.
580 13:42:58.601542 Waiting for SIPI to complete...
581 13:42:58.601875 done.
582 13:42:58.605102 LAPIC 0x8 in XAPIC mode.
583 13:42:58.608393 AP: slot 5 apic_id 9, MCU rev: 0x00000423
584 13:42:58.611401 AP: slot 7 apic_id 8, MCU rev: 0x00000423
585 13:42:58.614981 smm_setup_relocation_handler: enter
586 13:42:58.618358 smm_setup_relocation_handler: exit
587 13:42:58.628647 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
588 13:42:58.631940 Processing 11 relocs. Offset value of 0x00038000
589 13:42:58.638501 smm_module_setup_stub: stack_top = 0x7b804000
590 13:42:58.641431 smm_module_setup_stub: per cpu stack_size = 0x800
591 13:42:58.648729 smm_module_setup_stub: runtime.start32_offset = 0x4c
592 13:42:58.651807 smm_module_setup_stub: runtime.smm_size = 0x10000
593 13:42:58.658407 SMM Module: stub loaded at 38000. Will call 0x76a52094
594 13:42:58.661687 Installing permanent SMM handler to 0x7b800000
595 13:42:58.668406 smm_load_module: total_smm_space_needed e468, available -> 200000
596 13:42:58.678473 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
597 13:42:58.681637 Processing 255 relocs. Offset value of 0x7b9f6000
598 13:42:58.688737 smm_load_module: smram_start: 0x7b800000
599 13:42:58.691859 smm_load_module: smram_end: 7ba00000
600 13:42:58.694799 smm_load_module: handler start 0x7b9f6d5f
601 13:42:58.698468 smm_load_module: handler_size 98d0
602 13:42:58.701823 smm_load_module: fxsave_area 0x7b9ff000
603 13:42:58.705376 smm_load_module: fxsave_size 1000
604 13:42:58.708708 smm_load_module: CONFIG_MSEG_SIZE 0x0
605 13:42:58.715382 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
606 13:42:58.721693 smm_load_module: handler_mod_params.smbase = 0x7b800000
607 13:42:58.725329 smm_load_module: per_cpu_save_state_size = 0x400
608 13:42:58.728749 smm_load_module: num_cpus = 0x8
609 13:42:58.735417 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
610 13:42:58.738655 smm_load_module: total_save_state_size = 0x2000
611 13:42:58.741786 smm_load_module: cpu0 entry: 7b9e6000
612 13:42:58.748724 smm_create_map: cpus allowed in one segment 30
613 13:42:58.751651 smm_create_map: min # of segments needed 1
614 13:42:58.752158 CPU 0x0
615 13:42:58.755344 smbase 7b9e6000 entry 7b9ee000
616 13:42:58.762596 ss_start 7b9f5c00 code_end 7b9ee208
617 13:42:58.763179 CPU 0x1
618 13:42:58.765099 smbase 7b9e5c00 entry 7b9edc00
619 13:42:58.771639 ss_start 7b9f5800 code_end 7b9ede08
620 13:42:58.772145 CPU 0x2
621 13:42:58.775452 smbase 7b9e5800 entry 7b9ed800
622 13:42:58.778743 ss_start 7b9f5400 code_end 7b9eda08
623 13:42:58.781774 CPU 0x3
624 13:42:58.784916 smbase 7b9e5400 entry 7b9ed400
625 13:42:58.788496 ss_start 7b9f5000 code_end 7b9ed608
626 13:42:58.789004 CPU 0x4
627 13:42:58.795423 smbase 7b9e5000 entry 7b9ed000
628 13:42:58.798293 ss_start 7b9f4c00 code_end 7b9ed208
629 13:42:58.798801 CPU 0x5
630 13:42:58.801730 smbase 7b9e4c00 entry 7b9ecc00
631 13:42:58.808304 ss_start 7b9f4800 code_end 7b9ece08
632 13:42:58.808812 CPU 0x6
633 13:42:58.811842 smbase 7b9e4800 entry 7b9ec800
634 13:42:58.818252 ss_start 7b9f4400 code_end 7b9eca08
635 13:42:58.818758 CPU 0x7
636 13:42:58.821434 smbase 7b9e4400 entry 7b9ec400
637 13:42:58.825127 ss_start 7b9f4000 code_end 7b9ec608
638 13:42:58.834779 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
639 13:42:58.838551 Processing 11 relocs. Offset value of 0x7b9ee000
640 13:42:58.844486 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
641 13:42:58.852042 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
642 13:42:58.857926 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
643 13:42:58.864890 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
644 13:42:58.871211 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
645 13:42:58.874594 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
646 13:42:58.881134 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
647 13:42:58.888153 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
648 13:42:58.895009 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
649 13:42:58.901528 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
650 13:42:58.908478 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
651 13:42:58.914681 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
652 13:42:58.921542 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
653 13:42:58.925149 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
654 13:42:58.931520 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
655 13:42:58.938388 smm_module_setup_stub: stack_top = 0x7b804000
656 13:42:58.941211 smm_module_setup_stub: per cpu stack_size = 0x800
657 13:42:58.948060 smm_module_setup_stub: runtime.start32_offset = 0x4c
658 13:42:58.951233 smm_module_setup_stub: runtime.smm_size = 0x200000
659 13:42:58.958268 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
660 13:42:58.962533 Clearing SMI status registers
661 13:42:58.965583 SMI_STS: PM1
662 13:42:58.966135 PM1_STS: WAK PWRBTN
663 13:42:58.975535 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
664 13:42:58.978439 In relocation handler: CPU 0
665 13:42:58.982059 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
666 13:42:58.985480 Writing SMRR. base = 0x7b800006, mask=0xff800c00
667 13:42:58.988826 Relocation complete.
668 13:42:58.995958 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
669 13:42:58.999237 In relocation handler: CPU 6
670 13:42:59.002069 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
671 13:42:59.006047 Relocation complete.
672 13:42:59.012603 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
673 13:42:59.016009 In relocation handler: CPU 1
674 13:42:59.019193 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
675 13:42:59.025759 Writing SMRR. base = 0x7b800006, mask=0xff800c00
676 13:42:59.026293 Relocation complete.
677 13:42:59.032240 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
678 13:42:59.035767 In relocation handler: CPU 3
679 13:42:59.038796 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
680 13:42:59.045509 Writing SMRR. base = 0x7b800006, mask=0xff800c00
681 13:42:59.048935 Relocation complete.
682 13:42:59.055545 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
683 13:42:59.058830 In relocation handler: CPU 4
684 13:42:59.062094 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
685 13:42:59.065566 Writing SMRR. base = 0x7b800006, mask=0xff800c00
686 13:42:59.068987 Relocation complete.
687 13:42:59.075512 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
688 13:42:59.078811 In relocation handler: CPU 2
689 13:42:59.082180 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
690 13:42:59.088489 Writing SMRR. base = 0x7b800006, mask=0xff800c00
691 13:42:59.088941 Relocation complete.
692 13:42:59.095575 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
693 13:42:59.099379 In relocation handler: CPU 5
694 13:42:59.107170 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
695 13:42:59.107335 Relocation complete.
696 13:42:59.112823 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
697 13:42:59.116064 In relocation handler: CPU 7
698 13:42:59.118997 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
699 13:42:59.125762 Writing SMRR. base = 0x7b800006, mask=0xff800c00
700 13:42:59.129039 Relocation complete.
701 13:42:59.129599 Initializing CPU #0
702 13:42:59.132502 CPU: vendor Intel device 906a4
703 13:42:59.135679 CPU: family 06, model 9a, stepping 04
704 13:42:59.138962 Clearing out pending MCEs
705 13:42:59.142092 cpu: energy policy set to 7
706 13:42:59.145447 Turbo is available but hidden
707 13:42:59.149020 Turbo is available and visible
708 13:42:59.152562 microcode: Update skipped, already up-to-date
709 13:42:59.155892 CPU #0 initialized
710 13:42:59.156418 Initializing CPU #6
711 13:42:59.159202 Initializing CPU #3
712 13:42:59.162303 Initializing CPU #1
713 13:42:59.162808 Initializing CPU #4
714 13:42:59.165718 CPU: vendor Intel device 906a4
715 13:42:59.168849 CPU: family 06, model 9a, stepping 04
716 13:42:59.172412 CPU: vendor Intel device 906a4
717 13:42:59.175984 CPU: family 06, model 9a, stepping 04
718 13:42:59.178615 Initializing CPU #7
719 13:42:59.182133 Initializing CPU #5
720 13:42:59.182514 Clearing out pending MCEs
721 13:42:59.186702 CPU: vendor Intel device 906a4
722 13:42:59.189316 CPU: family 06, model 9a, stepping 04
723 13:42:59.192282 cpu: energy policy set to 7
724 13:42:59.195444 CPU: vendor Intel device 906a4
725 13:42:59.198868 CPU: family 06, model 9a, stepping 04
726 13:42:59.203010 Initializing CPU #2
727 13:42:59.205566 CPU: vendor Intel device 906a4
728 13:42:59.209067 CPU: family 06, model 9a, stepping 04
729 13:42:59.212568 CPU: vendor Intel device 906a4
730 13:42:59.215616 CPU: family 06, model 9a, stepping 04
731 13:42:59.222222 microcode: Update skipped, already up-to-date
732 13:42:59.222730 CPU #3 initialized
733 13:42:59.225802 CPU: vendor Intel device 906a4
734 13:42:59.228938 CPU: family 06, model 9a, stepping 04
735 13:42:59.232371 Clearing out pending MCEs
736 13:42:59.235890 Clearing out pending MCEs
737 13:42:59.239034 cpu: energy policy set to 7
738 13:42:59.239537 Clearing out pending MCEs
739 13:42:59.242132 cpu: energy policy set to 7
740 13:42:59.248784 microcode: Update skipped, already up-to-date
741 13:42:59.249187 CPU #1 initialized
742 13:42:59.252572 cpu: energy policy set to 7
743 13:42:59.258536 microcode: Update skipped, already up-to-date
744 13:42:59.259046 CPU #2 initialized
745 13:42:59.262238 microcode: Update skipped, already up-to-date
746 13:42:59.265702 CPU #4 initialized
747 13:42:59.269010 Clearing out pending MCEs
748 13:42:59.272173 Clearing out pending MCEs
749 13:42:59.272683 cpu: energy policy set to 7
750 13:42:59.276030 cpu: energy policy set to 7
751 13:42:59.282031 microcode: Update skipped, already up-to-date
752 13:42:59.282398 CPU #7 initialized
753 13:42:59.288895 microcode: Update skipped, already up-to-date
754 13:42:59.289421 CPU #5 initialized
755 13:42:59.292333 Clearing out pending MCEs
756 13:42:59.295792 cpu: energy policy set to 7
757 13:42:59.299140 microcode: Update skipped, already up-to-date
758 13:42:59.302171 CPU #6 initialized
759 13:42:59.305471 bsp_do_flight_plan done after 700 msecs.
760 13:42:59.309037 CPU: frequency set to 4400 MHz
761 13:42:59.312427 Enabling SMIs.
762 13:42:59.315875 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
763 13:42:59.333218 Probing TPM I2C: done! DID_VID 0x00281ae0
764 13:42:59.336598 Locality already claimed
765 13:42:59.340116 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
766 13:42:59.351342 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
767 13:42:59.354314 Enabling GPIO PM b/c CR50 has long IRQ pulse support
768 13:42:59.361540 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
769 13:42:59.367760 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
770 13:42:59.371537 Found a VBT of 9216 bytes after decompression
771 13:42:59.374530 PCI 1.0, PIN A, using IRQ #16
772 13:42:59.377747 PCI 2.0, PIN A, using IRQ #17
773 13:42:59.381209 PCI 4.0, PIN A, using IRQ #18
774 13:42:59.384482 PCI 5.0, PIN A, using IRQ #16
775 13:42:59.387864 PCI 6.0, PIN A, using IRQ #16
776 13:42:59.391049 PCI 6.2, PIN C, using IRQ #18
777 13:42:59.394597 PCI 7.0, PIN A, using IRQ #19
778 13:42:59.397977 PCI 7.1, PIN B, using IRQ #20
779 13:42:59.401264 PCI 7.2, PIN C, using IRQ #21
780 13:42:59.404535 PCI 7.3, PIN D, using IRQ #22
781 13:42:59.407938 PCI 8.0, PIN A, using IRQ #23
782 13:42:59.411370 PCI D.0, PIN A, using IRQ #17
783 13:42:59.414028 PCI D.1, PIN B, using IRQ #19
784 13:42:59.414422 PCI 10.0, PIN A, using IRQ #24
785 13:42:59.417476 PCI 10.1, PIN B, using IRQ #25
786 13:42:59.421144 PCI 10.6, PIN C, using IRQ #20
787 13:42:59.424175 PCI 10.7, PIN D, using IRQ #21
788 13:42:59.427923 PCI 11.0, PIN A, using IRQ #26
789 13:42:59.430980 PCI 11.1, PIN B, using IRQ #27
790 13:42:59.434063 PCI 11.2, PIN C, using IRQ #28
791 13:42:59.437986 PCI 11.3, PIN D, using IRQ #29
792 13:42:59.441320 PCI 12.0, PIN A, using IRQ #30
793 13:42:59.443811 PCI 12.6, PIN B, using IRQ #31
794 13:42:59.447409 PCI 12.7, PIN C, using IRQ #22
795 13:42:59.451012 PCI 13.0, PIN A, using IRQ #32
796 13:42:59.454148 PCI 13.1, PIN B, using IRQ #33
797 13:42:59.457581 PCI 13.2, PIN C, using IRQ #34
798 13:42:59.461068 PCI 13.3, PIN D, using IRQ #35
799 13:42:59.464450 PCI 14.0, PIN B, using IRQ #23
800 13:42:59.464944 PCI 14.1, PIN A, using IRQ #36
801 13:42:59.467524 PCI 14.3, PIN C, using IRQ #17
802 13:42:59.470808 PCI 15.0, PIN A, using IRQ #37
803 13:42:59.474175 PCI 15.1, PIN B, using IRQ #38
804 13:42:59.477530 PCI 15.2, PIN C, using IRQ #39
805 13:42:59.480816 PCI 15.3, PIN D, using IRQ #40
806 13:42:59.484381 PCI 16.0, PIN A, using IRQ #18
807 13:42:59.487709 PCI 16.1, PIN B, using IRQ #19
808 13:42:59.490967 PCI 16.2, PIN C, using IRQ #20
809 13:42:59.493883 PCI 16.3, PIN D, using IRQ #21
810 13:42:59.497559 PCI 16.4, PIN A, using IRQ #18
811 13:42:59.500976 PCI 16.5, PIN B, using IRQ #19
812 13:42:59.504119 PCI 17.0, PIN A, using IRQ #22
813 13:42:59.507606 PCI 19.0, PIN A, using IRQ #41
814 13:42:59.510821 PCI 19.1, PIN B, using IRQ #42
815 13:42:59.513813 PCI 19.2, PIN C, using IRQ #43
816 13:42:59.514202 PCI 1C.0, PIN A, using IRQ #16
817 13:42:59.517495 PCI 1C.1, PIN B, using IRQ #17
818 13:42:59.521305 PCI 1C.2, PIN C, using IRQ #18
819 13:42:59.524158 PCI 1C.3, PIN D, using IRQ #19
820 13:42:59.527561 PCI 1C.4, PIN A, using IRQ #16
821 13:42:59.531113 PCI 1C.5, PIN B, using IRQ #17
822 13:42:59.533997 PCI 1C.6, PIN C, using IRQ #18
823 13:42:59.537487 PCI 1C.7, PIN D, using IRQ #19
824 13:42:59.541064 PCI 1D.0, PIN A, using IRQ #16
825 13:42:59.543745 PCI 1D.1, PIN B, using IRQ #17
826 13:42:59.547823 PCI 1D.2, PIN C, using IRQ #18
827 13:42:59.550844 PCI 1D.3, PIN D, using IRQ #19
828 13:42:59.554714 PCI 1E.0, PIN A, using IRQ #23
829 13:42:59.557742 PCI 1E.1, PIN B, using IRQ #20
830 13:42:59.561172 PCI 1E.2, PIN C, using IRQ #44
831 13:42:59.564200 PCI 1E.3, PIN D, using IRQ #45
832 13:42:59.564695 PCI 1F.3, PIN B, using IRQ #22
833 13:42:59.567419 PCI 1F.4, PIN C, using IRQ #23
834 13:42:59.571011 PCI 1F.6, PIN D, using IRQ #20
835 13:42:59.574495 PCI 1F.7, PIN A, using IRQ #21
836 13:42:59.580912 IRQ: Using dynamically assigned PCI IO-APIC IRQs
837 13:42:59.587661 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
838 13:42:59.769453 FSPS returned 0
839 13:42:59.772965 Executing Phase 1 of FspMultiPhaseSiInit
840 13:42:59.782697 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
841 13:42:59.785840 port C0 DISC req: usage 1 usb3 1 usb2 1
842 13:42:59.789240 Raw Buffer output 0 00000111
843 13:42:59.792761 Raw Buffer output 1 00000000
844 13:42:59.796407 pmc_send_ipc_cmd succeeded
845 13:42:59.803013 port C1 DISC req: usage 1 usb3 3 usb2 3
846 13:42:59.803512 Raw Buffer output 0 00000331
847 13:42:59.806217 Raw Buffer output 1 00000000
848 13:42:59.810218 pmc_send_ipc_cmd succeeded
849 13:42:59.814329 Detected 6 core, 8 thread CPU.
850 13:42:59.817219 Detected 6 core, 8 thread CPU.
851 13:42:59.822594 Detected 6 core, 8 thread CPU.
852 13:42:59.825852 Detected 6 core, 8 thread CPU.
853 13:42:59.829343 Detected 6 core, 8 thread CPU.
854 13:42:59.832750 Detected 6 core, 8 thread CPU.
855 13:42:59.836023 Detected 6 core, 8 thread CPU.
856 13:42:59.839143 Detected 6 core, 8 thread CPU.
857 13:42:59.842531 Detected 6 core, 8 thread CPU.
858 13:42:59.845612 Detected 6 core, 8 thread CPU.
859 13:42:59.849327 Detected 6 core, 8 thread CPU.
860 13:42:59.852565 Detected 6 core, 8 thread CPU.
861 13:42:59.855862 Detected 6 core, 8 thread CPU.
862 13:42:59.859119 Detected 6 core, 8 thread CPU.
863 13:42:59.862222 Detected 6 core, 8 thread CPU.
864 13:42:59.865714 Detected 6 core, 8 thread CPU.
865 13:42:59.868973 Detected 6 core, 8 thread CPU.
866 13:42:59.872804 Detected 6 core, 8 thread CPU.
867 13:42:59.875750 Detected 6 core, 8 thread CPU.
868 13:42:59.879008 Detected 6 core, 8 thread CPU.
869 13:42:59.882492 Detected 6 core, 8 thread CPU.
870 13:42:59.885007 Detected 6 core, 8 thread CPU.
871 13:43:00.175963 Detected 6 core, 8 thread CPU.
872 13:43:00.179384 Detected 6 core, 8 thread CPU.
873 13:43:00.182707 Detected 6 core, 8 thread CPU.
874 13:43:00.186075 Detected 6 core, 8 thread CPU.
875 13:43:00.189629 Detected 6 core, 8 thread CPU.
876 13:43:00.193060 Detected 6 core, 8 thread CPU.
877 13:43:00.195962 Detected 6 core, 8 thread CPU.
878 13:43:00.199037 Detected 6 core, 8 thread CPU.
879 13:43:00.202669 Detected 6 core, 8 thread CPU.
880 13:43:00.205970 Detected 6 core, 8 thread CPU.
881 13:43:00.209535 Detected 6 core, 8 thread CPU.
882 13:43:00.212673 Detected 6 core, 8 thread CPU.
883 13:43:00.215793 Detected 6 core, 8 thread CPU.
884 13:43:00.219215 Detected 6 core, 8 thread CPU.
885 13:43:00.222673 Detected 6 core, 8 thread CPU.
886 13:43:00.226061 Detected 6 core, 8 thread CPU.
887 13:43:00.229722 Detected 6 core, 8 thread CPU.
888 13:43:00.232525 Detected 6 core, 8 thread CPU.
889 13:43:00.236092 Detected 6 core, 8 thread CPU.
890 13:43:00.236588 Detected 6 core, 8 thread CPU.
891 13:43:00.239699 Display FSP Version Info HOB
892 13:43:00.242872 Reference Code - CPU = c.0.65.70
893 13:43:00.246546 uCode Version = 0.0.4.23
894 13:43:00.249319 TXT ACM version = ff.ff.ff.ffff
895 13:43:00.253264 Reference Code - ME = c.0.65.70
896 13:43:00.256532 MEBx version = 0.0.0.0
897 13:43:00.259597 ME Firmware Version = Lite SKU
898 13:43:00.262920 Reference Code - PCH = c.0.65.70
899 13:43:00.266492 PCH-CRID Status = Disabled
900 13:43:00.269693 PCH-CRID Original Value = ff.ff.ff.ffff
901 13:43:00.273131 PCH-CRID New Value = ff.ff.ff.ffff
902 13:43:00.276184 OPROM - RST - RAID = ff.ff.ff.ffff
903 13:43:00.280024 PCH Hsio Version = 4.0.0.0
904 13:43:00.283159 Reference Code - SA - System Agent = c.0.65.70
905 13:43:00.285970 Reference Code - MRC = 0.0.3.80
906 13:43:00.289528 SA - PCIe Version = c.0.65.70
907 13:43:00.292967 SA-CRID Status = Disabled
908 13:43:00.296479 SA-CRID Original Value = 0.0.0.4
909 13:43:00.299903 SA-CRID New Value = 0.0.0.4
910 13:43:00.302827 OPROM - VBIOS = ff.ff.ff.ffff
911 13:43:00.306478 IO Manageability Engine FW Version = 24.0.4.0
912 13:43:00.309651 PHY Build Version = 0.0.0.2016
913 13:43:00.313191 Thunderbolt(TM) FW Version = 0.0.0.0
914 13:43:00.319986 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
915 13:43:00.326546 BS: BS_DEV_INIT_CHIPS run times (exec / console): 494 / 507 ms
916 13:43:00.327011 Enumerating buses...
917 13:43:00.333223 Show all devs... Before device enumeration.
918 13:43:00.333924 Root Device: enabled 1
919 13:43:00.336542 CPU_CLUSTER: 0: enabled 1
920 13:43:00.339939 DOMAIN: 0000: enabled 1
921 13:43:00.342948 GPIO: 0: enabled 1
922 13:43:00.343314 PCI: 00:00.0: enabled 1
923 13:43:00.345910 PCI: 00:01.0: enabled 0
924 13:43:00.349603 PCI: 00:01.1: enabled 0
925 13:43:00.350088 PCI: 00:02.0: enabled 1
926 13:43:00.353081 PCI: 00:04.0: enabled 1
927 13:43:00.356429 PCI: 00:05.0: enabled 0
928 13:43:00.359770 PCI: 00:06.0: enabled 1
929 13:43:00.360259 PCI: 00:06.2: enabled 0
930 13:43:00.362899 PCI: 00:07.0: enabled 0
931 13:43:00.365816 PCI: 00:07.1: enabled 0
932 13:43:00.369485 PCI: 00:07.2: enabled 0
933 13:43:00.369977 PCI: 00:07.3: enabled 0
934 13:43:00.372805 PCI: 00:08.0: enabled 0
935 13:43:00.376301 PCI: 00:09.0: enabled 0
936 13:43:00.379314 PCI: 00:0a.0: enabled 1
937 13:43:00.379807 PCI: 00:0d.0: enabled 1
938 13:43:00.382667 PCI: 00:0d.1: enabled 0
939 13:43:00.386352 PCI: 00:0d.2: enabled 0
940 13:43:00.389539 PCI: 00:0d.3: enabled 0
941 13:43:00.390025 PCI: 00:0e.0: enabled 0
942 13:43:00.392677 PCI: 00:10.0: enabled 0
943 13:43:00.396252 PCI: 00:10.1: enabled 0
944 13:43:00.396738 PCI: 00:10.6: enabled 0
945 13:43:00.399765 PCI: 00:10.7: enabled 0
946 13:43:00.402455 PCI: 00:12.0: enabled 0
947 13:43:00.405699 PCI: 00:12.6: enabled 0
948 13:43:00.406051 PCI: 00:12.7: enabled 0
949 13:43:00.409488 PCI: 00:13.0: enabled 0
950 13:43:00.412738 PCI: 00:14.0: enabled 1
951 13:43:00.416023 PCI: 00:14.1: enabled 0
952 13:43:00.416512 PCI: 00:14.2: enabled 1
953 13:43:00.419413 PCI: 00:14.3: enabled 1
954 13:43:00.422859 PCI: 00:15.0: enabled 1
955 13:43:00.426056 PCI: 00:15.1: enabled 1
956 13:43:00.426544 PCI: 00:15.2: enabled 0
957 13:43:00.429437 PCI: 00:15.3: enabled 1
958 13:43:00.432585 PCI: 00:16.0: enabled 1
959 13:43:00.433076 PCI: 00:16.1: enabled 0
960 13:43:00.435675 PCI: 00:16.2: enabled 0
961 13:43:00.439175 PCI: 00:16.3: enabled 0
962 13:43:00.442683 PCI: 00:16.4: enabled 0
963 13:43:00.443177 PCI: 00:16.5: enabled 0
964 13:43:00.445642 PCI: 00:17.0: enabled 1
965 13:43:00.449376 PCI: 00:19.0: enabled 0
966 13:43:00.452363 PCI: 00:19.1: enabled 1
967 13:43:00.452758 PCI: 00:19.2: enabled 0
968 13:43:00.455963 PCI: 00:1a.0: enabled 0
969 13:43:00.459174 PCI: 00:1c.0: enabled 0
970 13:43:00.462367 PCI: 00:1c.1: enabled 0
971 13:43:00.462717 PCI: 00:1c.2: enabled 0
972 13:43:00.465676 PCI: 00:1c.3: enabled 0
973 13:43:00.469492 PCI: 00:1c.4: enabled 0
974 13:43:00.472738 PCI: 00:1c.5: enabled 0
975 13:43:00.473195 PCI: 00:1c.6: enabled 0
976 13:43:00.475492 PCI: 00:1c.7: enabled 0
977 13:43:00.479394 PCI: 00:1d.0: enabled 0
978 13:43:00.479852 PCI: 00:1d.1: enabled 0
979 13:43:00.482689 PCI: 00:1d.2: enabled 0
980 13:43:00.485595 PCI: 00:1d.3: enabled 0
981 13:43:00.488837 PCI: 00:1e.0: enabled 1
982 13:43:00.489185 PCI: 00:1e.1: enabled 0
983 13:43:00.492781 PCI: 00:1e.2: enabled 0
984 13:43:00.495692 PCI: 00:1e.3: enabled 1
985 13:43:00.499193 PCI: 00:1f.0: enabled 1
986 13:43:00.499543 PCI: 00:1f.1: enabled 0
987 13:43:00.502091 PCI: 00:1f.2: enabled 1
988 13:43:00.505283 PCI: 00:1f.3: enabled 1
989 13:43:00.508471 PCI: 00:1f.4: enabled 0
990 13:43:00.508565 PCI: 00:1f.5: enabled 1
991 13:43:00.511464 PCI: 00:1f.6: enabled 0
992 13:43:00.514991 PCI: 00:1f.7: enabled 0
993 13:43:00.515052 GENERIC: 0.0: enabled 1
994 13:43:00.518494 GENERIC: 0.0: enabled 1
995 13:43:00.521580 GENERIC: 1.0: enabled 1
996 13:43:00.525276 GENERIC: 0.0: enabled 1
997 13:43:00.525331 GENERIC: 1.0: enabled 1
998 13:43:00.528194 USB0 port 0: enabled 1
999 13:43:00.531488 USB0 port 0: enabled 1
1000 13:43:00.534741 GENERIC: 0.0: enabled 1
1001 13:43:00.534804 I2C: 00:1a: enabled 1
1002 13:43:00.538469 I2C: 00:31: enabled 1
1003 13:43:00.541492 I2C: 00:32: enabled 1
1004 13:43:00.541559 I2C: 00:50: enabled 1
1005 13:43:00.544840 I2C: 00:10: enabled 1
1006 13:43:00.548295 I2C: 00:15: enabled 1
1007 13:43:00.548361 I2C: 00:2c: enabled 1
1008 13:43:00.551707 GENERIC: 0.0: enabled 1
1009 13:43:00.555102 SPI: 00: enabled 1
1010 13:43:00.555161 PNP: 0c09.0: enabled 1
1011 13:43:00.558179 GENERIC: 0.0: enabled 1
1012 13:43:00.561703 USB3 port 0: enabled 1
1013 13:43:00.561781 USB3 port 1: enabled 0
1014 13:43:00.564989 USB3 port 2: enabled 1
1015 13:43:00.568416 USB3 port 3: enabled 0
1016 13:43:00.571736 USB2 port 0: enabled 1
1017 13:43:00.571811 USB2 port 1: enabled 0
1018 13:43:00.575448 USB2 port 2: enabled 1
1019 13:43:00.578414 USB2 port 3: enabled 0
1020 13:43:00.578741 USB2 port 4: enabled 0
1021 13:43:00.581831 USB2 port 5: enabled 1
1022 13:43:00.584968 USB2 port 6: enabled 0
1023 13:43:00.588283 USB2 port 7: enabled 0
1024 13:43:00.588649 USB2 port 8: enabled 1
1025 13:43:00.591896 USB2 port 9: enabled 1
1026 13:43:00.595814 USB3 port 0: enabled 1
1027 13:43:00.596268 USB3 port 1: enabled 0
1028 13:43:00.598620 USB3 port 2: enabled 0
1029 13:43:00.602010 USB3 port 3: enabled 0
1030 13:43:00.605136 GENERIC: 0.0: enabled 1
1031 13:43:00.605520 GENERIC: 1.0: enabled 1
1032 13:43:00.608995 APIC: 00: enabled 1
1033 13:43:00.609486 APIC: 12: enabled 1
1034 13:43:00.612004 APIC: 14: enabled 1
1035 13:43:00.615599 APIC: 16: enabled 1
1036 13:43:00.615948 APIC: 10: enabled 1
1037 13:43:00.618594 APIC: 09: enabled 1
1038 13:43:00.621770 APIC: 01: enabled 1
1039 13:43:00.622122 APIC: 08: enabled 1
1040 13:43:00.625162 Compare with tree...
1041 13:43:00.628615 Root Device: enabled 1
1042 13:43:00.629031 CPU_CLUSTER: 0: enabled 1
1043 13:43:00.632036 APIC: 00: enabled 1
1044 13:43:00.635507 APIC: 12: enabled 1
1045 13:43:00.635863 APIC: 14: enabled 1
1046 13:43:00.638173 APIC: 16: enabled 1
1047 13:43:00.641841 APIC: 10: enabled 1
1048 13:43:00.642188 APIC: 09: enabled 1
1049 13:43:00.644844 APIC: 01: enabled 1
1050 13:43:00.648702 APIC: 08: enabled 1
1051 13:43:00.651682 DOMAIN: 0000: enabled 1
1052 13:43:00.652036 GPIO: 0: enabled 1
1053 13:43:00.655487 PCI: 00:00.0: enabled 1
1054 13:43:00.658769 PCI: 00:01.0: enabled 0
1055 13:43:00.662007 PCI: 00:01.1: enabled 0
1056 13:43:00.662453 PCI: 00:02.0: enabled 1
1057 13:43:00.665300 PCI: 00:04.0: enabled 1
1058 13:43:00.668309 GENERIC: 0.0: enabled 1
1059 13:43:00.671802 PCI: 00:05.0: enabled 0
1060 13:43:00.675356 PCI: 00:06.0: enabled 1
1061 13:43:00.675806 PCI: 00:06.2: enabled 0
1062 13:43:00.678399 PCI: 00:08.0: enabled 0
1063 13:43:00.682039 PCI: 00:09.0: enabled 0
1064 13:43:00.685232 PCI: 00:0a.0: enabled 1
1065 13:43:00.688165 PCI: 00:0d.0: enabled 1
1066 13:43:00.688578 USB0 port 0: enabled 1
1067 13:43:00.691591 USB3 port 0: enabled 1
1068 13:43:00.695185 USB3 port 1: enabled 0
1069 13:43:00.698194 USB3 port 2: enabled 1
1070 13:43:00.701637 USB3 port 3: enabled 0
1071 13:43:00.702091 PCI: 00:0d.1: enabled 0
1072 13:43:00.705110 PCI: 00:0d.2: enabled 0
1073 13:43:00.708473 PCI: 00:0d.3: enabled 0
1074 13:43:00.711885 PCI: 00:0e.0: enabled 0
1075 13:43:00.714854 PCI: 00:10.0: enabled 0
1076 13:43:00.715216 PCI: 00:10.1: enabled 0
1077 13:43:00.718281 PCI: 00:10.6: enabled 0
1078 13:43:00.721281 PCI: 00:10.7: enabled 0
1079 13:43:00.724878 PCI: 00:12.0: enabled 0
1080 13:43:00.728324 PCI: 00:12.6: enabled 0
1081 13:43:00.728775 PCI: 00:12.7: enabled 0
1082 13:43:00.731743 PCI: 00:13.0: enabled 0
1083 13:43:00.735151 PCI: 00:14.0: enabled 1
1084 13:43:00.738492 USB0 port 0: enabled 1
1085 13:43:00.741711 USB2 port 0: enabled 1
1086 13:43:00.742207 USB2 port 1: enabled 0
1087 13:43:00.745148 USB2 port 2: enabled 1
1088 13:43:00.748463 USB2 port 3: enabled 0
1089 13:43:00.751597 USB2 port 4: enabled 0
1090 13:43:00.755169 USB2 port 5: enabled 1
1091 13:43:00.755664 USB2 port 6: enabled 0
1092 13:43:00.758072 USB2 port 7: enabled 0
1093 13:43:00.761936 USB2 port 8: enabled 1
1094 13:43:00.765119 USB2 port 9: enabled 1
1095 13:43:00.768362 USB3 port 0: enabled 1
1096 13:43:00.771319 USB3 port 1: enabled 0
1097 13:43:00.771689 USB3 port 2: enabled 0
1098 13:43:00.774805 USB3 port 3: enabled 0
1099 13:43:00.778173 PCI: 00:14.1: enabled 0
1100 13:43:00.781773 PCI: 00:14.2: enabled 1
1101 13:43:00.784870 PCI: 00:14.3: enabled 1
1102 13:43:00.785347 GENERIC: 0.0: enabled 1
1103 13:43:00.788465 PCI: 00:15.0: enabled 1
1104 13:43:00.791381 I2C: 00:1a: enabled 1
1105 13:43:00.794466 I2C: 00:31: enabled 1
1106 13:43:00.798369 I2C: 00:32: enabled 1
1107 13:43:00.798855 PCI: 00:15.1: enabled 1
1108 13:43:00.801306 I2C: 00:50: enabled 1
1109 13:43:00.804373 PCI: 00:15.2: enabled 0
1110 13:43:00.807955 PCI: 00:15.3: enabled 1
1111 13:43:00.808411 I2C: 00:10: enabled 1
1112 13:43:00.811394 PCI: 00:16.0: enabled 1
1113 13:43:00.814645 PCI: 00:16.1: enabled 0
1114 13:43:00.817849 PCI: 00:16.2: enabled 0
1115 13:43:00.821112 PCI: 00:16.3: enabled 0
1116 13:43:00.821437 PCI: 00:16.4: enabled 0
1117 13:43:00.824692 PCI: 00:16.5: enabled 0
1118 13:43:00.828581 PCI: 00:17.0: enabled 1
1119 13:43:00.831420 PCI: 00:19.0: enabled 0
1120 13:43:00.834966 PCI: 00:19.1: enabled 1
1121 13:43:00.835420 I2C: 00:15: enabled 1
1122 13:43:00.837848 I2C: 00:2c: enabled 1
1123 13:43:00.841059 PCI: 00:19.2: enabled 0
1124 13:43:00.844663 PCI: 00:1a.0: enabled 0
1125 13:43:00.845145 PCI: 00:1e.0: enabled 1
1126 13:43:00.848982 PCI: 00:1e.1: enabled 0
1127 13:43:00.851745 PCI: 00:1e.2: enabled 0
1128 13:43:00.854653 PCI: 00:1e.3: enabled 1
1129 13:43:00.858219 SPI: 00: enabled 1
1130 13:43:00.858704 PCI: 00:1f.0: enabled 1
1131 13:43:00.860887 PNP: 0c09.0: enabled 1
1132 13:43:00.864500 PCI: 00:1f.1: enabled 0
1133 13:43:00.868191 PCI: 00:1f.2: enabled 1
1134 13:43:00.871207 GENERIC: 0.0: enabled 1
1135 13:43:00.871684 GENERIC: 0.0: enabled 1
1136 13:43:00.874549 GENERIC: 1.0: enabled 1
1137 13:43:00.877848 PCI: 00:1f.3: enabled 1
1138 13:43:00.881178 PCI: 00:1f.4: enabled 0
1139 13:43:00.884447 PCI: 00:1f.5: enabled 1
1140 13:43:00.884796 PCI: 00:1f.6: enabled 0
1141 13:43:00.887701 PCI: 00:1f.7: enabled 0
1142 13:43:00.890809 Root Device scanning...
1143 13:43:00.894250 scan_static_bus for Root Device
1144 13:43:00.897448 CPU_CLUSTER: 0 enabled
1145 13:43:00.897748 DOMAIN: 0000 enabled
1146 13:43:00.901027 DOMAIN: 0000 scanning...
1147 13:43:00.904243 PCI: pci_scan_bus for bus 00
1148 13:43:00.907640 PCI: 00:00.0 [8086/0000] ops
1149 13:43:00.911581 PCI: 00:00.0 [8086/4609] enabled
1150 13:43:00.914527 PCI: 00:02.0 [8086/0000] bus ops
1151 13:43:00.917605 PCI: 00:02.0 [8086/46b3] enabled
1152 13:43:00.921051 PCI: 00:04.0 [8086/0000] bus ops
1153 13:43:00.924430 PCI: 00:04.0 [8086/461d] enabled
1154 13:43:00.927653 PCI: 00:06.0 [8086/0000] bus ops
1155 13:43:00.931206 PCI: 00:06.0 [8086/464d] enabled
1156 13:43:00.934363 PCI: 00:08.0 [8086/464f] disabled
1157 13:43:00.937284 PCI: 00:0a.0 [8086/467d] enabled
1158 13:43:00.940537 PCI: 00:0d.0 [8086/0000] bus ops
1159 13:43:00.944455 PCI: 00:0d.0 [8086/461e] enabled
1160 13:43:00.947680 PCI: 00:14.0 [8086/0000] bus ops
1161 13:43:00.950618 PCI: 00:14.0 [8086/51ed] enabled
1162 13:43:00.954134 PCI: 00:14.2 [8086/51ef] enabled
1163 13:43:00.957792 PCI: 00:14.3 [8086/0000] bus ops
1164 13:43:00.960776 PCI: 00:14.3 [8086/51f0] enabled
1165 13:43:00.964750 PCI: 00:15.0 [8086/0000] bus ops
1166 13:43:00.967581 PCI: 00:15.0 [8086/51e8] enabled
1167 13:43:00.970935 PCI: 00:15.1 [8086/0000] bus ops
1168 13:43:00.974387 PCI: 00:15.1 [8086/51e9] enabled
1169 13:43:00.977054 PCI: 00:15.2 [8086/0000] bus ops
1170 13:43:00.980594 PCI: 00:15.2 [8086/51ea] disabled
1171 13:43:00.984290 PCI: 00:15.3 [8086/0000] bus ops
1172 13:43:00.987971 PCI: 00:15.3 [8086/51eb] enabled
1173 13:43:00.990929 PCI: 00:16.0 [8086/0000] ops
1174 13:43:00.994312 PCI: 00:16.0 [8086/51e0] enabled
1175 13:43:01.000421 PCI: Static device PCI: 00:17.0 not found, disabling it.
1176 13:43:01.003832 PCI: 00:19.0 [8086/0000] bus ops
1177 13:43:01.007513 PCI: 00:19.0 [8086/51c5] disabled
1178 13:43:01.011027 PCI: 00:19.1 [8086/0000] bus ops
1179 13:43:01.014283 PCI: 00:19.1 [8086/51c6] enabled
1180 13:43:01.017193 PCI: 00:1e.0 [8086/0000] ops
1181 13:43:01.020923 PCI: 00:1e.0 [8086/51a8] enabled
1182 13:43:01.024187 PCI: 00:1e.3 [8086/0000] bus ops
1183 13:43:01.027627 PCI: 00:1e.3 [8086/51ab] enabled
1184 13:43:01.031009 PCI: 00:1f.0 [8086/0000] bus ops
1185 13:43:01.033842 PCI: 00:1f.0 [8086/5182] enabled
1186 13:43:01.034187 RTC Init
1187 13:43:01.037114 Set power on after power failure.
1188 13:43:01.040900 Disabling Deep S3
1189 13:43:01.043964 Disabling Deep S3
1190 13:43:01.044258 Disabling Deep S4
1191 13:43:01.047692 Disabling Deep S4
1192 13:43:01.048007 Disabling Deep S5
1193 13:43:01.050832 Disabling Deep S5
1194 13:43:01.054384 PCI: 00:1f.2 [0000/0000] hidden
1195 13:43:01.057440 PCI: 00:1f.3 [8086/0000] bus ops
1196 13:43:01.061054 PCI: 00:1f.3 [8086/51c8] enabled
1197 13:43:01.064569 PCI: 00:1f.5 [8086/0000] bus ops
1198 13:43:01.067705 PCI: 00:1f.5 [8086/51a4] enabled
1199 13:43:01.068074 GPIO: 0 enabled
1200 13:43:01.071360 PCI: Leftover static devices:
1201 13:43:01.074364 PCI: 00:01.0
1202 13:43:01.074718 PCI: 00:01.1
1203 13:43:01.074972 PCI: 00:05.0
1204 13:43:01.077411 PCI: 00:06.2
1205 13:43:01.077692 PCI: 00:09.0
1206 13:43:01.080969 PCI: 00:0d.1
1207 13:43:01.081475 PCI: 00:0d.2
1208 13:43:01.084589 PCI: 00:0d.3
1209 13:43:01.085027 PCI: 00:0e.0
1210 13:43:01.085299 PCI: 00:10.0
1211 13:43:01.087442 PCI: 00:10.1
1212 13:43:01.087721 PCI: 00:10.6
1213 13:43:01.090830 PCI: 00:10.7
1214 13:43:01.091193 PCI: 00:12.0
1215 13:43:01.091460 PCI: 00:12.6
1216 13:43:01.094604 PCI: 00:12.7
1217 13:43:01.094952 PCI: 00:13.0
1218 13:43:01.097590 PCI: 00:14.1
1219 13:43:01.097940 PCI: 00:16.1
1220 13:43:01.098186 PCI: 00:16.2
1221 13:43:01.100692 PCI: 00:16.3
1222 13:43:01.100942 PCI: 00:16.4
1223 13:43:01.104497 PCI: 00:16.5
1224 13:43:01.104843 PCI: 00:17.0
1225 13:43:01.105086 PCI: 00:19.2
1226 13:43:01.107723 PCI: 00:1a.0
1227 13:43:01.108168 PCI: 00:1e.1
1228 13:43:01.110658 PCI: 00:1e.2
1229 13:43:01.111004 PCI: 00:1f.1
1230 13:43:01.114467 PCI: 00:1f.4
1231 13:43:01.114785 PCI: 00:1f.6
1232 13:43:01.115009 PCI: 00:1f.7
1233 13:43:01.117176 PCI: Check your devicetree.cb.
1234 13:43:01.120735 PCI: 00:02.0 scanning...
1235 13:43:01.124627 scan_generic_bus for PCI: 00:02.0
1236 13:43:01.127995 scan_generic_bus for PCI: 00:02.0 done
1237 13:43:01.134099 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1238 13:43:01.137313 PCI: 00:04.0 scanning...
1239 13:43:01.140555 scan_generic_bus for PCI: 00:04.0
1240 13:43:01.140900 GENERIC: 0.0 enabled
1241 13:43:01.147351 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1242 13:43:01.150644 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1243 13:43:01.153987 PCI: 00:06.0 scanning...
1244 13:43:01.157337 do_pci_scan_bridge for PCI: 00:06.0
1245 13:43:01.161014 PCI: pci_scan_bus for bus 01
1246 13:43:01.163971 PCI: 01:00.0 [15b7/5009] enabled
1247 13:43:01.167731 Enabling Common Clock Configuration
1248 13:43:01.173749 L1 Sub-State supported from root port 6
1249 13:43:01.174162 L1 Sub-State Support = 0x5
1250 13:43:01.177510 CommonModeRestoreTime = 0x6e
1251 13:43:01.183807 Power On Value = 0x5, Power On Scale = 0x2
1252 13:43:01.184257 ASPM: Enabled L1
1253 13:43:01.186951 PCIe: Max_Payload_Size adjusted to 256
1254 13:43:01.190422 PCI: 01:00.0: Enabled LTR
1255 13:43:01.193888 PCI: 01:00.0: Programmed LTR max latencies
1256 13:43:01.200319 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1257 13:43:01.203866 PCI: 00:0d.0 scanning...
1258 13:43:01.207494 scan_static_bus for PCI: 00:0d.0
1259 13:43:01.207851 USB0 port 0 enabled
1260 13:43:01.210340 USB0 port 0 scanning...
1261 13:43:01.213662 scan_static_bus for USB0 port 0
1262 13:43:01.214012 USB3 port 0 enabled
1263 13:43:01.217435 USB3 port 1 disabled
1264 13:43:01.220463 USB3 port 2 enabled
1265 13:43:01.220811 USB3 port 3 disabled
1266 13:43:01.223863 USB3 port 0 scanning...
1267 13:43:01.227516 scan_static_bus for USB3 port 0
1268 13:43:01.230726 scan_static_bus for USB3 port 0 done
1269 13:43:01.237452 scan_bus: bus USB3 port 0 finished in 6 msecs
1270 13:43:01.237941 USB3 port 2 scanning...
1271 13:43:01.240772 scan_static_bus for USB3 port 2
1272 13:43:01.244174 scan_static_bus for USB3 port 2 done
1273 13:43:01.250718 scan_bus: bus USB3 port 2 finished in 6 msecs
1274 13:43:01.253721 scan_static_bus for USB0 port 0 done
1275 13:43:01.257179 scan_bus: bus USB0 port 0 finished in 43 msecs
1276 13:43:01.260661 scan_static_bus for PCI: 00:0d.0 done
1277 13:43:01.267252 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1278 13:43:01.270662 PCI: 00:14.0 scanning...
1279 13:43:01.273692 scan_static_bus for PCI: 00:14.0
1280 13:43:01.274044 USB0 port 0 enabled
1281 13:43:01.277432 USB0 port 0 scanning...
1282 13:43:01.281074 scan_static_bus for USB0 port 0
1283 13:43:01.283876 USB2 port 0 enabled
1284 13:43:01.284388 USB2 port 1 disabled
1285 13:43:01.287378 USB2 port 2 enabled
1286 13:43:01.287894 USB2 port 3 disabled
1287 13:43:01.290455 USB2 port 4 disabled
1288 13:43:01.294046 USB2 port 5 enabled
1289 13:43:01.294531 USB2 port 6 disabled
1290 13:43:01.296910 USB2 port 7 disabled
1291 13:43:01.300568 USB2 port 8 enabled
1292 13:43:01.301050 USB2 port 9 enabled
1293 13:43:01.303888 USB3 port 0 enabled
1294 13:43:01.306926 USB3 port 1 disabled
1295 13:43:01.307316 USB3 port 2 disabled
1296 13:43:01.310426 USB3 port 3 disabled
1297 13:43:01.313494 USB2 port 0 scanning...
1298 13:43:01.316997 scan_static_bus for USB2 port 0
1299 13:43:01.320345 scan_static_bus for USB2 port 0 done
1300 13:43:01.323407 scan_bus: bus USB2 port 0 finished in 6 msecs
1301 13:43:01.326838 USB2 port 2 scanning...
1302 13:43:01.330012 scan_static_bus for USB2 port 2
1303 13:43:01.333689 scan_static_bus for USB2 port 2 done
1304 13:43:01.336712 scan_bus: bus USB2 port 2 finished in 6 msecs
1305 13:43:01.340239 USB2 port 5 scanning...
1306 13:43:01.343220 scan_static_bus for USB2 port 5
1307 13:43:01.346529 scan_static_bus for USB2 port 5 done
1308 13:43:01.350015 scan_bus: bus USB2 port 5 finished in 6 msecs
1309 13:43:01.353681 USB2 port 8 scanning...
1310 13:43:01.356884 scan_static_bus for USB2 port 8
1311 13:43:01.360298 scan_static_bus for USB2 port 8 done
1312 13:43:01.367003 scan_bus: bus USB2 port 8 finished in 6 msecs
1313 13:43:01.367457 USB2 port 9 scanning...
1314 13:43:01.370179 scan_static_bus for USB2 port 9
1315 13:43:01.373318 scan_static_bus for USB2 port 9 done
1316 13:43:01.379801 scan_bus: bus USB2 port 9 finished in 6 msecs
1317 13:43:01.383426 USB3 port 0 scanning...
1318 13:43:01.386766 scan_static_bus for USB3 port 0
1319 13:43:01.390248 scan_static_bus for USB3 port 0 done
1320 13:43:01.393418 scan_bus: bus USB3 port 0 finished in 6 msecs
1321 13:43:01.396660 scan_static_bus for USB0 port 0 done
1322 13:43:01.403479 scan_bus: bus USB0 port 0 finished in 120 msecs
1323 13:43:01.406905 scan_static_bus for PCI: 00:14.0 done
1324 13:43:01.409880 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1325 13:43:01.413291 PCI: 00:14.3 scanning...
1326 13:43:01.416699 scan_static_bus for PCI: 00:14.3
1327 13:43:01.420263 GENERIC: 0.0 enabled
1328 13:43:01.422927 scan_static_bus for PCI: 00:14.3 done
1329 13:43:01.426850 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1330 13:43:01.430120 PCI: 00:15.0 scanning...
1331 13:43:01.433228 scan_static_bus for PCI: 00:15.0
1332 13:43:01.436456 I2C: 00:1a enabled
1333 13:43:01.436936 I2C: 00:31 enabled
1334 13:43:01.439453 I2C: 00:32 enabled
1335 13:43:01.442856 scan_static_bus for PCI: 00:15.0 done
1336 13:43:01.446650 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1337 13:43:01.449619 PCI: 00:15.1 scanning...
1338 13:43:01.453160 scan_static_bus for PCI: 00:15.1
1339 13:43:01.456781 I2C: 00:50 enabled
1340 13:43:01.459854 scan_static_bus for PCI: 00:15.1 done
1341 13:43:01.463354 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1342 13:43:01.466699 PCI: 00:15.3 scanning...
1343 13:43:01.469876 scan_static_bus for PCI: 00:15.3
1344 13:43:01.473186 I2C: 00:10 enabled
1345 13:43:01.476680 scan_static_bus for PCI: 00:15.3 done
1346 13:43:01.479881 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1347 13:43:01.483192 PCI: 00:19.1 scanning...
1348 13:43:01.486590 scan_static_bus for PCI: 00:19.1
1349 13:43:01.489427 I2C: 00:15 enabled
1350 13:43:01.489881 I2C: 00:2c enabled
1351 13:43:01.492587 scan_static_bus for PCI: 00:19.1 done
1352 13:43:01.499677 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1353 13:43:01.500049 PCI: 00:1e.3 scanning...
1354 13:43:01.502671 scan_generic_bus for PCI: 00:1e.3
1355 13:43:01.506083 SPI: 00 enabled
1356 13:43:01.512693 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1357 13:43:01.516524 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1358 13:43:01.519471 PCI: 00:1f.0 scanning...
1359 13:43:01.522673 scan_static_bus for PCI: 00:1f.0
1360 13:43:01.526258 PNP: 0c09.0 enabled
1361 13:43:01.526737 PNP: 0c09.0 scanning...
1362 13:43:01.529474 scan_static_bus for PNP: 0c09.0
1363 13:43:01.532824 scan_static_bus for PNP: 0c09.0 done
1364 13:43:01.539718 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1365 13:43:01.542982 scan_static_bus for PCI: 00:1f.0 done
1366 13:43:01.546358 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1367 13:43:01.549615 PCI: 00:1f.2 scanning...
1368 13:43:01.552522 scan_static_bus for PCI: 00:1f.2
1369 13:43:01.556205 GENERIC: 0.0 enabled
1370 13:43:01.559236 GENERIC: 0.0 scanning...
1371 13:43:01.562610 scan_static_bus for GENERIC: 0.0
1372 13:43:01.562959 GENERIC: 0.0 enabled
1373 13:43:01.565959 GENERIC: 1.0 enabled
1374 13:43:01.569216 scan_static_bus for GENERIC: 0.0 done
1375 13:43:01.572627 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1376 13:43:01.579167 scan_static_bus for PCI: 00:1f.2 done
1377 13:43:01.582361 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1378 13:43:01.586039 PCI: 00:1f.3 scanning...
1379 13:43:01.588924 scan_static_bus for PCI: 00:1f.3
1380 13:43:01.592380 scan_static_bus for PCI: 00:1f.3 done
1381 13:43:01.596207 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1382 13:43:01.599671 PCI: 00:1f.5 scanning...
1383 13:43:01.602639 scan_generic_bus for PCI: 00:1f.5
1384 13:43:01.606099 scan_generic_bus for PCI: 00:1f.5 done
1385 13:43:01.612754 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1386 13:43:01.615886 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1387 13:43:01.619170 scan_static_bus for Root Device done
1388 13:43:01.625884 scan_bus: bus Root Device finished in 729 msecs
1389 13:43:01.626231 done
1390 13:43:01.632560 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1391 13:43:01.635908 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1392 13:43:01.642941 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1393 13:43:01.645915 SPI flash protection: WPSW=0 SRP0=0
1394 13:43:01.652533 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1395 13:43:01.659031 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1396 13:43:01.659462 found VGA at PCI: 00:02.0
1397 13:43:01.662687 Setting up VGA for PCI: 00:02.0
1398 13:43:01.668823 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1399 13:43:01.672685 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1400 13:43:01.675976 Allocating resources...
1401 13:43:01.679197 Reading resources...
1402 13:43:01.682510 Root Device read_resources bus 0 link: 0
1403 13:43:01.685724 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1404 13:43:01.692124 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1405 13:43:01.695713 DOMAIN: 0000 read_resources bus 0 link: 0
1406 13:43:01.702605 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1407 13:43:01.708823 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1408 13:43:01.715571 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1409 13:43:01.722092 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1410 13:43:01.726051 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1411 13:43:01.732290 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1412 13:43:01.739103 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1413 13:43:01.745893 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1414 13:43:01.752134 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1415 13:43:01.759284 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1416 13:43:01.765375 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1417 13:43:01.772405 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1418 13:43:01.778969 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1419 13:43:01.785501 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1420 13:43:01.791705 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1421 13:43:01.798664 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1422 13:43:01.801851 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1423 13:43:01.808696 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1424 13:43:01.815475 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1425 13:43:01.821931 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1426 13:43:01.828680 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1427 13:43:01.832194 PCI: 00:04.0 read_resources bus 1 link: 0
1428 13:43:01.838478 PCI: 00:04.0 read_resources bus 1 link: 0 done
1429 13:43:01.841930 PCI: 00:06.0 read_resources bus 1 link: 0
1430 13:43:01.845558 PCI: 00:06.0 read_resources bus 1 link: 0 done
1431 13:43:01.852422 PCI: 00:0d.0 read_resources bus 0 link: 0
1432 13:43:01.855397 USB0 port 0 read_resources bus 0 link: 0
1433 13:43:01.858812 USB0 port 0 read_resources bus 0 link: 0 done
1434 13:43:01.865429 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1435 13:43:01.868947 PCI: 00:14.0 read_resources bus 0 link: 0
1436 13:43:01.871934 USB0 port 0 read_resources bus 0 link: 0
1437 13:43:01.878844 USB0 port 0 read_resources bus 0 link: 0 done
1438 13:43:01.881732 PCI: 00:14.0 read_resources bus 0 link: 0 done
1439 13:43:01.885327 PCI: 00:14.3 read_resources bus 0 link: 0
1440 13:43:01.891949 PCI: 00:14.3 read_resources bus 0 link: 0 done
1441 13:43:01.895053 PCI: 00:15.0 read_resources bus 0 link: 0
1442 13:43:01.898423 PCI: 00:15.0 read_resources bus 0 link: 0 done
1443 13:43:01.905112 PCI: 00:15.1 read_resources bus 0 link: 0
1444 13:43:01.908491 PCI: 00:15.1 read_resources bus 0 link: 0 done
1445 13:43:01.911929 PCI: 00:15.3 read_resources bus 0 link: 0
1446 13:43:01.918403 PCI: 00:15.3 read_resources bus 0 link: 0 done
1447 13:43:01.921835 PCI: 00:19.1 read_resources bus 0 link: 0
1448 13:43:01.925244 PCI: 00:19.1 read_resources bus 0 link: 0 done
1449 13:43:01.932237 PCI: 00:1e.3 read_resources bus 2 link: 0
1450 13:43:01.935519 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1451 13:43:01.938869 PCI: 00:1f.0 read_resources bus 0 link: 0
1452 13:43:01.945717 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1453 13:43:01.948674 PCI: 00:1f.2 read_resources bus 0 link: 0
1454 13:43:01.952486 GENERIC: 0.0 read_resources bus 0 link: 0
1455 13:43:01.959025 GENERIC: 0.0 read_resources bus 0 link: 0 done
1456 13:43:01.961978 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1457 13:43:01.968700 DOMAIN: 0000 read_resources bus 0 link: 0 done
1458 13:43:01.972257 Root Device read_resources bus 0 link: 0 done
1459 13:43:01.975741 Done reading resources.
1460 13:43:01.982307 Show resources in subtree (Root Device)...After reading.
1461 13:43:01.985635 Root Device child on link 0 CPU_CLUSTER: 0
1462 13:43:01.988684 CPU_CLUSTER: 0 child on link 0 APIC: 00
1463 13:43:01.989087 APIC: 00
1464 13:43:01.992153 APIC: 12
1465 13:43:01.992500 APIC: 14
1466 13:43:01.995496 APIC: 16
1467 13:43:01.995873 APIC: 10
1468 13:43:01.996141 APIC: 09
1469 13:43:01.998621 APIC: 01
1470 13:43:01.998975 APIC: 08
1471 13:43:02.002323 DOMAIN: 0000 child on link 0 GPIO: 0
1472 13:43:02.012437 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1473 13:43:02.022102 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1474 13:43:02.022543 GPIO: 0
1475 13:43:02.025298 PCI: 00:00.0
1476 13:43:02.035386 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1477 13:43:02.045552 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1478 13:43:02.052560 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1479 13:43:02.062052 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1480 13:43:02.072121 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1481 13:43:02.081736 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1482 13:43:02.091983 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1483 13:43:02.102128 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1484 13:43:02.108235 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1485 13:43:02.118194 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1486 13:43:02.128474 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1487 13:43:02.138306 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1488 13:43:02.147846 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1489 13:43:02.158310 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1490 13:43:02.168303 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1491 13:43:02.174816 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1492 13:43:02.185131 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1493 13:43:02.194660 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1494 13:43:02.204223 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1495 13:43:02.214386 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1496 13:43:02.224210 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1497 13:43:02.234825 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1498 13:43:02.241257 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1499 13:43:02.251811 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1500 13:43:02.261266 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1501 13:43:02.271141 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1502 13:43:02.281629 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1503 13:43:02.291277 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1504 13:43:02.291755 PCI: 00:02.0
1505 13:43:02.301018 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1506 13:43:02.314334 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1507 13:43:02.321062 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1508 13:43:02.323993 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1509 13:43:02.334673 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1510 13:43:02.337508 GENERIC: 0.0
1511 13:43:02.340974 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1512 13:43:02.350523 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1513 13:43:02.361188 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1514 13:43:02.370969 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1515 13:43:02.371488 PCI: 01:00.0
1516 13:43:02.380813 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1517 13:43:02.390653 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1518 13:43:02.393983 PCI: 00:08.0
1519 13:43:02.394467 PCI: 00:0a.0
1520 13:43:02.403756 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1521 13:43:02.410838 PCI: 00:0d.0 child on link 0 USB0 port 0
1522 13:43:02.420445 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1523 13:43:02.424051 USB0 port 0 child on link 0 USB3 port 0
1524 13:43:02.424519 USB3 port 0
1525 13:43:02.427529 USB3 port 1
1526 13:43:02.430490 USB3 port 2
1527 13:43:02.430929 USB3 port 3
1528 13:43:02.433716 PCI: 00:14.0 child on link 0 USB0 port 0
1529 13:43:02.443711 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1530 13:43:02.450346 USB0 port 0 child on link 0 USB2 port 0
1531 13:43:02.450690 USB2 port 0
1532 13:43:02.453801 USB2 port 1
1533 13:43:02.454222 USB2 port 2
1534 13:43:02.457262 USB2 port 3
1535 13:43:02.457722 USB2 port 4
1536 13:43:02.460261 USB2 port 5
1537 13:43:02.460678 USB2 port 6
1538 13:43:02.463818 USB2 port 7
1539 13:43:02.464238 USB2 port 8
1540 13:43:02.466819 USB2 port 9
1541 13:43:02.470636 USB3 port 0
1542 13:43:02.471045 USB3 port 1
1543 13:43:02.473709 USB3 port 2
1544 13:43:02.474123 USB3 port 3
1545 13:43:02.476953 PCI: 00:14.2
1546 13:43:02.486953 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1547 13:43:02.496752 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1548 13:43:02.500446 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1549 13:43:02.510652 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1550 13:43:02.513546 GENERIC: 0.0
1551 13:43:02.516844 PCI: 00:15.0 child on link 0 I2C: 00:1a
1552 13:43:02.527250 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1553 13:43:02.527749 I2C: 00:1a
1554 13:43:02.530306 I2C: 00:31
1555 13:43:02.530691 I2C: 00:32
1556 13:43:02.537090 PCI: 00:15.1 child on link 0 I2C: 00:50
1557 13:43:02.547024 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1558 13:43:02.547500 I2C: 00:50
1559 13:43:02.547783 PCI: 00:15.2
1560 13:43:02.553877 PCI: 00:15.3 child on link 0 I2C: 00:10
1561 13:43:02.563770 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1562 13:43:02.564264 I2C: 00:10
1563 13:43:02.566959 PCI: 00:16.0
1564 13:43:02.576830 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1565 13:43:02.577310 PCI: 00:19.0
1566 13:43:02.580181 PCI: 00:19.1 child on link 0 I2C: 00:15
1567 13:43:02.590384 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1568 13:43:02.593778 I2C: 00:15
1569 13:43:02.594278 I2C: 00:2c
1570 13:43:02.596950 PCI: 00:1e.0
1571 13:43:02.607043 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1572 13:43:02.610364 PCI: 00:1e.3 child on link 0 SPI: 00
1573 13:43:02.620474 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1574 13:43:02.623872 SPI: 00
1575 13:43:02.627259 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1576 13:43:02.636643 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1577 13:43:02.637121 PNP: 0c09.0
1578 13:43:02.646936 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1579 13:43:02.650185 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1580 13:43:02.659844 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1581 13:43:02.670181 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1582 13:43:02.673554 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1583 13:43:02.677055 GENERIC: 0.0
1584 13:43:02.677567 GENERIC: 1.0
1585 13:43:02.680360 PCI: 00:1f.3
1586 13:43:02.690246 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1587 13:43:02.700172 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1588 13:43:02.700648 PCI: 00:1f.5
1589 13:43:02.710029 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1590 13:43:02.716476 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1591 13:43:02.723068 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1592 13:43:02.729747 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1593 13:43:02.736559 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1594 13:43:02.739983 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1595 13:43:02.742879 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1596 13:43:02.752630 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1597 13:43:02.759366 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1598 13:43:02.766322 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1599 13:43:02.772852 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1600 13:43:02.779676 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1601 13:43:02.785716 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1602 13:43:02.795873 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1603 13:43:02.802520 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1604 13:43:02.805749 DOMAIN: 0000: Resource ranges:
1605 13:43:02.809347 * Base: 1000, Size: 800, Tag: 100
1606 13:43:02.812760 * Base: 1900, Size: e700, Tag: 100
1607 13:43:02.819503 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1608 13:43:02.825835 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1609 13:43:02.832716 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1610 13:43:02.840699 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1611 13:43:02.846023 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1612 13:43:02.856248 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1613 13:43:02.862354 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1614 13:43:02.869495 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1615 13:43:02.879439 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1616 13:43:02.885965 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1617 13:43:02.892594 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1618 13:43:02.902801 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1619 13:43:02.909488 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1620 13:43:02.916026 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1621 13:43:02.925958 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1622 13:43:02.932481 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1623 13:43:02.939003 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1624 13:43:02.945798 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1625 13:43:02.955892 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1626 13:43:02.962755 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1627 13:43:02.968988 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1628 13:43:02.978803 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1629 13:43:02.985669 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1630 13:43:02.992402 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1631 13:43:03.002381 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1632 13:43:03.008797 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1633 13:43:03.015358 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1634 13:43:03.025671 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1635 13:43:03.032279 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1636 13:43:03.038986 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1637 13:43:03.049021 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1638 13:43:03.055431 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1639 13:43:03.062408 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1640 13:43:03.065668 DOMAIN: 0000: Resource ranges:
1641 13:43:03.072000 * Base: 80400000, Size: 3fc00000, Tag: 200
1642 13:43:03.075560 * Base: d0000000, Size: 28000000, Tag: 200
1643 13:43:03.079337 * Base: fa000000, Size: 1000000, Tag: 200
1644 13:43:03.082047 * Base: fb001000, Size: 17ff000, Tag: 200
1645 13:43:03.089238 * Base: fe800000, Size: 300000, Tag: 200
1646 13:43:03.092550 * Base: feb80000, Size: 80000, Tag: 200
1647 13:43:03.095508 * Base: fed00000, Size: 40000, Tag: 200
1648 13:43:03.098549 * Base: fed70000, Size: 10000, Tag: 200
1649 13:43:03.105160 * Base: fed88000, Size: 8000, Tag: 200
1650 13:43:03.108337 * Base: fed93000, Size: d000, Tag: 200
1651 13:43:03.111998 * Base: feda2000, Size: 1e000, Tag: 200
1652 13:43:03.115199 * Base: fede0000, Size: 1220000, Tag: 200
1653 13:43:03.122115 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1654 13:43:03.128629 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1655 13:43:03.135337 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1656 13:43:03.142185 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1657 13:43:03.148480 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1658 13:43:03.155522 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1659 13:43:03.162000 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1660 13:43:03.168632 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1661 13:43:03.174980 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1662 13:43:03.181472 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1663 13:43:03.188684 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1664 13:43:03.194756 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1665 13:43:03.201600 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1666 13:43:03.208206 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1667 13:43:03.214613 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1668 13:43:03.221201 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1669 13:43:03.228389 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1670 13:43:03.234567 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1671 13:43:03.241475 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1672 13:43:03.248044 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1673 13:43:03.255568 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1674 13:43:03.264920 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1675 13:43:03.267942 PCI: 00:06.0: Resource ranges:
1676 13:43:03.271419 * Base: 80400000, Size: 100000, Tag: 200
1677 13:43:03.278121 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1678 13:43:03.284520 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1679 13:43:03.290883 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1680 13:43:03.300823 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1681 13:43:03.304083 Root Device assign_resources, bus 0 link: 0
1682 13:43:03.307291 DOMAIN: 0000 assign_resources, bus 0 link: 0
1683 13:43:03.317270 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1684 13:43:03.324141 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1685 13:43:03.330885 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1686 13:43:03.341146 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1687 13:43:03.343935 PCI: 00:04.0 assign_resources, bus 1 link: 0
1688 13:43:03.350831 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1689 13:43:03.357310 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1690 13:43:03.367370 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1691 13:43:03.377291 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1692 13:43:03.380521 PCI: 00:06.0 assign_resources, bus 1 link: 0
1693 13:43:03.390464 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1694 13:43:03.397189 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1695 13:43:03.404051 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1696 13:43:03.410677 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1697 13:43:03.417293 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1698 13:43:03.423724 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1699 13:43:03.427105 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1700 13:43:03.437166 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1701 13:43:03.440513 PCI: 00:14.0 assign_resources, bus 0 link: 0
1702 13:43:03.443490 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1703 13:43:03.453759 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1704 13:43:03.460143 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1705 13:43:03.470103 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1706 13:43:03.473262 PCI: 00:14.3 assign_resources, bus 0 link: 0
1707 13:43:03.480480 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1708 13:43:03.486899 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1709 13:43:03.490287 PCI: 00:15.0 assign_resources, bus 0 link: 0
1710 13:43:03.496914 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1711 13:43:03.503260 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1712 13:43:03.509593 PCI: 00:15.1 assign_resources, bus 0 link: 0
1713 13:43:03.513313 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1714 13:43:03.523204 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1715 13:43:03.526347 PCI: 00:15.3 assign_resources, bus 0 link: 0
1716 13:43:03.530065 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1717 13:43:03.539920 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1718 13:43:03.546441 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1719 13:43:03.552820 PCI: 00:19.1 assign_resources, bus 0 link: 0
1720 13:43:03.556482 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1721 13:43:03.567016 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1722 13:43:03.570005 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1723 13:43:03.573029 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1724 13:43:03.579780 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1725 13:43:03.582959 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1726 13:43:03.589696 LPC: Trying to open IO window from 800 size 1ff
1727 13:43:03.596540 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1728 13:43:03.602849 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1729 13:43:03.612811 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1730 13:43:03.616356 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1731 13:43:03.622959 Root Device assign_resources, bus 0 link: 0 done
1732 13:43:03.626634 Done setting resources.
1733 13:43:03.632997 Show resources in subtree (Root Device)...After assigning values.
1734 13:43:03.636435 Root Device child on link 0 CPU_CLUSTER: 0
1735 13:43:03.639424 CPU_CLUSTER: 0 child on link 0 APIC: 00
1736 13:43:03.643063 APIC: 00
1737 13:43:03.643544 APIC: 12
1738 13:43:03.643828 APIC: 14
1739 13:43:03.645875 APIC: 16
1740 13:43:03.646257 APIC: 10
1741 13:43:03.646528 APIC: 09
1742 13:43:03.649074 APIC: 01
1743 13:43:03.649477 APIC: 08
1744 13:43:03.652578 DOMAIN: 0000 child on link 0 GPIO: 0
1745 13:43:03.662882 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1746 13:43:03.672395 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1747 13:43:03.675692 GPIO: 0
1748 13:43:03.676135 PCI: 00:00.0
1749 13:43:03.685718 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1750 13:43:03.695860 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1751 13:43:03.705365 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1752 13:43:03.712394 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1753 13:43:03.722317 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1754 13:43:03.732067 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1755 13:43:03.742289 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1756 13:43:03.751749 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1757 13:43:03.761905 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1758 13:43:03.771990 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1759 13:43:03.778318 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1760 13:43:03.788668 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1761 13:43:03.798226 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1762 13:43:03.808483 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1763 13:43:03.818163 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1764 13:43:03.828138 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1765 13:43:03.834879 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1766 13:43:03.844742 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1767 13:43:03.855091 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1768 13:43:03.864827 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1769 13:43:03.874414 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1770 13:43:03.884514 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1771 13:43:03.894354 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1772 13:43:03.904583 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1773 13:43:03.914164 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1774 13:43:03.920988 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1775 13:43:03.930983 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1776 13:43:03.940790 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1777 13:43:03.944530 PCI: 00:02.0
1778 13:43:03.954469 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1779 13:43:03.964193 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1780 13:43:03.974066 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1781 13:43:03.977262 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1782 13:43:03.987764 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1783 13:43:03.990339 GENERIC: 0.0
1784 13:43:03.993781 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1785 13:43:04.003779 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1786 13:43:04.017162 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1787 13:43:04.027333 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1788 13:43:04.027796 PCI: 01:00.0
1789 13:43:04.037145 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1790 13:43:04.047196 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1791 13:43:04.050140 PCI: 00:08.0
1792 13:43:04.050495 PCI: 00:0a.0
1793 13:43:04.063566 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1794 13:43:04.067361 PCI: 00:0d.0 child on link 0 USB0 port 0
1795 13:43:04.077000 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1796 13:43:04.080017 USB0 port 0 child on link 0 USB3 port 0
1797 13:43:04.083647 USB3 port 0
1798 13:43:04.084046 USB3 port 1
1799 13:43:04.086949 USB3 port 2
1800 13:43:04.087404 USB3 port 3
1801 13:43:04.093320 PCI: 00:14.0 child on link 0 USB0 port 0
1802 13:43:04.107717 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1803 13:43:04.108414 USB0 port 0 child on link 0 USB2 port 0
1804 13:43:04.110150 USB2 port 0
1805 13:43:04.110600 USB2 port 1
1806 13:43:04.113420 USB2 port 2
1807 13:43:04.113723 USB2 port 3
1808 13:43:04.116733 USB2 port 4
1809 13:43:04.117011 USB2 port 5
1810 13:43:04.120393 USB2 port 6
1811 13:43:04.120674 USB2 port 7
1812 13:43:04.123490 USB2 port 8
1813 13:43:04.126796 USB2 port 9
1814 13:43:04.127155 USB3 port 0
1815 13:43:04.129942 USB3 port 1
1816 13:43:04.130296 USB3 port 2
1817 13:43:04.133097 USB3 port 3
1818 13:43:04.133417 PCI: 00:14.2
1819 13:43:04.143773 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1820 13:43:04.153302 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1821 13:43:04.160329 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1822 13:43:04.170248 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1823 13:43:04.170719 GENERIC: 0.0
1824 13:43:04.176867 PCI: 00:15.0 child on link 0 I2C: 00:1a
1825 13:43:04.186685 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1826 13:43:04.187156 I2C: 00:1a
1827 13:43:04.190282 I2C: 00:31
1828 13:43:04.190779 I2C: 00:32
1829 13:43:04.196728 PCI: 00:15.1 child on link 0 I2C: 00:50
1830 13:43:04.206736 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1831 13:43:04.207220 I2C: 00:50
1832 13:43:04.210145 PCI: 00:15.2
1833 13:43:04.213359 PCI: 00:15.3 child on link 0 I2C: 00:10
1834 13:43:04.223322 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1835 13:43:04.226670 I2C: 00:10
1836 13:43:04.227225 PCI: 00:16.0
1837 13:43:04.236123 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1838 13:43:04.240097 PCI: 00:19.0
1839 13:43:04.243479 PCI: 00:19.1 child on link 0 I2C: 00:15
1840 13:43:04.252761 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1841 13:43:04.256837 I2C: 00:15
1842 13:43:04.257437 I2C: 00:2c
1843 13:43:04.257801 PCI: 00:1e.0
1844 13:43:04.269991 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1845 13:43:04.273479 PCI: 00:1e.3 child on link 0 SPI: 00
1846 13:43:04.283843 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1847 13:43:04.286720 SPI: 00
1848 13:43:04.290065 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1849 13:43:04.296347 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1850 13:43:04.299993 PNP: 0c09.0
1851 13:43:04.309777 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1852 13:43:04.312996 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1853 13:43:04.322769 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1854 13:43:04.332830 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1855 13:43:04.336575 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1856 13:43:04.339642 GENERIC: 0.0
1857 13:43:04.340136 GENERIC: 1.0
1858 13:43:04.343078 PCI: 00:1f.3
1859 13:43:04.352473 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1860 13:43:04.362622 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1861 13:43:04.363017 PCI: 00:1f.5
1862 13:43:04.372564 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1863 13:43:04.376008 Done allocating resources.
1864 13:43:04.382824 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1865 13:43:04.389073 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1866 13:43:04.392648 Configure audio over I2S with MAX98373 NAU88L25B.
1867 13:43:04.397917 Enabling BT offload
1868 13:43:04.405343 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1869 13:43:04.408533 Enabling resources...
1870 13:43:04.411909 PCI: 00:00.0 subsystem <- 8086/4609
1871 13:43:04.415330 PCI: 00:00.0 cmd <- 06
1872 13:43:04.418887 PCI: 00:02.0 subsystem <- 8086/46b3
1873 13:43:04.421751 PCI: 00:02.0 cmd <- 03
1874 13:43:04.425492 PCI: 00:04.0 subsystem <- 8086/461d
1875 13:43:04.425947 PCI: 00:04.0 cmd <- 02
1876 13:43:04.428894 PCI: 00:06.0 bridge ctrl <- 0013
1877 13:43:04.431831 PCI: 00:06.0 subsystem <- 8086/464d
1878 13:43:04.434985 PCI: 00:06.0 cmd <- 106
1879 13:43:04.438747 PCI: 00:0a.0 subsystem <- 8086/467d
1880 13:43:04.442033 PCI: 00:0a.0 cmd <- 02
1881 13:43:04.445102 PCI: 00:0d.0 subsystem <- 8086/461e
1882 13:43:04.448294 PCI: 00:0d.0 cmd <- 02
1883 13:43:04.451584 PCI: 00:14.0 subsystem <- 8086/51ed
1884 13:43:04.455318 PCI: 00:14.0 cmd <- 02
1885 13:43:04.458607 PCI: 00:14.2 subsystem <- 8086/51ef
1886 13:43:04.458955 PCI: 00:14.2 cmd <- 02
1887 13:43:04.462001 PCI: 00:14.3 subsystem <- 8086/51f0
1888 13:43:04.465290 PCI: 00:14.3 cmd <- 02
1889 13:43:04.468511 PCI: 00:15.0 subsystem <- 8086/51e8
1890 13:43:04.471912 PCI: 00:15.0 cmd <- 02
1891 13:43:04.475066 PCI: 00:15.1 subsystem <- 8086/51e9
1892 13:43:04.478543 PCI: 00:15.1 cmd <- 06
1893 13:43:04.481905 PCI: 00:15.3 subsystem <- 8086/51eb
1894 13:43:04.485189 PCI: 00:15.3 cmd <- 02
1895 13:43:04.488177 PCI: 00:16.0 subsystem <- 8086/51e0
1896 13:43:04.488526 PCI: 00:16.0 cmd <- 02
1897 13:43:04.491860 PCI: 00:19.1 subsystem <- 8086/51c6
1898 13:43:04.495331 PCI: 00:19.1 cmd <- 02
1899 13:43:04.498727 PCI: 00:1e.0 subsystem <- 8086/51a8
1900 13:43:04.501941 PCI: 00:1e.0 cmd <- 06
1901 13:43:04.504941 PCI: 00:1e.3 subsystem <- 8086/51ab
1902 13:43:04.508476 PCI: 00:1e.3 cmd <- 02
1903 13:43:04.511723 PCI: 00:1f.0 subsystem <- 8086/5182
1904 13:43:04.515447 PCI: 00:1f.0 cmd <- 407
1905 13:43:04.518676 PCI: 00:1f.3 subsystem <- 8086/51c8
1906 13:43:04.519172 PCI: 00:1f.3 cmd <- 02
1907 13:43:04.522048 PCI: 00:1f.5 subsystem <- 8086/51a4
1908 13:43:04.525768 PCI: 00:1f.5 cmd <- 406
1909 13:43:04.528631 PCI: 01:00.0 cmd <- 02
1910 13:43:04.529124 done.
1911 13:43:04.535385 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1912 13:43:04.538685 ME: Version: Unavailable
1913 13:43:04.541731 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1914 13:43:04.545196 Initializing devices...
1915 13:43:04.548318 Root Device init
1916 13:43:04.548702 mainboard: EC init
1917 13:43:04.554565 Chrome EC: Set SMI mask to 0x0000000000000000
1918 13:43:04.557953 Chrome EC: UHEPI supported
1919 13:43:04.565023 Chrome EC: clear events_b mask to 0x0000000000000000
1920 13:43:04.568602 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1921 13:43:04.575073 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1922 13:43:04.581355 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1923 13:43:04.587854 Chrome EC: Set WAKE mask to 0x0000000000000000
1924 13:43:04.591252 Root Device init finished in 39 msecs
1925 13:43:04.591751 PCI: 00:00.0 init
1926 13:43:04.595628 CPU TDP = 15 Watts
1927 13:43:04.598546 CPU PL1 = 15 Watts
1928 13:43:04.599039 CPU PL2 = 55 Watts
1929 13:43:04.601832 CPU PL4 = 123 Watts
1930 13:43:04.605127 PCI: 00:00.0 init finished in 8 msecs
1931 13:43:04.608720 PCI: 00:02.0 init
1932 13:43:04.609213 GMA: Found VBT in CBFS
1933 13:43:04.611911 GMA: Found valid VBT in CBFS
1934 13:43:04.618374 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1935 13:43:04.624885 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1936 13:43:04.628701 PCI: 00:02.0 init finished in 18 msecs
1937 13:43:04.631645 PCI: 00:06.0 init
1938 13:43:04.635310 Initializing PCH PCIe bridge.
1939 13:43:04.638834 PCI: 00:06.0 init finished in 3 msecs
1940 13:43:04.642144 PCI: 00:0a.0 init
1941 13:43:04.644944 PCI: 00:0a.0 init finished in 0 msecs
1942 13:43:04.645484 PCI: 00:14.0 init
1943 13:43:04.648547 PCI: 00:14.0 init finished in 0 msecs
1944 13:43:04.651783 PCI: 00:14.2 init
1945 13:43:04.654599 PCI: 00:14.2 init finished in 0 msecs
1946 13:43:04.658391 PCI: 00:15.0 init
1947 13:43:04.661465 I2C bus 0 version 0x3230302a
1948 13:43:04.665240 DW I2C bus 0 at 0x80655000 (400 KHz)
1949 13:43:04.668362 PCI: 00:15.0 init finished in 6 msecs
1950 13:43:04.668813 PCI: 00:15.1 init
1951 13:43:04.672323 I2C bus 1 version 0x3230302a
1952 13:43:04.675046 DW I2C bus 1 at 0x80656000 (400 KHz)
1953 13:43:04.678148 PCI: 00:15.1 init finished in 6 msecs
1954 13:43:04.681926 PCI: 00:15.3 init
1955 13:43:04.685206 I2C bus 3 version 0x3230302a
1956 13:43:04.688602 DW I2C bus 3 at 0x80657000 (400 KHz)
1957 13:43:04.691465 PCI: 00:15.3 init finished in 6 msecs
1958 13:43:04.694925 PCI: 00:16.0 init
1959 13:43:04.698553 PCI: 00:16.0 init finished in 0 msecs
1960 13:43:04.698909 PCI: 00:19.1 init
1961 13:43:04.701775 I2C bus 5 version 0x3230302a
1962 13:43:04.704498 DW I2C bus 5 at 0x80659000 (400 KHz)
1963 13:43:04.711726 PCI: 00:19.1 init finished in 6 msecs
1964 13:43:04.712168 PCI: 00:1f.0 init
1965 13:43:04.718100 IOAPIC: Initializing IOAPIC at 0xfec00000
1966 13:43:04.718591 IOAPIC: ID = 0x02
1967 13:43:04.721578 IOAPIC: Dumping registers
1968 13:43:04.724707 reg 0x0000: 0x02000000
1969 13:43:04.725214 reg 0x0001: 0x00770020
1970 13:43:04.728279 reg 0x0002: 0x00000000
1971 13:43:04.731392 IOAPIC: 120 interrupts
1972 13:43:04.734920 IOAPIC: Clearing IOAPIC at 0xfec00000
1973 13:43:04.738341 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1974 13:43:04.744665 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1975 13:43:04.748172 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1976 13:43:04.754746 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1977 13:43:04.757769 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1978 13:43:04.764502 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1979 13:43:04.768227 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1980 13:43:04.774448 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1981 13:43:04.777953 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1982 13:43:04.781487 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1983 13:43:04.787853 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1984 13:43:04.791412 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1985 13:43:04.798092 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1986 13:43:04.801156 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1987 13:43:04.807844 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1988 13:43:04.811265 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1989 13:43:04.817717 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1990 13:43:04.821283 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1991 13:43:04.824603 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1992 13:43:04.831102 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1993 13:43:04.834168 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1994 13:43:04.841498 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1995 13:43:04.844445 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1996 13:43:04.851120 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1997 13:43:04.854580 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1998 13:43:04.857440 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1999 13:43:04.864527 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2000 13:43:04.867659 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2001 13:43:04.874580 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2002 13:43:04.877735 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2003 13:43:04.884393 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2004 13:43:04.887518 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2005 13:43:04.894170 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2006 13:43:04.897405 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2007 13:43:04.900865 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2008 13:43:04.907456 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2009 13:43:04.910673 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2010 13:43:04.917299 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2011 13:43:04.920981 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2012 13:43:04.927184 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2013 13:43:04.930550 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2014 13:43:04.937182 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2015 13:43:04.940684 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2016 13:43:04.943736 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2017 13:43:04.950386 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2018 13:43:04.953656 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2019 13:43:04.960289 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2020 13:43:04.964105 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2021 13:43:04.970878 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2022 13:43:04.973940 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2023 13:43:04.980607 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2024 13:43:04.984221 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2025 13:43:04.987000 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2026 13:43:04.993739 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2027 13:43:04.997057 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2028 13:43:05.003479 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2029 13:43:05.006874 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2030 13:43:05.013669 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2031 13:43:05.016905 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2032 13:43:05.023829 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2033 13:43:05.026779 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2034 13:43:05.030427 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2035 13:43:05.037036 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2036 13:43:05.040363 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2037 13:43:05.047126 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2038 13:43:05.050374 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2039 13:43:05.056780 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2040 13:43:05.060242 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2041 13:43:05.066891 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2042 13:43:05.070564 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2043 13:43:05.073593 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2044 13:43:05.080291 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2045 13:43:05.083381 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2046 13:43:05.090292 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2047 13:43:05.093559 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2048 13:43:05.100508 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2049 13:43:05.103462 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2050 13:43:05.106857 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2051 13:43:05.113087 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2052 13:43:05.116649 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2053 13:43:05.123536 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2054 13:43:05.126904 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2055 13:43:05.133241 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2056 13:43:05.137228 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2057 13:43:05.143397 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2058 13:43:05.146605 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2059 13:43:05.149939 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2060 13:43:05.156667 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2061 13:43:05.160273 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2062 13:43:05.166828 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2063 13:43:05.170275 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2064 13:43:05.176434 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2065 13:43:05.179491 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2066 13:43:05.186509 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2067 13:43:05.189950 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2068 13:43:05.193155 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2069 13:43:05.199945 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2070 13:43:05.203425 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2071 13:43:05.209449 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2072 13:43:05.212900 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2073 13:43:05.219948 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2074 13:43:05.223564 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2075 13:43:05.226734 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2076 13:43:05.232896 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2077 13:43:05.236390 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2078 13:43:05.243015 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2079 13:43:05.246402 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2080 13:43:05.252730 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2081 13:43:05.256763 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2082 13:43:05.263353 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2083 13:43:05.265968 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2084 13:43:05.273004 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2085 13:43:05.276648 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2086 13:43:05.279234 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2087 13:43:05.285966 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2088 13:43:05.289801 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2089 13:43:05.296358 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2090 13:43:05.299757 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2091 13:43:05.306229 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2092 13:43:05.308990 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2093 13:43:05.312514 IOAPIC: Bootstrap Processor Local APIC = 0x00
2094 13:43:05.319146 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2095 13:43:05.322382 PCI: 00:1f.0 init finished in 607 msecs
2096 13:43:05.325678 PCI: 00:1f.2 init
2097 13:43:05.328703 apm_control: Disabling ACPI.
2098 13:43:05.333792 APMC done.
2099 13:43:05.337457 PCI: 00:1f.2 init finished in 8 msecs
2100 13:43:05.340451 PCI: 00:1f.3 init
2101 13:43:05.344122 PCI: 00:1f.3 init finished in 0 msecs
2102 13:43:05.344572 PCI: 01:00.0 init
2103 13:43:05.347099 PCI: 01:00.0 init finished in 0 msecs
2104 13:43:05.350294 PNP: 0c09.0 init
2105 13:43:05.357347 Google Chrome EC uptime: 12.140 seconds
2106 13:43:05.360428 Google Chrome AP resets since EC boot: 1
2107 13:43:05.363664 Google Chrome most recent AP reset causes:
2108 13:43:05.366875 0.341: 32775 shutdown: entering G3
2109 13:43:05.373574 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2110 13:43:05.377117 PNP: 0c09.0 init finished in 23 msecs
2111 13:43:05.380247 GENERIC: 0.0 init
2112 13:43:05.383947 GENERIC: 0.0 init finished in 0 msecs
2113 13:43:05.386749 GENERIC: 1.0 init
2114 13:43:05.390438 GENERIC: 1.0 init finished in 0 msecs
2115 13:43:05.390864 Devices initialized
2116 13:43:05.393867 Show all devs... After init.
2117 13:43:05.397120 Root Device: enabled 1
2118 13:43:05.400332 CPU_CLUSTER: 0: enabled 1
2119 13:43:05.400803 DOMAIN: 0000: enabled 1
2120 13:43:05.403812 GPIO: 0: enabled 1
2121 13:43:05.406781 PCI: 00:00.0: enabled 1
2122 13:43:05.407186 PCI: 00:01.0: enabled 0
2123 13:43:05.410142 PCI: 00:01.1: enabled 0
2124 13:43:05.413252 PCI: 00:02.0: enabled 1
2125 13:43:05.417180 PCI: 00:04.0: enabled 1
2126 13:43:05.417566 PCI: 00:05.0: enabled 0
2127 13:43:05.420283 PCI: 00:06.0: enabled 1
2128 13:43:05.423677 PCI: 00:06.2: enabled 0
2129 13:43:05.426692 PCI: 00:07.0: enabled 0
2130 13:43:05.427077 PCI: 00:07.1: enabled 0
2131 13:43:05.429774 PCI: 00:07.2: enabled 0
2132 13:43:05.433413 PCI: 00:07.3: enabled 0
2133 13:43:05.436596 PCI: 00:08.0: enabled 0
2134 13:43:05.436964 PCI: 00:09.0: enabled 0
2135 13:43:05.440285 PCI: 00:0a.0: enabled 1
2136 13:43:05.443475 PCI: 00:0d.0: enabled 1
2137 13:43:05.443941 PCI: 00:0d.1: enabled 0
2138 13:43:05.446582 PCI: 00:0d.2: enabled 0
2139 13:43:05.450302 PCI: 00:0d.3: enabled 0
2140 13:43:05.453016 PCI: 00:0e.0: enabled 0
2141 13:43:05.453369 PCI: 00:10.0: enabled 0
2142 13:43:05.456623 PCI: 00:10.1: enabled 0
2143 13:43:05.460196 PCI: 00:10.6: enabled 0
2144 13:43:05.463206 PCI: 00:10.7: enabled 0
2145 13:43:05.463591 PCI: 00:12.0: enabled 0
2146 13:43:05.466515 PCI: 00:12.6: enabled 0
2147 13:43:05.469907 PCI: 00:12.7: enabled 0
2148 13:43:05.473260 PCI: 00:13.0: enabled 0
2149 13:43:05.473548 PCI: 00:14.0: enabled 1
2150 13:43:05.476356 PCI: 00:14.1: enabled 0
2151 13:43:05.480074 PCI: 00:14.2: enabled 1
2152 13:43:05.480424 PCI: 00:14.3: enabled 1
2153 13:43:05.483428 PCI: 00:15.0: enabled 1
2154 13:43:05.486555 PCI: 00:15.1: enabled 1
2155 13:43:05.489972 PCI: 00:15.2: enabled 0
2156 13:43:05.490324 PCI: 00:15.3: enabled 1
2157 13:43:05.493011 PCI: 00:16.0: enabled 1
2158 13:43:05.496590 PCI: 00:16.1: enabled 0
2159 13:43:05.500146 PCI: 00:16.2: enabled 0
2160 13:43:05.500589 PCI: 00:16.3: enabled 0
2161 13:43:05.503318 PCI: 00:16.4: enabled 0
2162 13:43:05.506633 PCI: 00:16.5: enabled 0
2163 13:43:05.509499 PCI: 00:17.0: enabled 0
2164 13:43:05.509908 PCI: 00:19.0: enabled 0
2165 13:43:05.512830 PCI: 00:19.1: enabled 1
2166 13:43:05.516567 PCI: 00:19.2: enabled 0
2167 13:43:05.519901 PCI: 00:1a.0: enabled 0
2168 13:43:05.520391 PCI: 00:1c.0: enabled 0
2169 13:43:05.523215 PCI: 00:1c.1: enabled 0
2170 13:43:05.526610 PCI: 00:1c.2: enabled 0
2171 13:43:05.529636 PCI: 00:1c.3: enabled 0
2172 13:43:05.529986 PCI: 00:1c.4: enabled 0
2173 13:43:05.533312 PCI: 00:1c.5: enabled 0
2174 13:43:05.536358 PCI: 00:1c.6: enabled 0
2175 13:43:05.536729 PCI: 00:1c.7: enabled 0
2176 13:43:05.539559 PCI: 00:1d.0: enabled 0
2177 13:43:05.543131 PCI: 00:1d.1: enabled 0
2178 13:43:05.546145 PCI: 00:1d.2: enabled 0
2179 13:43:05.546540 PCI: 00:1d.3: enabled 0
2180 13:43:05.549807 PCI: 00:1e.0: enabled 1
2181 13:43:05.553353 PCI: 00:1e.1: enabled 0
2182 13:43:05.555921 PCI: 00:1e.2: enabled 0
2183 13:43:05.556336 PCI: 00:1e.3: enabled 1
2184 13:43:05.559639 PCI: 00:1f.0: enabled 1
2185 13:43:05.563445 PCI: 00:1f.1: enabled 0
2186 13:43:05.566109 PCI: 00:1f.2: enabled 1
2187 13:43:05.566621 PCI: 00:1f.3: enabled 1
2188 13:43:05.569715 PCI: 00:1f.4: enabled 0
2189 13:43:05.572669 PCI: 00:1f.5: enabled 1
2190 13:43:05.576101 PCI: 00:1f.6: enabled 0
2191 13:43:05.576609 PCI: 00:1f.7: enabled 0
2192 13:43:05.579360 GENERIC: 0.0: enabled 1
2193 13:43:05.582683 GENERIC: 0.0: enabled 1
2194 13:43:05.583191 GENERIC: 1.0: enabled 1
2195 13:43:05.585930 GENERIC: 0.0: enabled 1
2196 13:43:05.589074 GENERIC: 1.0: enabled 1
2197 13:43:05.592934 USB0 port 0: enabled 1
2198 13:43:05.593476 USB0 port 0: enabled 1
2199 13:43:05.596232 GENERIC: 0.0: enabled 1
2200 13:43:05.599322 I2C: 00:1a: enabled 1
2201 13:43:05.599853 I2C: 00:31: enabled 1
2202 13:43:05.602767 I2C: 00:32: enabled 1
2203 13:43:05.605772 I2C: 00:50: enabled 1
2204 13:43:05.606175 I2C: 00:10: enabled 1
2205 13:43:05.609037 I2C: 00:15: enabled 1
2206 13:43:05.612322 I2C: 00:2c: enabled 1
2207 13:43:05.615781 GENERIC: 0.0: enabled 1
2208 13:43:05.616134 SPI: 00: enabled 1
2209 13:43:05.619202 PNP: 0c09.0: enabled 1
2210 13:43:05.622515 GENERIC: 0.0: enabled 1
2211 13:43:05.622874 USB3 port 0: enabled 1
2212 13:43:05.625496 USB3 port 1: enabled 0
2213 13:43:05.628977 USB3 port 2: enabled 1
2214 13:43:05.629472 USB3 port 3: enabled 0
2215 13:43:05.632619 USB2 port 0: enabled 1
2216 13:43:05.636092 USB2 port 1: enabled 0
2217 13:43:05.639376 USB2 port 2: enabled 1
2218 13:43:05.639835 USB2 port 3: enabled 0
2219 13:43:05.642826 USB2 port 4: enabled 0
2220 13:43:05.645815 USB2 port 5: enabled 1
2221 13:43:05.646166 USB2 port 6: enabled 0
2222 13:43:05.648992 USB2 port 7: enabled 0
2223 13:43:05.652280 USB2 port 8: enabled 1
2224 13:43:05.652756 USB2 port 9: enabled 1
2225 13:43:05.655537 USB3 port 0: enabled 1
2226 13:43:05.659151 USB3 port 1: enabled 0
2227 13:43:05.662521 USB3 port 2: enabled 0
2228 13:43:05.662912 USB3 port 3: enabled 0
2229 13:43:05.665928 GENERIC: 0.0: enabled 1
2230 13:43:05.669098 GENERIC: 1.0: enabled 1
2231 13:43:05.669510 APIC: 00: enabled 1
2232 13:43:05.672767 APIC: 12: enabled 1
2233 13:43:05.675575 APIC: 14: enabled 1
2234 13:43:05.675924 APIC: 16: enabled 1
2235 13:43:05.678990 APIC: 10: enabled 1
2236 13:43:05.679338 APIC: 09: enabled 1
2237 13:43:05.682271 APIC: 01: enabled 1
2238 13:43:05.685195 APIC: 08: enabled 1
2239 13:43:05.685567 PCI: 01:00.0: enabled 1
2240 13:43:05.692383 BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms
2241 13:43:05.699264 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2242 13:43:05.702340 ELOG: NV offset 0xf20000 size 0x4000
2243 13:43:05.708726 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2244 13:43:05.715419 ELOG: Event(17) added with size 13 at 2023-10-26 13:43:05 UTC
2245 13:43:05.722148 ELOG: Event(9E) added with size 10 at 2023-10-26 13:43:05 UTC
2246 13:43:05.728792 ELOG: Event(9F) added with size 14 at 2023-10-26 13:43:05 UTC
2247 13:43:05.735392 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2248 13:43:05.742275 ELOG: Event(A0) added with size 9 at 2023-10-26 13:43:05 UTC
2249 13:43:05.745057 elog_add_boot_reason: Logged dev mode boot
2250 13:43:05.752372 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2251 13:43:05.752858 Finalize devices...
2252 13:43:05.755265 PCI: 00:16.0 final
2253 13:43:05.758416 PCI: 00:1f.2 final
2254 13:43:05.758769 GENERIC: 0.0 final
2255 13:43:05.765473 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2256 13:43:05.768782 GENERIC: 1.0 final
2257 13:43:05.772068 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2258 13:43:05.775741 Devices finalized
2259 13:43:05.781952 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2260 13:43:05.785031 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2261 13:43:05.791927 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2262 13:43:05.795301 ME: HFSTS1 : 0x90000245
2263 13:43:05.801732 ME: HFSTS2 : 0x82100116
2264 13:43:05.804800 ME: HFSTS3 : 0x00000050
2265 13:43:05.808190 ME: HFSTS4 : 0x00004000
2266 13:43:05.814916 ME: HFSTS5 : 0x00000000
2267 13:43:05.818799 ME: HFSTS6 : 0x40600006
2268 13:43:05.821420 ME: Manufacturing Mode : NO
2269 13:43:05.824839 ME: SPI Protection Mode Enabled : YES
2270 13:43:05.831979 ME: FPFs Committed : YES
2271 13:43:05.835398 ME: Manufacturing Vars Locked : YES
2272 13:43:05.838252 ME: FW Partition Table : OK
2273 13:43:05.841747 ME: Bringup Loader Failure : NO
2274 13:43:05.845176 ME: Firmware Init Complete : YES
2275 13:43:05.848581 ME: Boot Options Present : NO
2276 13:43:05.851872 ME: Update In Progress : NO
2277 13:43:05.854662 ME: D0i3 Support : YES
2278 13:43:05.861173 ME: Low Power State Enabled : NO
2279 13:43:05.864581 ME: CPU Replaced : YES
2280 13:43:05.868026 ME: CPU Replacement Valid : YES
2281 13:43:05.871620 ME: Current Working State : 5
2282 13:43:05.875640 ME: Current Operation State : 1
2283 13:43:05.878225 ME: Current Operation Mode : 0
2284 13:43:05.881431 ME: Error Code : 0
2285 13:43:05.885535 ME: Enhanced Debug Mode : NO
2286 13:43:05.888509 ME: CPU Debug Disabled : YES
2287 13:43:05.894781 ME: TXT Support : NO
2288 13:43:05.898241 ME: WP for RO is enabled : YES
2289 13:43:05.901738 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2290 13:43:05.907890 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2291 13:43:05.911456 Ramoops buffer: 0x100000@0x76899000.
2292 13:43:05.918175 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2293 13:43:05.924287 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2294 13:43:05.928247 CBFS: 'fallback/slic' not found.
2295 13:43:05.934892 ACPI: Writing ACPI tables at 7686d000.
2296 13:43:05.935371 ACPI: * FACS
2297 13:43:05.937518 ACPI: * DSDT
2298 13:43:05.944770 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2299 13:43:05.947747 ACPI: * FADT
2300 13:43:05.948114 SCI is IRQ9
2301 13:43:05.951310 ACPI: added table 1/32, length now 40
2302 13:43:05.954191 ACPI: * SSDT
2303 13:43:05.957347 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2304 13:43:05.965437 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2305 13:43:05.968908 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2306 13:43:05.971880 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2307 13:43:05.978348 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2308 13:43:05.985203 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2309 13:43:05.991536 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2310 13:43:05.995055 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2311 13:43:06.001858 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2312 13:43:06.005095 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2313 13:43:06.011674 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2314 13:43:06.015229 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2315 13:43:06.022094 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2316 13:43:06.024932 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2317 13:43:06.033344 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2318 13:43:06.036877 PS2K: Passing 80 keymaps to kernel
2319 13:43:06.043313 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2320 13:43:06.049961 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2321 13:43:06.056448 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2322 13:43:06.062846 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2323 13:43:06.069750 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2324 13:43:06.076141 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2325 13:43:06.079483 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2326 13:43:06.086249 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2327 13:43:06.093071 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2328 13:43:06.099643 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2329 13:43:06.102826 ACPI: added table 2/32, length now 44
2330 13:43:06.106418 ACPI: * MCFG
2331 13:43:06.109190 ACPI: added table 3/32, length now 48
2332 13:43:06.109575 ACPI: * TPM2
2333 13:43:06.112652 TPM2 log created at 0x7685d000
2334 13:43:06.119468 ACPI: added table 4/32, length now 52
2335 13:43:06.119811 ACPI: * LPIT
2336 13:43:06.123205 ACPI: added table 5/32, length now 56
2337 13:43:06.126318 ACPI: * MADT
2338 13:43:06.126662 SCI is IRQ9
2339 13:43:06.129547 ACPI: added table 6/32, length now 60
2340 13:43:06.132503 cmd_reg from pmc_make_ipc_cmd 1052838
2341 13:43:06.139385 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2342 13:43:06.146076 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2343 13:43:06.152684 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2344 13:43:06.155679 PMC CrashLog size in discovery mode: 0xC00
2345 13:43:06.159188 cpu crashlog bar addr: 0x80640000
2346 13:43:06.162778 cpu discovery table offset: 0x6030
2347 13:43:06.169500 cpu_crashlog_discovery_table buffer count: 0x3
2348 13:43:06.176169 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2349 13:43:06.182511 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2350 13:43:06.189178 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2351 13:43:06.192383 PMC crashLog size in discovery mode : 0xC00
2352 13:43:06.198951 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2353 13:43:06.205409 discover mode PMC crashlog size adjusted to: 0x200
2354 13:43:06.212034 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2355 13:43:06.215485 discover mode PMC crashlog size adjusted to: 0x0
2356 13:43:06.219143 m_cpu_crashLog_size : 0x3480 bytes
2357 13:43:06.222366 CPU crashLog present.
2358 13:43:06.225448 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2359 13:43:06.235434 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2360 13:43:06.235837 current = 76876550
2361 13:43:06.239287 ACPI: * DMAR
2362 13:43:06.242108 ACPI: added table 7/32, length now 64
2363 13:43:06.245314 ACPI: added table 8/32, length now 68
2364 13:43:06.245788 ACPI: * HPET
2365 13:43:06.252030 ACPI: added table 9/32, length now 72
2366 13:43:06.252431 ACPI: done.
2367 13:43:06.255710 ACPI tables: 38528 bytes.
2368 13:43:06.259092 smbios_write_tables: 76857000
2369 13:43:06.262576 EC returned error result code 3
2370 13:43:06.265347 Couldn't obtain OEM name from CBI
2371 13:43:06.268954 Create SMBIOS type 16
2372 13:43:06.269420 Create SMBIOS type 17
2373 13:43:06.272296 Create SMBIOS type 20
2374 13:43:06.275582 GENERIC: 0.0 (WIFI Device)
2375 13:43:06.279164 SMBIOS tables: 2156 bytes.
2376 13:43:06.282768 Writing table forward entry at 0x00000500
2377 13:43:06.289110 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2378 13:43:06.292273 Writing coreboot table at 0x76891000
2379 13:43:06.299085 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2380 13:43:06.302496 1. 0000000000001000-000000000009ffff: RAM
2381 13:43:06.305516 2. 00000000000a0000-00000000000fffff: RESERVED
2382 13:43:06.312403 3. 0000000000100000-0000000076856fff: RAM
2383 13:43:06.318674 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2384 13:43:06.322347 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2385 13:43:06.328820 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2386 13:43:06.332098 7. 0000000077000000-00000000803fffff: RESERVED
2387 13:43:06.339071 8. 00000000c0000000-00000000cfffffff: RESERVED
2388 13:43:06.342056 9. 00000000f8000000-00000000f9ffffff: RESERVED
2389 13:43:06.348694 10. 00000000fb000000-00000000fb000fff: RESERVED
2390 13:43:06.352142 11. 00000000fc800000-00000000fe7fffff: RESERVED
2391 13:43:06.355375 12. 00000000feb00000-00000000feb7ffff: RESERVED
2392 13:43:06.362552 13. 00000000fec00000-00000000fecfffff: RESERVED
2393 13:43:06.365185 14. 00000000fed40000-00000000fed6ffff: RESERVED
2394 13:43:06.372318 15. 00000000fed80000-00000000fed87fff: RESERVED
2395 13:43:06.375409 16. 00000000fed90000-00000000fed92fff: RESERVED
2396 13:43:06.381931 17. 00000000feda0000-00000000feda1fff: RESERVED
2397 13:43:06.385450 18. 00000000fedc0000-00000000feddffff: RESERVED
2398 13:43:06.388483 19. 0000000100000000-000000027fbfffff: RAM
2399 13:43:06.392120 Passing 4 GPIOs to payload:
2400 13:43:06.398929 NAME | PORT | POLARITY | VALUE
2401 13:43:06.401804 lid | undefined | high | high
2402 13:43:06.409144 power | undefined | high | low
2403 13:43:06.415476 oprom | undefined | high | low
2404 13:43:06.418634 EC in RW | 0x00000151 | high | high
2405 13:43:06.422417 Board ID: 3
2406 13:43:06.422837 FW config: 0x131
2407 13:43:06.428549 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum c641
2408 13:43:06.431760 coreboot table: 1788 bytes.
2409 13:43:06.435257 IMD ROOT 0. 0x76fff000 0x00001000
2410 13:43:06.438624 IMD SMALL 1. 0x76ffe000 0x00001000
2411 13:43:06.441934 FSP MEMORY 2. 0x76afe000 0x00500000
2412 13:43:06.444789 CONSOLE 3. 0x76ade000 0x00020000
2413 13:43:06.448358 RW MCACHE 4. 0x76add000 0x0000043c
2414 13:43:06.455019 RO MCACHE 5. 0x76adc000 0x00000fd8
2415 13:43:06.458119 FMAP 6. 0x76adb000 0x0000064a
2416 13:43:06.461719 TIME STAMP 7. 0x76ada000 0x00000910
2417 13:43:06.465001 VBOOT WORK 8. 0x76ac6000 0x00014000
2418 13:43:06.468379 MEM INFO 9. 0x76ac5000 0x000003b8
2419 13:43:06.471722 ROMSTG STCK10. 0x76ac4000 0x00001000
2420 13:43:06.475097 AFTER CAR 11. 0x76ab8000 0x0000c000
2421 13:43:06.478340 RAMSTAGE 12. 0x76a2e000 0x0008a000
2422 13:43:06.485118 ACPI BERT 13. 0x76a1e000 0x00010000
2423 13:43:06.488121 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2424 13:43:06.491840 REFCODE 15. 0x769ae000 0x0006f000
2425 13:43:06.495343 SMM BACKUP 16. 0x7699e000 0x00010000
2426 13:43:06.498331 IGD OPREGION17. 0x76999000 0x00004203
2427 13:43:06.501624 RAMOOPS 18. 0x76899000 0x00100000
2428 13:43:06.504635 COREBOOT 19. 0x76891000 0x00008000
2429 13:43:06.508103 ACPI 20. 0x7686d000 0x00024000
2430 13:43:06.515050 TPM2 TCGLOG21. 0x7685d000 0x00010000
2431 13:43:06.518417 PMC CRASHLOG22. 0x7685c000 0x00000c00
2432 13:43:06.521712 CPU CRASHLOG23. 0x76858000 0x00003480
2433 13:43:06.524812 SMBIOS 24. 0x76857000 0x00001000
2434 13:43:06.528625 IMD small region:
2435 13:43:06.531551 IMD ROOT 0. 0x76ffec00 0x00000400
2436 13:43:06.535293 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2437 13:43:06.538464 VPD 2. 0x76ffeb80 0x00000058
2438 13:43:06.541787 POWER STATE 3. 0x76ffeb20 0x00000044
2439 13:43:06.544826 ROMSTAGE 4. 0x76ffeb00 0x00000004
2440 13:43:06.551646 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2441 13:43:06.554655 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2442 13:43:06.561207 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2443 13:43:06.564820 MTRR: Physical address space:
2444 13:43:06.568401 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2445 13:43:06.574899 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2446 13:43:06.581521 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2447 13:43:06.587970 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2448 13:43:06.595001 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2449 13:43:06.601433 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2450 13:43:06.608039 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2451 13:43:06.611277 MTRR: Fixed MSR 0x250 0x0606060606060606
2452 13:43:06.614314 MTRR: Fixed MSR 0x258 0x0606060606060606
2453 13:43:06.617667 MTRR: Fixed MSR 0x259 0x0000000000000000
2454 13:43:06.624762 MTRR: Fixed MSR 0x268 0x0606060606060606
2455 13:43:06.628288 MTRR: Fixed MSR 0x269 0x0606060606060606
2456 13:43:06.631139 MTRR: Fixed MSR 0x26a 0x0606060606060606
2457 13:43:06.634382 MTRR: Fixed MSR 0x26b 0x0606060606060606
2458 13:43:06.641216 MTRR: Fixed MSR 0x26c 0x0606060606060606
2459 13:43:06.644682 MTRR: Fixed MSR 0x26d 0x0606060606060606
2460 13:43:06.647871 MTRR: Fixed MSR 0x26e 0x0606060606060606
2461 13:43:06.650906 MTRR: Fixed MSR 0x26f 0x0606060606060606
2462 13:43:06.655060 call enable_fixed_mtrr()
2463 13:43:06.658377 CPU physical address size: 39 bits
2464 13:43:06.665403 MTRR: default type WB/UC MTRR counts: 6/6.
2465 13:43:06.668395 MTRR: UC selected as default type.
2466 13:43:06.675759 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2467 13:43:06.678691 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2468 13:43:06.685928 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2469 13:43:06.692405 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2470 13:43:06.698805 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2471 13:43:06.705340 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2472 13:43:06.711854 MTRR: Fixed MSR 0x250 0x0606060606060606
2473 13:43:06.715104 MTRR: Fixed MSR 0x258 0x0606060606060606
2474 13:43:06.718202 MTRR: Fixed MSR 0x259 0x0000000000000000
2475 13:43:06.721454 MTRR: Fixed MSR 0x268 0x0606060606060606
2476 13:43:06.728546 MTRR: Fixed MSR 0x269 0x0606060606060606
2477 13:43:06.731593 MTRR: Fixed MSR 0x26a 0x0606060606060606
2478 13:43:06.735434 MTRR: Fixed MSR 0x26b 0x0606060606060606
2479 13:43:06.738410 MTRR: Fixed MSR 0x26c 0x0606060606060606
2480 13:43:06.745129 MTRR: Fixed MSR 0x26d 0x0606060606060606
2481 13:43:06.748406 MTRR: Fixed MSR 0x26e 0x0606060606060606
2482 13:43:06.751665 MTRR: Fixed MSR 0x26f 0x0606060606060606
2483 13:43:06.754778 MTRR: Fixed MSR 0x250 0x0606060606060606
2484 13:43:06.757961 MTRR: Fixed MSR 0x250 0x0606060606060606
2485 13:43:06.764988 MTRR: Fixed MSR 0x250 0x0606060606060606
2486 13:43:06.765417 call enable_fixed_mtrr()
2487 13:43:06.771552 MTRR: Fixed MSR 0x258 0x0606060606060606
2488 13:43:06.774986 MTRR: Fixed MSR 0x259 0x0000000000000000
2489 13:43:06.778075 MTRR: Fixed MSR 0x268 0x0606060606060606
2490 13:43:06.781501 MTRR: Fixed MSR 0x269 0x0606060606060606
2491 13:43:06.788184 MTRR: Fixed MSR 0x26a 0x0606060606060606
2492 13:43:06.791035 MTRR: Fixed MSR 0x26b 0x0606060606060606
2493 13:43:06.794717 MTRR: Fixed MSR 0x26c 0x0606060606060606
2494 13:43:06.798408 MTRR: Fixed MSR 0x26d 0x0606060606060606
2495 13:43:06.804568 MTRR: Fixed MSR 0x26e 0x0606060606060606
2496 13:43:06.807867 MTRR: Fixed MSR 0x26f 0x0606060606060606
2497 13:43:06.811503 MTRR: Fixed MSR 0x258 0x0606060606060606
2498 13:43:06.814378 call enable_fixed_mtrr()
2499 13:43:06.817900 MTRR: Fixed MSR 0x250 0x0606060606060606
2500 13:43:06.821059 MTRR: Fixed MSR 0x258 0x0606060606060606
2501 13:43:06.827824 MTRR: Fixed MSR 0x259 0x0000000000000000
2502 13:43:06.831379 MTRR: Fixed MSR 0x268 0x0606060606060606
2503 13:43:06.834606 MTRR: Fixed MSR 0x269 0x0606060606060606
2504 13:43:06.838070 CPU physical address size: 39 bits
2505 13:43:06.841099 MTRR: Fixed MSR 0x250 0x0606060606060606
2506 13:43:06.848041 MTRR: Fixed MSR 0x259 0x0000000000000000
2507 13:43:06.851145 MTRR: Fixed MSR 0x26a 0x0606060606060606
2508 13:43:06.854484 CPU physical address size: 39 bits
2509 13:43:06.857505 MTRR: Fixed MSR 0x26b 0x0606060606060606
2510 13:43:06.860889 MTRR: Fixed MSR 0x26c 0x0606060606060606
2511 13:43:06.867696 MTRR: Fixed MSR 0x26d 0x0606060606060606
2512 13:43:06.870842 MTRR: Fixed MSR 0x26e 0x0606060606060606
2513 13:43:06.874420 MTRR: Fixed MSR 0x26f 0x0606060606060606
2514 13:43:06.877573 MTRR: Fixed MSR 0x268 0x0606060606060606
2515 13:43:06.881330 MTRR: Fixed MSR 0x258 0x0606060606060606
2516 13:43:06.887874 MTRR: Fixed MSR 0x259 0x0000000000000000
2517 13:43:06.890917 MTRR: Fixed MSR 0x268 0x0606060606060606
2518 13:43:06.894136 MTRR: Fixed MSR 0x269 0x0606060606060606
2519 13:43:06.897753 MTRR: Fixed MSR 0x26a 0x0606060606060606
2520 13:43:06.904730 MTRR: Fixed MSR 0x26b 0x0606060606060606
2521 13:43:06.907754 MTRR: Fixed MSR 0x26c 0x0606060606060606
2522 13:43:06.911387 MTRR: Fixed MSR 0x26d 0x0606060606060606
2523 13:43:06.914771 MTRR: Fixed MSR 0x26e 0x0606060606060606
2524 13:43:06.921160 MTRR: Fixed MSR 0x26f 0x0606060606060606
2525 13:43:06.921647 call enable_fixed_mtrr()
2526 13:43:06.927853 MTRR: Fixed MSR 0x269 0x0606060606060606
2527 13:43:06.930666 CPU physical address size: 39 bits
2528 13:43:06.934220 MTRR: Fixed MSR 0x26a 0x0606060606060606
2529 13:43:06.937238 call enable_fixed_mtrr()
2530 13:43:06.940456 MTRR: Fixed MSR 0x26b 0x0606060606060606
2531 13:43:06.944193 MTRR: Fixed MSR 0x26c 0x0606060606060606
2532 13:43:06.947222 MTRR: Fixed MSR 0x26d 0x0606060606060606
2533 13:43:06.953817 MTRR: Fixed MSR 0x26e 0x0606060606060606
2534 13:43:06.957461 MTRR: Fixed MSR 0x26f 0x0606060606060606
2535 13:43:06.960542 CPU physical address size: 39 bits
2536 13:43:06.963867 call enable_fixed_mtrr()
2537 13:43:06.967475 MTRR: Fixed MSR 0x250 0x0606060606060606
2538 13:43:06.970533 CPU physical address size: 39 bits
2539 13:43:06.973875 MTRR: Fixed MSR 0x258 0x0606060606060606
2540 13:43:06.977334 MTRR: Fixed MSR 0x258 0x0606060606060606
2541 13:43:06.984287 MTRR: Fixed MSR 0x259 0x0000000000000000
2542 13:43:06.987498 MTRR: Fixed MSR 0x268 0x0606060606060606
2543 13:43:06.990734 MTRR: Fixed MSR 0x269 0x0606060606060606
2544 13:43:06.993784 MTRR: Fixed MSR 0x259 0x0000000000000000
2545 13:43:07.000586 MTRR: Fixed MSR 0x268 0x0606060606060606
2546 13:43:07.003657 MTRR: Fixed MSR 0x269 0x0606060606060606
2547 13:43:07.007392 MTRR: Fixed MSR 0x26a 0x0606060606060606
2548 13:43:07.010623 MTRR: Fixed MSR 0x26b 0x0606060606060606
2549 13:43:07.016681 MTRR: Fixed MSR 0x26c 0x0606060606060606
2550 13:43:07.020567 MTRR: Fixed MSR 0x26d 0x0606060606060606
2551 13:43:07.023763 MTRR: Fixed MSR 0x26e 0x0606060606060606
2552 13:43:07.027217 MTRR: Fixed MSR 0x26f 0x0606060606060606
2553 13:43:07.031492 MTRR: Fixed MSR 0x26a 0x0606060606060606
2554 13:43:07.034160 call enable_fixed_mtrr()
2555 13:43:07.037716 MTRR: Fixed MSR 0x26b 0x0606060606060606
2556 13:43:07.044606 MTRR: Fixed MSR 0x26c 0x0606060606060606
2557 13:43:07.047953 MTRR: Fixed MSR 0x26d 0x0606060606060606
2558 13:43:07.050723 MTRR: Fixed MSR 0x26e 0x0606060606060606
2559 13:43:07.053949 MTRR: Fixed MSR 0x26f 0x0606060606060606
2560 13:43:07.061171 CPU physical address size: 39 bits
2561 13:43:07.064194 call enable_fixed_mtrr()
2562 13:43:07.067251 CPU physical address size: 39 bits
2563 13:43:07.067659
2564 13:43:07.071613 MTRR check
2565 13:43:07.072083 Fixed MTRRs : Enabled
2566 13:43:07.074400 Variable MTRRs: Enabled
2567 13:43:07.074904
2568 13:43:07.080953 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2569 13:43:07.083948 Checking cr50 for pending updates
2570 13:43:07.095592 Reading cr50 TPM mode
2571 13:43:07.111118 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2572 13:43:07.120484 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2573 13:43:07.124055 Checking segment from ROM address 0xf96cbe6c
2574 13:43:07.127277 Checking segment from ROM address 0xf96cbe88
2575 13:43:07.133673 Loading segment from ROM address 0xf96cbe6c
2576 13:43:07.134027 code (compression=1)
2577 13:43:07.144209 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2578 13:43:07.153754 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2579 13:43:07.154204 using LZMA
2580 13:43:07.176568 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2581 13:43:07.183418 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2582 13:43:07.191541 Loading segment from ROM address 0xf96cbe88
2583 13:43:07.194542 Entry Point 0x30000000
2584 13:43:07.194920 Loaded segments
2585 13:43:07.201268 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2586 13:43:07.208187 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2587 13:43:07.211604 Finalizing chipset.
2588 13:43:07.212067 apm_control: Finalizing SMM.
2589 13:43:07.214475 APMC done.
2590 13:43:07.217764 HECI: CSE device 16.1 is disabled
2591 13:43:07.221190 HECI: CSE device 16.2 is disabled
2592 13:43:07.224605 HECI: CSE device 16.3 is disabled
2593 13:43:07.227848 HECI: CSE device 16.4 is disabled
2594 13:43:07.231294 HECI: CSE device 16.5 is disabled
2595 13:43:07.234598 HECI: Sending End-of-Post
2596 13:43:07.242815 CSE: EOP requested action: continue boot
2597 13:43:07.246147 CSE EOP successful, continuing boot
2598 13:43:07.253178 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2599 13:43:07.255791 mp_park_aps done after 0 msecs.
2600 13:43:07.259447 Jumping to boot code at 0x30000000(0x76891000)
2601 13:43:07.269988 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2602 13:43:07.273405
2603 13:43:07.273775
2604 13:43:07.274090
2605 13:43:07.277102 Starting depthcharge on Volmar...
2606 13:43:07.277621
2607 13:43:07.278601 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2608 13:43:07.279000 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2609 13:43:07.279322 Setting prompt string to ['brya:']
2610 13:43:07.279630 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2611 13:43:07.283575 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2612 13:43:07.283927
2613 13:43:07.290139 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2614 13:43:07.290560
2615 13:43:07.296806 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2616 13:43:07.297444
2617 13:43:07.299925 configure_storage: Failed to remap 1C:2
2618 13:43:07.300368
2619 13:43:07.303233 Wipe memory regions:
2620 13:43:07.303706
2621 13:43:07.306784 [0x00000000001000, 0x000000000a0000)
2622 13:43:07.307411
2623 13:43:07.309981 [0x00000000100000, 0x00000030000000)
2624 13:43:07.420254
2625 13:43:07.423269 [0x00000032668e60, 0x00000076857000)
2626 13:43:07.577206
2627 13:43:07.580623 [0x00000100000000, 0x0000027fc00000)
2628 13:43:08.444800
2629 13:43:08.448528 ec_init: CrosEC protocol v3 supported (256, 256)
2630 13:43:09.058033
2631 13:43:09.058533 R8152: Initializing
2632 13:43:09.058807
2633 13:43:09.061364 Version 9 (ocp_data = 6010)
2634 13:43:09.061777
2635 13:43:09.064528 R8152: Done initializing
2636 13:43:09.064906
2637 13:43:09.067879 Adding net device
2638 13:43:09.368874
2639 13:43:09.372286 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2640 13:43:09.372667
2641 13:43:09.372982
2642 13:43:09.373226
2643 13:43:09.373859 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2645 13:43:09.474833 brya: tftpboot 192.168.201.1 11884128/tftp-deploy-rp3u64le/kernel/bzImage 11884128/tftp-deploy-rp3u64le/kernel/cmdline 11884128/tftp-deploy-rp3u64le/ramdisk/ramdisk.cpio.gz
2646 13:43:09.475411 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2647 13:43:09.475724 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2648 13:43:09.480122 tftpboot 192.168.201.1 11884128/tftp-deploy-rp3u64le/kernel/bzIploy-rp3u64le/kernel/cmdline 11884128/tftp-deploy-rp3u64le/ramdisk/ramdisk.cpio.gz
2649 13:43:09.480594
2650 13:43:09.480849 Waiting for link
2651 13:43:09.683640
2652 13:43:09.684103 done.
2653 13:43:09.684373
2654 13:43:09.684634 MAC: 00:e0:4c:68:02:ef
2655 13:43:09.684857
2656 13:43:09.687543 Sending DHCP discover... done.
2657 13:43:09.687903
2658 13:43:09.690322 Waiting for reply... done.
2659 13:43:09.690690
2660 13:43:09.693730 Sending DHCP request... done.
2661 13:43:09.694077
2662 13:43:09.700414 Waiting for reply... done.
2663 13:43:09.700871
2664 13:43:09.701167 My ip is 192.168.201.16
2665 13:43:09.701432
2666 13:43:09.703682 The DHCP server ip is 192.168.201.1
2667 13:43:09.706931
2668 13:43:09.710370 TFTP server IP predefined by user: 192.168.201.1
2669 13:43:09.710717
2670 13:43:09.716822 Bootfile predefined by user: 11884128/tftp-deploy-rp3u64le/kernel/bzImage
2671 13:43:09.717283
2672 13:43:09.720305 Sending tftp read request... done.
2673 13:43:09.720684
2674 13:43:09.727538 Waiting for the transfer...
2675 13:43:09.727926
2676 13:43:09.957653 00000000 ################################################################
2677 13:43:09.957777
2678 13:43:10.186578 00080000 ################################################################
2679 13:43:10.186705
2680 13:43:10.415047 00100000 ################################################################
2681 13:43:10.415171
2682 13:43:10.641069 00180000 ################################################################
2683 13:43:10.641192
2684 13:43:10.868947 00200000 ################################################################
2685 13:43:10.869083
2686 13:43:11.096292 00280000 ################################################################
2687 13:43:11.096417
2688 13:43:11.324940 00300000 ################################################################
2689 13:43:11.325067
2690 13:43:11.553190 00380000 ################################################################
2691 13:43:11.553319
2692 13:43:11.778725 00400000 ################################################################
2693 13:43:11.778880
2694 13:43:12.004823 00480000 ################################################################
2695 13:43:12.004954
2696 13:43:12.229346 00500000 ################################################################
2697 13:43:12.229500
2698 13:43:12.455399 00580000 ################################################################
2699 13:43:12.455539
2700 13:43:12.683588 00600000 ################################################################
2701 13:43:12.683728
2702 13:43:12.912796 00680000 ################################################################
2703 13:43:12.912939
2704 13:43:13.141344 00700000 ################################################################
2705 13:43:13.141507
2706 13:43:13.369927 00780000 ################################################################
2707 13:43:13.370063
2708 13:43:13.452590 00800000 ####################### done.
2709 13:43:13.452684
2710 13:43:13.456020 The bootfile was 8576912 bytes long.
2711 13:43:13.456099
2712 13:43:13.459107 Sending tftp read request... done.
2713 13:43:13.459183
2714 13:43:13.462442 Waiting for the transfer...
2715 13:43:13.462533
2716 13:43:13.691078 00000000 ################################################################
2717 13:43:13.691207
2718 13:43:13.916903 00080000 ################################################################
2719 13:43:13.917042
2720 13:43:14.142088 00100000 ################################################################
2721 13:43:14.142223
2722 13:43:14.369039 00180000 ################################################################
2723 13:43:14.369181
2724 13:43:14.595560 00200000 ################################################################
2725 13:43:14.595698
2726 13:43:14.822983 00280000 ################################################################
2727 13:43:14.823132
2728 13:43:15.050855 00300000 ################################################################
2729 13:43:15.051007
2730 13:43:15.278948 00380000 ################################################################
2731 13:43:15.279095
2732 13:43:15.505647 00400000 ################################################################
2733 13:43:15.505815
2734 13:43:15.732992 00480000 ################################################################
2735 13:43:15.733132
2736 13:43:15.959719 00500000 ################################################################
2737 13:43:15.959862
2738 13:43:16.186225 00580000 ################################################################
2739 13:43:16.186370
2740 13:43:16.412957 00600000 ################################################################
2741 13:43:16.413094
2742 13:43:16.639622 00680000 ################################################################
2743 13:43:16.639770
2744 13:43:16.867070 00700000 ################################################################
2745 13:43:16.867214
2746 13:43:17.093916 00780000 ################################################################
2747 13:43:17.094053
2748 13:43:17.282401 00800000 ##################################################### done.
2749 13:43:17.282540
2750 13:43:17.285681 Sending tftp read request... done.
2751 13:43:17.285759
2752 13:43:17.285823 Waiting for the transfer...
2753 13:43:17.288924
2754 13:43:17.288993 00000000 # done.
2755 13:43:17.289053
2756 13:43:17.299086 Command line loaded dynamically from TFTP file: 11884128/tftp-deploy-rp3u64le/kernel/cmdline
2757 13:43:17.299156
2758 13:43:17.312133 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2759 13:43:17.320109
2760 13:43:17.323172 Shutting down all USB controllers.
2761 13:43:17.323231
2762 13:43:17.323285 Removing current net device
2763 13:43:17.323335
2764 13:43:17.326383 Finalizing coreboot
2765 13:43:17.326449
2766 13:43:17.333066 Exiting depthcharge with code 4 at timestamp: 20317651
2767 13:43:17.333131
2768 13:43:17.333184
2769 13:43:17.333232 Starting kernel ...
2770 13:43:17.333299
2771 13:43:17.333351
2772 13:43:17.333707 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2773 13:43:17.333791 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2774 13:43:17.333851 Setting prompt string to ['Linux version [0-9]']
2775 13:43:17.333920 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2776 13:43:17.333976 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2778 13:47:48.334579 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2780 13:47:48.335404 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2782 13:47:48.336012 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2785 13:47:48.337025 end: 2 depthcharge-action (duration 00:05:00) [common]
2787 13:47:48.337909 Cleaning after the job
2788 13:47:48.338238 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884128/tftp-deploy-rp3u64le/ramdisk
2789 13:47:48.339918 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884128/tftp-deploy-rp3u64le/kernel
2790 13:47:48.340901 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884128/tftp-deploy-rp3u64le/modules
2791 13:47:48.341165 start: 5.1 power-off (timeout 00:00:30) [common]
2792 13:47:48.341308 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=off'
2793 13:47:48.420000 >> Command sent successfully.
2794 13:47:48.428204 Returned 0 in 0 seconds
2795 13:47:48.529191 end: 5.1 power-off (duration 00:00:00) [common]
2797 13:47:48.530405 start: 5.2 read-feedback (timeout 00:10:00) [common]
2798 13:47:48.531244 Listened to connection for namespace 'common' for up to 1s
2800 13:47:48.532236 Listened to connection for namespace 'common' for up to 1s
2801 13:47:49.532143 Finalising connection for namespace 'common'
2802 13:47:49.532712 Disconnecting from shell: Finalise
2803 13:47:49.533035
2804 13:47:49.633830 end: 5.2 read-feedback (duration 00:00:01) [common]
2805 13:47:49.634358 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11884128
2806 13:47:49.647496 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11884128
2807 13:47:49.647629 JobError: Your job cannot terminate cleanly.