Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 13:49:07.231055 lava-dispatcher, installed at version: 2023.08
2 13:49:07.231305 start: 0 validate
3 13:49:07.231441 Start time: 2023-10-26 13:49:07.231433+00:00 (UTC)
4 13:49:07.231571 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:49:07.231709 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 13:49:07.494746 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:49:07.495404 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:49:07.750232 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:49:07.750882 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 13:49:08.019282 validate duration: 0.79
12 13:49:08.020672 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:49:08.021218 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:49:08.021721 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:49:08.022306 Not decompressing ramdisk as can be used compressed.
16 13:49:08.022735 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 13:49:08.023063 saving as /var/lib/lava/dispatcher/tmp/11884149/tftp-deploy-2nqlo6o5/ramdisk/rootfs.cpio.gz
18 13:49:08.023387 total size: 8418130 (8 MB)
19 13:49:08.028233 progress 0 % (0 MB)
20 13:49:08.040340 progress 5 % (0 MB)
21 13:49:08.048705 progress 10 % (0 MB)
22 13:49:08.054526 progress 15 % (1 MB)
23 13:49:08.059231 progress 20 % (1 MB)
24 13:49:08.063332 progress 25 % (2 MB)
25 13:49:08.066926 progress 30 % (2 MB)
26 13:49:08.069922 progress 35 % (2 MB)
27 13:49:08.073013 progress 40 % (3 MB)
28 13:49:08.075817 progress 45 % (3 MB)
29 13:49:08.078505 progress 50 % (4 MB)
30 13:49:08.081017 progress 55 % (4 MB)
31 13:49:08.083483 progress 60 % (4 MB)
32 13:49:08.085759 progress 65 % (5 MB)
33 13:49:08.088213 progress 70 % (5 MB)
34 13:49:08.090626 progress 75 % (6 MB)
35 13:49:08.093041 progress 80 % (6 MB)
36 13:49:08.095461 progress 85 % (6 MB)
37 13:49:08.097903 progress 90 % (7 MB)
38 13:49:08.100376 progress 95 % (7 MB)
39 13:49:08.102632 progress 100 % (8 MB)
40 13:49:08.102887 8 MB downloaded in 0.08 s (100.96 MB/s)
41 13:49:08.103057 end: 1.1.1 http-download (duration 00:00:00) [common]
43 13:49:08.103317 end: 1.1 download-retry (duration 00:00:00) [common]
44 13:49:08.103409 start: 1.2 download-retry (timeout 00:10:00) [common]
45 13:49:08.103497 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 13:49:08.103649 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 13:49:08.103726 saving as /var/lib/lava/dispatcher/tmp/11884149/tftp-deploy-2nqlo6o5/kernel/bzImage
48 13:49:08.103792 total size: 8576912 (8 MB)
49 13:49:08.103857 No compression specified
50 13:49:08.105110 progress 0 % (0 MB)
51 13:49:08.107640 progress 5 % (0 MB)
52 13:49:08.110147 progress 10 % (0 MB)
53 13:49:08.112614 progress 15 % (1 MB)
54 13:49:08.115072 progress 20 % (1 MB)
55 13:49:08.117570 progress 25 % (2 MB)
56 13:49:08.120056 progress 30 % (2 MB)
57 13:49:08.122517 progress 35 % (2 MB)
58 13:49:08.125009 progress 40 % (3 MB)
59 13:49:08.127471 progress 45 % (3 MB)
60 13:49:08.130017 progress 50 % (4 MB)
61 13:49:08.132505 progress 55 % (4 MB)
62 13:49:08.135104 progress 60 % (4 MB)
63 13:49:08.137588 progress 65 % (5 MB)
64 13:49:08.140045 progress 70 % (5 MB)
65 13:49:08.142488 progress 75 % (6 MB)
66 13:49:08.144943 progress 80 % (6 MB)
67 13:49:08.147353 progress 85 % (6 MB)
68 13:49:08.149850 progress 90 % (7 MB)
69 13:49:08.152329 progress 95 % (7 MB)
70 13:49:08.154783 progress 100 % (8 MB)
71 13:49:08.155005 8 MB downloaded in 0.05 s (159.73 MB/s)
72 13:49:08.155157 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:49:08.155399 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:49:08.155490 start: 1.3 download-retry (timeout 00:10:00) [common]
76 13:49:08.155579 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 13:49:08.155721 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 13:49:08.155801 saving as /var/lib/lava/dispatcher/tmp/11884149/tftp-deploy-2nqlo6o5/modules/modules.tar
79 13:49:08.155865 total size: 253872 (0 MB)
80 13:49:08.155932 Using unxz to decompress xz
81 13:49:08.160607 progress 12 % (0 MB)
82 13:49:08.161052 progress 25 % (0 MB)
83 13:49:08.161341 progress 38 % (0 MB)
84 13:49:08.163100 progress 51 % (0 MB)
85 13:49:08.165179 progress 64 % (0 MB)
86 13:49:08.167287 progress 77 % (0 MB)
87 13:49:08.169356 progress 90 % (0 MB)
88 13:49:08.171306 progress 100 % (0 MB)
89 13:49:08.177617 0 MB downloaded in 0.02 s (11.13 MB/s)
90 13:49:08.177871 end: 1.3.1 http-download (duration 00:00:00) [common]
92 13:49:08.178150 end: 1.3 download-retry (duration 00:00:00) [common]
93 13:49:08.178251 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 13:49:08.178351 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 13:49:08.178442 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 13:49:08.178537 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 13:49:08.178782 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr
98 13:49:08.178933 makedir: /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin
99 13:49:08.179048 makedir: /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/tests
100 13:49:08.179156 makedir: /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/results
101 13:49:08.179282 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-add-keys
102 13:49:08.179441 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-add-sources
103 13:49:08.179582 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-background-process-start
104 13:49:08.179724 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-background-process-stop
105 13:49:08.179861 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-common-functions
106 13:49:08.180005 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-echo-ipv4
107 13:49:08.180175 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-install-packages
108 13:49:08.180311 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-installed-packages
109 13:49:08.180447 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-os-build
110 13:49:08.180583 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-probe-channel
111 13:49:08.180719 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-probe-ip
112 13:49:08.180856 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-target-ip
113 13:49:08.180990 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-target-mac
114 13:49:08.181125 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-target-storage
115 13:49:08.181264 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-test-case
116 13:49:08.181400 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-test-event
117 13:49:08.181541 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-test-feedback
118 13:49:08.181675 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-test-raise
119 13:49:08.181815 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-test-reference
120 13:49:08.181951 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-test-runner
121 13:49:08.182086 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-test-set
122 13:49:08.182224 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-test-shell
123 13:49:08.182363 Updating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-install-packages (oe)
124 13:49:08.182530 Updating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/bin/lava-installed-packages (oe)
125 13:49:08.182663 Creating /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/environment
126 13:49:08.182771 LAVA metadata
127 13:49:08.182850 - LAVA_JOB_ID=11884149
128 13:49:08.182920 - LAVA_DISPATCHER_IP=192.168.201.1
129 13:49:08.183030 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 13:49:08.183104 skipped lava-vland-overlay
131 13:49:08.183187 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 13:49:08.183275 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 13:49:08.183343 skipped lava-multinode-overlay
134 13:49:08.183429 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 13:49:08.183516 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 13:49:08.183594 Loading test definitions
137 13:49:08.183692 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 13:49:08.183777 Using /lava-11884149 at stage 0
139 13:49:08.184248 uuid=11884149_1.4.2.3.1 testdef=None
140 13:49:08.184346 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 13:49:08.184440 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 13:49:08.185014 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 13:49:08.185248 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 13:49:08.185942 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 13:49:08.186306 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 13:49:08.187060 runner path: /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/0/tests/0_dmesg test_uuid 11884149_1.4.2.3.1
149 13:49:08.187230 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 13:49:08.187479 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 13:49:08.187556 Using /lava-11884149 at stage 1
153 13:49:08.187883 uuid=11884149_1.4.2.3.5 testdef=None
154 13:49:08.187975 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 13:49:08.188110 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 13:49:08.188693 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 13:49:08.188923 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 13:49:08.189695 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 13:49:08.189936 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 13:49:08.190711 runner path: /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/1/tests/1_bootrr test_uuid 11884149_1.4.2.3.5
163 13:49:08.190876 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 13:49:08.191099 Creating lava-test-runner.conf files
166 13:49:08.191166 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/0 for stage 0
167 13:49:08.191263 - 0_dmesg
168 13:49:08.191347 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11884149/lava-overlay-w25ai9hr/lava-11884149/1 for stage 1
169 13:49:08.191444 - 1_bootrr
170 13:49:08.191545 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 13:49:08.191649 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 13:49:08.201027 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 13:49:08.201139 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 13:49:08.201230 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 13:49:08.201322 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 13:49:08.201411 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 13:49:08.489542 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 13:49:08.489995 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 13:49:08.490165 extracting modules file /var/lib/lava/dispatcher/tmp/11884149/tftp-deploy-2nqlo6o5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884149/extract-overlay-ramdisk-qh212u2c/ramdisk
180 13:49:08.507486 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 13:49:08.507619 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 13:49:08.507726 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11884149/compress-overlay-o5sjgegm/overlay-1.4.2.4.tar.gz to ramdisk
183 13:49:08.507803 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11884149/compress-overlay-o5sjgegm/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11884149/extract-overlay-ramdisk-qh212u2c/ramdisk
184 13:49:08.517634 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 13:49:08.517770 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 13:49:08.517865 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 13:49:08.517962 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 13:49:08.518043 Building ramdisk /var/lib/lava/dispatcher/tmp/11884149/extract-overlay-ramdisk-qh212u2c/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11884149/extract-overlay-ramdisk-qh212u2c/ramdisk
189 13:49:08.676890 >> 49827 blocks
190 13:49:09.634706 rename /var/lib/lava/dispatcher/tmp/11884149/extract-overlay-ramdisk-qh212u2c/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11884149/tftp-deploy-2nqlo6o5/ramdisk/ramdisk.cpio.gz
191 13:49:09.635185 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 13:49:09.635324 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 13:49:09.635436 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 13:49:09.635544 No mkimage arch provided, not using FIT.
195 13:49:09.635644 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 13:49:09.635744 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 13:49:09.635862 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 13:49:09.635965 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 13:49:09.636061 No LXC device requested
200 13:49:09.636149 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 13:49:09.636243 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 13:49:09.636331 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 13:49:09.636415 Checking files for TFTP limit of 4294967296 bytes.
204 13:49:09.636863 end: 1 tftp-deploy (duration 00:00:02) [common]
205 13:49:09.636974 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 13:49:09.637077 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 13:49:09.637215 substitutions:
208 13:49:09.637287 - {DTB}: None
209 13:49:09.637355 - {INITRD}: 11884149/tftp-deploy-2nqlo6o5/ramdisk/ramdisk.cpio.gz
210 13:49:09.637420 - {KERNEL}: 11884149/tftp-deploy-2nqlo6o5/kernel/bzImage
211 13:49:09.637484 - {LAVA_MAC}: None
212 13:49:09.637544 - {PRESEED_CONFIG}: None
213 13:49:09.637605 - {PRESEED_LOCAL}: None
214 13:49:09.637664 - {RAMDISK}: 11884149/tftp-deploy-2nqlo6o5/ramdisk/ramdisk.cpio.gz
215 13:49:09.637724 - {ROOT_PART}: None
216 13:49:09.637783 - {ROOT}: None
217 13:49:09.637842 - {SERVER_IP}: 192.168.201.1
218 13:49:09.637900 - {TEE}: None
219 13:49:09.637959 Parsed boot commands:
220 13:49:09.638017 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 13:49:09.638215 Parsed boot commands: tftpboot 192.168.201.1 11884149/tftp-deploy-2nqlo6o5/kernel/bzImage 11884149/tftp-deploy-2nqlo6o5/kernel/cmdline 11884149/tftp-deploy-2nqlo6o5/ramdisk/ramdisk.cpio.gz
222 13:49:09.638310 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 13:49:09.638402 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 13:49:09.638503 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 13:49:09.638597 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 13:49:09.638676 Not connected, no need to disconnect.
227 13:49:09.638757 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 13:49:09.638976 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 13:49:09.639050 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
230 13:49:09.643428 Setting prompt string to ['lava-test: # ']
231 13:49:09.643825 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 13:49:09.643944 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 13:49:09.644062 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 13:49:09.644169 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 13:49:09.644389 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
236 13:49:14.794141 >> Command sent successfully.
237 13:49:14.804856 Returned 0 in 5 seconds
238 13:49:14.906030 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 13:49:14.907496 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 13:49:14.908108 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 13:49:14.908635 Setting prompt string to 'Starting depthcharge on Helios...'
243 13:49:14.909046 Changing prompt to 'Starting depthcharge on Helios...'
244 13:49:14.909500 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 13:49:14.910824 [Enter `^Ec?' for help]
246 13:49:15.554919
247 13:49:15.555612
248 13:49:15.564723 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 13:49:15.568435 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 13:49:15.574537 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 13:49:15.577924 CPU: AES supported, TXT NOT supported, VT supported
252 13:49:15.585334 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 13:49:15.588242 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 13:49:15.595558 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 13:49:15.598479 VBOOT: Loading verstage.
256 13:49:15.601985 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 13:49:15.608480 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 13:49:15.611994 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 13:49:15.615183 CBFS @ c08000 size 3f8000
260 13:49:15.622126 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 13:49:15.625212 CBFS: Locating 'fallback/verstage'
262 13:49:15.628286 CBFS: Found @ offset 10fb80 size 1072c
263 13:49:15.631699
264 13:49:15.632139
265 13:49:15.641569 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 13:49:15.656934 Probing TPM: . done!
267 13:49:15.659131 TPM ready after 0 ms
268 13:49:15.662441 Connected to device vid:did:rid of 1ae0:0028:00
269 13:49:15.673301 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
270 13:49:15.676702 Initialized TPM device CR50 revision 0
271 13:49:15.722404 tlcl_send_startup: Startup return code is 0
272 13:49:15.722890 TPM: setup succeeded
273 13:49:15.734671 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 13:49:15.738913 Chrome EC: UHEPI supported
275 13:49:15.742009 Phase 1
276 13:49:15.745131 FMAP: area GBB found @ c05000 (12288 bytes)
277 13:49:15.751615 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 13:49:15.752068 Phase 2
279 13:49:15.755153 Phase 3
280 13:49:15.758353 FMAP: area GBB found @ c05000 (12288 bytes)
281 13:49:15.765412 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 13:49:15.772045 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
283 13:49:15.775460 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
284 13:49:15.781784 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 13:49:15.797196 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
286 13:49:15.800353 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
287 13:49:15.807000 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 13:49:15.811919 Phase 4
289 13:49:15.814920 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
290 13:49:15.821766 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 13:49:16.000672 VB2:vb2_rsa_verify_digest() Digest check failed!
292 13:49:16.007937 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 13:49:16.008522 Saving nvdata
294 13:49:16.011204 Reboot requested (10020007)
295 13:49:16.014696 board_reset() called!
296 13:49:16.015241 full_reset() called!
297 13:49:20.521982
298 13:49:20.522130
299 13:49:20.531796 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 13:49:20.534954 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 13:49:20.541777 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 13:49:20.545434 CPU: AES supported, TXT NOT supported, VT supported
303 13:49:20.551299 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 13:49:20.555104 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 13:49:20.561798 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 13:49:20.564681 VBOOT: Loading verstage.
307 13:49:20.568462 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 13:49:20.574624 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 13:49:20.578402 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 13:49:20.581721 CBFS @ c08000 size 3f8000
311 13:49:20.588131 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 13:49:20.591312 CBFS: Locating 'fallback/verstage'
313 13:49:20.594486 CBFS: Found @ offset 10fb80 size 1072c
314 13:49:20.597985
315 13:49:20.598077
316 13:49:20.607959 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 13:49:20.622251 Probing TPM: . done!
318 13:49:20.626170 TPM ready after 0 ms
319 13:49:20.629342 Connected to device vid:did:rid of 1ae0:0028:00
320 13:49:20.639227 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 13:49:20.644505 Initialized TPM device CR50 revision 0
322 13:49:20.688155 tlcl_send_startup: Startup return code is 0
323 13:49:20.688256 TPM: setup succeeded
324 13:49:20.701123 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 13:49:20.705017 Chrome EC: UHEPI supported
326 13:49:20.707891 Phase 1
327 13:49:20.711358 FMAP: area GBB found @ c05000 (12288 bytes)
328 13:49:20.718066 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 13:49:20.724500 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 13:49:20.727766 Recovery requested (1009000e)
331 13:49:20.733701 Saving nvdata
332 13:49:20.739808 tlcl_extend: response is 0
333 13:49:20.748731 tlcl_extend: response is 0
334 13:49:20.756703 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 13:49:20.758992 CBFS @ c08000 size 3f8000
336 13:49:20.765640 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 13:49:20.768922 CBFS: Locating 'fallback/romstage'
338 13:49:20.772628 CBFS: Found @ offset 80 size 145fc
339 13:49:20.775712 Accumulated console time in verstage 98 ms
340 13:49:20.775795
341 13:49:20.775867
342 13:49:20.788679 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 13:49:20.795463 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 13:49:20.798617 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 13:49:20.801893 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 13:49:20.809270 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 13:49:20.811683 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 13:49:20.815444 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
349 13:49:20.818639 TCO_STS: 0000 0000
350 13:49:20.821981 GEN_PMCON: e0015238 00000200
351 13:49:20.824932 GBLRST_CAUSE: 00000000 00000000
352 13:49:20.825025 prev_sleep_state 5
353 13:49:20.828617 Boot Count incremented to 64836
354 13:49:20.835145 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 13:49:20.838837 CBFS @ c08000 size 3f8000
356 13:49:20.845831 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 13:49:20.845928 CBFS: Locating 'fspm.bin'
358 13:49:20.852110 CBFS: Found @ offset 5ffc0 size 71000
359 13:49:20.855590 Chrome EC: UHEPI supported
360 13:49:20.861883 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 13:49:20.865275 Probing TPM: done!
362 13:49:20.872147 Connected to device vid:did:rid of 1ae0:0028:00
363 13:49:20.882065 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
364 13:49:20.887837 Initialized TPM device CR50 revision 0
365 13:49:20.896726 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 13:49:20.903251 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 13:49:20.906894 MRC cache found, size 1948
368 13:49:20.909997 bootmode is set to: 2
369 13:49:20.913239 PRMRR disabled by config.
370 13:49:20.913320 SPD INDEX = 1
371 13:49:20.919788 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 13:49:20.923079 CBFS @ c08000 size 3f8000
373 13:49:20.929724 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 13:49:20.929806 CBFS: Locating 'spd.bin'
375 13:49:20.933407 CBFS: Found @ offset 5fb80 size 400
376 13:49:20.936720 SPD: module type is LPDDR3
377 13:49:20.939640 SPD: module part is
378 13:49:20.946502 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 13:49:20.949692 SPD: device width 4 bits, bus width 8 bits
380 13:49:20.952823 SPD: module size is 4096 MB (per channel)
381 13:49:20.956548 memory slot: 0 configuration done.
382 13:49:20.959832 memory slot: 2 configuration done.
383 13:49:21.010916 CBMEM:
384 13:49:21.014089 IMD: root @ 99fff000 254 entries.
385 13:49:21.017878 IMD: root @ 99ffec00 62 entries.
386 13:49:21.020677 External stage cache:
387 13:49:21.024137 IMD: root @ 9abff000 254 entries.
388 13:49:21.027572 IMD: root @ 9abfec00 62 entries.
389 13:49:21.030917 Chrome EC: clear events_b mask to 0x0000000020004000
390 13:49:21.046674 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 13:49:21.060052 tlcl_write: response is 0
392 13:49:21.069306 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 13:49:21.076071 MRC: TPM MRC hash updated successfully.
394 13:49:21.076158 2 DIMMs found
395 13:49:21.079577 SMM Memory Map
396 13:49:21.082840 SMRAM : 0x9a000000 0x1000000
397 13:49:21.085893 Subregion 0: 0x9a000000 0xa00000
398 13:49:21.089246 Subregion 1: 0x9aa00000 0x200000
399 13:49:21.092581 Subregion 2: 0x9ac00000 0x400000
400 13:49:21.096487 top_of_ram = 0x9a000000
401 13:49:21.099299 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 13:49:21.105881 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 13:49:21.109181 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 13:49:21.115879 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 13:49:21.118771 CBFS @ c08000 size 3f8000
406 13:49:21.122148 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 13:49:21.125329 CBFS: Locating 'fallback/postcar'
408 13:49:21.132192 CBFS: Found @ offset 107000 size 4b44
409 13:49:21.135205 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 13:49:21.148093 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 13:49:21.151562 Processing 180 relocs. Offset value of 0x97c0c000
412 13:49:21.159672 Accumulated console time in romstage 286 ms
413 13:49:21.159765
414 13:49:21.159838
415 13:49:21.169762 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 13:49:21.176473 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 13:49:21.179612 CBFS @ c08000 size 3f8000
418 13:49:21.182647 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 13:49:21.189456 CBFS: Locating 'fallback/ramstage'
420 13:49:21.192548 CBFS: Found @ offset 43380 size 1b9e8
421 13:49:21.199576 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 13:49:21.231406 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 13:49:21.234724 Processing 3976 relocs. Offset value of 0x98db0000
424 13:49:21.241461 Accumulated console time in postcar 52 ms
425 13:49:21.241548
426 13:49:21.241624
427 13:49:21.251824 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 13:49:21.258202 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 13:49:21.261822 WARNING: RO_VPD is uninitialized or empty.
430 13:49:21.264972 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 13:49:21.271619 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 13:49:21.271709 Normal boot.
433 13:49:21.279499 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 13:49:21.281688 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 13:49:21.284798 CBFS @ c08000 size 3f8000
436 13:49:21.291670 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 13:49:21.294438 CBFS: Locating 'cpu_microcode_blob.bin'
438 13:49:21.297873 CBFS: Found @ offset 14700 size 2ec00
439 13:49:21.301567 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 13:49:21.304743 Skip microcode update
441 13:49:21.308194 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 13:49:21.311415 CBFS @ c08000 size 3f8000
443 13:49:21.317883 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 13:49:21.321321 CBFS: Locating 'fsps.bin'
445 13:49:21.324340 CBFS: Found @ offset d1fc0 size 35000
446 13:49:21.349933 Detected 4 core, 8 thread CPU.
447 13:49:21.353061 Setting up SMI for CPU
448 13:49:21.356266 IED base = 0x9ac00000
449 13:49:21.356345 IED size = 0x00400000
450 13:49:21.359676 Will perform SMM setup.
451 13:49:21.366374 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 13:49:21.373091 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 13:49:21.376862 Processing 16 relocs. Offset value of 0x00030000
454 13:49:21.379778 Attempting to start 7 APs
455 13:49:21.383634 Waiting for 10ms after sending INIT.
456 13:49:21.399429 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
457 13:49:21.399519 done.
458 13:49:21.403151 AP: slot 1 apic_id 3.
459 13:49:21.406613 AP: slot 4 apic_id 2.
460 13:49:21.406698 AP: slot 7 apic_id 6.
461 13:49:21.409854 AP: slot 6 apic_id 7.
462 13:49:21.412944 Waiting for 2nd SIPI to complete...done.
463 13:49:21.416456 AP: slot 2 apic_id 5.
464 13:49:21.419610 AP: slot 5 apic_id 4.
465 13:49:21.426714 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 13:49:21.429465 Processing 13 relocs. Offset value of 0x00038000
467 13:49:21.435940 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 13:49:21.442571 Installing SMM handler to 0x9a000000
469 13:49:21.449261 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 13:49:21.452763 Processing 658 relocs. Offset value of 0x9a010000
471 13:49:21.462482 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 13:49:21.466172 Processing 13 relocs. Offset value of 0x9a008000
473 13:49:21.472574 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 13:49:21.479353 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 13:49:21.485958 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 13:49:21.489295 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 13:49:21.495446 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 13:49:21.502335 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 13:49:21.506605 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 13:49:21.512796 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 13:49:21.515712 Clearing SMI status registers
482 13:49:21.519269 SMI_STS: PM1
483 13:49:21.519356 PM1_STS: PWRBTN
484 13:49:21.522195 TCO_STS: SECOND_TO
485 13:49:21.525580 New SMBASE 0x9a000000
486 13:49:21.528957 In relocation handler: CPU 0
487 13:49:21.532174 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 13:49:21.535689 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 13:49:21.538948 Relocation complete.
490 13:49:21.542333 New SMBASE 0x99fff400
491 13:49:21.542420 In relocation handler: CPU 3
492 13:49:21.549017 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
493 13:49:21.552296 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 13:49:21.556158 Relocation complete.
495 13:49:21.556241 New SMBASE 0x99ffec00
496 13:49:21.558817 In relocation handler: CPU 5
497 13:49:21.565725 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
498 13:49:21.569306 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 13:49:21.572563 Relocation complete.
500 13:49:21.572649 New SMBASE 0x99fff800
501 13:49:21.575578 In relocation handler: CPU 2
502 13:49:21.578882 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
503 13:49:21.585797 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 13:49:21.588977 Relocation complete.
505 13:49:21.589063 New SMBASE 0x99fff000
506 13:49:21.592367 In relocation handler: CPU 4
507 13:49:21.595815 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
508 13:49:21.602583 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 13:49:21.605851 Relocation complete.
510 13:49:21.605937 New SMBASE 0x99fffc00
511 13:49:21.609306 In relocation handler: CPU 1
512 13:49:21.612232 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
513 13:49:21.619163 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 13:49:21.619249 Relocation complete.
515 13:49:21.622548 New SMBASE 0x99ffe400
516 13:49:21.625569 In relocation handler: CPU 7
517 13:49:21.629410 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
518 13:49:21.635800 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 13:49:21.635890 Relocation complete.
520 13:49:21.639005 New SMBASE 0x99ffe800
521 13:49:21.642424 In relocation handler: CPU 6
522 13:49:21.645674 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
523 13:49:21.652256 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 13:49:21.652350 Relocation complete.
525 13:49:21.655585 Initializing CPU #0
526 13:49:21.658681 CPU: vendor Intel device 806ec
527 13:49:21.662458 CPU: family 06, model 8e, stepping 0c
528 13:49:21.665746 Clearing out pending MCEs
529 13:49:21.669612 Setting up local APIC...
530 13:49:21.669806 apic_id: 0x00 done.
531 13:49:21.672146 Turbo is available but hidden
532 13:49:21.675591 Turbo is available and visible
533 13:49:21.678774 VMX status: enabled
534 13:49:21.682569 IA32_FEATURE_CONTROL status: locked
535 13:49:21.682702 Skip microcode update
536 13:49:21.685791 CPU #0 initialized
537 13:49:21.689094 Initializing CPU #3
538 13:49:21.689242 Initializing CPU #4
539 13:49:21.692569 Initializing CPU #1
540 13:49:21.695557 CPU: vendor Intel device 806ec
541 13:49:21.699177 CPU: family 06, model 8e, stepping 0c
542 13:49:21.702774 CPU: vendor Intel device 806ec
543 13:49:21.705899 CPU: family 06, model 8e, stepping 0c
544 13:49:21.709359 Clearing out pending MCEs
545 13:49:21.712668 Clearing out pending MCEs
546 13:49:21.713028 Setting up local APIC...
547 13:49:21.715868 Initializing CPU #5
548 13:49:21.719423 Initializing CPU #2
549 13:49:21.722809 CPU: vendor Intel device 806ec
550 13:49:21.726048 CPU: family 06, model 8e, stepping 0c
551 13:49:21.729232 CPU: vendor Intel device 806ec
552 13:49:21.732699 CPU: family 06, model 8e, stepping 0c
553 13:49:21.735928 Clearing out pending MCEs
554 13:49:21.736393 Clearing out pending MCEs
555 13:49:21.739610 Setting up local APIC...
556 13:49:21.742459 Setting up local APIC...
557 13:49:21.745575 Initializing CPU #7
558 13:49:21.745994 Initializing CPU #6
559 13:49:21.748972 CPU: vendor Intel device 806ec
560 13:49:21.752164 CPU: family 06, model 8e, stepping 0c
561 13:49:21.755546 CPU: vendor Intel device 806ec
562 13:49:21.758961 CPU: family 06, model 8e, stepping 0c
563 13:49:21.762611 Clearing out pending MCEs
564 13:49:21.765894 Clearing out pending MCEs
565 13:49:21.769086 Setting up local APIC...
566 13:49:21.772215 CPU: vendor Intel device 806ec
567 13:49:21.776238 CPU: family 06, model 8e, stepping 0c
568 13:49:21.778898 Clearing out pending MCEs
569 13:49:21.779318 apic_id: 0x03 done.
570 13:49:21.782224 apic_id: 0x02 done.
571 13:49:21.782717 VMX status: enabled
572 13:49:21.785884 VMX status: enabled
573 13:49:21.789143 IA32_FEATURE_CONTROL status: locked
574 13:49:21.792396 IA32_FEATURE_CONTROL status: locked
575 13:49:21.796053 Skip microcode update
576 13:49:21.799323 Skip microcode update
577 13:49:21.799880 CPU #1 initialized
578 13:49:21.802749 CPU #4 initialized
579 13:49:21.803171 apic_id: 0x06 done.
580 13:49:21.805687 Setting up local APIC...
581 13:49:21.808770 Setting up local APIC...
582 13:49:21.812093 apic_id: 0x04 done.
583 13:49:21.812518 Setting up local APIC...
584 13:49:21.815408 apic_id: 0x01 done.
585 13:49:21.818734 VMX status: enabled
586 13:49:21.819124 apic_id: 0x05 done.
587 13:49:21.822384 IA32_FEATURE_CONTROL status: locked
588 13:49:21.825504 VMX status: enabled
589 13:49:21.829143 Skip microcode update
590 13:49:21.832461 IA32_FEATURE_CONTROL status: locked
591 13:49:21.832950 apic_id: 0x07 done.
592 13:49:21.835750 VMX status: enabled
593 13:49:21.839031 VMX status: enabled
594 13:49:21.842915 IA32_FEATURE_CONTROL status: locked
595 13:49:21.845960 IA32_FEATURE_CONTROL status: locked
596 13:49:21.846380 Skip microcode update
597 13:49:21.848725 Skip microcode update
598 13:49:21.852446 Skip microcode update
599 13:49:21.852863 CPU #7 initialized
600 13:49:21.855634 CPU #6 initialized
601 13:49:21.859185 VMX status: enabled
602 13:49:21.859603 CPU #5 initialized
603 13:49:21.862205 CPU #2 initialized
604 13:49:21.865770 IA32_FEATURE_CONTROL status: locked
605 13:49:21.866191 Skip microcode update
606 13:49:21.869442 CPU #3 initialized
607 13:49:21.872054 bsp_do_flight_plan done after 457 msecs.
608 13:49:21.875533 CPU: frequency set to 4200 MHz
609 13:49:21.878709 Enabling SMIs.
610 13:49:21.879129 Locking SMM.
611 13:49:21.894051 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 13:49:21.897768 CBFS @ c08000 size 3f8000
613 13:49:21.903880 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 13:49:21.904371 CBFS: Locating 'vbt.bin'
615 13:49:21.907740 CBFS: Found @ offset 5f5c0 size 499
616 13:49:21.914623 Found a VBT of 4608 bytes after decompression
617 13:49:22.095608 Display FSP Version Info HOB
618 13:49:22.099035 Reference Code - CPU = 9.0.1e.30
619 13:49:22.102073 uCode Version = 0.0.0.ca
620 13:49:22.105818 TXT ACM version = ff.ff.ff.ffff
621 13:49:22.108833 Display FSP Version Info HOB
622 13:49:22.112096 Reference Code - ME = 9.0.1e.30
623 13:49:22.115726 MEBx version = 0.0.0.0
624 13:49:22.118779 ME Firmware Version = Consumer SKU
625 13:49:22.122403 Display FSP Version Info HOB
626 13:49:22.126066 Reference Code - CML PCH = 9.0.1e.30
627 13:49:22.128783 PCH-CRID Status = Disabled
628 13:49:22.131817 PCH-CRID Original Value = ff.ff.ff.ffff
629 13:49:22.135284 PCH-CRID New Value = ff.ff.ff.ffff
630 13:49:22.138661 OPROM - RST - RAID = ff.ff.ff.ffff
631 13:49:22.141962 ChipsetInit Base Version = ff.ff.ff.ffff
632 13:49:22.145578 ChipsetInit Oem Version = ff.ff.ff.ffff
633 13:49:22.148937 Display FSP Version Info HOB
634 13:49:22.152424 Reference Code - SA - System Agent = 9.0.1e.30
635 13:49:22.155542 Reference Code - MRC = 0.7.1.6c
636 13:49:22.159117 SA - PCIe Version = 9.0.1e.30
637 13:49:22.162657 SA-CRID Status = Disabled
638 13:49:22.166105 SA-CRID Original Value = 0.0.0.c
639 13:49:22.168710 SA-CRID New Value = 0.0.0.c
640 13:49:22.172525 OPROM - VBIOS = ff.ff.ff.ffff
641 13:49:22.172945 RTC Init
642 13:49:22.178749 Set power on after power failure.
643 13:49:22.179166 Disabling Deep S3
644 13:49:22.181902 Disabling Deep S3
645 13:49:22.182261 Disabling Deep S4
646 13:49:22.185539 Disabling Deep S4
647 13:49:22.185957 Disabling Deep S5
648 13:49:22.189106 Disabling Deep S5
649 13:49:22.195994 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 192 exit 1
650 13:49:22.196471 Enumerating buses...
651 13:49:22.202134 Show all devs... Before device enumeration.
652 13:49:22.202555 Root Device: enabled 1
653 13:49:22.205747 CPU_CLUSTER: 0: enabled 1
654 13:49:22.209124 DOMAIN: 0000: enabled 1
655 13:49:22.209544 APIC: 00: enabled 1
656 13:49:22.212160 PCI: 00:00.0: enabled 1
657 13:49:22.215746 PCI: 00:02.0: enabled 1
658 13:49:22.219109 PCI: 00:04.0: enabled 0
659 13:49:22.219528 PCI: 00:05.0: enabled 0
660 13:49:22.222634 PCI: 00:12.0: enabled 1
661 13:49:22.225724 PCI: 00:12.5: enabled 0
662 13:49:22.228509 PCI: 00:12.6: enabled 0
663 13:49:22.228927 PCI: 00:14.0: enabled 1
664 13:49:22.232251 PCI: 00:14.1: enabled 0
665 13:49:22.235674 PCI: 00:14.3: enabled 1
666 13:49:22.236138 PCI: 00:14.5: enabled 0
667 13:49:22.238947 PCI: 00:15.0: enabled 1
668 13:49:22.242609 PCI: 00:15.1: enabled 1
669 13:49:22.245426 PCI: 00:15.2: enabled 0
670 13:49:22.245846 PCI: 00:15.3: enabled 0
671 13:49:22.248468 PCI: 00:16.0: enabled 1
672 13:49:22.252163 PCI: 00:16.1: enabled 0
673 13:49:22.255261 PCI: 00:16.2: enabled 0
674 13:49:22.255824 PCI: 00:16.3: enabled 0
675 13:49:22.258814 PCI: 00:16.4: enabled 0
676 13:49:22.262399 PCI: 00:16.5: enabled 0
677 13:49:22.265078 PCI: 00:17.0: enabled 1
678 13:49:22.265504 PCI: 00:19.0: enabled 1
679 13:49:22.268510 PCI: 00:19.1: enabled 0
680 13:49:22.272113 PCI: 00:19.2: enabled 0
681 13:49:22.272535 PCI: 00:1a.0: enabled 0
682 13:49:22.275131 PCI: 00:1c.0: enabled 0
683 13:49:22.278963 PCI: 00:1c.1: enabled 0
684 13:49:22.281580 PCI: 00:1c.2: enabled 0
685 13:49:22.282004 PCI: 00:1c.3: enabled 0
686 13:49:22.285109 PCI: 00:1c.4: enabled 0
687 13:49:22.288489 PCI: 00:1c.5: enabled 0
688 13:49:22.291548 PCI: 00:1c.6: enabled 0
689 13:49:22.291970 PCI: 00:1c.7: enabled 0
690 13:49:22.295159 PCI: 00:1d.0: enabled 1
691 13:49:22.298497 PCI: 00:1d.1: enabled 0
692 13:49:22.301897 PCI: 00:1d.2: enabled 0
693 13:49:22.302319 PCI: 00:1d.3: enabled 0
694 13:49:22.305074 PCI: 00:1d.4: enabled 0
695 13:49:22.308529 PCI: 00:1d.5: enabled 1
696 13:49:22.308951 PCI: 00:1e.0: enabled 1
697 13:49:22.311691 PCI: 00:1e.1: enabled 0
698 13:49:22.315406 PCI: 00:1e.2: enabled 1
699 13:49:22.318430 PCI: 00:1e.3: enabled 1
700 13:49:22.318853 PCI: 00:1f.0: enabled 1
701 13:49:22.321699 PCI: 00:1f.1: enabled 1
702 13:49:22.325138 PCI: 00:1f.2: enabled 1
703 13:49:22.328222 PCI: 00:1f.3: enabled 1
704 13:49:22.328640 PCI: 00:1f.4: enabled 1
705 13:49:22.331936 PCI: 00:1f.5: enabled 1
706 13:49:22.335122 PCI: 00:1f.6: enabled 0
707 13:49:22.338256 USB0 port 0: enabled 1
708 13:49:22.338676 I2C: 00:15: enabled 1
709 13:49:22.341409 I2C: 00:5d: enabled 1
710 13:49:22.344743 GENERIC: 0.0: enabled 1
711 13:49:22.345160 I2C: 00:1a: enabled 1
712 13:49:22.348450 I2C: 00:38: enabled 1
713 13:49:22.351730 I2C: 00:39: enabled 1
714 13:49:22.352187 I2C: 00:3a: enabled 1
715 13:49:22.354902 I2C: 00:3b: enabled 1
716 13:49:22.358515 PCI: 00:00.0: enabled 1
717 13:49:22.358929 SPI: 00: enabled 1
718 13:49:22.361355 SPI: 01: enabled 1
719 13:49:22.364719 PNP: 0c09.0: enabled 1
720 13:49:22.365137 USB2 port 0: enabled 1
721 13:49:22.368196 USB2 port 1: enabled 1
722 13:49:22.371761 USB2 port 2: enabled 0
723 13:49:22.372345 USB2 port 3: enabled 0
724 13:49:22.374656 USB2 port 5: enabled 0
725 13:49:22.378467 USB2 port 6: enabled 1
726 13:49:22.378886 USB2 port 9: enabled 1
727 13:49:22.381218 USB3 port 0: enabled 1
728 13:49:22.384451 USB3 port 1: enabled 1
729 13:49:22.387983 USB3 port 2: enabled 1
730 13:49:22.388457 USB3 port 3: enabled 1
731 13:49:22.391609 USB3 port 4: enabled 0
732 13:49:22.394796 APIC: 03: enabled 1
733 13:49:22.395215 APIC: 05: enabled 1
734 13:49:22.397965 APIC: 01: enabled 1
735 13:49:22.398382 APIC: 02: enabled 1
736 13:49:22.401498 APIC: 04: enabled 1
737 13:49:22.404581 APIC: 07: enabled 1
738 13:49:22.405000 APIC: 06: enabled 1
739 13:49:22.408104 Compare with tree...
740 13:49:22.411412 Root Device: enabled 1
741 13:49:22.411833 CPU_CLUSTER: 0: enabled 1
742 13:49:22.414756 APIC: 00: enabled 1
743 13:49:22.417976 APIC: 03: enabled 1
744 13:49:22.421638 APIC: 05: enabled 1
745 13:49:22.422174 APIC: 01: enabled 1
746 13:49:22.424730 APIC: 02: enabled 1
747 13:49:22.427697 APIC: 04: enabled 1
748 13:49:22.428217 APIC: 07: enabled 1
749 13:49:22.431367 APIC: 06: enabled 1
750 13:49:22.434657 DOMAIN: 0000: enabled 1
751 13:49:22.435077 PCI: 00:00.0: enabled 1
752 13:49:22.438028 PCI: 00:02.0: enabled 1
753 13:49:22.440852 PCI: 00:04.0: enabled 0
754 13:49:22.444198 PCI: 00:05.0: enabled 0
755 13:49:22.447926 PCI: 00:12.0: enabled 1
756 13:49:22.448389 PCI: 00:12.5: enabled 0
757 13:49:22.451234 PCI: 00:12.6: enabled 0
758 13:49:22.454829 PCI: 00:14.0: enabled 1
759 13:49:22.457425 USB0 port 0: enabled 1
760 13:49:22.461099 USB2 port 0: enabled 1
761 13:49:22.461517 USB2 port 1: enabled 1
762 13:49:22.464375 USB2 port 2: enabled 0
763 13:49:22.467459 USB2 port 3: enabled 0
764 13:49:22.470594 USB2 port 5: enabled 0
765 13:49:22.474193 USB2 port 6: enabled 1
766 13:49:22.477387 USB2 port 9: enabled 1
767 13:49:22.477807 USB3 port 0: enabled 1
768 13:49:22.480774 USB3 port 1: enabled 1
769 13:49:22.484252 USB3 port 2: enabled 1
770 13:49:22.487510 USB3 port 3: enabled 1
771 13:49:22.490440 USB3 port 4: enabled 0
772 13:49:22.490859 PCI: 00:14.1: enabled 0
773 13:49:22.493870 PCI: 00:14.3: enabled 1
774 13:49:22.497472 PCI: 00:14.5: enabled 0
775 13:49:22.500440 PCI: 00:15.0: enabled 1
776 13:49:22.504058 I2C: 00:15: enabled 1
777 13:49:22.504480 PCI: 00:15.1: enabled 1
778 13:49:22.507114 I2C: 00:5d: enabled 1
779 13:49:22.510947 GENERIC: 0.0: enabled 1
780 13:49:22.513778 PCI: 00:15.2: enabled 0
781 13:49:22.517070 PCI: 00:15.3: enabled 0
782 13:49:22.517489 PCI: 00:16.0: enabled 1
783 13:49:22.520325 PCI: 00:16.1: enabled 0
784 13:49:22.524084 PCI: 00:16.2: enabled 0
785 13:49:22.527401 PCI: 00:16.3: enabled 0
786 13:49:22.530287 PCI: 00:16.4: enabled 0
787 13:49:22.530877 PCI: 00:16.5: enabled 0
788 13:49:22.533851 PCI: 00:17.0: enabled 1
789 13:49:22.537372 PCI: 00:19.0: enabled 1
790 13:49:22.540107 I2C: 00:1a: enabled 1
791 13:49:22.540546 I2C: 00:38: enabled 1
792 13:49:22.543713 I2C: 00:39: enabled 1
793 13:49:22.547133 I2C: 00:3a: enabled 1
794 13:49:22.550695 I2C: 00:3b: enabled 1
795 13:49:22.551252 PCI: 00:19.1: enabled 0
796 13:49:22.553888 PCI: 00:19.2: enabled 0
797 13:49:22.557579 PCI: 00:1a.0: enabled 0
798 13:49:22.560943 PCI: 00:1c.0: enabled 0
799 13:49:22.563734 PCI: 00:1c.1: enabled 0
800 13:49:22.564294 PCI: 00:1c.2: enabled 0
801 13:49:22.567138 PCI: 00:1c.3: enabled 0
802 13:49:22.570308 PCI: 00:1c.4: enabled 0
803 13:49:22.573794 PCI: 00:1c.5: enabled 0
804 13:49:22.576925 PCI: 00:1c.6: enabled 0
805 13:49:22.577357 PCI: 00:1c.7: enabled 0
806 13:49:22.580349 PCI: 00:1d.0: enabled 1
807 13:49:22.583771 PCI: 00:1d.1: enabled 0
808 13:49:22.587233 PCI: 00:1d.2: enabled 0
809 13:49:22.589851 PCI: 00:1d.3: enabled 0
810 13:49:22.590270 PCI: 00:1d.4: enabled 0
811 13:49:22.593941 PCI: 00:1d.5: enabled 1
812 13:49:22.597025 PCI: 00:00.0: enabled 1
813 13:49:22.600431 PCI: 00:1e.0: enabled 1
814 13:49:22.603883 PCI: 00:1e.1: enabled 0
815 13:49:22.604353 PCI: 00:1e.2: enabled 1
816 13:49:22.607180 SPI: 00: enabled 1
817 13:49:22.610910 PCI: 00:1e.3: enabled 1
818 13:49:22.611334 SPI: 01: enabled 1
819 13:49:22.613927 PCI: 00:1f.0: enabled 1
820 13:49:22.616843 PNP: 0c09.0: enabled 1
821 13:49:22.620500 PCI: 00:1f.1: enabled 1
822 13:49:22.623452 PCI: 00:1f.2: enabled 1
823 13:49:22.624068 PCI: 00:1f.3: enabled 1
824 13:49:22.626669 PCI: 00:1f.4: enabled 1
825 13:49:22.630262 PCI: 00:1f.5: enabled 1
826 13:49:22.633225 PCI: 00:1f.6: enabled 0
827 13:49:22.636484 Root Device scanning...
828 13:49:22.640319 scan_static_bus for Root Device
829 13:49:22.640737 CPU_CLUSTER: 0 enabled
830 13:49:22.643295 DOMAIN: 0000 enabled
831 13:49:22.646972 DOMAIN: 0000 scanning...
832 13:49:22.649883 PCI: pci_scan_bus for bus 00
833 13:49:22.653235 PCI: 00:00.0 [8086/0000] ops
834 13:49:22.657104 PCI: 00:00.0 [8086/9b61] enabled
835 13:49:22.660243 PCI: 00:02.0 [8086/0000] bus ops
836 13:49:22.663766 PCI: 00:02.0 [8086/9b41] enabled
837 13:49:22.666810 PCI: 00:04.0 [8086/1903] disabled
838 13:49:22.670030 PCI: 00:08.0 [8086/1911] enabled
839 13:49:22.673150 PCI: 00:12.0 [8086/02f9] enabled
840 13:49:22.676769 PCI: 00:14.0 [8086/0000] bus ops
841 13:49:22.679808 PCI: 00:14.0 [8086/02ed] enabled
842 13:49:22.683529 PCI: 00:14.2 [8086/02ef] enabled
843 13:49:22.686599 PCI: 00:14.3 [8086/02f0] enabled
844 13:49:22.690162 PCI: 00:15.0 [8086/0000] bus ops
845 13:49:22.693447 PCI: 00:15.0 [8086/02e8] enabled
846 13:49:22.696574 PCI: 00:15.1 [8086/0000] bus ops
847 13:49:22.700229 PCI: 00:15.1 [8086/02e9] enabled
848 13:49:22.700703 PCI: 00:16.0 [8086/0000] ops
849 13:49:22.703570 PCI: 00:16.0 [8086/02e0] enabled
850 13:49:22.706836 PCI: 00:17.0 [8086/0000] ops
851 13:49:22.709774 PCI: 00:17.0 [8086/02d3] enabled
852 13:49:22.713281 PCI: 00:19.0 [8086/0000] bus ops
853 13:49:22.716363 PCI: 00:19.0 [8086/02c5] enabled
854 13:49:22.719635 PCI: 00:1d.0 [8086/0000] bus ops
855 13:49:22.723088 PCI: 00:1d.0 [8086/02b0] enabled
856 13:49:22.729995 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 13:49:22.733133 PCI: 00:1e.0 [8086/0000] ops
858 13:49:22.736210 PCI: 00:1e.0 [8086/02a8] enabled
859 13:49:22.739489 PCI: 00:1e.2 [8086/0000] bus ops
860 13:49:22.743430 PCI: 00:1e.2 [8086/02aa] enabled
861 13:49:22.746588 PCI: 00:1e.3 [8086/0000] bus ops
862 13:49:22.749780 PCI: 00:1e.3 [8086/02ab] enabled
863 13:49:22.753173 PCI: 00:1f.0 [8086/0000] bus ops
864 13:49:22.756553 PCI: 00:1f.0 [8086/0284] enabled
865 13:49:22.763323 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 13:49:22.766062 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 13:49:22.769556 PCI: 00:1f.3 [8086/0000] bus ops
868 13:49:22.773208 PCI: 00:1f.3 [8086/02c8] enabled
869 13:49:22.776061 PCI: 00:1f.4 [8086/0000] bus ops
870 13:49:22.779743 PCI: 00:1f.4 [8086/02a3] enabled
871 13:49:22.782731 PCI: 00:1f.5 [8086/0000] bus ops
872 13:49:22.785905 PCI: 00:1f.5 [8086/02a4] enabled
873 13:49:22.789478 PCI: Leftover static devices:
874 13:49:22.792848 PCI: 00:05.0
875 13:49:22.793341 PCI: 00:12.5
876 13:49:22.796372 PCI: 00:12.6
877 13:49:22.796809 PCI: 00:14.1
878 13:49:22.797148 PCI: 00:14.5
879 13:49:22.799357 PCI: 00:15.2
880 13:49:22.799776 PCI: 00:15.3
881 13:49:22.802599 PCI: 00:16.1
882 13:49:22.803018 PCI: 00:16.2
883 13:49:22.803348 PCI: 00:16.3
884 13:49:22.805710 PCI: 00:16.4
885 13:49:22.806007 PCI: 00:16.5
886 13:49:22.809145 PCI: 00:19.1
887 13:49:22.809481 PCI: 00:19.2
888 13:49:22.809738 PCI: 00:1a.0
889 13:49:22.812249 PCI: 00:1c.0
890 13:49:22.812476 PCI: 00:1c.1
891 13:49:22.815827 PCI: 00:1c.2
892 13:49:22.816032 PCI: 00:1c.3
893 13:49:22.819224 PCI: 00:1c.4
894 13:49:22.819402 PCI: 00:1c.5
895 13:49:22.819522 PCI: 00:1c.6
896 13:49:22.822159 PCI: 00:1c.7
897 13:49:22.822251 PCI: 00:1d.1
898 13:49:22.825469 PCI: 00:1d.2
899 13:49:22.825562 PCI: 00:1d.3
900 13:49:22.825634 PCI: 00:1d.4
901 13:49:22.828763 PCI: 00:1d.5
902 13:49:22.828855 PCI: 00:1e.1
903 13:49:22.832320 PCI: 00:1f.1
904 13:49:22.832412 PCI: 00:1f.2
905 13:49:22.832484 PCI: 00:1f.6
906 13:49:22.835207 PCI: Check your devicetree.cb.
907 13:49:22.839380 PCI: 00:02.0 scanning...
908 13:49:22.842223 scan_generic_bus for PCI: 00:02.0
909 13:49:22.845720 scan_generic_bus for PCI: 00:02.0 done
910 13:49:22.851868 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
911 13:49:22.855381 PCI: 00:14.0 scanning...
912 13:49:22.858398 scan_static_bus for PCI: 00:14.0
913 13:49:22.861943 USB0 port 0 enabled
914 13:49:22.862038 USB0 port 0 scanning...
915 13:49:22.864978 scan_static_bus for USB0 port 0
916 13:49:22.868349 USB2 port 0 enabled
917 13:49:22.871744 USB2 port 1 enabled
918 13:49:22.871831 USB2 port 2 disabled
919 13:49:22.875164 USB2 port 3 disabled
920 13:49:22.878797 USB2 port 5 disabled
921 13:49:22.878879 USB2 port 6 enabled
922 13:49:22.882106 USB2 port 9 enabled
923 13:49:22.882192 USB3 port 0 enabled
924 13:49:22.885484 USB3 port 1 enabled
925 13:49:22.888419 USB3 port 2 enabled
926 13:49:22.888506 USB3 port 3 enabled
927 13:49:22.892011 USB3 port 4 disabled
928 13:49:22.895367 USB2 port 0 scanning...
929 13:49:22.898608 scan_static_bus for USB2 port 0
930 13:49:22.901530 scan_static_bus for USB2 port 0 done
931 13:49:22.904712 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
932 13:49:22.908368 USB2 port 1 scanning...
933 13:49:22.911700 scan_static_bus for USB2 port 1
934 13:49:22.915133 scan_static_bus for USB2 port 1 done
935 13:49:22.921737 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
936 13:49:22.925559 USB2 port 6 scanning...
937 13:49:22.928304 scan_static_bus for USB2 port 6
938 13:49:22.931613 scan_static_bus for USB2 port 6 done
939 13:49:22.938411 scan_bus: scanning of bus USB2 port 6 took 9704 usecs
940 13:49:22.938503 USB2 port 9 scanning...
941 13:49:22.941725 scan_static_bus for USB2 port 9
942 13:49:22.944914 scan_static_bus for USB2 port 9 done
943 13:49:22.951199 scan_bus: scanning of bus USB2 port 9 took 9701 usecs
944 13:49:22.954581 USB3 port 0 scanning...
945 13:49:22.958141 scan_static_bus for USB3 port 0
946 13:49:22.961360 scan_static_bus for USB3 port 0 done
947 13:49:22.968237 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
948 13:49:22.968330 USB3 port 1 scanning...
949 13:49:22.971264 scan_static_bus for USB3 port 1
950 13:49:22.974412 scan_static_bus for USB3 port 1 done
951 13:49:22.981543 scan_bus: scanning of bus USB3 port 1 took 9694 usecs
952 13:49:22.984419 USB3 port 2 scanning...
953 13:49:22.987685 scan_static_bus for USB3 port 2
954 13:49:22.991054 scan_static_bus for USB3 port 2 done
955 13:49:22.997915 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
956 13:49:22.998008 USB3 port 3 scanning...
957 13:49:23.001294 scan_static_bus for USB3 port 3
958 13:49:23.004680 scan_static_bus for USB3 port 3 done
959 13:49:23.011307 scan_bus: scanning of bus USB3 port 3 took 9695 usecs
960 13:49:23.014631 scan_static_bus for USB0 port 0 done
961 13:49:23.021156 scan_bus: scanning of bus USB0 port 0 took 155337 usecs
962 13:49:23.024284 scan_static_bus for PCI: 00:14.0 done
963 13:49:23.031195 scan_bus: scanning of bus PCI: 00:14.0 took 172956 usecs
964 13:49:23.031288 PCI: 00:15.0 scanning...
965 13:49:23.038621 scan_generic_bus for PCI: 00:15.0
966 13:49:23.041394 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 13:49:23.044626 scan_generic_bus for PCI: 00:15.0 done
968 13:49:23.051467 scan_bus: scanning of bus PCI: 00:15.0 took 14297 usecs
969 13:49:23.051574 PCI: 00:15.1 scanning...
970 13:49:23.054335 scan_generic_bus for PCI: 00:15.1
971 13:49:23.061383 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 13:49:23.064608 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 13:49:23.067963 scan_generic_bus for PCI: 00:15.1 done
974 13:49:23.074917 scan_bus: scanning of bus PCI: 00:15.1 took 18601 usecs
975 13:49:23.077953 PCI: 00:19.0 scanning...
976 13:49:23.081160 scan_generic_bus for PCI: 00:19.0
977 13:49:23.084617 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 13:49:23.087673 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 13:49:23.090983 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 13:49:23.097881 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 13:49:23.101299 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 13:49:23.104119 scan_generic_bus for PCI: 00:19.0 done
983 13:49:23.110802 scan_bus: scanning of bus PCI: 00:19.0 took 30720 usecs
984 13:49:23.114158 PCI: 00:1d.0 scanning...
985 13:49:23.117642 do_pci_scan_bridge for PCI: 00:1d.0
986 13:49:23.120843 PCI: pci_scan_bus for bus 01
987 13:49:23.124112 PCI: 01:00.0 [1c5c/1327] enabled
988 13:49:23.127618 Enabling Common Clock Configuration
989 13:49:23.130799 L1 Sub-State supported from root port 29
990 13:49:23.134191 L1 Sub-State Support = 0xf
991 13:49:23.137605 CommonModeRestoreTime = 0x28
992 13:49:23.141176 Power On Value = 0x16, Power On Scale = 0x0
993 13:49:23.144614 ASPM: Enabled L1
994 13:49:23.147287 scan_bus: scanning of bus PCI: 00:1d.0 took 32779 usecs
995 13:49:23.150489 PCI: 00:1e.2 scanning...
996 13:49:23.153865 scan_generic_bus for PCI: 00:1e.2
997 13:49:23.157260 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 13:49:23.161071 scan_generic_bus for PCI: 00:1e.2 done
999 13:49:23.167625 scan_bus: scanning of bus PCI: 00:1e.2 took 13998 usecs
1000 13:49:23.170808 PCI: 00:1e.3 scanning...
1001 13:49:23.173828 scan_generic_bus for PCI: 00:1e.3
1002 13:49:23.177027 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 13:49:23.180715 scan_generic_bus for PCI: 00:1e.3 done
1004 13:49:23.187478 scan_bus: scanning of bus PCI: 00:1e.3 took 13999 usecs
1005 13:49:23.190681 PCI: 00:1f.0 scanning...
1006 13:49:23.194048 scan_static_bus for PCI: 00:1f.0
1007 13:49:23.194139 PNP: 0c09.0 enabled
1008 13:49:23.200412 scan_static_bus for PCI: 00:1f.0 done
1009 13:49:23.203800 scan_bus: scanning of bus PCI: 00:1f.0 took 12043 usecs
1010 13:49:23.207369 PCI: 00:1f.3 scanning...
1011 13:49:23.213931 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1012 13:49:23.217126 PCI: 00:1f.4 scanning...
1013 13:49:23.220618 scan_generic_bus for PCI: 00:1f.4
1014 13:49:23.223952 scan_generic_bus for PCI: 00:1f.4 done
1015 13:49:23.227211 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1016 13:49:23.230164 PCI: 00:1f.5 scanning...
1017 13:49:23.233800 scan_generic_bus for PCI: 00:1f.5
1018 13:49:23.240737 scan_generic_bus for PCI: 00:1f.5 done
1019 13:49:23.243408 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1020 13:49:23.250316 scan_bus: scanning of bus DOMAIN: 0000 took 604799 usecs
1021 13:49:23.254106 scan_static_bus for Root Device done
1022 13:49:23.260536 scan_bus: scanning of bus Root Device took 624664 usecs
1023 13:49:23.260627 done
1024 13:49:23.263690 Chrome EC: UHEPI supported
1025 13:49:23.270297 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 13:49:23.273635 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 13:49:23.280147 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 13:49:23.287432 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 13:49:23.291097 SPI flash protection: WPSW=0 SRP0=0
1030 13:49:23.297654 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 13:49:23.300896 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1032 13:49:23.304256 found VGA at PCI: 00:02.0
1033 13:49:23.307347 Setting up VGA for PCI: 00:02.0
1034 13:49:23.313925 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 13:49:23.317618 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 13:49:23.320788 Allocating resources...
1037 13:49:23.324134 Reading resources...
1038 13:49:23.327432 Root Device read_resources bus 0 link: 0
1039 13:49:23.331107 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 13:49:23.337608 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 13:49:23.340627 DOMAIN: 0000 read_resources bus 0 link: 0
1042 13:49:23.347701 PCI: 00:14.0 read_resources bus 0 link: 0
1043 13:49:23.351210 USB0 port 0 read_resources bus 0 link: 0
1044 13:49:23.358829 USB0 port 0 read_resources bus 0 link: 0 done
1045 13:49:23.362061 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 13:49:23.370115 PCI: 00:15.0 read_resources bus 1 link: 0
1047 13:49:23.373077 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 13:49:23.379738 PCI: 00:15.1 read_resources bus 2 link: 0
1049 13:49:23.383050 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 13:49:23.390942 PCI: 00:19.0 read_resources bus 3 link: 0
1051 13:49:23.397228 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 13:49:23.400646 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 13:49:23.406873 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 13:49:23.410126 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 13:49:23.416872 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 13:49:23.420220 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 13:49:23.426941 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 13:49:23.430274 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 13:49:23.436746 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 13:49:23.443982 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 13:49:23.447185 Root Device read_resources bus 0 link: 0 done
1062 13:49:23.450085 Done reading resources.
1063 13:49:23.453996 Show resources in subtree (Root Device)...After reading.
1064 13:49:23.460155 Root Device child on link 0 CPU_CLUSTER: 0
1065 13:49:23.463845 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 13:49:23.463957 APIC: 00
1067 13:49:23.466784 APIC: 03
1068 13:49:23.466895 APIC: 05
1069 13:49:23.466996 APIC: 01
1070 13:49:23.470712 APIC: 02
1071 13:49:23.470795 APIC: 04
1072 13:49:23.473815 APIC: 07
1073 13:49:23.473902 APIC: 06
1074 13:49:23.477211 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 13:49:23.487045 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 13:49:23.539765 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 13:49:23.540039 PCI: 00:00.0
1078 13:49:23.540670 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 13:49:23.541279 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 13:49:23.541545 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 13:49:23.541807 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 13:49:23.589105 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 13:49:23.590059 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 13:49:23.590532 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 13:49:23.591475 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 13:49:23.592143 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 13:49:23.615409 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 13:49:23.615688 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 13:49:23.615769 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 13:49:23.619388 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 13:49:23.629165 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 13:49:23.638982 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 13:49:23.648793 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 13:49:23.648884 PCI: 00:02.0
1095 13:49:23.659332 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 13:49:23.671873 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 13:49:23.678421 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 13:49:23.682296 PCI: 00:04.0
1099 13:49:23.682387 PCI: 00:08.0
1100 13:49:23.692256 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 13:49:23.695798 PCI: 00:12.0
1102 13:49:23.705163 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 13:49:23.708318 PCI: 00:14.0 child on link 0 USB0 port 0
1104 13:49:23.718813 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 13:49:23.721704 USB0 port 0 child on link 0 USB2 port 0
1106 13:49:23.725083 USB2 port 0
1107 13:49:23.725173 USB2 port 1
1108 13:49:23.728351 USB2 port 2
1109 13:49:23.728441 USB2 port 3
1110 13:49:23.731979 USB2 port 5
1111 13:49:23.732081 USB2 port 6
1112 13:49:23.735228 USB2 port 9
1113 13:49:23.735318 USB3 port 0
1114 13:49:23.738347 USB3 port 1
1115 13:49:23.741600 USB3 port 2
1116 13:49:23.741690 USB3 port 3
1117 13:49:23.745355 USB3 port 4
1118 13:49:23.745444 PCI: 00:14.2
1119 13:49:23.755064 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 13:49:23.764767 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 13:49:23.768388 PCI: 00:14.3
1122 13:49:23.778726 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 13:49:23.781492 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 13:49:23.791445 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 13:49:23.791536 I2C: 01:15
1126 13:49:23.798618 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 13:49:23.808070 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 13:49:23.808161 I2C: 02:5d
1129 13:49:23.811671 GENERIC: 0.0
1130 13:49:23.811791 PCI: 00:16.0
1131 13:49:23.821626 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 13:49:23.824959 PCI: 00:17.0
1133 13:49:23.831217 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 13:49:23.841419 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 13:49:23.847888 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 13:49:23.858088 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 13:49:23.865296 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 13:49:23.874457 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 13:49:23.877767 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 13:49:23.887821 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 13:49:23.891133 I2C: 03:1a
1142 13:49:23.891224 I2C: 03:38
1143 13:49:23.894953 I2C: 03:39
1144 13:49:23.895043 I2C: 03:3a
1145 13:49:23.898178 I2C: 03:3b
1146 13:49:23.901298 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 13:49:23.911374 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 13:49:23.921485 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 13:49:23.927853 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 13:49:23.931226 PCI: 01:00.0
1151 13:49:23.941328 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 13:49:23.941421 PCI: 00:1e.0
1153 13:49:23.954330 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 13:49:23.964711 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 13:49:23.968187 PCI: 00:1e.2 child on link 0 SPI: 00
1156 13:49:23.978221 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 13:49:23.978313 SPI: 00
1158 13:49:23.981616 PCI: 00:1e.3 child on link 0 SPI: 01
1159 13:49:23.991052 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 13:49:23.994378 SPI: 01
1161 13:49:23.997955 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 13:49:24.007910 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 13:49:24.014604 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 13:49:24.017768 PNP: 0c09.0
1165 13:49:24.028249 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 13:49:24.028340 PCI: 00:1f.3
1167 13:49:24.037358 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 13:49:24.047600 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 13:49:24.051008 PCI: 00:1f.4
1170 13:49:24.057409 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 13:49:24.067881 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 13:49:24.070505 PCI: 00:1f.5
1173 13:49:24.080538 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 13:49:24.086972 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 13:49:24.090357 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 13:49:24.097111 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 13:49:24.103829 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 13:49:24.107329 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 13:49:24.110466 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 13:49:24.113453 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 13:49:24.120502 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 13:49:24.127327 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 13:49:24.133504 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 13:49:24.143346 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 13:49:24.150394 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 13:49:24.153465 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 13:49:24.160213 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 13:49:24.166785 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 13:49:24.170603 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 13:49:24.176747 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 13:49:24.180353 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 13:49:24.186538 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 13:49:24.190184 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 13:49:24.196711 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 13:49:24.200143 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 13:49:24.203494 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 13:49:24.210173 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 13:49:24.213173 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 13:49:24.220217 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 13:49:24.223023 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 13:49:24.230266 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 13:49:24.233204 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 13:49:24.239703 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 13:49:24.243174 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 13:49:24.249892 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 13:49:24.253234 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 13:49:24.259579 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 13:49:24.262926 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 13:49:24.266547 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 13:49:24.273054 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 13:49:24.283231 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 13:49:24.286343 avoid_fixed_resources: DOMAIN: 0000
1213 13:49:24.289861 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 13:49:24.296216 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 13:49:24.305988 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 13:49:24.312731 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 13:49:24.319312 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 13:49:24.325983 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 13:49:24.336329 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 13:49:24.343007 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 13:49:24.349479 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 13:49:24.359421 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 13:49:24.366096 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 13:49:24.372811 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 13:49:24.375690 Setting resources...
1226 13:49:24.382841 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 13:49:24.386140 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 13:49:24.389492 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 13:49:24.392625 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 13:49:24.396441 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 13:49:24.402549 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 13:49:24.409166 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 13:49:24.416173 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 13:49:24.422414 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 13:49:24.428970 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 13:49:24.432681 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 13:49:24.438868 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 13:49:24.442551 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 13:49:24.449154 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 13:49:24.452062 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 13:49:24.459180 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 13:49:24.462605 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 13:49:24.468626 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 13:49:24.472791 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 13:49:24.479069 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 13:49:24.482026 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 13:49:24.488785 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 13:49:24.492006 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 13:49:24.495447 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 13:49:24.502141 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 13:49:24.505137 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 13:49:24.512059 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 13:49:24.515285 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 13:49:24.522122 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 13:49:24.525182 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 13:49:24.531916 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 13:49:24.535015 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 13:49:24.541624 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 13:49:24.551613 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 13:49:24.558150 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 13:49:24.564850 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 13:49:24.571474 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 13:49:24.578519 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 13:49:24.581894 Root Device assign_resources, bus 0 link: 0
1265 13:49:24.588426 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 13:49:24.595344 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 13:49:24.604826 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 13:49:24.611697 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 13:49:24.618251 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 13:49:24.628356 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 13:49:24.634811 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 13:49:24.642127 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 13:49:24.644989 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 13:49:24.654901 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 13:49:24.661885 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 13:49:24.671582 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 13:49:24.678469 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 13:49:24.681949 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 13:49:24.688354 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 13:49:24.694978 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 13:49:24.701769 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 13:49:24.705161 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 13:49:24.715133 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 13:49:24.721593 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 13:49:24.728382 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 13:49:24.738486 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 13:49:24.744704 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 13:49:24.751597 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 13:49:24.761461 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 13:49:24.768117 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 13:49:24.774577 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 13:49:24.778013 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 13:49:24.787917 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 13:49:24.794620 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 13:49:24.804786 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 13:49:24.807615 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 13:49:24.818179 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 13:49:24.820801 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 13:49:24.831143 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 13:49:24.837508 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 13:49:24.840561 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 13:49:24.847569 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 13:49:24.854379 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 13:49:24.861171 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 13:49:24.864587 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 13:49:24.870760 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 13:49:24.874296 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 13:49:24.881094 LPC: Trying to open IO window from 800 size 1ff
1309 13:49:24.887111 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 13:49:24.897536 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 13:49:24.903794 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 13:49:24.910778 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 13:49:24.917732 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 13:49:24.920548 Root Device assign_resources, bus 0 link: 0
1315 13:49:24.924059 Done setting resources.
1316 13:49:24.930668 Show resources in subtree (Root Device)...After assigning values.
1317 13:49:24.933756 Root Device child on link 0 CPU_CLUSTER: 0
1318 13:49:24.940753 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 13:49:24.940843 APIC: 00
1320 13:49:24.940913 APIC: 03
1321 13:49:24.943700 APIC: 05
1322 13:49:24.943789 APIC: 01
1323 13:49:24.943859 APIC: 02
1324 13:49:24.947745 APIC: 04
1325 13:49:24.947833 APIC: 07
1326 13:49:24.950728 APIC: 06
1327 13:49:24.954016 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 13:49:24.964346 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 13:49:24.973817 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 13:49:24.977135 PCI: 00:00.0
1331 13:49:24.986836 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 13:49:24.993459 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 13:49:25.003826 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 13:49:25.013640 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 13:49:25.023191 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 13:49:25.033460 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 13:49:25.043718 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 13:49:25.049585 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 13:49:25.059380 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 13:49:25.069349 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 13:49:25.079736 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 13:49:25.089318 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 13:49:25.099197 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 13:49:25.109126 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 13:49:25.116427 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 13:49:25.126091 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 13:49:25.129139 PCI: 00:02.0
1348 13:49:25.138725 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 13:49:25.149177 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 13:49:25.158829 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 13:49:25.158921 PCI: 00:04.0
1352 13:49:25.162060 PCI: 00:08.0
1353 13:49:25.172416 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 13:49:25.172507 PCI: 00:12.0
1355 13:49:25.185359 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 13:49:25.188456 PCI: 00:14.0 child on link 0 USB0 port 0
1357 13:49:25.198845 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 13:49:25.201896 USB0 port 0 child on link 0 USB2 port 0
1359 13:49:25.205025 USB2 port 0
1360 13:49:25.205116 USB2 port 1
1361 13:49:25.208653 USB2 port 2
1362 13:49:25.208743 USB2 port 3
1363 13:49:25.211649 USB2 port 5
1364 13:49:25.211740 USB2 port 6
1365 13:49:25.215146 USB2 port 9
1366 13:49:25.218666 USB3 port 0
1367 13:49:25.218756 USB3 port 1
1368 13:49:25.222202 USB3 port 2
1369 13:49:25.222292 USB3 port 3
1370 13:49:25.225233 USB3 port 4
1371 13:49:25.225325 PCI: 00:14.2
1372 13:49:25.235350 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 13:49:25.245202 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 13:49:25.248504 PCI: 00:14.3
1375 13:49:25.258023 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 13:49:25.261340 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 13:49:25.271291 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 13:49:25.274606 I2C: 01:15
1379 13:49:25.278155 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 13:49:25.288036 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 13:49:25.291189 I2C: 02:5d
1382 13:49:25.291279 GENERIC: 0.0
1383 13:49:25.294550 PCI: 00:16.0
1384 13:49:25.304602 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 13:49:25.304694 PCI: 00:17.0
1386 13:49:25.317744 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 13:49:25.327449 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 13:49:25.334188 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 13:49:25.344243 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 13:49:25.353952 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 13:49:25.364122 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 13:49:25.367674 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 13:49:25.377285 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 13:49:25.380379 I2C: 03:1a
1395 13:49:25.380469 I2C: 03:38
1396 13:49:25.383940 I2C: 03:39
1397 13:49:25.384039 I2C: 03:3a
1398 13:49:25.387506 I2C: 03:3b
1399 13:49:25.390529 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 13:49:25.400572 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 13:49:25.410364 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 13:49:25.420409 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 13:49:25.423868 PCI: 01:00.0
1404 13:49:25.433584 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 13:49:25.433676 PCI: 00:1e.0
1406 13:49:25.446920 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 13:49:25.456708 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 13:49:25.460149 PCI: 00:1e.2 child on link 0 SPI: 00
1409 13:49:25.469834 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 13:49:25.469926 SPI: 00
1411 13:49:25.476581 PCI: 00:1e.3 child on link 0 SPI: 01
1412 13:49:25.486736 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 13:49:25.486828 SPI: 01
1414 13:49:25.490265 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 13:49:25.499760 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 13:49:25.509706 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 13:49:25.509799 PNP: 0c09.0
1418 13:49:25.519760 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 13:49:25.519852 PCI: 00:1f.3
1420 13:49:25.529498 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 13:49:25.542989 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 13:49:25.543080 PCI: 00:1f.4
1423 13:49:25.552959 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 13:49:25.562413 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 13:49:25.562505 PCI: 00:1f.5
1426 13:49:25.575937 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 13:49:25.576038 Done allocating resources.
1428 13:49:25.583102 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 13:49:25.586175 Enabling resources...
1430 13:49:25.589026 PCI: 00:00.0 subsystem <- 8086/9b61
1431 13:49:25.592421 PCI: 00:00.0 cmd <- 06
1432 13:49:25.595931 PCI: 00:02.0 subsystem <- 8086/9b41
1433 13:49:25.599141 PCI: 00:02.0 cmd <- 03
1434 13:49:25.602989 PCI: 00:08.0 cmd <- 06
1435 13:49:25.605999 PCI: 00:12.0 subsystem <- 8086/02f9
1436 13:49:25.609227 PCI: 00:12.0 cmd <- 02
1437 13:49:25.612362 PCI: 00:14.0 subsystem <- 8086/02ed
1438 13:49:25.612451 PCI: 00:14.0 cmd <- 02
1439 13:49:25.615923 PCI: 00:14.2 cmd <- 02
1440 13:49:25.619204 PCI: 00:14.3 subsystem <- 8086/02f0
1441 13:49:25.622468 PCI: 00:14.3 cmd <- 02
1442 13:49:25.626035 PCI: 00:15.0 subsystem <- 8086/02e8
1443 13:49:25.628950 PCI: 00:15.0 cmd <- 02
1444 13:49:25.632819 PCI: 00:15.1 subsystem <- 8086/02e9
1445 13:49:25.635991 PCI: 00:15.1 cmd <- 02
1446 13:49:25.639341 PCI: 00:16.0 subsystem <- 8086/02e0
1447 13:49:25.642351 PCI: 00:16.0 cmd <- 02
1448 13:49:25.645568 PCI: 00:17.0 subsystem <- 8086/02d3
1449 13:49:25.649147 PCI: 00:17.0 cmd <- 03
1450 13:49:25.652258 PCI: 00:19.0 subsystem <- 8086/02c5
1451 13:49:25.655584 PCI: 00:19.0 cmd <- 02
1452 13:49:25.658843 PCI: 00:1d.0 bridge ctrl <- 0013
1453 13:49:25.662116 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 13:49:25.662207 PCI: 00:1d.0 cmd <- 06
1455 13:49:25.669199 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 13:49:25.669289 PCI: 00:1e.0 cmd <- 06
1457 13:49:25.672369 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 13:49:25.675632 PCI: 00:1e.2 cmd <- 06
1459 13:49:25.679015 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 13:49:25.682187 PCI: 00:1e.3 cmd <- 02
1461 13:49:25.685334 PCI: 00:1f.0 subsystem <- 8086/0284
1462 13:49:25.688932 PCI: 00:1f.0 cmd <- 407
1463 13:49:25.692331 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 13:49:25.695558 PCI: 00:1f.3 cmd <- 02
1465 13:49:25.699238 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 13:49:25.702621 PCI: 00:1f.4 cmd <- 03
1467 13:49:25.705768 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 13:49:25.708618 PCI: 00:1f.5 cmd <- 406
1469 13:49:25.716624 PCI: 01:00.0 cmd <- 02
1470 13:49:25.721689 done.
1471 13:49:25.733900 ME: Version: 14.0.39.1367
1472 13:49:25.740885 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1473 13:49:25.744061 Initializing devices...
1474 13:49:25.744151 Root Device init ...
1475 13:49:25.750795 Chrome EC: Set SMI mask to 0x0000000000000000
1476 13:49:25.753870 Chrome EC: clear events_b mask to 0x0000000000000000
1477 13:49:25.760737 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 13:49:25.767361 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 13:49:25.773957 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 13:49:25.777272 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 13:49:25.780672 Root Device init finished in 35207 usecs
1482 13:49:25.784121 CPU_CLUSTER: 0 init ...
1483 13:49:25.790850 CPU_CLUSTER: 0 init finished in 2448 usecs
1484 13:49:25.794972 PCI: 00:00.0 init ...
1485 13:49:25.798057 CPU TDP: 15 Watts
1486 13:49:25.801727 CPU PL2 = 64 Watts
1487 13:49:25.805154 PCI: 00:00.0 init finished in 7083 usecs
1488 13:49:25.808376 PCI: 00:02.0 init ...
1489 13:49:25.811275 PCI: 00:02.0 init finished in 2254 usecs
1490 13:49:25.814712 PCI: 00:08.0 init ...
1491 13:49:25.818093 PCI: 00:08.0 init finished in 2252 usecs
1492 13:49:25.821852 PCI: 00:12.0 init ...
1493 13:49:25.824467 PCI: 00:12.0 init finished in 2253 usecs
1494 13:49:25.827815 PCI: 00:14.0 init ...
1495 13:49:25.831347 PCI: 00:14.0 init finished in 2253 usecs
1496 13:49:25.834921 PCI: 00:14.2 init ...
1497 13:49:25.837797 PCI: 00:14.2 init finished in 2253 usecs
1498 13:49:25.841331 PCI: 00:14.3 init ...
1499 13:49:25.844866 PCI: 00:14.3 init finished in 2271 usecs
1500 13:49:25.847660 PCI: 00:15.0 init ...
1501 13:49:25.851184 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 13:49:25.854853 PCI: 00:15.0 init finished in 5979 usecs
1503 13:49:25.857717 PCI: 00:15.1 init ...
1504 13:49:25.861049 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 13:49:25.864591 PCI: 00:15.1 init finished in 5977 usecs
1506 13:49:25.868112 PCI: 00:16.0 init ...
1507 13:49:25.871579 PCI: 00:16.0 init finished in 2253 usecs
1508 13:49:25.875432 PCI: 00:19.0 init ...
1509 13:49:25.878405 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 13:49:25.885621 PCI: 00:19.0 init finished in 5977 usecs
1511 13:49:25.885712 PCI: 00:1d.0 init ...
1512 13:49:25.888436 Initializing PCH PCIe bridge.
1513 13:49:25.891743 PCI: 00:1d.0 init finished in 5286 usecs
1514 13:49:25.896881 PCI: 00:1f.0 init ...
1515 13:49:25.900353 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 13:49:25.906800 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 13:49:25.906892 IOAPIC: ID = 0x02
1518 13:49:25.910006 IOAPIC: Dumping registers
1519 13:49:25.913606 reg 0x0000: 0x02000000
1520 13:49:25.916664 reg 0x0001: 0x00770020
1521 13:49:25.916774 reg 0x0002: 0x00000000
1522 13:49:25.923363 PCI: 00:1f.0 init finished in 23541 usecs
1523 13:49:25.926782 PCI: 00:1f.4 init ...
1524 13:49:25.930156 PCI: 00:1f.4 init finished in 2261 usecs
1525 13:49:25.941047 PCI: 01:00.0 init ...
1526 13:49:25.944236 PCI: 01:00.0 init finished in 2253 usecs
1527 13:49:25.948672 PNP: 0c09.0 init ...
1528 13:49:25.951829 Google Chrome EC uptime: 11.087 seconds
1529 13:49:25.958318 Google Chrome AP resets since EC boot: 0
1530 13:49:25.961520 Google Chrome most recent AP reset causes:
1531 13:49:25.968513 Google Chrome EC reset flags at last EC boot: reset-pin
1532 13:49:25.972204 PNP: 0c09.0 init finished in 20569 usecs
1533 13:49:25.974892 Devices initialized
1534 13:49:25.974972 Show all devs... After init.
1535 13:49:25.978580 Root Device: enabled 1
1536 13:49:25.981476 CPU_CLUSTER: 0: enabled 1
1537 13:49:25.984988 DOMAIN: 0000: enabled 1
1538 13:49:25.985080 APIC: 00: enabled 1
1539 13:49:25.988568 PCI: 00:00.0: enabled 1
1540 13:49:25.991346 PCI: 00:02.0: enabled 1
1541 13:49:25.994583 PCI: 00:04.0: enabled 0
1542 13:49:25.994664 PCI: 00:05.0: enabled 0
1543 13:49:25.997920 PCI: 00:12.0: enabled 1
1544 13:49:26.001347 PCI: 00:12.5: enabled 0
1545 13:49:26.001436 PCI: 00:12.6: enabled 0
1546 13:49:26.004922 PCI: 00:14.0: enabled 1
1547 13:49:26.008440 PCI: 00:14.1: enabled 0
1548 13:49:26.011523 PCI: 00:14.3: enabled 1
1549 13:49:26.011608 PCI: 00:14.5: enabled 0
1550 13:49:26.014635 PCI: 00:15.0: enabled 1
1551 13:49:26.018102 PCI: 00:15.1: enabled 1
1552 13:49:26.021582 PCI: 00:15.2: enabled 0
1553 13:49:26.021667 PCI: 00:15.3: enabled 0
1554 13:49:26.024663 PCI: 00:16.0: enabled 1
1555 13:49:26.028190 PCI: 00:16.1: enabled 0
1556 13:49:26.031556 PCI: 00:16.2: enabled 0
1557 13:49:26.031634 PCI: 00:16.3: enabled 0
1558 13:49:26.035031 PCI: 00:16.4: enabled 0
1559 13:49:26.038270 PCI: 00:16.5: enabled 0
1560 13:49:26.040963 PCI: 00:17.0: enabled 1
1561 13:49:26.041044 PCI: 00:19.0: enabled 1
1562 13:49:26.044555 PCI: 00:19.1: enabled 0
1563 13:49:26.047886 PCI: 00:19.2: enabled 0
1564 13:49:26.048008 PCI: 00:1a.0: enabled 0
1565 13:49:26.051483 PCI: 00:1c.0: enabled 0
1566 13:49:26.054510 PCI: 00:1c.1: enabled 0
1567 13:49:26.057691 PCI: 00:1c.2: enabled 0
1568 13:49:26.057789 PCI: 00:1c.3: enabled 0
1569 13:49:26.061024 PCI: 00:1c.4: enabled 0
1570 13:49:26.064567 PCI: 00:1c.5: enabled 0
1571 13:49:26.067449 PCI: 00:1c.6: enabled 0
1572 13:49:26.067533 PCI: 00:1c.7: enabled 0
1573 13:49:26.071194 PCI: 00:1d.0: enabled 1
1574 13:49:26.074189 PCI: 00:1d.1: enabled 0
1575 13:49:26.077787 PCI: 00:1d.2: enabled 0
1576 13:49:26.077877 PCI: 00:1d.3: enabled 0
1577 13:49:26.080747 PCI: 00:1d.4: enabled 0
1578 13:49:26.084323 PCI: 00:1d.5: enabled 0
1579 13:49:26.084413 PCI: 00:1e.0: enabled 1
1580 13:49:26.087265 PCI: 00:1e.1: enabled 0
1581 13:49:26.090973 PCI: 00:1e.2: enabled 1
1582 13:49:26.094189 PCI: 00:1e.3: enabled 1
1583 13:49:26.094279 PCI: 00:1f.0: enabled 1
1584 13:49:26.098502 PCI: 00:1f.1: enabled 0
1585 13:49:26.101176 PCI: 00:1f.2: enabled 0
1586 13:49:26.103907 PCI: 00:1f.3: enabled 1
1587 13:49:26.104005 PCI: 00:1f.4: enabled 1
1588 13:49:26.107448 PCI: 00:1f.5: enabled 1
1589 13:49:26.110806 PCI: 00:1f.6: enabled 0
1590 13:49:26.114044 USB0 port 0: enabled 1
1591 13:49:26.114134 I2C: 01:15: enabled 1
1592 13:49:26.117483 I2C: 02:5d: enabled 1
1593 13:49:26.120413 GENERIC: 0.0: enabled 1
1594 13:49:26.120503 I2C: 03:1a: enabled 1
1595 13:49:26.124036 I2C: 03:38: enabled 1
1596 13:49:26.127392 I2C: 03:39: enabled 1
1597 13:49:26.127482 I2C: 03:3a: enabled 1
1598 13:49:26.130497 I2C: 03:3b: enabled 1
1599 13:49:26.133579 PCI: 00:00.0: enabled 1
1600 13:49:26.133669 SPI: 00: enabled 1
1601 13:49:26.137337 SPI: 01: enabled 1
1602 13:49:26.140457 PNP: 0c09.0: enabled 1
1603 13:49:26.140547 USB2 port 0: enabled 1
1604 13:49:26.143756 USB2 port 1: enabled 1
1605 13:49:26.146798 USB2 port 2: enabled 0
1606 13:49:26.146888 USB2 port 3: enabled 0
1607 13:49:26.150284 USB2 port 5: enabled 0
1608 13:49:26.153410 USB2 port 6: enabled 1
1609 13:49:26.156752 USB2 port 9: enabled 1
1610 13:49:26.156836 USB3 port 0: enabled 1
1611 13:49:26.160126 USB3 port 1: enabled 1
1612 13:49:26.163396 USB3 port 2: enabled 1
1613 13:49:26.163480 USB3 port 3: enabled 1
1614 13:49:26.166804 USB3 port 4: enabled 0
1615 13:49:26.170242 APIC: 03: enabled 1
1616 13:49:26.170323 APIC: 05: enabled 1
1617 13:49:26.173592 APIC: 01: enabled 1
1618 13:49:26.176826 APIC: 02: enabled 1
1619 13:49:26.176905 APIC: 04: enabled 1
1620 13:49:26.180250 APIC: 07: enabled 1
1621 13:49:26.180326 APIC: 06: enabled 1
1622 13:49:26.183563 PCI: 00:08.0: enabled 1
1623 13:49:26.187058 PCI: 00:14.2: enabled 1
1624 13:49:26.189766 PCI: 01:00.0: enabled 1
1625 13:49:26.193426 Disabling ACPI via APMC:
1626 13:49:26.193509 done.
1627 13:49:26.200073 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 13:49:26.203375 ELOG: NV offset 0xaf0000 size 0x4000
1629 13:49:26.209986 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 13:49:26.217240 ELOG: Event(17) added with size 13 at 2023-10-26 13:49:02 UTC
1631 13:49:26.223254 ELOG: Event(92) added with size 9 at 2023-10-26 13:49:02 UTC
1632 13:49:26.229949 ELOG: Event(93) added with size 9 at 2023-10-26 13:49:02 UTC
1633 13:49:26.236890 ELOG: Event(9A) added with size 9 at 2023-10-26 13:49:02 UTC
1634 13:49:26.243200 ELOG: Event(9E) added with size 10 at 2023-10-26 13:49:02 UTC
1635 13:49:26.249733 ELOG: Event(9F) added with size 14 at 2023-10-26 13:49:02 UTC
1636 13:49:26.253052 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1637 13:49:26.260164 ELOG: Event(A1) added with size 10 at 2023-10-26 13:49:02 UTC
1638 13:49:26.270350 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1639 13:49:26.276887 ELOG: Event(A0) added with size 9 at 2023-10-26 13:49:02 UTC
1640 13:49:26.280127 elog_add_boot_reason: Logged dev mode boot
1641 13:49:26.283707 Finalize devices...
1642 13:49:26.283787 PCI: 00:17.0 final
1643 13:49:26.287236 Devices finalized
1644 13:49:26.290185 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1645 13:49:26.296703 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1646 13:49:26.300086 ME: HFSTS1 : 0x90000245
1647 13:49:26.303118 ME: HFSTS2 : 0x3B850126
1648 13:49:26.309719 ME: HFSTS3 : 0x00000020
1649 13:49:26.313540 ME: HFSTS4 : 0x00004800
1650 13:49:26.317062 ME: HFSTS5 : 0x00000000
1651 13:49:26.319940 ME: HFSTS6 : 0x40400006
1652 13:49:26.323170 ME: Manufacturing Mode : NO
1653 13:49:26.326569 ME: FW Partition Table : OK
1654 13:49:26.329851 ME: Bringup Loader Failure : NO
1655 13:49:26.332862 ME: Firmware Init Complete : YES
1656 13:49:26.336307 ME: Boot Options Present : NO
1657 13:49:26.339891 ME: Update In Progress : NO
1658 13:49:26.343074 ME: D0i3 Support : YES
1659 13:49:26.346070 ME: Low Power State Enabled : NO
1660 13:49:26.349846 ME: CPU Replaced : NO
1661 13:49:26.352871 ME: CPU Replacement Valid : YES
1662 13:49:26.356302 ME: Current Working State : 5
1663 13:49:26.359470 ME: Current Operation State : 1
1664 13:49:26.362643 ME: Current Operation Mode : 0
1665 13:49:26.365951 ME: Error Code : 0
1666 13:49:26.369547 ME: CPU Debug Disabled : YES
1667 13:49:26.372667 ME: TXT Support : NO
1668 13:49:26.379330 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1669 13:49:26.386254 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1670 13:49:26.386345 CBFS @ c08000 size 3f8000
1671 13:49:26.392816 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1672 13:49:26.395872 CBFS: Locating 'fallback/dsdt.aml'
1673 13:49:26.399196 CBFS: Found @ offset 10bb80 size 3fa5
1674 13:49:26.405724 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 13:49:26.409315 CBFS @ c08000 size 3f8000
1676 13:49:26.412298 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 13:49:26.415459 CBFS: Locating 'fallback/slic'
1678 13:49:26.421437 CBFS: 'fallback/slic' not found.
1679 13:49:26.427619 ACPI: Writing ACPI tables at 99b3e000.
1680 13:49:26.427708 ACPI: * FACS
1681 13:49:26.431001 ACPI: * DSDT
1682 13:49:26.434273 Ramoops buffer: 0x100000@0x99a3d000.
1683 13:49:26.437917 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1684 13:49:26.444011 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1685 13:49:26.447228 Google Chrome EC: version:
1686 13:49:26.450849 ro: helios_v2.0.2659-56403530b
1687 13:49:26.453996 rw: helios_v2.0.2849-c41de27e7d
1688 13:49:26.454077 running image: 1
1689 13:49:26.458119 ACPI: * FADT
1690 13:49:26.458240 SCI is IRQ9
1691 13:49:26.465051 ACPI: added table 1/32, length now 40
1692 13:49:26.465143 ACPI: * SSDT
1693 13:49:26.467926 Found 1 CPU(s) with 8 core(s) each.
1694 13:49:26.471349 Error: Could not locate 'wifi_sar' in VPD.
1695 13:49:26.478629 Checking CBFS for default SAR values
1696 13:49:26.481764 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 13:49:26.484802 CBFS @ c08000 size 3f8000
1698 13:49:26.491441 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 13:49:26.494483 CBFS: Locating 'wifi_sar_defaults.hex'
1700 13:49:26.497832 CBFS: Found @ offset 5fac0 size 77
1701 13:49:26.501214 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1702 13:49:26.507977 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1703 13:49:26.511121 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1704 13:49:26.518021 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1705 13:49:26.520772 failed to find key in VPD: dsm_calib_r0_0
1706 13:49:26.530870 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1707 13:49:26.534260 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1708 13:49:26.537526 failed to find key in VPD: dsm_calib_r0_1
1709 13:49:26.547417 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1710 13:49:26.553931 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1711 13:49:26.557535 failed to find key in VPD: dsm_calib_r0_2
1712 13:49:26.567240 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1713 13:49:26.570406 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1714 13:49:26.577006 failed to find key in VPD: dsm_calib_r0_3
1715 13:49:26.583601 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1716 13:49:26.590346 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1717 13:49:26.593756 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1718 13:49:26.597199 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1719 13:49:26.600794 EC returned error result code 1
1720 13:49:26.604597 EC returned error result code 1
1721 13:49:26.608588 EC returned error result code 1
1722 13:49:26.614905 PS2K: Bad resp from EC. Vivaldi disabled!
1723 13:49:26.618187 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 13:49:26.625125 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1725 13:49:26.632004 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1726 13:49:26.634768 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 13:49:26.641345 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 13:49:26.647934 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1729 13:49:26.654807 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 13:49:26.658261 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1731 13:49:26.664850 ACPI: added table 2/32, length now 44
1732 13:49:26.664940 ACPI: * MCFG
1733 13:49:26.667972 ACPI: added table 3/32, length now 48
1734 13:49:26.671182 ACPI: * TPM2
1735 13:49:26.674647 TPM2 log created at 99a2d000
1736 13:49:26.677979 ACPI: added table 4/32, length now 52
1737 13:49:26.678070 ACPI: * MADT
1738 13:49:26.680937 SCI is IRQ9
1739 13:49:26.684690 ACPI: added table 5/32, length now 56
1740 13:49:26.684781 current = 99b43ac0
1741 13:49:26.687932 ACPI: * DMAR
1742 13:49:26.691154 ACPI: added table 6/32, length now 60
1743 13:49:26.694493 ACPI: * IGD OpRegion
1744 13:49:26.694582 GMA: Found VBT in CBFS
1745 13:49:26.697677 GMA: Found valid VBT in CBFS
1746 13:49:26.700968 ACPI: added table 7/32, length now 64
1747 13:49:26.704236 ACPI: * HPET
1748 13:49:26.707677 ACPI: added table 8/32, length now 68
1749 13:49:26.710803 ACPI: done.
1750 13:49:26.710891 ACPI tables: 31744 bytes.
1751 13:49:26.714430 smbios_write_tables: 99a2c000
1752 13:49:26.718082 EC returned error result code 3
1753 13:49:26.720967 Couldn't obtain OEM name from CBI
1754 13:49:26.724189 Create SMBIOS type 17
1755 13:49:26.727602 PCI: 00:00.0 (Intel Cannonlake)
1756 13:49:26.731237 PCI: 00:14.3 (Intel WiFi)
1757 13:49:26.734312 SMBIOS tables: 939 bytes.
1758 13:49:26.738168 Writing table forward entry at 0x00000500
1759 13:49:26.744464 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1760 13:49:26.747397 Writing coreboot table at 0x99b62000
1761 13:49:26.754392 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1762 13:49:26.757373 1. 0000000000001000-000000000009ffff: RAM
1763 13:49:26.760679 2. 00000000000a0000-00000000000fffff: RESERVED
1764 13:49:26.767327 3. 0000000000100000-0000000099a2bfff: RAM
1765 13:49:26.771133 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1766 13:49:26.777715 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1767 13:49:26.783984 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1768 13:49:26.787270 7. 000000009a000000-000000009f7fffff: RESERVED
1769 13:49:26.794143 8. 00000000e0000000-00000000efffffff: RESERVED
1770 13:49:26.797094 9. 00000000fc000000-00000000fc000fff: RESERVED
1771 13:49:26.800601 10. 00000000fe000000-00000000fe00ffff: RESERVED
1772 13:49:26.807229 11. 00000000fed10000-00000000fed17fff: RESERVED
1773 13:49:26.811415 12. 00000000fed80000-00000000fed83fff: RESERVED
1774 13:49:26.817220 13. 00000000fed90000-00000000fed91fff: RESERVED
1775 13:49:26.820386 14. 00000000feda0000-00000000feda1fff: RESERVED
1776 13:49:26.827150 15. 0000000100000000-000000045e7fffff: RAM
1777 13:49:26.830470 Graphics framebuffer located at 0xc0000000
1778 13:49:26.833758 Passing 5 GPIOs to payload:
1779 13:49:26.837016 NAME | PORT | POLARITY | VALUE
1780 13:49:26.843901 write protect | undefined | high | low
1781 13:49:26.846725 lid | undefined | high | high
1782 13:49:26.853522 power | undefined | high | low
1783 13:49:26.860026 oprom | undefined | high | low
1784 13:49:26.863676 EC in RW | 0x000000cb | high | low
1785 13:49:26.866798 Board ID: 4
1786 13:49:26.869760 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 13:49:26.873124 CBFS @ c08000 size 3f8000
1788 13:49:26.879960 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 13:49:26.886932 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1790 13:49:26.887023 coreboot table: 1492 bytes.
1791 13:49:26.889801 IMD ROOT 0. 99fff000 00001000
1792 13:49:26.893296 IMD SMALL 1. 99ffe000 00001000
1793 13:49:26.896489 FSP MEMORY 2. 99c4e000 003b0000
1794 13:49:26.899837 CONSOLE 3. 99c2e000 00020000
1795 13:49:26.903233 FMAP 4. 99c2d000 0000054e
1796 13:49:26.906653 TIME STAMP 5. 99c2c000 00000910
1797 13:49:26.909988 VBOOT WORK 6. 99c18000 00014000
1798 13:49:26.913316 MRC DATA 7. 99c16000 00001958
1799 13:49:26.916534 ROMSTG STCK 8. 99c15000 00001000
1800 13:49:26.919827 AFTER CAR 9. 99c0b000 0000a000
1801 13:49:26.923174 RAMSTAGE 10. 99baf000 0005c000
1802 13:49:26.926355 REFCODE 11. 99b7a000 00035000
1803 13:49:26.929639 SMM BACKUP 12. 99b6a000 00010000
1804 13:49:26.932833 COREBOOT 13. 99b62000 00008000
1805 13:49:26.936471 ACPI 14. 99b3e000 00024000
1806 13:49:26.939887 ACPI GNVS 15. 99b3d000 00001000
1807 13:49:26.942845 RAMOOPS 16. 99a3d000 00100000
1808 13:49:26.946275 TPM2 TCGLOG17. 99a2d000 00010000
1809 13:49:26.950204 SMBIOS 18. 99a2c000 00000800
1810 13:49:26.952779 IMD small region:
1811 13:49:26.956086 IMD ROOT 0. 99ffec00 00000400
1812 13:49:26.959463 FSP RUNTIME 1. 99ffebe0 00000004
1813 13:49:26.962743 EC HOSTEVENT 2. 99ffebc0 00000008
1814 13:49:26.966413 POWER STATE 3. 99ffeb80 00000040
1815 13:49:26.969617 ROMSTAGE 4. 99ffeb60 00000004
1816 13:49:26.973041 MEM INFO 5. 99ffe9a0 000001b9
1817 13:49:26.976536 VPD 6. 99ffe920 0000006c
1818 13:49:26.979814 MTRR: Physical address space:
1819 13:49:26.986280 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1820 13:49:26.993070 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1821 13:49:26.999274 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1822 13:49:27.006093 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1823 13:49:27.013006 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1824 13:49:27.019194 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1825 13:49:27.022850 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1826 13:49:27.029129 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 13:49:27.032626 MTRR: Fixed MSR 0x258 0x0606060606060606
1828 13:49:27.035733 MTRR: Fixed MSR 0x259 0x0000000000000000
1829 13:49:27.038919 MTRR: Fixed MSR 0x268 0x0606060606060606
1830 13:49:27.045718 MTRR: Fixed MSR 0x269 0x0606060606060606
1831 13:49:27.049415 MTRR: Fixed MSR 0x26a 0x0606060606060606
1832 13:49:27.052184 MTRR: Fixed MSR 0x26b 0x0606060606060606
1833 13:49:27.055906 MTRR: Fixed MSR 0x26c 0x0606060606060606
1834 13:49:27.062104 MTRR: Fixed MSR 0x26d 0x0606060606060606
1835 13:49:27.065906 MTRR: Fixed MSR 0x26e 0x0606060606060606
1836 13:49:27.068943 MTRR: Fixed MSR 0x26f 0x0606060606060606
1837 13:49:27.072539 call enable_fixed_mtrr()
1838 13:49:27.075613 CPU physical address size: 39 bits
1839 13:49:27.079289 MTRR: default type WB/UC MTRR counts: 6/8.
1840 13:49:27.085789 MTRR: WB selected as default type.
1841 13:49:27.088976 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1842 13:49:27.095317 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1843 13:49:27.102192 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1844 13:49:27.108507 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1845 13:49:27.115386 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1846 13:49:27.122208 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1847 13:49:27.124955 MTRR: Fixed MSR 0x250 0x0606060606060606
1848 13:49:27.131484 MTRR: Fixed MSR 0x258 0x0606060606060606
1849 13:49:27.134822 MTRR: Fixed MSR 0x259 0x0000000000000000
1850 13:49:27.138511 MTRR: Fixed MSR 0x268 0x0606060606060606
1851 13:49:27.141704 MTRR: Fixed MSR 0x269 0x0606060606060606
1852 13:49:27.144803 MTRR: Fixed MSR 0x26a 0x0606060606060606
1853 13:49:27.151415 MTRR: Fixed MSR 0x26b 0x0606060606060606
1854 13:49:27.154848 MTRR: Fixed MSR 0x26c 0x0606060606060606
1855 13:49:27.158158 MTRR: Fixed MSR 0x26d 0x0606060606060606
1856 13:49:27.161460 MTRR: Fixed MSR 0x26e 0x0606060606060606
1857 13:49:27.167978 MTRR: Fixed MSR 0x26f 0x0606060606060606
1858 13:49:27.168075
1859 13:49:27.168147 MTRR check
1860 13:49:27.171449 Fixed MTRRs : Enabled
1861 13:49:27.174557 Variable MTRRs: Enabled
1862 13:49:27.174646
1863 13:49:27.174716 call enable_fixed_mtrr()
1864 13:49:27.181305 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1865 13:49:27.185288 CPU physical address size: 39 bits
1866 13:49:27.191255 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1867 13:49:27.194402 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 13:49:27.197849 MTRR: Fixed MSR 0x250 0x0606060606060606
1869 13:49:27.201268 MTRR: Fixed MSR 0x258 0x0606060606060606
1870 13:49:27.207973 MTRR: Fixed MSR 0x259 0x0000000000000000
1871 13:49:27.210966 MTRR: Fixed MSR 0x268 0x0606060606060606
1872 13:49:27.214399 MTRR: Fixed MSR 0x269 0x0606060606060606
1873 13:49:27.218039 MTRR: Fixed MSR 0x26a 0x0606060606060606
1874 13:49:27.224431 MTRR: Fixed MSR 0x26b 0x0606060606060606
1875 13:49:27.227564 MTRR: Fixed MSR 0x26c 0x0606060606060606
1876 13:49:27.231062 MTRR: Fixed MSR 0x26d 0x0606060606060606
1877 13:49:27.234313 MTRR: Fixed MSR 0x26e 0x0606060606060606
1878 13:49:27.240947 MTRR: Fixed MSR 0x26f 0x0606060606060606
1879 13:49:27.244028 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 13:49:27.247596 call enable_fixed_mtrr()
1881 13:49:27.251452 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 13:49:27.254123 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 13:49:27.258048 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 13:49:27.264263 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 13:49:27.267497 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 13:49:27.270535 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 13:49:27.274039 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 13:49:27.281175 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 13:49:27.283931 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 13:49:27.287112 CPU physical address size: 39 bits
1891 13:49:27.290368 call enable_fixed_mtrr()
1892 13:49:27.294045 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 13:49:27.297192 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 13:49:27.304132 MTRR: Fixed MSR 0x258 0x0606060606060606
1895 13:49:27.307557 MTRR: Fixed MSR 0x259 0x0000000000000000
1896 13:49:27.310318 MTRR: Fixed MSR 0x268 0x0606060606060606
1897 13:49:27.313619 MTRR: Fixed MSR 0x269 0x0606060606060606
1898 13:49:27.316774 MTRR: Fixed MSR 0x26a 0x0606060606060606
1899 13:49:27.323806 MTRR: Fixed MSR 0x26b 0x0606060606060606
1900 13:49:27.327003 MTRR: Fixed MSR 0x26c 0x0606060606060606
1901 13:49:27.330109 MTRR: Fixed MSR 0x26d 0x0606060606060606
1902 13:49:27.333618 MTRR: Fixed MSR 0x26e 0x0606060606060606
1903 13:49:27.340385 MTRR: Fixed MSR 0x26f 0x0606060606060606
1904 13:49:27.340475 CBFS @ c08000 size 3f8000
1905 13:49:27.346728 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1906 13:49:27.349917 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 13:49:27.353310 CBFS: Locating 'fallback/payload'
1908 13:49:27.356846 call enable_fixed_mtrr()
1909 13:49:27.360046 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 13:49:27.366440 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 13:49:27.369909 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 13:49:27.373059 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 13:49:27.376673 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 13:49:27.383055 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 13:49:27.386651 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 13:49:27.389575 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 13:49:27.392831 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 13:49:27.396722 CPU physical address size: 39 bits
1919 13:49:27.399968 call enable_fixed_mtrr()
1920 13:49:27.403380 CPU physical address size: 39 bits
1921 13:49:27.406745 CPU physical address size: 39 bits
1922 13:49:27.413154 CBFS: Found @ offset 1c96c0 size 3f798
1923 13:49:27.416718 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 13:49:27.420118 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 13:49:27.423326 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 13:49:27.426463 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 13:49:27.433240 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 13:49:27.436743 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 13:49:27.439642 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 13:49:27.443159 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 13:49:27.449981 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 13:49:27.452802 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 13:49:27.456425 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 13:49:27.459609 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 13:49:27.463360 call enable_fixed_mtrr()
1936 13:49:27.466072 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 13:49:27.473038 MTRR: Fixed MSR 0x259 0x0000000000000000
1938 13:49:27.476579 MTRR: Fixed MSR 0x268 0x0606060606060606
1939 13:49:27.479434 MTRR: Fixed MSR 0x269 0x0606060606060606
1940 13:49:27.482746 MTRR: Fixed MSR 0x26a 0x0606060606060606
1941 13:49:27.489247 MTRR: Fixed MSR 0x26b 0x0606060606060606
1942 13:49:27.492522 MTRR: Fixed MSR 0x26c 0x0606060606060606
1943 13:49:27.495927 MTRR: Fixed MSR 0x26d 0x0606060606060606
1944 13:49:27.499186 MTRR: Fixed MSR 0x26e 0x0606060606060606
1945 13:49:27.505954 MTRR: Fixed MSR 0x26f 0x0606060606060606
1946 13:49:27.509741 CPU physical address size: 39 bits
1947 13:49:27.512897 call enable_fixed_mtrr()
1948 13:49:27.515914 Checking segment from ROM address 0xffdd16f8
1949 13:49:27.519440 CPU physical address size: 39 bits
1950 13:49:27.522627 Checking segment from ROM address 0xffdd1714
1951 13:49:27.528918 Loading segment from ROM address 0xffdd16f8
1952 13:49:27.529008 code (compression=0)
1953 13:49:27.538982 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1954 13:49:27.548600 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1955 13:49:27.548690 it's not compressed!
1956 13:49:27.641591 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1957 13:49:27.648370 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1958 13:49:27.651552 Loading segment from ROM address 0xffdd1714
1959 13:49:27.655227 Entry Point 0x30000000
1960 13:49:27.658064 Loaded segments
1961 13:49:27.663841 Finalizing chipset.
1962 13:49:27.667044 Finalizing SMM.
1963 13:49:27.670736 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1964 13:49:27.674017 mp_park_aps done after 0 msecs.
1965 13:49:27.680899 Jumping to boot code at 30000000(99b62000)
1966 13:49:27.687082 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1967 13:49:27.687173
1968 13:49:27.687245
1969 13:49:27.687312
1970 13:49:27.690226 Starting depthcharge on Helios...
1971 13:49:27.690316
1972 13:49:27.690672 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1973 13:49:27.690782 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1974 13:49:27.690874 Setting prompt string to ['hatch:']
1975 13:49:27.690962 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1976 13:49:27.700437 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1977 13:49:27.700529
1978 13:49:27.706861 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1979 13:49:27.706952
1980 13:49:27.713996 board_setup: Info: eMMC controller not present; skipping
1981 13:49:27.714087
1982 13:49:27.716906 New NVMe Controller 0x30053ac0 @ 00:1d:00
1983 13:49:27.716998
1984 13:49:27.723556 board_setup: Info: SDHCI controller not present; skipping
1985 13:49:27.723646
1986 13:49:27.727320 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1987 13:49:27.727413
1988 13:49:27.730186 Wipe memory regions:
1989 13:49:27.730275
1990 13:49:27.733938 [0x00000000001000, 0x000000000a0000)
1991 13:49:27.734028
1992 13:49:27.736601 [0x00000000100000, 0x00000030000000)
1993 13:49:27.802698
1994 13:49:27.806209 [0x00000030657430, 0x00000099a2c000)
1995 13:49:27.952818
1996 13:49:27.956134 [0x00000100000000, 0x0000045e800000)
1997 13:49:29.412254
1998 13:49:29.412408 R8152: Initializing
1999 13:49:29.412483
2000 13:49:29.415546 Version 9 (ocp_data = 6010)
2001 13:49:29.420285
2002 13:49:29.420376 R8152: Done initializing
2003 13:49:29.420448
2004 13:49:29.422886 Adding net device
2005 13:49:29.905691
2006 13:49:29.905841 R8152: Initializing
2007 13:49:29.905917
2008 13:49:29.908980 Version 6 (ocp_data = 5c30)
2009 13:49:29.909071
2010 13:49:29.912542 R8152: Done initializing
2011 13:49:29.912632
2012 13:49:29.915715 net_add_device: Attemp to include the same device
2013 13:49:29.919863
2014 13:49:29.926467 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 13:49:29.926561
2016 13:49:29.926636
2017 13:49:29.926705
2018 13:49:29.926993 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 13:49:30.027305 hatch: tftpboot 192.168.201.1 11884149/tftp-deploy-2nqlo6o5/kernel/bzImage 11884149/tftp-deploy-2nqlo6o5/kernel/cmdline 11884149/tftp-deploy-2nqlo6o5/ramdisk/ramdisk.cpio.gz
2021 13:49:30.027457 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2022 13:49:30.027558 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2023 13:49:30.031964 tftpboot 192.168.201.1 11884149/tftp-deploy-2nqlo6o5/kernel/bzImloy-2nqlo6o5/kernel/cmdline 11884149/tftp-deploy-2nqlo6o5/ramdisk/ramdisk.cpio.gz
2024 13:49:30.032070
2025 13:49:30.032147 Waiting for link
2026 13:49:30.233118
2027 13:49:30.233273 done.
2028 13:49:30.233354
2029 13:49:30.233423 MAC: 00:24:32:50:1a:59
2030 13:49:30.233491
2031 13:49:30.236070 Sending DHCP discover... done.
2032 13:49:30.236154
2033 13:49:30.239513 Waiting for reply... done.
2034 13:49:30.239592
2035 13:49:30.242316 Sending DHCP request... done.
2036 13:49:30.242397
2037 13:49:30.245996 Waiting for reply... done.
2038 13:49:30.246076
2039 13:49:30.249322 My ip is 192.168.201.14
2040 13:49:30.249404
2041 13:49:30.252310 The DHCP server ip is 192.168.201.1
2042 13:49:30.252399
2043 13:49:30.255818 TFTP server IP predefined by user: 192.168.201.1
2044 13:49:30.255895
2045 13:49:30.265556 Bootfile predefined by user: 11884149/tftp-deploy-2nqlo6o5/kernel/bzImage
2046 13:49:30.265640
2047 13:49:30.268746 Sending tftp read request... done.
2048 13:49:30.268828
2049 13:49:30.273632 Waiting for the transfer...
2050 13:49:30.273714
2051 13:49:30.822222 00000000 ################################################################
2052 13:49:30.822366
2053 13:49:31.374687 00080000 ################################################################
2054 13:49:31.374833
2055 13:49:31.909684 00100000 ################################################################
2056 13:49:31.909838
2057 13:49:32.459444 00180000 ################################################################
2058 13:49:32.459599
2059 13:49:33.010451 00200000 ################################################################
2060 13:49:33.010604
2061 13:49:33.563696 00280000 ################################################################
2062 13:49:33.563854
2063 13:49:34.120026 00300000 ################################################################
2064 13:49:34.120178
2065 13:49:34.661145 00380000 ################################################################
2066 13:49:34.661290
2067 13:49:35.201223 00400000 ################################################################
2068 13:49:35.201371
2069 13:49:35.739622 00480000 ################################################################
2070 13:49:35.739783
2071 13:49:36.285282 00500000 ################################################################
2072 13:49:36.285439
2073 13:49:36.824275 00580000 ################################################################
2074 13:49:36.824421
2075 13:49:37.367719 00600000 ################################################################
2076 13:49:37.367866
2077 13:49:37.912192 00680000 ################################################################
2078 13:49:37.912344
2079 13:49:38.451393 00700000 ################################################################
2080 13:49:38.451553
2081 13:49:38.995270 00780000 ################################################################
2082 13:49:38.995425
2083 13:49:39.188521 00800000 ####################### done.
2084 13:49:39.188672
2085 13:49:39.192003 The bootfile was 8576912 bytes long.
2086 13:49:39.192096
2087 13:49:39.195475 Sending tftp read request... done.
2088 13:49:39.195566
2089 13:49:39.198273 Waiting for the transfer...
2090 13:49:39.198364
2091 13:49:39.713285 00000000 ################################################################
2092 13:49:39.713441
2093 13:49:40.231950 00080000 ################################################################
2094 13:49:40.232152
2095 13:49:40.746106 00100000 ################################################################
2096 13:49:40.746264
2097 13:49:41.256844 00180000 ################################################################
2098 13:49:41.256993
2099 13:49:41.780114 00200000 ################################################################
2100 13:49:41.780311
2101 13:49:42.297870 00280000 ################################################################
2102 13:49:42.298023
2103 13:49:42.816432 00300000 ################################################################
2104 13:49:42.816585
2105 13:49:43.329286 00380000 ################################################################
2106 13:49:43.329463
2107 13:49:43.847563 00400000 ################################################################
2108 13:49:43.847709
2109 13:49:44.358338 00480000 ################################################################
2110 13:49:44.358507
2111 13:49:44.920843 00500000 ################################################################
2112 13:49:44.921218
2113 13:49:45.604611 00580000 ################################################################
2114 13:49:45.605122
2115 13:49:46.287203 00600000 ################################################################
2116 13:49:46.287717
2117 13:49:46.976526 00680000 ################################################################
2118 13:49:46.977030
2119 13:49:47.556779 00700000 ################################################################
2120 13:49:47.556934
2121 13:49:48.181133 00780000 ################################################################
2122 13:49:48.181715
2123 13:49:48.748182 00800000 ###################################################### done.
2124 13:49:48.748704
2125 13:49:48.751770 Sending tftp read request... done.
2126 13:49:48.752226
2127 13:49:48.754713 Waiting for the transfer...
2128 13:49:48.755130
2129 13:49:48.755459 00000000 # done.
2130 13:49:48.755778
2131 13:49:48.765016 Command line loaded dynamically from TFTP file: 11884149/tftp-deploy-2nqlo6o5/kernel/cmdline
2132 13:49:48.765456
2133 13:49:48.784282 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2134 13:49:48.784810
2135 13:49:48.790846 ec_init(0): CrosEC protocol v3 supported (256, 256)
2136 13:49:48.795418
2137 13:49:48.799169 Shutting down all USB controllers.
2138 13:49:48.799682
2139 13:49:48.800053 Removing current net device
2140 13:49:48.802826
2141 13:49:48.803241 Finalizing coreboot
2142 13:49:48.803576
2143 13:49:48.809401 Exiting depthcharge with code 4 at timestamp: 28462365
2144 13:49:48.809818
2145 13:49:48.810148
2146 13:49:48.810455 Starting kernel ...
2147 13:49:48.810754
2148 13:49:48.811041
2149 13:49:48.812241 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2150 13:49:48.812752 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2151 13:49:48.813184 Setting prompt string to ['Linux version [0-9]']
2152 13:49:48.813531 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2153 13:49:48.813938 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2155 13:54:09.812972 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2157 13:54:09.813230 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2159 13:54:09.813437 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2162 13:54:09.813826 end: 2 depthcharge-action (duration 00:05:00) [common]
2164 13:54:09.814208 Cleaning after the job
2165 13:54:09.814348 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884149/tftp-deploy-2nqlo6o5/ramdisk
2166 13:54:09.815880 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884149/tftp-deploy-2nqlo6o5/kernel
2167 13:54:09.817407 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884149/tftp-deploy-2nqlo6o5/modules
2168 13:54:09.817949 start: 5.1 power-off (timeout 00:00:30) [common]
2169 13:54:09.818174 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2170 13:54:09.897107 >> Command sent successfully.
2171 13:54:09.900120 Returned 0 in 0 seconds
2172 13:54:10.000589 end: 5.1 power-off (duration 00:00:00) [common]
2174 13:54:10.001103 start: 5.2 read-feedback (timeout 00:10:00) [common]
2175 13:54:10.001441 Listened to connection for namespace 'common' for up to 1s
2177 13:54:10.001923 Listened to connection for namespace 'common' for up to 1s
2178 13:54:11.002362 Finalising connection for namespace 'common'
2179 13:54:11.002576 Disconnecting from shell: Finalise
2180 13:54:11.002677
2181 13:54:11.103031 end: 5.2 read-feedback (duration 00:00:01) [common]
2182 13:54:11.103228 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11884149
2183 13:54:11.125263 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11884149
2184 13:54:11.125501 JobError: Your job cannot terminate cleanly.