Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 13:42:46.169618 lava-dispatcher, installed at version: 2023.08
2 13:42:46.169790 start: 0 validate
3 13:42:46.169902 Start time: 2023-10-26 13:42:46.169894+00:00 (UTC)
4 13:42:46.170005 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:42:46.170112 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 13:42:46.420932 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:42:46.421115 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:42:46.679101 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:42:46.679287 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:42:46.933118 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:42:46.933276 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 13:42:47.185755 validate duration: 1.02
14 13:42:47.186020 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:42:47.186112 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:42:47.186187 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:42:47.186297 Not decompressing ramdisk as can be used compressed.
18 13:42:47.186373 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 13:42:47.186428 saving as /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/ramdisk/initrd.cpio.gz
20 13:42:47.186486 total size: 5432690 (5 MB)
21 13:42:47.187411 progress 0 % (0 MB)
22 13:42:47.188589 progress 5 % (0 MB)
23 13:42:47.189611 progress 10 % (0 MB)
24 13:42:47.190613 progress 15 % (0 MB)
25 13:42:47.191709 progress 20 % (1 MB)
26 13:42:47.192689 progress 25 % (1 MB)
27 13:42:47.193683 progress 30 % (1 MB)
28 13:42:47.194772 progress 35 % (1 MB)
29 13:42:47.195753 progress 40 % (2 MB)
30 13:42:47.196727 progress 45 % (2 MB)
31 13:42:47.197701 progress 50 % (2 MB)
32 13:42:47.198798 progress 55 % (2 MB)
33 13:42:47.199776 progress 60 % (3 MB)
34 13:42:47.200751 progress 65 % (3 MB)
35 13:42:47.201846 progress 70 % (3 MB)
36 13:42:47.202817 progress 75 % (3 MB)
37 13:42:47.203794 progress 80 % (4 MB)
38 13:42:47.204765 progress 85 % (4 MB)
39 13:42:47.205856 progress 90 % (4 MB)
40 13:42:47.206828 progress 95 % (4 MB)
41 13:42:47.207815 progress 100 % (5 MB)
42 13:42:47.207973 5 MB downloaded in 0.02 s (241.14 MB/s)
43 13:42:47.208107 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:42:47.208309 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:42:47.208378 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:42:47.208442 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:42:47.208542 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 13:42:47.208600 saving as /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/kernel/bzImage
50 13:42:47.208651 total size: 8576912 (8 MB)
51 13:42:47.208699 No compression specified
52 13:42:47.209699 progress 0 % (0 MB)
53 13:42:47.211362 progress 5 % (0 MB)
54 13:42:47.212958 progress 10 % (0 MB)
55 13:42:47.214563 progress 15 % (1 MB)
56 13:42:47.216155 progress 20 % (1 MB)
57 13:42:47.217765 progress 25 % (2 MB)
58 13:42:47.219348 progress 30 % (2 MB)
59 13:42:47.220939 progress 35 % (2 MB)
60 13:42:47.222525 progress 40 % (3 MB)
61 13:42:47.224097 progress 45 % (3 MB)
62 13:42:47.225671 progress 50 % (4 MB)
63 13:42:47.227284 progress 55 % (4 MB)
64 13:42:47.229014 progress 60 % (4 MB)
65 13:42:47.230583 progress 65 % (5 MB)
66 13:42:47.232125 progress 70 % (5 MB)
67 13:42:47.233687 progress 75 % (6 MB)
68 13:42:47.235234 progress 80 % (6 MB)
69 13:42:47.236773 progress 85 % (6 MB)
70 13:42:47.238341 progress 90 % (7 MB)
71 13:42:47.239897 progress 95 % (7 MB)
72 13:42:47.241493 progress 100 % (8 MB)
73 13:42:47.241662 8 MB downloaded in 0.03 s (247.83 MB/s)
74 13:42:47.241794 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:42:47.241992 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:42:47.242066 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:42:47.242134 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:42:47.242250 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 13:42:47.242308 saving as /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/nfsrootfs/full.rootfs.tar
81 13:42:47.242357 total size: 133380384 (127 MB)
82 13:42:47.242407 Using unxz to decompress xz
83 13:42:47.245706 progress 0 % (0 MB)
84 13:42:47.543863 progress 5 % (6 MB)
85 13:42:47.855093 progress 10 % (12 MB)
86 13:42:48.101247 progress 15 % (19 MB)
87 13:42:48.263835 progress 20 % (25 MB)
88 13:42:48.475754 progress 25 % (31 MB)
89 13:42:48.781002 progress 30 % (38 MB)
90 13:42:49.085483 progress 35 % (44 MB)
91 13:42:49.434594 progress 40 % (50 MB)
92 13:42:49.771832 progress 45 % (57 MB)
93 13:42:50.087516 progress 50 % (63 MB)
94 13:42:50.415633 progress 55 % (69 MB)
95 13:42:50.734908 progress 60 % (76 MB)
96 13:42:51.052489 progress 65 % (82 MB)
97 13:42:51.371383 progress 70 % (89 MB)
98 13:42:51.692142 progress 75 % (95 MB)
99 13:42:52.077678 progress 80 % (101 MB)
100 13:42:52.458646 progress 85 % (108 MB)
101 13:42:52.691240 progress 90 % (114 MB)
102 13:42:52.994134 progress 95 % (120 MB)
103 13:42:53.339147 progress 100 % (127 MB)
104 13:42:53.343881 127 MB downloaded in 6.10 s (20.85 MB/s)
105 13:42:53.344116 end: 1.3.1 http-download (duration 00:00:06) [common]
107 13:42:53.344350 end: 1.3 download-retry (duration 00:00:06) [common]
108 13:42:53.344462 start: 1.4 download-retry (timeout 00:09:54) [common]
109 13:42:53.344550 start: 1.4.1 http-download (timeout 00:09:54) [common]
110 13:42:53.344716 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 13:42:53.344780 saving as /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/modules/modules.tar
112 13:42:53.344830 total size: 253872 (0 MB)
113 13:42:53.344890 Using unxz to decompress xz
114 13:42:53.348468 progress 12 % (0 MB)
115 13:42:53.348773 progress 25 % (0 MB)
116 13:42:53.348970 progress 38 % (0 MB)
117 13:42:53.350593 progress 51 % (0 MB)
118 13:42:53.352233 progress 64 % (0 MB)
119 13:42:53.353903 progress 77 % (0 MB)
120 13:42:53.355541 progress 90 % (0 MB)
121 13:42:53.357027 progress 100 % (0 MB)
122 13:42:53.361994 0 MB downloaded in 0.02 s (14.11 MB/s)
123 13:42:53.362176 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:42:53.362427 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:42:53.362533 start: 1.5 prepare-tftp-overlay (timeout 00:09:54) [common]
127 13:42:53.362618 start: 1.5.1 extract-nfsrootfs (timeout 00:09:54) [common]
128 13:42:54.800611 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11884146/extract-nfsrootfs-bkyww2k8
129 13:42:54.800824 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
130 13:42:54.800942 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
131 13:42:54.801140 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta
132 13:42:54.801274 makedir: /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin
133 13:42:54.801363 makedir: /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/tests
134 13:42:54.801487 makedir: /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/results
135 13:42:54.801582 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-add-keys
136 13:42:54.801727 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-add-sources
137 13:42:54.801844 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-background-process-start
138 13:42:54.801955 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-background-process-stop
139 13:42:54.802080 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-common-functions
140 13:42:54.802208 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-echo-ipv4
141 13:42:54.802322 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-install-packages
142 13:42:54.802453 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-installed-packages
143 13:42:54.802559 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-os-build
144 13:42:54.802666 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-probe-channel
145 13:42:54.802781 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-probe-ip
146 13:42:54.802880 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-target-ip
147 13:42:54.802979 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-target-mac
148 13:42:54.803075 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-target-storage
149 13:42:54.803172 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-test-case
150 13:42:54.803278 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-test-event
151 13:42:54.803379 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-test-feedback
152 13:42:54.803480 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-test-raise
153 13:42:54.803571 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-test-reference
154 13:42:54.803673 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-test-runner
155 13:42:54.803767 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-test-set
156 13:42:54.803866 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-test-shell
157 13:42:54.803964 Updating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-install-packages (oe)
158 13:42:54.804089 Updating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/bin/lava-installed-packages (oe)
159 13:42:54.804184 Creating /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/environment
160 13:42:54.804265 LAVA metadata
161 13:42:54.804327 - LAVA_JOB_ID=11884146
162 13:42:54.804378 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:42:54.804465 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
164 13:42:54.804523 skipped lava-vland-overlay
165 13:42:54.804583 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:42:54.804645 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
167 13:42:54.804699 skipped lava-multinode-overlay
168 13:42:54.804758 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:42:54.804819 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
170 13:42:54.804877 Loading test definitions
171 13:42:54.804972 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
172 13:42:54.805033 Using /lava-11884146 at stage 0
173 13:42:54.805281 uuid=11884146_1.5.2.3.1 testdef=None
174 13:42:54.805361 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 13:42:54.805440 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
176 13:42:54.805879 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 13:42:54.806061 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
179 13:42:54.806674 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 13:42:54.806868 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
182 13:42:54.807432 runner path: /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/0/tests/0_dmesg test_uuid 11884146_1.5.2.3.1
183 13:42:54.807564 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 13:42:54.807752 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
186 13:42:54.807810 Using /lava-11884146 at stage 1
187 13:42:54.808044 uuid=11884146_1.5.2.3.5 testdef=None
188 13:42:54.808118 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 13:42:54.808188 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
190 13:42:54.808605 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 13:42:54.808783 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
193 13:42:54.809313 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 13:42:54.809759 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
196 13:42:54.810279 runner path: /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/1/tests/1_bootrr test_uuid 11884146_1.5.2.3.5
197 13:42:54.810404 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 13:42:54.810585 Creating lava-test-runner.conf files
200 13:42:54.810634 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/0 for stage 0
201 13:42:54.810706 - 0_dmesg
202 13:42:54.810775 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11884146/lava-overlay-2migqhta/lava-11884146/1 for stage 1
203 13:42:54.810846 - 1_bootrr
204 13:42:54.810927 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 13:42:54.811000 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
206 13:42:54.817009 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 13:42:54.817102 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
208 13:42:54.817182 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 13:42:54.817250 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 13:42:54.817316 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
211 13:42:54.912146 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 13:42:54.912441 start: 1.5.4 extract-modules (timeout 00:09:52) [common]
213 13:42:54.912551 extracting modules file /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884146/extract-nfsrootfs-bkyww2k8
214 13:42:54.922236 extracting modules file /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884146/extract-overlay-ramdisk-zvugzrav/ramdisk
215 13:42:54.931429 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 13:42:54.931562 start: 1.5.5 apply-overlay-tftp (timeout 00:09:52) [common]
217 13:42:54.931677 [common] Applying overlay to NFS
218 13:42:54.931737 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11884146/compress-overlay-sm0tapv8/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11884146/extract-nfsrootfs-bkyww2k8
219 13:42:54.937955 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 13:42:54.938071 start: 1.5.6 configure-preseed-file (timeout 00:09:52) [common]
221 13:42:54.938152 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 13:42:54.938225 start: 1.5.7 compress-ramdisk (timeout 00:09:52) [common]
223 13:42:54.938297 Building ramdisk /var/lib/lava/dispatcher/tmp/11884146/extract-overlay-ramdisk-zvugzrav/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11884146/extract-overlay-ramdisk-zvugzrav/ramdisk
224 13:42:54.969900 >> 26198 blocks
225 13:42:55.447542 rename /var/lib/lava/dispatcher/tmp/11884146/extract-overlay-ramdisk-zvugzrav/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/ramdisk/ramdisk.cpio.gz
226 13:42:55.447881 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 13:42:55.448018 start: 1.5.8 prepare-kernel (timeout 00:09:52) [common]
228 13:42:55.448118 start: 1.5.8.1 prepare-fit (timeout 00:09:52) [common]
229 13:42:55.448215 No mkimage arch provided, not using FIT.
230 13:42:55.448312 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 13:42:55.448399 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 13:42:55.448483 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
233 13:42:55.448573 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:52) [common]
234 13:42:55.448638 No LXC device requested
235 13:42:55.448703 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 13:42:55.448784 start: 1.7 deploy-device-env (timeout 00:09:52) [common]
237 13:42:55.448850 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 13:42:55.448907 Checking files for TFTP limit of 4294967296 bytes.
239 13:42:55.449244 end: 1 tftp-deploy (duration 00:00:08) [common]
240 13:42:55.449335 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 13:42:55.449417 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 13:42:55.449524 substitutions:
243 13:42:55.449593 - {DTB}: None
244 13:42:55.449649 - {INITRD}: 11884146/tftp-deploy-1kb74dpk/ramdisk/ramdisk.cpio.gz
245 13:42:55.449703 - {KERNEL}: 11884146/tftp-deploy-1kb74dpk/kernel/bzImage
246 13:42:55.449769 - {LAVA_MAC}: None
247 13:42:55.449834 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11884146/extract-nfsrootfs-bkyww2k8
248 13:42:55.449885 - {NFS_SERVER_IP}: 192.168.201.1
249 13:42:55.449931 - {PRESEED_CONFIG}: None
250 13:42:55.449975 - {PRESEED_LOCAL}: None
251 13:42:55.450024 - {RAMDISK}: 11884146/tftp-deploy-1kb74dpk/ramdisk/ramdisk.cpio.gz
252 13:42:55.450071 - {ROOT_PART}: None
253 13:42:55.450117 - {ROOT}: None
254 13:42:55.450161 - {SERVER_IP}: 192.168.201.1
255 13:42:55.450204 - {TEE}: None
256 13:42:55.450252 Parsed boot commands:
257 13:42:55.450298 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 13:42:55.450453 Parsed boot commands: tftpboot 192.168.201.1 11884146/tftp-deploy-1kb74dpk/kernel/bzImage 11884146/tftp-deploy-1kb74dpk/kernel/cmdline 11884146/tftp-deploy-1kb74dpk/ramdisk/ramdisk.cpio.gz
259 13:42:55.450535 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 13:42:55.450604 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 13:42:55.450687 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 13:42:55.450756 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 13:42:55.450810 Not connected, no need to disconnect.
264 13:42:55.450875 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 13:42:55.450943 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 13:42:55.450997 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-2'
267 13:42:55.453761 Setting prompt string to ['lava-test: # ']
268 13:42:55.454017 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 13:42:55.454113 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 13:42:55.454195 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 13:42:55.454268 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 13:42:55.454421 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-2' '--port=1' '--command=reboot'
273 13:43:00.580062 >> Command sent successfully.
274 13:43:00.587321 Returned 0 in 5 seconds
275 13:43:00.688341 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 13:43:00.689404 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 13:43:00.689768 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 13:43:00.690069 Setting prompt string to 'Starting depthcharge on Volmar...'
280 13:43:00.690308 Changing prompt to 'Starting depthcharge on Volmar...'
281 13:43:00.690548 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
282 13:43:00.691352 [Enter `^Ec?' for help]
283 13:43:02.058276
284 13:43:02.058770
285 13:43:02.065174 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
286 13:43:02.069319 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
287 13:43:02.072605 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
288 13:43:02.079260 CPU: AES supported, TXT NOT supported, VT supported
289 13:43:02.086024 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
290 13:43:02.089041 Cache size = 10 MiB
291 13:43:02.092496 MCH: device id 4609 (rev 04) is Alderlake-P
292 13:43:02.099189 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
293 13:43:02.102231 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
294 13:43:02.106115 VBOOT: Loading verstage.
295 13:43:02.109287 FMAP: Found "FLASH" version 1.1 at 0x1804000.
296 13:43:02.116101 FMAP: base = 0x0 size = 0x2000000 #areas = 37
297 13:43:02.119455 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 13:43:02.129920 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
299 13:43:02.136273 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
300 13:43:02.136713
301 13:43:02.136962
302 13:43:02.146269 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
303 13:43:02.153078 Probing TPM I2C: I2C bus 1 version 0x3230302a
304 13:43:02.156483 DW I2C bus 1 at 0xfe022000 (400 KHz)
305 13:43:02.159555 I2C TX abort detected (00000001)
306 13:43:02.162945 cr50_i2c_read: Address write failed
307 13:43:02.175014 .done! DID_VID 0x00281ae0
308 13:43:02.178148 TPM ready after 0 ms
309 13:43:02.181189 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
310 13:43:02.194836 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
311 13:43:02.200994 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
312 13:43:02.251605 tlcl_send_startup: Startup return code is 0
313 13:43:02.252039 TPM: setup succeeded
314 13:43:02.271227 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
315 13:43:02.291681 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
316 13:43:02.295490 Chrome EC: UHEPI supported
317 13:43:02.298642 Reading cr50 boot mode
318 13:43:02.313925 Cr50 says boot_mode is VERIFIED_RW(0x00).
319 13:43:02.314363 Phase 1
320 13:43:02.319960 FMAP: area GBB found @ 1805000 (458752 bytes)
321 13:43:02.326924 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
322 13:43:02.333107 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
323 13:43:02.340628 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
324 13:43:02.346519 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
325 13:43:02.349925 Recovery requested (1009000e)
326 13:43:02.356742 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
327 13:43:02.372245 tlcl_extend: response is 0
328 13:43:02.378788 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
329 13:43:02.385710 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
330 13:43:02.400059 tlcl_extend: response is 0
331 13:43:02.406844 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
332 13:43:02.409704 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 13:43:02.419535 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
334 13:43:02.426349 BS: verstage times (exec / console): total (unknown) / 151 ms
335 13:43:02.426788
336 13:43:02.427045
337 13:43:02.436895 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
338 13:43:02.439728 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 13:43:02.446426 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 13:43:02.449673 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
341 13:43:02.453207 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 13:43:02.459917 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
343 13:43:02.463468 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
344 13:43:02.466450 TCO_STS: 0000 0000
345 13:43:02.469895 GEN_PMCON: d0015038 00002200
346 13:43:02.473186 GBLRST_CAUSE: 00000000 00000000
347 13:43:02.473713 HPR_CAUSE0: 00000000
348 13:43:02.476467 prev_sleep_state 5
349 13:43:02.483258 Abort disabling TXT, as CPU is not TXT capable.
350 13:43:02.486636 cse_lite: Skip switching to RW in the recovery path
351 13:43:02.490170 Boot Count incremented to 1938
352 13:43:02.496854 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
353 13:43:02.503963 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
354 13:43:02.513501 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
355 13:43:02.520411 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
356 13:43:02.523819 Chrome EC: UHEPI supported
357 13:43:02.530335 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
358 13:43:02.542855 Probing TPM I2C: done! DID_VID 0x00281ae0
359 13:43:02.546617 Locality already claimed
360 13:43:02.549287 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
361 13:43:02.569720 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
362 13:43:02.576461 MRC: Hash idx 0x100b comparison successful.
363 13:43:02.579981 MRC cache found, size f6c8
364 13:43:02.580506 bootmode is set to: 2
365 13:43:02.583945 EC returned error result code 3
366 13:43:02.587136 FW_CONFIG value from CBI is 0x131
367 13:43:02.593797 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
368 13:43:02.597145 SPD index = 0
369 13:43:02.603795 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
370 13:43:02.607095 SPD: module type is LPDDR4X
371 13:43:02.610766 SPD: module part number is K4U6E3S4AB-MGCL
372 13:43:02.617212 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
373 13:43:02.620507 SPD: device width 16 bits, bus width 16 bits
374 13:43:02.623921 SPD: module size is 1024 MB (per channel)
375 13:43:02.717675 CBMEM:
376 13:43:02.721645 IMD: root @ 0x76fff000 254 entries.
377 13:43:02.725471 IMD: root @ 0x76ffec00 62 entries.
378 13:43:02.732284 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
379 13:43:02.736607 RO_VPD is uninitialized or empty.
380 13:43:02.738799 FMAP: area RW_VPD found @ f29000 (8192 bytes)
381 13:43:02.742471 External stage cache:
382 13:43:02.745420 IMD: root @ 0x7bbff000 254 entries.
383 13:43:02.748539 IMD: root @ 0x7bbfec00 62 entries.
384 13:43:02.755993 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
385 13:43:02.762662 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
386 13:43:02.769504 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
387 13:43:02.772852 MRC: 'RECOVERY_MRC_CACHE' does not need update.
388 13:43:02.775849 8 DIMMs found
389 13:43:02.776327 SMM Memory Map
390 13:43:02.779676 SMRAM : 0x7b800000 0x800000
391 13:43:02.782433 Subregion 0: 0x7b800000 0x200000
392 13:43:02.785761 Subregion 1: 0x7ba00000 0x200000
393 13:43:02.789002 Subregion 2: 0x7bc00000 0x400000
394 13:43:02.792696 top_of_ram = 0x77000000
395 13:43:02.799428 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
396 13:43:02.802514 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
397 13:43:02.809288 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
398 13:43:02.812760 MTRR Range: Start=ff000000 End=0 (Size 1000000)
399 13:43:02.816112 Normal boot
400 13:43:02.822382 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
401 13:43:02.833364 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
402 13:43:02.840699 Processing 237 relocs. Offset value of 0x74aba000
403 13:43:02.846662 BS: romstage times (exec / console): total (unknown) / 280 ms
404 13:43:02.853903
405 13:43:02.854287
406 13:43:02.860653 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
407 13:43:02.861106 Normal boot
408 13:43:02.867204 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
409 13:43:02.873913 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
410 13:43:02.880554 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
411 13:43:02.890500 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
412 13:43:02.938484 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
413 13:43:02.944990 Processing 5931 relocs. Offset value of 0x72a30000
414 13:43:02.948425 BS: postcar times (exec / console): total (unknown) / 51 ms
415 13:43:02.951940
416 13:43:02.952324
417 13:43:02.958477 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
418 13:43:02.961957 Reserving BERT start 76a1f000, size 10000
419 13:43:02.965288 Normal boot
420 13:43:02.968561 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
421 13:43:02.974682 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
422 13:43:02.985151 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
423 13:43:02.988345 FMAP: area RW_VPD found @ f29000 (8192 bytes)
424 13:43:02.992110 Google Chrome EC: version:
425 13:43:02.995520 ro: volmar_v2.0.14126-e605144e9c
426 13:43:02.998580 rw: volmar_v2.0.14126-e605144e9c
427 13:43:03.001820 running image: 2
428 13:43:03.005473 ACPI _SWS is PM1 Index 8 GPE Index -1
429 13:43:03.011904 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
430 13:43:03.015306 EC returned error result code 3
431 13:43:03.018810 FW_CONFIG value from CBI is 0x131
432 13:43:03.025671 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
433 13:43:03.028756 PCI: 00:1c.2 disabled by fw_config
434 13:43:03.032386 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
435 13:43:03.038944 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
436 13:43:03.042212 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
437 13:43:03.049020 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
438 13:43:03.052189 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
439 13:43:03.062217 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
440 13:43:03.065668 microcode: sig=0x906a4 pf=0x80 revision=0x423
441 13:43:03.071969 microcode: Update skipped, already up-to-date
442 13:43:03.079337 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
443 13:43:03.107683 Detected 6 core, 8 thread CPU.
444 13:43:03.111049 Setting up SMI for CPU
445 13:43:03.114249 IED base = 0x7bc00000
446 13:43:03.114597 IED size = 0x00400000
447 13:43:03.117731 Will perform SMM setup.
448 13:43:03.121165 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
449 13:43:03.124445 LAPIC 0x0 in XAPIC mode.
450 13:43:03.134846 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
451 13:43:03.137768 Processing 18 relocs. Offset value of 0x00030000
452 13:43:03.142291 Attempting to start 7 APs
453 13:43:03.145530 Waiting for 10ms after sending INIT.
454 13:43:03.158799 Waiting for SIPI to complete...
455 13:43:03.162194 done.
456 13:43:03.162715 LAPIC 0x1 in XAPIC mode.
457 13:43:03.165139 LAPIC 0x12 in XAPIC mode.
458 13:43:03.168891 LAPIC 0x10 in XAPIC mode.
459 13:43:03.171916 AP: slot 1 apic_id 12, MCU rev: 0x00000423
460 13:43:03.178571 AP: slot 4 apic_id 10, MCU rev: 0x00000423
461 13:43:03.179053 LAPIC 0x16 in XAPIC mode.
462 13:43:03.182003 LAPIC 0x14 in XAPIC mode.
463 13:43:03.185257 AP: slot 3 apic_id 16, MCU rev: 0x00000423
464 13:43:03.192054 AP: slot 2 apic_id 14, MCU rev: 0x00000423
465 13:43:03.195019 AP: slot 6 apic_id 1, MCU rev: 0x00000423
466 13:43:03.198321 LAPIC 0x8 in XAPIC mode.
467 13:43:03.201535 LAPIC 0x9 in XAPIC mode.
468 13:43:03.204978 AP: slot 7 apic_id 8, MCU rev: 0x00000423
469 13:43:03.208234 AP: slot 5 apic_id 9, MCU rev: 0x00000423
470 13:43:03.211841 Waiting for SIPI to complete...
471 13:43:03.212224 done.
472 13:43:03.214892 smm_setup_relocation_handler: enter
473 13:43:03.218460 smm_setup_relocation_handler: exit
474 13:43:03.228388 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
475 13:43:03.231796 Processing 11 relocs. Offset value of 0x00038000
476 13:43:03.238169 smm_module_setup_stub: stack_top = 0x7b804000
477 13:43:03.241479 smm_module_setup_stub: per cpu stack_size = 0x800
478 13:43:03.248564 smm_module_setup_stub: runtime.start32_offset = 0x4c
479 13:43:03.251179 smm_module_setup_stub: runtime.smm_size = 0x10000
480 13:43:03.258702 SMM Module: stub loaded at 38000. Will call 0x76a53094
481 13:43:03.261763 Installing permanent SMM handler to 0x7b800000
482 13:43:03.268008 smm_load_module: total_smm_space_needed e468, available -> 200000
483 13:43:03.278111 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
484 13:43:03.281572 Processing 255 relocs. Offset value of 0x7b9f6000
485 13:43:03.288064 smm_load_module: smram_start: 0x7b800000
486 13:43:03.291140 smm_load_module: smram_end: 7ba00000
487 13:43:03.294678 smm_load_module: handler start 0x7b9f6d5f
488 13:43:03.299636 smm_load_module: handler_size 98d0
489 13:43:03.303318 smm_load_module: fxsave_area 0x7b9ff000
490 13:43:03.306517 smm_load_module: fxsave_size 1000
491 13:43:03.309634 smm_load_module: CONFIG_MSEG_SIZE 0x0
492 13:43:03.312971 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
493 13:43:03.319700 smm_load_module: handler_mod_params.smbase = 0x7b800000
494 13:43:03.326094 smm_load_module: per_cpu_save_state_size = 0x400
495 13:43:03.329428 smm_load_module: num_cpus = 0x8
496 13:43:03.333138 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
497 13:43:03.339765 smm_load_module: total_save_state_size = 0x2000
498 13:43:03.343150 smm_load_module: cpu0 entry: 7b9e6000
499 13:43:03.346003 smm_create_map: cpus allowed in one segment 30
500 13:43:03.352958 smm_create_map: min # of segments needed 1
501 13:43:03.353313 CPU 0x0
502 13:43:03.356402 smbase 7b9e6000 entry 7b9ee000
503 13:43:03.359991 ss_start 7b9f5c00 code_end 7b9ee208
504 13:43:03.363028 CPU 0x1
505 13:43:03.366293 smbase 7b9e5c00 entry 7b9edc00
506 13:43:03.369410 ss_start 7b9f5800 code_end 7b9ede08
507 13:43:03.369801 CPU 0x2
508 13:43:03.376585 smbase 7b9e5800 entry 7b9ed800
509 13:43:03.379607 ss_start 7b9f5400 code_end 7b9eda08
510 13:43:03.379977 CPU 0x3
511 13:43:03.382762 smbase 7b9e5400 entry 7b9ed400
512 13:43:03.389358 ss_start 7b9f5000 code_end 7b9ed608
513 13:43:03.389814 CPU 0x4
514 13:43:03.392691 smbase 7b9e5000 entry 7b9ed000
515 13:43:03.399545 ss_start 7b9f4c00 code_end 7b9ed208
516 13:43:03.399968 CPU 0x5
517 13:43:03.402673 smbase 7b9e4c00 entry 7b9ecc00
518 13:43:03.405927 ss_start 7b9f4800 code_end 7b9ece08
519 13:43:03.409128 CPU 0x6
520 13:43:03.412852 smbase 7b9e4800 entry 7b9ec800
521 13:43:03.415889 ss_start 7b9f4400 code_end 7b9eca08
522 13:43:03.416242 CPU 0x7
523 13:43:03.423085 smbase 7b9e4400 entry 7b9ec400
524 13:43:03.425873 ss_start 7b9f4000 code_end 7b9ec608
525 13:43:03.432687 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
526 13:43:03.439487 Processing 11 relocs. Offset value of 0x7b9ee000
527 13:43:03.445838 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
528 13:43:03.449260 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
529 13:43:03.455983 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
530 13:43:03.463062 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
531 13:43:03.469855 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
532 13:43:03.476515 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
533 13:43:03.482770 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
534 13:43:03.489339 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
535 13:43:03.496018 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
536 13:43:03.499231 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
537 13:43:03.509113 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
538 13:43:03.513292 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
539 13:43:03.520085 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
540 13:43:03.526304 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
541 13:43:03.533122 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
542 13:43:03.536580 smm_module_setup_stub: stack_top = 0x7b804000
543 13:43:03.543407 smm_module_setup_stub: per cpu stack_size = 0x800
544 13:43:03.546403 smm_module_setup_stub: runtime.start32_offset = 0x4c
545 13:43:03.552693 smm_module_setup_stub: runtime.smm_size = 0x200000
546 13:43:03.559423 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
547 13:43:03.562831 Clearing SMI status registers
548 13:43:03.567071 SMI_STS: PM1
549 13:43:03.567492 PM1_STS: PWRBTN
550 13:43:03.573055 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
551 13:43:03.575940 In relocation handler: CPU 0
552 13:43:03.582968 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
553 13:43:03.586098 Writing SMRR. base = 0x7b800006, mask=0xff800c00
554 13:43:03.589260 Relocation complete.
555 13:43:03.596168 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
556 13:43:03.599219 In relocation handler: CPU 6
557 13:43:03.602797 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
558 13:43:03.606061 Relocation complete.
559 13:43:03.612200 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
560 13:43:03.616356 In relocation handler: CPU 2
561 13:43:03.619642 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
562 13:43:03.622690 Writing SMRR. base = 0x7b800006, mask=0xff800c00
563 13:43:03.626067 Relocation complete.
564 13:43:03.632997 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
565 13:43:03.636100 In relocation handler: CPU 1
566 13:43:03.639384 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
567 13:43:03.645836 Writing SMRR. base = 0x7b800006, mask=0xff800c00
568 13:43:03.646286 Relocation complete.
569 13:43:03.655867 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
570 13:43:03.656386 In relocation handler: CPU 3
571 13:43:03.662891 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
572 13:43:03.665780 Writing SMRR. base = 0x7b800006, mask=0xff800c00
573 13:43:03.669256 Relocation complete.
574 13:43:03.675563 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
575 13:43:03.679279 In relocation handler: CPU 4
576 13:43:03.682463 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
577 13:43:03.685712 Writing SMRR. base = 0x7b800006, mask=0xff800c00
578 13:43:03.689437 Relocation complete.
579 13:43:03.695852 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
580 13:43:03.699198 In relocation handler: CPU 5
581 13:43:03.702446 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
582 13:43:03.705798 Relocation complete.
583 13:43:03.712387 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
584 13:43:03.715509 In relocation handler: CPU 7
585 13:43:03.718948 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
586 13:43:03.725449 Writing SMRR. base = 0x7b800006, mask=0xff800c00
587 13:43:03.725811 Relocation complete.
588 13:43:03.728953 Initializing CPU #0
589 13:43:03.732136 CPU: vendor Intel device 906a4
590 13:43:03.735898 CPU: family 06, model 9a, stepping 04
591 13:43:03.738920 Clearing out pending MCEs
592 13:43:03.742798 cpu: energy policy set to 7
593 13:43:03.745526 Turbo is available but hidden
594 13:43:03.748751 Turbo is available and visible
595 13:43:03.752113 microcode: Update skipped, already up-to-date
596 13:43:03.755707 CPU #0 initialized
597 13:43:03.756175 Initializing CPU #6
598 13:43:03.759200 Initializing CPU #4
599 13:43:03.759591 Initializing CPU #1
600 13:43:03.762186 CPU: vendor Intel device 906a4
601 13:43:03.768904 CPU: family 06, model 9a, stepping 04
602 13:43:03.772277 CPU: vendor Intel device 906a4
603 13:43:03.775445 CPU: family 06, model 9a, stepping 04
604 13:43:03.775940 Clearing out pending MCEs
605 13:43:03.778736 Initializing CPU #2
606 13:43:03.782250 cpu: energy policy set to 7
607 13:43:03.785208 CPU: vendor Intel device 906a4
608 13:43:03.788745 CPU: family 06, model 9a, stepping 04
609 13:43:03.792247 Clearing out pending MCEs
610 13:43:03.795398 Clearing out pending MCEs
611 13:43:03.795796 Initializing CPU #3
612 13:43:03.801771 microcode: Update skipped, already up-to-date
613 13:43:03.802253 CPU #4 initialized
614 13:43:03.805154 cpu: energy policy set to 7
615 13:43:03.808665 CPU: vendor Intel device 906a4
616 13:43:03.812254 CPU: family 06, model 9a, stepping 04
617 13:43:03.815072 microcode: Update skipped, already up-to-date
618 13:43:03.818910 CPU #2 initialized
619 13:43:03.821937 Clearing out pending MCEs
620 13:43:03.825506 cpu: energy policy set to 7
621 13:43:03.828846 cpu: energy policy set to 7
622 13:43:03.831995 microcode: Update skipped, already up-to-date
623 13:43:03.835449 CPU #1 initialized
624 13:43:03.838945 microcode: Update skipped, already up-to-date
625 13:43:03.841909 CPU #3 initialized
626 13:43:03.842400 Initializing CPU #5
627 13:43:03.845093 CPU: vendor Intel device 906a4
628 13:43:03.848561 CPU: family 06, model 9a, stepping 04
629 13:43:03.851710 Initializing CPU #7
630 13:43:03.855236 CPU: vendor Intel device 906a4
631 13:43:03.858670 CPU: family 06, model 9a, stepping 04
632 13:43:03.862042 CPU: vendor Intel device 906a4
633 13:43:03.865335 CPU: family 06, model 9a, stepping 04
634 13:43:03.868394 Clearing out pending MCEs
635 13:43:03.871810 Clearing out pending MCEs
636 13:43:03.872298 Clearing out pending MCEs
637 13:43:03.875520 cpu: energy policy set to 7
638 13:43:03.878218 cpu: energy policy set to 7
639 13:43:03.881440 microcode: Update skipped, already up-to-date
640 13:43:03.884923 CPU #5 initialized
641 13:43:03.888253 microcode: Update skipped, already up-to-date
642 13:43:03.891595 CPU #7 initialized
643 13:43:03.895406 cpu: energy policy set to 7
644 13:43:03.898675 microcode: Update skipped, already up-to-date
645 13:43:03.901625 CPU #6 initialized
646 13:43:03.904952 bsp_do_flight_plan done after 688 msecs.
647 13:43:03.908288 CPU: frequency set to 4400 MHz
648 13:43:03.911612 Enabling SMIs.
649 13:43:03.915123 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
650 13:43:03.930936 Probing TPM I2C: done! DID_VID 0x00281ae0
651 13:43:03.934282 Locality already claimed
652 13:43:03.937450 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
653 13:43:03.949201 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
654 13:43:03.952171 Enabling GPIO PM b/c CR50 has long IRQ pulse support
655 13:43:03.958694 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
656 13:43:03.963170 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
657 13:43:03.970829 Found a VBT of 9216 bytes after decompression
658 13:43:03.973732 PCI 1.0, PIN A, using IRQ #16
659 13:43:03.977246 PCI 2.0, PIN A, using IRQ #17
660 13:43:03.980243 PCI 4.0, PIN A, using IRQ #18
661 13:43:03.983543 PCI 5.0, PIN A, using IRQ #16
662 13:43:03.986910 PCI 6.0, PIN A, using IRQ #16
663 13:43:03.987304 PCI 6.2, PIN C, using IRQ #18
664 13:43:03.990064 PCI 7.0, PIN A, using IRQ #19
665 13:43:03.993794 PCI 7.1, PIN B, using IRQ #20
666 13:43:03.997124 PCI 7.2, PIN C, using IRQ #21
667 13:43:04.000388 PCI 7.3, PIN D, using IRQ #22
668 13:43:04.003729 PCI 8.0, PIN A, using IRQ #23
669 13:43:04.006908 PCI D.0, PIN A, using IRQ #17
670 13:43:04.010032 PCI D.1, PIN B, using IRQ #19
671 13:43:04.013682 PCI 10.0, PIN A, using IRQ #24
672 13:43:04.016578 PCI 10.1, PIN B, using IRQ #25
673 13:43:04.020116 PCI 10.6, PIN C, using IRQ #20
674 13:43:04.023643 PCI 10.7, PIN D, using IRQ #21
675 13:43:04.027011 PCI 11.0, PIN A, using IRQ #26
676 13:43:04.030445 PCI 11.1, PIN B, using IRQ #27
677 13:43:04.033456 PCI 11.2, PIN C, using IRQ #28
678 13:43:04.037145 PCI 11.3, PIN D, using IRQ #29
679 13:43:04.039943 PCI 12.0, PIN A, using IRQ #30
680 13:43:04.040332 PCI 12.6, PIN B, using IRQ #31
681 13:43:04.043622 PCI 12.7, PIN C, using IRQ #22
682 13:43:04.047211 PCI 13.0, PIN A, using IRQ #32
683 13:43:04.049871 PCI 13.1, PIN B, using IRQ #33
684 13:43:04.053458 PCI 13.2, PIN C, using IRQ #34
685 13:43:04.056938 PCI 13.3, PIN D, using IRQ #35
686 13:43:04.060381 PCI 14.0, PIN B, using IRQ #23
687 13:43:04.063521 PCI 14.1, PIN A, using IRQ #36
688 13:43:04.066740 PCI 14.3, PIN C, using IRQ #17
689 13:43:04.070018 PCI 15.0, PIN A, using IRQ #37
690 13:43:04.073454 PCI 15.1, PIN B, using IRQ #38
691 13:43:04.076698 PCI 15.2, PIN C, using IRQ #39
692 13:43:04.079944 PCI 15.3, PIN D, using IRQ #40
693 13:43:04.083142 PCI 16.0, PIN A, using IRQ #18
694 13:43:04.086489 PCI 16.1, PIN B, using IRQ #19
695 13:43:04.089659 PCI 16.2, PIN C, using IRQ #20
696 13:43:04.092942 PCI 16.3, PIN D, using IRQ #21
697 13:43:04.093329 PCI 16.4, PIN A, using IRQ #18
698 13:43:04.096618 PCI 16.5, PIN B, using IRQ #19
699 13:43:04.099621 PCI 17.0, PIN A, using IRQ #22
700 13:43:04.103124 PCI 19.0, PIN A, using IRQ #41
701 13:43:04.107745 PCI 19.1, PIN B, using IRQ #42
702 13:43:04.109690 PCI 19.2, PIN C, using IRQ #43
703 13:43:04.112961 PCI 1C.0, PIN A, using IRQ #16
704 13:43:04.116435 PCI 1C.1, PIN B, using IRQ #17
705 13:43:04.119541 PCI 1C.2, PIN C, using IRQ #18
706 13:43:04.123268 PCI 1C.3, PIN D, using IRQ #19
707 13:43:04.126533 PCI 1C.4, PIN A, using IRQ #16
708 13:43:04.129640 PCI 1C.5, PIN B, using IRQ #17
709 13:43:04.133018 PCI 1C.6, PIN C, using IRQ #18
710 13:43:04.136622 PCI 1C.7, PIN D, using IRQ #19
711 13:43:04.140103 PCI 1D.0, PIN A, using IRQ #16
712 13:43:04.143139 PCI 1D.1, PIN B, using IRQ #17
713 13:43:04.143619 PCI 1D.2, PIN C, using IRQ #18
714 13:43:04.146536 PCI 1D.3, PIN D, using IRQ #19
715 13:43:04.149616 PCI 1E.0, PIN A, using IRQ #23
716 13:43:04.152782 PCI 1E.1, PIN B, using IRQ #20
717 13:43:04.156795 PCI 1E.2, PIN C, using IRQ #44
718 13:43:04.159794 PCI 1E.3, PIN D, using IRQ #45
719 13:43:04.163270 PCI 1F.3, PIN B, using IRQ #22
720 13:43:04.166815 PCI 1F.4, PIN C, using IRQ #23
721 13:43:04.169900 PCI 1F.6, PIN D, using IRQ #20
722 13:43:04.173238 PCI 1F.7, PIN A, using IRQ #21
723 13:43:04.176379 IRQ: Using dynamically assigned PCI IO-APIC IRQs
724 13:43:04.186176 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
725 13:43:04.351608 FSPS returned 0
726 13:43:04.354700 Executing Phase 1 of FspMultiPhaseSiInit
727 13:43:04.365162 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
728 13:43:04.369002 port C0 DISC req: usage 1 usb3 1 usb2 1
729 13:43:04.371439 Raw Buffer output 0 00000111
730 13:43:04.374599 Raw Buffer output 1 00000000
731 13:43:04.378583 pmc_send_ipc_cmd succeeded
732 13:43:04.382147 port C1 DISC req: usage 1 usb3 3 usb2 3
733 13:43:04.385234 Raw Buffer output 0 00000331
734 13:43:04.388574 Raw Buffer output 1 00000000
735 13:43:04.392709 pmc_send_ipc_cmd succeeded
736 13:43:04.396576 Detected 6 core, 8 thread CPU.
737 13:43:04.399765 Detected 6 core, 8 thread CPU.
738 13:43:04.404959 Detected 6 core, 8 thread CPU.
739 13:43:04.408178 Detected 6 core, 8 thread CPU.
740 13:43:04.411717 Detected 6 core, 8 thread CPU.
741 13:43:04.414995 Detected 6 core, 8 thread CPU.
742 13:43:04.418569 Detected 6 core, 8 thread CPU.
743 13:43:04.421272 Detected 6 core, 8 thread CPU.
744 13:43:04.424932 Detected 6 core, 8 thread CPU.
745 13:43:04.428513 Detected 6 core, 8 thread CPU.
746 13:43:04.431438 Detected 6 core, 8 thread CPU.
747 13:43:04.434521 Detected 6 core, 8 thread CPU.
748 13:43:04.438162 Detected 6 core, 8 thread CPU.
749 13:43:04.441343 Detected 6 core, 8 thread CPU.
750 13:43:04.444812 Detected 6 core, 8 thread CPU.
751 13:43:04.448005 Detected 6 core, 8 thread CPU.
752 13:43:04.451448 Detected 6 core, 8 thread CPU.
753 13:43:04.454777 Detected 6 core, 8 thread CPU.
754 13:43:04.458185 Detected 6 core, 8 thread CPU.
755 13:43:04.462000 Detected 6 core, 8 thread CPU.
756 13:43:04.464935 Detected 6 core, 8 thread CPU.
757 13:43:04.468510 Detected 6 core, 8 thread CPU.
758 13:43:04.754645 Detected 6 core, 8 thread CPU.
759 13:43:04.757711 Detected 6 core, 8 thread CPU.
760 13:43:04.761287 Detected 6 core, 8 thread CPU.
761 13:43:04.764470 Detected 6 core, 8 thread CPU.
762 13:43:04.768194 Detected 6 core, 8 thread CPU.
763 13:43:04.771296 Detected 6 core, 8 thread CPU.
764 13:43:04.774495 Detected 6 core, 8 thread CPU.
765 13:43:04.777887 Detected 6 core, 8 thread CPU.
766 13:43:04.781490 Detected 6 core, 8 thread CPU.
767 13:43:04.784460 Detected 6 core, 8 thread CPU.
768 13:43:04.787852 Detected 6 core, 8 thread CPU.
769 13:43:04.791376 Detected 6 core, 8 thread CPU.
770 13:43:04.794590 Detected 6 core, 8 thread CPU.
771 13:43:04.798238 Detected 6 core, 8 thread CPU.
772 13:43:04.800847 Detected 6 core, 8 thread CPU.
773 13:43:04.804520 Detected 6 core, 8 thread CPU.
774 13:43:04.807624 Detected 6 core, 8 thread CPU.
775 13:43:04.811228 Detected 6 core, 8 thread CPU.
776 13:43:04.814579 Detected 6 core, 8 thread CPU.
777 13:43:04.814986 Detected 6 core, 8 thread CPU.
778 13:43:04.818062 Display FSP Version Info HOB
779 13:43:04.821437 Reference Code - CPU = c.0.65.70
780 13:43:04.824912 uCode Version = 0.0.4.23
781 13:43:04.828888 TXT ACM version = ff.ff.ff.ffff
782 13:43:04.831573 Reference Code - ME = c.0.65.70
783 13:43:04.834738 MEBx version = 0.0.0.0
784 13:43:04.838148 ME Firmware Version = Consumer SKU
785 13:43:04.841498 Reference Code - PCH = c.0.65.70
786 13:43:04.844916 PCH-CRID Status = Disabled
787 13:43:04.848346 PCH-CRID Original Value = ff.ff.ff.ffff
788 13:43:04.851341 PCH-CRID New Value = ff.ff.ff.ffff
789 13:43:04.854771 OPROM - RST - RAID = ff.ff.ff.ffff
790 13:43:04.857811 PCH Hsio Version = 4.0.0.0
791 13:43:04.861587 Reference Code - SA - System Agent = c.0.65.70
792 13:43:04.864650 Reference Code - MRC = 0.0.3.80
793 13:43:04.867938 SA - PCIe Version = c.0.65.70
794 13:43:04.871712 SA-CRID Status = Disabled
795 13:43:04.874599 SA-CRID Original Value = 0.0.0.4
796 13:43:04.878295 SA-CRID New Value = 0.0.0.4
797 13:43:04.881509 OPROM - VBIOS = ff.ff.ff.ffff
798 13:43:04.884532 IO Manageability Engine FW Version = 24.0.4.0
799 13:43:04.888143 PHY Build Version = 0.0.0.2016
800 13:43:04.891222 Thunderbolt(TM) FW Version = 0.0.0.0
801 13:43:04.898054 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
802 13:43:04.904853 BS: BS_DEV_INIT_CHIPS run times (exec / console): 473 / 507 ms
803 13:43:04.907717 Enumerating buses...
804 13:43:04.911268 Show all devs... Before device enumeration.
805 13:43:04.914795 Root Device: enabled 1
806 13:43:04.915181 CPU_CLUSTER: 0: enabled 1
807 13:43:04.917624 DOMAIN: 0000: enabled 1
808 13:43:04.921049 GPIO: 0: enabled 1
809 13:43:04.921510 PCI: 00:00.0: enabled 1
810 13:43:04.924431 PCI: 00:01.0: enabled 0
811 13:43:04.927883 PCI: 00:01.1: enabled 0
812 13:43:04.931246 PCI: 00:02.0: enabled 1
813 13:43:04.931600 PCI: 00:04.0: enabled 1
814 13:43:04.934659 PCI: 00:05.0: enabled 0
815 13:43:04.937768 PCI: 00:06.0: enabled 1
816 13:43:04.941166 PCI: 00:06.2: enabled 0
817 13:43:04.941665 PCI: 00:07.0: enabled 0
818 13:43:04.944453 PCI: 00:07.1: enabled 0
819 13:43:04.947848 PCI: 00:07.2: enabled 0
820 13:43:04.948238 PCI: 00:07.3: enabled 0
821 13:43:04.951614 PCI: 00:08.0: enabled 0
822 13:43:04.954334 PCI: 00:09.0: enabled 0
823 13:43:04.958012 PCI: 00:0a.0: enabled 1
824 13:43:04.958446 PCI: 00:0d.0: enabled 1
825 13:43:04.961025 PCI: 00:0d.1: enabled 0
826 13:43:04.964685 PCI: 00:0d.2: enabled 0
827 13:43:04.968081 PCI: 00:0d.3: enabled 0
828 13:43:04.968557 PCI: 00:0e.0: enabled 0
829 13:43:04.971442 PCI: 00:10.0: enabled 0
830 13:43:04.974850 PCI: 00:10.1: enabled 0
831 13:43:04.977645 PCI: 00:10.6: enabled 0
832 13:43:04.978032 PCI: 00:10.7: enabled 0
833 13:43:04.987381 PCI: 00:12.0: enabled 0
834 13:43:04.987833 PCI: 00:12.6: enabled 0
835 13:43:04.997838 PCI: 00:12.7: enabled 0
836 13:43:04.998256 PCI: 00:13.0: enabled 0
837 13:43:04.998507 PCI: 00:14.0: enabled 1
838 13:43:04.998724 PCI: 00:14.1: enabled 0
839 13:43:04.998931 PCI: 00:14.2: enabled 1
840 13:43:05.006885 PCI: 00:14.3: enabled 1
841 13:43:05.007428 PCI: 00:15.0: enabled 1
842 13:43:05.007699 PCI: 00:15.1: enabled 1
843 13:43:05.013853 PCI: 00:15.2: enabled 0
844 13:43:05.014254 PCI: 00:15.3: enabled 1
845 13:43:05.014507 PCI: 00:16.0: enabled 1
846 13:43:05.020088 PCI: 00:16.1: enabled 0
847 13:43:05.020575 PCI: 00:16.2: enabled 0
848 13:43:05.028456 PCI: 00:16.3: enabled 0
849 13:43:05.028906 PCI: 00:16.4: enabled 0
850 13:43:05.029185 PCI: 00:16.5: enabled 0
851 13:43:05.029464 PCI: 00:17.0: enabled 1
852 13:43:05.029702 PCI: 00:19.0: enabled 0
853 13:43:05.035019 PCI: 00:19.1: enabled 1
854 13:43:05.035473 PCI: 00:19.2: enabled 0
855 13:43:05.035733 PCI: 00:1a.0: enabled 0
856 13:43:05.043070 PCI: 00:1c.0: enabled 0
857 13:43:05.043540 PCI: 00:1c.1: enabled 0
858 13:43:05.056474 PCI: 00:1c.2: enabled 0
859 13:43:05.056917 PCI: 00:1c.3: enabled 0
860 13:43:05.057183 PCI: 00:1c.4: enabled 0
861 13:43:05.057464 PCI: 00:1c.5: enabled 0
862 13:43:05.057712 PCI: 00:1c.6: enabled 0
863 13:43:05.068236 PCI: 00:1c.7: enabled 0
864 13:43:05.068655 PCI: 00:1d.0: enabled 0
865 13:43:05.068912 PCI: 00:1d.1: enabled 0
866 13:43:05.069433 PCI: 00:1d.2: enabled 0
867 13:43:05.069686 PCI: 00:1d.3: enabled 0
868 13:43:05.069897 PCI: 00:1e.0: enabled 1
869 13:43:05.076166 PCI: 00:1e.1: enabled 0
870 13:43:05.076652 PCI: 00:1e.2: enabled 0
871 13:43:05.081913 PCI: 00:1e.3: enabled 1
872 13:43:05.082333 PCI: 00:1f.0: enabled 1
873 13:43:05.082588 PCI: 00:1f.1: enabled 0
874 13:43:05.108337 PCI: 00:1f.2: enabled 1
875 13:43:05.108788 PCI: 00:1f.3: enabled 1
876 13:43:05.109068 PCI: 00:1f.4: enabled 0
877 13:43:05.109311 PCI: 00:1f.5: enabled 1
878 13:43:05.109651 PCI: 00:1f.6: enabled 0
879 13:43:05.109888 PCI: 00:1f.7: enabled 0
880 13:43:05.110109 GENERIC: 0.0: enabled 1
881 13:43:05.110628 GENERIC: 0.0: enabled 1
882 13:43:05.110898 GENERIC: 1.0: enabled 1
883 13:43:05.111131 GENERIC: 0.0: enabled 1
884 13:43:05.126871 GENERIC: 1.0: enabled 1
885 13:43:05.127378 USB0 port 0: enabled 1
886 13:43:05.127698 USB0 port 0: enabled 1
887 13:43:05.127939 GENERIC: 0.0: enabled 1
888 13:43:05.128172 I2C: 00:1a: enabled 1
889 13:43:05.128674 I2C: 00:31: enabled 1
890 13:43:05.128919 I2C: 00:32: enabled 1
891 13:43:05.129131 I2C: 00:50: enabled 1
892 13:43:05.172055 I2C: 00:10: enabled 1
893 13:43:05.172611 I2C: 00:15: enabled 1
894 13:43:05.172946 I2C: 00:2c: enabled 1
895 13:43:05.173552 GENERIC: 0.0: enabled 1
896 13:43:05.173861 SPI: 00: enabled 1
897 13:43:05.174104 PNP: 0c09.0: enabled 1
898 13:43:05.174331 GENERIC: 0.0: enabled 1
899 13:43:05.174553 USB3 port 0: enabled 1
900 13:43:05.174777 USB3 port 1: enabled 0
901 13:43:05.174997 USB3 port 2: enabled 1
902 13:43:05.175216 USB3 port 3: enabled 0
903 13:43:05.175436 USB2 port 0: enabled 1
904 13:43:05.175655 USB2 port 1: enabled 0
905 13:43:05.175879 USB2 port 2: enabled 1
906 13:43:05.176118 USB2 port 3: enabled 0
907 13:43:05.176355 USB2 port 4: enabled 0
908 13:43:05.176581 USB2 port 5: enabled 1
909 13:43:05.176799 USB2 port 6: enabled 0
910 13:43:05.177019 USB2 port 7: enabled 0
911 13:43:05.177284 USB2 port 8: enabled 1
912 13:43:05.177550 USB2 port 9: enabled 1
913 13:43:05.177784 USB3 port 0: enabled 1
914 13:43:05.185801 USB3 port 1: enabled 0
915 13:43:05.186168 USB3 port 2: enabled 0
916 13:43:05.186749 USB3 port 3: enabled 0
917 13:43:05.187015 GENERIC: 0.0: enabled 1
918 13:43:05.187232 GENERIC: 1.0: enabled 1
919 13:43:05.189685 APIC: 00: enabled 1
920 13:43:05.190314 APIC: 12: enabled 1
921 13:43:05.192923 APIC: 14: enabled 1
922 13:43:05.193529 APIC: 16: enabled 1
923 13:43:05.196306 APIC: 10: enabled 1
924 13:43:05.196850 APIC: 09: enabled 1
925 13:43:05.199945 APIC: 01: enabled 1
926 13:43:05.203517 APIC: 08: enabled 1
927 13:43:05.204040 Compare with tree...
928 13:43:05.207513 Root Device: enabled 1
929 13:43:05.207866 CPU_CLUSTER: 0: enabled 1
930 13:43:05.210583 APIC: 00: enabled 1
931 13:43:05.213809 APIC: 12: enabled 1
932 13:43:05.214165 APIC: 14: enabled 1
933 13:43:05.216938 APIC: 16: enabled 1
934 13:43:05.220530 APIC: 10: enabled 1
935 13:43:05.220953 APIC: 09: enabled 1
936 13:43:05.223951 APIC: 01: enabled 1
937 13:43:05.227575 APIC: 08: enabled 1
938 13:43:05.230751 DOMAIN: 0000: enabled 1
939 13:43:05.231226 GPIO: 0: enabled 1
940 13:43:05.233971 PCI: 00:00.0: enabled 1
941 13:43:05.237465 PCI: 00:01.0: enabled 0
942 13:43:05.240707 PCI: 00:01.1: enabled 0
943 13:43:05.241148 PCI: 00:02.0: enabled 1
944 13:43:05.244099 PCI: 00:04.0: enabled 1
945 13:43:05.247148 GENERIC: 0.0: enabled 1
946 13:43:05.250456 PCI: 00:05.0: enabled 0
947 13:43:05.253793 PCI: 00:06.0: enabled 1
948 13:43:05.254150 PCI: 00:06.2: enabled 0
949 13:43:05.257260 PCI: 00:08.0: enabled 0
950 13:43:05.260549 PCI: 00:09.0: enabled 0
951 13:43:05.263899 PCI: 00:0a.0: enabled 1
952 13:43:05.267289 PCI: 00:0d.0: enabled 1
953 13:43:05.267647 USB0 port 0: enabled 1
954 13:43:05.270923 USB3 port 0: enabled 1
955 13:43:05.274054 USB3 port 1: enabled 0
956 13:43:05.277090 USB3 port 2: enabled 1
957 13:43:05.280578 USB3 port 3: enabled 0
958 13:43:05.280932 PCI: 00:0d.1: enabled 0
959 13:43:05.284055 PCI: 00:0d.2: enabled 0
960 13:43:05.287184 PCI: 00:0d.3: enabled 0
961 13:43:05.290429 PCI: 00:0e.0: enabled 0
962 13:43:05.293601 PCI: 00:10.0: enabled 0
963 13:43:05.294041 PCI: 00:10.1: enabled 0
964 13:43:05.297172 PCI: 00:10.6: enabled 0
965 13:43:05.300420 PCI: 00:10.7: enabled 0
966 13:43:05.303578 PCI: 00:12.0: enabled 0
967 13:43:05.307083 PCI: 00:12.6: enabled 0
968 13:43:05.307551 PCI: 00:12.7: enabled 0
969 13:43:05.310482 PCI: 00:13.0: enabled 0
970 13:43:05.313171 PCI: 00:14.0: enabled 1
971 13:43:05.316676 USB0 port 0: enabled 1
972 13:43:05.320132 USB2 port 0: enabled 1
973 13:43:05.320592 USB2 port 1: enabled 0
974 13:43:05.323389 USB2 port 2: enabled 1
975 13:43:05.326607 USB2 port 3: enabled 0
976 13:43:05.330254 USB2 port 4: enabled 0
977 13:43:05.333610 USB2 port 5: enabled 1
978 13:43:05.337457 USB2 port 6: enabled 0
979 13:43:05.337922 USB2 port 7: enabled 0
980 13:43:05.340424 USB2 port 8: enabled 1
981 13:43:05.343861 USB2 port 9: enabled 1
982 13:43:05.346832 USB3 port 0: enabled 1
983 13:43:05.350242 USB3 port 1: enabled 0
984 13:43:05.350591 USB3 port 2: enabled 0
985 13:43:05.353808 USB3 port 3: enabled 0
986 13:43:05.357312 PCI: 00:14.1: enabled 0
987 13:43:05.360199 PCI: 00:14.2: enabled 1
988 13:43:05.363664 PCI: 00:14.3: enabled 1
989 13:43:05.366866 GENERIC: 0.0: enabled 1
990 13:43:05.367277 PCI: 00:15.0: enabled 1
991 13:43:05.369819 I2C: 00:1a: enabled 1
992 13:43:05.373574 I2C: 00:31: enabled 1
993 13:43:05.377116 I2C: 00:32: enabled 1
994 13:43:05.377656 PCI: 00:15.1: enabled 1
995 13:43:05.380247 I2C: 00:50: enabled 1
996 13:43:05.383867 PCI: 00:15.2: enabled 0
997 13:43:05.386781 PCI: 00:15.3: enabled 1
998 13:43:05.390239 I2C: 00:10: enabled 1
999 13:43:05.390689 PCI: 00:16.0: enabled 1
1000 13:43:05.393689 PCI: 00:16.1: enabled 0
1001 13:43:05.396863 PCI: 00:16.2: enabled 0
1002 13:43:05.400108 PCI: 00:16.3: enabled 0
1003 13:43:05.400614 PCI: 00:16.4: enabled 0
1004 13:43:05.403813 PCI: 00:16.5: enabled 0
1005 13:43:05.406797 PCI: 00:17.0: enabled 1
1006 13:43:05.410125 PCI: 00:19.0: enabled 0
1007 13:43:05.413220 PCI: 00:19.1: enabled 1
1008 13:43:05.413649 I2C: 00:15: enabled 1
1009 13:43:05.416618 I2C: 00:2c: enabled 1
1010 13:43:05.420283 PCI: 00:19.2: enabled 0
1011 13:43:05.423676 PCI: 00:1a.0: enabled 0
1012 13:43:05.426691 PCI: 00:1e.0: enabled 1
1013 13:43:05.427084 PCI: 00:1e.1: enabled 0
1014 13:43:05.429816 PCI: 00:1e.2: enabled 0
1015 13:43:05.433301 PCI: 00:1e.3: enabled 1
1016 13:43:05.436560 SPI: 00: enabled 1
1017 13:43:05.436924 PCI: 00:1f.0: enabled 1
1018 13:43:05.440315 PNP: 0c09.0: enabled 1
1019 13:43:05.443311 PCI: 00:1f.1: enabled 0
1020 13:43:05.446593 PCI: 00:1f.2: enabled 1
1021 13:43:05.450301 GENERIC: 0.0: enabled 1
1022 13:43:05.450713 GENERIC: 0.0: enabled 1
1023 13:43:05.453030 GENERIC: 1.0: enabled 1
1024 13:43:05.456634 PCI: 00:1f.3: enabled 1
1025 13:43:05.460240 PCI: 00:1f.4: enabled 0
1026 13:43:05.463185 PCI: 00:1f.5: enabled 1
1027 13:43:05.466480 PCI: 00:1f.6: enabled 0
1028 13:43:05.466821 PCI: 00:1f.7: enabled 0
1029 13:43:05.469438 Root Device scanning...
1030 13:43:05.472828 scan_static_bus for Root Device
1031 13:43:05.476338 CPU_CLUSTER: 0 enabled
1032 13:43:05.476597 DOMAIN: 0000 enabled
1033 13:43:05.480061 DOMAIN: 0000 scanning...
1034 13:43:05.483392 PCI: pci_scan_bus for bus 00
1035 13:43:05.486543 PCI: 00:00.0 [8086/0000] ops
1036 13:43:05.489619 PCI: 00:00.0 [8086/4609] enabled
1037 13:43:05.493010 PCI: 00:02.0 [8086/0000] bus ops
1038 13:43:05.496597 PCI: 00:02.0 [8086/46b3] enabled
1039 13:43:05.499929 PCI: 00:04.0 [8086/0000] bus ops
1040 13:43:05.503272 PCI: 00:04.0 [8086/461d] enabled
1041 13:43:05.506600 PCI: 00:06.0 [8086/0000] bus ops
1042 13:43:05.509926 PCI: 00:06.0 [8086/464d] enabled
1043 13:43:05.513023 PCI: 00:08.0 [8086/464f] disabled
1044 13:43:05.516567 PCI: 00:0a.0 [8086/467d] enabled
1045 13:43:05.519929 PCI: 00:0d.0 [8086/0000] bus ops
1046 13:43:05.523214 PCI: 00:0d.0 [8086/461e] enabled
1047 13:43:05.526596 PCI: 00:14.0 [8086/0000] bus ops
1048 13:43:05.529634 PCI: 00:14.0 [8086/51ed] enabled
1049 13:43:05.533312 PCI: 00:14.2 [8086/51ef] enabled
1050 13:43:05.536541 PCI: 00:14.3 [8086/0000] bus ops
1051 13:43:05.539648 PCI: 00:14.3 [8086/51f0] enabled
1052 13:43:05.543130 PCI: 00:15.0 [8086/0000] bus ops
1053 13:43:05.546368 PCI: 00:15.0 [8086/51e8] enabled
1054 13:43:05.549806 PCI: 00:15.1 [8086/0000] bus ops
1055 13:43:05.552723 PCI: 00:15.1 [8086/51e9] enabled
1056 13:43:05.556513 PCI: 00:15.2 [8086/0000] bus ops
1057 13:43:05.559737 PCI: 00:15.2 [8086/51ea] disabled
1058 13:43:05.563395 PCI: 00:15.3 [8086/0000] bus ops
1059 13:43:05.566266 PCI: 00:15.3 [8086/51eb] enabled
1060 13:43:05.569714 PCI: 00:16.0 [8086/0000] ops
1061 13:43:05.572856 PCI: 00:16.0 [8086/51e0] enabled
1062 13:43:05.579621 PCI: Static device PCI: 00:17.0 not found, disabling it.
1063 13:43:05.582778 PCI: 00:19.0 [8086/0000] bus ops
1064 13:43:05.586176 PCI: 00:19.0 [8086/51c5] disabled
1065 13:43:05.589482 PCI: 00:19.1 [8086/0000] bus ops
1066 13:43:05.592968 PCI: 00:19.1 [8086/51c6] enabled
1067 13:43:05.596232 PCI: 00:1e.0 [8086/0000] ops
1068 13:43:05.599702 PCI: 00:1e.0 [8086/51a8] enabled
1069 13:43:05.602857 PCI: 00:1e.3 [8086/0000] bus ops
1070 13:43:05.606250 PCI: 00:1e.3 [8086/51ab] enabled
1071 13:43:05.609078 PCI: 00:1f.0 [8086/0000] bus ops
1072 13:43:05.612598 PCI: 00:1f.0 [8086/5182] enabled
1073 13:43:05.615931 RTC Init
1074 13:43:05.619042 Set power on after power failure.
1075 13:43:05.619382 Disabling Deep S3
1076 13:43:05.622491 Disabling Deep S3
1077 13:43:05.622843 Disabling Deep S4
1078 13:43:05.625862 Disabling Deep S4
1079 13:43:05.629049 Disabling Deep S5
1080 13:43:05.629488 Disabling Deep S5
1081 13:43:05.632585 PCI: 00:1f.2 [0000/0000] hidden
1082 13:43:05.636092 PCI: 00:1f.3 [8086/0000] bus ops
1083 13:43:05.639374 PCI: 00:1f.3 [8086/51c8] enabled
1084 13:43:05.642610 PCI: 00:1f.5 [8086/0000] bus ops
1085 13:43:05.645939 PCI: 00:1f.5 [8086/51a4] enabled
1086 13:43:05.649203 GPIO: 0 enabled
1087 13:43:05.652512 PCI: Leftover static devices:
1088 13:43:05.652980 PCI: 00:01.0
1089 13:43:05.653281 PCI: 00:01.1
1090 13:43:05.655729 PCI: 00:05.0
1091 13:43:05.656053 PCI: 00:06.2
1092 13:43:05.659114 PCI: 00:09.0
1093 13:43:05.659578 PCI: 00:0d.1
1094 13:43:05.659897 PCI: 00:0d.2
1095 13:43:05.662494 PCI: 00:0d.3
1096 13:43:05.662835 PCI: 00:0e.0
1097 13:43:05.666102 PCI: 00:10.0
1098 13:43:05.666523 PCI: 00:10.1
1099 13:43:05.666771 PCI: 00:10.6
1100 13:43:05.669038 PCI: 00:10.7
1101 13:43:05.669421 PCI: 00:12.0
1102 13:43:05.672449 PCI: 00:12.6
1103 13:43:05.672876 PCI: 00:12.7
1104 13:43:05.675542 PCI: 00:13.0
1105 13:43:05.675879 PCI: 00:14.1
1106 13:43:05.676115 PCI: 00:16.1
1107 13:43:05.679177 PCI: 00:16.2
1108 13:43:05.679514 PCI: 00:16.3
1109 13:43:05.682384 PCI: 00:16.4
1110 13:43:05.682727 PCI: 00:16.5
1111 13:43:05.682968 PCI: 00:17.0
1112 13:43:05.686229 PCI: 00:19.2
1113 13:43:05.686565 PCI: 00:1a.0
1114 13:43:05.689131 PCI: 00:1e.1
1115 13:43:05.689570 PCI: 00:1e.2
1116 13:43:05.689813 PCI: 00:1f.1
1117 13:43:05.692747 PCI: 00:1f.4
1118 13:43:05.693174 PCI: 00:1f.6
1119 13:43:05.695869 PCI: 00:1f.7
1120 13:43:05.699256 PCI: Check your devicetree.cb.
1121 13:43:05.699707 PCI: 00:02.0 scanning...
1122 13:43:05.702788 scan_generic_bus for PCI: 00:02.0
1123 13:43:05.709041 scan_generic_bus for PCI: 00:02.0 done
1124 13:43:05.712619 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1125 13:43:05.716101 PCI: 00:04.0 scanning...
1126 13:43:05.719053 scan_generic_bus for PCI: 00:04.0
1127 13:43:05.719522 GENERIC: 0.0 enabled
1128 13:43:05.725604 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1129 13:43:05.732526 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1130 13:43:05.733004 PCI: 00:06.0 scanning...
1131 13:43:05.738874 do_pci_scan_bridge for PCI: 00:06.0
1132 13:43:05.739250 PCI: pci_scan_bus for bus 01
1133 13:43:05.742405 PCI: 01:00.0 [15b7/5009] enabled
1134 13:43:05.749149 Enabling Common Clock Configuration
1135 13:43:05.752372 L1 Sub-State supported from root port 6
1136 13:43:05.755541 L1 Sub-State Support = 0x5
1137 13:43:05.759051 CommonModeRestoreTime = 0x6e
1138 13:43:05.761724 Power On Value = 0x5, Power On Scale = 0x2
1139 13:43:05.762011 ASPM: Enabled L1
1140 13:43:05.769101 PCIe: Max_Payload_Size adjusted to 256
1141 13:43:05.769549 PCI: 01:00.0: Enabled LTR
1142 13:43:05.775801 PCI: 01:00.0: Programmed LTR max latencies
1143 13:43:05.778819 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1144 13:43:05.782566 PCI: 00:0d.0 scanning...
1145 13:43:05.786248 scan_static_bus for PCI: 00:0d.0
1146 13:43:05.786613 USB0 port 0 enabled
1147 13:43:05.789542 USB0 port 0 scanning...
1148 13:43:05.792606 scan_static_bus for USB0 port 0
1149 13:43:05.796083 USB3 port 0 enabled
1150 13:43:05.796497 USB3 port 1 disabled
1151 13:43:05.799284 USB3 port 2 enabled
1152 13:43:05.799625 USB3 port 3 disabled
1153 13:43:05.802756 USB3 port 0 scanning...
1154 13:43:05.806222 scan_static_bus for USB3 port 0
1155 13:43:05.809424 scan_static_bus for USB3 port 0 done
1156 13:43:05.816098 scan_bus: bus USB3 port 0 finished in 6 msecs
1157 13:43:05.816442 USB3 port 2 scanning...
1158 13:43:05.819342 scan_static_bus for USB3 port 2
1159 13:43:05.825676 scan_static_bus for USB3 port 2 done
1160 13:43:05.829168 scan_bus: bus USB3 port 2 finished in 6 msecs
1161 13:43:05.832596 scan_static_bus for USB0 port 0 done
1162 13:43:05.836056 scan_bus: bus USB0 port 0 finished in 43 msecs
1163 13:43:05.842603 scan_static_bus for PCI: 00:0d.0 done
1164 13:43:05.845710 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1165 13:43:05.849084 PCI: 00:14.0 scanning...
1166 13:43:05.852502 scan_static_bus for PCI: 00:14.0
1167 13:43:05.852960 USB0 port 0 enabled
1168 13:43:05.855885 USB0 port 0 scanning...
1169 13:43:05.859297 scan_static_bus for USB0 port 0
1170 13:43:05.862218 USB2 port 0 enabled
1171 13:43:05.862599 USB2 port 1 disabled
1172 13:43:05.865669 USB2 port 2 enabled
1173 13:43:05.869074 USB2 port 3 disabled
1174 13:43:05.869440 USB2 port 4 disabled
1175 13:43:05.872626 USB2 port 5 enabled
1176 13:43:05.875874 USB2 port 6 disabled
1177 13:43:05.876308 USB2 port 7 disabled
1178 13:43:05.879097 USB2 port 8 enabled
1179 13:43:05.879443 USB2 port 9 enabled
1180 13:43:05.882298 USB3 port 0 enabled
1181 13:43:05.885573 USB3 port 1 disabled
1182 13:43:05.885914 USB3 port 2 disabled
1183 13:43:05.889494 USB3 port 3 disabled
1184 13:43:05.892426 USB2 port 0 scanning...
1185 13:43:05.895698 scan_static_bus for USB2 port 0
1186 13:43:05.899157 scan_static_bus for USB2 port 0 done
1187 13:43:05.902684 scan_bus: bus USB2 port 0 finished in 6 msecs
1188 13:43:05.905668 USB2 port 2 scanning...
1189 13:43:05.908718 scan_static_bus for USB2 port 2
1190 13:43:05.912021 scan_static_bus for USB2 port 2 done
1191 13:43:05.915535 scan_bus: bus USB2 port 2 finished in 6 msecs
1192 13:43:05.918724 USB2 port 5 scanning...
1193 13:43:05.922223 scan_static_bus for USB2 port 5
1194 13:43:05.925501 scan_static_bus for USB2 port 5 done
1195 13:43:05.932212 scan_bus: bus USB2 port 5 finished in 6 msecs
1196 13:43:05.932645 USB2 port 8 scanning...
1197 13:43:05.935478 scan_static_bus for USB2 port 8
1198 13:43:05.938846 scan_static_bus for USB2 port 8 done
1199 13:43:05.945672 scan_bus: bus USB2 port 8 finished in 6 msecs
1200 13:43:05.948633 USB2 port 9 scanning...
1201 13:43:05.952143 scan_static_bus for USB2 port 9
1202 13:43:05.955275 scan_static_bus for USB2 port 9 done
1203 13:43:05.958963 scan_bus: bus USB2 port 9 finished in 6 msecs
1204 13:43:05.962161 USB3 port 0 scanning...
1205 13:43:05.965497 scan_static_bus for USB3 port 0
1206 13:43:05.968966 scan_static_bus for USB3 port 0 done
1207 13:43:05.972458 scan_bus: bus USB3 port 0 finished in 6 msecs
1208 13:43:05.975605 scan_static_bus for USB0 port 0 done
1209 13:43:05.982640 scan_bus: bus USB0 port 0 finished in 120 msecs
1210 13:43:05.985167 scan_static_bus for PCI: 00:14.0 done
1211 13:43:05.988549 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1212 13:43:05.992018 PCI: 00:14.3 scanning...
1213 13:43:05.995442 scan_static_bus for PCI: 00:14.3
1214 13:43:05.998685 GENERIC: 0.0 enabled
1215 13:43:06.002028 scan_static_bus for PCI: 00:14.3 done
1216 13:43:06.005111 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1217 13:43:06.008260 PCI: 00:15.0 scanning...
1218 13:43:06.011821 scan_static_bus for PCI: 00:15.0
1219 13:43:06.015471 I2C: 00:1a enabled
1220 13:43:06.015873 I2C: 00:31 enabled
1221 13:43:06.018571 I2C: 00:32 enabled
1222 13:43:06.021824 scan_static_bus for PCI: 00:15.0 done
1223 13:43:06.025139 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1224 13:43:06.028281 PCI: 00:15.1 scanning...
1225 13:43:06.032111 scan_static_bus for PCI: 00:15.1
1226 13:43:06.035528 I2C: 00:50 enabled
1227 13:43:06.038545 scan_static_bus for PCI: 00:15.1 done
1228 13:43:06.041771 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1229 13:43:06.045019 PCI: 00:15.3 scanning...
1230 13:43:06.048474 scan_static_bus for PCI: 00:15.3
1231 13:43:06.051524 I2C: 00:10 enabled
1232 13:43:06.054771 scan_static_bus for PCI: 00:15.3 done
1233 13:43:06.058214 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1234 13:43:06.061622 PCI: 00:19.1 scanning...
1235 13:43:06.065073 scan_static_bus for PCI: 00:19.1
1236 13:43:06.068489 I2C: 00:15 enabled
1237 13:43:06.068935 I2C: 00:2c enabled
1238 13:43:06.071944 scan_static_bus for PCI: 00:19.1 done
1239 13:43:06.078178 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1240 13:43:06.081422 PCI: 00:1e.3 scanning...
1241 13:43:06.084626 scan_generic_bus for PCI: 00:1e.3
1242 13:43:06.084985 SPI: 00 enabled
1243 13:43:06.091942 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1244 13:43:06.095530 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1245 13:43:06.098360 PCI: 00:1f.0 scanning...
1246 13:43:06.101146 scan_static_bus for PCI: 00:1f.0
1247 13:43:06.104421 PNP: 0c09.0 enabled
1248 13:43:06.107885 PNP: 0c09.0 scanning...
1249 13:43:06.111198 scan_static_bus for PNP: 0c09.0
1250 13:43:06.114524 scan_static_bus for PNP: 0c09.0 done
1251 13:43:06.117877 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1252 13:43:06.120872 scan_static_bus for PCI: 00:1f.0 done
1253 13:43:06.127602 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1254 13:43:06.128004 PCI: 00:1f.2 scanning...
1255 13:43:06.131262 scan_static_bus for PCI: 00:1f.2
1256 13:43:06.135042 GENERIC: 0.0 enabled
1257 13:43:06.138241 GENERIC: 0.0 scanning...
1258 13:43:06.140990 scan_static_bus for GENERIC: 0.0
1259 13:43:06.141339 GENERIC: 0.0 enabled
1260 13:43:06.144802 GENERIC: 1.0 enabled
1261 13:43:06.148194 scan_static_bus for GENERIC: 0.0 done
1262 13:43:06.154178 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1263 13:43:06.157654 scan_static_bus for PCI: 00:1f.2 done
1264 13:43:06.160962 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1265 13:43:06.164341 PCI: 00:1f.3 scanning...
1266 13:43:06.167862 scan_static_bus for PCI: 00:1f.3
1267 13:43:06.171100 scan_static_bus for PCI: 00:1f.3 done
1268 13:43:06.177644 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1269 13:43:06.178049 PCI: 00:1f.5 scanning...
1270 13:43:06.181024 scan_generic_bus for PCI: 00:1f.5
1271 13:43:06.187784 scan_generic_bus for PCI: 00:1f.5 done
1272 13:43:06.191004 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1273 13:43:06.194560 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1274 13:43:06.200693 scan_static_bus for Root Device done
1275 13:43:06.204050 scan_bus: bus Root Device finished in 729 msecs
1276 13:43:06.204389 done
1277 13:43:06.210610 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1278 13:43:06.214120 Chrome EC: UHEPI supported
1279 13:43:06.220892 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1280 13:43:06.227514 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1281 13:43:06.231433 SPI flash protection: WPSW=0 SRP0=0
1282 13:43:06.234347 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1283 13:43:06.240872 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1284 13:43:06.244661 found VGA at PCI: 00:02.0
1285 13:43:06.247882 Setting up VGA for PCI: 00:02.0
1286 13:43:06.251046 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1287 13:43:06.257732 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1288 13:43:06.258074 Allocating resources...
1289 13:43:06.260739 Reading resources...
1290 13:43:06.264099 Root Device read_resources bus 0 link: 0
1291 13:43:06.271267 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1292 13:43:06.274043 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1293 13:43:06.277877 DOMAIN: 0000 read_resources bus 0 link: 0
1294 13:43:06.284186 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1295 13:43:06.290794 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1296 13:43:06.297544 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1297 13:43:06.304269 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1298 13:43:06.311695 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1299 13:43:06.317126 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1300 13:43:06.324034 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1301 13:43:06.330777 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1302 13:43:06.334083 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1303 13:43:06.344228 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1304 13:43:06.347672 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1305 13:43:06.353720 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1306 13:43:06.360689 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1307 13:43:06.367581 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1308 13:43:06.374021 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1309 13:43:06.380851 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1310 13:43:06.387181 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1311 13:43:06.393952 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1312 13:43:06.400626 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1313 13:43:06.404128 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1314 13:43:06.410585 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1315 13:43:06.416804 PCI: 00:04.0 read_resources bus 1 link: 0
1316 13:43:06.420326 PCI: 00:04.0 read_resources bus 1 link: 0 done
1317 13:43:06.423359 PCI: 00:06.0 read_resources bus 1 link: 0
1318 13:43:06.430383 PCI: 00:06.0 read_resources bus 1 link: 0 done
1319 13:43:06.433644 PCI: 00:0d.0 read_resources bus 0 link: 0
1320 13:43:06.436992 USB0 port 0 read_resources bus 0 link: 0
1321 13:43:06.443130 USB0 port 0 read_resources bus 0 link: 0 done
1322 13:43:06.446681 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1323 13:43:06.449907 PCI: 00:14.0 read_resources bus 0 link: 0
1324 13:43:06.456719 USB0 port 0 read_resources bus 0 link: 0
1325 13:43:06.459778 USB0 port 0 read_resources bus 0 link: 0 done
1326 13:43:06.463231 PCI: 00:14.0 read_resources bus 0 link: 0 done
1327 13:43:06.470135 PCI: 00:14.3 read_resources bus 0 link: 0
1328 13:43:06.472910 PCI: 00:14.3 read_resources bus 0 link: 0 done
1329 13:43:06.476503 PCI: 00:15.0 read_resources bus 0 link: 0
1330 13:43:06.483303 PCI: 00:15.0 read_resources bus 0 link: 0 done
1331 13:43:06.486631 PCI: 00:15.1 read_resources bus 0 link: 0
1332 13:43:06.489605 PCI: 00:15.1 read_resources bus 0 link: 0 done
1333 13:43:06.496815 PCI: 00:15.3 read_resources bus 0 link: 0
1334 13:43:06.499907 PCI: 00:15.3 read_resources bus 0 link: 0 done
1335 13:43:06.503037 PCI: 00:19.1 read_resources bus 0 link: 0
1336 13:43:06.509817 PCI: 00:19.1 read_resources bus 0 link: 0 done
1337 13:43:06.513031 PCI: 00:1e.3 read_resources bus 2 link: 0
1338 13:43:06.520066 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1339 13:43:06.523658 PCI: 00:1f.0 read_resources bus 0 link: 0
1340 13:43:06.526568 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1341 13:43:06.532779 PCI: 00:1f.2 read_resources bus 0 link: 0
1342 13:43:06.536683 GENERIC: 0.0 read_resources bus 0 link: 0
1343 13:43:06.540020 GENERIC: 0.0 read_resources bus 0 link: 0 done
1344 13:43:06.546432 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1345 13:43:06.549819 DOMAIN: 0000 read_resources bus 0 link: 0 done
1346 13:43:06.556355 Root Device read_resources bus 0 link: 0 done
1347 13:43:06.556714 Done reading resources.
1348 13:43:06.563014 Show resources in subtree (Root Device)...After reading.
1349 13:43:06.566592 Root Device child on link 0 CPU_CLUSTER: 0
1350 13:43:06.573184 CPU_CLUSTER: 0 child on link 0 APIC: 00
1351 13:43:06.573662 APIC: 00
1352 13:43:06.573938 APIC: 12
1353 13:43:06.576217 APIC: 14
1354 13:43:06.576557 APIC: 16
1355 13:43:06.579986 APIC: 10
1356 13:43:06.580433 APIC: 09
1357 13:43:06.580682 APIC: 01
1358 13:43:06.583359 APIC: 08
1359 13:43:06.586677 DOMAIN: 0000 child on link 0 GPIO: 0
1360 13:43:06.596485 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1361 13:43:06.606452 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1362 13:43:06.606862 GPIO: 0
1363 13:43:06.607105 PCI: 00:00.0
1364 13:43:06.616184 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1365 13:43:06.626692 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1366 13:43:06.636151 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1367 13:43:06.646358 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1368 13:43:06.656438 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1369 13:43:06.662984 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1370 13:43:06.673242 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1371 13:43:06.682867 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1372 13:43:06.692907 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1373 13:43:06.703188 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1374 13:43:06.713193 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1375 13:43:06.719624 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1376 13:43:06.729453 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1377 13:43:06.739449 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1378 13:43:06.749818 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1379 13:43:06.759187 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1380 13:43:06.769357 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1381 13:43:06.779198 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1382 13:43:06.789254 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1383 13:43:06.795847 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1384 13:43:06.805734 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1385 13:43:06.815811 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1386 13:43:06.825920 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1387 13:43:06.836592 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1388 13:43:06.845442 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1389 13:43:06.855613 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1390 13:43:06.862773 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1391 13:43:06.872064 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1392 13:43:06.875329 PCI: 00:02.0
1393 13:43:06.885704 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1394 13:43:06.895551 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1395 13:43:06.905294 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1396 13:43:06.908776 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1397 13:43:06.918752 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1398 13:43:06.922127 GENERIC: 0.0
1399 13:43:06.925418 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1400 13:43:06.935238 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1401 13:43:06.943009 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1402 13:43:06.951823 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1403 13:43:06.955144 PCI: 01:00.0
1404 13:43:06.964953 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1405 13:43:06.975110 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1406 13:43:06.975536 PCI: 00:08.0
1407 13:43:06.978458 PCI: 00:0a.0
1408 13:43:06.988357 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1409 13:43:06.991605 PCI: 00:0d.0 child on link 0 USB0 port 0
1410 13:43:07.001906 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1411 13:43:07.004733 USB0 port 0 child on link 0 USB3 port 0
1412 13:43:07.008357 USB3 port 0
1413 13:43:07.008765 USB3 port 1
1414 13:43:07.011706 USB3 port 2
1415 13:43:07.014977 USB3 port 3
1416 13:43:07.018357 PCI: 00:14.0 child on link 0 USB0 port 0
1417 13:43:07.028098 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1418 13:43:07.031610 USB0 port 0 child on link 0 USB2 port 0
1419 13:43:07.034804 USB2 port 0
1420 13:43:07.035153 USB2 port 1
1421 13:43:07.038034 USB2 port 2
1422 13:43:07.038372 USB2 port 3
1423 13:43:07.041248 USB2 port 4
1424 13:43:07.041611 USB2 port 5
1425 13:43:07.045024 USB2 port 6
1426 13:43:07.045470 USB2 port 7
1427 13:43:07.048545 USB2 port 8
1428 13:43:07.051552 USB2 port 9
1429 13:43:07.051892 USB3 port 0
1430 13:43:07.054657 USB3 port 1
1431 13:43:07.054996 USB3 port 2
1432 13:43:07.057954 USB3 port 3
1433 13:43:07.058296 PCI: 00:14.2
1434 13:43:07.068185 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1435 13:43:07.078408 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1436 13:43:07.081497 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1437 13:43:07.091583 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1438 13:43:07.095146 GENERIC: 0.0
1439 13:43:07.098192 PCI: 00:15.0 child on link 0 I2C: 00:1a
1440 13:43:07.108277 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1441 13:43:07.111261 I2C: 00:1a
1442 13:43:07.111711 I2C: 00:31
1443 13:43:07.114253 I2C: 00:32
1444 13:43:07.117622 PCI: 00:15.1 child on link 0 I2C: 00:50
1445 13:43:07.127673 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1446 13:43:07.131165 I2C: 00:50
1447 13:43:07.131522 PCI: 00:15.2
1448 13:43:07.134503 PCI: 00:15.3 child on link 0 I2C: 00:10
1449 13:43:07.144323 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1450 13:43:07.147999 I2C: 00:10
1451 13:43:07.148432 PCI: 00:16.0
1452 13:43:07.157711 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1453 13:43:07.161112 PCI: 00:19.0
1454 13:43:07.164243 PCI: 00:19.1 child on link 0 I2C: 00:15
1455 13:43:07.174375 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1456 13:43:07.177688 I2C: 00:15
1457 13:43:07.178123 I2C: 00:2c
1458 13:43:07.181027 PCI: 00:1e.0
1459 13:43:07.190936 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1460 13:43:07.194101 PCI: 00:1e.3 child on link 0 SPI: 00
1461 13:43:07.204725 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1462 13:43:07.205196 SPI: 00
1463 13:43:07.211290 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1464 13:43:07.217283 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1465 13:43:07.220680 PNP: 0c09.0
1466 13:43:07.231294 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1467 13:43:07.234241 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1468 13:43:07.244620 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1469 13:43:07.254135 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1470 13:43:07.257230 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1471 13:43:07.257563 GENERIC: 0.0
1472 13:43:07.260502 GENERIC: 1.0
1473 13:43:07.263896 PCI: 00:1f.3
1474 13:43:07.273881 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1475 13:43:07.283894 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1476 13:43:07.284301 PCI: 00:1f.5
1477 13:43:07.294017 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1478 13:43:07.300628 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1479 13:43:07.307157 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1480 13:43:07.313768 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1481 13:43:07.317178 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1482 13:43:07.324213 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1483 13:43:07.327589 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1484 13:43:07.334043 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1485 13:43:07.340612 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1486 13:43:07.350865 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1487 13:43:07.357358 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1488 13:43:07.363989 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1489 13:43:07.370781 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1490 13:43:07.376869 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1491 13:43:07.387321 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1492 13:43:07.390603 DOMAIN: 0000: Resource ranges:
1493 13:43:07.393752 * Base: 1000, Size: 800, Tag: 100
1494 13:43:07.396971 * Base: 1900, Size: e700, Tag: 100
1495 13:43:07.400354 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1496 13:43:07.407054 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1497 13:43:07.413289 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1498 13:43:07.423474 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1499 13:43:07.430279 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1500 13:43:07.436839 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1501 13:43:07.446731 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1502 13:43:07.453211 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1503 13:43:07.460092 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1504 13:43:07.469843 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1505 13:43:07.476839 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1506 13:43:07.483124 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1507 13:43:07.492887 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1508 13:43:07.500090 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1509 13:43:07.506222 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1510 13:43:07.516529 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1511 13:43:07.523148 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1512 13:43:07.529443 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1513 13:43:07.539716 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1514 13:43:07.546332 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1515 13:43:07.552707 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1516 13:43:07.559181 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1517 13:43:07.569764 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1518 13:43:07.576333 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1519 13:43:07.582499 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1520 13:43:07.592536 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1521 13:43:07.599215 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1522 13:43:07.605635 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1523 13:43:07.615766 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1524 13:43:07.622702 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1525 13:43:07.629157 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1526 13:43:07.638944 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1527 13:43:07.645733 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1528 13:43:07.649106 DOMAIN: 0000: Resource ranges:
1529 13:43:07.652650 * Base: 80400000, Size: 3fc00000, Tag: 200
1530 13:43:07.659515 * Base: d0000000, Size: 28000000, Tag: 200
1531 13:43:07.662543 * Base: fa000000, Size: 1000000, Tag: 200
1532 13:43:07.665706 * Base: fb001000, Size: 17ff000, Tag: 200
1533 13:43:07.672714 * Base: fe800000, Size: 300000, Tag: 200
1534 13:43:07.675717 * Base: feb80000, Size: 80000, Tag: 200
1535 13:43:07.679046 * Base: fed00000, Size: 40000, Tag: 200
1536 13:43:07.682481 * Base: fed70000, Size: 10000, Tag: 200
1537 13:43:07.685711 * Base: fed88000, Size: 8000, Tag: 200
1538 13:43:07.692403 * Base: fed93000, Size: d000, Tag: 200
1539 13:43:07.695723 * Base: feda2000, Size: 1e000, Tag: 200
1540 13:43:07.699001 * Base: fede0000, Size: 1220000, Tag: 200
1541 13:43:07.705948 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1542 13:43:07.712605 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1543 13:43:07.718910 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1544 13:43:07.725667 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1545 13:43:07.732270 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1546 13:43:07.738937 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1547 13:43:07.745639 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1548 13:43:07.752483 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1549 13:43:07.758491 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1550 13:43:07.765317 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1551 13:43:07.772186 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1552 13:43:07.778863 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1553 13:43:07.785716 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1554 13:43:07.792170 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1555 13:43:07.798803 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1556 13:43:07.805459 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1557 13:43:07.812279 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1558 13:43:07.818830 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1559 13:43:07.825227 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1560 13:43:07.832323 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1561 13:43:07.838612 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1562 13:43:07.845833 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1563 13:43:07.849114 PCI: 00:06.0: Resource ranges:
1564 13:43:07.852251 * Base: 80400000, Size: 100000, Tag: 200
1565 13:43:07.858768 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1566 13:43:07.865068 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1567 13:43:07.875272 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1568 13:43:07.882157 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1569 13:43:07.885312 Root Device assign_resources, bus 0 link: 0
1570 13:43:07.891915 DOMAIN: 0000 assign_resources, bus 0 link: 0
1571 13:43:07.898913 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1572 13:43:07.908447 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1573 13:43:07.915355 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1574 13:43:07.925158 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1575 13:43:07.928499 PCI: 00:04.0 assign_resources, bus 1 link: 0
1576 13:43:07.931787 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1577 13:43:07.941843 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1578 13:43:07.952000 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1579 13:43:07.958205 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1580 13:43:07.965082 PCI: 00:06.0 assign_resources, bus 1 link: 0
1581 13:43:07.972023 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1582 13:43:07.981926 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1583 13:43:07.985156 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1584 13:43:07.994837 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1585 13:43:08.001963 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1586 13:43:08.004963 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1587 13:43:08.011497 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1588 13:43:08.018340 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1589 13:43:08.024950 PCI: 00:14.0 assign_resources, bus 0 link: 0
1590 13:43:08.028467 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1591 13:43:08.034956 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1592 13:43:08.045214 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1593 13:43:08.051447 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1594 13:43:08.058033 PCI: 00:14.3 assign_resources, bus 0 link: 0
1595 13:43:08.061288 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1596 13:43:08.071496 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1597 13:43:08.074874 PCI: 00:15.0 assign_resources, bus 0 link: 0
1598 13:43:08.077940 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1599 13:43:08.087606 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1600 13:43:08.091179 PCI: 00:15.1 assign_resources, bus 0 link: 0
1601 13:43:08.097818 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1602 13:43:08.104737 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1603 13:43:08.108059 PCI: 00:15.3 assign_resources, bus 0 link: 0
1604 13:43:08.114768 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1605 13:43:08.120914 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1606 13:43:08.131107 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1607 13:43:08.134603 PCI: 00:19.1 assign_resources, bus 0 link: 0
1608 13:43:08.141131 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1609 13:43:08.147494 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1610 13:43:08.150972 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1611 13:43:08.157789 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1612 13:43:08.161065 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1613 13:43:08.167522 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1614 13:43:08.171079 LPC: Trying to open IO window from 800 size 1ff
1615 13:43:08.181252 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1616 13:43:08.187624 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1617 13:43:08.194127 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1618 13:43:08.201032 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1619 13:43:08.204549 Root Device assign_resources, bus 0 link: 0 done
1620 13:43:08.207253 Done setting resources.
1621 13:43:08.214267 Show resources in subtree (Root Device)...After assigning values.
1622 13:43:08.218503 Root Device child on link 0 CPU_CLUSTER: 0
1623 13:43:08.224304 CPU_CLUSTER: 0 child on link 0 APIC: 00
1624 13:43:08.224797 APIC: 00
1625 13:43:08.225159 APIC: 12
1626 13:43:08.227895 APIC: 14
1627 13:43:08.228387 APIC: 16
1628 13:43:08.230973 APIC: 10
1629 13:43:08.231489 APIC: 09
1630 13:43:08.231854 APIC: 01
1631 13:43:08.234097 APIC: 08
1632 13:43:08.237619 DOMAIN: 0000 child on link 0 GPIO: 0
1633 13:43:08.247755 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1634 13:43:08.257245 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1635 13:43:08.257753 GPIO: 0
1636 13:43:08.258123 PCI: 00:00.0
1637 13:43:08.267745 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1638 13:43:08.277544 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1639 13:43:08.287753 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1640 13:43:08.297461 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1641 13:43:08.307309 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1642 13:43:08.313887 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1643 13:43:08.325114 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1644 13:43:08.333913 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1645 13:43:08.343868 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1646 13:43:08.353787 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1647 13:43:08.363628 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1648 13:43:08.373608 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1649 13:43:08.380402 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1650 13:43:08.390522 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1651 13:43:08.400449 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1652 13:43:08.410350 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1653 13:43:08.420276 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1654 13:43:08.430185 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1655 13:43:08.440304 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1656 13:43:08.449982 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1657 13:43:08.457051 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1658 13:43:08.466679 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1659 13:43:08.476832 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1660 13:43:08.486840 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1661 13:43:08.496537 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1662 13:43:08.506476 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1663 13:43:08.516863 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1664 13:43:08.523022 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1665 13:43:08.526081 PCI: 00:02.0
1666 13:43:08.536515 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1667 13:43:08.546136 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1668 13:43:08.556212 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1669 13:43:08.562811 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1670 13:43:08.573139 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1671 13:43:08.573628 GENERIC: 0.0
1672 13:43:08.579676 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1673 13:43:08.586192 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1674 13:43:08.599782 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1675 13:43:08.609732 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1676 13:43:08.612794 PCI: 01:00.0
1677 13:43:08.622017 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1678 13:43:08.632609 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1679 13:43:08.633068 PCI: 00:08.0
1680 13:43:08.635852 PCI: 00:0a.0
1681 13:43:08.646244 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1682 13:43:08.648921 PCI: 00:0d.0 child on link 0 USB0 port 0
1683 13:43:08.658833 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1684 13:43:08.665696 USB0 port 0 child on link 0 USB3 port 0
1685 13:43:08.666175 USB3 port 0
1686 13:43:08.669004 USB3 port 1
1687 13:43:08.669404 USB3 port 2
1688 13:43:08.672941 USB3 port 3
1689 13:43:08.675729 PCI: 00:14.0 child on link 0 USB0 port 0
1690 13:43:08.685502 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1691 13:43:08.692280 USB0 port 0 child on link 0 USB2 port 0
1692 13:43:08.692741 USB2 port 0
1693 13:43:08.695973 USB2 port 1
1694 13:43:08.696455 USB2 port 2
1695 13:43:08.698739 USB2 port 3
1696 13:43:08.699117 USB2 port 4
1697 13:43:08.702263 USB2 port 5
1698 13:43:08.702753 USB2 port 6
1699 13:43:08.705606 USB2 port 7
1700 13:43:08.706092 USB2 port 8
1701 13:43:08.708951 USB2 port 9
1702 13:43:08.709465 USB3 port 0
1703 13:43:08.712445 USB3 port 1
1704 13:43:08.715878 USB3 port 2
1705 13:43:08.716363 USB3 port 3
1706 13:43:08.719214 PCI: 00:14.2
1707 13:43:08.729266 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1708 13:43:08.738963 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1709 13:43:08.742332 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1710 13:43:08.752440 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1711 13:43:08.755549 GENERIC: 0.0
1712 13:43:08.758332 PCI: 00:15.0 child on link 0 I2C: 00:1a
1713 13:43:08.768602 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1714 13:43:08.771955 I2C: 00:1a
1715 13:43:08.772432 I2C: 00:31
1716 13:43:08.775227 I2C: 00:32
1717 13:43:08.778806 PCI: 00:15.1 child on link 0 I2C: 00:50
1718 13:43:08.788933 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1719 13:43:08.789449 I2C: 00:50
1720 13:43:08.791893 PCI: 00:15.2
1721 13:43:08.795611 PCI: 00:15.3 child on link 0 I2C: 00:10
1722 13:43:08.805259 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1723 13:43:08.808452 I2C: 00:10
1724 13:43:08.808835 PCI: 00:16.0
1725 13:43:08.818627 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1726 13:43:08.822224 PCI: 00:19.0
1727 13:43:08.825009 PCI: 00:19.1 child on link 0 I2C: 00:15
1728 13:43:08.835656 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1729 13:43:08.838497 I2C: 00:15
1730 13:43:08.838970 I2C: 00:2c
1731 13:43:08.842164 PCI: 00:1e.0
1732 13:43:08.851989 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1733 13:43:08.855486 PCI: 00:1e.3 child on link 0 SPI: 00
1734 13:43:08.865232 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1735 13:43:08.868309 SPI: 00
1736 13:43:08.872257 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1737 13:43:08.881573 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1738 13:43:08.882053 PNP: 0c09.0
1739 13:43:08.892023 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1740 13:43:08.894813 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1741 13:43:08.904818 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1742 13:43:08.915282 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1743 13:43:08.918268 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1744 13:43:08.921818 GENERIC: 0.0
1745 13:43:08.922298 GENERIC: 1.0
1746 13:43:08.924650 PCI: 00:1f.3
1747 13:43:08.935088 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1748 13:43:08.945182 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1749 13:43:08.948350 PCI: 00:1f.5
1750 13:43:08.958143 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1751 13:43:08.961237 Done allocating resources.
1752 13:43:08.964965 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1753 13:43:08.971901 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1754 13:43:08.978136 Configure audio over I2S with MAX98373 NAU88L25B.
1755 13:43:08.981273 Enabling BT offload
1756 13:43:08.988375 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1757 13:43:08.992056 Enabling resources...
1758 13:43:08.994819 PCI: 00:00.0 subsystem <- 8086/4609
1759 13:43:08.998829 PCI: 00:00.0 cmd <- 06
1760 13:43:09.001906 PCI: 00:02.0 subsystem <- 8086/46b3
1761 13:43:09.005044 PCI: 00:02.0 cmd <- 03
1762 13:43:09.008342 PCI: 00:04.0 subsystem <- 8086/461d
1763 13:43:09.008783 PCI: 00:04.0 cmd <- 02
1764 13:43:09.011870 PCI: 00:06.0 bridge ctrl <- 0013
1765 13:43:09.015402 PCI: 00:06.0 subsystem <- 8086/464d
1766 13:43:09.018845 PCI: 00:06.0 cmd <- 106
1767 13:43:09.022060 PCI: 00:0a.0 subsystem <- 8086/467d
1768 13:43:09.024978 PCI: 00:0a.0 cmd <- 02
1769 13:43:09.028515 PCI: 00:0d.0 subsystem <- 8086/461e
1770 13:43:09.032108 PCI: 00:0d.0 cmd <- 02
1771 13:43:09.035060 PCI: 00:14.0 subsystem <- 8086/51ed
1772 13:43:09.038447 PCI: 00:14.0 cmd <- 02
1773 13:43:09.041834 PCI: 00:14.2 subsystem <- 8086/51ef
1774 13:43:09.042311 PCI: 00:14.2 cmd <- 02
1775 13:43:09.045107 PCI: 00:14.3 subsystem <- 8086/51f0
1776 13:43:09.048489 PCI: 00:14.3 cmd <- 02
1777 13:43:09.051840 PCI: 00:15.0 subsystem <- 8086/51e8
1778 13:43:09.055236 PCI: 00:15.0 cmd <- 02
1779 13:43:09.058216 PCI: 00:15.1 subsystem <- 8086/51e9
1780 13:43:09.061448 PCI: 00:15.1 cmd <- 06
1781 13:43:09.064585 PCI: 00:15.3 subsystem <- 8086/51eb
1782 13:43:09.067914 PCI: 00:15.3 cmd <- 02
1783 13:43:09.071740 PCI: 00:16.0 subsystem <- 8086/51e0
1784 13:43:09.072218 PCI: 00:16.0 cmd <- 02
1785 13:43:09.075078 PCI: 00:19.1 subsystem <- 8086/51c6
1786 13:43:09.078584 PCI: 00:19.1 cmd <- 02
1787 13:43:09.081451 PCI: 00:1e.0 subsystem <- 8086/51a8
1788 13:43:09.084775 PCI: 00:1e.0 cmd <- 06
1789 13:43:09.088072 PCI: 00:1e.3 subsystem <- 8086/51ab
1790 13:43:09.091596 PCI: 00:1e.3 cmd <- 02
1791 13:43:09.094913 PCI: 00:1f.0 subsystem <- 8086/5182
1792 13:43:09.098303 PCI: 00:1f.0 cmd <- 407
1793 13:43:09.101629 PCI: 00:1f.3 subsystem <- 8086/51c8
1794 13:43:09.102110 PCI: 00:1f.3 cmd <- 02
1795 13:43:09.105154 PCI: 00:1f.5 subsystem <- 8086/51a4
1796 13:43:09.108460 PCI: 00:1f.5 cmd <- 406
1797 13:43:09.111244 PCI: 01:00.0 cmd <- 02
1798 13:43:09.111584 done.
1799 13:43:09.118676 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1800 13:43:09.121797 ME: Version: Unavailable
1801 13:43:09.124507 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1802 13:43:09.128229 Initializing devices...
1803 13:43:09.131450 Root Device init
1804 13:43:09.131894 mainboard: EC init
1805 13:43:09.138167 Chrome EC: Set SMI mask to 0x0000000000000000
1806 13:43:09.141710 Chrome EC: clear events_b mask to 0x0000000000000000
1807 13:43:09.147757 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1808 13:43:09.155072 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1809 13:43:09.161055 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1810 13:43:09.164635 Chrome EC: Set WAKE mask to 0x0000000000000000
1811 13:43:09.168122 Root Device init finished in 35 msecs
1812 13:43:09.171428 PCI: 00:00.0 init
1813 13:43:09.175055 CPU TDP = 15 Watts
1814 13:43:09.175534 CPU PL1 = 15 Watts
1815 13:43:09.178015 CPU PL2 = 55 Watts
1816 13:43:09.181559 CPU PL4 = 123 Watts
1817 13:43:09.184820 PCI: 00:00.0 init finished in 8 msecs
1818 13:43:09.185298 PCI: 00:02.0 init
1819 13:43:09.187979 GMA: Found VBT in CBFS
1820 13:43:09.191310 GMA: Found valid VBT in CBFS
1821 13:43:09.197995 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1822 13:43:09.204848 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1823 13:43:09.208217 PCI: 00:02.0 init finished in 18 msecs
1824 13:43:09.210891 PCI: 00:06.0 init
1825 13:43:09.214630 Initializing PCH PCIe bridge.
1826 13:43:09.218221 PCI: 00:06.0 init finished in 3 msecs
1827 13:43:09.218701 PCI: 00:0a.0 init
1828 13:43:09.221263 PCI: 00:0a.0 init finished in 0 msecs
1829 13:43:09.224518 PCI: 00:14.0 init
1830 13:43:09.227934 PCI: 00:14.0 init finished in 0 msecs
1831 13:43:09.231315 PCI: 00:14.2 init
1832 13:43:09.234692 PCI: 00:14.2 init finished in 0 msecs
1833 13:43:09.235074 PCI: 00:15.0 init
1834 13:43:09.237889 I2C bus 0 version 0x3230302a
1835 13:43:09.241178 DW I2C bus 0 at 0x80655000 (400 KHz)
1836 13:43:09.248321 PCI: 00:15.0 init finished in 6 msecs
1837 13:43:09.248806 PCI: 00:15.1 init
1838 13:43:09.251396 I2C bus 1 version 0x3230302a
1839 13:43:09.254799 DW I2C bus 1 at 0x80656000 (400 KHz)
1840 13:43:09.258128 PCI: 00:15.1 init finished in 6 msecs
1841 13:43:09.261112 PCI: 00:15.3 init
1842 13:43:09.264552 I2C bus 3 version 0x3230302a
1843 13:43:09.268116 DW I2C bus 3 at 0x80657000 (400 KHz)
1844 13:43:09.271094 PCI: 00:15.3 init finished in 6 msecs
1845 13:43:09.274886 PCI: 00:16.0 init
1846 13:43:09.277948 PCI: 00:16.0 init finished in 0 msecs
1847 13:43:09.278435 PCI: 00:19.1 init
1848 13:43:09.281279 I2C bus 5 version 0x3230302a
1849 13:43:09.284772 DW I2C bus 5 at 0x80659000 (400 KHz)
1850 13:43:09.288683 PCI: 00:19.1 init finished in 6 msecs
1851 13:43:09.291308 PCI: 00:1f.0 init
1852 13:43:09.294737 IOAPIC: Initializing IOAPIC at 0xfec00000
1853 13:43:09.298049 IOAPIC: ID = 0x02
1854 13:43:09.301281 IOAPIC: Dumping registers
1855 13:43:09.301801 reg 0x0000: 0x02000000
1856 13:43:09.304705 reg 0x0001: 0x00770020
1857 13:43:09.308083 reg 0x0002: 0x00000000
1858 13:43:09.311538 IOAPIC: 120 interrupts
1859 13:43:09.314345 IOAPIC: Clearing IOAPIC at 0xfec00000
1860 13:43:09.318207 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1861 13:43:09.324818 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1862 13:43:09.327615 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1863 13:43:09.334274 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1864 13:43:09.337346 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1865 13:43:09.341020 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1866 13:43:09.347685 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1867 13:43:09.351405 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1868 13:43:09.357271 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1869 13:43:09.360770 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1870 13:43:09.368127 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1871 13:43:09.370910 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1872 13:43:09.374266 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1873 13:43:09.381239 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1874 13:43:09.384651 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1875 13:43:09.391480 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1876 13:43:09.394409 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1877 13:43:09.401065 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1878 13:43:09.404599 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1879 13:43:09.411225 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1880 13:43:09.414592 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1881 13:43:09.417706 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1882 13:43:09.424702 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1883 13:43:09.427738 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1884 13:43:09.434252 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1885 13:43:09.437367 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1886 13:43:09.444576 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1887 13:43:09.447762 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1888 13:43:09.450867 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1889 13:43:09.457638 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1890 13:43:09.460473 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1891 13:43:09.467624 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1892 13:43:09.470775 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1893 13:43:09.477621 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1894 13:43:09.481101 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1895 13:43:09.487990 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1896 13:43:09.491041 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1897 13:43:09.494494 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1898 13:43:09.500685 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1899 13:43:09.505009 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1900 13:43:09.511013 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1901 13:43:09.514188 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1902 13:43:09.521166 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1903 13:43:09.524307 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1904 13:43:09.531180 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1905 13:43:09.534465 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1906 13:43:09.537695 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1907 13:43:09.544191 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1908 13:43:09.547491 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1909 13:43:09.553972 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1910 13:43:09.557348 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1911 13:43:09.563964 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1912 13:43:09.567650 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1913 13:43:09.570851 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1914 13:43:09.577139 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1915 13:43:09.580498 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1916 13:43:09.587763 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1917 13:43:09.590848 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1918 13:43:09.597703 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1919 13:43:09.600865 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1920 13:43:09.607239 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1921 13:43:09.610626 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1922 13:43:09.613956 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1923 13:43:09.620745 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1924 13:43:09.623952 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1925 13:43:09.630584 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1926 13:43:09.633947 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1927 13:43:09.640577 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1928 13:43:09.644222 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1929 13:43:09.647818 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1930 13:43:09.654211 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1931 13:43:09.657203 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1932 13:43:09.663901 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1933 13:43:09.667290 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1934 13:43:09.674199 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1935 13:43:09.676929 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1936 13:43:09.684314 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1937 13:43:09.687591 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1938 13:43:09.690384 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1939 13:43:09.697020 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1940 13:43:09.700669 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1941 13:43:09.706889 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1942 13:43:09.710296 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1943 13:43:09.717069 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1944 13:43:09.720590 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1945 13:43:09.726874 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1946 13:43:09.730169 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1947 13:43:09.733301 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1948 13:43:09.739848 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1949 13:43:09.743397 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1950 13:43:09.750103 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1951 13:43:09.753179 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1952 13:43:09.759869 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1953 13:43:09.763508 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1954 13:43:09.766639 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1955 13:43:09.773155 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1956 13:43:09.776429 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1957 13:43:09.783342 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1958 13:43:09.786499 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1959 13:43:09.793035 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1960 13:43:09.796584 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1961 13:43:09.803048 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1962 13:43:09.806398 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1963 13:43:09.809771 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1964 13:43:09.816375 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1965 13:43:09.819746 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1966 13:43:09.826838 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1967 13:43:09.830148 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1968 13:43:09.836414 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1969 13:43:09.839737 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1970 13:43:09.846530 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1971 13:43:09.849968 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1972 13:43:09.853014 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1973 13:43:09.859601 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1974 13:43:09.863407 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1975 13:43:09.870015 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1976 13:43:09.873342 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1977 13:43:09.879704 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1978 13:43:09.883218 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1979 13:43:09.886562 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1980 13:43:09.893353 IOAPIC: Bootstrap Processor Local APIC = 0x00
1981 13:43:09.896593 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1982 13:43:09.903134 PCI: 00:1f.0 init finished in 607 msecs
1983 13:43:09.903201 PCI: 00:1f.2 init
1984 13:43:09.906415 apm_control: Disabling ACPI.
1985 13:43:09.910400 APMC done.
1986 13:43:09.913686 PCI: 00:1f.2 init finished in 6 msecs
1987 13:43:09.916703 PCI: 00:1f.3 init
1988 13:43:09.920458 PCI: 00:1f.3 init finished in 0 msecs
1989 13:43:09.920552 PCI: 01:00.0 init
1990 13:43:09.924188 PCI: 01:00.0 init finished in 0 msecs
1991 13:43:09.926886 PNP: 0c09.0 init
1992 13:43:09.930072 Google Chrome EC uptime: 9.314 seconds
1993 13:43:09.936961 Google Chrome AP resets since EC boot: 1
1994 13:43:09.940060 Google Chrome most recent AP reset causes:
1995 13:43:09.943640 0.342: 32775 shutdown: entering G3
1996 13:43:09.950142 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1997 13:43:09.953603 PNP: 0c09.0 init finished in 23 msecs
1998 13:43:09.956717 GENERIC: 0.0 init
1999 13:43:09.960242 GENERIC: 0.0 init finished in 0 msecs
2000 13:43:09.960298 GENERIC: 1.0 init
2001 13:43:09.963673 GENERIC: 1.0 init finished in 0 msecs
2002 13:43:09.967113 Devices initialized
2003 13:43:09.970553 Show all devs... After init.
2004 13:43:09.973630 Root Device: enabled 1
2005 13:43:09.973687 CPU_CLUSTER: 0: enabled 1
2006 13:43:09.977046 DOMAIN: 0000: enabled 1
2007 13:43:09.980495 GPIO: 0: enabled 1
2008 13:43:09.983408 PCI: 00:00.0: enabled 1
2009 13:43:09.983461 PCI: 00:01.0: enabled 0
2010 13:43:09.987007 PCI: 00:01.1: enabled 0
2011 13:43:09.989972 PCI: 00:02.0: enabled 1
2012 13:43:09.990037 PCI: 00:04.0: enabled 1
2013 13:43:09.993683 PCI: 00:05.0: enabled 0
2014 13:43:09.996755 PCI: 00:06.0: enabled 1
2015 13:43:10.000483 PCI: 00:06.2: enabled 0
2016 13:43:10.000541 PCI: 00:07.0: enabled 0
2017 13:43:10.003270 PCI: 00:07.1: enabled 0
2018 13:43:10.006679 PCI: 00:07.2: enabled 0
2019 13:43:10.010429 PCI: 00:07.3: enabled 0
2020 13:43:10.010482 PCI: 00:08.0: enabled 0
2021 13:43:10.014043 PCI: 00:09.0: enabled 0
2022 13:43:10.016866 PCI: 00:0a.0: enabled 1
2023 13:43:10.020015 PCI: 00:0d.0: enabled 1
2024 13:43:10.020068 PCI: 00:0d.1: enabled 0
2025 13:43:10.023424 PCI: 00:0d.2: enabled 0
2026 13:43:10.026633 PCI: 00:0d.3: enabled 0
2027 13:43:10.026691 PCI: 00:0e.0: enabled 0
2028 13:43:10.030146 PCI: 00:10.0: enabled 0
2029 13:43:10.033262 PCI: 00:10.1: enabled 0
2030 13:43:10.036700 PCI: 00:10.6: enabled 0
2031 13:43:10.036753 PCI: 00:10.7: enabled 0
2032 13:43:10.040096 PCI: 00:12.0: enabled 0
2033 13:43:10.043529 PCI: 00:12.6: enabled 0
2034 13:43:10.047179 PCI: 00:12.7: enabled 0
2035 13:43:10.047240 PCI: 00:13.0: enabled 0
2036 13:43:10.050311 PCI: 00:14.0: enabled 1
2037 13:43:10.053353 PCI: 00:14.1: enabled 0
2038 13:43:10.056656 PCI: 00:14.2: enabled 1
2039 13:43:10.056709 PCI: 00:14.3: enabled 1
2040 13:43:10.060069 PCI: 00:15.0: enabled 1
2041 13:43:10.063550 PCI: 00:15.1: enabled 1
2042 13:43:10.063604 PCI: 00:15.2: enabled 0
2043 13:43:10.066929 PCI: 00:15.3: enabled 1
2044 13:43:10.070159 PCI: 00:16.0: enabled 1
2045 13:43:10.073554 PCI: 00:16.1: enabled 0
2046 13:43:10.073608 PCI: 00:16.2: enabled 0
2047 13:43:10.076489 PCI: 00:16.3: enabled 0
2048 13:43:10.080111 PCI: 00:16.4: enabled 0
2049 13:43:10.083419 PCI: 00:16.5: enabled 0
2050 13:43:10.083474 PCI: 00:17.0: enabled 0
2051 13:43:10.086870 PCI: 00:19.0: enabled 0
2052 13:43:10.089943 PCI: 00:19.1: enabled 1
2053 13:43:10.093357 PCI: 00:19.2: enabled 0
2054 13:43:10.093416 PCI: 00:1a.0: enabled 0
2055 13:43:10.096728 PCI: 00:1c.0: enabled 0
2056 13:43:10.100385 PCI: 00:1c.1: enabled 0
2057 13:43:10.100441 PCI: 00:1c.2: enabled 0
2058 13:43:10.103758 PCI: 00:1c.3: enabled 0
2059 13:43:10.106634 PCI: 00:1c.4: enabled 0
2060 13:43:10.110010 PCI: 00:1c.5: enabled 0
2061 13:43:10.110062 PCI: 00:1c.6: enabled 0
2062 13:43:10.113469 PCI: 00:1c.7: enabled 0
2063 13:43:10.116697 PCI: 00:1d.0: enabled 0
2064 13:43:10.119922 PCI: 00:1d.1: enabled 0
2065 13:43:10.119981 PCI: 00:1d.2: enabled 0
2066 13:43:10.123165 PCI: 00:1d.3: enabled 0
2067 13:43:10.126505 PCI: 00:1e.0: enabled 1
2068 13:43:10.130130 PCI: 00:1e.1: enabled 0
2069 13:43:10.130246 PCI: 00:1e.2: enabled 0
2070 13:43:10.133106 PCI: 00:1e.3: enabled 1
2071 13:43:10.136577 PCI: 00:1f.0: enabled 1
2072 13:43:10.139864 PCI: 00:1f.1: enabled 0
2073 13:43:10.139919 PCI: 00:1f.2: enabled 1
2074 13:43:10.142987 PCI: 00:1f.3: enabled 1
2075 13:43:10.146441 PCI: 00:1f.4: enabled 0
2076 13:43:10.146502 PCI: 00:1f.5: enabled 1
2077 13:43:10.149829 PCI: 00:1f.6: enabled 0
2078 13:43:10.153276 PCI: 00:1f.7: enabled 0
2079 13:43:10.156267 GENERIC: 0.0: enabled 1
2080 13:43:10.156323 GENERIC: 0.0: enabled 1
2081 13:43:10.159539 GENERIC: 1.0: enabled 1
2082 13:43:10.162970 GENERIC: 0.0: enabled 1
2083 13:43:10.166349 GENERIC: 1.0: enabled 1
2084 13:43:10.166408 USB0 port 0: enabled 1
2085 13:43:10.169724 USB0 port 0: enabled 1
2086 13:43:10.173202 GENERIC: 0.0: enabled 1
2087 13:43:10.173260 I2C: 00:1a: enabled 1
2088 13:43:10.176177 I2C: 00:31: enabled 1
2089 13:43:10.179585 I2C: 00:32: enabled 1
2090 13:43:10.179637 I2C: 00:50: enabled 1
2091 13:43:10.182811 I2C: 00:10: enabled 1
2092 13:43:10.186134 I2C: 00:15: enabled 1
2093 13:43:10.189372 I2C: 00:2c: enabled 1
2094 13:43:10.189429 GENERIC: 0.0: enabled 1
2095 13:43:10.192878 SPI: 00: enabled 1
2096 13:43:10.196445 PNP: 0c09.0: enabled 1
2097 13:43:10.196504 GENERIC: 0.0: enabled 1
2098 13:43:10.199409 USB3 port 0: enabled 1
2099 13:43:10.202977 USB3 port 1: enabled 0
2100 13:43:10.203036 USB3 port 2: enabled 1
2101 13:43:10.206109 USB3 port 3: enabled 0
2102 13:43:10.209345 USB2 port 0: enabled 1
2103 13:43:10.212873 USB2 port 1: enabled 0
2104 13:43:10.212932 USB2 port 2: enabled 1
2105 13:43:10.216163 USB2 port 3: enabled 0
2106 13:43:10.219848 USB2 port 4: enabled 0
2107 13:43:10.219904 USB2 port 5: enabled 1
2108 13:43:10.223020 USB2 port 6: enabled 0
2109 13:43:10.226321 USB2 port 7: enabled 0
2110 13:43:10.226374 USB2 port 8: enabled 1
2111 13:43:10.229352 USB2 port 9: enabled 1
2112 13:43:10.232839 USB3 port 0: enabled 1
2113 13:43:10.236416 USB3 port 1: enabled 0
2114 13:43:10.236468 USB3 port 2: enabled 0
2115 13:43:10.239637 USB3 port 3: enabled 0
2116 13:43:10.242629 GENERIC: 0.0: enabled 1
2117 13:43:10.242681 GENERIC: 1.0: enabled 1
2118 13:43:10.246272 APIC: 00: enabled 1
2119 13:43:10.249390 APIC: 12: enabled 1
2120 13:43:10.249443 APIC: 14: enabled 1
2121 13:43:10.252825 APIC: 16: enabled 1
2122 13:43:10.256311 APIC: 10: enabled 1
2123 13:43:10.256360 APIC: 09: enabled 1
2124 13:43:10.259273 APIC: 01: enabled 1
2125 13:43:10.259336 APIC: 08: enabled 1
2126 13:43:10.262827 PCI: 01:00.0: enabled 1
2127 13:43:10.269286 BS: BS_DEV_INIT run times (exec / console): 8 / 1130 ms
2128 13:43:10.272697 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2129 13:43:10.275787 ELOG: NV offset 0xf20000 size 0x4000
2130 13:43:10.284068 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2131 13:43:10.290738 ELOG: Event(17) added with size 13 at 2023-10-26 13:43:10 UTC
2132 13:43:10.297539 ELOG: Event(92) added with size 9 at 2023-10-26 13:43:10 UTC
2133 13:43:10.304487 ELOG: Event(93) added with size 9 at 2023-10-26 13:43:10 UTC
2134 13:43:10.311313 ELOG: Event(9E) added with size 10 at 2023-10-26 13:43:10 UTC
2135 13:43:10.317798 ELOG: Event(9F) added with size 14 at 2023-10-26 13:43:10 UTC
2136 13:43:10.324281 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2137 13:43:10.331027 ELOG: Event(A1) added with size 10 at 2023-10-26 13:43:10 UTC
2138 13:43:10.337565 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
2139 13:43:10.344114 ELOG: Event(A0) added with size 9 at 2023-10-26 13:43:10 UTC
2140 13:43:10.347616 elog_add_boot_reason: Logged dev mode boot
2141 13:43:10.354223 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2142 13:43:10.357522 Finalize devices...
2143 13:43:10.357584 PCI: 00:16.0 final
2144 13:43:10.360784 PCI: 00:1f.2 final
2145 13:43:10.360840 GENERIC: 0.0 final
2146 13:43:10.367297 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2147 13:43:10.370776 GENERIC: 1.0 final
2148 13:43:10.377360 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2149 13:43:10.377437 Devices finalized
2150 13:43:10.384011 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2151 13:43:10.387370 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2152 13:43:10.394437 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2153 13:43:10.400650 ME: HFSTS1 : 0x80030045
2154 13:43:10.404200 ME: HFSTS2 : 0x30280116
2155 13:43:10.407654 ME: HFSTS3 : 0x00000050
2156 13:43:10.414272 ME: HFSTS4 : 0x00004000
2157 13:43:10.417466 ME: HFSTS5 : 0x00000000
2158 13:43:10.420587 ME: HFSTS6 : 0x00400006
2159 13:43:10.423890 ME: Manufacturing Mode : YES
2160 13:43:10.430579 ME: SPI Protection Mode Enabled : YES
2161 13:43:10.434098 ME: FPFs Committed : NO
2162 13:43:10.437279 ME: Manufacturing Vars Locked : NO
2163 13:43:10.440637 ME: FW Partition Table : OK
2164 13:43:10.443734 ME: Bringup Loader Failure : NO
2165 13:43:10.447511 ME: Firmware Init Complete : NO
2166 13:43:10.451044 ME: Boot Options Present : NO
2167 13:43:10.453719 ME: Update In Progress : NO
2168 13:43:10.460817 ME: D0i3 Support : YES
2169 13:43:10.463888 ME: Low Power State Enabled : NO
2170 13:43:10.467058 ME: CPU Replaced : YES
2171 13:43:10.470401 ME: CPU Replacement Valid : YES
2172 13:43:10.473756 ME: Current Working State : 5
2173 13:43:10.477126 ME: Current Operation State : 1
2174 13:43:10.480269 ME: Current Operation Mode : 3
2175 13:43:10.483626 ME: Error Code : 0
2176 13:43:10.487077 ME: Enhanced Debug Mode : NO
2177 13:43:10.494242 ME: CPU Debug Disabled : YES
2178 13:43:10.497091 ME: TXT Support : NO
2179 13:43:10.500434 ME: WP for RO is enabled : YES
2180 13:43:10.506877 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2181 13:43:10.510208 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2182 13:43:10.516742 Ramoops buffer: 0x100000@0x7689a000.
2183 13:43:10.520559 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2184 13:43:10.530113 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2185 13:43:10.533538 CBFS: 'fallback/slic' not found.
2186 13:43:10.536884 ACPI: Writing ACPI tables at 7686e000.
2187 13:43:10.536938 ACPI: * FACS
2188 13:43:10.540399 ACPI: * DSDT
2189 13:43:10.546530 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2190 13:43:10.550109 ACPI: * FADT
2191 13:43:10.550169 SCI is IRQ9
2192 13:43:10.553635 ACPI: added table 1/32, length now 40
2193 13:43:10.556711 ACPI: * SSDT
2194 13:43:10.563620 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2195 13:43:10.566543 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2196 13:43:10.573055 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2197 13:43:10.576686 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2198 13:43:10.583304 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2199 13:43:10.586757 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2200 13:43:10.593003 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2201 13:43:10.599831 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2202 13:43:10.603155 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2203 13:43:10.609996 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2204 13:43:10.613175 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2205 13:43:10.619835 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2206 13:43:10.623059 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2207 13:43:10.629752 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2208 13:43:10.636339 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2209 13:43:10.639759 PS2K: Passing 80 keymaps to kernel
2210 13:43:10.646319 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2211 13:43:10.652999 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2212 13:43:10.659427 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2213 13:43:10.665951 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2214 13:43:10.669454 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2215 13:43:10.676480 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2216 13:43:10.682576 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2217 13:43:10.689280 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2218 13:43:10.695843 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2219 13:43:10.702496 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2220 13:43:10.705781 ACPI: added table 2/32, length now 44
2221 13:43:10.705842 ACPI: * MCFG
2222 13:43:10.712199 ACPI: added table 3/32, length now 48
2223 13:43:10.712260 ACPI: * TPM2
2224 13:43:10.715909 TPM2 log created at 0x7685e000
2225 13:43:10.718895 ACPI: added table 4/32, length now 52
2226 13:43:10.722227 ACPI: * LPIT
2227 13:43:10.725809 ACPI: added table 5/32, length now 56
2228 13:43:10.725871 ACPI: * MADT
2229 13:43:10.728955 SCI is IRQ9
2230 13:43:10.732235 ACPI: added table 6/32, length now 60
2231 13:43:10.735295 cmd_reg from pmc_make_ipc_cmd 1052838
2232 13:43:10.742252 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2233 13:43:10.748589 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2234 13:43:10.755490 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2235 13:43:10.758927 PMC CrashLog size in discovery mode: 0xC00
2236 13:43:10.761824 cpu crashlog bar addr: 0x80640000
2237 13:43:10.765466 cpu discovery table offset: 0x6030
2238 13:43:10.768697 cpu_crashlog_discovery_table buffer count: 0x3
2239 13:43:10.775148 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2240 13:43:10.781650 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2241 13:43:10.788490 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2242 13:43:10.795009 PMC crashLog size in discovery mode : 0xC00
2243 13:43:10.802012 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2244 13:43:10.805224 discover mode PMC crashlog size adjusted to: 0x200
2245 13:43:10.811841 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2246 13:43:10.818229 discover mode PMC crashlog size adjusted to: 0x0
2247 13:43:10.821517 m_cpu_crashLog_size : 0x3480 bytes
2248 13:43:10.824941 CPU crashLog present.
2249 13:43:10.828178 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2250 13:43:10.834831 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2251 13:43:10.837989 current = 76877550
2252 13:43:10.838044 ACPI: * DMAR
2253 13:43:10.841420 ACPI: added table 7/32, length now 64
2254 13:43:10.848368 ACPI: added table 8/32, length now 68
2255 13:43:10.848430 ACPI: * HPET
2256 13:43:10.851876 ACPI: added table 9/32, length now 72
2257 13:43:10.855026 ACPI: done.
2258 13:43:10.855078 ACPI tables: 38528 bytes.
2259 13:43:10.857959 smbios_write_tables: 76858000
2260 13:43:10.862178 EC returned error result code 3
2261 13:43:10.865666 Couldn't obtain OEM name from CBI
2262 13:43:10.868931 Create SMBIOS type 16
2263 13:43:10.872311 Create SMBIOS type 17
2264 13:43:10.875525 Create SMBIOS type 20
2265 13:43:10.875579 GENERIC: 0.0 (WIFI Device)
2266 13:43:10.879168 SMBIOS tables: 2156 bytes.
2267 13:43:10.882581 Writing table forward entry at 0x00000500
2268 13:43:10.889082 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2269 13:43:10.892593 Writing coreboot table at 0x76892000
2270 13:43:10.899001 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2271 13:43:10.905837 1. 0000000000001000-000000000009ffff: RAM
2272 13:43:10.908876 2. 00000000000a0000-00000000000fffff: RESERVED
2273 13:43:10.912031 3. 0000000000100000-0000000076857fff: RAM
2274 13:43:10.918598 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2275 13:43:10.922086 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2276 13:43:10.928858 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2277 13:43:10.935245 7. 0000000077000000-00000000803fffff: RESERVED
2278 13:43:10.938716 8. 00000000c0000000-00000000cfffffff: RESERVED
2279 13:43:10.945503 9. 00000000f8000000-00000000f9ffffff: RESERVED
2280 13:43:10.948906 10. 00000000fb000000-00000000fb000fff: RESERVED
2281 13:43:10.952207 11. 00000000fc800000-00000000fe7fffff: RESERVED
2282 13:43:10.958736 12. 00000000feb00000-00000000feb7ffff: RESERVED
2283 13:43:10.962175 13. 00000000fec00000-00000000fecfffff: RESERVED
2284 13:43:10.968749 14. 00000000fed40000-00000000fed6ffff: RESERVED
2285 13:43:10.972177 15. 00000000fed80000-00000000fed87fff: RESERVED
2286 13:43:10.978661 16. 00000000fed90000-00000000fed92fff: RESERVED
2287 13:43:10.981983 17. 00000000feda0000-00000000feda1fff: RESERVED
2288 13:43:10.988173 18. 00000000fedc0000-00000000feddffff: RESERVED
2289 13:43:10.992134 19. 0000000100000000-000000027fbfffff: RAM
2290 13:43:10.994844 Passing 4 GPIOs to payload:
2291 13:43:10.998834 NAME | PORT | POLARITY | VALUE
2292 13:43:11.005071 lid | undefined | high | high
2293 13:43:11.012144 power | undefined | high | low
2294 13:43:11.014906 oprom | undefined | high | low
2295 13:43:11.021554 EC in RW | 0x00000151 | high | high
2296 13:43:11.021624 Board ID: 3
2297 13:43:11.024789 FW config: 0x131
2298 13:43:11.031422 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum d731
2299 13:43:11.031491 coreboot table: 1764 bytes.
2300 13:43:11.038234 IMD ROOT 0. 0x76fff000 0x00001000
2301 13:43:11.041244 IMD SMALL 1. 0x76ffe000 0x00001000
2302 13:43:11.044670 FSP MEMORY 2. 0x76afe000 0x00500000
2303 13:43:11.047934 CONSOLE 3. 0x76ade000 0x00020000
2304 13:43:11.051424 RO MCACHE 4. 0x76add000 0x00000fd8
2305 13:43:11.054866 FMAP 5. 0x76adc000 0x0000064a
2306 13:43:11.057835 TIME STAMP 6. 0x76adb000 0x00000910
2307 13:43:11.061205 VBOOT WORK 7. 0x76ac7000 0x00014000
2308 13:43:11.068131 MEM INFO 8. 0x76ac6000 0x000003b8
2309 13:43:11.071203 ROMSTG STCK 9. 0x76ac5000 0x00001000
2310 13:43:11.074708 AFTER CAR 10. 0x76ab9000 0x0000c000
2311 13:43:11.077960 RAMSTAGE 11. 0x76a2f000 0x0008a000
2312 13:43:11.081043 ACPI BERT 12. 0x76a1f000 0x00010000
2313 13:43:11.084753 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2314 13:43:11.087752 REFCODE 14. 0x769af000 0x0006f000
2315 13:43:11.091252 SMM BACKUP 15. 0x7699f000 0x00010000
2316 13:43:11.097570 IGD OPREGION16. 0x7699a000 0x00004203
2317 13:43:11.101114 RAMOOPS 17. 0x7689a000 0x00100000
2318 13:43:11.104541 COREBOOT 18. 0x76892000 0x00008000
2319 13:43:11.107516 ACPI 19. 0x7686e000 0x00024000
2320 13:43:11.110877 TPM2 TCGLOG20. 0x7685e000 0x00010000
2321 13:43:11.114192 PMC CRASHLOG21. 0x7685d000 0x00000c00
2322 13:43:11.117470 CPU CRASHLOG22. 0x76859000 0x00003480
2323 13:43:11.124259 SMBIOS 23. 0x76858000 0x00001000
2324 13:43:11.124326 IMD small region:
2325 13:43:11.127526 IMD ROOT 0. 0x76ffec00 0x00000400
2326 13:43:11.131098 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2327 13:43:11.137558 VPD 2. 0x76ffeb60 0x0000006c
2328 13:43:11.140648 POWER STATE 3. 0x76ffeb00 0x00000044
2329 13:43:11.143823 ROMSTAGE 4. 0x76ffeae0 0x00000004
2330 13:43:11.147248 ACPI GNVS 5. 0x76ffea80 0x00000048
2331 13:43:11.150845 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2332 13:43:11.157267 BS: BS_WRITE_TABLES run times (exec / console): 6 / 624 ms
2333 13:43:11.160594 MTRR: Physical address space:
2334 13:43:11.167272 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2335 13:43:11.173842 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2336 13:43:11.180468 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2337 13:43:11.187327 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2338 13:43:11.190381 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2339 13:43:11.197062 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2340 13:43:11.203904 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2341 13:43:11.210381 MTRR: Fixed MSR 0x250 0x0606060606060606
2342 13:43:11.213906 MTRR: Fixed MSR 0x258 0x0606060606060606
2343 13:43:11.217281 MTRR: Fixed MSR 0x259 0x0000000000000000
2344 13:43:11.220223 MTRR: Fixed MSR 0x268 0x0606060606060606
2345 13:43:11.223834 MTRR: Fixed MSR 0x269 0x0606060606060606
2346 13:43:11.230461 MTRR: Fixed MSR 0x26a 0x0606060606060606
2347 13:43:11.233770 MTRR: Fixed MSR 0x26b 0x0606060606060606
2348 13:43:11.236829 MTRR: Fixed MSR 0x26c 0x0606060606060606
2349 13:43:11.240359 MTRR: Fixed MSR 0x26d 0x0606060606060606
2350 13:43:11.246935 MTRR: Fixed MSR 0x26e 0x0606060606060606
2351 13:43:11.250195 MTRR: Fixed MSR 0x26f 0x0606060606060606
2352 13:43:11.253573 call enable_fixed_mtrr()
2353 13:43:11.256992 CPU physical address size: 39 bits
2354 13:43:11.260255 MTRR: default type WB/UC MTRR counts: 6/6.
2355 13:43:11.263449 MTRR: UC selected as default type.
2356 13:43:11.270252 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2357 13:43:11.276758 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2358 13:43:11.283644 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2359 13:43:11.290114 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2360 13:43:11.296497 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2361 13:43:11.303375 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2362 13:43:11.306416 MTRR: Fixed MSR 0x250 0x0606060606060606
2363 13:43:11.313432 MTRR: Fixed MSR 0x258 0x0606060606060606
2364 13:43:11.316441 MTRR: Fixed MSR 0x259 0x0000000000000000
2365 13:43:11.319761 MTRR: Fixed MSR 0x268 0x0606060606060606
2366 13:43:11.323191 MTRR: Fixed MSR 0x269 0x0606060606060606
2367 13:43:11.329698 MTRR: Fixed MSR 0x26a 0x0606060606060606
2368 13:43:11.333056 MTRR: Fixed MSR 0x26b 0x0606060606060606
2369 13:43:11.336402 MTRR: Fixed MSR 0x26c 0x0606060606060606
2370 13:43:11.339754 MTRR: Fixed MSR 0x26d 0x0606060606060606
2371 13:43:11.346483 MTRR: Fixed MSR 0x26e 0x0606060606060606
2372 13:43:11.349907 MTRR: Fixed MSR 0x26f 0x0606060606060606
2373 13:43:11.353033 MTRR: Fixed MSR 0x250 0x0606060606060606
2374 13:43:11.356666 MTRR: Fixed MSR 0x250 0x0606060606060606
2375 13:43:11.362791 MTRR: Fixed MSR 0x258 0x0606060606060606
2376 13:43:11.366133 MTRR: Fixed MSR 0x259 0x0000000000000000
2377 13:43:11.369899 MTRR: Fixed MSR 0x268 0x0606060606060606
2378 13:43:11.372976 MTRR: Fixed MSR 0x269 0x0606060606060606
2379 13:43:11.376327 MTRR: Fixed MSR 0x250 0x0606060606060606
2380 13:43:11.382834 MTRR: Fixed MSR 0x250 0x0606060606060606
2381 13:43:11.386286 MTRR: Fixed MSR 0x250 0x0606060606060606
2382 13:43:11.389591 MTRR: Fixed MSR 0x250 0x0606060606060606
2383 13:43:11.392607 MTRR: Fixed MSR 0x258 0x0606060606060606
2384 13:43:11.399197 MTRR: Fixed MSR 0x259 0x0000000000000000
2385 13:43:11.402630 MTRR: Fixed MSR 0x268 0x0606060606060606
2386 13:43:11.405893 MTRR: Fixed MSR 0x269 0x0606060606060606
2387 13:43:11.409448 MTRR: Fixed MSR 0x26a 0x0606060606060606
2388 13:43:11.416051 MTRR: Fixed MSR 0x26b 0x0606060606060606
2389 13:43:11.419470 MTRR: Fixed MSR 0x26c 0x0606060606060606
2390 13:43:11.422494 MTRR: Fixed MSR 0x26d 0x0606060606060606
2391 13:43:11.425921 MTRR: Fixed MSR 0x26e 0x0606060606060606
2392 13:43:11.432866 MTRR: Fixed MSR 0x26f 0x0606060606060606
2393 13:43:11.432925 call enable_fixed_mtrr()
2394 13:43:11.436098 call enable_fixed_mtrr()
2395 13:43:11.439269 MTRR: Fixed MSR 0x258 0x0606060606060606
2396 13:43:11.445675 MTRR: Fixed MSR 0x258 0x0606060606060606
2397 13:43:11.449177 MTRR: Fixed MSR 0x259 0x0000000000000000
2398 13:43:11.452548 MTRR: Fixed MSR 0x268 0x0606060606060606
2399 13:43:11.455853 MTRR: Fixed MSR 0x269 0x0606060606060606
2400 13:43:11.459486 MTRR: Fixed MSR 0x26a 0x0606060606060606
2401 13:43:11.465680 MTRR: Fixed MSR 0x26b 0x0606060606060606
2402 13:43:11.469059 MTRR: Fixed MSR 0x26c 0x0606060606060606
2403 13:43:11.472233 MTRR: Fixed MSR 0x26d 0x0606060606060606
2404 13:43:11.475552 MTRR: Fixed MSR 0x26e 0x0606060606060606
2405 13:43:11.482162 MTRR: Fixed MSR 0x26f 0x0606060606060606
2406 13:43:11.485507 MTRR: Fixed MSR 0x258 0x0606060606060606
2407 13:43:11.488934 MTRR: Fixed MSR 0x26a 0x0606060606060606
2408 13:43:11.492651 call enable_fixed_mtrr()
2409 13:43:11.495746 MTRR: Fixed MSR 0x258 0x0606060606060606
2410 13:43:11.498836 CPU physical address size: 39 bits
2411 13:43:11.502393 MTRR: Fixed MSR 0x259 0x0000000000000000
2412 13:43:11.505368 CPU physical address size: 39 bits
2413 13:43:11.512022 MTRR: Fixed MSR 0x268 0x0606060606060606
2414 13:43:11.515409 MTRR: Fixed MSR 0x259 0x0000000000000000
2415 13:43:11.518938 MTRR: Fixed MSR 0x268 0x0606060606060606
2416 13:43:11.521937 MTRR: Fixed MSR 0x269 0x0606060606060606
2417 13:43:11.528810 MTRR: Fixed MSR 0x26a 0x0606060606060606
2418 13:43:11.532264 MTRR: Fixed MSR 0x26b 0x0606060606060606
2419 13:43:11.535557 MTRR: Fixed MSR 0x26c 0x0606060606060606
2420 13:43:11.538808 MTRR: Fixed MSR 0x26d 0x0606060606060606
2421 13:43:11.545225 MTRR: Fixed MSR 0x26e 0x0606060606060606
2422 13:43:11.548631 MTRR: Fixed MSR 0x26f 0x0606060606060606
2423 13:43:11.551959 MTRR: Fixed MSR 0x269 0x0606060606060606
2424 13:43:11.555346 call enable_fixed_mtrr()
2425 13:43:11.558666 MTRR: Fixed MSR 0x26a 0x0606060606060606
2426 13:43:11.562004 MTRR: Fixed MSR 0x26b 0x0606060606060606
2427 13:43:11.568442 MTRR: Fixed MSR 0x26c 0x0606060606060606
2428 13:43:11.572225 MTRR: Fixed MSR 0x26d 0x0606060606060606
2429 13:43:11.575360 MTRR: Fixed MSR 0x26e 0x0606060606060606
2430 13:43:11.578470 MTRR: Fixed MSR 0x26f 0x0606060606060606
2431 13:43:11.581756 CPU physical address size: 39 bits
2432 13:43:11.584987 call enable_fixed_mtrr()
2433 13:43:11.588494 CPU physical address size: 39 bits
2434 13:43:11.591824 CPU physical address size: 39 bits
2435 13:43:11.595094 MTRR: Fixed MSR 0x259 0x0000000000000000
2436 13:43:11.601608 MTRR: Fixed MSR 0x26b 0x0606060606060606
2437 13:43:11.604996 MTRR: Fixed MSR 0x268 0x0606060606060606
2438 13:43:11.608367 MTRR: Fixed MSR 0x269 0x0606060606060606
2439 13:43:11.611717 MTRR: Fixed MSR 0x26c 0x0606060606060606
2440 13:43:11.618526 MTRR: Fixed MSR 0x26d 0x0606060606060606
2441 13:43:11.621516 MTRR: Fixed MSR 0x26e 0x0606060606060606
2442 13:43:11.624752 MTRR: Fixed MSR 0x26f 0x0606060606060606
2443 13:43:11.628683 MTRR: Fixed MSR 0x26a 0x0606060606060606
2444 13:43:11.631751 call enable_fixed_mtrr()
2445 13:43:11.635144 MTRR: Fixed MSR 0x26b 0x0606060606060606
2446 13:43:11.641865 MTRR: Fixed MSR 0x26c 0x0606060606060606
2447 13:43:11.645201 MTRR: Fixed MSR 0x26d 0x0606060606060606
2448 13:43:11.648233 MTRR: Fixed MSR 0x26e 0x0606060606060606
2449 13:43:11.651778 MTRR: Fixed MSR 0x26f 0x0606060606060606
2450 13:43:11.658181 CPU physical address size: 39 bits
2451 13:43:11.661573 call enable_fixed_mtrr()
2452 13:43:11.664920 CPU physical address size: 39 bits
2453 13:43:11.665001
2454 13:43:11.668271 MTRR check
2455 13:43:11.668350 Fixed MTRRs : Enabled
2456 13:43:11.671606 Variable MTRRs: Enabled
2457 13:43:11.671680
2458 13:43:11.678053 BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms
2459 13:43:11.681515 Checking cr50 for pending updates
2460 13:43:11.692703 Reading cr50 TPM mode
2461 13:43:11.707812 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2462 13:43:11.717555 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2463 13:43:11.721059 Checking segment from ROM address 0xffc26dac
2464 13:43:11.724455 Checking segment from ROM address 0xffc26dc8
2465 13:43:11.730937 Loading segment from ROM address 0xffc26dac
2466 13:43:11.731012 code (compression=1)
2467 13:43:11.741199 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2468 13:43:11.747833 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2469 13:43:11.750730 using LZMA
2470 13:43:11.838761 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2471 13:43:11.845284 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2472 13:43:11.853536 Loading segment from ROM address 0xffc26dc8
2473 13:43:11.856879 Entry Point 0x30000000
2474 13:43:11.856953 Loaded segments
2475 13:43:11.863272 BS: BS_PAYLOAD_LOAD run times (exec / console): 86 / 62 ms
2476 13:43:11.869567 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2477 13:43:11.872964 Finalizing chipset.
2478 13:43:11.876374 apm_control: Finalizing SMM.
2479 13:43:11.876451 APMC done.
2480 13:43:11.879786 HECI: CSE device 16.0 is hidden
2481 13:43:11.882992 HECI: CSE device 16.1 is disabled
2482 13:43:11.886476 HECI: CSE device 16.2 is disabled
2483 13:43:11.889649 HECI: CSE device 16.3 is disabled
2484 13:43:11.893055 HECI: CSE device 16.4 is disabled
2485 13:43:11.896223 HECI: CSE device 16.5 is disabled
2486 13:43:11.899564 HECI: CSE device 16.0 is hidden
2487 13:43:11.906192 CSE is disabled, cannot send End-of-Post (EOP) message
2488 13:43:11.909940 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2489 13:43:11.912965 mp_park_aps done after 0 msecs.
2490 13:43:11.919650 Jumping to boot code at 0x30000000(0x76892000)
2491 13:43:11.929554 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2492 13:43:11.932878
2493 13:43:11.932964
2494 13:43:11.933049
2495 13:43:11.936366 Starting depthcharge on Volmar...
2496 13:43:11.936439
2497 13:43:11.936762 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
2498 13:43:11.936845 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2499 13:43:11.936909 Setting prompt string to ['brya:']
2500 13:43:11.936970 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:44)
2501 13:43:11.943032 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2502 13:43:11.943108
2503 13:43:11.949483 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2504 13:43:11.949556
2505 13:43:11.956120 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2506 13:43:11.956196
2507 13:43:11.959496 configure_storage: Failed to remap 1C:2
2508 13:43:11.959569
2509 13:43:11.963025 Wipe memory regions:
2510 13:43:11.963100
2511 13:43:11.966080 [0x00000000001000, 0x000000000a0000)
2512 13:43:11.966155
2513 13:43:11.969665 [0x00000000100000, 0x00000030000000)
2514 13:43:12.072086
2515 13:43:12.075230 [0x00000032668e60, 0x00000076858000)
2516 13:43:12.219441
2517 13:43:12.222850 [0x00000100000000, 0x0000027fc00000)
2518 13:43:13.032788
2519 13:43:13.036256 ec_init: CrosEC protocol v3 supported (256, 256)
2520 13:43:13.644388
2521 13:43:13.644533 R8152: Initializing
2522 13:43:13.644600
2523 13:43:13.647353 Version 9 (ocp_data = 6010)
2524 13:43:13.647413
2525 13:43:13.650733 R8152: Done initializing
2526 13:43:13.650802
2527 13:43:13.654063 Adding net device
2528 13:43:13.955758
2529 13:43:13.959185 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2530 13:43:13.959277
2531 13:43:13.959336
2532 13:43:13.959387
2533 13:43:13.959648 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2535 13:43:14.059927 brya: tftpboot 192.168.201.1 11884146/tftp-deploy-1kb74dpk/kernel/bzImage 11884146/tftp-deploy-1kb74dpk/kernel/cmdline 11884146/tftp-deploy-1kb74dpk/ramdisk/ramdisk.cpio.gz
2536 13:43:14.060075 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2537 13:43:14.060162 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2538 13:43:14.064735 tftpboot 192.168.201.1 11884146/tftp-deploy-1kb74dpk/kernel/bzImploy-1kb74dpk/kernel/cmdline 11884146/tftp-deploy-1kb74dpk/ramdisk/ramdisk.cpio.gz
2539 13:43:14.064812
2540 13:43:14.064866 Waiting for link
2541 13:43:14.267401
2542 13:43:14.267536 done.
2543 13:43:14.267599
2544 13:43:14.267650 MAC: 00:e0:4c:68:02:a7
2545 13:43:14.267696
2546 13:43:14.270805 Sending DHCP discover... done.
2547 13:43:14.270883
2548 13:43:14.274062 Waiting for reply... done.
2549 13:43:14.274134
2550 13:43:14.277772 Sending DHCP request... done.
2551 13:43:14.277835
2552 13:43:14.280890 Waiting for reply... done.
2553 13:43:14.284011
2554 13:43:14.284070 My ip is 192.168.201.15
2555 13:43:14.284128
2556 13:43:14.287479 The DHCP server ip is 192.168.201.1
2557 13:43:14.287544
2558 13:43:14.293943 TFTP server IP predefined by user: 192.168.201.1
2559 13:43:14.294003
2560 13:43:14.300841 Bootfile predefined by user: 11884146/tftp-deploy-1kb74dpk/kernel/bzImage
2561 13:43:14.300898
2562 13:43:14.303959 Sending tftp read request... done.
2563 13:43:14.304029
2564 13:43:14.307237 Waiting for the transfer...
2565 13:43:14.307298
2566 13:43:14.536401 00000000 ################################################################
2567 13:43:14.536538
2568 13:43:14.763219 00080000 ################################################################
2569 13:43:14.763357
2570 13:43:14.989929 00100000 ################################################################
2571 13:43:14.990066
2572 13:43:15.215889 00180000 ################################################################
2573 13:43:15.216028
2574 13:43:15.441827 00200000 ################################################################
2575 13:43:15.441969
2576 13:43:15.668571 00280000 ################################################################
2577 13:43:15.668713
2578 13:43:15.894776 00300000 ################################################################
2579 13:43:15.894914
2580 13:43:16.121032 00380000 ################################################################
2581 13:43:16.121178
2582 13:43:16.347576 00400000 ################################################################
2583 13:43:16.347721
2584 13:43:16.573209 00480000 ################################################################
2585 13:43:16.573348
2586 13:43:16.800712 00500000 ################################################################
2587 13:43:16.800860
2588 13:43:17.027597 00580000 ################################################################
2589 13:43:17.027748
2590 13:43:17.253746 00600000 ################################################################
2591 13:43:17.253889
2592 13:43:17.480155 00680000 ################################################################
2593 13:43:17.480295
2594 13:43:17.705647 00700000 ################################################################
2595 13:43:17.705793
2596 13:43:17.933296 00780000 ################################################################
2597 13:43:17.933477
2598 13:43:18.014863 00800000 ####################### done.
2599 13:43:18.014964
2600 13:43:18.018128 The bootfile was 8576912 bytes long.
2601 13:43:18.018204
2602 13:43:18.021775 Sending tftp read request... done.
2603 13:43:18.021849
2604 13:43:18.024621 Waiting for the transfer...
2605 13:43:18.024699
2606 13:43:18.253311 00000000 ################################################################
2607 13:43:18.253453
2608 13:43:18.480347 00080000 ################################################################
2609 13:43:18.480489
2610 13:43:18.707132 00100000 ################################################################
2611 13:43:18.707268
2612 13:43:18.937484 00180000 ################################################################
2613 13:43:18.937627
2614 13:43:19.164941 00200000 ################################################################
2615 13:43:19.165075
2616 13:43:19.393829 00280000 ################################################################
2617 13:43:19.393963
2618 13:43:19.622661 00300000 ################################################################
2619 13:43:19.622800
2620 13:43:19.849745 00380000 ################################################################
2621 13:43:19.849890
2622 13:43:20.076885 00400000 ################################################################
2623 13:43:20.077021
2624 13:43:20.300873 00480000 ################################################################
2625 13:43:20.301015
2626 13:43:20.523610 00500000 ################################################################ done.
2627 13:43:20.523746
2628 13:43:20.526963 Sending tftp read request... done.
2629 13:43:20.527051
2630 13:43:20.530249 Waiting for the transfer...
2631 13:43:20.530315
2632 13:43:20.533615 00000000 # done.
2633 13:43:20.533680
2634 13:43:20.543588 Command line loaded dynamically from TFTP file: 11884146/tftp-deploy-1kb74dpk/kernel/cmdline
2635 13:43:20.543979
2636 13:43:20.567017 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11884146/extract-nfsrootfs-bkyww2k8,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2637 13:43:20.572571
2638 13:43:20.575852 Shutting down all USB controllers.
2639 13:43:20.576282
2640 13:43:20.576534 Removing current net device
2641 13:43:20.576746
2642 13:43:20.579098 Finalizing coreboot
2643 13:43:20.579454
2644 13:43:20.585684 Exiting depthcharge with code 4 at timestamp: 18538358
2645 13:43:20.586161
2646 13:43:20.586407
2647 13:43:20.586616 Starting kernel ...
2648 13:43:20.586815
2649 13:43:20.587008
2650 13:43:20.587845 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2651 13:43:20.588195 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
2652 13:43:20.588455 Setting prompt string to ['Linux version [0-9]']
2653 13:43:20.588689 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2654 13:43:20.588930 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2656 13:47:55.588997 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
2658 13:47:55.589852 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
2660 13:47:55.590449 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2663 13:47:55.591436 end: 2 depthcharge-action (duration 00:05:00) [common]
2665 13:47:55.592277 Cleaning after the job
2666 13:47:55.592605 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/ramdisk
2667 13:47:55.593614 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/kernel
2668 13:47:55.594599 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/nfsrootfs
2669 13:47:55.646729 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884146/tftp-deploy-1kb74dpk/modules
2670 13:47:55.647154 start: 5.1 power-off (timeout 00:00:30) [common]
2671 13:47:55.647321 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-2' '--port=1' '--command=off'
2672 13:47:55.724940 >> Command sent successfully.
2673 13:47:55.732831 Returned 0 in 0 seconds
2674 13:47:55.833806 end: 5.1 power-off (duration 00:00:00) [common]
2676 13:47:55.834962 start: 5.2 read-feedback (timeout 00:10:00) [common]
2677 13:47:55.835808 Listened to connection for namespace 'common' for up to 1s
2679 13:47:55.836823 Listened to connection for namespace 'common' for up to 1s
2680 13:47:56.836629 Finalising connection for namespace 'common'
2681 13:47:56.837204 Disconnecting from shell: Finalise
2682 13:47:56.837543
2683 13:47:56.938472 end: 5.2 read-feedback (duration 00:00:01) [common]
2684 13:47:56.938990 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11884146
2685 13:47:57.122914 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11884146
2686 13:47:57.123113 JobError: Your job cannot terminate cleanly.