Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 13:42:26.991926 lava-dispatcher, installed at version: 2023.08
2 13:42:26.992151 start: 0 validate
3 13:42:26.992304 Start time: 2023-10-26 13:42:26.992296+00:00 (UTC)
4 13:42:26.992434 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:42:26.992585 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 13:42:27.254044 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:42:27.254243 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:42:27.513440 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:42:27.513662 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 13:42:35.248302 validate duration: 8.26
12 13:42:35.248678 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:42:35.248850 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:42:35.248971 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:42:35.249136 Not decompressing ramdisk as can be used compressed.
16 13:42:35.249249 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 13:42:35.249333 saving as /var/lib/lava/dispatcher/tmp/11884121/tftp-deploy-berikzqw/ramdisk/rootfs.cpio.gz
18 13:42:35.249449 total size: 35760064 (34 MB)
19 13:42:35.750819 progress 0 % (0 MB)
20 13:42:35.761433 progress 5 % (1 MB)
21 13:42:35.771864 progress 10 % (3 MB)
22 13:42:35.782187 progress 15 % (5 MB)
23 13:42:35.792639 progress 20 % (6 MB)
24 13:42:35.802911 progress 25 % (8 MB)
25 13:42:35.813317 progress 30 % (10 MB)
26 13:42:35.823575 progress 35 % (11 MB)
27 13:42:35.834006 progress 40 % (13 MB)
28 13:42:35.844542 progress 45 % (15 MB)
29 13:42:35.854981 progress 50 % (17 MB)
30 13:42:35.865534 progress 55 % (18 MB)
31 13:42:35.875851 progress 60 % (20 MB)
32 13:42:35.886428 progress 65 % (22 MB)
33 13:42:35.896662 progress 70 % (23 MB)
34 13:42:35.907142 progress 75 % (25 MB)
35 13:42:35.917576 progress 80 % (27 MB)
36 13:42:35.927819 progress 85 % (29 MB)
37 13:42:35.938186 progress 90 % (30 MB)
38 13:42:35.948322 progress 95 % (32 MB)
39 13:42:35.958625 progress 100 % (34 MB)
40 13:42:35.958821 34 MB downloaded in 0.71 s (48.08 MB/s)
41 13:42:35.959022 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:42:35.959334 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:42:35.959453 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:42:35.959566 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:42:35.959738 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 13:42:35.959854 saving as /var/lib/lava/dispatcher/tmp/11884121/tftp-deploy-berikzqw/kernel/bzImage
48 13:42:35.959967 total size: 8576912 (8 MB)
49 13:42:35.960081 No compression specified
50 13:42:35.961560 progress 0 % (0 MB)
51 13:42:35.964148 progress 5 % (0 MB)
52 13:42:35.966685 progress 10 % (0 MB)
53 13:42:35.969243 progress 15 % (1 MB)
54 13:42:35.971756 progress 20 % (1 MB)
55 13:42:35.974314 progress 25 % (2 MB)
56 13:42:35.976949 progress 30 % (2 MB)
57 13:42:35.979507 progress 35 % (2 MB)
58 13:42:35.982072 progress 40 % (3 MB)
59 13:42:35.984611 progress 45 % (3 MB)
60 13:42:35.987154 progress 50 % (4 MB)
61 13:42:35.989803 progress 55 % (4 MB)
62 13:42:35.992596 progress 60 % (4 MB)
63 13:42:35.995204 progress 65 % (5 MB)
64 13:42:35.997787 progress 70 % (5 MB)
65 13:42:36.000252 progress 75 % (6 MB)
66 13:42:36.002713 progress 80 % (6 MB)
67 13:42:36.005200 progress 85 % (6 MB)
68 13:42:36.007669 progress 90 % (7 MB)
69 13:42:36.010133 progress 95 % (7 MB)
70 13:42:36.012625 progress 100 % (8 MB)
71 13:42:36.012862 8 MB downloaded in 0.05 s (154.65 MB/s)
72 13:42:36.013024 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:42:36.013281 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:42:36.013379 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:42:36.013483 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:42:36.013637 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 13:42:36.013718 saving as /var/lib/lava/dispatcher/tmp/11884121/tftp-deploy-berikzqw/modules/modules.tar
79 13:42:36.013787 total size: 253872 (0 MB)
80 13:42:36.013857 Using unxz to decompress xz
81 13:42:36.018476 progress 12 % (0 MB)
82 13:42:36.018938 progress 25 % (0 MB)
83 13:42:36.019205 progress 38 % (0 MB)
84 13:42:36.020914 progress 51 % (0 MB)
85 13:42:36.022962 progress 64 % (0 MB)
86 13:42:36.025073 progress 77 % (0 MB)
87 13:42:36.027157 progress 90 % (0 MB)
88 13:42:36.029069 progress 100 % (0 MB)
89 13:42:36.035395 0 MB downloaded in 0.02 s (11.21 MB/s)
90 13:42:36.035657 end: 1.3.1 http-download (duration 00:00:00) [common]
92 13:42:36.035971 end: 1.3 download-retry (duration 00:00:00) [common]
93 13:42:36.036083 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 13:42:36.036198 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 13:42:36.036292 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 13:42:36.036398 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 13:42:36.036643 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i
98 13:42:36.036804 makedir: /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin
99 13:42:36.036927 makedir: /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/tests
100 13:42:36.037041 makedir: /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/results
101 13:42:36.037174 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-add-keys
102 13:42:36.037342 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-add-sources
103 13:42:36.037492 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-background-process-start
104 13:42:36.037642 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-background-process-stop
105 13:42:36.037787 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-common-functions
106 13:42:36.037932 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-echo-ipv4
107 13:42:36.038077 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-install-packages
108 13:42:36.038221 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-installed-packages
109 13:42:36.038364 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-os-build
110 13:42:36.038510 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-probe-channel
111 13:42:36.038656 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-probe-ip
112 13:42:36.038805 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-target-ip
113 13:42:36.038950 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-target-mac
114 13:42:36.039095 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-target-storage
115 13:42:36.039244 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-test-case
116 13:42:36.039390 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-test-event
117 13:42:36.039534 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-test-feedback
118 13:42:36.039679 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-test-raise
119 13:42:36.039826 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-test-reference
120 13:42:36.039975 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-test-runner
121 13:42:36.040122 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-test-set
122 13:42:36.040266 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-test-shell
123 13:42:36.040415 Updating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-install-packages (oe)
124 13:42:36.040592 Updating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/bin/lava-installed-packages (oe)
125 13:42:36.040734 Creating /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/environment
126 13:42:36.040855 LAVA metadata
127 13:42:36.040943 - LAVA_JOB_ID=11884121
128 13:42:36.041018 - LAVA_DISPATCHER_IP=192.168.201.1
129 13:42:36.041135 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 13:42:36.041212 skipped lava-vland-overlay
131 13:42:36.041297 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 13:42:36.041391 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 13:42:36.041462 skipped lava-multinode-overlay
134 13:42:36.041545 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 13:42:36.041635 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 13:42:36.041720 Loading test definitions
137 13:42:36.041832 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 13:42:36.041937 Using /lava-11884121 at stage 0
139 13:42:36.042291 uuid=11884121_1.4.2.3.1 testdef=None
140 13:42:36.042394 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 13:42:36.042494 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 13:42:36.043081 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 13:42:36.043337 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 13:42:36.044052 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 13:42:36.044312 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 13:42:36.045013 runner path: /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/0/tests/0_cros-ec test_uuid 11884121_1.4.2.3.1
149 13:42:36.045191 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 13:42:36.045422 Creating lava-test-runner.conf files
152 13:42:36.045494 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11884121/lava-overlay-9glsc11i/lava-11884121/0 for stage 0
153 13:42:36.045596 - 0_cros-ec
154 13:42:36.045706 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 13:42:36.045802 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
156 13:42:36.053269 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 13:42:36.053394 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
158 13:42:36.053491 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 13:42:36.053586 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 13:42:36.053685 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
161 13:42:37.211358 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 13:42:37.211786 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
163 13:42:37.211921 extracting modules file /var/lib/lava/dispatcher/tmp/11884121/tftp-deploy-berikzqw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884121/extract-overlay-ramdisk-m61eukjc/ramdisk
164 13:42:37.228534 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 13:42:37.228672 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
166 13:42:37.228774 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11884121/compress-overlay-rdyoaz0d/overlay-1.4.2.4.tar.gz to ramdisk
167 13:42:37.228864 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11884121/compress-overlay-rdyoaz0d/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11884121/extract-overlay-ramdisk-m61eukjc/ramdisk
168 13:42:37.237180 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 13:42:37.237307 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
170 13:42:37.237409 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 13:42:37.237509 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
172 13:42:37.237596 Building ramdisk /var/lib/lava/dispatcher/tmp/11884121/extract-overlay-ramdisk-m61eukjc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11884121/extract-overlay-ramdisk-m61eukjc/ramdisk
173 13:42:37.828137 >> 184121 blocks
174 13:42:41.807332 rename /var/lib/lava/dispatcher/tmp/11884121/extract-overlay-ramdisk-m61eukjc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11884121/tftp-deploy-berikzqw/ramdisk/ramdisk.cpio.gz
175 13:42:41.807816 end: 1.4.7 compress-ramdisk (duration 00:00:05) [common]
176 13:42:41.807956 start: 1.4.8 prepare-kernel (timeout 00:09:53) [common]
177 13:42:41.808072 start: 1.4.8.1 prepare-fit (timeout 00:09:53) [common]
178 13:42:41.808183 No mkimage arch provided, not using FIT.
179 13:42:41.808284 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 13:42:41.808381 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 13:42:41.808501 end: 1.4 prepare-tftp-overlay (duration 00:00:06) [common]
182 13:42:41.808605 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:53) [common]
183 13:42:41.808696 No LXC device requested
184 13:42:41.808795 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 13:42:41.808908 start: 1.6 deploy-device-env (timeout 00:09:53) [common]
186 13:42:41.809003 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 13:42:41.809082 Checking files for TFTP limit of 4294967296 bytes.
188 13:42:41.809549 end: 1 tftp-deploy (duration 00:00:07) [common]
189 13:42:41.809666 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 13:42:41.809766 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 13:42:41.809898 substitutions:
192 13:42:41.809974 - {DTB}: None
193 13:42:41.810046 - {INITRD}: 11884121/tftp-deploy-berikzqw/ramdisk/ramdisk.cpio.gz
194 13:42:41.810113 - {KERNEL}: 11884121/tftp-deploy-berikzqw/kernel/bzImage
195 13:42:41.810178 - {LAVA_MAC}: None
196 13:42:41.810242 - {PRESEED_CONFIG}: None
197 13:42:41.810304 - {PRESEED_LOCAL}: None
198 13:42:41.810366 - {RAMDISK}: 11884121/tftp-deploy-berikzqw/ramdisk/ramdisk.cpio.gz
199 13:42:41.810427 - {ROOT_PART}: None
200 13:42:41.810488 - {ROOT}: None
201 13:42:41.810549 - {SERVER_IP}: 192.168.201.1
202 13:42:41.810609 - {TEE}: None
203 13:42:41.810669 Parsed boot commands:
204 13:42:41.810729 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 13:42:41.810924 Parsed boot commands: tftpboot 192.168.201.1 11884121/tftp-deploy-berikzqw/kernel/bzImage 11884121/tftp-deploy-berikzqw/kernel/cmdline 11884121/tftp-deploy-berikzqw/ramdisk/ramdisk.cpio.gz
206 13:42:41.811025 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 13:42:41.811122 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 13:42:41.811227 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 13:42:41.811324 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 13:42:41.811402 Not connected, no need to disconnect.
211 13:42:41.811488 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 13:42:41.811580 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 13:42:41.811656 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-11'
214 13:42:41.816082 Setting prompt string to ['lava-test: # ']
215 13:42:41.816483 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 13:42:41.816603 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 13:42:41.816713 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 13:42:41.816835 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 13:42:41.817074 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
220 13:42:46.956309 >> Command sent successfully.
221 13:42:46.958913 Returned 0 in 5 seconds
222 13:42:47.059338 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 13:42:47.059885 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 13:42:47.060063 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 13:42:47.060227 Setting prompt string to 'Starting depthcharge on Voema...'
227 13:42:47.060363 Changing prompt to 'Starting depthcharge on Voema...'
228 13:42:47.060500 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 13:42:47.060953 [Enter `^Ec?' for help]
230 13:42:48.623779
231 13:42:48.623950
232 13:42:48.633717 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 13:42:48.637084 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
234 13:42:48.643980 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 13:42:48.647113 CPU: AES supported, TXT NOT supported, VT supported
236 13:42:48.654430 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 13:42:48.657535 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 13:42:48.664773 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 13:42:48.668247 VBOOT: Loading verstage.
240 13:42:48.671410 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 13:42:48.677759 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 13:42:48.681545 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 13:42:48.687807 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 13:42:48.697909 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 13:42:48.698065
246 13:42:48.698197
247 13:42:48.707947 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 13:42:48.724661 Probing TPM: . done!
249 13:42:48.727669 TPM ready after 0 ms
250 13:42:48.730971 Connected to device vid:did:rid of 1ae0:0028:00
251 13:42:48.742241 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
252 13:42:48.748773 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 13:42:48.752152 Initialized TPM device CR50 revision 0
254 13:42:48.808457 tlcl_send_startup: Startup return code is 0
255 13:42:48.808614 TPM: setup succeeded
256 13:42:48.823312 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 13:42:48.837581 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 13:42:48.849886 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 13:42:48.860074 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 13:42:48.863273 Chrome EC: UHEPI supported
261 13:42:48.866744 Phase 1
262 13:42:48.869846 FMAP: area GBB found @ 1805000 (458752 bytes)
263 13:42:48.880090 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 13:42:48.886423 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 13:42:48.893260 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 13:42:48.899995 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 13:42:48.903361 Recovery requested (1009000e)
268 13:42:48.906443 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 13:42:48.918002 tlcl_extend: response is 0
270 13:42:48.924999 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 13:42:48.935046 tlcl_extend: response is 0
272 13:42:48.941199 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 13:42:48.947841 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 13:42:48.954701 BS: verstage times (exec / console): total (unknown) / 142 ms
275 13:42:48.954849
276 13:42:48.954973
277 13:42:48.967793 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 13:42:48.974565 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 13:42:48.977866 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 13:42:48.981010 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 13:42:48.987509 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 13:42:48.991180 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 13:42:48.994302 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 13:42:48.997448 TCO_STS: 0000 0000
285 13:42:49.001182 GEN_PMCON: d0015038 00002200
286 13:42:49.004088 GBLRST_CAUSE: 00000000 00000000
287 13:42:49.004232 HPR_CAUSE0: 00000000
288 13:42:49.008146 prev_sleep_state 5
289 13:42:49.011336 Boot Count incremented to 22182
290 13:42:49.017684 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 13:42:49.024254 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 13:42:49.031079 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 13:42:49.037830 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 13:42:49.042385 Chrome EC: UHEPI supported
295 13:42:49.048601 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 13:42:49.061693 Probing TPM: done!
297 13:42:49.067999 Connected to device vid:did:rid of 1ae0:0028:00
298 13:42:49.078102 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
299 13:42:49.081565 Initialized TPM device CR50 revision 0
300 13:42:49.096688 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 13:42:49.103501 MRC: Hash idx 0x100b comparison successful.
302 13:42:49.106448 MRC cache found, size faa8
303 13:42:49.106543 bootmode is set to: 2
304 13:42:49.109649 SPD index = 2
305 13:42:49.116687 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 13:42:49.119822 SPD: module type is LPDDR4X
307 13:42:49.123105 SPD: module part number is MT53D1G64D4NW-046
308 13:42:49.129859 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
309 13:42:49.133452 SPD: device width 16 bits, bus width 16 bits
310 13:42:49.139911 SPD: module size is 2048 MB (per channel)
311 13:42:49.570165 CBMEM:
312 13:42:49.573486 IMD: root @ 0x76fff000 254 entries.
313 13:42:49.576568 IMD: root @ 0x76ffec00 62 entries.
314 13:42:49.580118 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 13:42:49.586393 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 13:42:49.589675 External stage cache:
317 13:42:49.593307 IMD: root @ 0x7b3ff000 254 entries.
318 13:42:49.596530 IMD: root @ 0x7b3fec00 62 entries.
319 13:42:49.611564 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 13:42:49.617945 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 13:42:49.624221 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 13:42:49.637956 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 13:42:49.644867 cse_lite: Skip switching to RW in the recovery path
324 13:42:49.645006 8 DIMMs found
325 13:42:49.645118 SMM Memory Map
326 13:42:49.648001 SMRAM : 0x7b000000 0x800000
327 13:42:49.654599 Subregion 0: 0x7b000000 0x200000
328 13:42:49.657960 Subregion 1: 0x7b200000 0x200000
329 13:42:49.661638 Subregion 2: 0x7b400000 0x400000
330 13:42:49.661767 top_of_ram = 0x77000000
331 13:42:49.668349 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 13:42:49.674616 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 13:42:49.678305 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 13:42:49.684526 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 13:42:49.691427 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 13:42:49.698150 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 13:42:49.707968 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 13:42:49.715517 Processing 211 relocs. Offset value of 0x74c0b000
339 13:42:49.721317 BS: romstage times (exec / console): total (unknown) / 277 ms
340 13:42:49.727486
341 13:42:49.727618
342 13:42:49.734831 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 13:42:49.741081 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 13:42:49.748011 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 13:42:49.754656 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 13:42:49.764301 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 13:42:49.770847 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 13:42:49.813425 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 13:42:49.820360 Processing 5008 relocs. Offset value of 0x75d98000
350 13:42:49.824156 BS: postcar times (exec / console): total (unknown) / 59 ms
351 13:42:49.826848
352 13:42:49.826970
353 13:42:49.836754 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 13:42:49.836898 Normal boot
355 13:42:49.839914 FW_CONFIG value is 0x804c02
356 13:42:49.843217 PCI: 00:07.0 disabled by fw_config
357 13:42:49.846866 PCI: 00:07.1 disabled by fw_config
358 13:42:49.849996 PCI: 00:0d.2 disabled by fw_config
359 13:42:49.853130 PCI: 00:1c.7 disabled by fw_config
360 13:42:49.860080 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 13:42:49.866556 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 13:42:49.869753 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 13:42:49.872976 GENERIC: 0.0 disabled by fw_config
364 13:42:49.879490 GENERIC: 1.0 disabled by fw_config
365 13:42:49.883035 fw_config match found: DB_USB=USB3_ACTIVE
366 13:42:49.886172 fw_config match found: DB_USB=USB3_ACTIVE
367 13:42:49.890060 fw_config match found: DB_USB=USB3_ACTIVE
368 13:42:49.896496 fw_config match found: DB_USB=USB3_ACTIVE
369 13:42:49.899601 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 13:42:49.906428 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 13:42:49.916192 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 13:42:49.922856 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 13:42:49.925965 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 13:42:49.932780 microcode: Update skipped, already up-to-date
375 13:42:49.939251 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 13:42:49.966949 Detected 4 core, 8 thread CPU.
377 13:42:49.970408 Setting up SMI for CPU
378 13:42:49.973529 IED base = 0x7b400000
379 13:42:49.973658 IED size = 0x00400000
380 13:42:49.976772 Will perform SMM setup.
381 13:42:49.983402 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
382 13:42:49.990313 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 13:42:49.996562 Processing 16 relocs. Offset value of 0x00030000
384 13:42:50.000287 Attempting to start 7 APs
385 13:42:50.003546 Waiting for 10ms after sending INIT.
386 13:42:50.018865 Waiting for 1st SIPI to complete...done.
387 13:42:50.018994 AP: slot 1 apic_id 1.
388 13:42:50.025551 Waiting for 2nd SIPI to complete...done.
389 13:42:50.025682 AP: slot 7 apic_id 2.
390 13:42:50.028775 AP: slot 3 apic_id 3.
391 13:42:50.031932 AP: slot 2 apic_id 5.
392 13:42:50.032084 AP: slot 6 apic_id 4.
393 13:42:50.035606 AP: slot 4 apic_id 7.
394 13:42:50.039139 AP: slot 5 apic_id 6.
395 13:42:50.045451 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 13:42:50.052388 Processing 13 relocs. Offset value of 0x00038000
397 13:42:50.052531 Unable to locate Global NVS
398 13:42:50.062112 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 13:42:50.065235 Installing permanent SMM handler to 0x7b000000
400 13:42:50.075156 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 13:42:50.078966 Processing 794 relocs. Offset value of 0x7b010000
402 13:42:50.088568 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 13:42:50.092139 Processing 13 relocs. Offset value of 0x7b008000
404 13:42:50.098682 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 13:42:50.104998 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 13:42:50.108456 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 13:42:50.115006 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 13:42:50.122120 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 13:42:50.128315 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 13:42:50.135484 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 13:42:50.135630 Unable to locate Global NVS
412 13:42:50.144929 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 13:42:50.148678 Clearing SMI status registers
414 13:42:50.148823 SMI_STS: PM1
415 13:42:50.151698 PM1_STS: PWRBTN
416 13:42:50.158719 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 13:42:50.161489 In relocation handler: CPU 0
418 13:42:50.165026 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 13:42:50.171559 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 13:42:50.171708 Relocation complete.
421 13:42:50.181309 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 13:42:50.181457 In relocation handler: CPU 1
423 13:42:50.188219 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 13:42:50.188362 Relocation complete.
425 13:42:50.194955 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
426 13:42:50.198372 In relocation handler: CPU 6
427 13:42:50.205200 New SMBASE=0x7affe800 IEDBASE=0x7b400000
428 13:42:50.208281 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 13:42:50.211362 Relocation complete.
430 13:42:50.217974 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
431 13:42:50.221291 In relocation handler: CPU 5
432 13:42:50.224914 New SMBASE=0x7affec00 IEDBASE=0x7b400000
433 13:42:50.228041 Writing SMRR. base = 0x7b000006, mask=0xff800c00
434 13:42:50.231486 Relocation complete.
435 13:42:50.238049 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
436 13:42:50.241322 In relocation handler: CPU 7
437 13:42:50.244893 New SMBASE=0x7affe400 IEDBASE=0x7b400000
438 13:42:50.251225 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 13:42:50.254874 Relocation complete.
440 13:42:50.261181 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
441 13:42:50.264654 In relocation handler: CPU 3
442 13:42:50.267906 New SMBASE=0x7afff400 IEDBASE=0x7b400000
443 13:42:50.268035 Relocation complete.
444 13:42:50.278053 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
445 13:42:50.281502 In relocation handler: CPU 4
446 13:42:50.284621 New SMBASE=0x7afff000 IEDBASE=0x7b400000
447 13:42:50.284745 Relocation complete.
448 13:42:50.294647 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
449 13:42:50.294781 In relocation handler: CPU 2
450 13:42:50.301437 New SMBASE=0x7afff800 IEDBASE=0x7b400000
451 13:42:50.301573 Relocation complete.
452 13:42:50.304748 Initializing CPU #0
453 13:42:50.308138 CPU: vendor Intel device 806c1
454 13:42:50.311379 CPU: family 06, model 8c, stepping 01
455 13:42:50.314522 Clearing out pending MCEs
456 13:42:50.317695 Setting up local APIC...
457 13:42:50.317830 apic_id: 0x00 done.
458 13:42:50.320971 Turbo is available but hidden
459 13:42:50.324665 Turbo is available and visible
460 13:42:50.331041 microcode: Update skipped, already up-to-date
461 13:42:50.331198 CPU #0 initialized
462 13:42:50.334325 Initializing CPU #2
463 13:42:50.337630 Initializing CPU #6
464 13:42:50.337731 Initializing CPU #4
465 13:42:50.341202 Initializing CPU #5
466 13:42:50.344352 CPU: vendor Intel device 806c1
467 13:42:50.347626 CPU: family 06, model 8c, stepping 01
468 13:42:50.350901 CPU: vendor Intel device 806c1
469 13:42:50.354800 CPU: family 06, model 8c, stepping 01
470 13:42:50.357566 Clearing out pending MCEs
471 13:42:50.360651 Clearing out pending MCEs
472 13:42:50.360775 Setting up local APIC...
473 13:42:50.364081 Initializing CPU #1
474 13:42:50.367594 Initializing CPU #3
475 13:42:50.367689 Initializing CPU #7
476 13:42:50.370773 CPU: vendor Intel device 806c1
477 13:42:50.374546 CPU: family 06, model 8c, stepping 01
478 13:42:50.377425 CPU: vendor Intel device 806c1
479 13:42:50.380809 CPU: family 06, model 8c, stepping 01
480 13:42:50.384072 CPU: vendor Intel device 806c1
481 13:42:50.390795 CPU: family 06, model 8c, stepping 01
482 13:42:50.390898 CPU: vendor Intel device 806c1
483 13:42:50.394658 CPU: family 06, model 8c, stepping 01
484 13:42:50.398663 Clearing out pending MCEs
485 13:42:50.401736 Clearing out pending MCEs
486 13:42:50.405268 Setting up local APIC...
487 13:42:50.405357 Setting up local APIC...
488 13:42:50.408488 Clearing out pending MCEs
489 13:42:50.411746 Clearing out pending MCEs
490 13:42:50.415390 CPU: vendor Intel device 806c1
491 13:42:50.418494 CPU: family 06, model 8c, stepping 01
492 13:42:50.421832 Setting up local APIC...
493 13:42:50.421918 apic_id: 0x06 done.
494 13:42:50.425385 apic_id: 0x07 done.
495 13:42:50.428341 microcode: Update skipped, already up-to-date
496 13:42:50.435030 microcode: Update skipped, already up-to-date
497 13:42:50.435121 CPU #5 initialized
498 13:42:50.438638 CPU #4 initialized
499 13:42:50.441815 Setting up local APIC...
500 13:42:50.441900 apic_id: 0x04 done.
501 13:42:50.445192 Clearing out pending MCEs
502 13:42:50.451666 microcode: Update skipped, already up-to-date
503 13:42:50.451761 Setting up local APIC...
504 13:42:50.455248 Setting up local APIC...
505 13:42:50.458699 apic_id: 0x05 done.
506 13:42:50.458792 CPU #6 initialized
507 13:42:50.464977 microcode: Update skipped, already up-to-date
508 13:42:50.465073 apic_id: 0x01 done.
509 13:42:50.468666 apic_id: 0x02 done.
510 13:42:50.471858 apic_id: 0x03 done.
511 13:42:50.474874 microcode: Update skipped, already up-to-date
512 13:42:50.478522 microcode: Update skipped, already up-to-date
513 13:42:50.481595 CPU #7 initialized
514 13:42:50.484873 CPU #3 initialized
515 13:42:50.484967 CPU #2 initialized
516 13:42:50.491543 microcode: Update skipped, already up-to-date
517 13:42:50.491638 CPU #1 initialized
518 13:42:50.497971 bsp_do_flight_plan done after 468 msecs.
519 13:42:50.498102 CPU: frequency set to 4400 MHz
520 13:42:50.501617 Enabling SMIs.
521 13:42:50.508113 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 13:42:50.523735 SATAXPCIE1 indicates PCIe NVMe is present
523 13:42:50.526757 Probing TPM: done!
524 13:42:50.530443 Connected to device vid:did:rid of 1ae0:0028:00
525 13:42:50.540706 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
526 13:42:50.544060 Initialized TPM device CR50 revision 0
527 13:42:50.547596 Enabling S0i3.4
528 13:42:50.554499 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 13:42:50.557277 Found a VBT of 8704 bytes after decompression
530 13:42:50.563947 cse_lite: CSE RO boot. HybridStorageMode disabled
531 13:42:50.570752 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 13:42:50.645624 FSPS returned 0
533 13:42:50.649213 Executing Phase 1 of FspMultiPhaseSiInit
534 13:42:50.658866 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 13:42:50.662390 port C0 DISC req: usage 1 usb3 1 usb2 5
536 13:42:50.665544 Raw Buffer output 0 00000511
537 13:42:50.668935 Raw Buffer output 1 00000000
538 13:42:50.672933 pmc_send_ipc_cmd succeeded
539 13:42:50.679274 port C1 DISC req: usage 1 usb3 2 usb2 3
540 13:42:50.679369 Raw Buffer output 0 00000321
541 13:42:50.682674 Raw Buffer output 1 00000000
542 13:42:50.687301 pmc_send_ipc_cmd succeeded
543 13:42:50.691724 Detected 4 core, 8 thread CPU.
544 13:42:50.695257 Detected 4 core, 8 thread CPU.
545 13:42:50.895471 Display FSP Version Info HOB
546 13:42:50.898466 Reference Code - CPU = a.0.4c.31
547 13:42:50.902088 uCode Version = 0.0.0.86
548 13:42:50.905251 TXT ACM version = ff.ff.ff.ffff
549 13:42:50.908630 Reference Code - ME = a.0.4c.31
550 13:42:50.911814 MEBx version = 0.0.0.0
551 13:42:50.915278 ME Firmware Version = Consumer SKU
552 13:42:50.918713 Reference Code - PCH = a.0.4c.31
553 13:42:50.921954 PCH-CRID Status = Disabled
554 13:42:50.925345 PCH-CRID Original Value = ff.ff.ff.ffff
555 13:42:50.928544 PCH-CRID New Value = ff.ff.ff.ffff
556 13:42:50.931712 OPROM - RST - RAID = ff.ff.ff.ffff
557 13:42:50.935331 PCH Hsio Version = 4.0.0.0
558 13:42:50.938545 Reference Code - SA - System Agent = a.0.4c.31
559 13:42:50.942367 Reference Code - MRC = 2.0.0.1
560 13:42:50.944979 SA - PCIe Version = a.0.4c.31
561 13:42:50.948334 SA-CRID Status = Disabled
562 13:42:50.952033 SA-CRID Original Value = 0.0.0.1
563 13:42:50.955106 SA-CRID New Value = 0.0.0.1
564 13:42:50.958372 OPROM - VBIOS = ff.ff.ff.ffff
565 13:42:50.961482 IO Manageability Engine FW Version = 11.1.4.0
566 13:42:50.964877 PHY Build Version = 0.0.0.e0
567 13:42:50.968592 Thunderbolt(TM) FW Version = 0.0.0.0
568 13:42:50.975372 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 13:42:50.980018 ITSS IRQ Polarities Before:
570 13:42:50.980150 IPC0: 0xffffffff
571 13:42:50.980259 IPC1: 0xffffffff
572 13:42:50.983078 IPC2: 0xffffffff
573 13:42:50.983201 IPC3: 0xffffffff
574 13:42:50.986261 ITSS IRQ Polarities After:
575 13:42:50.989466 IPC0: 0xffffffff
576 13:42:50.989590 IPC1: 0xffffffff
577 13:42:50.992752 IPC2: 0xffffffff
578 13:42:50.992882 IPC3: 0xffffffff
579 13:42:50.999497 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 13:42:51.009674 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 13:42:51.022880 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 13:42:51.035989 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 13:42:51.039103 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
584 13:42:51.042673 Enumerating buses...
585 13:42:51.045569 Show all devs... Before device enumeration.
586 13:42:51.049296 Root Device: enabled 1
587 13:42:51.052546 DOMAIN: 0000: enabled 1
588 13:42:51.055577 CPU_CLUSTER: 0: enabled 1
589 13:42:51.055705 PCI: 00:00.0: enabled 1
590 13:42:51.059112 PCI: 00:02.0: enabled 1
591 13:42:51.062376 PCI: 00:04.0: enabled 1
592 13:42:51.065522 PCI: 00:05.0: enabled 1
593 13:42:51.065653 PCI: 00:06.0: enabled 0
594 13:42:51.068999 PCI: 00:07.0: enabled 0
595 13:42:51.072174 PCI: 00:07.1: enabled 0
596 13:42:51.075998 PCI: 00:07.2: enabled 0
597 13:42:51.076154 PCI: 00:07.3: enabled 0
598 13:42:51.079139 PCI: 00:08.0: enabled 1
599 13:42:51.082025 PCI: 00:09.0: enabled 0
600 13:42:51.085434 PCI: 00:0a.0: enabled 0
601 13:42:51.085603 PCI: 00:0d.0: enabled 1
602 13:42:51.088992 PCI: 00:0d.1: enabled 0
603 13:42:51.092107 PCI: 00:0d.2: enabled 0
604 13:42:51.092261 PCI: 00:0d.3: enabled 0
605 13:42:51.095998 PCI: 00:0e.0: enabled 0
606 13:42:51.099143 PCI: 00:10.2: enabled 1
607 13:42:51.102261 PCI: 00:10.6: enabled 0
608 13:42:51.102423 PCI: 00:10.7: enabled 0
609 13:42:51.105617 PCI: 00:12.0: enabled 0
610 13:42:51.109221 PCI: 00:12.6: enabled 0
611 13:42:51.112223 PCI: 00:13.0: enabled 0
612 13:42:51.112367 PCI: 00:14.0: enabled 1
613 13:42:51.115467 PCI: 00:14.1: enabled 0
614 13:42:51.118656 PCI: 00:14.2: enabled 1
615 13:42:51.122356 PCI: 00:14.3: enabled 1
616 13:42:51.122480 PCI: 00:15.0: enabled 1
617 13:42:51.125496 PCI: 00:15.1: enabled 1
618 13:42:51.128634 PCI: 00:15.2: enabled 1
619 13:42:51.128759 PCI: 00:15.3: enabled 1
620 13:42:51.132125 PCI: 00:16.0: enabled 1
621 13:42:51.135298 PCI: 00:16.1: enabled 0
622 13:42:51.138855 PCI: 00:16.2: enabled 0
623 13:42:51.138983 PCI: 00:16.3: enabled 0
624 13:42:51.142086 PCI: 00:16.4: enabled 0
625 13:42:51.145126 PCI: 00:16.5: enabled 0
626 13:42:51.148876 PCI: 00:17.0: enabled 1
627 13:42:51.149003 PCI: 00:19.0: enabled 0
628 13:42:51.152129 PCI: 00:19.1: enabled 1
629 13:42:51.155281 PCI: 00:19.2: enabled 0
630 13:42:51.159167 PCI: 00:1c.0: enabled 1
631 13:42:51.159293 PCI: 00:1c.1: enabled 0
632 13:42:51.162093 PCI: 00:1c.2: enabled 0
633 13:42:51.165500 PCI: 00:1c.3: enabled 0
634 13:42:51.169039 PCI: 00:1c.4: enabled 0
635 13:42:51.169164 PCI: 00:1c.5: enabled 0
636 13:42:51.172014 PCI: 00:1c.6: enabled 1
637 13:42:51.175139 PCI: 00:1c.7: enabled 0
638 13:42:51.175263 PCI: 00:1d.0: enabled 1
639 13:42:51.178816 PCI: 00:1d.1: enabled 0
640 13:42:51.182072 PCI: 00:1d.2: enabled 1
641 13:42:51.185119 PCI: 00:1d.3: enabled 0
642 13:42:51.185246 PCI: 00:1e.0: enabled 1
643 13:42:51.188310 PCI: 00:1e.1: enabled 0
644 13:42:51.191588 PCI: 00:1e.2: enabled 1
645 13:42:51.195236 PCI: 00:1e.3: enabled 1
646 13:42:51.195357 PCI: 00:1f.0: enabled 1
647 13:42:51.198779 PCI: 00:1f.1: enabled 0
648 13:42:51.201984 PCI: 00:1f.2: enabled 1
649 13:42:51.204947 PCI: 00:1f.3: enabled 1
650 13:42:51.205077 PCI: 00:1f.4: enabled 0
651 13:42:51.208501 PCI: 00:1f.5: enabled 1
652 13:42:51.211861 PCI: 00:1f.6: enabled 0
653 13:42:51.211985 PCI: 00:1f.7: enabled 0
654 13:42:51.215180 APIC: 00: enabled 1
655 13:42:51.218721 GENERIC: 0.0: enabled 1
656 13:42:51.221798 GENERIC: 0.0: enabled 1
657 13:42:51.221925 GENERIC: 1.0: enabled 1
658 13:42:51.224909 GENERIC: 0.0: enabled 1
659 13:42:51.228164 GENERIC: 1.0: enabled 1
660 13:42:51.228286 USB0 port 0: enabled 1
661 13:42:51.231490 GENERIC: 0.0: enabled 1
662 13:42:51.235108 USB0 port 0: enabled 1
663 13:42:51.238614 GENERIC: 0.0: enabled 1
664 13:42:51.238735 I2C: 00:1a: enabled 1
665 13:42:51.241393 I2C: 00:31: enabled 1
666 13:42:51.244742 I2C: 00:32: enabled 1
667 13:42:51.244877 I2C: 00:10: enabled 1
668 13:42:51.248381 I2C: 00:15: enabled 1
669 13:42:51.251676 GENERIC: 0.0: enabled 0
670 13:42:51.255252 GENERIC: 1.0: enabled 0
671 13:42:51.255377 GENERIC: 0.0: enabled 1
672 13:42:51.258355 SPI: 00: enabled 1
673 13:42:51.258479 SPI: 00: enabled 1
674 13:42:51.261582 PNP: 0c09.0: enabled 1
675 13:42:51.264953 GENERIC: 0.0: enabled 1
676 13:42:51.268153 USB3 port 0: enabled 1
677 13:42:51.268277 USB3 port 1: enabled 1
678 13:42:51.271385 USB3 port 2: enabled 0
679 13:42:51.274902 USB3 port 3: enabled 0
680 13:42:51.275030 USB2 port 0: enabled 0
681 13:42:51.278160 USB2 port 1: enabled 1
682 13:42:51.281753 USB2 port 2: enabled 1
683 13:42:51.285121 USB2 port 3: enabled 0
684 13:42:51.285249 USB2 port 4: enabled 1
685 13:42:51.288007 USB2 port 5: enabled 0
686 13:42:51.291950 USB2 port 6: enabled 0
687 13:42:51.292078 USB2 port 7: enabled 0
688 13:42:51.294651 USB2 port 8: enabled 0
689 13:42:51.297970 USB2 port 9: enabled 0
690 13:42:51.298097 USB3 port 0: enabled 0
691 13:42:51.301162 USB3 port 1: enabled 1
692 13:42:51.304751 USB3 port 2: enabled 0
693 13:42:51.308077 USB3 port 3: enabled 0
694 13:42:51.308201 GENERIC: 0.0: enabled 1
695 13:42:51.311217 GENERIC: 1.0: enabled 1
696 13:42:51.314631 APIC: 01: enabled 1
697 13:42:51.314757 APIC: 05: enabled 1
698 13:42:51.318294 APIC: 03: enabled 1
699 13:42:51.321317 APIC: 07: enabled 1
700 13:42:51.321445 APIC: 06: enabled 1
701 13:42:51.324527 APIC: 04: enabled 1
702 13:42:51.324652 APIC: 02: enabled 1
703 13:42:51.328083 Compare with tree...
704 13:42:51.331152 Root Device: enabled 1
705 13:42:51.331275 DOMAIN: 0000: enabled 1
706 13:42:51.334682 PCI: 00:00.0: enabled 1
707 13:42:51.337969 PCI: 00:02.0: enabled 1
708 13:42:51.341095 PCI: 00:04.0: enabled 1
709 13:42:51.344684 GENERIC: 0.0: enabled 1
710 13:42:51.344767 PCI: 00:05.0: enabled 1
711 13:42:51.348049 PCI: 00:06.0: enabled 0
712 13:42:51.351257 PCI: 00:07.0: enabled 0
713 13:42:51.354667 GENERIC: 0.0: enabled 1
714 13:42:51.358011 PCI: 00:07.1: enabled 0
715 13:42:51.361318 GENERIC: 1.0: enabled 1
716 13:42:51.361414 PCI: 00:07.2: enabled 0
717 13:42:51.364563 GENERIC: 0.0: enabled 1
718 13:42:51.367740 PCI: 00:07.3: enabled 0
719 13:42:51.371367 GENERIC: 1.0: enabled 1
720 13:42:51.374520 PCI: 00:08.0: enabled 1
721 13:42:51.374617 PCI: 00:09.0: enabled 0
722 13:42:51.377552 PCI: 00:0a.0: enabled 0
723 13:42:51.381088 PCI: 00:0d.0: enabled 1
724 13:42:51.384804 USB0 port 0: enabled 1
725 13:42:51.387931 USB3 port 0: enabled 1
726 13:42:51.388048 USB3 port 1: enabled 1
727 13:42:51.391040 USB3 port 2: enabled 0
728 13:42:51.394229 USB3 port 3: enabled 0
729 13:42:51.397776 PCI: 00:0d.1: enabled 0
730 13:42:51.400741 PCI: 00:0d.2: enabled 0
731 13:42:51.400876 GENERIC: 0.0: enabled 1
732 13:42:51.404523 PCI: 00:0d.3: enabled 0
733 13:42:51.407548 PCI: 00:0e.0: enabled 0
734 13:42:51.410751 PCI: 00:10.2: enabled 1
735 13:42:51.414346 PCI: 00:10.6: enabled 0
736 13:42:51.414492 PCI: 00:10.7: enabled 0
737 13:42:51.417801 PCI: 00:12.0: enabled 0
738 13:42:51.420978 PCI: 00:12.6: enabled 0
739 13:42:51.424437 PCI: 00:13.0: enabled 0
740 13:42:51.427745 PCI: 00:14.0: enabled 1
741 13:42:51.427895 USB0 port 0: enabled 1
742 13:42:51.430767 USB2 port 0: enabled 0
743 13:42:51.434221 USB2 port 1: enabled 1
744 13:42:51.437552 USB2 port 2: enabled 1
745 13:42:51.440761 USB2 port 3: enabled 0
746 13:42:51.440895 USB2 port 4: enabled 1
747 13:42:51.444370 USB2 port 5: enabled 0
748 13:42:51.447344 USB2 port 6: enabled 0
749 13:42:51.451059 USB2 port 7: enabled 0
750 13:42:51.453958 USB2 port 8: enabled 0
751 13:42:51.457661 USB2 port 9: enabled 0
752 13:42:51.457787 USB3 port 0: enabled 0
753 13:42:51.461071 USB3 port 1: enabled 1
754 13:42:51.463928 USB3 port 2: enabled 0
755 13:42:51.467836 USB3 port 3: enabled 0
756 13:42:51.470647 PCI: 00:14.1: enabled 0
757 13:42:51.470771 PCI: 00:14.2: enabled 1
758 13:42:51.474140 PCI: 00:14.3: enabled 1
759 13:42:51.477351 GENERIC: 0.0: enabled 1
760 13:42:51.480459 PCI: 00:15.0: enabled 1
761 13:42:51.483964 I2C: 00:1a: enabled 1
762 13:42:51.484111 I2C: 00:31: enabled 1
763 13:42:51.487106 I2C: 00:32: enabled 1
764 13:42:51.490530 PCI: 00:15.1: enabled 1
765 13:42:51.494056 I2C: 00:10: enabled 1
766 13:42:51.497256 PCI: 00:15.2: enabled 1
767 13:42:51.497399 PCI: 00:15.3: enabled 1
768 13:42:51.500407 PCI: 00:16.0: enabled 1
769 13:42:51.503900 PCI: 00:16.1: enabled 0
770 13:42:51.507270 PCI: 00:16.2: enabled 0
771 13:42:51.510282 PCI: 00:16.3: enabled 0
772 13:42:51.510378 PCI: 00:16.4: enabled 0
773 13:42:51.513968 PCI: 00:16.5: enabled 0
774 13:42:51.517171 PCI: 00:17.0: enabled 1
775 13:42:51.520234 PCI: 00:19.0: enabled 0
776 13:42:51.523507 PCI: 00:19.1: enabled 1
777 13:42:51.523650 I2C: 00:15: enabled 1
778 13:42:51.526874 PCI: 00:19.2: enabled 0
779 13:42:51.530274 PCI: 00:1d.0: enabled 1
780 13:42:51.533568 GENERIC: 0.0: enabled 1
781 13:42:51.536703 PCI: 00:1e.0: enabled 1
782 13:42:51.536850 PCI: 00:1e.1: enabled 0
783 13:42:51.540120 PCI: 00:1e.2: enabled 1
784 13:42:51.543777 SPI: 00: enabled 1
785 13:42:51.546866 PCI: 00:1e.3: enabled 1
786 13:42:51.547010 SPI: 00: enabled 1
787 13:42:51.549987 PCI: 00:1f.0: enabled 1
788 13:42:51.553245 PNP: 0c09.0: enabled 1
789 13:42:51.556645 PCI: 00:1f.1: enabled 0
790 13:42:51.556792 PCI: 00:1f.2: enabled 1
791 13:42:51.559848 GENERIC: 0.0: enabled 1
792 13:42:51.563084 GENERIC: 0.0: enabled 1
793 13:42:51.566503 GENERIC: 1.0: enabled 1
794 13:42:51.569861 PCI: 00:1f.3: enabled 1
795 13:42:51.573363 PCI: 00:1f.4: enabled 0
796 13:42:51.573507 PCI: 00:1f.5: enabled 1
797 13:42:51.576460 PCI: 00:1f.6: enabled 0
798 13:42:51.579809 PCI: 00:1f.7: enabled 0
799 13:42:51.583245 CPU_CLUSTER: 0: enabled 1
800 13:42:51.586413 APIC: 00: enabled 1
801 13:42:51.586509 APIC: 01: enabled 1
802 13:42:51.589812 APIC: 05: enabled 1
803 13:42:51.635380 APIC: 03: enabled 1
804 13:42:51.635575 APIC: 07: enabled 1
805 13:42:51.635709 APIC: 06: enabled 1
806 13:42:51.636059 APIC: 04: enabled 1
807 13:42:51.636188 APIC: 02: enabled 1
808 13:42:51.636309 Root Device scanning...
809 13:42:51.636435 scan_static_bus for Root Device
810 13:42:51.636556 DOMAIN: 0000 enabled
811 13:42:51.636677 CPU_CLUSTER: 0 enabled
812 13:42:51.636808 DOMAIN: 0000 scanning...
813 13:42:51.636948 PCI: pci_scan_bus for bus 00
814 13:42:51.637084 PCI: 00:00.0 [8086/0000] ops
815 13:42:51.637202 PCI: 00:00.0 [8086/9a12] enabled
816 13:42:51.637325 PCI: 00:02.0 [8086/0000] bus ops
817 13:42:51.637462 PCI: 00:02.0 [8086/9a40] enabled
818 13:42:51.637585 PCI: 00:04.0 [8086/0000] bus ops
819 13:42:51.639432 PCI: 00:04.0 [8086/9a03] enabled
820 13:42:51.639567 PCI: 00:05.0 [8086/9a19] enabled
821 13:42:51.643612 PCI: 00:07.0 [0000/0000] hidden
822 13:42:51.647242 PCI: 00:08.0 [8086/9a11] enabled
823 13:42:51.650506 PCI: 00:0a.0 [8086/9a0d] disabled
824 13:42:51.653678 PCI: 00:0d.0 [8086/0000] bus ops
825 13:42:51.657292 PCI: 00:0d.0 [8086/9a13] enabled
826 13:42:51.660481 PCI: 00:14.0 [8086/0000] bus ops
827 13:42:51.663846 PCI: 00:14.0 [8086/a0ed] enabled
828 13:42:51.667287 PCI: 00:14.2 [8086/a0ef] enabled
829 13:42:51.670645 PCI: 00:14.3 [8086/0000] bus ops
830 13:42:51.674467 PCI: 00:14.3 [8086/a0f0] enabled
831 13:42:51.677086 PCI: 00:15.0 [8086/0000] bus ops
832 13:42:51.680265 PCI: 00:15.0 [8086/a0e8] enabled
833 13:42:51.683923 PCI: 00:15.1 [8086/0000] bus ops
834 13:42:51.687328 PCI: 00:15.1 [8086/a0e9] enabled
835 13:42:51.690199 PCI: 00:15.2 [8086/0000] bus ops
836 13:42:51.693799 PCI: 00:15.2 [8086/a0ea] enabled
837 13:42:51.696985 PCI: 00:15.3 [8086/0000] bus ops
838 13:42:51.700682 PCI: 00:15.3 [8086/a0eb] enabled
839 13:42:51.703621 PCI: 00:16.0 [8086/0000] ops
840 13:42:51.706969 PCI: 00:16.0 [8086/a0e0] enabled
841 13:42:51.713614 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 13:42:51.717246 PCI: 00:19.0 [8086/0000] bus ops
843 13:42:51.720461 PCI: 00:19.0 [8086/a0c5] disabled
844 13:42:51.723543 PCI: 00:19.1 [8086/0000] bus ops
845 13:42:51.726877 PCI: 00:19.1 [8086/a0c6] enabled
846 13:42:51.730371 PCI: 00:1d.0 [8086/0000] bus ops
847 13:42:51.733979 PCI: 00:1d.0 [8086/a0b0] enabled
848 13:42:51.737184 PCI: 00:1e.0 [8086/0000] ops
849 13:42:51.740846 PCI: 00:1e.0 [8086/a0a8] enabled
850 13:42:51.743835 PCI: 00:1e.2 [8086/0000] bus ops
851 13:42:51.747216 PCI: 00:1e.2 [8086/a0aa] enabled
852 13:42:51.750133 PCI: 00:1e.3 [8086/0000] bus ops
853 13:42:51.753740 PCI: 00:1e.3 [8086/a0ab] enabled
854 13:42:51.756942 PCI: 00:1f.0 [8086/0000] bus ops
855 13:42:51.760500 PCI: 00:1f.0 [8086/a087] enabled
856 13:42:51.760639 RTC Init
857 13:42:51.764109 Set power on after power failure.
858 13:42:51.766965 Disabling Deep S3
859 13:42:51.767103 Disabling Deep S3
860 13:42:51.770312 Disabling Deep S4
861 13:42:51.770455 Disabling Deep S4
862 13:42:51.773422 Disabling Deep S5
863 13:42:51.773565 Disabling Deep S5
864 13:42:51.776879 PCI: 00:1f.2 [0000/0000] hidden
865 13:42:51.780084 PCI: 00:1f.3 [8086/0000] bus ops
866 13:42:51.783454 PCI: 00:1f.3 [8086/a0c8] enabled
867 13:42:51.787152 PCI: 00:1f.5 [8086/0000] bus ops
868 13:42:51.790321 PCI: 00:1f.5 [8086/a0a4] enabled
869 13:42:51.793442 PCI: Leftover static devices:
870 13:42:51.796649 PCI: 00:10.2
871 13:42:51.796796 PCI: 00:10.6
872 13:42:51.800202 PCI: 00:10.7
873 13:42:51.800342 PCI: 00:06.0
874 13:42:51.800470 PCI: 00:07.1
875 13:42:51.803333 PCI: 00:07.2
876 13:42:51.803461 PCI: 00:07.3
877 13:42:51.806909 PCI: 00:09.0
878 13:42:51.807041 PCI: 00:0d.1
879 13:42:51.810171 PCI: 00:0d.2
880 13:42:51.810298 PCI: 00:0d.3
881 13:42:51.810408 PCI: 00:0e.0
882 13:42:51.813323 PCI: 00:12.0
883 13:42:51.813446 PCI: 00:12.6
884 13:42:51.816873 PCI: 00:13.0
885 13:42:51.816999 PCI: 00:14.1
886 13:42:51.817112 PCI: 00:16.1
887 13:42:51.820013 PCI: 00:16.2
888 13:42:51.820138 PCI: 00:16.3
889 13:42:51.823648 PCI: 00:16.4
890 13:42:51.823771 PCI: 00:16.5
891 13:42:51.823881 PCI: 00:17.0
892 13:42:51.826506 PCI: 00:19.2
893 13:42:51.826628 PCI: 00:1e.1
894 13:42:51.830124 PCI: 00:1f.1
895 13:42:51.830249 PCI: 00:1f.4
896 13:42:51.833281 PCI: 00:1f.6
897 13:42:51.833406 PCI: 00:1f.7
898 13:42:51.837033 PCI: Check your devicetree.cb.
899 13:42:51.839954 PCI: 00:02.0 scanning...
900 13:42:51.843612 scan_generic_bus for PCI: 00:02.0
901 13:42:51.846650 scan_generic_bus for PCI: 00:02.0 done
902 13:42:51.850195 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 13:42:51.853376 PCI: 00:04.0 scanning...
904 13:42:51.856401 scan_generic_bus for PCI: 00:04.0
905 13:42:51.860132 GENERIC: 0.0 enabled
906 13:42:51.866798 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 13:42:51.869846 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 13:42:51.872989 PCI: 00:0d.0 scanning...
909 13:42:51.876660 scan_static_bus for PCI: 00:0d.0
910 13:42:51.879974 USB0 port 0 enabled
911 13:42:51.880104 USB0 port 0 scanning...
912 13:42:51.883057 scan_static_bus for USB0 port 0
913 13:42:51.886528 USB3 port 0 enabled
914 13:42:51.889814 USB3 port 1 enabled
915 13:42:51.889938 USB3 port 2 disabled
916 13:42:51.893321 USB3 port 3 disabled
917 13:42:51.896432 USB3 port 0 scanning...
918 13:42:51.899929 scan_static_bus for USB3 port 0
919 13:42:51.903122 scan_static_bus for USB3 port 0 done
920 13:42:51.906225 scan_bus: bus USB3 port 0 finished in 6 msecs
921 13:42:51.910107 USB3 port 1 scanning...
922 13:42:51.913315 scan_static_bus for USB3 port 1
923 13:42:51.916470 scan_static_bus for USB3 port 1 done
924 13:42:51.919550 scan_bus: bus USB3 port 1 finished in 6 msecs
925 13:42:51.923260 scan_static_bus for USB0 port 0 done
926 13:42:51.929537 scan_bus: bus USB0 port 0 finished in 43 msecs
927 13:42:51.932867 scan_static_bus for PCI: 00:0d.0 done
928 13:42:51.936549 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 13:42:51.939905 PCI: 00:14.0 scanning...
930 13:42:51.943104 scan_static_bus for PCI: 00:14.0
931 13:42:51.946235 USB0 port 0 enabled
932 13:42:51.949944 USB0 port 0 scanning...
933 13:42:51.953148 scan_static_bus for USB0 port 0
934 13:42:51.953270 USB2 port 0 disabled
935 13:42:51.956625 USB2 port 1 enabled
936 13:42:51.959725 USB2 port 2 enabled
937 13:42:51.959846 USB2 port 3 disabled
938 13:42:51.963177 USB2 port 4 enabled
939 13:42:51.963302 USB2 port 5 disabled
940 13:42:51.966440 USB2 port 6 disabled
941 13:42:51.969386 USB2 port 7 disabled
942 13:42:51.969507 USB2 port 8 disabled
943 13:42:51.973130 USB2 port 9 disabled
944 13:42:51.976521 USB3 port 0 disabled
945 13:42:51.976647 USB3 port 1 enabled
946 13:42:51.979453 USB3 port 2 disabled
947 13:42:51.983076 USB3 port 3 disabled
948 13:42:51.983200 USB2 port 1 scanning...
949 13:42:51.986404 scan_static_bus for USB2 port 1
950 13:42:51.993002 scan_static_bus for USB2 port 1 done
951 13:42:51.996338 scan_bus: bus USB2 port 1 finished in 6 msecs
952 13:42:51.999626 USB2 port 2 scanning...
953 13:42:52.002908 scan_static_bus for USB2 port 2
954 13:42:52.006078 scan_static_bus for USB2 port 2 done
955 13:42:52.009258 scan_bus: bus USB2 port 2 finished in 6 msecs
956 13:42:52.013026 USB2 port 4 scanning...
957 13:42:52.016469 scan_static_bus for USB2 port 4
958 13:42:52.019245 scan_static_bus for USB2 port 4 done
959 13:42:52.022995 scan_bus: bus USB2 port 4 finished in 6 msecs
960 13:42:52.025857 USB3 port 1 scanning...
961 13:42:52.029401 scan_static_bus for USB3 port 1
962 13:42:52.032646 scan_static_bus for USB3 port 1 done
963 13:42:52.039475 scan_bus: bus USB3 port 1 finished in 6 msecs
964 13:42:52.042502 scan_static_bus for USB0 port 0 done
965 13:42:52.046138 scan_bus: bus USB0 port 0 finished in 93 msecs
966 13:42:52.049402 scan_static_bus for PCI: 00:14.0 done
967 13:42:52.055797 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
968 13:42:52.059457 PCI: 00:14.3 scanning...
969 13:42:52.062852 scan_static_bus for PCI: 00:14.3
970 13:42:52.062947 GENERIC: 0.0 enabled
971 13:42:52.069064 scan_static_bus for PCI: 00:14.3 done
972 13:42:52.072625 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 13:42:52.075602 PCI: 00:15.0 scanning...
974 13:42:52.079266 scan_static_bus for PCI: 00:15.0
975 13:42:52.079386 I2C: 00:1a enabled
976 13:42:52.082456 I2C: 00:31 enabled
977 13:42:52.085786 I2C: 00:32 enabled
978 13:42:52.089343 scan_static_bus for PCI: 00:15.0 done
979 13:42:52.092425 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 13:42:52.095624 PCI: 00:15.1 scanning...
981 13:42:52.099385 scan_static_bus for PCI: 00:15.1
982 13:42:52.102358 I2C: 00:10 enabled
983 13:42:52.105598 scan_static_bus for PCI: 00:15.1 done
984 13:42:52.108836 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 13:42:52.112442 PCI: 00:15.2 scanning...
986 13:42:52.115588 scan_static_bus for PCI: 00:15.2
987 13:42:52.119027 scan_static_bus for PCI: 00:15.2 done
988 13:42:52.122316 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 13:42:52.125883 PCI: 00:15.3 scanning...
990 13:42:52.128837 scan_static_bus for PCI: 00:15.3
991 13:42:52.132005 scan_static_bus for PCI: 00:15.3 done
992 13:42:52.138889 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 13:42:52.142241 PCI: 00:19.1 scanning...
994 13:42:52.145707 scan_static_bus for PCI: 00:19.1
995 13:42:52.145802 I2C: 00:15 enabled
996 13:42:52.149179 scan_static_bus for PCI: 00:19.1 done
997 13:42:52.155690 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 13:42:52.159143 PCI: 00:1d.0 scanning...
999 13:42:52.162304 do_pci_scan_bridge for PCI: 00:1d.0
1000 13:42:52.165514 PCI: pci_scan_bus for bus 01
1001 13:42:52.169131 PCI: 01:00.0 [15b7/5009] enabled
1002 13:42:52.169227 GENERIC: 0.0 enabled
1003 13:42:52.172374 Enabling Common Clock Configuration
1004 13:42:52.179074 L1 Sub-State supported from root port 29
1005 13:42:52.182547 L1 Sub-State Support = 0x5
1006 13:42:52.182644 CommonModeRestoreTime = 0x28
1007 13:42:52.188936 Power On Value = 0x16, Power On Scale = 0x0
1008 13:42:52.189035 ASPM: Enabled L1
1009 13:42:52.191999 PCIe: Max_Payload_Size adjusted to 128
1010 13:42:52.198959 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 13:42:52.202128 PCI: 00:1e.2 scanning...
1012 13:42:52.205841 scan_generic_bus for PCI: 00:1e.2
1013 13:42:52.205984 SPI: 00 enabled
1014 13:42:52.212414 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 13:42:52.218625 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 13:42:52.218766 PCI: 00:1e.3 scanning...
1017 13:42:52.223102 scan_generic_bus for PCI: 00:1e.3
1018 13:42:52.226135 SPI: 00 enabled
1019 13:42:52.229740 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 13:42:52.236550 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 13:42:52.239697 PCI: 00:1f.0 scanning...
1022 13:42:52.242666 scan_static_bus for PCI: 00:1f.0
1023 13:42:52.242808 PNP: 0c09.0 enabled
1024 13:42:52.246227 PNP: 0c09.0 scanning...
1025 13:42:52.249755 scan_static_bus for PNP: 0c09.0
1026 13:42:52.253132 scan_static_bus for PNP: 0c09.0 done
1027 13:42:52.259536 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 13:42:52.263247 scan_static_bus for PCI: 00:1f.0 done
1029 13:42:52.266507 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 13:42:52.269527 PCI: 00:1f.2 scanning...
1031 13:42:52.272709 scan_static_bus for PCI: 00:1f.2
1032 13:42:52.275978 GENERIC: 0.0 enabled
1033 13:42:52.276090 GENERIC: 0.0 scanning...
1034 13:42:52.279473 scan_static_bus for GENERIC: 0.0
1035 13:42:52.282955 GENERIC: 0.0 enabled
1036 13:42:52.286148 GENERIC: 1.0 enabled
1037 13:42:52.289574 scan_static_bus for GENERIC: 0.0 done
1038 13:42:52.293086 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 13:42:52.299291 scan_static_bus for PCI: 00:1f.2 done
1040 13:42:52.302648 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 13:42:52.306141 PCI: 00:1f.3 scanning...
1042 13:42:52.309208 scan_static_bus for PCI: 00:1f.3
1043 13:42:52.312548 scan_static_bus for PCI: 00:1f.3 done
1044 13:42:52.316221 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 13:42:52.319295 PCI: 00:1f.5 scanning...
1046 13:42:52.323029 scan_generic_bus for PCI: 00:1f.5
1047 13:42:52.326292 scan_generic_bus for PCI: 00:1f.5 done
1048 13:42:52.332626 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 13:42:52.335972 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1050 13:42:52.339448 scan_static_bus for Root Device done
1051 13:42:52.346008 scan_bus: bus Root Device finished in 735 msecs
1052 13:42:52.346101 done
1053 13:42:52.352691 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1054 13:42:52.356133 Chrome EC: UHEPI supported
1055 13:42:52.362635 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 13:42:52.369435 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 13:42:52.372652 SPI flash protection: WPSW=0 SRP0=1
1058 13:42:52.375793 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 13:42:52.382894 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 13:42:52.385828 found VGA at PCI: 00:02.0
1061 13:42:52.388897 Setting up VGA for PCI: 00:02.0
1062 13:42:52.392680 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 13:42:52.399287 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 13:42:52.399385 Allocating resources...
1065 13:42:52.402235 Reading resources...
1066 13:42:52.406114 Root Device read_resources bus 0 link: 0
1067 13:42:52.412466 DOMAIN: 0000 read_resources bus 0 link: 0
1068 13:42:52.415656 PCI: 00:04.0 read_resources bus 1 link: 0
1069 13:42:52.422520 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 13:42:52.425614 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 13:42:52.429157 USB0 port 0 read_resources bus 0 link: 0
1072 13:42:52.436584 USB0 port 0 read_resources bus 0 link: 0 done
1073 13:42:52.439655 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 13:42:52.446461 PCI: 00:14.0 read_resources bus 0 link: 0
1075 13:42:52.449730 USB0 port 0 read_resources bus 0 link: 0
1076 13:42:52.456595 USB0 port 0 read_resources bus 0 link: 0 done
1077 13:42:52.459567 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 13:42:52.466696 PCI: 00:14.3 read_resources bus 0 link: 0
1079 13:42:52.469520 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 13:42:52.476395 PCI: 00:15.0 read_resources bus 0 link: 0
1081 13:42:52.479607 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 13:42:52.486580 PCI: 00:15.1 read_resources bus 0 link: 0
1083 13:42:52.489497 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 13:42:52.496194 PCI: 00:19.1 read_resources bus 0 link: 0
1085 13:42:52.500114 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 13:42:52.506547 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 13:42:52.509525 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 13:42:52.516415 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 13:42:52.519615 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 13:42:52.526655 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 13:42:52.529657 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 13:42:52.536284 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 13:42:52.539518 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 13:42:52.542716 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 13:42:52.549468 GENERIC: 0.0 read_resources bus 0 link: 0
1096 13:42:52.552944 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 13:42:52.559640 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 13:42:52.566028 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 13:42:52.569706 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 13:42:52.576010 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 13:42:52.579316 Root Device read_resources bus 0 link: 0 done
1102 13:42:52.582930 Done reading resources.
1103 13:42:52.585632 Show resources in subtree (Root Device)...After reading.
1104 13:42:52.592352 Root Device child on link 0 DOMAIN: 0000
1105 13:42:52.596047 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 13:42:52.605533 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 13:42:52.615619 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 13:42:52.615719 PCI: 00:00.0
1109 13:42:52.625513 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 13:42:52.635219 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 13:42:52.645511 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 13:42:52.655408 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 13:42:52.665206 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 13:42:52.672075 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 13:42:52.681637 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 13:42:52.691481 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 13:42:52.701424 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 13:42:52.711520 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 13:42:52.721588 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 13:42:52.728127 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 13:42:52.738179 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 13:42:52.747809 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 13:42:52.757704 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 13:42:52.768089 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 13:42:52.777555 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 13:42:52.787390 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 13:42:52.794324 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 13:42:52.804025 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 13:42:52.807268 PCI: 00:02.0
1130 13:42:52.817628 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 13:42:52.826825 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 13:42:52.837274 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 13:42:52.840719 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 13:42:52.850396 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 13:42:52.853661 GENERIC: 0.0
1136 13:42:52.853753 PCI: 00:05.0
1137 13:42:52.863330 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 13:42:52.870186 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 13:42:52.870325 GENERIC: 0.0
1140 13:42:52.873418 PCI: 00:08.0
1141 13:42:52.883369 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 13:42:52.883469 PCI: 00:0a.0
1143 13:42:52.887034 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 13:42:52.896729 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 13:42:52.903234 USB0 port 0 child on link 0 USB3 port 0
1146 13:42:52.903328 USB3 port 0
1147 13:42:52.907050 USB3 port 1
1148 13:42:52.907141 USB3 port 2
1149 13:42:52.909958 USB3 port 3
1150 13:42:52.913163 PCI: 00:14.0 child on link 0 USB0 port 0
1151 13:42:52.923154 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 13:42:52.929820 USB0 port 0 child on link 0 USB2 port 0
1153 13:42:52.929918 USB2 port 0
1154 13:42:52.933457 USB2 port 1
1155 13:42:52.933578 USB2 port 2
1156 13:42:52.936339 USB2 port 3
1157 13:42:52.936433 USB2 port 4
1158 13:42:52.939887 USB2 port 5
1159 13:42:52.939982 USB2 port 6
1160 13:42:52.943115 USB2 port 7
1161 13:42:52.943208 USB2 port 8
1162 13:42:52.946282 USB2 port 9
1163 13:42:52.946379 USB3 port 0
1164 13:42:52.950106 USB3 port 1
1165 13:42:52.950207 USB3 port 2
1166 13:42:52.953273 USB3 port 3
1167 13:42:52.953367 PCI: 00:14.2
1168 13:42:52.963157 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 13:42:52.972927 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 13:42:52.979796 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 13:42:52.989899 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 13:42:52.990035 GENERIC: 0.0
1173 13:42:52.996607 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 13:42:53.006236 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 13:42:53.006336 I2C: 00:1a
1176 13:42:53.009704 I2C: 00:31
1177 13:42:53.009850 I2C: 00:32
1178 13:42:53.012758 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 13:42:53.023045 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 13:42:53.026180 I2C: 00:10
1181 13:42:53.026319 PCI: 00:15.2
1182 13:42:53.036079 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 13:42:53.039941 PCI: 00:15.3
1184 13:42:53.049750 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 13:42:53.049906 PCI: 00:16.0
1186 13:42:53.059681 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 13:42:53.062952 PCI: 00:19.0
1188 13:42:53.066468 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 13:42:53.076070 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 13:42:53.079402 I2C: 00:15
1191 13:42:53.082643 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 13:42:53.092647 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 13:42:53.099174 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 13:42:53.109098 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 13:42:53.112342 GENERIC: 0.0
1196 13:42:53.112472 PCI: 01:00.0
1197 13:42:53.122597 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 13:42:53.132171 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1199 13:42:53.135609 PCI: 00:1e.0
1200 13:42:53.145605 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1201 13:42:53.148926 PCI: 00:1e.2 child on link 0 SPI: 00
1202 13:42:53.159135 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 13:42:53.162417 SPI: 00
1204 13:42:53.165688 PCI: 00:1e.3 child on link 0 SPI: 00
1205 13:42:53.175529 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 13:42:53.175663 SPI: 00
1207 13:42:53.181999 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1208 13:42:53.188893 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1209 13:42:53.192389 PNP: 0c09.0
1210 13:42:53.198555 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1211 13:42:53.205518 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1212 13:42:53.215456 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1213 13:42:53.221871 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1214 13:42:53.228722 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1215 13:42:53.228844 GENERIC: 0.0
1216 13:42:53.232124 GENERIC: 1.0
1217 13:42:53.232217 PCI: 00:1f.3
1218 13:42:53.242131 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 13:42:53.252036 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 13:42:53.255510 PCI: 00:1f.5
1221 13:42:53.265088 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1222 13:42:53.268612 CPU_CLUSTER: 0 child on link 0 APIC: 00
1223 13:42:53.268735 APIC: 00
1224 13:42:53.271757 APIC: 01
1225 13:42:53.271854 APIC: 05
1226 13:42:53.271928 APIC: 03
1227 13:42:53.274952 APIC: 07
1228 13:42:53.275046 APIC: 06
1229 13:42:53.278445 APIC: 04
1230 13:42:53.278543 APIC: 02
1231 13:42:53.285356 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1232 13:42:53.291765 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1233 13:42:53.298768 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1234 13:42:53.304829 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1235 13:42:53.308188 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1236 13:42:53.311685 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1237 13:42:53.318623 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1238 13:42:53.328410 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1239 13:42:53.335180 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1240 13:42:53.341431 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1241 13:42:53.348166 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1242 13:42:53.354922 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1243 13:42:53.364697 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1244 13:42:53.371238 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1245 13:42:53.374924 DOMAIN: 0000: Resource ranges:
1246 13:42:53.378184 * Base: 1000, Size: 800, Tag: 100
1247 13:42:53.381350 * Base: 1900, Size: e700, Tag: 100
1248 13:42:53.388506 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1249 13:42:53.394875 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1250 13:42:53.401287 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1251 13:42:53.407889 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1252 13:42:53.414336 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1253 13:42:53.424664 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1254 13:42:53.431303 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1255 13:42:53.437606 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1256 13:42:53.447713 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1257 13:42:53.454837 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1258 13:42:53.461063 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1259 13:42:53.467753 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1260 13:42:53.477713 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1261 13:42:53.484626 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1262 13:42:53.491010 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1263 13:42:53.500739 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1264 13:42:53.507482 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1265 13:42:53.514195 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1266 13:42:53.523557 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1267 13:42:53.530203 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1268 13:42:53.540279 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1269 13:42:53.547023 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1270 13:42:53.553634 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1271 13:42:53.560093 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1272 13:42:53.570507 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1273 13:42:53.573521 DOMAIN: 0000: Resource ranges:
1274 13:42:53.576920 * Base: 7fc00000, Size: 40400000, Tag: 200
1275 13:42:53.580206 * Base: d0000000, Size: 28000000, Tag: 200
1276 13:42:53.586854 * Base: fa000000, Size: 1000000, Tag: 200
1277 13:42:53.590113 * Base: fb001000, Size: 2fff000, Tag: 200
1278 13:42:53.593737 * Base: fe010000, Size: 2e000, Tag: 200
1279 13:42:53.600144 * Base: fe03f000, Size: d41000, Tag: 200
1280 13:42:53.603260 * Base: fed88000, Size: 8000, Tag: 200
1281 13:42:53.606550 * Base: fed93000, Size: d000, Tag: 200
1282 13:42:53.609797 * Base: feda2000, Size: 1e000, Tag: 200
1283 13:42:53.613435 * Base: fede0000, Size: 1220000, Tag: 200
1284 13:42:53.619892 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1285 13:42:53.626390 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1286 13:42:53.633230 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1287 13:42:53.639843 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1288 13:42:53.646609 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1289 13:42:53.652587 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1290 13:42:53.659432 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1291 13:42:53.666301 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1292 13:42:53.672691 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1293 13:42:53.679198 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1294 13:42:53.685730 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1295 13:42:53.692477 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1296 13:42:53.699267 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1297 13:42:53.706122 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1298 13:42:53.712389 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1299 13:42:53.718783 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1300 13:42:53.725411 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1301 13:42:53.732211 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1302 13:42:53.739238 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1303 13:42:53.745286 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1304 13:42:53.752211 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1305 13:42:53.758417 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1306 13:42:53.765241 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1307 13:42:53.772103 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1308 13:42:53.781814 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1309 13:42:53.785129 PCI: 00:1d.0: Resource ranges:
1310 13:42:53.788350 * Base: 7fc00000, Size: 100000, Tag: 200
1311 13:42:53.795085 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1312 13:42:53.801507 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1313 13:42:53.811498 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1314 13:42:53.817971 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1315 13:42:53.821579 Root Device assign_resources, bus 0 link: 0
1316 13:42:53.827901 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 13:42:53.834600 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1318 13:42:53.844722 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1319 13:42:53.851445 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1320 13:42:53.861075 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1321 13:42:53.864840 PCI: 00:04.0 assign_resources, bus 1 link: 0
1322 13:42:53.867917 PCI: 00:04.0 assign_resources, bus 1 link: 0
1323 13:42:53.877791 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1324 13:42:53.884076 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1325 13:42:53.894059 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1326 13:42:53.897703 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1327 13:42:53.904242 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1328 13:42:53.910897 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1329 13:42:53.913900 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 13:42:53.920927 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 13:42:53.927876 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1332 13:42:53.937123 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1333 13:42:53.944246 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1334 13:42:53.950296 PCI: 00:14.3 assign_resources, bus 0 link: 0
1335 13:42:53.954113 PCI: 00:14.3 assign_resources, bus 0 link: 0
1336 13:42:53.964167 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1337 13:42:53.967055 PCI: 00:15.0 assign_resources, bus 0 link: 0
1338 13:42:53.970453 PCI: 00:15.0 assign_resources, bus 0 link: 0
1339 13:42:53.980602 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1340 13:42:53.984017 PCI: 00:15.1 assign_resources, bus 0 link: 0
1341 13:42:53.990034 PCI: 00:15.1 assign_resources, bus 0 link: 0
1342 13:42:53.997182 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1343 13:42:54.006614 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1344 13:42:54.013262 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1345 13:42:54.023459 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1346 13:42:54.026685 PCI: 00:19.1 assign_resources, bus 0 link: 0
1347 13:42:54.029742 PCI: 00:19.1 assign_resources, bus 0 link: 0
1348 13:42:54.039801 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1349 13:42:54.049729 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1350 13:42:54.060247 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1351 13:42:54.063352 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 13:42:54.069832 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1353 13:42:54.079410 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1354 13:42:54.083069 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 13:42:54.093055 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1356 13:42:54.096205 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1357 13:42:54.099565 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1358 13:42:54.109669 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1359 13:42:54.112817 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1360 13:42:54.119843 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1361 13:42:54.123271 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1362 13:42:54.129715 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1363 13:42:54.132933 LPC: Trying to open IO window from 800 size 1ff
1364 13:42:54.143018 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1365 13:42:54.149667 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1366 13:42:54.156386 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1367 13:42:54.163081 DOMAIN: 0000 assign_resources, bus 0 link: 0
1368 13:42:54.166353 Root Device assign_resources, bus 0 link: 0
1369 13:42:54.169957 Done setting resources.
1370 13:42:54.176266 Show resources in subtree (Root Device)...After assigning values.
1371 13:42:54.179348 Root Device child on link 0 DOMAIN: 0000
1372 13:42:54.186322 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1373 13:42:54.192969 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1374 13:42:54.202974 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1375 13:42:54.206121 PCI: 00:00.0
1376 13:42:54.215986 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1377 13:42:54.225904 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1378 13:42:54.232593 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1379 13:42:54.242855 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1380 13:42:54.252350 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1381 13:42:54.262693 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1382 13:42:54.272367 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1383 13:42:54.282632 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1384 13:42:54.288948 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1385 13:42:54.299393 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1386 13:42:54.308807 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1387 13:42:54.318934 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1388 13:42:54.328701 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1389 13:42:54.335911 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1390 13:42:54.345487 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1391 13:42:54.355595 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1392 13:42:54.365461 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1393 13:42:54.375047 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1394 13:42:54.385321 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1395 13:42:54.395342 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1396 13:42:54.395473 PCI: 00:02.0
1397 13:42:54.405260 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1398 13:42:54.418287 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1399 13:42:54.424738 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1400 13:42:54.431942 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1401 13:42:54.441475 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1402 13:42:54.441575 GENERIC: 0.0
1403 13:42:54.444894 PCI: 00:05.0
1404 13:42:54.454699 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1405 13:42:54.458361 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1406 13:42:54.461260 GENERIC: 0.0
1407 13:42:54.461352 PCI: 00:08.0
1408 13:42:54.474463 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1409 13:42:54.474589 PCI: 00:0a.0
1410 13:42:54.478296 PCI: 00:0d.0 child on link 0 USB0 port 0
1411 13:42:54.491510 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1412 13:42:54.494517 USB0 port 0 child on link 0 USB3 port 0
1413 13:42:54.494610 USB3 port 0
1414 13:42:54.497834 USB3 port 1
1415 13:42:54.497925 USB3 port 2
1416 13:42:54.501470 USB3 port 3
1417 13:42:54.504587 PCI: 00:14.0 child on link 0 USB0 port 0
1418 13:42:54.514915 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1419 13:42:54.521253 USB0 port 0 child on link 0 USB2 port 0
1420 13:42:54.521346 USB2 port 0
1421 13:42:54.524794 USB2 port 1
1422 13:42:54.524886 USB2 port 2
1423 13:42:54.527761 USB2 port 3
1424 13:42:54.527851 USB2 port 4
1425 13:42:54.531407 USB2 port 5
1426 13:42:54.531498 USB2 port 6
1427 13:42:54.534834 USB2 port 7
1428 13:42:54.538103 USB2 port 8
1429 13:42:54.538194 USB2 port 9
1430 13:42:54.541324 USB3 port 0
1431 13:42:54.541415 USB3 port 1
1432 13:42:54.544615 USB3 port 2
1433 13:42:54.544742 USB3 port 3
1434 13:42:54.547763 PCI: 00:14.2
1435 13:42:54.557987 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1436 13:42:54.567649 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1437 13:42:54.571252 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1438 13:42:54.581232 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1439 13:42:54.584501 GENERIC: 0.0
1440 13:42:54.587795 PCI: 00:15.0 child on link 0 I2C: 00:1a
1441 13:42:54.597790 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1442 13:42:54.600937 I2C: 00:1a
1443 13:42:54.601030 I2C: 00:31
1444 13:42:54.604493 I2C: 00:32
1445 13:42:54.607598 PCI: 00:15.1 child on link 0 I2C: 00:10
1446 13:42:54.617820 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1447 13:42:54.621194 I2C: 00:10
1448 13:42:54.621288 PCI: 00:15.2
1449 13:42:54.631171 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1450 13:42:54.634172 PCI: 00:15.3
1451 13:42:54.644069 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1452 13:42:54.644165 PCI: 00:16.0
1453 13:42:54.654340 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1454 13:42:54.657338 PCI: 00:19.0
1455 13:42:54.660797 PCI: 00:19.1 child on link 0 I2C: 00:15
1456 13:42:54.670685 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1457 13:42:54.673898 I2C: 00:15
1458 13:42:54.676887 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1459 13:42:54.687759 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1460 13:42:54.700573 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1461 13:42:54.710283 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1462 13:42:54.710383 GENERIC: 0.0
1463 13:42:54.713688 PCI: 01:00.0
1464 13:42:54.723563 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1465 13:42:54.733420 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1466 13:42:54.736819 PCI: 00:1e.0
1467 13:42:54.746351 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1468 13:42:54.749877 PCI: 00:1e.2 child on link 0 SPI: 00
1469 13:42:54.760023 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1470 13:42:54.763372 SPI: 00
1471 13:42:54.766614 PCI: 00:1e.3 child on link 0 SPI: 00
1472 13:42:54.776280 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1473 13:42:54.776379 SPI: 00
1474 13:42:54.782971 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1475 13:42:54.789433 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1476 13:42:54.792902 PNP: 0c09.0
1477 13:42:54.799564 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1478 13:42:54.806131 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1479 13:42:54.816244 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1480 13:42:54.822546 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1481 13:42:54.829510 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1482 13:42:54.829604 GENERIC: 0.0
1483 13:42:54.832524 GENERIC: 1.0
1484 13:42:54.832616 PCI: 00:1f.3
1485 13:42:54.846135 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1486 13:42:54.855613 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1487 13:42:54.855710 PCI: 00:1f.5
1488 13:42:54.865940 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1489 13:42:54.872258 CPU_CLUSTER: 0 child on link 0 APIC: 00
1490 13:42:54.872352 APIC: 00
1491 13:42:54.872425 APIC: 01
1492 13:42:54.876327 APIC: 05
1493 13:42:54.876420 APIC: 03
1494 13:42:54.878962 APIC: 07
1495 13:42:54.879055 APIC: 06
1496 13:42:54.879129 APIC: 04
1497 13:42:54.882469 APIC: 02
1498 13:42:54.885702 Done allocating resources.
1499 13:42:54.888662 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1500 13:42:54.895706 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1501 13:42:54.898823 Configure GPIOs for I2S audio on UP4.
1502 13:42:54.906544 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1503 13:42:54.909685 Enabling resources...
1504 13:42:54.913319 PCI: 00:00.0 subsystem <- 8086/9a12
1505 13:42:54.916672 PCI: 00:00.0 cmd <- 06
1506 13:42:54.920007 PCI: 00:02.0 subsystem <- 8086/9a40
1507 13:42:54.923203 PCI: 00:02.0 cmd <- 03
1508 13:42:54.926227 PCI: 00:04.0 subsystem <- 8086/9a03
1509 13:42:54.926320 PCI: 00:04.0 cmd <- 02
1510 13:42:54.933240 PCI: 00:05.0 subsystem <- 8086/9a19
1511 13:42:54.933332 PCI: 00:05.0 cmd <- 02
1512 13:42:54.936450 PCI: 00:08.0 subsystem <- 8086/9a11
1513 13:42:54.939885 PCI: 00:08.0 cmd <- 06
1514 13:42:54.943126 PCI: 00:0d.0 subsystem <- 8086/9a13
1515 13:42:54.946294 PCI: 00:0d.0 cmd <- 02
1516 13:42:54.949824 PCI: 00:14.0 subsystem <- 8086/a0ed
1517 13:42:54.953472 PCI: 00:14.0 cmd <- 02
1518 13:42:54.956644 PCI: 00:14.2 subsystem <- 8086/a0ef
1519 13:42:54.959719 PCI: 00:14.2 cmd <- 02
1520 13:42:54.963371 PCI: 00:14.3 subsystem <- 8086/a0f0
1521 13:42:54.966240 PCI: 00:14.3 cmd <- 02
1522 13:42:54.969835 PCI: 00:15.0 subsystem <- 8086/a0e8
1523 13:42:54.969938 PCI: 00:15.0 cmd <- 02
1524 13:42:54.976450 PCI: 00:15.1 subsystem <- 8086/a0e9
1525 13:42:54.976544 PCI: 00:15.1 cmd <- 02
1526 13:42:54.979886 PCI: 00:15.2 subsystem <- 8086/a0ea
1527 13:42:54.983259 PCI: 00:15.2 cmd <- 02
1528 13:42:54.986509 PCI: 00:15.3 subsystem <- 8086/a0eb
1529 13:42:54.989914 PCI: 00:15.3 cmd <- 02
1530 13:42:54.993379 PCI: 00:16.0 subsystem <- 8086/a0e0
1531 13:42:54.996575 PCI: 00:16.0 cmd <- 02
1532 13:42:54.999764 PCI: 00:19.1 subsystem <- 8086/a0c6
1533 13:42:55.003139 PCI: 00:19.1 cmd <- 02
1534 13:42:55.006665 PCI: 00:1d.0 bridge ctrl <- 0013
1535 13:42:55.009720 PCI: 00:1d.0 subsystem <- 8086/a0b0
1536 13:42:55.012937 PCI: 00:1d.0 cmd <- 06
1537 13:42:55.016602 PCI: 00:1e.0 subsystem <- 8086/a0a8
1538 13:42:55.016695 PCI: 00:1e.0 cmd <- 06
1539 13:42:55.023405 PCI: 00:1e.2 subsystem <- 8086/a0aa
1540 13:42:55.023526 PCI: 00:1e.2 cmd <- 06
1541 13:42:55.026884 PCI: 00:1e.3 subsystem <- 8086/a0ab
1542 13:42:55.030010 PCI: 00:1e.3 cmd <- 02
1543 13:42:55.033099 PCI: 00:1f.0 subsystem <- 8086/a087
1544 13:42:55.036595 PCI: 00:1f.0 cmd <- 407
1545 13:42:55.039866 PCI: 00:1f.3 subsystem <- 8086/a0c8
1546 13:42:55.043066 PCI: 00:1f.3 cmd <- 02
1547 13:42:55.046724 PCI: 00:1f.5 subsystem <- 8086/a0a4
1548 13:42:55.050025 PCI: 00:1f.5 cmd <- 406
1549 13:42:55.053308 PCI: 01:00.0 cmd <- 02
1550 13:42:55.057980 done.
1551 13:42:55.061102 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1552 13:42:55.064808 Initializing devices...
1553 13:42:55.068125 Root Device init
1554 13:42:55.070960 Chrome EC: Set SMI mask to 0x0000000000000000
1555 13:42:55.077895 Chrome EC: clear events_b mask to 0x0000000000000000
1556 13:42:55.084540 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1557 13:42:55.087935 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1558 13:42:55.094392 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1559 13:42:55.101204 Chrome EC: Set WAKE mask to 0x0000000000000000
1560 13:42:55.104440 fw_config match found: DB_USB=USB3_ACTIVE
1561 13:42:55.111119 Configure Right Type-C port orientation for retimer
1562 13:42:55.114488 Root Device init finished in 42 msecs
1563 13:42:55.117791 PCI: 00:00.0 init
1564 13:42:55.117885 CPU TDP = 9 Watts
1565 13:42:55.120861 CPU PL1 = 9 Watts
1566 13:42:55.124649 CPU PL2 = 40 Watts
1567 13:42:55.124770 CPU PL4 = 83 Watts
1568 13:42:55.127346 PCI: 00:00.0 init finished in 8 msecs
1569 13:42:55.130922 PCI: 00:02.0 init
1570 13:42:55.134035 GMA: Found VBT in CBFS
1571 13:42:55.137645 GMA: Found valid VBT in CBFS
1572 13:42:55.141664 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1573 13:42:55.150919 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1574 13:42:55.154270 PCI: 00:02.0 init finished in 18 msecs
1575 13:42:55.154365 PCI: 00:05.0 init
1576 13:42:55.160742 PCI: 00:05.0 init finished in 0 msecs
1577 13:42:55.160863 PCI: 00:08.0 init
1578 13:42:55.167138 PCI: 00:08.0 init finished in 0 msecs
1579 13:42:55.167233 PCI: 00:14.0 init
1580 13:42:55.174084 PCI: 00:14.0 init finished in 0 msecs
1581 13:42:55.174180 PCI: 00:14.2 init
1582 13:42:55.177440 PCI: 00:14.2 init finished in 0 msecs
1583 13:42:55.181056 PCI: 00:15.0 init
1584 13:42:55.183900 I2C bus 0 version 0x3230302a
1585 13:42:55.187371 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1586 13:42:55.190908 PCI: 00:15.0 init finished in 6 msecs
1587 13:42:55.193897 PCI: 00:15.1 init
1588 13:42:55.197719 I2C bus 1 version 0x3230302a
1589 13:42:55.200890 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1590 13:42:55.204232 PCI: 00:15.1 init finished in 6 msecs
1591 13:42:55.207495 PCI: 00:15.2 init
1592 13:42:55.210468 I2C bus 2 version 0x3230302a
1593 13:42:55.214155 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1594 13:42:55.217418 PCI: 00:15.2 init finished in 6 msecs
1595 13:42:55.217511 PCI: 00:15.3 init
1596 13:42:55.220438 I2C bus 3 version 0x3230302a
1597 13:42:55.224164 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1598 13:42:55.230637 PCI: 00:15.3 init finished in 6 msecs
1599 13:42:55.230730 PCI: 00:16.0 init
1600 13:42:55.233847 PCI: 00:16.0 init finished in 0 msecs
1601 13:42:55.237505 PCI: 00:19.1 init
1602 13:42:55.241324 I2C bus 5 version 0x3230302a
1603 13:42:55.244378 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1604 13:42:55.247966 PCI: 00:19.1 init finished in 6 msecs
1605 13:42:55.251004 PCI: 00:1d.0 init
1606 13:42:55.254094 Initializing PCH PCIe bridge.
1607 13:42:55.257305 PCI: 00:1d.0 init finished in 3 msecs
1608 13:42:55.261115 PCI: 00:1f.0 init
1609 13:42:55.264334 IOAPIC: Initializing IOAPIC at 0xfec00000
1610 13:42:55.267408 IOAPIC: Bootstrap Processor Local APIC = 0x00
1611 13:42:55.270912 IOAPIC: ID = 0x02
1612 13:42:55.274892 IOAPIC: Dumping registers
1613 13:42:55.277739 reg 0x0000: 0x02000000
1614 13:42:55.277852 reg 0x0001: 0x00770020
1615 13:42:55.280905 reg 0x0002: 0x00000000
1616 13:42:55.283971 PCI: 00:1f.0 init finished in 21 msecs
1617 13:42:55.287636 PCI: 00:1f.2 init
1618 13:42:55.290808 Disabling ACPI via APMC.
1619 13:42:55.294313 APMC done.
1620 13:42:55.297745 PCI: 00:1f.2 init finished in 6 msecs
1621 13:42:55.308911 PCI: 01:00.0 init
1622 13:42:55.312504 PCI: 01:00.0 init finished in 0 msecs
1623 13:42:55.315837 PNP: 0c09.0 init
1624 13:42:55.322240 Google Chrome EC uptime: 8.255 seconds
1625 13:42:55.325424 Google Chrome AP resets since EC boot: 1
1626 13:42:55.329026 Google Chrome most recent AP reset causes:
1627 13:42:55.332378 0.452: 32775 shutdown: entering G3
1628 13:42:55.338669 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1629 13:42:55.341886 PNP: 0c09.0 init finished in 24 msecs
1630 13:42:55.348900 Devices initialized
1631 13:42:55.352233 Show all devs... After init.
1632 13:42:55.355283 Root Device: enabled 1
1633 13:42:55.355377 DOMAIN: 0000: enabled 1
1634 13:42:55.358485 CPU_CLUSTER: 0: enabled 1
1635 13:42:55.362098 PCI: 00:00.0: enabled 1
1636 13:42:55.365241 PCI: 00:02.0: enabled 1
1637 13:42:55.365348 PCI: 00:04.0: enabled 1
1638 13:42:55.368729 PCI: 00:05.0: enabled 1
1639 13:42:55.371986 PCI: 00:06.0: enabled 0
1640 13:42:55.374984 PCI: 00:07.0: enabled 0
1641 13:42:55.375077 PCI: 00:07.1: enabled 0
1642 13:42:55.378206 PCI: 00:07.2: enabled 0
1643 13:42:55.381856 PCI: 00:07.3: enabled 0
1644 13:42:55.385211 PCI: 00:08.0: enabled 1
1645 13:42:55.385305 PCI: 00:09.0: enabled 0
1646 13:42:55.388612 PCI: 00:0a.0: enabled 0
1647 13:42:55.392325 PCI: 00:0d.0: enabled 1
1648 13:42:55.394913 PCI: 00:0d.1: enabled 0
1649 13:42:55.395005 PCI: 00:0d.2: enabled 0
1650 13:42:55.398350 PCI: 00:0d.3: enabled 0
1651 13:42:55.401940 PCI: 00:0e.0: enabled 0
1652 13:42:55.402033 PCI: 00:10.2: enabled 1
1653 13:42:55.405363 PCI: 00:10.6: enabled 0
1654 13:42:55.408236 PCI: 00:10.7: enabled 0
1655 13:42:55.411457 PCI: 00:12.0: enabled 0
1656 13:42:55.411557 PCI: 00:12.6: enabled 0
1657 13:42:55.414915 PCI: 00:13.0: enabled 0
1658 13:42:55.418587 PCI: 00:14.0: enabled 1
1659 13:42:55.421810 PCI: 00:14.1: enabled 0
1660 13:42:55.421901 PCI: 00:14.2: enabled 1
1661 13:42:55.424720 PCI: 00:14.3: enabled 1
1662 13:42:55.428192 PCI: 00:15.0: enabled 1
1663 13:42:55.431647 PCI: 00:15.1: enabled 1
1664 13:42:55.431739 PCI: 00:15.2: enabled 1
1665 13:42:55.434742 PCI: 00:15.3: enabled 1
1666 13:42:55.438453 PCI: 00:16.0: enabled 1
1667 13:42:55.438543 PCI: 00:16.1: enabled 0
1668 13:42:55.441713 PCI: 00:16.2: enabled 0
1669 13:42:55.444796 PCI: 00:16.3: enabled 0
1670 13:42:55.448135 PCI: 00:16.4: enabled 0
1671 13:42:55.448226 PCI: 00:16.5: enabled 0
1672 13:42:55.451875 PCI: 00:17.0: enabled 0
1673 13:42:55.455122 PCI: 00:19.0: enabled 0
1674 13:42:55.458081 PCI: 00:19.1: enabled 1
1675 13:42:55.458171 PCI: 00:19.2: enabled 0
1676 13:42:55.462003 PCI: 00:1c.0: enabled 1
1677 13:42:55.464622 PCI: 00:1c.1: enabled 0
1678 13:42:55.468398 PCI: 00:1c.2: enabled 0
1679 13:42:55.468489 PCI: 00:1c.3: enabled 0
1680 13:42:55.471338 PCI: 00:1c.4: enabled 0
1681 13:42:55.475080 PCI: 00:1c.5: enabled 0
1682 13:42:55.478278 PCI: 00:1c.6: enabled 1
1683 13:42:55.478380 PCI: 00:1c.7: enabled 0
1684 13:42:55.481202 PCI: 00:1d.0: enabled 1
1685 13:42:55.484893 PCI: 00:1d.1: enabled 0
1686 13:42:55.484985 PCI: 00:1d.2: enabled 1
1687 13:42:55.488097 PCI: 00:1d.3: enabled 0
1688 13:42:55.491398 PCI: 00:1e.0: enabled 1
1689 13:42:55.495045 PCI: 00:1e.1: enabled 0
1690 13:42:55.495137 PCI: 00:1e.2: enabled 1
1691 13:42:55.497762 PCI: 00:1e.3: enabled 1
1692 13:42:55.501266 PCI: 00:1f.0: enabled 1
1693 13:42:55.504504 PCI: 00:1f.1: enabled 0
1694 13:42:55.504624 PCI: 00:1f.2: enabled 1
1695 13:42:55.507834 PCI: 00:1f.3: enabled 1
1696 13:42:55.511213 PCI: 00:1f.4: enabled 0
1697 13:42:55.514710 PCI: 00:1f.5: enabled 1
1698 13:42:55.514803 PCI: 00:1f.6: enabled 0
1699 13:42:55.517707 PCI: 00:1f.7: enabled 0
1700 13:42:55.521107 APIC: 00: enabled 1
1701 13:42:55.521200 GENERIC: 0.0: enabled 1
1702 13:42:55.524298 GENERIC: 0.0: enabled 1
1703 13:42:55.527605 GENERIC: 1.0: enabled 1
1704 13:42:55.530949 GENERIC: 0.0: enabled 1
1705 13:42:55.531040 GENERIC: 1.0: enabled 1
1706 13:42:55.534231 USB0 port 0: enabled 1
1707 13:42:55.538128 GENERIC: 0.0: enabled 1
1708 13:42:55.538249 USB0 port 0: enabled 1
1709 13:42:55.541280 GENERIC: 0.0: enabled 1
1710 13:42:55.544512 I2C: 00:1a: enabled 1
1711 13:42:55.547785 I2C: 00:31: enabled 1
1712 13:42:55.547877 I2C: 00:32: enabled 1
1713 13:42:55.551014 I2C: 00:10: enabled 1
1714 13:42:55.554738 I2C: 00:15: enabled 1
1715 13:42:55.554829 GENERIC: 0.0: enabled 0
1716 13:42:55.557872 GENERIC: 1.0: enabled 0
1717 13:42:55.560973 GENERIC: 0.0: enabled 1
1718 13:42:55.561066 SPI: 00: enabled 1
1719 13:42:55.564135 SPI: 00: enabled 1
1720 13:42:55.567896 PNP: 0c09.0: enabled 1
1721 13:42:55.567988 GENERIC: 0.0: enabled 1
1722 13:42:55.570908 USB3 port 0: enabled 1
1723 13:42:55.574176 USB3 port 1: enabled 1
1724 13:42:55.577580 USB3 port 2: enabled 0
1725 13:42:55.577673 USB3 port 3: enabled 0
1726 13:42:55.580799 USB2 port 0: enabled 0
1727 13:42:55.584391 USB2 port 1: enabled 1
1728 13:42:55.584511 USB2 port 2: enabled 1
1729 13:42:55.587992 USB2 port 3: enabled 0
1730 13:42:55.590781 USB2 port 4: enabled 1
1731 13:42:55.590873 USB2 port 5: enabled 0
1732 13:42:55.594002 USB2 port 6: enabled 0
1733 13:42:55.597344 USB2 port 7: enabled 0
1734 13:42:55.600825 USB2 port 8: enabled 0
1735 13:42:55.600916 USB2 port 9: enabled 0
1736 13:42:55.603946 USB3 port 0: enabled 0
1737 13:42:55.607681 USB3 port 1: enabled 1
1738 13:42:55.607795 USB3 port 2: enabled 0
1739 13:42:55.610624 USB3 port 3: enabled 0
1740 13:42:55.613907 GENERIC: 0.0: enabled 1
1741 13:42:55.617282 GENERIC: 1.0: enabled 1
1742 13:42:55.617403 APIC: 01: enabled 1
1743 13:42:55.620961 APIC: 05: enabled 1
1744 13:42:55.621054 APIC: 03: enabled 1
1745 13:42:55.623947 APIC: 07: enabled 1
1746 13:42:55.627430 APIC: 06: enabled 1
1747 13:42:55.627522 APIC: 04: enabled 1
1748 13:42:55.630845 APIC: 02: enabled 1
1749 13:42:55.634459 PCI: 01:00.0: enabled 1
1750 13:42:55.637200 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1751 13:42:55.643857 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1752 13:42:55.647270 ELOG: NV offset 0xf30000 size 0x1000
1753 13:42:55.654089 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1754 13:42:55.660629 ELOG: Event(17) added with size 13 at 2023-10-26 13:42:54 UTC
1755 13:42:55.667115 ELOG: Event(92) added with size 9 at 2023-10-26 13:42:54 UTC
1756 13:42:55.673584 ELOG: Event(93) added with size 9 at 2023-10-26 13:42:54 UTC
1757 13:42:55.680408 ELOG: Event(9E) added with size 10 at 2023-10-26 13:42:54 UTC
1758 13:42:55.687139 ELOG: Event(9F) added with size 14 at 2023-10-26 13:42:54 UTC
1759 13:42:55.693819 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1760 13:42:55.696815 ELOG: Event(A1) added with size 10 at 2023-10-26 13:42:54 UTC
1761 13:42:55.706999 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1762 13:42:55.713402 ELOG: Event(A0) added with size 9 at 2023-10-26 13:42:54 UTC
1763 13:42:55.716654 elog_add_boot_reason: Logged dev mode boot
1764 13:42:55.723562 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1765 13:42:55.723665 Finalize devices...
1766 13:42:55.726938 Devices finalized
1767 13:42:55.733187 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1768 13:42:55.736616 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1769 13:42:55.743193 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1770 13:42:55.746532 ME: HFSTS1 : 0x80030055
1771 13:42:55.753423 ME: HFSTS2 : 0x30280116
1772 13:42:55.756513 ME: HFSTS3 : 0x00000050
1773 13:42:55.759667 ME: HFSTS4 : 0x00004000
1774 13:42:55.766497 ME: HFSTS5 : 0x00000000
1775 13:42:55.769662 ME: HFSTS6 : 0x40400006
1776 13:42:55.773279 ME: Manufacturing Mode : YES
1777 13:42:55.776629 ME: SPI Protection Mode Enabled : NO
1778 13:42:55.779738 ME: FW Partition Table : OK
1779 13:42:55.786538 ME: Bringup Loader Failure : NO
1780 13:42:55.789785 ME: Firmware Init Complete : NO
1781 13:42:55.793003 ME: Boot Options Present : NO
1782 13:42:55.796491 ME: Update In Progress : NO
1783 13:42:55.799845 ME: D0i3 Support : YES
1784 13:42:55.803117 ME: Low Power State Enabled : NO
1785 13:42:55.806048 ME: CPU Replaced : YES
1786 13:42:55.809586 ME: CPU Replacement Valid : YES
1787 13:42:55.816524 ME: Current Working State : 5
1788 13:42:55.819754 ME: Current Operation State : 1
1789 13:42:55.822801 ME: Current Operation Mode : 3
1790 13:42:55.826014 ME: Error Code : 0
1791 13:42:55.829611 ME: Enhanced Debug Mode : NO
1792 13:42:55.833126 ME: CPU Debug Disabled : YES
1793 13:42:55.836161 ME: TXT Support : NO
1794 13:42:55.843039 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1795 13:42:55.849677 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1796 13:42:55.852637 CBFS: 'fallback/slic' not found.
1797 13:42:55.859390 ACPI: Writing ACPI tables at 76b01000.
1798 13:42:55.859490 ACPI: * FACS
1799 13:42:55.862897 ACPI: * DSDT
1800 13:42:55.866299 Ramoops buffer: 0x100000@0x76a00000.
1801 13:42:55.869222 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1802 13:42:55.872954 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1803 13:42:55.876644 Google Chrome EC: version:
1804 13:42:55.880479 ro: voema_v2.0.10114-a447f03e46
1805 13:42:55.883537 rw: voema_v2.0.10114-a447f03e46
1806 13:42:55.886638 running image: 2
1807 13:42:55.893221 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1808 13:42:55.896896 ACPI: * FADT
1809 13:42:55.896989 SCI is IRQ9
1810 13:42:55.900134 ACPI: added table 1/32, length now 40
1811 13:42:55.903194 ACPI: * SSDT
1812 13:42:55.907012 Found 1 CPU(s) with 8 core(s) each.
1813 13:42:55.913211 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1814 13:42:55.917098 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1815 13:42:55.919974 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1816 13:42:55.923435 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1817 13:42:55.930413 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1818 13:42:55.936703 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1819 13:42:55.939807 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1820 13:42:55.946711 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1821 13:42:55.953361 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1822 13:42:55.956507 \_SB.PCI0.RP09: Added StorageD3Enable property
1823 13:42:55.959865 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1824 13:42:55.966624 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1825 13:42:55.973374 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1826 13:42:55.976701 PS2K: Passing 80 keymaps to kernel
1827 13:42:55.982873 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1828 13:42:55.989603 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1829 13:42:55.996383 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1830 13:42:56.003034 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1831 13:42:56.009609 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1832 13:42:56.016432 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1833 13:42:56.019374 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1834 13:42:56.026463 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1835 13:42:56.032930 ACPI: added table 2/32, length now 44
1836 13:42:56.033024 ACPI: * MCFG
1837 13:42:56.036251 ACPI: added table 3/32, length now 48
1838 13:42:56.039730 ACPI: * TPM2
1839 13:42:56.042749 TPM2 log created at 0x769f0000
1840 13:42:56.046077 ACPI: added table 4/32, length now 52
1841 13:42:56.046170 ACPI: * MADT
1842 13:42:56.049539 SCI is IRQ9
1843 13:42:56.052919 ACPI: added table 5/32, length now 56
1844 13:42:56.053063 current = 76b09850
1845 13:42:56.056133 ACPI: * DMAR
1846 13:42:56.059187 ACPI: added table 6/32, length now 60
1847 13:42:56.062443 ACPI: added table 7/32, length now 64
1848 13:42:56.066197 ACPI: * HPET
1849 13:42:56.069276 ACPI: added table 8/32, length now 68
1850 13:42:56.069385 ACPI: done.
1851 13:42:56.073103 ACPI tables: 35216 bytes.
1852 13:42:56.076143 smbios_write_tables: 769ef000
1853 13:42:56.079551 EC returned error result code 3
1854 13:42:56.082569 Couldn't obtain OEM name from CBI
1855 13:42:56.085997 Create SMBIOS type 16
1856 13:42:56.089499 Create SMBIOS type 17
1857 13:42:56.089592 GENERIC: 0.0 (WIFI Device)
1858 13:42:56.092434 SMBIOS tables: 1734 bytes.
1859 13:42:56.099151 Writing table forward entry at 0x00000500
1860 13:42:56.102879 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1861 13:42:56.109232 Writing coreboot table at 0x76b25000
1862 13:42:56.112242 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1863 13:42:56.119275 1. 0000000000001000-000000000009ffff: RAM
1864 13:42:56.122536 2. 00000000000a0000-00000000000fffff: RESERVED
1865 13:42:56.125497 3. 0000000000100000-00000000769eefff: RAM
1866 13:42:56.132165 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1867 13:42:56.139026 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1868 13:42:56.142417 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1869 13:42:56.149075 7. 0000000077000000-000000007fbfffff: RESERVED
1870 13:42:56.152571 8. 00000000c0000000-00000000cfffffff: RESERVED
1871 13:42:56.158679 9. 00000000f8000000-00000000f9ffffff: RESERVED
1872 13:42:56.162121 10. 00000000fb000000-00000000fb000fff: RESERVED
1873 13:42:56.168905 11. 00000000fe000000-00000000fe00ffff: RESERVED
1874 13:42:56.172115 12. 00000000fed80000-00000000fed87fff: RESERVED
1875 13:42:56.175588 13. 00000000fed90000-00000000fed92fff: RESERVED
1876 13:42:56.182317 14. 00000000feda0000-00000000feda1fff: RESERVED
1877 13:42:56.185497 15. 00000000fedc0000-00000000feddffff: RESERVED
1878 13:42:56.191875 16. 0000000100000000-00000004803fffff: RAM
1879 13:42:56.195660 Passing 4 GPIOs to payload:
1880 13:42:56.198755 NAME | PORT | POLARITY | VALUE
1881 13:42:56.205368 lid | undefined | high | high
1882 13:42:56.208474 power | undefined | high | low
1883 13:42:56.215375 oprom | undefined | high | low
1884 13:42:56.218716 EC in RW | 0x000000e5 | high | high
1885 13:42:56.225554 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1886 13:42:56.228441 coreboot table: 1576 bytes.
1887 13:42:56.232017 IMD ROOT 0. 0x76fff000 0x00001000
1888 13:42:56.235260 IMD SMALL 1. 0x76ffe000 0x00001000
1889 13:42:56.242122 FSP MEMORY 2. 0x76c4e000 0x003b0000
1890 13:42:56.245388 VPD 3. 0x76c4d000 0x00000367
1891 13:42:56.248595 RO MCACHE 4. 0x76c4c000 0x00000fdc
1892 13:42:56.251926 CONSOLE 5. 0x76c2c000 0x00020000
1893 13:42:56.255391 FMAP 6. 0x76c2b000 0x00000578
1894 13:42:56.258751 TIME STAMP 7. 0x76c2a000 0x00000910
1895 13:42:56.262378 VBOOT WORK 8. 0x76c16000 0x00014000
1896 13:42:56.265101 ROMSTG STCK 9. 0x76c15000 0x00001000
1897 13:42:56.271900 AFTER CAR 10. 0x76c0a000 0x0000b000
1898 13:42:56.275187 RAMSTAGE 11. 0x76b97000 0x00073000
1899 13:42:56.278618 REFCODE 12. 0x76b42000 0x00055000
1900 13:42:56.281795 SMM BACKUP 13. 0x76b32000 0x00010000
1901 13:42:56.285098 4f444749 14. 0x76b30000 0x00002000
1902 13:42:56.288711 EXT VBT15. 0x76b2d000 0x0000219f
1903 13:42:56.291900 COREBOOT 16. 0x76b25000 0x00008000
1904 13:42:56.295141 ACPI 17. 0x76b01000 0x00024000
1905 13:42:56.298738 ACPI GNVS 18. 0x76b00000 0x00001000
1906 13:42:56.301910 RAMOOPS 19. 0x76a00000 0x00100000
1907 13:42:56.308586 TPM2 TCGLOG20. 0x769f0000 0x00010000
1908 13:42:56.311783 SMBIOS 21. 0x769ef000 0x00000800
1909 13:42:56.311875 IMD small region:
1910 13:42:56.315126 IMD ROOT 0. 0x76ffec00 0x00000400
1911 13:42:56.321733 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1912 13:42:56.324922 POWER STATE 2. 0x76ffeb80 0x00000044
1913 13:42:56.328333 ROMSTAGE 3. 0x76ffeb60 0x00000004
1914 13:42:56.331971 MEM INFO 4. 0x76ffe980 0x000001e0
1915 13:42:56.338182 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1916 13:42:56.341848 MTRR: Physical address space:
1917 13:42:56.348271 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1918 13:42:56.355086 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1919 13:42:56.361506 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1920 13:42:56.364681 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1921 13:42:56.372148 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1922 13:42:56.378436 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1923 13:42:56.384758 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1924 13:42:56.387904 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 13:42:56.394875 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 13:42:56.397903 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 13:42:56.401337 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 13:42:56.404434 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 13:42:56.411293 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 13:42:56.414575 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 13:42:56.418024 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 13:42:56.421313 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 13:42:56.427448 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 13:42:56.430805 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 13:42:56.434070 call enable_fixed_mtrr()
1936 13:42:56.437591 CPU physical address size: 39 bits
1937 13:42:56.444161 MTRR: default type WB/UC MTRR counts: 6/7.
1938 13:42:56.447351 MTRR: WB selected as default type.
1939 13:42:56.454305 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1940 13:42:56.457526 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1941 13:42:56.464244 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1942 13:42:56.470803 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1943 13:42:56.477585 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1944 13:42:56.483868 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1945 13:42:56.488374
1946 13:42:56.488466 MTRR check
1947 13:42:56.491455 Fixed MTRRs : Enabled
1948 13:42:56.491549 Variable MTRRs: Enabled
1949 13:42:56.491621
1950 13:42:56.497924 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 13:42:56.501078 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 13:42:56.504327 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 13:42:56.507805 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 13:42:56.514506 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 13:42:56.517788 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 13:42:56.520874 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 13:42:56.524627 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 13:42:56.530937 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 13:42:56.534367 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 13:42:56.537590 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 13:42:56.544839 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 13:42:56.544981 call enable_fixed_mtrr()
1963 13:42:56.551559 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 13:42:56.554704 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 13:42:56.558067 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 13:42:56.561518 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 13:42:56.568085 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 13:42:56.571604 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 13:42:56.575128 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 13:42:56.578277 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 13:42:56.584466 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 13:42:56.588230 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 13:42:56.591423 CPU physical address size: 39 bits
1974 13:42:56.596938 call enable_fixed_mtrr()
1975 13:42:56.599754 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 13:42:56.606405 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 13:42:56.610146 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 13:42:56.613170 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 13:42:56.616536 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 13:42:56.623035 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 13:42:56.626785 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 13:42:56.629937 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 13:42:56.633280 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 13:42:56.639913 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 13:42:56.643012 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 13:42:56.646152 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 13:42:56.653873 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 13:42:56.657158 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 13:42:56.660418 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 13:42:56.663922 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 13:42:56.670227 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 13:42:56.673712 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 13:42:56.676890 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 13:42:56.680448 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 13:42:56.687271 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 13:42:56.690487 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 13:42:56.693544 call enable_fixed_mtrr()
1998 13:42:56.696965 call enable_fixed_mtrr()
1999 13:42:56.700368 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 13:42:56.703551 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 13:42:56.710151 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 13:42:56.713408 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 13:42:56.716761 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 13:42:56.720282 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 13:42:56.726627 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 13:42:56.730155 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 13:42:56.733399 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 13:42:56.736574 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 13:42:56.743247 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 13:42:56.746583 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 13:42:56.753671 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 13:42:56.756942 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 13:42:56.760200 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 13:42:56.763409 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 13:42:56.770149 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 13:42:56.773358 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 13:42:56.776472 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 13:42:56.779904 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 13:42:56.786431 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 13:42:56.789974 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 13:42:56.793490 call enable_fixed_mtrr()
2022 13:42:56.796837 call enable_fixed_mtrr()
2023 13:42:56.799966 CPU physical address size: 39 bits
2024 13:42:56.804266 CPU physical address size: 39 bits
2025 13:42:56.810536 CPU physical address size: 39 bits
2026 13:42:56.813963 CPU physical address size: 39 bits
2027 13:42:56.817351 CPU physical address size: 39 bits
2028 13:42:56.823860 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2029 13:42:56.827193 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 13:42:56.832112 Checking cr50 for pending updates
2031 13:42:56.835710 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 13:42:56.839248 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 13:42:56.842358 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 13:42:56.849436 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 13:42:56.852923 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 13:42:56.855709 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 13:42:56.859132 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 13:42:56.865727 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 13:42:56.869202 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 13:42:56.872383 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 13:42:56.877715 Reading cr50 TPM mode
2042 13:42:56.881263 call enable_fixed_mtrr()
2043 13:42:56.884377 CPU physical address size: 39 bits
2044 13:42:56.891325 BS: BS_PAYLOAD_LOAD entry times (exec / console): 50 / 8 ms
2045 13:42:56.897804 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2046 13:42:56.904413 Checking segment from ROM address 0xffc02b38
2047 13:42:56.907575 Checking segment from ROM address 0xffc02b54
2048 13:42:56.910845 Loading segment from ROM address 0xffc02b38
2049 13:42:56.914480 code (compression=0)
2050 13:42:56.924400 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2051 13:42:56.930714 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2052 13:42:56.934299 it's not compressed!
2053 13:42:57.083435 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2054 13:42:57.090147 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2055 13:42:57.097063 Loading segment from ROM address 0xffc02b54
2056 13:42:57.100304 Entry Point 0x30000000
2057 13:42:57.100403 Loaded segments
2058 13:42:57.107061 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2059 13:42:57.152524 Finalizing chipset.
2060 13:42:57.155793 Finalizing SMM.
2061 13:42:57.155888 APMC done.
2062 13:42:57.162384 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2063 13:42:57.165898 mp_park_aps done after 0 msecs.
2064 13:42:57.170145 Jumping to boot code at 0x30000000(0x76b25000)
2065 13:42:57.179129 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2066 13:42:57.179238
2067 13:42:57.179315
2068 13:42:57.179385
2069 13:42:57.182545 Starting depthcharge on Voema...
2070 13:42:57.182641
2071 13:42:57.183011 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2072 13:42:57.183118 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2073 13:42:57.183206 Setting prompt string to ['volteer:']
2074 13:42:57.183292 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2075 13:42:57.192334 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2076 13:42:57.192442
2077 13:42:57.199348 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2078 13:42:57.199442
2079 13:42:57.202585 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2080 13:42:57.205764
2081 13:42:57.208958 Failed to find eMMC card reader
2082 13:42:57.209051
2083 13:42:57.209125 Wipe memory regions:
2084 13:42:57.209194
2085 13:42:57.215730 [0x00000000001000, 0x000000000a0000)
2086 13:42:57.215824
2087 13:42:57.219082 [0x00000000100000, 0x00000030000000)
2088 13:42:57.257711
2089 13:42:57.260958 [0x00000032662db0, 0x000000769ef000)
2090 13:42:57.315863
2091 13:42:57.318990 [0x00000100000000, 0x00000480400000)
2092 13:42:57.996359
2093 13:42:57.999285 ec_init: CrosEC protocol v3 supported (256, 256)
2094 13:42:58.431781
2095 13:42:58.431941 R8152: Initializing
2096 13:42:58.432018
2097 13:42:58.435558 Version 6 (ocp_data = 5c30)
2098 13:42:58.435650
2099 13:42:58.438631 R8152: Done initializing
2100 13:42:58.438725
2101 13:42:58.441717 Adding net device
2102 13:42:58.743356
2103 13:42:58.746229 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2104 13:42:58.746328
2105 13:42:58.746400
2106 13:42:58.746468
2107 13:42:58.750013 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2109 13:42:58.850445 volteer: tftpboot 192.168.201.1 11884121/tftp-deploy-berikzqw/kernel/bzImage 11884121/tftp-deploy-berikzqw/kernel/cmdline 11884121/tftp-deploy-berikzqw/ramdisk/ramdisk.cpio.gz
2110 13:42:58.850659 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 13:42:58.850782 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2112 13:42:58.855213 tftpboot 192.168.201.1 11884121/tftp-deploy-berikzqw/kernel/bzImploy-berikzqw/kernel/cmdline 11884121/tftp-deploy-berikzqw/ramdisk/ramdisk.cpio.gz
2113 13:42:58.855312
2114 13:42:58.855385 Waiting for link
2115 13:42:59.058639
2116 13:42:59.058866 done.
2117 13:42:59.058996
2118 13:42:59.059119 MAC: 00:24:32:30:77:d1
2119 13:42:59.059243
2120 13:42:59.061448 Sending DHCP discover... done.
2121 13:42:59.061549
2122 13:42:59.064688 Waiting for reply... done.
2123 13:42:59.064771
2124 13:42:59.069888 Sending DHCP request... done.
2125 13:42:59.069985
2126 13:42:59.087707 Waiting for reply... done.
2127 13:42:59.087830
2128 13:42:59.087902 My ip is 192.168.201.13
2129 13:42:59.087969
2130 13:42:59.090733 The DHCP server ip is 192.168.201.1
2131 13:42:59.093873
2132 13:42:59.097084 TFTP server IP predefined by user: 192.168.201.1
2133 13:42:59.097176
2134 13:42:59.103928 Bootfile predefined by user: 11884121/tftp-deploy-berikzqw/kernel/bzImage
2135 13:42:59.104021
2136 13:42:59.107109 Sending tftp read request... done.
2137 13:42:59.107200
2138 13:42:59.113794 Waiting for the transfer...
2139 13:42:59.113894
2140 13:42:59.648425 00000000 ################################################################
2141 13:42:59.648616
2142 13:43:00.199570 00080000 ################################################################
2143 13:43:00.199730
2144 13:43:00.720747 00100000 ################################################################
2145 13:43:00.720915
2146 13:43:01.250565 00180000 ################################################################
2147 13:43:01.250725
2148 13:43:01.779456 00200000 ################################################################
2149 13:43:01.779617
2150 13:43:02.304758 00280000 ################################################################
2151 13:43:02.304915
2152 13:43:02.857832 00300000 ################################################################
2153 13:43:02.857986
2154 13:43:03.386769 00380000 ################################################################
2155 13:43:03.386925
2156 13:43:03.941906 00400000 ################################################################
2157 13:43:03.942066
2158 13:43:04.491097 00480000 ################################################################
2159 13:43:04.491254
2160 13:43:05.019758 00500000 ################################################################
2161 13:43:05.019918
2162 13:43:05.566700 00580000 ################################################################
2163 13:43:05.566860
2164 13:43:06.116759 00600000 ################################################################
2165 13:43:06.116924
2166 13:43:06.674766 00680000 ################################################################
2167 13:43:06.674921
2168 13:43:07.232778 00700000 ################################################################
2169 13:43:07.232942
2170 13:43:07.773480 00780000 ################################################################
2171 13:43:07.773705
2172 13:43:07.962503 00800000 ####################### done.
2173 13:43:07.962717
2174 13:43:07.965646 The bootfile was 8576912 bytes long.
2175 13:43:07.965789
2176 13:43:07.968995 Sending tftp read request... done.
2177 13:43:07.969136
2178 13:43:07.972059 Waiting for the transfer...
2179 13:43:07.972197
2180 13:43:08.538733 00000000 ################################################################
2181 13:43:08.538890
2182 13:43:09.101572 00080000 ################################################################
2183 13:43:09.101801
2184 13:43:09.653390 00100000 ################################################################
2185 13:43:09.653604
2186 13:43:10.200595 00180000 ################################################################
2187 13:43:10.200757
2188 13:43:10.753629 00200000 ################################################################
2189 13:43:10.753788
2190 13:43:11.341527 00280000 ################################################################
2191 13:43:11.341753
2192 13:43:11.910577 00300000 ################################################################
2193 13:43:11.910804
2194 13:43:12.466959 00380000 ################################################################
2195 13:43:12.467174
2196 13:43:13.020301 00400000 ################################################################
2197 13:43:13.020462
2198 13:43:13.568416 00480000 ################################################################
2199 13:43:13.568572
2200 13:43:14.132291 00500000 ################################################################
2201 13:43:14.132455
2202 13:43:14.709959 00580000 ################################################################
2203 13:43:14.710184
2204 13:43:15.268683 00600000 ################################################################
2205 13:43:15.268920
2206 13:43:15.847842 00680000 ################################################################
2207 13:43:15.848075
2208 13:43:16.415746 00700000 ################################################################
2209 13:43:16.415925
2210 13:43:16.965923 00780000 ################################################################
2211 13:43:16.966085
2212 13:43:17.530319 00800000 ################################################################
2213 13:43:17.530546
2214 13:43:18.091459 00880000 ################################################################
2215 13:43:18.091617
2216 13:43:18.664192 00900000 ################################################################
2217 13:43:18.664350
2218 13:43:19.224920 00980000 ################################################################
2219 13:43:19.225132
2220 13:43:19.793400 00a00000 ################################################################
2221 13:43:19.793623
2222 13:43:20.352708 00a80000 ################################################################
2223 13:43:20.352942
2224 13:43:20.917552 00b00000 ################################################################
2225 13:43:20.917706
2226 13:43:21.477431 00b80000 ################################################################
2227 13:43:21.477576
2228 13:43:22.019828 00c00000 ################################################################
2229 13:43:22.019969
2230 13:43:22.568588 00c80000 ################################################################
2231 13:43:22.568764
2232 13:43:23.103685 00d00000 ################################################################
2233 13:43:23.103887
2234 13:43:23.635534 00d80000 ################################################################
2235 13:43:23.635708
2236 13:43:24.160515 00e00000 ################################################################
2237 13:43:24.160654
2238 13:43:24.687901 00e80000 ################################################################
2239 13:43:24.688101
2240 13:43:25.230350 00f00000 ################################################################
2241 13:43:25.230495
2242 13:43:25.766045 00f80000 ################################################################
2243 13:43:25.766219
2244 13:43:26.309729 01000000 ################################################################
2245 13:43:26.309903
2246 13:43:26.844135 01080000 ################################################################
2247 13:43:26.844341
2248 13:43:27.381574 01100000 ################################################################
2249 13:43:27.381719
2250 13:43:27.927995 01180000 ################################################################
2251 13:43:27.928176
2252 13:43:28.465261 01200000 ################################################################
2253 13:43:28.465440
2254 13:43:28.999337 01280000 ################################################################
2255 13:43:28.999563
2256 13:43:29.557099 01300000 ################################################################
2257 13:43:29.557323
2258 13:43:30.121376 01380000 ################################################################
2259 13:43:30.121520
2260 13:43:30.658260 01400000 ################################################################
2261 13:43:30.658411
2262 13:43:31.217690 01480000 ################################################################
2263 13:43:31.217903
2264 13:43:31.773988 01500000 ################################################################
2265 13:43:31.774138
2266 13:43:32.345421 01580000 ################################################################
2267 13:43:32.345577
2268 13:43:32.896365 01600000 ################################################################
2269 13:43:32.896584
2270 13:43:33.452893 01680000 ################################################################
2271 13:43:33.453075
2272 13:43:33.999403 01700000 ################################################################
2273 13:43:33.999583
2274 13:43:34.550585 01780000 ################################################################
2275 13:43:34.550778
2276 13:43:35.096300 01800000 ################################################################
2277 13:43:35.096457
2278 13:43:35.633490 01880000 ################################################################
2279 13:43:35.633649
2280 13:43:36.175165 01900000 ################################################################
2281 13:43:36.175314
2282 13:43:36.722300 01980000 ################################################################
2283 13:43:36.722448
2284 13:43:37.288622 01a00000 ################################################################
2285 13:43:37.288812
2286 13:43:37.865810 01a80000 ################################################################
2287 13:43:37.865960
2288 13:43:38.430153 01b00000 ################################################################
2289 13:43:38.430308
2290 13:43:38.981509 01b80000 ################################################################
2291 13:43:38.981682
2292 13:43:39.552626 01c00000 ################################################################
2293 13:43:39.552821
2294 13:43:40.134605 01c80000 ################################################################
2295 13:43:40.134763
2296 13:43:40.692945 01d00000 ################################################################
2297 13:43:40.693120
2298 13:43:41.250459 01d80000 ################################################################
2299 13:43:41.250604
2300 13:43:41.831427 01e00000 ################################################################
2301 13:43:41.831599
2302 13:43:42.374100 01e80000 ################################################################
2303 13:43:42.374251
2304 13:43:42.923413 01f00000 ################################################################
2305 13:43:42.923559
2306 13:43:43.470469 01f80000 ################################################################
2307 13:43:43.470618
2308 13:43:43.997152 02000000 ################################################################
2309 13:43:43.997314
2310 13:43:44.525599 02080000 ################################################################
2311 13:43:44.525745
2312 13:43:45.074975 02100000 ################################################################
2313 13:43:45.075119
2314 13:43:45.631897 02180000 ################################################################
2315 13:43:45.632052
2316 13:43:46.067151 02200000 #################################################### done.
2317 13:43:46.067364
2318 13:43:46.070267 Sending tftp read request... done.
2319 13:43:46.070405
2320 13:43:46.073619 Waiting for the transfer...
2321 13:43:46.073761
2322 13:43:46.073890 00000000 # done.
2323 13:43:46.074021
2324 13:43:46.083492 Command line loaded dynamically from TFTP file: 11884121/tftp-deploy-berikzqw/kernel/cmdline
2325 13:43:46.083611
2326 13:43:46.097039 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2327 13:43:46.105134
2328 13:43:46.108988 Shutting down all USB controllers.
2329 13:43:46.109081
2330 13:43:46.109154 Removing current net device
2331 13:43:46.109221
2332 13:43:46.111678 Finalizing coreboot
2333 13:43:46.111769
2334 13:43:46.118197 Exiting depthcharge with code 4 at timestamp: 57520496
2335 13:43:46.118290
2336 13:43:46.118363
2337 13:43:46.118430 Starting kernel ...
2338 13:43:46.118494
2339 13:43:46.118557
2340 13:43:46.119060 end: 2.2.4 bootloader-commands (duration 00:00:49) [common]
2341 13:43:46.119166 start: 2.2.5 auto-login-action (timeout 00:03:56) [common]
2342 13:43:46.119250 Setting prompt string to ['Linux version [0-9]']
2343 13:43:46.119325 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2344 13:43:46.119398 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2346 13:47:42.119452 end: 2.2.5 auto-login-action (duration 00:03:56) [common]
2348 13:47:42.119674 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 236 seconds'
2350 13:47:42.119850 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2353 13:47:42.120123 end: 2 depthcharge-action (duration 00:05:00) [common]
2355 13:47:42.120356 Cleaning after the job
2356 13:47:42.120451 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884121/tftp-deploy-berikzqw/ramdisk
2357 13:47:42.126167 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884121/tftp-deploy-berikzqw/kernel
2358 13:47:42.127475 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884121/tftp-deploy-berikzqw/modules
2359 13:47:42.128097 start: 4.1 power-off (timeout 00:00:30) [common]
2360 13:47:42.128272 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2361 13:47:42.201272 >> Command sent successfully.
2362 13:47:42.203959 Returned 0 in 0 seconds
2363 13:47:42.304389 end: 4.1 power-off (duration 00:00:00) [common]
2365 13:47:42.304770 start: 4.2 read-feedback (timeout 00:10:00) [common]
2366 13:47:42.305087 Listened to connection for namespace 'common' for up to 1s
2367 13:47:43.306038 Finalising connection for namespace 'common'
2368 13:47:43.306231 Disconnecting from shell: Finalise
2369 13:47:43.306320
2370 13:47:43.406669 end: 4.2 read-feedback (duration 00:00:01) [common]
2371 13:47:43.406825 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11884121
2372 13:47:43.510498 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11884121
2373 13:47:43.510808 JobError: Your job cannot terminate cleanly.