Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 13:42:41.558463 lava-dispatcher, installed at version: 2023.08
2 13:42:41.558722 start: 0 validate
3 13:42:41.558853 Start time: 2023-10-26 13:42:41.558845+00:00 (UTC)
4 13:42:41.558975 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:42:41.559100 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 13:42:41.812299 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:42:41.812470 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:42:42.069289 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:42:42.069507 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:42:45.405035 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:42:45.405269 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 13:42:45.657769 validate duration: 4.10
14 13:42:45.658124 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:42:45.658268 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:42:45.658393 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:42:45.658596 Not decompressing ramdisk as can be used compressed.
18 13:42:45.658688 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 13:42:45.658762 saving as /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/ramdisk/initrd.cpio.gz
20 13:42:45.658826 total size: 5432480 (5 MB)
21 13:42:46.285138 progress 0 % (0 MB)
22 13:42:46.286971 progress 5 % (0 MB)
23 13:42:46.288414 progress 10 % (0 MB)
24 13:42:46.289835 progress 15 % (0 MB)
25 13:42:46.291506 progress 20 % (1 MB)
26 13:42:46.292948 progress 25 % (1 MB)
27 13:42:46.294355 progress 30 % (1 MB)
28 13:42:46.295916 progress 35 % (1 MB)
29 13:42:46.297303 progress 40 % (2 MB)
30 13:42:46.298739 progress 45 % (2 MB)
31 13:42:46.300131 progress 50 % (2 MB)
32 13:42:46.301671 progress 55 % (2 MB)
33 13:42:46.303093 progress 60 % (3 MB)
34 13:42:46.304472 progress 65 % (3 MB)
35 13:42:46.306026 progress 70 % (3 MB)
36 13:42:46.307411 progress 75 % (3 MB)
37 13:42:46.308793 progress 80 % (4 MB)
38 13:42:46.310172 progress 85 % (4 MB)
39 13:42:46.311717 progress 90 % (4 MB)
40 13:42:46.313122 progress 95 % (4 MB)
41 13:42:46.314536 progress 100 % (5 MB)
42 13:42:46.314781 5 MB downloaded in 0.66 s (7.90 MB/s)
43 13:42:46.314936 end: 1.1.1 http-download (duration 00:00:01) [common]
45 13:42:46.315175 end: 1.1 download-retry (duration 00:00:01) [common]
46 13:42:46.315261 start: 1.2 download-retry (timeout 00:09:59) [common]
47 13:42:46.315349 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 13:42:46.315487 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 13:42:46.315557 saving as /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/kernel/bzImage
50 13:42:46.315617 total size: 8576912 (8 MB)
51 13:42:46.315676 No compression specified
52 13:42:46.316760 progress 0 % (0 MB)
53 13:42:46.319185 progress 5 % (0 MB)
54 13:42:46.321470 progress 10 % (0 MB)
55 13:42:46.323764 progress 15 % (1 MB)
56 13:42:46.326008 progress 20 % (1 MB)
57 13:42:46.328317 progress 25 % (2 MB)
58 13:42:46.330596 progress 30 % (2 MB)
59 13:42:46.332838 progress 35 % (2 MB)
60 13:42:46.335148 progress 40 % (3 MB)
61 13:42:46.337390 progress 45 % (3 MB)
62 13:42:46.339670 progress 50 % (4 MB)
63 13:42:46.341914 progress 55 % (4 MB)
64 13:42:46.344308 progress 60 % (4 MB)
65 13:42:46.346510 progress 65 % (5 MB)
66 13:42:46.348749 progress 70 % (5 MB)
67 13:42:46.350990 progress 75 % (6 MB)
68 13:42:46.353198 progress 80 % (6 MB)
69 13:42:46.355433 progress 85 % (6 MB)
70 13:42:46.357619 progress 90 % (7 MB)
71 13:42:46.359852 progress 95 % (7 MB)
72 13:42:46.362101 progress 100 % (8 MB)
73 13:42:46.362302 8 MB downloaded in 0.05 s (175.22 MB/s)
74 13:42:46.362446 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:42:46.362710 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:42:46.362795 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:42:46.362879 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:42:46.363007 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 13:42:46.363074 saving as /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/nfsrootfs/full.rootfs.tar
81 13:42:46.363134 total size: 207157356 (197 MB)
82 13:42:46.363200 Using unxz to decompress xz
83 13:42:46.367418 progress 0 % (0 MB)
84 13:42:46.919613 progress 5 % (9 MB)
85 13:42:47.457736 progress 10 % (19 MB)
86 13:42:48.075233 progress 15 % (29 MB)
87 13:42:48.449581 progress 20 % (39 MB)
88 13:42:48.817476 progress 25 % (49 MB)
89 13:42:49.439662 progress 30 % (59 MB)
90 13:42:50.000854 progress 35 % (69 MB)
91 13:42:50.617142 progress 40 % (79 MB)
92 13:42:51.188553 progress 45 % (88 MB)
93 13:42:51.788856 progress 50 % (98 MB)
94 13:42:52.440264 progress 55 % (108 MB)
95 13:42:53.153405 progress 60 % (118 MB)
96 13:42:53.296290 progress 65 % (128 MB)
97 13:42:53.437925 progress 70 % (138 MB)
98 13:42:53.535132 progress 75 % (148 MB)
99 13:42:53.608310 progress 80 % (158 MB)
100 13:42:53.680327 progress 85 % (167 MB)
101 13:42:53.783093 progress 90 % (177 MB)
102 13:42:54.060395 progress 95 % (187 MB)
103 13:42:54.661195 progress 100 % (197 MB)
104 13:42:54.667714 197 MB downloaded in 8.30 s (23.79 MB/s)
105 13:42:54.667985 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:42:54.668258 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:42:54.668347 start: 1.4 download-retry (timeout 00:09:51) [common]
109 13:42:54.668445 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 13:42:54.668608 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 13:42:54.668692 saving as /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/modules/modules.tar
112 13:42:54.668754 total size: 253872 (0 MB)
113 13:42:54.668817 Using unxz to decompress xz
114 13:42:54.672980 progress 12 % (0 MB)
115 13:42:54.673397 progress 25 % (0 MB)
116 13:42:54.673644 progress 38 % (0 MB)
117 13:42:54.675274 progress 51 % (0 MB)
118 13:42:54.677104 progress 64 % (0 MB)
119 13:42:54.679054 progress 77 % (0 MB)
120 13:42:54.680902 progress 90 % (0 MB)
121 13:42:54.682653 progress 100 % (0 MB)
122 13:42:54.688548 0 MB downloaded in 0.02 s (12.24 MB/s)
123 13:42:54.688788 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:42:54.689066 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:42:54.689158 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 13:42:54.689251 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 13:42:58.388103 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11884114/extract-nfsrootfs-ifxrdulp
129 13:42:58.388349 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 13:42:58.388458 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
131 13:42:58.388665 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj
132 13:42:58.388802 makedir: /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin
133 13:42:58.388907 makedir: /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/tests
134 13:42:58.389038 makedir: /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/results
135 13:42:58.389141 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-add-keys
136 13:42:58.389283 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-add-sources
137 13:42:58.389413 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-background-process-start
138 13:42:58.389540 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-background-process-stop
139 13:42:58.389669 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-common-functions
140 13:42:58.389794 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-echo-ipv4
141 13:42:58.389962 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-install-packages
142 13:42:58.390168 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-installed-packages
143 13:42:58.390306 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-os-build
144 13:42:58.390433 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-probe-channel
145 13:42:58.390596 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-probe-ip
146 13:42:58.390721 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-target-ip
147 13:42:58.390845 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-target-mac
148 13:42:58.390969 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-target-storage
149 13:42:58.391108 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-test-case
150 13:42:58.391236 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-test-event
151 13:42:58.391361 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-test-feedback
152 13:42:58.391485 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-test-raise
153 13:42:58.391609 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-test-reference
154 13:42:58.391734 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-test-runner
155 13:42:58.391858 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-test-set
156 13:42:58.391983 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-test-shell
157 13:42:58.392113 Updating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-add-keys (debian)
158 13:42:58.392265 Updating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-add-sources (debian)
159 13:42:58.392412 Updating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-install-packages (debian)
160 13:42:58.392555 Updating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-installed-packages (debian)
161 13:42:58.392700 Updating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/bin/lava-os-build (debian)
162 13:42:58.392822 Creating /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/environment
163 13:42:58.392948 LAVA metadata
164 13:42:58.393018 - LAVA_JOB_ID=11884114
165 13:42:58.393081 - LAVA_DISPATCHER_IP=192.168.201.1
166 13:42:58.393182 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
167 13:42:58.393249 skipped lava-vland-overlay
168 13:42:58.393324 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 13:42:58.393402 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
170 13:42:58.393466 skipped lava-multinode-overlay
171 13:42:58.393538 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 13:42:58.393616 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
173 13:42:58.393687 Loading test definitions
174 13:42:58.393777 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:47) [common]
175 13:42:58.393847 Using /lava-11884114 at stage 0
176 13:42:58.394140 uuid=11884114_1.5.2.3.1 testdef=None
177 13:42:58.394227 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 13:42:58.394313 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
179 13:42:58.394805 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 13:42:58.395022 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
182 13:42:58.395614 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 13:42:58.395842 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
185 13:42:58.396384 runner path: /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/0/tests/0_timesync-off test_uuid 11884114_1.5.2.3.1
186 13:42:58.396553 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 13:42:58.396788 start: 1.5.2.3.5 git-repo-action (timeout 00:09:47) [common]
189 13:42:58.396860 Using /lava-11884114 at stage 0
190 13:42:58.396955 Fetching tests from https://github.com/kernelci/test-definitions.git
191 13:42:58.397033 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/0/tests/1_kselftest-filesystems'
192 13:43:03.390713 Running '/usr/bin/git checkout kernelci.org
193 13:43:03.540095 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
194 13:43:03.540839 uuid=11884114_1.5.2.3.5 testdef=None
195 13:43:03.541043 end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
197 13:43:03.541286 start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
198 13:43:03.542055 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 13:43:03.542298 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
201 13:43:03.543883 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 13:43:03.544274 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
204 13:43:03.545884 runner path: /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/0/tests/1_kselftest-filesystems test_uuid 11884114_1.5.2.3.5
205 13:43:03.546004 BOARD='asus-C436FA-Flip-hatch'
206 13:43:03.546095 BRANCH='cip-gitlab'
207 13:43:03.546182 SKIPFILE='/dev/null'
208 13:43:03.546268 SKIP_INSTALL='True'
209 13:43:03.546353 TESTPROG_URL='None'
210 13:43:03.546455 TST_CASENAME=''
211 13:43:03.546549 TST_CMDFILES='filesystems'
212 13:43:03.546807 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 13:43:03.547177 Creating lava-test-runner.conf files
215 13:43:03.547268 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11884114/lava-overlay-unvsrvjj/lava-11884114/0 for stage 0
216 13:43:03.547407 - 0_timesync-off
217 13:43:03.547518 - 1_kselftest-filesystems
218 13:43:03.547678 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
219 13:43:03.547801 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
220 13:43:11.161224 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
221 13:43:11.161388 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
222 13:43:11.161515 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 13:43:11.161615 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
224 13:43:11.161707 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
225 13:43:11.299307 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 13:43:11.299701 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
227 13:43:11.299823 extracting modules file /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884114/extract-nfsrootfs-ifxrdulp
228 13:43:11.313801 extracting modules file /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884114/extract-overlay-ramdisk-m4nx2bcc/ramdisk
229 13:43:11.327599 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 13:43:11.327718 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
231 13:43:11.327810 [common] Applying overlay to NFS
232 13:43:11.327879 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11884114/compress-overlay-6l9grr6s/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11884114/extract-nfsrootfs-ifxrdulp
233 13:43:12.254367 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 13:43:12.254591 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
235 13:43:12.254691 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 13:43:12.254782 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
237 13:43:12.254867 Building ramdisk /var/lib/lava/dispatcher/tmp/11884114/extract-overlay-ramdisk-m4nx2bcc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11884114/extract-overlay-ramdisk-m4nx2bcc/ramdisk
238 13:43:12.333413 >> 26198 blocks
239 13:43:12.883861 rename /var/lib/lava/dispatcher/tmp/11884114/extract-overlay-ramdisk-m4nx2bcc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/ramdisk/ramdisk.cpio.gz
240 13:43:12.884331 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 13:43:12.884454 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
242 13:43:12.884561 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
243 13:43:12.884663 No mkimage arch provided, not using FIT.
244 13:43:12.884752 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 13:43:12.884838 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 13:43:12.884945 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
247 13:43:12.885038 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
248 13:43:12.885122 No LXC device requested
249 13:43:12.885203 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 13:43:12.885289 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
251 13:43:12.885369 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 13:43:12.885442 Checking files for TFTP limit of 4294967296 bytes.
253 13:43:12.885856 end: 1 tftp-deploy (duration 00:00:27) [common]
254 13:43:12.885960 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 13:43:12.886053 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 13:43:12.886175 substitutions:
257 13:43:12.886245 - {DTB}: None
258 13:43:12.886306 - {INITRD}: 11884114/tftp-deploy-bdkx8l6v/ramdisk/ramdisk.cpio.gz
259 13:43:12.886365 - {KERNEL}: 11884114/tftp-deploy-bdkx8l6v/kernel/bzImage
260 13:43:12.886423 - {LAVA_MAC}: None
261 13:43:12.886479 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11884114/extract-nfsrootfs-ifxrdulp
262 13:43:12.886579 - {NFS_SERVER_IP}: 192.168.201.1
263 13:43:12.886636 - {PRESEED_CONFIG}: None
264 13:43:12.886692 - {PRESEED_LOCAL}: None
265 13:43:12.886746 - {RAMDISK}: 11884114/tftp-deploy-bdkx8l6v/ramdisk/ramdisk.cpio.gz
266 13:43:12.886800 - {ROOT_PART}: None
267 13:43:12.886854 - {ROOT}: None
268 13:43:12.886907 - {SERVER_IP}: 192.168.201.1
269 13:43:12.886960 - {TEE}: None
270 13:43:12.887013 Parsed boot commands:
271 13:43:12.887066 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 13:43:12.887249 Parsed boot commands: tftpboot 192.168.201.1 11884114/tftp-deploy-bdkx8l6v/kernel/bzImage 11884114/tftp-deploy-bdkx8l6v/kernel/cmdline 11884114/tftp-deploy-bdkx8l6v/ramdisk/ramdisk.cpio.gz
273 13:43:12.887337 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 13:43:12.887422 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 13:43:12.887516 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 13:43:12.887601 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 13:43:12.887672 Not connected, no need to disconnect.
278 13:43:12.887745 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 13:43:12.887827 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 13:43:12.887895 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
281 13:43:12.892072 Setting prompt string to ['lava-test: # ']
282 13:43:12.892544 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 13:43:12.892702 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 13:43:12.892850 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 13:43:12.892940 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 13:43:12.893159 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
287 13:43:18.029261 >> Command sent successfully.
288 13:43:18.031688 Returned 0 in 5 seconds
289 13:43:18.132095 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 13:43:18.132537 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 13:43:18.132693 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 13:43:18.132832 Setting prompt string to 'Starting depthcharge on Helios...'
294 13:43:18.132935 Changing prompt to 'Starting depthcharge on Helios...'
295 13:43:18.133033 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 13:43:18.133400 [Enter `^Ec?' for help]
297 13:43:18.752770
298 13:43:18.752961
299 13:43:18.762907 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 13:43:18.765958 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 13:43:18.772982 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 13:43:18.776281 CPU: AES supported, TXT NOT supported, VT supported
303 13:43:18.783121 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 13:43:18.786216 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 13:43:18.792956 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 13:43:18.796597 VBOOT: Loading verstage.
307 13:43:18.799801 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 13:43:18.806416 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 13:43:18.809654 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 13:43:18.812988 CBFS @ c08000 size 3f8000
311 13:43:18.820208 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 13:43:18.823085 CBFS: Locating 'fallback/verstage'
313 13:43:18.826830 CBFS: Found @ offset 10fb80 size 1072c
314 13:43:18.826921
315 13:43:18.826987
316 13:43:18.839566 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 13:43:18.853321 Probing TPM: . done!
318 13:43:18.857158 TPM ready after 0 ms
319 13:43:18.860165 Connected to device vid:did:rid of 1ae0:0028:00
320 13:43:18.870371 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
321 13:43:18.873902 Initialized TPM device CR50 revision 0
322 13:43:18.921607 tlcl_send_startup: Startup return code is 0
323 13:43:18.921723 TPM: setup succeeded
324 13:43:18.933406 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 13:43:18.937481 Chrome EC: UHEPI supported
326 13:43:18.941070 Phase 1
327 13:43:18.943911 FMAP: area GBB found @ c05000 (12288 bytes)
328 13:43:18.950514 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 13:43:18.950620 Phase 2
330 13:43:18.954180 Phase 3
331 13:43:18.957217 FMAP: area GBB found @ c05000 (12288 bytes)
332 13:43:18.963836 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 13:43:18.970643 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
334 13:43:18.974190 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
335 13:43:18.980623 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 13:43:18.995947 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
337 13:43:18.999629 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
338 13:43:19.005895 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 13:43:19.010262 Phase 4
340 13:43:19.013685 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
341 13:43:19.020509 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 13:43:19.199822 VB2:vb2_rsa_verify_digest() Digest check failed!
343 13:43:19.206239 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 13:43:19.206352 Saving nvdata
345 13:43:19.209979 Reboot requested (10020007)
346 13:43:19.213147 board_reset() called!
347 13:43:19.213237 full_reset() called!
348 13:43:23.719388
349 13:43:23.719547
350 13:43:23.729259 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 13:43:23.732560 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 13:43:23.739309 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 13:43:23.742707 CPU: AES supported, TXT NOT supported, VT supported
354 13:43:23.749634 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 13:43:23.752949 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 13:43:23.759390 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 13:43:23.762853 VBOOT: Loading verstage.
358 13:43:23.766096 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 13:43:23.772635 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 13:43:23.775941 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 13:43:23.779250 CBFS @ c08000 size 3f8000
362 13:43:23.785881 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 13:43:23.789093 CBFS: Locating 'fallback/verstage'
364 13:43:23.792572 CBFS: Found @ offset 10fb80 size 1072c
365 13:43:23.796660
366 13:43:23.796742
367 13:43:23.806389 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 13:43:23.821012 Probing TPM: . done!
369 13:43:23.823883 TPM ready after 0 ms
370 13:43:23.827311 Connected to device vid:did:rid of 1ae0:0028:00
371 13:43:23.837166 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
372 13:43:23.841082 Initialized TPM device CR50 revision 0
373 13:43:23.889139 tlcl_send_startup: Startup return code is 0
374 13:43:23.889229 TPM: setup succeeded
375 13:43:23.901763 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 13:43:23.905345 Chrome EC: UHEPI supported
377 13:43:23.908973 Phase 1
378 13:43:23.912261 FMAP: area GBB found @ c05000 (12288 bytes)
379 13:43:23.918779 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 13:43:23.925961 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 13:43:23.928981 Recovery requested (1009000e)
382 13:43:23.934467 Saving nvdata
383 13:43:23.940883 tlcl_extend: response is 0
384 13:43:23.949281 tlcl_extend: response is 0
385 13:43:23.956545 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 13:43:23.960008 CBFS @ c08000 size 3f8000
387 13:43:23.966466 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 13:43:23.969851 CBFS: Locating 'fallback/romstage'
389 13:43:23.973342 CBFS: Found @ offset 80 size 145fc
390 13:43:23.976920 Accumulated console time in verstage 99 ms
391 13:43:23.976993
392 13:43:23.977055
393 13:43:23.989622 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 13:43:23.996353 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 13:43:23.999857 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 13:43:24.002946 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 13:43:24.009428 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 13:43:24.012575 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 13:43:24.015940 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
400 13:43:24.019345 TCO_STS: 0000 0000
401 13:43:24.022433 GEN_PMCON: e0015238 00000200
402 13:43:24.025837 GBLRST_CAUSE: 00000000 00000000
403 13:43:24.025918 prev_sleep_state 5
404 13:43:24.029295 Boot Count incremented to 72274
405 13:43:24.036067 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 13:43:24.039435 CBFS @ c08000 size 3f8000
407 13:43:24.046290 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 13:43:24.046406 CBFS: Locating 'fspm.bin'
409 13:43:24.050048 CBFS: Found @ offset 5ffc0 size 71000
410 13:43:24.053881 Chrome EC: UHEPI supported
411 13:43:24.061126 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 13:43:24.066328 Probing TPM: done!
413 13:43:24.073026 Connected to device vid:did:rid of 1ae0:0028:00
414 13:43:24.082899 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
415 13:43:24.088974 Initialized TPM device CR50 revision 0
416 13:43:24.098281 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 13:43:24.104668 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 13:43:24.108508 MRC cache found, size 1948
419 13:43:24.111661 bootmode is set to: 2
420 13:43:24.114801 PRMRR disabled by config.
421 13:43:24.115222 SPD INDEX = 1
422 13:43:24.121290 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 13:43:24.124705 CBFS @ c08000 size 3f8000
424 13:43:24.131237 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 13:43:24.131658 CBFS: Locating 'spd.bin'
426 13:43:24.134610 CBFS: Found @ offset 5fb80 size 400
427 13:43:24.138060 SPD: module type is LPDDR3
428 13:43:24.141705 SPD: module part is
429 13:43:24.147720 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 13:43:24.151456 SPD: device width 4 bits, bus width 8 bits
431 13:43:24.154227 SPD: module size is 4096 MB (per channel)
432 13:43:24.157638 memory slot: 0 configuration done.
433 13:43:24.161150 memory slot: 2 configuration done.
434 13:43:24.213171 CBMEM:
435 13:43:24.216392 IMD: root @ 99fff000 254 entries.
436 13:43:24.219590 IMD: root @ 99ffec00 62 entries.
437 13:43:24.222815 External stage cache:
438 13:43:24.226360 IMD: root @ 9abff000 254 entries.
439 13:43:24.229750 IMD: root @ 9abfec00 62 entries.
440 13:43:24.233148 Chrome EC: clear events_b mask to 0x0000000020004000
441 13:43:24.253862 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 13:43:24.262387 tlcl_write: response is 0
443 13:43:24.271292 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 13:43:24.277732 MRC: TPM MRC hash updated successfully.
445 13:43:24.278288 2 DIMMs found
446 13:43:24.281152 SMM Memory Map
447 13:43:24.284230 SMRAM : 0x9a000000 0x1000000
448 13:43:24.287961 Subregion 0: 0x9a000000 0xa00000
449 13:43:24.290863 Subregion 1: 0x9aa00000 0x200000
450 13:43:24.294340 Subregion 2: 0x9ac00000 0x400000
451 13:43:24.297545 top_of_ram = 0x9a000000
452 13:43:24.300805 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 13:43:24.307496 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 13:43:24.310946 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 13:43:24.317520 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 13:43:24.321003 CBFS @ c08000 size 3f8000
457 13:43:24.324152 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 13:43:24.327727 CBFS: Locating 'fallback/postcar'
459 13:43:24.330827 CBFS: Found @ offset 107000 size 4b44
460 13:43:24.337579 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 13:43:24.350209 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 13:43:24.353185 Processing 180 relocs. Offset value of 0x97c0c000
463 13:43:24.361947 Accumulated console time in romstage 286 ms
464 13:43:24.362371
465 13:43:24.362813
466 13:43:24.372129 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 13:43:24.378410 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 13:43:24.381783 CBFS @ c08000 size 3f8000
469 13:43:24.385350 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 13:43:24.388451 CBFS: Locating 'fallback/ramstage'
471 13:43:24.395231 CBFS: Found @ offset 43380 size 1b9e8
472 13:43:24.401772 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 13:43:24.433356 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 13:43:24.436689 Processing 3976 relocs. Offset value of 0x98db0000
475 13:43:24.443433 Accumulated console time in postcar 52 ms
476 13:43:24.444087
477 13:43:24.444603
478 13:43:24.453738 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 13:43:24.460108 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 13:43:24.463799 WARNING: RO_VPD is uninitialized or empty.
481 13:43:24.467084 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 13:43:24.472756 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 13:43:24.472861 Normal boot.
484 13:43:24.479598 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 13:43:24.483184 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 13:43:24.486182 CBFS @ c08000 size 3f8000
487 13:43:24.493072 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 13:43:24.496532 CBFS: Locating 'cpu_microcode_blob.bin'
489 13:43:24.499780 CBFS: Found @ offset 14700 size 2ec00
490 13:43:24.502660 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 13:43:24.506647 Skip microcode update
492 13:43:24.509754 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 13:43:24.513081 CBFS @ c08000 size 3f8000
494 13:43:24.519616 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 13:43:24.523078 CBFS: Locating 'fsps.bin'
496 13:43:24.526004 CBFS: Found @ offset d1fc0 size 35000
497 13:43:24.551878 Detected 4 core, 8 thread CPU.
498 13:43:24.555043 Setting up SMI for CPU
499 13:43:24.558031 IED base = 0x9ac00000
500 13:43:24.558295 IED size = 0x00400000
501 13:43:24.561354 Will perform SMM setup.
502 13:43:24.568103 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 13:43:24.575022 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 13:43:24.578006 Processing 16 relocs. Offset value of 0x00030000
505 13:43:24.581675 Attempting to start 7 APs
506 13:43:24.585230 Waiting for 10ms after sending INIT.
507 13:43:24.601669 Waiting for 1st SIPI to complete...done.
508 13:43:24.602090 AP: slot 3 apic_id 1.
509 13:43:24.608210 Waiting for 2nd SIPI to complete...done.
510 13:43:24.608630 AP: slot 2 apic_id 6.
511 13:43:24.611635 AP: slot 7 apic_id 7.
512 13:43:24.615156 AP: slot 4 apic_id 3.
513 13:43:24.615632 AP: slot 1 apic_id 2.
514 13:43:24.618496 AP: slot 5 apic_id 4.
515 13:43:24.621483 AP: slot 6 apic_id 5.
516 13:43:24.628156 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 13:43:24.631198 Processing 13 relocs. Offset value of 0x00038000
518 13:43:24.638274 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 13:43:24.645000 Installing SMM handler to 0x9a000000
520 13:43:24.651133 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 13:43:24.654638 Processing 658 relocs. Offset value of 0x9a010000
522 13:43:24.664660 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 13:43:24.667892 Processing 13 relocs. Offset value of 0x9a008000
524 13:43:24.674326 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 13:43:24.681258 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 13:43:24.687676 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 13:43:24.690825 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 13:43:24.697571 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 13:43:24.704256 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 13:43:24.707723 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 13:43:24.714430 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 13:43:24.717681 Clearing SMI status registers
533 13:43:24.720900 SMI_STS: PM1
534 13:43:24.721423 PM1_STS: PWRBTN
535 13:43:24.724462 TCO_STS: SECOND_TO
536 13:43:24.727242 New SMBASE 0x9a000000
537 13:43:24.730855 In relocation handler: CPU 0
538 13:43:24.733898 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 13:43:24.737436 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 13:43:24.740622 Relocation complete.
541 13:43:24.744282 New SMBASE 0x99fff400
542 13:43:24.744721 In relocation handler: CPU 3
543 13:43:24.750834 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 13:43:24.753904 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 13:43:24.757711 Relocation complete.
546 13:43:24.760635 New SMBASE 0x99ffe400
547 13:43:24.761060 In relocation handler: CPU 7
548 13:43:24.767490 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
549 13:43:24.771089 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 13:43:24.773899 Relocation complete.
551 13:43:24.774681 New SMBASE 0x99ffe800
552 13:43:24.777180 In relocation handler: CPU 6
553 13:43:24.784297 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
554 13:43:24.787566 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 13:43:24.790772 Relocation complete.
556 13:43:24.791190 New SMBASE 0x99ffec00
557 13:43:24.794264 In relocation handler: CPU 5
558 13:43:24.797238 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
559 13:43:24.804139 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 13:43:24.807710 Relocation complete.
561 13:43:24.808128 New SMBASE 0x99fffc00
562 13:43:24.810587 In relocation handler: CPU 1
563 13:43:24.814046 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
564 13:43:24.820829 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 13:43:24.821259 Relocation complete.
566 13:43:24.824338 New SMBASE 0x99fff000
567 13:43:24.827413 In relocation handler: CPU 4
568 13:43:24.830712 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
569 13:43:24.837754 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 13:43:24.838228 Relocation complete.
571 13:43:24.840908 New SMBASE 0x99fff800
572 13:43:24.844179 In relocation handler: CPU 2
573 13:43:24.847605 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
574 13:43:24.854251 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 13:43:24.854719 Relocation complete.
576 13:43:24.857698 Initializing CPU #0
577 13:43:24.860804 CPU: vendor Intel device 806ec
578 13:43:24.864242 CPU: family 06, model 8e, stepping 0c
579 13:43:24.867945 Clearing out pending MCEs
580 13:43:24.870627 Setting up local APIC...
581 13:43:24.871047 apic_id: 0x00 done.
582 13:43:24.874173 Turbo is available but hidden
583 13:43:24.877584 Turbo is available and visible
584 13:43:24.880586 VMX status: enabled
585 13:43:24.884262 IA32_FEATURE_CONTROL status: locked
586 13:43:24.887334 Skip microcode update
587 13:43:24.887759 CPU #0 initialized
588 13:43:24.890593 Initializing CPU #3
589 13:43:24.891023 Initializing CPU #2
590 13:43:24.893748 Initializing CPU #7
591 13:43:24.897292 CPU: vendor Intel device 806ec
592 13:43:24.900409 CPU: family 06, model 8e, stepping 0c
593 13:43:24.903979 CPU: vendor Intel device 806ec
594 13:43:24.906955 CPU: family 06, model 8e, stepping 0c
595 13:43:24.910317 Clearing out pending MCEs
596 13:43:24.913763 Clearing out pending MCEs
597 13:43:24.917193 Setting up local APIC...
598 13:43:24.917617 CPU: vendor Intel device 806ec
599 13:43:24.923934 CPU: family 06, model 8e, stepping 0c
600 13:43:24.924511 Clearing out pending MCEs
601 13:43:24.927227 Initializing CPU #1
602 13:43:24.930233 Initializing CPU #4
603 13:43:24.933952 CPU: vendor Intel device 806ec
604 13:43:24.936783 CPU: family 06, model 8e, stepping 0c
605 13:43:24.940908 CPU: vendor Intel device 806ec
606 13:43:24.943784 CPU: family 06, model 8e, stepping 0c
607 13:43:24.947146 Clearing out pending MCEs
608 13:43:24.947583 Clearing out pending MCEs
609 13:43:24.950049 Setting up local APIC...
610 13:43:24.953554 Initializing CPU #6
611 13:43:24.953983 Initializing CPU #5
612 13:43:24.956731 CPU: vendor Intel device 806ec
613 13:43:24.960225 CPU: family 06, model 8e, stepping 0c
614 13:43:24.964085 apic_id: 0x02 done.
615 13:43:24.967205 Setting up local APIC...
616 13:43:24.970298 CPU: vendor Intel device 806ec
617 13:43:24.973483 CPU: family 06, model 8e, stepping 0c
618 13:43:24.976686 Clearing out pending MCEs
619 13:43:24.980245 Clearing out pending MCEs
620 13:43:24.980672 Setting up local APIC...
621 13:43:24.983481 Setting up local APIC...
622 13:43:24.986619 Setting up local APIC...
623 13:43:24.989944 apic_id: 0x01 done.
624 13:43:24.990370 apic_id: 0x05 done.
625 13:43:24.993517 apic_id: 0x04 done.
626 13:43:24.993945 VMX status: enabled
627 13:43:24.996743 VMX status: enabled
628 13:43:24.999935 IA32_FEATURE_CONTROL status: locked
629 13:43:25.003627 apic_id: 0x06 done.
630 13:43:25.006603 Setting up local APIC...
631 13:43:25.009805 IA32_FEATURE_CONTROL status: locked
632 13:43:25.010231 apic_id: 0x03 done.
633 13:43:25.013577 VMX status: enabled
634 13:43:25.014003 VMX status: enabled
635 13:43:25.020032 IA32_FEATURE_CONTROL status: locked
636 13:43:25.023182 IA32_FEATURE_CONTROL status: locked
637 13:43:25.023609 Skip microcode update
638 13:43:25.026389 Skip microcode update
639 13:43:25.029868 CPU #1 initialized
640 13:43:25.030324 CPU #4 initialized
641 13:43:25.032972 VMX status: enabled
642 13:43:25.033400 Skip microcode update
643 13:43:25.039703 IA32_FEATURE_CONTROL status: locked
644 13:43:25.040133 CPU #6 initialized
645 13:43:25.043126 Skip microcode update
646 13:43:25.043558 apic_id: 0x07 done.
647 13:43:25.046690 VMX status: enabled
648 13:43:25.049532 VMX status: enabled
649 13:43:25.053185 IA32_FEATURE_CONTROL status: locked
650 13:43:25.056345 IA32_FEATURE_CONTROL status: locked
651 13:43:25.059767 Skip microcode update
652 13:43:25.060185 Skip microcode update
653 13:43:25.063416 CPU #2 initialized
654 13:43:25.063836 CPU #5 initialized
655 13:43:25.066648 CPU #7 initialized
656 13:43:25.069848 Skip microcode update
657 13:43:25.070262 CPU #3 initialized
658 13:43:25.076468 bsp_do_flight_plan done after 466 msecs.
659 13:43:25.076889 CPU: frequency set to 4200 MHz
660 13:43:25.079776 Enabling SMIs.
661 13:43:25.080191 Locking SMM.
662 13:43:25.095581 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 13:43:25.099056 CBFS @ c08000 size 3f8000
664 13:43:25.105626 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 13:43:25.106047 CBFS: Locating 'vbt.bin'
666 13:43:25.108818 CBFS: Found @ offset 5f5c0 size 499
667 13:43:25.115997 Found a VBT of 4608 bytes after decompression
668 13:43:25.300844 Display FSP Version Info HOB
669 13:43:25.304285 Reference Code - CPU = 9.0.1e.30
670 13:43:25.307359 uCode Version = 0.0.0.ca
671 13:43:25.310945 TXT ACM version = ff.ff.ff.ffff
672 13:43:25.313928 Display FSP Version Info HOB
673 13:43:25.317120 Reference Code - ME = 9.0.1e.30
674 13:43:25.320693 MEBx version = 0.0.0.0
675 13:43:25.324262 ME Firmware Version = Consumer SKU
676 13:43:25.327378 Display FSP Version Info HOB
677 13:43:25.330594 Reference Code - CML PCH = 9.0.1e.30
678 13:43:25.334184 PCH-CRID Status = Disabled
679 13:43:25.337180 PCH-CRID Original Value = ff.ff.ff.ffff
680 13:43:25.340478 PCH-CRID New Value = ff.ff.ff.ffff
681 13:43:25.343859 OPROM - RST - RAID = ff.ff.ff.ffff
682 13:43:25.347544 ChipsetInit Base Version = ff.ff.ff.ffff
683 13:43:25.350219 ChipsetInit Oem Version = ff.ff.ff.ffff
684 13:43:25.353653 Display FSP Version Info HOB
685 13:43:25.360234 Reference Code - SA - System Agent = 9.0.1e.30
686 13:43:25.363395 Reference Code - MRC = 0.7.1.6c
687 13:43:25.363816 SA - PCIe Version = 9.0.1e.30
688 13:43:25.367008 SA-CRID Status = Disabled
689 13:43:25.370270 SA-CRID Original Value = 0.0.0.c
690 13:43:25.373398 SA-CRID New Value = 0.0.0.c
691 13:43:25.377119 OPROM - VBIOS = ff.ff.ff.ffff
692 13:43:25.380821 RTC Init
693 13:43:25.383673 Set power on after power failure.
694 13:43:25.384409 Disabling Deep S3
695 13:43:25.386895 Disabling Deep S3
696 13:43:25.387470 Disabling Deep S4
697 13:43:25.389914 Disabling Deep S4
698 13:43:25.390469 Disabling Deep S5
699 13:43:25.393610 Disabling Deep S5
700 13:43:25.400219 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
701 13:43:25.400857 Enumerating buses...
702 13:43:25.406576 Show all devs... Before device enumeration.
703 13:43:25.407010 Root Device: enabled 1
704 13:43:25.410072 CPU_CLUSTER: 0: enabled 1
705 13:43:25.413488 DOMAIN: 0000: enabled 1
706 13:43:25.417012 APIC: 00: enabled 1
707 13:43:25.417454 PCI: 00:00.0: enabled 1
708 13:43:25.420372 PCI: 00:02.0: enabled 1
709 13:43:25.423446 PCI: 00:04.0: enabled 0
710 13:43:25.423865 PCI: 00:05.0: enabled 0
711 13:43:25.426726 PCI: 00:12.0: enabled 1
712 13:43:25.430297 PCI: 00:12.5: enabled 0
713 13:43:25.433391 PCI: 00:12.6: enabled 0
714 13:43:25.433811 PCI: 00:14.0: enabled 1
715 13:43:25.436700 PCI: 00:14.1: enabled 0
716 13:43:25.440163 PCI: 00:14.3: enabled 1
717 13:43:25.443458 PCI: 00:14.5: enabled 0
718 13:43:25.443879 PCI: 00:15.0: enabled 1
719 13:43:25.446971 PCI: 00:15.1: enabled 1
720 13:43:25.450212 PCI: 00:15.2: enabled 0
721 13:43:25.453284 PCI: 00:15.3: enabled 0
722 13:43:25.453700 PCI: 00:16.0: enabled 1
723 13:43:25.456933 PCI: 00:16.1: enabled 0
724 13:43:25.459925 PCI: 00:16.2: enabled 0
725 13:43:25.460448 PCI: 00:16.3: enabled 0
726 13:43:25.463196 PCI: 00:16.4: enabled 0
727 13:43:25.466725 PCI: 00:16.5: enabled 0
728 13:43:25.470356 PCI: 00:17.0: enabled 1
729 13:43:25.470867 PCI: 00:19.0: enabled 1
730 13:43:25.473456 PCI: 00:19.1: enabled 0
731 13:43:25.476688 PCI: 00:19.2: enabled 0
732 13:43:25.479844 PCI: 00:1a.0: enabled 0
733 13:43:25.480426 PCI: 00:1c.0: enabled 0
734 13:43:25.483356 PCI: 00:1c.1: enabled 0
735 13:43:25.486597 PCI: 00:1c.2: enabled 0
736 13:43:25.489761 PCI: 00:1c.3: enabled 0
737 13:43:25.490330 PCI: 00:1c.4: enabled 0
738 13:43:25.493136 PCI: 00:1c.5: enabled 0
739 13:43:25.496501 PCI: 00:1c.6: enabled 0
740 13:43:25.496917 PCI: 00:1c.7: enabled 0
741 13:43:25.499866 PCI: 00:1d.0: enabled 1
742 13:43:25.503396 PCI: 00:1d.1: enabled 0
743 13:43:25.506155 PCI: 00:1d.2: enabled 0
744 13:43:25.506606 PCI: 00:1d.3: enabled 0
745 13:43:25.509645 PCI: 00:1d.4: enabled 0
746 13:43:25.513204 PCI: 00:1d.5: enabled 1
747 13:43:25.516204 PCI: 00:1e.0: enabled 1
748 13:43:25.516711 PCI: 00:1e.1: enabled 0
749 13:43:25.519603 PCI: 00:1e.2: enabled 1
750 13:43:25.523198 PCI: 00:1e.3: enabled 1
751 13:43:25.526134 PCI: 00:1f.0: enabled 1
752 13:43:25.526700 PCI: 00:1f.1: enabled 1
753 13:43:25.529660 PCI: 00:1f.2: enabled 1
754 13:43:25.532656 PCI: 00:1f.3: enabled 1
755 13:43:25.536137 PCI: 00:1f.4: enabled 1
756 13:43:25.536559 PCI: 00:1f.5: enabled 1
757 13:43:25.539791 PCI: 00:1f.6: enabled 0
758 13:43:25.542987 USB0 port 0: enabled 1
759 13:43:25.543410 I2C: 00:15: enabled 1
760 13:43:25.546255 I2C: 00:5d: enabled 1
761 13:43:25.549305 GENERIC: 0.0: enabled 1
762 13:43:25.549725 I2C: 00:1a: enabled 1
763 13:43:25.552859 I2C: 00:38: enabled 1
764 13:43:25.556078 I2C: 00:39: enabled 1
765 13:43:25.556501 I2C: 00:3a: enabled 1
766 13:43:25.559278 I2C: 00:3b: enabled 1
767 13:43:25.562687 PCI: 00:00.0: enabled 1
768 13:43:25.563109 SPI: 00: enabled 1
769 13:43:25.566241 SPI: 01: enabled 1
770 13:43:25.569210 PNP: 0c09.0: enabled 1
771 13:43:25.569634 USB2 port 0: enabled 1
772 13:43:25.572875 USB2 port 1: enabled 1
773 13:43:25.575924 USB2 port 2: enabled 0
774 13:43:25.579109 USB2 port 3: enabled 0
775 13:43:25.579671 USB2 port 5: enabled 0
776 13:43:25.582563 USB2 port 6: enabled 1
777 13:43:25.586016 USB2 port 9: enabled 1
778 13:43:25.586443 USB3 port 0: enabled 1
779 13:43:25.589411 USB3 port 1: enabled 1
780 13:43:25.592619 USB3 port 2: enabled 1
781 13:43:25.595638 USB3 port 3: enabled 1
782 13:43:25.596064 USB3 port 4: enabled 0
783 13:43:25.599012 APIC: 02: enabled 1
784 13:43:25.599437 APIC: 06: enabled 1
785 13:43:25.602614 APIC: 01: enabled 1
786 13:43:25.605972 APIC: 03: enabled 1
787 13:43:25.606396 APIC: 04: enabled 1
788 13:43:25.609004 APIC: 05: enabled 1
789 13:43:25.612580 APIC: 07: enabled 1
790 13:43:25.613015 Compare with tree...
791 13:43:25.615669 Root Device: enabled 1
792 13:43:25.619118 CPU_CLUSTER: 0: enabled 1
793 13:43:25.619555 APIC: 00: enabled 1
794 13:43:25.622221 APIC: 02: enabled 1
795 13:43:25.626077 APIC: 06: enabled 1
796 13:43:25.626513 APIC: 01: enabled 1
797 13:43:25.629203 APIC: 03: enabled 1
798 13:43:25.632252 APIC: 04: enabled 1
799 13:43:25.632687 APIC: 05: enabled 1
800 13:43:25.635698 APIC: 07: enabled 1
801 13:43:25.638804 DOMAIN: 0000: enabled 1
802 13:43:25.642097 PCI: 00:00.0: enabled 1
803 13:43:25.642556 PCI: 00:02.0: enabled 1
804 13:43:25.645771 PCI: 00:04.0: enabled 0
805 13:43:25.648746 PCI: 00:05.0: enabled 0
806 13:43:25.652186 PCI: 00:12.0: enabled 1
807 13:43:25.655511 PCI: 00:12.5: enabled 0
808 13:43:25.655942 PCI: 00:12.6: enabled 0
809 13:43:25.658732 PCI: 00:14.0: enabled 1
810 13:43:25.662279 USB0 port 0: enabled 1
811 13:43:25.665572 USB2 port 0: enabled 1
812 13:43:25.668847 USB2 port 1: enabled 1
813 13:43:25.669274 USB2 port 2: enabled 0
814 13:43:25.671854 USB2 port 3: enabled 0
815 13:43:25.675463 USB2 port 5: enabled 0
816 13:43:25.678634 USB2 port 6: enabled 1
817 13:43:25.681956 USB2 port 9: enabled 1
818 13:43:25.685039 USB3 port 0: enabled 1
819 13:43:25.685468 USB3 port 1: enabled 1
820 13:43:25.688906 USB3 port 2: enabled 1
821 13:43:25.691740 USB3 port 3: enabled 1
822 13:43:25.695205 USB3 port 4: enabled 0
823 13:43:25.698454 PCI: 00:14.1: enabled 0
824 13:43:25.698927 PCI: 00:14.3: enabled 1
825 13:43:25.702162 PCI: 00:14.5: enabled 0
826 13:43:25.704963 PCI: 00:15.0: enabled 1
827 13:43:25.708751 I2C: 00:15: enabled 1
828 13:43:25.712108 PCI: 00:15.1: enabled 1
829 13:43:25.712605 I2C: 00:5d: enabled 1
830 13:43:25.715251 GENERIC: 0.0: enabled 1
831 13:43:25.718203 PCI: 00:15.2: enabled 0
832 13:43:25.721808 PCI: 00:15.3: enabled 0
833 13:43:25.725227 PCI: 00:16.0: enabled 1
834 13:43:25.725654 PCI: 00:16.1: enabled 0
835 13:43:25.728031 PCI: 00:16.2: enabled 0
836 13:43:25.731395 PCI: 00:16.3: enabled 0
837 13:43:25.734981 PCI: 00:16.4: enabled 0
838 13:43:25.738328 PCI: 00:16.5: enabled 0
839 13:43:25.738849 PCI: 00:17.0: enabled 1
840 13:43:25.741296 PCI: 00:19.0: enabled 1
841 13:43:25.745056 I2C: 00:1a: enabled 1
842 13:43:25.748366 I2C: 00:38: enabled 1
843 13:43:25.748873 I2C: 00:39: enabled 1
844 13:43:25.751307 I2C: 00:3a: enabled 1
845 13:43:25.754784 I2C: 00:3b: enabled 1
846 13:43:25.758087 PCI: 00:19.1: enabled 0
847 13:43:25.761345 PCI: 00:19.2: enabled 0
848 13:43:25.761798 PCI: 00:1a.0: enabled 0
849 13:43:25.764769 PCI: 00:1c.0: enabled 0
850 13:43:25.768022 PCI: 00:1c.1: enabled 0
851 13:43:25.771517 PCI: 00:1c.2: enabled 0
852 13:43:25.774380 PCI: 00:1c.3: enabled 0
853 13:43:25.774863 PCI: 00:1c.4: enabled 0
854 13:43:25.777833 PCI: 00:1c.5: enabled 0
855 13:43:25.781601 PCI: 00:1c.6: enabled 0
856 13:43:25.784389 PCI: 00:1c.7: enabled 0
857 13:43:25.787811 PCI: 00:1d.0: enabled 1
858 13:43:25.788237 PCI: 00:1d.1: enabled 0
859 13:43:25.791423 PCI: 00:1d.2: enabled 0
860 13:43:25.794853 PCI: 00:1d.3: enabled 0
861 13:43:25.797560 PCI: 00:1d.4: enabled 0
862 13:43:25.797986 PCI: 00:1d.5: enabled 1
863 13:43:25.801220 PCI: 00:00.0: enabled 1
864 13:43:25.804567 PCI: 00:1e.0: enabled 1
865 13:43:25.807760 PCI: 00:1e.1: enabled 0
866 13:43:25.811288 PCI: 00:1e.2: enabled 1
867 13:43:25.811713 SPI: 00: enabled 1
868 13:43:25.814213 PCI: 00:1e.3: enabled 1
869 13:43:25.817870 SPI: 01: enabled 1
870 13:43:25.820936 PCI: 00:1f.0: enabled 1
871 13:43:25.821362 PNP: 0c09.0: enabled 1
872 13:43:25.824204 PCI: 00:1f.1: enabled 1
873 13:43:25.827509 PCI: 00:1f.2: enabled 1
874 13:43:25.831067 PCI: 00:1f.3: enabled 1
875 13:43:25.834309 PCI: 00:1f.4: enabled 1
876 13:43:25.834806 PCI: 00:1f.5: enabled 1
877 13:43:25.837291 PCI: 00:1f.6: enabled 0
878 13:43:25.840804 Root Device scanning...
879 13:43:25.844319 scan_static_bus for Root Device
880 13:43:25.847246 CPU_CLUSTER: 0 enabled
881 13:43:25.847669 DOMAIN: 0000 enabled
882 13:43:25.850870 DOMAIN: 0000 scanning...
883 13:43:25.854170 PCI: pci_scan_bus for bus 00
884 13:43:25.857389 PCI: 00:00.0 [8086/0000] ops
885 13:43:25.860554 PCI: 00:00.0 [8086/9b61] enabled
886 13:43:25.864425 PCI: 00:02.0 [8086/0000] bus ops
887 13:43:25.867406 PCI: 00:02.0 [8086/9b41] enabled
888 13:43:25.870600 PCI: 00:04.0 [8086/1903] disabled
889 13:43:25.874034 PCI: 00:08.0 [8086/1911] enabled
890 13:43:25.877826 PCI: 00:12.0 [8086/02f9] enabled
891 13:43:25.880565 PCI: 00:14.0 [8086/0000] bus ops
892 13:43:25.883875 PCI: 00:14.0 [8086/02ed] enabled
893 13:43:25.887253 PCI: 00:14.2 [8086/02ef] enabled
894 13:43:25.890737 PCI: 00:14.3 [8086/02f0] enabled
895 13:43:25.894291 PCI: 00:15.0 [8086/0000] bus ops
896 13:43:25.897283 PCI: 00:15.0 [8086/02e8] enabled
897 13:43:25.900801 PCI: 00:15.1 [8086/0000] bus ops
898 13:43:25.904394 PCI: 00:15.1 [8086/02e9] enabled
899 13:43:25.907135 PCI: 00:16.0 [8086/0000] ops
900 13:43:25.910507 PCI: 00:16.0 [8086/02e0] enabled
901 13:43:25.913937 PCI: 00:17.0 [8086/0000] ops
902 13:43:25.917249 PCI: 00:17.0 [8086/02d3] enabled
903 13:43:25.920777 PCI: 00:19.0 [8086/0000] bus ops
904 13:43:25.924038 PCI: 00:19.0 [8086/02c5] enabled
905 13:43:25.927427 PCI: 00:1d.0 [8086/0000] bus ops
906 13:43:25.930489 PCI: 00:1d.0 [8086/02b0] enabled
907 13:43:25.933950 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 13:43:25.937604 PCI: 00:1e.0 [8086/0000] ops
909 13:43:25.940630 PCI: 00:1e.0 [8086/02a8] enabled
910 13:43:25.944005 PCI: 00:1e.2 [8086/0000] bus ops
911 13:43:25.947028 PCI: 00:1e.2 [8086/02aa] enabled
912 13:43:25.950484 PCI: 00:1e.3 [8086/0000] bus ops
913 13:43:25.954256 PCI: 00:1e.3 [8086/02ab] enabled
914 13:43:25.956928 PCI: 00:1f.0 [8086/0000] bus ops
915 13:43:25.960395 PCI: 00:1f.0 [8086/0284] enabled
916 13:43:25.967088 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 13:43:25.973601 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 13:43:25.976840 PCI: 00:1f.3 [8086/0000] bus ops
919 13:43:25.980150 PCI: 00:1f.3 [8086/02c8] enabled
920 13:43:25.983540 PCI: 00:1f.4 [8086/0000] bus ops
921 13:43:25.987421 PCI: 00:1f.4 [8086/02a3] enabled
922 13:43:25.990258 PCI: 00:1f.5 [8086/0000] bus ops
923 13:43:25.993698 PCI: 00:1f.5 [8086/02a4] enabled
924 13:43:25.997166 PCI: Leftover static devices:
925 13:43:25.997592 PCI: 00:05.0
926 13:43:25.997932 PCI: 00:12.5
927 13:43:26.000304 PCI: 00:12.6
928 13:43:26.000727 PCI: 00:14.1
929 13:43:26.003657 PCI: 00:14.5
930 13:43:26.004214 PCI: 00:15.2
931 13:43:26.006960 PCI: 00:15.3
932 13:43:26.007466 PCI: 00:16.1
933 13:43:26.007924 PCI: 00:16.2
934 13:43:26.010416 PCI: 00:16.3
935 13:43:26.010850 PCI: 00:16.4
936 13:43:26.013618 PCI: 00:16.5
937 13:43:26.014198 PCI: 00:19.1
938 13:43:26.014743 PCI: 00:19.2
939 13:43:26.016576 PCI: 00:1a.0
940 13:43:26.017000 PCI: 00:1c.0
941 13:43:26.020127 PCI: 00:1c.1
942 13:43:26.020551 PCI: 00:1c.2
943 13:43:26.020888 PCI: 00:1c.3
944 13:43:26.023367 PCI: 00:1c.4
945 13:43:26.023791 PCI: 00:1c.5
946 13:43:26.026548 PCI: 00:1c.6
947 13:43:26.027084 PCI: 00:1c.7
948 13:43:26.030431 PCI: 00:1d.1
949 13:43:26.030983 PCI: 00:1d.2
950 13:43:26.031444 PCI: 00:1d.3
951 13:43:26.033688 PCI: 00:1d.4
952 13:43:26.034173 PCI: 00:1d.5
953 13:43:26.036608 PCI: 00:1e.1
954 13:43:26.037030 PCI: 00:1f.1
955 13:43:26.037364 PCI: 00:1f.2
956 13:43:26.040545 PCI: 00:1f.6
957 13:43:26.043719 PCI: Check your devicetree.cb.
958 13:43:26.047126 PCI: 00:02.0 scanning...
959 13:43:26.050289 scan_generic_bus for PCI: 00:02.0
960 13:43:26.053111 scan_generic_bus for PCI: 00:02.0 done
961 13:43:26.056647 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
962 13:43:26.060089 PCI: 00:14.0 scanning...
963 13:43:26.063322 scan_static_bus for PCI: 00:14.0
964 13:43:26.066903 USB0 port 0 enabled
965 13:43:26.070166 USB0 port 0 scanning...
966 13:43:26.073293 scan_static_bus for USB0 port 0
967 13:43:26.073883 USB2 port 0 enabled
968 13:43:26.076600 USB2 port 1 enabled
969 13:43:26.080003 USB2 port 2 disabled
970 13:43:26.080428 USB2 port 3 disabled
971 13:43:26.083120 USB2 port 5 disabled
972 13:43:26.086424 USB2 port 6 enabled
973 13:43:26.086932 USB2 port 9 enabled
974 13:43:26.090150 USB3 port 0 enabled
975 13:43:26.090731 USB3 port 1 enabled
976 13:43:26.092948 USB3 port 2 enabled
977 13:43:26.096607 USB3 port 3 enabled
978 13:43:26.097050 USB3 port 4 disabled
979 13:43:26.099753 USB2 port 0 scanning...
980 13:43:26.103371 scan_static_bus for USB2 port 0
981 13:43:26.106088 scan_static_bus for USB2 port 0 done
982 13:43:26.113333 scan_bus: scanning of bus USB2 port 0 took 9699 usecs
983 13:43:26.116157 USB2 port 1 scanning...
984 13:43:26.119743 scan_static_bus for USB2 port 1
985 13:43:26.122970 scan_static_bus for USB2 port 1 done
986 13:43:26.126303 scan_bus: scanning of bus USB2 port 1 took 9696 usecs
987 13:43:26.129355 USB2 port 6 scanning...
988 13:43:26.132738 scan_static_bus for USB2 port 6
989 13:43:26.136255 scan_static_bus for USB2 port 6 done
990 13:43:26.143026 scan_bus: scanning of bus USB2 port 6 took 9695 usecs
991 13:43:26.146171 USB2 port 9 scanning...
992 13:43:26.149812 scan_static_bus for USB2 port 9
993 13:43:26.152943 scan_static_bus for USB2 port 9 done
994 13:43:26.156003 scan_bus: scanning of bus USB2 port 9 took 9694 usecs
995 13:43:26.159330 USB3 port 0 scanning...
996 13:43:26.163001 scan_static_bus for USB3 port 0
997 13:43:26.166196 scan_static_bus for USB3 port 0 done
998 13:43:26.173139 scan_bus: scanning of bus USB3 port 0 took 9688 usecs
999 13:43:26.176147 USB3 port 1 scanning...
1000 13:43:26.179414 scan_static_bus for USB3 port 1
1001 13:43:26.182767 scan_static_bus for USB3 port 1 done
1002 13:43:26.186059 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
1003 13:43:26.189257 USB3 port 2 scanning...
1004 13:43:26.192724 scan_static_bus for USB3 port 2
1005 13:43:26.196202 scan_static_bus for USB3 port 2 done
1006 13:43:26.202603 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
1007 13:43:26.205989 USB3 port 3 scanning...
1008 13:43:26.209359 scan_static_bus for USB3 port 3
1009 13:43:26.212827 scan_static_bus for USB3 port 3 done
1010 13:43:26.215851 scan_bus: scanning of bus USB3 port 3 took 9690 usecs
1011 13:43:26.222410 scan_static_bus for USB0 port 0 done
1012 13:43:26.225875 scan_bus: scanning of bus USB0 port 0 took 155308 usecs
1013 13:43:26.229605 scan_static_bus for PCI: 00:14.0 done
1014 13:43:26.235807 scan_bus: scanning of bus PCI: 00:14.0 took 172900 usecs
1015 13:43:26.239130 PCI: 00:15.0 scanning...
1016 13:43:26.242462 scan_generic_bus for PCI: 00:15.0
1017 13:43:26.245912 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 13:43:26.249266 scan_generic_bus for PCI: 00:15.0 done
1019 13:43:26.256034 scan_bus: scanning of bus PCI: 00:15.0 took 14304 usecs
1020 13:43:26.259000 PCI: 00:15.1 scanning...
1021 13:43:26.262318 scan_generic_bus for PCI: 00:15.1
1022 13:43:26.265952 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 13:43:26.269048 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 13:43:26.275588 scan_generic_bus for PCI: 00:15.1 done
1025 13:43:26.278975 scan_bus: scanning of bus PCI: 00:15.1 took 18608 usecs
1026 13:43:26.282169 PCI: 00:19.0 scanning...
1027 13:43:26.285562 scan_generic_bus for PCI: 00:19.0
1028 13:43:26.288960 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 13:43:26.295560 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 13:43:26.298516 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 13:43:26.301914 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 13:43:26.305095 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 13:43:26.312230 scan_generic_bus for PCI: 00:19.0 done
1034 13:43:26.315158 scan_bus: scanning of bus PCI: 00:19.0 took 30743 usecs
1035 13:43:26.318831 PCI: 00:1d.0 scanning...
1036 13:43:26.321862 do_pci_scan_bridge for PCI: 00:1d.0
1037 13:43:26.325272 PCI: pci_scan_bus for bus 01
1038 13:43:26.328384 PCI: 01:00.0 [1c5c/1327] enabled
1039 13:43:26.331846 Enabling Common Clock Configuration
1040 13:43:26.335454 L1 Sub-State supported from root port 29
1041 13:43:26.338410 L1 Sub-State Support = 0xf
1042 13:43:26.342133 CommonModeRestoreTime = 0x28
1043 13:43:26.345140 Power On Value = 0x16, Power On Scale = 0x0
1044 13:43:26.348700 ASPM: Enabled L1
1045 13:43:26.355041 scan_bus: scanning of bus PCI: 00:1d.0 took 32813 usecs
1046 13:43:26.355460 PCI: 00:1e.2 scanning...
1047 13:43:26.361749 scan_generic_bus for PCI: 00:1e.2
1048 13:43:26.365257 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 13:43:26.368589 scan_generic_bus for PCI: 00:1e.2 done
1050 13:43:26.375140 scan_bus: scanning of bus PCI: 00:1e.2 took 14032 usecs
1051 13:43:26.375557 PCI: 00:1e.3 scanning...
1052 13:43:26.379001 scan_generic_bus for PCI: 00:1e.3
1053 13:43:26.385417 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 13:43:26.388490 scan_generic_bus for PCI: 00:1e.3 done
1055 13:43:26.392026 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1056 13:43:26.395656 PCI: 00:1f.0 scanning...
1057 13:43:26.398251 scan_static_bus for PCI: 00:1f.0
1058 13:43:26.401794 PNP: 0c09.0 enabled
1059 13:43:26.404903 scan_static_bus for PCI: 00:1f.0 done
1060 13:43:26.411720 scan_bus: scanning of bus PCI: 00:1f.0 took 12064 usecs
1061 13:43:26.412134 PCI: 00:1f.3 scanning...
1062 13:43:26.418341 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1063 13:43:26.421932 PCI: 00:1f.4 scanning...
1064 13:43:26.425251 scan_generic_bus for PCI: 00:1f.4
1065 13:43:26.428234 scan_generic_bus for PCI: 00:1f.4 done
1066 13:43:26.434965 scan_bus: scanning of bus PCI: 00:1f.4 took 10177 usecs
1067 13:43:26.438202 PCI: 00:1f.5 scanning...
1068 13:43:26.441714 scan_generic_bus for PCI: 00:1f.5
1069 13:43:26.445058 scan_generic_bus for PCI: 00:1f.5 done
1070 13:43:26.451915 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1071 13:43:26.454798 scan_bus: scanning of bus DOMAIN: 0000 took 604978 usecs
1072 13:43:26.458362 scan_static_bus for Root Device done
1073 13:43:26.464903 scan_bus: scanning of bus Root Device took 624841 usecs
1074 13:43:26.465408 done
1075 13:43:26.468166 Chrome EC: UHEPI supported
1076 13:43:26.474702 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 13:43:26.481698 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 13:43:26.488712 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 13:43:26.494949 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 13:43:26.497972 SPI flash protection: WPSW=0 SRP0=0
1081 13:43:26.501232 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 13:43:26.508024 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1083 13:43:26.511480 found VGA at PCI: 00:02.0
1084 13:43:26.514709 Setting up VGA for PCI: 00:02.0
1085 13:43:26.517696 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 13:43:26.524575 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 13:43:26.527808 Allocating resources...
1088 13:43:26.528261 Reading resources...
1089 13:43:26.531075 Root Device read_resources bus 0 link: 0
1090 13:43:26.538395 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 13:43:26.541293 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 13:43:26.548222 DOMAIN: 0000 read_resources bus 0 link: 0
1093 13:43:26.554502 PCI: 00:14.0 read_resources bus 0 link: 0
1094 13:43:26.557719 USB0 port 0 read_resources bus 0 link: 0
1095 13:43:26.565430 USB0 port 0 read_resources bus 0 link: 0 done
1096 13:43:26.569001 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 13:43:26.575980 PCI: 00:15.0 read_resources bus 1 link: 0
1098 13:43:26.579338 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 13:43:26.585957 PCI: 00:15.1 read_resources bus 2 link: 0
1100 13:43:26.589446 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 13:43:26.596558 PCI: 00:19.0 read_resources bus 3 link: 0
1102 13:43:26.603153 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 13:43:26.606285 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 13:43:26.612860 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 13:43:26.616318 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 13:43:26.623060 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 13:43:26.626292 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 13:43:26.632971 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 13:43:26.636459 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 13:43:26.643185 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 13:43:26.649451 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 13:43:26.652916 Root Device read_resources bus 0 link: 0 done
1113 13:43:26.656265 Done reading resources.
1114 13:43:26.659843 Show resources in subtree (Root Device)...After reading.
1115 13:43:26.666444 Root Device child on link 0 CPU_CLUSTER: 0
1116 13:43:26.669864 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 13:43:26.670382 APIC: 00
1118 13:43:26.673103 APIC: 02
1119 13:43:26.673540 APIC: 06
1120 13:43:26.676384 APIC: 01
1121 13:43:26.676821 APIC: 03
1122 13:43:26.677198 APIC: 04
1123 13:43:26.679373 APIC: 05
1124 13:43:26.679935 APIC: 07
1125 13:43:26.682649 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 13:43:26.692767 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 13:43:26.743084 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 13:43:26.743554 PCI: 00:00.0
1129 13:43:26.744388 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 13:43:26.744945 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 13:43:26.745438 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 13:43:26.745867 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 13:43:26.792250 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 13:43:26.792720 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 13:43:26.793202 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 13:43:26.793304 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 13:43:26.793592 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 13:43:26.796685 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 13:43:26.806980 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 13:43:26.816765 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 13:43:26.826542 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 13:43:26.836521 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 13:43:26.846439 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 13:43:26.852877 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 13:43:26.856494 PCI: 00:02.0
1146 13:43:26.866178 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 13:43:26.876421 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 13:43:26.886210 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 13:43:26.886327 PCI: 00:04.0
1150 13:43:26.889294 PCI: 00:08.0
1151 13:43:26.899450 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 13:43:26.899533 PCI: 00:12.0
1153 13:43:26.909384 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 13:43:26.912868 PCI: 00:14.0 child on link 0 USB0 port 0
1155 13:43:26.922405 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 13:43:26.929292 USB0 port 0 child on link 0 USB2 port 0
1157 13:43:26.929397 USB2 port 0
1158 13:43:26.932597 USB2 port 1
1159 13:43:26.932703 USB2 port 2
1160 13:43:26.935702 USB2 port 3
1161 13:43:26.935803 USB2 port 5
1162 13:43:26.939289 USB2 port 6
1163 13:43:26.939388 USB2 port 9
1164 13:43:26.942398 USB3 port 0
1165 13:43:26.945838 USB3 port 1
1166 13:43:26.945939 USB3 port 2
1167 13:43:26.949291 USB3 port 3
1168 13:43:26.949393 USB3 port 4
1169 13:43:26.952306 PCI: 00:14.2
1170 13:43:26.962828 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 13:43:26.972283 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 13:43:26.972408 PCI: 00:14.3
1173 13:43:26.982240 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 13:43:26.985535 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 13:43:26.995499 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 13:43:26.998894 I2C: 01:15
1177 13:43:27.001880 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 13:43:27.012234 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 13:43:27.015820 I2C: 02:5d
1180 13:43:27.016199 GENERIC: 0.0
1181 13:43:27.018735 PCI: 00:16.0
1182 13:43:27.028828 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 13:43:27.029385 PCI: 00:17.0
1184 13:43:27.038843 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 13:43:27.048554 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 13:43:27.055438 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 13:43:27.065288 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 13:43:27.072389 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 13:43:27.082164 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 13:43:27.086089 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 13:43:27.095189 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 13:43:27.099009 I2C: 03:1a
1193 13:43:27.099424 I2C: 03:38
1194 13:43:27.099752 I2C: 03:39
1195 13:43:27.102404 I2C: 03:3a
1196 13:43:27.102878 I2C: 03:3b
1197 13:43:27.108889 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 13:43:27.115173 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 13:43:27.125135 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 13:43:27.135112 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 13:43:27.138297 PCI: 01:00.0
1202 13:43:27.148484 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 13:43:27.148920 PCI: 00:1e.0
1204 13:43:27.158499 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 13:43:27.168231 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 13:43:27.175070 PCI: 00:1e.2 child on link 0 SPI: 00
1207 13:43:27.184626 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 13:43:27.185049 SPI: 00
1209 13:43:27.188399 PCI: 00:1e.3 child on link 0 SPI: 01
1210 13:43:27.197887 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 13:43:27.201403 SPI: 01
1212 13:43:27.204793 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 13:43:27.214845 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 13:43:27.221138 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 13:43:27.224846 PNP: 0c09.0
1216 13:43:27.231252 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 13:43:27.234429 PCI: 00:1f.3
1218 13:43:27.244485 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 13:43:27.254989 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 13:43:27.255561 PCI: 00:1f.4
1221 13:43:27.264379 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 13:43:27.274378 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 13:43:27.277481 PCI: 00:1f.5
1224 13:43:27.284258 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 13:43:27.290653 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 13:43:27.297314 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 13:43:27.303964 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 13:43:27.307328 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 13:43:27.310513 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 13:43:27.317261 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 13:43:27.320608 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 13:43:27.327190 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 13:43:27.334161 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 13:43:27.340461 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 13:43:27.350483 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 13:43:27.357243 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 13:43:27.360705 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 13:43:27.366802 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 13:43:27.373179 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 13:43:27.376561 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 13:43:27.379847 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 13:43:27.386733 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 13:43:27.389734 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 13:43:27.396602 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 13:43:27.400138 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 13:43:27.406812 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 13:43:27.410296 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 13:43:27.416782 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 13:43:27.419577 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 13:43:27.426204 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 13:43:27.429706 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 13:43:27.436055 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 13:43:27.439443 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 13:43:27.446309 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 13:43:27.449721 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 13:43:27.456531 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 13:43:27.459493 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 13:43:27.462649 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 13:43:27.469507 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 13:43:27.472721 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 13:43:27.479623 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 13:43:27.485855 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 13:43:27.492792 avoid_fixed_resources: DOMAIN: 0000
1264 13:43:27.496210 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 13:43:27.502357 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 13:43:27.509497 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 13:43:27.519122 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 13:43:27.525908 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 13:43:27.532306 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 13:43:27.542396 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 13:43:27.549534 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 13:43:27.555916 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 13:43:27.565503 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 13:43:27.572624 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 13:43:27.578746 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 13:43:27.582399 Setting resources...
1277 13:43:27.585469 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 13:43:27.592246 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 13:43:27.595427 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 13:43:27.598863 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 13:43:27.602037 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 13:43:27.608999 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 13:43:27.615839 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 13:43:27.621925 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 13:43:27.628522 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 13:43:27.635027 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 13:43:27.638436 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 13:43:27.645641 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 13:43:27.648363 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 13:43:27.654855 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 13:43:27.658457 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 13:43:27.664986 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 13:43:27.668652 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 13:43:27.675048 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 13:43:27.678114 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 13:43:27.685081 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 13:43:27.688455 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 13:43:27.691677 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 13:43:27.698289 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 13:43:27.701450 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 13:43:27.708215 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 13:43:27.711102 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 13:43:27.717902 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 13:43:27.721353 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 13:43:27.727959 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 13:43:27.730999 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 13:43:27.737826 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 13:43:27.741006 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 13:43:27.747931 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 13:43:27.757953 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 13:43:27.764689 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 13:43:27.771274 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 13:43:27.777770 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 13:43:27.784491 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 13:43:27.787327 Root Device assign_resources, bus 0 link: 0
1316 13:43:27.794264 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 13:43:27.800995 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 13:43:27.810820 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 13:43:27.817272 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 13:43:27.824118 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 13:43:27.834255 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 13:43:27.840849 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 13:43:27.847814 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 13:43:27.850827 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 13:43:27.861205 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 13:43:27.867889 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 13:43:27.877451 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 13:43:27.884199 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 13:43:27.887265 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 13:43:27.894509 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 13:43:27.901345 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 13:43:27.907807 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 13:43:27.911378 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 13:43:27.920816 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 13:43:27.927421 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 13:43:27.933876 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 13:43:27.943835 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 13:43:27.950557 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 13:43:27.957311 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 13:43:27.967022 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 13:43:27.973413 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 13:43:27.980211 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 13:43:27.983712 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 13:43:27.993478 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 13:43:28.000091 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 13:43:28.009932 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 13:43:28.013126 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 13:43:28.023125 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 13:43:28.026404 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 13:43:28.035961 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 13:43:28.042758 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 13:43:28.049185 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 13:43:28.052451 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 13:43:28.062843 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 13:43:28.065835 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 13:43:28.068952 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 13:43:28.075843 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 13:43:28.078904 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 13:43:28.085941 LPC: Trying to open IO window from 800 size 1ff
1360 13:43:28.092646 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 13:43:28.102258 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 13:43:28.109078 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 13:43:28.119228 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 13:43:28.122345 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 13:43:28.125883 Root Device assign_resources, bus 0 link: 0
1366 13:43:28.129502 Done setting resources.
1367 13:43:28.135702 Show resources in subtree (Root Device)...After assigning values.
1368 13:43:28.142326 Root Device child on link 0 CPU_CLUSTER: 0
1369 13:43:28.145771 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 13:43:28.146184 APIC: 00
1371 13:43:28.149002 APIC: 02
1372 13:43:28.149412 APIC: 06
1373 13:43:28.149736 APIC: 01
1374 13:43:28.152511 APIC: 03
1375 13:43:28.152921 APIC: 04
1376 13:43:28.153246 APIC: 05
1377 13:43:28.155933 APIC: 07
1378 13:43:28.159093 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 13:43:28.169097 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 13:43:28.178681 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 13:43:28.182095 PCI: 00:00.0
1382 13:43:28.191731 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 13:43:28.201729 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 13:43:28.211824 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 13:43:28.218297 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 13:43:28.228449 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 13:43:28.237954 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 13:43:28.247828 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 13:43:28.257971 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 13:43:28.267919 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 13:43:28.274380 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 13:43:28.284622 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 13:43:28.294418 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 13:43:28.304226 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 13:43:28.314361 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 13:43:28.324509 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 13:43:28.330616 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 13:43:28.334061 PCI: 00:02.0
1399 13:43:28.343665 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 13:43:28.353643 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 13:43:28.363375 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 13:43:28.366885 PCI: 00:04.0
1403 13:43:28.367313 PCI: 00:08.0
1404 13:43:28.376798 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 13:43:28.380123 PCI: 00:12.0
1406 13:43:28.390340 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 13:43:28.393543 PCI: 00:14.0 child on link 0 USB0 port 0
1408 13:43:28.403156 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 13:43:28.409489 USB0 port 0 child on link 0 USB2 port 0
1410 13:43:28.409919 USB2 port 0
1411 13:43:28.413001 USB2 port 1
1412 13:43:28.413428 USB2 port 2
1413 13:43:28.416570 USB2 port 3
1414 13:43:28.416999 USB2 port 5
1415 13:43:28.419783 USB2 port 6
1416 13:43:28.420233 USB2 port 9
1417 13:43:28.423429 USB3 port 0
1418 13:43:28.423855 USB3 port 1
1419 13:43:28.426364 USB3 port 2
1420 13:43:28.426857 USB3 port 3
1421 13:43:28.429920 USB3 port 4
1422 13:43:28.432907 PCI: 00:14.2
1423 13:43:28.443056 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 13:43:28.453014 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 13:43:28.453595 PCI: 00:14.3
1426 13:43:28.462582 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 13:43:28.469092 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 13:43:28.479312 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 13:43:28.479748 I2C: 01:15
1430 13:43:28.485737 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 13:43:28.495832 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 13:43:28.496268 I2C: 02:5d
1433 13:43:28.498979 GENERIC: 0.0
1434 13:43:28.499454 PCI: 00:16.0
1435 13:43:28.508724 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 13:43:28.512201 PCI: 00:17.0
1437 13:43:28.522091 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 13:43:28.532119 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 13:43:28.541706 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 13:43:28.548222 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 13:43:28.558353 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 13:43:28.568122 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 13:43:28.574963 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 13:43:28.584881 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 13:43:28.585442 I2C: 03:1a
1446 13:43:28.588166 I2C: 03:38
1447 13:43:28.588581 I2C: 03:39
1448 13:43:28.591367 I2C: 03:3a
1449 13:43:28.591886 I2C: 03:3b
1450 13:43:28.594773 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 13:43:28.605168 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 13:43:28.614310 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 13:43:28.624268 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 13:43:28.627824 PCI: 01:00.0
1455 13:43:28.637612 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 13:43:28.640998 PCI: 00:1e.0
1457 13:43:28.650642 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 13:43:28.660569 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 13:43:28.663796 PCI: 00:1e.2 child on link 0 SPI: 00
1460 13:43:28.673644 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 13:43:28.677195 SPI: 00
1462 13:43:28.680639 PCI: 00:1e.3 child on link 0 SPI: 01
1463 13:43:28.690264 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 13:43:28.693497 SPI: 01
1465 13:43:28.697454 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 13:43:28.704083 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 13:43:28.713293 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 13:43:28.716833 PNP: 0c09.0
1469 13:43:28.723862 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 13:43:28.726928 PCI: 00:1f.3
1471 13:43:28.737020 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 13:43:28.746505 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 13:43:28.750247 PCI: 00:1f.4
1474 13:43:28.756366 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 13:43:28.765931 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 13:43:28.769506 PCI: 00:1f.5
1477 13:43:28.779265 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 13:43:28.782698 Done allocating resources.
1479 13:43:28.789116 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 13:43:28.789198 Enabling resources...
1481 13:43:28.796397 PCI: 00:00.0 subsystem <- 8086/9b61
1482 13:43:28.796477 PCI: 00:00.0 cmd <- 06
1483 13:43:28.799504 PCI: 00:02.0 subsystem <- 8086/9b41
1484 13:43:28.803230 PCI: 00:02.0 cmd <- 03
1485 13:43:28.806290 PCI: 00:08.0 cmd <- 06
1486 13:43:28.809648 PCI: 00:12.0 subsystem <- 8086/02f9
1487 13:43:28.812848 PCI: 00:12.0 cmd <- 02
1488 13:43:28.816247 PCI: 00:14.0 subsystem <- 8086/02ed
1489 13:43:28.819999 PCI: 00:14.0 cmd <- 02
1490 13:43:28.822756 PCI: 00:14.2 cmd <- 02
1491 13:43:28.826327 PCI: 00:14.3 subsystem <- 8086/02f0
1492 13:43:28.826409 PCI: 00:14.3 cmd <- 02
1493 13:43:28.833527 PCI: 00:15.0 subsystem <- 8086/02e8
1494 13:43:28.833607 PCI: 00:15.0 cmd <- 02
1495 13:43:28.836164 PCI: 00:15.1 subsystem <- 8086/02e9
1496 13:43:28.839669 PCI: 00:15.1 cmd <- 02
1497 13:43:28.843609 PCI: 00:16.0 subsystem <- 8086/02e0
1498 13:43:28.846328 PCI: 00:16.0 cmd <- 02
1499 13:43:28.849743 PCI: 00:17.0 subsystem <- 8086/02d3
1500 13:43:28.852968 PCI: 00:17.0 cmd <- 03
1501 13:43:28.856657 PCI: 00:19.0 subsystem <- 8086/02c5
1502 13:43:28.859420 PCI: 00:19.0 cmd <- 02
1503 13:43:28.862950 PCI: 00:1d.0 bridge ctrl <- 0013
1504 13:43:28.866388 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 13:43:28.869450 PCI: 00:1d.0 cmd <- 06
1506 13:43:28.872982 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 13:43:28.875925 PCI: 00:1e.0 cmd <- 06
1508 13:43:28.879709 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 13:43:28.883389 PCI: 00:1e.2 cmd <- 06
1510 13:43:28.885936 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 13:43:28.886016 PCI: 00:1e.3 cmd <- 02
1512 13:43:28.892728 PCI: 00:1f.0 subsystem <- 8086/0284
1513 13:43:28.892808 PCI: 00:1f.0 cmd <- 407
1514 13:43:28.896039 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 13:43:28.899428 PCI: 00:1f.3 cmd <- 02
1516 13:43:28.902692 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 13:43:28.905793 PCI: 00:1f.4 cmd <- 03
1518 13:43:28.909042 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 13:43:28.912770 PCI: 00:1f.5 cmd <- 406
1520 13:43:28.921423 PCI: 01:00.0 cmd <- 02
1521 13:43:28.926722 done.
1522 13:43:28.940740 ME: Version: 14.0.39.1367
1523 13:43:28.947449 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1524 13:43:28.950365 Initializing devices...
1525 13:43:28.950444 Root Device init ...
1526 13:43:28.956922 Chrome EC: Set SMI mask to 0x0000000000000000
1527 13:43:28.960283 Chrome EC: clear events_b mask to 0x0000000000000000
1528 13:43:28.967146 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 13:43:28.973622 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 13:43:28.980219 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 13:43:28.983146 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 13:43:28.989713 Root Device init finished in 35186 usecs
1533 13:43:28.989794 CPU_CLUSTER: 0 init ...
1534 13:43:28.996777 CPU_CLUSTER: 0 init finished in 2449 usecs
1535 13:43:29.001165 PCI: 00:00.0 init ...
1536 13:43:29.004387 CPU TDP: 15 Watts
1537 13:43:29.007999 CPU PL2 = 64 Watts
1538 13:43:29.011368 PCI: 00:00.0 init finished in 7075 usecs
1539 13:43:29.014276 PCI: 00:02.0 init ...
1540 13:43:29.017765 PCI: 00:02.0 init finished in 2254 usecs
1541 13:43:29.021151 PCI: 00:08.0 init ...
1542 13:43:29.024905 PCI: 00:08.0 init finished in 2253 usecs
1543 13:43:29.027702 PCI: 00:12.0 init ...
1544 13:43:29.030992 PCI: 00:12.0 init finished in 2253 usecs
1545 13:43:29.034346 PCI: 00:14.0 init ...
1546 13:43:29.037855 PCI: 00:14.0 init finished in 2252 usecs
1547 13:43:29.041201 PCI: 00:14.2 init ...
1548 13:43:29.044299 PCI: 00:14.2 init finished in 2246 usecs
1549 13:43:29.047770 PCI: 00:14.3 init ...
1550 13:43:29.051002 PCI: 00:14.3 init finished in 2270 usecs
1551 13:43:29.054622 PCI: 00:15.0 init ...
1552 13:43:29.057788 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 13:43:29.061186 PCI: 00:15.0 init finished in 5980 usecs
1554 13:43:29.064097 PCI: 00:15.1 init ...
1555 13:43:29.067815 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 13:43:29.071208 PCI: 00:15.1 init finished in 5980 usecs
1557 13:43:29.074810 PCI: 00:16.0 init ...
1558 13:43:29.077861 PCI: 00:16.0 init finished in 2254 usecs
1559 13:43:29.081917 PCI: 00:19.0 init ...
1560 13:43:29.084927 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 13:43:29.091547 PCI: 00:19.0 init finished in 5980 usecs
1562 13:43:29.091633 PCI: 00:1d.0 init ...
1563 13:43:29.094852 Initializing PCH PCIe bridge.
1564 13:43:29.098280 PCI: 00:1d.0 init finished in 5289 usecs
1565 13:43:29.103337 PCI: 00:1f.0 init ...
1566 13:43:29.106263 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 13:43:29.112618 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 13:43:29.112702 IOAPIC: ID = 0x02
1569 13:43:29.116280 IOAPIC: Dumping registers
1570 13:43:29.119545 reg 0x0000: 0x02000000
1571 13:43:29.122953 reg 0x0001: 0x00770020
1572 13:43:29.126252 reg 0x0002: 0x00000000
1573 13:43:29.129290 PCI: 00:1f.0 init finished in 23551 usecs
1574 13:43:29.132772 PCI: 00:1f.4 init ...
1575 13:43:29.135875 PCI: 00:1f.4 init finished in 2264 usecs
1576 13:43:29.147458 PCI: 01:00.0 init ...
1577 13:43:29.150479 PCI: 01:00.0 init finished in 2253 usecs
1578 13:43:29.154853 PNP: 0c09.0 init ...
1579 13:43:29.158339 Google Chrome EC uptime: 11.101 seconds
1580 13:43:29.164883 Google Chrome AP resets since EC boot: 0
1581 13:43:29.168266 Google Chrome most recent AP reset causes:
1582 13:43:29.175137 Google Chrome EC reset flags at last EC boot: reset-pin
1583 13:43:29.178758 PNP: 0c09.0 init finished in 20675 usecs
1584 13:43:29.181441 Devices initialized
1585 13:43:29.185023 Show all devs... After init.
1586 13:43:29.185104 Root Device: enabled 1
1587 13:43:29.188055 CPU_CLUSTER: 0: enabled 1
1588 13:43:29.191405 DOMAIN: 0000: enabled 1
1589 13:43:29.191486 APIC: 00: enabled 1
1590 13:43:29.195031 PCI: 00:00.0: enabled 1
1591 13:43:29.197920 PCI: 00:02.0: enabled 1
1592 13:43:29.201428 PCI: 00:04.0: enabled 0
1593 13:43:29.201509 PCI: 00:05.0: enabled 0
1594 13:43:29.205006 PCI: 00:12.0: enabled 1
1595 13:43:29.207845 PCI: 00:12.5: enabled 0
1596 13:43:29.211573 PCI: 00:12.6: enabled 0
1597 13:43:29.211654 PCI: 00:14.0: enabled 1
1598 13:43:29.214358 PCI: 00:14.1: enabled 0
1599 13:43:29.217671 PCI: 00:14.3: enabled 1
1600 13:43:29.217751 PCI: 00:14.5: enabled 0
1601 13:43:29.221479 PCI: 00:15.0: enabled 1
1602 13:43:29.224535 PCI: 00:15.1: enabled 1
1603 13:43:29.227662 PCI: 00:15.2: enabled 0
1604 13:43:29.227742 PCI: 00:15.3: enabled 0
1605 13:43:29.231227 PCI: 00:16.0: enabled 1
1606 13:43:29.234813 PCI: 00:16.1: enabled 0
1607 13:43:29.237599 PCI: 00:16.2: enabled 0
1608 13:43:29.237679 PCI: 00:16.3: enabled 0
1609 13:43:29.241065 PCI: 00:16.4: enabled 0
1610 13:43:29.244132 PCI: 00:16.5: enabled 0
1611 13:43:29.247889 PCI: 00:17.0: enabled 1
1612 13:43:29.247970 PCI: 00:19.0: enabled 1
1613 13:43:29.251001 PCI: 00:19.1: enabled 0
1614 13:43:29.254453 PCI: 00:19.2: enabled 0
1615 13:43:29.254556 PCI: 00:1a.0: enabled 0
1616 13:43:29.257580 PCI: 00:1c.0: enabled 0
1617 13:43:29.260951 PCI: 00:1c.1: enabled 0
1618 13:43:29.264295 PCI: 00:1c.2: enabled 0
1619 13:43:29.264374 PCI: 00:1c.3: enabled 0
1620 13:43:29.267421 PCI: 00:1c.4: enabled 0
1621 13:43:29.271007 PCI: 00:1c.5: enabled 0
1622 13:43:29.274228 PCI: 00:1c.6: enabled 0
1623 13:43:29.274308 PCI: 00:1c.7: enabled 0
1624 13:43:29.277489 PCI: 00:1d.0: enabled 1
1625 13:43:29.280741 PCI: 00:1d.1: enabled 0
1626 13:43:29.284233 PCI: 00:1d.2: enabled 0
1627 13:43:29.284313 PCI: 00:1d.3: enabled 0
1628 13:43:29.287680 PCI: 00:1d.4: enabled 0
1629 13:43:29.290530 PCI: 00:1d.5: enabled 0
1630 13:43:29.294077 PCI: 00:1e.0: enabled 1
1631 13:43:29.294156 PCI: 00:1e.1: enabled 0
1632 13:43:29.297138 PCI: 00:1e.2: enabled 1
1633 13:43:29.300783 PCI: 00:1e.3: enabled 1
1634 13:43:29.300863 PCI: 00:1f.0: enabled 1
1635 13:43:29.304126 PCI: 00:1f.1: enabled 0
1636 13:43:29.307140 PCI: 00:1f.2: enabled 0
1637 13:43:29.310806 PCI: 00:1f.3: enabled 1
1638 13:43:29.310886 PCI: 00:1f.4: enabled 1
1639 13:43:29.313921 PCI: 00:1f.5: enabled 1
1640 13:43:29.317060 PCI: 00:1f.6: enabled 0
1641 13:43:29.320767 USB0 port 0: enabled 1
1642 13:43:29.320847 I2C: 01:15: enabled 1
1643 13:43:29.323636 I2C: 02:5d: enabled 1
1644 13:43:29.327040 GENERIC: 0.0: enabled 1
1645 13:43:29.327120 I2C: 03:1a: enabled 1
1646 13:43:29.330839 I2C: 03:38: enabled 1
1647 13:43:29.334096 I2C: 03:39: enabled 1
1648 13:43:29.334177 I2C: 03:3a: enabled 1
1649 13:43:29.337066 I2C: 03:3b: enabled 1
1650 13:43:29.340461 PCI: 00:00.0: enabled 1
1651 13:43:29.340541 SPI: 00: enabled 1
1652 13:43:29.343670 SPI: 01: enabled 1
1653 13:43:29.347050 PNP: 0c09.0: enabled 1
1654 13:43:29.347136 USB2 port 0: enabled 1
1655 13:43:29.350231 USB2 port 1: enabled 1
1656 13:43:29.353397 USB2 port 2: enabled 0
1657 13:43:29.353478 USB2 port 3: enabled 0
1658 13:43:29.356861 USB2 port 5: enabled 0
1659 13:43:29.360254 USB2 port 6: enabled 1
1660 13:43:29.363321 USB2 port 9: enabled 1
1661 13:43:29.363401 USB3 port 0: enabled 1
1662 13:43:29.366753 USB3 port 1: enabled 1
1663 13:43:29.370346 USB3 port 2: enabled 1
1664 13:43:29.370452 USB3 port 3: enabled 1
1665 13:43:29.373343 USB3 port 4: enabled 0
1666 13:43:29.376853 APIC: 02: enabled 1
1667 13:43:29.376934 APIC: 06: enabled 1
1668 13:43:29.380442 APIC: 01: enabled 1
1669 13:43:29.383376 APIC: 03: enabled 1
1670 13:43:29.383456 APIC: 04: enabled 1
1671 13:43:29.386945 APIC: 05: enabled 1
1672 13:43:29.387026 APIC: 07: enabled 1
1673 13:43:29.389871 PCI: 00:08.0: enabled 1
1674 13:43:29.393470 PCI: 00:14.2: enabled 1
1675 13:43:29.396663 PCI: 01:00.0: enabled 1
1676 13:43:29.400060 Disabling ACPI via APMC:
1677 13:43:29.400141 done.
1678 13:43:29.406841 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 13:43:29.410172 ELOG: NV offset 0xaf0000 size 0x4000
1680 13:43:29.417100 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 13:43:29.423261 ELOG: Event(17) added with size 13 at 2023-10-26 13:43:29 UTC
1682 13:43:29.430113 ELOG: Event(92) added with size 9 at 2023-10-26 13:43:29 UTC
1683 13:43:29.436879 ELOG: Event(93) added with size 9 at 2023-10-26 13:43:29 UTC
1684 13:43:29.443302 ELOG: Event(9A) added with size 9 at 2023-10-26 13:43:29 UTC
1685 13:43:29.449900 ELOG: Event(9E) added with size 10 at 2023-10-26 13:43:29 UTC
1686 13:43:29.456846 ELOG: Event(9F) added with size 14 at 2023-10-26 13:43:29 UTC
1687 13:43:29.459862 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1688 13:43:29.467172 ELOG: Event(A1) added with size 10 at 2023-10-26 13:43:29 UTC
1689 13:43:29.476793 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 13:43:29.483906 ELOG: Event(A0) added with size 9 at 2023-10-26 13:43:29 UTC
1691 13:43:29.486762 elog_add_boot_reason: Logged dev mode boot
1692 13:43:29.490184 Finalize devices...
1693 13:43:29.490265 PCI: 00:17.0 final
1694 13:43:29.493567 Devices finalized
1695 13:43:29.496511 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 13:43:29.503155 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 13:43:29.506805 ME: HFSTS1 : 0x90000245
1698 13:43:29.510217 ME: HFSTS2 : 0x3B850126
1699 13:43:29.516646 ME: HFSTS3 : 0x00000020
1700 13:43:29.520303 ME: HFSTS4 : 0x00004800
1701 13:43:29.523228 ME: HFSTS5 : 0x00000000
1702 13:43:29.526713 ME: HFSTS6 : 0x40400006
1703 13:43:29.529718 ME: Manufacturing Mode : NO
1704 13:43:29.533016 ME: FW Partition Table : OK
1705 13:43:29.536085 ME: Bringup Loader Failure : NO
1706 13:43:29.539700 ME: Firmware Init Complete : YES
1707 13:43:29.542861 ME: Boot Options Present : NO
1708 13:43:29.546362 ME: Update In Progress : NO
1709 13:43:29.549571 ME: D0i3 Support : YES
1710 13:43:29.553146 ME: Low Power State Enabled : NO
1711 13:43:29.556238 ME: CPU Replaced : NO
1712 13:43:29.559386 ME: CPU Replacement Valid : YES
1713 13:43:29.562840 ME: Current Working State : 5
1714 13:43:29.566125 ME: Current Operation State : 1
1715 13:43:29.569438 ME: Current Operation Mode : 0
1716 13:43:29.572792 ME: Error Code : 0
1717 13:43:29.576002 ME: CPU Debug Disabled : YES
1718 13:43:29.579256 ME: TXT Support : NO
1719 13:43:29.586380 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 13:43:29.592752 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 13:43:29.592862 CBFS @ c08000 size 3f8000
1722 13:43:29.599411 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 13:43:29.602362 CBFS: Locating 'fallback/dsdt.aml'
1724 13:43:29.605607 CBFS: Found @ offset 10bb80 size 3fa5
1725 13:43:29.612444 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 13:43:29.615955 CBFS @ c08000 size 3f8000
1727 13:43:29.622195 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 13:43:29.622303 CBFS: Locating 'fallback/slic'
1729 13:43:29.627621 CBFS: 'fallback/slic' not found.
1730 13:43:29.634554 ACPI: Writing ACPI tables at 99b3e000.
1731 13:43:29.634649 ACPI: * FACS
1732 13:43:29.637500 ACPI: * DSDT
1733 13:43:29.640920 Ramoops buffer: 0x100000@0x99a3d000.
1734 13:43:29.644129 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 13:43:29.650848 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 13:43:29.654066 Google Chrome EC: version:
1737 13:43:29.657318 ro: helios_v2.0.2659-56403530b
1738 13:43:29.660840 rw: helios_v2.0.2849-c41de27e7d
1739 13:43:29.660921 running image: 1
1740 13:43:29.665280 ACPI: * FADT
1741 13:43:29.665352 SCI is IRQ9
1742 13:43:29.672156 ACPI: added table 1/32, length now 40
1743 13:43:29.672265 ACPI: * SSDT
1744 13:43:29.675114 Found 1 CPU(s) with 8 core(s) each.
1745 13:43:29.678763 Error: Could not locate 'wifi_sar' in VPD.
1746 13:43:29.685048 Checking CBFS for default SAR values
1747 13:43:29.688696 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 13:43:29.691942 CBFS @ c08000 size 3f8000
1749 13:43:29.698101 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 13:43:29.701867 CBFS: Locating 'wifi_sar_defaults.hex'
1751 13:43:29.704723 CBFS: Found @ offset 5fac0 size 77
1752 13:43:29.708291 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 13:43:29.714785 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 13:43:29.718139 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 13:43:29.724769 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 13:43:29.728368 failed to find key in VPD: dsm_calib_r0_0
1757 13:43:29.737888 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 13:43:29.741556 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 13:43:29.744547 failed to find key in VPD: dsm_calib_r0_1
1760 13:43:29.754496 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 13:43:29.761146 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 13:43:29.764237 failed to find key in VPD: dsm_calib_r0_2
1763 13:43:29.774566 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 13:43:29.777707 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 13:43:29.784193 failed to find key in VPD: dsm_calib_r0_3
1766 13:43:29.791014 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 13:43:29.797954 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 13:43:29.800622 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 13:43:29.803880 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 13:43:29.808204 EC returned error result code 1
1771 13:43:29.811760 EC returned error result code 1
1772 13:43:29.815500 EC returned error result code 1
1773 13:43:29.822361 PS2K: Bad resp from EC. Vivaldi disabled!
1774 13:43:29.825934 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 13:43:29.832151 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 13:43:29.839045 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 13:43:29.842436 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 13:43:29.849051 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 13:43:29.855464 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 13:43:29.861808 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 13:43:29.865095 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 13:43:29.868705 ACPI: added table 2/32, length now 44
1783 13:43:29.871889 ACPI: * MCFG
1784 13:43:29.875184 ACPI: added table 3/32, length now 48
1785 13:43:29.878670 ACPI: * TPM2
1786 13:43:29.881605 TPM2 log created at 99a2d000
1787 13:43:29.885051 ACPI: added table 4/32, length now 52
1788 13:43:29.885206 ACPI: * MADT
1789 13:43:29.888844 SCI is IRQ9
1790 13:43:29.891869 ACPI: added table 5/32, length now 56
1791 13:43:29.891946 current = 99b43ac0
1792 13:43:29.895166 ACPI: * DMAR
1793 13:43:29.898324 ACPI: added table 6/32, length now 60
1794 13:43:29.901850 ACPI: * IGD OpRegion
1795 13:43:29.901927 GMA: Found VBT in CBFS
1796 13:43:29.905331 GMA: Found valid VBT in CBFS
1797 13:43:29.908124 ACPI: added table 7/32, length now 64
1798 13:43:29.911747 ACPI: * HPET
1799 13:43:29.914920 ACPI: added table 8/32, length now 68
1800 13:43:29.915019 ACPI: done.
1801 13:43:29.918151 ACPI tables: 31744 bytes.
1802 13:43:29.921832 smbios_write_tables: 99a2c000
1803 13:43:29.924886 EC returned error result code 3
1804 13:43:29.928373 Couldn't obtain OEM name from CBI
1805 13:43:29.931904 Create SMBIOS type 17
1806 13:43:29.935015 PCI: 00:00.0 (Intel Cannonlake)
1807 13:43:29.938503 PCI: 00:14.3 (Intel WiFi)
1808 13:43:29.941682 SMBIOS tables: 939 bytes.
1809 13:43:29.944935 Writing table forward entry at 0x00000500
1810 13:43:29.951901 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 13:43:29.954791 Writing coreboot table at 0x99b62000
1812 13:43:29.961829 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 13:43:29.965016 1. 0000000000001000-000000000009ffff: RAM
1814 13:43:29.968249 2. 00000000000a0000-00000000000fffff: RESERVED
1815 13:43:29.974741 3. 0000000000100000-0000000099a2bfff: RAM
1816 13:43:29.981374 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 13:43:29.984322 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 13:43:29.991364 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 13:43:29.994283 7. 000000009a000000-000000009f7fffff: RESERVED
1820 13:43:30.001345 8. 00000000e0000000-00000000efffffff: RESERVED
1821 13:43:30.004404 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 13:43:30.010963 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 13:43:30.014122 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 13:43:30.017750 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 13:43:30.024460 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 13:43:30.027573 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 13:43:30.034023 15. 0000000100000000-000000045e7fffff: RAM
1828 13:43:30.037063 Graphics framebuffer located at 0xc0000000
1829 13:43:30.040534 Passing 5 GPIOs to payload:
1830 13:43:30.043565 NAME | PORT | POLARITY | VALUE
1831 13:43:30.050321 write protect | undefined | high | low
1832 13:43:30.057255 lid | undefined | high | high
1833 13:43:30.060422 power | undefined | high | low
1834 13:43:30.066766 oprom | undefined | high | low
1835 13:43:30.070315 EC in RW | 0x000000cb | high | low
1836 13:43:30.073763 Board ID: 4
1837 13:43:30.077128 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 13:43:30.080118 CBFS @ c08000 size 3f8000
1839 13:43:30.086953 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 13:43:30.093187 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1841 13:43:30.096858 coreboot table: 1492 bytes.
1842 13:43:30.099749 IMD ROOT 0. 99fff000 00001000
1843 13:43:30.103441 IMD SMALL 1. 99ffe000 00001000
1844 13:43:30.106231 FSP MEMORY 2. 99c4e000 003b0000
1845 13:43:30.109718 CONSOLE 3. 99c2e000 00020000
1846 13:43:30.113179 FMAP 4. 99c2d000 0000054e
1847 13:43:30.116362 TIME STAMP 5. 99c2c000 00000910
1848 13:43:30.119881 VBOOT WORK 6. 99c18000 00014000
1849 13:43:30.122924 MRC DATA 7. 99c16000 00001958
1850 13:43:30.126300 ROMSTG STCK 8. 99c15000 00001000
1851 13:43:30.129714 AFTER CAR 9. 99c0b000 0000a000
1852 13:43:30.133013 RAMSTAGE 10. 99baf000 0005c000
1853 13:43:30.136599 REFCODE 11. 99b7a000 00035000
1854 13:43:30.139534 SMM BACKUP 12. 99b6a000 00010000
1855 13:43:30.143077 COREBOOT 13. 99b62000 00008000
1856 13:43:30.146366 ACPI 14. 99b3e000 00024000
1857 13:43:30.149811 ACPI GNVS 15. 99b3d000 00001000
1858 13:43:30.153048 RAMOOPS 16. 99a3d000 00100000
1859 13:43:30.156508 TPM2 TCGLOG17. 99a2d000 00010000
1860 13:43:30.159794 SMBIOS 18. 99a2c000 00000800
1861 13:43:30.159886 IMD small region:
1862 13:43:30.163237 IMD ROOT 0. 99ffec00 00000400
1863 13:43:30.166410 FSP RUNTIME 1. 99ffebe0 00000004
1864 13:43:30.169481 EC HOSTEVENT 2. 99ffebc0 00000008
1865 13:43:30.173260 POWER STATE 3. 99ffeb80 00000040
1866 13:43:30.176259 ROMSTAGE 4. 99ffeb60 00000004
1867 13:43:30.183079 MEM INFO 5. 99ffe9a0 000001b9
1868 13:43:30.186357 VPD 6. 99ffe920 0000006c
1869 13:43:30.189736 MTRR: Physical address space:
1870 13:43:30.192709 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 13:43:30.199394 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 13:43:30.206483 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 13:43:30.212708 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 13:43:30.219249 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 13:43:30.225992 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 13:43:30.232442 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 13:43:30.235727 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 13:43:30.239339 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 13:43:30.242333 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 13:43:30.249356 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 13:43:30.252468 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 13:43:30.255926 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 13:43:30.259171 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 13:43:30.265849 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 13:43:30.269166 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 13:43:30.272552 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 13:43:30.275328 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 13:43:30.279533 call enable_fixed_mtrr()
1889 13:43:30.282730 CPU physical address size: 39 bits
1890 13:43:30.289188 MTRR: default type WB/UC MTRR counts: 6/8.
1891 13:43:30.292382 MTRR: WB selected as default type.
1892 13:43:30.299184 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 13:43:30.302277 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 13:43:30.309062 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 13:43:30.315565 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 13:43:30.322230 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 13:43:30.329044 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 13:43:30.332273 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 13:43:30.338695 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 13:43:30.341873 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 13:43:30.345492 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 13:43:30.349126 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 13:43:30.355354 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 13:43:30.358496 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 13:43:30.362156 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 13:43:30.365050 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 13:43:30.371749 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 13:43:30.375206 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 13:43:30.375306
1910 13:43:30.375385 MTRR check
1911 13:43:30.378207 Fixed MTRRs : Enabled
1912 13:43:30.381776 Variable MTRRs: Enabled
1913 13:43:30.381919
1914 13:43:30.384763 call enable_fixed_mtrr()
1915 13:43:30.388869 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1916 13:43:30.391622 CPU physical address size: 39 bits
1917 13:43:30.398242 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 13:43:30.401393 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 13:43:30.404906 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 13:43:30.411773 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 13:43:30.414772 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 13:43:30.418183 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 13:43:30.421658 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 13:43:30.427852 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 13:43:30.431253 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 13:43:30.434648 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 13:43:30.438081 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 13:43:30.444394 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 13:43:30.447749 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 13:43:30.451162 call enable_fixed_mtrr()
1931 13:43:30.454366 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 13:43:30.457966 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 13:43:30.461065 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 13:43:30.467776 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 13:43:30.471486 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 13:43:30.474375 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 13:43:30.477562 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 13:43:30.483954 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 13:43:30.487299 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 13:43:30.491060 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 13:43:30.494186 CBFS @ c08000 size 3f8000
1942 13:43:30.500794 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1943 13:43:30.503880 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 13:43:30.507229 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 13:43:30.510947 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 13:43:30.517129 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 13:43:30.520911 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 13:43:30.523919 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 13:43:30.527064 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 13:43:30.530548 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 13:43:30.537250 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 13:43:30.540683 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 13:43:30.543984 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 13:43:30.546900 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 13:43:30.553799 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 13:43:30.556760 call enable_fixed_mtrr()
1957 13:43:30.560373 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 13:43:30.563360 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 13:43:30.566981 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 13:43:30.570309 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 13:43:30.576810 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 13:43:30.580078 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 13:43:30.583272 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 13:43:30.586764 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 13:43:30.593074 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 13:43:30.596606 CPU physical address size: 39 bits
1967 13:43:30.599746 call enable_fixed_mtrr()
1968 13:43:30.602992 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 13:43:30.606745 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 13:43:30.609765 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 13:43:30.616231 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 13:43:30.619957 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 13:43:30.623237 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 13:43:30.626451 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 13:43:30.633174 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 13:43:30.636185 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 13:43:30.639828 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 13:43:30.643147 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 13:43:30.649694 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 13:43:30.652619 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 13:43:30.656114 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 13:43:30.659600 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 13:43:30.666130 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 13:43:30.669463 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 13:43:30.672865 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 13:43:30.676223 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 13:43:30.682676 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 13:43:30.686274 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 13:43:30.689762 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 13:43:30.693067 call enable_fixed_mtrr()
1991 13:43:30.696205 call enable_fixed_mtrr()
1992 13:43:30.699337 CPU physical address size: 39 bits
1993 13:43:30.702853 CPU physical address size: 39 bits
1994 13:43:30.705957 CPU physical address size: 39 bits
1995 13:43:30.709659 CBFS: Locating 'fallback/payload'
1996 13:43:30.712506 CPU physical address size: 39 bits
1997 13:43:30.716218 call enable_fixed_mtrr()
1998 13:43:30.719162 CBFS: Found @ offset 1c96c0 size 3f798
1999 13:43:30.722514 CPU physical address size: 39 bits
2000 13:43:30.725651 Checking segment from ROM address 0xffdd16f8
2001 13:43:30.732421 Checking segment from ROM address 0xffdd1714
2002 13:43:30.735935 Loading segment from ROM address 0xffdd16f8
2003 13:43:30.739172 code (compression=0)
2004 13:43:30.745681 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 13:43:30.755762 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 13:43:30.758689 it's not compressed!
2007 13:43:30.850152 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 13:43:30.856578 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 13:43:30.860118 Loading segment from ROM address 0xffdd1714
2010 13:43:30.863529 Entry Point 0x30000000
2011 13:43:30.866399 Loaded segments
2012 13:43:30.872167 Finalizing chipset.
2013 13:43:30.875645 Finalizing SMM.
2014 13:43:30.878713 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2015 13:43:30.882547 mp_park_aps done after 0 msecs.
2016 13:43:30.888595 Jumping to boot code at 30000000(99b62000)
2017 13:43:30.895547 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 13:43:30.895960
2019 13:43:30.896286
2020 13:43:30.896590
2021 13:43:30.898780 Starting depthcharge on Helios...
2022 13:43:30.899191
2023 13:43:30.900328 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 13:43:30.900805 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 13:43:30.901201 Setting prompt string to ['hatch:']
2026 13:43:30.901643 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 13:43:30.908512 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 13:43:30.908954
2029 13:43:30.915213 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 13:43:30.915635
2031 13:43:30.921576 board_setup: Info: eMMC controller not present; skipping
2032 13:43:30.921998
2033 13:43:30.925060 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 13:43:30.925488
2035 13:43:30.931610 board_setup: Info: SDHCI controller not present; skipping
2036 13:43:30.932156
2037 13:43:30.938148 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 13:43:30.938623
2039 13:43:30.938968 Wipe memory regions:
2040 13:43:30.939278
2041 13:43:30.941245 [0x00000000001000, 0x000000000a0000)
2042 13:43:30.941665
2043 13:43:30.947360 [0x00000000100000, 0x00000030000000)
2044 13:43:31.011168
2045 13:43:31.013869 [0x00000030657430, 0x00000099a2c000)
2046 13:43:31.151537
2047 13:43:31.154669 [0x00000100000000, 0x0000045e800000)
2048 13:43:32.537305
2049 13:43:32.537821 R8152: Initializing
2050 13:43:32.538161
2051 13:43:32.540190 Version 9 (ocp_data = 6010)
2052 13:43:32.544686
2053 13:43:32.545119 R8152: Done initializing
2054 13:43:32.545562
2055 13:43:32.548179 Adding net device
2056 13:43:33.157464
2057 13:43:33.157623 R8152: Initializing
2058 13:43:33.157695
2059 13:43:33.160601 Version 6 (ocp_data = 5c30)
2060 13:43:33.160684
2061 13:43:33.163839 R8152: Done initializing
2062 13:43:33.163921
2063 13:43:33.166936 net_add_device: Attemp to include the same device
2064 13:43:33.170374
2065 13:43:33.177843 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 13:43:33.177925
2067 13:43:33.177989
2068 13:43:33.178049
2069 13:43:33.178326 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 13:43:33.278644 hatch: tftpboot 192.168.201.1 11884114/tftp-deploy-bdkx8l6v/kernel/bzImage 11884114/tftp-deploy-bdkx8l6v/kernel/cmdline 11884114/tftp-deploy-bdkx8l6v/ramdisk/ramdisk.cpio.gz
2072 13:43:33.278776 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 13:43:33.278861 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 13:43:33.283266 tftpboot 192.168.201.1 11884114/tftp-deploy-bdkx8l6v/kernel/bzIloy-bdkx8l6v/kernel/cmdline 11884114/tftp-deploy-bdkx8l6v/ramdisk/ramdisk.cpio.gz
2075 13:43:33.283349
2076 13:43:33.283412 Waiting for link
2077 13:43:33.484182
2078 13:43:33.484381 done.
2079 13:43:33.484514
2080 13:43:33.484637 MAC: 00:24:32:50:1a:5f
2081 13:43:33.484763
2082 13:43:33.487341 Sending DHCP discover... done.
2083 13:43:33.487517
2084 13:43:33.490393 Waiting for reply... done.
2085 13:43:33.490515
2086 13:43:33.493814 Sending DHCP request... done.
2087 13:43:33.493926
2088 13:43:33.497107 Waiting for reply... done.
2089 13:43:33.497214
2090 13:43:33.500792 My ip is 192.168.201.21
2091 13:43:33.500932
2092 13:43:33.504015 The DHCP server ip is 192.168.201.1
2093 13:43:33.504100
2094 13:43:33.506807 TFTP server IP predefined by user: 192.168.201.1
2095 13:43:33.506962
2096 13:43:33.513312 Bootfile predefined by user: 11884114/tftp-deploy-bdkx8l6v/kernel/bzImage
2097 13:43:33.513425
2098 13:43:33.517242 Sending tftp read request... done.
2099 13:43:33.517379
2100 13:43:33.524248 Waiting for the transfer...
2101 13:43:33.524348
2102 13:43:34.179152 00000000 ################################################################
2103 13:43:34.179696
2104 13:43:34.809237 00080000 ################################################################
2105 13:43:34.809385
2106 13:43:35.361769 00100000 ################################################################
2107 13:43:35.361919
2108 13:43:35.961173 00180000 ################################################################
2109 13:43:35.961360
2110 13:43:36.523424 00200000 ################################################################
2111 13:43:36.523558
2112 13:43:37.077714 00280000 ################################################################
2113 13:43:37.077874
2114 13:43:37.641780 00300000 ################################################################
2115 13:43:37.641965
2116 13:43:38.204470 00380000 ################################################################
2117 13:43:38.204629
2118 13:43:38.756813 00400000 ################################################################
2119 13:43:38.756963
2120 13:43:39.376336 00480000 ################################################################
2121 13:43:39.376481
2122 13:43:39.932621 00500000 ################################################################
2123 13:43:39.932774
2124 13:43:40.497831 00580000 ################################################################
2125 13:43:40.497979
2126 13:43:41.088633 00600000 ################################################################
2127 13:43:41.088780
2128 13:43:41.660687 00680000 ################################################################
2129 13:43:41.661227
2130 13:43:42.315013 00700000 ################################################################
2131 13:43:42.315544
2132 13:43:42.994929 00780000 ################################################################
2133 13:43:42.995556
2134 13:43:43.225041 00800000 ####################### done.
2135 13:43:43.225554
2136 13:43:43.229027 The bootfile was 8576912 bytes long.
2137 13:43:43.229446
2138 13:43:43.231694 Sending tftp read request... done.
2139 13:43:43.232109
2140 13:43:43.235056 Waiting for the transfer...
2141 13:43:43.235471
2142 13:43:43.770450 00000000 ################################################################
2143 13:43:43.770641
2144 13:43:44.337626 00080000 ################################################################
2145 13:43:44.338234
2146 13:43:44.951053 00100000 ################################################################
2147 13:43:44.951205
2148 13:43:45.602247 00180000 ################################################################
2149 13:43:45.602964
2150 13:43:46.224490 00200000 ################################################################
2151 13:43:46.224642
2152 13:43:46.780037 00280000 ################################################################
2153 13:43:46.780187
2154 13:43:47.345699 00300000 ################################################################
2155 13:43:47.345848
2156 13:43:47.947422 00380000 ################################################################
2157 13:43:47.947925
2158 13:43:48.573235 00400000 ################################################################
2159 13:43:48.573410
2160 13:43:49.211441 00480000 ################################################################
2161 13:43:49.211678
2162 13:43:49.798036 00500000 ################################################################ done.
2163 13:43:49.798183
2164 13:43:49.801538 Sending tftp read request... done.
2165 13:43:49.801627
2166 13:43:49.804858 Waiting for the transfer...
2167 13:43:49.804946
2168 13:43:49.805014 00000000 # done.
2169 13:43:49.805097
2170 13:43:49.815124 Command line loaded dynamically from TFTP file: 11884114/tftp-deploy-bdkx8l6v/kernel/cmdline
2171 13:43:49.815699
2172 13:43:49.845357 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11884114/extract-nfsrootfs-ifxrdulp,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2173 13:43:49.845923
2174 13:43:49.848166 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 13:43:49.854488
2176 13:43:49.857655 Shutting down all USB controllers.
2177 13:43:49.858212
2178 13:43:49.858626 Removing current net device
2179 13:43:49.865527
2180 13:43:49.866089 Finalizing coreboot
2181 13:43:49.866462
2182 13:43:49.872045 Exiting depthcharge with code 4 at timestamp: 26314879
2183 13:43:49.872502
2184 13:43:49.872883
2185 13:43:49.873472 Starting kernel ...
2186 13:43:49.873904
2187 13:43:49.875217 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2188 13:43:49.875742 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2189 13:43:49.876147 Setting prompt string to ['Linux version [0-9]']
2190 13:43:49.876515 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2191 13:43:49.876885 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2192 13:43:49.877756
2194 13:48:12.876762 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2196 13:48:12.877862 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2198 13:48:12.878777 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2201 13:48:12.880183 end: 2 depthcharge-action (duration 00:05:00) [common]
2203 13:48:12.881179 Cleaning after the job
2204 13:48:12.881268 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/ramdisk
2205 13:48:12.882373 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/kernel
2206 13:48:12.883731 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/nfsrootfs
2207 13:48:12.979544 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884114/tftp-deploy-bdkx8l6v/modules
2208 13:48:12.980011 start: 4.1 power-off (timeout 00:00:30) [common]
2209 13:48:12.980186 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2210 13:48:13.053092 >> Command sent successfully.
2211 13:48:13.063988 Returned 0 in 0 seconds
2212 13:48:13.165335 end: 4.1 power-off (duration 00:00:00) [common]
2214 13:48:13.167016 start: 4.2 read-feedback (timeout 00:10:00) [common]
2215 13:48:13.168257 Listened to connection for namespace 'common' for up to 1s
2217 13:48:13.169499 Listened to connection for namespace 'common' for up to 1s
2218 13:48:14.169003 Finalising connection for namespace 'common'
2219 13:48:14.169689 Disconnecting from shell: Finalise
2220 13:48:14.170113