Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 13:44:08.250074 lava-dispatcher, installed at version: 2023.08
2 13:44:08.250290 start: 0 validate
3 13:44:08.250420 Start time: 2023-10-26 13:44:08.250413+00:00 (UTC)
4 13:44:08.250542 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:44:08.250681 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 13:44:08.253525 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:44:08.253662 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:44:11.258797 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:44:11.259304 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:44:11.519820 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:44:11.520519 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 13:44:12.030812 validate duration: 3.78
14 13:44:12.031376 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:44:12.031584 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:44:12.031800 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:44:12.032141 Not decompressing ramdisk as can be used compressed.
18 13:44:12.032381 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 13:44:12.032531 saving as /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/ramdisk/initrd.cpio.gz
20 13:44:12.032686 total size: 5671549 (5 MB)
21 13:44:12.034958 progress 0 % (0 MB)
22 13:44:12.038150 progress 5 % (0 MB)
23 13:44:12.041350 progress 10 % (0 MB)
24 13:44:12.044261 progress 15 % (0 MB)
25 13:44:12.047663 progress 20 % (1 MB)
26 13:44:12.050942 progress 25 % (1 MB)
27 13:44:12.053797 progress 30 % (1 MB)
28 13:44:12.056974 progress 35 % (1 MB)
29 13:44:12.060223 progress 40 % (2 MB)
30 13:44:12.063131 progress 45 % (2 MB)
31 13:44:12.065609 progress 50 % (2 MB)
32 13:44:12.067254 progress 55 % (3 MB)
33 13:44:12.068763 progress 60 % (3 MB)
34 13:44:12.070543 progress 65 % (3 MB)
35 13:44:12.072282 progress 70 % (3 MB)
36 13:44:12.073931 progress 75 % (4 MB)
37 13:44:12.075679 progress 80 % (4 MB)
38 13:44:12.077350 progress 85 % (4 MB)
39 13:44:12.078839 progress 90 % (4 MB)
40 13:44:12.080635 progress 95 % (5 MB)
41 13:44:12.082416 progress 100 % (5 MB)
42 13:44:12.082536 5 MB downloaded in 0.05 s (108.50 MB/s)
43 13:44:12.082696 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:44:12.082932 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:44:12.083022 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:44:12.083106 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:44:12.083227 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 13:44:12.083311 saving as /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/kernel/bzImage
50 13:44:12.083373 total size: 8576912 (8 MB)
51 13:44:12.083448 No compression specified
52 13:44:12.084669 progress 0 % (0 MB)
53 13:44:12.087124 progress 5 % (0 MB)
54 13:44:12.089873 progress 10 % (0 MB)
55 13:44:12.092333 progress 15 % (1 MB)
56 13:44:12.094956 progress 20 % (1 MB)
57 13:44:12.097595 progress 25 % (2 MB)
58 13:44:12.099966 progress 30 % (2 MB)
59 13:44:12.102405 progress 35 % (2 MB)
60 13:44:12.104908 progress 40 % (3 MB)
61 13:44:12.107438 progress 45 % (3 MB)
62 13:44:12.110042 progress 50 % (4 MB)
63 13:44:12.112474 progress 55 % (4 MB)
64 13:44:12.115043 progress 60 % (4 MB)
65 13:44:12.117470 progress 65 % (5 MB)
66 13:44:12.119898 progress 70 % (5 MB)
67 13:44:12.122290 progress 75 % (6 MB)
68 13:44:12.124693 progress 80 % (6 MB)
69 13:44:12.127107 progress 85 % (6 MB)
70 13:44:12.129585 progress 90 % (7 MB)
71 13:44:12.132092 progress 95 % (7 MB)
72 13:44:12.134450 progress 100 % (8 MB)
73 13:44:12.134697 8 MB downloaded in 0.05 s (159.39 MB/s)
74 13:44:12.134878 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:44:12.135113 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:44:12.135208 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:44:12.135299 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:44:12.135450 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 13:44:12.135521 saving as /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/nfsrootfs/full.rootfs.tar
81 13:44:12.135584 total size: 126031368 (120 MB)
82 13:44:12.135660 Using unxz to decompress xz
83 13:44:12.140214 progress 0 % (0 MB)
84 13:44:12.648891 progress 5 % (6 MB)
85 13:44:13.160453 progress 10 % (12 MB)
86 13:44:13.680241 progress 15 % (18 MB)
87 13:44:14.216589 progress 20 % (24 MB)
88 13:44:14.574995 progress 25 % (30 MB)
89 13:44:14.922231 progress 30 % (36 MB)
90 13:44:15.197321 progress 35 % (42 MB)
91 13:44:15.387471 progress 40 % (48 MB)
92 13:44:15.760964 progress 45 % (54 MB)
93 13:44:16.143620 progress 50 % (60 MB)
94 13:44:16.495286 progress 55 % (66 MB)
95 13:44:16.865530 progress 60 % (72 MB)
96 13:44:17.215730 progress 65 % (78 MB)
97 13:44:17.615617 progress 70 % (84 MB)
98 13:44:18.037612 progress 75 % (90 MB)
99 13:44:18.460271 progress 80 % (96 MB)
100 13:44:18.570068 progress 85 % (102 MB)
101 13:44:18.735708 progress 90 % (108 MB)
102 13:44:19.082696 progress 95 % (114 MB)
103 13:44:19.463291 progress 100 % (120 MB)
104 13:44:19.468264 120 MB downloaded in 7.33 s (16.39 MB/s)
105 13:44:19.468534 end: 1.3.1 http-download (duration 00:00:07) [common]
107 13:44:19.468875 end: 1.3 download-retry (duration 00:00:07) [common]
108 13:44:19.468966 start: 1.4 download-retry (timeout 00:09:53) [common]
109 13:44:19.469057 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 13:44:19.469214 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 13:44:19.469288 saving as /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/modules/modules.tar
112 13:44:19.469352 total size: 253872 (0 MB)
113 13:44:19.469416 Using unxz to decompress xz
114 13:44:19.473494 progress 12 % (0 MB)
115 13:44:19.473930 progress 25 % (0 MB)
116 13:44:19.474181 progress 38 % (0 MB)
117 13:44:19.475805 progress 51 % (0 MB)
118 13:44:19.477646 progress 64 % (0 MB)
119 13:44:19.479558 progress 77 % (0 MB)
120 13:44:19.481545 progress 90 % (0 MB)
121 13:44:19.483287 progress 100 % (0 MB)
122 13:44:19.489218 0 MB downloaded in 0.02 s (12.19 MB/s)
123 13:44:19.489489 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:44:19.489759 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:44:19.489858 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 13:44:19.489959 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 13:44:22.469168 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11884079/extract-nfsrootfs-g1mevi50
129 13:44:22.469393 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 13:44:22.469523 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 13:44:22.469701 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8
132 13:44:22.469834 makedir: /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin
133 13:44:22.469937 makedir: /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/tests
134 13:44:22.470036 makedir: /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/results
135 13:44:22.470139 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-add-keys
136 13:44:22.470285 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-add-sources
137 13:44:22.470417 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-background-process-start
138 13:44:22.470572 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-background-process-stop
139 13:44:22.470707 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-common-functions
140 13:44:22.470835 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-echo-ipv4
141 13:44:22.471011 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-install-packages
142 13:44:22.471140 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-installed-packages
143 13:44:22.471268 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-os-build
144 13:44:22.471417 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-probe-channel
145 13:44:22.471547 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-probe-ip
146 13:44:22.471747 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-target-ip
147 13:44:22.471878 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-target-mac
148 13:44:22.472005 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-target-storage
149 13:44:22.472135 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-test-case
150 13:44:22.472265 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-test-event
151 13:44:22.472391 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-test-feedback
152 13:44:22.472517 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-test-raise
153 13:44:22.472643 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-test-reference
154 13:44:22.472770 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-test-runner
155 13:44:22.472896 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-test-set
156 13:44:22.473022 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-test-shell
157 13:44:22.473150 Updating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-install-packages (oe)
158 13:44:22.473306 Updating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/bin/lava-installed-packages (oe)
159 13:44:22.473429 Creating /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/environment
160 13:44:22.473525 LAVA metadata
161 13:44:22.473596 - LAVA_JOB_ID=11884079
162 13:44:22.473659 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:44:22.473762 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 13:44:22.473829 skipped lava-vland-overlay
165 13:44:22.473903 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:44:22.473983 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 13:44:22.474044 skipped lava-multinode-overlay
168 13:44:22.474142 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:44:22.474232 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 13:44:22.474305 Loading test definitions
171 13:44:22.474435 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 13:44:22.474534 Using /lava-11884079 at stage 0
173 13:44:22.474646 Fetching tests from https://github.com/kernelci/test-definitions
174 13:44:22.474726 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/0/tests/0_ltp-ipc'
175 13:44:30.802932 Running '/usr/bin/git checkout kernelci.org
176 13:44:30.954093 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 13:44:30.954899 uuid=11884079_1.5.2.3.1 testdef=None
178 13:44:30.955051 end: 1.5.2.3.1 git-repo-action (duration 00:00:08) [common]
180 13:44:30.955351 start: 1.5.2.3.2 test-overlay (timeout 00:09:41) [common]
181 13:44:30.956206 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 13:44:30.956506 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:41) [common]
184 13:44:30.957684 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 13:44:30.957921 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:41) [common]
187 13:44:30.958981 runner path: /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/0/tests/0_ltp-ipc test_uuid 11884079_1.5.2.3.1
188 13:44:30.959071 SKIPFILE='skipfile-lkft.yaml'
189 13:44:30.959134 SKIP_INSTALL='true'
190 13:44:30.959193 TST_CMDFILES='ipc'
191 13:44:30.959336 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 13:44:30.959543 Creating lava-test-runner.conf files
194 13:44:30.959607 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11884079/lava-overlay-jtk068_8/lava-11884079/0 for stage 0
195 13:44:30.959738 - 0_ltp-ipc
196 13:44:30.959841 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
197 13:44:30.959952 start: 1.5.2.4 compress-overlay (timeout 00:09:41) [common]
198 13:44:38.676519 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 13:44:38.676681 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
200 13:44:38.676774 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 13:44:38.676876 end: 1.5.2 lava-overlay (duration 00:00:16) [common]
202 13:44:38.676968 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
203 13:44:38.825000 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 13:44:38.825429 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
205 13:44:38.825558 extracting modules file /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884079/extract-nfsrootfs-g1mevi50
206 13:44:38.839555 extracting modules file /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884079/extract-overlay-ramdisk-daoxce9j/ramdisk
207 13:44:38.853703 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 13:44:38.853865 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
209 13:44:38.853962 [common] Applying overlay to NFS
210 13:44:38.854039 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11884079/compress-overlay-b7yp4nfe/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11884079/extract-nfsrootfs-g1mevi50
211 13:44:39.808120 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 13:44:39.808283 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
213 13:44:39.808384 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 13:44:39.808478 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
215 13:44:39.808588 Building ramdisk /var/lib/lava/dispatcher/tmp/11884079/extract-overlay-ramdisk-daoxce9j/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11884079/extract-overlay-ramdisk-daoxce9j/ramdisk
216 13:44:39.887743 >> 27217 blocks
217 13:44:40.503551 rename /var/lib/lava/dispatcher/tmp/11884079/extract-overlay-ramdisk-daoxce9j/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/ramdisk/ramdisk.cpio.gz
218 13:44:40.504046 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 13:44:40.504179 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
220 13:44:40.504295 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
221 13:44:40.504434 No mkimage arch provided, not using FIT.
222 13:44:40.504560 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 13:44:40.504645 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 13:44:40.504747 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
225 13:44:40.504843 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
226 13:44:40.504932 No LXC device requested
227 13:44:40.505017 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 13:44:40.505107 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
229 13:44:40.505193 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 13:44:40.505268 Checking files for TFTP limit of 4294967296 bytes.
231 13:44:40.505684 end: 1 tftp-deploy (duration 00:00:28) [common]
232 13:44:40.505787 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 13:44:40.505880 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 13:44:40.506012 substitutions:
235 13:44:40.506083 - {DTB}: None
236 13:44:40.506148 - {INITRD}: 11884079/tftp-deploy-gubbjh33/ramdisk/ramdisk.cpio.gz
237 13:44:40.506209 - {KERNEL}: 11884079/tftp-deploy-gubbjh33/kernel/bzImage
238 13:44:40.506268 - {LAVA_MAC}: None
239 13:44:40.506325 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11884079/extract-nfsrootfs-g1mevi50
240 13:44:40.506385 - {NFS_SERVER_IP}: 192.168.201.1
241 13:44:40.506443 - {PRESEED_CONFIG}: None
242 13:44:40.506498 - {PRESEED_LOCAL}: None
243 13:44:40.506554 - {RAMDISK}: 11884079/tftp-deploy-gubbjh33/ramdisk/ramdisk.cpio.gz
244 13:44:40.506610 - {ROOT_PART}: None
245 13:44:40.506666 - {ROOT}: None
246 13:44:40.506756 - {SERVER_IP}: 192.168.201.1
247 13:44:40.506815 - {TEE}: None
248 13:44:40.506871 Parsed boot commands:
249 13:44:40.506925 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 13:44:40.507111 Parsed boot commands: tftpboot 192.168.201.1 11884079/tftp-deploy-gubbjh33/kernel/bzImage 11884079/tftp-deploy-gubbjh33/kernel/cmdline 11884079/tftp-deploy-gubbjh33/ramdisk/ramdisk.cpio.gz
251 13:44:40.507200 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 13:44:40.507288 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 13:44:40.507384 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 13:44:40.507470 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 13:44:40.507541 Not connected, no need to disconnect.
256 13:44:40.507629 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 13:44:40.507732 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 13:44:40.507804 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
259 13:44:40.512102 Setting prompt string to ['lava-test: # ']
260 13:44:40.512559 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 13:44:40.512683 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 13:44:40.512785 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 13:44:40.512882 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 13:44:40.513079 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
265 13:44:45.648461 >> Command sent successfully.
266 13:44:45.651700 Returned 0 in 5 seconds
267 13:44:45.752101 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 13:44:45.752652 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 13:44:45.752795 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 13:44:45.752949 Setting prompt string to 'Starting depthcharge on Helios...'
272 13:44:45.753073 Changing prompt to 'Starting depthcharge on Helios...'
273 13:44:45.753183 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
274 13:44:45.753602 [Enter `^Ec?' for help]
275 13:44:46.373345
276 13:44:46.373516
277 13:44:46.383276 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
278 13:44:46.385901 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
279 13:44:46.393077 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
280 13:44:46.396235 CPU: AES supported, TXT NOT supported, VT supported
281 13:44:46.402668 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
282 13:44:46.405960 PCH: device id 0284 (rev 00) is Cometlake-U Premium
283 13:44:46.413092 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
284 13:44:46.416402 VBOOT: Loading verstage.
285 13:44:46.419770 FMAP: Found "FLASH" version 1.1 at 0xc04000.
286 13:44:46.426571 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
287 13:44:46.429762 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 13:44:46.432957 CBFS @ c08000 size 3f8000
289 13:44:46.439544 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
290 13:44:46.442553 CBFS: Locating 'fallback/verstage'
291 13:44:46.446079 CBFS: Found @ offset 10fb80 size 1072c
292 13:44:46.449900
293 13:44:46.450035
294 13:44:46.459657 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
295 13:44:46.473719 Probing TPM: . done!
296 13:44:46.477490 TPM ready after 0 ms
297 13:44:46.480835 Connected to device vid:did:rid of 1ae0:0028:00
298 13:44:46.490729 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
299 13:44:46.494581 Initialized TPM device CR50 revision 0
300 13:44:46.600497 tlcl_send_startup: Startup return code is 0
301 13:44:46.600711 TPM: setup succeeded
302 13:44:46.612642 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
303 13:44:46.616509 Chrome EC: UHEPI supported
304 13:44:46.620234 Phase 1
305 13:44:46.623320 FMAP: area GBB found @ c05000 (12288 bytes)
306 13:44:46.630016 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 13:44:46.630140 Phase 2
308 13:44:46.633492 Phase 3
309 13:44:46.636797 FMAP: area GBB found @ c05000 (12288 bytes)
310 13:44:46.643475 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 13:44:46.650205 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
312 13:44:46.653452 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
313 13:44:46.660084 VB2:vb2_verify_keyblock() Checking keyblock signature...
314 13:44:46.675421 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
315 13:44:46.678837 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
316 13:44:46.685475 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 13:44:46.689375 Phase 4
318 13:44:46.693547 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
319 13:44:46.700173 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 13:44:46.879078 VB2:vb2_rsa_verify_digest() Digest check failed!
321 13:44:46.885784 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
322 13:44:46.885954 Saving nvdata
323 13:44:46.889065 Reboot requested (10020007)
324 13:44:46.892528 board_reset() called!
325 13:44:46.892643 full_reset() called!
326 13:44:51.444378
327 13:44:51.444551
328 13:44:51.454398 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
329 13:44:51.457547 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
330 13:44:51.464006 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
331 13:44:51.467428 CPU: AES supported, TXT NOT supported, VT supported
332 13:44:51.473873 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
333 13:44:51.477646 PCH: device id 0284 (rev 00) is Cometlake-U Premium
334 13:44:51.484224 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
335 13:44:51.487444 VBOOT: Loading verstage.
336 13:44:51.490813 FMAP: Found "FLASH" version 1.1 at 0xc04000.
337 13:44:51.497323 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
338 13:44:51.500567 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
339 13:44:51.504022 CBFS @ c08000 size 3f8000
340 13:44:51.510759 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
341 13:44:51.514228 CBFS: Locating 'fallback/verstage'
342 13:44:51.516921 CBFS: Found @ offset 10fb80 size 1072c
343 13:44:51.520428
344 13:44:51.520535
345 13:44:51.530587 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
346 13:44:51.544761 Probing TPM: . done!
347 13:44:51.548073 TPM ready after 0 ms
348 13:44:51.551526 Connected to device vid:did:rid of 1ae0:0028:00
349 13:44:51.562248 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
350 13:44:51.565366 Initialized TPM device CR50 revision 0
351 13:44:51.671522 tlcl_send_startup: Startup return code is 0
352 13:44:51.671689 TPM: setup succeeded
353 13:44:51.683888 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
354 13:44:51.687978 Chrome EC: UHEPI supported
355 13:44:51.691477 Phase 1
356 13:44:51.694265 FMAP: area GBB found @ c05000 (12288 bytes)
357 13:44:51.701286 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
358 13:44:51.707726 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
359 13:44:51.711372 Recovery requested (1009000e)
360 13:44:51.711461 Saving nvdata
361 13:44:51.722839 tlcl_extend: response is 0
362 13:44:51.732065 tlcl_extend: response is 0
363 13:44:51.738757 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
364 13:44:51.741912 CBFS @ c08000 size 3f8000
365 13:44:51.748700 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
366 13:44:51.752202 CBFS: Locating 'fallback/romstage'
367 13:44:51.755329 CBFS: Found @ offset 80 size 145fc
368 13:44:51.758455 Accumulated console time in verstage 98 ms
369 13:44:51.758544
370 13:44:51.758611
371 13:44:51.771671 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
372 13:44:51.778298 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
373 13:44:51.781880 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 13:44:51.785034 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 13:44:51.791756 gpe0_sts[1]: 00300000 gpe0_en[1]: 00000000
376 13:44:51.795177 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
377 13:44:51.798552 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
378 13:44:51.801529 TCO_STS: 0000 0000
379 13:44:51.804859 GEN_PMCON: e0015238 00000200
380 13:44:51.808253 GBLRST_CAUSE: 00000000 00000000
381 13:44:51.808362 prev_sleep_state 5
382 13:44:51.811620 Boot Count incremented to 66891
383 13:44:51.818140 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 13:44:51.821373 CBFS @ c08000 size 3f8000
385 13:44:51.828435 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
386 13:44:51.828532 CBFS: Locating 'fspm.bin'
387 13:44:51.834740 CBFS: Found @ offset 5ffc0 size 71000
388 13:44:51.838388 Chrome EC: UHEPI supported
389 13:44:51.845012 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 13:44:51.848535 Probing TPM: done!
391 13:44:51.855296 Connected to device vid:did:rid of 1ae0:0028:00
392 13:44:51.864762 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
393 13:44:51.870675 Initialized TPM device CR50 revision 0
394 13:44:51.880075 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 13:44:51.886471 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 13:44:51.889463 MRC cache found, size 1948
397 13:44:51.892973 bootmode is set to: 2
398 13:44:51.896270 PRMRR disabled by config.
399 13:44:51.896355 SPD INDEX = 1
400 13:44:51.902762 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 13:44:51.906147 CBFS @ c08000 size 3f8000
402 13:44:51.913009 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 13:44:51.913137 CBFS: Locating 'spd.bin'
404 13:44:51.916502 CBFS: Found @ offset 5fb80 size 400
405 13:44:51.919225 SPD: module type is LPDDR3
406 13:44:51.922754 SPD: module part is
407 13:44:51.929336 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
408 13:44:51.932732 SPD: device width 4 bits, bus width 8 bits
409 13:44:51.936003 SPD: module size is 4096 MB (per channel)
410 13:44:51.939354 memory slot: 0 configuration done.
411 13:44:51.942594 memory slot: 2 configuration done.
412 13:44:51.994124 CBMEM:
413 13:44:51.997479 IMD: root @ 99fff000 254 entries.
414 13:44:52.000496 IMD: root @ 99ffec00 62 entries.
415 13:44:52.003745 External stage cache:
416 13:44:52.007272 IMD: root @ 9abff000 254 entries.
417 13:44:52.010391 IMD: root @ 9abfec00 62 entries.
418 13:44:52.013755 Chrome EC: clear events_b mask to 0x0000000020004000
419 13:44:52.030137 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 13:44:52.042926 tlcl_write: response is 0
421 13:44:52.052507 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 13:44:52.058957 MRC: TPM MRC hash updated successfully.
423 13:44:52.059049 2 DIMMs found
424 13:44:52.062853 SMM Memory Map
425 13:44:52.065457 SMRAM : 0x9a000000 0x1000000
426 13:44:52.068784 Subregion 0: 0x9a000000 0xa00000
427 13:44:52.072048 Subregion 1: 0x9aa00000 0x200000
428 13:44:52.075941 Subregion 2: 0x9ac00000 0x400000
429 13:44:52.079084 top_of_ram = 0x9a000000
430 13:44:52.082472 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 13:44:52.088810 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 13:44:52.092061 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 13:44:52.098672 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 13:44:52.101952 CBFS @ c08000 size 3f8000
435 13:44:52.105322 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 13:44:52.108664 CBFS: Locating 'fallback/postcar'
437 13:44:52.111879 CBFS: Found @ offset 107000 size 4b44
438 13:44:52.119087 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 13:44:52.131553 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 13:44:52.134259 Processing 180 relocs. Offset value of 0x97c0c000
441 13:44:52.142782 Accumulated console time in romstage 286 ms
442 13:44:52.142887
443 13:44:52.142969
444 13:44:52.152877 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 13:44:52.159818 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 13:44:52.162941 CBFS @ c08000 size 3f8000
447 13:44:52.166116 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 13:44:52.172745 CBFS: Locating 'fallback/ramstage'
449 13:44:52.176021 CBFS: Found @ offset 43380 size 1b9e8
450 13:44:52.182629 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 13:44:52.214891 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 13:44:52.218223 Processing 3976 relocs. Offset value of 0x98db0000
453 13:44:52.224790 Accumulated console time in postcar 52 ms
454 13:44:52.224907
455 13:44:52.225007
456 13:44:52.234953 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 13:44:52.241422 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 13:44:52.244991 WARNING: RO_VPD is uninitialized or empty.
459 13:44:52.248279 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 13:44:52.254686 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 13:44:52.254802 Normal boot.
462 13:44:52.261521 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 13:44:52.264522 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 13:44:52.268176 CBFS @ c08000 size 3f8000
465 13:44:52.274372 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 13:44:52.277568 CBFS: Locating 'cpu_microcode_blob.bin'
467 13:44:52.280995 CBFS: Found @ offset 14700 size 2ec00
468 13:44:52.284245 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 13:44:52.287531 Skip microcode update
470 13:44:52.294792 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 13:44:52.294906 CBFS @ c08000 size 3f8000
472 13:44:52.301148 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 13:44:52.304324 CBFS: Locating 'fsps.bin'
474 13:44:52.307520 CBFS: Found @ offset d1fc0 size 35000
475 13:44:52.332774 Detected 4 core, 8 thread CPU.
476 13:44:52.336121 Setting up SMI for CPU
477 13:44:52.339501 IED base = 0x9ac00000
478 13:44:52.339619 IED size = 0x00400000
479 13:44:52.342923 Will perform SMM setup.
480 13:44:52.349912 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 13:44:52.356388 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 13:44:52.359490 Processing 16 relocs. Offset value of 0x00030000
483 13:44:52.362869 Attempting to start 7 APs
484 13:44:52.366251 Waiting for 10ms after sending INIT.
485 13:44:52.382554 Waiting for 1st SIPI to complete...done.
486 13:44:52.382755 AP: slot 5 apic_id 1.
487 13:44:52.389479 Waiting for 2nd SIPI to complete...done.
488 13:44:52.389617 AP: slot 6 apic_id 7.
489 13:44:52.392654 AP: slot 7 apic_id 6.
490 13:44:52.395872 AP: slot 1 apic_id 2.
491 13:44:52.395990 AP: slot 3 apic_id 3.
492 13:44:52.399280 AP: slot 2 apic_id 4.
493 13:44:52.402731 AP: slot 4 apic_id 5.
494 13:44:52.409320 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 13:44:52.412737 Processing 13 relocs. Offset value of 0x00038000
496 13:44:52.419544 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
497 13:44:52.426047 Installing SMM handler to 0x9a000000
498 13:44:52.432162 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 13:44:52.435545 Processing 658 relocs. Offset value of 0x9a010000
500 13:44:52.445634 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 13:44:52.448985 Processing 13 relocs. Offset value of 0x9a008000
502 13:44:52.455790 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 13:44:52.462164 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 13:44:52.468587 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 13:44:52.472138 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 13:44:52.478663 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 13:44:52.485281 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 13:44:52.488605 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 13:44:52.495175 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
510 13:44:52.498501 Clearing SMI status registers
511 13:44:52.502262 SMI_STS: PM1
512 13:44:52.502350 PM1_STS: PWRBTN
513 13:44:52.505451 TCO_STS: SECOND_TO
514 13:44:52.508724 New SMBASE 0x9a000000
515 13:44:52.511901 In relocation handler: CPU 0
516 13:44:52.515197 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
517 13:44:52.518605 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 13:44:52.522029 Relocation complete.
519 13:44:52.525477 New SMBASE 0x99ffec00
520 13:44:52.525599 In relocation handler: CPU 5
521 13:44:52.532170 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
522 13:44:52.535544 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 13:44:52.538864 Relocation complete.
524 13:44:52.541706 New SMBASE 0x99fff400
525 13:44:52.541823 In relocation handler: CPU 3
526 13:44:52.548708 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
527 13:44:52.552222 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 13:44:52.554979 Relocation complete.
529 13:44:52.555068 New SMBASE 0x99fffc00
530 13:44:52.558487 In relocation handler: CPU 1
531 13:44:52.565293 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
532 13:44:52.568632 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 13:44:52.571903 Relocation complete.
534 13:44:52.572014 New SMBASE 0x99ffe400
535 13:44:52.574949 In relocation handler: CPU 7
536 13:44:52.581566 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
537 13:44:52.584959 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 13:44:52.588679 Relocation complete.
539 13:44:52.588797 New SMBASE 0x99ffe800
540 13:44:52.591793 In relocation handler: CPU 6
541 13:44:52.595014 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
542 13:44:52.601436 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 13:44:52.605045 Relocation complete.
544 13:44:52.605141 New SMBASE 0x99fff800
545 13:44:52.608153 In relocation handler: CPU 2
546 13:44:52.611529 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
547 13:44:52.618437 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 13:44:52.618568 Relocation complete.
549 13:44:52.621537 New SMBASE 0x99fff000
550 13:44:52.624979 In relocation handler: CPU 4
551 13:44:52.628150 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
552 13:44:52.635086 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 13:44:52.635202 Relocation complete.
554 13:44:52.638499 Initializing CPU #0
555 13:44:52.641839 CPU: vendor Intel device 806ec
556 13:44:52.644629 CPU: family 06, model 8e, stepping 0c
557 13:44:52.648071 Clearing out pending MCEs
558 13:44:52.651519 Setting up local APIC...
559 13:44:52.651627 apic_id: 0x00 done.
560 13:44:52.654945 Turbo is available but hidden
561 13:44:52.658361 Turbo is available and visible
562 13:44:52.661710 VMX status: enabled
563 13:44:52.664512 IA32_FEATURE_CONTROL status: locked
564 13:44:52.667810 Skip microcode update
565 13:44:52.667926 CPU #0 initialized
566 13:44:52.671380 Initializing CPU #5
567 13:44:52.671493 Initializing CPU #7
568 13:44:52.674851 Initializing CPU #6
569 13:44:52.678075 CPU: vendor Intel device 806ec
570 13:44:52.681472 CPU: family 06, model 8e, stepping 0c
571 13:44:52.684982 CPU: vendor Intel device 806ec
572 13:44:52.688157 CPU: family 06, model 8e, stepping 0c
573 13:44:52.691401 Clearing out pending MCEs
574 13:44:52.694429 Clearing out pending MCEs
575 13:44:52.697787 Setting up local APIC...
576 13:44:52.700955 CPU: vendor Intel device 806ec
577 13:44:52.704737 CPU: family 06, model 8e, stepping 0c
578 13:44:52.707832 Clearing out pending MCEs
579 13:44:52.707944 Initializing CPU #1
580 13:44:52.711000 Initializing CPU #3
581 13:44:52.714558 CPU: vendor Intel device 806ec
582 13:44:52.717599 CPU: family 06, model 8e, stepping 0c
583 13:44:52.721299 CPU: vendor Intel device 806ec
584 13:44:52.724389 CPU: family 06, model 8e, stepping 0c
585 13:44:52.727661 Clearing out pending MCEs
586 13:44:52.730817 Clearing out pending MCEs
587 13:44:52.730907 Setting up local APIC...
588 13:44:52.734138 Initializing CPU #4
589 13:44:52.737243 Initializing CPU #2
590 13:44:52.737368 CPU: vendor Intel device 806ec
591 13:44:52.744389 CPU: family 06, model 8e, stepping 0c
592 13:44:52.747840 CPU: vendor Intel device 806ec
593 13:44:52.750640 CPU: family 06, model 8e, stepping 0c
594 13:44:52.750730 Clearing out pending MCEs
595 13:44:52.753951 Clearing out pending MCEs
596 13:44:52.757572 Setting up local APIC...
597 13:44:52.760823 Setting up local APIC...
598 13:44:52.760904 apic_id: 0x01 done.
599 13:44:52.764174 apic_id: 0x06 done.
600 13:44:52.767539 Setting up local APIC...
601 13:44:52.770848 apic_id: 0x02 done.
602 13:44:52.770938 apic_id: 0x03 done.
603 13:44:52.774214 VMX status: enabled
604 13:44:52.774337 VMX status: enabled
605 13:44:52.777544 IA32_FEATURE_CONTROL status: locked
606 13:44:52.783646 IA32_FEATURE_CONTROL status: locked
607 13:44:52.783762 Skip microcode update
608 13:44:52.787085 Skip microcode update
609 13:44:52.790486 CPU #1 initialized
610 13:44:52.790606 CPU #3 initialized
611 13:44:52.793910 Setting up local APIC...
612 13:44:52.794033 VMX status: enabled
613 13:44:52.797190 apic_id: 0x05 done.
614 13:44:52.800354 Setting up local APIC...
615 13:44:52.803484 IA32_FEATURE_CONTROL status: locked
616 13:44:52.806732 VMX status: enabled
617 13:44:52.806849 apic_id: 0x07 done.
618 13:44:52.810029 IA32_FEATURE_CONTROL status: locked
619 13:44:52.813546 VMX status: enabled
620 13:44:52.816881 Skip microcode update
621 13:44:52.820113 IA32_FEATURE_CONTROL status: locked
622 13:44:52.820198 CPU #7 initialized
623 13:44:52.823231 Skip microcode update
624 13:44:52.826905 Skip microcode update
625 13:44:52.827017 CPU #6 initialized
626 13:44:52.830035 apic_id: 0x04 done.
627 13:44:52.833276 VMX status: enabled
628 13:44:52.833395 VMX status: enabled
629 13:44:52.836734 IA32_FEATURE_CONTROL status: locked
630 13:44:52.839888 IA32_FEATURE_CONTROL status: locked
631 13:44:52.843484 Skip microcode update
632 13:44:52.846562 Skip microcode update
633 13:44:52.846655 CPU #4 initialized
634 13:44:52.850151 CPU #2 initialized
635 13:44:52.850240 CPU #5 initialized
636 13:44:52.856930 bsp_do_flight_plan done after 465 msecs.
637 13:44:52.860250 CPU: frequency set to 4200 MHz
638 13:44:52.860350 Enabling SMIs.
639 13:44:52.860426 Locking SMM.
640 13:44:52.876656 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 13:44:52.880277 CBFS @ c08000 size 3f8000
642 13:44:52.886776 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 13:44:52.886906 CBFS: Locating 'vbt.bin'
644 13:44:52.889526 CBFS: Found @ offset 5f5c0 size 499
645 13:44:52.896279 Found a VBT of 4608 bytes after decompression
646 13:44:53.076820 Display FSP Version Info HOB
647 13:44:53.080027 Reference Code - CPU = 9.0.1e.30
648 13:44:53.082995 uCode Version = 0.0.0.ca
649 13:44:53.086270 TXT ACM version = ff.ff.ff.ffff
650 13:44:53.089720 Display FSP Version Info HOB
651 13:44:53.093521 Reference Code - ME = 9.0.1e.30
652 13:44:53.096770 MEBx version = 0.0.0.0
653 13:44:53.100003 ME Firmware Version = Consumer SKU
654 13:44:53.103513 Display FSP Version Info HOB
655 13:44:53.106238 Reference Code - CML PCH = 9.0.1e.30
656 13:44:53.109806 PCH-CRID Status = Disabled
657 13:44:53.113286 PCH-CRID Original Value = ff.ff.ff.ffff
658 13:44:53.116662 PCH-CRID New Value = ff.ff.ff.ffff
659 13:44:53.120153 OPROM - RST - RAID = ff.ff.ff.ffff
660 13:44:53.122844 ChipsetInit Base Version = ff.ff.ff.ffff
661 13:44:53.126243 ChipsetInit Oem Version = ff.ff.ff.ffff
662 13:44:53.129428 Display FSP Version Info HOB
663 13:44:53.136093 Reference Code - SA - System Agent = 9.0.1e.30
664 13:44:53.139782 Reference Code - MRC = 0.7.1.6c
665 13:44:53.139932 SA - PCIe Version = 9.0.1e.30
666 13:44:53.142911 SA-CRID Status = Disabled
667 13:44:53.146338 SA-CRID Original Value = 0.0.0.c
668 13:44:53.149208 SA-CRID New Value = 0.0.0.c
669 13:44:53.152615 OPROM - VBIOS = ff.ff.ff.ffff
670 13:44:53.156031 RTC Init
671 13:44:53.159319 Set power on after power failure.
672 13:44:53.159463 Disabling Deep S3
673 13:44:53.162696 Disabling Deep S3
674 13:44:53.162815 Disabling Deep S4
675 13:44:53.166107 Disabling Deep S4
676 13:44:53.166202 Disabling Deep S5
677 13:44:53.169309 Disabling Deep S5
678 13:44:53.176320 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
679 13:44:53.176444 Enumerating buses...
680 13:44:53.182982 Show all devs... Before device enumeration.
681 13:44:53.183104 Root Device: enabled 1
682 13:44:53.186510 CPU_CLUSTER: 0: enabled 1
683 13:44:53.189709 DOMAIN: 0000: enabled 1
684 13:44:53.192823 APIC: 00: enabled 1
685 13:44:53.192943 PCI: 00:00.0: enabled 1
686 13:44:53.196000 PCI: 00:02.0: enabled 1
687 13:44:53.199305 PCI: 00:04.0: enabled 0
688 13:44:53.199430 PCI: 00:05.0: enabled 0
689 13:44:53.202553 PCI: 00:12.0: enabled 1
690 13:44:53.205976 PCI: 00:12.5: enabled 0
691 13:44:53.209442 PCI: 00:12.6: enabled 0
692 13:44:53.209527 PCI: 00:14.0: enabled 1
693 13:44:53.212791 PCI: 00:14.1: enabled 0
694 13:44:53.216182 PCI: 00:14.3: enabled 1
695 13:44:53.219624 PCI: 00:14.5: enabled 0
696 13:44:53.219727 PCI: 00:15.0: enabled 1
697 13:44:53.222448 PCI: 00:15.1: enabled 1
698 13:44:53.225848 PCI: 00:15.2: enabled 0
699 13:44:53.229401 PCI: 00:15.3: enabled 0
700 13:44:53.229511 PCI: 00:16.0: enabled 1
701 13:44:53.232218 PCI: 00:16.1: enabled 0
702 13:44:53.235685 PCI: 00:16.2: enabled 0
703 13:44:53.238974 PCI: 00:16.3: enabled 0
704 13:44:53.239092 PCI: 00:16.4: enabled 0
705 13:44:53.242231 PCI: 00:16.5: enabled 0
706 13:44:53.245901 PCI: 00:17.0: enabled 1
707 13:44:53.246014 PCI: 00:19.0: enabled 1
708 13:44:53.249037 PCI: 00:19.1: enabled 0
709 13:44:53.252098 PCI: 00:19.2: enabled 0
710 13:44:53.255802 PCI: 00:1a.0: enabled 0
711 13:44:53.255926 PCI: 00:1c.0: enabled 0
712 13:44:53.259305 PCI: 00:1c.1: enabled 0
713 13:44:53.261928 PCI: 00:1c.2: enabled 0
714 13:44:53.265202 PCI: 00:1c.3: enabled 0
715 13:44:53.265312 PCI: 00:1c.4: enabled 0
716 13:44:53.268747 PCI: 00:1c.5: enabled 0
717 13:44:53.272145 PCI: 00:1c.6: enabled 0
718 13:44:53.275581 PCI: 00:1c.7: enabled 0
719 13:44:53.275708 PCI: 00:1d.0: enabled 1
720 13:44:53.278889 PCI: 00:1d.1: enabled 0
721 13:44:53.282286 PCI: 00:1d.2: enabled 0
722 13:44:53.282403 PCI: 00:1d.3: enabled 0
723 13:44:53.285546 PCI: 00:1d.4: enabled 0
724 13:44:53.288692 PCI: 00:1d.5: enabled 1
725 13:44:53.291982 PCI: 00:1e.0: enabled 1
726 13:44:53.292087 PCI: 00:1e.1: enabled 0
727 13:44:53.295339 PCI: 00:1e.2: enabled 1
728 13:44:53.298762 PCI: 00:1e.3: enabled 1
729 13:44:53.302272 PCI: 00:1f.0: enabled 1
730 13:44:53.302371 PCI: 00:1f.1: enabled 1
731 13:44:53.304979 PCI: 00:1f.2: enabled 1
732 13:44:53.308392 PCI: 00:1f.3: enabled 1
733 13:44:53.311586 PCI: 00:1f.4: enabled 1
734 13:44:53.311701 PCI: 00:1f.5: enabled 1
735 13:44:53.315181 PCI: 00:1f.6: enabled 0
736 13:44:53.318532 USB0 port 0: enabled 1
737 13:44:53.318625 I2C: 00:15: enabled 1
738 13:44:53.322375 I2C: 00:5d: enabled 1
739 13:44:53.325342 GENERIC: 0.0: enabled 1
740 13:44:53.325443 I2C: 00:1a: enabled 1
741 13:44:53.328742 I2C: 00:38: enabled 1
742 13:44:53.331480 I2C: 00:39: enabled 1
743 13:44:53.334923 I2C: 00:3a: enabled 1
744 13:44:53.335017 I2C: 00:3b: enabled 1
745 13:44:53.338296 PCI: 00:00.0: enabled 1
746 13:44:53.341836 SPI: 00: enabled 1
747 13:44:53.341951 SPI: 01: enabled 1
748 13:44:53.345169 PNP: 0c09.0: enabled 1
749 13:44:53.348419 USB2 port 0: enabled 1
750 13:44:53.348534 USB2 port 1: enabled 1
751 13:44:53.351652 USB2 port 2: enabled 0
752 13:44:53.355091 USB2 port 3: enabled 0
753 13:44:53.355193 USB2 port 5: enabled 0
754 13:44:53.358181 USB2 port 6: enabled 1
755 13:44:53.361868 USB2 port 9: enabled 1
756 13:44:53.361984 USB3 port 0: enabled 1
757 13:44:53.365039 USB3 port 1: enabled 1
758 13:44:53.368435 USB3 port 2: enabled 1
759 13:44:53.371877 USB3 port 3: enabled 1
760 13:44:53.371962 USB3 port 4: enabled 0
761 13:44:53.374535 APIC: 02: enabled 1
762 13:44:53.377904 APIC: 04: enabled 1
763 13:44:53.377985 APIC: 03: enabled 1
764 13:44:53.381262 APIC: 05: enabled 1
765 13:44:53.381343 APIC: 01: enabled 1
766 13:44:53.384733 APIC: 07: enabled 1
767 13:44:53.388180 APIC: 06: enabled 1
768 13:44:53.388298 Compare with tree...
769 13:44:53.391518 Root Device: enabled 1
770 13:44:53.394928 CPU_CLUSTER: 0: enabled 1
771 13:44:53.395044 APIC: 00: enabled 1
772 13:44:53.397978 APIC: 02: enabled 1
773 13:44:53.401043 APIC: 04: enabled 1
774 13:44:53.401158 APIC: 03: enabled 1
775 13:44:53.404720 APIC: 05: enabled 1
776 13:44:53.408141 APIC: 01: enabled 1
777 13:44:53.411525 APIC: 07: enabled 1
778 13:44:53.411653 APIC: 06: enabled 1
779 13:44:53.414906 DOMAIN: 0000: enabled 1
780 13:44:53.417752 PCI: 00:00.0: enabled 1
781 13:44:53.421025 PCI: 00:02.0: enabled 1
782 13:44:53.421142 PCI: 00:04.0: enabled 0
783 13:44:53.424836 PCI: 00:05.0: enabled 0
784 13:44:53.427961 PCI: 00:12.0: enabled 1
785 13:44:53.431112 PCI: 00:12.5: enabled 0
786 13:44:53.431229 PCI: 00:12.6: enabled 0
787 13:44:53.434326 PCI: 00:14.0: enabled 1
788 13:44:53.437689 USB0 port 0: enabled 1
789 13:44:53.441080 USB2 port 0: enabled 1
790 13:44:53.444488 USB2 port 1: enabled 1
791 13:44:53.448004 USB2 port 2: enabled 0
792 13:44:53.448121 USB2 port 3: enabled 0
793 13:44:53.450671 USB2 port 5: enabled 0
794 13:44:53.454122 USB2 port 6: enabled 1
795 13:44:53.457437 USB2 port 9: enabled 1
796 13:44:53.461077 USB3 port 0: enabled 1
797 13:44:53.461195 USB3 port 1: enabled 1
798 13:44:53.464332 USB3 port 2: enabled 1
799 13:44:53.467500 USB3 port 3: enabled 1
800 13:44:53.470714 USB3 port 4: enabled 0
801 13:44:53.474277 PCI: 00:14.1: enabled 0
802 13:44:53.477594 PCI: 00:14.3: enabled 1
803 13:44:53.477715 PCI: 00:14.5: enabled 0
804 13:44:53.480897 PCI: 00:15.0: enabled 1
805 13:44:53.484325 I2C: 00:15: enabled 1
806 13:44:53.487150 PCI: 00:15.1: enabled 1
807 13:44:53.487268 I2C: 00:5d: enabled 1
808 13:44:53.490528 GENERIC: 0.0: enabled 1
809 13:44:53.493794 PCI: 00:15.2: enabled 0
810 13:44:53.497290 PCI: 00:15.3: enabled 0
811 13:44:53.500605 PCI: 00:16.0: enabled 1
812 13:44:53.500723 PCI: 00:16.1: enabled 0
813 13:44:53.504150 PCI: 00:16.2: enabled 0
814 13:44:53.507419 PCI: 00:16.3: enabled 0
815 13:44:53.510586 PCI: 00:16.4: enabled 0
816 13:44:53.513894 PCI: 00:16.5: enabled 0
817 13:44:53.513984 PCI: 00:17.0: enabled 1
818 13:44:53.517103 PCI: 00:19.0: enabled 1
819 13:44:53.520272 I2C: 00:1a: enabled 1
820 13:44:53.523677 I2C: 00:38: enabled 1
821 13:44:53.527096 I2C: 00:39: enabled 1
822 13:44:53.527182 I2C: 00:3a: enabled 1
823 13:44:53.530482 I2C: 00:3b: enabled 1
824 13:44:53.533553 PCI: 00:19.1: enabled 0
825 13:44:53.537495 PCI: 00:19.2: enabled 0
826 13:44:53.537577 PCI: 00:1a.0: enabled 0
827 13:44:53.540233 PCI: 00:1c.0: enabled 0
828 13:44:53.543745 PCI: 00:1c.1: enabled 0
829 13:44:53.547037 PCI: 00:1c.2: enabled 0
830 13:44:53.550425 PCI: 00:1c.3: enabled 0
831 13:44:53.550545 PCI: 00:1c.4: enabled 0
832 13:44:53.553804 PCI: 00:1c.5: enabled 0
833 13:44:53.557219 PCI: 00:1c.6: enabled 0
834 13:44:53.560453 PCI: 00:1c.7: enabled 0
835 13:44:53.563846 PCI: 00:1d.0: enabled 1
836 13:44:53.563935 PCI: 00:1d.1: enabled 0
837 13:44:53.566633 PCI: 00:1d.2: enabled 0
838 13:44:53.570093 PCI: 00:1d.3: enabled 0
839 13:44:53.573493 PCI: 00:1d.4: enabled 0
840 13:44:53.576855 PCI: 00:1d.5: enabled 1
841 13:44:53.576943 PCI: 00:00.0: enabled 1
842 13:44:53.580174 PCI: 00:1e.0: enabled 1
843 13:44:53.583268 PCI: 00:1e.1: enabled 0
844 13:44:53.586855 PCI: 00:1e.2: enabled 1
845 13:44:53.586967 SPI: 00: enabled 1
846 13:44:53.590151 PCI: 00:1e.3: enabled 1
847 13:44:53.593559 SPI: 01: enabled 1
848 13:44:53.596752 PCI: 00:1f.0: enabled 1
849 13:44:53.596862 PNP: 0c09.0: enabled 1
850 13:44:53.600249 PCI: 00:1f.1: enabled 1
851 13:44:53.603054 PCI: 00:1f.2: enabled 1
852 13:44:53.606451 PCI: 00:1f.3: enabled 1
853 13:44:53.609985 PCI: 00:1f.4: enabled 1
854 13:44:53.610072 PCI: 00:1f.5: enabled 1
855 13:44:53.613548 PCI: 00:1f.6: enabled 0
856 13:44:53.616202 Root Device scanning...
857 13:44:53.619571 scan_static_bus for Root Device
858 13:44:53.622997 CPU_CLUSTER: 0 enabled
859 13:44:53.623130 DOMAIN: 0000 enabled
860 13:44:53.626799 DOMAIN: 0000 scanning...
861 13:44:53.630043 PCI: pci_scan_bus for bus 00
862 13:44:53.632987 PCI: 00:00.0 [8086/0000] ops
863 13:44:53.636462 PCI: 00:00.0 [8086/9b61] enabled
864 13:44:53.639759 PCI: 00:02.0 [8086/0000] bus ops
865 13:44:53.643182 PCI: 00:02.0 [8086/9b41] enabled
866 13:44:53.646544 PCI: 00:04.0 [8086/1903] disabled
867 13:44:53.649700 PCI: 00:08.0 [8086/1911] enabled
868 13:44:53.652811 PCI: 00:12.0 [8086/02f9] enabled
869 13:44:53.656449 PCI: 00:14.0 [8086/0000] bus ops
870 13:44:53.659934 PCI: 00:14.0 [8086/02ed] enabled
871 13:44:53.662899 PCI: 00:14.2 [8086/02ef] enabled
872 13:44:53.666585 PCI: 00:14.3 [8086/02f0] enabled
873 13:44:53.669351 PCI: 00:15.0 [8086/0000] bus ops
874 13:44:53.672766 PCI: 00:15.0 [8086/02e8] enabled
875 13:44:53.676200 PCI: 00:15.1 [8086/0000] bus ops
876 13:44:53.679495 PCI: 00:15.1 [8086/02e9] enabled
877 13:44:53.682760 PCI: 00:16.0 [8086/0000] ops
878 13:44:53.686192 PCI: 00:16.0 [8086/02e0] enabled
879 13:44:53.689565 PCI: 00:17.0 [8086/0000] ops
880 13:44:53.692760 PCI: 00:17.0 [8086/02d3] enabled
881 13:44:53.695846 PCI: 00:19.0 [8086/0000] bus ops
882 13:44:53.699460 PCI: 00:19.0 [8086/02c5] enabled
883 13:44:53.702765 PCI: 00:1d.0 [8086/0000] bus ops
884 13:44:53.705929 PCI: 00:1d.0 [8086/02b0] enabled
885 13:44:53.712610 PCI: Static device PCI: 00:1d.5 not found, disabling it.
886 13:44:53.712695 PCI: 00:1e.0 [8086/0000] ops
887 13:44:53.716201 PCI: 00:1e.0 [8086/02a8] enabled
888 13:44:53.719510 PCI: 00:1e.2 [8086/0000] bus ops
889 13:44:53.722818 PCI: 00:1e.2 [8086/02aa] enabled
890 13:44:53.726095 PCI: 00:1e.3 [8086/0000] bus ops
891 13:44:53.729621 PCI: 00:1e.3 [8086/02ab] enabled
892 13:44:53.732761 PCI: 00:1f.0 [8086/0000] bus ops
893 13:44:53.735985 PCI: 00:1f.0 [8086/0284] enabled
894 13:44:53.742232 PCI: Static device PCI: 00:1f.1 not found, disabling it.
895 13:44:53.749228 PCI: Static device PCI: 00:1f.2 not found, disabling it.
896 13:44:53.752499 PCI: 00:1f.3 [8086/0000] bus ops
897 13:44:53.755805 PCI: 00:1f.3 [8086/02c8] enabled
898 13:44:53.759211 PCI: 00:1f.4 [8086/0000] bus ops
899 13:44:53.762421 PCI: 00:1f.4 [8086/02a3] enabled
900 13:44:53.765835 PCI: 00:1f.5 [8086/0000] bus ops
901 13:44:53.769044 PCI: 00:1f.5 [8086/02a4] enabled
902 13:44:53.772217 PCI: Leftover static devices:
903 13:44:53.772305 PCI: 00:05.0
904 13:44:53.775712 PCI: 00:12.5
905 13:44:53.775800 PCI: 00:12.6
906 13:44:53.775867 PCI: 00:14.1
907 13:44:53.778824 PCI: 00:14.5
908 13:44:53.778945 PCI: 00:15.2
909 13:44:53.782614 PCI: 00:15.3
910 13:44:53.782744 PCI: 00:16.1
911 13:44:53.785293 PCI: 00:16.2
912 13:44:53.785378 PCI: 00:16.3
913 13:44:53.785445 PCI: 00:16.4
914 13:44:53.788709 PCI: 00:16.5
915 13:44:53.788799 PCI: 00:19.1
916 13:44:53.792023 PCI: 00:19.2
917 13:44:53.792117 PCI: 00:1a.0
918 13:44:53.792185 PCI: 00:1c.0
919 13:44:53.795614 PCI: 00:1c.1
920 13:44:53.795736 PCI: 00:1c.2
921 13:44:53.798965 PCI: 00:1c.3
922 13:44:53.799076 PCI: 00:1c.4
923 13:44:53.799170 PCI: 00:1c.5
924 13:44:53.802269 PCI: 00:1c.6
925 13:44:53.802354 PCI: 00:1c.7
926 13:44:53.805236 PCI: 00:1d.1
927 13:44:53.805321 PCI: 00:1d.2
928 13:44:53.808440 PCI: 00:1d.3
929 13:44:53.808536 PCI: 00:1d.4
930 13:44:53.808621 PCI: 00:1d.5
931 13:44:53.812282 PCI: 00:1e.1
932 13:44:53.812367 PCI: 00:1f.1
933 13:44:53.815408 PCI: 00:1f.2
934 13:44:53.815495 PCI: 00:1f.6
935 13:44:53.818536 PCI: Check your devicetree.cb.
936 13:44:53.822192 PCI: 00:02.0 scanning...
937 13:44:53.825570 scan_generic_bus for PCI: 00:02.0
938 13:44:53.828302 scan_generic_bus for PCI: 00:02.0 done
939 13:44:53.834960 scan_bus: scanning of bus PCI: 00:02.0 took 10186 usecs
940 13:44:53.835079 PCI: 00:14.0 scanning...
941 13:44:53.838936 scan_static_bus for PCI: 00:14.0
942 13:44:53.842417 USB0 port 0 enabled
943 13:44:53.845211 USB0 port 0 scanning...
944 13:44:53.848460 scan_static_bus for USB0 port 0
945 13:44:53.851986 USB2 port 0 enabled
946 13:44:53.852072 USB2 port 1 enabled
947 13:44:53.855349 USB2 port 2 disabled
948 13:44:53.855437 USB2 port 3 disabled
949 13:44:53.858848 USB2 port 5 disabled
950 13:44:53.861573 USB2 port 6 enabled
951 13:44:53.861674 USB2 port 9 enabled
952 13:44:53.865468 USB3 port 0 enabled
953 13:44:53.868283 USB3 port 1 enabled
954 13:44:53.868368 USB3 port 2 enabled
955 13:44:53.871734 USB3 port 3 enabled
956 13:44:53.871835 USB3 port 4 disabled
957 13:44:53.875173 USB2 port 0 scanning...
958 13:44:53.878758 scan_static_bus for USB2 port 0
959 13:44:53.881943 scan_static_bus for USB2 port 0 done
960 13:44:53.888541 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
961 13:44:53.891783 USB2 port 1 scanning...
962 13:44:53.894947 scan_static_bus for USB2 port 1
963 13:44:53.897982 scan_static_bus for USB2 port 1 done
964 13:44:53.901460 scan_bus: scanning of bus USB2 port 1 took 9688 usecs
965 13:44:53.904883 USB2 port 6 scanning...
966 13:44:53.908225 scan_static_bus for USB2 port 6
967 13:44:53.911444 scan_static_bus for USB2 port 6 done
968 13:44:53.918025 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
969 13:44:53.921497 USB2 port 9 scanning...
970 13:44:53.924832 scan_static_bus for USB2 port 9
971 13:44:53.928011 scan_static_bus for USB2 port 9 done
972 13:44:53.935067 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
973 13:44:53.935163 USB3 port 0 scanning...
974 13:44:53.938294 scan_static_bus for USB3 port 0
975 13:44:53.941090 scan_static_bus for USB3 port 0 done
976 13:44:53.948100 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
977 13:44:53.951532 USB3 port 1 scanning...
978 13:44:53.954909 scan_static_bus for USB3 port 1
979 13:44:53.957689 scan_static_bus for USB3 port 1 done
980 13:44:53.964420 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
981 13:44:53.964536 USB3 port 2 scanning...
982 13:44:53.967823 scan_static_bus for USB3 port 2
983 13:44:53.974279 scan_static_bus for USB3 port 2 done
984 13:44:53.977717 scan_bus: scanning of bus USB3 port 2 took 9705 usecs
985 13:44:53.981222 USB3 port 3 scanning...
986 13:44:53.984642 scan_static_bus for USB3 port 3
987 13:44:53.987979 scan_static_bus for USB3 port 3 done
988 13:44:53.994391 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
989 13:44:53.997518 scan_static_bus for USB0 port 0 done
990 13:44:54.001314 scan_bus: scanning of bus USB0 port 0 took 155327 usecs
991 13:44:54.007383 scan_static_bus for PCI: 00:14.0 done
992 13:44:54.010630 scan_bus: scanning of bus PCI: 00:14.0 took 172953 usecs
993 13:44:54.013939 PCI: 00:15.0 scanning...
994 13:44:54.017285 scan_generic_bus for PCI: 00:15.0
995 13:44:54.020519 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
996 13:44:54.027811 scan_generic_bus for PCI: 00:15.0 done
997 13:44:54.030511 scan_bus: scanning of bus PCI: 00:15.0 took 14297 usecs
998 13:44:54.034452 PCI: 00:15.1 scanning...
999 13:44:54.037714 scan_generic_bus for PCI: 00:15.1
1000 13:44:54.040934 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1001 13:44:54.047079 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1002 13:44:54.050331 scan_generic_bus for PCI: 00:15.1 done
1003 13:44:54.056972 scan_bus: scanning of bus PCI: 00:15.1 took 18597 usecs
1004 13:44:54.057136 PCI: 00:19.0 scanning...
1005 13:44:54.060526 scan_generic_bus for PCI: 00:19.0
1006 13:44:54.067500 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1007 13:44:54.070241 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1008 13:44:54.073607 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1009 13:44:54.076905 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1010 13:44:54.083911 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1011 13:44:54.087266 scan_generic_bus for PCI: 00:19.0 done
1012 13:44:54.090053 scan_bus: scanning of bus PCI: 00:19.0 took 30714 usecs
1013 13:44:54.093542 PCI: 00:1d.0 scanning...
1014 13:44:54.096929 do_pci_scan_bridge for PCI: 00:1d.0
1015 13:44:54.100206 PCI: pci_scan_bus for bus 01
1016 13:44:54.103482 PCI: 01:00.0 [1c5c/1327] enabled
1017 13:44:54.106936 Enabling Common Clock Configuration
1018 13:44:54.113684 L1 Sub-State supported from root port 29
1019 13:44:54.116832 L1 Sub-State Support = 0xf
1020 13:44:54.116945 CommonModeRestoreTime = 0x28
1021 13:44:54.123320 Power On Value = 0x16, Power On Scale = 0x0
1022 13:44:54.123435 ASPM: Enabled L1
1023 13:44:54.130076 scan_bus: scanning of bus PCI: 00:1d.0 took 32783 usecs
1024 13:44:54.133438 PCI: 00:1e.2 scanning...
1025 13:44:54.136930 scan_generic_bus for PCI: 00:1e.2
1026 13:44:54.140275 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1027 13:44:54.143745 scan_generic_bus for PCI: 00:1e.2 done
1028 13:44:54.150278 scan_bus: scanning of bus PCI: 00:1e.2 took 13994 usecs
1029 13:44:54.153578 PCI: 00:1e.3 scanning...
1030 13:44:54.156936 scan_generic_bus for PCI: 00:1e.3
1031 13:44:54.160029 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1032 13:44:54.163462 scan_generic_bus for PCI: 00:1e.3 done
1033 13:44:54.169814 scan_bus: scanning of bus PCI: 00:1e.3 took 14004 usecs
1034 13:44:54.169905 PCI: 00:1f.0 scanning...
1035 13:44:54.173259 scan_static_bus for PCI: 00:1f.0
1036 13:44:54.176651 PNP: 0c09.0 enabled
1037 13:44:54.179859 scan_static_bus for PCI: 00:1f.0 done
1038 13:44:54.186822 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1039 13:44:54.190267 PCI: 00:1f.3 scanning...
1040 13:44:54.193256 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1041 13:44:54.196752 PCI: 00:1f.4 scanning...
1042 13:44:54.200341 scan_generic_bus for PCI: 00:1f.4
1043 13:44:54.202927 scan_generic_bus for PCI: 00:1f.4 done
1044 13:44:54.210177 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1045 13:44:54.213632 PCI: 00:1f.5 scanning...
1046 13:44:54.216474 scan_generic_bus for PCI: 00:1f.5
1047 13:44:54.219915 scan_generic_bus for PCI: 00:1f.5 done
1048 13:44:54.226638 scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
1049 13:44:54.233477 scan_bus: scanning of bus DOMAIN: 0000 took 604923 usecs
1050 13:44:54.236579 scan_static_bus for Root Device done
1051 13:44:54.239651 scan_bus: scanning of bus Root Device took 624792 usecs
1052 13:44:54.242704 done
1053 13:44:54.246382 Chrome EC: UHEPI supported
1054 13:44:54.249750 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1055 13:44:54.256201 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 13:44:54.263104 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1057 13:44:54.269373 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1058 13:44:54.273122 SPI flash protection: WPSW=1 SRP0=0
1059 13:44:54.279611 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 13:44:54.282714 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1061 13:44:54.285909 found VGA at PCI: 00:02.0
1062 13:44:54.289583 Setting up VGA for PCI: 00:02.0
1063 13:44:54.296267 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 13:44:54.299049 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 13:44:54.302434 Allocating resources...
1066 13:44:54.305928 Reading resources...
1067 13:44:54.309383 Root Device read_resources bus 0 link: 0
1068 13:44:54.312788 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1069 13:44:54.318776 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1070 13:44:54.322305 DOMAIN: 0000 read_resources bus 0 link: 0
1071 13:44:54.329681 PCI: 00:14.0 read_resources bus 0 link: 0
1072 13:44:54.332409 USB0 port 0 read_resources bus 0 link: 0
1073 13:44:54.341349 USB0 port 0 read_resources bus 0 link: 0 done
1074 13:44:54.344035 PCI: 00:14.0 read_resources bus 0 link: 0 done
1075 13:44:54.351412 PCI: 00:15.0 read_resources bus 1 link: 0
1076 13:44:54.354543 PCI: 00:15.0 read_resources bus 1 link: 0 done
1077 13:44:54.361732 PCI: 00:15.1 read_resources bus 2 link: 0
1078 13:44:54.365144 PCI: 00:15.1 read_resources bus 2 link: 0 done
1079 13:44:54.372098 PCI: 00:19.0 read_resources bus 3 link: 0
1080 13:44:54.378824 PCI: 00:19.0 read_resources bus 3 link: 0 done
1081 13:44:54.381892 PCI: 00:1d.0 read_resources bus 1 link: 0
1082 13:44:54.388876 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1083 13:44:54.391983 PCI: 00:1e.2 read_resources bus 4 link: 0
1084 13:44:54.398754 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1085 13:44:54.402093 PCI: 00:1e.3 read_resources bus 5 link: 0
1086 13:44:54.408918 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1087 13:44:54.412421 PCI: 00:1f.0 read_resources bus 0 link: 0
1088 13:44:54.463286 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1089 13:44:54.464071 DOMAIN: 0000 read_resources bus 0 link: 0 done
1090 13:44:54.464369 Root Device read_resources bus 0 link: 0 done
1091 13:44:54.464468 Done reading resources.
1092 13:44:54.464566 Show resources in subtree (Root Device)...After reading.
1093 13:44:54.464677 Root Device child on link 0 CPU_CLUSTER: 0
1094 13:44:54.464772 CPU_CLUSTER: 0 child on link 0 APIC: 00
1095 13:44:54.464869 APIC: 00
1096 13:44:54.464962 APIC: 02
1097 13:44:54.465056 APIC: 04
1098 13:44:54.465152 APIC: 03
1099 13:44:54.465249 APIC: 05
1100 13:44:54.465345 APIC: 01
1101 13:44:54.465440 APIC: 07
1102 13:44:54.465535 APIC: 06
1103 13:44:54.465648 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1104 13:44:54.494816 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1105 13:44:54.495133 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1106 13:44:54.495243 PCI: 00:00.0
1107 13:44:54.495339 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1108 13:44:54.498740 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1109 13:44:54.508519 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1110 13:44:54.518876 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1111 13:44:54.528492 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1112 13:44:54.538539 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1113 13:44:54.544804 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1114 13:44:54.554715 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1115 13:44:54.564964 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1116 13:44:54.575245 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1117 13:44:54.581297 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1118 13:44:54.591460 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1119 13:44:54.601506 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1120 13:44:54.611260 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1121 13:44:54.621383 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1122 13:44:54.630835 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1123 13:44:54.630962 PCI: 00:02.0
1124 13:44:54.641160 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 13:44:54.654269 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 13:44:54.660837 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 13:44:54.664001 PCI: 00:04.0
1128 13:44:54.664124 PCI: 00:08.0
1129 13:44:54.674281 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 13:44:54.677706 PCI: 00:12.0
1131 13:44:54.687201 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 13:44:54.690710 PCI: 00:14.0 child on link 0 USB0 port 0
1133 13:44:54.700953 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1134 13:44:54.703649 USB0 port 0 child on link 0 USB2 port 0
1135 13:44:54.707071 USB2 port 0
1136 13:44:54.707169 USB2 port 1
1137 13:44:54.710781 USB2 port 2
1138 13:44:54.710866 USB2 port 3
1139 13:44:54.714032 USB2 port 5
1140 13:44:54.714143 USB2 port 6
1141 13:44:54.717058 USB2 port 9
1142 13:44:54.717147 USB3 port 0
1143 13:44:54.720770 USB3 port 1
1144 13:44:54.723663 USB3 port 2
1145 13:44:54.723789 USB3 port 3
1146 13:44:54.727452 USB3 port 4
1147 13:44:54.727564 PCI: 00:14.2
1148 13:44:54.737378 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1149 13:44:54.746764 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1150 13:44:54.750117 PCI: 00:14.3
1151 13:44:54.760407 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 13:44:54.763262 PCI: 00:15.0 child on link 0 I2C: 01:15
1153 13:44:54.773248 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 13:44:54.773338 I2C: 01:15
1155 13:44:54.780294 PCI: 00:15.1 child on link 0 I2C: 02:5d
1156 13:44:54.790333 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 13:44:54.790428 I2C: 02:5d
1158 13:44:54.793771 GENERIC: 0.0
1159 13:44:54.793882 PCI: 00:16.0
1160 13:44:54.803319 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 13:44:54.806747 PCI: 00:17.0
1162 13:44:54.813649 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1163 13:44:54.823089 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1164 13:44:54.833059 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1165 13:44:54.839867 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1166 13:44:54.849886 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1167 13:44:54.856387 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1168 13:44:54.863379 PCI: 00:19.0 child on link 0 I2C: 03:1a
1169 13:44:54.872993 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 13:44:54.873131 I2C: 03:1a
1171 13:44:54.873251 I2C: 03:38
1172 13:44:54.876304 I2C: 03:39
1173 13:44:54.876420 I2C: 03:3a
1174 13:44:54.879581 I2C: 03:3b
1175 13:44:54.882912 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1176 13:44:54.892669 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 13:44:54.902611 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 13:44:54.912885 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 13:44:54.912999 PCI: 01:00.0
1180 13:44:54.922915 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 13:44:54.925694 PCI: 00:1e.0
1182 13:44:54.936168 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1183 13:44:54.945743 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 13:44:54.948919 PCI: 00:1e.2 child on link 0 SPI: 00
1185 13:44:54.959144 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 13:44:54.962242 SPI: 00
1187 13:44:54.965641 PCI: 00:1e.3 child on link 0 SPI: 01
1188 13:44:54.975343 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 13:44:54.975470 SPI: 01
1190 13:44:54.978926 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1191 13:44:54.989153 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1192 13:44:54.998444 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1193 13:44:54.998544 PNP: 0c09.0
1194 13:44:55.009074 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1195 13:44:55.009193 PCI: 00:1f.3
1196 13:44:55.018658 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 13:44:55.028835 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1198 13:44:55.031754 PCI: 00:1f.4
1199 13:44:55.042058 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1200 13:44:55.051709 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1201 13:44:55.051818 PCI: 00:1f.5
1202 13:44:55.062269 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1203 13:44:55.068564 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1204 13:44:55.075092 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1205 13:44:55.081957 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1206 13:44:55.085351 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1207 13:44:55.088773 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1208 13:44:55.092150 PCI: 00:17.0 18 * [0x60 - 0x67] io
1209 13:44:55.094894 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1210 13:44:55.101748 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1211 13:44:55.108874 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1212 13:44:55.115195 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1213 13:44:55.125308 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1214 13:44:55.131454 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1215 13:44:55.134895 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1216 13:44:55.144889 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1217 13:44:55.148331 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1218 13:44:55.151185 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1219 13:44:55.157811 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1220 13:44:55.161199 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1221 13:44:55.168476 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1222 13:44:55.171274 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1223 13:44:55.178233 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1224 13:44:55.181536 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1225 13:44:55.188086 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1226 13:44:55.191386 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1227 13:44:55.198111 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1228 13:44:55.201094 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1229 13:44:55.207746 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1230 13:44:55.211234 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1231 13:44:55.214473 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1232 13:44:55.220930 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1233 13:44:55.224154 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1234 13:44:55.230971 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1235 13:44:55.234232 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1236 13:44:55.240912 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1237 13:44:55.243866 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1238 13:44:55.250803 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1239 13:44:55.254290 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1240 13:44:55.264107 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1241 13:44:55.267544 avoid_fixed_resources: DOMAIN: 0000
1242 13:44:55.274007 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 13:44:55.280724 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 13:44:55.287033 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 13:44:55.293756 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1246 13:44:55.300542 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1247 13:44:55.310158 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1248 13:44:55.316932 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1249 13:44:55.323879 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 13:44:55.333509 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 13:44:55.340471 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 13:44:55.346746 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 13:44:55.353260 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 13:44:55.356489 Setting resources...
1255 13:44:55.363508 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 13:44:55.366361 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 13:44:55.369639 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 13:44:55.376435 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 13:44:55.379852 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 13:44:55.386286 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 13:44:55.392648 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 13:44:55.399486 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 13:44:55.405685 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1264 13:44:55.409567 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1265 13:44:55.415713 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1266 13:44:55.419221 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1267 13:44:55.425916 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1268 13:44:55.429333 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1269 13:44:55.435563 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1270 13:44:55.438992 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1271 13:44:55.445882 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1272 13:44:55.449135 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1273 13:44:55.455206 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1274 13:44:55.459036 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1275 13:44:55.465390 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1276 13:44:55.468737 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1277 13:44:55.475380 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1278 13:44:55.478772 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1279 13:44:55.482225 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1280 13:44:55.488699 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1281 13:44:55.492113 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1282 13:44:55.498791 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1283 13:44:55.502029 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1284 13:44:55.508231 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1285 13:44:55.511654 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1286 13:44:55.518067 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 13:44:55.524773 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 13:44:55.531699 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 13:44:55.538562 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 13:44:55.548268 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 13:44:55.551582 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 13:44:55.558280 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 13:44:55.564871 Root Device assign_resources, bus 0 link: 0
1294 13:44:55.568253 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 13:44:55.577936 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 13:44:55.584386 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 13:44:55.594298 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 13:44:55.600851 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 13:44:55.610915 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 13:44:55.617586 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 13:44:55.624159 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 13:44:55.627479 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 13:44:55.633717 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 13:44:55.643925 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 13:44:55.650321 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 13:44:55.660744 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 13:44:55.664065 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 13:44:55.670716 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 13:44:55.677457 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 13:44:55.683897 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 13:44:55.686965 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 13:44:55.696556 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 13:44:55.703234 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 13:44:55.709798 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 13:44:55.719786 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 13:44:55.726552 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 13:44:55.732947 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 13:44:55.742983 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 13:44:55.749323 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 13:44:55.756248 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 13:44:55.759662 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 13:44:55.769611 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1323 13:44:55.776210 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1324 13:44:55.786027 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1325 13:44:55.789305 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1326 13:44:55.799085 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1327 13:44:55.802636 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 13:44:55.812040 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1329 13:44:55.818637 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1330 13:44:55.825817 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1331 13:44:55.829222 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 13:44:55.838535 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1333 13:44:55.841746 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1334 13:44:55.845473 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 13:44:55.852089 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1336 13:44:55.855579 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 13:44:55.861899 LPC: Trying to open IO window from 800 size 1ff
1338 13:44:55.868303 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1339 13:44:55.878530 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1340 13:44:55.885273 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1341 13:44:55.895006 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1342 13:44:55.898588 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 13:44:55.901341 Root Device assign_resources, bus 0 link: 0
1344 13:44:55.904489 Done setting resources.
1345 13:44:55.911516 Show resources in subtree (Root Device)...After assigning values.
1346 13:44:55.918193 Root Device child on link 0 CPU_CLUSTER: 0
1347 13:44:55.921581 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 13:44:55.921668 APIC: 00
1349 13:44:55.924293 APIC: 02
1350 13:44:55.924375 APIC: 04
1351 13:44:55.924440 APIC: 03
1352 13:44:55.928340 APIC: 05
1353 13:44:55.928424 APIC: 01
1354 13:44:55.928494 APIC: 07
1355 13:44:55.931385 APIC: 06
1356 13:44:55.934616 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1357 13:44:55.944237 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1358 13:44:55.954488 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1359 13:44:55.957556 PCI: 00:00.0
1360 13:44:55.967498 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1361 13:44:55.977864 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1362 13:44:55.987199 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1363 13:44:55.994196 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1364 13:44:56.004137 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1365 13:44:56.013669 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1366 13:44:56.023618 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1367 13:44:56.033770 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1368 13:44:56.043255 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1369 13:44:56.049806 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1370 13:44:56.059838 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1371 13:44:56.070431 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1372 13:44:56.079541 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1373 13:44:56.089858 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1374 13:44:56.099957 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1375 13:44:56.106204 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1376 13:44:56.109817 PCI: 00:02.0
1377 13:44:56.119360 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1378 13:44:56.129594 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1379 13:44:56.139252 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1380 13:44:56.142360 PCI: 00:04.0
1381 13:44:56.142470 PCI: 00:08.0
1382 13:44:56.152765 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1383 13:44:56.155977 PCI: 00:12.0
1384 13:44:56.165866 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1385 13:44:56.168941 PCI: 00:14.0 child on link 0 USB0 port 0
1386 13:44:56.179044 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1387 13:44:56.185649 USB0 port 0 child on link 0 USB2 port 0
1388 13:44:56.185772 USB2 port 0
1389 13:44:56.189056 USB2 port 1
1390 13:44:56.189177 USB2 port 2
1391 13:44:56.192589 USB2 port 3
1392 13:44:56.192675 USB2 port 5
1393 13:44:56.195222 USB2 port 6
1394 13:44:56.195338 USB2 port 9
1395 13:44:56.198619 USB3 port 0
1396 13:44:56.198737 USB3 port 1
1397 13:44:56.201881 USB3 port 2
1398 13:44:56.201993 USB3 port 3
1399 13:44:56.205514 USB3 port 4
1400 13:44:56.205622 PCI: 00:14.2
1401 13:44:56.218309 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1402 13:44:56.228142 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1403 13:44:56.228266 PCI: 00:14.3
1404 13:44:56.238521 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1405 13:44:56.245085 PCI: 00:15.0 child on link 0 I2C: 01:15
1406 13:44:56.255083 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1407 13:44:56.255225 I2C: 01:15
1408 13:44:56.261392 PCI: 00:15.1 child on link 0 I2C: 02:5d
1409 13:44:56.271494 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1410 13:44:56.271628 I2C: 02:5d
1411 13:44:56.274644 GENERIC: 0.0
1412 13:44:56.274761 PCI: 00:16.0
1413 13:44:56.284474 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1414 13:44:56.287950 PCI: 00:17.0
1415 13:44:56.297590 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1416 13:44:56.307720 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1417 13:44:56.317983 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1418 13:44:56.324321 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1419 13:44:56.333993 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1420 13:44:56.344424 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1421 13:44:56.350582 PCI: 00:19.0 child on link 0 I2C: 03:1a
1422 13:44:56.360392 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1423 13:44:56.360517 I2C: 03:1a
1424 13:44:56.363876 I2C: 03:38
1425 13:44:56.363978 I2C: 03:39
1426 13:44:56.367101 I2C: 03:3a
1427 13:44:56.367184 I2C: 03:3b
1428 13:44:56.370898 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1429 13:44:56.380144 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 13:44:56.390179 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 13:44:56.399986 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1432 13:44:56.403770 PCI: 01:00.0
1433 13:44:56.413483 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1434 13:44:56.416816 PCI: 00:1e.0
1435 13:44:56.426779 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1436 13:44:56.436685 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1437 13:44:56.440221 PCI: 00:1e.2 child on link 0 SPI: 00
1438 13:44:56.449972 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1439 13:44:56.452868 SPI: 00
1440 13:44:56.456805 PCI: 00:1e.3 child on link 0 SPI: 01
1441 13:44:56.466344 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1442 13:44:56.466479 SPI: 01
1443 13:44:56.473300 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1444 13:44:56.479263 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1445 13:44:56.489570 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1446 13:44:56.492680 PNP: 0c09.0
1447 13:44:56.499503 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 13:44:56.502794 PCI: 00:1f.3
1449 13:44:56.512196 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 13:44:56.522690 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 13:44:56.526047 PCI: 00:1f.4
1452 13:44:56.532448 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 13:44:56.542208 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 13:44:56.545606 PCI: 00:1f.5
1455 13:44:56.555214 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1456 13:44:56.559144 Done allocating resources.
1457 13:44:56.562480 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1458 13:44:56.565886 Enabling resources...
1459 13:44:56.572814 PCI: 00:00.0 subsystem <- 8086/9b61
1460 13:44:56.572937 PCI: 00:00.0 cmd <- 06
1461 13:44:56.575559 PCI: 00:02.0 subsystem <- 8086/9b41
1462 13:44:56.579032 PCI: 00:02.0 cmd <- 03
1463 13:44:56.582435 PCI: 00:08.0 cmd <- 06
1464 13:44:56.585913 PCI: 00:12.0 subsystem <- 8086/02f9
1465 13:44:56.589263 PCI: 00:12.0 cmd <- 02
1466 13:44:56.592515 PCI: 00:14.0 subsystem <- 8086/02ed
1467 13:44:56.595933 PCI: 00:14.0 cmd <- 02
1468 13:44:56.598626 PCI: 00:14.2 cmd <- 02
1469 13:44:56.601963 PCI: 00:14.3 subsystem <- 8086/02f0
1470 13:44:56.602083 PCI: 00:14.3 cmd <- 02
1471 13:44:56.609023 PCI: 00:15.0 subsystem <- 8086/02e8
1472 13:44:56.609103 PCI: 00:15.0 cmd <- 02
1473 13:44:56.612164 PCI: 00:15.1 subsystem <- 8086/02e9
1474 13:44:56.615533 PCI: 00:15.1 cmd <- 02
1475 13:44:56.618891 PCI: 00:16.0 subsystem <- 8086/02e0
1476 13:44:56.622386 PCI: 00:16.0 cmd <- 02
1477 13:44:56.625625 PCI: 00:17.0 subsystem <- 8086/02d3
1478 13:44:56.628791 PCI: 00:17.0 cmd <- 03
1479 13:44:56.632160 PCI: 00:19.0 subsystem <- 8086/02c5
1480 13:44:56.635347 PCI: 00:19.0 cmd <- 02
1481 13:44:56.639069 PCI: 00:1d.0 bridge ctrl <- 0013
1482 13:44:56.642115 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 13:44:56.645501 PCI: 00:1d.0 cmd <- 06
1484 13:44:56.648737 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 13:44:56.652181 PCI: 00:1e.0 cmd <- 06
1486 13:44:56.655714 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 13:44:56.655824 PCI: 00:1e.2 cmd <- 06
1488 13:44:56.662095 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 13:44:56.662183 PCI: 00:1e.3 cmd <- 02
1490 13:44:56.665497 PCI: 00:1f.0 subsystem <- 8086/0284
1491 13:44:56.668756 PCI: 00:1f.0 cmd <- 407
1492 13:44:56.672254 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 13:44:56.675740 PCI: 00:1f.3 cmd <- 02
1494 13:44:56.679173 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 13:44:56.681952 PCI: 00:1f.4 cmd <- 03
1496 13:44:56.685443 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 13:44:56.689031 PCI: 00:1f.5 cmd <- 406
1498 13:44:56.697775 PCI: 01:00.0 cmd <- 02
1499 13:44:56.702831 done.
1500 13:44:56.716081 ME: Version: 14.0.39.1367
1501 13:44:56.722600 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1502 13:44:56.726332 Initializing devices...
1503 13:44:56.726418 Root Device init ...
1504 13:44:56.732738 Chrome EC: Set SMI mask to 0x0000000000000000
1505 13:44:56.735844 Chrome EC: clear events_b mask to 0x0000000000000000
1506 13:44:56.742865 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1507 13:44:56.749559 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1508 13:44:56.755820 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1509 13:44:56.759026 Chrome EC: Set WAKE mask to 0x0000000000000000
1510 13:44:56.762460 Root Device init finished in 35149 usecs
1511 13:44:56.765922 CPU_CLUSTER: 0 init ...
1512 13:44:56.772655 CPU_CLUSTER: 0 init finished in 2446 usecs
1513 13:44:56.776564 PCI: 00:00.0 init ...
1514 13:44:56.780136 CPU TDP: 15 Watts
1515 13:44:56.783505 CPU PL2 = 64 Watts
1516 13:44:56.786966 PCI: 00:00.0 init finished in 7080 usecs
1517 13:44:56.789878 PCI: 00:02.0 init ...
1518 13:44:56.793249 PCI: 00:02.0 init finished in 2254 usecs
1519 13:44:56.796697 PCI: 00:08.0 init ...
1520 13:44:56.800217 PCI: 00:08.0 init finished in 2253 usecs
1521 13:44:56.803546 PCI: 00:12.0 init ...
1522 13:44:56.806286 PCI: 00:12.0 init finished in 2251 usecs
1523 13:44:56.809860 PCI: 00:14.0 init ...
1524 13:44:56.813226 PCI: 00:14.0 init finished in 2252 usecs
1525 13:44:56.816491 PCI: 00:14.2 init ...
1526 13:44:56.819841 PCI: 00:14.2 init finished in 2252 usecs
1527 13:44:56.823201 PCI: 00:14.3 init ...
1528 13:44:56.826641 PCI: 00:14.3 init finished in 2271 usecs
1529 13:44:56.829921 PCI: 00:15.0 init ...
1530 13:44:56.833652 DW I2C bus 0 at 0xd121f000 (400 KHz)
1531 13:44:56.836028 PCI: 00:15.0 init finished in 5977 usecs
1532 13:44:56.839721 PCI: 00:15.1 init ...
1533 13:44:56.842771 DW I2C bus 1 at 0xd1220000 (400 KHz)
1534 13:44:56.849423 PCI: 00:15.1 init finished in 5972 usecs
1535 13:44:56.849509 PCI: 00:16.0 init ...
1536 13:44:56.856140 PCI: 00:16.0 init finished in 2253 usecs
1537 13:44:56.859600 PCI: 00:19.0 init ...
1538 13:44:56.862800 DW I2C bus 4 at 0xd1222000 (400 KHz)
1539 13:44:56.865934 PCI: 00:19.0 init finished in 5975 usecs
1540 13:44:56.869198 PCI: 00:1d.0 init ...
1541 13:44:56.872689 Initializing PCH PCIe bridge.
1542 13:44:56.875974 PCI: 00:1d.0 init finished in 5277 usecs
1543 13:44:56.878857 PCI: 00:1f.0 init ...
1544 13:44:56.882192 IOAPIC: Initializing IOAPIC at 0xfec00000
1545 13:44:56.888988 IOAPIC: Bootstrap Processor Local APIC = 0x00
1546 13:44:56.889102 IOAPIC: ID = 0x02
1547 13:44:56.892470 IOAPIC: Dumping registers
1548 13:44:56.895893 reg 0x0000: 0x02000000
1549 13:44:56.899317 reg 0x0001: 0x00770020
1550 13:44:56.899432 reg 0x0002: 0x00000000
1551 13:44:56.905631 PCI: 00:1f.0 init finished in 23549 usecs
1552 13:44:56.908971 PCI: 00:1f.4 init ...
1553 13:44:56.912349 PCI: 00:1f.4 init finished in 2262 usecs
1554 13:44:56.923215 PCI: 01:00.0 init ...
1555 13:44:56.926457 PCI: 01:00.0 init finished in 2251 usecs
1556 13:44:56.930549 PNP: 0c09.0 init ...
1557 13:44:56.933975 Google Chrome EC uptime: 11.256 seconds
1558 13:44:56.940610 Google Chrome AP resets since EC boot: 0
1559 13:44:56.944087 Google Chrome most recent AP reset causes:
1560 13:44:56.950243 Google Chrome EC reset flags at last EC boot: reset-pin
1561 13:44:56.953540 PNP: 0c09.0 init finished in 20570 usecs
1562 13:44:56.957315 Devices initialized
1563 13:44:56.957400 Show all devs... After init.
1564 13:44:56.960360 Root Device: enabled 1
1565 13:44:56.963566 CPU_CLUSTER: 0: enabled 1
1566 13:44:56.966959 DOMAIN: 0000: enabled 1
1567 13:44:56.967071 APIC: 00: enabled 1
1568 13:44:56.970215 PCI: 00:00.0: enabled 1
1569 13:44:56.973347 PCI: 00:02.0: enabled 1
1570 13:44:56.976639 PCI: 00:04.0: enabled 0
1571 13:44:56.976746 PCI: 00:05.0: enabled 0
1572 13:44:56.980176 PCI: 00:12.0: enabled 1
1573 13:44:56.983532 PCI: 00:12.5: enabled 0
1574 13:44:56.983648 PCI: 00:12.6: enabled 0
1575 13:44:56.986926 PCI: 00:14.0: enabled 1
1576 13:44:56.990254 PCI: 00:14.1: enabled 0
1577 13:44:56.993756 PCI: 00:14.3: enabled 1
1578 13:44:56.993864 PCI: 00:14.5: enabled 0
1579 13:44:56.996562 PCI: 00:15.0: enabled 1
1580 13:44:56.999900 PCI: 00:15.1: enabled 1
1581 13:44:57.003350 PCI: 00:15.2: enabled 0
1582 13:44:57.003425 PCI: 00:15.3: enabled 0
1583 13:44:57.006852 PCI: 00:16.0: enabled 1
1584 13:44:57.010264 PCI: 00:16.1: enabled 0
1585 13:44:57.013077 PCI: 00:16.2: enabled 0
1586 13:44:57.013161 PCI: 00:16.3: enabled 0
1587 13:44:57.016475 PCI: 00:16.4: enabled 0
1588 13:44:57.019861 PCI: 00:16.5: enabled 0
1589 13:44:57.023266 PCI: 00:17.0: enabled 1
1590 13:44:57.023350 PCI: 00:19.0: enabled 1
1591 13:44:57.026618 PCI: 00:19.1: enabled 0
1592 13:44:57.029932 PCI: 00:19.2: enabled 0
1593 13:44:57.030014 PCI: 00:1a.0: enabled 0
1594 13:44:57.033355 PCI: 00:1c.0: enabled 0
1595 13:44:57.036045 PCI: 00:1c.1: enabled 0
1596 13:44:57.039621 PCI: 00:1c.2: enabled 0
1597 13:44:57.039711 PCI: 00:1c.3: enabled 0
1598 13:44:57.042985 PCI: 00:1c.4: enabled 0
1599 13:44:57.046247 PCI: 00:1c.5: enabled 0
1600 13:44:57.049367 PCI: 00:1c.6: enabled 0
1601 13:44:57.049485 PCI: 00:1c.7: enabled 0
1602 13:44:57.052765 PCI: 00:1d.0: enabled 1
1603 13:44:57.056023 PCI: 00:1d.1: enabled 0
1604 13:44:57.059624 PCI: 00:1d.2: enabled 0
1605 13:44:57.059743 PCI: 00:1d.3: enabled 0
1606 13:44:57.063082 PCI: 00:1d.4: enabled 0
1607 13:44:57.066393 PCI: 00:1d.5: enabled 0
1608 13:44:57.066491 PCI: 00:1e.0: enabled 1
1609 13:44:57.069760 PCI: 00:1e.1: enabled 0
1610 13:44:57.072908 PCI: 00:1e.2: enabled 1
1611 13:44:57.076061 PCI: 00:1e.3: enabled 1
1612 13:44:57.076150 PCI: 00:1f.0: enabled 1
1613 13:44:57.079296 PCI: 00:1f.1: enabled 0
1614 13:44:57.082573 PCI: 00:1f.2: enabled 0
1615 13:44:57.085756 PCI: 00:1f.3: enabled 1
1616 13:44:57.085846 PCI: 00:1f.4: enabled 1
1617 13:44:57.089538 PCI: 00:1f.5: enabled 1
1618 13:44:57.092564 PCI: 00:1f.6: enabled 0
1619 13:44:57.096074 USB0 port 0: enabled 1
1620 13:44:57.096157 I2C: 01:15: enabled 1
1621 13:44:57.099302 I2C: 02:5d: enabled 1
1622 13:44:57.102755 GENERIC: 0.0: enabled 1
1623 13:44:57.102868 I2C: 03:1a: enabled 1
1624 13:44:57.105614 I2C: 03:38: enabled 1
1625 13:44:57.108957 I2C: 03:39: enabled 1
1626 13:44:57.109055 I2C: 03:3a: enabled 1
1627 13:44:57.112541 I2C: 03:3b: enabled 1
1628 13:44:57.115760 PCI: 00:00.0: enabled 1
1629 13:44:57.115841 SPI: 00: enabled 1
1630 13:44:57.119246 SPI: 01: enabled 1
1631 13:44:57.122179 PNP: 0c09.0: enabled 1
1632 13:44:57.122262 USB2 port 0: enabled 1
1633 13:44:57.125597 USB2 port 1: enabled 1
1634 13:44:57.128994 USB2 port 2: enabled 0
1635 13:44:57.129077 USB2 port 3: enabled 0
1636 13:44:57.132372 USB2 port 5: enabled 0
1637 13:44:57.135741 USB2 port 6: enabled 1
1638 13:44:57.139071 USB2 port 9: enabled 1
1639 13:44:57.139191 USB3 port 0: enabled 1
1640 13:44:57.142491 USB3 port 1: enabled 1
1641 13:44:57.145784 USB3 port 2: enabled 1
1642 13:44:57.145902 USB3 port 3: enabled 1
1643 13:44:57.148673 USB3 port 4: enabled 0
1644 13:44:57.152006 APIC: 02: enabled 1
1645 13:44:57.152102 APIC: 04: enabled 1
1646 13:44:57.155485 APIC: 03: enabled 1
1647 13:44:57.158761 APIC: 05: enabled 1
1648 13:44:57.158843 APIC: 01: enabled 1
1649 13:44:57.162143 APIC: 07: enabled 1
1650 13:44:57.162230 APIC: 06: enabled 1
1651 13:44:57.165576 PCI: 00:08.0: enabled 1
1652 13:44:57.169006 PCI: 00:14.2: enabled 1
1653 13:44:57.172266 PCI: 01:00.0: enabled 1
1654 13:44:57.175502 Disabling ACPI via APMC:
1655 13:44:57.175616 done.
1656 13:44:57.182067 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 13:44:57.185553 ELOG: NV offset 0xaf0000 size 0x4000
1658 13:44:57.192126 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 13:44:57.198907 ELOG: Event(17) added with size 13 at 2023-10-26 13:43:21 UTC
1660 13:44:57.205150 POST: Unexpected post code in previous boot: 0x73
1661 13:44:57.211967 ELOG: Event(A3) added with size 11 at 2023-10-26 13:43:21 UTC
1662 13:44:57.218551 ELOG: Event(A6) added with size 13 at 2023-10-26 13:43:21 UTC
1663 13:44:57.225579 ELOG: Event(92) added with size 9 at 2023-10-26 13:43:21 UTC
1664 13:44:57.228146 ELOG: Event(93) added with size 9 at 2023-10-26 13:43:22 UTC
1665 13:44:57.234883 ELOG: Event(9A) added with size 9 at 2023-10-26 13:43:22 UTC
1666 13:44:57.241587 ELOG: Event(9E) added with size 10 at 2023-10-26 13:43:22 UTC
1667 13:44:57.248302 ELOG: Event(9F) added with size 14 at 2023-10-26 13:43:22 UTC
1668 13:44:57.254960 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1669 13:44:57.261595 ELOG: Event(A1) added with size 10 at 2023-10-26 13:43:22 UTC
1670 13:44:57.268376 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1671 13:44:57.274758 ELOG: Event(A0) added with size 9 at 2023-10-26 13:43:22 UTC
1672 13:44:57.278116 elog_add_boot_reason: Logged dev mode boot
1673 13:44:57.281867 Finalize devices...
1674 13:44:57.284944 PCI: 00:17.0 final
1675 13:44:57.285036 Devices finalized
1676 13:44:57.291584 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1677 13:44:57.294910 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1678 13:44:57.301818 ME: HFSTS1 : 0x90000245
1679 13:44:57.304540 ME: HFSTS2 : 0x3B850126
1680 13:44:57.307899 ME: HFSTS3 : 0x00000020
1681 13:44:57.311376 ME: HFSTS4 : 0x00004800
1682 13:44:57.314734 ME: HFSTS5 : 0x00000000
1683 13:44:57.321014 ME: HFSTS6 : 0x40400006
1684 13:44:57.324643 ME: Manufacturing Mode : NO
1685 13:44:57.328069 ME: FW Partition Table : OK
1686 13:44:57.330958 ME: Bringup Loader Failure : NO
1687 13:44:57.334292 ME: Firmware Init Complete : YES
1688 13:44:57.337881 ME: Boot Options Present : NO
1689 13:44:57.340920 ME: Update In Progress : NO
1690 13:44:57.344703 ME: D0i3 Support : YES
1691 13:44:57.348023 ME: Low Power State Enabled : NO
1692 13:44:57.351449 ME: CPU Replaced : NO
1693 13:44:57.354176 ME: CPU Replacement Valid : YES
1694 13:44:57.357658 ME: Current Working State : 5
1695 13:44:57.360931 ME: Current Operation State : 1
1696 13:44:57.364451 ME: Current Operation Mode : 0
1697 13:44:57.367766 ME: Error Code : 0
1698 13:44:57.371387 ME: CPU Debug Disabled : YES
1699 13:44:57.374055 ME: TXT Support : NO
1700 13:44:57.377373 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1701 13:44:57.383898 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1702 13:44:57.387370 CBFS @ c08000 size 3f8000
1703 13:44:57.390509 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1704 13:44:57.397208 CBFS: Locating 'fallback/dsdt.aml'
1705 13:44:57.400311 CBFS: Found @ offset 10bb80 size 3fa5
1706 13:44:57.403659 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 13:44:57.407092 CBFS @ c08000 size 3f8000
1708 13:44:57.414071 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 13:44:57.417199 CBFS: Locating 'fallback/slic'
1710 13:44:57.420610 CBFS: 'fallback/slic' not found.
1711 13:44:57.427417 ACPI: Writing ACPI tables at 99b3e000.
1712 13:44:57.427535 ACPI: * FACS
1713 13:44:57.430237 ACPI: * DSDT
1714 13:44:57.433621 Ramoops buffer: 0x100000@0x99a3d000.
1715 13:44:57.436940 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1716 13:44:57.443158 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1717 13:44:57.446663 Google Chrome EC: version:
1718 13:44:57.450411 ro: helios_v2.0.2659-56403530b
1719 13:44:57.453450 rw: helios_v2.0.2849-c41de27e7d
1720 13:44:57.453532 running image: 1
1721 13:44:57.458048 ACPI: * FADT
1722 13:44:57.458125 SCI is IRQ9
1723 13:44:57.464188 ACPI: added table 1/32, length now 40
1724 13:44:57.464296 ACPI: * SSDT
1725 13:44:57.467917 Found 1 CPU(s) with 8 core(s) each.
1726 13:44:57.471048 Error: Could not locate 'wifi_sar' in VPD.
1727 13:44:57.477574 Checking CBFS for default SAR values
1728 13:44:57.481115 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1729 13:44:57.484345 CBFS @ c08000 size 3f8000
1730 13:44:57.490823 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1731 13:44:57.494239 CBFS: Locating 'wifi_sar_defaults.hex'
1732 13:44:57.497383 CBFS: Found @ offset 5fac0 size 77
1733 13:44:57.500702 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1734 13:44:57.507338 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1735 13:44:57.510734 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1736 13:44:57.517682 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1737 13:44:57.520554 failed to find key in VPD: dsm_calib_r0_0
1738 13:44:57.530774 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1739 13:44:57.534275 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1740 13:44:57.537613 failed to find key in VPD: dsm_calib_r0_1
1741 13:44:57.547391 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1742 13:44:57.553982 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1743 13:44:57.557099 failed to find key in VPD: dsm_calib_r0_2
1744 13:44:57.567337 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1745 13:44:57.570588 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1746 13:44:57.576648 failed to find key in VPD: dsm_calib_r0_3
1747 13:44:57.583385 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1748 13:44:57.590192 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1749 13:44:57.593350 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1750 13:44:57.596855 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1751 13:44:57.600825 EC returned error result code 1
1752 13:44:57.604222 EC returned error result code 1
1753 13:44:57.608207 EC returned error result code 1
1754 13:44:57.615152 PS2K: Bad resp from EC. Vivaldi disabled!
1755 13:44:57.618496 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1756 13:44:57.624714 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1757 13:44:57.631419 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1758 13:44:57.634249 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1759 13:44:57.641078 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1760 13:44:57.647876 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1761 13:44:57.654455 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1762 13:44:57.657759 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1763 13:44:57.664119 ACPI: added table 2/32, length now 44
1764 13:44:57.664226 ACPI: * MCFG
1765 13:44:57.667437 ACPI: added table 3/32, length now 48
1766 13:44:57.670799 ACPI: * TPM2
1767 13:44:57.674071 TPM2 log created at 99a2d000
1768 13:44:57.677427 ACPI: added table 4/32, length now 52
1769 13:44:57.677533 ACPI: * MADT
1770 13:44:57.680815 SCI is IRQ9
1771 13:44:57.684123 ACPI: added table 5/32, length now 56
1772 13:44:57.684226 current = 99b43ac0
1773 13:44:57.687336 ACPI: * DMAR
1774 13:44:57.690565 ACPI: added table 6/32, length now 60
1775 13:44:57.694447 ACPI: * IGD OpRegion
1776 13:44:57.694552 GMA: Found VBT in CBFS
1777 13:44:57.697663 GMA: Found valid VBT in CBFS
1778 13:44:57.700861 ACPI: added table 7/32, length now 64
1779 13:44:57.703978 ACPI: * HPET
1780 13:44:57.707624 ACPI: added table 8/32, length now 68
1781 13:44:57.707741 ACPI: done.
1782 13:44:57.710645 ACPI tables: 31744 bytes.
1783 13:44:57.714076 smbios_write_tables: 99a2c000
1784 13:44:57.717678 EC returned error result code 3
1785 13:44:57.720810 Couldn't obtain OEM name from CBI
1786 13:44:57.723790 Create SMBIOS type 17
1787 13:44:57.727442 PCI: 00:00.0 (Intel Cannonlake)
1788 13:44:57.731382 PCI: 00:14.3 (Intel WiFi)
1789 13:44:57.734053 SMBIOS tables: 939 bytes.
1790 13:44:57.737482 Writing table forward entry at 0x00000500
1791 13:44:57.744340 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1792 13:44:57.747691 Writing coreboot table at 0x99b62000
1793 13:44:57.753799 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1794 13:44:57.757047 1. 0000000000001000-000000000009ffff: RAM
1795 13:44:57.760316 2. 00000000000a0000-00000000000fffff: RESERVED
1796 13:44:57.766988 3. 0000000000100000-0000000099a2bfff: RAM
1797 13:44:57.770903 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1798 13:44:57.777085 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1799 13:44:57.784108 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1800 13:44:57.787437 7. 000000009a000000-000000009f7fffff: RESERVED
1801 13:44:57.793496 8. 00000000e0000000-00000000efffffff: RESERVED
1802 13:44:57.796963 9. 00000000fc000000-00000000fc000fff: RESERVED
1803 13:44:57.800047 10. 00000000fe000000-00000000fe00ffff: RESERVED
1804 13:44:57.806974 11. 00000000fed10000-00000000fed17fff: RESERVED
1805 13:44:57.810370 12. 00000000fed80000-00000000fed83fff: RESERVED
1806 13:44:57.817042 13. 00000000fed90000-00000000fed91fff: RESERVED
1807 13:44:57.820329 14. 00000000feda0000-00000000feda1fff: RESERVED
1808 13:44:57.826451 15. 0000000100000000-000000045e7fffff: RAM
1809 13:44:57.830699 Graphics framebuffer located at 0xc0000000
1810 13:44:57.833175 Passing 5 GPIOs to payload:
1811 13:44:57.836267 NAME | PORT | POLARITY | VALUE
1812 13:44:57.842902 write protect | undefined | high | high
1813 13:44:57.846445 lid | undefined | high | high
1814 13:44:57.853167 power | undefined | high | low
1815 13:44:57.859929 oprom | undefined | high | low
1816 13:44:57.862719 EC in RW | 0x000000cb | high | low
1817 13:44:57.866402 Board ID: 4
1818 13:44:57.869429 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1819 13:44:57.873070 CBFS @ c08000 size 3f8000
1820 13:44:57.879449 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1821 13:44:57.886167 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d86
1822 13:44:57.886254 coreboot table: 1492 bytes.
1823 13:44:57.889513 IMD ROOT 0. 99fff000 00001000
1824 13:44:57.892804 IMD SMALL 1. 99ffe000 00001000
1825 13:44:57.896034 FSP MEMORY 2. 99c4e000 003b0000
1826 13:44:57.899341 CONSOLE 3. 99c2e000 00020000
1827 13:44:57.902517 FMAP 4. 99c2d000 0000054e
1828 13:44:57.905827 TIME STAMP 5. 99c2c000 00000910
1829 13:44:57.909122 VBOOT WORK 6. 99c18000 00014000
1830 13:44:57.912396 MRC DATA 7. 99c16000 00001958
1831 13:44:57.916265 ROMSTG STCK 8. 99c15000 00001000
1832 13:44:57.919495 AFTER CAR 9. 99c0b000 0000a000
1833 13:44:57.922822 RAMSTAGE 10. 99baf000 0005c000
1834 13:44:57.926071 REFCODE 11. 99b7a000 00035000
1835 13:44:57.929225 SMM BACKUP 12. 99b6a000 00010000
1836 13:44:57.932555 COREBOOT 13. 99b62000 00008000
1837 13:44:57.938804 ACPI 14. 99b3e000 00024000
1838 13:44:57.942636 ACPI GNVS 15. 99b3d000 00001000
1839 13:44:57.945847 RAMOOPS 16. 99a3d000 00100000
1840 13:44:57.949214 TPM2 TCGLOG17. 99a2d000 00010000
1841 13:44:57.952568 SMBIOS 18. 99a2c000 00000800
1842 13:44:57.952674 IMD small region:
1843 13:44:57.955780 IMD ROOT 0. 99ffec00 00000400
1844 13:44:57.958977 FSP RUNTIME 1. 99ffebe0 00000004
1845 13:44:57.962064 EC HOSTEVENT 2. 99ffebc0 00000008
1846 13:44:57.965570 POWER STATE 3. 99ffeb80 00000040
1847 13:44:57.969090 ROMSTAGE 4. 99ffeb60 00000004
1848 13:44:57.972055 MEM INFO 5. 99ffe9a0 000001b9
1849 13:44:57.978752 VPD 6. 99ffe920 0000006c
1850 13:44:57.978838 MTRR: Physical address space:
1851 13:44:57.985645 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1852 13:44:57.992102 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1853 13:44:57.998476 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1854 13:44:58.005039 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1855 13:44:58.011930 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1856 13:44:58.018517 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1857 13:44:58.025063 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1858 13:44:58.028378 MTRR: Fixed MSR 0x250 0x0606060606060606
1859 13:44:58.031657 MTRR: Fixed MSR 0x258 0x0606060606060606
1860 13:44:58.034938 MTRR: Fixed MSR 0x259 0x0000000000000000
1861 13:44:58.041549 MTRR: Fixed MSR 0x268 0x0606060606060606
1862 13:44:58.044737 MTRR: Fixed MSR 0x269 0x0606060606060606
1863 13:44:58.048392 MTRR: Fixed MSR 0x26a 0x0606060606060606
1864 13:44:58.051713 MTRR: Fixed MSR 0x26b 0x0606060606060606
1865 13:44:58.058381 MTRR: Fixed MSR 0x26c 0x0606060606060606
1866 13:44:58.061562 MTRR: Fixed MSR 0x26d 0x0606060606060606
1867 13:44:58.064918 MTRR: Fixed MSR 0x26e 0x0606060606060606
1868 13:44:58.068188 MTRR: Fixed MSR 0x26f 0x0606060606060606
1869 13:44:58.071349 call enable_fixed_mtrr()
1870 13:44:58.075418 CPU physical address size: 39 bits
1871 13:44:58.081333 MTRR: default type WB/UC MTRR counts: 6/8.
1872 13:44:58.085041 MTRR: WB selected as default type.
1873 13:44:58.091334 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1874 13:44:58.095117 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1875 13:44:58.101539 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1876 13:44:58.108408 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1877 13:44:58.114330 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1878 13:44:58.120991 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1879 13:44:58.124404 MTRR: Fixed MSR 0x250 0x0606060606060606
1880 13:44:58.131360 MTRR: Fixed MSR 0x258 0x0606060606060606
1881 13:44:58.134619 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 13:44:58.138019 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 13:44:58.141409 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 13:44:58.147769 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 13:44:58.150842 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 13:44:58.154531 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 13:44:58.157586 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 13:44:58.164068 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 13:44:58.167367 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 13:44:58.167471
1891 13:44:58.167565 MTRR check
1892 13:44:58.170772 Fixed MTRRs : Enabled
1893 13:44:58.173827 Variable MTRRs: Enabled
1894 13:44:58.173929
1895 13:44:58.177714 call enable_fixed_mtrr()
1896 13:44:58.180435 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1897 13:44:58.183766 CPU physical address size: 39 bits
1898 13:44:58.190725 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1899 13:44:58.193966 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 13:44:58.197452 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 13:44:58.204178 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 13:44:58.207458 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 13:44:58.210763 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 13:44:58.214021 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 13:44:58.217320 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 13:44:58.223675 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 13:44:58.227555 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 13:44:58.230651 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 13:44:58.233644 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 13:44:58.241062 MTRR: Fixed MSR 0x250 0x0606060606060606
1911 13:44:58.244209 call enable_fixed_mtrr()
1912 13:44:58.246700 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 13:44:58.250274 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 13:44:58.253593 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 13:44:58.260536 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 13:44:58.263601 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 13:44:58.266665 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 13:44:58.269968 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 13:44:58.273775 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 13:44:58.280336 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 13:44:58.283541 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 13:44:58.286813 CPU physical address size: 39 bits
1923 13:44:58.290070 call enable_fixed_mtrr()
1924 13:44:58.293326 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 13:44:58.296579 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 13:44:58.303278 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 13:44:58.306388 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 13:44:58.309769 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 13:44:58.313321 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 13:44:58.319899 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 13:44:58.322961 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 13:44:58.326192 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 13:44:58.330149 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 13:44:58.336653 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 13:44:58.339960 MTRR: Fixed MSR 0x250 0x0606060606060606
1936 13:44:58.343276 call enable_fixed_mtrr()
1937 13:44:58.346654 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 13:44:58.350080 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 13:44:58.353092 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 13:44:58.359553 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 13:44:58.363075 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 13:44:58.366071 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 13:44:58.369293 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 13:44:58.375882 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 13:44:58.379461 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 13:44:58.382686 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 13:44:58.385678 CPU physical address size: 39 bits
1948 13:44:58.389175 call enable_fixed_mtrr()
1949 13:44:58.392511 CPU physical address size: 39 bits
1950 13:44:58.395729 CBFS @ c08000 size 3f8000
1951 13:44:58.402588 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1952 13:44:58.405987 CPU physical address size: 39 bits
1953 13:44:58.408773 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 13:44:58.412060 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 13:44:58.416054 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 13:44:58.422034 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 13:44:58.425693 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 13:44:58.428842 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 13:44:58.432268 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 13:44:58.438922 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 13:44:58.442161 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 13:44:58.445343 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 13:44:58.448770 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 13:44:58.455256 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 13:44:58.458546 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 13:44:58.461848 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 13:44:58.465167 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 13:44:58.471748 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 13:44:58.474980 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 13:44:58.478906 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 13:44:58.482221 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 13:44:58.488256 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 13:44:58.491829 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 13:44:58.494875 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 13:44:58.498677 call enable_fixed_mtrr()
1976 13:44:58.501722 call enable_fixed_mtrr()
1977 13:44:58.505299 CPU physical address size: 39 bits
1978 13:44:58.508658 CPU physical address size: 39 bits
1979 13:44:58.511548 CBFS: Locating 'fallback/payload'
1980 13:44:58.515302 CBFS: Found @ offset 1c96c0 size 3f798
1981 13:44:58.521814 Checking segment from ROM address 0xffdd16f8
1982 13:44:58.524778 Checking segment from ROM address 0xffdd1714
1983 13:44:58.528449 Loading segment from ROM address 0xffdd16f8
1984 13:44:58.531472 code (compression=0)
1985 13:44:58.541498 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1986 13:44:58.548190 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1987 13:44:58.551433 it's not compressed!
1988 13:44:58.643178 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1989 13:44:58.649938 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1990 13:44:58.653263 Loading segment from ROM address 0xffdd1714
1991 13:44:58.656605 Entry Point 0x30000000
1992 13:44:58.659760 Loaded segments
1993 13:44:58.665059 Finalizing chipset.
1994 13:44:58.668378 Finalizing SMM.
1995 13:44:58.671742 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1996 13:44:58.675567 mp_park_aps done after 0 msecs.
1997 13:44:58.681986 Jumping to boot code at 30000000(99b62000)
1998 13:44:58.688779 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1999 13:44:58.688882
2000 13:44:58.688977
2001 13:44:58.689065
2002 13:44:58.692140 Starting depthcharge on Helios...
2003 13:44:58.692234
2004 13:44:58.692659 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2005 13:44:58.692820 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2006 13:44:58.692935 Setting prompt string to ['hatch:']
2007 13:44:58.693055 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2008 13:44:58.701540 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2009 13:44:58.701646
2010 13:44:58.708677 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2011 13:44:58.708778
2012 13:44:58.714798 board_setup: Info: eMMC controller not present; skipping
2013 13:44:58.714902
2014 13:44:58.718673 New NVMe Controller 0x30053aa8 @ 00:1d:00
2015 13:44:58.718800
2016 13:44:58.725048 board_setup: Info: SDHCI controller not present; skipping
2017 13:44:58.725153
2018 13:44:58.728486 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2019 13:44:58.731650
2020 13:44:58.731806 Wipe memory regions:
2021 13:44:58.731900
2022 13:44:58.734706 [0x00000000001000, 0x000000000a0000)
2023 13:44:58.734826
2024 13:44:58.738017 [0x00000000100000, 0x00000030000000)
2025 13:44:58.804441
2026 13:44:58.807803 [0x00000030657430, 0x00000099a2c000)
2027 13:44:58.945574
2028 13:44:58.948792 [0x00000100000000, 0x0000045e800000)
2029 13:45:00.499222
2030 13:45:00.499379 R8152: Initializing
2031 13:45:00.499449
2032 13:45:00.502288 Version 6 (ocp_data = 5c30)
2033 13:45:00.502375
2034 13:45:00.505562 R8152: Done initializing
2035 13:45:00.505651
2036 13:45:00.509376 Adding net device
2037 13:45:00.509455
2038 13:45:00.515972 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2039 13:45:00.516056
2040 13:45:00.516122
2041 13:45:00.516184
2042 13:45:00.516462 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2044 13:45:00.616763 hatch: tftpboot 192.168.201.1 11884079/tftp-deploy-gubbjh33/kernel/bzImage 11884079/tftp-deploy-gubbjh33/kernel/cmdline 11884079/tftp-deploy-gubbjh33/ramdisk/ramdisk.cpio.gz
2045 13:45:00.616917 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2046 13:45:00.617021 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2047 13:45:00.620903 tftpboot 192.168.201.1 11884079/tftp-deploy-gubbjh33/kernel/bzIploy-gubbjh33/kernel/cmdline 11884079/tftp-deploy-gubbjh33/ramdisk/ramdisk.cpio.gz
2048 13:45:00.620991
2049 13:45:00.621059 Waiting for link
2050 13:45:00.821851
2051 13:45:00.821994 done.
2052 13:45:00.822063
2053 13:45:00.822126 MAC: 00:24:32:50:19:be
2054 13:45:00.822188
2055 13:45:00.825087 Sending DHCP discover... done.
2056 13:45:00.825168
2057 13:45:00.828179 Waiting for reply... done.
2058 13:45:00.828257
2059 13:45:00.831387 Sending DHCP request... done.
2060 13:45:00.831477
2061 13:45:00.835269 Waiting for reply... done.
2062 13:45:00.835381
2063 13:45:00.838407 My ip is 192.168.201.15
2064 13:45:00.838492
2065 13:45:00.841874 The DHCP server ip is 192.168.201.1
2066 13:45:00.841989
2067 13:45:00.848360 TFTP server IP predefined by user: 192.168.201.1
2068 13:45:00.848471
2069 13:45:00.854916 Bootfile predefined by user: 11884079/tftp-deploy-gubbjh33/kernel/bzImage
2070 13:45:00.854999
2071 13:45:00.858273 Sending tftp read request... done.
2072 13:45:00.858359
2073 13:45:00.861554 Waiting for the transfer...
2074 13:45:00.861686
2075 13:45:01.383412 00000000 ################################################################
2076 13:45:01.383594
2077 13:45:01.891332 00080000 ################################################################
2078 13:45:01.891502
2079 13:45:02.405794 00100000 ################################################################
2080 13:45:02.405980
2081 13:45:02.919421 00180000 ################################################################
2082 13:45:02.919586
2083 13:45:03.424799 00200000 ################################################################
2084 13:45:03.424948
2085 13:45:03.931047 00280000 ################################################################
2086 13:45:03.931232
2087 13:45:04.438405 00300000 ################################################################
2088 13:45:04.438542
2089 13:45:04.956219 00380000 ################################################################
2090 13:45:04.956370
2091 13:45:05.487323 00400000 ################################################################
2092 13:45:05.487496
2093 13:45:06.015781 00480000 ################################################################
2094 13:45:06.015949
2095 13:45:06.538517 00500000 ################################################################
2096 13:45:06.538683
2097 13:45:07.063143 00580000 ################################################################
2098 13:45:07.063277
2099 13:45:07.592305 00600000 ################################################################
2100 13:45:07.592449
2101 13:45:08.131173 00680000 ################################################################
2102 13:45:08.131313
2103 13:45:08.680509 00700000 ################################################################
2104 13:45:08.680648
2105 13:45:09.213867 00780000 ################################################################
2106 13:45:09.214021
2107 13:45:09.408004 00800000 ####################### done.
2108 13:45:09.408151
2109 13:45:09.411437 The bootfile was 8576912 bytes long.
2110 13:45:09.411521
2111 13:45:09.414960 Sending tftp read request... done.
2112 13:45:09.415045
2113 13:45:09.418276 Waiting for the transfer...
2114 13:45:09.418359
2115 13:45:09.962449 00000000 ################################################################
2116 13:45:09.962603
2117 13:45:10.497763 00080000 ################################################################
2118 13:45:10.497912
2119 13:45:11.052405 00100000 ################################################################
2120 13:45:11.052548
2121 13:45:11.596555 00180000 ################################################################
2122 13:45:11.596706
2123 13:45:12.115176 00200000 ################################################################
2124 13:45:12.115330
2125 13:45:12.653933 00280000 ################################################################
2126 13:45:12.654066
2127 13:45:13.183708 00300000 ################################################################
2128 13:45:13.183844
2129 13:45:13.725683 00380000 ################################################################
2130 13:45:13.725821
2131 13:45:14.275779 00400000 ################################################################
2132 13:45:14.275919
2133 13:45:14.828636 00480000 ################################################################
2134 13:45:14.828793
2135 13:45:15.389857 00500000 ################################################################
2136 13:45:15.390003
2137 13:45:15.644290 00580000 ############################# done.
2138 13:45:15.644441
2139 13:45:15.647509 Sending tftp read request... done.
2140 13:45:15.647592
2141 13:45:15.650564 Waiting for the transfer...
2142 13:45:15.650650
2143 13:45:15.650716 00000000 # done.
2144 13:45:15.650781
2145 13:45:15.660484 Command line loaded dynamically from TFTP file: 11884079/tftp-deploy-gubbjh33/kernel/cmdline
2146 13:45:15.660568
2147 13:45:15.690519 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11884079/extract-nfsrootfs-g1mevi50,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2148 13:45:15.690613
2149 13:45:15.693531 ec_init(0): CrosEC protocol v3 supported (256, 256)
2150 13:45:15.700046
2151 13:45:15.703453 Shutting down all USB controllers.
2152 13:45:15.703529
2153 13:45:15.703600 Removing current net device
2154 13:45:15.706773
2155 13:45:15.706843 Finalizing coreboot
2156 13:45:15.706911
2157 13:45:15.713482 Exiting depthcharge with code 4 at timestamp: 24421545
2158 13:45:15.713568
2159 13:45:15.713631
2160 13:45:15.713690 Starting kernel ...
2161 13:45:15.713748
2162 13:45:15.713814
2163 13:45:15.714180 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2164 13:45:15.714281 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2165 13:45:15.714360 Setting prompt string to ['Linux version [0-9]']
2166 13:45:15.714435 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2167 13:45:15.714507 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2169 13:49:40.715298 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2171 13:49:40.716322 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2173 13:49:40.717113 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2176 13:49:40.717382 end: 2 depthcharge-action (duration 00:05:00) [common]
2178 13:49:40.717596 Cleaning after the job
2179 13:49:40.717684 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/ramdisk
2180 13:49:40.718605 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/kernel
2181 13:49:40.719895 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/nfsrootfs
2182 13:49:40.836408 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884079/tftp-deploy-gubbjh33/modules
2183 13:49:40.838708 start: 4.1 power-off (timeout 00:00:30) [common]
2184 13:49:40.838876 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2185 13:49:40.917270 >> Command sent successfully.
2186 13:49:40.922054 Returned 0 in 0 seconds
2187 13:49:41.023174 end: 4.1 power-off (duration 00:00:00) [common]
2189 13:49:41.024669 start: 4.2 read-feedback (timeout 00:10:00) [common]
2190 13:49:41.025929 Listened to connection for namespace 'common' for up to 1s
2192 13:49:41.027209 Listened to connection for namespace 'common' for up to 1s
2193 13:49:42.026649 Finalising connection for namespace 'common'
2194 13:49:42.027274 Disconnecting from shell: Finalise
2195 13:49:42.027684
2196 13:49:42.128785 end: 4.2 read-feedback (duration 00:00:01) [common]
2197 13:49:42.129349 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11884079
2198 13:49:42.634365 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11884079
2199 13:49:42.634561 JobError: Your job cannot terminate cleanly.