Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 13:50:27.543797 lava-dispatcher, installed at version: 2023.08
2 13:50:27.544003 start: 0 validate
3 13:50:27.544130 Start time: 2023-10-26 13:50:27.544122+00:00 (UTC)
4 13:50:27.544253 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:50:27.544382 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 13:50:27.795911 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:50:27.796085 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:50:28.045423 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:50:28.045600 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:50:28.294363 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:50:28.294544 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-3596-g73e7f2b880d98%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 13:50:28.553042 validate duration: 1.01
14 13:50:28.553347 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:50:28.553512 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:50:28.553627 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:50:28.553797 Not decompressing ramdisk as can be used compressed.
18 13:50:28.553883 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 13:50:28.553972 saving as /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/ramdisk/initrd.cpio.gz
20 13:50:28.554049 total size: 5671549 (5 MB)
21 13:50:28.555096 progress 0 % (0 MB)
22 13:50:28.556924 progress 5 % (0 MB)
23 13:50:28.558486 progress 10 % (0 MB)
24 13:50:28.559941 progress 15 % (0 MB)
25 13:50:28.561493 progress 20 % (1 MB)
26 13:50:28.563133 progress 25 % (1 MB)
27 13:50:28.564587 progress 30 % (1 MB)
28 13:50:28.566111 progress 35 % (1 MB)
29 13:50:28.567643 progress 40 % (2 MB)
30 13:50:28.569213 progress 45 % (2 MB)
31 13:50:28.570738 progress 50 % (2 MB)
32 13:50:28.572297 progress 55 % (3 MB)
33 13:50:28.573658 progress 60 % (3 MB)
34 13:50:28.575288 progress 65 % (3 MB)
35 13:50:28.576909 progress 70 % (3 MB)
36 13:50:28.578306 progress 75 % (4 MB)
37 13:50:28.579884 progress 80 % (4 MB)
38 13:50:28.581438 progress 85 % (4 MB)
39 13:50:28.582954 progress 90 % (4 MB)
40 13:50:28.584540 progress 95 % (5 MB)
41 13:50:28.586261 progress 100 % (5 MB)
42 13:50:28.586444 5 MB downloaded in 0.03 s (166.96 MB/s)
43 13:50:28.586599 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:50:28.586830 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:50:28.586916 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:50:28.586999 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:50:28.587129 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 13:50:28.587197 saving as /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/kernel/bzImage
50 13:50:28.587255 total size: 8576912 (8 MB)
51 13:50:28.587314 No compression specified
52 13:50:28.588481 progress 0 % (0 MB)
53 13:50:28.590877 progress 5 % (0 MB)
54 13:50:28.593301 progress 10 % (0 MB)
55 13:50:28.595565 progress 15 % (1 MB)
56 13:50:28.597867 progress 20 % (1 MB)
57 13:50:28.600269 progress 25 % (2 MB)
58 13:50:28.602512 progress 30 % (2 MB)
59 13:50:28.604774 progress 35 % (2 MB)
60 13:50:28.606978 progress 40 % (3 MB)
61 13:50:28.609231 progress 45 % (3 MB)
62 13:50:28.611447 progress 50 % (4 MB)
63 13:50:28.613677 progress 55 % (4 MB)
64 13:50:28.616040 progress 60 % (4 MB)
65 13:50:28.618250 progress 65 % (5 MB)
66 13:50:28.620535 progress 70 % (5 MB)
67 13:50:28.622722 progress 75 % (6 MB)
68 13:50:28.625069 progress 80 % (6 MB)
69 13:50:28.627228 progress 85 % (6 MB)
70 13:50:28.629474 progress 90 % (7 MB)
71 13:50:28.631723 progress 95 % (7 MB)
72 13:50:28.633940 progress 100 % (8 MB)
73 13:50:28.634143 8 MB downloaded in 0.05 s (174.46 MB/s)
74 13:50:28.634288 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:50:28.634514 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:50:28.634604 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:50:28.634692 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:50:28.634833 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 13:50:28.634900 saving as /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/nfsrootfs/full.rootfs.tar
81 13:50:28.634961 total size: 126031368 (120 MB)
82 13:50:28.635023 Using unxz to decompress xz
83 13:50:28.639302 progress 0 % (0 MB)
84 13:50:29.124585 progress 5 % (6 MB)
85 13:50:29.615275 progress 10 % (12 MB)
86 13:50:30.109686 progress 15 % (18 MB)
87 13:50:30.622528 progress 20 % (24 MB)
88 13:50:30.964846 progress 25 % (30 MB)
89 13:50:31.304318 progress 30 % (36 MB)
90 13:50:31.567738 progress 35 % (42 MB)
91 13:50:31.746837 progress 40 % (48 MB)
92 13:50:32.107389 progress 45 % (54 MB)
93 13:50:32.476871 progress 50 % (60 MB)
94 13:50:32.812169 progress 55 % (66 MB)
95 13:50:33.166080 progress 60 % (72 MB)
96 13:50:33.501504 progress 65 % (78 MB)
97 13:50:33.884260 progress 70 % (84 MB)
98 13:50:34.296515 progress 75 % (90 MB)
99 13:50:34.706998 progress 80 % (96 MB)
100 13:50:34.805042 progress 85 % (102 MB)
101 13:50:34.959045 progress 90 % (108 MB)
102 13:50:35.293225 progress 95 % (114 MB)
103 13:50:35.664321 progress 100 % (120 MB)
104 13:50:35.669198 120 MB downloaded in 7.03 s (17.09 MB/s)
105 13:50:35.669461 end: 1.3.1 http-download (duration 00:00:07) [common]
107 13:50:35.669712 end: 1.3 download-retry (duration 00:00:07) [common]
108 13:50:35.669803 start: 1.4 download-retry (timeout 00:09:53) [common]
109 13:50:35.669890 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 13:50:35.670046 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-3596-g73e7f2b880d98/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 13:50:35.670120 saving as /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/modules/modules.tar
112 13:50:35.670181 total size: 253872 (0 MB)
113 13:50:35.670245 Using unxz to decompress xz
114 13:50:35.674440 progress 12 % (0 MB)
115 13:50:35.674846 progress 25 % (0 MB)
116 13:50:35.675083 progress 38 % (0 MB)
117 13:50:35.676664 progress 51 % (0 MB)
118 13:50:35.678493 progress 64 % (0 MB)
119 13:50:35.680456 progress 77 % (0 MB)
120 13:50:35.682311 progress 90 % (0 MB)
121 13:50:35.684061 progress 100 % (0 MB)
122 13:50:35.689745 0 MB downloaded in 0.02 s (12.38 MB/s)
123 13:50:35.689981 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:50:35.690236 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:50:35.690336 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 13:50:35.690434 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 13:50:38.657742 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11884143/extract-nfsrootfs-hjifdfca
129 13:50:38.657926 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 13:50:38.658024 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 13:50:38.658193 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt
132 13:50:38.658364 makedir: /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin
133 13:50:38.658466 makedir: /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/tests
134 13:50:38.658564 makedir: /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/results
135 13:50:38.658664 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-add-keys
136 13:50:38.658805 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-add-sources
137 13:50:38.658931 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-background-process-start
138 13:50:38.659057 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-background-process-stop
139 13:50:38.659180 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-common-functions
140 13:50:38.659301 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-echo-ipv4
141 13:50:38.659423 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-install-packages
142 13:50:38.659546 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-installed-packages
143 13:50:38.659771 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-os-build
144 13:50:38.659899 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-probe-channel
145 13:50:38.660025 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-probe-ip
146 13:50:38.660147 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-target-ip
147 13:50:38.660272 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-target-mac
148 13:50:38.660395 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-target-storage
149 13:50:38.660549 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-test-case
150 13:50:38.660673 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-test-event
151 13:50:38.660795 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-test-feedback
152 13:50:38.660917 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-test-raise
153 13:50:38.661055 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-test-reference
154 13:50:38.661225 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-test-runner
155 13:50:38.661382 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-test-set
156 13:50:38.661505 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-test-shell
157 13:50:38.661646 Updating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-install-packages (oe)
158 13:50:38.664739 Updating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/bin/lava-installed-packages (oe)
159 13:50:38.664915 Creating /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/environment
160 13:50:38.665067 LAVA metadata
161 13:50:38.665186 - LAVA_JOB_ID=11884143
162 13:50:38.665279 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:50:38.665383 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 13:50:38.665449 skipped lava-vland-overlay
165 13:50:38.665522 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:50:38.665599 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 13:50:38.665658 skipped lava-multinode-overlay
168 13:50:38.665760 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:50:38.665835 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 13:50:38.665906 Loading test definitions
171 13:50:38.665990 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 13:50:38.666059 Using /lava-11884143 at stage 0
173 13:50:38.666151 Fetching tests from https://github.com/kernelci/test-definitions
174 13:50:38.666227 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/0/tests/0_ltp-timers'
175 13:50:53.490697 Running '/usr/bin/git checkout kernelci.org
176 13:50:53.640258 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
177 13:50:53.641175 uuid=11884143_1.5.2.3.1 testdef=None
178 13:50:53.641380 end: 1.5.2.3.1 git-repo-action (duration 00:00:15) [common]
180 13:50:53.641697 start: 1.5.2.3.2 test-overlay (timeout 00:09:35) [common]
181 13:50:53.642784 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 13:50:53.643025 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:35) [common]
184 13:50:53.644514 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 13:50:53.644830 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:35) [common]
187 13:50:53.646230 runner path: /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/0/tests/0_ltp-timers test_uuid 11884143_1.5.2.3.1
188 13:50:53.646348 GRP_TEST='TMR'
189 13:50:53.646442 SKIPFILE='skipfile-lkft.yaml'
190 13:50:53.646530 SKIP_INSTALL='true'
191 13:50:53.646614 TST_CMDFILES=''
192 13:50:53.646772 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 13:50:53.647062 Creating lava-test-runner.conf files
195 13:50:53.647155 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11884143/lava-overlay-i5cf7vmt/lava-11884143/0 for stage 0
196 13:50:53.647280 - 0_ltp-timers
197 13:50:53.647418 end: 1.5.2.3 test-definition (duration 00:00:15) [common]
198 13:50:53.647537 start: 1.5.2.4 compress-overlay (timeout 00:09:35) [common]
199 13:51:01.230761 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
200 13:51:01.230917 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:27) [common]
201 13:51:01.231013 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 13:51:01.231157 end: 1.5.2 lava-overlay (duration 00:00:23) [common]
203 13:51:01.231254 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:27) [common]
204 13:51:01.376787 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 13:51:01.377177 start: 1.5.4 extract-modules (timeout 00:09:27) [common]
206 13:51:01.377321 extracting modules file /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884143/extract-nfsrootfs-hjifdfca
207 13:51:01.392008 extracting modules file /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11884143/extract-overlay-ramdisk-lugdy573/ramdisk
208 13:51:01.406271 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 13:51:01.406429 start: 1.5.5 apply-overlay-tftp (timeout 00:09:27) [common]
210 13:51:01.406518 [common] Applying overlay to NFS
211 13:51:01.406596 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11884143/compress-overlay-5nv841ty/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11884143/extract-nfsrootfs-hjifdfca
212 13:51:02.354312 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
213 13:51:02.354469 start: 1.5.6 configure-preseed-file (timeout 00:09:26) [common]
214 13:51:02.354565 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 13:51:02.354663 start: 1.5.7 compress-ramdisk (timeout 00:09:26) [common]
216 13:51:02.354745 Building ramdisk /var/lib/lava/dispatcher/tmp/11884143/extract-overlay-ramdisk-lugdy573/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11884143/extract-overlay-ramdisk-lugdy573/ramdisk
217 13:51:02.428178 >> 27217 blocks
218 13:51:02.997462 rename /var/lib/lava/dispatcher/tmp/11884143/extract-overlay-ramdisk-lugdy573/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/ramdisk/ramdisk.cpio.gz
219 13:51:02.997916 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 13:51:02.998037 start: 1.5.8 prepare-kernel (timeout 00:09:26) [common]
221 13:51:02.998142 start: 1.5.8.1 prepare-fit (timeout 00:09:26) [common]
222 13:51:02.998236 No mkimage arch provided, not using FIT.
223 13:51:02.998330 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 13:51:02.998416 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 13:51:02.998521 end: 1.5 prepare-tftp-overlay (duration 00:00:27) [common]
226 13:51:02.998617 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:26) [common]
227 13:51:02.998705 No LXC device requested
228 13:51:02.998785 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 13:51:02.998877 start: 1.7 deploy-device-env (timeout 00:09:26) [common]
230 13:51:02.998965 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 13:51:02.999045 Checking files for TFTP limit of 4294967296 bytes.
232 13:51:02.999471 end: 1 tftp-deploy (duration 00:00:34) [common]
233 13:51:02.999580 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 13:51:02.999714 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 13:51:02.999842 substitutions:
236 13:51:02.999915 - {DTB}: None
237 13:51:02.999980 - {INITRD}: 11884143/tftp-deploy-cymtohgg/ramdisk/ramdisk.cpio.gz
238 13:51:03.000044 - {KERNEL}: 11884143/tftp-deploy-cymtohgg/kernel/bzImage
239 13:51:03.000102 - {LAVA_MAC}: None
240 13:51:03.000160 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11884143/extract-nfsrootfs-hjifdfca
241 13:51:03.000219 - {NFS_SERVER_IP}: 192.168.201.1
242 13:51:03.000274 - {PRESEED_CONFIG}: None
243 13:51:03.000334 - {PRESEED_LOCAL}: None
244 13:51:03.000389 - {RAMDISK}: 11884143/tftp-deploy-cymtohgg/ramdisk/ramdisk.cpio.gz
245 13:51:03.000444 - {ROOT_PART}: None
246 13:51:03.000498 - {ROOT}: None
247 13:51:03.000552 - {SERVER_IP}: 192.168.201.1
248 13:51:03.000610 - {TEE}: None
249 13:51:03.000664 Parsed boot commands:
250 13:51:03.000717 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 13:51:03.000904 Parsed boot commands: tftpboot 192.168.201.1 11884143/tftp-deploy-cymtohgg/kernel/bzImage 11884143/tftp-deploy-cymtohgg/kernel/cmdline 11884143/tftp-deploy-cymtohgg/ramdisk/ramdisk.cpio.gz
252 13:51:03.000993 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 13:51:03.001080 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 13:51:03.001179 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 13:51:03.001267 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 13:51:03.001338 Not connected, no need to disconnect.
257 13:51:03.001418 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 13:51:03.001503 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 13:51:03.001571 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
260 13:51:03.005532 Setting prompt string to ['lava-test: # ']
261 13:51:03.005906 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 13:51:03.006018 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 13:51:03.006120 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 13:51:03.006209 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 13:51:03.006469 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
266 13:51:08.138184 >> Command sent successfully.
267 13:51:08.140604 Returned 0 in 5 seconds
268 13:51:08.240999 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
270 13:51:08.241349 end: 2.2.2 reset-device (duration 00:00:05) [common]
271 13:51:08.241469 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
272 13:51:08.241575 Setting prompt string to 'Starting depthcharge on Helios...'
273 13:51:08.241682 Changing prompt to 'Starting depthcharge on Helios...'
274 13:51:08.241775 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
275 13:51:08.242129 [Enter `^Ec?' for help]
276 13:51:08.863004
277 13:51:08.863165
278 13:51:08.873079 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
279 13:51:08.876785 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
280 13:51:08.882736 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
281 13:51:08.886129 CPU: AES supported, TXT NOT supported, VT supported
282 13:51:08.893723 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
283 13:51:08.896440 PCH: device id 0284 (rev 00) is Cometlake-U Premium
284 13:51:08.903219 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
285 13:51:08.906713 VBOOT: Loading verstage.
286 13:51:08.909779 FMAP: Found "FLASH" version 1.1 at 0xc04000.
287 13:51:08.916715 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
288 13:51:08.919713 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
289 13:51:08.923309 CBFS @ c08000 size 3f8000
290 13:51:08.929756 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
291 13:51:08.933074 CBFS: Locating 'fallback/verstage'
292 13:51:08.936006 CBFS: Found @ offset 10fb80 size 1072c
293 13:51:08.939968
294 13:51:08.940073
295 13:51:08.949454 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
296 13:51:08.963700 Probing TPM: . done!
297 13:51:08.967685 TPM ready after 0 ms
298 13:51:08.970513 Connected to device vid:did:rid of 1ae0:0028:00
299 13:51:08.981145 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
300 13:51:08.984321 Initialized TPM device CR50 revision 0
301 13:51:09.090246 tlcl_send_startup: Startup return code is 0
302 13:51:09.090373 TPM: setup succeeded
303 13:51:09.102997 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
304 13:51:09.106746 Chrome EC: UHEPI supported
305 13:51:09.109952 Phase 1
306 13:51:09.113536 FMAP: area GBB found @ c05000 (12288 bytes)
307 13:51:09.119808 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
308 13:51:09.119895 Phase 2
309 13:51:09.123380 Phase 3
310 13:51:09.126748 FMAP: area GBB found @ c05000 (12288 bytes)
311 13:51:09.133188 VB2:vb2_report_dev_firmware() This is developer signed firmware
312 13:51:09.139939 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
313 13:51:09.142975 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 13:51:09.149784 VB2:vb2_verify_keyblock() Checking keyblock signature...
315 13:51:09.165673 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 13:51:09.168523 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 13:51:09.175362 VB2:vb2_verify_fw_preamble() Verifying preamble.
318 13:51:09.180042 Phase 4
319 13:51:09.183505 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
320 13:51:09.190413 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
321 13:51:09.369028 VB2:vb2_rsa_verify_digest() Digest check failed!
322 13:51:09.375951 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
323 13:51:09.376046 Saving nvdata
324 13:51:09.378784 Reboot requested (10020007)
325 13:51:09.382143 board_reset() called!
326 13:51:09.382229 full_reset() called!
327 13:51:13.934509
328 13:51:13.934658
329 13:51:13.944873 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
330 13:51:13.947861 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
331 13:51:13.954592 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
332 13:51:13.958255 CPU: AES supported, TXT NOT supported, VT supported
333 13:51:13.964681 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
334 13:51:13.967633 PCH: device id 0284 (rev 00) is Cometlake-U Premium
335 13:51:13.974440 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
336 13:51:13.977559 VBOOT: Loading verstage.
337 13:51:13.981267 FMAP: Found "FLASH" version 1.1 at 0xc04000.
338 13:51:13.987774 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
339 13:51:13.994425 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 13:51:13.994507 CBFS @ c08000 size 3f8000
341 13:51:14.001004 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
342 13:51:14.004320 CBFS: Locating 'fallback/verstage'
343 13:51:14.007355 CBFS: Found @ offset 10fb80 size 1072c
344 13:51:14.011717
345 13:51:14.011813
346 13:51:14.021278 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
347 13:51:14.036071 Probing TPM: . done!
348 13:51:14.039300 TPM ready after 0 ms
349 13:51:14.042330 Connected to device vid:did:rid of 1ae0:0028:00
350 13:51:14.052465 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
351 13:51:14.056576 Initialized TPM device CR50 revision 0
352 13:51:14.162003 tlcl_send_startup: Startup return code is 0
353 13:51:14.162116 TPM: setup succeeded
354 13:51:14.174655 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
355 13:51:14.178173 Chrome EC: UHEPI supported
356 13:51:14.181820 Phase 1
357 13:51:14.185069 FMAP: area GBB found @ c05000 (12288 bytes)
358 13:51:14.191601 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
359 13:51:14.198421 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
360 13:51:14.201462 Recovery requested (1009000e)
361 13:51:14.206948 Saving nvdata
362 13:51:14.213473 tlcl_extend: response is 0
363 13:51:14.222258 tlcl_extend: response is 0
364 13:51:14.229114 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
365 13:51:14.232852 CBFS @ c08000 size 3f8000
366 13:51:14.239492 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
367 13:51:14.242668 CBFS: Locating 'fallback/romstage'
368 13:51:14.245773 CBFS: Found @ offset 80 size 145fc
369 13:51:14.249496 Accumulated console time in verstage 98 ms
370 13:51:14.249578
371 13:51:14.249642
372 13:51:14.262115 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
373 13:51:14.268695 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
374 13:51:14.272521 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
375 13:51:14.275526 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
376 13:51:14.282319 gpe0_sts[1]: 00300000 gpe0_en[1]: 00000000
377 13:51:14.285089 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
378 13:51:14.288713 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
379 13:51:14.292235 TCO_STS: 0000 0000
380 13:51:14.295340 GEN_PMCON: e0015238 00000200
381 13:51:14.298700 GBLRST_CAUSE: 00000000 00000000
382 13:51:14.298781 prev_sleep_state 5
383 13:51:14.302408 Boot Count incremented to 66892
384 13:51:14.309018 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
385 13:51:14.312343 CBFS @ c08000 size 3f8000
386 13:51:14.319091 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
387 13:51:14.319174 CBFS: Locating 'fspm.bin'
388 13:51:14.322645 CBFS: Found @ offset 5ffc0 size 71000
389 13:51:14.326675 Chrome EC: UHEPI supported
390 13:51:14.333911 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
391 13:51:14.338757 Probing TPM: done!
392 13:51:14.345521 Connected to device vid:did:rid of 1ae0:0028:00
393 13:51:14.355745 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
394 13:51:14.361289 Initialized TPM device CR50 revision 0
395 13:51:14.370363 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
396 13:51:14.377245 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
397 13:51:14.380260 MRC cache found, size 1948
398 13:51:14.383896 bootmode is set to: 2
399 13:51:14.387003 PRMRR disabled by config.
400 13:51:14.387085 SPD INDEX = 1
401 13:51:14.393635 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 13:51:14.396660 CBFS @ c08000 size 3f8000
403 13:51:14.403765 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 13:51:14.403874 CBFS: Locating 'spd.bin'
405 13:51:14.406679 CBFS: Found @ offset 5fb80 size 400
406 13:51:14.410240 SPD: module type is LPDDR3
407 13:51:14.413209 SPD: module part is
408 13:51:14.419844 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
409 13:51:14.423587 SPD: device width 4 bits, bus width 8 bits
410 13:51:14.426883 SPD: module size is 4096 MB (per channel)
411 13:51:14.429980 memory slot: 0 configuration done.
412 13:51:14.433255 memory slot: 2 configuration done.
413 13:51:14.484946 CBMEM:
414 13:51:14.488690 IMD: root @ 99fff000 254 entries.
415 13:51:14.491789 IMD: root @ 99ffec00 62 entries.
416 13:51:14.495381 External stage cache:
417 13:51:14.498489 IMD: root @ 9abff000 254 entries.
418 13:51:14.501650 IMD: root @ 9abfec00 62 entries.
419 13:51:14.505167 Chrome EC: clear events_b mask to 0x0000000020004000
420 13:51:14.521350 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 13:51:14.534393 tlcl_write: response is 0
422 13:51:14.543380 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
423 13:51:14.550259 MRC: TPM MRC hash updated successfully.
424 13:51:14.550341 2 DIMMs found
425 13:51:14.553488 SMM Memory Map
426 13:51:14.556465 SMRAM : 0x9a000000 0x1000000
427 13:51:14.559973 Subregion 0: 0x9a000000 0xa00000
428 13:51:14.563361 Subregion 1: 0x9aa00000 0x200000
429 13:51:14.566436 Subregion 2: 0x9ac00000 0x400000
430 13:51:14.570191 top_of_ram = 0x9a000000
431 13:51:14.573052 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
432 13:51:14.579779 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
433 13:51:14.583191 MTRR Range: Start=ff000000 End=0 (Size 1000000)
434 13:51:14.589964 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 13:51:14.593127 CBFS @ c08000 size 3f8000
436 13:51:14.596661 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 13:51:14.599556 CBFS: Locating 'fallback/postcar'
438 13:51:14.606359 CBFS: Found @ offset 107000 size 4b44
439 13:51:14.609426 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
440 13:51:14.622277 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
441 13:51:14.625884 Processing 180 relocs. Offset value of 0x97c0c000
442 13:51:14.633982 Accumulated console time in romstage 286 ms
443 13:51:14.634064
444 13:51:14.634128
445 13:51:14.644508 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
446 13:51:14.650760 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 13:51:14.653844 CBFS @ c08000 size 3f8000
448 13:51:14.657428 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
449 13:51:14.663756 CBFS: Locating 'fallback/ramstage'
450 13:51:14.667292 CBFS: Found @ offset 43380 size 1b9e8
451 13:51:14.674104 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
452 13:51:14.705993 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
453 13:51:14.709440 Processing 3976 relocs. Offset value of 0x98db0000
454 13:51:14.716003 Accumulated console time in postcar 52 ms
455 13:51:14.716086
456 13:51:14.716151
457 13:51:14.725791 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
458 13:51:14.732769 FMAP: area RO_VPD found @ c00000 (16384 bytes)
459 13:51:14.736012 WARNING: RO_VPD is uninitialized or empty.
460 13:51:14.739120 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 13:51:14.745673 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 13:51:14.745797 Normal boot.
463 13:51:14.752687 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
464 13:51:14.755677 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 13:51:14.758718 CBFS @ c08000 size 3f8000
466 13:51:14.765462 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 13:51:14.768567 CBFS: Locating 'cpu_microcode_blob.bin'
468 13:51:14.772280 CBFS: Found @ offset 14700 size 2ec00
469 13:51:14.775361 microcode: sig=0x806ec pf=0x4 revision=0xc9
470 13:51:14.779083 Skip microcode update
471 13:51:14.785250 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 13:51:14.785333 CBFS @ c08000 size 3f8000
473 13:51:14.791825 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 13:51:14.795488 CBFS: Locating 'fsps.bin'
475 13:51:14.798584 CBFS: Found @ offset d1fc0 size 35000
476 13:51:14.823812 Detected 4 core, 8 thread CPU.
477 13:51:14.827505 Setting up SMI for CPU
478 13:51:14.831103 IED base = 0x9ac00000
479 13:51:14.831207 IED size = 0x00400000
480 13:51:14.833807 Will perform SMM setup.
481 13:51:14.840542 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
482 13:51:14.847192 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
483 13:51:14.850384 Processing 16 relocs. Offset value of 0x00030000
484 13:51:14.854323 Attempting to start 7 APs
485 13:51:14.857234 Waiting for 10ms after sending INIT.
486 13:51:14.874043 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
487 13:51:14.874150 done.
488 13:51:14.877035 AP: slot 4 apic_id 5.
489 13:51:14.880809 AP: slot 5 apic_id 4.
490 13:51:14.883957 Waiting for 2nd SIPI to complete...done.
491 13:51:14.887126 AP: slot 3 apic_id 2.
492 13:51:14.887235 AP: slot 1 apic_id 3.
493 13:51:14.890154 AP: slot 7 apic_id 6.
494 13:51:14.893869 AP: slot 6 apic_id 7.
495 13:51:14.900387 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
496 13:51:14.906666 Processing 13 relocs. Offset value of 0x00038000
497 13:51:14.910431 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 13:51:14.917117 Installing SMM handler to 0x9a000000
499 13:51:14.923295 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 13:51:14.930357 Processing 658 relocs. Offset value of 0x9a010000
501 13:51:14.936626 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
502 13:51:14.940207 Processing 13 relocs. Offset value of 0x9a008000
503 13:51:14.946650 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
504 13:51:14.953301 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
505 13:51:14.959935 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
506 13:51:14.963062 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
507 13:51:14.969751 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
508 13:51:14.976567 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
509 13:51:14.979781 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
510 13:51:14.986193 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
511 13:51:14.989741 Clearing SMI status registers
512 13:51:14.992999 SMI_STS: PM1
513 13:51:14.993082 PM1_STS: PWRBTN
514 13:51:14.996726 TCO_STS: SECOND_TO
515 13:51:14.999823 New SMBASE 0x9a000000
516 13:51:15.003395 In relocation handler: CPU 0
517 13:51:15.006544 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
518 13:51:15.009765 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 13:51:15.013629 Relocation complete.
520 13:51:15.016377 New SMBASE 0x99fff800
521 13:51:15.016463 In relocation handler: CPU 2
522 13:51:15.023121 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
523 13:51:15.026397 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 13:51:15.030222 Relocation complete.
525 13:51:15.033073 New SMBASE 0x99ffe400
526 13:51:15.033160 In relocation handler: CPU 7
527 13:51:15.039774 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
528 13:51:15.043243 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 13:51:15.046336 Relocation complete.
530 13:51:15.046422 New SMBASE 0x99ffe800
531 13:51:15.050158 In relocation handler: CPU 6
532 13:51:15.056357 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
533 13:51:15.059532 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 13:51:15.063197 Relocation complete.
535 13:51:15.063312 New SMBASE 0x99fff400
536 13:51:15.066829 In relocation handler: CPU 3
537 13:51:15.069583 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
538 13:51:15.076165 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 13:51:15.079519 Relocation complete.
540 13:51:15.079604 New SMBASE 0x99fffc00
541 13:51:15.082952 In relocation handler: CPU 1
542 13:51:15.086427 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
543 13:51:15.093241 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 13:51:15.096227 Relocation complete.
545 13:51:15.096311 New SMBASE 0x99fff000
546 13:51:15.100281 In relocation handler: CPU 4
547 13:51:15.102878 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
548 13:51:15.109579 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 13:51:15.109664 Relocation complete.
550 13:51:15.112885 New SMBASE 0x99ffec00
551 13:51:15.116215 In relocation handler: CPU 5
552 13:51:15.119370 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
553 13:51:15.126439 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 13:51:15.126522 Relocation complete.
555 13:51:15.129610 Initializing CPU #0
556 13:51:15.132615 CPU: vendor Intel device 806ec
557 13:51:15.136292 CPU: family 06, model 8e, stepping 0c
558 13:51:15.139786 Clearing out pending MCEs
559 13:51:15.142861 Setting up local APIC...
560 13:51:15.142944 apic_id: 0x00 done.
561 13:51:15.145799 Turbo is available but hidden
562 13:51:15.149395 Turbo is available and visible
563 13:51:15.152493 VMX status: enabled
564 13:51:15.156176 IA32_FEATURE_CONTROL status: locked
565 13:51:15.159355 Skip microcode update
566 13:51:15.159437 CPU #0 initialized
567 13:51:15.162485 Initializing CPU #2
568 13:51:15.166205 Initializing CPU #4
569 13:51:15.166289 CPU: vendor Intel device 806ec
570 13:51:15.172848 CPU: family 06, model 8e, stepping 0c
571 13:51:15.172931 Clearing out pending MCEs
572 13:51:15.175888 CPU: vendor Intel device 806ec
573 13:51:15.179341 CPU: family 06, model 8e, stepping 0c
574 13:51:15.182480 Initializing CPU #7
575 13:51:15.185787 Initializing CPU #6
576 13:51:15.189280 CPU: vendor Intel device 806ec
577 13:51:15.192496 CPU: family 06, model 8e, stepping 0c
578 13:51:15.195504 CPU: vendor Intel device 806ec
579 13:51:15.199233 CPU: family 06, model 8e, stepping 0c
580 13:51:15.202394 Initializing CPU #3
581 13:51:15.202478 Initializing CPU #1
582 13:51:15.205421 CPU: vendor Intel device 806ec
583 13:51:15.208980 CPU: family 06, model 8e, stepping 0c
584 13:51:15.212308 CPU: vendor Intel device 806ec
585 13:51:15.215327 CPU: family 06, model 8e, stepping 0c
586 13:51:15.218906 Clearing out pending MCEs
587 13:51:15.222326 Clearing out pending MCEs
588 13:51:15.225964 Setting up local APIC...
589 13:51:15.226047 Clearing out pending MCEs
590 13:51:15.230662 Clearing out pending MCEs
591 13:51:15.231802 Setting up local APIC...
592 13:51:15.235196 Setting up local APIC...
593 13:51:15.238747 Setting up local APIC...
594 13:51:15.238856 Initializing CPU #5
595 13:51:15.241965 Clearing out pending MCEs
596 13:51:15.245368 CPU: vendor Intel device 806ec
597 13:51:15.248699 CPU: family 06, model 8e, stepping 0c
598 13:51:15.252213 Setting up local APIC...
599 13:51:15.252296 apic_id: 0x01 done.
600 13:51:15.255115 apic_id: 0x03 done.
601 13:51:15.258289 apic_id: 0x02 done.
602 13:51:15.258372 VMX status: enabled
603 13:51:15.261949 VMX status: enabled
604 13:51:15.265100 IA32_FEATURE_CONTROL status: locked
605 13:51:15.268210 IA32_FEATURE_CONTROL status: locked
606 13:51:15.272009 Skip microcode update
607 13:51:15.275000 Setting up local APIC...
608 13:51:15.275083 Skip microcode update
609 13:51:15.278558 CPU #1 initialized
610 13:51:15.278641 CPU #3 initialized
611 13:51:15.281560 apic_id: 0x07 done.
612 13:51:15.284990 apic_id: 0x06 done.
613 13:51:15.285098 VMX status: enabled
614 13:51:15.288713 VMX status: enabled
615 13:51:15.291810 IA32_FEATURE_CONTROL status: locked
616 13:51:15.295006 IA32_FEATURE_CONTROL status: locked
617 13:51:15.298165 Skip microcode update
618 13:51:15.298238 Skip microcode update
619 13:51:15.301987 Clearing out pending MCEs
620 13:51:15.305214 apic_id: 0x05 done.
621 13:51:15.308245 Setting up local APIC...
622 13:51:15.308335 CPU #6 initialized
623 13:51:15.311431 CPU #7 initialized
624 13:51:15.311529 VMX status: enabled
625 13:51:15.314896 VMX status: enabled
626 13:51:15.318339 apic_id: 0x04 done.
627 13:51:15.321823 IA32_FEATURE_CONTROL status: locked
628 13:51:15.321897 VMX status: enabled
629 13:51:15.325104 Skip microcode update
630 13:51:15.328022 IA32_FEATURE_CONTROL status: locked
631 13:51:15.331758 CPU #4 initialized
632 13:51:15.331838 Skip microcode update
633 13:51:15.338175 IA32_FEATURE_CONTROL status: locked
634 13:51:15.338263 CPU #5 initialized
635 13:51:15.341663 Skip microcode update
636 13:51:15.341748 CPU #2 initialized
637 13:51:15.348173 bsp_do_flight_plan done after 461 msecs.
638 13:51:15.351466 CPU: frequency set to 4200 MHz
639 13:51:15.351552 Enabling SMIs.
640 13:51:15.354731 Locking SMM.
641 13:51:15.367843 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
642 13:51:15.371363 CBFS @ c08000 size 3f8000
643 13:51:15.378342 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
644 13:51:15.378426 CBFS: Locating 'vbt.bin'
645 13:51:15.384128 CBFS: Found @ offset 5f5c0 size 499
646 13:51:15.387486 Found a VBT of 4608 bytes after decompression
647 13:51:15.572848 Display FSP Version Info HOB
648 13:51:15.576186 Reference Code - CPU = 9.0.1e.30
649 13:51:15.579302 uCode Version = 0.0.0.ca
650 13:51:15.582599 TXT ACM version = ff.ff.ff.ffff
651 13:51:15.586144 Display FSP Version Info HOB
652 13:51:15.589325 Reference Code - ME = 9.0.1e.30
653 13:51:15.592344 MEBx version = 0.0.0.0
654 13:51:15.596091 ME Firmware Version = Consumer SKU
655 13:51:15.599349 Display FSP Version Info HOB
656 13:51:15.602379 Reference Code - CML PCH = 9.0.1e.30
657 13:51:15.605800 PCH-CRID Status = Disabled
658 13:51:15.608896 PCH-CRID Original Value = ff.ff.ff.ffff
659 13:51:15.612739 PCH-CRID New Value = ff.ff.ff.ffff
660 13:51:15.615819 OPROM - RST - RAID = ff.ff.ff.ffff
661 13:51:15.618863 ChipsetInit Base Version = ff.ff.ff.ffff
662 13:51:15.622313 ChipsetInit Oem Version = ff.ff.ff.ffff
663 13:51:15.625654 Display FSP Version Info HOB
664 13:51:15.632207 Reference Code - SA - System Agent = 9.0.1e.30
665 13:51:15.635884 Reference Code - MRC = 0.7.1.6c
666 13:51:15.635968 SA - PCIe Version = 9.0.1e.30
667 13:51:15.639346 SA-CRID Status = Disabled
668 13:51:15.642112 SA-CRID Original Value = 0.0.0.c
669 13:51:15.645922 SA-CRID New Value = 0.0.0.c
670 13:51:15.648801 OPROM - VBIOS = ff.ff.ff.ffff
671 13:51:15.652174 RTC Init
672 13:51:15.655599 Set power on after power failure.
673 13:51:15.655710 Disabling Deep S3
674 13:51:15.658481 Disabling Deep S3
675 13:51:15.658581 Disabling Deep S4
676 13:51:15.662370 Disabling Deep S4
677 13:51:15.662456 Disabling Deep S5
678 13:51:15.665520 Disabling Deep S5
679 13:51:15.672166 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
680 13:51:15.672253 Enumerating buses...
681 13:51:15.678423 Show all devs... Before device enumeration.
682 13:51:15.678510 Root Device: enabled 1
683 13:51:15.682148 CPU_CLUSTER: 0: enabled 1
684 13:51:15.685090 DOMAIN: 0000: enabled 1
685 13:51:15.688937 APIC: 00: enabled 1
686 13:51:15.689023 PCI: 00:00.0: enabled 1
687 13:51:15.691652 PCI: 00:02.0: enabled 1
688 13:51:15.695263 PCI: 00:04.0: enabled 0
689 13:51:15.698310 PCI: 00:05.0: enabled 0
690 13:51:15.698397 PCI: 00:12.0: enabled 1
691 13:51:15.701944 PCI: 00:12.5: enabled 0
692 13:51:15.705129 PCI: 00:12.6: enabled 0
693 13:51:15.705215 PCI: 00:14.0: enabled 1
694 13:51:15.708751 PCI: 00:14.1: enabled 0
695 13:51:15.711499 PCI: 00:14.3: enabled 1
696 13:51:15.715361 PCI: 00:14.5: enabled 0
697 13:51:15.715447 PCI: 00:15.0: enabled 1
698 13:51:15.718522 PCI: 00:15.1: enabled 1
699 13:51:15.721613 PCI: 00:15.2: enabled 0
700 13:51:15.725434 PCI: 00:15.3: enabled 0
701 13:51:15.725520 PCI: 00:16.0: enabled 1
702 13:51:15.728507 PCI: 00:16.1: enabled 0
703 13:51:15.732015 PCI: 00:16.2: enabled 0
704 13:51:15.734820 PCI: 00:16.3: enabled 0
705 13:51:15.734929 PCI: 00:16.4: enabled 0
706 13:51:15.738593 PCI: 00:16.5: enabled 0
707 13:51:15.741652 PCI: 00:17.0: enabled 1
708 13:51:15.744847 PCI: 00:19.0: enabled 1
709 13:51:15.744930 PCI: 00:19.1: enabled 0
710 13:51:15.748221 PCI: 00:19.2: enabled 0
711 13:51:15.751175 PCI: 00:1a.0: enabled 0
712 13:51:15.751261 PCI: 00:1c.0: enabled 0
713 13:51:15.754961 PCI: 00:1c.1: enabled 0
714 13:51:15.758158 PCI: 00:1c.2: enabled 0
715 13:51:15.761636 PCI: 00:1c.3: enabled 0
716 13:51:15.761738 PCI: 00:1c.4: enabled 0
717 13:51:15.764504 PCI: 00:1c.5: enabled 0
718 13:51:15.767833 PCI: 00:1c.6: enabled 0
719 13:51:15.771578 PCI: 00:1c.7: enabled 0
720 13:51:15.771716 PCI: 00:1d.0: enabled 1
721 13:51:15.774609 PCI: 00:1d.1: enabled 0
722 13:51:15.777775 PCI: 00:1d.2: enabled 0
723 13:51:15.780996 PCI: 00:1d.3: enabled 0
724 13:51:15.781083 PCI: 00:1d.4: enabled 0
725 13:51:15.784773 PCI: 00:1d.5: enabled 1
726 13:51:15.788025 PCI: 00:1e.0: enabled 1
727 13:51:15.788112 PCI: 00:1e.1: enabled 0
728 13:51:15.790927 PCI: 00:1e.2: enabled 1
729 13:51:15.794492 PCI: 00:1e.3: enabled 1
730 13:51:15.798211 PCI: 00:1f.0: enabled 1
731 13:51:15.798294 PCI: 00:1f.1: enabled 1
732 13:51:15.801019 PCI: 00:1f.2: enabled 1
733 13:51:15.804461 PCI: 00:1f.3: enabled 1
734 13:51:15.807534 PCI: 00:1f.4: enabled 1
735 13:51:15.807625 PCI: 00:1f.5: enabled 1
736 13:51:15.811064 PCI: 00:1f.6: enabled 0
737 13:51:15.814099 USB0 port 0: enabled 1
738 13:51:15.814181 I2C: 00:15: enabled 1
739 13:51:15.817788 I2C: 00:5d: enabled 1
740 13:51:15.821244 GENERIC: 0.0: enabled 1
741 13:51:15.824395 I2C: 00:1a: enabled 1
742 13:51:15.824478 I2C: 00:38: enabled 1
743 13:51:15.827485 I2C: 00:39: enabled 1
744 13:51:15.830636 I2C: 00:3a: enabled 1
745 13:51:15.830718 I2C: 00:3b: enabled 1
746 13:51:15.834317 PCI: 00:00.0: enabled 1
747 13:51:15.837431 SPI: 00: enabled 1
748 13:51:15.837513 SPI: 01: enabled 1
749 13:51:15.840766 PNP: 0c09.0: enabled 1
750 13:51:15.844226 USB2 port 0: enabled 1
751 13:51:15.844307 USB2 port 1: enabled 1
752 13:51:15.847898 USB2 port 2: enabled 0
753 13:51:15.851017 USB2 port 3: enabled 0
754 13:51:15.851099 USB2 port 5: enabled 0
755 13:51:15.853946 USB2 port 6: enabled 1
756 13:51:15.857637 USB2 port 9: enabled 1
757 13:51:15.860557 USB3 port 0: enabled 1
758 13:51:15.860644 USB3 port 1: enabled 1
759 13:51:15.863849 USB3 port 2: enabled 1
760 13:51:15.867092 USB3 port 3: enabled 1
761 13:51:15.867166 USB3 port 4: enabled 0
762 13:51:15.870774 APIC: 03: enabled 1
763 13:51:15.873749 APIC: 01: enabled 1
764 13:51:15.873824 APIC: 02: enabled 1
765 13:51:15.877459 APIC: 05: enabled 1
766 13:51:15.877560 APIC: 04: enabled 1
767 13:51:15.880539 APIC: 07: enabled 1
768 13:51:15.884087 APIC: 06: enabled 1
769 13:51:15.884160 Compare with tree...
770 13:51:15.887504 Root Device: enabled 1
771 13:51:15.890927 CPU_CLUSTER: 0: enabled 1
772 13:51:15.891030 APIC: 00: enabled 1
773 13:51:15.893784 APIC: 03: enabled 1
774 13:51:15.897374 APIC: 01: enabled 1
775 13:51:15.900830 APIC: 02: enabled 1
776 13:51:15.900900 APIC: 05: enabled 1
777 13:51:15.903823 APIC: 04: enabled 1
778 13:51:15.907003 APIC: 07: enabled 1
779 13:51:15.907104 APIC: 06: enabled 1
780 13:51:15.910837 DOMAIN: 0000: enabled 1
781 13:51:15.913507 PCI: 00:00.0: enabled 1
782 13:51:15.916948 PCI: 00:02.0: enabled 1
783 13:51:15.917045 PCI: 00:04.0: enabled 0
784 13:51:15.920231 PCI: 00:05.0: enabled 0
785 13:51:15.923766 PCI: 00:12.0: enabled 1
786 13:51:15.927074 PCI: 00:12.5: enabled 0
787 13:51:15.930022 PCI: 00:12.6: enabled 0
788 13:51:15.930124 PCI: 00:14.0: enabled 1
789 13:51:15.933410 USB0 port 0: enabled 1
790 13:51:15.937180 USB2 port 0: enabled 1
791 13:51:15.940196 USB2 port 1: enabled 1
792 13:51:15.943218 USB2 port 2: enabled 0
793 13:51:15.943288 USB2 port 3: enabled 0
794 13:51:15.946887 USB2 port 5: enabled 0
795 13:51:15.950256 USB2 port 6: enabled 1
796 13:51:15.953093 USB2 port 9: enabled 1
797 13:51:15.956850 USB3 port 0: enabled 1
798 13:51:15.959812 USB3 port 1: enabled 1
799 13:51:15.959888 USB3 port 2: enabled 1
800 13:51:15.963561 USB3 port 3: enabled 1
801 13:51:15.966560 USB3 port 4: enabled 0
802 13:51:15.969851 PCI: 00:14.1: enabled 0
803 13:51:15.973003 PCI: 00:14.3: enabled 1
804 13:51:15.973101 PCI: 00:14.5: enabled 0
805 13:51:15.976706 PCI: 00:15.0: enabled 1
806 13:51:15.979883 I2C: 00:15: enabled 1
807 13:51:15.982993 PCI: 00:15.1: enabled 1
808 13:51:15.986757 I2C: 00:5d: enabled 1
809 13:51:15.986830 GENERIC: 0.0: enabled 1
810 13:51:15.989765 PCI: 00:15.2: enabled 0
811 13:51:15.993214 PCI: 00:15.3: enabled 0
812 13:51:15.996881 PCI: 00:16.0: enabled 1
813 13:51:15.996955 PCI: 00:16.1: enabled 0
814 13:51:15.999799 PCI: 00:16.2: enabled 0
815 13:51:16.003527 PCI: 00:16.3: enabled 0
816 13:51:16.006634 PCI: 00:16.4: enabled 0
817 13:51:16.009510 PCI: 00:16.5: enabled 0
818 13:51:16.009586 PCI: 00:17.0: enabled 1
819 13:51:16.013221 PCI: 00:19.0: enabled 1
820 13:51:16.016627 I2C: 00:1a: enabled 1
821 13:51:16.019825 I2C: 00:38: enabled 1
822 13:51:16.023512 I2C: 00:39: enabled 1
823 13:51:16.023609 I2C: 00:3a: enabled 1
824 13:51:16.026388 I2C: 00:3b: enabled 1
825 13:51:16.029734 PCI: 00:19.1: enabled 0
826 13:51:16.032725 PCI: 00:19.2: enabled 0
827 13:51:16.032800 PCI: 00:1a.0: enabled 0
828 13:51:16.035994 PCI: 00:1c.0: enabled 0
829 13:51:16.039380 PCI: 00:1c.1: enabled 0
830 13:51:16.042833 PCI: 00:1c.2: enabled 0
831 13:51:16.046221 PCI: 00:1c.3: enabled 0
832 13:51:16.046319 PCI: 00:1c.4: enabled 0
833 13:51:16.049697 PCI: 00:1c.5: enabled 0
834 13:51:16.052708 PCI: 00:1c.6: enabled 0
835 13:51:16.055896 PCI: 00:1c.7: enabled 0
836 13:51:16.059296 PCI: 00:1d.0: enabled 1
837 13:51:16.059371 PCI: 00:1d.1: enabled 0
838 13:51:16.062719 PCI: 00:1d.2: enabled 0
839 13:51:16.066219 PCI: 00:1d.3: enabled 0
840 13:51:16.069424 PCI: 00:1d.4: enabled 0
841 13:51:16.072360 PCI: 00:1d.5: enabled 1
842 13:51:16.072463 PCI: 00:00.0: enabled 1
843 13:51:16.076263 PCI: 00:1e.0: enabled 1
844 13:51:16.079433 PCI: 00:1e.1: enabled 0
845 13:51:16.082639 PCI: 00:1e.2: enabled 1
846 13:51:16.082737 SPI: 00: enabled 1
847 13:51:16.085813 PCI: 00:1e.3: enabled 1
848 13:51:16.089082 SPI: 01: enabled 1
849 13:51:16.092936 PCI: 00:1f.0: enabled 1
850 13:51:16.093006 PNP: 0c09.0: enabled 1
851 13:51:16.095997 PCI: 00:1f.1: enabled 1
852 13:51:16.098907 PCI: 00:1f.2: enabled 1
853 13:51:16.102415 PCI: 00:1f.3: enabled 1
854 13:51:16.105710 PCI: 00:1f.4: enabled 1
855 13:51:16.105807 PCI: 00:1f.5: enabled 1
856 13:51:16.108884 PCI: 00:1f.6: enabled 0
857 13:51:16.112468 Root Device scanning...
858 13:51:16.115621 scan_static_bus for Root Device
859 13:51:16.119245 CPU_CLUSTER: 0 enabled
860 13:51:16.119343 DOMAIN: 0000 enabled
861 13:51:16.122264 DOMAIN: 0000 scanning...
862 13:51:16.126018 PCI: pci_scan_bus for bus 00
863 13:51:16.129178 PCI: 00:00.0 [8086/0000] ops
864 13:51:16.132422 PCI: 00:00.0 [8086/9b61] enabled
865 13:51:16.135599 PCI: 00:02.0 [8086/0000] bus ops
866 13:51:16.139351 PCI: 00:02.0 [8086/9b41] enabled
867 13:51:16.142076 PCI: 00:04.0 [8086/1903] disabled
868 13:51:16.145665 PCI: 00:08.0 [8086/1911] enabled
869 13:51:16.148731 PCI: 00:12.0 [8086/02f9] enabled
870 13:51:16.152282 PCI: 00:14.0 [8086/0000] bus ops
871 13:51:16.156009 PCI: 00:14.0 [8086/02ed] enabled
872 13:51:16.159049 PCI: 00:14.2 [8086/02ef] enabled
873 13:51:16.162254 PCI: 00:14.3 [8086/02f0] enabled
874 13:51:16.165748 PCI: 00:15.0 [8086/0000] bus ops
875 13:51:16.168731 PCI: 00:15.0 [8086/02e8] enabled
876 13:51:16.172351 PCI: 00:15.1 [8086/0000] bus ops
877 13:51:16.175602 PCI: 00:15.1 [8086/02e9] enabled
878 13:51:16.178680 PCI: 00:16.0 [8086/0000] ops
879 13:51:16.182394 PCI: 00:16.0 [8086/02e0] enabled
880 13:51:16.185234 PCI: 00:17.0 [8086/0000] ops
881 13:51:16.188573 PCI: 00:17.0 [8086/02d3] enabled
882 13:51:16.192182 PCI: 00:19.0 [8086/0000] bus ops
883 13:51:16.195290 PCI: 00:19.0 [8086/02c5] enabled
884 13:51:16.198740 PCI: 00:1d.0 [8086/0000] bus ops
885 13:51:16.202132 PCI: 00:1d.0 [8086/02b0] enabled
886 13:51:16.208678 PCI: Static device PCI: 00:1d.5 not found, disabling it.
887 13:51:16.208756 PCI: 00:1e.0 [8086/0000] ops
888 13:51:16.212083 PCI: 00:1e.0 [8086/02a8] enabled
889 13:51:16.215804 PCI: 00:1e.2 [8086/0000] bus ops
890 13:51:16.218646 PCI: 00:1e.2 [8086/02aa] enabled
891 13:51:16.222257 PCI: 00:1e.3 [8086/0000] bus ops
892 13:51:16.225266 PCI: 00:1e.3 [8086/02ab] enabled
893 13:51:16.228970 PCI: 00:1f.0 [8086/0000] bus ops
894 13:51:16.232059 PCI: 00:1f.0 [8086/0284] enabled
895 13:51:16.238891 PCI: Static device PCI: 00:1f.1 not found, disabling it.
896 13:51:16.245182 PCI: Static device PCI: 00:1f.2 not found, disabling it.
897 13:51:16.248815 PCI: 00:1f.3 [8086/0000] bus ops
898 13:51:16.251888 PCI: 00:1f.3 [8086/02c8] enabled
899 13:51:16.255179 PCI: 00:1f.4 [8086/0000] bus ops
900 13:51:16.258811 PCI: 00:1f.4 [8086/02a3] enabled
901 13:51:16.261877 PCI: 00:1f.5 [8086/0000] bus ops
902 13:51:16.264869 PCI: 00:1f.5 [8086/02a4] enabled
903 13:51:16.268516 PCI: Leftover static devices:
904 13:51:16.268598 PCI: 00:05.0
905 13:51:16.271538 PCI: 00:12.5
906 13:51:16.271652 PCI: 00:12.6
907 13:51:16.271720 PCI: 00:14.1
908 13:51:16.275383 PCI: 00:14.5
909 13:51:16.275465 PCI: 00:15.2
910 13:51:16.278417 PCI: 00:15.3
911 13:51:16.278502 PCI: 00:16.1
912 13:51:16.278566 PCI: 00:16.2
913 13:51:16.281666 PCI: 00:16.3
914 13:51:16.281748 PCI: 00:16.4
915 13:51:16.285143 PCI: 00:16.5
916 13:51:16.285224 PCI: 00:19.1
917 13:51:16.288257 PCI: 00:19.2
918 13:51:16.288339 PCI: 00:1a.0
919 13:51:16.288403 PCI: 00:1c.0
920 13:51:16.291690 PCI: 00:1c.1
921 13:51:16.291802 PCI: 00:1c.2
922 13:51:16.295192 PCI: 00:1c.3
923 13:51:16.295274 PCI: 00:1c.4
924 13:51:16.295338 PCI: 00:1c.5
925 13:51:16.298058 PCI: 00:1c.6
926 13:51:16.298140 PCI: 00:1c.7
927 13:51:16.301359 PCI: 00:1d.1
928 13:51:16.301440 PCI: 00:1d.2
929 13:51:16.304748 PCI: 00:1d.3
930 13:51:16.304829 PCI: 00:1d.4
931 13:51:16.304894 PCI: 00:1d.5
932 13:51:16.308250 PCI: 00:1e.1
933 13:51:16.308332 PCI: 00:1f.1
934 13:51:16.311289 PCI: 00:1f.2
935 13:51:16.311371 PCI: 00:1f.6
936 13:51:16.314754 PCI: Check your devicetree.cb.
937 13:51:16.318125 PCI: 00:02.0 scanning...
938 13:51:16.321730 scan_generic_bus for PCI: 00:02.0
939 13:51:16.324723 scan_generic_bus for PCI: 00:02.0 done
940 13:51:16.331035 scan_bus: scanning of bus PCI: 00:02.0 took 10181 usecs
941 13:51:16.331144 PCI: 00:14.0 scanning...
942 13:51:16.334782 scan_static_bus for PCI: 00:14.0
943 13:51:16.337999 USB0 port 0 enabled
944 13:51:16.341146 USB0 port 0 scanning...
945 13:51:16.344525 scan_static_bus for USB0 port 0
946 13:51:16.347798 USB2 port 0 enabled
947 13:51:16.347879 USB2 port 1 enabled
948 13:51:16.351504 USB2 port 2 disabled
949 13:51:16.351585 USB2 port 3 disabled
950 13:51:16.354604 USB2 port 5 disabled
951 13:51:16.357725 USB2 port 6 enabled
952 13:51:16.357807 USB2 port 9 enabled
953 13:51:16.361452 USB3 port 0 enabled
954 13:51:16.364707 USB3 port 1 enabled
955 13:51:16.364789 USB3 port 2 enabled
956 13:51:16.367730 USB3 port 3 enabled
957 13:51:16.367811 USB3 port 4 disabled
958 13:51:16.371386 USB2 port 0 scanning...
959 13:51:16.374977 scan_static_bus for USB2 port 0
960 13:51:16.377951 scan_static_bus for USB2 port 0 done
961 13:51:16.384240 scan_bus: scanning of bus USB2 port 0 took 9705 usecs
962 13:51:16.387605 USB2 port 1 scanning...
963 13:51:16.390860 scan_static_bus for USB2 port 1
964 13:51:16.394756 scan_static_bus for USB2 port 1 done
965 13:51:16.397749 scan_bus: scanning of bus USB2 port 1 took 9686 usecs
966 13:51:16.400937 USB2 port 6 scanning...
967 13:51:16.404531 scan_static_bus for USB2 port 6
968 13:51:16.407572 scan_static_bus for USB2 port 6 done
969 13:51:16.414214 scan_bus: scanning of bus USB2 port 6 took 9704 usecs
970 13:51:16.417426 USB2 port 9 scanning...
971 13:51:16.421005 scan_static_bus for USB2 port 9
972 13:51:16.424228 scan_static_bus for USB2 port 9 done
973 13:51:16.430578 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
974 13:51:16.430660 USB3 port 0 scanning...
975 13:51:16.433906 scan_static_bus for USB3 port 0
976 13:51:16.437341 scan_static_bus for USB3 port 0 done
977 13:51:16.443851 scan_bus: scanning of bus USB3 port 0 took 9685 usecs
978 13:51:16.447250 USB3 port 1 scanning...
979 13:51:16.450568 scan_static_bus for USB3 port 1
980 13:51:16.453993 scan_static_bus for USB3 port 1 done
981 13:51:16.460350 scan_bus: scanning of bus USB3 port 1 took 9696 usecs
982 13:51:16.460431 USB3 port 2 scanning...
983 13:51:16.463746 scan_static_bus for USB3 port 2
984 13:51:16.467501 scan_static_bus for USB3 port 2 done
985 13:51:16.473841 scan_bus: scanning of bus USB3 port 2 took 9694 usecs
986 13:51:16.476830 USB3 port 3 scanning...
987 13:51:16.480490 scan_static_bus for USB3 port 3
988 13:51:16.483531 scan_static_bus for USB3 port 3 done
989 13:51:16.490458 scan_bus: scanning of bus USB3 port 3 took 9694 usecs
990 13:51:16.493367 scan_static_bus for USB0 port 0 done
991 13:51:16.497167 scan_bus: scanning of bus USB0 port 0 took 155261 usecs
992 13:51:16.503397 scan_static_bus for PCI: 00:14.0 done
993 13:51:16.506906 scan_bus: scanning of bus PCI: 00:14.0 took 172874 usecs
994 13:51:16.510464 PCI: 00:15.0 scanning...
995 13:51:16.513546 scan_generic_bus for PCI: 00:15.0
996 13:51:16.516612 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
997 13:51:16.523202 scan_generic_bus for PCI: 00:15.0 done
998 13:51:16.526956 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
999 13:51:16.530121 PCI: 00:15.1 scanning...
1000 13:51:16.533245 scan_generic_bus for PCI: 00:15.1
1001 13:51:16.536829 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1002 13:51:16.543136 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1003 13:51:16.546533 scan_generic_bus for PCI: 00:15.1 done
1004 13:51:16.549751 scan_bus: scanning of bus PCI: 00:15.1 took 18589 usecs
1005 13:51:16.553262 PCI: 00:19.0 scanning...
1006 13:51:16.556376 scan_generic_bus for PCI: 00:19.0
1007 13:51:16.563055 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1008 13:51:16.566106 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1009 13:51:16.569398 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1010 13:51:16.573018 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1011 13:51:16.579356 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1012 13:51:16.583005 scan_generic_bus for PCI: 00:19.0 done
1013 13:51:16.585872 scan_bus: scanning of bus PCI: 00:19.0 took 30729 usecs
1014 13:51:16.589434 PCI: 00:1d.0 scanning...
1015 13:51:16.592616 do_pci_scan_bridge for PCI: 00:1d.0
1016 13:51:16.596128 PCI: pci_scan_bus for bus 01
1017 13:51:16.599704 PCI: 01:00.0 [1c5c/1327] enabled
1018 13:51:16.602662 Enabling Common Clock Configuration
1019 13:51:16.609381 L1 Sub-State supported from root port 29
1020 13:51:16.609485 L1 Sub-State Support = 0xf
1021 13:51:16.612395 CommonModeRestoreTime = 0x28
1022 13:51:16.619342 Power On Value = 0x16, Power On Scale = 0x0
1023 13:51:16.619427 ASPM: Enabled L1
1024 13:51:16.626161 scan_bus: scanning of bus PCI: 00:1d.0 took 32770 usecs
1025 13:51:16.629140 PCI: 00:1e.2 scanning...
1026 13:51:16.632909 scan_generic_bus for PCI: 00:1e.2
1027 13:51:16.636037 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1028 13:51:16.639743 scan_generic_bus for PCI: 00:1e.2 done
1029 13:51:16.645961 scan_bus: scanning of bus PCI: 00:1e.2 took 13998 usecs
1030 13:51:16.648906 PCI: 00:1e.3 scanning...
1031 13:51:16.652222 scan_generic_bus for PCI: 00:1e.3
1032 13:51:16.655975 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1033 13:51:16.659006 scan_generic_bus for PCI: 00:1e.3 done
1034 13:51:16.665748 scan_bus: scanning of bus PCI: 00:1e.3 took 13998 usecs
1035 13:51:16.665852 PCI: 00:1f.0 scanning...
1036 13:51:16.668839 scan_static_bus for PCI: 00:1f.0
1037 13:51:16.672617 PNP: 0c09.0 enabled
1038 13:51:16.675766 scan_static_bus for PCI: 00:1f.0 done
1039 13:51:16.682683 scan_bus: scanning of bus PCI: 00:1f.0 took 12051 usecs
1040 13:51:16.685678 PCI: 00:1f.3 scanning...
1041 13:51:16.689353 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1042 13:51:16.692123 PCI: 00:1f.4 scanning...
1043 13:51:16.695947 scan_generic_bus for PCI: 00:1f.4
1044 13:51:16.698741 scan_generic_bus for PCI: 00:1f.4 done
1045 13:51:16.705459 scan_bus: scanning of bus PCI: 00:1f.4 took 10182 usecs
1046 13:51:16.709074 PCI: 00:1f.5 scanning...
1047 13:51:16.712749 scan_generic_bus for PCI: 00:1f.5
1048 13:51:16.715346 scan_generic_bus for PCI: 00:1f.5 done
1049 13:51:16.722277 scan_bus: scanning of bus PCI: 00:1f.5 took 10182 usecs
1050 13:51:16.728896 scan_bus: scanning of bus DOMAIN: 0000 took 604721 usecs
1051 13:51:16.731991 scan_static_bus for Root Device done
1052 13:51:16.735377 scan_bus: scanning of bus Root Device took 624625 usecs
1053 13:51:16.739083 done
1054 13:51:16.741793 Chrome EC: UHEPI supported
1055 13:51:16.745547 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1056 13:51:16.751801 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1057 13:51:16.758374 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1058 13:51:16.765242 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1059 13:51:16.768730 SPI flash protection: WPSW=1 SRP0=0
1060 13:51:16.775124 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1061 13:51:16.778864 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1062 13:51:16.781906 found VGA at PCI: 00:02.0
1063 13:51:16.785176 Setting up VGA for PCI: 00:02.0
1064 13:51:16.792071 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1065 13:51:16.795055 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1066 13:51:16.798558 Allocating resources...
1067 13:51:16.801708 Reading resources...
1068 13:51:16.804957 Root Device read_resources bus 0 link: 0
1069 13:51:16.808476 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1070 13:51:16.814965 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1071 13:51:16.818222 DOMAIN: 0000 read_resources bus 0 link: 0
1072 13:51:16.825402 PCI: 00:14.0 read_resources bus 0 link: 0
1073 13:51:16.829311 USB0 port 0 read_resources bus 0 link: 0
1074 13:51:16.836993 USB0 port 0 read_resources bus 0 link: 0 done
1075 13:51:16.839943 PCI: 00:14.0 read_resources bus 0 link: 0 done
1076 13:51:16.847528 PCI: 00:15.0 read_resources bus 1 link: 0
1077 13:51:16.850805 PCI: 00:15.0 read_resources bus 1 link: 0 done
1078 13:51:16.857437 PCI: 00:15.1 read_resources bus 2 link: 0
1079 13:51:16.860804 PCI: 00:15.1 read_resources bus 2 link: 0 done
1080 13:51:16.868442 PCI: 00:19.0 read_resources bus 3 link: 0
1081 13:51:16.874791 PCI: 00:19.0 read_resources bus 3 link: 0 done
1082 13:51:16.878524 PCI: 00:1d.0 read_resources bus 1 link: 0
1083 13:51:16.884800 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1084 13:51:16.888522 PCI: 00:1e.2 read_resources bus 4 link: 0
1085 13:51:16.894646 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1086 13:51:16.898449 PCI: 00:1e.3 read_resources bus 5 link: 0
1087 13:51:16.950698 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1088 13:51:16.950965 PCI: 00:1f.0 read_resources bus 0 link: 0
1089 13:51:16.951035 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1090 13:51:16.951141 DOMAIN: 0000 read_resources bus 0 link: 0 done
1091 13:51:16.951230 Root Device read_resources bus 0 link: 0 done
1092 13:51:16.951351 Done reading resources.
1093 13:51:16.951453 Show resources in subtree (Root Device)...After reading.
1094 13:51:16.951567 Root Device child on link 0 CPU_CLUSTER: 0
1095 13:51:16.951674 CPU_CLUSTER: 0 child on link 0 APIC: 00
1096 13:51:16.951765 APIC: 00
1097 13:51:16.951869 APIC: 03
1098 13:51:16.951925 APIC: 01
1099 13:51:16.951992 APIC: 02
1100 13:51:16.952048 APIC: 05
1101 13:51:16.952105 APIC: 04
1102 13:51:16.952160 APIC: 07
1103 13:51:16.952214 APIC: 06
1104 13:51:16.984452 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1105 13:51:16.984934 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1106 13:51:16.985229 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1107 13:51:16.985327 PCI: 00:00.0
1108 13:51:16.988311 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1109 13:51:16.994739 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1110 13:51:17.004570 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1111 13:51:17.015025 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1112 13:51:17.024986 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1113 13:51:17.031042 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1114 13:51:17.041315 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1115 13:51:17.051142 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1116 13:51:17.061118 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1117 13:51:17.071098 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1118 13:51:17.077871 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1119 13:51:17.087329 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1120 13:51:17.097109 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1121 13:51:17.107606 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1122 13:51:17.117097 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1123 13:51:17.127326 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1124 13:51:17.127435 PCI: 00:02.0
1125 13:51:17.137199 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1126 13:51:17.147131 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1127 13:51:17.157136 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1128 13:51:17.160039 PCI: 00:04.0
1129 13:51:17.160110 PCI: 00:08.0
1130 13:51:17.170197 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1131 13:51:17.173232 PCI: 00:12.0
1132 13:51:17.183154 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1133 13:51:17.186909 PCI: 00:14.0 child on link 0 USB0 port 0
1134 13:51:17.196236 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1135 13:51:17.200056 USB0 port 0 child on link 0 USB2 port 0
1136 13:51:17.203233 USB2 port 0
1137 13:51:17.203330 USB2 port 1
1138 13:51:17.206230 USB2 port 2
1139 13:51:17.206328 USB2 port 3
1140 13:51:17.209977 USB2 port 5
1141 13:51:17.210072 USB2 port 6
1142 13:51:17.212903 USB2 port 9
1143 13:51:17.212971 USB3 port 0
1144 13:51:17.216345 USB3 port 1
1145 13:51:17.216415 USB3 port 2
1146 13:51:17.219906 USB3 port 3
1147 13:51:17.222804 USB3 port 4
1148 13:51:17.222870 PCI: 00:14.2
1149 13:51:17.232813 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1150 13:51:17.242610 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1151 13:51:17.246377 PCI: 00:14.3
1152 13:51:17.256098 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1153 13:51:17.259469 PCI: 00:15.0 child on link 0 I2C: 01:15
1154 13:51:17.269158 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 13:51:17.269238 I2C: 01:15
1156 13:51:17.275893 PCI: 00:15.1 child on link 0 I2C: 02:5d
1157 13:51:17.286278 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 13:51:17.286384 I2C: 02:5d
1159 13:51:17.289384 GENERIC: 0.0
1160 13:51:17.289479 PCI: 00:16.0
1161 13:51:17.299058 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 13:51:17.302600 PCI: 00:17.0
1163 13:51:17.309181 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1164 13:51:17.319174 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1165 13:51:17.328769 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1166 13:51:17.335808 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1167 13:51:17.345240 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1168 13:51:17.352098 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1169 13:51:17.358628 PCI: 00:19.0 child on link 0 I2C: 03:1a
1170 13:51:17.368816 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1171 13:51:17.368924 I2C: 03:1a
1172 13:51:17.369016 I2C: 03:38
1173 13:51:17.372225 I2C: 03:39
1174 13:51:17.372301 I2C: 03:3a
1175 13:51:17.375813 I2C: 03:3b
1176 13:51:17.378716 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1177 13:51:17.388690 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1178 13:51:17.398661 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1179 13:51:17.408819 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1180 13:51:17.408925 PCI: 01:00.0
1181 13:51:17.418720 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 13:51:17.421729 PCI: 00:1e.0
1183 13:51:17.431654 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1184 13:51:17.441398 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1185 13:51:17.445143 PCI: 00:1e.2 child on link 0 SPI: 00
1186 13:51:17.455101 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 13:51:17.458395 SPI: 00
1188 13:51:17.461323 PCI: 00:1e.3 child on link 0 SPI: 01
1189 13:51:17.471313 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 13:51:17.471421 SPI: 01
1191 13:51:17.475152 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1192 13:51:17.484848 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1193 13:51:17.494355 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1194 13:51:17.494459 PNP: 0c09.0
1195 13:51:17.504367 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1196 13:51:17.504472 PCI: 00:1f.3
1197 13:51:17.514663 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 13:51:17.524521 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1199 13:51:17.527838 PCI: 00:1f.4
1200 13:51:17.537569 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1201 13:51:17.547402 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1202 13:51:17.547504 PCI: 00:1f.5
1203 13:51:17.557567 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1204 13:51:17.564352 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1205 13:51:17.570773 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1206 13:51:17.577133 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1207 13:51:17.580673 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1208 13:51:17.584482 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1209 13:51:17.587811 PCI: 00:17.0 18 * [0x60 - 0x67] io
1210 13:51:17.591203 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1211 13:51:17.597809 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1212 13:51:17.604248 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1213 13:51:17.611095 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1214 13:51:17.621023 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1215 13:51:17.627266 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1216 13:51:17.630961 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1217 13:51:17.640904 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1218 13:51:17.644552 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1219 13:51:17.647260 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1220 13:51:17.654255 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1221 13:51:17.657692 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1222 13:51:17.663848 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1223 13:51:17.667478 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1224 13:51:17.673840 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1225 13:51:17.677706 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1226 13:51:17.684294 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1227 13:51:17.687619 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1228 13:51:17.694377 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1229 13:51:17.697364 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1230 13:51:17.703782 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1231 13:51:17.707358 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1232 13:51:17.710499 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1233 13:51:17.717540 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1234 13:51:17.720552 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1235 13:51:17.726930 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1236 13:51:17.730319 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1237 13:51:17.737068 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1238 13:51:17.740167 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1239 13:51:17.747050 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1240 13:51:17.750151 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1241 13:51:17.759887 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1242 13:51:17.763602 avoid_fixed_resources: DOMAIN: 0000
1243 13:51:17.770194 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1244 13:51:17.773115 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1245 13:51:17.783077 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1246 13:51:17.789926 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1247 13:51:17.796370 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1248 13:51:17.806267 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1249 13:51:17.812881 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1250 13:51:17.819818 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1251 13:51:17.829797 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1252 13:51:17.836423 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1253 13:51:17.842769 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1254 13:51:17.849423 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1255 13:51:17.853119 Setting resources...
1256 13:51:17.859305 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1257 13:51:17.862657 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1258 13:51:17.865970 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1259 13:51:17.869664 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1260 13:51:17.876123 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1261 13:51:17.882762 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1262 13:51:17.885912 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1263 13:51:17.892607 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1264 13:51:17.902838 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1265 13:51:17.905899 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1266 13:51:17.912500 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1267 13:51:17.915599 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1268 13:51:17.922775 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1269 13:51:17.925597 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1270 13:51:17.932272 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1271 13:51:17.936140 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1272 13:51:17.938977 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1273 13:51:17.945621 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1274 13:51:17.949355 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1275 13:51:17.955627 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1276 13:51:17.959156 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1277 13:51:17.965692 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1278 13:51:17.968795 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1279 13:51:17.975512 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1280 13:51:17.979041 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1281 13:51:17.985607 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1282 13:51:17.989003 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1283 13:51:17.995361 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1284 13:51:17.998525 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1285 13:51:18.005209 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1286 13:51:18.008557 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1287 13:51:18.011864 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1288 13:51:18.022169 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1289 13:51:18.028391 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1290 13:51:18.034926 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1291 13:51:18.041453 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1292 13:51:18.048552 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1293 13:51:18.055337 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1294 13:51:18.058418 Root Device assign_resources, bus 0 link: 0
1295 13:51:18.065119 DOMAIN: 0000 assign_resources, bus 0 link: 0
1296 13:51:18.071508 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1297 13:51:18.081611 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1298 13:51:18.088310 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1299 13:51:18.097961 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1300 13:51:18.104405 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1301 13:51:18.114857 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1302 13:51:18.117874 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 13:51:18.124374 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 13:51:18.130930 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1305 13:51:18.140749 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1306 13:51:18.147701 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1307 13:51:18.157189 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1308 13:51:18.160831 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 13:51:18.163998 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 13:51:18.174446 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1311 13:51:18.177709 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 13:51:18.184102 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 13:51:18.190345 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1314 13:51:18.200345 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1315 13:51:18.207376 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1316 13:51:18.213730 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1317 13:51:18.223533 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1318 13:51:18.230454 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1319 13:51:18.236881 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1320 13:51:18.246580 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1321 13:51:18.250348 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 13:51:18.256717 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 13:51:18.263146 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1324 13:51:18.273126 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1325 13:51:18.279805 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1326 13:51:18.286329 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1327 13:51:18.293132 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1328 13:51:18.299973 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1329 13:51:18.306152 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1330 13:51:18.316266 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1331 13:51:18.319628 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 13:51:18.325946 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 13:51:18.332967 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1334 13:51:18.336123 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 13:51:18.342729 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 13:51:18.346034 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 13:51:18.352554 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 13:51:18.355798 LPC: Trying to open IO window from 800 size 1ff
1339 13:51:18.366212 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1340 13:51:18.372336 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1341 13:51:18.382216 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1342 13:51:18.389195 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1343 13:51:18.395694 DOMAIN: 0000 assign_resources, bus 0 link: 0
1344 13:51:18.398791 Root Device assign_resources, bus 0 link: 0
1345 13:51:18.402001 Done setting resources.
1346 13:51:18.408870 Show resources in subtree (Root Device)...After assigning values.
1347 13:51:18.412453 Root Device child on link 0 CPU_CLUSTER: 0
1348 13:51:18.415257 CPU_CLUSTER: 0 child on link 0 APIC: 00
1349 13:51:18.418842 APIC: 00
1350 13:51:18.418941 APIC: 03
1351 13:51:18.419032 APIC: 01
1352 13:51:18.422002 APIC: 02
1353 13:51:18.422073 APIC: 05
1354 13:51:18.425180 APIC: 04
1355 13:51:18.425253 APIC: 07
1356 13:51:18.425315 APIC: 06
1357 13:51:18.432337 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1358 13:51:18.441681 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1359 13:51:18.452168 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1360 13:51:18.452273 PCI: 00:00.0
1361 13:51:18.461755 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1362 13:51:18.472047 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1363 13:51:18.481653 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1364 13:51:18.491362 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1365 13:51:18.501697 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1366 13:51:18.511739 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1367 13:51:18.518029 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1368 13:51:18.527869 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1369 13:51:18.537672 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1370 13:51:18.547586 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1371 13:51:18.557602 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1372 13:51:18.564289 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1373 13:51:18.574291 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1374 13:51:18.584073 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1375 13:51:18.594085 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1376 13:51:18.604461 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1377 13:51:18.604565 PCI: 00:02.0
1378 13:51:18.617341 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1379 13:51:18.626820 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1380 13:51:18.637106 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1381 13:51:18.637211 PCI: 00:04.0
1382 13:51:18.640623 PCI: 00:08.0
1383 13:51:18.650158 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1384 13:51:18.650263 PCI: 00:12.0
1385 13:51:18.660232 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1386 13:51:18.666981 PCI: 00:14.0 child on link 0 USB0 port 0
1387 13:51:18.677095 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1388 13:51:18.680177 USB0 port 0 child on link 0 USB2 port 0
1389 13:51:18.683370 USB2 port 0
1390 13:51:18.683465 USB2 port 1
1391 13:51:18.686424 USB2 port 2
1392 13:51:18.686523 USB2 port 3
1393 13:51:18.690277 USB2 port 5
1394 13:51:18.690371 USB2 port 6
1395 13:51:18.693380 USB2 port 9
1396 13:51:18.693473 USB3 port 0
1397 13:51:18.696470 USB3 port 1
1398 13:51:18.696564 USB3 port 2
1399 13:51:18.700054 USB3 port 3
1400 13:51:18.700151 USB3 port 4
1401 13:51:18.703500 PCI: 00:14.2
1402 13:51:18.713261 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1403 13:51:18.722862 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1404 13:51:18.726662 PCI: 00:14.3
1405 13:51:18.737041 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1406 13:51:18.739807 PCI: 00:15.0 child on link 0 I2C: 01:15
1407 13:51:18.749658 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1408 13:51:18.752666 I2C: 01:15
1409 13:51:18.755866 PCI: 00:15.1 child on link 0 I2C: 02:5d
1410 13:51:18.766069 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1411 13:51:18.769164 I2C: 02:5d
1412 13:51:18.769268 GENERIC: 0.0
1413 13:51:18.772684 PCI: 00:16.0
1414 13:51:18.783039 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1415 13:51:18.783145 PCI: 00:17.0
1416 13:51:18.792321 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1417 13:51:18.802590 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1418 13:51:18.812336 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1419 13:51:18.822299 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1420 13:51:18.832171 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1421 13:51:18.841944 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1422 13:51:18.845340 PCI: 00:19.0 child on link 0 I2C: 03:1a
1423 13:51:18.855219 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1424 13:51:18.858896 I2C: 03:1a
1425 13:51:18.858975 I2C: 03:38
1426 13:51:18.859038 I2C: 03:39
1427 13:51:18.862259 I2C: 03:3a
1428 13:51:18.862355 I2C: 03:3b
1429 13:51:18.868680 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1430 13:51:18.878885 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1431 13:51:18.888334 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1432 13:51:18.898246 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1433 13:51:18.898357 PCI: 01:00.0
1434 13:51:18.908709 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1435 13:51:18.911748 PCI: 00:1e.0
1436 13:51:18.921418 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1437 13:51:18.931376 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1438 13:51:18.938006 PCI: 00:1e.2 child on link 0 SPI: 00
1439 13:51:18.947690 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1440 13:51:18.947792 SPI: 00
1441 13:51:18.951282 PCI: 00:1e.3 child on link 0 SPI: 01
1442 13:51:18.961031 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1443 13:51:18.964259 SPI: 01
1444 13:51:18.968000 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1445 13:51:18.978081 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1446 13:51:18.987877 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1447 13:51:18.987960 PNP: 0c09.0
1448 13:51:18.997525 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1449 13:51:18.997602 PCI: 00:1f.3
1450 13:51:19.007493 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1451 13:51:19.017489 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1452 13:51:19.020656 PCI: 00:1f.4
1453 13:51:19.030448 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1454 13:51:19.040176 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1455 13:51:19.040259 PCI: 00:1f.5
1456 13:51:19.049953 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1457 13:51:19.053726 Done allocating resources.
1458 13:51:19.060151 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1459 13:51:19.063244 Enabling resources...
1460 13:51:19.067086 PCI: 00:00.0 subsystem <- 8086/9b61
1461 13:51:19.070120 PCI: 00:00.0 cmd <- 06
1462 13:51:19.073269 PCI: 00:02.0 subsystem <- 8086/9b41
1463 13:51:19.076957 PCI: 00:02.0 cmd <- 03
1464 13:51:19.080095 PCI: 00:08.0 cmd <- 06
1465 13:51:19.083144 PCI: 00:12.0 subsystem <- 8086/02f9
1466 13:51:19.083244 PCI: 00:12.0 cmd <- 02
1467 13:51:19.089852 PCI: 00:14.0 subsystem <- 8086/02ed
1468 13:51:19.089954 PCI: 00:14.0 cmd <- 02
1469 13:51:19.093551 PCI: 00:14.2 cmd <- 02
1470 13:51:19.096720 PCI: 00:14.3 subsystem <- 8086/02f0
1471 13:51:19.100114 PCI: 00:14.3 cmd <- 02
1472 13:51:19.103326 PCI: 00:15.0 subsystem <- 8086/02e8
1473 13:51:19.106474 PCI: 00:15.0 cmd <- 02
1474 13:51:19.109681 PCI: 00:15.1 subsystem <- 8086/02e9
1475 13:51:19.113458 PCI: 00:15.1 cmd <- 02
1476 13:51:19.116480 PCI: 00:16.0 subsystem <- 8086/02e0
1477 13:51:19.119451 PCI: 00:16.0 cmd <- 02
1478 13:51:19.122884 PCI: 00:17.0 subsystem <- 8086/02d3
1479 13:51:19.126366 PCI: 00:17.0 cmd <- 03
1480 13:51:19.129573 PCI: 00:19.0 subsystem <- 8086/02c5
1481 13:51:19.129680 PCI: 00:19.0 cmd <- 02
1482 13:51:19.133155 PCI: 00:1d.0 bridge ctrl <- 0013
1483 13:51:19.139949 PCI: 00:1d.0 subsystem <- 8086/02b0
1484 13:51:19.140027 PCI: 00:1d.0 cmd <- 06
1485 13:51:19.143289 PCI: 00:1e.0 subsystem <- 8086/02a8
1486 13:51:19.146229 PCI: 00:1e.0 cmd <- 06
1487 13:51:19.150089 PCI: 00:1e.2 subsystem <- 8086/02aa
1488 13:51:19.152900 PCI: 00:1e.2 cmd <- 06
1489 13:51:19.156540 PCI: 00:1e.3 subsystem <- 8086/02ab
1490 13:51:19.159801 PCI: 00:1e.3 cmd <- 02
1491 13:51:19.162831 PCI: 00:1f.0 subsystem <- 8086/0284
1492 13:51:19.166290 PCI: 00:1f.0 cmd <- 407
1493 13:51:19.169628 PCI: 00:1f.3 subsystem <- 8086/02c8
1494 13:51:19.172712 PCI: 00:1f.3 cmd <- 02
1495 13:51:19.176172 PCI: 00:1f.4 subsystem <- 8086/02a3
1496 13:51:19.179646 PCI: 00:1f.4 cmd <- 03
1497 13:51:19.183187 PCI: 00:1f.5 subsystem <- 8086/02a4
1498 13:51:19.186313 PCI: 00:1f.5 cmd <- 406
1499 13:51:19.193476 PCI: 01:00.0 cmd <- 02
1500 13:51:19.198995 done.
1501 13:51:19.207460 ME: Version: 14.0.39.1367
1502 13:51:19.213633 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1503 13:51:19.216800 Initializing devices...
1504 13:51:19.216873 Root Device init ...
1505 13:51:19.223938 Chrome EC: Set SMI mask to 0x0000000000000000
1506 13:51:19.226753 Chrome EC: clear events_b mask to 0x0000000000000000
1507 13:51:19.233987 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1508 13:51:19.240078 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1509 13:51:19.246685 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1510 13:51:19.250404 Chrome EC: Set WAKE mask to 0x0000000000000000
1511 13:51:19.253553 Root Device init finished in 35181 usecs
1512 13:51:19.257278 CPU_CLUSTER: 0 init ...
1513 13:51:19.263495 CPU_CLUSTER: 0 init finished in 2441 usecs
1514 13:51:19.267934 PCI: 00:00.0 init ...
1515 13:51:19.271281 CPU TDP: 15 Watts
1516 13:51:19.274107 CPU PL2 = 64 Watts
1517 13:51:19.277549 PCI: 00:00.0 init finished in 7082 usecs
1518 13:51:19.280863 PCI: 00:02.0 init ...
1519 13:51:19.284712 PCI: 00:02.0 init finished in 2255 usecs
1520 13:51:19.287849 PCI: 00:08.0 init ...
1521 13:51:19.291174 PCI: 00:08.0 init finished in 2254 usecs
1522 13:51:19.294101 PCI: 00:12.0 init ...
1523 13:51:19.297535 PCI: 00:12.0 init finished in 2252 usecs
1524 13:51:19.301143 PCI: 00:14.0 init ...
1525 13:51:19.304336 PCI: 00:14.0 init finished in 2245 usecs
1526 13:51:19.307668 PCI: 00:14.2 init ...
1527 13:51:19.310779 PCI: 00:14.2 init finished in 2254 usecs
1528 13:51:19.314547 PCI: 00:14.3 init ...
1529 13:51:19.317674 PCI: 00:14.3 init finished in 2272 usecs
1530 13:51:19.320792 PCI: 00:15.0 init ...
1531 13:51:19.323969 DW I2C bus 0 at 0xd121f000 (400 KHz)
1532 13:51:19.327057 PCI: 00:15.0 init finished in 5979 usecs
1533 13:51:19.330738 PCI: 00:15.1 init ...
1534 13:51:19.333833 DW I2C bus 1 at 0xd1220000 (400 KHz)
1535 13:51:19.340334 PCI: 00:15.1 init finished in 5979 usecs
1536 13:51:19.340434 PCI: 00:16.0 init ...
1537 13:51:19.347006 PCI: 00:16.0 init finished in 2253 usecs
1538 13:51:19.350268 PCI: 00:19.0 init ...
1539 13:51:19.354012 DW I2C bus 4 at 0xd1222000 (400 KHz)
1540 13:51:19.357036 PCI: 00:19.0 init finished in 5977 usecs
1541 13:51:19.360186 PCI: 00:1d.0 init ...
1542 13:51:19.364017 Initializing PCH PCIe bridge.
1543 13:51:19.367067 PCI: 00:1d.0 init finished in 5278 usecs
1544 13:51:19.370152 PCI: 00:1f.0 init ...
1545 13:51:19.373651 IOAPIC: Initializing IOAPIC at 0xfec00000
1546 13:51:19.380430 IOAPIC: Bootstrap Processor Local APIC = 0x00
1547 13:51:19.380533 IOAPIC: ID = 0x02
1548 13:51:19.383626 IOAPIC: Dumping registers
1549 13:51:19.386669 reg 0x0000: 0x02000000
1550 13:51:19.389829 reg 0x0001: 0x00770020
1551 13:51:19.389928 reg 0x0002: 0x00000000
1552 13:51:19.396442 PCI: 00:1f.0 init finished in 23536 usecs
1553 13:51:19.400028 PCI: 00:1f.4 init ...
1554 13:51:19.403042 PCI: 00:1f.4 init finished in 2262 usecs
1555 13:51:19.413786 PCI: 01:00.0 init ...
1556 13:51:19.417280 PCI: 01:00.0 init finished in 2253 usecs
1557 13:51:19.421488 PNP: 0c09.0 init ...
1558 13:51:19.424573 Google Chrome EC uptime: 11.254 seconds
1559 13:51:19.431414 Google Chrome AP resets since EC boot: 0
1560 13:51:19.435002 Google Chrome most recent AP reset causes:
1561 13:51:19.441049 Google Chrome EC reset flags at last EC boot: reset-pin
1562 13:51:19.444772 PNP: 0c09.0 init finished in 20636 usecs
1563 13:51:19.448387 Devices initialized
1564 13:51:19.451581 Show all devs... After init.
1565 13:51:19.451709 Root Device: enabled 1
1566 13:51:19.454638 CPU_CLUSTER: 0: enabled 1
1567 13:51:19.457722 DOMAIN: 0000: enabled 1
1568 13:51:19.457791 APIC: 00: enabled 1
1569 13:51:19.461413 PCI: 00:00.0: enabled 1
1570 13:51:19.464589 PCI: 00:02.0: enabled 1
1571 13:51:19.467707 PCI: 00:04.0: enabled 0
1572 13:51:19.467809 PCI: 00:05.0: enabled 0
1573 13:51:19.471365 PCI: 00:12.0: enabled 1
1574 13:51:19.474557 PCI: 00:12.5: enabled 0
1575 13:51:19.478179 PCI: 00:12.6: enabled 0
1576 13:51:19.478280 PCI: 00:14.0: enabled 1
1577 13:51:19.480936 PCI: 00:14.1: enabled 0
1578 13:51:19.484595 PCI: 00:14.3: enabled 1
1579 13:51:19.484692 PCI: 00:14.5: enabled 0
1580 13:51:19.487837 PCI: 00:15.0: enabled 1
1581 13:51:19.491215 PCI: 00:15.1: enabled 1
1582 13:51:19.494323 PCI: 00:15.2: enabled 0
1583 13:51:19.494419 PCI: 00:15.3: enabled 0
1584 13:51:19.497506 PCI: 00:16.0: enabled 1
1585 13:51:19.501220 PCI: 00:16.1: enabled 0
1586 13:51:19.504314 PCI: 00:16.2: enabled 0
1587 13:51:19.504414 PCI: 00:16.3: enabled 0
1588 13:51:19.507790 PCI: 00:16.4: enabled 0
1589 13:51:19.510887 PCI: 00:16.5: enabled 0
1590 13:51:19.514278 PCI: 00:17.0: enabled 1
1591 13:51:19.514361 PCI: 00:19.0: enabled 1
1592 13:51:19.517283 PCI: 00:19.1: enabled 0
1593 13:51:19.520871 PCI: 00:19.2: enabled 0
1594 13:51:19.520955 PCI: 00:1a.0: enabled 0
1595 13:51:19.524051 PCI: 00:1c.0: enabled 0
1596 13:51:19.527406 PCI: 00:1c.1: enabled 0
1597 13:51:19.531137 PCI: 00:1c.2: enabled 0
1598 13:51:19.531220 PCI: 00:1c.3: enabled 0
1599 13:51:19.534108 PCI: 00:1c.4: enabled 0
1600 13:51:19.537543 PCI: 00:1c.5: enabled 0
1601 13:51:19.540727 PCI: 00:1c.6: enabled 0
1602 13:51:19.540810 PCI: 00:1c.7: enabled 0
1603 13:51:19.544155 PCI: 00:1d.0: enabled 1
1604 13:51:19.547443 PCI: 00:1d.1: enabled 0
1605 13:51:19.550279 PCI: 00:1d.2: enabled 0
1606 13:51:19.550362 PCI: 00:1d.3: enabled 0
1607 13:51:19.554435 PCI: 00:1d.4: enabled 0
1608 13:51:19.556987 PCI: 00:1d.5: enabled 0
1609 13:51:19.560720 PCI: 00:1e.0: enabled 1
1610 13:51:19.560803 PCI: 00:1e.1: enabled 0
1611 13:51:19.563610 PCI: 00:1e.2: enabled 1
1612 13:51:19.567144 PCI: 00:1e.3: enabled 1
1613 13:51:19.567227 PCI: 00:1f.0: enabled 1
1614 13:51:19.570316 PCI: 00:1f.1: enabled 0
1615 13:51:19.573457 PCI: 00:1f.2: enabled 0
1616 13:51:19.577307 PCI: 00:1f.3: enabled 1
1617 13:51:19.577390 PCI: 00:1f.4: enabled 1
1618 13:51:19.580411 PCI: 00:1f.5: enabled 1
1619 13:51:19.583390 PCI: 00:1f.6: enabled 0
1620 13:51:19.587093 USB0 port 0: enabled 1
1621 13:51:19.587176 I2C: 01:15: enabled 1
1622 13:51:19.590211 I2C: 02:5d: enabled 1
1623 13:51:19.593811 GENERIC: 0.0: enabled 1
1624 13:51:19.593894 I2C: 03:1a: enabled 1
1625 13:51:19.597334 I2C: 03:38: enabled 1
1626 13:51:19.599895 I2C: 03:39: enabled 1
1627 13:51:19.599978 I2C: 03:3a: enabled 1
1628 13:51:19.603574 I2C: 03:3b: enabled 1
1629 13:51:19.606696 PCI: 00:00.0: enabled 1
1630 13:51:19.606779 SPI: 00: enabled 1
1631 13:51:19.610386 SPI: 01: enabled 1
1632 13:51:19.613450 PNP: 0c09.0: enabled 1
1633 13:51:19.613533 USB2 port 0: enabled 1
1634 13:51:19.617070 USB2 port 1: enabled 1
1635 13:51:19.619930 USB2 port 2: enabled 0
1636 13:51:19.620013 USB2 port 3: enabled 0
1637 13:51:19.623214 USB2 port 5: enabled 0
1638 13:51:19.626630 USB2 port 6: enabled 1
1639 13:51:19.630070 USB2 port 9: enabled 1
1640 13:51:19.630153 USB3 port 0: enabled 1
1641 13:51:19.633461 USB3 port 1: enabled 1
1642 13:51:19.636610 USB3 port 2: enabled 1
1643 13:51:19.636694 USB3 port 3: enabled 1
1644 13:51:19.639831 USB3 port 4: enabled 0
1645 13:51:19.643536 APIC: 03: enabled 1
1646 13:51:19.643648 APIC: 01: enabled 1
1647 13:51:19.646719 APIC: 02: enabled 1
1648 13:51:19.650214 APIC: 05: enabled 1
1649 13:51:19.650297 APIC: 04: enabled 1
1650 13:51:19.653143 APIC: 07: enabled 1
1651 13:51:19.653227 APIC: 06: enabled 1
1652 13:51:19.656675 PCI: 00:08.0: enabled 1
1653 13:51:19.659685 PCI: 00:14.2: enabled 1
1654 13:51:19.663360 PCI: 01:00.0: enabled 1
1655 13:51:19.666306 Disabling ACPI via APMC:
1656 13:51:19.666398 done.
1657 13:51:19.673386 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1658 13:51:19.676289 ELOG: NV offset 0xaf0000 size 0x4000
1659 13:51:19.682796 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1660 13:51:19.689941 ELOG: Event(17) added with size 13 at 2023-10-26 13:49:44 UTC
1661 13:51:19.696250 POST: Unexpected post code in previous boot: 0x73
1662 13:51:19.702827 ELOG: Event(A3) added with size 11 at 2023-10-26 13:49:44 UTC
1663 13:51:19.709888 ELOG: Event(A6) added with size 13 at 2023-10-26 13:49:44 UTC
1664 13:51:19.716054 ELOG: Event(92) added with size 9 at 2023-10-26 13:49:44 UTC
1665 13:51:19.722875 ELOG: Event(93) added with size 9 at 2023-10-26 13:49:44 UTC
1666 13:51:19.725953 ELOG: Event(9A) added with size 9 at 2023-10-26 13:49:44 UTC
1667 13:51:19.732542 ELOG: Event(9E) added with size 10 at 2023-10-26 13:49:44 UTC
1668 13:51:19.739670 ELOG: Event(9F) added with size 14 at 2023-10-26 13:49:44 UTC
1669 13:51:19.746254 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1670 13:51:19.752597 ELOG: Event(A1) added with size 10 at 2023-10-26 13:49:44 UTC
1671 13:51:19.759516 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1672 13:51:19.766035 ELOG: Event(A0) added with size 9 at 2023-10-26 13:49:44 UTC
1673 13:51:19.769209 elog_add_boot_reason: Logged dev mode boot
1674 13:51:19.772815 Finalize devices...
1675 13:51:19.775940 PCI: 00:17.0 final
1676 13:51:19.776009 Devices finalized
1677 13:51:19.782910 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1678 13:51:19.785568 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1679 13:51:19.792222 ME: HFSTS1 : 0x90000245
1680 13:51:19.795416 ME: HFSTS2 : 0x3B850126
1681 13:51:19.798873 ME: HFSTS3 : 0x00000020
1682 13:51:19.802191 ME: HFSTS4 : 0x00004800
1683 13:51:19.808633 ME: HFSTS5 : 0x00000000
1684 13:51:19.811980 ME: HFSTS6 : 0x40400006
1685 13:51:19.815551 ME: Manufacturing Mode : NO
1686 13:51:19.818628 ME: FW Partition Table : OK
1687 13:51:19.822308 ME: Bringup Loader Failure : NO
1688 13:51:19.825437 ME: Firmware Init Complete : YES
1689 13:51:19.828719 ME: Boot Options Present : NO
1690 13:51:19.831889 ME: Update In Progress : NO
1691 13:51:19.835524 ME: D0i3 Support : YES
1692 13:51:19.838397 ME: Low Power State Enabled : NO
1693 13:51:19.841670 ME: CPU Replaced : NO
1694 13:51:19.845049 ME: CPU Replacement Valid : YES
1695 13:51:19.848331 ME: Current Working State : 5
1696 13:51:19.851784 ME: Current Operation State : 1
1697 13:51:19.855515 ME: Current Operation Mode : 0
1698 13:51:19.858719 ME: Error Code : 0
1699 13:51:19.861590 ME: CPU Debug Disabled : YES
1700 13:51:19.865153 ME: TXT Support : NO
1701 13:51:19.871836 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1702 13:51:19.874850 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1703 13:51:19.878561 CBFS @ c08000 size 3f8000
1704 13:51:19.885209 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1705 13:51:19.888320 CBFS: Locating 'fallback/dsdt.aml'
1706 13:51:19.891379 CBFS: Found @ offset 10bb80 size 3fa5
1707 13:51:19.898235 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1708 13:51:19.898337 CBFS @ c08000 size 3f8000
1709 13:51:19.904965 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1710 13:51:19.907832 CBFS: Locating 'fallback/slic'
1711 13:51:19.911733 CBFS: 'fallback/slic' not found.
1712 13:51:19.918252 ACPI: Writing ACPI tables at 99b3e000.
1713 13:51:19.918366 ACPI: * FACS
1714 13:51:19.921987 ACPI: * DSDT
1715 13:51:19.924715 Ramoops buffer: 0x100000@0x99a3d000.
1716 13:51:19.928353 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1717 13:51:19.934740 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1718 13:51:19.938598 Google Chrome EC: version:
1719 13:51:19.941469 ro: helios_v2.0.2659-56403530b
1720 13:51:19.944511 rw: helios_v2.0.2849-c41de27e7d
1721 13:51:19.944594 running image: 1
1722 13:51:19.949350 ACPI: * FADT
1723 13:51:19.949433 SCI is IRQ9
1724 13:51:19.955992 ACPI: added table 1/32, length now 40
1725 13:51:19.956076 ACPI: * SSDT
1726 13:51:19.958664 Found 1 CPU(s) with 8 core(s) each.
1727 13:51:19.962290 Error: Could not locate 'wifi_sar' in VPD.
1728 13:51:19.969063 Checking CBFS for default SAR values
1729 13:51:19.972462 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1730 13:51:19.975541 CBFS @ c08000 size 3f8000
1731 13:51:19.982105 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1732 13:51:19.985237 CBFS: Locating 'wifi_sar_defaults.hex'
1733 13:51:19.988737 CBFS: Found @ offset 5fac0 size 77
1734 13:51:19.991920 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1735 13:51:19.998818 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1736 13:51:20.001966 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1737 13:51:20.008698 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1738 13:51:20.011909 failed to find key in VPD: dsm_calib_r0_0
1739 13:51:20.021810 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1740 13:51:20.025028 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1741 13:51:20.028145 failed to find key in VPD: dsm_calib_r0_1
1742 13:51:20.038146 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1743 13:51:20.044940 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1744 13:51:20.048085 failed to find key in VPD: dsm_calib_r0_2
1745 13:51:20.058256 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1746 13:51:20.061299 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1747 13:51:20.067841 failed to find key in VPD: dsm_calib_r0_3
1748 13:51:20.074727 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1749 13:51:20.081083 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1750 13:51:20.084380 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1751 13:51:20.087826 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1752 13:51:20.091796 EC returned error result code 1
1753 13:51:20.096020 EC returned error result code 1
1754 13:51:20.099689 EC returned error result code 1
1755 13:51:20.106207 PS2K: Bad resp from EC. Vivaldi disabled!
1756 13:51:20.109303 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1757 13:51:20.115984 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1758 13:51:20.122750 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1759 13:51:20.126307 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1760 13:51:20.132688 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1761 13:51:20.138927 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1762 13:51:20.145853 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1763 13:51:20.148956 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1764 13:51:20.155611 ACPI: added table 2/32, length now 44
1765 13:51:20.155710 ACPI: * MCFG
1766 13:51:20.158677 ACPI: added table 3/32, length now 48
1767 13:51:20.162688 ACPI: * TPM2
1768 13:51:20.165553 TPM2 log created at 99a2d000
1769 13:51:20.169117 ACPI: added table 4/32, length now 52
1770 13:51:20.169195 ACPI: * MADT
1771 13:51:20.172473 SCI is IRQ9
1772 13:51:20.175331 ACPI: added table 5/32, length now 56
1773 13:51:20.175412 current = 99b43ac0
1774 13:51:20.178858 ACPI: * DMAR
1775 13:51:20.182085 ACPI: added table 6/32, length now 60
1776 13:51:20.185338 ACPI: * IGD OpRegion
1777 13:51:20.188131 GMA: Found VBT in CBFS
1778 13:51:20.188228 GMA: Found valid VBT in CBFS
1779 13:51:20.195002 ACPI: added table 7/32, length now 64
1780 13:51:20.195083 ACPI: * HPET
1781 13:51:20.198480 ACPI: added table 8/32, length now 68
1782 13:51:20.201844 ACPI: done.
1783 13:51:20.201924 ACPI tables: 31744 bytes.
1784 13:51:20.204878 smbios_write_tables: 99a2c000
1785 13:51:20.208325 EC returned error result code 3
1786 13:51:20.211479 Couldn't obtain OEM name from CBI
1787 13:51:20.215204 Create SMBIOS type 17
1788 13:51:20.218764 PCI: 00:00.0 (Intel Cannonlake)
1789 13:51:20.221952 PCI: 00:14.3 (Intel WiFi)
1790 13:51:20.225734 SMBIOS tables: 939 bytes.
1791 13:51:20.228746 Writing table forward entry at 0x00000500
1792 13:51:20.235600 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1793 13:51:20.238605 Writing coreboot table at 0x99b62000
1794 13:51:20.245430 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1795 13:51:20.248648 1. 0000000000001000-000000000009ffff: RAM
1796 13:51:20.251783 2. 00000000000a0000-00000000000fffff: RESERVED
1797 13:51:20.258730 3. 0000000000100000-0000000099a2bfff: RAM
1798 13:51:20.265457 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1799 13:51:20.268548 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1800 13:51:20.274988 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1801 13:51:20.278412 7. 000000009a000000-000000009f7fffff: RESERVED
1802 13:51:20.285203 8. 00000000e0000000-00000000efffffff: RESERVED
1803 13:51:20.288401 9. 00000000fc000000-00000000fc000fff: RESERVED
1804 13:51:20.294924 10. 00000000fe000000-00000000fe00ffff: RESERVED
1805 13:51:20.297845 11. 00000000fed10000-00000000fed17fff: RESERVED
1806 13:51:20.301576 12. 00000000fed80000-00000000fed83fff: RESERVED
1807 13:51:20.308046 13. 00000000fed90000-00000000fed91fff: RESERVED
1808 13:51:20.311703 14. 00000000feda0000-00000000feda1fff: RESERVED
1809 13:51:20.317783 15. 0000000100000000-000000045e7fffff: RAM
1810 13:51:20.321405 Graphics framebuffer located at 0xc0000000
1811 13:51:20.324425 Passing 5 GPIOs to payload:
1812 13:51:20.327898 NAME | PORT | POLARITY | VALUE
1813 13:51:20.334602 write protect | undefined | high | high
1814 13:51:20.341265 lid | undefined | high | high
1815 13:51:20.344448 power | undefined | high | low
1816 13:51:20.351087 oprom | undefined | high | low
1817 13:51:20.354583 EC in RW | 0x000000cb | high | low
1818 13:51:20.357674 Board ID: 4
1819 13:51:20.360842 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1820 13:51:20.364506 CBFS @ c08000 size 3f8000
1821 13:51:20.371288 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1822 13:51:20.377436 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d86
1823 13:51:20.377516 coreboot table: 1492 bytes.
1824 13:51:20.381196 IMD ROOT 0. 99fff000 00001000
1825 13:51:20.384156 IMD SMALL 1. 99ffe000 00001000
1826 13:51:20.387920 FSP MEMORY 2. 99c4e000 003b0000
1827 13:51:20.390957 CONSOLE 3. 99c2e000 00020000
1828 13:51:20.394170 FMAP 4. 99c2d000 0000054e
1829 13:51:20.397786 TIME STAMP 5. 99c2c000 00000910
1830 13:51:20.401254 VBOOT WORK 6. 99c18000 00014000
1831 13:51:20.404307 MRC DATA 7. 99c16000 00001958
1832 13:51:20.407282 ROMSTG STCK 8. 99c15000 00001000
1833 13:51:20.410763 AFTER CAR 9. 99c0b000 0000a000
1834 13:51:20.414330 RAMSTAGE 10. 99baf000 0005c000
1835 13:51:20.417491 REFCODE 11. 99b7a000 00035000
1836 13:51:20.421262 SMM BACKUP 12. 99b6a000 00010000
1837 13:51:20.424390 COREBOOT 13. 99b62000 00008000
1838 13:51:20.427304 ACPI 14. 99b3e000 00024000
1839 13:51:20.430993 ACPI GNVS 15. 99b3d000 00001000
1840 13:51:20.434187 RAMOOPS 16. 99a3d000 00100000
1841 13:51:20.437363 TPM2 TCGLOG17. 99a2d000 00010000
1842 13:51:20.441179 SMBIOS 18. 99a2c000 00000800
1843 13:51:20.444267 IMD small region:
1844 13:51:20.447388 IMD ROOT 0. 99ffec00 00000400
1845 13:51:20.451027 FSP RUNTIME 1. 99ffebe0 00000004
1846 13:51:20.453913 EC HOSTEVENT 2. 99ffebc0 00000008
1847 13:51:20.457829 POWER STATE 3. 99ffeb80 00000040
1848 13:51:20.460853 ROMSTAGE 4. 99ffeb60 00000004
1849 13:51:20.464172 MEM INFO 5. 99ffe9a0 000001b9
1850 13:51:20.467145 VPD 6. 99ffe920 0000006c
1851 13:51:20.470863 MTRR: Physical address space:
1852 13:51:20.477448 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1853 13:51:20.483764 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1854 13:51:20.490891 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1855 13:51:20.497150 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1856 13:51:20.504003 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1857 13:51:20.510262 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1858 13:51:20.517019 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1859 13:51:20.520502 MTRR: Fixed MSR 0x250 0x0606060606060606
1860 13:51:20.523576 MTRR: Fixed MSR 0x258 0x0606060606060606
1861 13:51:20.526740 MTRR: Fixed MSR 0x259 0x0000000000000000
1862 13:51:20.533441 MTRR: Fixed MSR 0x268 0x0606060606060606
1863 13:51:20.536584 MTRR: Fixed MSR 0x269 0x0606060606060606
1864 13:51:20.540401 MTRR: Fixed MSR 0x26a 0x0606060606060606
1865 13:51:20.543474 MTRR: Fixed MSR 0x26b 0x0606060606060606
1866 13:51:20.546553 MTRR: Fixed MSR 0x26c 0x0606060606060606
1867 13:51:20.553549 MTRR: Fixed MSR 0x26d 0x0606060606060606
1868 13:51:20.556748 MTRR: Fixed MSR 0x26e 0x0606060606060606
1869 13:51:20.559869 MTRR: Fixed MSR 0x26f 0x0606060606060606
1870 13:51:20.563550 call enable_fixed_mtrr()
1871 13:51:20.566731 CPU physical address size: 39 bits
1872 13:51:20.573373 MTRR: default type WB/UC MTRR counts: 6/8.
1873 13:51:20.576750 MTRR: WB selected as default type.
1874 13:51:20.579711 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1875 13:51:20.586489 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1876 13:51:20.592862 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1877 13:51:20.599768 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1878 13:51:20.606322 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1879 13:51:20.612776 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1880 13:51:20.616061 MTRR: Fixed MSR 0x250 0x0606060606060606
1881 13:51:20.622803 MTRR: Fixed MSR 0x258 0x0606060606060606
1882 13:51:20.626049 MTRR: Fixed MSR 0x259 0x0000000000000000
1883 13:51:20.629835 MTRR: Fixed MSR 0x268 0x0606060606060606
1884 13:51:20.632622 MTRR: Fixed MSR 0x269 0x0606060606060606
1885 13:51:20.639612 MTRR: Fixed MSR 0x26a 0x0606060606060606
1886 13:51:20.642593 MTRR: Fixed MSR 0x26b 0x0606060606060606
1887 13:51:20.646190 MTRR: Fixed MSR 0x26c 0x0606060606060606
1888 13:51:20.649588 MTRR: Fixed MSR 0x26d 0x0606060606060606
1889 13:51:20.655788 MTRR: Fixed MSR 0x26e 0x0606060606060606
1890 13:51:20.659020 MTRR: Fixed MSR 0x26f 0x0606060606060606
1891 13:51:20.659095
1892 13:51:20.659157 MTRR check
1893 13:51:20.662766 Fixed MTRRs : Enabled
1894 13:51:20.665820 Variable MTRRs: Enabled
1895 13:51:20.665895
1896 13:51:20.668955 call enable_fixed_mtrr()
1897 13:51:20.672570 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 13:51:20.675763 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 13:51:20.678975 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 13:51:20.685461 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 13:51:20.689276 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 13:51:20.692335 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 13:51:20.695437 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 13:51:20.699237 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 13:51:20.705309 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 13:51:20.709211 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 13:51:20.712286 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 13:51:20.715473 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 13:51:20.721991 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 13:51:20.725188 call enable_fixed_mtrr()
1911 13:51:20.728762 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 13:51:20.732252 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 13:51:20.735477 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 13:51:20.738550 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 13:51:20.745737 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 13:51:20.748492 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 13:51:20.751633 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 13:51:20.755413 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 13:51:20.762085 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 13:51:20.765549 CPU physical address size: 39 bits
1921 13:51:20.768353 call enable_fixed_mtrr()
1922 13:51:20.771965 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 13:51:20.775067 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 13:51:20.778115 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 13:51:20.784865 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 13:51:20.788541 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 13:51:20.791677 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 13:51:20.794957 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 13:51:20.801207 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 13:51:20.804795 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 13:51:20.807966 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 13:51:20.811646 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 13:51:20.817867 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 13:51:20.821555 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 13:51:20.824719 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 13:51:20.827839 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 13:51:20.834698 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 13:51:20.838085 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 13:51:20.841264 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 13:51:20.844324 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 13:51:20.850913 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 13:51:20.854680 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 13:51:20.857670 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 13:51:20.860829 call enable_fixed_mtrr()
1945 13:51:20.864035 call enable_fixed_mtrr()
1946 13:51:20.867789 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1947 13:51:20.870950 CPU physical address size: 39 bits
1948 13:51:20.877908 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1949 13:51:20.881180 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 13:51:20.884514 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 13:51:20.891111 MTRR: Fixed MSR 0x259 0x0000000000000000
1952 13:51:20.894169 MTRR: Fixed MSR 0x268 0x0606060606060606
1953 13:51:20.897914 MTRR: Fixed MSR 0x269 0x0606060606060606
1954 13:51:20.901037 MTRR: Fixed MSR 0x26a 0x0606060606060606
1955 13:51:20.904744 MTRR: Fixed MSR 0x26b 0x0606060606060606
1956 13:51:20.911091 MTRR: Fixed MSR 0x26c 0x0606060606060606
1957 13:51:20.913962 MTRR: Fixed MSR 0x26d 0x0606060606060606
1958 13:51:20.917683 MTRR: Fixed MSR 0x26e 0x0606060606060606
1959 13:51:20.920890 MTRR: Fixed MSR 0x26f 0x0606060606060606
1960 13:51:20.927520 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 13:51:20.930717 call enable_fixed_mtrr()
1962 13:51:20.933672 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 13:51:20.937342 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 13:51:20.940769 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 13:51:20.944019 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 13:51:20.950285 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 13:51:20.954071 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 13:51:20.957061 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 13:51:20.960332 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 13:51:20.966781 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 13:51:20.970497 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 13:51:20.973718 CPU physical address size: 39 bits
1973 13:51:20.976731 call enable_fixed_mtrr()
1974 13:51:20.980382 CPU physical address size: 39 bits
1975 13:51:20.983571 CPU physical address size: 39 bits
1976 13:51:20.986565 CPU physical address size: 39 bits
1977 13:51:20.990332 CBFS @ c08000 size 3f8000
1978 13:51:20.996450 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1979 13:51:20.999851 CPU physical address size: 39 bits
1980 13:51:21.003338 CBFS: Locating 'fallback/payload'
1981 13:51:21.006428 CBFS: Found @ offset 1c96c0 size 3f798
1982 13:51:21.013118 Checking segment from ROM address 0xffdd16f8
1983 13:51:21.016651 Checking segment from ROM address 0xffdd1714
1984 13:51:21.019596 Loading segment from ROM address 0xffdd16f8
1985 13:51:21.023086 code (compression=0)
1986 13:51:21.032859 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1987 13:51:21.039648 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1988 13:51:21.043030 it's not compressed!
1989 13:51:21.135127 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1990 13:51:21.141648 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1991 13:51:21.145008 Loading segment from ROM address 0xffdd1714
1992 13:51:21.148067 Entry Point 0x30000000
1993 13:51:21.151308 Loaded segments
1994 13:51:21.156693 Finalizing chipset.
1995 13:51:21.160340 Finalizing SMM.
1996 13:51:21.163289 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1997 13:51:21.166863 mp_park_aps done after 0 msecs.
1998 13:51:21.173646 Jumping to boot code at 30000000(99b62000)
1999 13:51:21.180410 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2000 13:51:21.180485
2001 13:51:21.180548
2002 13:51:21.180614
2003 13:51:21.183271 Starting depthcharge on Helios...
2004 13:51:21.183347
2005 13:51:21.183768 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2006 13:51:21.183876 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2007 13:51:21.183957 Setting prompt string to ['hatch:']
2008 13:51:21.184039 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2009 13:51:21.193272 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2010 13:51:21.193376
2011 13:51:21.200113 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2012 13:51:21.200193
2013 13:51:21.206882 board_setup: Info: eMMC controller not present; skipping
2014 13:51:21.206963
2015 13:51:21.209959 New NVMe Controller 0x30053aa8 @ 00:1d:00
2016 13:51:21.210040
2017 13:51:21.216475 board_setup: Info: SDHCI controller not present; skipping
2018 13:51:21.216555
2019 13:51:21.222887 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2020 13:51:21.222970
2021 13:51:21.223033 Wipe memory regions:
2022 13:51:21.223091
2023 13:51:21.226588 [0x00000000001000, 0x000000000a0000)
2024 13:51:21.226667
2025 13:51:21.229528 [0x00000000100000, 0x00000030000000)
2026 13:51:21.295249
2027 13:51:21.298580 [0x00000030657430, 0x00000099a2c000)
2028 13:51:21.435542
2029 13:51:21.438756 [0x00000100000000, 0x0000045e800000)
2030 13:51:22.989756
2031 13:51:22.989906 R8152: Initializing
2032 13:51:22.989972
2033 13:51:22.993090 Version 6 (ocp_data = 5c30)
2034 13:51:22.993172
2035 13:51:22.996219 R8152: Done initializing
2036 13:51:22.996299
2037 13:51:22.999803 Adding net device
2038 13:51:22.999883
2039 13:51:23.006707 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2040 13:51:23.006791
2041 13:51:23.006853
2042 13:51:23.006912
2043 13:51:23.007193 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2045 13:51:23.107574 hatch: tftpboot 192.168.201.1 11884143/tftp-deploy-cymtohgg/kernel/bzImage 11884143/tftp-deploy-cymtohgg/kernel/cmdline 11884143/tftp-deploy-cymtohgg/ramdisk/ramdisk.cpio.gz
2046 13:51:23.107740 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2047 13:51:23.107825 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2048 13:51:23.112032 tftpboot 192.168.201.1 11884143/tftp-deploy-cymtohgg/kernel/bzIploy-cymtohgg/kernel/cmdline 11884143/tftp-deploy-cymtohgg/ramdisk/ramdisk.cpio.gz
2049 13:51:23.112118
2050 13:51:23.112182 Waiting for link
2051 13:51:23.313115
2052 13:51:23.313256 done.
2053 13:51:23.313322
2054 13:51:23.313381 MAC: 00:24:32:50:19:be
2055 13:51:23.313439
2056 13:51:23.316412 Sending DHCP discover... done.
2057 13:51:23.316494
2058 13:51:23.319909 Waiting for reply... done.
2059 13:51:23.319990
2060 13:51:23.323523 Sending DHCP request... done.
2061 13:51:23.323606
2062 13:51:23.326311 Waiting for reply... done.
2063 13:51:23.326390
2064 13:51:23.329674 My ip is 192.168.201.15
2065 13:51:23.329754
2066 13:51:23.333183 The DHCP server ip is 192.168.201.1
2067 13:51:23.333263
2068 13:51:23.339392 TFTP server IP predefined by user: 192.168.201.1
2069 13:51:23.339473
2070 13:51:23.346002 Bootfile predefined by user: 11884143/tftp-deploy-cymtohgg/kernel/bzImage
2071 13:51:23.346082
2072 13:51:23.349544 Sending tftp read request... done.
2073 13:51:23.349624
2074 13:51:23.352976 Waiting for the transfer...
2075 13:51:23.353056
2076 13:51:23.877051 00000000 ################################################################
2077 13:51:23.877202
2078 13:51:24.398889 00080000 ################################################################
2079 13:51:24.399051
2080 13:51:24.932812 00100000 ################################################################
2081 13:51:24.932951
2082 13:51:25.479745 00180000 ################################################################
2083 13:51:25.479884
2084 13:51:26.019720 00200000 ################################################################
2085 13:51:26.019859
2086 13:51:26.561961 00280000 ################################################################
2087 13:51:26.562101
2088 13:51:27.091270 00300000 ################################################################
2089 13:51:27.091413
2090 13:51:27.626449 00380000 ################################################################
2091 13:51:27.626605
2092 13:51:28.160545 00400000 ################################################################
2093 13:51:28.160691
2094 13:51:28.685293 00480000 ################################################################
2095 13:51:28.685442
2096 13:51:29.224563 00500000 ################################################################
2097 13:51:29.224708
2098 13:51:29.757181 00580000 ################################################################
2099 13:51:29.757339
2100 13:51:30.302699 00600000 ################################################################
2101 13:51:30.302846
2102 13:51:30.820785 00680000 ################################################################
2103 13:51:30.820927
2104 13:51:31.354000 00700000 ################################################################
2105 13:51:31.354144
2106 13:51:31.895786 00780000 ################################################################
2107 13:51:31.895924
2108 13:51:32.088556 00800000 ####################### done.
2109 13:51:32.088687
2110 13:51:32.092174 The bootfile was 8576912 bytes long.
2111 13:51:32.092249
2112 13:51:32.094897 Sending tftp read request... done.
2113 13:51:32.094972
2114 13:51:32.098285 Waiting for the transfer...
2115 13:51:32.098357
2116 13:51:32.633171 00000000 ################################################################
2117 13:51:32.633313
2118 13:51:33.172087 00080000 ################################################################
2119 13:51:33.172246
2120 13:51:33.686218 00100000 ################################################################
2121 13:51:33.686363
2122 13:51:34.255965 00180000 ################################################################
2123 13:51:34.256485
2124 13:51:34.964375 00200000 ################################################################
2125 13:51:34.964889
2126 13:51:35.658598 00280000 ################################################################
2127 13:51:35.658753
2128 13:51:36.234362 00300000 ################################################################
2129 13:51:36.234557
2130 13:51:36.804089 00380000 ################################################################
2131 13:51:36.804261
2132 13:51:37.340627 00400000 ################################################################
2133 13:51:37.340816
2134 13:51:37.877353 00480000 ################################################################
2135 13:51:37.877516
2136 13:51:38.421258 00500000 ################################################################
2137 13:51:38.421465
2138 13:51:38.666986 00580000 ############################# done.
2139 13:51:38.667177
2140 13:51:38.669997 Sending tftp read request... done.
2141 13:51:38.670186
2142 13:51:38.673027 Waiting for the transfer...
2143 13:51:38.673231
2144 13:51:38.673369 00000000 # done.
2145 13:51:38.673500
2146 13:51:38.683371 Command line loaded dynamically from TFTP file: 11884143/tftp-deploy-cymtohgg/kernel/cmdline
2147 13:51:38.683558
2148 13:51:38.712704 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11884143/extract-nfsrootfs-hjifdfca,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2149 13:51:38.712863
2150 13:51:38.716403 ec_init(0): CrosEC protocol v3 supported (256, 256)
2151 13:51:38.722569
2152 13:51:38.725471 Shutting down all USB controllers.
2153 13:51:38.725602
2154 13:51:38.725672 Removing current net device
2155 13:51:38.729611
2156 13:51:38.729785 Finalizing coreboot
2157 13:51:38.729886
2158 13:51:38.736446 Exiting depthcharge with code 4 at timestamp: 24956396
2159 13:51:38.736653
2160 13:51:38.736779
2161 13:51:38.736883 Starting kernel ...
2162 13:51:38.736974
2163 13:51:38.737095
2164 13:51:38.737625 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2165 13:51:38.737772 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2166 13:51:38.737883 Setting prompt string to ['Linux version [0-9]']
2167 13:51:38.738019 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2168 13:51:38.738127 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2170 13:56:02.738165 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2172 13:56:02.738463 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2174 13:56:02.738702 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2177 13:56:02.739072 end: 2 depthcharge-action (duration 00:05:00) [common]
2179 13:56:02.739398 Cleaning after the job
2180 13:56:02.739528 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/ramdisk
2181 13:56:02.740839 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/kernel
2182 13:56:02.742765 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/nfsrootfs
2183 13:56:02.860719 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11884143/tftp-deploy-cymtohgg/modules
2184 13:56:02.861196 start: 4.1 power-off (timeout 00:00:30) [common]
2185 13:56:02.861371 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2186 13:56:02.944866 >> Command sent successfully.
2187 13:56:02.954030 Returned 0 in 0 seconds
2188 13:56:03.054620 end: 4.1 power-off (duration 00:00:00) [common]
2190 13:56:03.055031 start: 4.2 read-feedback (timeout 00:10:00) [common]
2191 13:56:03.055293 Listened to connection for namespace 'common' for up to 1s
2193 13:56:03.055671 Listened to connection for namespace 'common' for up to 1s
2194 13:56:04.055751 Finalising connection for namespace 'common'
2195 13:56:04.055951 Disconnecting from shell: Finalise
2196 13:56:04.056049
2197 13:56:04.156426 end: 4.2 read-feedback (duration 00:00:01) [common]
2198 13:56:04.156687 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11884143
2199 13:56:04.664582 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11884143
2200 13:56:04.664779 JobError: Your job cannot terminate cleanly.